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------------- Begin Cut here for COMPONENT Declaration ------
component fwft_fifo_1 is
port (
    full_o : out std_logic;
    empty_o : out std_logic;
    wr_clk_i : in std_logic;
    rd_clk_i : in std_logic;
    wr_en_i : in std_logic;
    rd_en_i : in std_logic;
    wdata : in std_logic_vector(13 downto 0);
    rst_busy : out std_logic;
    rdata : out std_logic_vector(13 downto 0);
    a_rst_i : in std_logic;
    wr_datacount_o : out std_logic_vector(12 downto 0);
    rd_datacount_o : out std_logic_vector(12 downto 0);
    underflow_o : out std_logic;
    overflow_o : out std_logic
);
end component fwft_fifo_1;

---------------------- End COMPONENT Declaration ------------
------------- Begin Cut here for INSTANTIATION Template -----
u_fwft_fifo_1 : fwft_fifo_1
port map (
    full_o => full_o,
    empty_o => empty_o,
    wr_clk_i => wr_clk_i,
    rd_clk_i => rd_clk_i,
    wr_en_i => wr_en_i,
    rd_en_i => rd_en_i,
    wdata => wdata,
    rst_busy => rst_busy,
    rdata => rdata,
    a_rst_i => a_rst_i,
    wr_datacount_o => wr_datacount_o,
    rd_datacount_o => rd_datacount_o,
    underflow_o => underflow_o,
    overflow_o => overflow_o
);

------------------------ End INSTANTIATION Template ---------
