// =============================================================================
// Generated by efx_ipmgr
// Version: 2025.1.110.3.16
// IP Version: 1.2.15
// =============================================================================

////////////////////////////////////////////////////////////////////////////////
// Copyright (C) 2013-2025 Efinix Inc. All rights reserved.              
//
// This   document  contains  proprietary information  which   is        
// protected by  copyright. All rights  are reserved.  This notice       
// refers to original work by Efinix, Inc. which may be derivitive       
// of other work distributed under license of the authors.  In the       
// case of derivative work, nothing in this notice overrides the         
// original author's license agreement.  Where applicable, the           
// original license agreement is included in it's original               
// unmodified form immediately below this header.                        
//                                                                       
// WARRANTY DISCLAIMER.                                                  
//     THE  DESIGN, CODE, OR INFORMATION ARE PROVIDED “AS IS” AND        
//     EFINIX MAKES NO WARRANTIES, EXPRESS OR IMPLIED WITH               
//     RESPECT THERETO, AND EXPRESSLY DISCLAIMS ANY IMPLIED WARRANTIES,  
//     INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF          
//     MERCHANTABILITY, NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR    
//     PURPOSE.  SOME STATES DO NOT ALLOW EXCLUSIONS OF AN IMPLIED       
//     WARRANTY, SO THIS DISCLAIMER MAY NOT APPLY TO LICENSEE.           
//                                                                       
// LIMITATION OF LIABILITY.                                              
//     NOTWITHSTANDING ANYTHING TO THE CONTRARY, EXCEPT FOR BODILY       
//     INJURY, EFINIX SHALL NOT BE LIABLE WITH RESPECT TO ANY SUBJECT    
//     MATTER OF THIS AGREEMENT UNDER TORT, CONTRACT, STRICT LIABILITY   
//     OR ANY OTHER LEGAL OR EQUITABLE THEORY (I) FOR ANY INDIRECT,      
//     SPECIAL, INCIDENTAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES OF ANY    
//     CHARACTER INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF      
//     GOODWILL, DATA OR PROFIT, WORK STOPPAGE, OR COMPUTER FAILURE OR   
//     MALFUNCTION, OR IN ANY EVENT (II) FOR ANY AMOUNT IN EXCESS, IN    
//     THE AGGREGATE, OF THE FEE PAID BY LICENSEE TO EFINIX HEREUNDER    
//     (OR, IF THE FEE HAS BEEN WAIVED, $100), EVEN IF EFINIX SHALL HAVE 
//     BEEN INFORMED OF THE POSSIBILITY OF SUCH DAMAGES.  SOME STATES DO 
//     NOT ALLOW THE EXCLUSION OR LIMITATION OF INCIDENTAL OR            
//     CONSEQUENTIAL DAMAGES, SO THIS LIMITATION AND EXCLUSION MAY NOT   
//     APPLY TO LICENSEE.                                                
//
////////////////////////////////////////////////////////////////////////////////

Vsp_core u_Vsp_core
(
    .aresetn ( aresetn ),
    .aclk ( aclk ),
    .pixrxclk ( pixrxclk ),
    .memclk ( memclk ),
    .resetnMemclk ( resetnMemclk ),
    .apuAXIL_araddr ( apuAXIL_araddr ),
    .apuAXIL_arprot ( apuAXIL_arprot ),
    .apuAXIL_arready ( apuAXIL_arready ),
    .apuAXIL_arvalid ( apuAXIL_arvalid ),
    .apuAXIL_rdata ( apuAXIL_rdata ),
    .apuAXIL_rready ( apuAXIL_rready ),
    .apuAXIL_rresp ( apuAXIL_rresp ),
    .apuAXIL_rvalid ( apuAXIL_rvalid ),
    .apuAXIL_rlast ( apuAXIL_rlast ),
    .apuAXIL_awaddr ( apuAXIL_awaddr ),
    .apuAXIL_awprot ( apuAXIL_awprot ),
    .apuAXIL_awready ( apuAXIL_awready ),
    .apuAXIL_awvalid ( apuAXIL_awvalid ),
    .apuAXIL_wdata ( apuAXIL_wdata ),
    .apuAXIL_wready ( apuAXIL_wready ),
    .apuAXIL_wstrb ( apuAXIL_wstrb ),
    .apuAXIL_wvalid ( apuAXIL_wvalid ),
    .apuAXIL_bready ( apuAXIL_bready ),
    .apuAXIL_bresp ( apuAXIL_bresp ),
    .apuAXIL_bvalid ( apuAXIL_bvalid ),
    .ddrAXI_rready ( ddrAXI_rready ),
    .ddrAXI_wvalid ( ddrAXI_wvalid ),
    .probe ( probe ),
    .sda_in ( sda_in ),
    .sda_out ( sda_out ),
    .mipirx_RESET_N ( mipirx_RESET_N ),
    .mipirx_RST0_N ( mipirx_RST0_N ),
    .mipirx_ERR_CONTROL_LAN0 ( mipirx_ERR_CONTROL_LAN0 ),
    .mipirx_ERR_CONTROL_LAN1 ( mipirx_ERR_CONTROL_LAN1 ),
    .mipirx_ERR_CONTROL_LAN2 ( mipirx_ERR_CONTROL_LAN2 ),
    .mipirx_ERR_CONTROL_LAN3 ( mipirx_ERR_CONTROL_LAN3 ),
    .mipirx_ERR_ESC_LAN0 ( mipirx_ERR_ESC_LAN0 ),
    .mipirx_ERR_ESC_LAN1 ( mipirx_ERR_ESC_LAN1 ),
    .mipirx_ERR_ESC_LAN2 ( mipirx_ERR_ESC_LAN2 ),
    .mipirx_ERR_ESC_LAN3 ( mipirx_ERR_ESC_LAN3 ),
    .mipirx_ERR_SOT_SYNC_HS_LAN0 ( mipirx_ERR_SOT_SYNC_HS_LAN0 ),
    .mipirx_ERR_SOT_SYNC_HS_LAN1 ( mipirx_ERR_SOT_SYNC_HS_LAN1 ),
    .mipirx_ERR_SOT_SYNC_HS_LAN2 ( mipirx_ERR_SOT_SYNC_HS_LAN2 ),
    .mipirx_ERR_SOT_SYNC_HS_LAN3 ( mipirx_ERR_SOT_SYNC_HS_LAN3 ),
    .mipirx_ESC_CLK_LAN0 ( mipirx_ESC_CLK_LAN0 ),
    .mipirx_ESC_CLK_LAN1 ( mipirx_ESC_CLK_LAN1 ),
    .mipirx_ESC_CLK_LAN2 ( mipirx_ESC_CLK_LAN2 ),
    .mipirx_ESC_CLK_LAN3 ( mipirx_ESC_CLK_LAN3 ),
    .mipirx_RX_DATA_HS_LAN0 ( mipirx_RX_DATA_HS_LAN0 ),
    .mipirx_RX_DATA_HS_LAN1 ( mipirx_RX_DATA_HS_LAN1 ),
    .mipirx_RX_DATA_HS_LAN2 ( mipirx_RX_DATA_HS_LAN2 ),
    .mipirx_RX_DATA_HS_LAN3 ( mipirx_RX_DATA_HS_LAN3 ),
    .mipirx_RX_SKEW_CAL_HS_LAN0 ( mipirx_RX_SKEW_CAL_HS_LAN0 ),
    .mipirx_RX_SKEW_CAL_HS_LAN1 ( mipirx_RX_SKEW_CAL_HS_LAN1 ),
    .mipirx_RX_SKEW_CAL_HS_LAN2 ( mipirx_RX_SKEW_CAL_HS_LAN2 ),
    .mipirx_RX_SKEW_CAL_HS_LAN3 ( mipirx_RX_SKEW_CAL_HS_LAN3 ),
    .mipirx_RX_SYNC_HS_LAN0 ( mipirx_RX_SYNC_HS_LAN0 ),
    .mipirx_RX_SYNC_HS_LAN1 ( mipirx_RX_SYNC_HS_LAN1 ),
    .mipirx_RX_SYNC_HS_LAN2 ( mipirx_RX_SYNC_HS_LAN2 ),
    .mipirx_RX_SYNC_HS_LAN3 ( mipirx_RX_SYNC_HS_LAN3 ),
    .mipirx_RX_ULPS_ACTIVE_CLK_NOT ( mipirx_RX_ULPS_ACTIVE_CLK_NOT ),
    .mipirx_RX_ULPS_ACTIVE_NOT_LAN0 ( mipirx_RX_ULPS_ACTIVE_NOT_LAN0 ),
    .mipirx_RX_ULPS_ACTIVE_NOT_LAN1 ( mipirx_RX_ULPS_ACTIVE_NOT_LAN1 ),
    .mipirx_RX_ULPS_ACTIVE_NOT_LAN2 ( mipirx_RX_ULPS_ACTIVE_NOT_LAN2 ),
    .mipirx_RX_ULPS_ACTIVE_NOT_LAN3 ( mipirx_RX_ULPS_ACTIVE_NOT_LAN3 ),
    .mipirx_RX_ULPS_CLK_NOT ( mipirx_RX_ULPS_CLK_NOT ),
    .mipirx_RX_ULPS_ESC_LAN0 ( mipirx_RX_ULPS_ESC_LAN0 ),
    .mipirx_RX_ULPS_ESC_LAN1 ( mipirx_RX_ULPS_ESC_LAN1 ),
    .mipirx_RX_ULPS_ESC_LAN2 ( mipirx_RX_ULPS_ESC_LAN2 ),
    .mipirx_RX_ULPS_ESC_LAN3 ( mipirx_RX_ULPS_ESC_LAN3 ),
    .mipirx_RX_VALID_HS_LAN0 ( mipirx_RX_VALID_HS_LAN0 ),
    .mipirx_RX_VALID_HS_LAN1 ( mipirx_RX_VALID_HS_LAN1 ),
    .mipirx_RX_VALID_HS_LAN2 ( mipirx_RX_VALID_HS_LAN2 ),
    .mipirx_RX_VALID_HS_LAN3 ( mipirx_RX_VALID_HS_LAN3 ),
    .mipirx_STOPSTATE_LAN0 ( mipirx_STOPSTATE_LAN0 ),
    .mipirx_STOPSTATE_LAN1 ( mipirx_STOPSTATE_LAN1 ),
    .mipirx_STOPSTATE_LAN2 ( mipirx_STOPSTATE_LAN2 ),
    .mipirx_STOPSTATE_LAN3 ( mipirx_STOPSTATE_LAN3 ),
    .scl_in ( scl_in ),
    .scl_out ( scl_out ),
    .scl_tri ( scl_tri ),
    .sda_tri ( sda_tri ),
    .clk_byte_HS ( clk_byte_HS ),
    .ddrAXI_arid ( ddrAXI_arid ),
    .ddrAXI_araddr ( ddrAXI_araddr ),
    .ddrAXI_arburst ( ddrAXI_arburst ),
    .ddrAXI_arcache ( ddrAXI_arcache ),
    .ddrAXI_arlen ( ddrAXI_arlen ),
    .ddrAXI_arlock ( ddrAXI_arlock ),
    .ddrAXI_arprot ( ddrAXI_arprot ),
    .ddrAXI_arqos ( ddrAXI_arqos ),
    .ddrAXI_arready ( ddrAXI_arready ),
    .ddrAXI_arregion ( ddrAXI_arregion ),
    .ddrAXI_arsize ( ddrAXI_arsize ),
    .ddrAXI_arvalid ( ddrAXI_arvalid ),
    .ddrAXI_rid ( ddrAXI_rid ),
    .ddrAXI_rdata ( ddrAXI_rdata ),
    .ddrAXI_rlast ( ddrAXI_rlast ),
    .ddrAXI_rresp ( ddrAXI_rresp ),
    .ddrAXI_rvalid ( ddrAXI_rvalid ),
    .ddrAXI_awid ( ddrAXI_awid ),
    .ddrAXI_awaddr ( ddrAXI_awaddr ),
    .ddrAXI_awburst ( ddrAXI_awburst ),
    .ddrAXI_awcache ( ddrAXI_awcache ),
    .ddrAXI_awlen ( ddrAXI_awlen ),
    .ddrAXI_awlock ( ddrAXI_awlock ),
    .ddrAXI_awprot ( ddrAXI_awprot ),
    .ddrAXI_awqos ( ddrAXI_awqos ),
    .ddrAXI_awready ( ddrAXI_awready ),
    .ddrAXI_awregion ( ddrAXI_awregion ),
    .ddrAXI_awsize ( ddrAXI_awsize ),
    .ddrAXI_awvalid ( ddrAXI_awvalid ),
    .ddrAXI_wdata ( ddrAXI_wdata ),
    .ddrAXI_wlast ( ddrAXI_wlast ),
    .ddrAXI_wready ( ddrAXI_wready ),
    .ddrAXI_wstrb ( ddrAXI_wstrb ),
    .ddrAXI_bid ( ddrAXI_bid ),
    .ddrAXI_bready ( ddrAXI_bready ),
    .ddrAXI_bresp ( ddrAXI_bresp ),
    .ddrAXI_bvalid ( ddrAXI_bvalid ),
    .cs ( cs ),
    .sclk ( sclk ),
    .mosi ( mosi ),
    .rgb0_r ( rgb0_r ),
    .rgb0_g ( rgb0_g ),
    .rgb0_b ( rgb0_b ),
    .rgb1_r ( rgb1_r ),
    .rgb1_g ( rgb1_g ),
    .rgb1_b ( rgb1_b ),
    .nslp ( nslp ),
    .m0 ( m0 ),
    .m0z ( m0z ),
    .m1 ( m1 ),
    .m1z ( m1z ),
    .dir ( dir ),
    .step ( step )
);
