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`timescale 1ns/1ps
module mipi_csi2_rx_ctrl_v1_0_11_fc12 (
input          clk        ,
input          srst       ,
input  [64+4-1:0]  din  ,
input          wr_en      ,
input          rd_en      ,
output  [64+4-1:0]  dout,
output         full       ,
output         almost_full,
output         empty      ,
output [11-1:0]  data_count
);

mipi_csi2_rx_ctrl_v1_0_11_fc_642048 lbuf (
 .clk         (clk         ),
 .srst        (srst        ),
 .din         (din         ),
 .wr_en       (wr_en       ),
 .rd_en       (rd_en       ),
 .dout        (dout        ),
 .full        (full        ),
 .almost_full (almost_full ),
 .empty       (empty       ),
 .data_count  (data_count  ) 
);
endmodule
