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`timescale 1ps/1ps

module bd_90ba_phy_0_hssio_rx_mipi_iobuf_rx #(
   parameter  C_NUM_IO                               =  52,
   parameter  C_TEMPLATE                             =  0,   
   parameter  C_DATA_PIN_EN                          =  1,
   parameter  C_CLK_SOURCE                           =  "IBUF_TO_PLL",
   parameter  C_CLKIN_DIFF_EN                        =  0,
   parameter [C_NUM_IO-1 :0] C_DIFF_EN               =  52'd0,  // Indicates whether the pin is differential or single ended
   parameter [C_NUM_IO-1 :0] C_TX_BITSLICE_EN        =  52'd0,  // Bitslice # for which TX bitslice should be enabled 
   parameter [C_NUM_IO-1 :0] C_RX_PIN_EN             =  52'd0,  // Bitslice # for which RX bitslice should be enabled 
   parameter [C_NUM_IO-1 :0] C_BIDIR_BITSLICE_EN     =  52'd0   // Bitslice # for which Bidir bitslice should be enabled 

)
(  
   input [C_DATA_PIN_EN-1:0] lptx_t,
   input [C_DATA_PIN_EN-1:0] lptx_i_p,
   input [C_DATA_PIN_EN-1:0] lptx_i_n,
   input [51:0] hs_tx_t,

   input [C_DATA_PIN_EN-1:0] hs_rx_disable,
   input [C_DATA_PIN_EN-1:0] lp_rx_disable,
   output [C_DATA_PIN_EN-1:0] lp_rx_o_p,
   output [C_DATA_PIN_EN-1:0] lp_rx_o_n,

   input                     clkin_from_pins_p,    //Differential input clock from pins
   input                     clkin_from_pins_n,
   input                     clkin_from_pins,      //Single ended input clock from pins
   input     [C_NUM_IO-1 :0] bs_to_buf_data_in,    //Serialised input from TX or BiDir Bitslices
   input     [C_NUM_IO-1 :0] bs_to_buf_t_in,       //3-state input from BiDir Bitslices
   output                    clk_from_buf_out,     //clock output from IBUF
   output    [C_NUM_IO-1 :0] data_to_bs_out,       //Data from buffers to Rx or BiDir Bitslices
   output    [C_NUM_IO-1 :0] data_to_bs_n_out,     //Data from buffers to Rx or BiDir Bitslices
   output    [C_NUM_IO-1 :0] data_to_pins,         //Data ouput from buffers to pins
   input     [C_NUM_IO-1 :0] data_from_pins,       //data input to buffers from pins
   inout     [C_NUM_IO-1 :0] data_to_from_pins     //data input to buffers from pins
);

assign clk_from_buf_out = clkin_from_pins;

wire [C_NUM_IO-1 :0] lptx_t_int;
wire [C_NUM_IO-1 :0] lptx_i_p_int;
wire [C_NUM_IO-1 :0] lptx_i_n_int;
//wire [C_NUM_IO-1 :0] hs_tx_t_int;

wire [C_NUM_IO-1 :0] hs_rx_disable_int;
wire [C_NUM_IO-1 :0] lp_rx_disable_int;
wire [C_NUM_IO-1 :0] lp_rx_o_p_int;
wire [C_NUM_IO-1 :0] lp_rx_o_n_int;

localparam [51:0] C_RX_PIN_EN_INT = 52'b0000000000000000000000000000000000000000000101010101;

  assign hs_rx_disable_int[0] = hs_rx_disable[0];
  assign lp_rx_disable_int[0] = lp_rx_disable[0];
  assign lp_rx_o_p[0] = lp_rx_o_p_int[0];
  assign lp_rx_o_n[0] = lp_rx_o_n_int[0];
  assign hs_rx_disable_int[2] = hs_rx_disable[1];
  assign lp_rx_disable_int[2] = lp_rx_disable[1];
  assign lp_rx_o_p[1] = lp_rx_o_p_int[2];
  assign lp_rx_o_n[1] = lp_rx_o_n_int[2];
  assign hs_rx_disable_int[4] = hs_rx_disable[2];
  assign lp_rx_disable_int[4] = lp_rx_disable[2];
  assign lp_rx_o_p[2] = lp_rx_o_p_int[4];
  assign lp_rx_o_n[2] = lp_rx_o_n_int[4];
  assign hs_rx_disable_int[6] = hs_rx_disable[3];
  assign lp_rx_disable_int[6] = lp_rx_disable[3];
  assign lp_rx_o_p[3] = lp_rx_o_p_int[6];
  assign lp_rx_o_n[3] = lp_rx_o_n_int[6];
  assign hs_rx_disable_int[8] = hs_rx_disable[4];
  assign lp_rx_disable_int[8] = lp_rx_disable[4];
  assign lp_rx_o_p[4] = lp_rx_o_p_int[8];
  assign lp_rx_o_n[4] = lp_rx_o_n_int[8];

//IO BUFFERS
genvar i;
generate
  for (i = 0; i < C_NUM_IO ; i = i + 1) begin : io_gen
     if(C_TX_BITSLICE_EN[i] == 1'b1) begin
       if (C_TEMPLATE == 1) begin
        OBUFDS_DPHY #(.IOSTANDARD ("MIPI_DPHY_DCI"))
          obufds_inst
            (.HSTX_I (bs_to_buf_data_in[i]),
             .LPTX_T  (lptx_t_int[i]), 
             .LPTX_I_P  (lptx_i_p_int[i]), 
             .LPTX_I_N  (lptx_i_n_int[i]), 
             .HSTX_T  (hs_tx_t[i]), 
             .O  (data_to_pins[i]), 
             .OB (data_to_pins[i+1]));           
       end
     end //C_TX_BITSLICE_EN

     if(C_RX_PIN_EN_INT[i] == 1'b1) begin
      if(C_TEMPLATE == 2) begin
        IBUFDS_DPHY #(.IOSTANDARD ("MIPI_DPHY_DCI"))
          ibufds_dphy
            (.HSRX_O  (data_to_bs_out[i]),
             .HSRX_DISABLE (hs_rx_disable_int[i]),
             .LPRX_DISABLE (lp_rx_disable_int[i]),
             .LPRX_O_P (lp_rx_o_p_int[i]),
             .LPRX_O_N (lp_rx_o_n_int[i]),
             .I  (data_from_pins[i]), 
             .IB (data_from_pins[i+1]));
      end
     end //C_RX_PIN_EN_INT

  end //for
endgenerate








endmodule

