Dpbram_xlnx_size8kB_a32b128.v,verilog,xil_defaultlib,../../../../vsp_core.gen/sources_1/ip/Dpbram_xlnx_size8kB_a32b128/sim/Dpbram_xlnx_size8kB_a32b128.v,
glbl.v,Verilog,xil_defaultlib,glbl.v
