// Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
// Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
// --------------------------------------------------------------------------------
// Tool Version: Vivado v.2024.2 (lin64) Build 5239630 Fri Nov 08 22:34:34 MST 2024
// Date        : Mon Apr 13 17:52:00 2026
// Host        : jim running 64-bit Ubuntu 24.04.3 LTS
// Command     : write_verilog -force -mode funcsim -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix
//               decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ design_1_Vsp_core_0_0_sim_netlist.v
// Design      : design_1_Vsp_core_0_0
// Purpose     : This verilog netlist is a functional simulation representation of the design and should not be modified
//               or synthesized. This netlist cannot be used for SDF annotated simulation.
// Device      : xczu1cg-sbva484-1-e
// --------------------------------------------------------------------------------
`timescale 1 ps / 1 ps

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Axislave_v1_0
   (E,
    \stateOp_reg[4] ,
    \stateRecv_reg[0]_0 ,
    \stateOp_reg[5] ,
    \stateOp_reg[4]_0 ,
    D,
    \stateOp_reg[4]_1 ,
    recvAXIS_tdata,
    \resid_reg[0] ,
    \ixRetbufCrc_reg[4] ,
    \stateOp_reg[5]_0 ,
    \stateOp_reg[5]_1 ,
    \stateOp_reg[0] ,
    \stateRecv_reg[1]_0 ,
    \stateOp_reg[5]_2 ,
    \recvAXIS_tdata_sig_reg[7]_0 ,
    \stateOp_reg[4]_2 ,
    \stateOp_reg[4]_3 ,
    \ixRetbufCrc_reg[4]_0 ,
    \stateOp_reg[2] ,
    \recvAXIS_tdata_sig_reg[7]_1 ,
    \stateOp_reg[3] ,
    \stateOp_reg[4]_4 ,
    \resid_reg[0]_0 ,
    \resid_reg[0]_1 ,
    \resid_reg[0]_2 ,
    \tixVCommand_reg[0] ,
    apuAXIL_rdata,
    recvAXIS_tlast,
    \stateOp_reg[4]_5 ,
    \tixVCommand_reg[0]_0 ,
    \len_reg[2] ,
    \stateOp_reg[5]_3 ,
    \stateOp_reg[4]_6 ,
    \stateOp_reg[3]_0 ,
    \stateSend_reg[2]_0 ,
    \stateOp_reg[5]_4 ,
    \stateOp_reg[5]_5 ,
    \tixVController_reg[7] ,
    \tixVCommand_reg[7] ,
    \stateSend_reg[2]_1 ,
    \stateOp_reg[4]_7 ,
    \stateOp_reg[4]_8 ,
    \stateOp_reg[4]_9 ,
    \stateOp_reg[1] ,
    \stateOp_reg[1]_0 ,
    \stateOp_reg[1]_1 ,
    \stateOp_reg[1]_2 ,
    \stateOp_reg[1]_3 ,
    \stateOp_reg[1]_4 ,
    \stateOp_reg[1]_5 ,
    \stateOp_reg[1]_6 ,
    \stateOp_reg[1]_7 ,
    \stateOp_reg[1]_8 ,
    \resid_reg[0]_3 ,
    \resid_reg[0]_4 ,
    \resid_reg[0]_5 ,
    \resid_reg[0]_6 ,
    \resid_reg[0]_7 ,
    \resid_reg[0]_8 ,
    \resid_reg[0]_9 ,
    \resid_reg[0]_10 ,
    \resid_reg[0]_11 ,
    \resid_reg[0]_12 ,
    \resid_reg[0]_13 ,
    \resid_reg[0]_14 ,
    \resid_reg[0]_15 ,
    \ixRetbufCrc_reg[3] ,
    \resid_reg[0]_16 ,
    \resid_reg[0]_17 ,
    \resid_reg[0]_18 ,
    \ixRetbufCrc_reg[0] ,
    \resid_reg[0]_19 ,
    \resid_reg[0]_20 ,
    \TCapt_reg[7] ,
    \lastAXIS_tkeep_reg[7] ,
    \stateOp_reg[1]_9 ,
    \tixVBuffer_reg[1] ,
    \crc_imd_reg[7] ,
    \stateOp_reg[4]_10 ,
    \TCapt_reg[15] ,
    \crc_imd_reg[2] ,
    \NWrB_reg[7] ,
    \stateOp_reg[4]_11 ,
    \stateOp_reg[4]_12 ,
    \NWrB_reg[15] ,
    \NWrB_reg[23] ,
    \NWrB_reg[31] ,
    \NWrA_reg[7] ,
    \NWrA_reg[15] ,
    \NWrA_reg[23] ,
    \NWrA_reg[31] ,
    \crc_imd_reg[7]_0 ,
    \tixVController_reg[3] ,
    \tixVController_reg[3]_0 ,
    \tixVController_reg[7]_0 ,
    \stateOp_reg[4]_13 ,
    \recvAXIS_tdata_sig_reg[7]_2 ,
    \opbuf_reg[3][7] ,
    \opbuf_reg[1][7] ,
    \opbuf_reg[0][7] ,
    \stateOp_reg[5]_6 ,
    \stateOp_reg[2]_0 ,
    \opbuf_reg[2][7] ,
    \recvAXIS_tdata_sig_reg[47]_0 ,
    \recvAXIS_tdata_sig_reg[7]_3 ,
    \recvAXIS_tdata_sig_reg[7]_4 ,
    \recvAXIS_tdata_sig_reg[7]_5 ,
    \recvAXIS_tdata_sig_reg[7]_6 ,
    \stateOp_reg[4]_14 ,
    \stateOp_reg[0]_0 ,
    \stateRecv_reg[0]_1 ,
    AXIS_tlast,
    AXIS_tvalid,
    \recvAXIS_tdata_sig_reg[15]_0 ,
    \stateOp_reg[2]_1 ,
    \stateOp_reg[5]_7 ,
    commok_sig_reg,
    reqReset_sig_reg,
    \rxlen_reg[0] ,
    \crc_imd_reg[7]_1 ,
    recvAXIS_tlast_sig_reg_0,
    crc_imd041_out,
    crc_imd043_out,
    \crc_imd_reg[12] ,
    \crc_imd_reg[12]_0 ,
    \crc_imd_reg[13] ,
    \crc_imd_reg[11] ,
    \crc_imd_reg[3] ,
    \txAXIS_tdata_reg[13] ,
    crc_imd0172_out,
    crc_imd0112_out,
    \crc_imd_reg[15] ,
    crc_imd042_out,
    crc_imd0115_out,
    crc_imd0174_out,
    crc_imd0118_out,
    crc_imd0173_out,
    \crcAXIS_tkeep_reg[0] ,
    crc_imd0148_out,
    crc_imd0121_out,
    crc_imd0176_out,
    crc_imd0100_out,
    crc_imd0124_out,
    crc_imd066_out,
    crc_imd0175_out,
    crc_imd065_out,
    crc_imd0165_out,
    crc_imd0202_out,
    crc_imd083_out,
    crc_imd0198_out,
    crc_imd0200_out,
    crc_imd086_out,
    crc_imd0152_out,
    crc_imd087_out,
    \txAXIS_tdata_reg[7] ,
    crc_imd081_out,
    crc_imd0149_out,
    crc_imd085_out,
    crc_imd0150_out,
    crc_imd0151_out,
    crc_imd069_out,
    crc_imd068_out,
    crc_imd067_out,
    p_136_in,
    crcAXIS_tlast_sig_reg,
    AXIL_wready_sig_reg_0,
    AXIL_awready_sig_reg_0,
    AXIL_arready,
    AXIL_bvalid_sig_reg_0,
    apuAXIL_rvalid,
    CO,
    crcAXIS_tlast_sig_reg_0,
    \invbuf_reg[9][0] ,
    Q,
    \invbuf_reg[9][0]_0 ,
    \invbuf_reg[9][0]_1 ,
    \invbuf_reg[9][0]_2 ,
    \invbuf_reg[9][0]_3 ,
    \invbuf_reg[9][0]_4 ,
    \invbuf_reg[9][0]_5 ,
    \lastAXIS_tkeep_reg[1] ,
    \stateOp_reg[0]_1 ,
    \stateOp_reg[0]_2 ,
    \wordcntLast_reg[28] ,
    \stateOp_reg[0]_3 ,
    \retbuf_reg[0][7] ,
    \retbuf_reg[0][7]_0 ,
    \retbuf_reg[0][7]_1 ,
    \retbuf_reg[0][7]_2 ,
    \retbuf_reg[0][7]_3 ,
    \retbuf_reg[3][7] ,
    \retbuf_reg[3][7]_0 ,
    \retbuf_reg[3][7]_1 ,
    \retbuf_reg[4][7] ,
    \retbuf_reg[4][7]_0 ,
    \retbuf_reg[4][7]_1 ,
    \retbuf_reg[7][7] ,
    \retbuf_reg[7][7]_0 ,
    \retbuf_reg[7][7]_1 ,
    \invbuf_reg[7][0] ,
    \invbuf_reg[7][0]_0 ,
    commok_sig_reg_0,
    \wordcntLast_reg[28]_0 ,
    \wordcntLast_reg[28]_1 ,
    \wordcntCrcLast_reg[24] ,
    \retbuf_reg[15][0] ,
    reqReset_sig_reg_0,
    \retbuf_reg[15][0]_0 ,
    \retbuf_reg[15][0]_1 ,
    reqReset_sig_reg_1,
    \pollbuf_reg[3][5] ,
    \pollbuf_reg[3][5]_0 ,
    \pollbuf_reg[1][7] ,
    \retbuf_reg[39][7] ,
    \retbuf_reg[39][7]_0 ,
    \retbuf_reg[39][7]_1 ,
    \retbuf_reg[39][7]_2 ,
    \retbuf_reg[39][7]_3 ,
    \pollbuf_reg[2][3] ,
    \pollbuf_reg[2][3]_0 ,
    \pollbuf_reg[2][3]_1 ,
    \txAXIS_tdata_reg[56] ,
    \txAXIS_tdata_reg[56]_0 ,
    \txAXIS_tdata_reg[56]_1 ,
    \txAXIS_tdata_reg[48] ,
    \txAXIS_tdata_reg[48]_0 ,
    \txAXIS_tdata_reg[48]_1 ,
    \txAXIS_tdata_reg[40] ,
    \txAXIS_tdata_reg[32] ,
    \txAXIS_tdata_reg[32]_0 ,
    \txAXIS_tdata_reg[32]_1 ,
    \txAXIS_tdata_reg[24] ,
    \txAXIS_tdata_reg[16] ,
    \txAXIS_tdata_reg[16]_0 ,
    \txAXIS_tdata_reg[8] ,
    \txAXIS_tdata_reg[8]_0 ,
    \txAXIS_tdata_reg[8]_1 ,
    \retbuf_reg[35][0] ,
    \retbuf_reg[36][7] ,
    \retbuf_reg[4][7]_2 ,
    \retbuf_reg[36][7]_0 ,
    \retbuf_reg[37][7] ,
    \retbuf_reg[38][7] ,
    \retbuf_reg[38][7]_0 ,
    \lastAXIS_tkeep_reg[1]_0 ,
    \lastAXIS_tkeep_reg[5] ,
    \crcAXIS_tkeep_reg[7] ,
    \crcAXIS_tkeep_reg[3] ,
    \crcAXIS_tkeep_reg[3]_0 ,
    \crcAXIS_tkeep_reg[0]_0 ,
    \pollbuf_reg[3][1] ,
    \ixRetbufCrc_reg[0]_0 ,
    \ixRetbufCrc_reg[2] ,
    \crcAXIS_tkeep_reg[6] ,
    \lastAXIS_tkeep_reg[2] ,
    \stateOp_next_reg[5] ,
    \stateOp_next_reg[5]_0 ,
    \stateOp_next_reg[4] ,
    \stateOp_next_reg[1] ,
    \stateOp_next_reg[5]_1 ,
    \resid_reg[0]_21 ,
    \resid_reg[1] ,
    \crcAXIS_tkeep_reg[4] ,
    \crcAXIS_tkeep_reg[7]_0 ,
    \wordcnt_reg[1]_0 ,
    txlast1,
    \wordcnt_reg[0]_0 ,
    \crcAXIS_tkeep_reg[3]_1 ,
    \stateOp_reg[0]_4 ,
    \stateOp_reg[0]_5 ,
    crcAXIS_tlast_sig_reg_1,
    crcAXIS_tlast_sig_reg_2,
    \stateOp_next_reg[0] ,
    crcAXIS_tlast_sig_i_8_0,
    crcAXIS_tlast_sig_i_8_1,
    crcAXIS_tlast_sig_i_8_2,
    \wordcnt_reg[0]_1 ,
    \wordcnt_reg[0]_2 ,
    \stateOp_reg[0]_6 ,
    \stateOp_reg[0]_7 ,
    \pollbuf_reg[0][7] ,
    \pollbuf_reg[0][7]_0 ,
    \pollbuf_reg[0][7]_1 ,
    \crcAXIS_tkeep_reg[0]_1 ,
    \crcAXIS_tkeep_reg[0]_2 ,
    \wordcntLast_reg[0] ,
    \wordcntLast_reg[0]_0 ,
    \wordcntLast_reg[0]_1 ,
    \wordcntLast_reg[0]_2 ,
    \retbuf_reg[1][0] ,
    \retbuf_reg[1][0]_0 ,
    \retbuf_reg[1][0]_1 ,
    \retbuf_reg[1][0]_2 ,
    \retbuf_reg[2][0] ,
    \retbuf_reg[5][0] ,
    \retbuf_reg[5][0]_0 ,
    \retbuf_reg[6][0] ,
    \retbuf_reg[8][0] ,
    \retbuf_reg[9][0] ,
    \retbuf_reg[10][0] ,
    \retbuf_reg[11][0] ,
    \retbuf_reg[12][0] ,
    \retbuf_reg[13][0] ,
    \retbuf_reg[14][0] ,
    \retbuf_reg[15][0]_2 ,
    \retbuf_reg[16][0] ,
    \retbuf_reg[16][0]_0 ,
    \retbuf_reg[16][0]_1 ,
    \retbuf_reg[17][0] ,
    \retbuf_reg[18][0] ,
    \retbuf_reg[19][0] ,
    \retbuf_reg[20][0] ,
    \retbuf_reg[21][0] ,
    \retbuf_reg[22][0] ,
    \retbuf_reg[23][0] ,
    \retbuf_reg[24][0] ,
    \retbuf_reg[25][0] ,
    \retbuf_reg[26][0] ,
    \retbuf_reg[27][0] ,
    \retbuf_reg[28][0] ,
    \retbuf_reg[29][0] ,
    \retbuf_reg[29][0]_0 ,
    \retbuf_reg[30][0] ,
    \retbuf_reg[30][0]_0 ,
    \retbuf_reg[31][0] ,
    \retbuf_reg[32][0] ,
    \retbuf_reg[33][0] ,
    \retbuf_reg[34][0] ,
    \retbuf_reg[34][0]_0 ,
    \retbuf_reg[4][7]_3 ,
    \retbuf_reg[3][7]_2 ,
    \retbuf_reg[4][7]_4 ,
    \retbuf_reg[4][7]_5 ,
    \crcAXIS_tkeep_reg[7]_1 ,
    \crcAXIS_tkeep_reg[7]_2 ,
    \txAXIS_tdata_reg[0] ,
    \txAXIS_tdata_reg[0]_0 ,
    \txAXIS_tdata_reg[0]_1 ,
    \txAXIS_tdata_reg[2] ,
    \txAXIS_tdata_reg[2]_0 ,
    \txAXIS_tdata_reg[2]_1 ,
    \txAXIS_tdata_reg[4] ,
    \txAXIS_tdata_reg[4]_0 ,
    \txAXIS_tdata_reg[4]_1 ,
    \txAXIS_tdata_reg[4]_2 ,
    \txAXIS_tdata_reg[6] ,
    \txAXIS_tdata_reg[6]_0 ,
    \txAXIS_tdata_reg[6]_1 ,
    \pollbuf_reg[2][4] ,
    \pollbuf_reg[2][3]_2 ,
    \pollbuf_reg[2][7] ,
    \retbuf_reg[7][7]_2 ,
    \retbuf_reg[7][5] ,
    \retbuf_reg[7][5]_0 ,
    \retbuf_reg[6][5] ,
    \retbuf_reg[6][5]_0 ,
    vidtrackGetInfoPtr0Seqbuf,
    \retbuf_reg[6][5]_1 ,
    \retbuf_reg[3][2] ,
    \retbuf_reg[3][2]_0 ,
    \retbuf_reg[3][3] ,
    \retbuf_reg[3][3]_0 ,
    \retbuf_reg[3][6] ,
    \retbuf_reg[3][6]_0 ,
    \retbuf_reg[3][7]_3 ,
    \retbuf_reg[3][7]_4 ,
    \retbuf_reg[0][0] ,
    vidtrackGetInfoTixVState,
    \retbuf_reg[0][0]_0 ,
    \retbuf_reg[15][7] ,
    \retbuf_reg[15][1] ,
    \retbuf_reg[12][7] ,
    \retbuf_reg[14][0]_0 ,
    \retbuf_reg[13][0]_0 ,
    \retbuf_reg[12][0]_0 ,
    \retbuf_reg[8][7] ,
    \retbuf_reg[11][4] ,
    \retbuf_reg[10][0]_0 ,
    \retbuf_reg[9][0]_0 ,
    \retbuf_reg[8][0]_0 ,
    \retbuf_reg[7][4] ,
    \retbuf_reg[4][0] ,
    \retbuf_reg[2][7] ,
    \retbuf_reg[2][7]_0 ,
    \retbuf_reg[0][2] ,
    \retbuf_reg[4][0]_0 ,
    \retbuf_reg[4][0]_1 ,
    \retbuf_reg[4][1] ,
    \retbuf_reg[4][1]_0 ,
    \retbuf_reg[4][2] ,
    \retbuf_reg[4][2]_0 ,
    \retbuf_reg[4][3] ,
    \retbuf_reg[4][3]_0 ,
    \retbuf_reg[0][2]_0 ,
    \retbuf_reg[0][2]_1 ,
    \retbuf_reg[0][7]_4 ,
    \rxlen_reg[0]_0 ,
    \rxlen_reg[0]_1 ,
    \rxlen_reg[0]_2 ,
    plusOp,
    \wordcntCrcLast_reg[0] ,
    \wordcntCrcLast_reg[1] ,
    O,
    \wordcntCrcLast_reg[2] ,
    \wordcntCrcLast_reg[16] ,
    \wordcntCrcLast_reg[24]_0 ,
    \invbuf_reg[9][0]_6 ,
    \len_reg[7] ,
    \len_reg[15] ,
    \len_reg[23] ,
    \len_reg[31] ,
    \tixVController_reg[7]_1 ,
    \tixVBuffer_reg[7] ,
    \stateOp_reg[1]_10 ,
    \stateOp_reg[1]_11 ,
    \stateOp_reg[1]_12 ,
    \stateOp_reg[2]_2 ,
    \stateOp_reg[2]_3 ,
    \txAXIS_tdata_reg[5] ,
    \txAXIS_tdata_reg[5]_0 ,
    \txAXIS_tdata_reg[5]_1 ,
    \txAXIS_tdata_reg[5]_2 ,
    \txAXIS_tdata_reg[5]_3 ,
    \txAXIS_tdata_reg[7]_0 ,
    \txAXIS_tdata_reg[7]_1 ,
    \txAXIS_tdata_reg[16]_1 ,
    \txAXIS_tdata_reg[16]_2 ,
    \txAXIS_tdata_reg[16]_3 ,
    \txAXIS_tdata_reg[16]_4 ,
    \txAXIS_tdata_reg[17] ,
    \txAXIS_tdata_reg[17]_0 ,
    \txAXIS_tdata_reg[17]_1 ,
    \txAXIS_tdata_reg[18] ,
    \txAXIS_tdata_reg[18]_0 ,
    \txAXIS_tdata_reg[18]_1 ,
    \txAXIS_tdata_reg[19] ,
    \txAXIS_tdata_reg[19]_0 ,
    \txAXIS_tdata_reg[23] ,
    \txAXIS_tdata_reg[19]_1 ,
    \txAXIS_tdata_reg[19]_2 ,
    \txAXIS_tdata_reg[20] ,
    \txAXIS_tdata_reg[20]_0 ,
    \txAXIS_tdata_reg[20]_1 ,
    \txAXIS_tdata_reg[21] ,
    \txAXIS_tdata_reg[21]_0 ,
    \txAXIS_tdata_reg[21]_1 ,
    \txAXIS_tdata_reg[22] ,
    \txAXIS_tdata_reg[22]_0 ,
    \txAXIS_tdata_reg[22]_1 ,
    \txAXIS_tdata_reg[23]_0 ,
    \txAXIS_tdata_reg[23]_1 ,
    \txAXIS_tdata_reg[23]_2 ,
    \txAXIS_tdata_reg[24]_0 ,
    \txAXIS_tdata_reg[24]_1 ,
    \txAXIS_tdata_reg[29] ,
    \txAXIS_tdata_reg[24]_2 ,
    \txAXIS_tdata_reg[25] ,
    \txAXIS_tdata_reg[25]_0 ,
    \txAXIS_tdata_reg[25]_1 ,
    \txAXIS_tdata_reg[26] ,
    \txAXIS_tdata_reg[26]_0 ,
    \txAXIS_tdata_reg[26]_1 ,
    \txAXIS_tdata_reg[27] ,
    \txAXIS_tdata_reg[27]_0 ,
    \txAXIS_tdata_reg[27]_1 ,
    \txAXIS_tdata_reg[28] ,
    \txAXIS_tdata_reg[28]_0 ,
    \txAXIS_tdata_reg[28]_1 ,
    \txAXIS_tdata_reg[29]_0 ,
    \txAXIS_tdata_reg[29]_1 ,
    \txAXIS_tdata_reg[29]_2 ,
    \txAXIS_tdata_reg[30] ,
    \txAXIS_tdata_reg[30]_0 ,
    \txAXIS_tdata_reg[30]_1 ,
    \txAXIS_tdata_reg[31] ,
    \txAXIS_tdata_reg[31]_0 ,
    \txAXIS_tdata_reg[31]_1 ,
    \txAXIS_tdata_reg[32]_2 ,
    \txAXIS_tdata_reg[32]_3 ,
    \txAXIS_tdata_reg[33] ,
    \txAXIS_tdata_reg[33]_0 ,
    \txAXIS_tdata_reg[34] ,
    \txAXIS_tdata_reg[34]_0 ,
    \txAXIS_tdata_reg[35] ,
    \txAXIS_tdata_reg[35]_0 ,
    \txAXIS_tdata_reg[36] ,
    \txAXIS_tdata_reg[36]_0 ,
    \txAXIS_tdata_reg[37] ,
    \txAXIS_tdata_reg[37]_0 ,
    \txAXIS_tdata_reg[38] ,
    \txAXIS_tdata_reg[38]_0 ,
    \txAXIS_tdata_reg[39] ,
    \txAXIS_tdata_reg[39]_0 ,
    \txAXIS_tdata_reg[48]_2 ,
    \txAXIS_tdata_reg[48]_3 ,
    \txAXIS_tdata_reg[48]_4 ,
    \txAXIS_tdata_reg[48]_5 ,
    \txAXIS_tdata_reg[49] ,
    \txAXIS_tdata_reg[49]_0 ,
    \txAXIS_tdata_reg[49]_1 ,
    \txAXIS_tdata_reg[50] ,
    \txAXIS_tdata_reg[50]_0 ,
    \txAXIS_tdata_reg[50]_1 ,
    \txAXIS_tdata_reg[51] ,
    \txAXIS_tdata_reg[51]_0 ,
    \txAXIS_tdata_reg[51]_1 ,
    \txAXIS_tdata_reg[52] ,
    \txAXIS_tdata_reg[52]_0 ,
    \txAXIS_tdata_reg[52]_1 ,
    \txAXIS_tdata_reg[53] ,
    \txAXIS_tdata_reg[53]_0 ,
    \txAXIS_tdata_reg[53]_1 ,
    \txAXIS_tdata_reg[54] ,
    \txAXIS_tdata_reg[54]_0 ,
    \txAXIS_tdata_reg[54]_1 ,
    \txAXIS_tdata_reg[55] ,
    \txAXIS_tdata_reg[55]_0 ,
    \txAXIS_tdata_reg[55]_1 ,
    \txAXIS_tdata_reg[56]_2 ,
    \txAXIS_tdata_reg[56]_3 ,
    \txAXIS_tdata_reg[56]_4 ,
    \txAXIS_tdata_reg[57] ,
    \txAXIS_tdata_reg[57]_0 ,
    \txAXIS_tdata_reg[57]_1 ,
    \txAXIS_tdata_reg[58] ,
    \txAXIS_tdata_reg[58]_0 ,
    \txAXIS_tdata_reg[59] ,
    \txAXIS_tdata_reg[59]_0 ,
    \txAXIS_tdata_reg[60] ,
    \txAXIS_tdata_reg[60]_0 ,
    \txAXIS_tdata_reg[60]_1 ,
    \txAXIS_tdata_reg[61] ,
    \txAXIS_tdata_reg[61]_0 ,
    \txAXIS_tdata_reg[61]_1 ,
    \txAXIS_tdata_reg[62] ,
    \txAXIS_tdata_reg[62]_0 ,
    \txAXIS_tdata_reg[63] ,
    \txAXIS_tdata_reg[63]_0 ,
    \txAXIS_tdata_reg[63]_1 ,
    \stateOp_reg[3]_1 ,
    \stateOp_reg[4]_15 ,
    \stateOp_reg[4]_16 ,
    \tixVBufxfop_reg[7] ,
    \txlen_reg[0] ,
    \wordcntLast_reg[3] ,
    commok_sig_reg_1,
    \stateOp_reg[0]_8 ,
    \stateOp_reg[0]_9 ,
    stateOp_reg,
    \stateOp_reg[0]_10 ,
    \crcAXIS_tkeep_reg[0]_3 ,
    \crcAXIS_tkeep_reg[0]_4 ,
    \crcAXIS_tkeep_reg[0]_5 ,
    \crcAXIS_tkeep_reg[0]_6 ,
    crcAXIS_tlast_sig_reg_3,
    \crc_imd_reg[4] ,
    crcAXIS_tlast_sig_i_6_0,
    \wordcnt_reg[0]_3 ,
    \crcAXIS_tkeep_reg[0]_7 ,
    \stateOp_reg[0]_11 ,
    \stateOp_reg[0]_12 ,
    \stateOp_reg[0]_13 ,
    \sendAXIL_rdata_reg[63]_0 ,
    \stateOp[3]_i_3_0 ,
    \stateOp_reg[3]_2 ,
    \stateOp_reg[1]_13 ,
    crcAXIS_tlast_sig_i_6_1,
    crcAXIS_tlast_sig_reg_4,
    commok_sig_reg_2,
    commok_sig_reg_3,
    reqResetFromHostif,
    \rxlen_reg[0]_3 ,
    \rxlen_reg[0]_4 ,
    \crc_imd_reg[0] ,
    \crc_imd_reg[0]_0 ,
    \crc_imd_reg[9] ,
    \crc_imd_reg[2]_0 ,
    \crc_imd_reg[2]_1 ,
    \crc_imd_reg[4]_0 ,
    \crc_imd_reg[8] ,
    \crc_imd_reg[8]_0 ,
    p_10_out,
    \crc_imd_reg[0]_1 ,
    \crc_imd_reg[1] ,
    \crc_imd[1]_i_4_0 ,
    \crc_imd_reg[1]_0 ,
    \crc_imd_reg[0]_2 ,
    \crc_imd_reg[2]_2 ,
    \crc_imd_reg[8]_1 ,
    \crc_imd_reg[1]_1 ,
    \crc_imd[15]_i_41_0 ,
    \crc_imd[14]_i_5 ,
    \crc_imd[12]_i_3 ,
    \crc_imd[14]_i_5_0 ,
    \crc_imd[12]_i_3_0 ,
    apuAXIL_wvalid,
    AXIL_rvalid_sig_reg_0,
    aclk_sig,
    apuAXIL_awvalid,
    apuAXIL_wdata,
    apuAXIL_awaddr,
    apuAXIL_araddr,
    apuAXIL_bready,
    apuAXIL_wstrb,
    apuAXIL_arvalid,
    recvAXIS_tlast_sig_reg_i_2_0,
    apuAXIL_rready);
  output [0:0]E;
  output \stateOp_reg[4] ;
  output \stateRecv_reg[0]_0 ;
  output [0:0]\stateOp_reg[5] ;
  output \stateOp_reg[4]_0 ;
  output [7:0]D;
  output \stateOp_reg[4]_1 ;
  output [5:0]recvAXIS_tdata;
  output [0:0]\resid_reg[0] ;
  output [0:0]\ixRetbufCrc_reg[4] ;
  output [0:0]\stateOp_reg[5]_0 ;
  output [0:0]\stateOp_reg[5]_1 ;
  output [0:0]\stateOp_reg[0] ;
  output [0:0]\stateRecv_reg[1]_0 ;
  output [0:0]\stateOp_reg[5]_2 ;
  output [7:0]\recvAXIS_tdata_sig_reg[7]_0 ;
  output [0:0]\stateOp_reg[4]_2 ;
  output \stateOp_reg[4]_3 ;
  output [0:0]\ixRetbufCrc_reg[4]_0 ;
  output [0:0]\stateOp_reg[2] ;
  output [7:0]\recvAXIS_tdata_sig_reg[7]_1 ;
  output [6:0]\stateOp_reg[3] ;
  output \stateOp_reg[4]_4 ;
  output [0:0]\resid_reg[0]_0 ;
  output [0:0]\resid_reg[0]_1 ;
  output [0:0]\resid_reg[0]_2 ;
  output [5:0]\tixVCommand_reg[0] ;
  output [63:0]apuAXIL_rdata;
  output recvAXIS_tlast;
  output [6:0]\stateOp_reg[4]_5 ;
  output [5:0]\tixVCommand_reg[0]_0 ;
  output [4:0]\len_reg[2] ;
  output [2:0]\stateOp_reg[5]_3 ;
  output [30:0]\stateOp_reg[4]_6 ;
  output [0:0]\stateOp_reg[3]_0 ;
  output [0:0]\stateSend_reg[2]_0 ;
  output [4:0]\stateOp_reg[5]_4 ;
  output [0:0]\stateOp_reg[5]_5 ;
  output [7:0]\tixVController_reg[7] ;
  output [7:0]\tixVCommand_reg[7] ;
  output [0:0]\stateSend_reg[2]_1 ;
  output [28:0]\stateOp_reg[4]_7 ;
  output [0:0]\stateOp_reg[4]_8 ;
  output [0:0]\stateOp_reg[4]_9 ;
  output [0:0]\stateOp_reg[1] ;
  output [0:0]\stateOp_reg[1]_0 ;
  output [0:0]\stateOp_reg[1]_1 ;
  output [0:0]\stateOp_reg[1]_2 ;
  output [0:0]\stateOp_reg[1]_3 ;
  output [0:0]\stateOp_reg[1]_4 ;
  output [0:0]\stateOp_reg[1]_5 ;
  output [0:0]\stateOp_reg[1]_6 ;
  output [0:0]\stateOp_reg[1]_7 ;
  output [0:0]\stateOp_reg[1]_8 ;
  output [0:0]\resid_reg[0]_3 ;
  output [0:0]\resid_reg[0]_4 ;
  output [0:0]\resid_reg[0]_5 ;
  output [0:0]\resid_reg[0]_6 ;
  output [0:0]\resid_reg[0]_7 ;
  output [0:0]\resid_reg[0]_8 ;
  output [0:0]\resid_reg[0]_9 ;
  output [0:0]\resid_reg[0]_10 ;
  output [0:0]\resid_reg[0]_11 ;
  output [0:0]\resid_reg[0]_12 ;
  output [0:0]\resid_reg[0]_13 ;
  output [0:0]\resid_reg[0]_14 ;
  output [0:0]\resid_reg[0]_15 ;
  output [0:0]\ixRetbufCrc_reg[3] ;
  output [0:0]\resid_reg[0]_16 ;
  output [0:0]\resid_reg[0]_17 ;
  output [0:0]\resid_reg[0]_18 ;
  output [0:0]\ixRetbufCrc_reg[0] ;
  output [0:0]\resid_reg[0]_19 ;
  output [0:0]\resid_reg[0]_20 ;
  output [2:0]\TCapt_reg[7] ;
  output [7:0]\lastAXIS_tkeep_reg[7] ;
  output [45:0]\stateOp_reg[1]_9 ;
  output [2:0]\tixVBuffer_reg[1] ;
  output [3:0]\crc_imd_reg[7] ;
  output [0:0]\stateOp_reg[4]_10 ;
  output [3:0]\TCapt_reg[15] ;
  output [1:0]\crc_imd_reg[2] ;
  output [6:0]\NWrB_reg[7] ;
  output \stateOp_reg[4]_11 ;
  output \stateOp_reg[4]_12 ;
  output [7:0]\NWrB_reg[15] ;
  output [7:0]\NWrB_reg[23] ;
  output [7:0]\NWrB_reg[31] ;
  output [3:0]\NWrA_reg[7] ;
  output [7:0]\NWrA_reg[15] ;
  output [7:0]\NWrA_reg[23] ;
  output [7:0]\NWrA_reg[31] ;
  output [0:0]\crc_imd_reg[7]_0 ;
  output \tixVController_reg[3] ;
  output \tixVController_reg[3]_0 ;
  output \tixVController_reg[7]_0 ;
  output [24:0]\stateOp_reg[4]_13 ;
  output [7:0]\recvAXIS_tdata_sig_reg[7]_2 ;
  output [31:0]\opbuf_reg[3][7] ;
  output [7:0]\opbuf_reg[1][7] ;
  output [7:0]\opbuf_reg[0][7] ;
  output \stateOp_reg[5]_6 ;
  output [0:0]\stateOp_reg[2]_0 ;
  output [7:0]\opbuf_reg[2][7] ;
  output [7:0]\recvAXIS_tdata_sig_reg[47]_0 ;
  output [7:0]\recvAXIS_tdata_sig_reg[7]_3 ;
  output [7:0]\recvAXIS_tdata_sig_reg[7]_4 ;
  output [7:0]\recvAXIS_tdata_sig_reg[7]_5 ;
  output [7:0]\recvAXIS_tdata_sig_reg[7]_6 ;
  output [0:0]\stateOp_reg[4]_14 ;
  output \stateOp_reg[0]_0 ;
  output \stateRecv_reg[0]_1 ;
  output AXIS_tlast;
  output AXIS_tvalid;
  output [12:0]\recvAXIS_tdata_sig_reg[15]_0 ;
  output \stateOp_reg[2]_1 ;
  output \stateOp_reg[5]_7 ;
  output commok_sig_reg;
  output reqReset_sig_reg;
  output \rxlen_reg[0] ;
  output [6:0]\crc_imd_reg[7]_1 ;
  output recvAXIS_tlast_sig_reg_0;
  output crc_imd041_out;
  output crc_imd043_out;
  output \crc_imd_reg[12] ;
  output \crc_imd_reg[12]_0 ;
  output \crc_imd_reg[13] ;
  output \crc_imd_reg[11] ;
  output \crc_imd_reg[3] ;
  output \txAXIS_tdata_reg[13] ;
  output crc_imd0172_out;
  output crc_imd0112_out;
  output \crc_imd_reg[15] ;
  output crc_imd042_out;
  output crc_imd0115_out;
  output crc_imd0174_out;
  output crc_imd0118_out;
  output crc_imd0173_out;
  output \crcAXIS_tkeep_reg[0] ;
  output crc_imd0148_out;
  output crc_imd0121_out;
  output crc_imd0176_out;
  output crc_imd0100_out;
  output crc_imd0124_out;
  output crc_imd066_out;
  output crc_imd0175_out;
  output crc_imd065_out;
  output crc_imd0165_out;
  output crc_imd0202_out;
  output crc_imd083_out;
  output crc_imd0198_out;
  output crc_imd0200_out;
  output crc_imd086_out;
  output crc_imd0152_out;
  output crc_imd087_out;
  output \txAXIS_tdata_reg[7] ;
  output crc_imd081_out;
  output crc_imd0149_out;
  output crc_imd085_out;
  output crc_imd0150_out;
  output crc_imd0151_out;
  output crc_imd069_out;
  output crc_imd068_out;
  output crc_imd067_out;
  output p_136_in;
  output crcAXIS_tlast_sig_reg;
  output AXIL_wready_sig_reg_0;
  output AXIL_awready_sig_reg_0;
  output AXIL_arready;
  output AXIL_bvalid_sig_reg_0;
  output apuAXIL_rvalid;
  input [0:0]CO;
  input [0:0]crcAXIS_tlast_sig_reg_0;
  input \invbuf_reg[9][0] ;
  input [5:0]Q;
  input \invbuf_reg[9][0]_0 ;
  input \invbuf_reg[9][0]_1 ;
  input \invbuf_reg[9][0]_2 ;
  input \invbuf_reg[9][0]_3 ;
  input \invbuf_reg[9][0]_4 ;
  input \invbuf_reg[9][0]_5 ;
  input \lastAXIS_tkeep_reg[1] ;
  input \stateOp_reg[0]_1 ;
  input \stateOp_reg[0]_2 ;
  input \wordcntLast_reg[28] ;
  input \stateOp_reg[0]_3 ;
  input \retbuf_reg[0][7] ;
  input \retbuf_reg[0][7]_0 ;
  input \retbuf_reg[0][7]_1 ;
  input \retbuf_reg[0][7]_2 ;
  input \retbuf_reg[0][7]_3 ;
  input \retbuf_reg[3][7] ;
  input \retbuf_reg[3][7]_0 ;
  input \retbuf_reg[3][7]_1 ;
  input \retbuf_reg[4][7] ;
  input \retbuf_reg[4][7]_0 ;
  input \retbuf_reg[4][7]_1 ;
  input \retbuf_reg[7][7] ;
  input \retbuf_reg[7][7]_0 ;
  input \retbuf_reg[7][7]_1 ;
  input \invbuf_reg[7][0] ;
  input \invbuf_reg[7][0]_0 ;
  input commok_sig_reg_0;
  input \wordcntLast_reg[28]_0 ;
  input \wordcntLast_reg[28]_1 ;
  input \wordcntCrcLast_reg[24] ;
  input \retbuf_reg[15][0] ;
  input reqReset_sig_reg_0;
  input \retbuf_reg[15][0]_0 ;
  input \retbuf_reg[15][0]_1 ;
  input reqReset_sig_reg_1;
  input \pollbuf_reg[3][5] ;
  input \pollbuf_reg[3][5]_0 ;
  input [7:0]\pollbuf_reg[1][7] ;
  input \retbuf_reg[39][7] ;
  input \retbuf_reg[39][7]_0 ;
  input \retbuf_reg[39][7]_1 ;
  input [2:0]\retbuf_reg[39][7]_2 ;
  input \retbuf_reg[39][7]_3 ;
  input \pollbuf_reg[2][3] ;
  input \pollbuf_reg[2][3]_0 ;
  input \pollbuf_reg[2][3]_1 ;
  input \txAXIS_tdata_reg[56] ;
  input \txAXIS_tdata_reg[56]_0 ;
  input \txAXIS_tdata_reg[56]_1 ;
  input \txAXIS_tdata_reg[48] ;
  input \txAXIS_tdata_reg[48]_0 ;
  input \txAXIS_tdata_reg[48]_1 ;
  input \txAXIS_tdata_reg[40] ;
  input \txAXIS_tdata_reg[32] ;
  input [2:0]\txAXIS_tdata_reg[32]_0 ;
  input \txAXIS_tdata_reg[32]_1 ;
  input \txAXIS_tdata_reg[24] ;
  input \txAXIS_tdata_reg[16] ;
  input \txAXIS_tdata_reg[16]_0 ;
  input \txAXIS_tdata_reg[8] ;
  input \txAXIS_tdata_reg[8]_0 ;
  input \txAXIS_tdata_reg[8]_1 ;
  input \retbuf_reg[35][0] ;
  input \retbuf_reg[36][7] ;
  input \retbuf_reg[4][7]_2 ;
  input \retbuf_reg[36][7]_0 ;
  input \retbuf_reg[37][7] ;
  input \retbuf_reg[38][7] ;
  input \retbuf_reg[38][7]_0 ;
  input \lastAXIS_tkeep_reg[1]_0 ;
  input \lastAXIS_tkeep_reg[5] ;
  input \crcAXIS_tkeep_reg[7] ;
  input \crcAXIS_tkeep_reg[3] ;
  input \crcAXIS_tkeep_reg[3]_0 ;
  input \crcAXIS_tkeep_reg[0]_0 ;
  input \pollbuf_reg[3][1] ;
  input \ixRetbufCrc_reg[0]_0 ;
  input \ixRetbufCrc_reg[2] ;
  input \crcAXIS_tkeep_reg[6] ;
  input \lastAXIS_tkeep_reg[2] ;
  input \stateOp_next_reg[5] ;
  input \stateOp_next_reg[5]_0 ;
  input \stateOp_next_reg[4] ;
  input \stateOp_next_reg[1] ;
  input \stateOp_next_reg[5]_1 ;
  input \resid_reg[0]_21 ;
  input \resid_reg[1] ;
  input \crcAXIS_tkeep_reg[4] ;
  input \crcAXIS_tkeep_reg[7]_0 ;
  input \wordcnt_reg[1]_0 ;
  input [29:0]txlast1;
  input [0:0]\wordcnt_reg[0]_0 ;
  input \crcAXIS_tkeep_reg[3]_1 ;
  input \stateOp_reg[0]_4 ;
  input \stateOp_reg[0]_5 ;
  input crcAXIS_tlast_sig_reg_1;
  input crcAXIS_tlast_sig_reg_2;
  input \stateOp_next_reg[0] ;
  input crcAXIS_tlast_sig_i_8_0;
  input crcAXIS_tlast_sig_i_8_1;
  input crcAXIS_tlast_sig_i_8_2;
  input \wordcnt_reg[0]_1 ;
  input \wordcnt_reg[0]_2 ;
  input \stateOp_reg[0]_6 ;
  input \stateOp_reg[0]_7 ;
  input \pollbuf_reg[0][7] ;
  input [7:0]\pollbuf_reg[0][7]_0 ;
  input \pollbuf_reg[0][7]_1 ;
  input \crcAXIS_tkeep_reg[0]_1 ;
  input \crcAXIS_tkeep_reg[0]_2 ;
  input \wordcntLast_reg[0] ;
  input \wordcntLast_reg[0]_0 ;
  input \wordcntLast_reg[0]_1 ;
  input \wordcntLast_reg[0]_2 ;
  input \retbuf_reg[1][0] ;
  input \retbuf_reg[1][0]_0 ;
  input \retbuf_reg[1][0]_1 ;
  input \retbuf_reg[1][0]_2 ;
  input \retbuf_reg[2][0] ;
  input \retbuf_reg[5][0] ;
  input \retbuf_reg[5][0]_0 ;
  input \retbuf_reg[6][0] ;
  input \retbuf_reg[8][0] ;
  input \retbuf_reg[9][0] ;
  input \retbuf_reg[10][0] ;
  input \retbuf_reg[11][0] ;
  input \retbuf_reg[12][0] ;
  input \retbuf_reg[13][0] ;
  input \retbuf_reg[14][0] ;
  input \retbuf_reg[15][0]_2 ;
  input \retbuf_reg[16][0] ;
  input \retbuf_reg[16][0]_0 ;
  input \retbuf_reg[16][0]_1 ;
  input \retbuf_reg[17][0] ;
  input \retbuf_reg[18][0] ;
  input \retbuf_reg[19][0] ;
  input \retbuf_reg[20][0] ;
  input \retbuf_reg[21][0] ;
  input \retbuf_reg[22][0] ;
  input \retbuf_reg[23][0] ;
  input \retbuf_reg[24][0] ;
  input \retbuf_reg[25][0] ;
  input \retbuf_reg[26][0] ;
  input \retbuf_reg[27][0] ;
  input \retbuf_reg[28][0] ;
  input \retbuf_reg[29][0] ;
  input \retbuf_reg[29][0]_0 ;
  input \retbuf_reg[30][0] ;
  input \retbuf_reg[30][0]_0 ;
  input \retbuf_reg[31][0] ;
  input \retbuf_reg[32][0] ;
  input \retbuf_reg[33][0] ;
  input \retbuf_reg[34][0] ;
  input \retbuf_reg[34][0]_0 ;
  input \retbuf_reg[4][7]_3 ;
  input [4:0]\retbuf_reg[3][7]_2 ;
  input \retbuf_reg[4][7]_4 ;
  input \retbuf_reg[4][7]_5 ;
  input [6:0]\crcAXIS_tkeep_reg[7]_1 ;
  input \crcAXIS_tkeep_reg[7]_2 ;
  input \txAXIS_tdata_reg[0] ;
  input \txAXIS_tdata_reg[0]_0 ;
  input \txAXIS_tdata_reg[0]_1 ;
  input \txAXIS_tdata_reg[2] ;
  input \txAXIS_tdata_reg[2]_0 ;
  input \txAXIS_tdata_reg[2]_1 ;
  input \txAXIS_tdata_reg[4] ;
  input \txAXIS_tdata_reg[4]_0 ;
  input \txAXIS_tdata_reg[4]_1 ;
  input \txAXIS_tdata_reg[4]_2 ;
  input \txAXIS_tdata_reg[6] ;
  input \txAXIS_tdata_reg[6]_0 ;
  input \txAXIS_tdata_reg[6]_1 ;
  input \pollbuf_reg[2][4] ;
  input \pollbuf_reg[2][3]_2 ;
  input \pollbuf_reg[2][7] ;
  input [3:0]\retbuf_reg[7][7]_2 ;
  input \retbuf_reg[7][5] ;
  input \retbuf_reg[7][5]_0 ;
  input \retbuf_reg[6][5] ;
  input \retbuf_reg[6][5]_0 ;
  input [0:0]vidtrackGetInfoPtr0Seqbuf;
  input \retbuf_reg[6][5]_1 ;
  input \retbuf_reg[3][2] ;
  input \retbuf_reg[3][2]_0 ;
  input \retbuf_reg[3][3] ;
  input \retbuf_reg[3][3]_0 ;
  input \retbuf_reg[3][6] ;
  input \retbuf_reg[3][6]_0 ;
  input \retbuf_reg[3][7]_3 ;
  input \retbuf_reg[3][7]_4 ;
  input \retbuf_reg[0][0] ;
  input [0:0]vidtrackGetInfoTixVState;
  input \retbuf_reg[0][0]_0 ;
  input [15:0]\retbuf_reg[15][7] ;
  input \retbuf_reg[15][1] ;
  input [27:0]\retbuf_reg[12][7] ;
  input \retbuf_reg[14][0]_0 ;
  input \retbuf_reg[13][0]_0 ;
  input \retbuf_reg[12][0]_0 ;
  input [27:0]\retbuf_reg[8][7] ;
  input \retbuf_reg[11][4] ;
  input \retbuf_reg[10][0]_0 ;
  input \retbuf_reg[9][0]_0 ;
  input \retbuf_reg[8][0]_0 ;
  input \retbuf_reg[7][4] ;
  input \retbuf_reg[4][0] ;
  input \retbuf_reg[2][7] ;
  input \retbuf_reg[2][7]_0 ;
  input \retbuf_reg[0][2] ;
  input \retbuf_reg[4][0]_0 ;
  input \retbuf_reg[4][0]_1 ;
  input \retbuf_reg[4][1] ;
  input \retbuf_reg[4][1]_0 ;
  input \retbuf_reg[4][2] ;
  input \retbuf_reg[4][2]_0 ;
  input \retbuf_reg[4][3] ;
  input \retbuf_reg[4][3]_0 ;
  input \retbuf_reg[0][2]_0 ;
  input \retbuf_reg[0][2]_1 ;
  input \retbuf_reg[0][7]_4 ;
  input \rxlen_reg[0]_0 ;
  input \rxlen_reg[0]_1 ;
  input \rxlen_reg[0]_2 ;
  input [28:0]plusOp;
  input \wordcntCrcLast_reg[0] ;
  input \wordcntCrcLast_reg[1] ;
  input [7:0]O;
  input \wordcntCrcLast_reg[2] ;
  input [7:0]\wordcntCrcLast_reg[16] ;
  input [7:0]\wordcntCrcLast_reg[24]_0 ;
  input \invbuf_reg[9][0]_6 ;
  input [7:0]\len_reg[7] ;
  input [7:0]\len_reg[15] ;
  input [7:0]\len_reg[23] ;
  input [7:0]\len_reg[31] ;
  input [7:0]\tixVController_reg[7]_1 ;
  input [7:0]\tixVBuffer_reg[7] ;
  input \stateOp_reg[1]_10 ;
  input \stateOp_reg[1]_11 ;
  input \stateOp_reg[1]_12 ;
  input \stateOp_reg[2]_2 ;
  input \stateOp_reg[2]_3 ;
  input \txAXIS_tdata_reg[5] ;
  input \txAXIS_tdata_reg[5]_0 ;
  input \txAXIS_tdata_reg[5]_1 ;
  input \txAXIS_tdata_reg[5]_2 ;
  input \txAXIS_tdata_reg[5]_3 ;
  input \txAXIS_tdata_reg[7]_0 ;
  input \txAXIS_tdata_reg[7]_1 ;
  input \txAXIS_tdata_reg[16]_1 ;
  input \txAXIS_tdata_reg[16]_2 ;
  input \txAXIS_tdata_reg[16]_3 ;
  input \txAXIS_tdata_reg[16]_4 ;
  input \txAXIS_tdata_reg[17] ;
  input \txAXIS_tdata_reg[17]_0 ;
  input \txAXIS_tdata_reg[17]_1 ;
  input \txAXIS_tdata_reg[18] ;
  input \txAXIS_tdata_reg[18]_0 ;
  input \txAXIS_tdata_reg[18]_1 ;
  input \txAXIS_tdata_reg[19] ;
  input \txAXIS_tdata_reg[19]_0 ;
  input [2:0]\txAXIS_tdata_reg[23] ;
  input \txAXIS_tdata_reg[19]_1 ;
  input \txAXIS_tdata_reg[19]_2 ;
  input \txAXIS_tdata_reg[20] ;
  input \txAXIS_tdata_reg[20]_0 ;
  input \txAXIS_tdata_reg[20]_1 ;
  input \txAXIS_tdata_reg[21] ;
  input \txAXIS_tdata_reg[21]_0 ;
  input \txAXIS_tdata_reg[21]_1 ;
  input \txAXIS_tdata_reg[22] ;
  input \txAXIS_tdata_reg[22]_0 ;
  input \txAXIS_tdata_reg[22]_1 ;
  input \txAXIS_tdata_reg[23]_0 ;
  input \txAXIS_tdata_reg[23]_1 ;
  input \txAXIS_tdata_reg[23]_2 ;
  input \txAXIS_tdata_reg[24]_0 ;
  input \txAXIS_tdata_reg[24]_1 ;
  input [5:0]\txAXIS_tdata_reg[29] ;
  input \txAXIS_tdata_reg[24]_2 ;
  input \txAXIS_tdata_reg[25] ;
  input \txAXIS_tdata_reg[25]_0 ;
  input \txAXIS_tdata_reg[25]_1 ;
  input \txAXIS_tdata_reg[26] ;
  input \txAXIS_tdata_reg[26]_0 ;
  input \txAXIS_tdata_reg[26]_1 ;
  input \txAXIS_tdata_reg[27] ;
  input \txAXIS_tdata_reg[27]_0 ;
  input \txAXIS_tdata_reg[27]_1 ;
  input \txAXIS_tdata_reg[28] ;
  input \txAXIS_tdata_reg[28]_0 ;
  input \txAXIS_tdata_reg[28]_1 ;
  input \txAXIS_tdata_reg[29]_0 ;
  input \txAXIS_tdata_reg[29]_1 ;
  input \txAXIS_tdata_reg[29]_2 ;
  input \txAXIS_tdata_reg[30] ;
  input \txAXIS_tdata_reg[30]_0 ;
  input \txAXIS_tdata_reg[30]_1 ;
  input \txAXIS_tdata_reg[31] ;
  input \txAXIS_tdata_reg[31]_0 ;
  input \txAXIS_tdata_reg[31]_1 ;
  input \txAXIS_tdata_reg[32]_2 ;
  input \txAXIS_tdata_reg[32]_3 ;
  input \txAXIS_tdata_reg[33] ;
  input \txAXIS_tdata_reg[33]_0 ;
  input \txAXIS_tdata_reg[34] ;
  input \txAXIS_tdata_reg[34]_0 ;
  input \txAXIS_tdata_reg[35] ;
  input \txAXIS_tdata_reg[35]_0 ;
  input \txAXIS_tdata_reg[36] ;
  input \txAXIS_tdata_reg[36]_0 ;
  input \txAXIS_tdata_reg[37] ;
  input \txAXIS_tdata_reg[37]_0 ;
  input \txAXIS_tdata_reg[38] ;
  input \txAXIS_tdata_reg[38]_0 ;
  input \txAXIS_tdata_reg[39] ;
  input \txAXIS_tdata_reg[39]_0 ;
  input \txAXIS_tdata_reg[48]_2 ;
  input \txAXIS_tdata_reg[48]_3 ;
  input \txAXIS_tdata_reg[48]_4 ;
  input \txAXIS_tdata_reg[48]_5 ;
  input \txAXIS_tdata_reg[49] ;
  input \txAXIS_tdata_reg[49]_0 ;
  input \txAXIS_tdata_reg[49]_1 ;
  input \txAXIS_tdata_reg[50] ;
  input \txAXIS_tdata_reg[50]_0 ;
  input \txAXIS_tdata_reg[50]_1 ;
  input \txAXIS_tdata_reg[51] ;
  input \txAXIS_tdata_reg[51]_0 ;
  input \txAXIS_tdata_reg[51]_1 ;
  input \txAXIS_tdata_reg[52] ;
  input \txAXIS_tdata_reg[52]_0 ;
  input \txAXIS_tdata_reg[52]_1 ;
  input \txAXIS_tdata_reg[53] ;
  input \txAXIS_tdata_reg[53]_0 ;
  input \txAXIS_tdata_reg[53]_1 ;
  input \txAXIS_tdata_reg[54] ;
  input \txAXIS_tdata_reg[54]_0 ;
  input \txAXIS_tdata_reg[54]_1 ;
  input \txAXIS_tdata_reg[55] ;
  input \txAXIS_tdata_reg[55]_0 ;
  input \txAXIS_tdata_reg[55]_1 ;
  input \txAXIS_tdata_reg[56]_2 ;
  input \txAXIS_tdata_reg[56]_3 ;
  input \txAXIS_tdata_reg[56]_4 ;
  input \txAXIS_tdata_reg[57] ;
  input \txAXIS_tdata_reg[57]_0 ;
  input \txAXIS_tdata_reg[57]_1 ;
  input \txAXIS_tdata_reg[58] ;
  input \txAXIS_tdata_reg[58]_0 ;
  input \txAXIS_tdata_reg[59] ;
  input \txAXIS_tdata_reg[59]_0 ;
  input \txAXIS_tdata_reg[60] ;
  input \txAXIS_tdata_reg[60]_0 ;
  input \txAXIS_tdata_reg[60]_1 ;
  input \txAXIS_tdata_reg[61] ;
  input \txAXIS_tdata_reg[61]_0 ;
  input \txAXIS_tdata_reg[61]_1 ;
  input \txAXIS_tdata_reg[62] ;
  input \txAXIS_tdata_reg[62]_0 ;
  input \txAXIS_tdata_reg[63] ;
  input \txAXIS_tdata_reg[63]_0 ;
  input \txAXIS_tdata_reg[63]_1 ;
  input \stateOp_reg[3]_1 ;
  input \stateOp_reg[4]_15 ;
  input \stateOp_reg[4]_16 ;
  input [7:0]\tixVBufxfop_reg[7] ;
  input \txlen_reg[0] ;
  input \wordcntLast_reg[3] ;
  input commok_sig_reg_1;
  input [1:0]\stateOp_reg[0]_8 ;
  input [1:0]\stateOp_reg[0]_9 ;
  input stateOp_reg;
  input \stateOp_reg[0]_10 ;
  input \crcAXIS_tkeep_reg[0]_3 ;
  input \crcAXIS_tkeep_reg[0]_4 ;
  input \crcAXIS_tkeep_reg[0]_5 ;
  input \crcAXIS_tkeep_reg[0]_6 ;
  input crcAXIS_tlast_sig_reg_3;
  input \crc_imd_reg[4] ;
  input crcAXIS_tlast_sig_i_6_0;
  input \wordcnt_reg[0]_3 ;
  input [0:0]\crcAXIS_tkeep_reg[0]_7 ;
  input \stateOp_reg[0]_11 ;
  input \stateOp_reg[0]_12 ;
  input \stateOp_reg[0]_13 ;
  input [63:0]\sendAXIL_rdata_reg[63]_0 ;
  input [0:0]\stateOp[3]_i_3_0 ;
  input \stateOp_reg[3]_2 ;
  input \stateOp_reg[1]_13 ;
  input [3:0]crcAXIS_tlast_sig_i_6_1;
  input crcAXIS_tlast_sig_reg_4;
  input commok_sig_reg_2;
  input commok_sig_reg_3;
  input reqResetFromHostif;
  input \rxlen_reg[0]_3 ;
  input \rxlen_reg[0]_4 ;
  input [2:0]\crc_imd_reg[0] ;
  input \crc_imd_reg[0]_0 ;
  input \crc_imd_reg[9] ;
  input \crc_imd_reg[2]_0 ;
  input \crc_imd_reg[2]_1 ;
  input \crc_imd_reg[4]_0 ;
  input \crc_imd_reg[8] ;
  input \crc_imd_reg[8]_0 ;
  input [0:0]p_10_out;
  input \crc_imd_reg[0]_1 ;
  input \crc_imd_reg[1] ;
  input \crc_imd[1]_i_4_0 ;
  input \crc_imd_reg[1]_0 ;
  input \crc_imd_reg[0]_2 ;
  input \crc_imd_reg[2]_2 ;
  input \crc_imd_reg[8]_1 ;
  input \crc_imd_reg[1]_1 ;
  input \crc_imd[15]_i_41_0 ;
  input \crc_imd[14]_i_5 ;
  input \crc_imd[12]_i_3 ;
  input \crc_imd[14]_i_5_0 ;
  input \crc_imd[12]_i_3_0 ;
  input apuAXIL_wvalid;
  input [0:0]AXIL_rvalid_sig_reg_0;
  input aclk_sig;
  input apuAXIL_awvalid;
  input [63:0]apuAXIL_wdata;
  input [1:0]apuAXIL_awaddr;
  input [1:0]apuAXIL_araddr;
  input apuAXIL_bready;
  input [7:0]apuAXIL_wstrb;
  input apuAXIL_arvalid;
  input [28:0]recvAXIS_tlast_sig_reg_i_2_0;
  input apuAXIL_rready;

  wire [5:4]AXIL_araddr_sig;
  wire AXIL_arready;
  wire AXIL_arready_sig0;
  wire AXIL_awready_sig0;
  wire AXIL_awready_sig_i_1_n_0;
  wire AXIL_awready_sig_reg_0;
  wire AXIL_bvalid_sig_i_1_n_0;
  wire AXIL_bvalid_sig_reg_0;
  wire AXIL_rvalid_sig_i_1_n_0;
  wire [0:0]AXIL_rvalid_sig_reg_0;
  wire \AXIL_wdata_sig[15]_i_1_n_0 ;
  wire \AXIL_wdata_sig[23]_i_1_n_0 ;
  wire \AXIL_wdata_sig[31]_i_1_n_0 ;
  wire \AXIL_wdata_sig[39]_i_1_n_0 ;
  wire \AXIL_wdata_sig[47]_i_1_n_0 ;
  wire \AXIL_wdata_sig[55]_i_1_n_0 ;
  wire \AXIL_wdata_sig[63]_i_1_n_0 ;
  wire \AXIL_wdata_sig[7]_i_1_n_0 ;
  wire \AXIL_wdata_sig_reg_n_0_[0] ;
  wire \AXIL_wdata_sig_reg_n_0_[10] ;
  wire \AXIL_wdata_sig_reg_n_0_[11] ;
  wire \AXIL_wdata_sig_reg_n_0_[12] ;
  wire \AXIL_wdata_sig_reg_n_0_[13] ;
  wire \AXIL_wdata_sig_reg_n_0_[14] ;
  wire \AXIL_wdata_sig_reg_n_0_[15] ;
  wire \AXIL_wdata_sig_reg_n_0_[16] ;
  wire \AXIL_wdata_sig_reg_n_0_[17] ;
  wire \AXIL_wdata_sig_reg_n_0_[18] ;
  wire \AXIL_wdata_sig_reg_n_0_[19] ;
  wire \AXIL_wdata_sig_reg_n_0_[1] ;
  wire \AXIL_wdata_sig_reg_n_0_[20] ;
  wire \AXIL_wdata_sig_reg_n_0_[21] ;
  wire \AXIL_wdata_sig_reg_n_0_[22] ;
  wire \AXIL_wdata_sig_reg_n_0_[23] ;
  wire \AXIL_wdata_sig_reg_n_0_[24] ;
  wire \AXIL_wdata_sig_reg_n_0_[25] ;
  wire \AXIL_wdata_sig_reg_n_0_[26] ;
  wire \AXIL_wdata_sig_reg_n_0_[27] ;
  wire \AXIL_wdata_sig_reg_n_0_[28] ;
  wire \AXIL_wdata_sig_reg_n_0_[29] ;
  wire \AXIL_wdata_sig_reg_n_0_[30] ;
  wire \AXIL_wdata_sig_reg_n_0_[31] ;
  wire \AXIL_wdata_sig_reg_n_0_[32] ;
  wire \AXIL_wdata_sig_reg_n_0_[33] ;
  wire \AXIL_wdata_sig_reg_n_0_[34] ;
  wire \AXIL_wdata_sig_reg_n_0_[35] ;
  wire \AXIL_wdata_sig_reg_n_0_[36] ;
  wire \AXIL_wdata_sig_reg_n_0_[37] ;
  wire \AXIL_wdata_sig_reg_n_0_[38] ;
  wire \AXIL_wdata_sig_reg_n_0_[39] ;
  wire \AXIL_wdata_sig_reg_n_0_[40] ;
  wire \AXIL_wdata_sig_reg_n_0_[41] ;
  wire \AXIL_wdata_sig_reg_n_0_[42] ;
  wire \AXIL_wdata_sig_reg_n_0_[43] ;
  wire \AXIL_wdata_sig_reg_n_0_[44] ;
  wire \AXIL_wdata_sig_reg_n_0_[45] ;
  wire \AXIL_wdata_sig_reg_n_0_[46] ;
  wire \AXIL_wdata_sig_reg_n_0_[47] ;
  wire \AXIL_wdata_sig_reg_n_0_[48] ;
  wire \AXIL_wdata_sig_reg_n_0_[49] ;
  wire \AXIL_wdata_sig_reg_n_0_[4] ;
  wire \AXIL_wdata_sig_reg_n_0_[50] ;
  wire \AXIL_wdata_sig_reg_n_0_[51] ;
  wire \AXIL_wdata_sig_reg_n_0_[52] ;
  wire \AXIL_wdata_sig_reg_n_0_[53] ;
  wire \AXIL_wdata_sig_reg_n_0_[54] ;
  wire \AXIL_wdata_sig_reg_n_0_[55] ;
  wire \AXIL_wdata_sig_reg_n_0_[56] ;
  wire \AXIL_wdata_sig_reg_n_0_[57] ;
  wire \AXIL_wdata_sig_reg_n_0_[58] ;
  wire \AXIL_wdata_sig_reg_n_0_[59] ;
  wire \AXIL_wdata_sig_reg_n_0_[5] ;
  wire \AXIL_wdata_sig_reg_n_0_[60] ;
  wire \AXIL_wdata_sig_reg_n_0_[61] ;
  wire \AXIL_wdata_sig_reg_n_0_[62] ;
  wire \AXIL_wdata_sig_reg_n_0_[63] ;
  wire \AXIL_wdata_sig_reg_n_0_[6] ;
  wire \AXIL_wdata_sig_reg_n_0_[7] ;
  wire \AXIL_wdata_sig_reg_n_0_[8] ;
  wire \AXIL_wdata_sig_reg_n_0_[9] ;
  wire AXIL_wready_sig_i_1_n_0;
  wire AXIL_wready_sig_reg_0;
  wire [63:8]AXIS_tdata;
  wire AXIS_tlast;
  wire AXIS_tvalid;
  wire [0:0]CO;
  wire [7:0]D;
  wire [0:0]E;
  wire [7:0]\NWrA_reg[15] ;
  wire [7:0]\NWrA_reg[23] ;
  wire [7:0]\NWrA_reg[31] ;
  wire [3:0]\NWrA_reg[7] ;
  wire [7:0]\NWrB_reg[15] ;
  wire [7:0]\NWrB_reg[23] ;
  wire [7:0]\NWrB_reg[31] ;
  wire [6:0]\NWrB_reg[7] ;
  wire [7:0]O;
  wire [5:0]Q;
  wire [3:0]\TCapt_reg[15] ;
  wire [2:0]\TCapt_reg[7] ;
  wire ackRxtx;
  wire aclk_sig;
  wire [1:0]apuAXIL_araddr;
  wire apuAXIL_arvalid;
  wire [1:0]apuAXIL_awaddr;
  wire apuAXIL_awvalid;
  wire apuAXIL_bready;
  wire [63:0]apuAXIL_rdata;
  wire \apuAXIL_rdata[63]_INST_0_i_1_n_0 ;
  wire apuAXIL_rready;
  wire apuAXIL_rvalid;
  wire [63:0]apuAXIL_wdata;
  wire [7:0]apuAXIL_wstrb;
  wire apuAXIL_wvalid;
  wire awdone_i_1__0_n_0;
  wire awdone_reg_n_0;
  wire commok_sig_reg;
  wire commok_sig_reg_0;
  wire commok_sig_reg_1;
  wire commok_sig_reg_2;
  wire commok_sig_reg_3;
  wire \crcAXIS_tkeep[3]_i_4__0_n_0 ;
  wire \crcAXIS_tkeep[5]_i_2_n_0 ;
  wire \crcAXIS_tkeep[7]_i_3_n_0 ;
  wire \crcAXIS_tkeep[7]_i_4_n_0 ;
  wire \crcAXIS_tkeep[7]_i_7_n_0 ;
  wire \crcAXIS_tkeep_reg[0] ;
  wire \crcAXIS_tkeep_reg[0]_0 ;
  wire \crcAXIS_tkeep_reg[0]_1 ;
  wire \crcAXIS_tkeep_reg[0]_2 ;
  wire \crcAXIS_tkeep_reg[0]_3 ;
  wire \crcAXIS_tkeep_reg[0]_4 ;
  wire \crcAXIS_tkeep_reg[0]_5 ;
  wire \crcAXIS_tkeep_reg[0]_6 ;
  wire [0:0]\crcAXIS_tkeep_reg[0]_7 ;
  wire \crcAXIS_tkeep_reg[3] ;
  wire \crcAXIS_tkeep_reg[3]_0 ;
  wire \crcAXIS_tkeep_reg[3]_1 ;
  wire \crcAXIS_tkeep_reg[4] ;
  wire \crcAXIS_tkeep_reg[6] ;
  wire \crcAXIS_tkeep_reg[7] ;
  wire \crcAXIS_tkeep_reg[7]_0 ;
  wire [6:0]\crcAXIS_tkeep_reg[7]_1 ;
  wire \crcAXIS_tkeep_reg[7]_2 ;
  wire crcAXIS_tlast_sig_i_10_n_0;
  wire crcAXIS_tlast_sig_i_11_n_0;
  wire crcAXIS_tlast_sig_i_12_n_0;
  wire crcAXIS_tlast_sig_i_3_n_0;
  wire crcAXIS_tlast_sig_i_6_0;
  wire [3:0]crcAXIS_tlast_sig_i_6_1;
  wire crcAXIS_tlast_sig_i_6_n_0;
  wire crcAXIS_tlast_sig_i_8_0;
  wire crcAXIS_tlast_sig_i_8_1;
  wire crcAXIS_tlast_sig_i_8_2;
  wire crcAXIS_tlast_sig_i_8_n_0;
  wire crcAXIS_tlast_sig_reg;
  wire [0:0]crcAXIS_tlast_sig_reg_0;
  wire crcAXIS_tlast_sig_reg_1;
  wire crcAXIS_tlast_sig_reg_2;
  wire crcAXIS_tlast_sig_reg_3;
  wire crcAXIS_tlast_sig_reg_4;
  wire crc_imd0100_out;
  wire crc_imd0112_out;
  wire crc_imd0115_out;
  wire crc_imd0118_out;
  wire crc_imd0121_out;
  wire crc_imd0124_out;
  wire crc_imd0148_out;
  wire crc_imd0149_out;
  wire crc_imd0150_out;
  wire crc_imd0151_out;
  wire crc_imd0152_out;
  wire crc_imd0165_out;
  wire crc_imd0172_out;
  wire crc_imd0173_out;
  wire crc_imd0174_out;
  wire crc_imd0175_out;
  wire crc_imd0176_out;
  wire crc_imd0198_out;
  wire crc_imd0200_out;
  wire crc_imd0202_out;
  wire crc_imd041_out;
  wire crc_imd042_out;
  wire crc_imd043_out;
  wire crc_imd065_out;
  wire crc_imd066_out;
  wire crc_imd067_out;
  wire crc_imd068_out;
  wire crc_imd069_out;
  wire crc_imd081_out;
  wire crc_imd083_out;
  wire crc_imd085_out;
  wire crc_imd086_out;
  wire crc_imd087_out;
  wire \crc_imd[0]_i_10_n_0 ;
  wire \crc_imd[0]_i_11_n_0 ;
  wire \crc_imd[0]_i_12_n_0 ;
  wire \crc_imd[0]_i_13_n_0 ;
  wire \crc_imd[0]_i_14_n_0 ;
  wire \crc_imd[0]_i_15_n_0 ;
  wire \crc_imd[0]_i_16_n_0 ;
  wire \crc_imd[0]_i_18_n_0 ;
  wire \crc_imd[0]_i_19_n_0 ;
  wire \crc_imd[0]_i_20_n_0 ;
  wire \crc_imd[0]_i_2_n_0 ;
  wire \crc_imd[0]_i_3_n_0 ;
  wire \crc_imd[0]_i_4_n_0 ;
  wire \crc_imd[0]_i_5_n_0 ;
  wire \crc_imd[0]_i_6_n_0 ;
  wire \crc_imd[0]_i_7_n_0 ;
  wire \crc_imd[0]_i_8_n_0 ;
  wire \crc_imd[0]_i_9_n_0 ;
  wire \crc_imd[10]_i_11_n_0 ;
  wire \crc_imd[10]_i_14_n_0 ;
  wire \crc_imd[10]_i_17_n_0 ;
  wire \crc_imd[11]_i_12_n_0 ;
  wire \crc_imd[11]_i_13_n_0 ;
  wire \crc_imd[11]_i_16_n_0 ;
  wire \crc_imd[11]_i_17_n_0 ;
  wire \crc_imd[11]_i_18_n_0 ;
  wire \crc_imd[12]_i_11_n_0 ;
  wire \crc_imd[12]_i_13_n_0 ;
  wire \crc_imd[12]_i_17_n_0 ;
  wire \crc_imd[12]_i_3 ;
  wire \crc_imd[12]_i_3_0 ;
  wire \crc_imd[13]_i_11_n_0 ;
  wire \crc_imd[13]_i_12_n_0 ;
  wire \crc_imd[13]_i_13_n_0 ;
  wire \crc_imd[13]_i_14_n_0 ;
  wire \crc_imd[14]_i_16_n_0 ;
  wire \crc_imd[14]_i_18_n_0 ;
  wire \crc_imd[14]_i_19_n_0 ;
  wire \crc_imd[14]_i_22_n_0 ;
  wire \crc_imd[14]_i_5 ;
  wire \crc_imd[14]_i_5_0 ;
  wire \crc_imd[15]_i_10_n_0 ;
  wire \crc_imd[15]_i_11_n_0 ;
  wire \crc_imd[15]_i_16_n_0 ;
  wire \crc_imd[15]_i_17_n_0 ;
  wire \crc_imd[15]_i_18_n_0 ;
  wire \crc_imd[15]_i_19_n_0 ;
  wire \crc_imd[15]_i_21_n_0 ;
  wire \crc_imd[15]_i_22_n_0 ;
  wire \crc_imd[15]_i_23_n_0 ;
  wire \crc_imd[15]_i_27_n_0 ;
  wire \crc_imd[15]_i_28_n_0 ;
  wire \crc_imd[15]_i_29_n_0 ;
  wire \crc_imd[15]_i_30_n_0 ;
  wire \crc_imd[15]_i_31_n_0 ;
  wire \crc_imd[15]_i_33_n_0 ;
  wire \crc_imd[15]_i_34_n_0 ;
  wire \crc_imd[15]_i_35_n_0 ;
  wire \crc_imd[15]_i_36_n_0 ;
  wire \crc_imd[15]_i_37_n_0 ;
  wire \crc_imd[15]_i_38_n_0 ;
  wire \crc_imd[15]_i_39_n_0 ;
  wire \crc_imd[15]_i_40_n_0 ;
  wire \crc_imd[15]_i_41_0 ;
  wire \crc_imd[15]_i_41_n_0 ;
  wire \crc_imd[15]_i_42_n_0 ;
  wire \crc_imd[15]_i_47_n_0 ;
  wire \crc_imd[15]_i_48_n_0 ;
  wire \crc_imd[15]_i_51_n_0 ;
  wire \crc_imd[15]_i_53_n_0 ;
  wire \crc_imd[15]_i_54_n_0 ;
  wire \crc_imd[15]_i_55_n_0 ;
  wire \crc_imd[15]_i_60_n_0 ;
  wire \crc_imd[15]_i_61_n_0 ;
  wire \crc_imd[15]_i_62_n_0 ;
  wire \crc_imd[15]_i_63_n_0 ;
  wire \crc_imd[15]_i_64_n_0 ;
  wire \crc_imd[15]_i_65_n_0 ;
  wire \crc_imd[15]_i_66_n_0 ;
  wire \crc_imd[15]_i_67_n_0 ;
  wire \crc_imd[15]_i_68_n_0 ;
  wire \crc_imd[15]_i_6_n_0 ;
  wire \crc_imd[15]_i_71_n_0 ;
  wire \crc_imd[15]_i_72_n_0 ;
  wire \crc_imd[15]_i_73_n_0 ;
  wire \crc_imd[15]_i_75_n_0 ;
  wire \crc_imd[15]_i_77_n_0 ;
  wire \crc_imd[15]_i_78_n_0 ;
  wire \crc_imd[15]_i_79_n_0 ;
  wire \crc_imd[15]_i_7_n_0 ;
  wire \crc_imd[15]_i_8_n_0 ;
  wire \crc_imd[15]_i_9_n_0 ;
  wire \crc_imd[1]_i_10_n_0 ;
  wire \crc_imd[1]_i_12_n_0 ;
  wire \crc_imd[1]_i_13_n_0 ;
  wire \crc_imd[1]_i_14_n_0 ;
  wire \crc_imd[1]_i_15_n_0 ;
  wire \crc_imd[1]_i_16_n_0 ;
  wire \crc_imd[1]_i_17_n_0 ;
  wire \crc_imd[1]_i_18_n_0 ;
  wire \crc_imd[1]_i_19_n_0 ;
  wire \crc_imd[1]_i_20_n_0 ;
  wire \crc_imd[1]_i_21_n_0 ;
  wire \crc_imd[1]_i_22_n_0 ;
  wire \crc_imd[1]_i_23_n_0 ;
  wire \crc_imd[1]_i_24_n_0 ;
  wire \crc_imd[1]_i_25_n_0 ;
  wire \crc_imd[1]_i_27_n_0 ;
  wire \crc_imd[1]_i_28_n_0 ;
  wire \crc_imd[1]_i_29_n_0 ;
  wire \crc_imd[1]_i_2_n_0 ;
  wire \crc_imd[1]_i_3_n_0 ;
  wire \crc_imd[1]_i_4_0 ;
  wire \crc_imd[1]_i_4_n_0 ;
  wire \crc_imd[1]_i_5_n_0 ;
  wire \crc_imd[1]_i_6_n_0 ;
  wire \crc_imd[1]_i_7_n_0 ;
  wire \crc_imd[1]_i_8_n_0 ;
  wire \crc_imd[1]_i_9_n_0 ;
  wire \crc_imd[2]_i_2_n_0 ;
  wire \crc_imd[2]_i_4_n_0 ;
  wire \crc_imd[2]_i_6_n_0 ;
  wire \crc_imd[2]_i_8_n_0 ;
  wire \crc_imd[2]_i_9_n_0 ;
  wire \crc_imd[3]_i_5_n_0 ;
  wire \crc_imd[3]_i_6_n_0 ;
  wire \crc_imd[3]_i_7_n_0 ;
  wire \crc_imd[4]_i_2_n_0 ;
  wire \crc_imd[4]_i_4_n_0 ;
  wire \crc_imd[4]_i_6_n_0 ;
  wire \crc_imd[4]_i_7_n_0 ;
  wire \crc_imd[4]_i_8_n_0 ;
  wire \crc_imd[5]_i_7_n_0 ;
  wire \crc_imd[5]_i_8_n_0 ;
  wire \crc_imd[6]_i_10_n_0 ;
  wire \crc_imd[6]_i_11_n_0 ;
  wire \crc_imd[6]_i_12_n_0 ;
  wire \crc_imd[7]_i_11_n_0 ;
  wire \crc_imd[7]_i_16_n_0 ;
  wire \crc_imd[7]_i_17_n_0 ;
  wire \crc_imd[7]_i_25_n_0 ;
  wire \crc_imd[8]_i_10_n_0 ;
  wire \crc_imd[8]_i_11_n_0 ;
  wire \crc_imd[8]_i_12_n_0 ;
  wire \crc_imd[8]_i_13_n_0 ;
  wire \crc_imd[8]_i_16_n_0 ;
  wire \crc_imd[8]_i_17_n_0 ;
  wire \crc_imd[8]_i_19_n_0 ;
  wire \crc_imd[8]_i_4_n_0 ;
  wire \crc_imd[8]_i_5_n_0 ;
  wire \crc_imd[8]_i_9_n_0 ;
  wire \crc_imd[9]_i_12_n_0 ;
  wire \crc_imd[9]_i_13_n_0 ;
  wire \crc_imd[9]_i_15_n_0 ;
  wire \crc_imd[9]_i_16_n_0 ;
  wire \crc_imd[9]_i_17_n_0 ;
  wire \crc_imd[9]_i_18_n_0 ;
  wire \crc_imd[9]_i_3_n_0 ;
  wire \crc_imd[9]_i_4_n_0 ;
  wire \crc_imd[9]_i_5_n_0 ;
  wire \crc_imd[9]_i_8_n_0 ;
  wire [2:0]\crc_imd_reg[0] ;
  wire \crc_imd_reg[0]_0 ;
  wire \crc_imd_reg[0]_1 ;
  wire \crc_imd_reg[0]_2 ;
  wire \crc_imd_reg[11] ;
  wire \crc_imd_reg[12] ;
  wire \crc_imd_reg[12]_0 ;
  wire \crc_imd_reg[13] ;
  wire \crc_imd_reg[15] ;
  wire \crc_imd_reg[1] ;
  wire \crc_imd_reg[1]_0 ;
  wire \crc_imd_reg[1]_1 ;
  wire [1:0]\crc_imd_reg[2] ;
  wire \crc_imd_reg[2]_0 ;
  wire \crc_imd_reg[2]_1 ;
  wire \crc_imd_reg[2]_2 ;
  wire \crc_imd_reg[3] ;
  wire \crc_imd_reg[4] ;
  wire \crc_imd_reg[4]_0 ;
  wire [3:0]\crc_imd_reg[7] ;
  wire [0:0]\crc_imd_reg[7]_0 ;
  wire [6:0]\crc_imd_reg[7]_1 ;
  wire \crc_imd_reg[8] ;
  wire \crc_imd_reg[8]_0 ;
  wire \crc_imd_reg[8]_1 ;
  wire \crc_imd_reg[9] ;
  wire [15:0]i;
  wire \i[0]_i_1__11_n_0 ;
  wire \i[10]_i_1__2_n_0 ;
  wire \i[11]_i_1__1_n_0 ;
  wire \i[12]_i_1__1_n_0 ;
  wire \i[12]_i_2_n_0 ;
  wire \i[13]_i_1__1_n_0 ;
  wire \i[13]_i_2__1_n_0 ;
  wire \i[14]_i_1_n_0 ;
  wire \i[15]_i_1_n_0 ;
  wire \i[15]_i_2_n_0 ;
  wire \i[15]_i_3_n_0 ;
  wire \i[15]_i_4_n_0 ;
  wire \i[15]_i_5_n_0 ;
  wire \i[1]_i_1__10_n_0 ;
  wire \i[2]_i_1__6_n_0 ;
  wire \i[3]_i_1__6_n_0 ;
  wire \i[4]_i_1__6_n_0 ;
  wire \i[5]_i_1__5_n_0 ;
  wire \i[5]_i_2__4_n_0 ;
  wire \i[6]_i_1__5_n_0 ;
  wire \i[7]_i_1__5_n_0 ;
  wire \i[8]_i_1__4_n_0 ;
  wire \i[9]_i_1__3_n_0 ;
  wire \i[9]_i_2__3_n_0 ;
  wire \invbuf[9][7]_i_4_n_0 ;
  wire \invbuf_reg[7][0] ;
  wire \invbuf_reg[7][0]_0 ;
  wire \invbuf_reg[9][0] ;
  wire \invbuf_reg[9][0]_0 ;
  wire \invbuf_reg[9][0]_1 ;
  wire \invbuf_reg[9][0]_2 ;
  wire \invbuf_reg[9][0]_3 ;
  wire \invbuf_reg[9][0]_4 ;
  wire \invbuf_reg[9][0]_5 ;
  wire \invbuf_reg[9][0]_6 ;
  wire [1:0]ixBlkWrite;
  wire [0:0]\ixRetbufCrc_reg[0] ;
  wire \ixRetbufCrc_reg[0]_0 ;
  wire \ixRetbufCrc_reg[2] ;
  wire [0:0]\ixRetbufCrc_reg[3] ;
  wire [0:0]\ixRetbufCrc_reg[4] ;
  wire [0:0]\ixRetbufCrc_reg[4]_0 ;
  wire \lastAXIS_tkeep_reg[1] ;
  wire \lastAXIS_tkeep_reg[1]_0 ;
  wire \lastAXIS_tkeep_reg[2] ;
  wire \lastAXIS_tkeep_reg[5] ;
  wire [7:0]\lastAXIS_tkeep_reg[7] ;
  wire [7:0]\len_reg[15] ;
  wire [7:0]\len_reg[23] ;
  wire [4:0]\len_reg[2] ;
  wire [7:0]\len_reg[31] ;
  wire [7:0]\len_reg[7] ;
  wire \myCrc/crc_imd0132_out ;
  wire \myCrc/crc_imd0135_out ;
  wire [9:9]\myCrc/p_29_out ;
  wire [8:8]\myCrc/p_31_out ;
  wire [7:0]\opbuf_reg[0][7] ;
  wire [7:0]\opbuf_reg[1][7] ;
  wire [7:0]\opbuf_reg[2][7] ;
  wire [31:0]\opbuf_reg[3][7] ;
  wire [1:0]p_0_in;
  wire [0:0]p_10_out;
  wire p_136_in;
  wire p_1_in0;
  wire p_33_in;
  wire [28:0]plusOp;
  wire \pollbuf_reg[0][7] ;
  wire [7:0]\pollbuf_reg[0][7]_0 ;
  wire \pollbuf_reg[0][7]_1 ;
  wire [7:0]\pollbuf_reg[1][7] ;
  wire \pollbuf_reg[2][3] ;
  wire \pollbuf_reg[2][3]_0 ;
  wire \pollbuf_reg[2][3]_1 ;
  wire \pollbuf_reg[2][3]_2 ;
  wire \pollbuf_reg[2][4] ;
  wire \pollbuf_reg[2][7] ;
  wire \pollbuf_reg[3][1] ;
  wire \pollbuf_reg[3][5] ;
  wire \pollbuf_reg[3][5]_0 ;
  wire \recvAXIL_rdata[63]_i_1_n_0 ;
  wire \recvAXIL_rdata[63]_i_2_n_0 ;
  wire \recvAXIL_rdata_reg_n_0_[63] ;
  wire [5:0]recvAXIS_tdata;
  wire \recvAXIS_tdata_sig[0]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[10]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[11]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[12]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[13]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[14]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[15]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[16]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[17]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[18]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[19]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[1]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[20]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[21]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[22]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[23]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[24]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[25]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[26]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[27]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[28]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[29]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[2]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[30]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[31]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[32]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[33]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[34]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[35]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[36]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[37]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[38]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[39]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[3]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[40]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[41]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[42]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[43]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[44]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[45]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[46]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[47]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[48]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[49]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[4]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[50]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[51]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[52]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[53]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[54]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[55]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[56]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[57]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[58]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[59]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[5]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[60]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[61]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[62]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[63]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[63]_i_2_n_0 ;
  wire \recvAXIS_tdata_sig[63]_i_3_n_0 ;
  wire \recvAXIS_tdata_sig[6]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[7]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[8]_i_1_n_0 ;
  wire \recvAXIS_tdata_sig[9]_i_1_n_0 ;
  wire [12:0]\recvAXIS_tdata_sig_reg[15]_0 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[47]_0 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[7]_0 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[7]_1 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[7]_2 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[7]_3 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[7]_4 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[7]_5 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[7]_6 ;
  wire recvAXIS_tlast;
  wire recvAXIS_tlast_sig0;
  wire recvAXIS_tlast_sig_i_10_n_0;
  wire recvAXIS_tlast_sig_i_11_n_0;
  wire recvAXIS_tlast_sig_i_12_n_0;
  wire recvAXIS_tlast_sig_i_13_n_0;
  wire recvAXIS_tlast_sig_i_14_n_0;
  wire recvAXIS_tlast_sig_i_15_n_0;
  wire recvAXIS_tlast_sig_i_16_n_0;
  wire recvAXIS_tlast_sig_i_17_n_0;
  wire recvAXIS_tlast_sig_i_18_n_0;
  wire recvAXIS_tlast_sig_i_19_n_0;
  wire recvAXIS_tlast_sig_i_1_n_0;
  wire recvAXIS_tlast_sig_i_20_n_0;
  wire recvAXIS_tlast_sig_i_21_n_0;
  wire recvAXIS_tlast_sig_i_22_n_0;
  wire recvAXIS_tlast_sig_i_23_n_0;
  wire recvAXIS_tlast_sig_i_4_n_0;
  wire recvAXIS_tlast_sig_i_5_n_0;
  wire recvAXIS_tlast_sig_i_6_n_0;
  wire recvAXIS_tlast_sig_i_7_n_0;
  wire recvAXIS_tlast_sig_i_8_n_0;
  wire recvAXIS_tlast_sig_i_9_n_0;
  wire recvAXIS_tlast_sig_reg_0;
  wire [28:0]recvAXIS_tlast_sig_reg_i_2_0;
  wire recvAXIS_tlast_sig_reg_i_2_n_6;
  wire recvAXIS_tlast_sig_reg_i_2_n_7;
  wire recvAXIS_tlast_sig_reg_i_3_n_0;
  wire recvAXIS_tlast_sig_reg_i_3_n_1;
  wire recvAXIS_tlast_sig_reg_i_3_n_2;
  wire recvAXIS_tlast_sig_reg_i_3_n_3;
  wire recvAXIS_tlast_sig_reg_i_3_n_4;
  wire recvAXIS_tlast_sig_reg_i_3_n_5;
  wire recvAXIS_tlast_sig_reg_i_3_n_6;
  wire recvAXIS_tlast_sig_reg_i_3_n_7;
  wire recvStrbToStart_i_1_n_0;
  wire recvStrbToStart_i_2_n_0;
  wire recvStrbToStart_i_3_n_0;
  wire recvStrbToStart_reg_n_0;
  wire recvStrbToStop_i_1_n_0;
  wire recvStrbToStop_i_2_n_0;
  wire recvStrbToStop_i_3_n_0;
  wire recvStrbToStop_reg_n_0;
  wire req;
  wire reqResetFromHostif;
  wire reqReset_sig_reg;
  wire reqReset_sig_reg_0;
  wire reqReset_sig_reg_1;
  wire [0:0]\resid_reg[0] ;
  wire [0:0]\resid_reg[0]_0 ;
  wire [0:0]\resid_reg[0]_1 ;
  wire [0:0]\resid_reg[0]_10 ;
  wire [0:0]\resid_reg[0]_11 ;
  wire [0:0]\resid_reg[0]_12 ;
  wire [0:0]\resid_reg[0]_13 ;
  wire [0:0]\resid_reg[0]_14 ;
  wire [0:0]\resid_reg[0]_15 ;
  wire [0:0]\resid_reg[0]_16 ;
  wire [0:0]\resid_reg[0]_17 ;
  wire [0:0]\resid_reg[0]_18 ;
  wire [0:0]\resid_reg[0]_19 ;
  wire [0:0]\resid_reg[0]_2 ;
  wire [0:0]\resid_reg[0]_20 ;
  wire \resid_reg[0]_21 ;
  wire [0:0]\resid_reg[0]_3 ;
  wire [0:0]\resid_reg[0]_4 ;
  wire [0:0]\resid_reg[0]_5 ;
  wire [0:0]\resid_reg[0]_6 ;
  wire [0:0]\resid_reg[0]_7 ;
  wire [0:0]\resid_reg[0]_8 ;
  wire [0:0]\resid_reg[0]_9 ;
  wire \resid_reg[1] ;
  wire \retbuf[0][2]_i_2_n_0 ;
  wire \retbuf[10][5]_i_2_n_0 ;
  wire \retbuf[11][5]_i_2_n_0 ;
  wire \retbuf[12][0]_i_2_n_0 ;
  wire \retbuf[12][4]_i_2_n_0 ;
  wire \retbuf[12][5]_i_2_n_0 ;
  wire \retbuf[13][1]_i_2_n_0 ;
  wire \retbuf[13][2]_i_2_n_0 ;
  wire \retbuf[13][3]_i_2_n_0 ;
  wire \retbuf[13][5]_i_2_n_0 ;
  wire \retbuf[14][1]_i_2_n_0 ;
  wire \retbuf[14][4]_i_2_n_0 ;
  wire \retbuf[14][5]_i_2_n_0 ;
  wire \retbuf[15][5]_i_2_n_0 ;
  wire \retbuf[16][7]_i_3_n_0 ;
  wire \retbuf[4][0]_i_2_n_0 ;
  wire \retbuf[4][3]_i_2_n_0 ;
  wire \retbuf[7][6]_i_2_n_0 ;
  wire \retbuf[7][7]_i_5_n_0 ;
  wire \retbuf[8][5]_i_2_n_0 ;
  wire \retbuf[8][7]_i_3__0_n_0 ;
  wire \retbuf[9][5]_i_2_n_0 ;
  wire \retbuf_reg[0][0] ;
  wire \retbuf_reg[0][0]_0 ;
  wire \retbuf_reg[0][2] ;
  wire \retbuf_reg[0][2]_0 ;
  wire \retbuf_reg[0][2]_1 ;
  wire \retbuf_reg[0][7] ;
  wire \retbuf_reg[0][7]_0 ;
  wire \retbuf_reg[0][7]_1 ;
  wire \retbuf_reg[0][7]_2 ;
  wire \retbuf_reg[0][7]_3 ;
  wire \retbuf_reg[0][7]_4 ;
  wire \retbuf_reg[10][0] ;
  wire \retbuf_reg[10][0]_0 ;
  wire \retbuf_reg[11][0] ;
  wire \retbuf_reg[11][4] ;
  wire \retbuf_reg[12][0] ;
  wire \retbuf_reg[12][0]_0 ;
  wire [27:0]\retbuf_reg[12][7] ;
  wire \retbuf_reg[13][0] ;
  wire \retbuf_reg[13][0]_0 ;
  wire \retbuf_reg[14][0] ;
  wire \retbuf_reg[14][0]_0 ;
  wire \retbuf_reg[15][0] ;
  wire \retbuf_reg[15][0]_0 ;
  wire \retbuf_reg[15][0]_1 ;
  wire \retbuf_reg[15][0]_2 ;
  wire \retbuf_reg[15][1] ;
  wire [15:0]\retbuf_reg[15][7] ;
  wire \retbuf_reg[16][0] ;
  wire \retbuf_reg[16][0]_0 ;
  wire \retbuf_reg[16][0]_1 ;
  wire \retbuf_reg[17][0] ;
  wire \retbuf_reg[18][0] ;
  wire \retbuf_reg[19][0] ;
  wire \retbuf_reg[1][0] ;
  wire \retbuf_reg[1][0]_0 ;
  wire \retbuf_reg[1][0]_1 ;
  wire \retbuf_reg[1][0]_2 ;
  wire \retbuf_reg[20][0] ;
  wire \retbuf_reg[21][0] ;
  wire \retbuf_reg[22][0] ;
  wire \retbuf_reg[23][0] ;
  wire \retbuf_reg[24][0] ;
  wire \retbuf_reg[25][0] ;
  wire \retbuf_reg[26][0] ;
  wire \retbuf_reg[27][0] ;
  wire \retbuf_reg[28][0] ;
  wire \retbuf_reg[29][0] ;
  wire \retbuf_reg[29][0]_0 ;
  wire \retbuf_reg[2][0] ;
  wire \retbuf_reg[2][7] ;
  wire \retbuf_reg[2][7]_0 ;
  wire \retbuf_reg[30][0] ;
  wire \retbuf_reg[30][0]_0 ;
  wire \retbuf_reg[31][0] ;
  wire \retbuf_reg[32][0] ;
  wire \retbuf_reg[33][0] ;
  wire \retbuf_reg[34][0] ;
  wire \retbuf_reg[34][0]_0 ;
  wire \retbuf_reg[35][0] ;
  wire \retbuf_reg[36][7] ;
  wire \retbuf_reg[36][7]_0 ;
  wire \retbuf_reg[37][7] ;
  wire \retbuf_reg[38][7] ;
  wire \retbuf_reg[38][7]_0 ;
  wire \retbuf_reg[39][7] ;
  wire \retbuf_reg[39][7]_0 ;
  wire \retbuf_reg[39][7]_1 ;
  wire [2:0]\retbuf_reg[39][7]_2 ;
  wire \retbuf_reg[39][7]_3 ;
  wire \retbuf_reg[3][2] ;
  wire \retbuf_reg[3][2]_0 ;
  wire \retbuf_reg[3][3] ;
  wire \retbuf_reg[3][3]_0 ;
  wire \retbuf_reg[3][6] ;
  wire \retbuf_reg[3][6]_0 ;
  wire \retbuf_reg[3][7] ;
  wire \retbuf_reg[3][7]_0 ;
  wire \retbuf_reg[3][7]_1 ;
  wire [4:0]\retbuf_reg[3][7]_2 ;
  wire \retbuf_reg[3][7]_3 ;
  wire \retbuf_reg[3][7]_4 ;
  wire \retbuf_reg[4][0] ;
  wire \retbuf_reg[4][0]_0 ;
  wire \retbuf_reg[4][0]_1 ;
  wire \retbuf_reg[4][1] ;
  wire \retbuf_reg[4][1]_0 ;
  wire \retbuf_reg[4][2] ;
  wire \retbuf_reg[4][2]_0 ;
  wire \retbuf_reg[4][3] ;
  wire \retbuf_reg[4][3]_0 ;
  wire \retbuf_reg[4][7] ;
  wire \retbuf_reg[4][7]_0 ;
  wire \retbuf_reg[4][7]_1 ;
  wire \retbuf_reg[4][7]_2 ;
  wire \retbuf_reg[4][7]_3 ;
  wire \retbuf_reg[4][7]_4 ;
  wire \retbuf_reg[4][7]_5 ;
  wire \retbuf_reg[5][0] ;
  wire \retbuf_reg[5][0]_0 ;
  wire \retbuf_reg[6][0] ;
  wire \retbuf_reg[6][5] ;
  wire \retbuf_reg[6][5]_0 ;
  wire \retbuf_reg[6][5]_1 ;
  wire \retbuf_reg[7][4] ;
  wire \retbuf_reg[7][5] ;
  wire \retbuf_reg[7][5]_0 ;
  wire \retbuf_reg[7][7] ;
  wire \retbuf_reg[7][7]_0 ;
  wire \retbuf_reg[7][7]_1 ;
  wire [3:0]\retbuf_reg[7][7]_2 ;
  wire \retbuf_reg[8][0] ;
  wire \retbuf_reg[8][0]_0 ;
  wire [27:0]\retbuf_reg[8][7] ;
  wire \retbuf_reg[9][0] ;
  wire \retbuf_reg[9][0]_0 ;
  wire [63:1]rxAXIS_tdata;
  wire rxlen;
  wire \rxlen[0]_i_4_n_0 ;
  wire \rxlen_reg[0] ;
  wire \rxlen_reg[0]_0 ;
  wire \rxlen_reg[0]_1 ;
  wire \rxlen_reg[0]_2 ;
  wire \rxlen_reg[0]_3 ;
  wire \rxlen_reg[0]_4 ;
  wire [63:0]sendAXIL_rdata;
  wire \sendAXIL_rdata[0]_i_1_n_0 ;
  wire \sendAXIL_rdata[10]_i_1_n_0 ;
  wire \sendAXIL_rdata[11]_i_1_n_0 ;
  wire \sendAXIL_rdata[12]_i_1_n_0 ;
  wire \sendAXIL_rdata[13]_i_1_n_0 ;
  wire \sendAXIL_rdata[14]_i_1_n_0 ;
  wire \sendAXIL_rdata[15]_i_1_n_0 ;
  wire \sendAXIL_rdata[16]_i_1_n_0 ;
  wire \sendAXIL_rdata[17]_i_1_n_0 ;
  wire \sendAXIL_rdata[18]_i_1_n_0 ;
  wire \sendAXIL_rdata[19]_i_1_n_0 ;
  wire \sendAXIL_rdata[1]_i_1_n_0 ;
  wire \sendAXIL_rdata[20]_i_1_n_0 ;
  wire \sendAXIL_rdata[21]_i_1_n_0 ;
  wire \sendAXIL_rdata[22]_i_1_n_0 ;
  wire \sendAXIL_rdata[23]_i_1_n_0 ;
  wire \sendAXIL_rdata[24]_i_1_n_0 ;
  wire \sendAXIL_rdata[25]_i_1_n_0 ;
  wire \sendAXIL_rdata[26]_i_1_n_0 ;
  wire \sendAXIL_rdata[27]_i_1_n_0 ;
  wire \sendAXIL_rdata[28]_i_1_n_0 ;
  wire \sendAXIL_rdata[29]_i_1_n_0 ;
  wire \sendAXIL_rdata[2]_i_1_n_0 ;
  wire \sendAXIL_rdata[30]_i_1_n_0 ;
  wire \sendAXIL_rdata[31]_i_1_n_0 ;
  wire \sendAXIL_rdata[32]_i_1_n_0 ;
  wire \sendAXIL_rdata[33]_i_1_n_0 ;
  wire \sendAXIL_rdata[34]_i_1_n_0 ;
  wire \sendAXIL_rdata[35]_i_1_n_0 ;
  wire \sendAXIL_rdata[36]_i_1_n_0 ;
  wire \sendAXIL_rdata[37]_i_1_n_0 ;
  wire \sendAXIL_rdata[38]_i_1_n_0 ;
  wire \sendAXIL_rdata[39]_i_1_n_0 ;
  wire \sendAXIL_rdata[3]_i_1_n_0 ;
  wire \sendAXIL_rdata[40]_i_1_n_0 ;
  wire \sendAXIL_rdata[41]_i_1_n_0 ;
  wire \sendAXIL_rdata[42]_i_1_n_0 ;
  wire \sendAXIL_rdata[43]_i_1_n_0 ;
  wire \sendAXIL_rdata[44]_i_1_n_0 ;
  wire \sendAXIL_rdata[45]_i_1_n_0 ;
  wire \sendAXIL_rdata[46]_i_1_n_0 ;
  wire \sendAXIL_rdata[47]_i_1_n_0 ;
  wire \sendAXIL_rdata[48]_i_1_n_0 ;
  wire \sendAXIL_rdata[49]_i_1_n_0 ;
  wire \sendAXIL_rdata[4]_i_1_n_0 ;
  wire \sendAXIL_rdata[50]_i_1_n_0 ;
  wire \sendAXIL_rdata[51]_i_1_n_0 ;
  wire \sendAXIL_rdata[52]_i_1_n_0 ;
  wire \sendAXIL_rdata[53]_i_1_n_0 ;
  wire \sendAXIL_rdata[54]_i_1_n_0 ;
  wire \sendAXIL_rdata[55]_i_1_n_0 ;
  wire \sendAXIL_rdata[56]_i_1_n_0 ;
  wire \sendAXIL_rdata[57]_i_1_n_0 ;
  wire \sendAXIL_rdata[58]_i_1_n_0 ;
  wire \sendAXIL_rdata[59]_i_1_n_0 ;
  wire \sendAXIL_rdata[5]_i_1_n_0 ;
  wire \sendAXIL_rdata[60]_i_1_n_0 ;
  wire \sendAXIL_rdata[61]_i_1_n_0 ;
  wire \sendAXIL_rdata[62]_i_1_n_0 ;
  wire \sendAXIL_rdata[63]_i_1_n_0 ;
  wire \sendAXIL_rdata[63]_i_2_n_0 ;
  wire \sendAXIL_rdata[63]_i_3_n_0 ;
  wire \sendAXIL_rdata[63]_i_4_n_0 ;
  wire \sendAXIL_rdata[63]_i_5_n_0 ;
  wire \sendAXIL_rdata[6]_i_1_n_0 ;
  wire \sendAXIL_rdata[7]_i_1_n_0 ;
  wire \sendAXIL_rdata[8]_i_1_n_0 ;
  wire \sendAXIL_rdata[9]_i_1_n_0 ;
  wire [63:0]\sendAXIL_rdata_reg[63]_0 ;
  wire sendStrbToStart0;
  wire sendStrbToStart_i_10_n_0;
  wire sendStrbToStart_i_11_n_0;
  wire sendStrbToStart_i_12_n_0;
  wire sendStrbToStart_i_13_n_0;
  wire sendStrbToStart_i_14_n_0;
  wire sendStrbToStart_i_15_n_0;
  wire sendStrbToStart_i_16_n_0;
  wire sendStrbToStart_i_17_n_0;
  wire sendStrbToStart_i_18_n_0;
  wire sendStrbToStart_i_19_n_0;
  wire sendStrbToStart_i_1_n_0;
  wire sendStrbToStart_i_20_n_0;
  wire sendStrbToStart_i_21_n_0;
  wire sendStrbToStart_i_2_n_0;
  wire sendStrbToStart_i_3_n_0;
  wire sendStrbToStart_i_4_n_0;
  wire sendStrbToStart_i_5_n_0;
  wire sendStrbToStart_i_6_n_0;
  wire sendStrbToStart_i_7_n_0;
  wire sendStrbToStart_i_8_n_0;
  wire sendStrbToStart_i_9_n_0;
  wire sendStrbToStart_reg_n_0;
  wire sendStrbToStop_i_1_n_0;
  wire sendStrbToStop_i_2_n_0;
  wire sendStrbToStop_i_3_n_0;
  wire sendStrbToStop_i_4_n_0;
  wire sendStrbToStop_i_5_n_0;
  wire sendStrbToStop_reg_n_0;
  wire \stateOp[0]_i_2_n_0 ;
  wire \stateOp[0]_i_4_n_0 ;
  wire \stateOp[1]_i_10_n_0 ;
  wire \stateOp[1]_i_4__1_n_0 ;
  wire \stateOp[1]_i_9_n_0 ;
  wire \stateOp[2]_i_2__1_n_0 ;
  wire \stateOp[2]_i_5__1_n_0 ;
  wire [0:0]\stateOp[3]_i_3_0 ;
  wire \stateOp[3]_i_3_n_0 ;
  wire \stateOp[3]_i_4__0_n_0 ;
  wire \stateOp[3]_i_6_n_0 ;
  wire \stateOp[3]_i_7_n_0 ;
  wire \stateOp[4]_i_3__0_n_0 ;
  wire \stateOp[4]_i_6_n_0 ;
  wire \stateOp[4]_i_7_n_0 ;
  wire \stateOp[5]_i_18_n_0 ;
  wire \stateOp[5]_i_4_n_0 ;
  wire \stateOp[5]_i_5_n_0 ;
  wire \stateOp[5]_i_6_n_0 ;
  wire \stateOp_next_reg[0] ;
  wire \stateOp_next_reg[1] ;
  wire \stateOp_next_reg[4] ;
  wire \stateOp_next_reg[5] ;
  wire \stateOp_next_reg[5]_0 ;
  wire \stateOp_next_reg[5]_1 ;
  wire stateOp_reg;
  wire [0:0]\stateOp_reg[0] ;
  wire \stateOp_reg[0]_0 ;
  wire \stateOp_reg[0]_1 ;
  wire \stateOp_reg[0]_10 ;
  wire \stateOp_reg[0]_11 ;
  wire \stateOp_reg[0]_12 ;
  wire \stateOp_reg[0]_13 ;
  wire \stateOp_reg[0]_2 ;
  wire \stateOp_reg[0]_3 ;
  wire \stateOp_reg[0]_4 ;
  wire \stateOp_reg[0]_5 ;
  wire \stateOp_reg[0]_6 ;
  wire \stateOp_reg[0]_7 ;
  wire [1:0]\stateOp_reg[0]_8 ;
  wire [1:0]\stateOp_reg[0]_9 ;
  wire [0:0]\stateOp_reg[1] ;
  wire [0:0]\stateOp_reg[1]_0 ;
  wire [0:0]\stateOp_reg[1]_1 ;
  wire \stateOp_reg[1]_10 ;
  wire \stateOp_reg[1]_11 ;
  wire \stateOp_reg[1]_12 ;
  wire \stateOp_reg[1]_13 ;
  wire [0:0]\stateOp_reg[1]_2 ;
  wire [0:0]\stateOp_reg[1]_3 ;
  wire [0:0]\stateOp_reg[1]_4 ;
  wire [0:0]\stateOp_reg[1]_5 ;
  wire [0:0]\stateOp_reg[1]_6 ;
  wire [0:0]\stateOp_reg[1]_7 ;
  wire [0:0]\stateOp_reg[1]_8 ;
  wire [45:0]\stateOp_reg[1]_9 ;
  wire [0:0]\stateOp_reg[2] ;
  wire [0:0]\stateOp_reg[2]_0 ;
  wire \stateOp_reg[2]_1 ;
  wire \stateOp_reg[2]_2 ;
  wire \stateOp_reg[2]_3 ;
  wire [6:0]\stateOp_reg[3] ;
  wire [0:0]\stateOp_reg[3]_0 ;
  wire \stateOp_reg[3]_1 ;
  wire \stateOp_reg[3]_2 ;
  wire \stateOp_reg[4] ;
  wire \stateOp_reg[4]_0 ;
  wire \stateOp_reg[4]_1 ;
  wire [0:0]\stateOp_reg[4]_10 ;
  wire \stateOp_reg[4]_11 ;
  wire \stateOp_reg[4]_12 ;
  wire [24:0]\stateOp_reg[4]_13 ;
  wire [0:0]\stateOp_reg[4]_14 ;
  wire \stateOp_reg[4]_15 ;
  wire \stateOp_reg[4]_16 ;
  wire [0:0]\stateOp_reg[4]_2 ;
  wire \stateOp_reg[4]_3 ;
  wire \stateOp_reg[4]_4 ;
  wire [6:0]\stateOp_reg[4]_5 ;
  wire [30:0]\stateOp_reg[4]_6 ;
  wire [28:0]\stateOp_reg[4]_7 ;
  wire [0:0]\stateOp_reg[4]_8 ;
  wire [0:0]\stateOp_reg[4]_9 ;
  wire [0:0]\stateOp_reg[5] ;
  wire [0:0]\stateOp_reg[5]_0 ;
  wire [0:0]\stateOp_reg[5]_1 ;
  wire [0:0]\stateOp_reg[5]_2 ;
  wire [2:0]\stateOp_reg[5]_3 ;
  wire [4:0]\stateOp_reg[5]_4 ;
  wire [0:0]\stateOp_reg[5]_5 ;
  wire \stateOp_reg[5]_6 ;
  wire \stateOp_reg[5]_7 ;
  wire [2:0]stateRecv;
  wire \stateRecv[0]_i_1_n_0 ;
  wire \stateRecv[1]_i_1_n_0 ;
  wire \stateRecv[2]_i_10_n_0 ;
  wire \stateRecv[2]_i_12_n_0 ;
  wire \stateRecv[2]_i_1_n_0 ;
  wire \stateRecv[2]_i_2_n_0 ;
  wire \stateRecv[2]_i_3_n_0 ;
  wire \stateRecv[2]_i_4_n_0 ;
  wire \stateRecv[2]_i_5_n_0 ;
  wire \stateRecv[2]_i_6__0_n_0 ;
  wire \stateRecv[2]_i_7_n_0 ;
  wire \stateRecv[2]_i_8_n_0 ;
  wire \stateRecv[2]_i_9__0_n_0 ;
  wire \stateRecv_reg[0]_0 ;
  wire \stateRecv_reg[0]_1 ;
  wire [0:0]\stateRecv_reg[1]_0 ;
  wire [2:0]stateSend;
  wire \stateSend[0]_i_1_n_0 ;
  wire \stateSend[1]_i_1_n_0 ;
  wire \stateSend[2]_i_10_n_0 ;
  wire \stateSend[2]_i_11_n_0 ;
  wire \stateSend[2]_i_13_n_0 ;
  wire \stateSend[2]_i_14_n_0 ;
  wire \stateSend[2]_i_15_n_0 ;
  wire \stateSend[2]_i_16_n_0 ;
  wire \stateSend[2]_i_17_n_0 ;
  wire \stateSend[2]_i_18_n_0 ;
  wire \stateSend[2]_i_19_n_0 ;
  wire \stateSend[2]_i_1_n_0 ;
  wire \stateSend[2]_i_20_n_0 ;
  wire \stateSend[2]_i_21_n_0 ;
  wire \stateSend[2]_i_22_n_0 ;
  wire \stateSend[2]_i_23_n_0 ;
  wire \stateSend[2]_i_24_n_0 ;
  wire \stateSend[2]_i_25_n_0 ;
  wire \stateSend[2]_i_26_n_0 ;
  wire \stateSend[2]_i_27_n_0 ;
  wire \stateSend[2]_i_28_n_0 ;
  wire \stateSend[2]_i_29_n_0 ;
  wire \stateSend[2]_i_2_n_0 ;
  wire \stateSend[2]_i_30_n_0 ;
  wire \stateSend[2]_i_31_n_0 ;
  wire \stateSend[2]_i_32_n_0 ;
  wire \stateSend[2]_i_33_n_0 ;
  wire \stateSend[2]_i_34_n_0 ;
  wire \stateSend[2]_i_35_n_0 ;
  wire \stateSend[2]_i_36_n_0 ;
  wire \stateSend[2]_i_37_n_0 ;
  wire \stateSend[2]_i_38_n_0 ;
  wire \stateSend[2]_i_39_n_0 ;
  wire \stateSend[2]_i_3_n_0 ;
  wire \stateSend[2]_i_40_n_0 ;
  wire \stateSend[2]_i_41_n_0 ;
  wire \stateSend[2]_i_42_n_0 ;
  wire \stateSend[2]_i_43_n_0 ;
  wire \stateSend[2]_i_44_n_0 ;
  wire \stateSend[2]_i_45_n_0 ;
  wire \stateSend[2]_i_46_n_0 ;
  wire \stateSend[2]_i_47_n_0 ;
  wire \stateSend[2]_i_48_n_0 ;
  wire \stateSend[2]_i_4_n_0 ;
  wire \stateSend[2]_i_5_n_0 ;
  wire \stateSend[2]_i_6_n_0 ;
  wire \stateSend[2]_i_7_n_0 ;
  wire \stateSend[2]_i_9_n_0 ;
  wire [0:0]\stateSend_reg[2]_0 ;
  wire [0:0]\stateSend_reg[2]_1 ;
  wire \stateSend_reg[2]_i_12_n_0 ;
  wire \stateSend_reg[2]_i_12_n_1 ;
  wire \stateSend_reg[2]_i_12_n_2 ;
  wire \stateSend_reg[2]_i_12_n_3 ;
  wire \stateSend_reg[2]_i_12_n_4 ;
  wire \stateSend_reg[2]_i_12_n_5 ;
  wire \stateSend_reg[2]_i_12_n_6 ;
  wire \stateSend_reg[2]_i_12_n_7 ;
  wire \stateSend_reg[2]_i_8_n_6 ;
  wire \stateSend_reg[2]_i_8_n_7 ;
  wire [1:0]stateTo;
  wire \stateTo[0]_i_1_n_0 ;
  wire \stateTo[1]_i_1_n_0 ;
  wire \stateTo[1]_i_2_n_0 ;
  wire \stateTo[1]_i_4_n_0 ;
  wire \stateTo[1]_i_5_n_0 ;
  wire \stateTo[1]_i_6_n_0 ;
  wire strbRead;
  wire [2:0]\tixVBuffer_reg[1] ;
  wire [7:0]\tixVBuffer_reg[7] ;
  wire [7:0]\tixVBufxfop_reg[7] ;
  wire [5:0]\tixVCommand_reg[0] ;
  wire [5:0]\tixVCommand_reg[0]_0 ;
  wire [7:0]\tixVCommand_reg[7] ;
  wire \tixVController_reg[3] ;
  wire \tixVController_reg[3]_0 ;
  wire [7:0]\tixVController_reg[7] ;
  wire \tixVController_reg[7]_0 ;
  wire [7:0]\tixVController_reg[7]_1 ;
  wire \txAXIS_tdata_reg[0] ;
  wire \txAXIS_tdata_reg[0]_0 ;
  wire \txAXIS_tdata_reg[0]_1 ;
  wire \txAXIS_tdata_reg[13] ;
  wire \txAXIS_tdata_reg[16] ;
  wire \txAXIS_tdata_reg[16]_0 ;
  wire \txAXIS_tdata_reg[16]_1 ;
  wire \txAXIS_tdata_reg[16]_2 ;
  wire \txAXIS_tdata_reg[16]_3 ;
  wire \txAXIS_tdata_reg[16]_4 ;
  wire \txAXIS_tdata_reg[17] ;
  wire \txAXIS_tdata_reg[17]_0 ;
  wire \txAXIS_tdata_reg[17]_1 ;
  wire \txAXIS_tdata_reg[18] ;
  wire \txAXIS_tdata_reg[18]_0 ;
  wire \txAXIS_tdata_reg[18]_1 ;
  wire \txAXIS_tdata_reg[19] ;
  wire \txAXIS_tdata_reg[19]_0 ;
  wire \txAXIS_tdata_reg[19]_1 ;
  wire \txAXIS_tdata_reg[19]_2 ;
  wire \txAXIS_tdata_reg[20] ;
  wire \txAXIS_tdata_reg[20]_0 ;
  wire \txAXIS_tdata_reg[20]_1 ;
  wire \txAXIS_tdata_reg[21] ;
  wire \txAXIS_tdata_reg[21]_0 ;
  wire \txAXIS_tdata_reg[21]_1 ;
  wire \txAXIS_tdata_reg[22] ;
  wire \txAXIS_tdata_reg[22]_0 ;
  wire \txAXIS_tdata_reg[22]_1 ;
  wire [2:0]\txAXIS_tdata_reg[23] ;
  wire \txAXIS_tdata_reg[23]_0 ;
  wire \txAXIS_tdata_reg[23]_1 ;
  wire \txAXIS_tdata_reg[23]_2 ;
  wire \txAXIS_tdata_reg[24] ;
  wire \txAXIS_tdata_reg[24]_0 ;
  wire \txAXIS_tdata_reg[24]_1 ;
  wire \txAXIS_tdata_reg[24]_2 ;
  wire \txAXIS_tdata_reg[25] ;
  wire \txAXIS_tdata_reg[25]_0 ;
  wire \txAXIS_tdata_reg[25]_1 ;
  wire \txAXIS_tdata_reg[26] ;
  wire \txAXIS_tdata_reg[26]_0 ;
  wire \txAXIS_tdata_reg[26]_1 ;
  wire \txAXIS_tdata_reg[27] ;
  wire \txAXIS_tdata_reg[27]_0 ;
  wire \txAXIS_tdata_reg[27]_1 ;
  wire \txAXIS_tdata_reg[28] ;
  wire \txAXIS_tdata_reg[28]_0 ;
  wire \txAXIS_tdata_reg[28]_1 ;
  wire [5:0]\txAXIS_tdata_reg[29] ;
  wire \txAXIS_tdata_reg[29]_0 ;
  wire \txAXIS_tdata_reg[29]_1 ;
  wire \txAXIS_tdata_reg[29]_2 ;
  wire \txAXIS_tdata_reg[2] ;
  wire \txAXIS_tdata_reg[2]_0 ;
  wire \txAXIS_tdata_reg[2]_1 ;
  wire \txAXIS_tdata_reg[30] ;
  wire \txAXIS_tdata_reg[30]_0 ;
  wire \txAXIS_tdata_reg[30]_1 ;
  wire \txAXIS_tdata_reg[31] ;
  wire \txAXIS_tdata_reg[31]_0 ;
  wire \txAXIS_tdata_reg[31]_1 ;
  wire \txAXIS_tdata_reg[32] ;
  wire [2:0]\txAXIS_tdata_reg[32]_0 ;
  wire \txAXIS_tdata_reg[32]_1 ;
  wire \txAXIS_tdata_reg[32]_2 ;
  wire \txAXIS_tdata_reg[32]_3 ;
  wire \txAXIS_tdata_reg[33] ;
  wire \txAXIS_tdata_reg[33]_0 ;
  wire \txAXIS_tdata_reg[34] ;
  wire \txAXIS_tdata_reg[34]_0 ;
  wire \txAXIS_tdata_reg[35] ;
  wire \txAXIS_tdata_reg[35]_0 ;
  wire \txAXIS_tdata_reg[36] ;
  wire \txAXIS_tdata_reg[36]_0 ;
  wire \txAXIS_tdata_reg[37] ;
  wire \txAXIS_tdata_reg[37]_0 ;
  wire \txAXIS_tdata_reg[38] ;
  wire \txAXIS_tdata_reg[38]_0 ;
  wire \txAXIS_tdata_reg[39] ;
  wire \txAXIS_tdata_reg[39]_0 ;
  wire \txAXIS_tdata_reg[40] ;
  wire \txAXIS_tdata_reg[48] ;
  wire \txAXIS_tdata_reg[48]_0 ;
  wire \txAXIS_tdata_reg[48]_1 ;
  wire \txAXIS_tdata_reg[48]_2 ;
  wire \txAXIS_tdata_reg[48]_3 ;
  wire \txAXIS_tdata_reg[48]_4 ;
  wire \txAXIS_tdata_reg[48]_5 ;
  wire \txAXIS_tdata_reg[49] ;
  wire \txAXIS_tdata_reg[49]_0 ;
  wire \txAXIS_tdata_reg[49]_1 ;
  wire \txAXIS_tdata_reg[4] ;
  wire \txAXIS_tdata_reg[4]_0 ;
  wire \txAXIS_tdata_reg[4]_1 ;
  wire \txAXIS_tdata_reg[4]_2 ;
  wire \txAXIS_tdata_reg[50] ;
  wire \txAXIS_tdata_reg[50]_0 ;
  wire \txAXIS_tdata_reg[50]_1 ;
  wire \txAXIS_tdata_reg[51] ;
  wire \txAXIS_tdata_reg[51]_0 ;
  wire \txAXIS_tdata_reg[51]_1 ;
  wire \txAXIS_tdata_reg[52] ;
  wire \txAXIS_tdata_reg[52]_0 ;
  wire \txAXIS_tdata_reg[52]_1 ;
  wire \txAXIS_tdata_reg[53] ;
  wire \txAXIS_tdata_reg[53]_0 ;
  wire \txAXIS_tdata_reg[53]_1 ;
  wire \txAXIS_tdata_reg[54] ;
  wire \txAXIS_tdata_reg[54]_0 ;
  wire \txAXIS_tdata_reg[54]_1 ;
  wire \txAXIS_tdata_reg[55] ;
  wire \txAXIS_tdata_reg[55]_0 ;
  wire \txAXIS_tdata_reg[55]_1 ;
  wire \txAXIS_tdata_reg[56] ;
  wire \txAXIS_tdata_reg[56]_0 ;
  wire \txAXIS_tdata_reg[56]_1 ;
  wire \txAXIS_tdata_reg[56]_2 ;
  wire \txAXIS_tdata_reg[56]_3 ;
  wire \txAXIS_tdata_reg[56]_4 ;
  wire \txAXIS_tdata_reg[57] ;
  wire \txAXIS_tdata_reg[57]_0 ;
  wire \txAXIS_tdata_reg[57]_1 ;
  wire \txAXIS_tdata_reg[58] ;
  wire \txAXIS_tdata_reg[58]_0 ;
  wire \txAXIS_tdata_reg[59] ;
  wire \txAXIS_tdata_reg[59]_0 ;
  wire \txAXIS_tdata_reg[5] ;
  wire \txAXIS_tdata_reg[5]_0 ;
  wire \txAXIS_tdata_reg[5]_1 ;
  wire \txAXIS_tdata_reg[5]_2 ;
  wire \txAXIS_tdata_reg[5]_3 ;
  wire \txAXIS_tdata_reg[60] ;
  wire \txAXIS_tdata_reg[60]_0 ;
  wire \txAXIS_tdata_reg[60]_1 ;
  wire \txAXIS_tdata_reg[61] ;
  wire \txAXIS_tdata_reg[61]_0 ;
  wire \txAXIS_tdata_reg[61]_1 ;
  wire \txAXIS_tdata_reg[62] ;
  wire \txAXIS_tdata_reg[62]_0 ;
  wire \txAXIS_tdata_reg[63] ;
  wire \txAXIS_tdata_reg[63]_0 ;
  wire \txAXIS_tdata_reg[63]_1 ;
  wire \txAXIS_tdata_reg[6] ;
  wire \txAXIS_tdata_reg[6]_0 ;
  wire \txAXIS_tdata_reg[6]_1 ;
  wire \txAXIS_tdata_reg[7] ;
  wire \txAXIS_tdata_reg[7]_0 ;
  wire \txAXIS_tdata_reg[7]_1 ;
  wire \txAXIS_tdata_reg[8] ;
  wire \txAXIS_tdata_reg[8]_0 ;
  wire \txAXIS_tdata_reg[8]_1 ;
  wire txAXIS_tready;
  wire [29:0]txlast1;
  wire \txlen_reg[0] ;
  wire [0:0]vidtrackGetInfoPtr0Seqbuf;
  wire [0:0]vidtrackGetInfoTixVState;
  wire wdone_i_1__0_n_0;
  wire wdone_reg_n_0;
  wire wordcnt0;
  wire \wordcntCrcLast_reg[0] ;
  wire [7:0]\wordcntCrcLast_reg[16] ;
  wire \wordcntCrcLast_reg[1] ;
  wire \wordcntCrcLast_reg[24] ;
  wire [7:0]\wordcntCrcLast_reg[24]_0 ;
  wire \wordcntCrcLast_reg[2] ;
  wire \wordcntLast[2]_i_3_n_0 ;
  wire \wordcntLast_reg[0] ;
  wire \wordcntLast_reg[0]_0 ;
  wire \wordcntLast_reg[0]_1 ;
  wire \wordcntLast_reg[0]_2 ;
  wire \wordcntLast_reg[28] ;
  wire \wordcntLast_reg[28]_0 ;
  wire \wordcntLast_reg[28]_1 ;
  wire \wordcntLast_reg[3] ;
  wire \wordcnt[0]__0_i_1_n_0 ;
  wire \wordcnt[0]__0_i_4_n_0 ;
  wire \wordcnt[0]__0_i_5_n_0 ;
  wire \wordcnt[0]_i_1_n_0 ;
  wire \wordcnt[0]_i_2_n_0 ;
  wire \wordcnt[0]_i_4_n_0 ;
  wire \wordcnt[0]_i_6_n_0 ;
  wire \wordcnt[30]_i_3_n_0 ;
  wire \wordcnt[30]_i_4__0_n_0 ;
  wire \wordcnt[30]_i_5_n_0 ;
  wire [30:0]wordcnt_reg;
  wire [0:0]\wordcnt_reg[0]_0 ;
  wire \wordcnt_reg[0]_1 ;
  wire \wordcnt_reg[0]_2 ;
  wire \wordcnt_reg[0]_3 ;
  wire \wordcnt_reg[0]__0_i_3_n_0 ;
  wire \wordcnt_reg[0]__0_i_3_n_1 ;
  wire \wordcnt_reg[0]__0_i_3_n_10 ;
  wire \wordcnt_reg[0]__0_i_3_n_11 ;
  wire \wordcnt_reg[0]__0_i_3_n_12 ;
  wire \wordcnt_reg[0]__0_i_3_n_13 ;
  wire \wordcnt_reg[0]__0_i_3_n_14 ;
  wire \wordcnt_reg[0]__0_i_3_n_15 ;
  wire \wordcnt_reg[0]__0_i_3_n_2 ;
  wire \wordcnt_reg[0]__0_i_3_n_3 ;
  wire \wordcnt_reg[0]__0_i_3_n_4 ;
  wire \wordcnt_reg[0]__0_i_3_n_5 ;
  wire \wordcnt_reg[0]__0_i_3_n_6 ;
  wire \wordcnt_reg[0]__0_i_3_n_7 ;
  wire \wordcnt_reg[0]__0_i_3_n_8 ;
  wire \wordcnt_reg[0]__0_i_3_n_9 ;
  wire \wordcnt_reg[0]__0_n_0 ;
  wire \wordcnt_reg[0]_i_3_n_0 ;
  wire \wordcnt_reg[0]_i_3_n_1 ;
  wire \wordcnt_reg[0]_i_3_n_10 ;
  wire \wordcnt_reg[0]_i_3_n_11 ;
  wire \wordcnt_reg[0]_i_3_n_12 ;
  wire \wordcnt_reg[0]_i_3_n_13 ;
  wire \wordcnt_reg[0]_i_3_n_14 ;
  wire \wordcnt_reg[0]_i_3_n_15 ;
  wire \wordcnt_reg[0]_i_3_n_2 ;
  wire \wordcnt_reg[0]_i_3_n_3 ;
  wire \wordcnt_reg[0]_i_3_n_4 ;
  wire \wordcnt_reg[0]_i_3_n_5 ;
  wire \wordcnt_reg[0]_i_3_n_6 ;
  wire \wordcnt_reg[0]_i_3_n_7 ;
  wire \wordcnt_reg[0]_i_3_n_8 ;
  wire \wordcnt_reg[0]_i_3_n_9 ;
  wire \wordcnt_reg[10]__0_n_0 ;
  wire \wordcnt_reg[11]__0_n_0 ;
  wire \wordcnt_reg[12]__0_n_0 ;
  wire \wordcnt_reg[13]__0_n_0 ;
  wire \wordcnt_reg[14]__0_n_0 ;
  wire \wordcnt_reg[15]__0_n_0 ;
  wire \wordcnt_reg[16]__0_i_1_n_0 ;
  wire \wordcnt_reg[16]__0_i_1_n_1 ;
  wire \wordcnt_reg[16]__0_i_1_n_10 ;
  wire \wordcnt_reg[16]__0_i_1_n_11 ;
  wire \wordcnt_reg[16]__0_i_1_n_12 ;
  wire \wordcnt_reg[16]__0_i_1_n_13 ;
  wire \wordcnt_reg[16]__0_i_1_n_14 ;
  wire \wordcnt_reg[16]__0_i_1_n_15 ;
  wire \wordcnt_reg[16]__0_i_1_n_2 ;
  wire \wordcnt_reg[16]__0_i_1_n_3 ;
  wire \wordcnt_reg[16]__0_i_1_n_4 ;
  wire \wordcnt_reg[16]__0_i_1_n_5 ;
  wire \wordcnt_reg[16]__0_i_1_n_6 ;
  wire \wordcnt_reg[16]__0_i_1_n_7 ;
  wire \wordcnt_reg[16]__0_i_1_n_8 ;
  wire \wordcnt_reg[16]__0_i_1_n_9 ;
  wire \wordcnt_reg[16]__0_n_0 ;
  wire \wordcnt_reg[16]_i_1_n_0 ;
  wire \wordcnt_reg[16]_i_1_n_1 ;
  wire \wordcnt_reg[16]_i_1_n_10 ;
  wire \wordcnt_reg[16]_i_1_n_11 ;
  wire \wordcnt_reg[16]_i_1_n_12 ;
  wire \wordcnt_reg[16]_i_1_n_13 ;
  wire \wordcnt_reg[16]_i_1_n_14 ;
  wire \wordcnt_reg[16]_i_1_n_15 ;
  wire \wordcnt_reg[16]_i_1_n_2 ;
  wire \wordcnt_reg[16]_i_1_n_3 ;
  wire \wordcnt_reg[16]_i_1_n_4 ;
  wire \wordcnt_reg[16]_i_1_n_5 ;
  wire \wordcnt_reg[16]_i_1_n_6 ;
  wire \wordcnt_reg[16]_i_1_n_7 ;
  wire \wordcnt_reg[16]_i_1_n_8 ;
  wire \wordcnt_reg[16]_i_1_n_9 ;
  wire \wordcnt_reg[17]__0_n_0 ;
  wire \wordcnt_reg[18]__0_n_0 ;
  wire \wordcnt_reg[19]__0_n_0 ;
  wire \wordcnt_reg[1]_0 ;
  wire \wordcnt_reg[1]__0_n_0 ;
  wire \wordcnt_reg[20]__0_n_0 ;
  wire \wordcnt_reg[21]__0_n_0 ;
  wire \wordcnt_reg[22]__0_n_0 ;
  wire \wordcnt_reg[23]__0_n_0 ;
  wire \wordcnt_reg[24]__0_i_1_n_10 ;
  wire \wordcnt_reg[24]__0_i_1_n_11 ;
  wire \wordcnt_reg[24]__0_i_1_n_12 ;
  wire \wordcnt_reg[24]__0_i_1_n_13 ;
  wire \wordcnt_reg[24]__0_i_1_n_14 ;
  wire \wordcnt_reg[24]__0_i_1_n_15 ;
  wire \wordcnt_reg[24]__0_i_1_n_2 ;
  wire \wordcnt_reg[24]__0_i_1_n_3 ;
  wire \wordcnt_reg[24]__0_i_1_n_4 ;
  wire \wordcnt_reg[24]__0_i_1_n_5 ;
  wire \wordcnt_reg[24]__0_i_1_n_6 ;
  wire \wordcnt_reg[24]__0_i_1_n_7 ;
  wire \wordcnt_reg[24]__0_i_1_n_9 ;
  wire \wordcnt_reg[24]__0_n_0 ;
  wire \wordcnt_reg[24]_i_1_n_10 ;
  wire \wordcnt_reg[24]_i_1_n_11 ;
  wire \wordcnt_reg[24]_i_1_n_12 ;
  wire \wordcnt_reg[24]_i_1_n_13 ;
  wire \wordcnt_reg[24]_i_1_n_14 ;
  wire \wordcnt_reg[24]_i_1_n_15 ;
  wire \wordcnt_reg[24]_i_1_n_2 ;
  wire \wordcnt_reg[24]_i_1_n_3 ;
  wire \wordcnt_reg[24]_i_1_n_4 ;
  wire \wordcnt_reg[24]_i_1_n_5 ;
  wire \wordcnt_reg[24]_i_1_n_6 ;
  wire \wordcnt_reg[24]_i_1_n_7 ;
  wire \wordcnt_reg[24]_i_1_n_9 ;
  wire \wordcnt_reg[25]__0_n_0 ;
  wire \wordcnt_reg[26]__0_n_0 ;
  wire \wordcnt_reg[27]__0_n_0 ;
  wire \wordcnt_reg[28]__0_n_0 ;
  wire \wordcnt_reg[29]__0_n_0 ;
  wire \wordcnt_reg[2]__0_n_0 ;
  wire \wordcnt_reg[30]__0_n_0 ;
  wire \wordcnt_reg[3]__0_n_0 ;
  wire \wordcnt_reg[4]__0_n_0 ;
  wire \wordcnt_reg[5]__0_n_0 ;
  wire \wordcnt_reg[6]__0_n_0 ;
  wire \wordcnt_reg[7]__0_n_0 ;
  wire \wordcnt_reg[8]__0_i_1_n_0 ;
  wire \wordcnt_reg[8]__0_i_1_n_1 ;
  wire \wordcnt_reg[8]__0_i_1_n_10 ;
  wire \wordcnt_reg[8]__0_i_1_n_11 ;
  wire \wordcnt_reg[8]__0_i_1_n_12 ;
  wire \wordcnt_reg[8]__0_i_1_n_13 ;
  wire \wordcnt_reg[8]__0_i_1_n_14 ;
  wire \wordcnt_reg[8]__0_i_1_n_15 ;
  wire \wordcnt_reg[8]__0_i_1_n_2 ;
  wire \wordcnt_reg[8]__0_i_1_n_3 ;
  wire \wordcnt_reg[8]__0_i_1_n_4 ;
  wire \wordcnt_reg[8]__0_i_1_n_5 ;
  wire \wordcnt_reg[8]__0_i_1_n_6 ;
  wire \wordcnt_reg[8]__0_i_1_n_7 ;
  wire \wordcnt_reg[8]__0_i_1_n_8 ;
  wire \wordcnt_reg[8]__0_i_1_n_9 ;
  wire \wordcnt_reg[8]__0_n_0 ;
  wire \wordcnt_reg[8]_i_1_n_0 ;
  wire \wordcnt_reg[8]_i_1_n_1 ;
  wire \wordcnt_reg[8]_i_1_n_10 ;
  wire \wordcnt_reg[8]_i_1_n_11 ;
  wire \wordcnt_reg[8]_i_1_n_12 ;
  wire \wordcnt_reg[8]_i_1_n_13 ;
  wire \wordcnt_reg[8]_i_1_n_14 ;
  wire \wordcnt_reg[8]_i_1_n_15 ;
  wire \wordcnt_reg[8]_i_1_n_2 ;
  wire \wordcnt_reg[8]_i_1_n_3 ;
  wire \wordcnt_reg[8]_i_1_n_4 ;
  wire \wordcnt_reg[8]_i_1_n_5 ;
  wire \wordcnt_reg[8]_i_1_n_6 ;
  wire \wordcnt_reg[8]_i_1_n_7 ;
  wire \wordcnt_reg[8]_i_1_n_8 ;
  wire \wordcnt_reg[8]_i_1_n_9 ;
  wire \wordcnt_reg[9]__0_n_0 ;
  wire [7:3]NLW_recvAXIS_tlast_sig_reg_i_2_CO_UNCONNECTED;
  wire [7:0]NLW_recvAXIS_tlast_sig_reg_i_2_O_UNCONNECTED;
  wire [7:0]NLW_recvAXIS_tlast_sig_reg_i_3_O_UNCONNECTED;
  wire [7:0]\NLW_stateSend_reg[2]_i_12_O_UNCONNECTED ;
  wire [7:3]\NLW_stateSend_reg[2]_i_8_CO_UNCONNECTED ;
  wire [7:0]\NLW_stateSend_reg[2]_i_8_O_UNCONNECTED ;
  wire [7:6]\NLW_wordcnt_reg[24]__0_i_1_CO_UNCONNECTED ;
  wire [7:7]\NLW_wordcnt_reg[24]__0_i_1_O_UNCONNECTED ;
  wire [7:6]\NLW_wordcnt_reg[24]_i_1_CO_UNCONNECTED ;
  wire [7:7]\NLW_wordcnt_reg[24]_i_1_O_UNCONNECTED ;

  FDRE \AXIL_araddr_sig_reg[4] 
       (.C(aclk_sig),
        .CE(AXIL_arready_sig0),
        .D(apuAXIL_araddr[0]),
        .Q(AXIL_araddr_sig[4]),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_araddr_sig_reg[5] 
       (.C(aclk_sig),
        .CE(AXIL_arready_sig0),
        .D(apuAXIL_araddr[1]),
        .Q(AXIL_araddr_sig[5]),
        .R(AXIL_rvalid_sig_reg_0));
  LUT3 #(
    .INIT(8'h04)) 
    AXIL_arready_sig_i_1
       (.I0(apuAXIL_rvalid),
        .I1(apuAXIL_arvalid),
        .I2(AXIL_arready),
        .O(AXIL_arready_sig0));
  FDRE AXIL_arready_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(AXIL_arready_sig0),
        .Q(AXIL_arready),
        .R(AXIL_rvalid_sig_reg_0));
  LUT3 #(
    .INIT(8'h02)) 
    \AXIL_awaddr_sig[5]_i_1 
       (.I0(apuAXIL_awvalid),
        .I1(awdone_reg_n_0),
        .I2(AXIL_awready_sig_reg_0),
        .O(AXIL_awready_sig0));
  FDRE \AXIL_awaddr_sig_reg[4] 
       (.C(aclk_sig),
        .CE(AXIL_awready_sig0),
        .D(apuAXIL_awaddr[0]),
        .Q(ixBlkWrite[0]),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_awaddr_sig_reg[5] 
       (.C(aclk_sig),
        .CE(AXIL_awready_sig0),
        .D(apuAXIL_awaddr[1]),
        .Q(ixBlkWrite[1]),
        .R(AXIL_rvalid_sig_reg_0));
  LUT3 #(
    .INIT(8'h10)) 
    AXIL_awready_sig_i_1
       (.I0(AXIL_awready_sig_reg_0),
        .I1(awdone_reg_n_0),
        .I2(apuAXIL_awvalid),
        .O(AXIL_awready_sig_i_1_n_0));
  FDRE AXIL_awready_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(AXIL_awready_sig_i_1_n_0),
        .Q(AXIL_awready_sig_reg_0),
        .R(AXIL_rvalid_sig_reg_0));
  LUT6 #(
    .INIT(64'h111FFFFFEEE0EEE0)) 
    AXIL_bvalid_sig_i_1
       (.I0(AXIL_wready_sig_reg_0),
        .I1(wdone_reg_n_0),
        .I2(awdone_reg_n_0),
        .I3(AXIL_awready_sig_reg_0),
        .I4(apuAXIL_bready),
        .I5(AXIL_bvalid_sig_reg_0),
        .O(AXIL_bvalid_sig_i_1_n_0));
  FDRE AXIL_bvalid_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(AXIL_bvalid_sig_i_1_n_0),
        .Q(AXIL_bvalid_sig_reg_0),
        .R(AXIL_rvalid_sig_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair2133" *) 
  LUT4 #(
    .INIT(16'h88F8)) 
    AXIL_rvalid_sig_i_1
       (.I0(AXIL_arready),
        .I1(apuAXIL_arvalid),
        .I2(apuAXIL_rvalid),
        .I3(apuAXIL_rready),
        .O(AXIL_rvalid_sig_i_1_n_0));
  FDRE AXIL_rvalid_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(AXIL_rvalid_sig_i_1_n_0),
        .Q(apuAXIL_rvalid),
        .R(AXIL_rvalid_sig_reg_0));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[15]_i_1 
       (.I0(apuAXIL_wstrb[1]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(apuAXIL_wvalid),
        .O(\AXIL_wdata_sig[15]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[23]_i_1 
       (.I0(apuAXIL_wstrb[2]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(apuAXIL_wvalid),
        .O(\AXIL_wdata_sig[23]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[31]_i_1 
       (.I0(apuAXIL_wstrb[3]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(apuAXIL_wvalid),
        .O(\AXIL_wdata_sig[31]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[39]_i_1 
       (.I0(apuAXIL_wstrb[4]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(apuAXIL_wvalid),
        .O(\AXIL_wdata_sig[39]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[47]_i_1 
       (.I0(apuAXIL_wstrb[5]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(apuAXIL_wvalid),
        .O(\AXIL_wdata_sig[47]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[55]_i_1 
       (.I0(apuAXIL_wstrb[6]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(apuAXIL_wvalid),
        .O(\AXIL_wdata_sig[55]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[63]_i_1 
       (.I0(apuAXIL_wstrb[7]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(apuAXIL_wvalid),
        .O(\AXIL_wdata_sig[63]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[7]_i_1 
       (.I0(apuAXIL_wstrb[0]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(apuAXIL_wvalid),
        .O(\AXIL_wdata_sig[7]_i_1_n_0 ));
  FDRE \AXIL_wdata_sig_reg[0] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1_n_0 ),
        .D(apuAXIL_wdata[0]),
        .Q(\AXIL_wdata_sig_reg_n_0_[0] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[10] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1_n_0 ),
        .D(apuAXIL_wdata[10]),
        .Q(\AXIL_wdata_sig_reg_n_0_[10] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[11] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1_n_0 ),
        .D(apuAXIL_wdata[11]),
        .Q(\AXIL_wdata_sig_reg_n_0_[11] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[12] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1_n_0 ),
        .D(apuAXIL_wdata[12]),
        .Q(\AXIL_wdata_sig_reg_n_0_[12] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[13] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1_n_0 ),
        .D(apuAXIL_wdata[13]),
        .Q(\AXIL_wdata_sig_reg_n_0_[13] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[14] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1_n_0 ),
        .D(apuAXIL_wdata[14]),
        .Q(\AXIL_wdata_sig_reg_n_0_[14] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[15] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1_n_0 ),
        .D(apuAXIL_wdata[15]),
        .Q(\AXIL_wdata_sig_reg_n_0_[15] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[16] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1_n_0 ),
        .D(apuAXIL_wdata[16]),
        .Q(\AXIL_wdata_sig_reg_n_0_[16] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[17] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1_n_0 ),
        .D(apuAXIL_wdata[17]),
        .Q(\AXIL_wdata_sig_reg_n_0_[17] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[18] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1_n_0 ),
        .D(apuAXIL_wdata[18]),
        .Q(\AXIL_wdata_sig_reg_n_0_[18] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[19] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1_n_0 ),
        .D(apuAXIL_wdata[19]),
        .Q(\AXIL_wdata_sig_reg_n_0_[19] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[1] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1_n_0 ),
        .D(apuAXIL_wdata[1]),
        .Q(\AXIL_wdata_sig_reg_n_0_[1] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[20] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1_n_0 ),
        .D(apuAXIL_wdata[20]),
        .Q(\AXIL_wdata_sig_reg_n_0_[20] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[21] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1_n_0 ),
        .D(apuAXIL_wdata[21]),
        .Q(\AXIL_wdata_sig_reg_n_0_[21] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[22] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1_n_0 ),
        .D(apuAXIL_wdata[22]),
        .Q(\AXIL_wdata_sig_reg_n_0_[22] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[23] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1_n_0 ),
        .D(apuAXIL_wdata[23]),
        .Q(\AXIL_wdata_sig_reg_n_0_[23] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[24] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1_n_0 ),
        .D(apuAXIL_wdata[24]),
        .Q(\AXIL_wdata_sig_reg_n_0_[24] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[25] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1_n_0 ),
        .D(apuAXIL_wdata[25]),
        .Q(\AXIL_wdata_sig_reg_n_0_[25] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[26] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1_n_0 ),
        .D(apuAXIL_wdata[26]),
        .Q(\AXIL_wdata_sig_reg_n_0_[26] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[27] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1_n_0 ),
        .D(apuAXIL_wdata[27]),
        .Q(\AXIL_wdata_sig_reg_n_0_[27] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[28] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1_n_0 ),
        .D(apuAXIL_wdata[28]),
        .Q(\AXIL_wdata_sig_reg_n_0_[28] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[29] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1_n_0 ),
        .D(apuAXIL_wdata[29]),
        .Q(\AXIL_wdata_sig_reg_n_0_[29] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[2] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1_n_0 ),
        .D(apuAXIL_wdata[2]),
        .Q(p_0_in[0]),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[30] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1_n_0 ),
        .D(apuAXIL_wdata[30]),
        .Q(\AXIL_wdata_sig_reg_n_0_[30] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[31] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1_n_0 ),
        .D(apuAXIL_wdata[31]),
        .Q(\AXIL_wdata_sig_reg_n_0_[31] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[32] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[39]_i_1_n_0 ),
        .D(apuAXIL_wdata[32]),
        .Q(\AXIL_wdata_sig_reg_n_0_[32] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[33] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[39]_i_1_n_0 ),
        .D(apuAXIL_wdata[33]),
        .Q(\AXIL_wdata_sig_reg_n_0_[33] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[34] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[39]_i_1_n_0 ),
        .D(apuAXIL_wdata[34]),
        .Q(\AXIL_wdata_sig_reg_n_0_[34] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[35] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[39]_i_1_n_0 ),
        .D(apuAXIL_wdata[35]),
        .Q(\AXIL_wdata_sig_reg_n_0_[35] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[36] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[39]_i_1_n_0 ),
        .D(apuAXIL_wdata[36]),
        .Q(\AXIL_wdata_sig_reg_n_0_[36] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[37] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[39]_i_1_n_0 ),
        .D(apuAXIL_wdata[37]),
        .Q(\AXIL_wdata_sig_reg_n_0_[37] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[38] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[39]_i_1_n_0 ),
        .D(apuAXIL_wdata[38]),
        .Q(\AXIL_wdata_sig_reg_n_0_[38] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[39] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[39]_i_1_n_0 ),
        .D(apuAXIL_wdata[39]),
        .Q(\AXIL_wdata_sig_reg_n_0_[39] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[3] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1_n_0 ),
        .D(apuAXIL_wdata[3]),
        .Q(p_0_in[1]),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[40] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[47]_i_1_n_0 ),
        .D(apuAXIL_wdata[40]),
        .Q(\AXIL_wdata_sig_reg_n_0_[40] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[41] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[47]_i_1_n_0 ),
        .D(apuAXIL_wdata[41]),
        .Q(\AXIL_wdata_sig_reg_n_0_[41] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[42] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[47]_i_1_n_0 ),
        .D(apuAXIL_wdata[42]),
        .Q(\AXIL_wdata_sig_reg_n_0_[42] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[43] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[47]_i_1_n_0 ),
        .D(apuAXIL_wdata[43]),
        .Q(\AXIL_wdata_sig_reg_n_0_[43] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[44] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[47]_i_1_n_0 ),
        .D(apuAXIL_wdata[44]),
        .Q(\AXIL_wdata_sig_reg_n_0_[44] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[45] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[47]_i_1_n_0 ),
        .D(apuAXIL_wdata[45]),
        .Q(\AXIL_wdata_sig_reg_n_0_[45] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[46] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[47]_i_1_n_0 ),
        .D(apuAXIL_wdata[46]),
        .Q(\AXIL_wdata_sig_reg_n_0_[46] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[47] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[47]_i_1_n_0 ),
        .D(apuAXIL_wdata[47]),
        .Q(\AXIL_wdata_sig_reg_n_0_[47] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[48] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[55]_i_1_n_0 ),
        .D(apuAXIL_wdata[48]),
        .Q(\AXIL_wdata_sig_reg_n_0_[48] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[49] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[55]_i_1_n_0 ),
        .D(apuAXIL_wdata[49]),
        .Q(\AXIL_wdata_sig_reg_n_0_[49] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[4] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1_n_0 ),
        .D(apuAXIL_wdata[4]),
        .Q(\AXIL_wdata_sig_reg_n_0_[4] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[50] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[55]_i_1_n_0 ),
        .D(apuAXIL_wdata[50]),
        .Q(\AXIL_wdata_sig_reg_n_0_[50] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[51] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[55]_i_1_n_0 ),
        .D(apuAXIL_wdata[51]),
        .Q(\AXIL_wdata_sig_reg_n_0_[51] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[52] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[55]_i_1_n_0 ),
        .D(apuAXIL_wdata[52]),
        .Q(\AXIL_wdata_sig_reg_n_0_[52] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[53] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[55]_i_1_n_0 ),
        .D(apuAXIL_wdata[53]),
        .Q(\AXIL_wdata_sig_reg_n_0_[53] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[54] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[55]_i_1_n_0 ),
        .D(apuAXIL_wdata[54]),
        .Q(\AXIL_wdata_sig_reg_n_0_[54] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[55] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[55]_i_1_n_0 ),
        .D(apuAXIL_wdata[55]),
        .Q(\AXIL_wdata_sig_reg_n_0_[55] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[56] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[63]_i_1_n_0 ),
        .D(apuAXIL_wdata[56]),
        .Q(\AXIL_wdata_sig_reg_n_0_[56] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[57] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[63]_i_1_n_0 ),
        .D(apuAXIL_wdata[57]),
        .Q(\AXIL_wdata_sig_reg_n_0_[57] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[58] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[63]_i_1_n_0 ),
        .D(apuAXIL_wdata[58]),
        .Q(\AXIL_wdata_sig_reg_n_0_[58] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[59] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[63]_i_1_n_0 ),
        .D(apuAXIL_wdata[59]),
        .Q(\AXIL_wdata_sig_reg_n_0_[59] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[5] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1_n_0 ),
        .D(apuAXIL_wdata[5]),
        .Q(\AXIL_wdata_sig_reg_n_0_[5] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[60] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[63]_i_1_n_0 ),
        .D(apuAXIL_wdata[60]),
        .Q(\AXIL_wdata_sig_reg_n_0_[60] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[61] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[63]_i_1_n_0 ),
        .D(apuAXIL_wdata[61]),
        .Q(\AXIL_wdata_sig_reg_n_0_[61] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[62] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[63]_i_1_n_0 ),
        .D(apuAXIL_wdata[62]),
        .Q(\AXIL_wdata_sig_reg_n_0_[62] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[63] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[63]_i_1_n_0 ),
        .D(apuAXIL_wdata[63]),
        .Q(\AXIL_wdata_sig_reg_n_0_[63] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[6] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1_n_0 ),
        .D(apuAXIL_wdata[6]),
        .Q(\AXIL_wdata_sig_reg_n_0_[6] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[7] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1_n_0 ),
        .D(apuAXIL_wdata[7]),
        .Q(\AXIL_wdata_sig_reg_n_0_[7] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[8] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1_n_0 ),
        .D(apuAXIL_wdata[8]),
        .Q(\AXIL_wdata_sig_reg_n_0_[8] ),
        .R(AXIL_rvalid_sig_reg_0));
  FDRE \AXIL_wdata_sig_reg[9] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1_n_0 ),
        .D(apuAXIL_wdata[9]),
        .Q(\AXIL_wdata_sig_reg_n_0_[9] ),
        .R(AXIL_rvalid_sig_reg_0));
  LUT3 #(
    .INIT(8'h10)) 
    AXIL_wready_sig_i_1
       (.I0(wdone_reg_n_0),
        .I1(AXIL_wready_sig_reg_0),
        .I2(apuAXIL_wvalid),
        .O(AXIL_wready_sig_i_1_n_0));
  FDRE AXIL_wready_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(AXIL_wready_sig_i_1_n_0),
        .Q(AXIL_wready_sig_reg_0),
        .R(AXIL_rvalid_sig_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair2186" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[0]_INST_0 
       (.I0(sendAXIL_rdata[0]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[0]));
  (* SOFT_HLUTNM = "soft_lutpair2188" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[10]_INST_0 
       (.I0(sendAXIL_rdata[10]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[10]));
  (* SOFT_HLUTNM = "soft_lutpair2183" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[11]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[11]),
        .O(apuAXIL_rdata[11]));
  (* SOFT_HLUTNM = "soft_lutpair2189" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[12]_INST_0 
       (.I0(sendAXIL_rdata[12]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[12]));
  (* SOFT_HLUTNM = "soft_lutpair2182" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[13]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[13]),
        .O(apuAXIL_rdata[13]));
  (* SOFT_HLUTNM = "soft_lutpair2189" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[14]_INST_0 
       (.I0(sendAXIL_rdata[14]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[14]));
  (* SOFT_HLUTNM = "soft_lutpair2182" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[15]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[15]),
        .O(apuAXIL_rdata[15]));
  (* SOFT_HLUTNM = "soft_lutpair2190" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[16]_INST_0 
       (.I0(sendAXIL_rdata[16]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[16]));
  (* SOFT_HLUTNM = "soft_lutpair2181" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[17]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[17]),
        .O(apuAXIL_rdata[17]));
  (* SOFT_HLUTNM = "soft_lutpair2190" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[18]_INST_0 
       (.I0(sendAXIL_rdata[18]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[18]));
  (* SOFT_HLUTNM = "soft_lutpair2181" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[19]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[19]),
        .O(apuAXIL_rdata[19]));
  (* SOFT_HLUTNM = "soft_lutpair2185" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[1]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[1]),
        .O(apuAXIL_rdata[1]));
  (* SOFT_HLUTNM = "soft_lutpair2191" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[20]_INST_0 
       (.I0(sendAXIL_rdata[20]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[20]));
  (* SOFT_HLUTNM = "soft_lutpair2180" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[21]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[21]),
        .O(apuAXIL_rdata[21]));
  (* SOFT_HLUTNM = "soft_lutpair2191" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[22]_INST_0 
       (.I0(sendAXIL_rdata[22]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[22]));
  (* SOFT_HLUTNM = "soft_lutpair2180" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[23]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[23]),
        .O(apuAXIL_rdata[23]));
  (* SOFT_HLUTNM = "soft_lutpair2192" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[24]_INST_0 
       (.I0(sendAXIL_rdata[24]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[24]));
  (* SOFT_HLUTNM = "soft_lutpair2179" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[25]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[25]),
        .O(apuAXIL_rdata[25]));
  (* SOFT_HLUTNM = "soft_lutpair2192" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[26]_INST_0 
       (.I0(sendAXIL_rdata[26]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[26]));
  (* SOFT_HLUTNM = "soft_lutpair2179" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[27]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[27]),
        .O(apuAXIL_rdata[27]));
  (* SOFT_HLUTNM = "soft_lutpair2193" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[28]_INST_0 
       (.I0(sendAXIL_rdata[28]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[28]));
  (* SOFT_HLUTNM = "soft_lutpair2178" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[29]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[29]),
        .O(apuAXIL_rdata[29]));
  (* SOFT_HLUTNM = "soft_lutpair2186" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[2]_INST_0 
       (.I0(sendAXIL_rdata[2]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[2]));
  (* SOFT_HLUTNM = "soft_lutpair2193" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[30]_INST_0 
       (.I0(sendAXIL_rdata[30]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[30]));
  (* SOFT_HLUTNM = "soft_lutpair2178" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[31]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[31]),
        .O(apuAXIL_rdata[31]));
  (* SOFT_HLUTNM = "soft_lutpair2194" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[32]_INST_0 
       (.I0(sendAXIL_rdata[32]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[32]));
  (* SOFT_HLUTNM = "soft_lutpair2177" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[33]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[33]),
        .O(apuAXIL_rdata[33]));
  (* SOFT_HLUTNM = "soft_lutpair2194" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[34]_INST_0 
       (.I0(sendAXIL_rdata[34]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[34]));
  (* SOFT_HLUTNM = "soft_lutpair2177" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[35]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[35]),
        .O(apuAXIL_rdata[35]));
  (* SOFT_HLUTNM = "soft_lutpair2195" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[36]_INST_0 
       (.I0(sendAXIL_rdata[36]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[36]));
  (* SOFT_HLUTNM = "soft_lutpair2176" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[37]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[37]),
        .O(apuAXIL_rdata[37]));
  (* SOFT_HLUTNM = "soft_lutpair2195" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[38]_INST_0 
       (.I0(sendAXIL_rdata[38]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[38]));
  (* SOFT_HLUTNM = "soft_lutpair2176" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[39]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[39]),
        .O(apuAXIL_rdata[39]));
  (* SOFT_HLUTNM = "soft_lutpair2185" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[3]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[3]),
        .O(apuAXIL_rdata[3]));
  (* SOFT_HLUTNM = "soft_lutpair2196" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[40]_INST_0 
       (.I0(sendAXIL_rdata[40]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[40]));
  (* SOFT_HLUTNM = "soft_lutpair2175" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[41]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[41]),
        .O(apuAXIL_rdata[41]));
  (* SOFT_HLUTNM = "soft_lutpair2196" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[42]_INST_0 
       (.I0(sendAXIL_rdata[42]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[42]));
  (* SOFT_HLUTNM = "soft_lutpair2175" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[43]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[43]),
        .O(apuAXIL_rdata[43]));
  (* SOFT_HLUTNM = "soft_lutpair2197" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[44]_INST_0 
       (.I0(sendAXIL_rdata[44]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[44]));
  (* SOFT_HLUTNM = "soft_lutpair2174" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[45]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[45]),
        .O(apuAXIL_rdata[45]));
  (* SOFT_HLUTNM = "soft_lutpair2197" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[46]_INST_0 
       (.I0(sendAXIL_rdata[46]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[46]));
  (* SOFT_HLUTNM = "soft_lutpair2174" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[47]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[47]),
        .O(apuAXIL_rdata[47]));
  (* SOFT_HLUTNM = "soft_lutpair2198" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[48]_INST_0 
       (.I0(sendAXIL_rdata[48]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[48]));
  (* SOFT_HLUTNM = "soft_lutpair2173" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[49]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[49]),
        .O(apuAXIL_rdata[49]));
  (* SOFT_HLUTNM = "soft_lutpair2187" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[4]_INST_0 
       (.I0(sendAXIL_rdata[4]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[4]));
  (* SOFT_HLUTNM = "soft_lutpair2198" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[50]_INST_0 
       (.I0(sendAXIL_rdata[50]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[50]));
  (* SOFT_HLUTNM = "soft_lutpair2173" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[51]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[51]),
        .O(apuAXIL_rdata[51]));
  (* SOFT_HLUTNM = "soft_lutpair2199" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[52]_INST_0 
       (.I0(sendAXIL_rdata[52]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[52]));
  (* SOFT_HLUTNM = "soft_lutpair2172" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[53]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[53]),
        .O(apuAXIL_rdata[53]));
  (* SOFT_HLUTNM = "soft_lutpair2199" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[54]_INST_0 
       (.I0(sendAXIL_rdata[54]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[54]));
  (* SOFT_HLUTNM = "soft_lutpair2172" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[55]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[55]),
        .O(apuAXIL_rdata[55]));
  (* SOFT_HLUTNM = "soft_lutpair2200" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[56]_INST_0 
       (.I0(sendAXIL_rdata[56]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[56]));
  (* SOFT_HLUTNM = "soft_lutpair2171" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[57]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[57]),
        .O(apuAXIL_rdata[57]));
  (* SOFT_HLUTNM = "soft_lutpair2200" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[58]_INST_0 
       (.I0(sendAXIL_rdata[58]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[58]));
  (* SOFT_HLUTNM = "soft_lutpair2171" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[59]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[59]),
        .O(apuAXIL_rdata[59]));
  (* SOFT_HLUTNM = "soft_lutpair2184" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[5]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[5]),
        .O(apuAXIL_rdata[5]));
  (* SOFT_HLUTNM = "soft_lutpair2201" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[60]_INST_0 
       (.I0(sendAXIL_rdata[60]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[60]));
  (* SOFT_HLUTNM = "soft_lutpair2170" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[61]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[61]),
        .O(apuAXIL_rdata[61]));
  (* SOFT_HLUTNM = "soft_lutpair2201" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[62]_INST_0 
       (.I0(sendAXIL_rdata[62]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[62]));
  (* SOFT_HLUTNM = "soft_lutpair2170" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[63]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[63]),
        .O(apuAXIL_rdata[63]));
  LUT6 #(
    .INIT(64'hFFE0FB03FFC8F64F)) 
    \apuAXIL_rdata[63]_INST_0_i_1 
       (.I0(Q[0]),
        .I1(Q[2]),
        .I2(Q[4]),
        .I3(Q[5]),
        .I4(Q[3]),
        .I5(Q[1]),
        .O(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2187" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[6]_INST_0 
       (.I0(sendAXIL_rdata[6]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[6]));
  (* SOFT_HLUTNM = "soft_lutpair2184" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[7]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[7]),
        .O(apuAXIL_rdata[7]));
  (* SOFT_HLUTNM = "soft_lutpair2188" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \apuAXIL_rdata[8]_INST_0 
       (.I0(sendAXIL_rdata[8]),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(apuAXIL_rdata[8]));
  (* SOFT_HLUTNM = "soft_lutpair2183" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \apuAXIL_rdata[9]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[63] ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[9]),
        .O(apuAXIL_rdata[9]));
  LUT6 #(
    .INIT(64'h777F777F777F0000)) 
    awdone_i_1__0
       (.I0(AXIL_bvalid_sig_reg_0),
        .I1(apuAXIL_bready),
        .I2(wdone_reg_n_0),
        .I3(AXIL_wready_sig_reg_0),
        .I4(awdone_reg_n_0),
        .I5(AXIL_awready_sig_reg_0),
        .O(awdone_i_1__0_n_0));
  FDRE awdone_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(awdone_i_1__0_n_0),
        .Q(awdone_reg_n_0),
        .R(AXIL_rvalid_sig_reg_0));
  LUT6 #(
    .INIT(64'hF8F088F008008800)) 
    commok_sig_i_1
       (.I0(\stateRecv_reg[0]_0 ),
        .I1(commok_sig_reg_0),
        .I2(\stateOp[0]_i_2_n_0 ),
        .I3(\stateOp_reg[4]_4 ),
        .I4(commok_sig_reg_2),
        .I5(commok_sig_reg_3),
        .O(commok_sig_reg));
  LUT6 #(
    .INIT(64'h7555FFFF77777777)) 
    \crcAXIS_tkeep[0]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\crcAXIS_tkeep_reg[7]_2 ),
        .I2(crcAXIS_tlast_sig_reg_0),
        .I3(\crcAXIS_tkeep_reg[3] ),
        .I4(\crcAXIS_tkeep_reg[0]_0 ),
        .I5(\crcAXIS_tkeep_reg[3]_0 ),
        .O(\lastAXIS_tkeep_reg[7] [0]));
  LUT6 #(
    .INIT(64'hBFB3B3B3BFBFBFBF)) 
    \crcAXIS_tkeep[1]_i_1 
       (.I0(\crcAXIS_tkeep_reg[7]_1 [0]),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\crcAXIS_tkeep_reg[7]_2 ),
        .I3(crcAXIS_tlast_sig_reg_0),
        .I4(\crcAXIS_tkeep_reg[3] ),
        .I5(\crcAXIS_tkeep_reg[3]_0 ),
        .O(\lastAXIS_tkeep_reg[7] [1]));
  LUT6 #(
    .INIT(64'hFFFFFFFFFF0D0D0D)) 
    \crcAXIS_tkeep[2]_i_1 
       (.I0(\crcAXIS_tkeep_reg[3] ),
        .I1(\stateOp_next_reg[5] ),
        .I2(\crcAXIS_tkeep_reg[3]_0 ),
        .I3(\crcAXIS_tkeep_reg[7]_1 [1]),
        .I4(\crcAXIS_tkeep_reg[7]_2 ),
        .I5(\crcAXIS_tkeep[3]_i_4__0_n_0 ),
        .O(\lastAXIS_tkeep_reg[7] [2]));
  LUT6 #(
    .INIT(64'hFFFFFF07FF07FF07)) 
    \crcAXIS_tkeep[3]_i_1 
       (.I0(\crcAXIS_tkeep_reg[3] ),
        .I1(\crcAXIS_tkeep_reg[3]_1 ),
        .I2(\crcAXIS_tkeep_reg[3]_0 ),
        .I3(\crcAXIS_tkeep[3]_i_4__0_n_0 ),
        .I4(\crcAXIS_tkeep_reg[7]_1 [2]),
        .I5(\crcAXIS_tkeep_reg[7]_2 ),
        .O(\lastAXIS_tkeep_reg[7] [3]));
  LUT5 #(
    .INIT(32'h8000FFFF)) 
    \crcAXIS_tkeep[3]_i_4__0 
       (.I0(\crcAXIS_tkeep_reg[3] ),
        .I1(\crcAXIS_tkeep_reg[3]_0 ),
        .I2(crcAXIS_tlast_sig_reg_0),
        .I3(\crcAXIS_tkeep_reg[0]_0 ),
        .I4(\stateOp_reg[4]_0 ),
        .O(\crcAXIS_tkeep[3]_i_4__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFEAEAEA)) 
    \crcAXIS_tkeep[4]_i_1 
       (.I0(\crcAXIS_tkeep[5]_i_2_n_0 ),
        .I1(\crcAXIS_tkeep_reg[7] ),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(\crcAXIS_tkeep_reg[7]_1 [3]),
        .I4(\crcAXIS_tkeep_reg[7]_2 ),
        .O(\lastAXIS_tkeep_reg[7] [4]));
  LUT3 #(
    .INIT(8'hF8)) 
    \crcAXIS_tkeep[5]_i_1 
       (.I0(\crcAXIS_tkeep_reg[7]_2 ),
        .I1(\crcAXIS_tkeep_reg[7]_1 [4]),
        .I2(\crcAXIS_tkeep[5]_i_2_n_0 ),
        .O(\lastAXIS_tkeep_reg[7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2057" *) 
  LUT4 #(
    .INIT(16'hD0FF)) 
    \crcAXIS_tkeep[5]_i_2 
       (.I0(\lastAXIS_tkeep_reg[1]_0 ),
        .I1(\lastAXIS_tkeep_reg[5] ),
        .I2(\crcAXIS_tkeep_reg[7] ),
        .I3(\stateOp_reg[4]_0 ),
        .O(\crcAXIS_tkeep[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFD0FFD0FFD0FF)) 
    \crcAXIS_tkeep[6]_i_1 
       (.I0(\lastAXIS_tkeep_reg[1]_0 ),
        .I1(\crcAXIS_tkeep_reg[6] ),
        .I2(\crcAXIS_tkeep_reg[7] ),
        .I3(\stateOp_reg[4]_0 ),
        .I4(\crcAXIS_tkeep_reg[7]_1 [5]),
        .I5(\crcAXIS_tkeep_reg[7]_2 ),
        .O(\lastAXIS_tkeep_reg[7] [6]));
  LUT6 #(
    .INIT(64'h0F0F5F3F0FFF5F3F)) 
    \crcAXIS_tkeep[7]_i_1 
       (.I0(\crcAXIS_tkeep[7]_i_3_n_0 ),
        .I1(\crcAXIS_tkeep[7]_i_4_n_0 ),
        .I2(\stateOp_reg[4]_0 ),
        .I3(\crcAXIS_tkeep_reg[0]_1 ),
        .I4(\crcAXIS_tkeep_reg[0]_2 ),
        .I5(\crcAXIS_tkeep[7]_i_7_n_0 ),
        .O(\stateSend_reg[2]_1 ));
  LUT6 #(
    .INIT(64'hFFFF70FF70FF70FF)) 
    \crcAXIS_tkeep[7]_i_2 
       (.I0(\lastAXIS_tkeep_reg[1]_0 ),
        .I1(\crcAXIS_tkeep_reg[7]_0 ),
        .I2(\crcAXIS_tkeep_reg[7] ),
        .I3(\stateOp_reg[4]_0 ),
        .I4(\crcAXIS_tkeep_reg[7]_1 [6]),
        .I5(\crcAXIS_tkeep_reg[7]_2 ),
        .O(\lastAXIS_tkeep_reg[7] [7]));
  LUT6 #(
    .INIT(64'hBFFFFFFFBFFF0000)) 
    \crcAXIS_tkeep[7]_i_3 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(stateSend[0]),
        .I3(crcAXIS_tlast_sig_reg_0),
        .I4(\crcAXIS_tkeep_reg[0]_6 ),
        .I5(\crcAXIS_tkeep_reg[0]_7 ),
        .O(\crcAXIS_tkeep[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h080008FF08FF08FF)) 
    \crcAXIS_tkeep[7]_i_4 
       (.I0(\crcAXIS_tkeep_reg[0]_3 ),
        .I1(\crcAXIS_tkeep_reg[0]_4 ),
        .I2(\crcAXIS_tkeep_reg[0]_5 ),
        .I3(\crcAXIS_tkeep_reg[0]_6 ),
        .I4(\stateRecv_reg[0]_0 ),
        .I5(CO),
        .O(\crcAXIS_tkeep[7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAA8AAAAAAAAA)) 
    \crcAXIS_tkeep[7]_i_7 
       (.I0(\crcAXIS_tkeep_reg[0]_6 ),
        .I1(stateRecv[1]),
        .I2(stateRecv[2]),
        .I3(stateRecv[0]),
        .I4(crcAXIS_tlast_sig_reg_0),
        .I5(CO),
        .O(\crcAXIS_tkeep[7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hC5FFFFFFC5FF0000)) 
    crcAXIS_tlast_sig_i_1
       (.I0(crcAXIS_tlast_sig_reg_4),
        .I1(crcAXIS_tlast_sig_reg_0),
        .I2(Q[5]),
        .I3(\stateOp_reg[4]_1 ),
        .I4(crcAXIS_tlast_sig_i_3_n_0),
        .I5(crcAXIS_tlast_sig_reg_3),
        .O(\stateOp_reg[5]_7 ));
  LUT6 #(
    .INIT(64'hF0FFFFFFFFFF70FF)) 
    crcAXIS_tlast_sig_i_10
       (.I0(crcAXIS_tlast_sig_reg_0),
        .I1(\stateRecv_reg[0]_0 ),
        .I2(Q[1]),
        .I3(crcAXIS_tlast_sig_i_6_0),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(crcAXIS_tlast_sig_i_10_n_0));
  LUT6 #(
    .INIT(64'h0777077700000777)) 
    crcAXIS_tlast_sig_i_11
       (.I0(crcAXIS_tlast_sig_i_8_0),
        .I1(\stateOp[5]_i_18_n_0 ),
        .I2(crcAXIS_tlast_sig_i_8_1),
        .I3(\txAXIS_tdata_reg[8]_1 ),
        .I4(crcAXIS_tlast_sig_i_8_2),
        .I5(crcAXIS_tlast_sig_i_12_n_0),
        .O(crcAXIS_tlast_sig_i_11_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2000" *) 
  LUT4 #(
    .INIT(16'hFBFF)) 
    crcAXIS_tlast_sig_i_12
       (.I0(stateRecv[1]),
        .I1(stateRecv[2]),
        .I2(stateRecv[0]),
        .I3(crcAXIS_tlast_sig_reg_0),
        .O(crcAXIS_tlast_sig_i_12_n_0));
  LUT6 #(
    .INIT(64'hBBBFFFFFBBBFBBBF)) 
    crcAXIS_tlast_sig_i_3
       (.I0(crcAXIS_tlast_sig_i_6_n_0),
        .I1(\stateOp_reg[4]_1 ),
        .I2(crcAXIS_tlast_sig_reg_1),
        .I3(Q[5]),
        .I4(crcAXIS_tlast_sig_i_8_n_0),
        .I5(crcAXIS_tlast_sig_reg_2),
        .O(crcAXIS_tlast_sig_i_3_n_0));
  LUT6 #(
    .INIT(64'h000000000075AA75)) 
    crcAXIS_tlast_sig_i_6
       (.I0(Q[3]),
        .I1(\stateOp[3]_i_7_n_0 ),
        .I2(\stateRecv_reg[0]_0 ),
        .I3(Q[4]),
        .I4(\wordcntLast_reg[0]_2 ),
        .I5(crcAXIS_tlast_sig_i_10_n_0),
        .O(crcAXIS_tlast_sig_i_6_n_0));
  LUT6 #(
    .INIT(64'hFAFAFAFAFFFFCFFF)) 
    crcAXIS_tlast_sig_i_8
       (.I0(crcAXIS_tlast_sig_i_11_n_0),
        .I1(CO),
        .I2(Q[5]),
        .I3(\stateOp_next_reg[0] ),
        .I4(crcAXIS_tlast_sig_i_12_n_0),
        .I5(Q[2]),
        .O(crcAXIS_tlast_sig_i_8_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \crc_imd[0]_i_1 
       (.I0(\crc_imd[0]_i_2_n_0 ),
        .I1(\crc_imd[0]_i_3_n_0 ),
        .I2(\crc_imd[0]_i_4_n_0 ),
        .I3(\crc_imd[0]_i_5_n_0 ),
        .I4(\crc_imd[0]_i_6_n_0 ),
        .I5(\crc_imd[0]_i_7_n_0 ),
        .O(\crc_imd_reg[7]_1 [0]));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[0]_i_10 
       (.I0(AXIS_tdata[35]),
        .I1(AXIS_tdata[19]),
        .I2(AXIS_tdata[56]),
        .I3(AXIS_tdata[38]),
        .I4(AXIS_tdata[53]),
        .I5(AXIS_tdata[17]),
        .O(\crc_imd[0]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2168" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \crc_imd[0]_i_11 
       (.I0(\crc_imd[15]_i_33_n_0 ),
        .I1(\crc_imd[15]_i_64_n_0 ),
        .O(\crc_imd[0]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[0]_i_12 
       (.I0(\sendAXIL_rdata_reg[63]_0 [53]),
        .I1(rxAXIS_tdata[53]),
        .I2(\sendAXIL_rdata_reg[63]_0 [54]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[54]),
        .I5(stateOp_reg),
        .O(\crc_imd[0]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[0]_i_13 
       (.I0(\crc_imd[9]_i_13_n_0 ),
        .I1(\crc_imd[15]_i_71_n_0 ),
        .I2(AXIS_tdata[30]),
        .I3(AXIS_tdata[27]),
        .I4(\crc_imd[14]_i_5_0 ),
        .I5(\crc_imd[2]_i_6_n_0 ),
        .O(\crc_imd[0]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[0]_i_14 
       (.I0(\crc_imd_reg[1] ),
        .I1(\crc_imd[15]_i_39_n_0 ),
        .I2(AXIS_tdata[22]),
        .I3(\crc_imd[15]_i_63_n_0 ),
        .I4(\crc_imd[15]_i_38_n_0 ),
        .I5(\crc_imd[0]_i_18_n_0 ),
        .O(\crc_imd[0]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h4F44B0BBB0BB4F44)) 
    \crc_imd[0]_i_15 
       (.I0(stateOp_reg),
        .I1(recvAXIS_tdata[5]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [15]),
        .I4(\retbuf_reg[15][7] [7]),
        .I5(AXIS_tdata[16]),
        .O(\crc_imd[0]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[0]_i_16 
       (.I0(\crc_imd_reg[1]_0 ),
        .I1(\crc_imd[15]_i_79_n_0 ),
        .I2(\crc_imd[0]_i_19_n_0 ),
        .I3(\crc_imd[0]_i_20_n_0 ),
        .I4(AXIS_tdata[21]),
        .I5(\crc_imd[15]_i_77_n_0 ),
        .O(\crc_imd[0]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[0]_i_17 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[53]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [53]),
        .O(AXIS_tdata[53]));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[0]_i_18 
       (.I0(\crc_imd[15]_i_47_n_0 ),
        .I1(\crc_imd[15]_i_75_n_0 ),
        .I2(AXIS_tdata[39]),
        .I3(AXIS_tdata[37]),
        .I4(\crc_imd[15]_i_55_n_0 ),
        .I5(AXIS_tdata[19]),
        .O(\crc_imd[0]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2015" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[0]_i_19 
       (.I0(\crc_imd[15]_i_75_n_0 ),
        .I1(\crc_imd[9]_i_16_n_0 ),
        .I2(\crc_imd[15]_i_47_n_0 ),
        .I3(\crc_imd[1]_i_10_n_0 ),
        .O(\crc_imd[0]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00000600)) 
    \crc_imd[0]_i_2 
       (.I0(\crc_imd[15]_i_16_n_0 ),
        .I1(\crc_imd[15]_i_17_n_0 ),
        .I2(\crc_imd_reg[0] [2]),
        .I3(\crc_imd_reg[0]_0 ),
        .I4(\crc_imd_reg[0] [1]),
        .I5(recvAXIS_tlast_sig_reg_0),
        .O(\crc_imd[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h65AA65659A559A9A)) 
    \crc_imd[0]_i_20 
       (.I0(\retbuf_reg[15][7] [14]),
        .I1(stateOp_reg),
        .I2(rxAXIS_tdata[6]),
        .I3(\crc_imd_reg[4] ),
        .I4(\sendAXIL_rdata_reg[63]_0 [6]),
        .I5(AXIS_tdata[23]),
        .O(\crc_imd[0]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'h0800000800080800)) 
    \crc_imd[0]_i_3 
       (.I0(\crc_imd_reg[0] [1]),
        .I1(\crc_imd_reg[0]_0 ),
        .I2(\crc_imd_reg[0] [2]),
        .I3(\crc_imd[15]_i_18_n_0 ),
        .I4(\crc_imd[15]_i_17_n_0 ),
        .I5(\crc_imd[9]_i_12_n_0 ),
        .O(\crc_imd[0]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[0]_i_4 
       (.I0(\crc_imd_reg[0]_2 ),
        .I1(\crc_imd[15]_i_23_n_0 ),
        .I2(\crc_imd[0]_i_8_n_0 ),
        .I3(\crc_imd[15]_i_21_n_0 ),
        .I4(AXIS_tdata[29]),
        .O(\crc_imd[0]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[0]_i_5 
       (.I0(\crc_imd_reg[8]_1 ),
        .I1(\crc_imd[15]_i_31_n_0 ),
        .I2(\crc_imd[0]_i_9_n_0 ),
        .I3(\crc_imd[15]_i_28_n_0 ),
        .I4(\crc_imd[0]_i_10_n_0 ),
        .O(\crc_imd[0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[0]_i_6 
       (.I0(\crc_imd_reg[2]_2 ),
        .I1(\crc_imd[15]_i_34_n_0 ),
        .I2(\crc_imd[0]_i_11_n_0 ),
        .I3(\crc_imd[0]_i_12_n_0 ),
        .I4(\crc_imd[0]_i_13_n_0 ),
        .I5(\crc_imd[15]_i_23_n_0 ),
        .O(\crc_imd[0]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFEAAEAEEA)) 
    \crc_imd[0]_i_7 
       (.I0(\crc_imd[0]_i_14_n_0 ),
        .I1(\crc_imd_reg[0]_1 ),
        .I2(\crc_imd[1]_i_25_n_0 ),
        .I3(\crc_imd[15]_i_27_n_0 ),
        .I4(\crc_imd[0]_i_15_n_0 ),
        .I5(\crc_imd[0]_i_16_n_0 ),
        .O(\crc_imd[0]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h65AA65659A559A9A)) 
    \crc_imd[0]_i_8 
       (.I0(\crc_imd[15]_i_22_n_0 ),
        .I1(stateOp_reg),
        .I2(recvAXIS_tdata[3]),
        .I3(\crc_imd_reg[4] ),
        .I4(\sendAXIL_rdata_reg[63]_0 [11]),
        .I5(\retbuf_reg[15][7] [3]),
        .O(\crc_imd[0]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[0]_i_9 
       (.I0(\crc_imd[15]_i_60_n_0 ),
        .I1(\crc_imd[15]_i_79_n_0 ),
        .I2(\crc_imd[15]_i_62_n_0 ),
        .I3(\crc_imd[1]_i_20_n_0 ),
        .I4(\crc_imd[15]_i_63_n_0 ),
        .O(\crc_imd[0]_i_9_n_0 ));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[10]_i_10 
       (.I0(\crc_imd[12]_i_3 ),
        .I1(\recvAXIS_tdata_sig_reg[15]_0 [11]),
        .I2(AXIS_tdata[17]),
        .I3(\retbuf_reg[15][7] [6]),
        .I4(AXIS_tdata[16]),
        .O(crc_imd065_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[10]_i_11 
       (.I0(AXIS_tdata[20]),
        .I1(AXIS_tdata[21]),
        .I2(AXIS_tdata[22]),
        .I3(AXIS_tdata[24]),
        .I4(AXIS_tdata[41]),
        .I5(AXIS_tdata[38]),
        .O(\crc_imd[10]_i_11_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[10]_i_12 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[40]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [40]),
        .O(AXIS_tdata[40]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[10]_i_13 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[32]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [32]),
        .O(AXIS_tdata[32]));
  LUT6 #(
    .INIT(64'h4F44B0BBB0BB4F44)) 
    \crc_imd[10]_i_14 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[28]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [28]),
        .I4(AXIS_tdata[31]),
        .I5(\crc_imd[10]_i_17_n_0 ),
        .O(\crc_imd[10]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2018" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[10]_i_15 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[24]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [24]),
        .O(AXIS_tdata[24]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[10]_i_16 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[33]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [33]),
        .O(AXIS_tdata[33]));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[10]_i_17 
       (.I0(\sendAXIL_rdata_reg[63]_0 [49]),
        .I1(rxAXIS_tdata[49]),
        .I2(\sendAXIL_rdata_reg[63]_0 [48]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[48]),
        .I5(stateOp_reg),
        .O(\crc_imd[10]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[10]_i_5 
       (.I0(stateOp_reg),
        .I1(recvAXIS_tdata[0]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [0]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [0]));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[10]_i_6 
       (.I0(\crc_imd[10]_i_11_n_0 ),
        .I1(\crc_imd[15]_i_19_n_0 ),
        .I2(AXIS_tdata[23]),
        .I3(\crc_imd[15]_i_73_n_0 ),
        .I4(AXIS_tdata[40]),
        .O(crc_imd0148_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[10]_i_7 
       (.I0(AXIS_tdata[32]),
        .I1(AXIS_tdata[46]),
        .I2(\crc_imd[10]_i_14_n_0 ),
        .I3(\crc_imd[7]_i_11_n_0 ),
        .I4(\crc_imd[1]_i_24_n_0 ),
        .I5(\crc_imd[12]_i_3_0 ),
        .O(crc_imd0172_out));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[10]_i_8 
       (.I0(AXIS_tdata[24]),
        .I1(\crc_imd[9]_i_12_n_0 ),
        .I2(\crc_imd[15]_i_19_n_0 ),
        .I3(\crc_imd[1]_i_20_n_0 ),
        .I4(\crc_imd[11]_i_13_n_0 ),
        .O(crc_imd081_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[10]_i_9 
       (.I0(\crc_imd[14]_i_5 ),
        .I1(\crc_imd[15]_i_34_n_0 ),
        .I2(AXIS_tdata[16]),
        .I3(AXIS_tdata[30]),
        .I4(AXIS_tdata[33]),
        .I5(AXIS_tdata[32]),
        .O(crc_imd0112_out));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[11]_i_10 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [7]),
        .I1(\crc_imd[2]_i_6_n_0 ),
        .I2(\retbuf_reg[15][7] [15]),
        .I3(\crc_imd[4]_i_6_n_0 ),
        .O(crc_imd042_out));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[11]_i_11 
       (.I0(\crc_imd[1]_i_9_n_0 ),
        .I1(\retbuf_reg[15][7] [7]),
        .I2(AXIS_tdata[18]),
        .I3(\recvAXIS_tdata_sig_reg[15]_0 [12]),
        .I4(AXIS_tdata[17]),
        .O(crc_imd066_out));
  LUT6 #(
    .INIT(64'h6966999969666966)) 
    \crc_imd[11]_i_12 
       (.I0(\crc_imd[15]_i_62_n_0 ),
        .I1(\retbuf_reg[15][7] [11]),
        .I2(stateOp_reg),
        .I3(rxAXIS_tdata[3]),
        .I4(\crc_imd_reg[4] ),
        .I5(\sendAXIL_rdata_reg[63]_0 [3]),
        .O(\crc_imd[11]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2022" *) 
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[11]_i_13 
       (.I0(\crc_imd[9]_i_13_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [25]),
        .I2(\crc_imd_reg[4] ),
        .I3(rxAXIS_tdata[25]),
        .I4(stateOp_reg),
        .O(\crc_imd[11]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[11]_i_14 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[41]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [41]),
        .O(AXIS_tdata[41]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[11]_i_15 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[42]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [42]),
        .O(AXIS_tdata[42]));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[11]_i_16 
       (.I0(\sendAXIL_rdata_reg[63]_0 [49]),
        .I1(rxAXIS_tdata[49]),
        .I2(\sendAXIL_rdata_reg[63]_0 [50]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[50]),
        .I5(stateOp_reg),
        .O(\crc_imd[11]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[11]_i_17 
       (.I0(\sendAXIL_rdata_reg[63]_0 [47]),
        .I1(rxAXIS_tdata[47]),
        .I2(\sendAXIL_rdata_reg[63]_0 [33]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[33]),
        .I5(stateOp_reg),
        .O(\crc_imd[11]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[11]_i_18 
       (.I0(\sendAXIL_rdata_reg[63]_0 [34]),
        .I1(rxAXIS_tdata[34]),
        .I2(\sendAXIL_rdata_reg[63]_0 [33]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[33]),
        .I5(stateOp_reg),
        .O(\crc_imd[11]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2017" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[11]_i_5 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[1]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [1]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [1]));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[11]_i_6 
       (.I0(\crc_imd[11]_i_12_n_0 ),
        .I1(\crc_imd[11]_i_13_n_0 ),
        .I2(AXIS_tdata[22]),
        .I3(AXIS_tdata[23]),
        .I4(AXIS_tdata[41]),
        .I5(AXIS_tdata[42]),
        .O(crc_imd0149_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[11]_i_7 
       (.I0(\crc_imd[11]_i_16_n_0 ),
        .I1(\crc_imd[15]_i_41_0 ),
        .I2(\crc_imd[14]_i_5_0 ),
        .I3(\crc_imd[11]_i_17_n_0 ),
        .I4(\crc_imd[7]_i_11_n_0 ),
        .I5(\crc_imd[1]_i_21_n_0 ),
        .O(crc_imd0173_out));
  (* SOFT_HLUTNM = "soft_lutpair2166" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[11]_i_8 
       (.I0(\crc_imd[1]_i_22_n_0 ),
        .I1(\crc_imd[13]_i_14_n_0 ),
        .I2(\crc_imd[15]_i_63_n_0 ),
        .O(crc_imd083_out));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[11]_i_9 
       (.I0(AXIS_tdata[17]),
        .I1(AXIS_tdata[31]),
        .I2(\crc_imd[15]_i_34_n_0 ),
        .I3(\crc_imd[12]_i_3 ),
        .I4(\crc_imd[11]_i_18_n_0 ),
        .O(crc_imd0115_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[12]_i_10 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [2]),
        .I1(\retbuf_reg[15][7] [10]),
        .I2(\recvAXIS_tdata_sig_reg[15]_0 [0]),
        .I3(AXIS_tdata[18]),
        .I4(\retbuf_reg[15][7] [8]),
        .I5(AXIS_tdata[19]),
        .O(crc_imd067_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[12]_i_11 
       (.I0(AXIS_tdata[43]),
        .I1(\crc_imd[15]_i_48_n_0 ),
        .I2(AXIS_tdata[26]),
        .I3(AXIS_tdata[23]),
        .I4(AXIS_tdata[42]),
        .I5(AXIS_tdata[24]),
        .O(\crc_imd[12]_i_11_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[12]_i_12 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[51]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [51]),
        .O(AXIS_tdata[51]));
  LUT6 #(
    .INIT(64'h65AA65659A559A9A)) 
    \crc_imd[12]_i_13 
       (.I0(\crc_imd[12]_i_17_n_0 ),
        .I1(stateOp_reg),
        .I2(rxAXIS_tdata[50]),
        .I3(\crc_imd_reg[4] ),
        .I4(\sendAXIL_rdata_reg[63]_0 [50]),
        .I5(AXIS_tdata[30]),
        .O(\crc_imd[12]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[12]_i_14 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[34]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [34]),
        .O(AXIS_tdata[34]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[12]_i_15 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[35]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [35]),
        .O(AXIS_tdata[35]));
  (* SOFT_HLUTNM = "soft_lutpair2025" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[12]_i_16 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[26]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [26]),
        .O(AXIS_tdata[26]));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[12]_i_17 
       (.I0(\sendAXIL_rdata_reg[63]_0 [34]),
        .I1(rxAXIS_tdata[34]),
        .I2(\sendAXIL_rdata_reg[63]_0 [32]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[32]),
        .I5(stateOp_reg),
        .O(\crc_imd[12]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2016" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[12]_i_5 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[2]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [2]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [2]));
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[12]_i_6 
       (.I0(\crc_imd[1]_i_20_n_0 ),
        .I1(\crc_imd[2]_i_6_n_0 ),
        .I2(\crc_imd[12]_i_11_n_0 ),
        .O(crc_imd0150_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[12]_i_7 
       (.I0(AXIS_tdata[51]),
        .I1(AXIS_tdata[17]),
        .I2(\crc_imd[12]_i_13_n_0 ),
        .I3(\crc_imd[1]_i_21_n_0 ),
        .I4(\crc_imd[14]_i_5 ),
        .I5(\crc_imd[12]_i_3 ),
        .O(crc_imd0174_out));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[12]_i_8 
       (.I0(AXIS_tdata[27]),
        .I1(\crc_imd[12]_i_3_0 ),
        .I2(\crc_imd[9]_i_13_n_0 ),
        .I3(\crc_imd[8]_i_12_n_0 ),
        .O(crc_imd085_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[12]_i_9 
       (.I0(\crc_imd[15]_i_47_n_0 ),
        .I1(\crc_imd[1]_i_12_n_0 ),
        .I2(AXIS_tdata[34]),
        .I3(AXIS_tdata[16]),
        .I4(AXIS_tdata[35]),
        .I5(AXIS_tdata[18]),
        .O(crc_imd0118_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[13]_i_10 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [1]),
        .I1(\retbuf_reg[15][7] [11]),
        .I2(\recvAXIS_tdata_sig_reg[15]_0 [3]),
        .I3(AXIS_tdata[20]),
        .I4(\retbuf_reg[15][7] [9]),
        .I5(AXIS_tdata[19]),
        .O(crc_imd068_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[13]_i_11 
       (.I0(AXIS_tdata[43]),
        .I1(\crc_imd[9]_i_12_n_0 ),
        .I2(AXIS_tdata[23]),
        .I3(AXIS_tdata[27]),
        .I4(AXIS_tdata[44]),
        .I5(AXIS_tdata[25]),
        .O(\crc_imd[13]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[13]_i_12 
       (.I0(\sendAXIL_rdata_reg[63]_0 [51]),
        .I1(rxAXIS_tdata[51]),
        .I2(\sendAXIL_rdata_reg[63]_0 [52]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[52]),
        .I5(stateOp_reg),
        .O(\crc_imd[13]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[13]_i_13 
       (.I0(\sendAXIL_rdata_reg[63]_0 [35]),
        .I1(rxAXIS_tdata[35]),
        .I2(\sendAXIL_rdata_reg[63]_0 [33]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[33]),
        .I5(stateOp_reg),
        .O(\crc_imd[13]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h6966999969666966)) 
    \crc_imd[13]_i_14 
       (.I0(\crc_imd[2]_i_6_n_0 ),
        .I1(\retbuf_reg[15][7] [15]),
        .I2(stateOp_reg),
        .I3(recvAXIS_tdata[1]),
        .I4(\crc_imd_reg[4] ),
        .I5(\sendAXIL_rdata_reg[63]_0 [7]),
        .O(\crc_imd[13]_i_14_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[13]_i_15 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[17]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [17]),
        .O(AXIS_tdata[17]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[13]_i_16 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[19]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [19]),
        .O(AXIS_tdata[19]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[13]_i_17 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[43]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [43]),
        .O(AXIS_tdata[43]));
  (* SOFT_HLUTNM = "soft_lutpair2022" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[13]_i_18 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[25]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [25]),
        .O(AXIS_tdata[25]));
  (* SOFT_HLUTNM = "soft_lutpair2031" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[13]_i_5 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[3]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [3]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [3]));
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[13]_i_6 
       (.I0(\crc_imd[7]_i_17_n_0 ),
        .I1(\crc_imd[15]_i_48_n_0 ),
        .I2(\crc_imd[13]_i_11_n_0 ),
        .O(crc_imd0151_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[13]_i_7 
       (.I0(\crc_imd[13]_i_12_n_0 ),
        .I1(\crc_imd[1]_i_9_n_0 ),
        .I2(\txAXIS_tdata_reg[13] ),
        .I3(\crc_imd[13]_i_13_n_0 ),
        .I4(\crc_imd[1]_i_21_n_0 ),
        .I5(\crc_imd[15]_i_75_n_0 ),
        .O(crc_imd0175_out));
  (* SOFT_HLUTNM = "soft_lutpair2166" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \crc_imd[13]_i_8 
       (.I0(\crc_imd[0]_i_8_n_0 ),
        .I1(\crc_imd[13]_i_14_n_0 ),
        .O(crc_imd086_out));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[13]_i_9 
       (.I0(\crc_imd[15]_i_41_0 ),
        .I1(AXIS_tdata[17]),
        .I2(\crc_imd[14]_i_18_n_0 ),
        .I3(\crc_imd[15]_i_47_n_0 ),
        .I4(\crc_imd[1]_i_14_n_0 ),
        .O(crc_imd0121_out));
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[14]_i_10 
       (.I0(\crc_imd[14]_i_18_n_0 ),
        .I1(\crc_imd[15]_i_75_n_0 ),
        .I2(\crc_imd[14]_i_19_n_0 ),
        .O(crc_imd0176_out));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[14]_i_11 
       (.I0(\crc_imd[14]_i_5 ),
        .I1(\crc_imd[4]_i_6_n_0 ),
        .I2(AXIS_tdata[28]),
        .I3(AXIS_tdata[29]),
        .O(crc_imd087_out));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[14]_i_12 
       (.I0(AXIS_tdata[37]),
        .I1(AXIS_tdata[20]),
        .I2(\crc_imd[1]_i_10_n_0 ),
        .I3(\crc_imd[15]_i_47_n_0 ),
        .I4(\crc_imd[14]_i_22_n_0 ),
        .O(crc_imd0124_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[14]_i_14 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [2]),
        .I1(\retbuf_reg[15][7] [12]),
        .I2(\recvAXIS_tdata_sig_reg[15]_0 [4]),
        .I3(AXIS_tdata[21]),
        .I4(AXIS_tdata[20]),
        .I5(\retbuf_reg[15][7] [10]),
        .O(crc_imd069_out));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[14]_i_16 
       (.I0(\sendAXIL_rdata_reg[63]_0 [44]),
        .I1(rxAXIS_tdata[44]),
        .I2(\sendAXIL_rdata_reg[63]_0 [28]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[28]),
        .I5(stateOp_reg),
        .O(\crc_imd[14]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h65AA65659A559A9A)) 
    \crc_imd[14]_i_18 
       (.I0(\retbuf_reg[15][7] [10]),
        .I1(stateOp_reg),
        .I2(rxAXIS_tdata[2]),
        .I3(\crc_imd_reg[4] ),
        .I4(\sendAXIL_rdata_reg[63]_0 [2]),
        .I5(AXIS_tdata[19]),
        .O(\crc_imd[14]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[14]_i_19 
       (.I0(AXIS_tdata[36]),
        .I1(\crc_imd[1]_i_24_n_0 ),
        .I2(AXIS_tdata[34]),
        .I3(AXIS_tdata[16]),
        .I4(AXIS_tdata[53]),
        .I5(AXIS_tdata[52]),
        .O(\crc_imd[14]_i_19_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[14]_i_20 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[28]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [28]),
        .O(AXIS_tdata[28]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[14]_i_21 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[37]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [37]),
        .O(AXIS_tdata[37]));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[14]_i_22 
       (.I0(\sendAXIL_rdata_reg[63]_0 [36]),
        .I1(rxAXIS_tdata[36]),
        .I2(\sendAXIL_rdata_reg[63]_0 [18]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[18]),
        .I5(stateOp_reg),
        .O(\crc_imd[14]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[14]_i_23 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[36]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [36]),
        .O(AXIS_tdata[36]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[14]_i_24 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[52]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [52]),
        .O(AXIS_tdata[52]));
  (* SOFT_HLUTNM = "soft_lutpair2014" *) 
  LUT5 #(
    .INIT(32'h0000FF20)) 
    \crc_imd[14]_i_3 
       (.I0(recvAXIS_tlast),
        .I1(stateOp_reg),
        .I2(\stateRecv_reg[0]_0 ),
        .I3(crcAXIS_tlast_sig_reg_3),
        .I4(\crc_imd_reg[0]_0 ),
        .O(recvAXIS_tlast_sig_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair2030" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[14]_i_7 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[4]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [4]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2028" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[14]_i_8 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[5]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [5]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [5]));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[14]_i_9 
       (.I0(\crc_imd[8]_i_12_n_0 ),
        .I1(AXIS_tdata[45]),
        .I2(\crc_imd[15]_i_48_n_0 ),
        .I3(\crc_imd[14]_i_16_n_0 ),
        .I4(\crc_imd[7]_i_17_n_0 ),
        .I5(\crc_imd[14]_i_5_0 ),
        .O(crc_imd0152_out));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[15]_i_10 
       (.I0(\crc_imd_reg[2]_2 ),
        .I1(\crc_imd[15]_i_33_n_0 ),
        .I2(\crc_imd[15]_i_34_n_0 ),
        .I3(\crc_imd[15]_i_35_n_0 ),
        .I4(\crc_imd[15]_i_36_n_0 ),
        .I5(\crc_imd[15]_i_37_n_0 ),
        .O(\crc_imd[15]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF8228)) 
    \crc_imd[15]_i_11 
       (.I0(\crc_imd_reg[1] ),
        .I1(\crc_imd[15]_i_38_n_0 ),
        .I2(\crc_imd[15]_i_39_n_0 ),
        .I3(\crc_imd[15]_i_40_n_0 ),
        .I4(\crc_imd[15]_i_41_n_0 ),
        .I5(\crc_imd[15]_i_42_n_0 ),
        .O(\crc_imd[15]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h2222222222222A22)) 
    \crc_imd[15]_i_15 
       (.I0(\crc_imd_reg[0] [0]),
        .I1(\crc_imd_reg[4] ),
        .I2(stateRecv[1]),
        .I3(stateRecv[2]),
        .I4(stateRecv[0]),
        .I5(stateOp_reg),
        .O(\crcAXIS_tkeep_reg[0] ));
  LUT6 #(
    .INIT(64'h6966999969666966)) 
    \crc_imd[15]_i_16 
       (.I0(\crc_imd[1]_i_13_n_0 ),
        .I1(\retbuf_reg[15][7] [15]),
        .I2(stateOp_reg),
        .I3(recvAXIS_tdata[1]),
        .I4(\crc_imd_reg[4] ),
        .I5(\sendAXIL_rdata_reg[63]_0 [7]),
        .O(\crc_imd[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[15]_i_17 
       (.I0(\crc_imd[15]_i_47_n_0 ),
        .I1(\crc_imd[1]_i_10_n_0 ),
        .I2(\crc_imd[1]_i_8_n_0 ),
        .O(\crc_imd[15]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2167" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \crc_imd[15]_i_18 
       (.I0(\crc_imd[15]_i_21_n_0 ),
        .I1(\crc_imd_reg[1]_1 ),
        .O(\crc_imd[15]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2027" *) 
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[15]_i_19 
       (.I0(\sendAXIL_rdata_reg[63]_0 [6]),
        .I1(\crc_imd_reg[4] ),
        .I2(rxAXIS_tdata[6]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [14]),
        .O(\crc_imd[15]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \crc_imd[15]_i_2 
       (.I0(\crc_imd[15]_i_6_n_0 ),
        .I1(\crc_imd[15]_i_7_n_0 ),
        .I2(\crc_imd[15]_i_8_n_0 ),
        .I3(\crc_imd[15]_i_9_n_0 ),
        .I4(\crc_imd[15]_i_10_n_0 ),
        .I5(\crc_imd[15]_i_11_n_0 ),
        .O(\crc_imd_reg[7]_1 [6]));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[15]_i_21 
       (.I0(\crc_imd[15]_i_48_n_0 ),
        .I1(\crc_imd[7]_i_16_n_0 ),
        .I2(\crc_imd[12]_i_3_0 ),
        .I3(\crc_imd[2]_i_6_n_0 ),
        .I4(\crc_imd[15]_i_41_0 ),
        .I5(\crc_imd[1]_i_24_n_0 ),
        .O(\crc_imd[15]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[15]_i_22 
       (.I0(\sendAXIL_rdata_reg[63]_0 [27]),
        .I1(rxAXIS_tdata[27]),
        .I2(\sendAXIL_rdata_reg[63]_0 [28]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[28]),
        .I5(stateOp_reg),
        .O(\crc_imd[15]_i_22_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \crc_imd[15]_i_23 
       (.I0(\crc_imd[15]_i_35_n_0 ),
        .I1(\crc_imd[15]_i_51_n_0 ),
        .O(\crc_imd[15]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[15]_i_24 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[30]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [30]),
        .O(AXIS_tdata[30]));
  (* SOFT_HLUTNM = "soft_lutpair2020" *) 
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[15]_i_25 
       (.I0(\sendAXIL_rdata_reg[63]_0 [13]),
        .I1(\crc_imd_reg[4] ),
        .I2(rxAXIS_tdata[13]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [5]),
        .O(\txAXIS_tdata_reg[13] ));
  (* SOFT_HLUTNM = "soft_lutpair2167" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[15]_i_27 
       (.I0(\crc_imd_reg[1]_1 ),
        .I1(\crc_imd[9]_i_13_n_0 ),
        .I2(\crc_imd[7]_i_17_n_0 ),
        .O(\crc_imd[15]_i_27_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[15]_i_28 
       (.I0(AXIS_tdata[59]),
        .I1(\crc_imd[15]_i_53_n_0 ),
        .I2(\crc_imd[8]_i_11_n_0 ),
        .I3(\crc_imd[15]_i_54_n_0 ),
        .O(\crc_imd[15]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[15]_i_29 
       (.I0(\crc_imd[15]_i_55_n_0 ),
        .I1(\crc_imd[1]_i_24_n_0 ),
        .I2(AXIS_tdata[20]),
        .I3(AXIS_tdata[54]),
        .I4(AXIS_tdata[18]),
        .I5(AXIS_tdata[56]),
        .O(\crc_imd[15]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[15]_i_30 
       (.I0(\crc_imd[15]_i_60_n_0 ),
        .I1(\crc_imd[15]_i_61_n_0 ),
        .I2(\crc_imd[15]_i_62_n_0 ),
        .I3(\crc_imd[1]_i_20_n_0 ),
        .I4(\crc_imd[15]_i_63_n_0 ),
        .I5(\crc_imd[1]_i_15_n_0 ),
        .O(\crc_imd[15]_i_30_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2168" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[15]_i_31 
       (.I0(\crc_imd[15]_i_64_n_0 ),
        .I1(\crc_imd[15]_i_33_n_0 ),
        .I2(\crc_imd[15]_i_65_n_0 ),
        .O(\crc_imd[15]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2032" *) 
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[15]_i_33 
       (.I0(\crc_imd[15]_i_66_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [55]),
        .I2(\crc_imd_reg[4] ),
        .I3(rxAXIS_tdata[55]),
        .I4(stateOp_reg),
        .O(\crc_imd[15]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'h6966999969666966)) 
    \crc_imd[15]_i_34 
       (.I0(\crc_imd[1]_i_12_n_0 ),
        .I1(\retbuf_reg[15][7] [5]),
        .I2(stateOp_reg),
        .I3(rxAXIS_tdata[13]),
        .I4(\crc_imd_reg[4] ),
        .I5(\sendAXIL_rdata_reg[63]_0 [13]),
        .O(\crc_imd[15]_i_34_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[15]_i_35 
       (.I0(\crc_imd[15]_i_62_n_0 ),
        .I1(\crc_imd[15]_i_61_n_0 ),
        .I2(\crc_imd[1]_i_20_n_0 ),
        .I3(\crc_imd[15]_i_63_n_0 ),
        .I4(\crc_imd[15]_i_67_n_0 ),
        .I5(\crc_imd[15]_i_68_n_0 ),
        .O(\crc_imd[15]_i_35_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[15]_i_36 
       (.I0(\crc_imd[14]_i_5 ),
        .I1(\crc_imd[7]_i_11_n_0 ),
        .I2(AXIS_tdata[47]),
        .I3(AXIS_tdata[48]),
        .I4(\crc_imd[12]_i_3_0 ),
        .I5(\crc_imd[15]_i_48_n_0 ),
        .O(\crc_imd[15]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h6966999969666966)) 
    \crc_imd[15]_i_37 
       (.I0(\crc_imd[15]_i_39_n_0 ),
        .I1(AXIS_tdata[54]),
        .I2(stateOp_reg),
        .I3(rxAXIS_tdata[53]),
        .I4(\crc_imd_reg[4] ),
        .I5(\sendAXIL_rdata_reg[63]_0 [53]),
        .O(\crc_imd[15]_i_37_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2019" *) 
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[15]_i_38 
       (.I0(\crc_imd[1]_i_15_n_0 ),
        .I1(\crc_imd[15]_i_21_n_0 ),
        .I2(\crc_imd_reg[1]_1 ),
        .I3(AXIS_tdata[45]),
        .I4(AXIS_tdata[47]),
        .O(\crc_imd[15]_i_38_n_0 ));
  LUT6 #(
    .INIT(64'h4F44B0BBB0BB4F44)) 
    \crc_imd[15]_i_39 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[46]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [46]),
        .I4(\crc_imd[15]_i_71_n_0 ),
        .I5(\crc_imd[15]_i_51_n_0 ),
        .O(\crc_imd[15]_i_39_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2012" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \crc_imd[15]_i_3__0 
       (.I0(stateRecv[0]),
        .I1(stateRecv[2]),
        .I2(stateRecv[1]),
        .O(\stateRecv_reg[0]_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[15]_i_40 
       (.I0(\crc_imd[15]_i_62_n_0 ),
        .I1(\crc_imd[15]_i_72_n_0 ),
        .I2(\crc_imd[15]_i_73_n_0 ),
        .I3(AXIS_tdata[38]),
        .I4(\crc_imd[15]_i_75_n_0 ),
        .I5(\crc_imd[12]_i_3 ),
        .O(\crc_imd[15]_i_40_n_0 ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[15]_i_41 
       (.I0(\crc_imd_reg[0]_1 ),
        .I1(\crc_imd[1]_i_25_n_0 ),
        .I2(\crc_imd[15]_i_21_n_0 ),
        .I3(\crc_imd[1]_i_4_0 ),
        .I4(AXIS_tdata[16]),
        .O(\crc_imd[15]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[15]_i_42 
       (.I0(\crc_imd_reg[1]_0 ),
        .I1(\crc_imd[15]_i_67_n_0 ),
        .I2(\crc_imd[15]_i_77_n_0 ),
        .I3(\crc_imd[15]_i_78_n_0 ),
        .I4(\crc_imd[1]_i_18_n_0 ),
        .I5(\crc_imd[15]_i_79_n_0 ),
        .O(\crc_imd[15]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'h4F44B0BBB0BB4F44)) 
    \crc_imd[15]_i_47 
       (.I0(stateOp_reg),
        .I1(recvAXIS_tdata[0]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [0]),
        .I4(\retbuf_reg[15][7] [8]),
        .I5(\crc_imd[1]_i_9_n_0 ),
        .O(\crc_imd[15]_i_47_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2024" *) 
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[15]_i_48 
       (.I0(\sendAXIL_rdata_reg[63]_0 [8]),
        .I1(\crc_imd_reg[4] ),
        .I2(rxAXIS_tdata[8]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [0]),
        .O(\crc_imd[15]_i_48_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[15]_i_51 
       (.I0(AXIS_tdata[24]),
        .I1(\crc_imd[1]_i_22_n_0 ),
        .I2(\crc_imd[1]_i_21_n_0 ),
        .I3(\crc_imd[11]_i_18_n_0 ),
        .I4(AXIS_tdata[32]),
        .I5(\crc_imd[1]_i_14_n_0 ),
        .O(\crc_imd[15]_i_51_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[15]_i_52 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[59]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [59]),
        .O(AXIS_tdata[59]));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[15]_i_53 
       (.I0(\sendAXIL_rdata_reg[63]_0 [58]),
        .I1(rxAXIS_tdata[58]),
        .I2(\sendAXIL_rdata_reg[63]_0 [57]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[57]),
        .I5(stateOp_reg),
        .O(\crc_imd[15]_i_53_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[15]_i_54 
       (.I0(\sendAXIL_rdata_reg[63]_0 [61]),
        .I1(rxAXIS_tdata[61]),
        .I2(\sendAXIL_rdata_reg[63]_0 [60]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[60]),
        .I5(stateOp_reg),
        .O(\crc_imd[15]_i_54_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2031" *) 
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[15]_i_55 
       (.I0(\sendAXIL_rdata_reg[63]_0 [3]),
        .I1(\crc_imd_reg[4] ),
        .I2(rxAXIS_tdata[3]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [11]),
        .O(\crc_imd[15]_i_55_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[15]_i_56 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[20]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [20]),
        .O(AXIS_tdata[20]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[15]_i_57 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[54]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [54]),
        .O(AXIS_tdata[54]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[15]_i_58 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[18]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [18]),
        .O(AXIS_tdata[18]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[15]_i_59 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[56]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [56]),
        .O(AXIS_tdata[56]));
  LUT5 #(
    .INIT(32'hFFFF9600)) 
    \crc_imd[15]_i_6 
       (.I0(\retbuf_reg[15][7] [7]),
        .I1(\crc_imd[15]_i_16_n_0 ),
        .I2(\crc_imd[15]_i_17_n_0 ),
        .I3(\crc_imd_reg[9] ),
        .I4(recvAXIS_tlast_sig_reg_0),
        .O(\crc_imd[15]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[15]_i_60 
       (.I0(AXIS_tdata[32]),
        .I1(\crc_imd[11]_i_18_n_0 ),
        .I2(\crc_imd[1]_i_21_n_0 ),
        .I3(\crc_imd[1]_i_22_n_0 ),
        .I4(AXIS_tdata[24]),
        .O(\crc_imd[15]_i_60_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[15]_i_61 
       (.I0(\sendAXIL_rdata_reg[63]_0 [37]),
        .I1(rxAXIS_tdata[37]),
        .I2(\sendAXIL_rdata_reg[63]_0 [38]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[38]),
        .I5(stateOp_reg),
        .O(\crc_imd[15]_i_61_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[15]_i_62 
       (.I0(\sendAXIL_rdata_reg[63]_0 [21]),
        .I1(rxAXIS_tdata[21]),
        .I2(\sendAXIL_rdata_reg[63]_0 [39]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[39]),
        .I5(stateOp_reg),
        .O(\crc_imd[15]_i_62_n_0 ));
  LUT6 #(
    .INIT(64'h6696669699996696)) 
    \crc_imd[15]_i_63 
       (.I0(\crc_imd[15]_i_19_n_0 ),
        .I1(\crc_imd[9]_i_12_n_0 ),
        .I2(\sendAXIL_rdata_reg[63]_0 [23]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[23]),
        .I5(stateOp_reg),
        .O(\crc_imd[15]_i_63_n_0 ));
  LUT6 #(
    .INIT(64'h6696669699996696)) 
    \crc_imd[15]_i_64 
       (.I0(AXIS_tdata[45]),
        .I1(AXIS_tdata[47]),
        .I2(\sendAXIL_rdata_reg[63]_0 [48]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[48]),
        .I5(stateOp_reg),
        .O(\crc_imd[15]_i_64_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2029" *) 
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[15]_i_65 
       (.I0(\crc_imd[15]_i_71_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [46]),
        .I2(\crc_imd_reg[4] ),
        .I3(rxAXIS_tdata[46]),
        .I4(stateOp_reg),
        .O(\crc_imd[15]_i_65_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \crc_imd[15]_i_66 
       (.I0(\crc_imd[11]_i_16_n_0 ),
        .I1(\crc_imd[13]_i_12_n_0 ),
        .O(\crc_imd[15]_i_66_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2111" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \crc_imd[15]_i_67 
       (.I0(\crc_imd[9]_i_16_n_0 ),
        .I1(\crc_imd[15]_i_75_n_0 ),
        .O(\crc_imd[15]_i_67_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[15]_i_68 
       (.I0(\crc_imd[15]_i_73_n_0 ),
        .I1(\crc_imd[15]_i_55_n_0 ),
        .I2(\crc_imd[1]_i_9_n_0 ),
        .I3(\crc_imd[12]_i_3 ),
        .O(\crc_imd[15]_i_68_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[15]_i_69 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[47]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [47]),
        .O(AXIS_tdata[47]));
  LUT6 #(
    .INIT(64'h0800000800080800)) 
    \crc_imd[15]_i_7 
       (.I0(\crc_imd_reg[0] [1]),
        .I1(\crc_imd_reg[0]_0 ),
        .I2(\crc_imd_reg[0] [2]),
        .I3(\crc_imd[15]_i_18_n_0 ),
        .I4(\crc_imd[15]_i_17_n_0 ),
        .I5(\crc_imd[15]_i_19_n_0 ),
        .O(\crc_imd[15]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[15]_i_70 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[48]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [48]),
        .O(AXIS_tdata[48]));
  LUT6 #(
    .INIT(64'h6696669699996696)) 
    \crc_imd[15]_i_71 
       (.I0(\crc_imd[5]_i_8_n_0 ),
        .I1(\crc_imd[6]_i_11_n_0 ),
        .I2(\sendAXIL_rdata_reg[63]_0 [40]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[40]),
        .I5(stateOp_reg),
        .O(\crc_imd[15]_i_71_n_0 ));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[15]_i_72 
       (.I0(AXIS_tdata[22]),
        .I1(\crc_imd[1]_i_8_n_0 ),
        .I2(AXIS_tdata[23]),
        .I3(\crc_imd[9]_i_12_n_0 ),
        .I4(\crc_imd[15]_i_19_n_0 ),
        .O(\crc_imd[15]_i_72_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2016" *) 
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[15]_i_73 
       (.I0(\sendAXIL_rdata_reg[63]_0 [2]),
        .I1(\crc_imd_reg[4] ),
        .I2(rxAXIS_tdata[2]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [10]),
        .O(\crc_imd[15]_i_73_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[15]_i_74 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[38]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [38]),
        .O(AXIS_tdata[38]));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[15]_i_75 
       (.I0(\sendAXIL_rdata_reg[63]_0 [17]),
        .I1(rxAXIS_tdata[17]),
        .I2(\sendAXIL_rdata_reg[63]_0 [18]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[18]),
        .I5(stateOp_reg),
        .O(\crc_imd[15]_i_75_n_0 ));
  LUT6 #(
    .INIT(64'h4F44B0BBB0BB4F44)) 
    \crc_imd[15]_i_77 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[24]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [24]),
        .I4(\crc_imd[1]_i_22_n_0 ),
        .I5(\crc_imd[1]_i_21_n_0 ),
        .O(\crc_imd[15]_i_77_n_0 ));
  LUT6 #(
    .INIT(64'h6966999969666966)) 
    \crc_imd[15]_i_78 
       (.I0(\crc_imd[15]_i_47_n_0 ),
        .I1(\retbuf_reg[15][7] [10]),
        .I2(stateOp_reg),
        .I3(rxAXIS_tdata[2]),
        .I4(\crc_imd_reg[4] ),
        .I5(\sendAXIL_rdata_reg[63]_0 [2]),
        .O(\crc_imd[15]_i_78_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2019" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[15]_i_79 
       (.I0(\crc_imd_reg[1]_1 ),
        .I1(\crc_imd[15]_i_21_n_0 ),
        .I2(\crc_imd[1]_i_15_n_0 ),
        .O(\crc_imd[15]_i_79_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[15]_i_8 
       (.I0(\crc_imd_reg[0]_2 ),
        .I1(\crc_imd[15]_i_21_n_0 ),
        .I2(\crc_imd[15]_i_22_n_0 ),
        .I3(\crc_imd[15]_i_23_n_0 ),
        .I4(AXIS_tdata[30]),
        .I5(\txAXIS_tdata_reg[13] ),
        .O(\crc_imd[15]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[15]_i_9 
       (.I0(\crc_imd_reg[8]_1 ),
        .I1(\crc_imd[15]_i_27_n_0 ),
        .I2(\crc_imd[15]_i_28_n_0 ),
        .I3(\crc_imd[15]_i_29_n_0 ),
        .I4(\crc_imd[15]_i_30_n_0 ),
        .I5(\crc_imd[15]_i_31_n_0 ),
        .O(\crc_imd[15]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \crc_imd[1]_i_1 
       (.I0(\crc_imd[1]_i_2_n_0 ),
        .I1(\crc_imd[1]_i_3_n_0 ),
        .I2(\crc_imd[1]_i_4_n_0 ),
        .I3(\crc_imd[1]_i_5_n_0 ),
        .I4(\crc_imd[1]_i_6_n_0 ),
        .I5(\crc_imd[1]_i_7_n_0 ),
        .O(\crc_imd_reg[7]_1 [1]));
  LUT6 #(
    .INIT(64'h65AA65659A559A9A)) 
    \crc_imd[1]_i_10 
       (.I0(\retbuf_reg[15][7] [11]),
        .I1(stateOp_reg),
        .I2(rxAXIS_tdata[3]),
        .I3(\crc_imd_reg[4] ),
        .I4(\sendAXIL_rdata_reg[63]_0 [3]),
        .I5(\crc_imd[15]_i_73_n_0 ),
        .O(\crc_imd[1]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h65AA65659A559A9A)) 
    \crc_imd[1]_i_12 
       (.I0(\crc_imd[1]_i_24_n_0 ),
        .I1(stateOp_reg),
        .I2(recvAXIS_tdata[5]),
        .I3(\crc_imd_reg[4] ),
        .I4(\sendAXIL_rdata_reg[63]_0 [15]),
        .I5(\retbuf_reg[15][7] [7]),
        .O(\crc_imd[1]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6966999969666966)) 
    \crc_imd[1]_i_13 
       (.I0(\crc_imd[9]_i_12_n_0 ),
        .I1(\retbuf_reg[15][7] [14]),
        .I2(stateOp_reg),
        .I3(rxAXIS_tdata[6]),
        .I4(\crc_imd_reg[4] ),
        .I5(\sendAXIL_rdata_reg[63]_0 [6]),
        .O(\crc_imd[1]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[1]_i_14 
       (.I0(\sendAXIL_rdata_reg[63]_0 [36]),
        .I1(rxAXIS_tdata[36]),
        .I2(\sendAXIL_rdata_reg[63]_0 [35]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[35]),
        .I5(stateOp_reg),
        .O(\crc_imd[1]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h65AA65659A559A9A)) 
    \crc_imd[1]_i_15 
       (.I0(AXIS_tdata[30]),
        .I1(stateOp_reg),
        .I2(rxAXIS_tdata[29]),
        .I3(\crc_imd_reg[4] ),
        .I4(\sendAXIL_rdata_reg[63]_0 [29]),
        .I5(\crc_imd[15]_i_22_n_0 ),
        .O(\crc_imd[1]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[1]_i_16 
       (.I0(\crc_imd[6]_i_12_n_0 ),
        .I1(\crc_imd[11]_i_18_n_0 ),
        .I2(\crc_imd[0]_i_15_n_0 ),
        .I3(\crc_imd[9]_i_13_n_0 ),
        .I4(\crc_imd[7]_i_17_n_0 ),
        .I5(\crc_imd[1]_i_4_0 ),
        .O(\crc_imd[1]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[1]_i_17 
       (.I0(\crc_imd[15]_i_28_n_0 ),
        .I1(\crc_imd[15]_i_79_n_0 ),
        .I2(\crc_imd[15]_i_66_n_0 ),
        .I3(\crc_imd[1]_i_27_n_0 ),
        .I4(\crc_imd[8]_i_19_n_0 ),
        .I5(\crc_imd[15]_i_64_n_0 ),
        .O(\crc_imd[1]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2026" *) 
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[1]_i_18 
       (.I0(\crc_imd[15]_i_63_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [22]),
        .I2(\crc_imd_reg[4] ),
        .I3(rxAXIS_tdata[22]),
        .I4(stateOp_reg),
        .O(\crc_imd[1]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[1]_i_19 
       (.I0(\crc_imd[15]_i_35_n_0 ),
        .I1(\crc_imd[15]_i_33_n_0 ),
        .I2(\crc_imd[14]_i_5 ),
        .I3(AXIS_tdata[45]),
        .I4(\crc_imd[15]_i_21_n_0 ),
        .I5(\crc_imd[15]_i_22_n_0 ),
        .O(\crc_imd[1]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF69960000)) 
    \crc_imd[1]_i_2 
       (.I0(\crc_imd[1]_i_8_n_0 ),
        .I1(\crc_imd[1]_i_9_n_0 ),
        .I2(\crc_imd[1]_i_10_n_0 ),
        .I3(\crc_imd[15]_i_16_n_0 ),
        .I4(\crc_imd_reg[9] ),
        .I5(recvAXIS_tlast_sig_reg_0),
        .O(\crc_imd[1]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[1]_i_20 
       (.I0(\crc_imd[1]_i_8_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [22]),
        .I2(\crc_imd_reg[4] ),
        .I3(rxAXIS_tdata[22]),
        .I4(stateOp_reg),
        .O(\crc_imd[1]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[1]_i_21 
       (.I0(\sendAXIL_rdata_reg[63]_0 [16]),
        .I1(rxAXIS_tdata[16]),
        .I2(\sendAXIL_rdata_reg[63]_0 [31]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[31]),
        .I5(stateOp_reg),
        .O(\crc_imd[1]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[1]_i_22 
       (.I0(\sendAXIL_rdata_reg[63]_0 [25]),
        .I1(rxAXIS_tdata[25]),
        .I2(\sendAXIL_rdata_reg[63]_0 [26]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[26]),
        .I5(stateOp_reg),
        .O(\crc_imd[1]_i_22_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2015" *) 
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[1]_i_23 
       (.I0(\crc_imd[15]_i_79_n_0 ),
        .I1(\crc_imd[1]_i_10_n_0 ),
        .I2(\crc_imd[15]_i_47_n_0 ),
        .I3(\crc_imd[9]_i_16_n_0 ),
        .I4(\crc_imd[15]_i_75_n_0 ),
        .O(\crc_imd[1]_i_23_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2021" *) 
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[1]_i_24 
       (.I0(\sendAXIL_rdata_reg[63]_0 [14]),
        .I1(\crc_imd_reg[4] ),
        .I2(rxAXIS_tdata[14]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [6]),
        .O(\crc_imd[1]_i_24_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[1]_i_25 
       (.I0(\crc_imd[1]_i_20_n_0 ),
        .I1(\crc_imd[15]_i_63_n_0 ),
        .I2(\crc_imd[15]_i_67_n_0 ),
        .I3(\crc_imd[15]_i_47_n_0 ),
        .I4(\crc_imd[1]_i_10_n_0 ),
        .I5(AXIS_tdata[21]),
        .O(\crc_imd[1]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[1]_i_26 
       (.I0(\crc_imd[15]_i_38_n_0 ),
        .I1(\crc_imd[1]_i_28_n_0 ),
        .I2(\crc_imd[1]_i_29_n_0 ),
        .I3(\crc_imd[15]_i_19_n_0 ),
        .I4(AXIS_tdata[23]),
        .I5(\crc_imd[15]_i_51_n_0 ),
        .O(\myCrc/crc_imd0132_out ));
  LUT6 #(
    .INIT(64'h65AA65659A559A9A)) 
    \crc_imd[1]_i_27 
       (.I0(\crc_imd[15]_i_75_n_0 ),
        .I1(stateOp_reg),
        .I2(recvAXIS_tdata[0]),
        .I3(\crc_imd_reg[4] ),
        .I4(\sendAXIL_rdata_reg[63]_0 [0]),
        .I5(\retbuf_reg[15][7] [8]),
        .O(\crc_imd[1]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[1]_i_28 
       (.I0(\crc_imd[15]_i_67_n_0 ),
        .I1(\crc_imd[15]_i_61_n_0 ),
        .I2(\crc_imd[1]_i_8_n_0 ),
        .I3(AXIS_tdata[46]),
        .I4(\crc_imd[15]_i_47_n_0 ),
        .I5(\crc_imd[15]_i_73_n_0 ),
        .O(\crc_imd[1]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h65AA65659A559A9A)) 
    \crc_imd[1]_i_29 
       (.I0(AXIS_tdata[44]),
        .I1(stateOp_reg),
        .I2(rxAXIS_tdata[42]),
        .I3(\crc_imd_reg[4] ),
        .I4(\sendAXIL_rdata_reg[63]_0 [42]),
        .I5(\crc_imd[5]_i_8_n_0 ),
        .O(\crc_imd[1]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[1]_i_3 
       (.I0(\crc_imd_reg[2]_0 ),
        .I1(\crc_imd_reg[1]_1 ),
        .I2(\crc_imd[1]_i_12_n_0 ),
        .I3(\crc_imd[15]_i_17_n_0 ),
        .I4(\crc_imd[1]_i_13_n_0 ),
        .I5(\crc_imd[7]_i_17_n_0 ),
        .O(\crc_imd[1]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[1]_i_4 
       (.I0(\crc_imd_reg[0]_2 ),
        .I1(\crc_imd[1]_i_14_n_0 ),
        .I2(\crc_imd[1]_i_15_n_0 ),
        .I3(\crc_imd[15]_i_35_n_0 ),
        .I4(\crc_imd[1]_i_16_n_0 ),
        .O(\crc_imd[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h90FFFF6090609060)) 
    \crc_imd[1]_i_5 
       (.I0(\crc_imd[1]_i_17_n_0 ),
        .I1(\crc_imd[1]_i_18_n_0 ),
        .I2(\crc_imd_reg[8]_1 ),
        .I3(\crc_imd[15]_i_37_n_0 ),
        .I4(\crc_imd[1]_i_19_n_0 ),
        .I5(\crc_imd_reg[2]_2 ),
        .O(\crc_imd[1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[1]_i_6 
       (.I0(\crc_imd_reg[1]_0 ),
        .I1(\crc_imd[1]_i_20_n_0 ),
        .I2(\crc_imd[1]_i_21_n_0 ),
        .I3(AXIS_tdata[21]),
        .I4(\crc_imd[1]_i_22_n_0 ),
        .I5(\crc_imd[1]_i_23_n_0 ),
        .O(\crc_imd[1]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF960096009600)) 
    \crc_imd[1]_i_7 
       (.I0(\crc_imd[1]_i_24_n_0 ),
        .I1(\crc_imd[15]_i_27_n_0 ),
        .I2(\crc_imd[1]_i_25_n_0 ),
        .I3(\crc_imd_reg[0]_1 ),
        .I4(\myCrc/crc_imd0132_out ),
        .I5(\crc_imd_reg[1] ),
        .O(\crc_imd[1]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2030" *) 
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[1]_i_8 
       (.I0(\sendAXIL_rdata_reg[63]_0 [4]),
        .I1(\crc_imd_reg[4] ),
        .I2(rxAXIS_tdata[4]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [12]),
        .O(\crc_imd[1]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2017" *) 
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[1]_i_9 
       (.I0(\sendAXIL_rdata_reg[63]_0 [1]),
        .I1(\crc_imd_reg[4] ),
        .I2(rxAXIS_tdata[1]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [9]),
        .O(\crc_imd[1]_i_9_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFEA)) 
    \crc_imd[2]_i_1 
       (.I0(\crc_imd[2]_i_2_n_0 ),
        .I1(crc_imd041_out),
        .I2(\crc_imd_reg[2]_0 ),
        .I3(\crc_imd[2]_i_4_n_0 ),
        .I4(\crc_imd_reg[2]_1 ),
        .O(\crc_imd_reg[7]_1 [2]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[2]_i_10 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[39]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [39]),
        .O(AXIS_tdata[39]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[2]_i_11 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[57]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [57]),
        .O(AXIS_tdata[57]));
  LUT6 #(
    .INIT(64'hFFFFFFFF69960000)) 
    \crc_imd[2]_i_2 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [1]),
        .I1(\recvAXIS_tdata_sig_reg[15]_0 [0]),
        .I2(\retbuf_reg[15][7] [9]),
        .I3(\retbuf_reg[15][7] [8]),
        .I4(\crc_imd_reg[9] ),
        .I5(recvAXIS_tlast_sig_reg_0),
        .O(\crc_imd[2]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[2]_i_3 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [6]),
        .I1(\crc_imd[2]_i_6_n_0 ),
        .I2(\retbuf_reg[15][7] [14]),
        .I3(AXIS_tdata[8]),
        .I4(\retbuf_reg[15][7] [0]),
        .O(crc_imd041_out));
  LUT5 #(
    .INIT(32'hFFF8F8F8)) 
    \crc_imd[2]_i_4 
       (.I0(\crc_imd_reg[2]_2 ),
        .I1(crc_imd0172_out),
        .I2(\crc_imd[2]_i_8_n_0 ),
        .I3(crc_imd0112_out),
        .I4(\crc_imd_reg[0]_2 ),
        .O(\crc_imd[2]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[2]_i_6 
       (.I0(\sendAXIL_rdata_reg[63]_0 [9]),
        .I1(\crc_imd_reg[4] ),
        .I2(rxAXIS_tdata[9]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [1]),
        .O(\crc_imd[2]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2024" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[2]_i_7 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[8]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [8]),
        .O(AXIS_tdata[8]));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[2]_i_8 
       (.I0(\crc_imd_reg[8]_1 ),
        .I1(\crc_imd[15]_i_61_n_0 ),
        .I2(\crc_imd[14]_i_22_n_0 ),
        .I3(\crc_imd[9]_i_12_n_0 ),
        .I4(\crc_imd[1]_i_20_n_0 ),
        .I5(\crc_imd[2]_i_9_n_0 ),
        .O(\crc_imd[2]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[2]_i_9 
       (.I0(AXIS_tdata[56]),
        .I1(\crc_imd[15]_i_47_n_0 ),
        .I2(AXIS_tdata[39]),
        .I3(AXIS_tdata[57]),
        .I4(AXIS_tdata[40]),
        .I5(AXIS_tdata[54]),
        .O(\crc_imd[2]_i_9_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFF888)) 
    \crc_imd[3]_i_3 
       (.I0(crc_imd042_out),
        .I1(\crc_imd_reg[2]_0 ),
        .I2(\crc_imd_reg[0]_2 ),
        .I3(crc_imd0115_out),
        .I4(\crc_imd[3]_i_5_n_0 ),
        .O(\crc_imd_reg[15] ));
  LUT6 #(
    .INIT(64'hFFFF960096009600)) 
    \crc_imd[3]_i_5 
       (.I0(\crc_imd[3]_i_6_n_0 ),
        .I1(\crc_imd[15]_i_53_n_0 ),
        .I2(\crc_imd[15]_i_61_n_0 ),
        .I3(\crc_imd_reg[8]_1 ),
        .I4(crc_imd0173_out),
        .I5(\crc_imd_reg[2]_2 ),
        .O(\crc_imd[3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[3]_i_6 
       (.I0(\crc_imd[14]_i_18_n_0 ),
        .I1(\crc_imd[3]_i_7_n_0 ),
        .I2(AXIS_tdata[24]),
        .I3(AXIS_tdata[41]),
        .I4(\crc_imd[15]_i_63_n_0 ),
        .I5(\crc_imd[1]_i_9_n_0 ),
        .O(\crc_imd[3]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[3]_i_7 
       (.I0(\sendAXIL_rdata_reg[63]_0 [55]),
        .I1(rxAXIS_tdata[55]),
        .I2(\sendAXIL_rdata_reg[63]_0 [39]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[39]),
        .I5(stateOp_reg),
        .O(\crc_imd[3]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFEA)) 
    \crc_imd[4]_i_1 
       (.I0(\crc_imd[4]_i_2_n_0 ),
        .I1(crc_imd043_out),
        .I2(\crc_imd_reg[2]_0 ),
        .I3(\crc_imd[4]_i_4_n_0 ),
        .I4(\crc_imd_reg[4]_0 ),
        .O(\crc_imd_reg[7]_1 [3]));
  LUT6 #(
    .INIT(64'hFFFFFFFF69960000)) 
    \crc_imd[4]_i_2 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [2]),
        .I1(\recvAXIS_tdata_sig_reg[15]_0 [3]),
        .I2(\retbuf_reg[15][7] [10]),
        .I3(\retbuf_reg[15][7] [11]),
        .I4(\crc_imd_reg[9] ),
        .I5(recvAXIS_tlast_sig_reg_0),
        .O(\crc_imd[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h22F2DD0DDD0D22F2)) 
    \crc_imd[4]_i_3 
       (.I0(\sendAXIL_rdata_reg[63]_0 [11]),
        .I1(\crc_imd_reg[4] ),
        .I2(recvAXIS_tdata[3]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [3]),
        .I5(\crc_imd[4]_i_6_n_0 ),
        .O(crc_imd043_out));
  LUT5 #(
    .INIT(32'hFFF8F8F8)) 
    \crc_imd[4]_i_4 
       (.I0(\crc_imd_reg[2]_2 ),
        .I1(crc_imd0174_out),
        .I2(\crc_imd[4]_i_7_n_0 ),
        .I3(crc_imd0118_out),
        .I4(\crc_imd_reg[0]_2 ),
        .O(\crc_imd[4]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[4]_i_6 
       (.I0(\sendAXIL_rdata_reg[63]_0 [10]),
        .I1(\crc_imd_reg[4] ),
        .I2(recvAXIS_tdata[2]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [2]),
        .O(\crc_imd[4]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[4]_i_7 
       (.I0(\crc_imd_reg[8]_1 ),
        .I1(\crc_imd[1]_i_10_n_0 ),
        .I2(\crc_imd[8]_i_19_n_0 ),
        .I3(\crc_imd[15]_i_19_n_0 ),
        .I4(\crc_imd[4]_i_8_n_0 ),
        .I5(\crc_imd[11]_i_13_n_0 ),
        .O(\crc_imd[4]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[4]_i_8 
       (.I0(AXIS_tdata[42]),
        .I1(AXIS_tdata[40]),
        .I2(AXIS_tdata[58]),
        .I3(AXIS_tdata[59]),
        .I4(AXIS_tdata[38]),
        .I5(AXIS_tdata[24]),
        .O(\crc_imd[4]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[4]_i_9 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[58]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [58]),
        .O(AXIS_tdata[58]));
  LUT6 #(
    .INIT(64'hFFFFFFFF69960000)) 
    \crc_imd[5]_i_2 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [4]),
        .I1(\recvAXIS_tdata_sig_reg[15]_0 [3]),
        .I2(\retbuf_reg[15][7] [12]),
        .I3(\retbuf_reg[15][7] [11]),
        .I4(\crc_imd_reg[9] ),
        .I5(recvAXIS_tlast_sig_reg_0),
        .O(\crc_imd_reg[12] ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[5]_i_6 
       (.I0(\crc_imd[11]_i_12_n_0 ),
        .I1(\crc_imd[1]_i_8_n_0 ),
        .I2(\crc_imd[6]_i_12_n_0 ),
        .I3(\crc_imd[5]_i_7_n_0 ),
        .I4(\crc_imd[13]_i_14_n_0 ),
        .I5(\crc_imd[5]_i_8_n_0 ),
        .O(crc_imd0198_out));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[5]_i_7 
       (.I0(\sendAXIL_rdata_reg[63]_0 [60]),
        .I1(rxAXIS_tdata[60]),
        .I2(\sendAXIL_rdata_reg[63]_0 [59]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[59]),
        .I5(stateOp_reg),
        .O(\crc_imd[5]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[5]_i_8 
       (.I0(\sendAXIL_rdata_reg[63]_0 [43]),
        .I1(rxAXIS_tdata[43]),
        .I2(\sendAXIL_rdata_reg[63]_0 [41]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[41]),
        .I5(stateOp_reg),
        .O(\crc_imd[5]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h6966999969666966)) 
    \crc_imd[6]_i_10 
       (.I0(\crc_imd[1]_i_20_n_0 ),
        .I1(\retbuf_reg[15][7] [13]),
        .I2(stateOp_reg),
        .I3(rxAXIS_tdata[5]),
        .I4(\crc_imd_reg[4] ),
        .I5(\sendAXIL_rdata_reg[63]_0 [5]),
        .O(\crc_imd[6]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[6]_i_11 
       (.I0(\sendAXIL_rdata_reg[63]_0 [42]),
        .I1(rxAXIS_tdata[42]),
        .I2(\sendAXIL_rdata_reg[63]_0 [44]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[44]),
        .I5(stateOp_reg),
        .O(\crc_imd[6]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2018" *) 
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[6]_i_12 
       (.I0(\crc_imd[1]_i_22_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [24]),
        .I2(\crc_imd_reg[4] ),
        .I3(rxAXIS_tdata[24]),
        .I4(stateOp_reg),
        .O(\crc_imd[6]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF69960000)) 
    \crc_imd[6]_i_2 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [5]),
        .I1(\recvAXIS_tdata_sig_reg[15]_0 [4]),
        .I2(\retbuf_reg[15][7] [12]),
        .I3(\retbuf_reg[15][7] [13]),
        .I4(\crc_imd_reg[9] ),
        .I5(recvAXIS_tlast_sig_reg_0),
        .O(\crc_imd_reg[12]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2020" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[6]_i_7 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[13]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [13]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [10]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[6]_i_8 
       (.I0(stateOp_reg),
        .I1(recvAXIS_tdata[4]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [12]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [9]));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[6]_i_9 
       (.I0(\crc_imd[15]_i_54_n_0 ),
        .I1(\crc_imd[6]_i_10_n_0 ),
        .I2(\crc_imd[12]_i_3_0 ),
        .I3(AXIS_tdata[27]),
        .I4(\crc_imd[6]_i_11_n_0 ),
        .I5(\crc_imd[6]_i_12_n_0 ),
        .O(crc_imd0200_out));
  LUT6 #(
    .INIT(64'hFFFFFFFF69960000)) 
    \crc_imd[7]_i_10 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [5]),
        .I1(\recvAXIS_tdata_sig_reg[15]_0 [6]),
        .I2(\retbuf_reg[15][7] [13]),
        .I3(\retbuf_reg[15][7] [14]),
        .I4(\crc_imd_reg[9] ),
        .I5(recvAXIS_tlast_sig_reg_0),
        .O(\crc_imd_reg[13] ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[7]_i_11 
       (.I0(\sendAXIL_rdata_reg[63]_0 [29]),
        .I1(rxAXIS_tdata[29]),
        .I2(\sendAXIL_rdata_reg[63]_0 [30]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[30]),
        .I5(stateOp_reg),
        .O(\crc_imd[7]_i_11_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[7]_i_12 
       (.I0(stateOp_reg),
        .I1(recvAXIS_tdata[3]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [11]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [8]));
  (* SOFT_HLUTNM = "soft_lutpair2026" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[7]_i_13 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[22]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [22]),
        .O(AXIS_tdata[22]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[7]_i_14 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[21]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [21]),
        .O(AXIS_tdata[21]));
  (* SOFT_HLUTNM = "soft_lutpair2023" *) 
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[7]_i_16 
       (.I0(\sendAXIL_rdata_reg[63]_0 [7]),
        .I1(\crc_imd_reg[4] ),
        .I2(recvAXIS_tdata[1]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [15]),
        .O(\crc_imd[7]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h4F44B0BBB0BB4F44)) 
    \crc_imd[7]_i_17 
       (.I0(stateOp_reg),
        .I1(recvAXIS_tdata[2]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [10]),
        .I4(\retbuf_reg[15][7] [2]),
        .I5(\crc_imd[2]_i_6_n_0 ),
        .O(\crc_imd[7]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[7]_i_18 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[29]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [29]),
        .O(AXIS_tdata[29]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[7]_i_19 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[27]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [27]),
        .O(AXIS_tdata[27]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[7]_i_20 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[45]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [45]),
        .O(AXIS_tdata[45]));
  (* SOFT_HLUTNM = "soft_lutpair2029" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[7]_i_21 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[46]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [46]),
        .O(AXIS_tdata[46]));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[7]_i_22 
       (.I0(\crc_imd[15]_i_67_n_0 ),
        .I1(\crc_imd[0]_i_12_n_0 ),
        .I2(AXIS_tdata[35]),
        .I3(AXIS_tdata[37]),
        .I4(\crc_imd[15]_i_41_0 ),
        .I5(\crc_imd[15]_i_55_n_0 ),
        .O(crc_imd0165_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[7]_i_23 
       (.I0(\crc_imd[0]_i_8_n_0 ),
        .I1(AXIS_tdata[43]),
        .I2(AXIS_tdata[45]),
        .I3(\crc_imd[7]_i_25_n_0 ),
        .I4(\crc_imd[15]_i_63_n_0 ),
        .I5(\crc_imd[1]_i_22_n_0 ),
        .O(crc_imd0202_out));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[7]_i_24 
       (.I0(\crc_imd[1]_i_10_n_0 ),
        .I1(\crc_imd[15]_i_61_n_0 ),
        .I2(AXIS_tdata[19]),
        .I3(AXIS_tdata[21]),
        .I4(\crc_imd[1]_i_9_n_0 ),
        .I5(\crc_imd[1]_i_8_n_0 ),
        .O(crc_imd0100_out));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[7]_i_25 
       (.I0(\sendAXIL_rdata_reg[63]_0 [62]),
        .I1(rxAXIS_tdata[62]),
        .I2(\sendAXIL_rdata_reg[63]_0 [61]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[61]),
        .I5(stateOp_reg),
        .O(\crc_imd[7]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[7]_i_3 
       (.I0(\crc_imd_reg[1]_0 ),
        .I1(\retbuf_reg[15][7] [3]),
        .I2(\crc_imd[7]_i_11_n_0 ),
        .I3(\txAXIS_tdata_reg[13] ),
        .I4(\recvAXIS_tdata_sig_reg[15]_0 [8]),
        .O(\crc_imd_reg[3] ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[7]_i_4 
       (.I0(\crc_imd_reg[0]_1 ),
        .I1(\retbuf_reg[15][7] [11]),
        .I2(\recvAXIS_tdata_sig_reg[15]_0 [3]),
        .I3(AXIS_tdata[22]),
        .I4(\crc_imd[9]_i_12_n_0 ),
        .I5(AXIS_tdata[21]),
        .O(\crc_imd_reg[11] ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[7]_i_6 
       (.I0(\crc_imd[7]_i_16_n_0 ),
        .I1(\crc_imd[7]_i_17_n_0 ),
        .I2(AXIS_tdata[29]),
        .I3(AXIS_tdata[27]),
        .I4(AXIS_tdata[45]),
        .I5(AXIS_tdata[46]),
        .O(\txAXIS_tdata_reg[7] ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[7]_i_9 
       (.I0(\sendAXIL_rdata_reg[63]_0 [14]),
        .I1(rxAXIS_tdata[14]),
        .I2(\sendAXIL_rdata_reg[63]_0 [13]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[13]),
        .I5(stateOp_reg),
        .O(p_136_in));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \crc_imd[8]_i_1 
       (.I0(\crc_imd_reg[8] ),
        .I1(recvAXIS_tlast_sig_reg_0),
        .I2(\crc_imd_reg[8]_0 ),
        .I3(\crc_imd[8]_i_4_n_0 ),
        .I4(\crc_imd[8]_i_5_n_0 ),
        .O(\crc_imd_reg[7]_1 [4]));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[8]_i_10 
       (.I0(\crc_imd[14]_i_5 ),
        .I1(\crc_imd[15]_i_22_n_0 ),
        .I2(AXIS_tdata[44]),
        .I3(AXIS_tdata[29]),
        .I4(\crc_imd[9]_i_13_n_0 ),
        .I5(AXIS_tdata[46]),
        .O(\crc_imd[8]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[8]_i_11 
       (.I0(\sendAXIL_rdata_reg[63]_0 [63]),
        .I1(rxAXIS_tdata[63]),
        .I2(\sendAXIL_rdata_reg[63]_0 [62]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[62]),
        .I5(stateOp_reg),
        .O(\crc_imd[8]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2025" *) 
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[8]_i_12 
       (.I0(\crc_imd[15]_i_19_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [26]),
        .I2(\crc_imd_reg[4] ),
        .I3(rxAXIS_tdata[26]),
        .I4(stateOp_reg),
        .O(\crc_imd[8]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[8]_i_13 
       (.I0(\crc_imd_reg[0]_2 ),
        .I1(\crc_imd[9]_i_12_n_0 ),
        .I2(\crc_imd[1]_i_20_n_0 ),
        .I3(\crc_imd[8]_i_19_n_0 ),
        .I4(\crc_imd[1]_i_10_n_0 ),
        .I5(AXIS_tdata[38]),
        .O(\crc_imd[8]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[8]_i_14 
       (.I0(\crc_imd[12]_i_3_0 ),
        .I1(\crc_imd_reg[1]_1 ),
        .I2(AXIS_tdata[30]),
        .I3(AXIS_tdata[28]),
        .I4(AXIS_tdata[47]),
        .I5(AXIS_tdata[46]),
        .O(\myCrc/crc_imd0135_out ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[8]_i_15 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [4]),
        .I1(\recvAXIS_tdata_sig_reg[15]_0 [6]),
        .I2(AXIS_tdata[22]),
        .I3(AXIS_tdata[23]),
        .I4(\retbuf_reg[15][7] [12]),
        .I5(\retbuf_reg[15][7] [14]),
        .O(\myCrc/p_31_out ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[8]_i_16 
       (.I0(\crc_imd_reg[1]_0 ),
        .I1(AXIS_tdata[30]),
        .I2(AXIS_tdata[31]),
        .I3(\retbuf_reg[15][7] [4]),
        .I4(\recvAXIS_tdata_sig_reg[15]_0 [9]),
        .I5(\crc_imd[1]_i_24_n_0 ),
        .O(\crc_imd[8]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[8]_i_17 
       (.I0(\crc_imd[1]_i_8_n_0 ),
        .I1(\crc_imd[12]_i_3 ),
        .I2(AXIS_tdata[54]),
        .I3(AXIS_tdata[38]),
        .I4(AXIS_tdata[55]),
        .I5(AXIS_tdata[21]),
        .O(\crc_imd[8]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[8]_i_18 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[44]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [44]),
        .O(AXIS_tdata[44]));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[8]_i_19 
       (.I0(\sendAXIL_rdata_reg[63]_0 [20]),
        .I1(rxAXIS_tdata[20]),
        .I2(\sendAXIL_rdata_reg[63]_0 [39]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[39]),
        .I5(stateOp_reg),
        .O(\crc_imd[8]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFEAAEAEEA)) 
    \crc_imd[8]_i_4 
       (.I0(\crc_imd[8]_i_9_n_0 ),
        .I1(\crc_imd_reg[8]_1 ),
        .I2(\crc_imd[8]_i_10_n_0 ),
        .I3(\crc_imd[8]_i_11_n_0 ),
        .I4(\crc_imd[8]_i_12_n_0 ),
        .I5(\crc_imd[8]_i_13_n_0 ),
        .O(\crc_imd[8]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFF888)) 
    \crc_imd[8]_i_5 
       (.I0(\crc_imd_reg[1] ),
        .I1(\myCrc/crc_imd0135_out ),
        .I2(\crc_imd_reg[0]_1 ),
        .I3(\myCrc/p_31_out ),
        .I4(\crc_imd[8]_i_16_n_0 ),
        .O(\crc_imd[8]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2023" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[8]_i_6 
       (.I0(stateOp_reg),
        .I1(recvAXIS_tdata[1]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [7]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2027" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[8]_i_7 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[6]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [6]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2021" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[8]_i_8 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[14]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [14]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [11]));
  (* SOFT_HLUTNM = "soft_lutpair2111" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \crc_imd[8]_i_9 
       (.I0(\crc_imd_reg[2]_2 ),
        .I1(\crc_imd[8]_i_17_n_0 ),
        .I2(\crc_imd[9]_i_16_n_0 ),
        .I3(\crc_imd[14]_i_22_n_0 ),
        .O(\crc_imd[8]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFF8)) 
    \crc_imd[9]_i_1 
       (.I0(p_10_out),
        .I1(\crc_imd_reg[9] ),
        .I2(recvAXIS_tlast_sig_reg_0),
        .I3(\crc_imd[9]_i_3_n_0 ),
        .I4(\crc_imd[9]_i_4_n_0 ),
        .I5(\crc_imd[9]_i_5_n_0 ),
        .O(\crc_imd_reg[7]_1 [5]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[9]_i_10 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[16]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [16]),
        .O(AXIS_tdata[16]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[9]_i_11 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[23]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [23]),
        .O(AXIS_tdata[23]));
  (* SOFT_HLUTNM = "soft_lutpair2028" *) 
  LUT5 #(
    .INIT(32'hDD0D22F2)) 
    \crc_imd[9]_i_12 
       (.I0(\sendAXIL_rdata_reg[63]_0 [5]),
        .I1(\crc_imd_reg[4] ),
        .I2(rxAXIS_tdata[5]),
        .I3(stateOp_reg),
        .I4(\retbuf_reg[15][7] [13]),
        .O(\crc_imd[9]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6966999969666966)) 
    \crc_imd[9]_i_13 
       (.I0(\crc_imd[15]_i_48_n_0 ),
        .I1(\retbuf_reg[15][7] [15]),
        .I2(stateOp_reg),
        .I3(recvAXIS_tdata[1]),
        .I4(\crc_imd_reg[4] ),
        .I5(\sendAXIL_rdata_reg[63]_0 [7]),
        .O(\crc_imd[9]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[9]_i_14 
       (.I0(\crc_imd[1]_i_24_n_0 ),
        .I1(\crc_imd_reg[1]_1 ),
        .I2(AXIS_tdata[31]),
        .I3(AXIS_tdata[29]),
        .I4(AXIS_tdata[47]),
        .I5(AXIS_tdata[32]),
        .O(\myCrc/p_29_out ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[9]_i_15 
       (.I0(\crc_imd[9]_i_12_n_0 ),
        .I1(\crc_imd[1]_i_9_n_0 ),
        .I2(AXIS_tdata[37]),
        .I3(AXIS_tdata[22]),
        .I4(AXIS_tdata[55]),
        .I5(AXIS_tdata[40]),
        .O(\crc_imd[9]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h005A005A3311CC1E)) 
    \crc_imd[9]_i_16 
       (.I0(\sendAXIL_rdata_reg[63]_0 [19]),
        .I1(rxAXIS_tdata[19]),
        .I2(\sendAXIL_rdata_reg[63]_0 [20]),
        .I3(\crc_imd_reg[4] ),
        .I4(rxAXIS_tdata[20]),
        .I5(stateOp_reg),
        .O(\crc_imd[9]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[9]_i_17 
       (.I0(\crc_imd_reg[8]_1 ),
        .I1(\crc_imd[15]_i_64_n_0 ),
        .I2(\crc_imd[1]_i_15_n_0 ),
        .I3(\crc_imd[13]_i_14_n_0 ),
        .I4(AXIS_tdata[63]),
        .I5(\txAXIS_tdata_reg[13] ),
        .O(\crc_imd[9]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[9]_i_18 
       (.I0(\crc_imd_reg[0]_2 ),
        .I1(\crc_imd[15]_i_55_n_0 ),
        .I2(\crc_imd[15]_i_62_n_0 ),
        .I3(\crc_imd[15]_i_63_n_0 ),
        .I4(\crc_imd[1]_i_8_n_0 ),
        .I5(AXIS_tdata[24]),
        .O(\crc_imd[9]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2032" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[9]_i_19 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[55]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [55]),
        .O(AXIS_tdata[55]));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[9]_i_20 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[63]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [63]),
        .O(AXIS_tdata[63]));
  LUT6 #(
    .INIT(64'hFFFFFFFF69960000)) 
    \crc_imd[9]_i_3 
       (.I0(\recvAXIS_tdata_sig_reg[15]_0 [0]),
        .I1(\recvAXIS_tdata_sig_reg[15]_0 [12]),
        .I2(\retbuf_reg[15][7] [8]),
        .I3(\retbuf_reg[15][7] [7]),
        .I4(\crc_imd_reg[2]_0 ),
        .I5(\crc_imd[9]_i_8_n_0 ),
        .O(\crc_imd[9]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[9]_i_4 
       (.I0(\crc_imd_reg[1]_0 ),
        .I1(\retbuf_reg[15][7] [7]),
        .I2(\recvAXIS_tdata_sig_reg[15]_0 [12]),
        .I3(AXIS_tdata[31]),
        .I4(\txAXIS_tdata_reg[13] ),
        .I5(AXIS_tdata[16]),
        .O(\crc_imd[9]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF960096009600)) 
    \crc_imd[9]_i_5 
       (.I0(AXIS_tdata[23]),
        .I1(\crc_imd[9]_i_12_n_0 ),
        .I2(\crc_imd[9]_i_13_n_0 ),
        .I3(\crc_imd_reg[0]_1 ),
        .I4(\myCrc/p_29_out ),
        .I5(\crc_imd_reg[1] ),
        .O(\crc_imd[9]_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[9]_i_7 
       (.I0(stateOp_reg),
        .I1(recvAXIS_tdata[5]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [15]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [12]));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF8228)) 
    \crc_imd[9]_i_8 
       (.I0(\crc_imd_reg[2]_2 ),
        .I1(\crc_imd[9]_i_15_n_0 ),
        .I2(\crc_imd[9]_i_16_n_0 ),
        .I3(\crc_imd[15]_i_62_n_0 ),
        .I4(\crc_imd[9]_i_17_n_0 ),
        .I5(\crc_imd[9]_i_18_n_0 ),
        .O(\crc_imd[9]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \crc_imd[9]_i_9 
       (.I0(stateOp_reg),
        .I1(rxAXIS_tdata[31]),
        .I2(\crc_imd_reg[4] ),
        .I3(\sendAXIL_rdata_reg[63]_0 [31]),
        .O(AXIS_tdata[31]));
  (* SOFT_HLUTNM = "soft_lutpair2129" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \i[0]_i_1__11 
       (.I0(i[0]),
        .I1(\i[15]_i_5_n_0 ),
        .O(\i[0]_i_1__11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2046" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \i[10]_i_1__2 
       (.I0(i[9]),
        .I1(\i[12]_i_2_n_0 ),
        .I2(i[10]),
        .I3(\i[15]_i_5_n_0 ),
        .O(\i[10]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2046" *) 
  LUT5 #(
    .INIT(32'h14444444)) 
    \i[11]_i_1__1 
       (.I0(\i[15]_i_5_n_0 ),
        .I1(i[11]),
        .I2(i[10]),
        .I3(i[9]),
        .I4(\i[12]_i_2_n_0 ),
        .O(\i[11]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h000000007FFF8000)) 
    \i[12]_i_1__1 
       (.I0(i[11]),
        .I1(i[10]),
        .I2(i[9]),
        .I3(\i[12]_i_2_n_0 ),
        .I4(i[12]),
        .I5(\i[15]_i_5_n_0 ),
        .O(\i[12]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2132" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \i[12]_i_2 
       (.I0(i[8]),
        .I1(i[7]),
        .I2(\i[9]_i_2__3_n_0 ),
        .I3(i[6]),
        .O(\i[12]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2129" *) 
  LUT4 #(
    .INIT(16'h1444)) 
    \i[13]_i_1__1 
       (.I0(\i[15]_i_5_n_0 ),
        .I1(i[13]),
        .I2(\i[13]_i_2__1_n_0 ),
        .I3(i[12]),
        .O(\i[13]_i_1__1_n_0 ));
  LUT4 #(
    .INIT(16'h8000)) 
    \i[13]_i_2__1 
       (.I0(i[11]),
        .I1(i[10]),
        .I2(i[9]),
        .I3(\i[12]_i_2_n_0 ),
        .O(\i[13]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2130" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \i[14]_i_1 
       (.I0(\i[15]_i_4_n_0 ),
        .I1(i[14]),
        .I2(\i[15]_i_5_n_0 ),
        .O(\i[14]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00F0F1FFFFFFFFFF)) 
    \i[15]_i_1 
       (.I0(sendStrbToStop_reg_n_0),
        .I1(recvStrbToStop_reg_n_0),
        .I2(\i[15]_i_3_n_0 ),
        .I3(stateTo[1]),
        .I4(stateTo[0]),
        .I5(req),
        .O(\i[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2130" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \i[15]_i_2 
       (.I0(i[14]),
        .I1(\i[15]_i_4_n_0 ),
        .I2(i[15]),
        .I3(\i[15]_i_5_n_0 ),
        .O(\i[15]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2131" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \i[15]_i_3 
       (.I0(recvStrbToStart_reg_n_0),
        .I1(sendStrbToStart_reg_n_0),
        .O(\i[15]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \i[15]_i_4 
       (.I0(i[13]),
        .I1(i[11]),
        .I2(i[10]),
        .I3(i[9]),
        .I4(\i[12]_i_2_n_0 ),
        .I5(i[12]),
        .O(\i[15]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2131" *) 
  LUT4 #(
    .INIT(16'hEFFF)) 
    \i[15]_i_5 
       (.I0(sendStrbToStart_reg_n_0),
        .I1(recvStrbToStart_reg_n_0),
        .I2(stateTo[1]),
        .I3(req),
        .O(\i[15]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2169" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \i[1]_i_1__10 
       (.I0(i[1]),
        .I1(i[0]),
        .I2(\i[15]_i_5_n_0 ),
        .O(\i[1]_i_1__10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2044" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \i[2]_i_1__6 
       (.I0(i[1]),
        .I1(i[0]),
        .I2(i[2]),
        .I3(\i[15]_i_5_n_0 ),
        .O(\i[2]_i_1__6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2044" *) 
  LUT5 #(
    .INIT(32'h00007F80)) 
    \i[3]_i_1__6 
       (.I0(i[2]),
        .I1(i[0]),
        .I2(i[1]),
        .I3(i[3]),
        .I4(\i[15]_i_5_n_0 ),
        .O(\i[3]_i_1__6_n_0 ));
  LUT6 #(
    .INIT(64'h000000007FFF8000)) 
    \i[4]_i_1__6 
       (.I0(i[3]),
        .I1(i[1]),
        .I2(i[0]),
        .I3(i[2]),
        .I4(i[4]),
        .I5(\i[15]_i_5_n_0 ),
        .O(\i[4]_i_1__6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2169" *) 
  LUT3 #(
    .INIT(8'h09)) 
    \i[5]_i_1__5 
       (.I0(\i[5]_i_2__4_n_0 ),
        .I1(i[5]),
        .I2(\i[15]_i_5_n_0 ),
        .O(\i[5]_i_1__5_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \i[5]_i_2__4 
       (.I0(i[3]),
        .I1(i[1]),
        .I2(i[0]),
        .I3(i[2]),
        .I4(i[4]),
        .O(\i[5]_i_2__4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2132" *) 
  LUT3 #(
    .INIT(8'h09)) 
    \i[6]_i_1__5 
       (.I0(\i[9]_i_2__3_n_0 ),
        .I1(i[6]),
        .I2(\i[15]_i_5_n_0 ),
        .O(\i[6]_i_1__5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2045" *) 
  LUT4 #(
    .INIT(16'h00D2)) 
    \i[7]_i_1__5 
       (.I0(i[6]),
        .I1(\i[9]_i_2__3_n_0 ),
        .I2(i[7]),
        .I3(\i[15]_i_5_n_0 ),
        .O(\i[7]_i_1__5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2045" *) 
  LUT5 #(
    .INIT(32'h44144444)) 
    \i[8]_i_1__4 
       (.I0(\i[15]_i_5_n_0 ),
        .I1(i[8]),
        .I2(i[7]),
        .I3(\i[9]_i_2__3_n_0 ),
        .I4(i[6]),
        .O(\i[8]_i_1__4_n_0 ));
  LUT6 #(
    .INIT(64'h00000000F7FF0800)) 
    \i[9]_i_1__3 
       (.I0(i[8]),
        .I1(i[7]),
        .I2(\i[9]_i_2__3_n_0 ),
        .I3(i[6]),
        .I4(i[9]),
        .I5(\i[15]_i_5_n_0 ),
        .O(\i[9]_i_1__3_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \i[9]_i_2__3 
       (.I0(i[4]),
        .I1(i[2]),
        .I2(i[0]),
        .I3(i[1]),
        .I4(i[3]),
        .I5(i[5]),
        .O(\i[9]_i_2__3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[0]_i_1__11_n_0 ),
        .Q(i[0]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[10] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[10]_i_1__2_n_0 ),
        .Q(i[10]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[11] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[11]_i_1__1_n_0 ),
        .Q(i[11]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[12] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[12]_i_1__1_n_0 ),
        .Q(i[12]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[13] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[13]_i_1__1_n_0 ),
        .Q(i[13]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[14] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[14]_i_1_n_0 ),
        .Q(i[14]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[15] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[15]_i_2_n_0 ),
        .Q(i[15]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[1]_i_1__10_n_0 ),
        .Q(i[1]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[2]_i_1__6_n_0 ),
        .Q(i[2]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[3]_i_1__6_n_0 ),
        .Q(i[3]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[4]_i_1__6_n_0 ),
        .Q(i[4]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[5]_i_1__5_n_0 ),
        .Q(i[5]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[6]_i_1__5_n_0 ),
        .Q(i[6]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[7]_i_1__5_n_0 ),
        .Q(i[7]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[8] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[8]_i_1__4_n_0 ),
        .Q(i[8]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[9] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\i[9]_i_1__3_n_0 ),
        .Q(i[9]));
  LUT6 #(
    .INIT(64'h00000800FFFFFFFF)) 
    \invbuf[0][7]_i_1 
       (.I0(\stateRecv_reg[0]_0 ),
        .I1(\invbuf_reg[7][0] ),
        .I2(Q[0]),
        .I3(Q[2]),
        .I4(\invbuf_reg[7][0]_0 ),
        .I5(\stateOp_reg[4]_1 ),
        .O(\stateOp_reg[0] ));
  (* SOFT_HLUTNM = "soft_lutpair2052" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \invbuf[7][0]_i_1 
       (.I0(recvAXIS_tdata[0]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[56]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_1 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2054" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \invbuf[7][1]_i_1 
       (.I0(rxAXIS_tdata[1]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[57]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_1 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2051" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \invbuf[7][2]_i_1 
       (.I0(rxAXIS_tdata[2]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[58]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_1 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2050" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \invbuf[7][3]_i_1 
       (.I0(rxAXIS_tdata[3]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[59]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_1 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2049" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \invbuf[7][4]_i_1 
       (.I0(rxAXIS_tdata[4]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[60]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_1 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2048" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \invbuf[7][5]_i_1 
       (.I0(rxAXIS_tdata[5]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[61]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_1 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2053" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \invbuf[7][6]_i_1 
       (.I0(rxAXIS_tdata[6]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[62]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_1 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2047" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \invbuf[7][7]_i_1 
       (.I0(recvAXIS_tdata[1]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[63]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_1 [7]));
  LUT5 #(
    .INIT(32'h8888A808)) 
    \invbuf[9][0]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(recvAXIS_tdata[0]),
        .I2(\invbuf_reg[9][0]_1 ),
        .I3(rxAXIS_tdata[8]),
        .I4(\invbuf_reg[9][0]_6 ),
        .O(\recvAXIS_tdata_sig_reg[7]_2 [0]));
  LUT5 #(
    .INIT(32'h8888A808)) 
    \invbuf[9][1]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(rxAXIS_tdata[1]),
        .I2(\invbuf_reg[9][0]_1 ),
        .I3(rxAXIS_tdata[9]),
        .I4(\invbuf_reg[9][0]_6 ),
        .O(\recvAXIS_tdata_sig_reg[7]_2 [1]));
  LUT5 #(
    .INIT(32'h8888A808)) 
    \invbuf[9][2]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(rxAXIS_tdata[2]),
        .I2(\invbuf_reg[9][0]_1 ),
        .I3(recvAXIS_tdata[2]),
        .I4(\invbuf_reg[9][0]_6 ),
        .O(\recvAXIS_tdata_sig_reg[7]_2 [2]));
  LUT5 #(
    .INIT(32'h8888A808)) 
    \invbuf[9][3]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(rxAXIS_tdata[3]),
        .I2(\invbuf_reg[9][0]_1 ),
        .I3(recvAXIS_tdata[3]),
        .I4(\invbuf_reg[9][0]_6 ),
        .O(\recvAXIS_tdata_sig_reg[7]_2 [3]));
  LUT5 #(
    .INIT(32'h8888A808)) 
    \invbuf[9][4]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(rxAXIS_tdata[4]),
        .I2(\invbuf_reg[9][0]_1 ),
        .I3(recvAXIS_tdata[4]),
        .I4(\invbuf_reg[9][0]_6 ),
        .O(\recvAXIS_tdata_sig_reg[7]_2 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2007" *) 
  LUT5 #(
    .INIT(32'h8888A808)) 
    \invbuf[9][5]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[5]),
        .I2(\invbuf_reg[9][0]_1 ),
        .I3(rxAXIS_tdata[13]),
        .I4(\invbuf_reg[9][0]_6 ),
        .O(\recvAXIS_tdata_sig_reg[7]_2 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2008" *) 
  LUT5 #(
    .INIT(32'h8888A808)) 
    \invbuf[9][6]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[6]),
        .I2(\invbuf_reg[9][0]_1 ),
        .I3(rxAXIS_tdata[14]),
        .I4(\invbuf_reg[9][0]_6 ),
        .O(\recvAXIS_tdata_sig_reg[7]_2 [6]));
  LUT6 #(
    .INIT(64'h00002000FFFFFFFF)) 
    \invbuf[9][7]_i_1 
       (.I0(\invbuf_reg[9][0] ),
        .I1(\invbuf[9][7]_i_4_n_0 ),
        .I2(Q[1]),
        .I3(\invbuf_reg[9][0]_0 ),
        .I4(Q[5]),
        .I5(\stateOp_reg[4] ),
        .O(E));
  (* SOFT_HLUTNM = "soft_lutpair2009" *) 
  LUT5 #(
    .INIT(32'h8888A808)) 
    \invbuf[9][7]_i_2 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(recvAXIS_tdata[1]),
        .I2(\invbuf_reg[9][0]_1 ),
        .I3(recvAXIS_tdata[5]),
        .I4(\invbuf_reg[9][0]_6 ),
        .O(\recvAXIS_tdata_sig_reg[7]_2 [7]));
  LUT6 #(
    .INIT(64'hFFFFFFFDFFFFFFFF)) 
    \invbuf[9][7]_i_4 
       (.I0(\invbuf_reg[9][0]_1 ),
        .I1(\invbuf_reg[9][0]_2 ),
        .I2(\invbuf_reg[9][0]_3 ),
        .I3(\invbuf_reg[9][0]_4 ),
        .I4(\invbuf_reg[9][0]_5 ),
        .I5(\stateRecv_reg[0]_0 ),
        .O(\invbuf[9][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2003" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ixRetbufCrc[0]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\ixRetbufCrc_reg[0]_0 ),
        .O(\tixVCommand_reg[0] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2088" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ixRetbufCrc[1]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\pollbuf_reg[3][1] ),
        .O(\tixVCommand_reg[0] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2002" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ixRetbufCrc[2]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\ixRetbufCrc_reg[2] ),
        .O(\tixVCommand_reg[0] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2056" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \ixRetbufCrc[3]_i_1 
       (.I0(\pollbuf_reg[1][7] [0]),
        .I1(\pollbuf_reg[3][5]_0 ),
        .I2(\pollbuf_reg[3][5] ),
        .I3(\stateOp_reg[4]_0 ),
        .O(\tixVCommand_reg[0] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2074" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ixRetbufCrc[4]_i_1 
       (.I0(\retbuf_reg[7][7]_0 ),
        .I1(\stateOp_reg[4]_0 ),
        .O(\tixVCommand_reg[0] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2001" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \ixRetbufCrc[5]_i_1 
       (.I0(\lastAXIS_tkeep_reg[1] ),
        .I1(\stateOp_reg[4]_0 ),
        .O(\stateOp_reg[5] ));
  (* SOFT_HLUTNM = "soft_lutpair2056" *) 
  LUT4 #(
    .INIT(16'h0400)) 
    \ixRetbufCrc[5]_i_2 
       (.I0(\pollbuf_reg[1][7] [0]),
        .I1(\pollbuf_reg[3][5]_0 ),
        .I2(\pollbuf_reg[3][5] ),
        .I3(\stateOp_reg[4]_0 ),
        .O(\tixVCommand_reg[0] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2001" *) 
  LUT5 #(
    .INIT(32'hFF7FFFFF)) 
    \lastAXIS_tkeep[1]_i_1 
       (.I0(\lastAXIS_tkeep_reg[1] ),
        .I1(\ixRetbufCrc_reg[2] ),
        .I2(\pollbuf_reg[3][1] ),
        .I3(\ixRetbufCrc_reg[0]_0 ),
        .I4(\stateOp_reg[4]_0 ),
        .O(\stateOp_reg[4]_5 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2002" *) 
  LUT5 #(
    .INIT(32'hF7A2FFFF)) 
    \lastAXIS_tkeep[2]_i_1__0 
       (.I0(\lastAXIS_tkeep_reg[1] ),
        .I1(\ixRetbufCrc_reg[2] ),
        .I2(\lastAXIS_tkeep_reg[2] ),
        .I3(\stateOp_next_reg[5] ),
        .I4(\stateOp_reg[4]_0 ),
        .O(\stateOp_reg[4]_5 [1]));
  LUT5 #(
    .INIT(32'hD0FFDFFF)) 
    \lastAXIS_tkeep[3]_i_1__0 
       (.I0(\ixRetbufCrc_reg[2] ),
        .I1(\ixRetbufCrc_reg[0]_0 ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\stateOp_reg[4]_0 ),
        .I4(\crcAXIS_tkeep_reg[3]_1 ),
        .O(\stateOp_reg[4]_5 [2]));
  LUT6 #(
    .INIT(64'hFEFF0EFF0EFFFEFF)) 
    \lastAXIS_tkeep[4]_i_1 
       (.I0(\crcAXIS_tkeep_reg[4] ),
        .I1(\lastAXIS_tkeep_reg[5] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\stateOp_reg[4]_0 ),
        .I4(\ixRetbufCrc_reg[2] ),
        .I5(\ixRetbufCrc_reg[0]_0 ),
        .O(\stateOp_reg[4]_5 [3]));
  LUT6 #(
    .INIT(64'hC1FFFFFFC1FF00FF)) 
    \lastAXIS_tkeep[5]_i_1 
       (.I0(\pollbuf_reg[3][1] ),
        .I1(\ixRetbufCrc_reg[0]_0 ),
        .I2(\ixRetbufCrc_reg[2] ),
        .I3(\stateOp_reg[4]_0 ),
        .I4(\lastAXIS_tkeep_reg[1] ),
        .I5(\lastAXIS_tkeep_reg[5] ),
        .O(\stateOp_reg[4]_5 [4]));
  LUT6 #(
    .INIT(64'hC1FFFFFFC1FF00FF)) 
    \lastAXIS_tkeep[6]_i_1 
       (.I0(\pollbuf_reg[3][1] ),
        .I1(\ixRetbufCrc_reg[0]_0 ),
        .I2(\ixRetbufCrc_reg[2] ),
        .I3(\stateOp_reg[4]_0 ),
        .I4(\lastAXIS_tkeep_reg[1] ),
        .I5(\crcAXIS_tkeep_reg[6] ),
        .O(\stateOp_reg[4]_5 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2003" *) 
  LUT5 #(
    .INIT(32'h8F8F0FFF)) 
    \lastAXIS_tkeep[7]_i_1 
       (.I0(\ixRetbufCrc_reg[2] ),
        .I1(\ixRetbufCrc_reg[0]_0 ),
        .I2(\stateOp_reg[4]_0 ),
        .I3(\crcAXIS_tkeep_reg[7]_0 ),
        .I4(\lastAXIS_tkeep_reg[1] ),
        .O(\stateOp_reg[4]_5 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2202" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[0]_i_1 
       (.I0(\len_reg[7] [0]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2207" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[10]_i_1 
       (.I0(\len_reg[15] [2]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [10]));
  (* SOFT_HLUTNM = "soft_lutpair2207" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[11]_i_1 
       (.I0(\len_reg[15] [3]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [11]));
  (* SOFT_HLUTNM = "soft_lutpair2208" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[12]_i_1 
       (.I0(\len_reg[15] [4]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [12]));
  (* SOFT_HLUTNM = "soft_lutpair2208" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[13]_i_1 
       (.I0(\len_reg[15] [5]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [13]));
  (* SOFT_HLUTNM = "soft_lutpair2209" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[14]_i_1 
       (.I0(\len_reg[15] [6]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [14]));
  (* SOFT_HLUTNM = "soft_lutpair2209" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[15]_i_1 
       (.I0(\len_reg[15] [7]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [15]));
  (* SOFT_HLUTNM = "soft_lutpair2210" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[16]_i_1 
       (.I0(\len_reg[23] [0]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [16]));
  (* SOFT_HLUTNM = "soft_lutpair2210" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[17]_i_1 
       (.I0(\len_reg[23] [1]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [17]));
  (* SOFT_HLUTNM = "soft_lutpair2211" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[18]_i_1 
       (.I0(\len_reg[23] [2]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [18]));
  (* SOFT_HLUTNM = "soft_lutpair2211" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[19]_i_1 
       (.I0(\len_reg[23] [3]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [19]));
  (* SOFT_HLUTNM = "soft_lutpair2202" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[1]_i_1 
       (.I0(\len_reg[7] [1]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2212" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[20]_i_1 
       (.I0(\len_reg[23] [4]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [20]));
  (* SOFT_HLUTNM = "soft_lutpair2212" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[21]_i_1 
       (.I0(\len_reg[23] [5]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [21]));
  (* SOFT_HLUTNM = "soft_lutpair2213" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[22]_i_1 
       (.I0(\len_reg[23] [6]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [22]));
  (* SOFT_HLUTNM = "soft_lutpair2213" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[23]_i_1 
       (.I0(\len_reg[23] [7]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [23]));
  (* SOFT_HLUTNM = "soft_lutpair2214" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[24]_i_1 
       (.I0(\len_reg[31] [0]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [24]));
  (* SOFT_HLUTNM = "soft_lutpair2214" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[25]_i_1 
       (.I0(\len_reg[31] [1]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [25]));
  (* SOFT_HLUTNM = "soft_lutpair2215" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[26]_i_1 
       (.I0(\len_reg[31] [2]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [26]));
  (* SOFT_HLUTNM = "soft_lutpair2215" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[27]_i_1 
       (.I0(\len_reg[31] [3]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [27]));
  (* SOFT_HLUTNM = "soft_lutpair2216" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[28]_i_1 
       (.I0(\len_reg[31] [4]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [28]));
  (* SOFT_HLUTNM = "soft_lutpair2216" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[29]_i_1 
       (.I0(\len_reg[31] [5]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [29]));
  (* SOFT_HLUTNM = "soft_lutpair2203" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[2]_i_1 
       (.I0(\len_reg[7] [2]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2217" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[30]_i_1 
       (.I0(\len_reg[31] [6]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [30]));
  (* SOFT_HLUTNM = "soft_lutpair2217" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[31]_i_1 
       (.I0(\len_reg[31] [7]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [31]));
  (* SOFT_HLUTNM = "soft_lutpair2203" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[3]_i_1 
       (.I0(\len_reg[7] [3]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2204" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[4]_i_1 
       (.I0(\len_reg[7] [4]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2204" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[5]_i_1 
       (.I0(\len_reg[7] [5]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2205" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[6]_i_1 
       (.I0(\len_reg[7] [6]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2205" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[7]_i_1 
       (.I0(\len_reg[7] [7]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2206" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[8]_i_1 
       (.I0(\len_reg[15] [0]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [8]));
  (* SOFT_HLUTNM = "soft_lutpair2206" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[9]_i_1 
       (.I0(\len_reg[15] [1]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[3][7] [9]));
  (* SOFT_HLUTNM = "soft_lutpair2105" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][0]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(recvAXIS_tdata[0]),
        .O(D[0]));
  (* SOFT_HLUTNM = "soft_lutpair2108" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][1]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[1]),
        .O(D[1]));
  (* SOFT_HLUTNM = "soft_lutpair2106" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][2]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[2]),
        .O(D[2]));
  (* SOFT_HLUTNM = "soft_lutpair2109" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][3]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[3]),
        .O(D[3]));
  (* SOFT_HLUTNM = "soft_lutpair2110" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][4]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[4]),
        .O(D[4]));
  (* SOFT_HLUTNM = "soft_lutpair2007" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][5]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[5]),
        .O(D[5]));
  (* SOFT_HLUTNM = "soft_lutpair2008" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][6]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[6]),
        .O(D[6]));
  LUT6 #(
    .INIT(64'h04000000FFFFFFFF)) 
    \opbuf[0][7]_i_1 
       (.I0(stateRecv[1]),
        .I1(stateRecv[2]),
        .I2(stateRecv[0]),
        .I3(\invbuf_reg[7][0] ),
        .I4(commok_sig_reg_0),
        .I5(\stateOp_reg[4]_1 ),
        .O(\stateRecv_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2009" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][7]_i_2 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(recvAXIS_tdata[1]),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAA8A)) 
    \opbuf[0][7]_i_5 
       (.I0(\stateOp[0]_i_2_n_0 ),
        .I1(Q[4]),
        .I2(commok_sig_reg_1),
        .I3(Q[2]),
        .I4(Q[5]),
        .I5(Q[0]),
        .O(\stateOp_reg[4]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2091" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][0]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(recvAXIS_tdata[0]),
        .I2(\invbuf_reg[7][0] ),
        .I3(rxAXIS_tdata[8]),
        .O(\recvAXIS_tdata_sig_reg[7]_6 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2093" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][1]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[1]),
        .I2(\invbuf_reg[7][0] ),
        .I3(rxAXIS_tdata[9]),
        .O(\recvAXIS_tdata_sig_reg[7]_6 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2095" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][2]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[2]),
        .I2(\invbuf_reg[7][0] ),
        .I3(recvAXIS_tdata[2]),
        .O(\recvAXIS_tdata_sig_reg[7]_6 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2097" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][3]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[3]),
        .I2(\invbuf_reg[7][0] ),
        .I3(recvAXIS_tdata[3]),
        .O(\recvAXIS_tdata_sig_reg[7]_6 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2099" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][4]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[4]),
        .I2(\invbuf_reg[7][0] ),
        .I3(recvAXIS_tdata[4]),
        .O(\recvAXIS_tdata_sig_reg[7]_6 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2101" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][5]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[5]),
        .I2(\invbuf_reg[7][0] ),
        .I3(rxAXIS_tdata[13]),
        .O(\recvAXIS_tdata_sig_reg[7]_6 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2103" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][6]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[6]),
        .I2(\invbuf_reg[7][0] ),
        .I3(rxAXIS_tdata[14]),
        .O(\recvAXIS_tdata_sig_reg[7]_6 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2105" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][7]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(recvAXIS_tdata[1]),
        .I2(\invbuf_reg[7][0] ),
        .I3(recvAXIS_tdata[5]),
        .O(\recvAXIS_tdata_sig_reg[7]_6 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2090" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[2][0]_i_1 
       (.I0(recvAXIS_tdata[0]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[16]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_3 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2092" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[2][1]_i_1 
       (.I0(rxAXIS_tdata[1]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[17]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_3 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2094" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[2][2]_i_1 
       (.I0(rxAXIS_tdata[2]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[18]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_3 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2096" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[2][3]_i_1 
       (.I0(rxAXIS_tdata[3]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[19]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_3 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2098" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[2][4]_i_1 
       (.I0(rxAXIS_tdata[4]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[20]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_3 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2100" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[2][5]_i_1 
       (.I0(rxAXIS_tdata[5]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[21]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_3 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2102" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[2][6]_i_1 
       (.I0(rxAXIS_tdata[6]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[22]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_3 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2089" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[2][7]_i_1 
       (.I0(recvAXIS_tdata[1]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[23]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_3 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2052" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \opbuf[3][0]_i_1 
       (.I0(recvAXIS_tdata[0]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[24]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_0 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2054" *) 
  LUT4 #(
    .INIT(16'h8C80)) 
    \opbuf[3][1]_i_1 
       (.I0(rxAXIS_tdata[25]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(\invbuf_reg[7][0] ),
        .I3(rxAXIS_tdata[1]),
        .O(\recvAXIS_tdata_sig_reg[7]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2051" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \opbuf[3][2]_i_1 
       (.I0(rxAXIS_tdata[2]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[26]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2050" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \opbuf[3][3]_i_1 
       (.I0(rxAXIS_tdata[3]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[27]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_0 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2049" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \opbuf[3][4]_i_1 
       (.I0(rxAXIS_tdata[4]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[28]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_0 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2048" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \opbuf[3][5]_i_1 
       (.I0(rxAXIS_tdata[5]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[29]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_0 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2053" *) 
  LUT4 #(
    .INIT(16'h8C80)) 
    \opbuf[3][6]_i_1 
       (.I0(rxAXIS_tdata[30]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(\invbuf_reg[7][0] ),
        .I3(rxAXIS_tdata[6]),
        .O(\recvAXIS_tdata_sig_reg[7]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2047" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \opbuf[3][7]_i_1 
       (.I0(recvAXIS_tdata[1]),
        .I1(\invbuf_reg[7][0] ),
        .I2(rxAXIS_tdata[31]),
        .I3(\stateOp_reg[4]_1 ),
        .O(\recvAXIS_tdata_sig_reg[7]_0 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2090" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[4][0]_i_1 
       (.I0(recvAXIS_tdata[0]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[32]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_4 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2092" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[4][1]_i_1 
       (.I0(rxAXIS_tdata[1]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[33]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_4 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2094" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[4][2]_i_1 
       (.I0(rxAXIS_tdata[2]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[34]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_4 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2096" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[4][3]_i_1 
       (.I0(rxAXIS_tdata[3]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[35]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_4 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2098" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[4][4]_i_1 
       (.I0(rxAXIS_tdata[4]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[36]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_4 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2100" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[4][5]_i_1 
       (.I0(rxAXIS_tdata[5]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[37]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_4 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2102" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[4][6]_i_1 
       (.I0(rxAXIS_tdata[6]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[38]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_4 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2104" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[4][7]_i_1 
       (.I0(recvAXIS_tdata[1]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[39]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_4 [7]));
  LUT4 #(
    .INIT(16'hB080)) 
    \opbuf[5][0]_i_1 
       (.I0(rxAXIS_tdata[40]),
        .I1(\invbuf_reg[7][0] ),
        .I2(\stateOp_reg[4]_1 ),
        .I3(recvAXIS_tdata[0]),
        .O(\recvAXIS_tdata_sig_reg[47]_0 [0]));
  LUT4 #(
    .INIT(16'hB080)) 
    \opbuf[5][1]_i_1 
       (.I0(rxAXIS_tdata[41]),
        .I1(\invbuf_reg[7][0] ),
        .I2(\stateOp_reg[4]_1 ),
        .I3(rxAXIS_tdata[1]),
        .O(\recvAXIS_tdata_sig_reg[47]_0 [1]));
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[5][2]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[2]),
        .I2(\invbuf_reg[7][0] ),
        .I3(rxAXIS_tdata[42]),
        .O(\recvAXIS_tdata_sig_reg[47]_0 [2]));
  LUT4 #(
    .INIT(16'hB080)) 
    \opbuf[5][3]_i_1 
       (.I0(rxAXIS_tdata[43]),
        .I1(\invbuf_reg[7][0] ),
        .I2(\stateOp_reg[4]_1 ),
        .I3(rxAXIS_tdata[3]),
        .O(\recvAXIS_tdata_sig_reg[47]_0 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2110" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[5][4]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[4]),
        .I2(\invbuf_reg[7][0] ),
        .I3(rxAXIS_tdata[44]),
        .O(\recvAXIS_tdata_sig_reg[47]_0 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2109" *) 
  LUT4 #(
    .INIT(16'hB080)) 
    \opbuf[5][5]_i_1 
       (.I0(rxAXIS_tdata[45]),
        .I1(\invbuf_reg[7][0] ),
        .I2(\stateOp_reg[4]_1 ),
        .I3(rxAXIS_tdata[5]),
        .O(\recvAXIS_tdata_sig_reg[47]_0 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2108" *) 
  LUT4 #(
    .INIT(16'hB080)) 
    \opbuf[5][6]_i_1 
       (.I0(rxAXIS_tdata[46]),
        .I1(\invbuf_reg[7][0] ),
        .I2(\stateOp_reg[4]_1 ),
        .I3(rxAXIS_tdata[6]),
        .O(\recvAXIS_tdata_sig_reg[47]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2089" *) 
  LUT4 #(
    .INIT(16'h8A80)) 
    \opbuf[5][7]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(rxAXIS_tdata[47]),
        .I2(\invbuf_reg[7][0] ),
        .I3(recvAXIS_tdata[1]),
        .O(\recvAXIS_tdata_sig_reg[47]_0 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2091" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[6][0]_i_1 
       (.I0(recvAXIS_tdata[0]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[48]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_5 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2093" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[6][1]_i_1 
       (.I0(rxAXIS_tdata[1]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[49]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_5 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2095" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[6][2]_i_1 
       (.I0(rxAXIS_tdata[2]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[50]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_5 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2097" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[6][3]_i_1 
       (.I0(rxAXIS_tdata[3]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[51]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_5 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2099" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[6][4]_i_1 
       (.I0(rxAXIS_tdata[4]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[52]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_5 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2101" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[6][5]_i_1 
       (.I0(rxAXIS_tdata[5]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[53]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_5 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2103" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[6][6]_i_1 
       (.I0(rxAXIS_tdata[6]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[54]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_5 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2104" *) 
  LUT4 #(
    .INIT(16'hC088)) 
    \opbuf[6][7]_i_1 
       (.I0(recvAXIS_tdata[1]),
        .I1(\stateOp_reg[4]_1 ),
        .I2(rxAXIS_tdata[55]),
        .I3(\invbuf_reg[7][0] ),
        .O(\recvAXIS_tdata_sig_reg[7]_5 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2062" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[0][0]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[0][7]_0 [0]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVController_reg[7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2062" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[0][1]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[0][7]_0 [1]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVController_reg[7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2061" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[0][2]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[0][7]_0 [2]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVController_reg[7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2061" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[0][3]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[0][7]_0 [3]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVController_reg[7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2060" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[0][4]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[0][7]_0 [4]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVController_reg[7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2060" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[0][5]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[0][7]_0 [5]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVController_reg[7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2059" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[0][6]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[0][7]_0 [6]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVController_reg[7] [6]));
  LUT6 #(
    .INIT(64'hD0000000FFFFFFFF)) 
    \pollbuf[0][7]_i_1__0 
       (.I0(\pollbuf_reg[2][3] ),
        .I1(\pollbuf_reg[2][3]_0 ),
        .I2(\pollbuf_reg[2][3]_1 ),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(\stateOp_reg[4]_3 ),
        .O(\stateOp_reg[2] ));
  (* SOFT_HLUTNM = "soft_lutpair2059" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[0][7]_i_2 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[0][7]_0 [7]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVController_reg[7] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2066" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[1][0]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[1][7] [0]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVCommand_reg[7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2066" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[1][1]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[1][7] [1]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVCommand_reg[7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2065" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[1][2]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[1][7] [2]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVCommand_reg[7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2065" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[1][3]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[1][7] [3]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVCommand_reg[7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2064" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[1][4]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[1][7] [4]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVCommand_reg[7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2064" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[1][5]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[1][7] [5]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVCommand_reg[7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2063" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[1][6]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[1][7] [6]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVCommand_reg[7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2063" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \pollbuf[1][7]_i_1 
       (.I0(\pollbuf_reg[0][7] ),
        .I1(\pollbuf_reg[1][7] [7]),
        .I2(\pollbuf_reg[0][7]_1 ),
        .I3(\stateOp_reg[4]_3 ),
        .O(\tixVCommand_reg[7] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2151" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \pollbuf[2][3]_i_1 
       (.I0(\pollbuf_reg[2][3]_2 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(\pollbuf_reg[2][3]_0 ),
        .O(\tixVBuffer_reg[1] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2075" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \pollbuf[2][4]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\pollbuf_reg[2][4] ),
        .O(\tixVBuffer_reg[1] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2152" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \pollbuf[2][7]_i_1 
       (.I0(\pollbuf_reg[2][7] ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(\pollbuf_reg[2][3]_0 ),
        .O(\tixVBuffer_reg[1] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2134" *) 
  LUT3 #(
    .INIT(8'h20)) 
    \pollbuf[3][0]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\ixRetbufCrc_reg[0]_0 ),
        .I2(\pollbuf_reg[2][3]_0 ),
        .O(\tixVCommand_reg[0]_0 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2151" *) 
  LUT3 #(
    .INIT(8'h20)) 
    \pollbuf[3][1]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\pollbuf_reg[3][1] ),
        .I2(\pollbuf_reg[2][3]_0 ),
        .O(\tixVCommand_reg[0]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2134" *) 
  LUT3 #(
    .INIT(8'h20)) 
    \pollbuf[3][2]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\ixRetbufCrc_reg[2] ),
        .I2(\pollbuf_reg[2][3]_0 ),
        .O(\tixVCommand_reg[0]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2005" *) 
  LUT5 #(
    .INIT(32'h08000000)) 
    \pollbuf[3][3]_i_1 
       (.I0(\pollbuf_reg[1][7] [0]),
        .I1(\pollbuf_reg[3][5]_0 ),
        .I2(\pollbuf_reg[3][5] ),
        .I3(\stateOp_reg[4]_3 ),
        .I4(\pollbuf_reg[2][3]_0 ),
        .O(\tixVCommand_reg[0]_0 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2150" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \pollbuf[3][4]_i_1 
       (.I0(\retbuf_reg[7][7]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(\pollbuf_reg[2][3]_0 ),
        .O(\tixVCommand_reg[0]_0 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2005" *) 
  LUT5 #(
    .INIT(32'h04000000)) 
    \pollbuf[3][5]_i_1 
       (.I0(\pollbuf_reg[1][7] [0]),
        .I1(\pollbuf_reg[3][5]_0 ),
        .I2(\pollbuf_reg[3][5] ),
        .I3(\stateOp_reg[4]_3 ),
        .I4(\pollbuf_reg[2][3]_0 ),
        .O(\tixVCommand_reg[0]_0 [5]));
  LUT6 #(
    .INIT(64'hFFFF000004000000)) 
    \recvAXIL_rdata[63]_i_1 
       (.I0(stateRecv[0]),
        .I1(stateRecv[1]),
        .I2(stateRecv[2]),
        .I3(\recvAXIL_rdata[63]_i_2_n_0 ),
        .I4(p_1_in0),
        .I5(\recvAXIL_rdata_reg_n_0_[63] ),
        .O(\recvAXIL_rdata[63]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2120" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    \recvAXIL_rdata[63]_i_2 
       (.I0(AXIL_araddr_sig[5]),
        .I1(apuAXIL_arvalid),
        .I2(AXIL_arready),
        .I3(AXIL_araddr_sig[4]),
        .O(\recvAXIL_rdata[63]_i_2_n_0 ));
  FDCE \recvAXIL_rdata_reg[63] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIL_rdata[63]_i_1_n_0 ),
        .Q(\recvAXIL_rdata_reg_n_0_[63] ));
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[0]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[0] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2248" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[10]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[10] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2247" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[11]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[11] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2247" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[12]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[12] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2246" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[13]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[13] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2114" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[14]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[14] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2118" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[15]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[15] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2246" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[16]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[16] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2245" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[17]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[17] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2245" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[18]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[18] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2244" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[19]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[19] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2251" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[1]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[1] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2244" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[20]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[20] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2123" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[21]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[21] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2243" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[22]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[22] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2243" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[23]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[23] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2242" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[24]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[24] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2117" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[25]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[25] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2242" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[26]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[26] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2128" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[27]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[27] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2241" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[28]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[28] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2121" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[29]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[29] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2251" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[2]_i_1 
       (.I0(p_0_in[0]),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2241" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[30]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[30] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2116" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[31]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[31] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2240" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[32]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[32] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2240" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[33]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[33] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2239" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[34]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[34] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2239" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[35]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[35] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2238" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[36]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[36] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2238" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[37]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[37] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2112" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[38]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[38] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2122" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[39]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[39] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2127" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[3]_i_1 
       (.I0(p_0_in[1]),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2115" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[40]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[40] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2125" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[41]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[41] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2237" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[42]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[42] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2237" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[43]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[43] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[43]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2236" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[44]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[44] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[44]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2236" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[45]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[45] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[45]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2235" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[46]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[46] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[46]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2235" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[47]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[47] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[47]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2234" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[48]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[48] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[48]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2234" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[49]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[49] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[49]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2250" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[4]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[4] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2233" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[50]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[50] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[50]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2233" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[51]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[51] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[51]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2232" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[52]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[52] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[52]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2232" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[53]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[53] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[53]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2231" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[54]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[54] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[54]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2231" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[55]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[55] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[55]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2230" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[56]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[56] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[56]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2230" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[57]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[57] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[57]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2229" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[58]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[58] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[58]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2126" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[59]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[59] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[59]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2124" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[5]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[5] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2113" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[60]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[60] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[60]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2229" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[61]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[61] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[61]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2119" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[62]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[62] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[62]_i_1_n_0 ));
  LUT3 #(
    .INIT(8'h8F)) 
    \recvAXIS_tdata_sig[63]_i_1 
       (.I0(stateRecv[0]),
        .I1(\recvAXIS_tdata_sig[63]_i_3_n_0 ),
        .I2(p_1_in0),
        .O(\recvAXIS_tdata_sig[63]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2058" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[63]_i_2 
       (.I0(\AXIL_wdata_sig_reg_n_0_[63] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[63]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000080000000000)) 
    \recvAXIS_tdata_sig[63]_i_3 
       (.I0(AXIL_bvalid_sig_reg_0),
        .I1(apuAXIL_bready),
        .I2(ixBlkWrite[1]),
        .I3(ixBlkWrite[0]),
        .I4(stateRecv[2]),
        .I5(stateRecv[1]),
        .O(\recvAXIS_tdata_sig[63]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2250" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[6]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[6] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2249" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[7]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[7] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2249" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[8]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[8] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2248" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[9]_i_1 
       (.I0(\AXIL_wdata_sig_reg_n_0_[9] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[9]_i_1_n_0 ));
  FDCE \recvAXIS_tdata_sig_reg[0] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[0]_i_1_n_0 ),
        .Q(recvAXIS_tdata[0]));
  FDCE \recvAXIS_tdata_sig_reg[10] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[10]_i_1_n_0 ),
        .Q(recvAXIS_tdata[2]));
  FDCE \recvAXIS_tdata_sig_reg[11] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[11]_i_1_n_0 ),
        .Q(recvAXIS_tdata[3]));
  FDCE \recvAXIS_tdata_sig_reg[12] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[12]_i_1_n_0 ),
        .Q(recvAXIS_tdata[4]));
  FDCE \recvAXIS_tdata_sig_reg[13] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[13]_i_1_n_0 ),
        .Q(rxAXIS_tdata[13]));
  FDCE \recvAXIS_tdata_sig_reg[14] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[14]_i_1_n_0 ),
        .Q(rxAXIS_tdata[14]));
  FDCE \recvAXIS_tdata_sig_reg[15] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[15]_i_1_n_0 ),
        .Q(recvAXIS_tdata[5]));
  FDCE \recvAXIS_tdata_sig_reg[16] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[16]_i_1_n_0 ),
        .Q(rxAXIS_tdata[16]));
  FDCE \recvAXIS_tdata_sig_reg[17] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[17]_i_1_n_0 ),
        .Q(rxAXIS_tdata[17]));
  FDCE \recvAXIS_tdata_sig_reg[18] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[18]_i_1_n_0 ),
        .Q(rxAXIS_tdata[18]));
  FDCE \recvAXIS_tdata_sig_reg[19] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[19]_i_1_n_0 ),
        .Q(rxAXIS_tdata[19]));
  FDCE \recvAXIS_tdata_sig_reg[1] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[1]_i_1_n_0 ),
        .Q(rxAXIS_tdata[1]));
  FDCE \recvAXIS_tdata_sig_reg[20] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[20]_i_1_n_0 ),
        .Q(rxAXIS_tdata[20]));
  FDCE \recvAXIS_tdata_sig_reg[21] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[21]_i_1_n_0 ),
        .Q(rxAXIS_tdata[21]));
  FDCE \recvAXIS_tdata_sig_reg[22] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[22]_i_1_n_0 ),
        .Q(rxAXIS_tdata[22]));
  FDCE \recvAXIS_tdata_sig_reg[23] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[23]_i_1_n_0 ),
        .Q(rxAXIS_tdata[23]));
  FDCE \recvAXIS_tdata_sig_reg[24] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[24]_i_1_n_0 ),
        .Q(rxAXIS_tdata[24]));
  FDCE \recvAXIS_tdata_sig_reg[25] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[25]_i_1_n_0 ),
        .Q(rxAXIS_tdata[25]));
  FDCE \recvAXIS_tdata_sig_reg[26] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[26]_i_1_n_0 ),
        .Q(rxAXIS_tdata[26]));
  FDCE \recvAXIS_tdata_sig_reg[27] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[27]_i_1_n_0 ),
        .Q(rxAXIS_tdata[27]));
  FDCE \recvAXIS_tdata_sig_reg[28] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[28]_i_1_n_0 ),
        .Q(rxAXIS_tdata[28]));
  FDCE \recvAXIS_tdata_sig_reg[29] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[29]_i_1_n_0 ),
        .Q(rxAXIS_tdata[29]));
  FDCE \recvAXIS_tdata_sig_reg[2] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[2]_i_1_n_0 ),
        .Q(rxAXIS_tdata[2]));
  FDCE \recvAXIS_tdata_sig_reg[30] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[30]_i_1_n_0 ),
        .Q(rxAXIS_tdata[30]));
  FDCE \recvAXIS_tdata_sig_reg[31] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[31]_i_1_n_0 ),
        .Q(rxAXIS_tdata[31]));
  FDCE \recvAXIS_tdata_sig_reg[32] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[32]_i_1_n_0 ),
        .Q(rxAXIS_tdata[32]));
  FDCE \recvAXIS_tdata_sig_reg[33] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[33]_i_1_n_0 ),
        .Q(rxAXIS_tdata[33]));
  FDCE \recvAXIS_tdata_sig_reg[34] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[34]_i_1_n_0 ),
        .Q(rxAXIS_tdata[34]));
  FDCE \recvAXIS_tdata_sig_reg[35] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[35]_i_1_n_0 ),
        .Q(rxAXIS_tdata[35]));
  FDCE \recvAXIS_tdata_sig_reg[36] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[36]_i_1_n_0 ),
        .Q(rxAXIS_tdata[36]));
  FDCE \recvAXIS_tdata_sig_reg[37] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[37]_i_1_n_0 ),
        .Q(rxAXIS_tdata[37]));
  FDCE \recvAXIS_tdata_sig_reg[38] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[38]_i_1_n_0 ),
        .Q(rxAXIS_tdata[38]));
  FDCE \recvAXIS_tdata_sig_reg[39] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[39]_i_1_n_0 ),
        .Q(rxAXIS_tdata[39]));
  FDCE \recvAXIS_tdata_sig_reg[3] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[3]_i_1_n_0 ),
        .Q(rxAXIS_tdata[3]));
  FDCE \recvAXIS_tdata_sig_reg[40] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[40]_i_1_n_0 ),
        .Q(rxAXIS_tdata[40]));
  FDCE \recvAXIS_tdata_sig_reg[41] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[41]_i_1_n_0 ),
        .Q(rxAXIS_tdata[41]));
  FDCE \recvAXIS_tdata_sig_reg[42] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[42]_i_1_n_0 ),
        .Q(rxAXIS_tdata[42]));
  FDCE \recvAXIS_tdata_sig_reg[43] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[43]_i_1_n_0 ),
        .Q(rxAXIS_tdata[43]));
  FDCE \recvAXIS_tdata_sig_reg[44] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[44]_i_1_n_0 ),
        .Q(rxAXIS_tdata[44]));
  FDCE \recvAXIS_tdata_sig_reg[45] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[45]_i_1_n_0 ),
        .Q(rxAXIS_tdata[45]));
  FDCE \recvAXIS_tdata_sig_reg[46] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[46]_i_1_n_0 ),
        .Q(rxAXIS_tdata[46]));
  FDCE \recvAXIS_tdata_sig_reg[47] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[47]_i_1_n_0 ),
        .Q(rxAXIS_tdata[47]));
  FDCE \recvAXIS_tdata_sig_reg[48] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[48]_i_1_n_0 ),
        .Q(rxAXIS_tdata[48]));
  FDCE \recvAXIS_tdata_sig_reg[49] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[49]_i_1_n_0 ),
        .Q(rxAXIS_tdata[49]));
  FDCE \recvAXIS_tdata_sig_reg[4] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[4]_i_1_n_0 ),
        .Q(rxAXIS_tdata[4]));
  FDCE \recvAXIS_tdata_sig_reg[50] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[50]_i_1_n_0 ),
        .Q(rxAXIS_tdata[50]));
  FDCE \recvAXIS_tdata_sig_reg[51] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[51]_i_1_n_0 ),
        .Q(rxAXIS_tdata[51]));
  FDCE \recvAXIS_tdata_sig_reg[52] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[52]_i_1_n_0 ),
        .Q(rxAXIS_tdata[52]));
  FDCE \recvAXIS_tdata_sig_reg[53] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[53]_i_1_n_0 ),
        .Q(rxAXIS_tdata[53]));
  FDCE \recvAXIS_tdata_sig_reg[54] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[54]_i_1_n_0 ),
        .Q(rxAXIS_tdata[54]));
  FDCE \recvAXIS_tdata_sig_reg[55] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[55]_i_1_n_0 ),
        .Q(rxAXIS_tdata[55]));
  FDCE \recvAXIS_tdata_sig_reg[56] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[56]_i_1_n_0 ),
        .Q(rxAXIS_tdata[56]));
  FDCE \recvAXIS_tdata_sig_reg[57] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[57]_i_1_n_0 ),
        .Q(rxAXIS_tdata[57]));
  FDCE \recvAXIS_tdata_sig_reg[58] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[58]_i_1_n_0 ),
        .Q(rxAXIS_tdata[58]));
  FDCE \recvAXIS_tdata_sig_reg[59] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[59]_i_1_n_0 ),
        .Q(rxAXIS_tdata[59]));
  FDCE \recvAXIS_tdata_sig_reg[5] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[5]_i_1_n_0 ),
        .Q(rxAXIS_tdata[5]));
  FDCE \recvAXIS_tdata_sig_reg[60] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[60]_i_1_n_0 ),
        .Q(rxAXIS_tdata[60]));
  FDCE \recvAXIS_tdata_sig_reg[61] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[61]_i_1_n_0 ),
        .Q(rxAXIS_tdata[61]));
  FDCE \recvAXIS_tdata_sig_reg[62] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[62]_i_1_n_0 ),
        .Q(rxAXIS_tdata[62]));
  FDCE \recvAXIS_tdata_sig_reg[63] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[63]_i_2_n_0 ),
        .Q(rxAXIS_tdata[63]));
  FDCE \recvAXIS_tdata_sig_reg[6] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[6]_i_1_n_0 ),
        .Q(rxAXIS_tdata[6]));
  FDCE \recvAXIS_tdata_sig_reg[7] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[7]_i_1_n_0 ),
        .Q(recvAXIS_tdata[1]));
  FDCE \recvAXIS_tdata_sig_reg[8] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[8]_i_1_n_0 ),
        .Q(rxAXIS_tdata[8]));
  FDCE \recvAXIS_tdata_sig_reg[9] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\recvAXIS_tdata_sig[9]_i_1_n_0 ),
        .Q(rxAXIS_tdata[9]));
  LUT5 #(
    .INIT(32'hF0F08000)) 
    recvAXIS_tlast_sig_i_1
       (.I0(stateRecv[0]),
        .I1(\recvAXIS_tdata_sig[63]_i_3_n_0 ),
        .I2(p_1_in0),
        .I3(recvAXIS_tlast_sig0),
        .I4(recvAXIS_tlast),
        .O(recvAXIS_tlast_sig_i_1_n_0));
  LUT4 #(
    .INIT(16'h08A2)) 
    recvAXIS_tlast_sig_i_10
       (.I0(recvAXIS_tlast_sig_i_19_n_0),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[12]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(\wordcnt_reg[12]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_10_n_0));
  LUT4 #(
    .INIT(16'h08A2)) 
    recvAXIS_tlast_sig_i_11
       (.I0(recvAXIS_tlast_sig_i_20_n_0),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[10]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(\wordcnt_reg[10]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_11_n_0));
  LUT4 #(
    .INIT(16'h08A2)) 
    recvAXIS_tlast_sig_i_12
       (.I0(recvAXIS_tlast_sig_i_21_n_0),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[6]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(\wordcnt_reg[6]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_12_n_0));
  LUT4 #(
    .INIT(16'h08A2)) 
    recvAXIS_tlast_sig_i_13
       (.I0(recvAXIS_tlast_sig_i_22_n_0),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[4]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(\wordcnt_reg[4]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_13_n_0));
  LUT5 #(
    .INIT(32'h0000B847)) 
    recvAXIS_tlast_sig_i_14
       (.I0(\rxlen_reg[0]_4 ),
        .I1(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[0]),
        .I3(\wordcnt_reg[0]__0_n_0 ),
        .I4(recvAXIS_tlast_sig_i_23_n_0),
        .O(recvAXIS_tlast_sig_i_14_n_0));
  LUT5 #(
    .INIT(32'h00903309)) 
    recvAXIS_tlast_sig_i_15
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[25]),
        .I1(\wordcnt_reg[25]__0_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[26]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(\wordcnt_reg[26]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_15_n_0));
  LUT5 #(
    .INIT(32'h00903309)) 
    recvAXIS_tlast_sig_i_16
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[22]),
        .I1(\wordcnt_reg[22]__0_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[23]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(\wordcnt_reg[23]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_16_n_0));
  LUT5 #(
    .INIT(32'h00903309)) 
    recvAXIS_tlast_sig_i_17
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[18]),
        .I1(\wordcnt_reg[18]__0_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[20]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(\wordcnt_reg[20]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_17_n_0));
  LUT5 #(
    .INIT(32'h00903309)) 
    recvAXIS_tlast_sig_i_18
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[15]),
        .I1(\wordcnt_reg[15]__0_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[17]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(\wordcnt_reg[17]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_18_n_0));
  LUT5 #(
    .INIT(32'h00903309)) 
    recvAXIS_tlast_sig_i_19
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[13]),
        .I1(\wordcnt_reg[13]__0_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[14]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(\wordcnt_reg[14]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_19_n_0));
  LUT5 #(
    .INIT(32'h00903309)) 
    recvAXIS_tlast_sig_i_20
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[9]),
        .I1(\wordcnt_reg[9]__0_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[11]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(\wordcnt_reg[11]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_20_n_0));
  LUT5 #(
    .INIT(32'h00903309)) 
    recvAXIS_tlast_sig_i_21
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[7]),
        .I1(\wordcnt_reg[7]__0_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[8]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(\wordcnt_reg[8]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_21_n_0));
  LUT5 #(
    .INIT(32'h00903309)) 
    recvAXIS_tlast_sig_i_22
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[3]),
        .I1(\wordcnt_reg[3]__0_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[5]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(\wordcnt_reg[5]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_22_n_0));
  LUT5 #(
    .INIT(32'hFF6FCCF6)) 
    recvAXIS_tlast_sig_i_23
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[1]),
        .I1(\wordcnt_reg[1]__0_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[2]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(\wordcnt_reg[2]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_23_n_0));
  LUT1 #(
    .INIT(2'h1)) 
    recvAXIS_tlast_sig_i_4
       (.I0(\wordcnt_reg[30]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_4_n_0));
  LUT6 #(
    .INIT(64'h0000090005050009)) 
    recvAXIS_tlast_sig_i_5
       (.I0(\wordcnt_reg[28]__0_n_0 ),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[28]),
        .I2(\wordcnt_reg[29]__0_n_0 ),
        .I3(recvAXIS_tlast_sig_reg_i_2_0[27]),
        .I4(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I5(\wordcnt_reg[27]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_5_n_0));
  LUT4 #(
    .INIT(16'h08A2)) 
    recvAXIS_tlast_sig_i_6
       (.I0(recvAXIS_tlast_sig_i_15_n_0),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[24]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(\wordcnt_reg[24]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_6_n_0));
  LUT4 #(
    .INIT(16'h08A2)) 
    recvAXIS_tlast_sig_i_7
       (.I0(recvAXIS_tlast_sig_i_16_n_0),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[21]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(\wordcnt_reg[21]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_7_n_0));
  LUT4 #(
    .INIT(16'h08A2)) 
    recvAXIS_tlast_sig_i_8
       (.I0(recvAXIS_tlast_sig_i_17_n_0),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[19]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(\wordcnt_reg[19]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_8_n_0));
  LUT4 #(
    .INIT(16'h08A2)) 
    recvAXIS_tlast_sig_i_9
       (.I0(recvAXIS_tlast_sig_i_18_n_0),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[16]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(\wordcnt_reg[16]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_9_n_0));
  FDCE recvAXIS_tlast_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(recvAXIS_tlast_sig_i_1_n_0),
        .Q(recvAXIS_tlast));
  CARRY8 recvAXIS_tlast_sig_reg_i_2
       (.CI(recvAXIS_tlast_sig_reg_i_3_n_0),
        .CI_TOP(1'b0),
        .CO({NLW_recvAXIS_tlast_sig_reg_i_2_CO_UNCONNECTED[7:3],recvAXIS_tlast_sig0,recvAXIS_tlast_sig_reg_i_2_n_6,recvAXIS_tlast_sig_reg_i_2_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(NLW_recvAXIS_tlast_sig_reg_i_2_O_UNCONNECTED[7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,recvAXIS_tlast_sig_i_4_n_0,recvAXIS_tlast_sig_i_5_n_0,recvAXIS_tlast_sig_i_6_n_0}));
  CARRY8 recvAXIS_tlast_sig_reg_i_3
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({recvAXIS_tlast_sig_reg_i_3_n_0,recvAXIS_tlast_sig_reg_i_3_n_1,recvAXIS_tlast_sig_reg_i_3_n_2,recvAXIS_tlast_sig_reg_i_3_n_3,recvAXIS_tlast_sig_reg_i_3_n_4,recvAXIS_tlast_sig_reg_i_3_n_5,recvAXIS_tlast_sig_reg_i_3_n_6,recvAXIS_tlast_sig_reg_i_3_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(NLW_recvAXIS_tlast_sig_reg_i_3_O_UNCONNECTED[7:0]),
        .S({recvAXIS_tlast_sig_i_7_n_0,recvAXIS_tlast_sig_i_8_n_0,recvAXIS_tlast_sig_i_9_n_0,recvAXIS_tlast_sig_i_10_n_0,recvAXIS_tlast_sig_i_11_n_0,recvAXIS_tlast_sig_i_12_n_0,recvAXIS_tlast_sig_i_13_n_0,recvAXIS_tlast_sig_i_14_n_0}));
  LUT5 #(
    .INIT(32'hBF00B000)) 
    recvStrbToStart_i_1
       (.I0(\stateRecv[2]_i_3_n_0 ),
        .I1(recvStrbToStart_i_2_n_0),
        .I2(recvStrbToStart_i_3_n_0),
        .I3(p_1_in0),
        .I4(recvStrbToStart_reg_n_0),
        .O(recvStrbToStart_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2035" *) 
  LUT5 #(
    .INIT(32'hFFFFF53F)) 
    recvStrbToStart_i_2
       (.I0(p_33_in),
        .I1(\recvAXIL_rdata[63]_i_2_n_0 ),
        .I2(stateRecv[1]),
        .I3(stateRecv[2]),
        .I4(stateRecv[0]),
        .O(recvStrbToStart_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2034" *) 
  LUT5 #(
    .INIT(32'h00FFFDDD)) 
    recvStrbToStart_i_3
       (.I0(\stateRecv[2]_i_10_n_0 ),
        .I1(\wordcnt[0]__0_i_4_n_0 ),
        .I2(stateRecv[0]),
        .I3(stateRecv[2]),
        .I4(stateRecv[1]),
        .O(recvStrbToStart_i_3_n_0));
  FDCE recvStrbToStart_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(recvStrbToStart_i_1_n_0),
        .Q(recvStrbToStart_reg_n_0));
  LUT6 #(
    .INIT(64'h0C080CFF0C080C00)) 
    recvStrbToStop_i_1
       (.I0(\recvAXIS_tdata_sig[63]_i_3_n_0 ),
        .I1(stateRecv[0]),
        .I2(recvStrbToStop_i_2_n_0),
        .I3(\stateRecv[2]_i_7_n_0 ),
        .I4(recvStrbToStop_i_3_n_0),
        .I5(recvStrbToStop_reg_n_0),
        .O(recvStrbToStop_i_1_n_0));
  LUT6 #(
    .INIT(64'h7F000000FFFFFFFF)) 
    recvStrbToStop_i_2
       (.I0(stateRecv[2]),
        .I1(stateRecv[1]),
        .I2(stateRecv[0]),
        .I3(stateTo[1]),
        .I4(stateTo[0]),
        .I5(\stateRecv[2]_i_9__0_n_0 ),
        .O(recvStrbToStop_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2058" *) 
  LUT4 #(
    .INIT(16'hDF8F)) 
    recvStrbToStop_i_3
       (.I0(stateRecv[0]),
        .I1(\recvAXIS_tdata_sig[63]_i_3_n_0 ),
        .I2(p_1_in0),
        .I3(stateRecv[2]),
        .O(recvStrbToStop_i_3_n_0));
  FDCE recvStrbToStop_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(recvStrbToStop_i_1_n_0),
        .Q(recvStrbToStop_reg_n_0));
  LUT4 #(
    .INIT(16'hF080)) 
    reqReset_sig_i_1
       (.I0(reqReset_sig_reg_0),
        .I1(reqReset_sig_reg_1),
        .I2(\stateOp_reg[4]_1 ),
        .I3(reqResetFromHostif),
        .O(reqReset_sig_reg));
  (* SOFT_HLUTNM = "soft_lutpair2088" *) 
  LUT4 #(
    .INIT(16'h88C0)) 
    \resid[0]_i_1 
       (.I0(\ixRetbufCrc_reg[0]_0 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\resid_reg[0]_21 ),
        .I3(\lastAXIS_tkeep_reg[1] ),
        .O(\stateOp_reg[5]_3 [0]));
  LUT6 #(
    .INIT(64'h00000700FF000700)) 
    \resid[1]_i_1__0 
       (.I0(\resid_reg[0]_21 ),
        .I1(\resid_reg[1] ),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(\stateOp_reg[4]_0 ),
        .I4(\lastAXIS_tkeep_reg[1] ),
        .I5(\lastAXIS_tkeep_reg[2] ),
        .O(\stateOp_reg[5]_3 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2057" *) 
  LUT3 #(
    .INIT(8'hFB)) 
    \resid[2]_i_1 
       (.I0(\lastAXIS_tkeep_reg[1]_0 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .O(\stateOp_reg[5]_5 ));
  LUT6 #(
    .INIT(64'h0E00FE00FE000E00)) 
    \resid[2]_i_2 
       (.I0(\crcAXIS_tkeep_reg[4] ),
        .I1(\lastAXIS_tkeep_reg[5] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\stateOp_reg[4]_0 ),
        .I4(\ixRetbufCrc_reg[2] ),
        .I5(\pollbuf_reg[3][1] ),
        .O(\stateOp_reg[5]_3 [2]));
  LUT6 #(
    .INIT(64'h0000A202AAAAA202)) 
    \retbuf[0][0]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\retbuf_reg[0][0] ),
        .I2(\retbuf_reg[6][5] ),
        .I3(vidtrackGetInfoTixVState),
        .I4(\retbuf_reg[4][7]_2 ),
        .I5(\retbuf_reg[0][0]_0 ),
        .O(\crc_imd_reg[2] [0]));
  LUT5 #(
    .INIT(32'hFFFFA820)) 
    \retbuf[0][2]_i_1 
       (.I0(\stateOp_reg[4]_12 ),
        .I1(\retbuf_reg[0][2] ),
        .I2(\retbuf_reg[15][7] [2]),
        .I3(\retbuf_reg[15][7] [10]),
        .I4(\retbuf[0][2]_i_2_n_0 ),
        .O(\crc_imd_reg[2] [1]));
  LUT5 #(
    .INIT(32'h00000400)) 
    \retbuf[0][2]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(\retbuf_reg[0][2]_0 ),
        .I3(\retbuf_reg[0][2]_1 ),
        .I4(\retbuf_reg[6][5] ),
        .O(\retbuf[0][2]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00400000)) 
    \retbuf[0][7]_i_10 
       (.I0(\retbuf_reg[6][5] ),
        .I1(\retbuf_reg[0][2]_1 ),
        .I2(\retbuf_reg[0][7]_4 ),
        .I3(\retbuf_reg[4][7]_2 ),
        .I4(\stateOp_reg[4]_3 ),
        .O(\tixVController_reg[7]_0 ));
  LUT6 #(
    .INIT(64'h75550000FFFFFFFF)) 
    \retbuf[0][7]_i_1__0 
       (.I0(\retbuf_reg[0][7] ),
        .I1(\retbuf_reg[0][7]_0 ),
        .I2(\retbuf_reg[0][7]_1 ),
        .I3(\retbuf_reg[0][7]_2 ),
        .I4(\retbuf_reg[0][7]_3 ),
        .I5(\stateOp_reg[4]_0 ),
        .O(\resid_reg[0] ));
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[0][7]_i_9 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\retbuf_reg[4][7]_2 ),
        .O(\stateOp_reg[4]_12 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[10][0]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [4]),
        .I2(\retbuf_reg[15][7] [0]),
        .I3(\retbuf_reg[10][0]_0 ),
        .I4(\retbuf_reg[15][7] [8]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[15] [0]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[10][1]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [5]),
        .I2(\retbuf_reg[15][7] [1]),
        .I3(\retbuf_reg[10][0]_0 ),
        .I4(\retbuf_reg[15][7] [9]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[15] [1]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[10][2]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [6]),
        .I2(\retbuf_reg[15][7] [2]),
        .I3(\retbuf_reg[10][0]_0 ),
        .I4(\retbuf_reg[15][7] [10]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[15] [2]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[10][3]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [7]),
        .I2(\retbuf_reg[15][7] [3]),
        .I3(\retbuf_reg[10][0]_0 ),
        .I4(\retbuf_reg[15][7] [11]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[15] [3]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[10][4]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [8]),
        .I2(\retbuf_reg[15][7] [4]),
        .I3(\retbuf_reg[10][0]_0 ),
        .I4(\retbuf_reg[15][7] [12]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[15] [4]));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[10][5]_i_1 
       (.I0(\retbuf[10][5]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [5]),
        .I2(\retbuf_reg[10][0]_0 ),
        .I3(\retbuf_reg[15][7] [13]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[15] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2073" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[10][5]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[8][7] [9]),
        .O(\retbuf[10][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[10][6]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [10]),
        .I2(\retbuf_reg[15][7] [6]),
        .I3(\retbuf_reg[10][0]_0 ),
        .I4(\retbuf_reg[15][7] [14]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[15] [6]));
  LUT5 #(
    .INIT(32'hAAAABAAA)) 
    \retbuf[10][7]_i_1 
       (.I0(\retbuf[8][7]_i_3__0_n_0 ),
        .I1(\retbuf_reg[1][0]_0 ),
        .I2(\retbuf_reg[10][0] ),
        .I3(Q[1]),
        .I4(Q[5]),
        .O(\stateOp_reg[1]_3 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[10][7]_i_2 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [11]),
        .I2(\retbuf_reg[15][7] [7]),
        .I3(\retbuf_reg[10][0]_0 ),
        .I4(\retbuf_reg[15][7] [15]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[15] [7]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[11][4]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [0]),
        .I2(\retbuf_reg[15][7] [4]),
        .I3(\retbuf_reg[11][4] ),
        .I4(\retbuf_reg[15][7] [12]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[7] [0]));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[11][5]_i_1 
       (.I0(\retbuf[11][5]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [5]),
        .I2(\retbuf_reg[11][4] ),
        .I3(\retbuf_reg[15][7] [13]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2072" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[11][5]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[8][7] [1]),
        .O(\retbuf[11][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[11][6]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [2]),
        .I2(\retbuf_reg[15][7] [6]),
        .I3(\retbuf_reg[11][4] ),
        .I4(\retbuf_reg[15][7] [14]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[7] [2]));
  LUT6 #(
    .INIT(64'hAAAAAAAAAABAAAAA)) 
    \retbuf[11][7]_i_1 
       (.I0(\retbuf[8][7]_i_3__0_n_0 ),
        .I1(\retbuf_reg[1][0]_0 ),
        .I2(\retbuf_reg[4][7]_0 ),
        .I3(\retbuf_reg[11][0] ),
        .I4(Q[1]),
        .I5(Q[5]),
        .O(\stateOp_reg[1]_4 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[11][7]_i_2 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [3]),
        .I2(\retbuf_reg[15][7] [7]),
        .I3(\retbuf_reg[11][4] ),
        .I4(\retbuf_reg[15][7] [15]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[7] [3]));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[12][0]_i_1 
       (.I0(\retbuf[12][0]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [0]),
        .I2(\retbuf_reg[12][0]_0 ),
        .I3(\retbuf_reg[15][7] [8]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[31] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2071" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[12][0]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[12][7] [20]),
        .O(\retbuf[12][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[12][1]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [21]),
        .I2(\retbuf_reg[15][7] [1]),
        .I3(\retbuf_reg[12][0]_0 ),
        .I4(\retbuf_reg[15][7] [9]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[31] [1]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[12][2]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [22]),
        .I2(\retbuf_reg[15][7] [2]),
        .I3(\retbuf_reg[12][0]_0 ),
        .I4(\retbuf_reg[15][7] [10]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[31] [2]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[12][3]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [23]),
        .I2(\retbuf_reg[15][7] [3]),
        .I3(\retbuf_reg[12][0]_0 ),
        .I4(\retbuf_reg[15][7] [11]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[31] [3]));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[12][4]_i_1 
       (.I0(\retbuf[12][4]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [4]),
        .I2(\retbuf_reg[12][0]_0 ),
        .I3(\retbuf_reg[15][7] [12]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[31] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2071" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[12][4]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[12][7] [24]),
        .O(\retbuf[12][4]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[12][5]_i_1 
       (.I0(\retbuf[12][5]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [5]),
        .I2(\retbuf_reg[12][0]_0 ),
        .I3(\retbuf_reg[15][7] [13]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[31] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2072" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[12][5]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[12][7] [25]),
        .O(\retbuf[12][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[12][6]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [26]),
        .I2(\retbuf_reg[15][7] [6]),
        .I3(\retbuf_reg[12][0]_0 ),
        .I4(\retbuf_reg[15][7] [14]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[31] [6]));
  LUT5 #(
    .INIT(32'hAAAABAAA)) 
    \retbuf[12][7]_i_1 
       (.I0(\retbuf[8][7]_i_3__0_n_0 ),
        .I1(\retbuf_reg[1][0]_0 ),
        .I2(\retbuf_reg[12][0] ),
        .I3(Q[1]),
        .I4(Q[5]),
        .O(\stateOp_reg[1]_5 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[12][7]_i_2 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [27]),
        .I2(\retbuf_reg[15][7] [7]),
        .I3(\retbuf_reg[12][0]_0 ),
        .I4(\retbuf_reg[15][7] [15]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[31] [7]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[13][0]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [12]),
        .I2(\retbuf_reg[15][7] [0]),
        .I3(\retbuf_reg[13][0]_0 ),
        .I4(\retbuf_reg[15][7] [8]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[23] [0]));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[13][1]_i_1 
       (.I0(\retbuf[13][1]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [1]),
        .I2(\retbuf_reg[13][0]_0 ),
        .I3(\retbuf_reg[15][7] [9]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[23] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2069" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[13][1]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[12][7] [13]),
        .O(\retbuf[13][1]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[13][2]_i_1 
       (.I0(\retbuf[13][2]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [2]),
        .I2(\retbuf_reg[13][0]_0 ),
        .I3(\retbuf_reg[15][7] [10]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[23] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2069" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[13][2]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[12][7] [14]),
        .O(\retbuf[13][2]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[13][3]_i_1 
       (.I0(\retbuf[13][3]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [3]),
        .I2(\retbuf_reg[13][0]_0 ),
        .I3(\retbuf_reg[15][7] [11]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[23] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2070" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[13][3]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[12][7] [15]),
        .O(\retbuf[13][3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[13][4]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [16]),
        .I2(\retbuf_reg[15][7] [4]),
        .I3(\retbuf_reg[13][0]_0 ),
        .I4(\retbuf_reg[15][7] [12]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[23] [4]));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[13][5]_i_1 
       (.I0(\retbuf[13][5]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [5]),
        .I2(\retbuf_reg[13][0]_0 ),
        .I3(\retbuf_reg[15][7] [13]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[23] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2070" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[13][5]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[12][7] [17]),
        .O(\retbuf[13][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[13][6]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [18]),
        .I2(\retbuf_reg[15][7] [6]),
        .I3(\retbuf_reg[13][0]_0 ),
        .I4(\retbuf_reg[15][7] [14]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[23] [6]));
  LUT6 #(
    .INIT(64'hAAAAAAAAAABAAAAA)) 
    \retbuf[13][7]_i_1 
       (.I0(\retbuf[8][7]_i_3__0_n_0 ),
        .I1(\retbuf_reg[1][0]_0 ),
        .I2(\retbuf_reg[4][7]_0 ),
        .I3(\retbuf_reg[13][0] ),
        .I4(Q[1]),
        .I5(Q[5]),
        .O(\stateOp_reg[1]_6 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[13][7]_i_2 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [19]),
        .I2(\retbuf_reg[15][7] [7]),
        .I3(\retbuf_reg[13][0]_0 ),
        .I4(\retbuf_reg[15][7] [15]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[23] [7]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[14][0]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [4]),
        .I2(\retbuf_reg[15][7] [0]),
        .I3(\retbuf_reg[14][0]_0 ),
        .I4(\retbuf_reg[15][7] [8]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[15] [0]));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[14][1]_i_1 
       (.I0(\retbuf[14][1]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [1]),
        .I2(\retbuf_reg[14][0]_0 ),
        .I3(\retbuf_reg[15][7] [9]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[15] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2067" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[14][1]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[12][7] [5]),
        .O(\retbuf[14][1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[14][2]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [6]),
        .I2(\retbuf_reg[15][7] [2]),
        .I3(\retbuf_reg[14][0]_0 ),
        .I4(\retbuf_reg[15][7] [10]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[15] [2]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[14][3]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [7]),
        .I2(\retbuf_reg[15][7] [3]),
        .I3(\retbuf_reg[14][0]_0 ),
        .I4(\retbuf_reg[15][7] [11]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[15] [3]));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[14][4]_i_1 
       (.I0(\retbuf[14][4]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [4]),
        .I2(\retbuf_reg[14][0]_0 ),
        .I3(\retbuf_reg[15][7] [12]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[15] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2068" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[14][4]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[12][7] [8]),
        .O(\retbuf[14][4]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[14][5]_i_1 
       (.I0(\retbuf[14][5]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [5]),
        .I2(\retbuf_reg[14][0]_0 ),
        .I3(\retbuf_reg[15][7] [13]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[15] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2068" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[14][5]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[12][7] [9]),
        .O(\retbuf[14][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[14][6]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [10]),
        .I2(\retbuf_reg[15][7] [6]),
        .I3(\retbuf_reg[14][0]_0 ),
        .I4(\retbuf_reg[15][7] [14]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[15] [6]));
  LUT6 #(
    .INIT(64'hAAAAAAAABAAAAAAA)) 
    \retbuf[14][7]_i_1 
       (.I0(\retbuf[8][7]_i_3__0_n_0 ),
        .I1(\retbuf_reg[1][0]_0 ),
        .I2(Q[1]),
        .I3(\retbuf_reg[4][7]_0 ),
        .I4(\retbuf_reg[14][0] ),
        .I5(Q[5]),
        .O(\stateOp_reg[1]_7 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[14][7]_i_2 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [11]),
        .I2(\retbuf_reg[15][7] [7]),
        .I3(\retbuf_reg[14][0]_0 ),
        .I4(\retbuf_reg[15][7] [15]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[15] [7]));
  LUT6 #(
    .INIT(64'hF8FFF88888888888)) 
    \retbuf[15][1]_i_1 
       (.I0(\pollbuf_reg[3][5]_0 ),
        .I1(\stateOp_reg[4]_11 ),
        .I2(\retbuf_reg[15][7] [1]),
        .I3(\retbuf_reg[15][1] ),
        .I4(\retbuf_reg[15][7] [9]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[7] [0]));
  LUT6 #(
    .INIT(64'hF8FFF88888888888)) 
    \retbuf[15][2]_i_1 
       (.I0(\pollbuf_reg[3][5]_0 ),
        .I1(\stateOp_reg[4]_11 ),
        .I2(\retbuf_reg[15][7] [2]),
        .I3(\retbuf_reg[15][1] ),
        .I4(\retbuf_reg[15][7] [10]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[7] [1]));
  LUT6 #(
    .INIT(64'hF8FFF88888888888)) 
    \retbuf[15][3]_i_1 
       (.I0(\pollbuf_reg[3][5]_0 ),
        .I1(\stateOp_reg[4]_11 ),
        .I2(\retbuf_reg[15][7] [3]),
        .I3(\retbuf_reg[15][1] ),
        .I4(\retbuf_reg[15][7] [11]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[7] [2]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[15][4]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [0]),
        .I2(\retbuf_reg[15][7] [4]),
        .I3(\retbuf_reg[15][1] ),
        .I4(\retbuf_reg[15][7] [12]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[7] [3]));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[15][5]_i_1 
       (.I0(\retbuf[15][5]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [5]),
        .I2(\retbuf_reg[15][1] ),
        .I3(\retbuf_reg[15][7] [13]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2067" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[15][5]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[12][7] [1]),
        .O(\retbuf[15][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[15][6]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [2]),
        .I2(\retbuf_reg[15][7] [6]),
        .I3(\retbuf_reg[15][1] ),
        .I4(\retbuf_reg[15][7] [14]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[7] [5]));
  LUT6 #(
    .INIT(64'hAAAAAAAAAABAAAAA)) 
    \retbuf[15][7]_i_1 
       (.I0(\retbuf[8][7]_i_3__0_n_0 ),
        .I1(\retbuf_reg[1][0]_0 ),
        .I2(\retbuf_reg[4][7]_0 ),
        .I3(\retbuf_reg[15][0]_2 ),
        .I4(Q[1]),
        .I5(Q[5]),
        .O(\stateOp_reg[1]_8 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[15][7]_i_2 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[12][7] [3]),
        .I2(\retbuf_reg[15][7] [7]),
        .I3(\retbuf_reg[15][1] ),
        .I4(\retbuf_reg[15][7] [15]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrB_reg[7] [6]));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAEFEE)) 
    \retbuf[16][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0] ),
        .I2(\retbuf_reg[16][0]_0 ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[16][0]_1 ),
        .I5(Q[5]),
        .O(\resid_reg[0]_3 ));
  LUT5 #(
    .INIT(32'h0400FFFF)) 
    \retbuf[16][7]_i_3 
       (.I0(\pollbuf_reg[3][5] ),
        .I1(\pollbuf_reg[3][5]_0 ),
        .I2(\pollbuf_reg[1][7] [0]),
        .I3(reqReset_sig_reg_0),
        .I4(\stateOp_reg[4] ),
        .O(\retbuf[16][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABAAABBBB)) 
    \retbuf[17][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[17][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[16][0]_0 ),
        .I5(Q[5]),
        .O(\resid_reg[0]_4 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[18][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[17][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[18][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_5 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[19][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[18][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[19][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_6 ));
  LUT6 #(
    .INIT(64'h5D5D5DFF5D5D5D5D)) 
    \retbuf[1][7]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(\stateOp_reg[0]_4 ),
        .I2(\retbuf_reg[1][0] ),
        .I3(\retbuf_reg[1][0]_0 ),
        .I4(\retbuf_reg[1][0]_1 ),
        .I5(\retbuf_reg[1][0]_2 ),
        .O(\stateOp_reg[4]_8 ));
  (* SOFT_HLUTNM = "soft_lutpair2006" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \retbuf[1][7]_i_9 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\retbuf_reg[4][7]_2 ),
        .O(\stateOp_reg[4]_11 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[20][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[19][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[20][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_7 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[21][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[20][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[21][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_8 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[22][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[21][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[22][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_9 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[23][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[22][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[23][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_10 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[24][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[23][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[24][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_11 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[25][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[24][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[25][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_12 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[26][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[25][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[26][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_13 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[27][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[26][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[27][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_14 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[28][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[27][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[28][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_15 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAAE)) 
    \retbuf[29][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[39][7]_2 [1]),
        .I2(\retbuf_reg[29][0] ),
        .I3(\retbuf_reg[16][0]_1 ),
        .I4(\retbuf_reg[29][0]_0 ),
        .I5(Q[5]),
        .O(\ixRetbufCrc_reg[3] ));
  LUT6 #(
    .INIT(64'h5D5D5DFF5D5D5D5D)) 
    \retbuf[2][7]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(\stateOp_reg[0]_4 ),
        .I2(\retbuf_reg[1][0] ),
        .I3(\retbuf_reg[1][0]_0 ),
        .I4(\retbuf_reg[2][0] ),
        .I5(\retbuf_reg[1][0]_2 ),
        .O(\stateOp_reg[4]_9 ));
  LUT6 #(
    .INIT(64'hA820FFFFA820A820)) 
    \retbuf[2][7]_i_2 
       (.I0(\stateOp_reg[4]_12 ),
        .I1(\retbuf_reg[2][7] ),
        .I2(\retbuf_reg[15][7] [7]),
        .I3(\retbuf_reg[15][7] [15]),
        .I4(\retbuf_reg[2][7]_0 ),
        .I5(\stateOp_reg[4]_11 ),
        .O(\crc_imd_reg[7]_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[30][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[30][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[30][0]_0 ),
        .I5(Q[5]),
        .O(\resid_reg[0]_16 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABABBBABA)) 
    \retbuf[31][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[30][0]_0 ),
        .I3(\retbuf_reg[31][0] ),
        .I4(\txAXIS_tdata_reg[32]_0 [0]),
        .I5(Q[5]),
        .O(\resid_reg[0]_17 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAA8A)) 
    \retbuf[32][6]_i_2 
       (.I0(\stateOp[0]_i_2_n_0 ),
        .I1(Q[4]),
        .I2(commok_sig_reg_1),
        .I3(Q[2]),
        .I4(Q[5]),
        .I5(Q[0]),
        .O(\stateOp_reg[4]_4 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABAAABBBB)) 
    \retbuf[32][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[32][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[31][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_18 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAABBAB)) 
    \retbuf[33][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[39][7]_2 [0]),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[33][0] ),
        .I5(Q[5]),
        .O(\ixRetbufCrc_reg[0] ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBBBAAA)) 
    \retbuf[34][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[34][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[34][0]_0 ),
        .I5(Q[5]),
        .O(\resid_reg[0]_19 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABABA)) 
    \retbuf[35][7]_i_1 
       (.I0(\retbuf[16][7]_i_3_n_0 ),
        .I1(\retbuf_reg[16][0]_1 ),
        .I2(\retbuf_reg[34][0] ),
        .I3(\txAXIS_tdata_reg[32]_0 [0]),
        .I4(\retbuf_reg[35][0] ),
        .I5(Q[5]),
        .O(\resid_reg[0]_20 ));
  LUT6 #(
    .INIT(64'h0000EA00FFFFFFFF)) 
    \retbuf[36][7]_i_1 
       (.I0(\retbuf_reg[35][0] ),
        .I1(\txAXIS_tdata_reg[32]_0 [0]),
        .I2(\retbuf_reg[36][7] ),
        .I3(\retbuf_reg[4][7]_2 ),
        .I4(\retbuf_reg[36][7]_0 ),
        .I5(\stateOp_reg[4]_0 ),
        .O(\resid_reg[0]_0 ));
  LUT6 #(
    .INIT(64'h0000F800FFFFFFFF)) 
    \retbuf[37][7]_i_1__0 
       (.I0(\retbuf_reg[37][7] ),
        .I1(\txAXIS_tdata_reg[32]_0 [0]),
        .I2(\retbuf_reg[36][7] ),
        .I3(\retbuf_reg[4][7]_2 ),
        .I4(\retbuf_reg[36][7]_0 ),
        .I5(\stateOp_reg[4]_0 ),
        .O(\resid_reg[0]_1 ));
  LUT6 #(
    .INIT(64'hFF080000FFFFFFFF)) 
    \retbuf[38][7]_i_1__0 
       (.I0(\txAXIS_tdata_reg[32]_0 [0]),
        .I1(\retbuf_reg[38][7] ),
        .I2(\retbuf_reg[39][7]_3 ),
        .I3(\retbuf_reg[37][7] ),
        .I4(\retbuf_reg[38][7]_0 ),
        .I5(\stateOp_reg[4]_0 ),
        .O(\resid_reg[0]_2 ));
  LUT6 #(
    .INIT(64'h00000020FFFFFFFF)) 
    \retbuf[39][7]_i_1__0 
       (.I0(\retbuf_reg[39][7] ),
        .I1(\retbuf_reg[39][7]_0 ),
        .I2(\retbuf_reg[39][7]_1 ),
        .I3(\retbuf_reg[39][7]_2 [2]),
        .I4(\retbuf_reg[39][7]_3 ),
        .I5(\stateOp_reg[4]_0 ),
        .O(\ixRetbufCrc_reg[4]_0 ));
  LUT6 #(
    .INIT(64'h0000A202AAAAA202)) 
    \retbuf[3][2]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(\retbuf_reg[3][2] ),
        .I2(\retbuf_reg[6][5] ),
        .I3(\retbuf_reg[3][7]_2 [1]),
        .I4(\retbuf_reg[4][7]_2 ),
        .I5(\retbuf_reg[3][2]_0 ),
        .O(\TCapt_reg[15] [0]));
  LUT6 #(
    .INIT(64'h0000A202AAAAA202)) 
    \retbuf[3][3]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(\retbuf_reg[3][3] ),
        .I2(\retbuf_reg[6][5] ),
        .I3(\retbuf_reg[3][7]_2 [2]),
        .I4(\retbuf_reg[4][7]_2 ),
        .I5(\retbuf_reg[3][3]_0 ),
        .O(\TCapt_reg[15] [1]));
  LUT6 #(
    .INIT(64'h0000A202AAAAA202)) 
    \retbuf[3][6]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(\retbuf_reg[3][6] ),
        .I2(\retbuf_reg[6][5] ),
        .I3(\retbuf_reg[3][7]_2 [3]),
        .I4(\retbuf_reg[4][7]_2 ),
        .I5(\retbuf_reg[3][6]_0 ),
        .O(\TCapt_reg[15] [2]));
  LUT6 #(
    .INIT(64'h1F110000FFFFFFFF)) 
    \retbuf[3][7]_i_1__0 
       (.I0(\retbuf_reg[3][7] ),
        .I1(\retbuf_reg[3][7]_0 ),
        .I2(\retbuf_reg[3][7]_1 ),
        .I3(\retbuf_reg[0][7]_2 ),
        .I4(\retbuf_reg[0][7]_3 ),
        .I5(\stateOp_reg[4]_1 ),
        .O(\ixRetbufCrc_reg[4] ));
  LUT6 #(
    .INIT(64'h0000A202AAAAA202)) 
    \retbuf[3][7]_i_2 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(\retbuf_reg[3][7]_3 ),
        .I2(\retbuf_reg[6][5] ),
        .I3(\retbuf_reg[3][7]_2 [4]),
        .I4(\retbuf_reg[4][7]_2 ),
        .I5(\retbuf_reg[3][7]_4 ),
        .O(\TCapt_reg[15] [3]));
  LUT5 #(
    .INIT(32'hFFFFA820)) 
    \retbuf[4][0]_i_1 
       (.I0(\stateOp_reg[4]_12 ),
        .I1(\retbuf_reg[4][0] ),
        .I2(\retbuf_reg[15][7] [0]),
        .I3(\retbuf_reg[15][7] [8]),
        .I4(\retbuf[4][0]_i_2_n_0 ),
        .O(\TCapt_reg[7] [0]));
  LUT6 #(
    .INIT(64'h4040404040404044)) 
    \retbuf[4][0]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(\retbuf_reg[4][0]_0 ),
        .I3(\retbuf_reg[6][5] ),
        .I4(\pollbuf_reg[0][7]_0 [3]),
        .I5(\retbuf_reg[4][0]_1 ),
        .O(\retbuf[4][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h4040404040404044)) 
    \retbuf[4][1]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(\retbuf_reg[4][1] ),
        .I3(\retbuf_reg[6][5] ),
        .I4(\pollbuf_reg[0][7]_0 [3]),
        .I5(\retbuf_reg[4][1]_0 ),
        .O(\tixVController_reg[3] ));
  LUT6 #(
    .INIT(64'h4040404040404044)) 
    \retbuf[4][2]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(\retbuf_reg[4][2] ),
        .I3(\retbuf_reg[6][5] ),
        .I4(\pollbuf_reg[0][7]_0 [3]),
        .I5(\retbuf_reg[4][2]_0 ),
        .O(\tixVController_reg[3]_0 ));
  LUT5 #(
    .INIT(32'hFFFFA820)) 
    \retbuf[4][3]_i_1 
       (.I0(\stateOp_reg[4]_12 ),
        .I1(\retbuf_reg[4][0] ),
        .I2(\retbuf_reg[15][7] [3]),
        .I3(\retbuf_reg[15][7] [11]),
        .I4(\retbuf[4][3]_i_2_n_0 ),
        .O(\TCapt_reg[7] [1]));
  LUT6 #(
    .INIT(64'h4040404040404044)) 
    \retbuf[4][3]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(\retbuf_reg[4][3] ),
        .I3(\retbuf_reg[6][5] ),
        .I4(\pollbuf_reg[0][7]_0 [3]),
        .I5(\retbuf_reg[4][3]_0 ),
        .O(\retbuf[4][3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFF100000FFFFFFFF)) 
    \retbuf[4][7]_i_1__0 
       (.I0(\retbuf_reg[4][7] ),
        .I1(Q[5]),
        .I2(\retbuf_reg[4][7]_0 ),
        .I3(\retbuf_reg[4][7]_1 ),
        .I4(\retbuf_reg[0][7]_3 ),
        .I5(\stateOp_reg[4] ),
        .O(\stateOp_reg[5]_0 ));
  LUT6 #(
    .INIT(64'hFF00F4000000F400)) 
    \retbuf[4][7]_i_2 
       (.I0(\retbuf_reg[4][7]_3 ),
        .I1(\retbuf_reg[3][7]_2 [0]),
        .I2(\retbuf_reg[4][7]_4 ),
        .I3(\stateOp_reg[4] ),
        .I4(\retbuf_reg[4][7]_2 ),
        .I5(\retbuf_reg[4][7]_5 ),
        .O(\TCapt_reg[7] [2]));
  LUT6 #(
    .INIT(64'h5D5D5D5D5DFF5D5D)) 
    \retbuf[5][7]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(\stateOp_reg[0]_4 ),
        .I2(\retbuf_reg[5][0] ),
        .I3(\retbuf_reg[5][0]_0 ),
        .I4(Q[1]),
        .I5(Q[5]),
        .O(\stateOp_reg[1] ));
  LUT6 #(
    .INIT(64'h00008A02AAAA8A02)) 
    \retbuf[6][5]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(\retbuf_reg[6][5] ),
        .I2(\retbuf_reg[6][5]_0 ),
        .I3(vidtrackGetInfoPtr0Seqbuf),
        .I4(\retbuf_reg[4][7]_2 ),
        .I5(\retbuf_reg[6][5]_1 ),
        .O(\stateOp_reg[4]_10 ));
  LUT6 #(
    .INIT(64'h5D5D5D5D5DFF5D5D)) 
    \retbuf[6][7]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(\stateOp_reg[0]_4 ),
        .I2(\retbuf_reg[5][0] ),
        .I3(\retbuf_reg[6][0] ),
        .I4(Q[1]),
        .I5(Q[5]),
        .O(\stateOp_reg[1]_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[7][4]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[7][7]_2 [0]),
        .I2(\retbuf_reg[15][7] [4]),
        .I3(\retbuf_reg[7][4] ),
        .I4(\retbuf_reg[15][7] [12]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\crc_imd_reg[7] [0]));
  LUT6 #(
    .INIT(64'h0000A808AAAAA808)) 
    \retbuf[7][5]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(\retbuf_reg[7][7]_2 [1]),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[7][5] ),
        .I4(\retbuf_reg[4][7]_2 ),
        .I5(\retbuf_reg[7][5]_0 ),
        .O(\crc_imd_reg[7] [1]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[7][6]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[7][7]_2 [2]),
        .I2(\retbuf_reg[15][7] [6]),
        .I3(\retbuf_reg[7][4] ),
        .I4(\retbuf_reg[15][7] [14]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\crc_imd_reg[7] [2]));
  LUT3 #(
    .INIT(8'hEF)) 
    \retbuf[7][6]_i_2 
       (.I0(\pollbuf_reg[3][5]_0 ),
        .I1(\retbuf_reg[4][7]_2 ),
        .I2(\stateOp_reg[4]_3 ),
        .O(\retbuf[7][6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFD550000FFFFFFFF)) 
    \retbuf[7][7]_i_1__0 
       (.I0(\retbuf_reg[7][7] ),
        .I1(\retbuf_reg[7][7]_0 ),
        .I2(\retbuf_reg[7][7]_1 ),
        .I3(\retbuf_reg[0][7]_1 ),
        .I4(\retbuf_reg[0][7]_3 ),
        .I5(\stateOp_reg[4]_1 ),
        .O(\stateOp_reg[5]_1 ));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[7][7]_i_2 
       (.I0(\retbuf[7][7]_i_5_n_0 ),
        .I1(\retbuf_reg[15][7] [7]),
        .I2(\retbuf_reg[7][4] ),
        .I3(\retbuf_reg[15][7] [15]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\crc_imd_reg[7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2006" *) 
  LUT5 #(
    .INIT(32'h04440400)) 
    \retbuf[7][7]_i_5 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(\retbuf_reg[7][5] ),
        .I3(\pollbuf_reg[3][5]_0 ),
        .I4(\retbuf_reg[7][7]_2 [3]),
        .O(\retbuf[7][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[8][0]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [20]),
        .I2(\retbuf_reg[15][7] [0]),
        .I3(\retbuf_reg[8][0]_0 ),
        .I4(\retbuf_reg[15][7] [8]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[31] [0]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[8][1]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [21]),
        .I2(\retbuf_reg[15][7] [1]),
        .I3(\retbuf_reg[8][0]_0 ),
        .I4(\retbuf_reg[15][7] [9]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[31] [1]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[8][2]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [22]),
        .I2(\retbuf_reg[15][7] [2]),
        .I3(\retbuf_reg[8][0]_0 ),
        .I4(\retbuf_reg[15][7] [10]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[31] [2]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[8][3]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [23]),
        .I2(\retbuf_reg[15][7] [3]),
        .I3(\retbuf_reg[8][0]_0 ),
        .I4(\retbuf_reg[15][7] [11]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[31] [3]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[8][4]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [24]),
        .I2(\retbuf_reg[15][7] [4]),
        .I3(\retbuf_reg[8][0]_0 ),
        .I4(\retbuf_reg[15][7] [12]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[31] [4]));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[8][5]_i_1 
       (.I0(\retbuf[8][5]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [5]),
        .I2(\retbuf_reg[8][0]_0 ),
        .I3(\retbuf_reg[15][7] [13]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[31] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2074" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[8][5]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[8][7] [25]),
        .O(\retbuf[8][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[8][6]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [26]),
        .I2(\retbuf_reg[15][7] [6]),
        .I3(\retbuf_reg[8][0]_0 ),
        .I4(\retbuf_reg[15][7] [14]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[31] [6]));
  LUT5 #(
    .INIT(32'hAAAABAAA)) 
    \retbuf[8][7]_i_1 
       (.I0(\retbuf[8][7]_i_3__0_n_0 ),
        .I1(\retbuf_reg[1][0]_0 ),
        .I2(\retbuf_reg[8][0] ),
        .I3(Q[1]),
        .I4(Q[5]),
        .O(\stateOp_reg[1]_1 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[8][7]_i_2 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [27]),
        .I2(\retbuf_reg[15][7] [7]),
        .I3(\retbuf_reg[8][0]_0 ),
        .I4(\retbuf_reg[15][7] [15]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[31] [7]));
  LUT6 #(
    .INIT(64'h00004404FFFFFFFF)) 
    \retbuf[8][7]_i_3__0 
       (.I0(\retbuf_reg[15][0] ),
        .I1(reqReset_sig_reg_0),
        .I2(\retbuf_reg[15][0]_0 ),
        .I3(\retbuf_reg[15][0]_1 ),
        .I4(reqReset_sig_reg_1),
        .I5(\stateOp_reg[4] ),
        .O(\retbuf[8][7]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[9][0]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [12]),
        .I2(\retbuf_reg[15][7] [0]),
        .I3(\retbuf_reg[9][0]_0 ),
        .I4(\retbuf_reg[15][7] [8]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[23] [0]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[9][1]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [13]),
        .I2(\retbuf_reg[15][7] [1]),
        .I3(\retbuf_reg[9][0]_0 ),
        .I4(\retbuf_reg[15][7] [9]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[23] [1]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[9][2]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [14]),
        .I2(\retbuf_reg[15][7] [2]),
        .I3(\retbuf_reg[9][0]_0 ),
        .I4(\retbuf_reg[15][7] [10]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[23] [2]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[9][3]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [15]),
        .I2(\retbuf_reg[15][7] [3]),
        .I3(\retbuf_reg[9][0]_0 ),
        .I4(\retbuf_reg[15][7] [11]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[23] [3]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[9][4]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [16]),
        .I2(\retbuf_reg[15][7] [4]),
        .I3(\retbuf_reg[9][0]_0 ),
        .I4(\retbuf_reg[15][7] [12]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[23] [4]));
  LUT5 #(
    .INIT(32'hEFEAAAAA)) 
    \retbuf[9][5]_i_1 
       (.I0(\retbuf[9][5]_i_2_n_0 ),
        .I1(\retbuf_reg[15][7] [5]),
        .I2(\retbuf_reg[9][0]_0 ),
        .I3(\retbuf_reg[15][7] [13]),
        .I4(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[23] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2073" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \retbuf[9][5]_i_2 
       (.I0(\retbuf_reg[4][7]_2 ),
        .I1(\stateOp_reg[4]_0 ),
        .I2(\pollbuf_reg[3][5]_0 ),
        .I3(\retbuf_reg[8][7] [17]),
        .O(\retbuf[9][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[9][6]_i_1 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [18]),
        .I2(\retbuf_reg[15][7] [6]),
        .I3(\retbuf_reg[9][0]_0 ),
        .I4(\retbuf_reg[15][7] [14]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[23] [6]));
  LUT6 #(
    .INIT(64'hAAAAAAAAAABAAAAA)) 
    \retbuf[9][7]_i_1 
       (.I0(\retbuf[8][7]_i_3__0_n_0 ),
        .I1(\retbuf_reg[1][0]_0 ),
        .I2(\retbuf_reg[4][7]_0 ),
        .I3(\retbuf_reg[9][0] ),
        .I4(Q[1]),
        .I5(Q[5]),
        .O(\stateOp_reg[1]_2 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[9][7]_i_2 
       (.I0(\retbuf[7][6]_i_2_n_0 ),
        .I1(\retbuf_reg[8][7] [19]),
        .I2(\retbuf_reg[15][7] [7]),
        .I3(\retbuf_reg[9][0]_0 ),
        .I4(\retbuf_reg[15][7] [15]),
        .I5(\stateOp_reg[4]_12 ),
        .O(\NWrA_reg[23] [7]));
  LUT5 #(
    .INIT(32'hEFAA20AA)) 
    \rxlen[0]_i_1 
       (.I0(rxlen),
        .I1(\rxlen_reg[0]_3 ),
        .I2(\rxlen[0]_i_4_n_0 ),
        .I3(\stateOp_reg[4] ),
        .I4(\rxlen_reg[0]_4 ),
        .O(\rxlen_reg[0] ));
  LUT6 #(
    .INIT(64'hFF00080008000800)) 
    \rxlen[0]_i_2 
       (.I0(\rxlen_reg[0]_0 ),
        .I1(\rxlen_reg[0]_1 ),
        .I2(Q[5]),
        .I3(\stateOp_reg[4] ),
        .I4(\rxlen_reg[0]_2 ),
        .I5(\wordcntLast_reg[0]_2 ),
        .O(rxlen));
  LUT6 #(
    .INIT(64'hFFEAAAAAAAAAAAAF)) 
    \rxlen[0]_i_4 
       (.I0(\stateOp[5]_i_18_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[2]),
        .I4(Q[3]),
        .I5(Q[4]),
        .O(\rxlen[0]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2036" *) 
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[0]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [0]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[10]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [10]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[10]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[11]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [11]),
        .O(\sendAXIL_rdata[11]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[12]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [12]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[12]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[13]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [13]),
        .O(\sendAXIL_rdata[13]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[14]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [14]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[14]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[15]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [15]),
        .O(\sendAXIL_rdata[15]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[16]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [16]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[16]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[17]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [17]),
        .O(\sendAXIL_rdata[17]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[18]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [18]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[18]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[19]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [19]),
        .O(\sendAXIL_rdata[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2037" *) 
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[1]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [1]),
        .O(\sendAXIL_rdata[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[20]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [20]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[20]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[21]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [21]),
        .O(\sendAXIL_rdata[21]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[22]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [22]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[22]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[23]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [23]),
        .O(\sendAXIL_rdata[23]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[24]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [24]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[24]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[25]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [25]),
        .O(\sendAXIL_rdata[25]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[26]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [26]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[26]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[27]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [27]),
        .O(\sendAXIL_rdata[27]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[28]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [28]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[28]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[29]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [29]),
        .O(\sendAXIL_rdata[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2038" *) 
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[2]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [2]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[30]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [30]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[30]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[31]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [31]),
        .O(\sendAXIL_rdata[31]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[32]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [32]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[32]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[33]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [33]),
        .O(\sendAXIL_rdata[33]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[34]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [34]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[34]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[35]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [35]),
        .O(\sendAXIL_rdata[35]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[36]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [36]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[36]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[37]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [37]),
        .O(\sendAXIL_rdata[37]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[38]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [38]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[38]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[39]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [39]),
        .O(\sendAXIL_rdata[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2039" *) 
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[3]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [3]),
        .O(\sendAXIL_rdata[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[40]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [40]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[40]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[41]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [41]),
        .O(\sendAXIL_rdata[41]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[42]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [42]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[42]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[43]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [43]),
        .O(\sendAXIL_rdata[43]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[44]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [44]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[44]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[45]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [45]),
        .O(\sendAXIL_rdata[45]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[46]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [46]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[46]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[47]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [47]),
        .O(\sendAXIL_rdata[47]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[48]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [48]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[48]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[49]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [49]),
        .O(\sendAXIL_rdata[49]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2040" *) 
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[4]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [4]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[50]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [50]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[50]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[51]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [51]),
        .O(\sendAXIL_rdata[51]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[52]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [52]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[52]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[53]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [53]),
        .O(\sendAXIL_rdata[53]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[54]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [54]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[54]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[55]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [55]),
        .O(\sendAXIL_rdata[55]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[56]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [56]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[56]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[57]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [57]),
        .O(\sendAXIL_rdata[57]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[58]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [58]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[58]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[59]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [59]),
        .O(\sendAXIL_rdata[59]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2041" *) 
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[5]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [5]),
        .O(\sendAXIL_rdata[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[60]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [60]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[60]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[61]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [61]),
        .O(\sendAXIL_rdata[61]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[62]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [62]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[62]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0F00FF40FFFFFFFF)) 
    \sendAXIL_rdata[63]_i_1 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(stateSend[0]),
        .I3(\sendAXIL_rdata[63]_i_3_n_0 ),
        .I4(\sendAXIL_rdata[63]_i_4_n_0 ),
        .I5(\sendAXIL_rdata[63]_i_5_n_0 ),
        .O(\sendAXIL_rdata[63]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[63]_i_2 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [63]),
        .O(\sendAXIL_rdata[63]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000040000000)) 
    \sendAXIL_rdata[63]_i_3 
       (.I0(AXIL_araddr_sig[4]),
        .I1(AXIL_arready),
        .I2(apuAXIL_arvalid),
        .I3(AXIL_araddr_sig[5]),
        .I4(stateSend[1]),
        .I5(stateSend[2]),
        .O(\sendAXIL_rdata[63]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFDFFFEF7FDDFFFFB)) 
    \sendAXIL_rdata[63]_i_4 
       (.I0(Q[0]),
        .I1(Q[5]),
        .I2(Q[4]),
        .I3(Q[1]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\sendAXIL_rdata[63]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h8000AAA8AAA8AAA8)) 
    \sendAXIL_rdata[63]_i_5 
       (.I0(\stateSend[2]_i_9_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(stateTo[0]),
        .I5(stateTo[1]),
        .O(\sendAXIL_rdata[63]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2042" *) 
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[6]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [6]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[7]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [7]),
        .O(\sendAXIL_rdata[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[8]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[63]_0 [8]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[8]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[9]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[63]_0 [9]),
        .O(\sendAXIL_rdata[9]_i_1_n_0 ));
  FDCE \sendAXIL_rdata_reg[0] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[0]_i_1_n_0 ),
        .Q(sendAXIL_rdata[0]));
  FDCE \sendAXIL_rdata_reg[10] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[10]_i_1_n_0 ),
        .Q(sendAXIL_rdata[10]));
  FDCE \sendAXIL_rdata_reg[11] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[11]_i_1_n_0 ),
        .Q(sendAXIL_rdata[11]));
  FDCE \sendAXIL_rdata_reg[12] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[12]_i_1_n_0 ),
        .Q(sendAXIL_rdata[12]));
  FDCE \sendAXIL_rdata_reg[13] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[13]_i_1_n_0 ),
        .Q(sendAXIL_rdata[13]));
  FDCE \sendAXIL_rdata_reg[14] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[14]_i_1_n_0 ),
        .Q(sendAXIL_rdata[14]));
  FDCE \sendAXIL_rdata_reg[15] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[15]_i_1_n_0 ),
        .Q(sendAXIL_rdata[15]));
  FDCE \sendAXIL_rdata_reg[16] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[16]_i_1_n_0 ),
        .Q(sendAXIL_rdata[16]));
  FDCE \sendAXIL_rdata_reg[17] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[17]_i_1_n_0 ),
        .Q(sendAXIL_rdata[17]));
  FDCE \sendAXIL_rdata_reg[18] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[18]_i_1_n_0 ),
        .Q(sendAXIL_rdata[18]));
  FDCE \sendAXIL_rdata_reg[19] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[19]_i_1_n_0 ),
        .Q(sendAXIL_rdata[19]));
  FDCE \sendAXIL_rdata_reg[1] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[1]_i_1_n_0 ),
        .Q(sendAXIL_rdata[1]));
  FDCE \sendAXIL_rdata_reg[20] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[20]_i_1_n_0 ),
        .Q(sendAXIL_rdata[20]));
  FDCE \sendAXIL_rdata_reg[21] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[21]_i_1_n_0 ),
        .Q(sendAXIL_rdata[21]));
  FDCE \sendAXIL_rdata_reg[22] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[22]_i_1_n_0 ),
        .Q(sendAXIL_rdata[22]));
  FDCE \sendAXIL_rdata_reg[23] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[23]_i_1_n_0 ),
        .Q(sendAXIL_rdata[23]));
  FDCE \sendAXIL_rdata_reg[24] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[24]_i_1_n_0 ),
        .Q(sendAXIL_rdata[24]));
  FDCE \sendAXIL_rdata_reg[25] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[25]_i_1_n_0 ),
        .Q(sendAXIL_rdata[25]));
  FDCE \sendAXIL_rdata_reg[26] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[26]_i_1_n_0 ),
        .Q(sendAXIL_rdata[26]));
  FDCE \sendAXIL_rdata_reg[27] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[27]_i_1_n_0 ),
        .Q(sendAXIL_rdata[27]));
  FDCE \sendAXIL_rdata_reg[28] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[28]_i_1_n_0 ),
        .Q(sendAXIL_rdata[28]));
  FDCE \sendAXIL_rdata_reg[29] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[29]_i_1_n_0 ),
        .Q(sendAXIL_rdata[29]));
  FDCE \sendAXIL_rdata_reg[2] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[2]_i_1_n_0 ),
        .Q(sendAXIL_rdata[2]));
  FDCE \sendAXIL_rdata_reg[30] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[30]_i_1_n_0 ),
        .Q(sendAXIL_rdata[30]));
  FDCE \sendAXIL_rdata_reg[31] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[31]_i_1_n_0 ),
        .Q(sendAXIL_rdata[31]));
  FDCE \sendAXIL_rdata_reg[32] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[32]_i_1_n_0 ),
        .Q(sendAXIL_rdata[32]));
  FDCE \sendAXIL_rdata_reg[33] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[33]_i_1_n_0 ),
        .Q(sendAXIL_rdata[33]));
  FDCE \sendAXIL_rdata_reg[34] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[34]_i_1_n_0 ),
        .Q(sendAXIL_rdata[34]));
  FDCE \sendAXIL_rdata_reg[35] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[35]_i_1_n_0 ),
        .Q(sendAXIL_rdata[35]));
  FDCE \sendAXIL_rdata_reg[36] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[36]_i_1_n_0 ),
        .Q(sendAXIL_rdata[36]));
  FDCE \sendAXIL_rdata_reg[37] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[37]_i_1_n_0 ),
        .Q(sendAXIL_rdata[37]));
  FDCE \sendAXIL_rdata_reg[38] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[38]_i_1_n_0 ),
        .Q(sendAXIL_rdata[38]));
  FDCE \sendAXIL_rdata_reg[39] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[39]_i_1_n_0 ),
        .Q(sendAXIL_rdata[39]));
  FDCE \sendAXIL_rdata_reg[3] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[3]_i_1_n_0 ),
        .Q(sendAXIL_rdata[3]));
  FDCE \sendAXIL_rdata_reg[40] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[40]_i_1_n_0 ),
        .Q(sendAXIL_rdata[40]));
  FDCE \sendAXIL_rdata_reg[41] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[41]_i_1_n_0 ),
        .Q(sendAXIL_rdata[41]));
  FDCE \sendAXIL_rdata_reg[42] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[42]_i_1_n_0 ),
        .Q(sendAXIL_rdata[42]));
  FDCE \sendAXIL_rdata_reg[43] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[43]_i_1_n_0 ),
        .Q(sendAXIL_rdata[43]));
  FDCE \sendAXIL_rdata_reg[44] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[44]_i_1_n_0 ),
        .Q(sendAXIL_rdata[44]));
  FDCE \sendAXIL_rdata_reg[45] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[45]_i_1_n_0 ),
        .Q(sendAXIL_rdata[45]));
  FDCE \sendAXIL_rdata_reg[46] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[46]_i_1_n_0 ),
        .Q(sendAXIL_rdata[46]));
  FDCE \sendAXIL_rdata_reg[47] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[47]_i_1_n_0 ),
        .Q(sendAXIL_rdata[47]));
  FDCE \sendAXIL_rdata_reg[48] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[48]_i_1_n_0 ),
        .Q(sendAXIL_rdata[48]));
  FDCE \sendAXIL_rdata_reg[49] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[49]_i_1_n_0 ),
        .Q(sendAXIL_rdata[49]));
  FDCE \sendAXIL_rdata_reg[4] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[4]_i_1_n_0 ),
        .Q(sendAXIL_rdata[4]));
  FDCE \sendAXIL_rdata_reg[50] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[50]_i_1_n_0 ),
        .Q(sendAXIL_rdata[50]));
  FDCE \sendAXIL_rdata_reg[51] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[51]_i_1_n_0 ),
        .Q(sendAXIL_rdata[51]));
  FDCE \sendAXIL_rdata_reg[52] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[52]_i_1_n_0 ),
        .Q(sendAXIL_rdata[52]));
  FDCE \sendAXIL_rdata_reg[53] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[53]_i_1_n_0 ),
        .Q(sendAXIL_rdata[53]));
  FDCE \sendAXIL_rdata_reg[54] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[54]_i_1_n_0 ),
        .Q(sendAXIL_rdata[54]));
  FDCE \sendAXIL_rdata_reg[55] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[55]_i_1_n_0 ),
        .Q(sendAXIL_rdata[55]));
  FDCE \sendAXIL_rdata_reg[56] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[56]_i_1_n_0 ),
        .Q(sendAXIL_rdata[56]));
  FDCE \sendAXIL_rdata_reg[57] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[57]_i_1_n_0 ),
        .Q(sendAXIL_rdata[57]));
  FDCE \sendAXIL_rdata_reg[58] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[58]_i_1_n_0 ),
        .Q(sendAXIL_rdata[58]));
  FDCE \sendAXIL_rdata_reg[59] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[59]_i_1_n_0 ),
        .Q(sendAXIL_rdata[59]));
  FDCE \sendAXIL_rdata_reg[5] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[5]_i_1_n_0 ),
        .Q(sendAXIL_rdata[5]));
  FDCE \sendAXIL_rdata_reg[60] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[60]_i_1_n_0 ),
        .Q(sendAXIL_rdata[60]));
  FDCE \sendAXIL_rdata_reg[61] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[61]_i_1_n_0 ),
        .Q(sendAXIL_rdata[61]));
  FDCE \sendAXIL_rdata_reg[62] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[62]_i_1_n_0 ),
        .Q(sendAXIL_rdata[62]));
  FDCE \sendAXIL_rdata_reg[63] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[63]_i_2_n_0 ),
        .Q(sendAXIL_rdata[63]));
  FDCE \sendAXIL_rdata_reg[6] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[6]_i_1_n_0 ),
        .Q(sendAXIL_rdata[6]));
  FDCE \sendAXIL_rdata_reg[7] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[7]_i_1_n_0 ),
        .Q(sendAXIL_rdata[7]));
  FDCE \sendAXIL_rdata_reg[8] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[8]_i_1_n_0 ),
        .Q(sendAXIL_rdata[8]));
  FDCE \sendAXIL_rdata_reg[9] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[63]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\sendAXIL_rdata[9]_i_1_n_0 ),
        .Q(sendAXIL_rdata[9]));
  LUT6 #(
    .INIT(64'h37F7000037070000)) 
    sendStrbToStart_i_1
       (.I0(stateSend[2]),
        .I1(sendStrbToStart_i_2_n_0),
        .I2(sendStrbToStart_i_3_n_0),
        .I3(sendStrbToStart_i_4_n_0),
        .I4(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I5(sendStrbToStart_reg_n_0),
        .O(sendStrbToStart_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2126" *) 
  LUT4 #(
    .INIT(16'hDFFF)) 
    sendStrbToStart_i_10
       (.I0(\AXIL_wdata_sig_reg_n_0_[59] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[58] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[47] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[1] ),
        .O(sendStrbToStart_i_10_n_0));
  LUT5 #(
    .INIT(32'hFFFFBFFF)) 
    sendStrbToStart_i_11
       (.I0(\AXIL_wdata_sig_reg_n_0_[38] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[9] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[49] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[55] ),
        .I4(sendStrbToStart_i_18_n_0),
        .O(sendStrbToStart_i_11_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2128" *) 
  LUT4 #(
    .INIT(16'hFFFD)) 
    sendStrbToStart_i_12
       (.I0(\AXIL_wdata_sig_reg_n_0_[27] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[26] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[32] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[8] ),
        .O(sendStrbToStart_i_12_n_0));
  LUT5 #(
    .INIT(32'hFFFF7FFF)) 
    sendStrbToStart_i_13
       (.I0(\AXIL_wdata_sig_reg_n_0_[23] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[33] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[35] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[53] ),
        .I4(sendStrbToStart_i_19_n_0),
        .O(sendStrbToStart_i_13_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2122" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    sendStrbToStart_i_14
       (.I0(\AXIL_wdata_sig_reg_n_0_[39] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[17] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[37] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[13] ),
        .O(sendStrbToStart_i_14_n_0));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    sendStrbToStart_i_15
       (.I0(\AXIL_wdata_sig_reg_n_0_[6] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[12] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[16] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[18] ),
        .I4(sendStrbToStart_i_20_n_0),
        .O(sendStrbToStart_i_15_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2124" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    sendStrbToStart_i_16
       (.I0(\AXIL_wdata_sig_reg_n_0_[63] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[5] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[61] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[57] ),
        .O(sendStrbToStart_i_16_n_0));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    sendStrbToStart_i_17
       (.I0(\AXIL_wdata_sig_reg_n_0_[22] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[28] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[0] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[30] ),
        .I4(sendStrbToStart_i_21_n_0),
        .O(sendStrbToStart_i_17_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2125" *) 
  LUT4 #(
    .INIT(16'hFFDF)) 
    sendStrbToStart_i_18
       (.I0(\AXIL_wdata_sig_reg_n_0_[41] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[42] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[45] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[40] ),
        .O(sendStrbToStart_i_18_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2127" *) 
  LUT4 #(
    .INIT(16'hFFDF)) 
    sendStrbToStart_i_19
       (.I0(p_0_in[1]),
        .I1(\AXIL_wdata_sig_reg_n_0_[14] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[51] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[52] ),
        .O(sendStrbToStart_i_19_n_0));
  LUT6 #(
    .INIT(64'hFFAAFFFFFFFF3FFF)) 
    sendStrbToStart_i_2
       (.I0(\sendAXIL_rdata[63]_i_4_n_0 ),
        .I1(\stateSend[2]_i_3_n_0 ),
        .I2(sendStrbToStart0),
        .I3(stateSend[2]),
        .I4(stateSend[1]),
        .I5(stateSend[0]),
        .O(sendStrbToStart_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2121" *) 
  LUT4 #(
    .INIT(16'hFF7F)) 
    sendStrbToStart_i_20
       (.I0(\AXIL_wdata_sig_reg_n_0_[31] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[29] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[25] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[24] ),
        .O(sendStrbToStart_i_20_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2123" *) 
  LUT4 #(
    .INIT(16'hFF7F)) 
    sendStrbToStart_i_21
       (.I0(\AXIL_wdata_sig_reg_n_0_[21] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[19] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[15] ),
        .I3(p_0_in[0]),
        .O(sendStrbToStart_i_21_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFBFFFF)) 
    sendStrbToStart_i_3
       (.I0(sendStrbToStart_i_5_n_0),
        .I1(stateSend[0]),
        .I2(stateSend[1]),
        .I3(\stateRecv[2]_i_12_n_0 ),
        .I4(ixBlkWrite[1]),
        .I5(ixBlkWrite[0]),
        .O(sendStrbToStart_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2107" *) 
  LUT4 #(
    .INIT(16'h2666)) 
    sendStrbToStart_i_4
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(stateSend[0]),
        .I3(\sendAXIL_rdata[63]_i_4_n_0 ),
        .O(sendStrbToStart_i_4_n_0));
  LUT4 #(
    .INIT(16'hFFFE)) 
    sendStrbToStart_i_5
       (.I0(sendStrbToStart_i_6_n_0),
        .I1(sendStrbToStart_i_7_n_0),
        .I2(sendStrbToStart_i_8_n_0),
        .I3(sendStrbToStart_i_9_n_0),
        .O(sendStrbToStart_i_5_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFEFF)) 
    sendStrbToStart_i_6
       (.I0(sendStrbToStart_i_10_n_0),
        .I1(\AXIL_wdata_sig_reg_n_0_[46] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[44] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[43] ),
        .I4(\AXIL_wdata_sig_reg_n_0_[4] ),
        .I5(sendStrbToStart_i_11_n_0),
        .O(sendStrbToStart_i_6_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFEFF)) 
    sendStrbToStart_i_7
       (.I0(sendStrbToStart_i_12_n_0),
        .I1(\AXIL_wdata_sig_reg_n_0_[62] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[54] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[7] ),
        .I4(\AXIL_wdata_sig_reg_n_0_[60] ),
        .I5(sendStrbToStart_i_13_n_0),
        .O(sendStrbToStart_i_7_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFB)) 
    sendStrbToStart_i_8
       (.I0(sendStrbToStart_i_14_n_0),
        .I1(\AXIL_wdata_sig_reg_n_0_[11] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[10] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[36] ),
        .I4(\AXIL_wdata_sig_reg_n_0_[34] ),
        .I5(sendStrbToStart_i_15_n_0),
        .O(sendStrbToStart_i_8_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    sendStrbToStart_i_9
       (.I0(sendStrbToStart_i_16_n_0),
        .I1(\AXIL_wdata_sig_reg_n_0_[56] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[50] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[48] ),
        .I4(\AXIL_wdata_sig_reg_n_0_[20] ),
        .I5(sendStrbToStart_i_17_n_0),
        .O(sendStrbToStart_i_9_n_0));
  FDCE sendStrbToStart_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(sendStrbToStart_i_1_n_0),
        .Q(sendStrbToStart_reg_n_0));
  LUT6 #(
    .INIT(64'hAABAAAAAAA8AAAAA)) 
    sendStrbToStop_i_1
       (.I0(sendStrbToStop_i_2_n_0),
        .I1(sendStrbToStop_i_3_n_0),
        .I2(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I3(sendStrbToStop_i_4_n_0),
        .I4(sendStrbToStop_i_5_n_0),
        .I5(sendStrbToStop_reg_n_0),
        .O(sendStrbToStop_i_1_n_0));
  LUT6 #(
    .INIT(64'h5F5C0C0C00000000)) 
    sendStrbToStop_i_2
       (.I0(\stateSend[2]_i_5_n_0 ),
        .I1(\sendAXIL_rdata[63]_i_3_n_0 ),
        .I2(stateSend[0]),
        .I3(\stateSend[2]_i_3_n_0 ),
        .I4(\stateSend[2]_i_6_n_0 ),
        .I5(\sendAXIL_rdata[63]_i_5_n_0 ),
        .O(sendStrbToStop_i_2_n_0));
  LUT6 #(
    .INIT(64'h0400040007000400)) 
    sendStrbToStop_i_3
       (.I0(\stateSend[2]_i_5_n_0 ),
        .I1(stateSend[0]),
        .I2(stateSend[1]),
        .I3(stateSend[2]),
        .I4(\stateSend[2]_i_3_n_0 ),
        .I5(sendStrbToStart0),
        .O(sendStrbToStop_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2040" *) 
  LUT3 #(
    .INIT(8'h08)) 
    sendStrbToStop_i_4
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(stateSend[0]),
        .O(sendStrbToStop_i_4_n_0));
  LUT6 #(
    .INIT(64'hDFDFDFDFCFDFDFDF)) 
    sendStrbToStop_i_5
       (.I0(stateSend[0]),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(AXIL_araddr_sig[5]),
        .I4(strbRead),
        .I5(AXIL_araddr_sig[4]),
        .O(sendStrbToStop_i_5_n_0));
  FDCE sendStrbToStop_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(sendStrbToStop_i_1_n_0),
        .Q(sendStrbToStop_reg_n_0));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \stateOp[0]_i_1__6 
       (.I0(\stateOp[0]_i_2_n_0 ),
        .I1(\stateOp_reg[0]_6 ),
        .I2(Q[4]),
        .I3(\stateOp[0]_i_4_n_0 ),
        .I4(Q[5]),
        .I5(\stateOp_reg[0]_7 ),
        .O(\stateOp_reg[5]_4 [0]));
  LUT6 #(
    .INIT(64'hBF00BFBFBFBFBFBF)) 
    \stateOp[0]_i_2 
       (.I0(\stateOp_reg[0]_0 ),
        .I1(\stateOp_reg[0]_8 [0]),
        .I2(\stateOp_reg[0]_8 [1]),
        .I3(\stateRecv_reg[0]_1 ),
        .I4(\stateOp_reg[0]_9 [0]),
        .I5(\stateOp_reg[0]_9 [1]),
        .O(\stateOp[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hA0A0FEFEF0F0F0A0)) 
    \stateOp[0]_i_4 
       (.I0(Q[3]),
        .I1(\stateOp[4]_i_6_n_0 ),
        .I2(Q[0]),
        .I3(crcAXIS_tlast_sig_reg_3),
        .I4(Q[1]),
        .I5(Q[2]),
        .O(\stateOp[0]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2041" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \stateOp[1]_i_10 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .O(\stateOp[1]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h00F1FFFF00000000)) 
    \stateOp[1]_i_1__4 
       (.I0(\stateOp_reg[1]_10 ),
        .I1(\stateOp_reg[1]_11 ),
        .I2(\stateOp[1]_i_4__1_n_0 ),
        .I3(Q[5]),
        .I4(\stateOp_reg[1]_12 ),
        .I5(\stateOp_reg[4] ),
        .O(\stateOp_reg[5]_4 [1]));
  LUT6 #(
    .INIT(64'hEEEEFFFFFFF0FFFF)) 
    \stateOp[1]_i_3 
       (.I0(\stateRecv_reg[0]_0 ),
        .I1(stateOp_reg),
        .I2(txAXIS_tready),
        .I3(\stateOp_reg[0]_10 ),
        .I4(ackRxtx),
        .I5(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(\stateRecv_reg[0]_1 ));
  LUT6 #(
    .INIT(64'h00000000CC0E0C0C)) 
    \stateOp[1]_i_3__0 
       (.I0(\stateOp_reg[0]_11 ),
        .I1(\sendAXIL_rdata[63]_i_4_n_0 ),
        .I2(\stateOp_reg[0]_12 ),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(ackRxtx),
        .I5(\stateOp_reg[0]_13 ),
        .O(\stateOp_reg[0]_0 ));
  LUT6 #(
    .INIT(64'h800000008000A000)) 
    \stateOp[1]_i_4__1 
       (.I0(\stateOp_reg[1]_13 ),
        .I1(crcAXIS_tlast_sig_reg_0),
        .I2(Q[0]),
        .I3(Q[2]),
        .I4(Q[1]),
        .I5(\stateOp[3]_i_7_n_0 ),
        .O(\stateOp[1]_i_4__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2038" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \stateOp[1]_i_5 
       (.I0(stateSend[0]),
        .I1(stateSend[1]),
        .I2(stateSend[2]),
        .O(txAXIS_tready));
  LUT6 #(
    .INIT(64'h7C007C007CFF7C00)) 
    \stateOp[1]_i_7 
       (.I0(stateRecv[0]),
        .I1(stateRecv[2]),
        .I2(stateRecv[1]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(\stateOp[1]_i_9_n_0 ),
        .I5(\stateOp[1]_i_10_n_0 ),
        .O(ackRxtx));
  (* SOFT_HLUTNM = "soft_lutpair2039" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    \stateOp[1]_i_9 
       (.I0(stateSend[1]),
        .I1(stateSend[2]),
        .I2(stateSend[0]),
        .O(\stateOp[1]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA0020AAAA002A)) 
    \stateOp[2]_i_1__1 
       (.I0(\stateOp_reg[4] ),
        .I1(\stateOp[2]_i_2__1_n_0 ),
        .I2(Q[4]),
        .I3(Q[5]),
        .I4(\stateOp_reg[2]_2 ),
        .I5(\stateOp_reg[2]_3 ),
        .O(\stateOp_reg[5]_4 [2]));
  LUT6 #(
    .INIT(64'hCCAA33AACC303333)) 
    \stateOp[2]_i_2__1 
       (.I0(\stateOp[2]_i_5__1_n_0 ),
        .I1(Q[1]),
        .I2(crcAXIS_tlast_sig_reg_3),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[3]),
        .O(\stateOp[2]_i_2__1_n_0 ));
  LUT5 #(
    .INIT(32'h0FEFFFEF)) 
    \stateOp[2]_i_5__1 
       (.I0(crcAXIS_tlast_sig_reg_0),
        .I1(\stateOp[3]_i_3_0 ),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(\stateOp[4]_i_6_n_0 ),
        .O(\stateOp[2]_i_5__1_n_0 ));
  LUT5 #(
    .INIT(32'hCFBBFF33)) 
    \stateOp[2]_i_8__1 
       (.I0(\stateOp[3]_i_7_n_0 ),
        .I1(Q[2]),
        .I2(crcAXIS_tlast_sig_reg_0),
        .I3(Q[1]),
        .I4(Q[0]),
        .O(\stateOp_reg[2]_1 ));
  LUT6 #(
    .INIT(64'h888888888AAAAAAA)) 
    \stateOp[3]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\stateOp[3]_i_3_n_0 ),
        .I2(\stateOp[3]_i_4__0_n_0 ),
        .I3(Q[3]),
        .I4(Q[2]),
        .I5(\stateOp_reg[3]_1 ),
        .O(\stateOp_reg[5]_4 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2010" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp[3]_i_2 
       (.I0(\stateOp_reg[4] ),
        .I1(Q[5]),
        .O(\stateOp_reg[5]_6 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFA0520000)) 
    \stateOp[3]_i_3 
       (.I0(Q[0]),
        .I1(crcAXIS_tlast_sig_reg_3),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(\stateOp_reg[3]_2 ),
        .I5(\stateOp[3]_i_6_n_0 ),
        .O(\stateOp[3]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'hF8)) 
    \stateOp[3]_i_4__0 
       (.I0(Q[0]),
        .I1(\stateOp[3]_i_7_n_0 ),
        .I2(Q[1]),
        .O(\stateOp[3]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAA8A)) 
    \stateOp[3]_i_6 
       (.I0(\stateOp[4]_i_3__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(\stateOp[3]_i_3_0 ),
        .I4(crcAXIS_tlast_sig_reg_0),
        .I5(Q[2]),
        .O(\stateOp[3]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFD)) 
    \stateOp[3]_i_7 
       (.I0(\stateOp[4]_i_6_n_0 ),
        .I1(crcAXIS_tlast_sig_i_6_1[3]),
        .I2(crcAXIS_tlast_sig_i_6_1[2]),
        .I3(\pollbuf_reg[0][7]_1 ),
        .I4(crcAXIS_tlast_sig_i_6_1[1]),
        .I5(crcAXIS_tlast_sig_i_6_1[0]),
        .O(\stateOp[3]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h44444440)) 
    \stateOp[4]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\stateOp[4]_i_3__0_n_0 ),
        .I3(\stateOp_reg[4]_15 ),
        .I4(\stateOp_reg[4]_16 ),
        .O(\stateOp_reg[5]_4 [4]));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAA8A)) 
    \stateOp[4]_i_2 
       (.I0(\stateOp[0]_i_2_n_0 ),
        .I1(Q[4]),
        .I2(commok_sig_reg_1),
        .I3(Q[2]),
        .I4(Q[5]),
        .I5(Q[0]),
        .O(\stateOp_reg[4] ));
  LUT6 #(
    .INIT(64'h0088880080888888)) 
    \stateOp[4]_i_3__0 
       (.I0(Q[4]),
        .I1(Q[3]),
        .I2(\stateOp[4]_i_6_n_0 ),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(Q[2]),
        .O(\stateOp[4]_i_3__0_n_0 ));
  LUT5 #(
    .INIT(32'h00000001)) 
    \stateOp[4]_i_6 
       (.I0(rxAXIS_tdata[3]),
        .I1(rxAXIS_tdata[1]),
        .I2(recvAXIS_tdata[1]),
        .I3(rxAXIS_tdata[5]),
        .I4(\stateOp[4]_i_7_n_0 ),
        .O(\stateOp[4]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2106" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateOp[4]_i_7 
       (.I0(recvAXIS_tdata[0]),
        .I1(rxAXIS_tdata[2]),
        .I2(rxAXIS_tdata[4]),
        .I3(rxAXIS_tdata[6]),
        .O(\stateOp[4]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFEEEFEFEEEEEEEEE)) 
    \stateOp[5]_i_1 
       (.I0(\stateOp_reg[0]_4 ),
        .I1(\stateOp[5]_i_4_n_0 ),
        .I2(\stateOp[5]_i_5_n_0 ),
        .I3(\stateOp[5]_i_6_n_0 ),
        .I4(\stateOp_reg[0]_5 ),
        .I5(\stateOp_reg[0]_2 ),
        .O(\stateOp_reg[3]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2107" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    \stateOp[5]_i_18 
       (.I0(stateSend[0]),
        .I1(stateSend[1]),
        .I2(stateSend[2]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(\stateOp[5]_i_18_n_0 ));
  LUT5 #(
    .INIT(32'h0001FFFF)) 
    \stateOp[5]_i_4 
       (.I0(\stateOp_reg[0]_1 ),
        .I1(\stateOp_reg[0]_2 ),
        .I2(\wordcntLast_reg[28] ),
        .I3(\stateOp_reg[0]_3 ),
        .I4(\stateOp_reg[4]_0 ),
        .O(\stateOp[5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFAAC0FFFFFFFF)) 
    \stateOp[5]_i_5 
       (.I0(\stateOp[5]_i_18_n_0 ),
        .I1(crcAXIS_tlast_sig_reg_0),
        .I2(\stateRecv_reg[0]_0 ),
        .I3(\stateOp_reg[0]_3 ),
        .I4(\stateOp_reg[0]_5 ),
        .I5(\stateOp_reg[0]_1 ),
        .O(\stateOp[5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \stateOp[5]_i_6 
       (.I0(\txAXIS_tdata_reg[8]_1 ),
        .I1(\wordcntLast_reg[28] ),
        .I2(\stateOp_reg[0]_1 ),
        .I3(\stateRecv_reg[0]_0 ),
        .I4(\stateOp_reg[0]_3 ),
        .I5(txAXIS_tready),
        .O(\stateOp[5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAA8A)) 
    \stateOp[5]_i_9 
       (.I0(\stateOp[0]_i_2_n_0 ),
        .I1(Q[4]),
        .I2(commok_sig_reg_1),
        .I3(Q[2]),
        .I4(Q[5]),
        .I5(Q[0]),
        .O(\stateOp_reg[4]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2014" *) 
  LUT4 #(
    .INIT(16'h5155)) 
    stateOp_i_1__1
       (.I0(crcAXIS_tlast_sig_reg_3),
        .I1(\stateRecv_reg[0]_0 ),
        .I2(stateOp_reg),
        .I3(recvAXIS_tlast),
        .O(crcAXIS_tlast_sig_reg));
  LUT5 #(
    .INIT(32'hFFFE0000)) 
    \stateOp_next[0]_i_1__0 
       (.I0(\stateOp_next_reg[5]_0 ),
        .I1(\stateOp_next_reg[4] ),
        .I2(\stateOp_next_reg[1] ),
        .I3(\stateOp_next_reg[5]_1 ),
        .I4(\stateOp_reg[4] ),
        .O(\len_reg[2] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2011" *) 
  LUT5 #(
    .INIT(32'hAAAA08A8)) 
    \stateOp_next[1]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(\stateOp_next_reg[1] ),
        .I2(\stateOp_next_reg[5]_0 ),
        .I3(\stateOp_next_reg[5] ),
        .I4(\stateOp_next_reg[5]_1 ),
        .O(\len_reg[2] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2011" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \stateOp_next[3]_i_1 
       (.I0(\stateOp_next_reg[5]_0 ),
        .I1(\stateOp_next_reg[5] ),
        .I2(\stateOp_next_reg[5]_1 ),
        .I3(\stateOp_reg[4] ),
        .O(\len_reg[2] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2004" *) 
  LUT5 #(
    .INIT(32'h40504000)) 
    \stateOp_next[4]_i_1 
       (.I0(\stateOp_next_reg[5]_1 ),
        .I1(\stateOp_next_reg[5] ),
        .I2(\stateOp_reg[4] ),
        .I3(\stateOp_next_reg[5]_0 ),
        .I4(\stateOp_next_reg[4] ),
        .O(\len_reg[2] [3]));
  LUT6 #(
    .INIT(64'h555555555555D555)) 
    \stateOp_next[5]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(\stateOp_next_reg[0] ),
        .I2(Q[2]),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(Q[5]),
        .O(\stateOp_reg[2]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2004" *) 
  LUT4 #(
    .INIT(16'h0020)) 
    \stateOp_next[5]_i_2 
       (.I0(\stateOp_next_reg[5]_0 ),
        .I1(\stateOp_next_reg[5] ),
        .I2(\stateOp_reg[4] ),
        .I3(\stateOp_next_reg[5]_1 ),
        .O(\len_reg[2] [4]));
  LUT6 #(
    .INIT(64'h06FF060006000600)) 
    \stateRecv[0]_i_1 
       (.I0(stateRecv[2]),
        .I1(stateRecv[1]),
        .I2(stateRecv[0]),
        .I3(p_1_in0),
        .I4(req),
        .I5(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .O(\stateRecv[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAA2A2A2A2A2A2A00)) 
    \stateRecv[0]_i_2 
       (.I0(\stateRecv[2]_i_9__0_n_0 ),
        .I1(stateTo[0]),
        .I2(stateTo[1]),
        .I3(stateRecv[0]),
        .I4(stateRecv[1]),
        .I5(stateRecv[2]),
        .O(p_1_in0));
  LUT6 #(
    .INIT(64'hCCCCCCC4C0CCCCC0)) 
    \stateRecv[1]_i_1 
       (.I0(recvAXIS_tlast),
        .I1(\stateRecv[2]_i_9__0_n_0 ),
        .I2(\stateSend[2]_i_10_n_0 ),
        .I3(stateRecv[0]),
        .I4(stateRecv[1]),
        .I5(stateRecv[2]),
        .O(\stateRecv[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEFFFEFFFFFFFE)) 
    \stateRecv[2]_i_1 
       (.I0(\stateRecv[2]_i_3_n_0 ),
        .I1(\stateRecv[2]_i_4_n_0 ),
        .I2(\stateRecv[2]_i_5_n_0 ),
        .I3(\stateRecv[2]_i_6__0_n_0 ),
        .I4(\stateRecv[2]_i_7_n_0 ),
        .I5(\stateRecv[2]_i_8_n_0 ),
        .O(\stateRecv[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFBFFFFFF)) 
    \stateRecv[2]_i_10 
       (.I0(sendStrbToStart_i_5_n_0),
        .I1(stateRecv[0]),
        .I2(ixBlkWrite[0]),
        .I3(AXIL_bvalid_sig_reg_0),
        .I4(apuAXIL_bready),
        .I5(ixBlkWrite[1]),
        .O(\stateRecv[2]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h0002080409000040)) 
    \stateRecv[2]_i_11 
       (.I0(Q[3]),
        .I1(Q[1]),
        .I2(Q[5]),
        .I3(Q[4]),
        .I4(Q[2]),
        .I5(Q[0]),
        .O(p_33_in));
  (* SOFT_HLUTNM = "soft_lutpair2033" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \stateRecv[2]_i_12 
       (.I0(AXIL_bvalid_sig_reg_0),
        .I1(apuAXIL_bready),
        .O(\stateRecv[2]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCCCC8CCC0C0C0)) 
    \stateRecv[2]_i_2 
       (.I0(recvAXIS_tlast),
        .I1(\stateRecv[2]_i_9__0_n_0 ),
        .I2(\stateSend[2]_i_10_n_0 ),
        .I3(stateRecv[0]),
        .I4(stateRecv[1]),
        .I5(stateRecv[2]),
        .O(\stateRecv[2]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2034" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \stateRecv[2]_i_3 
       (.I0(stateRecv[2]),
        .I1(stateRecv[1]),
        .I2(\stateRecv[2]_i_10_n_0 ),
        .O(\stateRecv[2]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h0400FFFF)) 
    \stateRecv[2]_i_4 
       (.I0(stateRecv[0]),
        .I1(stateRecv[1]),
        .I2(stateRecv[2]),
        .I3(\recvAXIL_rdata[63]_i_2_n_0 ),
        .I4(p_1_in0),
        .O(\stateRecv[2]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2035" *) 
  LUT4 #(
    .INIT(16'h1000)) 
    \stateRecv[2]_i_5 
       (.I0(stateRecv[1]),
        .I1(stateRecv[0]),
        .I2(stateRecv[2]),
        .I3(p_33_in),
        .O(\stateRecv[2]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000002000000000)) 
    \stateRecv[2]_i_6__0 
       (.I0(stateRecv[1]),
        .I1(stateRecv[2]),
        .I2(ixBlkWrite[0]),
        .I3(ixBlkWrite[1]),
        .I4(\stateRecv[2]_i_12_n_0 ),
        .I5(stateRecv[0]),
        .O(\stateRecv[2]_i_6__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000000200000000)) 
    \stateRecv[2]_i_7 
       (.I0(\stateSend[2]_i_11_n_0 ),
        .I1(ixBlkWrite[0]),
        .I2(\stateRecv[2]_i_12_n_0 ),
        .I3(ixBlkWrite[1]),
        .I4(stateRecv[1]),
        .I5(stateRecv[2]),
        .O(\stateRecv[2]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2013" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateRecv[2]_i_8 
       (.I0(stateRecv[2]),
        .I1(stateRecv[0]),
        .O(\stateRecv[2]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h0004082209000020)) 
    \stateRecv[2]_i_9__0 
       (.I0(Q[1]),
        .I1(Q[3]),
        .I2(Q[5]),
        .I3(Q[4]),
        .I4(Q[2]),
        .I5(Q[0]),
        .O(\stateRecv[2]_i_9__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateRecv_reg[0] 
       (.C(aclk_sig),
        .CE(\stateRecv[2]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\stateRecv[0]_i_1_n_0 ),
        .Q(stateRecv[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateRecv_reg[1] 
       (.C(aclk_sig),
        .CE(\stateRecv[2]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\stateRecv[1]_i_1_n_0 ),
        .Q(stateRecv[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateRecv_reg[2] 
       (.C(aclk_sig),
        .CE(\stateRecv[2]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\stateRecv[2]_i_2_n_0 ),
        .Q(stateRecv[2]));
  LUT6 #(
    .INIT(64'h2AAA002A002A002A)) 
    \stateSend[0]_i_1 
       (.I0(\stateSend[2]_i_9_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(stateTo[1]),
        .I5(stateTo[0]),
        .O(\stateSend[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCCCCCC0CCCC40)) 
    \stateSend[1]_i_1 
       (.I0(sendStrbToStart0),
        .I1(\stateSend[2]_i_9_n_0 ),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .I5(\stateSend[2]_i_10_n_0 ),
        .O(\stateSend[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF8B00)) 
    \stateSend[2]_i_1 
       (.I0(\stateSend[2]_i_3_n_0 ),
        .I1(\stateSend[2]_i_4_n_0 ),
        .I2(\stateSend[2]_i_5_n_0 ),
        .I3(\stateSend[2]_i_6_n_0 ),
        .I4(\stateSend[2]_i_7_n_0 ),
        .I5(\sendAXIL_rdata[63]_i_1_n_0 ),
        .O(\stateSend[2]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \stateSend[2]_i_10 
       (.I0(stateTo[1]),
        .I1(stateTo[0]),
        .O(\stateSend[2]_i_10_n_0 ));
  LUT4 #(
    .INIT(16'h0004)) 
    \stateSend[2]_i_11 
       (.I0(\stateSend[2]_i_16_n_0 ),
        .I1(\stateSend[2]_i_17_n_0 ),
        .I2(\stateSend[2]_i_18_n_0 ),
        .I3(\stateSend[2]_i_19_n_0 ),
        .O(\stateSend[2]_i_11_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateSend[2]_i_13 
       (.I0(wordcnt_reg[30]),
        .O(\stateSend[2]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h0000090005050009)) 
    \stateSend[2]_i_14 
       (.I0(wordcnt_reg[28]),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[28]),
        .I2(wordcnt_reg[29]),
        .I3(recvAXIS_tlast_sig_reg_i_2_0[27]),
        .I4(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I5(wordcnt_reg[27]),
        .O(\stateSend[2]_i_14_n_0 ));
  LUT4 #(
    .INIT(16'h08A2)) 
    \stateSend[2]_i_15 
       (.I0(\stateSend[2]_i_28_n_0 ),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[25]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(wordcnt_reg[25]),
        .O(\stateSend[2]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFBFFF)) 
    \stateSend[2]_i_16 
       (.I0(\stateSend[2]_i_29_n_0 ),
        .I1(\AXIL_wdata_sig_reg_n_0_[4] ),
        .I2(p_0_in[0]),
        .I3(\AXIL_wdata_sig_reg_n_0_[18] ),
        .I4(\AXIL_wdata_sig_reg_n_0_[23] ),
        .I5(\stateSend[2]_i_30_n_0 ),
        .O(\stateSend[2]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000040)) 
    \stateSend[2]_i_17 
       (.I0(\stateSend[2]_i_31_n_0 ),
        .I1(\AXIL_wdata_sig_reg_n_0_[52] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[48] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[49] ),
        .I4(\AXIL_wdata_sig_reg_n_0_[13] ),
        .I5(\stateSend[2]_i_32_n_0 ),
        .O(\stateSend[2]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFEFFFFFF)) 
    \stateSend[2]_i_18 
       (.I0(\stateSend[2]_i_33_n_0 ),
        .I1(\AXIL_wdata_sig_reg_n_0_[61] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[51] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[42] ),
        .I4(\AXIL_wdata_sig_reg_n_0_[34] ),
        .I5(\stateSend[2]_i_34_n_0 ),
        .O(\stateSend[2]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFEFF)) 
    \stateSend[2]_i_19 
       (.I0(\stateSend[2]_i_35_n_0 ),
        .I1(\AXIL_wdata_sig_reg_n_0_[53] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[43] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[30] ),
        .I4(\AXIL_wdata_sig_reg_n_0_[21] ),
        .I5(\stateSend[2]_i_36_n_0 ),
        .O(\stateSend[2]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCCCCCCCC0C080)) 
    \stateSend[2]_i_2 
       (.I0(sendStrbToStart0),
        .I1(\stateSend[2]_i_9_n_0 ),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .I5(\stateSend[2]_i_10_n_0 ),
        .O(\stateSend[2]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h08A2)) 
    \stateSend[2]_i_20 
       (.I0(\stateSend[2]_i_37_n_0 ),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[22]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(wordcnt_reg[22]),
        .O(\stateSend[2]_i_20_n_0 ));
  LUT4 #(
    .INIT(16'h08A2)) 
    \stateSend[2]_i_21 
       (.I0(\stateSend[2]_i_38_n_0 ),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[19]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(wordcnt_reg[19]),
        .O(\stateSend[2]_i_21_n_0 ));
  LUT4 #(
    .INIT(16'h08A2)) 
    \stateSend[2]_i_22 
       (.I0(\stateSend[2]_i_39_n_0 ),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[15]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(wordcnt_reg[15]),
        .O(\stateSend[2]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h08A2)) 
    \stateSend[2]_i_23 
       (.I0(\stateSend[2]_i_40_n_0 ),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[12]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(wordcnt_reg[12]),
        .O(\stateSend[2]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h08A2)) 
    \stateSend[2]_i_24 
       (.I0(\stateSend[2]_i_41_n_0 ),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[10]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(wordcnt_reg[10]),
        .O(\stateSend[2]_i_24_n_0 ));
  LUT4 #(
    .INIT(16'h08A2)) 
    \stateSend[2]_i_25 
       (.I0(\stateSend[2]_i_42_n_0 ),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[7]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(wordcnt_reg[7]),
        .O(\stateSend[2]_i_25_n_0 ));
  LUT4 #(
    .INIT(16'h08A2)) 
    \stateSend[2]_i_26 
       (.I0(\stateSend[2]_i_43_n_0 ),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[4]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(wordcnt_reg[4]),
        .O(\stateSend[2]_i_26_n_0 ));
  LUT4 #(
    .INIT(16'h08A2)) 
    \stateSend[2]_i_27 
       (.I0(\stateSend[2]_i_44_n_0 ),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[1]),
        .I2(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I3(wordcnt_reg[1]),
        .O(\stateSend[2]_i_27_n_0 ));
  LUT5 #(
    .INIT(32'h00903309)) 
    \stateSend[2]_i_28 
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[24]),
        .I1(wordcnt_reg[24]),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[26]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(wordcnt_reg[26]),
        .O(\stateSend[2]_i_28_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2117" *) 
  LUT4 #(
    .INIT(16'hFFEF)) 
    \stateSend[2]_i_29 
       (.I0(\AXIL_wdata_sig_reg_n_0_[25] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[17] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[26] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[5] ),
        .O(\stateSend[2]_i_29_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2120" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \stateSend[2]_i_3 
       (.I0(AXIL_arready),
        .I1(apuAXIL_arvalid),
        .I2(AXIL_araddr_sig[5]),
        .I3(AXIL_araddr_sig[4]),
        .O(\stateSend[2]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFBFF)) 
    \stateSend[2]_i_30 
       (.I0(\AXIL_wdata_sig_reg_n_0_[47] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[20] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[37] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[44] ),
        .I4(\stateSend[2]_i_45_n_0 ),
        .O(\stateSend[2]_i_30_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2119" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateSend[2]_i_31 
       (.I0(\AXIL_wdata_sig_reg_n_0_[62] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[16] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[54] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[50] ),
        .O(\stateSend[2]_i_31_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFEFF)) 
    \stateSend[2]_i_32 
       (.I0(\AXIL_wdata_sig_reg_n_0_[27] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[35] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[11] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[8] ),
        .I4(\stateSend[2]_i_46_n_0 ),
        .O(\stateSend[2]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2113" *) 
  LUT4 #(
    .INIT(16'hFFF7)) 
    \stateSend[2]_i_33 
       (.I0(\AXIL_wdata_sig_reg_n_0_[60] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[56] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[59] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[55] ),
        .O(\stateSend[2]_i_33_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFF7FF)) 
    \stateSend[2]_i_34 
       (.I0(\AXIL_wdata_sig_reg_n_0_[6] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[32] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[33] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[46] ),
        .I4(\stateSend[2]_i_47_n_0 ),
        .O(\stateSend[2]_i_34_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2115" *) 
  LUT4 #(
    .INIT(16'hFF7F)) 
    \stateSend[2]_i_35 
       (.I0(\AXIL_wdata_sig_reg_n_0_[40] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[0] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[22] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[63] ),
        .O(\stateSend[2]_i_35_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFB)) 
    \stateSend[2]_i_36 
       (.I0(\AXIL_wdata_sig_reg_n_0_[9] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[10] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[1] ),
        .I3(p_0_in[1]),
        .I4(\stateSend[2]_i_48_n_0 ),
        .O(\stateSend[2]_i_36_n_0 ));
  LUT5 #(
    .INIT(32'h00903309)) 
    \stateSend[2]_i_37 
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[21]),
        .I1(wordcnt_reg[21]),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[23]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(wordcnt_reg[23]),
        .O(\stateSend[2]_i_37_n_0 ));
  LUT5 #(
    .INIT(32'h00903309)) 
    \stateSend[2]_i_38 
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[18]),
        .I1(wordcnt_reg[18]),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[20]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(wordcnt_reg[20]),
        .O(\stateSend[2]_i_38_n_0 ));
  LUT5 #(
    .INIT(32'h00903309)) 
    \stateSend[2]_i_39 
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[16]),
        .I1(wordcnt_reg[16]),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[17]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(wordcnt_reg[17]),
        .O(\stateSend[2]_i_39_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2037" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \stateSend[2]_i_4 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(stateSend[0]),
        .O(\stateSend[2]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h00903309)) 
    \stateSend[2]_i_40 
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[13]),
        .I1(wordcnt_reg[13]),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[14]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(wordcnt_reg[14]),
        .O(\stateSend[2]_i_40_n_0 ));
  LUT5 #(
    .INIT(32'h00903309)) 
    \stateSend[2]_i_41 
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[9]),
        .I1(wordcnt_reg[9]),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[11]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(wordcnt_reg[11]),
        .O(\stateSend[2]_i_41_n_0 ));
  LUT5 #(
    .INIT(32'h00903309)) 
    \stateSend[2]_i_42 
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[6]),
        .I1(wordcnt_reg[6]),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[8]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(wordcnt_reg[8]),
        .O(\stateSend[2]_i_42_n_0 ));
  LUT5 #(
    .INIT(32'h00903309)) 
    \stateSend[2]_i_43 
       (.I0(recvAXIS_tlast_sig_reg_i_2_0[3]),
        .I1(wordcnt_reg[3]),
        .I2(recvAXIS_tlast_sig_reg_i_2_0[5]),
        .I3(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I4(wordcnt_reg[5]),
        .O(\stateSend[2]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h0000C300A5A500C3)) 
    \stateSend[2]_i_44 
       (.I0(\rxlen_reg[0]_4 ),
        .I1(recvAXIS_tlast_sig_reg_i_2_0[0]),
        .I2(wordcnt_reg[0]),
        .I3(recvAXIS_tlast_sig_reg_i_2_0[2]),
        .I4(\apuAXIL_rdata[63]_INST_0_i_1_n_0 ),
        .I5(wordcnt_reg[2]),
        .O(\stateSend[2]_i_44_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2116" *) 
  LUT4 #(
    .INIT(16'hFFEF)) 
    \stateSend[2]_i_45 
       (.I0(\AXIL_wdata_sig_reg_n_0_[31] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[29] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[58] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[57] ),
        .O(\stateSend[2]_i_45_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2118" *) 
  LUT4 #(
    .INIT(16'hEFFF)) 
    \stateSend[2]_i_46 
       (.I0(\AXIL_wdata_sig_reg_n_0_[15] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[7] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[36] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[24] ),
        .O(\stateSend[2]_i_46_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2112" *) 
  LUT4 #(
    .INIT(16'hFFFD)) 
    \stateSend[2]_i_47 
       (.I0(\AXIL_wdata_sig_reg_n_0_[38] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[39] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[45] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[41] ),
        .O(\stateSend[2]_i_47_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2114" *) 
  LUT4 #(
    .INIT(16'hFF7F)) 
    \stateSend[2]_i_48 
       (.I0(\AXIL_wdata_sig_reg_n_0_[14] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[12] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[28] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[19] ),
        .O(\stateSend[2]_i_48_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2033" *) 
  LUT5 #(
    .INIT(32'hBFFFFFFF)) 
    \stateSend[2]_i_5 
       (.I0(ixBlkWrite[0]),
        .I1(ixBlkWrite[1]),
        .I2(AXIL_bvalid_sig_reg_0),
        .I3(apuAXIL_bready),
        .I4(\stateSend[2]_i_11_n_0 ),
        .O(\stateSend[2]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2042" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateSend[2]_i_6 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .O(\stateSend[2]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \stateSend[2]_i_7 
       (.I0(stateSend[2]),
        .I1(sendStrbToStart_i_3_n_0),
        .O(\stateSend[2]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h0218070C02060F1C)) 
    \stateSend[2]_i_9 
       (.I0(Q[1]),
        .I1(Q[3]),
        .I2(Q[5]),
        .I3(Q[4]),
        .I4(Q[2]),
        .I5(Q[0]),
        .O(\stateSend[2]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateSend_reg[0] 
       (.C(aclk_sig),
        .CE(\stateSend[2]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\stateSend[0]_i_1_n_0 ),
        .Q(stateSend[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSend_reg[1] 
       (.C(aclk_sig),
        .CE(\stateSend[2]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\stateSend[1]_i_1_n_0 ),
        .Q(stateSend[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSend_reg[2] 
       (.C(aclk_sig),
        .CE(\stateSend[2]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\stateSend[2]_i_2_n_0 ),
        .Q(stateSend[2]));
  CARRY8 \stateSend_reg[2]_i_12 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\stateSend_reg[2]_i_12_n_0 ,\stateSend_reg[2]_i_12_n_1 ,\stateSend_reg[2]_i_12_n_2 ,\stateSend_reg[2]_i_12_n_3 ,\stateSend_reg[2]_i_12_n_4 ,\stateSend_reg[2]_i_12_n_5 ,\stateSend_reg[2]_i_12_n_6 ,\stateSend_reg[2]_i_12_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_stateSend_reg[2]_i_12_O_UNCONNECTED [7:0]),
        .S({\stateSend[2]_i_20_n_0 ,\stateSend[2]_i_21_n_0 ,\stateSend[2]_i_22_n_0 ,\stateSend[2]_i_23_n_0 ,\stateSend[2]_i_24_n_0 ,\stateSend[2]_i_25_n_0 ,\stateSend[2]_i_26_n_0 ,\stateSend[2]_i_27_n_0 }));
  CARRY8 \stateSend_reg[2]_i_8 
       (.CI(\stateSend_reg[2]_i_12_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_stateSend_reg[2]_i_8_CO_UNCONNECTED [7:3],sendStrbToStart0,\stateSend_reg[2]_i_8_n_6 ,\stateSend_reg[2]_i_8_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_stateSend_reg[2]_i_8_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,\stateSend[2]_i_13_n_0 ,\stateSend[2]_i_14_n_0 ,\stateSend[2]_i_15_n_0 }));
  (* SOFT_HLUTNM = "soft_lutpair2043" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \stateTo[0]_i_1 
       (.I0(req),
        .I1(stateTo[1]),
        .I2(stateTo[0]),
        .O(\stateTo[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h55FD57FF55FD55FF)) 
    \stateTo[1]_i_1 
       (.I0(req),
        .I1(sendStrbToStart_reg_n_0),
        .I2(recvStrbToStart_reg_n_0),
        .I3(stateTo[1]),
        .I4(stateTo[0]),
        .I5(\stateTo[1]_i_4_n_0 ),
        .O(\stateTo[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2043" *) 
  LUT5 #(
    .INIT(32'h080808A8)) 
    \stateTo[1]_i_2 
       (.I0(req),
        .I1(stateTo[0]),
        .I2(stateTo[1]),
        .I3(recvStrbToStop_reg_n_0),
        .I4(sendStrbToStop_reg_n_0),
        .O(\stateTo[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h007F059E001F41AA)) 
    \stateTo[1]_i_3 
       (.I0(Q[3]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[5]),
        .I4(Q[4]),
        .I5(Q[1]),
        .O(req));
  LUT6 #(
    .INIT(64'hEEEEEEEEEFEEEEFE)) 
    \stateTo[1]_i_4 
       (.I0(sendStrbToStop_reg_n_0),
        .I1(recvStrbToStop_reg_n_0),
        .I2(i[15]),
        .I3(\i[15]_i_4_n_0 ),
        .I4(i[14]),
        .I5(\stateTo[1]_i_5_n_0 ),
        .O(\stateTo[1]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hFFFDFF7F)) 
    \stateTo[1]_i_5 
       (.I0(i[12]),
        .I1(\i[12]_i_2_n_0 ),
        .I2(i[9]),
        .I3(\stateTo[1]_i_6_n_0 ),
        .I4(i[10]),
        .O(\stateTo[1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFEF)) 
    \stateTo[1]_i_6 
       (.I0(\i[9]_i_2__3_n_0 ),
        .I1(i[7]),
        .I2(i[11]),
        .I3(i[8]),
        .I4(i[6]),
        .I5(i[13]),
        .O(\stateTo[1]_i_6_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateTo_reg[0] 
       (.C(aclk_sig),
        .CE(\stateTo[1]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\stateTo[0]_i_1_n_0 ),
        .Q(stateTo[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateTo_reg[1] 
       (.C(aclk_sig),
        .CE(\stateTo[1]_i_1_n_0 ),
        .CLR(AXIL_rvalid_sig_reg_0),
        .D(\stateTo[1]_i_2_n_0 ),
        .Q(stateTo[1]));
  (* SOFT_HLUTNM = "soft_lutpair2221" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[0]_i_1 
       (.I0(\tixVBuffer_reg[7] [0]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[0][7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2221" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[1]_i_1 
       (.I0(\tixVBuffer_reg[7] [1]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[0][7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2222" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[2]_i_1 
       (.I0(\tixVBuffer_reg[7] [2]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[0][7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2222" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[3]_i_1 
       (.I0(\tixVBuffer_reg[7] [3]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[0][7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2223" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[4]_i_1 
       (.I0(\tixVBuffer_reg[7] [4]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[0][7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2223" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[5]_i_1 
       (.I0(\tixVBuffer_reg[7] [5]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[0][7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2224" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[6]_i_1 
       (.I0(\tixVBuffer_reg[7] [6]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[0][7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2224" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[7]_i_2 
       (.I0(\tixVBuffer_reg[7] [7]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[0][7] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2228" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[0]_i_1 
       (.I0(\tixVBufxfop_reg[7] [0]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[2][7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2225" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[1]_i_1 
       (.I0(\tixVBufxfop_reg[7] [1]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[2][7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2225" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[2]_i_1 
       (.I0(\tixVBufxfop_reg[7] [2]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[2][7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2226" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[3]_i_1 
       (.I0(\tixVBufxfop_reg[7] [3]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[2][7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2226" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[4]_i_1 
       (.I0(\tixVBufxfop_reg[7] [4]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[2][7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2227" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[5]_i_1 
       (.I0(\tixVBufxfop_reg[7] [5]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[2][7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2227" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[6]_i_1 
       (.I0(\tixVBufxfop_reg[7] [6]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[2][7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2228" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[7]_i_1 
       (.I0(\tixVBufxfop_reg[7] [7]),
        .I1(\stateOp_reg[4] ),
        .O(\opbuf_reg[2][7] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2087" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[0]_i_1 
       (.I0(\tixVController_reg[7]_1 [0]),
        .I1(\stateOp_reg[4]_3 ),
        .O(\opbuf_reg[1][7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2152" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[1]_i_1 
       (.I0(\tixVController_reg[7]_1 [1]),
        .I1(\stateOp_reg[4]_3 ),
        .O(\opbuf_reg[1][7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2218" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[2]_i_1 
       (.I0(\tixVController_reg[7]_1 [2]),
        .I1(\stateOp_reg[4]_3 ),
        .O(\opbuf_reg[1][7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2218" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[3]_i_1 
       (.I0(\tixVController_reg[7]_1 [3]),
        .I1(\stateOp_reg[4]_3 ),
        .O(\opbuf_reg[1][7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2219" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[4]_i_1 
       (.I0(\tixVController_reg[7]_1 [4]),
        .I1(\stateOp_reg[4]_3 ),
        .O(\opbuf_reg[1][7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2219" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[5]_i_1 
       (.I0(\tixVController_reg[7]_1 [5]),
        .I1(\stateOp_reg[4]_3 ),
        .O(\opbuf_reg[1][7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2220" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[6]_i_1 
       (.I0(\tixVController_reg[7]_1 [6]),
        .I1(\stateOp_reg[4]_3 ),
        .O(\opbuf_reg[1][7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2220" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[7]_i_2 
       (.I0(\tixVController_reg[7]_1 [7]),
        .I1(\stateOp_reg[4]_3 ),
        .O(\opbuf_reg[1][7] [7]));
  LUT4 #(
    .INIT(16'hAA8A)) 
    \txAXIS_tdata[0]_i_1 
       (.I0(\stateOp_reg[4]_4 ),
        .I1(\txAXIS_tdata_reg[0] ),
        .I2(\txAXIS_tdata_reg[0]_0 ),
        .I3(\txAXIS_tdata_reg[0]_1 ),
        .O(\stateOp_reg[1]_9 [0]));
  LUT6 #(
    .INIT(64'h04005555FFFFFFFF)) 
    \txAXIS_tdata[15]_i_1__0 
       (.I0(\txAXIS_tdata_reg[8] ),
        .I1(\txAXIS_tdata_reg[8]_0 ),
        .I2(Q[3]),
        .I3(\txAXIS_tdata_reg[8]_1 ),
        .I4(Q[2]),
        .I5(\stateOp_reg[4]_4 ),
        .O(\stateOp_reg[3] [0]));
  LUT6 #(
    .INIT(64'h4044404044444444)) 
    \txAXIS_tdata[16]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[16]_1 ),
        .I3(\txAXIS_tdata_reg[16]_2 ),
        .I4(\txAXIS_tdata_reg[16]_3 ),
        .I5(\txAXIS_tdata_reg[16]_4 ),
        .O(\stateOp_reg[1]_9 [6]));
  LUT6 #(
    .INIT(64'h4044404044444444)) 
    \txAXIS_tdata[17]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[17] ),
        .I3(\txAXIS_tdata_reg[17]_0 ),
        .I4(\txAXIS_tdata_reg[16]_3 ),
        .I5(\txAXIS_tdata_reg[17]_1 ),
        .O(\stateOp_reg[1]_9 [7]));
  LUT6 #(
    .INIT(64'h4044404044444444)) 
    \txAXIS_tdata[18]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[18] ),
        .I3(\txAXIS_tdata_reg[18]_0 ),
        .I4(\txAXIS_tdata_reg[16]_3 ),
        .I5(\txAXIS_tdata_reg[18]_1 ),
        .O(\stateOp_reg[1]_9 [8]));
  LUT6 #(
    .INIT(64'hA8A8AAA8AAAAAAAA)) 
    \txAXIS_tdata[19]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[19] ),
        .I2(\txAXIS_tdata_reg[19]_0 ),
        .I3(\txAXIS_tdata_reg[23] [0]),
        .I4(\txAXIS_tdata_reg[19]_1 ),
        .I5(\txAXIS_tdata_reg[19]_2 ),
        .O(\stateOp_reg[1]_9 [9]));
  LUT6 #(
    .INIT(64'hA8A8AAA8AAAAAAAA)) 
    \txAXIS_tdata[20]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[20] ),
        .I2(\txAXIS_tdata_reg[20]_0 ),
        .I3(\txAXIS_tdata_reg[23] [1]),
        .I4(\txAXIS_tdata_reg[19]_1 ),
        .I5(\txAXIS_tdata_reg[20]_1 ),
        .O(\stateOp_reg[1]_9 [10]));
  LUT6 #(
    .INIT(64'h4044404044444444)) 
    \txAXIS_tdata[21]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[21] ),
        .I3(\txAXIS_tdata_reg[21]_0 ),
        .I4(\txAXIS_tdata_reg[16]_3 ),
        .I5(\txAXIS_tdata_reg[21]_1 ),
        .O(\stateOp_reg[1]_9 [11]));
  LUT6 #(
    .INIT(64'h4044404044444444)) 
    \txAXIS_tdata[22]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[22] ),
        .I3(\txAXIS_tdata_reg[22]_0 ),
        .I4(\txAXIS_tdata_reg[16]_3 ),
        .I5(\txAXIS_tdata_reg[22]_1 ),
        .O(\stateOp_reg[1]_9 [12]));
  LUT6 #(
    .INIT(64'h04044404FFFFFFFF)) 
    \txAXIS_tdata[23]_i_1__0 
       (.I0(\txAXIS_tdata_reg[32]_1 ),
        .I1(\txAXIS_tdata_reg[16] ),
        .I2(\txAXIS_tdata_reg[32] ),
        .I3(\txAXIS_tdata_reg[16]_0 ),
        .I4(Q[2]),
        .I5(\stateOp_reg[4] ),
        .O(\stateOp_reg[3] [1]));
  LUT6 #(
    .INIT(64'hA8A8AAA8AAAAAAAA)) 
    \txAXIS_tdata[23]_i_2 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[23]_0 ),
        .I2(\txAXIS_tdata_reg[23]_1 ),
        .I3(\txAXIS_tdata_reg[23] [2]),
        .I4(\txAXIS_tdata_reg[19]_1 ),
        .I5(\txAXIS_tdata_reg[23]_2 ),
        .O(\stateOp_reg[1]_9 [13]));
  LUT6 #(
    .INIT(64'hA8A8AAA8AAAAAAAA)) 
    \txAXIS_tdata[24]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[24]_0 ),
        .I2(\txAXIS_tdata_reg[24]_1 ),
        .I3(\txAXIS_tdata_reg[29] [0]),
        .I4(\txAXIS_tdata_reg[19]_1 ),
        .I5(\txAXIS_tdata_reg[24]_2 ),
        .O(\stateOp_reg[1]_9 [14]));
  LUT6 #(
    .INIT(64'hA8A8AAA8AAAAAAAA)) 
    \txAXIS_tdata[25]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[25] ),
        .I2(\txAXIS_tdata_reg[25]_0 ),
        .I3(\txAXIS_tdata_reg[29] [1]),
        .I4(\txAXIS_tdata_reg[19]_1 ),
        .I5(\txAXIS_tdata_reg[25]_1 ),
        .O(\stateOp_reg[1]_9 [15]));
  LUT6 #(
    .INIT(64'hAAAA88A8AAAAAAAA)) 
    \txAXIS_tdata[26]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[26] ),
        .I2(\txAXIS_tdata_reg[29] [2]),
        .I3(\txAXIS_tdata_reg[19]_1 ),
        .I4(\txAXIS_tdata_reg[26]_0 ),
        .I5(\txAXIS_tdata_reg[26]_1 ),
        .O(\stateOp_reg[1]_9 [16]));
  LUT6 #(
    .INIT(64'hA8A8AAA8AAAAAAAA)) 
    \txAXIS_tdata[27]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[27] ),
        .I2(\txAXIS_tdata_reg[27]_0 ),
        .I3(\txAXIS_tdata_reg[29] [3]),
        .I4(\txAXIS_tdata_reg[19]_1 ),
        .I5(\txAXIS_tdata_reg[27]_1 ),
        .O(\stateOp_reg[1]_9 [17]));
  LUT6 #(
    .INIT(64'hAAAA88A8AAAAAAAA)) 
    \txAXIS_tdata[28]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[28] ),
        .I2(\txAXIS_tdata_reg[29] [4]),
        .I3(\txAXIS_tdata_reg[19]_1 ),
        .I4(\txAXIS_tdata_reg[28]_0 ),
        .I5(\txAXIS_tdata_reg[28]_1 ),
        .O(\stateOp_reg[1]_9 [18]));
  LUT6 #(
    .INIT(64'hAAAA88A8AAAAAAAA)) 
    \txAXIS_tdata[29]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[29]_0 ),
        .I2(\txAXIS_tdata_reg[29] [5]),
        .I3(\txAXIS_tdata_reg[19]_1 ),
        .I4(\txAXIS_tdata_reg[29]_1 ),
        .I5(\txAXIS_tdata_reg[29]_2 ),
        .O(\stateOp_reg[1]_9 [19]));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAA8AAAA)) 
    \txAXIS_tdata[2]_i_1 
       (.I0(\stateOp_reg[4]_4 ),
        .I1(\txAXIS_tdata_reg[2] ),
        .I2(\txAXIS_tdata_reg[2]_0 ),
        .I3(\txAXIS_tdata_reg[2]_1 ),
        .I4(\txAXIS_tdata_reg[0]_0 ),
        .I5(\txAXIS_tdata_reg[0]_1 ),
        .O(\stateOp_reg[1]_9 [1]));
  LUT6 #(
    .INIT(64'h88888A88AAAAAAAA)) 
    \txAXIS_tdata[30]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[30] ),
        .I2(\txAXIS_tdata_reg[30]_0 ),
        .I3(Q[1]),
        .I4(Q[2]),
        .I5(\txAXIS_tdata_reg[30]_1 ),
        .O(\stateOp_reg[1]_9 [20]));
  (* SOFT_HLUTNM = "soft_lutpair2055" *) 
  LUT4 #(
    .INIT(16'hD0FF)) 
    \txAXIS_tdata[31]_i_1__0 
       (.I0(\txAXIS_tdata_reg[24] ),
        .I1(\txAXIS_tdata_reg[56] ),
        .I2(\txAXIS_tdata_reg[56]_1 ),
        .I3(\stateOp_reg[4]_4 ),
        .O(\stateOp_reg[3] [2]));
  LUT6 #(
    .INIT(64'h88888A88AAAAAAAA)) 
    \txAXIS_tdata[31]_i_2 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[31] ),
        .I2(\txAXIS_tdata_reg[31]_0 ),
        .I3(Q[1]),
        .I4(Q[2]),
        .I5(\txAXIS_tdata_reg[31]_1 ),
        .O(\stateOp_reg[1]_9 [21]));
  (* SOFT_HLUTNM = "soft_lutpair2010" *) 
  LUT5 #(
    .INIT(32'h00044404)) 
    \txAXIS_tdata[32]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[32]_2 ),
        .I3(Q[1]),
        .I4(\txAXIS_tdata_reg[32]_3 ),
        .O(\stateOp_reg[1]_9 [22]));
  LUT5 #(
    .INIT(32'h00044404)) 
    \txAXIS_tdata[33]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[33] ),
        .I3(Q[1]),
        .I4(\txAXIS_tdata_reg[33]_0 ),
        .O(\stateOp_reg[1]_9 [23]));
  LUT5 #(
    .INIT(32'h00044404)) 
    \txAXIS_tdata[34]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[34] ),
        .I3(Q[1]),
        .I4(\txAXIS_tdata_reg[34]_0 ),
        .O(\stateOp_reg[1]_9 [24]));
  LUT5 #(
    .INIT(32'h00044404)) 
    \txAXIS_tdata[35]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[35] ),
        .I3(Q[1]),
        .I4(\txAXIS_tdata_reg[35]_0 ),
        .O(\stateOp_reg[1]_9 [25]));
  LUT5 #(
    .INIT(32'h00044404)) 
    \txAXIS_tdata[36]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[36] ),
        .I3(Q[1]),
        .I4(\txAXIS_tdata_reg[36]_0 ),
        .O(\stateOp_reg[1]_9 [26]));
  LUT5 #(
    .INIT(32'h00044404)) 
    \txAXIS_tdata[37]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[37] ),
        .I3(Q[1]),
        .I4(\txAXIS_tdata_reg[37]_0 ),
        .O(\stateOp_reg[1]_9 [27]));
  LUT5 #(
    .INIT(32'h00044404)) 
    \txAXIS_tdata[38]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[38] ),
        .I3(Q[1]),
        .I4(\txAXIS_tdata_reg[38]_0 ),
        .O(\stateOp_reg[1]_9 [28]));
  LUT6 #(
    .INIT(64'h00005575FFFFFFFF)) 
    \txAXIS_tdata[39]_i_1 
       (.I0(\txAXIS_tdata_reg[32] ),
        .I1(\txAXIS_tdata_reg[32]_0 [1]),
        .I2(\txAXIS_tdata_reg[32]_0 [2]),
        .I3(Q[2]),
        .I4(\txAXIS_tdata_reg[32]_1 ),
        .I5(\stateOp_reg[4] ),
        .O(\stateOp_reg[3] [3]));
  LUT5 #(
    .INIT(32'h00044404)) 
    \txAXIS_tdata[39]_i_2 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[39] ),
        .I3(Q[1]),
        .I4(\txAXIS_tdata_reg[39]_0 ),
        .O(\stateOp_reg[1]_9 [29]));
  (* SOFT_HLUTNM = "soft_lutpair2055" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \txAXIS_tdata[47]_i_1 
       (.I0(\txAXIS_tdata_reg[40] ),
        .I1(\stateOp_reg[4]_4 ),
        .O(\stateOp_reg[3] [4]));
  LUT6 #(
    .INIT(64'h0000440444444444)) 
    \txAXIS_tdata[48]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[48]_2 ),
        .I3(\txAXIS_tdata_reg[48]_3 ),
        .I4(\txAXIS_tdata_reg[48]_4 ),
        .I5(\txAXIS_tdata_reg[48]_5 ),
        .O(\stateOp_reg[1]_9 [30]));
  LUT6 #(
    .INIT(64'h0000440444444444)) 
    \txAXIS_tdata[49]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[48]_2 ),
        .I3(\txAXIS_tdata_reg[49] ),
        .I4(\txAXIS_tdata_reg[49]_0 ),
        .I5(\txAXIS_tdata_reg[49]_1 ),
        .O(\stateOp_reg[1]_9 [31]));
  LUT6 #(
    .INIT(64'hAAAAAAA8AAAAAAAA)) 
    \txAXIS_tdata[4]_i_1 
       (.I0(\stateOp_reg[4]_1 ),
        .I1(\txAXIS_tdata_reg[4] ),
        .I2(\txAXIS_tdata_reg[4]_0 ),
        .I3(\txAXIS_tdata_reg[4]_1 ),
        .I4(\txAXIS_tdata_reg[4]_2 ),
        .I5(\txAXIS_tdata_reg[0]_0 ),
        .O(\stateOp_reg[1]_9 [2]));
  LUT6 #(
    .INIT(64'h0000440444444444)) 
    \txAXIS_tdata[50]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[48]_2 ),
        .I3(\txAXIS_tdata_reg[50] ),
        .I4(\txAXIS_tdata_reg[50]_0 ),
        .I5(\txAXIS_tdata_reg[50]_1 ),
        .O(\stateOp_reg[1]_9 [32]));
  LUT6 #(
    .INIT(64'h0000440444444444)) 
    \txAXIS_tdata[51]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[48]_2 ),
        .I3(\txAXIS_tdata_reg[51] ),
        .I4(\txAXIS_tdata_reg[51]_0 ),
        .I5(\txAXIS_tdata_reg[51]_1 ),
        .O(\stateOp_reg[1]_9 [33]));
  LUT6 #(
    .INIT(64'h0000440444444444)) 
    \txAXIS_tdata[52]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[48]_2 ),
        .I3(\txAXIS_tdata_reg[52] ),
        .I4(\txAXIS_tdata_reg[52]_0 ),
        .I5(\txAXIS_tdata_reg[52]_1 ),
        .O(\stateOp_reg[1]_9 [34]));
  LUT6 #(
    .INIT(64'h0000440444444444)) 
    \txAXIS_tdata[53]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[48]_2 ),
        .I3(\txAXIS_tdata_reg[53] ),
        .I4(\txAXIS_tdata_reg[53]_0 ),
        .I5(\txAXIS_tdata_reg[53]_1 ),
        .O(\stateOp_reg[1]_9 [35]));
  LUT6 #(
    .INIT(64'h0000440444444444)) 
    \txAXIS_tdata[54]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[48]_2 ),
        .I3(\txAXIS_tdata_reg[54] ),
        .I4(\txAXIS_tdata_reg[54]_0 ),
        .I5(\txAXIS_tdata_reg[54]_1 ),
        .O(\stateOp_reg[1]_9 [36]));
  LUT6 #(
    .INIT(64'hFFA20000FFFFFFFF)) 
    \txAXIS_tdata[55]_i_1 
       (.I0(\txAXIS_tdata_reg[48] ),
        .I1(\txAXIS_tdata_reg[48]_0 ),
        .I2(\txAXIS_tdata_reg[48]_1 ),
        .I3(\txAXIS_tdata_reg[56] ),
        .I4(\txAXIS_tdata_reg[56]_1 ),
        .I5(\stateOp_reg[4] ),
        .O(\stateOp_reg[3] [5]));
  LUT6 #(
    .INIT(64'h0000440444444444)) 
    \txAXIS_tdata[55]_i_2 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(\txAXIS_tdata_reg[48]_2 ),
        .I3(\txAXIS_tdata_reg[55] ),
        .I4(\txAXIS_tdata_reg[55]_0 ),
        .I5(\txAXIS_tdata_reg[55]_1 ),
        .O(\stateOp_reg[1]_9 [37]));
  LUT6 #(
    .INIT(64'hAAAA0020AAAAAAAA)) 
    \txAXIS_tdata[56]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[56]_2 ),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(\txAXIS_tdata_reg[56]_3 ),
        .I5(\txAXIS_tdata_reg[56]_4 ),
        .O(\stateOp_reg[1]_9 [38]));
  LUT6 #(
    .INIT(64'hAAAA0020AAAAAAAA)) 
    \txAXIS_tdata[57]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[57] ),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(\txAXIS_tdata_reg[57]_0 ),
        .I5(\txAXIS_tdata_reg[57]_1 ),
        .O(\stateOp_reg[1]_9 [39]));
  LUT6 #(
    .INIT(64'h0000040044444444)) 
    \txAXIS_tdata[58]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(\txAXIS_tdata_reg[58] ),
        .I5(\txAXIS_tdata_reg[58]_0 ),
        .O(\stateOp_reg[1]_9 [40]));
  LUT6 #(
    .INIT(64'h0000040044444444)) 
    \txAXIS_tdata[59]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(\txAXIS_tdata_reg[59] ),
        .I5(\txAXIS_tdata_reg[59]_0 ),
        .O(\stateOp_reg[1]_9 [41]));
  LUT6 #(
    .INIT(64'h20AA2020AAAAAAAA)) 
    \txAXIS_tdata[5]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[5] ),
        .I2(\txAXIS_tdata_reg[5]_0 ),
        .I3(\txAXIS_tdata_reg[5]_1 ),
        .I4(\txAXIS_tdata_reg[5]_2 ),
        .I5(\txAXIS_tdata_reg[5]_3 ),
        .O(\stateOp_reg[1]_9 [3]));
  LUT6 #(
    .INIT(64'hAAAA0020AAAAAAAA)) 
    \txAXIS_tdata[60]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[60] ),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(\txAXIS_tdata_reg[60]_0 ),
        .I5(\txAXIS_tdata_reg[60]_1 ),
        .O(\stateOp_reg[1]_9 [42]));
  LUT6 #(
    .INIT(64'hAAAA0020AAAAAAAA)) 
    \txAXIS_tdata[61]_i_1 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[61] ),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(\txAXIS_tdata_reg[61]_0 ),
        .I5(\txAXIS_tdata_reg[61]_1 ),
        .O(\stateOp_reg[1]_9 [43]));
  LUT6 #(
    .INIT(64'h0000040044444444)) 
    \txAXIS_tdata[62]_i_1 
       (.I0(Q[5]),
        .I1(\stateOp_reg[4] ),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(\txAXIS_tdata_reg[62] ),
        .I5(\txAXIS_tdata_reg[62]_0 ),
        .O(\stateOp_reg[1]_9 [44]));
  LUT5 #(
    .INIT(32'hFE00FFFF)) 
    \txAXIS_tdata[63]_i_1 
       (.I0(\txAXIS_tdata_reg[56] ),
        .I1(\txAXIS_tdata_reg[56]_0 ),
        .I2(Q[3]),
        .I3(\txAXIS_tdata_reg[56]_1 ),
        .I4(\stateOp_reg[4] ),
        .O(\stateOp_reg[3] [6]));
  LUT6 #(
    .INIT(64'hAAAA0020AAAAAAAA)) 
    \txAXIS_tdata[63]_i_2 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[63] ),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(\txAXIS_tdata_reg[63]_0 ),
        .I5(\txAXIS_tdata_reg[63]_1 ),
        .O(\stateOp_reg[1]_9 [45]));
  LUT6 #(
    .INIT(64'hAAAAAAA8AAAAAAAA)) 
    \txAXIS_tdata[6]_i_1 
       (.I0(\stateOp_reg[4]_4 ),
        .I1(\txAXIS_tdata_reg[6] ),
        .I2(\txAXIS_tdata_reg[4]_0 ),
        .I3(\txAXIS_tdata_reg[6]_0 ),
        .I4(\txAXIS_tdata_reg[6]_1 ),
        .I5(\txAXIS_tdata_reg[0]_0 ),
        .O(\stateOp_reg[1]_9 [4]));
  LUT6 #(
    .INIT(64'hAAAA0002AAAAAAAA)) 
    \txAXIS_tdata[7]_i_2 
       (.I0(\stateOp_reg[5]_6 ),
        .I1(\txAXIS_tdata_reg[7]_0 ),
        .I2(Q[0]),
        .I3(Q[2]),
        .I4(\txAXIS_tdata_reg[7]_1 ),
        .I5(\txAXIS_tdata_reg[5]_3 ),
        .O(\stateOp_reg[1]_9 [5]));
  LUT5 #(
    .INIT(32'h08A00800)) 
    \txlen[0]_i_1 
       (.I0(\wordcntLast[2]_i_3_n_0 ),
        .I1(\txlen_reg[0] ),
        .I2(Q[4]),
        .I3(Q[3]),
        .I4(plusOp[0]),
        .O(\stateOp_reg[4]_14 ));
  (* SOFT_HLUTNM = "soft_lutpair2012" *) 
  LUT5 #(
    .INIT(32'h0010FFFF)) 
    validCrc_sig_i_2
       (.I0(stateOp_reg),
        .I1(stateRecv[0]),
        .I2(stateRecv[2]),
        .I3(stateRecv[1]),
        .I4(\crc_imd_reg[4] ),
        .O(AXIS_tvalid));
  LUT6 #(
    .INIT(64'hAAAAAABAAAAAAAAA)) 
    validCrc_sig_i_3
       (.I0(crcAXIS_tlast_sig_reg_3),
        .I1(stateRecv[1]),
        .I2(stateRecv[2]),
        .I3(stateRecv[0]),
        .I4(stateOp_reg),
        .I5(recvAXIS_tlast),
        .O(AXIS_tlast));
  LUT6 #(
    .INIT(64'h777F777F777F0000)) 
    wdone_i_1__0
       (.I0(AXIL_bvalid_sig_reg_0),
        .I1(apuAXIL_bready),
        .I2(AXIL_awready_sig_reg_0),
        .I3(awdone_reg_n_0),
        .I4(AXIL_wready_sig_reg_0),
        .I5(wdone_reg_n_0),
        .O(wdone_i_1__0_n_0));
  FDRE wdone_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(wdone_i_1__0_n_0),
        .Q(wdone_reg_n_0),
        .R(AXIL_rvalid_sig_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair2075" *) 
  LUT4 #(
    .INIT(16'h0C44)) 
    \wordcntCrcLast[0]_i_1 
       (.I0(plusOp[0]),
        .I1(\stateOp_reg[4]_3 ),
        .I2(\wordcntCrcLast_reg[0] ),
        .I3(\lastAXIS_tkeep_reg[1] ),
        .O(\stateOp_reg[4]_13 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2080" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[10]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[16] [1]),
        .O(\stateOp_reg[4]_13 [10]));
  (* SOFT_HLUTNM = "soft_lutpair2080" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[11]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[16] [2]),
        .O(\stateOp_reg[4]_13 [11]));
  (* SOFT_HLUTNM = "soft_lutpair2081" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[12]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[16] [3]),
        .O(\stateOp_reg[4]_13 [12]));
  (* SOFT_HLUTNM = "soft_lutpair2081" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[13]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[16] [4]),
        .O(\stateOp_reg[4]_13 [13]));
  (* SOFT_HLUTNM = "soft_lutpair2082" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[14]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[16] [5]),
        .O(\stateOp_reg[4]_13 [14]));
  (* SOFT_HLUTNM = "soft_lutpair2082" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[15]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[16] [6]),
        .O(\stateOp_reg[4]_13 [15]));
  (* SOFT_HLUTNM = "soft_lutpair2083" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[16]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[16] [7]),
        .O(\stateOp_reg[4]_13 [16]));
  (* SOFT_HLUTNM = "soft_lutpair2083" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[17]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[24]_0 [0]),
        .O(\stateOp_reg[4]_13 [17]));
  (* SOFT_HLUTNM = "soft_lutpair2084" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[18]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[24]_0 [1]),
        .O(\stateOp_reg[4]_13 [18]));
  (* SOFT_HLUTNM = "soft_lutpair2084" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[19]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[24]_0 [2]),
        .O(\stateOp_reg[4]_13 [19]));
  (* SOFT_HLUTNM = "soft_lutpair2076" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[1]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(O[0]),
        .O(\stateOp_reg[4]_13 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2085" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[20]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[24]_0 [3]),
        .O(\stateOp_reg[4]_13 [20]));
  (* SOFT_HLUTNM = "soft_lutpair2085" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[21]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[24]_0 [4]),
        .O(\stateOp_reg[4]_13 [21]));
  (* SOFT_HLUTNM = "soft_lutpair2086" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[22]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[24]_0 [5]),
        .O(\stateOp_reg[4]_13 [22]));
  (* SOFT_HLUTNM = "soft_lutpair2086" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[23]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[24]_0 [6]),
        .O(\stateOp_reg[4]_13 [23]));
  LUT5 #(
    .INIT(32'h1410FFFF)) 
    \wordcntCrcLast[24]_i_1 
       (.I0(\wordcntCrcLast_reg[24] ),
        .I1(Q[4]),
        .I2(Q[3]),
        .I3(\wordcntLast_reg[28] ),
        .I4(\stateOp_reg[4]_3 ),
        .O(\stateOp_reg[4]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair2087" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[24]_i_2 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[24]_0 [7]),
        .O(\stateOp_reg[4]_13 [24]));
  LUT5 #(
    .INIT(32'hAAA88A88)) 
    \wordcntCrcLast[2]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(O[1]),
        .I4(\wordcntCrcLast_reg[2] ),
        .O(\stateOp_reg[4]_13 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2076" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[3]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(O[2]),
        .O(\stateOp_reg[4]_13 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2077" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[4]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(O[3]),
        .O(\stateOp_reg[4]_13 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2077" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[5]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(O[4]),
        .O(\stateOp_reg[4]_13 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2078" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[6]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(O[5]),
        .O(\stateOp_reg[4]_13 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2078" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[7]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(O[6]),
        .O(\stateOp_reg[4]_13 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2079" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[8]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(O[7]),
        .O(\stateOp_reg[4]_13 [8]));
  (* SOFT_HLUTNM = "soft_lutpair2079" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \wordcntCrcLast[9]_i_1 
       (.I0(\stateOp_reg[4]_3 ),
        .I1(\wordcntCrcLast_reg[1] ),
        .I2(\lastAXIS_tkeep_reg[1] ),
        .I3(\wordcntCrcLast_reg[16] [0]),
        .O(\stateOp_reg[4]_13 [9]));
  LUT6 #(
    .INIT(64'hFF00470000004700)) 
    \wordcntLast[0]_i_1 
       (.I0(\wordcntLast_reg[0] ),
        .I1(\wordcntLast_reg[0]_0 ),
        .I2(\wordcntLast_reg[0]_1 ),
        .I3(\stateOp_reg[4]_0 ),
        .I4(Q[5]),
        .I5(\wordcntLast_reg[0]_2 ),
        .O(\stateOp_reg[4]_7 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2156" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[10]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[10]),
        .O(\stateOp_reg[4]_7 [10]));
  (* SOFT_HLUTNM = "soft_lutpair2157" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[11]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[11]),
        .O(\stateOp_reg[4]_7 [11]));
  (* SOFT_HLUTNM = "soft_lutpair2157" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[12]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[12]),
        .O(\stateOp_reg[4]_7 [12]));
  (* SOFT_HLUTNM = "soft_lutpair2158" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[13]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[13]),
        .O(\stateOp_reg[4]_7 [13]));
  (* SOFT_HLUTNM = "soft_lutpair2158" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[14]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[14]),
        .O(\stateOp_reg[4]_7 [14]));
  (* SOFT_HLUTNM = "soft_lutpair2159" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[15]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[15]),
        .O(\stateOp_reg[4]_7 [15]));
  (* SOFT_HLUTNM = "soft_lutpair2159" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[16]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[16]),
        .O(\stateOp_reg[4]_7 [16]));
  (* SOFT_HLUTNM = "soft_lutpair2160" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[17]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[17]),
        .O(\stateOp_reg[4]_7 [17]));
  (* SOFT_HLUTNM = "soft_lutpair2160" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[18]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[18]),
        .O(\stateOp_reg[4]_7 [18]));
  (* SOFT_HLUTNM = "soft_lutpair2161" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[19]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[19]),
        .O(\stateOp_reg[4]_7 [19]));
  LUT5 #(
    .INIT(32'h08A00800)) 
    \wordcntLast[1]_i_1 
       (.I0(\wordcntLast[2]_i_3_n_0 ),
        .I1(\retbuf_reg[7][7]_0 ),
        .I2(Q[4]),
        .I3(Q[3]),
        .I4(plusOp[1]),
        .O(\stateOp_reg[4]_7 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2161" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[20]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[20]),
        .O(\stateOp_reg[4]_7 [20]));
  (* SOFT_HLUTNM = "soft_lutpair2162" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[21]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[21]),
        .O(\stateOp_reg[4]_7 [21]));
  (* SOFT_HLUTNM = "soft_lutpair2162" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[22]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[22]),
        .O(\stateOp_reg[4]_7 [22]));
  (* SOFT_HLUTNM = "soft_lutpair2163" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[23]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[23]),
        .O(\stateOp_reg[4]_7 [23]));
  (* SOFT_HLUTNM = "soft_lutpair2163" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[24]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[24]),
        .O(\stateOp_reg[4]_7 [24]));
  (* SOFT_HLUTNM = "soft_lutpair2164" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[25]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[25]),
        .O(\stateOp_reg[4]_7 [25]));
  (* SOFT_HLUTNM = "soft_lutpair2164" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[26]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[26]),
        .O(\stateOp_reg[4]_7 [26]));
  (* SOFT_HLUTNM = "soft_lutpair2165" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[27]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[27]),
        .O(\stateOp_reg[4]_7 [27]));
  LUT5 #(
    .INIT(32'h0075FFFF)) 
    \wordcntLast[28]_i_1 
       (.I0(\wordcntLast_reg[28]_0 ),
        .I1(\wordcntLast_reg[28]_1 ),
        .I2(\wordcntLast_reg[28] ),
        .I3(Q[5]),
        .I4(\stateOp_reg[4]_0 ),
        .O(\stateOp_reg[5]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair2165" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[28]_i_2 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[28]),
        .O(\stateOp_reg[4]_7 [28]));
  LUT5 #(
    .INIT(32'h2C200000)) 
    \wordcntLast[2]_i_1 
       (.I0(\wordcntCrcLast_reg[2] ),
        .I1(Q[4]),
        .I2(Q[3]),
        .I3(plusOp[2]),
        .I4(\wordcntLast[2]_i_3_n_0 ),
        .O(\stateOp_reg[4]_7 [2]));
  LUT6 #(
    .INIT(64'h0008000000000800)) 
    \wordcntLast[2]_i_3 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(Q[2]),
        .I2(Q[5]),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\wordcntLast[2]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2153" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[3]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[3]),
        .O(\stateOp_reg[4]_7 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2153" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[4]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[4]),
        .O(\stateOp_reg[4]_7 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2154" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[5]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[5]),
        .O(\stateOp_reg[4]_7 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2154" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[6]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[6]),
        .O(\stateOp_reg[4]_7 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2155" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[7]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[7]),
        .O(\stateOp_reg[4]_7 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2155" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[8]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[8]),
        .O(\stateOp_reg[4]_7 [8]));
  (* SOFT_HLUTNM = "soft_lutpair2156" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wordcntLast[9]_i_1 
       (.I0(\stateOp_reg[4]_0 ),
        .I1(\wordcntLast_reg[3] ),
        .I2(plusOp[9]),
        .O(\stateOp_reg[4]_7 [9]));
  LUT6 #(
    .INIT(64'h0000000004000000)) 
    \wordcnt[0]__0_i_1 
       (.I0(stateRecv[0]),
        .I1(stateRecv[1]),
        .I2(stateRecv[2]),
        .I3(\recvAXIL_rdata[63]_i_2_n_0 ),
        .I4(p_1_in0),
        .I5(AXIL_rvalid_sig_reg_0),
        .O(\wordcnt[0]__0_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000001000000)) 
    \wordcnt[0]__0_i_2 
       (.I0(recvAXIS_tlast),
        .I1(stateRecv[1]),
        .I2(stateRecv[0]),
        .I3(\wordcnt[0]__0_i_4_n_0 ),
        .I4(p_1_in0),
        .I5(AXIL_rvalid_sig_reg_0),
        .O(wordcnt0));
  LUT2 #(
    .INIT(4'h8)) 
    \wordcnt[0]__0_i_4 
       (.I0(p_33_in),
        .I1(stateRecv[2]),
        .O(\wordcnt[0]__0_i_4_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcnt[0]__0_i_5 
       (.I0(\wordcnt_reg[0]__0_n_0 ),
        .O(\wordcnt[0]__0_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000008000000)) 
    \wordcnt[0]_i_1 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(\wordcnt[0]_i_4_n_0 ),
        .I2(AXIL_rvalid_sig_reg_0),
        .I3(AXIL_araddr_sig[5]),
        .I4(strbRead),
        .I5(AXIL_araddr_sig[4]),
        .O(\wordcnt[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2150" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \wordcnt[0]_i_1__2 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(\wordcnt_reg[0]_0 ),
        .O(\stateOp_reg[4]_6 [0]));
  LUT6 #(
    .INIT(64'h0000002000000000)) 
    \wordcnt[0]_i_2 
       (.I0(\sendAXIL_rdata[63]_i_5_n_0 ),
        .I1(AXIL_rvalid_sig_reg_0),
        .I2(\stateSend[2]_i_6_n_0 ),
        .I3(stateSend[0]),
        .I4(sendStrbToStart0),
        .I5(\stateSend[2]_i_3_n_0 ),
        .O(\wordcnt[0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2036" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \wordcnt[0]_i_4 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(stateSend[0]),
        .O(\wordcnt[0]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2133" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \wordcnt[0]_i_5 
       (.I0(apuAXIL_arvalid),
        .I1(AXIL_arready),
        .O(strbRead));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcnt[0]_i_6 
       (.I0(wordcnt_reg[0]),
        .O(\wordcnt[0]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2139" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[10]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[9]),
        .O(\stateOp_reg[4]_6 [10]));
  (* SOFT_HLUTNM = "soft_lutpair2140" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[11]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[10]),
        .O(\stateOp_reg[4]_6 [11]));
  (* SOFT_HLUTNM = "soft_lutpair2140" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[12]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[11]),
        .O(\stateOp_reg[4]_6 [12]));
  (* SOFT_HLUTNM = "soft_lutpair2141" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[13]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[12]),
        .O(\stateOp_reg[4]_6 [13]));
  (* SOFT_HLUTNM = "soft_lutpair2141" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[14]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[13]),
        .O(\stateOp_reg[4]_6 [14]));
  (* SOFT_HLUTNM = "soft_lutpair2142" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[15]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[14]),
        .O(\stateOp_reg[4]_6 [15]));
  (* SOFT_HLUTNM = "soft_lutpair2142" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[16]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[15]),
        .O(\stateOp_reg[4]_6 [16]));
  (* SOFT_HLUTNM = "soft_lutpair2143" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[17]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[16]),
        .O(\stateOp_reg[4]_6 [17]));
  (* SOFT_HLUTNM = "soft_lutpair2143" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[18]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[17]),
        .O(\stateOp_reg[4]_6 [18]));
  (* SOFT_HLUTNM = "soft_lutpair2144" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[19]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[18]),
        .O(\stateOp_reg[4]_6 [19]));
  (* SOFT_HLUTNM = "soft_lutpair2135" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[1]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[0]),
        .O(\stateOp_reg[4]_6 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2144" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[20]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[19]),
        .O(\stateOp_reg[4]_6 [20]));
  (* SOFT_HLUTNM = "soft_lutpair2145" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[21]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[20]),
        .O(\stateOp_reg[4]_6 [21]));
  (* SOFT_HLUTNM = "soft_lutpair2145" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[22]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[21]),
        .O(\stateOp_reg[4]_6 [22]));
  (* SOFT_HLUTNM = "soft_lutpair2146" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[23]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[22]),
        .O(\stateOp_reg[4]_6 [23]));
  (* SOFT_HLUTNM = "soft_lutpair2146" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[24]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[23]),
        .O(\stateOp_reg[4]_6 [24]));
  (* SOFT_HLUTNM = "soft_lutpair2147" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[25]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[24]),
        .O(\stateOp_reg[4]_6 [25]));
  (* SOFT_HLUTNM = "soft_lutpair2147" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[26]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[25]),
        .O(\stateOp_reg[4]_6 [26]));
  (* SOFT_HLUTNM = "soft_lutpair2148" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[27]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[26]),
        .O(\stateOp_reg[4]_6 [27]));
  (* SOFT_HLUTNM = "soft_lutpair2148" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[28]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[27]),
        .O(\stateOp_reg[4]_6 [28]));
  (* SOFT_HLUTNM = "soft_lutpair2149" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[29]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[28]),
        .O(\stateOp_reg[4]_6 [29]));
  (* SOFT_HLUTNM = "soft_lutpair2135" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[2]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[1]),
        .O(\stateOp_reg[4]_6 [2]));
  LUT6 #(
    .INIT(64'h0055F033FFFFFFFF)) 
    \wordcnt[30]_i_1 
       (.I0(\wordcnt[30]_i_3_n_0 ),
        .I1(\wordcnt[30]_i_4__0_n_0 ),
        .I2(\wordcnt[30]_i_5_n_0 ),
        .I3(\wordcnt_reg[0]_1 ),
        .I4(\wordcnt_reg[0]_2 ),
        .I5(\stateOp_reg[4]_3 ),
        .O(\stateSend_reg[2]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2149" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[30]_i_2__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[29]),
        .O(\stateOp_reg[4]_6 [30]));
  LUT6 #(
    .INIT(64'hFCFFFFFF55555555)) 
    \wordcnt[30]_i_3 
       (.I0(\wordcntLast_reg[28] ),
        .I1(crcAXIS_tlast_sig_reg_0),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .I5(\wordcnt_reg[0]_3 ),
        .O(\wordcnt[30]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2000" *) 
  LUT5 #(
    .INIT(32'hFFFFF4FF)) 
    \wordcnt[30]_i_4__0 
       (.I0(CO),
        .I1(crcAXIS_tlast_sig_reg_0),
        .I2(stateRecv[1]),
        .I3(stateRecv[2]),
        .I4(stateRecv[0]),
        .O(\wordcnt[30]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2013" *) 
  LUT5 #(
    .INIT(32'hAAAAABAA)) 
    \wordcnt[30]_i_5 
       (.I0(\wordcnt_reg[0]_3 ),
        .I1(crcAXIS_tlast_sig_reg_0),
        .I2(stateRecv[0]),
        .I3(stateRecv[2]),
        .I4(stateRecv[1]),
        .O(\wordcnt[30]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAA8A)) 
    \wordcnt[30]_i_8 
       (.I0(\stateOp[0]_i_2_n_0 ),
        .I1(Q[4]),
        .I2(commok_sig_reg_1),
        .I3(Q[2]),
        .I4(Q[5]),
        .I5(Q[0]),
        .O(\stateOp_reg[4]_3 ));
  (* SOFT_HLUTNM = "soft_lutpair2136" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[3]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[2]),
        .O(\stateOp_reg[4]_6 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2136" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[4]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[3]),
        .O(\stateOp_reg[4]_6 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2137" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[5]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[4]),
        .O(\stateOp_reg[4]_6 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2137" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[6]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[5]),
        .O(\stateOp_reg[4]_6 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2138" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[7]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[6]),
        .O(\stateOp_reg[4]_6 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2138" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[8]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[7]),
        .O(\stateOp_reg[4]_6 [8]));
  (* SOFT_HLUTNM = "soft_lutpair2139" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcnt[9]_i_1__0 
       (.I0(\wordcnt_reg[1]_0 ),
        .I1(\stateOp_reg[4]_3 ),
        .I2(txlast1[8]),
        .O(\stateOp_reg[4]_6 [9]));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[0] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[0]_i_3_n_15 ),
        .Q(wordcnt_reg[0]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[0]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3_n_15 ),
        .Q(\wordcnt_reg[0]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[0]__0_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[0]__0_i_3_n_0 ,\wordcnt_reg[0]__0_i_3_n_1 ,\wordcnt_reg[0]__0_i_3_n_2 ,\wordcnt_reg[0]__0_i_3_n_3 ,\wordcnt_reg[0]__0_i_3_n_4 ,\wordcnt_reg[0]__0_i_3_n_5 ,\wordcnt_reg[0]__0_i_3_n_6 ,\wordcnt_reg[0]__0_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1}),
        .O({\wordcnt_reg[0]__0_i_3_n_8 ,\wordcnt_reg[0]__0_i_3_n_9 ,\wordcnt_reg[0]__0_i_3_n_10 ,\wordcnt_reg[0]__0_i_3_n_11 ,\wordcnt_reg[0]__0_i_3_n_12 ,\wordcnt_reg[0]__0_i_3_n_13 ,\wordcnt_reg[0]__0_i_3_n_14 ,\wordcnt_reg[0]__0_i_3_n_15 }),
        .S({\wordcnt_reg[7]__0_n_0 ,\wordcnt_reg[6]__0_n_0 ,\wordcnt_reg[5]__0_n_0 ,\wordcnt_reg[4]__0_n_0 ,\wordcnt_reg[3]__0_n_0 ,\wordcnt_reg[2]__0_n_0 ,\wordcnt_reg[1]__0_n_0 ,\wordcnt[0]__0_i_5_n_0 }));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[0]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[0]_i_3_n_0 ,\wordcnt_reg[0]_i_3_n_1 ,\wordcnt_reg[0]_i_3_n_2 ,\wordcnt_reg[0]_i_3_n_3 ,\wordcnt_reg[0]_i_3_n_4 ,\wordcnt_reg[0]_i_3_n_5 ,\wordcnt_reg[0]_i_3_n_6 ,\wordcnt_reg[0]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1}),
        .O({\wordcnt_reg[0]_i_3_n_8 ,\wordcnt_reg[0]_i_3_n_9 ,\wordcnt_reg[0]_i_3_n_10 ,\wordcnt_reg[0]_i_3_n_11 ,\wordcnt_reg[0]_i_3_n_12 ,\wordcnt_reg[0]_i_3_n_13 ,\wordcnt_reg[0]_i_3_n_14 ,\wordcnt_reg[0]_i_3_n_15 }),
        .S({wordcnt_reg[7:1],\wordcnt[0]_i_6_n_0 }));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[10] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[8]_i_1_n_13 ),
        .Q(wordcnt_reg[10]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[10]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1_n_13 ),
        .Q(\wordcnt_reg[10]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[11] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[8]_i_1_n_12 ),
        .Q(wordcnt_reg[11]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[11]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1_n_12 ),
        .Q(\wordcnt_reg[11]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[12] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[8]_i_1_n_11 ),
        .Q(wordcnt_reg[12]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[12]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1_n_11 ),
        .Q(\wordcnt_reg[12]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[13] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[8]_i_1_n_10 ),
        .Q(wordcnt_reg[13]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[13]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1_n_10 ),
        .Q(\wordcnt_reg[13]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[14] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[8]_i_1_n_9 ),
        .Q(wordcnt_reg[14]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[14]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1_n_9 ),
        .Q(\wordcnt_reg[14]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[15] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[8]_i_1_n_8 ),
        .Q(wordcnt_reg[15]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[15]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1_n_8 ),
        .Q(\wordcnt_reg[15]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[16] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[16]_i_1_n_15 ),
        .Q(wordcnt_reg[16]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[16]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1_n_15 ),
        .Q(\wordcnt_reg[16]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[16]__0_i_1 
       (.CI(\wordcnt_reg[8]__0_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[16]__0_i_1_n_0 ,\wordcnt_reg[16]__0_i_1_n_1 ,\wordcnt_reg[16]__0_i_1_n_2 ,\wordcnt_reg[16]__0_i_1_n_3 ,\wordcnt_reg[16]__0_i_1_n_4 ,\wordcnt_reg[16]__0_i_1_n_5 ,\wordcnt_reg[16]__0_i_1_n_6 ,\wordcnt_reg[16]__0_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\wordcnt_reg[16]__0_i_1_n_8 ,\wordcnt_reg[16]__0_i_1_n_9 ,\wordcnt_reg[16]__0_i_1_n_10 ,\wordcnt_reg[16]__0_i_1_n_11 ,\wordcnt_reg[16]__0_i_1_n_12 ,\wordcnt_reg[16]__0_i_1_n_13 ,\wordcnt_reg[16]__0_i_1_n_14 ,\wordcnt_reg[16]__0_i_1_n_15 }),
        .S({\wordcnt_reg[23]__0_n_0 ,\wordcnt_reg[22]__0_n_0 ,\wordcnt_reg[21]__0_n_0 ,\wordcnt_reg[20]__0_n_0 ,\wordcnt_reg[19]__0_n_0 ,\wordcnt_reg[18]__0_n_0 ,\wordcnt_reg[17]__0_n_0 ,\wordcnt_reg[16]__0_n_0 }));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[16]_i_1 
       (.CI(\wordcnt_reg[8]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[16]_i_1_n_0 ,\wordcnt_reg[16]_i_1_n_1 ,\wordcnt_reg[16]_i_1_n_2 ,\wordcnt_reg[16]_i_1_n_3 ,\wordcnt_reg[16]_i_1_n_4 ,\wordcnt_reg[16]_i_1_n_5 ,\wordcnt_reg[16]_i_1_n_6 ,\wordcnt_reg[16]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\wordcnt_reg[16]_i_1_n_8 ,\wordcnt_reg[16]_i_1_n_9 ,\wordcnt_reg[16]_i_1_n_10 ,\wordcnt_reg[16]_i_1_n_11 ,\wordcnt_reg[16]_i_1_n_12 ,\wordcnt_reg[16]_i_1_n_13 ,\wordcnt_reg[16]_i_1_n_14 ,\wordcnt_reg[16]_i_1_n_15 }),
        .S(wordcnt_reg[23:16]));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[17] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[16]_i_1_n_14 ),
        .Q(wordcnt_reg[17]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[17]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1_n_14 ),
        .Q(\wordcnt_reg[17]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[18] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[16]_i_1_n_13 ),
        .Q(wordcnt_reg[18]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[18]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1_n_13 ),
        .Q(\wordcnt_reg[18]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[19] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[16]_i_1_n_12 ),
        .Q(wordcnt_reg[19]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[19]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1_n_12 ),
        .Q(\wordcnt_reg[19]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[1] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[0]_i_3_n_14 ),
        .Q(wordcnt_reg[1]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[1]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3_n_14 ),
        .Q(\wordcnt_reg[1]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[20] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[16]_i_1_n_11 ),
        .Q(wordcnt_reg[20]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[20]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1_n_11 ),
        .Q(\wordcnt_reg[20]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[21] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[16]_i_1_n_10 ),
        .Q(wordcnt_reg[21]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[21]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1_n_10 ),
        .Q(\wordcnt_reg[21]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[22] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[16]_i_1_n_9 ),
        .Q(wordcnt_reg[22]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[22]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1_n_9 ),
        .Q(\wordcnt_reg[22]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[23] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[16]_i_1_n_8 ),
        .Q(wordcnt_reg[23]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[23]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1_n_8 ),
        .Q(\wordcnt_reg[23]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[24] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[24]_i_1_n_15 ),
        .Q(wordcnt_reg[24]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[24]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1_n_15 ),
        .Q(\wordcnt_reg[24]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[24]__0_i_1 
       (.CI(\wordcnt_reg[16]__0_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_wordcnt_reg[24]__0_i_1_CO_UNCONNECTED [7:6],\wordcnt_reg[24]__0_i_1_n_2 ,\wordcnt_reg[24]__0_i_1_n_3 ,\wordcnt_reg[24]__0_i_1_n_4 ,\wordcnt_reg[24]__0_i_1_n_5 ,\wordcnt_reg[24]__0_i_1_n_6 ,\wordcnt_reg[24]__0_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_wordcnt_reg[24]__0_i_1_O_UNCONNECTED [7],\wordcnt_reg[24]__0_i_1_n_9 ,\wordcnt_reg[24]__0_i_1_n_10 ,\wordcnt_reg[24]__0_i_1_n_11 ,\wordcnt_reg[24]__0_i_1_n_12 ,\wordcnt_reg[24]__0_i_1_n_13 ,\wordcnt_reg[24]__0_i_1_n_14 ,\wordcnt_reg[24]__0_i_1_n_15 }),
        .S({1'b0,\wordcnt_reg[30]__0_n_0 ,\wordcnt_reg[29]__0_n_0 ,\wordcnt_reg[28]__0_n_0 ,\wordcnt_reg[27]__0_n_0 ,\wordcnt_reg[26]__0_n_0 ,\wordcnt_reg[25]__0_n_0 ,\wordcnt_reg[24]__0_n_0 }));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[24]_i_1 
       (.CI(\wordcnt_reg[16]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_wordcnt_reg[24]_i_1_CO_UNCONNECTED [7:6],\wordcnt_reg[24]_i_1_n_2 ,\wordcnt_reg[24]_i_1_n_3 ,\wordcnt_reg[24]_i_1_n_4 ,\wordcnt_reg[24]_i_1_n_5 ,\wordcnt_reg[24]_i_1_n_6 ,\wordcnt_reg[24]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_wordcnt_reg[24]_i_1_O_UNCONNECTED [7],\wordcnt_reg[24]_i_1_n_9 ,\wordcnt_reg[24]_i_1_n_10 ,\wordcnt_reg[24]_i_1_n_11 ,\wordcnt_reg[24]_i_1_n_12 ,\wordcnt_reg[24]_i_1_n_13 ,\wordcnt_reg[24]_i_1_n_14 ,\wordcnt_reg[24]_i_1_n_15 }),
        .S({1'b0,wordcnt_reg[30:24]}));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[25] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[24]_i_1_n_14 ),
        .Q(wordcnt_reg[25]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[25]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1_n_14 ),
        .Q(\wordcnt_reg[25]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[26] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[24]_i_1_n_13 ),
        .Q(wordcnt_reg[26]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[26]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1_n_13 ),
        .Q(\wordcnt_reg[26]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[27] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[24]_i_1_n_12 ),
        .Q(wordcnt_reg[27]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[27]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1_n_12 ),
        .Q(\wordcnt_reg[27]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[28] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[24]_i_1_n_11 ),
        .Q(wordcnt_reg[28]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[28]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1_n_11 ),
        .Q(\wordcnt_reg[28]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[29] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[24]_i_1_n_10 ),
        .Q(wordcnt_reg[29]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[29]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1_n_10 ),
        .Q(\wordcnt_reg[29]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[2] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[0]_i_3_n_13 ),
        .Q(wordcnt_reg[2]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[2]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3_n_13 ),
        .Q(\wordcnt_reg[2]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[30] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[24]_i_1_n_9 ),
        .Q(wordcnt_reg[30]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[30]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1_n_9 ),
        .Q(\wordcnt_reg[30]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[3] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[0]_i_3_n_12 ),
        .Q(wordcnt_reg[3]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[3]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3_n_12 ),
        .Q(\wordcnt_reg[3]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[4] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[0]_i_3_n_11 ),
        .Q(wordcnt_reg[4]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[4]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3_n_11 ),
        .Q(\wordcnt_reg[4]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[5] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[0]_i_3_n_10 ),
        .Q(wordcnt_reg[5]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[5]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3_n_10 ),
        .Q(\wordcnt_reg[5]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[6] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[0]_i_3_n_9 ),
        .Q(wordcnt_reg[6]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[6]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3_n_9 ),
        .Q(\wordcnt_reg[6]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[7] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[0]_i_3_n_8 ),
        .Q(wordcnt_reg[7]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[7]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3_n_8 ),
        .Q(\wordcnt_reg[7]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[8] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[8]_i_1_n_15 ),
        .Q(wordcnt_reg[8]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[8]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1_n_15 ),
        .Q(\wordcnt_reg[8]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[8]__0_i_1 
       (.CI(\wordcnt_reg[0]__0_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[8]__0_i_1_n_0 ,\wordcnt_reg[8]__0_i_1_n_1 ,\wordcnt_reg[8]__0_i_1_n_2 ,\wordcnt_reg[8]__0_i_1_n_3 ,\wordcnt_reg[8]__0_i_1_n_4 ,\wordcnt_reg[8]__0_i_1_n_5 ,\wordcnt_reg[8]__0_i_1_n_6 ,\wordcnt_reg[8]__0_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\wordcnt_reg[8]__0_i_1_n_8 ,\wordcnt_reg[8]__0_i_1_n_9 ,\wordcnt_reg[8]__0_i_1_n_10 ,\wordcnt_reg[8]__0_i_1_n_11 ,\wordcnt_reg[8]__0_i_1_n_12 ,\wordcnt_reg[8]__0_i_1_n_13 ,\wordcnt_reg[8]__0_i_1_n_14 ,\wordcnt_reg[8]__0_i_1_n_15 }),
        .S({\wordcnt_reg[15]__0_n_0 ,\wordcnt_reg[14]__0_n_0 ,\wordcnt_reg[13]__0_n_0 ,\wordcnt_reg[12]__0_n_0 ,\wordcnt_reg[11]__0_n_0 ,\wordcnt_reg[10]__0_n_0 ,\wordcnt_reg[9]__0_n_0 ,\wordcnt_reg[8]__0_n_0 }));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[8]_i_1 
       (.CI(\wordcnt_reg[0]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[8]_i_1_n_0 ,\wordcnt_reg[8]_i_1_n_1 ,\wordcnt_reg[8]_i_1_n_2 ,\wordcnt_reg[8]_i_1_n_3 ,\wordcnt_reg[8]_i_1_n_4 ,\wordcnt_reg[8]_i_1_n_5 ,\wordcnt_reg[8]_i_1_n_6 ,\wordcnt_reg[8]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\wordcnt_reg[8]_i_1_n_8 ,\wordcnt_reg[8]_i_1_n_9 ,\wordcnt_reg[8]_i_1_n_10 ,\wordcnt_reg[8]_i_1_n_11 ,\wordcnt_reg[8]_i_1_n_12 ,\wordcnt_reg[8]_i_1_n_13 ,\wordcnt_reg[8]_i_1_n_14 ,\wordcnt_reg[8]_i_1_n_15 }),
        .S(wordcnt_reg[15:8]));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[9] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2_n_0 ),
        .D(\wordcnt_reg[8]_i_1_n_14 ),
        .Q(wordcnt_reg[9]),
        .R(\wordcnt[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[9]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1_n_14 ),
        .Q(\wordcnt_reg[9]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1_n_0 ));
endmodule

(* ORIG_REF_NAME = "Axislave_v1_0" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Axislave_v1_0__parameterized1
   (D,
    \stateOp_reg[1] ,
    recvAXIS_tdata,
    \crc_imd_reg[7] ,
    \crc_imd_reg[15] ,
    E,
    \tixVController_reg[7] ,
    \resid_reg[0] ,
    \stateOp_reg[0] ,
    \tixVController_reg[0] ,
    \stateOp_reg[0]_0 ,
    \stateOp_reg[2] ,
    \stateOp_reg[2]_0 ,
    rxAXIS_tvalid,
    \stateOp_reg[0]_1 ,
    \tixVController_reg[0]_0 ,
    \tixVController_reg[1] ,
    \wordcnt_reg[30]_0 ,
    \stateOp_reg[2]_1 ,
    rpuAXIL_rdata,
    recvAXIS_tlast,
    \stateOp_reg[1]_0 ,
    \stateOp_reg[0]_2 ,
    \rxlen_reg[1] ,
    \crc_imd_reg[1] ,
    recvAXIS_tlast_sig_reg_0,
    crc_imd032_out,
    crc_imd017_out,
    \recvAXIS_tdata_sig_reg[7]_0 ,
    stateOp_reg,
    \recvAXIS_tdata_sig_reg[21]_0 ,
    \txAXIS_tdata_reg[14] ,
    stateOp_reg_0,
    \txAXIS_tdata_reg[30] ,
    \crc_imd_reg[14] ,
    crc_imd059_out,
    crc_imd060_out,
    \txAXIS_tdata_reg[11] ,
    \recvAXIS_tdata_sig_reg[12]_0 ,
    \txAXIS_tdata_reg[31] ,
    \recvAXIS_tdata_sig_reg[13]_0 ,
    stateOp_reg_1,
    stateOp_reg_2,
    stateOp_reg_3,
    \recvAXIS_tdata_sig_reg[5]_0 ,
    \txAXIS_tdata_reg[14]_0 ,
    \recvAXIS_tdata_sig_reg[23]_0 ,
    \recvAXIS_tdata_sig_reg[2]_0 ,
    \recvAXIS_tdata_sig_reg[13]_1 ,
    \txAXIS_tdata_reg[11]_0 ,
    \recvAXIS_tdata_sig_reg[21]_1 ,
    \txAXIS_tdata_reg[7] ,
    p_24_in,
    crcAXIS_tlast_sig_reg,
    \stateOp_reg[2]_2 ,
    \stateOp_reg[1]_1 ,
    \stateOp_reg[3] ,
    \stateOp_reg[1]_2 ,
    \tixVCommand_reg[1] ,
    \tixVCommand_reg[1]_0 ,
    \scoreMin_reg[7] ,
    \tkst_reg[7] ,
    \tkst_reg[31] ,
    \stateOp_reg[0]_3 ,
    \resid_reg[0]_0 ,
    \ixRetbufCrc_reg[5] ,
    \resid_reg[0]_1 ,
    \ixRetbufCrc_reg[1] ,
    \ixRetbufCrc_reg[2] ,
    \ixRetbufCrc_reg[2]_0 ,
    \ixRetbufCrc_reg[2]_1 ,
    \ixRetbufCrc_reg[2]_2 ,
    \resid_reg[0]_2 ,
    \ixRetbufCrc_reg[2]_3 ,
    \resid_reg[0]_3 ,
    \stateOp_reg[1]_3 ,
    \tixVCommand_reg[7] ,
    \ixRetbufCrc_reg[5]_0 ,
    \opbuf_reg[0][7] ,
    \opbuf_reg[5][7] ,
    \recvAXIS_tdata_sig_reg[15]_0 ,
    \recvAXIS_tdata_sig_reg[23]_1 ,
    \recvAXIS_tdata_sig_reg[23]_2 ,
    \opbuf_reg[1][7] ,
    \stateOp_reg[3]_0 ,
    \stateOp_reg[3]_1 ,
    \ixRetbufCrc_reg[5]_1 ,
    \stateOp_reg[3]_2 ,
    \opbuf_reg[2][7] ,
    \recvAXIS_tdata_sig_reg[15]_1 ,
    \stateOp_reg[4] ,
    \stateOp_reg[4]_0 ,
    \stateOp_reg[1]_4 ,
    \stateOp_reg[1]_5 ,
    \stateSend_reg[0]_0 ,
    AXIS_tlast,
    AXIS_tvalid,
    out,
    AXIL_wready_sig_reg_0,
    AXIL_awready_sig_reg_0,
    AXIL_arready,
    AXIL_bvalid_sig_reg_0,
    rpuAXIL_rvalid,
    Q,
    crcAXIS_tlast_sig_reg_0,
    \pollbuf_reg[4][7] ,
    \pollbuf_reg[0][7] ,
    \txAXIS_tdata_reg[15] ,
    \retbuf_reg[36][7] ,
    \retbuf_reg[36][7]_0 ,
    \retbuf_reg[5][5] ,
    \lastAXIS_tkeep_reg[3] ,
    lenRet1,
    \crcAXIS_tkeep_reg[0] ,
    \opbuf_reg[6][0] ,
    \opbuf_reg[6][0]_0 ,
    \opbuf_reg[1][0] ,
    \opbuf_reg[1][0]_0 ,
    \retbuf_reg[14][4] ,
    \retbuf_reg[14][4]_0 ,
    \retbuf_reg[2][7] ,
    \wordcnt_reg[0]_0 ,
    \stateOp_next_reg[4] ,
    \lastAXIS_tkeep_reg[3]_0 ,
    \stateOp_next_reg[2] ,
    \stateOp_next_reg[2]_0 ,
    \stateOp_next_reg[1] ,
    crcAXIS_tlast_sig_reg_1,
    crcAXIS_tlast_sig_reg_2,
    \rxlen_reg[1]_0 ,
    rxlen,
    \crc_imd_reg[2] ,
    \crc_imd_reg[2]_0 ,
    crc_imd013_out,
    crc_imd015_out,
    crc_imd033_out,
    crc_imd019_out,
    crc_imd020_out,
    \crc_imd_reg[9] ,
    stateOp_reg_4,
    \crc_imd_reg[2]_1 ,
    \crc_imd_reg[0] ,
    \crc_imd_reg[0]_0 ,
    \crc_imd_reg[2]_2 ,
    \crc_imd_reg[2]_3 ,
    \crc_imd_reg[4] ,
    \crc_imd_reg[6] ,
    \crc_imd_reg[8] ,
    \crc_imd_reg[8]_0 ,
    \crc_imd_reg[9]_0 ,
    \crc_imd_reg[10] ,
    \crc_imd_reg[13] ,
    \crc_imd_reg[15]_0 ,
    \crc_imd_reg[15]_1 ,
    p_10_out,
    \sendAXIL_rdata_reg[31]_0 ,
    \crc_imd_reg[11] ,
    \crc_imd[6]_i_3__0_0 ,
    \crc_imd[2]_i_3__0_0 ,
    \stateOp_reg[0]_4 ,
    \stateOp_reg[0]_5 ,
    CO,
    \stateOp_reg[0]_6 ,
    \stateOp_reg[0]_7 ,
    crcAXIS_tlast_sig_i_4__0_0,
    \wordcnt_reg[0]_1 ,
    \crcAXIS_tkeep_reg[0]_0 ,
    \stateOp_reg[0]_8 ,
    \stateOp_reg[0]_9 ,
    \lastAXIS_tkeep_reg[3]_1 ,
    \retbuf_reg[5][7] ,
    \retbuf_reg[5][5]_0 ,
    \retbuf_reg[5][5]_1 ,
    \retbuf_reg[1][7] ,
    \retbuf_reg[4][4] ,
    \retbuf_reg[4][5] ,
    \retbuf_reg[4][6] ,
    \retbuf_reg[1][0] ,
    \retbuf_reg[1][2] ,
    \retbuf_reg[1][4] ,
    \retbuf_reg[1][5] ,
    \retbuf_reg[1][6] ,
    \retbuf_reg[1][7]_0 ,
    \retbuf_reg[4][7] ,
    \retbuf_reg[5][7]_0 ,
    \txAXIS_tdata_reg[7]_0 ,
    \txAXIS_tdata_reg[7]_1 ,
    \crcAXIS_tkeep_reg[3] ,
    \crcAXIS_tkeep_reg[3]_0 ,
    \stateOp_reg[3]_3 ,
    \stateOp_reg[3]_4 ,
    crcAXIS_tlast_sig_reg_3,
    crcAXIS_tlast_sig_reg_4,
    crcAXIS_tlast_sig_reg_5,
    \txAXIS_tdata_reg[0] ,
    \txAXIS_tdata_reg[0]_0 ,
    \txAXIS_tdata_reg[0]_1 ,
    \txAXIS_tdata_reg[0]_2 ,
    \txAXIS_tdata_reg[1] ,
    \txAXIS_tdata_reg[1]_0 ,
    \txAXIS_tdata_reg[1]_1 ,
    \txAXIS_tdata_reg[1]_2 ,
    \txAXIS_tdata_reg[2] ,
    \txAXIS_tdata_reg[2]_0 ,
    \txAXIS_tdata_reg[3] ,
    \txAXIS_tdata_reg[3]_0 ,
    \txAXIS_tdata_reg[3]_1 ,
    \txAXIS_tdata_reg[4] ,
    \txAXIS_tdata_reg[4]_0 ,
    \txAXIS_tdata_reg[5] ,
    \txAXIS_tdata_reg[5]_0 ,
    \txAXIS_tdata_reg[5]_1 ,
    \txAXIS_tdata_reg[6] ,
    \txAXIS_tdata_reg[6]_0 ,
    \txAXIS_tdata_reg[7]_2 ,
    \txAXIS_tdata_reg[7]_3 ,
    \txAXIS_tdata_reg[7]_4 ,
    \txAXIS_tdata_reg[8] ,
    \txAXIS_tdata_reg[8]_0 ,
    \txAXIS_tdata_reg[8]_1 ,
    \txAXIS_tdata_reg[9] ,
    \txAXIS_tdata_reg[9]_0 ,
    \txAXIS_tdata_reg[9]_1 ,
    \txAXIS_tdata_reg[10] ,
    \txAXIS_tdata_reg[10]_0 ,
    \txAXIS_tdata_reg[10]_1 ,
    \txAXIS_tdata_reg[11]_1 ,
    \txAXIS_tdata_reg[11]_2 ,
    \txAXIS_tdata_reg[11]_3 ,
    \txAXIS_tdata_reg[12] ,
    \txAXIS_tdata_reg[12]_0 ,
    \txAXIS_tdata_reg[12]_1 ,
    \txAXIS_tdata_reg[13] ,
    \txAXIS_tdata_reg[13]_0 ,
    \txAXIS_tdata_reg[13]_1 ,
    \txAXIS_tdata_reg[14]_1 ,
    \txAXIS_tdata_reg[14]_2 ,
    \txAXIS_tdata_reg[14]_3 ,
    \txAXIS_tdata_reg[15]_0 ,
    \txAXIS_tdata_reg[15]_1 ,
    \txAXIS_tdata_reg[15]_2 ,
    \txAXIS_tdata_reg[17] ,
    \txAXIS_tdata_reg[17]_0 ,
    \txAXIS_tdata_reg[17]_1 ,
    \txAXIS_tdata_reg[17]_2 ,
    \txAXIS_tdata_reg[17]_3 ,
    \txAXIS_tdata_reg[19] ,
    \txAXIS_tdata_reg[19]_0 ,
    \txAXIS_tdata_reg[19]_1 ,
    \txAXIS_tdata_reg[19]_2 ,
    \txAXIS_tdata_reg[20] ,
    \txAXIS_tdata_reg[20]_0 ,
    \txAXIS_tdata_reg[20]_1 ,
    \txAXIS_tdata_reg[20]_2 ,
    \txAXIS_tdata_reg[21] ,
    \txAXIS_tdata_reg[21]_0 ,
    \txAXIS_tdata_reg[21]_1 ,
    \txAXIS_tdata_reg[22] ,
    \txAXIS_tdata_reg[22]_0 ,
    \txAXIS_tdata_reg[22]_1 ,
    \txAXIS_tdata_reg[23] ,
    \txAXIS_tdata_reg[23]_0 ,
    \txAXIS_tdata_reg[23]_1 ,
    \txAXIS_tdata_reg[24] ,
    \txAXIS_tdata_reg[24]_0 ,
    \txAXIS_tdata_reg[24]_1 ,
    \txAXIS_tdata_reg[25] ,
    \txAXIS_tdata_reg[25]_0 ,
    \txAXIS_tdata_reg[26] ,
    \txAXIS_tdata_reg[26]_0 ,
    \txAXIS_tdata_reg[26]_1 ,
    \txAXIS_tdata_reg[26]_2 ,
    \txAXIS_tdata_reg[27] ,
    \txAXIS_tdata_reg[27]_0 ,
    \txAXIS_tdata_reg[27]_1 ,
    \txAXIS_tdata_reg[28] ,
    \txAXIS_tdata_reg[28]_0 ,
    \txAXIS_tdata_reg[28]_1 ,
    \txAXIS_tdata_reg[29] ,
    \txAXIS_tdata_reg[29]_0 ,
    \txAXIS_tdata_reg[30]_0 ,
    \txAXIS_tdata_reg[30]_1 ,
    \txAXIS_tdata_reg[30]_2 ,
    \txAXIS_tdata_reg[31]_0 ,
    \txAXIS_tdata_reg[31]_1 ,
    \txAXIS_tdata_reg[31]_2 ,
    \pollbuf_reg[1][7] ,
    \txAXIS_tdata_reg[15]_3 ,
    \tixVBuffer_reg[7] ,
    \len_reg[7] ,
    \len_reg[15] ,
    \tixVController_reg[7]_0 ,
    \crcAXIS_tkeep_reg[1] ,
    \retbuf_reg[39][0] ,
    \stateOp_reg[1]_6 ,
    \stateOp_reg[1]_7 ,
    \stateOp_reg[2]_3 ,
    \stateOp_reg[2]_4 ,
    \stateOp_reg[4]_1 ,
    \stateOp_reg[4]_2 ,
    \stateOp_next_reg[0] ,
    \tixVBufxfop_reg[7] ,
    txlast1,
    \txlen_reg[0] ,
    \wordcntLast_reg[1] ,
    crcAXIS_tlast_sig_reg_6,
    \stateOp_reg[0]_10 ,
    \stateOp_reg[0]_11 ,
    \stateOp_reg[0]_12 ,
    \crcAXIS_tkeep_reg[0]_1 ,
    \stateOp_reg[3]_5 ,
    \stateOp_reg[3]_6 ,
    recvAXIS_tlast_sig_reg_i_3__0_0,
    \stateOp_reg[0]_13 ,
    crcAXIS_tlast_sig_i_9__0_0,
    crcAXIS_tlast_sig_i_9__0_1,
    rpuAXIL_wvalid,
    \sendAXIL_rdata_reg[0]_0 ,
    aclk_sig,
    rpuAXIL_awvalid,
    rpuAXIL_wdata,
    rpuAXIL_awaddr,
    rpuAXIL_araddr,
    rpuAXIL_bready,
    rpuAXIL_wstrb,
    rpuAXIL_arvalid,
    rpuAXIL_rready);
  output [7:0]D;
  output \stateOp_reg[1] ;
  output [8:0]recvAXIS_tdata;
  output [7:0]\crc_imd_reg[7] ;
  output [7:0]\crc_imd_reg[15] ;
  output [0:0]E;
  output [7:0]\tixVController_reg[7] ;
  output [0:0]\resid_reg[0] ;
  output \stateOp_reg[0] ;
  output [2:0]\tixVController_reg[0] ;
  output [3:0]\stateOp_reg[0]_0 ;
  output [2:0]\stateOp_reg[2] ;
  output [0:0]\stateOp_reg[2]_0 ;
  output rxAXIS_tvalid;
  output [0:0]\stateOp_reg[0]_1 ;
  output \tixVController_reg[0]_0 ;
  output \tixVController_reg[1] ;
  output [30:0]\wordcnt_reg[30]_0 ;
  output \stateOp_reg[2]_1 ;
  output [31:0]rpuAXIL_rdata;
  output recvAXIS_tlast;
  output [4:0]\stateOp_reg[1]_0 ;
  output \stateOp_reg[0]_2 ;
  output \rxlen_reg[1] ;
  output [5:0]\crc_imd_reg[1] ;
  output recvAXIS_tlast_sig_reg_0;
  output crc_imd032_out;
  output crc_imd017_out;
  output \recvAXIS_tdata_sig_reg[7]_0 ;
  output stateOp_reg;
  output \recvAXIS_tdata_sig_reg[21]_0 ;
  output \txAXIS_tdata_reg[14] ;
  output stateOp_reg_0;
  output [11:0]\txAXIS_tdata_reg[30] ;
  output \crc_imd_reg[14] ;
  output crc_imd059_out;
  output crc_imd060_out;
  output \txAXIS_tdata_reg[11] ;
  output \recvAXIS_tdata_sig_reg[12]_0 ;
  output \txAXIS_tdata_reg[31] ;
  output \recvAXIS_tdata_sig_reg[13]_0 ;
  output stateOp_reg_1;
  output stateOp_reg_2;
  output stateOp_reg_3;
  output \recvAXIS_tdata_sig_reg[5]_0 ;
  output \txAXIS_tdata_reg[14]_0 ;
  output \recvAXIS_tdata_sig_reg[23]_0 ;
  output \recvAXIS_tdata_sig_reg[2]_0 ;
  output \recvAXIS_tdata_sig_reg[13]_1 ;
  output \txAXIS_tdata_reg[11]_0 ;
  output \recvAXIS_tdata_sig_reg[21]_1 ;
  output \txAXIS_tdata_reg[7] ;
  output p_24_in;
  output crcAXIS_tlast_sig_reg;
  output [0:0]\stateOp_reg[2]_2 ;
  output [0:0]\stateOp_reg[1]_1 ;
  output [0:0]\stateOp_reg[3] ;
  output [4:0]\stateOp_reg[1]_2 ;
  output [1:0]\tixVCommand_reg[1] ;
  output [1:0]\tixVCommand_reg[1]_0 ;
  output [7:0]\scoreMin_reg[7] ;
  output [7:0]\tkst_reg[7] ;
  output [7:0]\tkst_reg[31] ;
  output \stateOp_reg[0]_3 ;
  output [3:0]\resid_reg[0]_0 ;
  output [0:0]\ixRetbufCrc_reg[5] ;
  output [0:0]\resid_reg[0]_1 ;
  output [0:0]\ixRetbufCrc_reg[1] ;
  output [0:0]\ixRetbufCrc_reg[2] ;
  output [0:0]\ixRetbufCrc_reg[2]_0 ;
  output [0:0]\ixRetbufCrc_reg[2]_1 ;
  output [0:0]\ixRetbufCrc_reg[2]_2 ;
  output [0:0]\resid_reg[0]_2 ;
  output [0:0]\ixRetbufCrc_reg[2]_3 ;
  output [0:0]\resid_reg[0]_3 ;
  output [29:0]\stateOp_reg[1]_3 ;
  output [7:0]\tixVCommand_reg[7] ;
  output [0:0]\ixRetbufCrc_reg[5]_0 ;
  output [7:0]\opbuf_reg[0][7] ;
  output [15:0]\opbuf_reg[5][7] ;
  output [7:0]\recvAXIS_tdata_sig_reg[15]_0 ;
  output [7:0]\recvAXIS_tdata_sig_reg[23]_1 ;
  output [7:0]\recvAXIS_tdata_sig_reg[23]_2 ;
  output [7:0]\opbuf_reg[1][7] ;
  output [0:0]\stateOp_reg[3]_0 ;
  output [0:0]\stateOp_reg[3]_1 ;
  output [0:0]\ixRetbufCrc_reg[5]_1 ;
  output [0:0]\stateOp_reg[3]_2 ;
  output [7:0]\opbuf_reg[2][7] ;
  output [7:0]\recvAXIS_tdata_sig_reg[15]_1 ;
  output [0:0]\stateOp_reg[4] ;
  output [0:0]\stateOp_reg[4]_0 ;
  output [0:0]\stateOp_reg[1]_4 ;
  output \stateOp_reg[1]_5 ;
  output \stateSend_reg[0]_0 ;
  output AXIS_tlast;
  output AXIS_tvalid;
  output [24:0]out;
  output AXIL_wready_sig_reg_0;
  output AXIL_awready_sig_reg_0;
  output AXIL_arready;
  output AXIL_bvalid_sig_reg_0;
  output rpuAXIL_rvalid;
  input [4:0]Q;
  input crcAXIS_tlast_sig_reg_0;
  input [15:0]\pollbuf_reg[4][7] ;
  input [7:0]\pollbuf_reg[0][7] ;
  input [1:0]\txAXIS_tdata_reg[15] ;
  input [2:0]\retbuf_reg[36][7] ;
  input \retbuf_reg[36][7]_0 ;
  input \retbuf_reg[5][5] ;
  input \lastAXIS_tkeep_reg[3] ;
  input lenRet1;
  input \crcAXIS_tkeep_reg[0] ;
  input \opbuf_reg[6][0] ;
  input \opbuf_reg[6][0]_0 ;
  input \opbuf_reg[1][0] ;
  input \opbuf_reg[1][0]_0 ;
  input \retbuf_reg[14][4] ;
  input \retbuf_reg[14][4]_0 ;
  input \retbuf_reg[2][7] ;
  input [0:0]\wordcnt_reg[0]_0 ;
  input \stateOp_next_reg[4] ;
  input \lastAXIS_tkeep_reg[3]_0 ;
  input [0:0]\stateOp_next_reg[2] ;
  input \stateOp_next_reg[2]_0 ;
  input \stateOp_next_reg[1] ;
  input crcAXIS_tlast_sig_reg_1;
  input crcAXIS_tlast_sig_reg_2;
  input \rxlen_reg[1]_0 ;
  input [0:0]rxlen;
  input \crc_imd_reg[2] ;
  input \crc_imd_reg[2]_0 ;
  input crc_imd013_out;
  input crc_imd015_out;
  input crc_imd033_out;
  input crc_imd019_out;
  input crc_imd020_out;
  input \crc_imd_reg[9] ;
  input stateOp_reg_4;
  input \crc_imd_reg[2]_1 ;
  input \crc_imd_reg[0] ;
  input \crc_imd_reg[0]_0 ;
  input \crc_imd_reg[2]_2 ;
  input \crc_imd_reg[2]_3 ;
  input \crc_imd_reg[4] ;
  input \crc_imd_reg[6] ;
  input \crc_imd_reg[8] ;
  input \crc_imd_reg[8]_0 ;
  input \crc_imd_reg[9]_0 ;
  input [1:0]\crc_imd_reg[10] ;
  input \crc_imd_reg[13] ;
  input \crc_imd_reg[15]_0 ;
  input \crc_imd_reg[15]_1 ;
  input [0:0]p_10_out;
  input [31:0]\sendAXIL_rdata_reg[31]_0 ;
  input \crc_imd_reg[11] ;
  input \crc_imd[6]_i_3__0_0 ;
  input \crc_imd[2]_i_3__0_0 ;
  input \stateOp_reg[0]_4 ;
  input \stateOp_reg[0]_5 ;
  input [0:0]CO;
  input \stateOp_reg[0]_6 ;
  input \stateOp_reg[0]_7 ;
  input [4:0]crcAXIS_tlast_sig_i_4__0_0;
  input \wordcnt_reg[0]_1 ;
  input \crcAXIS_tkeep_reg[0]_0 ;
  input \stateOp_reg[0]_8 ;
  input \stateOp_reg[0]_9 ;
  input \lastAXIS_tkeep_reg[3]_1 ;
  input [7:0]\retbuf_reg[5][7] ;
  input \retbuf_reg[5][5]_0 ;
  input \retbuf_reg[5][5]_1 ;
  input [15:0]\retbuf_reg[1][7] ;
  input \retbuf_reg[4][4] ;
  input \retbuf_reg[4][5] ;
  input \retbuf_reg[4][6] ;
  input \retbuf_reg[1][0] ;
  input \retbuf_reg[1][2] ;
  input \retbuf_reg[1][4] ;
  input \retbuf_reg[1][5] ;
  input \retbuf_reg[1][6] ;
  input \retbuf_reg[1][7]_0 ;
  input \retbuf_reg[4][7] ;
  input \retbuf_reg[5][7]_0 ;
  input \txAXIS_tdata_reg[7]_0 ;
  input \txAXIS_tdata_reg[7]_1 ;
  input [1:0]\crcAXIS_tkeep_reg[3] ;
  input \crcAXIS_tkeep_reg[3]_0 ;
  input \stateOp_reg[3]_3 ;
  input \stateOp_reg[3]_4 ;
  input crcAXIS_tlast_sig_reg_3;
  input [0:0]crcAXIS_tlast_sig_reg_4;
  input crcAXIS_tlast_sig_reg_5;
  input \txAXIS_tdata_reg[0] ;
  input \txAXIS_tdata_reg[0]_0 ;
  input \txAXIS_tdata_reg[0]_1 ;
  input \txAXIS_tdata_reg[0]_2 ;
  input \txAXIS_tdata_reg[1] ;
  input \txAXIS_tdata_reg[1]_0 ;
  input \txAXIS_tdata_reg[1]_1 ;
  input \txAXIS_tdata_reg[1]_2 ;
  input \txAXIS_tdata_reg[2] ;
  input \txAXIS_tdata_reg[2]_0 ;
  input \txAXIS_tdata_reg[3] ;
  input \txAXIS_tdata_reg[3]_0 ;
  input \txAXIS_tdata_reg[3]_1 ;
  input \txAXIS_tdata_reg[4] ;
  input \txAXIS_tdata_reg[4]_0 ;
  input \txAXIS_tdata_reg[5] ;
  input \txAXIS_tdata_reg[5]_0 ;
  input \txAXIS_tdata_reg[5]_1 ;
  input \txAXIS_tdata_reg[6] ;
  input \txAXIS_tdata_reg[6]_0 ;
  input \txAXIS_tdata_reg[7]_2 ;
  input \txAXIS_tdata_reg[7]_3 ;
  input \txAXIS_tdata_reg[7]_4 ;
  input \txAXIS_tdata_reg[8] ;
  input \txAXIS_tdata_reg[8]_0 ;
  input \txAXIS_tdata_reg[8]_1 ;
  input \txAXIS_tdata_reg[9] ;
  input \txAXIS_tdata_reg[9]_0 ;
  input \txAXIS_tdata_reg[9]_1 ;
  input \txAXIS_tdata_reg[10] ;
  input \txAXIS_tdata_reg[10]_0 ;
  input \txAXIS_tdata_reg[10]_1 ;
  input \txAXIS_tdata_reg[11]_1 ;
  input \txAXIS_tdata_reg[11]_2 ;
  input \txAXIS_tdata_reg[11]_3 ;
  input \txAXIS_tdata_reg[12] ;
  input \txAXIS_tdata_reg[12]_0 ;
  input \txAXIS_tdata_reg[12]_1 ;
  input \txAXIS_tdata_reg[13] ;
  input \txAXIS_tdata_reg[13]_0 ;
  input \txAXIS_tdata_reg[13]_1 ;
  input \txAXIS_tdata_reg[14]_1 ;
  input \txAXIS_tdata_reg[14]_2 ;
  input \txAXIS_tdata_reg[14]_3 ;
  input \txAXIS_tdata_reg[15]_0 ;
  input \txAXIS_tdata_reg[15]_1 ;
  input \txAXIS_tdata_reg[15]_2 ;
  input \txAXIS_tdata_reg[17] ;
  input \txAXIS_tdata_reg[17]_0 ;
  input \txAXIS_tdata_reg[17]_1 ;
  input \txAXIS_tdata_reg[17]_2 ;
  input \txAXIS_tdata_reg[17]_3 ;
  input \txAXIS_tdata_reg[19] ;
  input \txAXIS_tdata_reg[19]_0 ;
  input \txAXIS_tdata_reg[19]_1 ;
  input \txAXIS_tdata_reg[19]_2 ;
  input \txAXIS_tdata_reg[20] ;
  input \txAXIS_tdata_reg[20]_0 ;
  input \txAXIS_tdata_reg[20]_1 ;
  input \txAXIS_tdata_reg[20]_2 ;
  input \txAXIS_tdata_reg[21] ;
  input \txAXIS_tdata_reg[21]_0 ;
  input \txAXIS_tdata_reg[21]_1 ;
  input \txAXIS_tdata_reg[22] ;
  input \txAXIS_tdata_reg[22]_0 ;
  input \txAXIS_tdata_reg[22]_1 ;
  input \txAXIS_tdata_reg[23] ;
  input \txAXIS_tdata_reg[23]_0 ;
  input \txAXIS_tdata_reg[23]_1 ;
  input \txAXIS_tdata_reg[24] ;
  input \txAXIS_tdata_reg[24]_0 ;
  input \txAXIS_tdata_reg[24]_1 ;
  input \txAXIS_tdata_reg[25] ;
  input \txAXIS_tdata_reg[25]_0 ;
  input \txAXIS_tdata_reg[26] ;
  input \txAXIS_tdata_reg[26]_0 ;
  input \txAXIS_tdata_reg[26]_1 ;
  input \txAXIS_tdata_reg[26]_2 ;
  input \txAXIS_tdata_reg[27] ;
  input \txAXIS_tdata_reg[27]_0 ;
  input \txAXIS_tdata_reg[27]_1 ;
  input \txAXIS_tdata_reg[28] ;
  input \txAXIS_tdata_reg[28]_0 ;
  input \txAXIS_tdata_reg[28]_1 ;
  input \txAXIS_tdata_reg[29] ;
  input \txAXIS_tdata_reg[29]_0 ;
  input \txAXIS_tdata_reg[30]_0 ;
  input \txAXIS_tdata_reg[30]_1 ;
  input \txAXIS_tdata_reg[30]_2 ;
  input \txAXIS_tdata_reg[31]_0 ;
  input \txAXIS_tdata_reg[31]_1 ;
  input \txAXIS_tdata_reg[31]_2 ;
  input [7:0]\pollbuf_reg[1][7] ;
  input \txAXIS_tdata_reg[15]_3 ;
  input [7:0]\tixVBuffer_reg[7] ;
  input [7:0]\len_reg[7] ;
  input [7:0]\len_reg[15] ;
  input [7:0]\tixVController_reg[7]_0 ;
  input \crcAXIS_tkeep_reg[1] ;
  input \retbuf_reg[39][0] ;
  input \stateOp_reg[1]_6 ;
  input \stateOp_reg[1]_7 ;
  input \stateOp_reg[2]_3 ;
  input \stateOp_reg[2]_4 ;
  input \stateOp_reg[4]_1 ;
  input \stateOp_reg[4]_2 ;
  input \stateOp_next_reg[0] ;
  input [7:0]\tixVBufxfop_reg[7] ;
  input [29:0]txlast1;
  input \txlen_reg[0] ;
  input \wordcntLast_reg[1] ;
  input crcAXIS_tlast_sig_reg_6;
  input [1:0]\stateOp_reg[0]_10 ;
  input [1:0]\stateOp_reg[0]_11 ;
  input \stateOp_reg[0]_12 ;
  input [0:0]\crcAXIS_tkeep_reg[0]_1 ;
  input \stateOp_reg[3]_5 ;
  input \stateOp_reg[3]_6 ;
  input [2:0]recvAXIS_tlast_sig_reg_i_3__0_0;
  input \stateOp_reg[0]_13 ;
  input [3:0]crcAXIS_tlast_sig_i_9__0_0;
  input crcAXIS_tlast_sig_i_9__0_1;
  input rpuAXIL_wvalid;
  input [0:0]\sendAXIL_rdata_reg[0]_0 ;
  input aclk_sig;
  input rpuAXIL_awvalid;
  input [31:0]rpuAXIL_wdata;
  input [1:0]rpuAXIL_awaddr;
  input [1:0]rpuAXIL_araddr;
  input rpuAXIL_bready;
  input [3:0]rpuAXIL_wstrb;
  input rpuAXIL_arvalid;
  input rpuAXIL_rready;

  wire [5:4]AXIL_araddr_sig;
  wire AXIL_arready;
  wire AXIL_arready_sig0;
  wire AXIL_awready_sig0;
  wire AXIL_awready_sig_i_1__0_n_0;
  wire AXIL_awready_sig_reg_0;
  wire AXIL_bvalid_sig_i_1__0_n_0;
  wire AXIL_bvalid_sig_reg_0;
  wire AXIL_rvalid_sig_i_1__0_n_0;
  wire \AXIL_wdata_sig[15]_i_1__0_n_0 ;
  wire \AXIL_wdata_sig[23]_i_1__0_n_0 ;
  wire \AXIL_wdata_sig[31]_i_1__0_n_0 ;
  wire \AXIL_wdata_sig[7]_i_1__0_n_0 ;
  wire \AXIL_wdata_sig_reg_n_0_[0] ;
  wire \AXIL_wdata_sig_reg_n_0_[10] ;
  wire \AXIL_wdata_sig_reg_n_0_[11] ;
  wire \AXIL_wdata_sig_reg_n_0_[12] ;
  wire \AXIL_wdata_sig_reg_n_0_[13] ;
  wire \AXIL_wdata_sig_reg_n_0_[14] ;
  wire \AXIL_wdata_sig_reg_n_0_[15] ;
  wire \AXIL_wdata_sig_reg_n_0_[16] ;
  wire \AXIL_wdata_sig_reg_n_0_[17] ;
  wire \AXIL_wdata_sig_reg_n_0_[18] ;
  wire \AXIL_wdata_sig_reg_n_0_[19] ;
  wire \AXIL_wdata_sig_reg_n_0_[1] ;
  wire \AXIL_wdata_sig_reg_n_0_[20] ;
  wire \AXIL_wdata_sig_reg_n_0_[21] ;
  wire \AXIL_wdata_sig_reg_n_0_[22] ;
  wire \AXIL_wdata_sig_reg_n_0_[23] ;
  wire \AXIL_wdata_sig_reg_n_0_[24] ;
  wire \AXIL_wdata_sig_reg_n_0_[25] ;
  wire \AXIL_wdata_sig_reg_n_0_[26] ;
  wire \AXIL_wdata_sig_reg_n_0_[27] ;
  wire \AXIL_wdata_sig_reg_n_0_[28] ;
  wire \AXIL_wdata_sig_reg_n_0_[29] ;
  wire \AXIL_wdata_sig_reg_n_0_[30] ;
  wire \AXIL_wdata_sig_reg_n_0_[31] ;
  wire \AXIL_wdata_sig_reg_n_0_[4] ;
  wire \AXIL_wdata_sig_reg_n_0_[5] ;
  wire \AXIL_wdata_sig_reg_n_0_[6] ;
  wire \AXIL_wdata_sig_reg_n_0_[7] ;
  wire \AXIL_wdata_sig_reg_n_0_[8] ;
  wire \AXIL_wdata_sig_reg_n_0_[9] ;
  wire AXIL_wready_sig_i_1__0_n_0;
  wire AXIL_wready_sig_reg_0;
  wire [31:2]AXIS_tdata;
  wire AXIS_tlast;
  wire AXIS_tvalid;
  wire [0:0]CO;
  wire [7:0]D;
  wire [0:0]E;
  wire [4:0]Q;
  wire ackRxtx;
  wire aclk_sig;
  wire awdone_i_1__1_n_0;
  wire awdone_reg_n_0;
  wire \crcAXIS_tkeep[3]_i_3__0_n_0 ;
  wire \crcAXIS_tkeep[3]_i_4_n_0 ;
  wire \crcAXIS_tkeep[3]_i_5_n_0 ;
  wire \crcAXIS_tkeep[3]_i_6_n_0 ;
  wire \crcAXIS_tkeep[3]_i_8_n_0 ;
  wire \crcAXIS_tkeep[3]_i_9_n_0 ;
  wire \crcAXIS_tkeep_reg[0] ;
  wire \crcAXIS_tkeep_reg[0]_0 ;
  wire [0:0]\crcAXIS_tkeep_reg[0]_1 ;
  wire \crcAXIS_tkeep_reg[1] ;
  wire [1:0]\crcAXIS_tkeep_reg[3] ;
  wire \crcAXIS_tkeep_reg[3]_0 ;
  wire crcAXIS_tlast_sig_i_2__0_n_0;
  wire [4:0]crcAXIS_tlast_sig_i_4__0_0;
  wire crcAXIS_tlast_sig_i_4__0_n_0;
  wire crcAXIS_tlast_sig_i_5__0_n_0;
  wire crcAXIS_tlast_sig_i_8__0_n_0;
  wire [3:0]crcAXIS_tlast_sig_i_9__0_0;
  wire crcAXIS_tlast_sig_i_9__0_1;
  wire crcAXIS_tlast_sig_i_9__0_n_0;
  wire crcAXIS_tlast_sig_reg;
  wire crcAXIS_tlast_sig_reg_0;
  wire crcAXIS_tlast_sig_reg_1;
  wire crcAXIS_tlast_sig_reg_2;
  wire crcAXIS_tlast_sig_reg_3;
  wire [0:0]crcAXIS_tlast_sig_reg_4;
  wire crcAXIS_tlast_sig_reg_5;
  wire crcAXIS_tlast_sig_reg_6;
  wire crc_imd013_out;
  wire crc_imd015_out;
  wire crc_imd017_out;
  wire crc_imd019_out;
  wire crc_imd020_out;
  wire crc_imd032_out;
  wire crc_imd033_out;
  wire crc_imd059_out;
  wire crc_imd060_out;
  wire \crc_imd[0]_i_10__0_n_0 ;
  wire \crc_imd[0]_i_7__0_n_0 ;
  wire \crc_imd[15]_i_17__0_n_0 ;
  wire \crc_imd[15]_i_18__0_n_0 ;
  wire \crc_imd[15]_i_19__0_n_0 ;
  wire \crc_imd[15]_i_26__0_n_0 ;
  wire \crc_imd[15]_i_27__0_n_0 ;
  wire \crc_imd[1]_i_11__0_n_0 ;
  wire \crc_imd[2]_i_3__0_0 ;
  wire \crc_imd[2]_i_3__0_n_0 ;
  wire \crc_imd[2]_i_5__0_n_0 ;
  wire \crc_imd[3]_i_4__0_n_0 ;
  wire \crc_imd[3]_i_6__0_n_0 ;
  wire \crc_imd[3]_i_7__0_n_0 ;
  wire \crc_imd[4]_i_3__0_n_0 ;
  wire \crc_imd[4]_i_4__0_n_0 ;
  wire \crc_imd[5]_i_3__0_n_0 ;
  wire \crc_imd[5]_i_4__0_n_0 ;
  wire \crc_imd[6]_i_3__0_0 ;
  wire \crc_imd[6]_i_3__0_n_0 ;
  wire \crc_imd[6]_i_4__0_n_0 ;
  wire \crc_imd[9]_i_4__0_n_0 ;
  wire \crc_imd[9]_i_7__0_n_0 ;
  wire \crc_imd_reg[0] ;
  wire \crc_imd_reg[0]_0 ;
  wire [1:0]\crc_imd_reg[10] ;
  wire \crc_imd_reg[11] ;
  wire \crc_imd_reg[13] ;
  wire \crc_imd_reg[14] ;
  wire [7:0]\crc_imd_reg[15] ;
  wire \crc_imd_reg[15]_0 ;
  wire \crc_imd_reg[15]_1 ;
  wire [5:0]\crc_imd_reg[1] ;
  wire \crc_imd_reg[2] ;
  wire \crc_imd_reg[2]_0 ;
  wire \crc_imd_reg[2]_1 ;
  wire \crc_imd_reg[2]_2 ;
  wire \crc_imd_reg[2]_3 ;
  wire \crc_imd_reg[4] ;
  wire \crc_imd_reg[6] ;
  wire [7:0]\crc_imd_reg[7] ;
  wire \crc_imd_reg[8] ;
  wire \crc_imd_reg[8]_0 ;
  wire \crc_imd_reg[9] ;
  wire \crc_imd_reg[9]_0 ;
  wire [15:0]i;
  wire \i[0]_i_1__14_n_0 ;
  wire \i[10]_i_1__3_n_0 ;
  wire \i[11]_i_1__2_n_0 ;
  wire \i[12]_i_1__2_n_0 ;
  wire \i[12]_i_2__0_n_0 ;
  wire \i[13]_i_1__2_n_0 ;
  wire \i[13]_i_2__2_n_0 ;
  wire \i[14]_i_1__0_n_0 ;
  wire \i[15]_i_1__0_n_0 ;
  wire \i[15]_i_2__0_n_0 ;
  wire \i[15]_i_3__0_n_0 ;
  wire \i[15]_i_4__0_n_0 ;
  wire \i[15]_i_5__0_n_0 ;
  wire \i[1]_i_1__13_n_0 ;
  wire \i[2]_i_1__9_n_0 ;
  wire \i[3]_i_1__9_n_0 ;
  wire \i[4]_i_1__9_n_0 ;
  wire \i[5]_i_1__8_n_0 ;
  wire \i[5]_i_2__5_n_0 ;
  wire \i[6]_i_1__7_n_0 ;
  wire \i[7]_i_1__7_n_0 ;
  wire \i[8]_i_1__6_n_0 ;
  wire \i[9]_i_1__4_n_0 ;
  wire \i[9]_i_2__4_n_0 ;
  wire [1:0]ixBlkWrite;
  wire [0:0]\ixRetbufCrc_reg[1] ;
  wire [0:0]\ixRetbufCrc_reg[2] ;
  wire [0:0]\ixRetbufCrc_reg[2]_0 ;
  wire [0:0]\ixRetbufCrc_reg[2]_1 ;
  wire [0:0]\ixRetbufCrc_reg[2]_2 ;
  wire [0:0]\ixRetbufCrc_reg[2]_3 ;
  wire [0:0]\ixRetbufCrc_reg[5] ;
  wire [0:0]\ixRetbufCrc_reg[5]_0 ;
  wire [0:0]\ixRetbufCrc_reg[5]_1 ;
  wire \lastAXIS_tkeep_reg[3] ;
  wire \lastAXIS_tkeep_reg[3]_0 ;
  wire \lastAXIS_tkeep_reg[3]_1 ;
  wire [1:1]len;
  wire lenRet1;
  wire [7:0]\len_reg[15] ;
  wire [7:0]\len_reg[7] ;
  wire \myCrc/crc_imd031_out ;
  wire \myCrc/crc_imd034_out ;
  wire \myCrc/crc_imd035_out ;
  wire \myCrc/crc_imd058_out ;
  wire \myCrc/crc_imd061_out ;
  wire \myCrc/crc_imd062_out ;
  wire [7:0]\opbuf_reg[0][7] ;
  wire \opbuf_reg[1][0] ;
  wire \opbuf_reg[1][0]_0 ;
  wire [7:0]\opbuf_reg[1][7] ;
  wire [7:0]\opbuf_reg[2][7] ;
  wire [15:0]\opbuf_reg[5][7] ;
  wire \opbuf_reg[6][0] ;
  wire \opbuf_reg[6][0]_0 ;
  wire [24:0]out;
  wire [1:0]p_0_in;
  wire [0:0]p_10_out;
  wire p_1_in0;
  wire p_24_in;
  wire [7:0]\pollbuf_reg[0][7] ;
  wire [7:0]\pollbuf_reg[1][7] ;
  wire [15:0]\pollbuf_reg[4][7] ;
  wire \recvAXIL_rdata[31]_i_1_n_0 ;
  wire \recvAXIL_rdata[31]_i_2_n_0 ;
  wire \recvAXIL_rdata_reg_n_0_[31] ;
  wire [8:0]recvAXIS_tdata;
  wire \recvAXIS_tdata_sig[0]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[10]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[11]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[12]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[13]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[14]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[15]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[16]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[17]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[18]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[19]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[1]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[20]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[21]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[22]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[23]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[24]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[25]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[26]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[27]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[28]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[29]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[2]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[30]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[31]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[31]_i_2_n_0 ;
  wire \recvAXIS_tdata_sig[3]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[4]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[5]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[6]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[7]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[8]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig[9]_i_1__0_n_0 ;
  wire \recvAXIS_tdata_sig_reg[12]_0 ;
  wire \recvAXIS_tdata_sig_reg[13]_0 ;
  wire \recvAXIS_tdata_sig_reg[13]_1 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[15]_0 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[15]_1 ;
  wire \recvAXIS_tdata_sig_reg[21]_0 ;
  wire \recvAXIS_tdata_sig_reg[21]_1 ;
  wire \recvAXIS_tdata_sig_reg[23]_0 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[23]_1 ;
  wire [7:0]\recvAXIS_tdata_sig_reg[23]_2 ;
  wire \recvAXIS_tdata_sig_reg[2]_0 ;
  wire \recvAXIS_tdata_sig_reg[5]_0 ;
  wire \recvAXIS_tdata_sig_reg[7]_0 ;
  wire recvAXIS_tlast;
  wire recvAXIS_tlast_sig0;
  wire recvAXIS_tlast_sig_i_10__0_n_0;
  wire recvAXIS_tlast_sig_i_11__0_n_0;
  wire recvAXIS_tlast_sig_i_12__0_n_0;
  wire recvAXIS_tlast_sig_i_13__0_n_0;
  wire recvAXIS_tlast_sig_i_14__0_n_0;
  wire recvAXIS_tlast_sig_i_1__0_n_0;
  wire recvAXIS_tlast_sig_i_4__0_n_0;
  wire recvAXIS_tlast_sig_i_5__0_n_0;
  wire recvAXIS_tlast_sig_i_6__0_n_0;
  wire recvAXIS_tlast_sig_i_7__0_n_0;
  wire recvAXIS_tlast_sig_i_8__0_n_0;
  wire recvAXIS_tlast_sig_i_9__0_n_0;
  wire recvAXIS_tlast_sig_reg_0;
  wire recvAXIS_tlast_sig_reg_i_2__0_n_6;
  wire recvAXIS_tlast_sig_reg_i_2__0_n_7;
  wire [2:0]recvAXIS_tlast_sig_reg_i_3__0_0;
  wire recvAXIS_tlast_sig_reg_i_3__0_n_0;
  wire recvAXIS_tlast_sig_reg_i_3__0_n_1;
  wire recvAXIS_tlast_sig_reg_i_3__0_n_2;
  wire recvAXIS_tlast_sig_reg_i_3__0_n_3;
  wire recvAXIS_tlast_sig_reg_i_3__0_n_4;
  wire recvAXIS_tlast_sig_reg_i_3__0_n_5;
  wire recvAXIS_tlast_sig_reg_i_3__0_n_6;
  wire recvAXIS_tlast_sig_reg_i_3__0_n_7;
  wire recvAXIS_tready;
  wire recvStrbToStart_i_1__0_n_0;
  wire recvStrbToStart_i_2__0_n_0;
  wire recvStrbToStart_reg_n_0;
  wire recvStrbToStop_i_1__0_n_0;
  wire recvStrbToStop_i_2__0_n_0;
  wire recvStrbToStop_i_3__0_n_0;
  wire recvStrbToStop_reg_n_0;
  wire req;
  wire [0:0]\resid_reg[0] ;
  wire [3:0]\resid_reg[0]_0 ;
  wire [0:0]\resid_reg[0]_1 ;
  wire [0:0]\resid_reg[0]_2 ;
  wire [0:0]\resid_reg[0]_3 ;
  wire \retbuf_reg[14][4] ;
  wire \retbuf_reg[14][4]_0 ;
  wire \retbuf_reg[1][0] ;
  wire \retbuf_reg[1][2] ;
  wire \retbuf_reg[1][4] ;
  wire \retbuf_reg[1][5] ;
  wire \retbuf_reg[1][6] ;
  wire [15:0]\retbuf_reg[1][7] ;
  wire \retbuf_reg[1][7]_0 ;
  wire \retbuf_reg[2][7] ;
  wire [2:0]\retbuf_reg[36][7] ;
  wire \retbuf_reg[36][7]_0 ;
  wire \retbuf_reg[39][0] ;
  wire \retbuf_reg[4][4] ;
  wire \retbuf_reg[4][5] ;
  wire \retbuf_reg[4][6] ;
  wire \retbuf_reg[4][7] ;
  wire \retbuf_reg[5][5] ;
  wire \retbuf_reg[5][5]_0 ;
  wire \retbuf_reg[5][5]_1 ;
  wire [7:0]\retbuf_reg[5][7] ;
  wire \retbuf_reg[5][7]_0 ;
  wire [1:0]rpuAXIL_araddr;
  wire rpuAXIL_arvalid;
  wire [1:0]rpuAXIL_awaddr;
  wire rpuAXIL_awvalid;
  wire rpuAXIL_bready;
  wire [31:0]rpuAXIL_rdata;
  wire \rpuAXIL_rdata[31]_INST_0_i_1_n_0 ;
  wire rpuAXIL_rready;
  wire rpuAXIL_rvalid;
  wire [31:0]rpuAXIL_wdata;
  wire [3:0]rpuAXIL_wstrb;
  wire rpuAXIL_wvalid;
  wire [31:1]rxAXIS_tdata;
  wire rxAXIS_tvalid;
  wire [0:0]rxlen;
  wire \rxlen[1]_i_2_n_0 ;
  wire \rxlen[1]_i_4_n_0 ;
  wire \rxlen[1]_i_5_n_0 ;
  wire \rxlen_reg[1] ;
  wire \rxlen_reg[1]_0 ;
  wire [7:0]\scoreMin_reg[7] ;
  wire [31:0]sendAXIL_rdata;
  wire \sendAXIL_rdata[0]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[10]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[11]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[12]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[13]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[14]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[15]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[16]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[17]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[18]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[19]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[1]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[20]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[21]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[22]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[23]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[24]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[25]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[26]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[27]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[28]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[29]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[2]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[30]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[31]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[31]_i_2_n_0 ;
  wire \sendAXIL_rdata[31]_i_3_n_0 ;
  wire \sendAXIL_rdata[31]_i_4_n_0 ;
  wire \sendAXIL_rdata[31]_i_5_n_0 ;
  wire \sendAXIL_rdata[3]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[4]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[5]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[6]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[7]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[8]_i_1__0_n_0 ;
  wire \sendAXIL_rdata[9]_i_1__0_n_0 ;
  wire [0:0]\sendAXIL_rdata_reg[0]_0 ;
  wire [31:0]\sendAXIL_rdata_reg[31]_0 ;
  wire sendStrbToStart0;
  wire sendStrbToStart_i_10__0_n_0;
  wire sendStrbToStart_i_11__0_n_0;
  wire sendStrbToStart_i_12__0_n_0;
  wire sendStrbToStart_i_13__0_n_0;
  wire sendStrbToStart_i_1__0_n_0;
  wire sendStrbToStart_i_2__0_n_0;
  wire sendStrbToStart_i_3__0_n_0;
  wire sendStrbToStart_i_4__0_n_0;
  wire sendStrbToStart_i_5__0_n_0;
  wire sendStrbToStart_i_6__0_n_0;
  wire sendStrbToStart_i_7__0_n_0;
  wire sendStrbToStart_i_8__0_n_0;
  wire sendStrbToStart_i_9__0_n_0;
  wire sendStrbToStart_reg_n_0;
  wire sendStrbToStop_i_1__0_n_0;
  wire sendStrbToStop_i_2__0_n_0;
  wire sendStrbToStop_i_3__0_n_0;
  wire sendStrbToStop_i_4__0_n_0;
  wire sendStrbToStop_i_5__0_n_0;
  wire sendStrbToStop_reg_n_0;
  wire \stateOp[0]_i_2__0_n_0 ;
  wire \stateOp[0]_i_3_n_0 ;
  wire \stateOp[0]_i_6__0_n_0 ;
  wire \stateOp[0]_i_8__0_n_0 ;
  wire \stateOp[1]_i_10__0_n_0 ;
  wire \stateOp[1]_i_2__5_n_0 ;
  wire \stateOp[1]_i_9__1_n_0 ;
  wire \stateOp[2]_i_3__2_n_0 ;
  wire \stateOp[2]_i_5__2_n_0 ;
  wire \stateOp[3]_i_2__0_n_0 ;
  wire \stateOp[3]_i_8_n_0 ;
  wire \stateOp[4]_i_19_n_0 ;
  wire \stateOp[4]_i_7__0_n_0 ;
  wire \stateOp_next_reg[0] ;
  wire \stateOp_next_reg[1] ;
  wire [0:0]\stateOp_next_reg[2] ;
  wire \stateOp_next_reg[2]_0 ;
  wire \stateOp_next_reg[4] ;
  wire stateOp_reg;
  wire \stateOp_reg[0] ;
  wire [3:0]\stateOp_reg[0]_0 ;
  wire [0:0]\stateOp_reg[0]_1 ;
  wire [1:0]\stateOp_reg[0]_10 ;
  wire [1:0]\stateOp_reg[0]_11 ;
  wire \stateOp_reg[0]_12 ;
  wire \stateOp_reg[0]_13 ;
  wire \stateOp_reg[0]_2 ;
  wire \stateOp_reg[0]_3 ;
  wire \stateOp_reg[0]_4 ;
  wire \stateOp_reg[0]_5 ;
  wire \stateOp_reg[0]_6 ;
  wire \stateOp_reg[0]_7 ;
  wire \stateOp_reg[0]_8 ;
  wire \stateOp_reg[0]_9 ;
  wire \stateOp_reg[1] ;
  wire [4:0]\stateOp_reg[1]_0 ;
  wire [0:0]\stateOp_reg[1]_1 ;
  wire [4:0]\stateOp_reg[1]_2 ;
  wire [29:0]\stateOp_reg[1]_3 ;
  wire [0:0]\stateOp_reg[1]_4 ;
  wire \stateOp_reg[1]_5 ;
  wire \stateOp_reg[1]_6 ;
  wire \stateOp_reg[1]_7 ;
  wire [2:0]\stateOp_reg[2] ;
  wire [0:0]\stateOp_reg[2]_0 ;
  wire \stateOp_reg[2]_1 ;
  wire [0:0]\stateOp_reg[2]_2 ;
  wire \stateOp_reg[2]_3 ;
  wire \stateOp_reg[2]_4 ;
  wire [0:0]\stateOp_reg[3] ;
  wire [0:0]\stateOp_reg[3]_0 ;
  wire [0:0]\stateOp_reg[3]_1 ;
  wire [0:0]\stateOp_reg[3]_2 ;
  wire \stateOp_reg[3]_3 ;
  wire \stateOp_reg[3]_4 ;
  wire \stateOp_reg[3]_5 ;
  wire \stateOp_reg[3]_6 ;
  wire [0:0]\stateOp_reg[4] ;
  wire [0:0]\stateOp_reg[4]_0 ;
  wire \stateOp_reg[4]_1 ;
  wire \stateOp_reg[4]_2 ;
  wire stateOp_reg_0;
  wire stateOp_reg_1;
  wire stateOp_reg_2;
  wire stateOp_reg_3;
  wire stateOp_reg_4;
  wire [2:0]stateRecv;
  wire \stateRecv[0]_i_1__0_n_0 ;
  wire \stateRecv[1]_i_1__0_n_0 ;
  wire \stateRecv[2]_i_10__0_n_0 ;
  wire \stateRecv[2]_i_1__0_n_0 ;
  wire \stateRecv[2]_i_2__0_n_0 ;
  wire \stateRecv[2]_i_4__0_n_0 ;
  wire \stateRecv[2]_i_5__0_n_0 ;
  wire \stateRecv[2]_i_6_n_0 ;
  wire \stateRecv[2]_i_7__0_n_0 ;
  wire \stateRecv[2]_i_9_n_0 ;
  wire [2:0]stateSend;
  wire \stateSend[0]_i_1__0_n_0 ;
  wire \stateSend[1]_i_1__0_n_0 ;
  wire \stateSend[2]_i_10__0_n_0 ;
  wire \stateSend[2]_i_11__0_n_0 ;
  wire \stateSend[2]_i_13__0_n_0 ;
  wire \stateSend[2]_i_14__0_n_0 ;
  wire \stateSend[2]_i_15__0_n_0 ;
  wire \stateSend[2]_i_16__0_n_0 ;
  wire \stateSend[2]_i_17__0_n_0 ;
  wire \stateSend[2]_i_18__0_n_0 ;
  wire \stateSend[2]_i_19__0_n_0 ;
  wire \stateSend[2]_i_1__0_n_0 ;
  wire \stateSend[2]_i_20__0_n_0 ;
  wire \stateSend[2]_i_21__0_n_0 ;
  wire \stateSend[2]_i_22__0_n_0 ;
  wire \stateSend[2]_i_23__0_n_0 ;
  wire \stateSend[2]_i_24__0_n_0 ;
  wire \stateSend[2]_i_25__0_n_0 ;
  wire \stateSend[2]_i_26__0_n_0 ;
  wire \stateSend[2]_i_27__0_n_0 ;
  wire \stateSend[2]_i_28__0_n_0 ;
  wire \stateSend[2]_i_29__0_n_0 ;
  wire \stateSend[2]_i_2__0_n_0 ;
  wire \stateSend[2]_i_30__0_n_0 ;
  wire \stateSend[2]_i_31__0_n_0 ;
  wire \stateSend[2]_i_3__0_n_0 ;
  wire \stateSend[2]_i_4__0_n_0 ;
  wire \stateSend[2]_i_5__0_n_0 ;
  wire \stateSend[2]_i_6__0_n_0 ;
  wire \stateSend[2]_i_7__0_n_0 ;
  wire \stateSend[2]_i_9__0_n_0 ;
  wire \stateSend_reg[0]_0 ;
  wire \stateSend_reg[2]_i_12__0_n_0 ;
  wire \stateSend_reg[2]_i_12__0_n_1 ;
  wire \stateSend_reg[2]_i_12__0_n_2 ;
  wire \stateSend_reg[2]_i_12__0_n_3 ;
  wire \stateSend_reg[2]_i_12__0_n_4 ;
  wire \stateSend_reg[2]_i_12__0_n_5 ;
  wire \stateSend_reg[2]_i_12__0_n_6 ;
  wire \stateSend_reg[2]_i_12__0_n_7 ;
  wire \stateSend_reg[2]_i_8__0_n_6 ;
  wire \stateSend_reg[2]_i_8__0_n_7 ;
  wire [1:0]stateTo;
  wire \stateTo[0]_i_1__0_n_0 ;
  wire \stateTo[1]_i_1__0_n_0 ;
  wire \stateTo[1]_i_2__0_n_0 ;
  wire \stateTo[1]_i_4__0_n_0 ;
  wire \stateTo[1]_i_5__0_n_0 ;
  wire \stateTo[1]_i_6__0_n_0 ;
  wire strbRead;
  wire [7:0]\tixVBuffer_reg[7] ;
  wire [7:0]\tixVBufxfop_reg[7] ;
  wire [1:0]\tixVCommand_reg[1] ;
  wire [1:0]\tixVCommand_reg[1]_0 ;
  wire [7:0]\tixVCommand_reg[7] ;
  wire [2:0]\tixVController_reg[0] ;
  wire \tixVController_reg[0]_0 ;
  wire \tixVController_reg[1] ;
  wire [7:0]\tixVController_reg[7] ;
  wire [7:0]\tixVController_reg[7]_0 ;
  wire [7:0]\tkst_reg[31] ;
  wire [7:0]\tkst_reg[7] ;
  wire \txAXIS_tdata[7]_i_3__0_n_0 ;
  wire \txAXIS_tdata_reg[0] ;
  wire \txAXIS_tdata_reg[0]_0 ;
  wire \txAXIS_tdata_reg[0]_1 ;
  wire \txAXIS_tdata_reg[0]_2 ;
  wire \txAXIS_tdata_reg[10] ;
  wire \txAXIS_tdata_reg[10]_0 ;
  wire \txAXIS_tdata_reg[10]_1 ;
  wire \txAXIS_tdata_reg[11] ;
  wire \txAXIS_tdata_reg[11]_0 ;
  wire \txAXIS_tdata_reg[11]_1 ;
  wire \txAXIS_tdata_reg[11]_2 ;
  wire \txAXIS_tdata_reg[11]_3 ;
  wire \txAXIS_tdata_reg[12] ;
  wire \txAXIS_tdata_reg[12]_0 ;
  wire \txAXIS_tdata_reg[12]_1 ;
  wire \txAXIS_tdata_reg[13] ;
  wire \txAXIS_tdata_reg[13]_0 ;
  wire \txAXIS_tdata_reg[13]_1 ;
  wire \txAXIS_tdata_reg[14] ;
  wire \txAXIS_tdata_reg[14]_0 ;
  wire \txAXIS_tdata_reg[14]_1 ;
  wire \txAXIS_tdata_reg[14]_2 ;
  wire \txAXIS_tdata_reg[14]_3 ;
  wire [1:0]\txAXIS_tdata_reg[15] ;
  wire \txAXIS_tdata_reg[15]_0 ;
  wire \txAXIS_tdata_reg[15]_1 ;
  wire \txAXIS_tdata_reg[15]_2 ;
  wire \txAXIS_tdata_reg[15]_3 ;
  wire \txAXIS_tdata_reg[17] ;
  wire \txAXIS_tdata_reg[17]_0 ;
  wire \txAXIS_tdata_reg[17]_1 ;
  wire \txAXIS_tdata_reg[17]_2 ;
  wire \txAXIS_tdata_reg[17]_3 ;
  wire \txAXIS_tdata_reg[19] ;
  wire \txAXIS_tdata_reg[19]_0 ;
  wire \txAXIS_tdata_reg[19]_1 ;
  wire \txAXIS_tdata_reg[19]_2 ;
  wire \txAXIS_tdata_reg[1] ;
  wire \txAXIS_tdata_reg[1]_0 ;
  wire \txAXIS_tdata_reg[1]_1 ;
  wire \txAXIS_tdata_reg[1]_2 ;
  wire \txAXIS_tdata_reg[20] ;
  wire \txAXIS_tdata_reg[20]_0 ;
  wire \txAXIS_tdata_reg[20]_1 ;
  wire \txAXIS_tdata_reg[20]_2 ;
  wire \txAXIS_tdata_reg[21] ;
  wire \txAXIS_tdata_reg[21]_0 ;
  wire \txAXIS_tdata_reg[21]_1 ;
  wire \txAXIS_tdata_reg[22] ;
  wire \txAXIS_tdata_reg[22]_0 ;
  wire \txAXIS_tdata_reg[22]_1 ;
  wire \txAXIS_tdata_reg[23] ;
  wire \txAXIS_tdata_reg[23]_0 ;
  wire \txAXIS_tdata_reg[23]_1 ;
  wire \txAXIS_tdata_reg[24] ;
  wire \txAXIS_tdata_reg[24]_0 ;
  wire \txAXIS_tdata_reg[24]_1 ;
  wire \txAXIS_tdata_reg[25] ;
  wire \txAXIS_tdata_reg[25]_0 ;
  wire \txAXIS_tdata_reg[26] ;
  wire \txAXIS_tdata_reg[26]_0 ;
  wire \txAXIS_tdata_reg[26]_1 ;
  wire \txAXIS_tdata_reg[26]_2 ;
  wire \txAXIS_tdata_reg[27] ;
  wire \txAXIS_tdata_reg[27]_0 ;
  wire \txAXIS_tdata_reg[27]_1 ;
  wire \txAXIS_tdata_reg[28] ;
  wire \txAXIS_tdata_reg[28]_0 ;
  wire \txAXIS_tdata_reg[28]_1 ;
  wire \txAXIS_tdata_reg[29] ;
  wire \txAXIS_tdata_reg[29]_0 ;
  wire \txAXIS_tdata_reg[2] ;
  wire \txAXIS_tdata_reg[2]_0 ;
  wire [11:0]\txAXIS_tdata_reg[30] ;
  wire \txAXIS_tdata_reg[30]_0 ;
  wire \txAXIS_tdata_reg[30]_1 ;
  wire \txAXIS_tdata_reg[30]_2 ;
  wire \txAXIS_tdata_reg[31] ;
  wire \txAXIS_tdata_reg[31]_0 ;
  wire \txAXIS_tdata_reg[31]_1 ;
  wire \txAXIS_tdata_reg[31]_2 ;
  wire \txAXIS_tdata_reg[3] ;
  wire \txAXIS_tdata_reg[3]_0 ;
  wire \txAXIS_tdata_reg[3]_1 ;
  wire \txAXIS_tdata_reg[4] ;
  wire \txAXIS_tdata_reg[4]_0 ;
  wire \txAXIS_tdata_reg[5] ;
  wire \txAXIS_tdata_reg[5]_0 ;
  wire \txAXIS_tdata_reg[5]_1 ;
  wire \txAXIS_tdata_reg[6] ;
  wire \txAXIS_tdata_reg[6]_0 ;
  wire \txAXIS_tdata_reg[7] ;
  wire \txAXIS_tdata_reg[7]_0 ;
  wire \txAXIS_tdata_reg[7]_1 ;
  wire \txAXIS_tdata_reg[7]_2 ;
  wire \txAXIS_tdata_reg[7]_3 ;
  wire \txAXIS_tdata_reg[7]_4 ;
  wire \txAXIS_tdata_reg[8] ;
  wire \txAXIS_tdata_reg[8]_0 ;
  wire \txAXIS_tdata_reg[8]_1 ;
  wire \txAXIS_tdata_reg[9] ;
  wire \txAXIS_tdata_reg[9]_0 ;
  wire \txAXIS_tdata_reg[9]_1 ;
  wire txAXIS_tready;
  wire [29:0]txlast1;
  wire \txlen_reg[0] ;
  wire wdone_i_1__1_n_0;
  wire wdone_reg_n_0;
  wire wordcnt0;
  wire \wordcntCrcLast[15]_i_2_n_0 ;
  wire \wordcntCrcLast[15]_i_3_n_0 ;
  wire \wordcntCrcLast[15]_i_4_n_0 ;
  wire \wordcntCrcLast[15]_i_5_n_0 ;
  wire \wordcntCrcLast[15]_i_6_n_0 ;
  wire \wordcntCrcLast[15]_i_7_n_0 ;
  wire \wordcntCrcLast[15]_i_8_n_0 ;
  wire \wordcntCrcLast[15]_i_9_n_0 ;
  wire \wordcntCrcLast[23]_i_2_n_0 ;
  wire \wordcntCrcLast[23]_i_3_n_0 ;
  wire \wordcntCrcLast[23]_i_4_n_0 ;
  wire \wordcntCrcLast[23]_i_5_n_0 ;
  wire \wordcntCrcLast[23]_i_6_n_0 ;
  wire \wordcntCrcLast[23]_i_7_n_0 ;
  wire \wordcntCrcLast[23]_i_8_n_0 ;
  wire \wordcntCrcLast[23]_i_9_n_0 ;
  wire \wordcntCrcLast[24]_i_2__0_n_0 ;
  wire \wordcntCrcLast[7]_i_10_n_0 ;
  wire \wordcntCrcLast[7]_i_11_n_0 ;
  wire \wordcntCrcLast[7]_i_12_n_0 ;
  wire \wordcntCrcLast[7]_i_2_n_0 ;
  wire \wordcntCrcLast[7]_i_3_n_0 ;
  wire \wordcntCrcLast[7]_i_4_n_0 ;
  wire \wordcntCrcLast[7]_i_5_n_0 ;
  wire \wordcntCrcLast[7]_i_6_n_0 ;
  wire \wordcntCrcLast[7]_i_7_n_0 ;
  wire \wordcntCrcLast[7]_i_8_n_0 ;
  wire \wordcntCrcLast[7]_i_9_n_0 ;
  wire \wordcntCrcLast_reg[15]_i_1_n_0 ;
  wire \wordcntCrcLast_reg[15]_i_1_n_1 ;
  wire \wordcntCrcLast_reg[15]_i_1_n_2 ;
  wire \wordcntCrcLast_reg[15]_i_1_n_3 ;
  wire \wordcntCrcLast_reg[15]_i_1_n_4 ;
  wire \wordcntCrcLast_reg[15]_i_1_n_5 ;
  wire \wordcntCrcLast_reg[15]_i_1_n_6 ;
  wire \wordcntCrcLast_reg[15]_i_1_n_7 ;
  wire \wordcntCrcLast_reg[23]_i_1_n_0 ;
  wire \wordcntCrcLast_reg[23]_i_1_n_1 ;
  wire \wordcntCrcLast_reg[23]_i_1_n_2 ;
  wire \wordcntCrcLast_reg[23]_i_1_n_3 ;
  wire \wordcntCrcLast_reg[23]_i_1_n_4 ;
  wire \wordcntCrcLast_reg[23]_i_1_n_5 ;
  wire \wordcntCrcLast_reg[23]_i_1_n_6 ;
  wire \wordcntCrcLast_reg[23]_i_1_n_7 ;
  wire \wordcntCrcLast_reg[7]_i_1_n_0 ;
  wire \wordcntCrcLast_reg[7]_i_1_n_1 ;
  wire \wordcntCrcLast_reg[7]_i_1_n_2 ;
  wire \wordcntCrcLast_reg[7]_i_1_n_3 ;
  wire \wordcntCrcLast_reg[7]_i_1_n_4 ;
  wire \wordcntCrcLast_reg[7]_i_1_n_5 ;
  wire \wordcntCrcLast_reg[7]_i_1_n_6 ;
  wire \wordcntCrcLast_reg[7]_i_1_n_7 ;
  wire \wordcntLast_reg[1] ;
  wire \wordcnt[0]__0_i_1__0_n_0 ;
  wire \wordcnt[0]__0_i_4__0_n_0 ;
  wire \wordcnt[0]__0_i_5__0_n_0 ;
  wire \wordcnt[0]_i_1__0_n_0 ;
  wire \wordcnt[0]_i_2__0_n_0 ;
  wire \wordcnt[0]_i_4__0_n_0 ;
  wire \wordcnt[0]_i_6__0_n_0 ;
  wire \wordcnt[30]_i_3__0_n_0 ;
  wire \wordcnt[30]_i_5__0_n_0 ;
  wire \wordcnt[30]_i_8__0_n_0 ;
  wire [30:0]wordcnt_reg;
  wire [0:0]\wordcnt_reg[0]_0 ;
  wire \wordcnt_reg[0]_1 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_0 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_1 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_10 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_11 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_12 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_13 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_14 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_15 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_2 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_3 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_4 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_5 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_6 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_7 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_8 ;
  wire \wordcnt_reg[0]__0_i_3__0_n_9 ;
  wire \wordcnt_reg[0]__0_n_0 ;
  wire \wordcnt_reg[0]_i_3__0_n_0 ;
  wire \wordcnt_reg[0]_i_3__0_n_1 ;
  wire \wordcnt_reg[0]_i_3__0_n_10 ;
  wire \wordcnt_reg[0]_i_3__0_n_11 ;
  wire \wordcnt_reg[0]_i_3__0_n_12 ;
  wire \wordcnt_reg[0]_i_3__0_n_13 ;
  wire \wordcnt_reg[0]_i_3__0_n_14 ;
  wire \wordcnt_reg[0]_i_3__0_n_15 ;
  wire \wordcnt_reg[0]_i_3__0_n_2 ;
  wire \wordcnt_reg[0]_i_3__0_n_3 ;
  wire \wordcnt_reg[0]_i_3__0_n_4 ;
  wire \wordcnt_reg[0]_i_3__0_n_5 ;
  wire \wordcnt_reg[0]_i_3__0_n_6 ;
  wire \wordcnt_reg[0]_i_3__0_n_7 ;
  wire \wordcnt_reg[0]_i_3__0_n_8 ;
  wire \wordcnt_reg[0]_i_3__0_n_9 ;
  wire \wordcnt_reg[10]__0_n_0 ;
  wire \wordcnt_reg[11]__0_n_0 ;
  wire \wordcnt_reg[12]__0_n_0 ;
  wire \wordcnt_reg[13]__0_n_0 ;
  wire \wordcnt_reg[14]__0_n_0 ;
  wire \wordcnt_reg[15]__0_n_0 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_0 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_1 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_10 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_11 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_12 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_13 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_14 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_15 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_2 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_3 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_4 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_5 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_6 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_7 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_8 ;
  wire \wordcnt_reg[16]__0_i_1__0_n_9 ;
  wire \wordcnt_reg[16]__0_n_0 ;
  wire \wordcnt_reg[16]_i_1__0_n_0 ;
  wire \wordcnt_reg[16]_i_1__0_n_1 ;
  wire \wordcnt_reg[16]_i_1__0_n_10 ;
  wire \wordcnt_reg[16]_i_1__0_n_11 ;
  wire \wordcnt_reg[16]_i_1__0_n_12 ;
  wire \wordcnt_reg[16]_i_1__0_n_13 ;
  wire \wordcnt_reg[16]_i_1__0_n_14 ;
  wire \wordcnt_reg[16]_i_1__0_n_15 ;
  wire \wordcnt_reg[16]_i_1__0_n_2 ;
  wire \wordcnt_reg[16]_i_1__0_n_3 ;
  wire \wordcnt_reg[16]_i_1__0_n_4 ;
  wire \wordcnt_reg[16]_i_1__0_n_5 ;
  wire \wordcnt_reg[16]_i_1__0_n_6 ;
  wire \wordcnt_reg[16]_i_1__0_n_7 ;
  wire \wordcnt_reg[16]_i_1__0_n_8 ;
  wire \wordcnt_reg[16]_i_1__0_n_9 ;
  wire \wordcnt_reg[17]__0_n_0 ;
  wire \wordcnt_reg[18]__0_n_0 ;
  wire \wordcnt_reg[19]__0_n_0 ;
  wire \wordcnt_reg[1]__0_n_0 ;
  wire \wordcnt_reg[20]__0_n_0 ;
  wire \wordcnt_reg[21]__0_n_0 ;
  wire \wordcnt_reg[22]__0_n_0 ;
  wire \wordcnt_reg[23]__0_n_0 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_10 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_11 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_12 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_13 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_14 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_15 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_2 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_3 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_4 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_5 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_6 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_7 ;
  wire \wordcnt_reg[24]__0_i_1__0_n_9 ;
  wire \wordcnt_reg[24]__0_n_0 ;
  wire \wordcnt_reg[24]_i_1__0_n_10 ;
  wire \wordcnt_reg[24]_i_1__0_n_11 ;
  wire \wordcnt_reg[24]_i_1__0_n_12 ;
  wire \wordcnt_reg[24]_i_1__0_n_13 ;
  wire \wordcnt_reg[24]_i_1__0_n_14 ;
  wire \wordcnt_reg[24]_i_1__0_n_15 ;
  wire \wordcnt_reg[24]_i_1__0_n_2 ;
  wire \wordcnt_reg[24]_i_1__0_n_3 ;
  wire \wordcnt_reg[24]_i_1__0_n_4 ;
  wire \wordcnt_reg[24]_i_1__0_n_5 ;
  wire \wordcnt_reg[24]_i_1__0_n_6 ;
  wire \wordcnt_reg[24]_i_1__0_n_7 ;
  wire \wordcnt_reg[24]_i_1__0_n_9 ;
  wire \wordcnt_reg[25]__0_n_0 ;
  wire \wordcnt_reg[26]__0_n_0 ;
  wire \wordcnt_reg[27]__0_n_0 ;
  wire \wordcnt_reg[28]__0_n_0 ;
  wire \wordcnt_reg[29]__0_n_0 ;
  wire \wordcnt_reg[2]__0_n_0 ;
  wire [30:0]\wordcnt_reg[30]_0 ;
  wire \wordcnt_reg[30]__0_n_0 ;
  wire \wordcnt_reg[3]__0_n_0 ;
  wire \wordcnt_reg[4]__0_n_0 ;
  wire \wordcnt_reg[5]__0_n_0 ;
  wire \wordcnt_reg[6]__0_n_0 ;
  wire \wordcnt_reg[7]__0_n_0 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_0 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_1 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_10 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_11 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_12 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_13 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_14 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_15 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_2 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_3 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_4 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_5 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_6 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_7 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_8 ;
  wire \wordcnt_reg[8]__0_i_1__0_n_9 ;
  wire \wordcnt_reg[8]__0_n_0 ;
  wire \wordcnt_reg[8]_i_1__0_n_0 ;
  wire \wordcnt_reg[8]_i_1__0_n_1 ;
  wire \wordcnt_reg[8]_i_1__0_n_10 ;
  wire \wordcnt_reg[8]_i_1__0_n_11 ;
  wire \wordcnt_reg[8]_i_1__0_n_12 ;
  wire \wordcnt_reg[8]_i_1__0_n_13 ;
  wire \wordcnt_reg[8]_i_1__0_n_14 ;
  wire \wordcnt_reg[8]_i_1__0_n_15 ;
  wire \wordcnt_reg[8]_i_1__0_n_2 ;
  wire \wordcnt_reg[8]_i_1__0_n_3 ;
  wire \wordcnt_reg[8]_i_1__0_n_4 ;
  wire \wordcnt_reg[8]_i_1__0_n_5 ;
  wire \wordcnt_reg[8]_i_1__0_n_6 ;
  wire \wordcnt_reg[8]_i_1__0_n_7 ;
  wire \wordcnt_reg[8]_i_1__0_n_8 ;
  wire \wordcnt_reg[8]_i_1__0_n_9 ;
  wire \wordcnt_reg[9]__0_n_0 ;
  wire [7:3]NLW_recvAXIS_tlast_sig_reg_i_2__0_CO_UNCONNECTED;
  wire [7:0]NLW_recvAXIS_tlast_sig_reg_i_2__0_O_UNCONNECTED;
  wire [7:0]NLW_recvAXIS_tlast_sig_reg_i_3__0_O_UNCONNECTED;
  wire [7:0]\NLW_stateSend_reg[2]_i_12__0_O_UNCONNECTED ;
  wire [7:3]\NLW_stateSend_reg[2]_i_8__0_CO_UNCONNECTED ;
  wire [7:0]\NLW_stateSend_reg[2]_i_8__0_O_UNCONNECTED ;
  wire [7:0]\NLW_wordcntCrcLast_reg[24]_i_1_CO_UNCONNECTED ;
  wire [7:1]\NLW_wordcntCrcLast_reg[24]_i_1_O_UNCONNECTED ;
  wire [7:6]\NLW_wordcnt_reg[24]__0_i_1__0_CO_UNCONNECTED ;
  wire [7:7]\NLW_wordcnt_reg[24]__0_i_1__0_O_UNCONNECTED ;
  wire [7:6]\NLW_wordcnt_reg[24]_i_1__0_CO_UNCONNECTED ;
  wire [7:7]\NLW_wordcnt_reg[24]_i_1__0_O_UNCONNECTED ;

  FDRE \AXIL_araddr_sig_reg[4] 
       (.C(aclk_sig),
        .CE(AXIL_arready_sig0),
        .D(rpuAXIL_araddr[0]),
        .Q(AXIL_araddr_sig[4]),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_araddr_sig_reg[5] 
       (.C(aclk_sig),
        .CE(AXIL_arready_sig0),
        .D(rpuAXIL_araddr[1]),
        .Q(AXIL_araddr_sig[5]),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  LUT3 #(
    .INIT(8'h04)) 
    AXIL_arready_sig_i_1__0
       (.I0(rpuAXIL_rvalid),
        .I1(rpuAXIL_arvalid),
        .I2(AXIL_arready),
        .O(AXIL_arready_sig0));
  FDRE AXIL_arready_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(AXIL_arready_sig0),
        .Q(AXIL_arready),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  LUT3 #(
    .INIT(8'h02)) 
    \AXIL_awaddr_sig[5]_i_1__0 
       (.I0(rpuAXIL_awvalid),
        .I1(awdone_reg_n_0),
        .I2(AXIL_awready_sig_reg_0),
        .O(AXIL_awready_sig0));
  FDRE \AXIL_awaddr_sig_reg[4] 
       (.C(aclk_sig),
        .CE(AXIL_awready_sig0),
        .D(rpuAXIL_awaddr[0]),
        .Q(ixBlkWrite[0]),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_awaddr_sig_reg[5] 
       (.C(aclk_sig),
        .CE(AXIL_awready_sig0),
        .D(rpuAXIL_awaddr[1]),
        .Q(ixBlkWrite[1]),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  LUT3 #(
    .INIT(8'h10)) 
    AXIL_awready_sig_i_1__0
       (.I0(AXIL_awready_sig_reg_0),
        .I1(awdone_reg_n_0),
        .I2(rpuAXIL_awvalid),
        .O(AXIL_awready_sig_i_1__0_n_0));
  FDRE AXIL_awready_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(AXIL_awready_sig_i_1__0_n_0),
        .Q(AXIL_awready_sig_reg_0),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  LUT6 #(
    .INIT(64'h111FFFFFEEE0EEE0)) 
    AXIL_bvalid_sig_i_1__0
       (.I0(AXIL_wready_sig_reg_0),
        .I1(wdone_reg_n_0),
        .I2(awdone_reg_n_0),
        .I3(AXIL_awready_sig_reg_0),
        .I4(rpuAXIL_bready),
        .I5(AXIL_bvalid_sig_reg_0),
        .O(AXIL_bvalid_sig_i_1__0_n_0));
  FDRE AXIL_bvalid_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(AXIL_bvalid_sig_i_1__0_n_0),
        .Q(AXIL_bvalid_sig_reg_0),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  LUT4 #(
    .INIT(16'h88F8)) 
    AXIL_rvalid_sig_i_1__0
       (.I0(AXIL_arready),
        .I1(rpuAXIL_arvalid),
        .I2(rpuAXIL_rvalid),
        .I3(rpuAXIL_rready),
        .O(AXIL_rvalid_sig_i_1__0_n_0));
  FDRE AXIL_rvalid_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(AXIL_rvalid_sig_i_1__0_n_0),
        .Q(rpuAXIL_rvalid),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[15]_i_1__0 
       (.I0(rpuAXIL_wstrb[1]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(rpuAXIL_wvalid),
        .O(\AXIL_wdata_sig[15]_i_1__0_n_0 ));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[23]_i_1__0 
       (.I0(rpuAXIL_wstrb[2]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(rpuAXIL_wvalid),
        .O(\AXIL_wdata_sig[23]_i_1__0_n_0 ));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[31]_i_1__0 
       (.I0(rpuAXIL_wstrb[3]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(rpuAXIL_wvalid),
        .O(\AXIL_wdata_sig[31]_i_1__0_n_0 ));
  LUT4 #(
    .INIT(16'h0200)) 
    \AXIL_wdata_sig[7]_i_1__0 
       (.I0(rpuAXIL_wstrb[0]),
        .I1(wdone_reg_n_0),
        .I2(AXIL_wready_sig_reg_0),
        .I3(rpuAXIL_wvalid),
        .O(\AXIL_wdata_sig[7]_i_1__0_n_0 ));
  FDRE \AXIL_wdata_sig_reg[0] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[0]),
        .Q(\AXIL_wdata_sig_reg_n_0_[0] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[10] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[10]),
        .Q(\AXIL_wdata_sig_reg_n_0_[10] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[11] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[11]),
        .Q(\AXIL_wdata_sig_reg_n_0_[11] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[12] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[12]),
        .Q(\AXIL_wdata_sig_reg_n_0_[12] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[13] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[13]),
        .Q(\AXIL_wdata_sig_reg_n_0_[13] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[14] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[14]),
        .Q(\AXIL_wdata_sig_reg_n_0_[14] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[15] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[15]),
        .Q(\AXIL_wdata_sig_reg_n_0_[15] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[16] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[16]),
        .Q(\AXIL_wdata_sig_reg_n_0_[16] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[17] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[17]),
        .Q(\AXIL_wdata_sig_reg_n_0_[17] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[18] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[18]),
        .Q(\AXIL_wdata_sig_reg_n_0_[18] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[19] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[19]),
        .Q(\AXIL_wdata_sig_reg_n_0_[19] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[1] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[1]),
        .Q(\AXIL_wdata_sig_reg_n_0_[1] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[20] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[20]),
        .Q(\AXIL_wdata_sig_reg_n_0_[20] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[21] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[21]),
        .Q(\AXIL_wdata_sig_reg_n_0_[21] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[22] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[22]),
        .Q(\AXIL_wdata_sig_reg_n_0_[22] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[23] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[23]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[23]),
        .Q(\AXIL_wdata_sig_reg_n_0_[23] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[24] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[24]),
        .Q(\AXIL_wdata_sig_reg_n_0_[24] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[25] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[25]),
        .Q(\AXIL_wdata_sig_reg_n_0_[25] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[26] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[26]),
        .Q(\AXIL_wdata_sig_reg_n_0_[26] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[27] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[27]),
        .Q(\AXIL_wdata_sig_reg_n_0_[27] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[28] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[28]),
        .Q(\AXIL_wdata_sig_reg_n_0_[28] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[29] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[29]),
        .Q(\AXIL_wdata_sig_reg_n_0_[29] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[2] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[2]),
        .Q(p_0_in[0]),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[30] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[30]),
        .Q(\AXIL_wdata_sig_reg_n_0_[30] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[31] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[31]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[31]),
        .Q(\AXIL_wdata_sig_reg_n_0_[31] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[3] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[3]),
        .Q(p_0_in[1]),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[4] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[4]),
        .Q(\AXIL_wdata_sig_reg_n_0_[4] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[5] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[5]),
        .Q(\AXIL_wdata_sig_reg_n_0_[5] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[6] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[6]),
        .Q(\AXIL_wdata_sig_reg_n_0_[6] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[7] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[7]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[7]),
        .Q(\AXIL_wdata_sig_reg_n_0_[7] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[8] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[8]),
        .Q(\AXIL_wdata_sig_reg_n_0_[8] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  FDRE \AXIL_wdata_sig_reg[9] 
       (.C(aclk_sig),
        .CE(\AXIL_wdata_sig[15]_i_1__0_n_0 ),
        .D(rpuAXIL_wdata[9]),
        .Q(\AXIL_wdata_sig_reg_n_0_[9] ),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  LUT3 #(
    .INIT(8'h10)) 
    AXIL_wready_sig_i_1__0
       (.I0(wdone_reg_n_0),
        .I1(AXIL_wready_sig_reg_0),
        .I2(rpuAXIL_wvalid),
        .O(AXIL_wready_sig_i_1__0_n_0));
  FDRE AXIL_wready_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(AXIL_wready_sig_i_1__0_n_0),
        .Q(AXIL_wready_sig_reg_0),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  LUT6 #(
    .INIT(64'h777F777F777F0000)) 
    awdone_i_1__1
       (.I0(AXIL_bvalid_sig_reg_0),
        .I1(rpuAXIL_bready),
        .I2(wdone_reg_n_0),
        .I3(AXIL_wready_sig_reg_0),
        .I4(awdone_reg_n_0),
        .I5(AXIL_awready_sig_reg_0),
        .O(awdone_i_1__1_n_0));
  FDRE awdone_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(awdone_i_1__1_n_0),
        .Q(awdone_reg_n_0),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2760" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \crcAXIS_tkeep[0]_i_1__0 
       (.I0(\crcAXIS_tkeep_reg[0] ),
        .I1(\stateOp_reg[1] ),
        .O(\stateOp_reg[0]_0 [0]));
  LUT5 #(
    .INIT(32'hFF36FFFF)) 
    \crcAXIS_tkeep[1]_i_1__0 
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(\crcAXIS_tkeep_reg[1] ),
        .I4(\stateOp_reg[1] ),
        .O(\stateOp_reg[0]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2702" *) 
  LUT4 #(
    .INIT(16'hBAAA)) 
    \crcAXIS_tkeep[2]_i_1__0 
       (.I0(\crcAXIS_tkeep[3]_i_6_n_0 ),
        .I1(Q[0]),
        .I2(Q[4]),
        .I3(\crcAXIS_tkeep_reg[3] [0]),
        .O(\stateOp_reg[0]_0 [2]));
  LUT6 #(
    .INIT(64'h7F3F7F3F7F3F7FFF)) 
    \crcAXIS_tkeep[3]_i_1__0 
       (.I0(\crcAXIS_tkeep[3]_i_3__0_n_0 ),
        .I1(\stateOp_reg[1] ),
        .I2(\crcAXIS_tkeep[3]_i_4_n_0 ),
        .I3(Q[3]),
        .I4(Q[2]),
        .I5(\crcAXIS_tkeep[3]_i_5_n_0 ),
        .O(\stateOp_reg[3] ));
  (* SOFT_HLUTNM = "soft_lutpair2702" *) 
  LUT4 #(
    .INIT(16'hFF40)) 
    \crcAXIS_tkeep[3]_i_2__0 
       (.I0(Q[0]),
        .I1(Q[4]),
        .I2(\crcAXIS_tkeep_reg[3] [1]),
        .I3(\crcAXIS_tkeep[3]_i_6_n_0 ),
        .O(\stateOp_reg[0]_0 [3]));
  LUT6 #(
    .INIT(64'hFFFFFFFFFF00FEFE)) 
    \crcAXIS_tkeep[3]_i_3__0 
       (.I0(\crcAXIS_tkeep_reg[0]_0 ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(\crcAXIS_tkeep[3]_i_8_n_0 ),
        .I4(Q[0]),
        .I5(Q[4]),
        .O(\crcAXIS_tkeep[3]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hF3F3F3FFFBFFFBFB)) 
    \crcAXIS_tkeep[3]_i_4 
       (.I0(Q[1]),
        .I1(Q[2]),
        .I2(Q[3]),
        .I3(\crcAXIS_tkeep[3]_i_9_n_0 ),
        .I4(Q[0]),
        .I5(Q[4]),
        .O(\crcAXIS_tkeep[3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFF553FFFFFFF)) 
    \crcAXIS_tkeep[3]_i_5 
       (.I0(crcAXIS_tlast_sig_reg_4),
        .I1(\wordcnt[30]_i_5__0_n_0 ),
        .I2(\crcAXIS_tkeep_reg[0]_1 ),
        .I3(Q[1]),
        .I4(Q[0]),
        .I5(Q[4]),
        .O(\crcAXIS_tkeep[3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFA282FFFF)) 
    \crcAXIS_tkeep[3]_i_6 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[4]),
        .I3(\lastAXIS_tkeep_reg[3]_0 ),
        .I4(\stateOp_reg[1] ),
        .I5(\crcAXIS_tkeep_reg[3]_0 ),
        .O(\crcAXIS_tkeep[3]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2677" *) 
  LUT5 #(
    .INIT(32'hBFFFFFFF)) 
    \crcAXIS_tkeep[3]_i_8 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(stateSend[0]),
        .I3(Q[1]),
        .I4(CO),
        .O(\crcAXIS_tkeep[3]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h0004000000000000)) 
    \crcAXIS_tkeep[3]_i_9 
       (.I0(CO),
        .I1(stateRecv[2]),
        .I2(stateRecv[1]),
        .I3(stateRecv[0]),
        .I4(\crcAXIS_tkeep_reg[0]_1 ),
        .I5(Q[1]),
        .O(\crcAXIS_tkeep[3]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAFFAEAAAA00A2)) 
    crcAXIS_tlast_sig_i_1__0
       (.I0(crcAXIS_tlast_sig_i_2__0_n_0),
        .I1(crcAXIS_tlast_sig_reg_1),
        .I2(crcAXIS_tlast_sig_i_4__0_n_0),
        .I3(Q[0]),
        .I4(crcAXIS_tlast_sig_i_5__0_n_0),
        .I5(crcAXIS_tlast_sig_reg_2),
        .O(\stateOp_reg[0]_2 ));
  LUT5 #(
    .INIT(32'hBFBFF333)) 
    crcAXIS_tlast_sig_i_2__0
       (.I0(CO),
        .I1(\stateOp_reg[1] ),
        .I2(crcAXIS_tlast_sig_reg_3),
        .I3(crcAXIS_tlast_sig_reg_4),
        .I4(crcAXIS_tlast_sig_reg_5),
        .O(crcAXIS_tlast_sig_i_2__0_n_0));
  LUT6 #(
    .INIT(64'h00000000E2220000)) 
    crcAXIS_tlast_sig_i_4__0
       (.I0(crcAXIS_tlast_sig_i_8__0_n_0),
        .I1(Q[4]),
        .I2(CO),
        .I3(rxAXIS_tvalid),
        .I4(Q[2]),
        .I5(crcAXIS_tlast_sig_reg_0),
        .O(crcAXIS_tlast_sig_i_4__0_n_0));
  LUT5 #(
    .INIT(32'hFFFF04FF)) 
    crcAXIS_tlast_sig_i_5__0
       (.I0(crcAXIS_tlast_sig_i_9__0_n_0),
        .I1(Q[0]),
        .I2(Q[4]),
        .I3(\stateOp_reg[1] ),
        .I4(crcAXIS_tlast_sig_reg_6),
        .O(crcAXIS_tlast_sig_i_5__0_n_0));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    crcAXIS_tlast_sig_i_8__0
       (.I0(\rxlen[1]_i_4_n_0 ),
        .I1(crcAXIS_tlast_sig_i_4__0_0[4]),
        .I2(crcAXIS_tlast_sig_i_4__0_0[2]),
        .I3(crcAXIS_tlast_sig_i_4__0_0[0]),
        .I4(crcAXIS_tlast_sig_i_4__0_0[1]),
        .I5(crcAXIS_tlast_sig_i_4__0_0[3]),
        .O(crcAXIS_tlast_sig_i_8__0_n_0));
  LUT6 #(
    .INIT(64'h0FFFFF2AFFFFFF2A)) 
    crcAXIS_tlast_sig_i_9__0
       (.I0(Q[1]),
        .I1(CO),
        .I2(rxAXIS_tvalid),
        .I3(Q[3]),
        .I4(Q[2]),
        .I5(\stateOp[2]_i_5__2_n_0 ),
        .O(crcAXIS_tlast_sig_i_9__0_n_0));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[0]_i_10__0 
       (.I0(AXIS_tdata[20]),
        .I1(AXIS_tdata[18]),
        .I2(AXIS_tdata[17]),
        .I3(AXIS_tdata[19]),
        .O(\crc_imd[0]_i_10__0_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[0]_i_4__0 
       (.I0(\crc_imd_reg[0] ),
        .I1(\recvAXIS_tdata_sig_reg[21]_0 ),
        .I2(\crc_imd_reg[0]_0 ),
        .I3(\txAXIS_tdata_reg[14] ),
        .I4(\crc_imd[0]_i_7__0_n_0 ),
        .I5(\crc_imd[15]_i_17__0_n_0 ),
        .O(stateOp_reg));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[0]_i_7__0 
       (.I0(\crc_imd_reg[14] ),
        .I1(\crc_imd[0]_i_10__0_n_0 ),
        .I2(\txAXIS_tdata_reg[30] [9]),
        .I3(AXIS_tdata[24]),
        .O(\crc_imd[0]_i_7__0_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[0]_i_8__0 
       (.I0(\txAXIS_tdata_reg[11] ),
        .I1(\recvAXIS_tdata_sig_reg[12]_0 ),
        .I2(\crc_imd_reg[2]_2 ),
        .I3(\crc_imd_reg[6] ),
        .O(\txAXIS_tdata_reg[11]_0 ));
  LUT5 #(
    .INIT(32'hA000C000)) 
    \crc_imd[10]_i_3__0 
       (.I0(\myCrc/crc_imd058_out ),
        .I1(\myCrc/crc_imd031_out ),
        .I2(\crc_imd_reg[2]_1 ),
        .I3(\crc_imd_reg[10] [0]),
        .I4(\crc_imd_reg[10] [1]),
        .O(stateOp_reg_1));
  (* SOFT_HLUTNM = "soft_lutpair2721" *) 
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[10]_i_4__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [1]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[1]),
        .O(\txAXIS_tdata_reg[30] [1]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[10]_i_5__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [0]),
        .I2(stateOp_reg_4),
        .I3(recvAXIS_tdata[0]),
        .O(\txAXIS_tdata_reg[30] [0]));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[10]_i_6__0 
       (.I0(AXIS_tdata[16]),
        .I1(\crc_imd_reg[8] ),
        .I2(\pollbuf_reg[4][7] [8]),
        .I3(AXIS_tdata[17]),
        .I4(\txAXIS_tdata_reg[30] [0]),
        .O(\myCrc/crc_imd058_out ));
  LUT6 #(
    .INIT(64'h3311CC1E005A005A)) 
    \crc_imd[11]_i_2__0 
       (.I0(rxAXIS_tdata[2]),
        .I1(\sendAXIL_rdata_reg[31]_0 [2]),
        .I2(rxAXIS_tdata[1]),
        .I3(stateOp_reg_4),
        .I4(\sendAXIL_rdata_reg[31]_0 [1]),
        .I5(\crc_imd_reg[11] ),
        .O(\recvAXIS_tdata_sig_reg[2]_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[11]_i_4__0 
       (.I0(\pollbuf_reg[4][7] [7]),
        .I1(AXIS_tdata[18]),
        .I2(\txAXIS_tdata_reg[30] [1]),
        .I3(\pollbuf_reg[4][7] [9]),
        .I4(\txAXIS_tdata_reg[30] [6]),
        .I5(AXIS_tdata[17]),
        .O(crc_imd059_out));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[11]_i_5__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [17]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[17]),
        .O(AXIS_tdata[17]));
  (* SOFT_HLUTNM = "soft_lutpair2700" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[12]_i_2__0 
       (.I0(\txAXIS_tdata_reg[30] [2]),
        .I1(AXIS_tdata[2]),
        .I2(\pollbuf_reg[4][7] [11]),
        .I3(\pollbuf_reg[4][7] [10]),
        .O(crc_imd017_out));
  (* SOFT_HLUTNM = "soft_lutpair2723" *) 
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[12]_i_4__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [3]),
        .I2(stateOp_reg_4),
        .I3(recvAXIS_tdata[1]),
        .O(\txAXIS_tdata_reg[30] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2722" *) 
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[12]_i_5__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [2]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[2]),
        .O(AXIS_tdata[2]));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[12]_i_6__0 
       (.I0(\txAXIS_tdata_reg[30] [0]),
        .I1(\pollbuf_reg[4][7] [8]),
        .I2(AXIS_tdata[18]),
        .I3(\pollbuf_reg[4][7] [10]),
        .I4(AXIS_tdata[2]),
        .I5(AXIS_tdata[19]),
        .O(crc_imd060_out));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[12]_i_8__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [18]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[18]),
        .O(AXIS_tdata[18]));
  LUT6 #(
    .INIT(64'hAA0000003C000000)) 
    \crc_imd[13]_i_3__0 
       (.I0(\myCrc/crc_imd061_out ),
        .I1(\crc_imd_reg[13] ),
        .I2(\recvAXIS_tdata_sig_reg[12]_0 ),
        .I3(\crc_imd_reg[2]_1 ),
        .I4(\crc_imd_reg[10] [0]),
        .I5(\crc_imd_reg[10] [1]),
        .O(stateOp_reg_2));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[13]_i_4__0 
       (.I0(AXIS_tdata[19]),
        .I1(\txAXIS_tdata_reg[30] [1]),
        .I2(\pollbuf_reg[4][7] [9]),
        .I3(\pollbuf_reg[4][7] [11]),
        .I4(AXIS_tdata[20]),
        .I5(\txAXIS_tdata_reg[30] [2]),
        .O(\myCrc/crc_imd061_out ));
  LUT5 #(
    .INIT(32'h0DDDF222)) 
    \crc_imd[13]_i_6__0 
       (.I0(rxAXIS_tdata[12]),
        .I1(stateOp_reg_4),
        .I2(\sendAXIL_rdata_reg[31]_0 [12]),
        .I3(\crc_imd_reg[11] ),
        .I4(\pollbuf_reg[4][7] [4]),
        .O(\recvAXIS_tdata_sig_reg[12]_0 ));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[13]_i_7__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [19]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[19]),
        .O(AXIS_tdata[19]));
  (* SOFT_HLUTNM = "soft_lutpair2675" *) 
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[14]_i_10__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [21]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[21]),
        .O(\txAXIS_tdata_reg[30] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2671" *) 
  LUT5 #(
    .INIT(32'h0000FF20)) 
    \crc_imd[14]_i_2__0 
       (.I0(recvAXIS_tlast),
        .I1(stateOp_reg_4),
        .I2(rxAXIS_tvalid),
        .I3(crcAXIS_tlast_sig_reg_2),
        .I4(\crc_imd_reg[2]_1 ),
        .O(recvAXIS_tlast_sig_reg_0));
  LUT5 #(
    .INIT(32'hA000C000)) 
    \crc_imd[14]_i_6__0 
       (.I0(\myCrc/crc_imd062_out ),
        .I1(\myCrc/crc_imd035_out ),
        .I2(\crc_imd_reg[2]_1 ),
        .I3(\crc_imd_reg[10] [0]),
        .I4(\crc_imd_reg[10] [1]),
        .O(stateOp_reg_3));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[14]_i_8__0 
       (.I0(AXIS_tdata[20]),
        .I1(AXIS_tdata[2]),
        .I2(\txAXIS_tdata_reg[30] [7]),
        .I3(\pollbuf_reg[4][7] [10]),
        .I4(\crc_imd[6]_i_3__0_0 ),
        .O(\myCrc/crc_imd062_out ));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[14]_i_9__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [20]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[20]),
        .O(AXIS_tdata[20]));
  LUT6 #(
    .INIT(64'h95AA95956A556A6A)) 
    \crc_imd[15]_i_14__0 
       (.I0(\pollbuf_reg[4][7] [14]),
        .I1(\crc_imd_reg[11] ),
        .I2(\sendAXIL_rdata_reg[31]_0 [6]),
        .I3(stateOp_reg_4),
        .I4(rxAXIS_tdata[6]),
        .I5(\recvAXIS_tdata_sig_reg[7]_0 ),
        .O(\crc_imd_reg[14] ));
  LUT6 #(
    .INIT(64'h95AA95956A556A6A)) 
    \crc_imd[15]_i_15__0 
       (.I0(\txAXIS_tdata_reg[11]_0 ),
        .I1(\crc_imd_reg[11] ),
        .I2(\sendAXIL_rdata_reg[31]_0 [14]),
        .I3(stateOp_reg_4),
        .I4(recvAXIS_tdata[7]),
        .I5(\pollbuf_reg[4][7] [6]),
        .O(\txAXIS_tdata_reg[14] ));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[15]_i_17__0 
       (.I0(AXIS_tdata[31]),
        .I1(\txAXIS_tdata_reg[30] [11]),
        .I2(\txAXIS_tdata_reg[30] [10]),
        .I3(\crc_imd[15]_i_26__0_n_0 ),
        .I4(\crc_imd[5]_i_4__0_n_0 ),
        .O(\crc_imd[15]_i_17__0_n_0 ));
  LUT5 #(
    .INIT(32'h0DDDF222)) 
    \crc_imd[15]_i_18__0 
       (.I0(recvAXIS_tdata[3]),
        .I1(stateOp_reg_4),
        .I2(\sendAXIL_rdata_reg[31]_0 [5]),
        .I3(\crc_imd_reg[11] ),
        .I4(\pollbuf_reg[4][7] [13]),
        .O(\crc_imd[15]_i_18__0_n_0 ));
  LUT6 #(
    .INIT(64'h3311CC1E005A005A)) 
    \crc_imd[15]_i_19__0 
       (.I0(rxAXIS_tdata[16]),
        .I1(\sendAXIL_rdata_reg[31]_0 [16]),
        .I2(rxAXIS_tdata[24]),
        .I3(stateOp_reg_4),
        .I4(\sendAXIL_rdata_reg[31]_0 [24]),
        .I5(\crc_imd_reg[11] ),
        .O(\crc_imd[15]_i_19__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2673" *) 
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \crc_imd[15]_i_23__0 
       (.I0(\crc_imd[15]_i_27__0_n_0 ),
        .I1(rxAXIS_tdata[23]),
        .I2(stateOp_reg_4),
        .I3(\sendAXIL_rdata_reg[31]_0 [23]),
        .I4(\crc_imd_reg[11] ),
        .O(\recvAXIS_tdata_sig_reg[23]_0 ));
  LUT6 #(
    .INIT(64'h3311CC1E005A005A)) 
    \crc_imd[15]_i_24__0 
       (.I0(rxAXIS_tdata[21]),
        .I1(\sendAXIL_rdata_reg[31]_0 [21]),
        .I2(rxAXIS_tdata[16]),
        .I3(stateOp_reg_4),
        .I4(\sendAXIL_rdata_reg[31]_0 [16]),
        .I5(\crc_imd_reg[11] ),
        .O(\recvAXIS_tdata_sig_reg[21]_0 ));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[15]_i_25__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [29]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[29]),
        .O(\txAXIS_tdata_reg[30] [10]));
  LUT6 #(
    .INIT(64'h3311CC1E005A005A)) 
    \crc_imd[15]_i_26__0 
       (.I0(rxAXIS_tdata[25]),
        .I1(\sendAXIL_rdata_reg[31]_0 [25]),
        .I2(rxAXIS_tdata[26]),
        .I3(stateOp_reg_4),
        .I4(\sendAXIL_rdata_reg[31]_0 [26]),
        .I5(\crc_imd_reg[11] ),
        .O(\crc_imd[15]_i_26__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2674" *) 
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \crc_imd[15]_i_27__0 
       (.I0(\crc_imd[0]_i_10__0_n_0 ),
        .I1(rxAXIS_tdata[22]),
        .I2(stateOp_reg_4),
        .I3(\sendAXIL_rdata_reg[31]_0 [22]),
        .I4(\crc_imd_reg[11] ),
        .O(\crc_imd[15]_i_27__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2682" *) 
  LUT3 #(
    .INIT(8'h02)) 
    \crc_imd[15]_i_4 
       (.I0(stateRecv[2]),
        .I1(stateRecv[1]),
        .I2(stateRecv[0]),
        .O(rxAXIS_tvalid));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[15]_i_8__0 
       (.I0(\crc_imd[15]_i_17__0_n_0 ),
        .I1(\crc_imd[15]_i_18__0_n_0 ),
        .I2(\crc_imd_reg[14] ),
        .I3(\crc_imd[15]_i_19__0_n_0 ),
        .I4(\crc_imd_reg[15]_0 ),
        .I5(\crc_imd_reg[15]_1 ),
        .O(\recvAXIS_tdata_sig_reg[5]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2698" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[15]_i_9__0 
       (.I0(\recvAXIS_tdata_sig_reg[13]_0 ),
        .I1(\crc_imd_reg[9]_0 ),
        .I2(\txAXIS_tdata_reg[14] ),
        .I3(\recvAXIS_tdata_sig_reg[23]_0 ),
        .O(\recvAXIS_tdata_sig_reg[13]_1 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[1]_i_11__0 
       (.I0(\crc_imd[15]_i_27__0_n_0 ),
        .I1(\recvAXIS_tdata_sig_reg[21]_0 ),
        .I2(\recvAXIS_tdata_sig_reg[7]_0 ),
        .I3(\crc_imd[6]_i_3__0_0 ),
        .O(\crc_imd[1]_i_11__0_n_0 ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[1]_i_4__0 
       (.I0(\crc_imd_reg[0] ),
        .I1(\crc_imd[1]_i_11__0_n_0 ),
        .I2(\crc_imd[15]_i_17__0_n_0 ),
        .I3(\txAXIS_tdata_reg[14] ),
        .I4(\crc_imd_reg[0]_0 ),
        .O(stateOp_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair2675" *) 
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \crc_imd[1]_i_5__0 
       (.I0(\recvAXIS_tdata_sig_reg[13]_0 ),
        .I1(rxAXIS_tdata[21]),
        .I2(stateOp_reg_4),
        .I3(\sendAXIL_rdata_reg[31]_0 [21]),
        .I4(\crc_imd_reg[11] ),
        .O(\recvAXIS_tdata_sig_reg[21]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2698" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[1]_i_6__0 
       (.I0(\txAXIS_tdata_reg[14] ),
        .I1(\recvAXIS_tdata_sig_reg[23]_0 ),
        .I2(p_10_out),
        .O(\txAXIS_tdata_reg[14]_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEAEAEA)) 
    \crc_imd[2]_i_1__0 
       (.I0(recvAXIS_tlast_sig_reg_0),
        .I1(\crc_imd_reg[2] ),
        .I2(\myCrc/crc_imd031_out ),
        .I3(\crc_imd_reg[2]_0 ),
        .I4(crc_imd013_out),
        .I5(\crc_imd[2]_i_3__0_n_0 ),
        .O(\crc_imd_reg[1] [0]));
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[2]_i_2__0 
       (.I0(AXIS_tdata[8]),
        .I1(\pollbuf_reg[4][7] [0]),
        .I2(\crc_imd[3]_i_6__0_n_0 ),
        .I3(\txAXIS_tdata_reg[30] [3]),
        .I4(\pollbuf_reg[4][7] [14]),
        .O(\myCrc/crc_imd031_out ));
  LUT6 #(
    .INIT(64'hFFFF960096009600)) 
    \crc_imd[2]_i_3__0 
       (.I0(\crc_imd[2]_i_5__0_n_0 ),
        .I1(\txAXIS_tdata_reg[30] [8]),
        .I2(\crc_imd_reg[2]_2 ),
        .I3(\crc_imd_reg[0] ),
        .I4(\myCrc/crc_imd058_out ),
        .I5(\crc_imd_reg[2]_3 ),
        .O(\crc_imd[2]_i_3__0_n_0 ));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[2]_i_4__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [8]),
        .I2(stateOp_reg_4),
        .I3(recvAXIS_tdata[4]),
        .O(AXIS_tdata[8]));
  LUT6 #(
    .INIT(64'h9666999996669666)) 
    \crc_imd[2]_i_5__0 
       (.I0(\crc_imd[2]_i_3__0_0 ),
        .I1(AXIS_tdata[24]),
        .I2(\crc_imd_reg[11] ),
        .I3(\sendAXIL_rdata_reg[31]_0 [25]),
        .I4(stateOp_reg_4),
        .I5(rxAXIS_tdata[25]),
        .O(\crc_imd[2]_i_5__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2674" *) 
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[2]_i_6__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [22]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[22]),
        .O(\txAXIS_tdata_reg[30] [8]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[2]_i_8__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [24]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[24]),
        .O(AXIS_tdata[24]));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEAEAEA)) 
    \crc_imd[3]_i_1__0 
       (.I0(recvAXIS_tlast_sig_reg_0),
        .I1(\crc_imd_reg[2] ),
        .I2(crc_imd032_out),
        .I3(\crc_imd_reg[2]_0 ),
        .I4(crc_imd015_out),
        .I5(\crc_imd[3]_i_4__0_n_0 ),
        .O(\crc_imd_reg[1] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2699" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[3]_i_2__0 
       (.I0(AXIS_tdata[7]),
        .I1(\pollbuf_reg[4][7] [15]),
        .I2(\crc_imd[3]_i_6__0_n_0 ),
        .I3(\crc_imd_reg[6] ),
        .O(crc_imd032_out));
  LUT6 #(
    .INIT(64'hFFFF960096009600)) 
    \crc_imd[3]_i_4__0 
       (.I0(\crc_imd[3]_i_7__0_n_0 ),
        .I1(\crc_imd_reg[14] ),
        .I2(\crc_imd[3]_i_6__0_n_0 ),
        .I3(\crc_imd_reg[0] ),
        .I4(crc_imd059_out),
        .I5(\crc_imd_reg[2]_3 ),
        .O(\crc_imd[3]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2672" *) 
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[3]_i_5__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [7]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[7]),
        .O(AXIS_tdata[7]));
  LUT5 #(
    .INIT(32'h0DDDF222)) 
    \crc_imd[3]_i_6__0 
       (.I0(rxAXIS_tdata[9]),
        .I1(stateOp_reg_4),
        .I2(\sendAXIL_rdata_reg[31]_0 [9]),
        .I3(\crc_imd_reg[11] ),
        .I4(\pollbuf_reg[4][7] [1]),
        .O(\crc_imd[3]_i_6__0_n_0 ));
  LUT6 #(
    .INIT(64'h95AA95956A556A6A)) 
    \crc_imd[3]_i_7__0 
       (.I0(\crc_imd[15]_i_26__0_n_0 ),
        .I1(\crc_imd_reg[11] ),
        .I2(\sendAXIL_rdata_reg[31]_0 [23]),
        .I3(stateOp_reg_4),
        .I4(rxAXIS_tdata[23]),
        .I5(\crc_imd[15]_i_18__0_n_0 ),
        .O(\crc_imd[3]_i_7__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEAEAEA)) 
    \crc_imd[4]_i_1__0 
       (.I0(recvAXIS_tlast_sig_reg_0),
        .I1(\crc_imd_reg[2] ),
        .I2(crc_imd033_out),
        .I3(\crc_imd_reg[2]_0 ),
        .I4(crc_imd017_out),
        .I5(\crc_imd[4]_i_3__0_n_0 ),
        .O(\crc_imd_reg[1] [2]));
  LUT6 #(
    .INIT(64'hFFFF960096009600)) 
    \crc_imd[4]_i_3__0 
       (.I0(\crc_imd[4]_i_4__0_n_0 ),
        .I1(\crc_imd_reg[14] ),
        .I2(\crc_imd_reg[4] ),
        .I3(\crc_imd_reg[0] ),
        .I4(crc_imd060_out),
        .I5(\crc_imd_reg[2]_3 ),
        .O(\crc_imd[4]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h3311CC1E005A005A)) 
    \crc_imd[4]_i_4__0 
       (.I0(rxAXIS_tdata[26]),
        .I1(\sendAXIL_rdata_reg[31]_0 [26]),
        .I2(rxAXIS_tdata[27]),
        .I3(stateOp_reg_4),
        .I4(\sendAXIL_rdata_reg[31]_0 [27]),
        .I5(\crc_imd_reg[11] ),
        .O(\crc_imd[4]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEAEAEA)) 
    \crc_imd[5]_i_1__0 
       (.I0(recvAXIS_tlast_sig_reg_0),
        .I1(\crc_imd_reg[2] ),
        .I2(\myCrc/crc_imd034_out ),
        .I3(\crc_imd_reg[2]_0 ),
        .I4(crc_imd019_out),
        .I5(\crc_imd[5]_i_3__0_n_0 ),
        .O(\crc_imd_reg[1] [3]));
  LUT6 #(
    .INIT(64'h8F88707770778F88)) 
    \crc_imd[5]_i_2__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [11]),
        .I2(stateOp_reg_4),
        .I3(recvAXIS_tdata[6]),
        .I4(\pollbuf_reg[4][7] [3]),
        .I5(\recvAXIS_tdata_sig_reg[12]_0 ),
        .O(\myCrc/crc_imd034_out ));
  LUT6 #(
    .INIT(64'hFFFF960096009600)) 
    \crc_imd[5]_i_3__0 
       (.I0(\recvAXIS_tdata_sig_reg[7]_0 ),
        .I1(\crc_imd[5]_i_4__0_n_0 ),
        .I2(\txAXIS_tdata_reg[11] ),
        .I3(\crc_imd_reg[0] ),
        .I4(\myCrc/crc_imd061_out ),
        .I5(\crc_imd_reg[2]_3 ),
        .O(\crc_imd[5]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h3311CC1E005A005A)) 
    \crc_imd[5]_i_4__0 
       (.I0(rxAXIS_tdata[27]),
        .I1(\sendAXIL_rdata_reg[31]_0 [27]),
        .I2(rxAXIS_tdata[28]),
        .I3(stateOp_reg_4),
        .I4(\sendAXIL_rdata_reg[31]_0 [28]),
        .I5(\crc_imd_reg[11] ),
        .O(\crc_imd[5]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'h8F88707770778F88)) 
    \crc_imd[5]_i_5__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [11]),
        .I2(stateOp_reg_4),
        .I3(recvAXIS_tdata[6]),
        .I4(\pollbuf_reg[4][7] [3]),
        .I5(\crc_imd[3]_i_6__0_n_0 ),
        .O(\txAXIS_tdata_reg[11] ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEAEAEA)) 
    \crc_imd[6]_i_1__0 
       (.I0(recvAXIS_tlast_sig_reg_0),
        .I1(\crc_imd_reg[2] ),
        .I2(\myCrc/crc_imd035_out ),
        .I3(\crc_imd_reg[2]_0 ),
        .I4(crc_imd020_out),
        .I5(\crc_imd[6]_i_3__0_n_0 ),
        .O(\crc_imd_reg[1] [4]));
  LUT6 #(
    .INIT(64'h9666999996669666)) 
    \crc_imd[6]_i_2__0 
       (.I0(\pollbuf_reg[4][7] [5]),
        .I1(\recvAXIS_tdata_sig_reg[12]_0 ),
        .I2(\crc_imd_reg[11] ),
        .I3(\sendAXIL_rdata_reg[31]_0 [13]),
        .I4(stateOp_reg_4),
        .I5(rxAXIS_tdata[13]),
        .O(\myCrc/crc_imd035_out ));
  LUT6 #(
    .INIT(64'hFFFF960096009600)) 
    \crc_imd[6]_i_3__0 
       (.I0(\crc_imd[6]_i_4__0_n_0 ),
        .I1(\recvAXIS_tdata_sig_reg[12]_0 ),
        .I2(\crc_imd_reg[6] ),
        .I3(\crc_imd_reg[0] ),
        .I4(\myCrc/crc_imd062_out ),
        .I5(\crc_imd_reg[2]_3 ),
        .O(\crc_imd[6]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h3311CC1E005A005A)) 
    \crc_imd[6]_i_4__0 
       (.I0(rxAXIS_tdata[29]),
        .I1(\sendAXIL_rdata_reg[31]_0 [29]),
        .I2(rxAXIS_tdata[28]),
        .I3(stateOp_reg_4),
        .I4(\sendAXIL_rdata_reg[31]_0 [28]),
        .I5(\crc_imd_reg[11] ),
        .O(\crc_imd[6]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2676" *) 
  LUT5 #(
    .INIT(32'h0DDDF222)) 
    \crc_imd[7]_i_2__0 
       (.I0(rxAXIS_tdata[13]),
        .I1(stateOp_reg_4),
        .I2(\sendAXIL_rdata_reg[31]_0 [13]),
        .I3(\crc_imd_reg[11] ),
        .I4(\pollbuf_reg[4][7] [5]),
        .O(\recvAXIS_tdata_sig_reg[13]_0 ));
  LUT6 #(
    .INIT(64'h3311CC1E005A005A)) 
    \crc_imd[7]_i_7__0 
       (.I0(rxAXIS_tdata[6]),
        .I1(\sendAXIL_rdata_reg[31]_0 [6]),
        .I2(recvAXIS_tdata[3]),
        .I3(stateOp_reg_4),
        .I4(\sendAXIL_rdata_reg[31]_0 [5]),
        .I5(\crc_imd_reg[11] ),
        .O(p_24_in));
  (* SOFT_HLUTNM = "soft_lutpair2676" *) 
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[7]_i_9__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [13]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[13]),
        .O(\txAXIS_tdata_reg[30] [4]));
  LUT6 #(
    .INIT(64'h95AA95956A556A6A)) 
    \crc_imd[8]_i_3__0 
       (.I0(\txAXIS_tdata_reg[30] [3]),
        .I1(\crc_imd_reg[11] ),
        .I2(\sendAXIL_rdata_reg[31]_0 [7]),
        .I3(stateOp_reg_4),
        .I4(rxAXIS_tdata[7]),
        .I5(\pollbuf_reg[4][7] [14]),
        .O(\txAXIS_tdata_reg[7] ));
  LUT6 #(
    .INIT(64'hFFFFFFFF69960000)) 
    \crc_imd[8]_i_4__0 
       (.I0(AXIS_tdata[31]),
        .I1(\txAXIS_tdata_reg[30] [11]),
        .I2(\recvAXIS_tdata_sig_reg[12]_0 ),
        .I3(\crc_imd_reg[8] ),
        .I4(\crc_imd_reg[0] ),
        .I5(\crc_imd_reg[8]_0 ),
        .O(\txAXIS_tdata_reg[31] ));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[8]_i_5__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [14]),
        .I2(stateOp_reg_4),
        .I3(recvAXIS_tdata[7]),
        .O(\txAXIS_tdata_reg[30] [5]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[8]_i_6__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [15]),
        .I2(stateOp_reg_4),
        .I3(recvAXIS_tdata[8]),
        .O(\txAXIS_tdata_reg[30] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2724" *) 
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[8]_i_7__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [6]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[6]),
        .O(\txAXIS_tdata_reg[30] [3]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[8]_i_8__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [30]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[30]),
        .O(\txAXIS_tdata_reg[30] [11]));
  LUT6 #(
    .INIT(64'hFFFFFFFFEEFEFEEE)) 
    \crc_imd[9]_i_1__0 
       (.I0(recvAXIS_tlast_sig_reg_0),
        .I1(\crc_imd_reg[9] ),
        .I2(\crc_imd_reg[2]_0 ),
        .I3(\recvAXIS_tdata_sig_reg[7]_0 ),
        .I4(\pollbuf_reg[4][7] [1]),
        .I5(\crc_imd[9]_i_4__0_n_0 ),
        .O(\crc_imd_reg[1] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2672" *) 
  LUT5 #(
    .INIT(32'h0DDDF222)) 
    \crc_imd[9]_i_3__0 
       (.I0(rxAXIS_tdata[7]),
        .I1(stateOp_reg_4),
        .I2(\sendAXIL_rdata_reg[31]_0 [7]),
        .I3(\crc_imd_reg[11] ),
        .I4(\pollbuf_reg[4][7] [15]),
        .O(\recvAXIS_tdata_sig_reg[7]_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF69960000)) 
    \crc_imd[9]_i_4__0 
       (.I0(AXIS_tdata[16]),
        .I1(\recvAXIS_tdata_sig_reg[13]_0 ),
        .I2(AXIS_tdata[31]),
        .I3(\crc_imd_reg[9]_0 ),
        .I4(\crc_imd_reg[0] ),
        .I5(\crc_imd[9]_i_7__0_n_0 ),
        .O(\crc_imd[9]_i_4__0_n_0 ));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[9]_i_5__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [16]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[16]),
        .O(AXIS_tdata[16]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[9]_i_6__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [31]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[31]),
        .O(AXIS_tdata[31]));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[9]_i_7__0 
       (.I0(\crc_imd_reg[2]_3 ),
        .I1(\crc_imd_reg[2]_2 ),
        .I2(\crc_imd[15]_i_18__0_n_0 ),
        .I3(\recvAXIS_tdata_sig_reg[7]_0 ),
        .I4(\txAXIS_tdata_reg[30] [9]),
        .O(\crc_imd[9]_i_7__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2673" *) 
  LUT4 #(
    .INIT(16'h8F88)) 
    \crc_imd[9]_i_8__0 
       (.I0(\crc_imd_reg[11] ),
        .I1(\sendAXIL_rdata_reg[31]_0 [23]),
        .I2(stateOp_reg_4),
        .I3(rxAXIS_tdata[23]),
        .O(\txAXIS_tdata_reg[30] [9]));
  (* SOFT_HLUTNM = "soft_lutpair2736" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \i[0]_i_1__14 
       (.I0(i[0]),
        .I1(\i[15]_i_5__0_n_0 ),
        .O(\i[0]_i_1__14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2696" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \i[10]_i_1__3 
       (.I0(i[9]),
        .I1(\i[12]_i_2__0_n_0 ),
        .I2(i[10]),
        .I3(\i[15]_i_5__0_n_0 ),
        .O(\i[10]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2696" *) 
  LUT5 #(
    .INIT(32'h14444444)) 
    \i[11]_i_1__2 
       (.I0(\i[15]_i_5__0_n_0 ),
        .I1(i[11]),
        .I2(i[10]),
        .I3(i[9]),
        .I4(\i[12]_i_2__0_n_0 ),
        .O(\i[11]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h000000007FFF8000)) 
    \i[12]_i_1__2 
       (.I0(i[11]),
        .I1(i[10]),
        .I2(i[9]),
        .I3(\i[12]_i_2__0_n_0 ),
        .I4(i[12]),
        .I5(\i[15]_i_5__0_n_0 ),
        .O(\i[12]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2739" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \i[12]_i_2__0 
       (.I0(i[8]),
        .I1(i[7]),
        .I2(\i[9]_i_2__4_n_0 ),
        .I3(i[6]),
        .O(\i[12]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2736" *) 
  LUT4 #(
    .INIT(16'h1444)) 
    \i[13]_i_1__2 
       (.I0(\i[15]_i_5__0_n_0 ),
        .I1(i[13]),
        .I2(\i[13]_i_2__2_n_0 ),
        .I3(i[12]),
        .O(\i[13]_i_1__2_n_0 ));
  LUT4 #(
    .INIT(16'h8000)) 
    \i[13]_i_2__2 
       (.I0(i[11]),
        .I1(i[10]),
        .I2(i[9]),
        .I3(\i[12]_i_2__0_n_0 ),
        .O(\i[13]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2737" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \i[14]_i_1__0 
       (.I0(\i[15]_i_4__0_n_0 ),
        .I1(i[14]),
        .I2(\i[15]_i_5__0_n_0 ),
        .O(\i[14]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h00F0F1FFFFFFFFFF)) 
    \i[15]_i_1__0 
       (.I0(sendStrbToStop_reg_n_0),
        .I1(recvStrbToStop_reg_n_0),
        .I2(\i[15]_i_3__0_n_0 ),
        .I3(stateTo[1]),
        .I4(stateTo[0]),
        .I5(req),
        .O(\i[15]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2737" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \i[15]_i_2__0 
       (.I0(i[14]),
        .I1(\i[15]_i_4__0_n_0 ),
        .I2(i[15]),
        .I3(\i[15]_i_5__0_n_0 ),
        .O(\i[15]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2738" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \i[15]_i_3__0 
       (.I0(recvStrbToStart_reg_n_0),
        .I1(sendStrbToStart_reg_n_0),
        .O(\i[15]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \i[15]_i_4__0 
       (.I0(i[13]),
        .I1(i[11]),
        .I2(i[10]),
        .I3(i[9]),
        .I4(\i[12]_i_2__0_n_0 ),
        .I5(i[12]),
        .O(\i[15]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2738" *) 
  LUT4 #(
    .INIT(16'hEFFF)) 
    \i[15]_i_5__0 
       (.I0(sendStrbToStart_reg_n_0),
        .I1(recvStrbToStart_reg_n_0),
        .I2(stateTo[1]),
        .I3(req),
        .O(\i[15]_i_5__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2745" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \i[1]_i_1__13 
       (.I0(i[1]),
        .I1(i[0]),
        .I2(\i[15]_i_5__0_n_0 ),
        .O(\i[1]_i_1__13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2694" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \i[2]_i_1__9 
       (.I0(i[1]),
        .I1(i[0]),
        .I2(i[2]),
        .I3(\i[15]_i_5__0_n_0 ),
        .O(\i[2]_i_1__9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2694" *) 
  LUT5 #(
    .INIT(32'h00007F80)) 
    \i[3]_i_1__9 
       (.I0(i[2]),
        .I1(i[0]),
        .I2(i[1]),
        .I3(i[3]),
        .I4(\i[15]_i_5__0_n_0 ),
        .O(\i[3]_i_1__9_n_0 ));
  LUT6 #(
    .INIT(64'h000000007FFF8000)) 
    \i[4]_i_1__9 
       (.I0(i[3]),
        .I1(i[1]),
        .I2(i[0]),
        .I3(i[2]),
        .I4(i[4]),
        .I5(\i[15]_i_5__0_n_0 ),
        .O(\i[4]_i_1__9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2745" *) 
  LUT3 #(
    .INIT(8'h09)) 
    \i[5]_i_1__8 
       (.I0(\i[5]_i_2__5_n_0 ),
        .I1(i[5]),
        .I2(\i[15]_i_5__0_n_0 ),
        .O(\i[5]_i_1__8_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \i[5]_i_2__5 
       (.I0(i[3]),
        .I1(i[1]),
        .I2(i[0]),
        .I3(i[2]),
        .I4(i[4]),
        .O(\i[5]_i_2__5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2739" *) 
  LUT3 #(
    .INIT(8'h09)) 
    \i[6]_i_1__7 
       (.I0(\i[9]_i_2__4_n_0 ),
        .I1(i[6]),
        .I2(\i[15]_i_5__0_n_0 ),
        .O(\i[6]_i_1__7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2695" *) 
  LUT4 #(
    .INIT(16'h00D2)) 
    \i[7]_i_1__7 
       (.I0(i[6]),
        .I1(\i[9]_i_2__4_n_0 ),
        .I2(i[7]),
        .I3(\i[15]_i_5__0_n_0 ),
        .O(\i[7]_i_1__7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2695" *) 
  LUT5 #(
    .INIT(32'h44144444)) 
    \i[8]_i_1__6 
       (.I0(\i[15]_i_5__0_n_0 ),
        .I1(i[8]),
        .I2(i[7]),
        .I3(\i[9]_i_2__4_n_0 ),
        .I4(i[6]),
        .O(\i[8]_i_1__6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000F7FF0800)) 
    \i[9]_i_1__4 
       (.I0(i[8]),
        .I1(i[7]),
        .I2(\i[9]_i_2__4_n_0 ),
        .I3(i[6]),
        .I4(i[9]),
        .I5(\i[15]_i_5__0_n_0 ),
        .O(\i[9]_i_1__4_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \i[9]_i_2__4 
       (.I0(i[4]),
        .I1(i[2]),
        .I2(i[0]),
        .I3(i[1]),
        .I4(i[3]),
        .I5(i[5]),
        .O(\i[9]_i_2__4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[0]_i_1__14_n_0 ),
        .Q(i[0]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[10] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[10]_i_1__3_n_0 ),
        .Q(i[10]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[11] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[11]_i_1__2_n_0 ),
        .Q(i[11]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[12] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[12]_i_1__2_n_0 ),
        .Q(i[12]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[13] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[13]_i_1__2_n_0 ),
        .Q(i[13]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[14] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[14]_i_1__0_n_0 ),
        .Q(i[14]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[15] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[15]_i_2__0_n_0 ),
        .Q(i[15]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[1]_i_1__13_n_0 ),
        .Q(i[1]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[2]_i_1__9_n_0 ),
        .Q(i[2]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[3]_i_1__9_n_0 ),
        .Q(i[3]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[4]_i_1__9_n_0 ),
        .Q(i[4]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[5]_i_1__8_n_0 ),
        .Q(i[5]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[6]_i_1__7_n_0 ),
        .Q(i[6]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[7]_i_1__7_n_0 ),
        .Q(i[7]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[8] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[8]_i_1__6_n_0 ),
        .Q(i[8]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[9] 
       (.C(aclk_sig),
        .CE(\i[15]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\i[9]_i_1__4_n_0 ),
        .Q(i[9]));
  (* SOFT_HLUTNM = "soft_lutpair2761" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ixRetbufCrc[1]_i_1__0 
       (.I0(\lastAXIS_tkeep_reg[3] ),
        .I1(\stateOp_reg[1] ),
        .O(\tixVController_reg[0] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2720" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \ixRetbufCrc[2]_i_1__0 
       (.I0(\lastAXIS_tkeep_reg[3] ),
        .I1(lenRet1),
        .I2(\stateOp_reg[1] ),
        .O(\tixVController_reg[0] [1]));
  LUT6 #(
    .INIT(64'h00000080FFFFFFFF)) 
    \ixRetbufCrc[5]_i_1__0 
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[3]),
        .I3(Q[0]),
        .I4(Q[4]),
        .I5(\stateOp_reg[1] ),
        .O(E));
  (* SOFT_HLUTNM = "soft_lutpair2761" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ixRetbufCrc[5]_i_2__0 
       (.I0(lenRet1),
        .I1(\stateOp_reg[1] ),
        .O(\tixVController_reg[0] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2763" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \lastAXIS_tkeep[2]_i_1 
       (.I0(\lastAXIS_tkeep_reg[3]_0 ),
        .I1(E),
        .O(\tixVCommand_reg[1] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2701" *) 
  LUT4 #(
    .INIT(16'h2EFF)) 
    \lastAXIS_tkeep[3]_i_1 
       (.I0(\lastAXIS_tkeep_reg[3]_0 ),
        .I1(\lastAXIS_tkeep_reg[3]_1 ),
        .I2(\lastAXIS_tkeep_reg[3] ),
        .I3(\stateOp_reg[1] ),
        .O(\tixVCommand_reg[1] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2775" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[0]_i_1__0 
       (.I0(\len_reg[7] [0]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2780" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[10]_i_1__0 
       (.I0(\len_reg[15] [2]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [10]));
  (* SOFT_HLUTNM = "soft_lutpair2781" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[11]_i_1__0 
       (.I0(\len_reg[15] [3]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [11]));
  (* SOFT_HLUTNM = "soft_lutpair2781" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[12]_i_1__0 
       (.I0(\len_reg[15] [4]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [12]));
  (* SOFT_HLUTNM = "soft_lutpair2782" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[13]_i_1__0 
       (.I0(\len_reg[15] [5]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [13]));
  (* SOFT_HLUTNM = "soft_lutpair2782" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[14]_i_1__0 
       (.I0(\len_reg[15] [6]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [14]));
  (* SOFT_HLUTNM = "soft_lutpair2783" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[15]_i_2 
       (.I0(\len_reg[15] [7]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [15]));
  (* SOFT_HLUTNM = "soft_lutpair2776" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[1]_i_1__0 
       (.I0(\len_reg[7] [1]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2776" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[2]_i_1__0 
       (.I0(\len_reg[7] [2]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2777" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[3]_i_1__0 
       (.I0(\len_reg[7] [3]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2777" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[4]_i_1__0 
       (.I0(\len_reg[7] [4]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2778" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[5]_i_1__0 
       (.I0(\len_reg[7] [5]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2778" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[6]_i_1__0 
       (.I0(\len_reg[7] [6]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2779" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[7]_i_1__0 
       (.I0(\len_reg[7] [7]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2779" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[8]_i_1__0 
       (.I0(\len_reg[15] [0]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [8]));
  (* SOFT_HLUTNM = "soft_lutpair2780" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \len[9]_i_1__0 
       (.I0(\len_reg[15] [1]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[5][7] [9]));
  (* SOFT_HLUTNM = "soft_lutpair2703" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][0]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[0]),
        .O(D[0]));
  (* SOFT_HLUTNM = "soft_lutpair2721" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][1]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[1]),
        .O(D[1]));
  (* SOFT_HLUTNM = "soft_lutpair2722" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][2]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[2]),
        .O(D[2]));
  (* SOFT_HLUTNM = "soft_lutpair2723" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][3]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[1]),
        .O(D[3]));
  (* SOFT_HLUTNM = "soft_lutpair2725" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][4]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[2]),
        .O(D[4]));
  (* SOFT_HLUTNM = "soft_lutpair2740" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][5]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[3]),
        .O(D[5]));
  (* SOFT_HLUTNM = "soft_lutpair2724" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][6]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[6]),
        .O(D[6]));
  (* SOFT_HLUTNM = "soft_lutpair2742" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \opbuf[0][7]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[7]),
        .O(D[7]));
  (* SOFT_HLUTNM = "soft_lutpair2712" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][0]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[4]),
        .I2(\opbuf_reg[1][0] ),
        .I3(recvAXIS_tdata[0]),
        .O(\recvAXIS_tdata_sig_reg[15]_1 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2713" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][1]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[9]),
        .I2(\opbuf_reg[1][0] ),
        .I3(rxAXIS_tdata[1]),
        .O(\recvAXIS_tdata_sig_reg[15]_1 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2714" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][2]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[5]),
        .I2(\opbuf_reg[1][0] ),
        .I3(rxAXIS_tdata[2]),
        .O(\recvAXIS_tdata_sig_reg[15]_1 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2715" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][3]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[6]),
        .I2(\opbuf_reg[1][0] ),
        .I3(recvAXIS_tdata[1]),
        .O(\recvAXIS_tdata_sig_reg[15]_1 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2716" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][4]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[12]),
        .I2(\opbuf_reg[1][0] ),
        .I3(recvAXIS_tdata[2]),
        .O(\recvAXIS_tdata_sig_reg[15]_1 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2717" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][5]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[13]),
        .I2(\opbuf_reg[1][0] ),
        .I3(recvAXIS_tdata[3]),
        .O(\recvAXIS_tdata_sig_reg[15]_1 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2718" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][6]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[7]),
        .I2(\opbuf_reg[1][0] ),
        .I3(rxAXIS_tdata[6]),
        .O(\recvAXIS_tdata_sig_reg[15]_1 [6]));
  LUT6 #(
    .INIT(64'h20000000FFFFFFFF)) 
    \opbuf[1][7]_i_1__0 
       (.I0(Q[0]),
        .I1(\opbuf_reg[1][0] ),
        .I2(rxAXIS_tvalid),
        .I3(Q[1]),
        .I4(\opbuf_reg[1][0]_0 ),
        .I5(\stateOp_reg[1] ),
        .O(\stateOp_reg[0]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2719" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[1][7]_i_2 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[8]),
        .I2(\opbuf_reg[1][0] ),
        .I3(rxAXIS_tdata[7]),
        .O(\recvAXIS_tdata_sig_reg[15]_1 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2712" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[2][0]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[16]),
        .I2(\opbuf_reg[1][0] ),
        .I3(recvAXIS_tdata[0]),
        .O(\recvAXIS_tdata_sig_reg[23]_2 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2713" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[2][1]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[17]),
        .I2(\opbuf_reg[1][0] ),
        .I3(rxAXIS_tdata[1]),
        .O(\recvAXIS_tdata_sig_reg[23]_2 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2714" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[2][2]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[18]),
        .I2(\opbuf_reg[1][0] ),
        .I3(rxAXIS_tdata[2]),
        .O(\recvAXIS_tdata_sig_reg[23]_2 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2715" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[2][3]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[19]),
        .I2(\opbuf_reg[1][0] ),
        .I3(recvAXIS_tdata[1]),
        .O(\recvAXIS_tdata_sig_reg[23]_2 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2716" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[2][4]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[20]),
        .I2(\opbuf_reg[1][0] ),
        .I3(recvAXIS_tdata[2]),
        .O(\recvAXIS_tdata_sig_reg[23]_2 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2717" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[2][5]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[21]),
        .I2(\opbuf_reg[1][0] ),
        .I3(recvAXIS_tdata[3]),
        .O(\recvAXIS_tdata_sig_reg[23]_2 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2718" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[2][6]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[22]),
        .I2(\opbuf_reg[1][0] ),
        .I3(rxAXIS_tdata[6]),
        .O(\recvAXIS_tdata_sig_reg[23]_2 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2719" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[2][7]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[23]),
        .I2(\opbuf_reg[1][0] ),
        .I3(rxAXIS_tdata[7]),
        .O(\recvAXIS_tdata_sig_reg[23]_2 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2704" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[5][0]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[4]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(recvAXIS_tdata[0]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2705" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[5][1]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[9]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(rxAXIS_tdata[1]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2706" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[5][2]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[5]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(rxAXIS_tdata[2]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2707" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[5][3]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[6]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(recvAXIS_tdata[1]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2708" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[5][4]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[12]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(recvAXIS_tdata[2]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2709" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[5][5]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[13]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(recvAXIS_tdata[3]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2710" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[5][6]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[7]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(rxAXIS_tdata[6]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2711" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[5][7]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(recvAXIS_tdata[8]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(rxAXIS_tdata[7]),
        .O(\recvAXIS_tdata_sig_reg[15]_0 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2704" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[6][0]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[16]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(recvAXIS_tdata[0]),
        .O(\recvAXIS_tdata_sig_reg[23]_1 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2705" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[6][1]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[17]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(rxAXIS_tdata[1]),
        .O(\recvAXIS_tdata_sig_reg[23]_1 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2706" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[6][2]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[18]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(rxAXIS_tdata[2]),
        .O(\recvAXIS_tdata_sig_reg[23]_1 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2707" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[6][3]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[19]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(recvAXIS_tdata[1]),
        .O(\recvAXIS_tdata_sig_reg[23]_1 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2708" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[6][4]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[20]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(recvAXIS_tdata[2]),
        .O(\recvAXIS_tdata_sig_reg[23]_1 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2709" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[6][5]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[21]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(recvAXIS_tdata[3]),
        .O(\recvAXIS_tdata_sig_reg[23]_1 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2710" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[6][6]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[22]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(rxAXIS_tdata[6]),
        .O(\recvAXIS_tdata_sig_reg[23]_1 [6]));
  LUT6 #(
    .INIT(64'h00000200FFFFFFFF)) 
    \opbuf[6][7]_i_1__0 
       (.I0(rxAXIS_tvalid),
        .I1(\opbuf_reg[6][0] ),
        .I2(Q[2]),
        .I3(Q[0]),
        .I4(\opbuf_reg[6][0]_0 ),
        .I5(\stateOp_reg[1] ),
        .O(\stateOp_reg[2]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2711" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \opbuf[6][7]_i_2 
       (.I0(\stateOp_reg[1] ),
        .I1(rxAXIS_tdata[23]),
        .I2(\opbuf_reg[6][0]_0 ),
        .I3(rxAXIS_tdata[7]),
        .O(\recvAXIS_tdata_sig_reg[23]_1 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2760" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[0][0]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[0][7] [0]),
        .O(\tixVController_reg[7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2768" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[0][1]_i_1__0 
       (.I0(\pollbuf_reg[0][7] [1]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVController_reg[7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2768" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[0][2]_i_1__0 
       (.I0(\pollbuf_reg[0][7] [2]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVController_reg[7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2769" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[0][3]_i_1__0 
       (.I0(\pollbuf_reg[0][7] [3]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVController_reg[7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2769" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[0][4]_i_1__0 
       (.I0(\pollbuf_reg[0][7] [4]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVController_reg[7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2770" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[0][5]_i_1__0 
       (.I0(\pollbuf_reg[0][7] [5]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVController_reg[7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2770" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[0][6]_i_1__0 
       (.I0(\pollbuf_reg[0][7] [6]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVController_reg[7] [6]));
  LUT6 #(
    .INIT(64'h10000000FFFFFFFF)) 
    \pollbuf[0][7]_i_1 
       (.I0(Q[3]),
        .I1(Q[4]),
        .I2(Q[2]),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(\stateOp_reg[1] ),
        .O(\stateOp_reg[3]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2771" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[0][7]_i_2__0 
       (.I0(\pollbuf_reg[0][7] [7]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVController_reg[7] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2764" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[1][0]_i_1__0 
       (.I0(\pollbuf_reg[1][7] [0]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVCommand_reg[7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2764" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[1][1]_i_1__0 
       (.I0(\pollbuf_reg[1][7] [1]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVCommand_reg[7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2765" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[1][2]_i_1__0 
       (.I0(\pollbuf_reg[1][7] [2]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVCommand_reg[7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2765" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[1][3]_i_1__0 
       (.I0(\pollbuf_reg[1][7] [3]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVCommand_reg[7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2766" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[1][4]_i_1__0 
       (.I0(\pollbuf_reg[1][7] [4]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVCommand_reg[7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2766" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[1][5]_i_1__0 
       (.I0(\pollbuf_reg[1][7] [5]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVCommand_reg[7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2767" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[1][6]_i_1__0 
       (.I0(\pollbuf_reg[1][7] [6]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVCommand_reg[7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2767" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[1][7]_i_1__0 
       (.I0(\pollbuf_reg[1][7] [7]),
        .I1(\stateOp_reg[1] ),
        .O(\tixVCommand_reg[7] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2753" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[4][0]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [8]),
        .O(\crc_imd_reg[15] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2754" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[4][1]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [9]),
        .O(\crc_imd_reg[15] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2755" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[4][2]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [10]),
        .O(\crc_imd_reg[15] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2700" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[4][3]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [11]),
        .O(\crc_imd_reg[15] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2757" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[4][4]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [12]),
        .O(\crc_imd_reg[15] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2758" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[4][5]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [13]),
        .O(\crc_imd_reg[15] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2759" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[4][6]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [14]),
        .O(\crc_imd_reg[15] [6]));
  LUT6 #(
    .INIT(64'h00000008FFFFFFFF)) 
    \pollbuf[4][7]_i_1 
       (.I0(Q[3]),
        .I1(Q[1]),
        .I2(Q[4]),
        .I3(Q[0]),
        .I4(Q[2]),
        .I5(\stateOp_reg[1] ),
        .O(\stateOp_reg[3]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2699" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[4][7]_i_2 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [15]),
        .O(\crc_imd_reg[15] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2753" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[5][0]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [0]),
        .O(\crc_imd_reg[7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2754" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[5][1]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [1]),
        .O(\crc_imd_reg[7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2755" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[5][2]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [2]),
        .O(\crc_imd_reg[7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2756" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[5][3]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [3]),
        .O(\crc_imd_reg[7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2756" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[5][4]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [4]),
        .O(\crc_imd_reg[7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2757" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[5][5]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [5]),
        .O(\crc_imd_reg[7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2758" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[5][6]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [6]),
        .O(\crc_imd_reg[7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2759" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pollbuf[5][7]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\pollbuf_reg[4][7] [7]),
        .O(\crc_imd_reg[7] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2744" *) 
  LUT3 #(
    .INIT(8'hC8)) 
    \recvAXIL_rdata[31]_i_1 
       (.I0(\recvAXIL_rdata[31]_i_2_n_0 ),
        .I1(p_1_in0),
        .I2(\recvAXIL_rdata_reg_n_0_[31] ),
        .O(\recvAXIL_rdata[31]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000400000000)) 
    \recvAXIL_rdata[31]_i_2 
       (.I0(AXIL_araddr_sig[4]),
        .I1(strbRead),
        .I2(stateRecv[0]),
        .I3(AXIL_araddr_sig[5]),
        .I4(stateRecv[2]),
        .I5(stateRecv[1]),
        .O(\recvAXIL_rdata[31]_i_2_n_0 ));
  FDCE \recvAXIL_rdata_reg[31] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIL_rdata[31]_i_1_n_0 ),
        .Q(\recvAXIL_rdata_reg_n_0_[31] ));
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[0]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[0] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2728" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[10]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[10] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[10]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2813" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[11]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[11] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[11]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2812" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[12]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[12] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[12]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2733" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[13]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[13] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[13]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2812" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[14]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[14] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[14]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2811" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[15]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[15] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[15]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2811" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[16]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[16] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[16]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2810" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[17]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[17] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[17]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2810" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[18]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[18] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[18]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2809" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[19]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[19] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[19]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2735" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[1]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[1] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2809" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[20]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[20] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[20]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2732" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[21]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[21] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[21]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2727" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[22]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[22] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[22]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2808" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[23]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[23] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[23]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2808" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[24]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[24] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[24]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2734" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[25]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[25] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[25]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2730" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[26]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[26] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[26]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2807" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[27]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[27] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[27]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2807" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[28]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[28] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[28]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2806" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[29]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[29] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[29]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2816" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[2]_i_1__0 
       (.I0(p_0_in[0]),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2806" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[30]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[30] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[30]_i_1__0_n_0 ));
  LUT3 #(
    .INIT(8'hD5)) 
    \recvAXIS_tdata_sig[31]_i_1__0 
       (.I0(p_1_in0),
        .I1(\stateRecv[2]_i_4__0_n_0 ),
        .I2(stateRecv[0]),
        .O(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2697" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[31]_i_2 
       (.I0(\AXIL_wdata_sig_reg_n_0_[31] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[31]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2816" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[3]_i_1__0 
       (.I0(p_0_in[1]),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[3]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2815" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[4]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[4] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[4]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2815" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[5]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[5] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[5]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2814" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[6]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[6] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[6]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2814" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[7]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[7] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[7]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2729" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[8]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[8] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[8]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2813" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \recvAXIS_tdata_sig[9]_i_1__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[9] ),
        .I1(p_1_in0),
        .O(\recvAXIS_tdata_sig[9]_i_1__0_n_0 ));
  FDCE \recvAXIS_tdata_sig_reg[0] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[0]_i_1__0_n_0 ),
        .Q(recvAXIS_tdata[0]));
  FDCE \recvAXIS_tdata_sig_reg[10] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[10]_i_1__0_n_0 ),
        .Q(recvAXIS_tdata[5]));
  FDCE \recvAXIS_tdata_sig_reg[11] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[11]_i_1__0_n_0 ),
        .Q(recvAXIS_tdata[6]));
  FDCE \recvAXIS_tdata_sig_reg[12] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[12]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[12]));
  FDCE \recvAXIS_tdata_sig_reg[13] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[13]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[13]));
  FDCE \recvAXIS_tdata_sig_reg[14] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[14]_i_1__0_n_0 ),
        .Q(recvAXIS_tdata[7]));
  FDCE \recvAXIS_tdata_sig_reg[15] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[15]_i_1__0_n_0 ),
        .Q(recvAXIS_tdata[8]));
  FDCE \recvAXIS_tdata_sig_reg[16] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[16]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[16]));
  FDCE \recvAXIS_tdata_sig_reg[17] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[17]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[17]));
  FDCE \recvAXIS_tdata_sig_reg[18] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[18]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[18]));
  FDCE \recvAXIS_tdata_sig_reg[19] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[19]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[19]));
  FDCE \recvAXIS_tdata_sig_reg[1] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[1]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[1]));
  FDCE \recvAXIS_tdata_sig_reg[20] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[20]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[20]));
  FDCE \recvAXIS_tdata_sig_reg[21] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[21]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[21]));
  FDCE \recvAXIS_tdata_sig_reg[22] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[22]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[22]));
  FDCE \recvAXIS_tdata_sig_reg[23] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[23]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[23]));
  FDCE \recvAXIS_tdata_sig_reg[24] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[24]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[24]));
  FDCE \recvAXIS_tdata_sig_reg[25] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[25]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[25]));
  FDCE \recvAXIS_tdata_sig_reg[26] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[26]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[26]));
  FDCE \recvAXIS_tdata_sig_reg[27] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[27]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[27]));
  FDCE \recvAXIS_tdata_sig_reg[28] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[28]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[28]));
  FDCE \recvAXIS_tdata_sig_reg[29] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[29]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[29]));
  FDCE \recvAXIS_tdata_sig_reg[2] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[2]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[2]));
  FDCE \recvAXIS_tdata_sig_reg[30] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[30]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[30]));
  FDCE \recvAXIS_tdata_sig_reg[31] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[31]_i_2_n_0 ),
        .Q(rxAXIS_tdata[31]));
  FDCE \recvAXIS_tdata_sig_reg[3] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[3]_i_1__0_n_0 ),
        .Q(recvAXIS_tdata[1]));
  FDCE \recvAXIS_tdata_sig_reg[4] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[4]_i_1__0_n_0 ),
        .Q(recvAXIS_tdata[2]));
  FDCE \recvAXIS_tdata_sig_reg[5] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[5]_i_1__0_n_0 ),
        .Q(recvAXIS_tdata[3]));
  FDCE \recvAXIS_tdata_sig_reg[6] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[6]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[6]));
  FDCE \recvAXIS_tdata_sig_reg[7] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[7]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[7]));
  FDCE \recvAXIS_tdata_sig_reg[8] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[8]_i_1__0_n_0 ),
        .Q(recvAXIS_tdata[4]));
  FDCE \recvAXIS_tdata_sig_reg[9] 
       (.C(aclk_sig),
        .CE(\recvAXIS_tdata_sig[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\recvAXIS_tdata_sig[9]_i_1__0_n_0 ),
        .Q(rxAXIS_tdata[9]));
  LUT3 #(
    .INIT(8'h01)) 
    recvAXIS_tlast_sig_i_10__0
       (.I0(\wordcnt_reg[13]__0_n_0 ),
        .I1(\wordcnt_reg[14]__0_n_0 ),
        .I2(\wordcnt_reg[12]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_10__0_n_0));
  LUT3 #(
    .INIT(8'h01)) 
    recvAXIS_tlast_sig_i_11__0
       (.I0(\wordcnt_reg[10]__0_n_0 ),
        .I1(\wordcnt_reg[11]__0_n_0 ),
        .I2(\wordcnt_reg[9]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_11__0_n_0));
  LUT3 #(
    .INIT(8'h01)) 
    recvAXIS_tlast_sig_i_12__0
       (.I0(\wordcnt_reg[7]__0_n_0 ),
        .I1(\wordcnt_reg[8]__0_n_0 ),
        .I2(\wordcnt_reg[6]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_12__0_n_0));
  LUT5 #(
    .INIT(32'h00101101)) 
    recvAXIS_tlast_sig_i_13__0
       (.I0(\wordcnt_reg[4]__0_n_0 ),
        .I1(\wordcnt_reg[5]__0_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_3__0_0[2]),
        .I3(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I4(\wordcnt_reg[3]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_13__0_n_0));
  LUT6 #(
    .INIT(64'h000000002D00002D)) 
    recvAXIS_tlast_sig_i_14__0
       (.I0(recvAXIS_tlast_sig_reg_i_3__0_0[0]),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(\wordcnt_reg[0]__0_n_0 ),
        .I3(\wordcnt_reg[1]__0_n_0 ),
        .I4(len),
        .I5(\wordcnt_reg[2]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_14__0_n_0));
  LUT5 #(
    .INIT(32'hAAAA8000)) 
    recvAXIS_tlast_sig_i_1__0
       (.I0(p_1_in0),
        .I1(\stateRecv[2]_i_4__0_n_0 ),
        .I2(stateRecv[0]),
        .I3(recvAXIS_tlast_sig0),
        .I4(recvAXIS_tlast),
        .O(recvAXIS_tlast_sig_i_1__0_n_0));
  LUT1 #(
    .INIT(2'h1)) 
    recvAXIS_tlast_sig_i_4__0
       (.I0(\wordcnt_reg[30]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_4__0_n_0));
  LUT3 #(
    .INIT(8'h01)) 
    recvAXIS_tlast_sig_i_5__0
       (.I0(\wordcnt_reg[28]__0_n_0 ),
        .I1(\wordcnt_reg[29]__0_n_0 ),
        .I2(\wordcnt_reg[27]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_5__0_n_0));
  LUT3 #(
    .INIT(8'h01)) 
    recvAXIS_tlast_sig_i_6__0
       (.I0(\wordcnt_reg[25]__0_n_0 ),
        .I1(\wordcnt_reg[26]__0_n_0 ),
        .I2(\wordcnt_reg[24]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_6__0_n_0));
  LUT3 #(
    .INIT(8'h01)) 
    recvAXIS_tlast_sig_i_7__0
       (.I0(\wordcnt_reg[22]__0_n_0 ),
        .I1(\wordcnt_reg[23]__0_n_0 ),
        .I2(\wordcnt_reg[21]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_7__0_n_0));
  LUT3 #(
    .INIT(8'h01)) 
    recvAXIS_tlast_sig_i_8__0
       (.I0(\wordcnt_reg[19]__0_n_0 ),
        .I1(\wordcnt_reg[20]__0_n_0 ),
        .I2(\wordcnt_reg[18]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_8__0_n_0));
  LUT3 #(
    .INIT(8'h01)) 
    recvAXIS_tlast_sig_i_9__0
       (.I0(\wordcnt_reg[16]__0_n_0 ),
        .I1(\wordcnt_reg[17]__0_n_0 ),
        .I2(\wordcnt_reg[15]__0_n_0 ),
        .O(recvAXIS_tlast_sig_i_9__0_n_0));
  FDCE recvAXIS_tlast_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(recvAXIS_tlast_sig_i_1__0_n_0),
        .Q(recvAXIS_tlast));
  CARRY8 recvAXIS_tlast_sig_reg_i_2__0
       (.CI(recvAXIS_tlast_sig_reg_i_3__0_n_0),
        .CI_TOP(1'b0),
        .CO({NLW_recvAXIS_tlast_sig_reg_i_2__0_CO_UNCONNECTED[7:3],recvAXIS_tlast_sig0,recvAXIS_tlast_sig_reg_i_2__0_n_6,recvAXIS_tlast_sig_reg_i_2__0_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(NLW_recvAXIS_tlast_sig_reg_i_2__0_O_UNCONNECTED[7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,recvAXIS_tlast_sig_i_4__0_n_0,recvAXIS_tlast_sig_i_5__0_n_0,recvAXIS_tlast_sig_i_6__0_n_0}));
  CARRY8 recvAXIS_tlast_sig_reg_i_3__0
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({recvAXIS_tlast_sig_reg_i_3__0_n_0,recvAXIS_tlast_sig_reg_i_3__0_n_1,recvAXIS_tlast_sig_reg_i_3__0_n_2,recvAXIS_tlast_sig_reg_i_3__0_n_3,recvAXIS_tlast_sig_reg_i_3__0_n_4,recvAXIS_tlast_sig_reg_i_3__0_n_5,recvAXIS_tlast_sig_reg_i_3__0_n_6,recvAXIS_tlast_sig_reg_i_3__0_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(NLW_recvAXIS_tlast_sig_reg_i_3__0_O_UNCONNECTED[7:0]),
        .S({recvAXIS_tlast_sig_i_7__0_n_0,recvAXIS_tlast_sig_i_8__0_n_0,recvAXIS_tlast_sig_i_9__0_n_0,recvAXIS_tlast_sig_i_10__0_n_0,recvAXIS_tlast_sig_i_11__0_n_0,recvAXIS_tlast_sig_i_12__0_n_0,recvAXIS_tlast_sig_i_13__0_n_0,recvAXIS_tlast_sig_i_14__0_n_0}));
  LUT4 #(
    .INIT(16'hB080)) 
    recvStrbToStart_i_1__0
       (.I0(\stateRecv[2]_i_5__0_n_0 ),
        .I1(recvStrbToStart_i_2__0_n_0),
        .I2(p_1_in0),
        .I3(recvStrbToStart_reg_n_0),
        .O(recvStrbToStart_i_1__0_n_0));
  LUT5 #(
    .INIT(32'h3E2E3F3F)) 
    recvStrbToStart_i_2__0
       (.I0(\wordcnt[0]__0_i_4__0_n_0 ),
        .I1(stateRecv[1]),
        .I2(stateRecv[2]),
        .I3(stateRecv[0]),
        .I4(\stateRecv[2]_i_9_n_0 ),
        .O(recvStrbToStart_i_2__0_n_0));
  FDCE recvStrbToStart_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(recvStrbToStart_i_1__0_n_0),
        .Q(recvStrbToStart_reg_n_0));
  LUT6 #(
    .INIT(64'h0C080CFF0C080C00)) 
    recvStrbToStop_i_1__0
       (.I0(\stateRecv[2]_i_4__0_n_0 ),
        .I1(stateRecv[0]),
        .I2(recvStrbToStop_i_2__0_n_0),
        .I3(\stateRecv[2]_i_6_n_0 ),
        .I4(recvStrbToStop_i_3__0_n_0),
        .I5(recvStrbToStop_reg_n_0),
        .O(recvStrbToStop_i_1__0_n_0));
  LUT6 #(
    .INIT(64'h7F000000FFFFFFFF)) 
    recvStrbToStop_i_2__0
       (.I0(stateRecv[0]),
        .I1(stateRecv[2]),
        .I2(stateRecv[1]),
        .I3(stateTo[1]),
        .I4(stateTo[0]),
        .I5(\stateRecv[2]_i_7__0_n_0 ),
        .O(recvStrbToStop_i_2__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2697" *) 
  LUT4 #(
    .INIT(16'hDFD5)) 
    recvStrbToStop_i_3__0
       (.I0(p_1_in0),
        .I1(\stateRecv[2]_i_4__0_n_0 ),
        .I2(stateRecv[0]),
        .I3(stateRecv[2]),
        .O(recvStrbToStop_i_3__0_n_0));
  FDCE recvStrbToStop_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(recvStrbToStop_i_1__0_n_0),
        .Q(recvStrbToStop_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2701" *) 
  LUT3 #(
    .INIT(8'h2A)) 
    \resid[0]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\lastAXIS_tkeep_reg[3]_1 ),
        .I2(\lastAXIS_tkeep_reg[3] ),
        .O(\tixVCommand_reg[1]_0 [0]));
  LUT6 #(
    .INIT(64'h10080000FFFFFFFF)) 
    \resid[1]_i_1 
       (.I0(Q[4]),
        .I1(Q[0]),
        .I2(Q[3]),
        .I3(Q[1]),
        .I4(Q[2]),
        .I5(\stateOp_reg[1] ),
        .O(\stateOp_reg[4] ));
  (* SOFT_HLUTNM = "soft_lutpair2763" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \resid[1]_i_2__0 
       (.I0(\lastAXIS_tkeep_reg[3]_0 ),
        .I1(E),
        .O(\tixVCommand_reg[1]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2678" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \retbuf[0][0]_i_2__0 
       (.I0(\retbuf_reg[5][5] ),
        .I1(\stateOp_reg[1] ),
        .O(\stateOp_reg[0] ));
  LUT6 #(
    .INIT(64'h0000000000002000)) 
    \retbuf[0][2]_i_2__0 
       (.I0(\stateOp_reg[1] ),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\stateOp_reg[0]_3 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00000008)) 
    \retbuf[0][7]_i_1 
       (.I0(\retbuf_reg[36][7]_0 ),
        .I1(\txAXIS_tdata_reg[15] [0]),
        .I2(\retbuf_reg[36][7] [1]),
        .I3(\retbuf_reg[36][7] [2]),
        .I4(\retbuf_reg[36][7] [0]),
        .I5(\tixVController_reg[1] ),
        .O(\resid_reg[0]_3 ));
  LUT5 #(
    .INIT(32'h00E0E0E0)) 
    \retbuf[1][0]_i_1__0 
       (.I0(\retbuf_reg[5][5] ),
        .I1(\retbuf_reg[1][7] [8]),
        .I2(\stateOp_reg[1] ),
        .I3(\retbuf_reg[5][5]_0 ),
        .I4(\retbuf_reg[1][0] ),
        .O(\tkst_reg[31] [0]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[1][1]_i_1__0 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[1][7] [9]),
        .I2(\pollbuf_reg[4][7] [1]),
        .I3(\retbuf_reg[1][7]_0 ),
        .I4(\pollbuf_reg[4][7] [9]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\tkst_reg[31] [1]));
  LUT5 #(
    .INIT(32'h00E0E0E0)) 
    \retbuf[1][2]_i_1__0 
       (.I0(\retbuf_reg[5][5] ),
        .I1(\retbuf_reg[1][7] [10]),
        .I2(\stateOp_reg[1] ),
        .I3(\retbuf_reg[5][5]_0 ),
        .I4(\retbuf_reg[1][2] ),
        .O(\tkst_reg[31] [2]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[1][3]_i_1__0 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[1][7] [11]),
        .I2(\pollbuf_reg[4][7] [3]),
        .I3(\retbuf_reg[1][7]_0 ),
        .I4(\pollbuf_reg[4][7] [11]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\tkst_reg[31] [3]));
  LUT5 #(
    .INIT(32'h00E0E0E0)) 
    \retbuf[1][4]_i_1__0 
       (.I0(\retbuf_reg[5][5] ),
        .I1(\retbuf_reg[1][7] [12]),
        .I2(\stateOp_reg[1] ),
        .I3(\retbuf_reg[5][5]_0 ),
        .I4(\retbuf_reg[1][4] ),
        .O(\tkst_reg[31] [4]));
  LUT5 #(
    .INIT(32'h00E0E0E0)) 
    \retbuf[1][5]_i_1__0 
       (.I0(\retbuf_reg[5][5] ),
        .I1(\retbuf_reg[1][7] [13]),
        .I2(\stateOp_reg[1] ),
        .I3(\retbuf_reg[5][5]_0 ),
        .I4(\retbuf_reg[1][5] ),
        .O(\tkst_reg[31] [5]));
  LUT5 #(
    .INIT(32'h00E0E0E0)) 
    \retbuf[1][6]_i_1__0 
       (.I0(\retbuf_reg[5][5] ),
        .I1(\retbuf_reg[1][7] [14]),
        .I2(\stateOp_reg[1] ),
        .I3(\retbuf_reg[5][5]_0 ),
        .I4(\retbuf_reg[1][6] ),
        .O(\tkst_reg[31] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2681" *) 
  LUT5 #(
    .INIT(32'hAAAAAAAE)) 
    \retbuf[1][7]_i_1__0 
       (.I0(\tixVController_reg[1] ),
        .I1(\retbuf_reg[36][7]_0 ),
        .I2(\retbuf_reg[36][7] [1]),
        .I3(\retbuf_reg[36][7] [2]),
        .I4(\retbuf_reg[36][7] [0]),
        .O(\ixRetbufCrc_reg[2]_3 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[1][7]_i_2__0 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[1][7] [15]),
        .I2(\pollbuf_reg[4][7] [7]),
        .I3(\retbuf_reg[1][7]_0 ),
        .I4(\pollbuf_reg[4][7] [15]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\tkst_reg[31] [7]));
  LUT6 #(
    .INIT(64'h11151111FFFFFFFF)) 
    \retbuf[2][7]_i_1__0 
       (.I0(\retbuf_reg[14][4] ),
        .I1(\retbuf_reg[14][4]_0 ),
        .I2(\retbuf_reg[2][7] ),
        .I3(\pollbuf_reg[0][7] [1]),
        .I4(\pollbuf_reg[0][7] [2]),
        .I5(\stateOp_reg[1] ),
        .O(\tixVController_reg[1] ));
  (* SOFT_HLUTNM = "soft_lutpair2740" *) 
  LUT3 #(
    .INIT(8'h1F)) 
    \retbuf[31][0]_i_1__0 
       (.I0(\retbuf_reg[14][4] ),
        .I1(\retbuf_reg[14][4]_0 ),
        .I2(\stateOp_reg[1] ),
        .O(\tixVController_reg[0]_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00000800)) 
    \retbuf[32][7]_i_1__0 
       (.I0(\txAXIS_tdata_reg[15] [0]),
        .I1(\retbuf_reg[36][7]_0 ),
        .I2(\retbuf_reg[36][7] [1]),
        .I3(\retbuf_reg[36][7] [2]),
        .I4(\retbuf_reg[36][7] [0]),
        .I5(\tixVController_reg[0]_0 ),
        .O(\resid_reg[0]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2680" *) 
  LUT5 #(
    .INIT(32'hFFFF0020)) 
    \retbuf[33][7]_i_1__0 
       (.I0(\retbuf_reg[36][7]_0 ),
        .I1(\retbuf_reg[36][7] [1]),
        .I2(\retbuf_reg[36][7] [2]),
        .I3(\retbuf_reg[36][7] [0]),
        .I4(\tixVController_reg[0]_0 ),
        .O(\ixRetbufCrc_reg[2] ));
  LUT6 #(
    .INIT(64'hAAEAAAAAAAAAAAAA)) 
    \retbuf[35][7]_i_1__0 
       (.I0(\tixVController_reg[0]_0 ),
        .I1(\retbuf_reg[36][7] [0]),
        .I2(\retbuf_reg[36][7] [2]),
        .I3(\retbuf_reg[36][7] [1]),
        .I4(\retbuf_reg[36][7]_0 ),
        .I5(\txAXIS_tdata_reg[15] [0]),
        .O(\ixRetbufCrc_reg[1] ));
  LUT6 #(
    .INIT(64'h0C800000FFFFFFFF)) 
    \retbuf[36][7]_i_1__0 
       (.I0(\txAXIS_tdata_reg[15] [0]),
        .I1(\retbuf_reg[36][7] [2]),
        .I2(\retbuf_reg[36][7] [1]),
        .I3(\retbuf_reg[36][7] [0]),
        .I4(\retbuf_reg[36][7]_0 ),
        .I5(\stateOp_reg[1] ),
        .O(\resid_reg[0] ));
  LUT5 #(
    .INIT(32'h55D55555)) 
    \retbuf[37][7]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\retbuf_reg[36][7] [2]),
        .I2(\retbuf_reg[36][7] [1]),
        .I3(\retbuf_reg[36][7] [0]),
        .I4(\retbuf_reg[36][7]_0 ),
        .O(\ixRetbufCrc_reg[5]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2679" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \retbuf[38][7]_i_1 
       (.I0(\stateOp_reg[1] ),
        .O(\stateOp_reg[1]_4 ));
  LUT6 #(
    .INIT(64'h55555555D5555555)) 
    \retbuf[39][7]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\retbuf_reg[36][7] [2]),
        .I2(\retbuf_reg[36][7] [1]),
        .I3(\retbuf_reg[36][7] [0]),
        .I4(Q[1]),
        .I5(\retbuf_reg[39][0] ),
        .O(\ixRetbufCrc_reg[5]_1 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAEAAAAA)) 
    \retbuf[3][7]_i_1 
       (.I0(\tixVController_reg[1] ),
        .I1(\txAXIS_tdata_reg[15] [0]),
        .I2(\retbuf_reg[36][7]_0 ),
        .I3(\retbuf_reg[36][7] [2]),
        .I4(\retbuf_reg[36][7] [0]),
        .I5(\retbuf_reg[36][7] [1]),
        .O(\resid_reg[0]_2 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[4][0]_i_1__0 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[1][7] [0]),
        .I2(\pollbuf_reg[4][7] [0]),
        .I3(\retbuf_reg[4][7] ),
        .I4(\pollbuf_reg[4][7] [8]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\tkst_reg[7] [0]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[4][1]_i_1__0 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[1][7] [1]),
        .I2(\pollbuf_reg[4][7] [1]),
        .I3(\retbuf_reg[4][7] ),
        .I4(\pollbuf_reg[4][7] [9]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\tkst_reg[7] [1]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[4][2]_i_1__0 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[1][7] [2]),
        .I2(\pollbuf_reg[4][7] [2]),
        .I3(\retbuf_reg[4][7] ),
        .I4(\pollbuf_reg[4][7] [10]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\tkst_reg[7] [2]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[4][3]_i_1__0 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[1][7] [3]),
        .I2(\pollbuf_reg[4][7] [3]),
        .I3(\retbuf_reg[4][7] ),
        .I4(\pollbuf_reg[4][7] [11]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\tkst_reg[7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2679" *) 
  LUT5 #(
    .INIT(32'h00E0E0E0)) 
    \retbuf[4][4]_i_1__0 
       (.I0(\retbuf_reg[5][5] ),
        .I1(\retbuf_reg[1][7] [4]),
        .I2(\stateOp_reg[1] ),
        .I3(\retbuf_reg[5][5]_0 ),
        .I4(\retbuf_reg[4][4] ),
        .O(\tkst_reg[7] [4]));
  LUT5 #(
    .INIT(32'h00E0E0E0)) 
    \retbuf[4][5]_i_1__0 
       (.I0(\retbuf_reg[5][5] ),
        .I1(\retbuf_reg[1][7] [5]),
        .I2(\stateOp_reg[1] ),
        .I3(\retbuf_reg[5][5]_0 ),
        .I4(\retbuf_reg[4][5] ),
        .O(\tkst_reg[7] [5]));
  LUT5 #(
    .INIT(32'h00E0E0E0)) 
    \retbuf[4][6]_i_1__0 
       (.I0(\retbuf_reg[5][5] ),
        .I1(\retbuf_reg[1][7] [6]),
        .I2(\stateOp_reg[1] ),
        .I3(\retbuf_reg[5][5]_0 ),
        .I4(\retbuf_reg[4][6] ),
        .O(\tkst_reg[7] [6]));
  LUT6 #(
    .INIT(64'hABAEAAAAABAAAAAA)) 
    \retbuf[4][7]_i_1 
       (.I0(\tixVController_reg[1] ),
        .I1(\retbuf_reg[36][7] [1]),
        .I2(\retbuf_reg[36][7] [2]),
        .I3(\retbuf_reg[36][7] [0]),
        .I4(\retbuf_reg[36][7]_0 ),
        .I5(\txAXIS_tdata_reg[15] [0]),
        .O(\ixRetbufCrc_reg[2]_2 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[4][7]_i_2__0 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[1][7] [7]),
        .I2(\pollbuf_reg[4][7] [7]),
        .I3(\retbuf_reg[4][7] ),
        .I4(\pollbuf_reg[4][7] [15]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\tkst_reg[7] [7]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[5][0]_i_1 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[5][7] [0]),
        .I2(\pollbuf_reg[4][7] [0]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\pollbuf_reg[4][7] [8]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\scoreMin_reg[7] [0]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[5][1]_i_1 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[5][7] [1]),
        .I2(\pollbuf_reg[4][7] [1]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\pollbuf_reg[4][7] [9]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\scoreMin_reg[7] [1]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[5][2]_i_1 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[5][7] [2]),
        .I2(\pollbuf_reg[4][7] [2]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\pollbuf_reg[4][7] [10]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\scoreMin_reg[7] [2]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[5][3]_i_1 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[5][7] [3]),
        .I2(\pollbuf_reg[4][7] [3]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\pollbuf_reg[4][7] [11]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\scoreMin_reg[7] [3]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[5][4]_i_1 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[5][7] [4]),
        .I2(\pollbuf_reg[4][7] [4]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\pollbuf_reg[4][7] [12]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\scoreMin_reg[7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2678" *) 
  LUT5 #(
    .INIT(32'h00E0E0E0)) 
    \retbuf[5][5]_i_1 
       (.I0(\retbuf_reg[5][5] ),
        .I1(\retbuf_reg[5][7] [5]),
        .I2(\stateOp_reg[1] ),
        .I3(\retbuf_reg[5][5]_0 ),
        .I4(\retbuf_reg[5][5]_1 ),
        .O(\scoreMin_reg[7] [5]));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[5][6]_i_1 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[5][7] [6]),
        .I2(\pollbuf_reg[4][7] [6]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\pollbuf_reg[4][7] [14]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\scoreMin_reg[7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2681" *) 
  LUT5 #(
    .INIT(32'hAAAEAAAA)) 
    \retbuf[5][7]_i_1__0 
       (.I0(\tixVController_reg[1] ),
        .I1(\retbuf_reg[36][7] [1]),
        .I2(\retbuf_reg[36][7] [2]),
        .I3(\retbuf_reg[36][7] [0]),
        .I4(\retbuf_reg[36][7]_0 ),
        .O(\ixRetbufCrc_reg[2]_1 ));
  LUT6 #(
    .INIT(64'hF4FFF44444444444)) 
    \retbuf[5][7]_i_2 
       (.I0(\stateOp_reg[0] ),
        .I1(\retbuf_reg[5][7] [7]),
        .I2(\pollbuf_reg[4][7] [7]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\pollbuf_reg[4][7] [15]),
        .I5(\stateOp_reg[0]_3 ),
        .O(\scoreMin_reg[7] [7]));
  LUT6 #(
    .INIT(64'hFFFF2000FFFF0000)) 
    \retbuf[7][7]_i_1 
       (.I0(\retbuf_reg[36][7]_0 ),
        .I1(\retbuf_reg[36][7] [2]),
        .I2(\retbuf_reg[36][7] [0]),
        .I3(\retbuf_reg[36][7] [1]),
        .I4(\tixVController_reg[0]_0 ),
        .I5(\txAXIS_tdata_reg[15] [0]),
        .O(\ixRetbufCrc_reg[5] ));
  (* SOFT_HLUTNM = "soft_lutpair2680" *) 
  LUT5 #(
    .INIT(32'hAAEAAAAA)) 
    \retbuf[8][7]_i_1__0 
       (.I0(\tixVController_reg[0]_0 ),
        .I1(\retbuf_reg[36][7] [1]),
        .I2(\retbuf_reg[36][7] [0]),
        .I3(\retbuf_reg[36][7] [2]),
        .I4(\retbuf_reg[36][7]_0 ),
        .O(\ixRetbufCrc_reg[2]_0 ));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[0]_INST_0 
       (.I0(sendAXIL_rdata[0]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[0]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[10]_INST_0 
       (.I0(sendAXIL_rdata[10]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[10]));
  (* SOFT_HLUTNM = "soft_lutpair2750" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[11]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[11]),
        .O(rpuAXIL_rdata[11]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[12]_INST_0 
       (.I0(sendAXIL_rdata[12]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[12]));
  (* SOFT_HLUTNM = "soft_lutpair2749" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[13]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[13]),
        .O(rpuAXIL_rdata[13]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[14]_INST_0 
       (.I0(sendAXIL_rdata[14]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[14]));
  (* SOFT_HLUTNM = "soft_lutpair2749" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[15]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[15]),
        .O(rpuAXIL_rdata[15]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[16]_INST_0 
       (.I0(sendAXIL_rdata[16]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[16]));
  (* SOFT_HLUTNM = "soft_lutpair2748" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[17]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[17]),
        .O(rpuAXIL_rdata[17]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[18]_INST_0 
       (.I0(sendAXIL_rdata[18]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[18]));
  (* SOFT_HLUTNM = "soft_lutpair2748" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[19]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[19]),
        .O(rpuAXIL_rdata[19]));
  (* SOFT_HLUTNM = "soft_lutpair2752" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[1]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[1]),
        .O(rpuAXIL_rdata[1]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[20]_INST_0 
       (.I0(sendAXIL_rdata[20]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[20]));
  (* SOFT_HLUTNM = "soft_lutpair2747" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[21]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[21]),
        .O(rpuAXIL_rdata[21]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[22]_INST_0 
       (.I0(sendAXIL_rdata[22]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[22]));
  (* SOFT_HLUTNM = "soft_lutpair2747" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[23]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[23]),
        .O(rpuAXIL_rdata[23]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[24]_INST_0 
       (.I0(sendAXIL_rdata[24]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[24]));
  (* SOFT_HLUTNM = "soft_lutpair2746" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[25]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[25]),
        .O(rpuAXIL_rdata[25]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[26]_INST_0 
       (.I0(sendAXIL_rdata[26]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[26]));
  (* SOFT_HLUTNM = "soft_lutpair2746" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[27]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[27]),
        .O(rpuAXIL_rdata[27]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[28]_INST_0 
       (.I0(sendAXIL_rdata[28]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[28]));
  (* SOFT_HLUTNM = "soft_lutpair2744" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[29]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[29]),
        .O(rpuAXIL_rdata[29]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[2]_INST_0 
       (.I0(sendAXIL_rdata[2]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[2]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[30]_INST_0 
       (.I0(sendAXIL_rdata[30]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[30]));
  (* SOFT_HLUTNM = "soft_lutpair2743" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[31]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[31]),
        .O(rpuAXIL_rdata[31]));
  (* SOFT_HLUTNM = "soft_lutpair2684" *) 
  LUT5 #(
    .INIT(32'hFE40F05F)) 
    \rpuAXIL_rdata[31]_INST_0_i_1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[4]),
        .I4(Q[3]),
        .O(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2752" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[3]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[3]),
        .O(rpuAXIL_rdata[3]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[4]_INST_0 
       (.I0(sendAXIL_rdata[4]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[4]));
  (* SOFT_HLUTNM = "soft_lutpair2751" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[5]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[5]),
        .O(rpuAXIL_rdata[5]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[6]_INST_0 
       (.I0(sendAXIL_rdata[6]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[6]));
  (* SOFT_HLUTNM = "soft_lutpair2751" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[7]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[7]),
        .O(rpuAXIL_rdata[7]));
  LUT6 #(
    .INIT(64'h0A280A28002808A8)) 
    \rpuAXIL_rdata[8]_INST_0 
       (.I0(sendAXIL_rdata[8]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(rpuAXIL_rdata[8]));
  (* SOFT_HLUTNM = "soft_lutpair2750" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rpuAXIL_rdata[9]_INST_0 
       (.I0(\recvAXIL_rdata_reg_n_0_[31] ),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(sendAXIL_rdata[9]),
        .O(rpuAXIL_rdata[9]));
  LUT5 #(
    .INIT(32'hAABFAA80)) 
    \rxlen[1]_i_1 
       (.I0(\rxlen[1]_i_2_n_0 ),
        .I1(\rxlen_reg[1]_0 ),
        .I2(\rxlen[1]_i_4_n_0 ),
        .I3(\rxlen[1]_i_5_n_0 ),
        .I4(rxlen),
        .O(\rxlen_reg[1] ));
  LUT6 #(
    .INIT(64'h0000010000000000)) 
    \rxlen[1]_i_2 
       (.I0(Q[3]),
        .I1(Q[2]),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[4]),
        .I5(\stateOp_reg[1] ),
        .O(\rxlen[1]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2726" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    \rxlen[1]_i_4 
       (.I0(stateSend[0]),
        .I1(stateSend[1]),
        .I2(stateSend[2]),
        .I3(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .O(\rxlen[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h00010800FFFFFFFF)) 
    \rxlen[1]_i_5 
       (.I0(Q[2]),
        .I1(Q[0]),
        .I2(Q[3]),
        .I3(Q[4]),
        .I4(Q[1]),
        .I5(\stateOp_reg[1] ),
        .O(\rxlen[1]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2687" *) 
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[0]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [0]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[0]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[10]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [10]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[10]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[11]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [11]),
        .O(\sendAXIL_rdata[11]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[12]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [12]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[12]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[13]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [13]),
        .O(\sendAXIL_rdata[13]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[14]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [14]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[14]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[15]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [15]),
        .O(\sendAXIL_rdata[15]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[16]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [16]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[16]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[17]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [17]),
        .O(\sendAXIL_rdata[17]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[18]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [18]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[18]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[19]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [19]),
        .O(\sendAXIL_rdata[19]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2688" *) 
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[1]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [1]),
        .O(\sendAXIL_rdata[1]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[20]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [20]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[20]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[21]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [21]),
        .O(\sendAXIL_rdata[21]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[22]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [22]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[22]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[23]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [23]),
        .O(\sendAXIL_rdata[23]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[24]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [24]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[24]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[25]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [25]),
        .O(\sendAXIL_rdata[25]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[26]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [26]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[26]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[27]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [27]),
        .O(\sendAXIL_rdata[27]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[28]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [28]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[28]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[29]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [29]),
        .O(\sendAXIL_rdata[29]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2689" *) 
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[2]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [2]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[2]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[30]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [30]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[30]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0F00FF40FFFFFFFF)) 
    \sendAXIL_rdata[31]_i_1__0 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(stateSend[0]),
        .I3(\sendAXIL_rdata[31]_i_3_n_0 ),
        .I4(\sendAXIL_rdata[31]_i_4_n_0 ),
        .I5(\sendAXIL_rdata[31]_i_5_n_0 ),
        .O(\sendAXIL_rdata[31]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[31]_i_2 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [31]),
        .O(\sendAXIL_rdata[31]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000008000000)) 
    \sendAXIL_rdata[31]_i_3 
       (.I0(AXIL_arready),
        .I1(rpuAXIL_arvalid),
        .I2(AXIL_araddr_sig[4]),
        .I3(AXIL_araddr_sig[5]),
        .I4(stateSend[1]),
        .I5(stateSend[2]),
        .O(\sendAXIL_rdata[31]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2685" *) 
  LUT5 #(
    .INIT(32'hF7F7FBDF)) 
    \sendAXIL_rdata[31]_i_4 
       (.I0(Q[3]),
        .I1(Q[1]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .O(\sendAXIL_rdata[31]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h8000AAA8AAA8AAA8)) 
    \sendAXIL_rdata[31]_i_5 
       (.I0(\stateSend[2]_i_9__0_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(stateTo[0]),
        .I5(stateTo[1]),
        .O(\sendAXIL_rdata[31]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2690" *) 
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[3]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [3]),
        .O(\sendAXIL_rdata[3]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2691" *) 
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[4]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [4]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[4]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2692" *) 
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[5]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [5]),
        .O(\sendAXIL_rdata[5]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[6]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [6]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[6]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[7]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [7]),
        .O(\sendAXIL_rdata[7]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h88888088)) 
    \sendAXIL_rdata[8]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[31]_0 [8]),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .O(\sendAXIL_rdata[8]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAA0020)) 
    \sendAXIL_rdata[9]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(\sendAXIL_rdata_reg[31]_0 [9]),
        .O(\sendAXIL_rdata[9]_i_1__0_n_0 ));
  FDCE \sendAXIL_rdata_reg[0] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[0]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[0]));
  FDCE \sendAXIL_rdata_reg[10] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[10]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[10]));
  FDCE \sendAXIL_rdata_reg[11] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[11]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[11]));
  FDCE \sendAXIL_rdata_reg[12] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[12]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[12]));
  FDCE \sendAXIL_rdata_reg[13] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[13]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[13]));
  FDCE \sendAXIL_rdata_reg[14] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[14]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[14]));
  FDCE \sendAXIL_rdata_reg[15] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[15]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[15]));
  FDCE \sendAXIL_rdata_reg[16] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[16]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[16]));
  FDCE \sendAXIL_rdata_reg[17] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[17]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[17]));
  FDCE \sendAXIL_rdata_reg[18] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[18]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[18]));
  FDCE \sendAXIL_rdata_reg[19] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[19]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[19]));
  FDCE \sendAXIL_rdata_reg[1] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[1]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[1]));
  FDCE \sendAXIL_rdata_reg[20] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[20]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[20]));
  FDCE \sendAXIL_rdata_reg[21] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[21]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[21]));
  FDCE \sendAXIL_rdata_reg[22] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[22]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[22]));
  FDCE \sendAXIL_rdata_reg[23] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[23]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[23]));
  FDCE \sendAXIL_rdata_reg[24] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[24]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[24]));
  FDCE \sendAXIL_rdata_reg[25] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[25]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[25]));
  FDCE \sendAXIL_rdata_reg[26] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[26]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[26]));
  FDCE \sendAXIL_rdata_reg[27] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[27]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[27]));
  FDCE \sendAXIL_rdata_reg[28] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[28]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[28]));
  FDCE \sendAXIL_rdata_reg[29] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[29]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[29]));
  FDCE \sendAXIL_rdata_reg[2] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[2]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[2]));
  FDCE \sendAXIL_rdata_reg[30] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[30]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[30]));
  FDCE \sendAXIL_rdata_reg[31] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[31]_i_2_n_0 ),
        .Q(sendAXIL_rdata[31]));
  FDCE \sendAXIL_rdata_reg[3] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[3]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[3]));
  FDCE \sendAXIL_rdata_reg[4] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[4]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[4]));
  FDCE \sendAXIL_rdata_reg[5] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[5]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[5]));
  FDCE \sendAXIL_rdata_reg[6] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[6]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[6]));
  FDCE \sendAXIL_rdata_reg[7] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[7]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[7]));
  FDCE \sendAXIL_rdata_reg[8] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[8]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[8]));
  FDCE \sendAXIL_rdata_reg[9] 
       (.C(aclk_sig),
        .CE(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\sendAXIL_rdata[9]_i_1__0_n_0 ),
        .Q(sendAXIL_rdata[9]));
  (* SOFT_HLUTNM = "soft_lutpair2734" *) 
  LUT4 #(
    .INIT(16'hFFF7)) 
    sendStrbToStart_i_10__0
       (.I0(\AXIL_wdata_sig_reg_n_0_[25] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[23] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[28] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[24] ),
        .O(sendStrbToStart_i_10__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2735" *) 
  LUT4 #(
    .INIT(16'hFFFD)) 
    sendStrbToStart_i_11__0
       (.I0(\AXIL_wdata_sig_reg_n_0_[1] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[30] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[20] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[8] ),
        .O(sendStrbToStart_i_11__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2732" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    sendStrbToStart_i_12__0
       (.I0(\AXIL_wdata_sig_reg_n_0_[21] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[5] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[27] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[9] ),
        .O(sendStrbToStart_i_12__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2733" *) 
  LUT4 #(
    .INIT(16'hFFDF)) 
    sendStrbToStart_i_13__0
       (.I0(\AXIL_wdata_sig_reg_n_0_[13] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[10] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[11] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[12] ),
        .O(sendStrbToStart_i_13__0_n_0));
  LUT6 #(
    .INIT(64'hF300770003007700)) 
    sendStrbToStart_i_1__0
       (.I0(stateSend[2]),
        .I1(sendStrbToStart_i_2__0_n_0),
        .I2(sendStrbToStart_i_3__0_n_0),
        .I3(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I4(sendStrbToStart_i_4__0_n_0),
        .I5(sendStrbToStart_reg_n_0),
        .O(sendStrbToStart_i_1__0_n_0));
  LUT6 #(
    .INIT(64'hFFAAFFFFFFFF3FFF)) 
    sendStrbToStart_i_2__0
       (.I0(\sendAXIL_rdata[31]_i_4_n_0 ),
        .I1(\stateSend[2]_i_3__0_n_0 ),
        .I2(sendStrbToStart0),
        .I3(stateSend[2]),
        .I4(stateSend[1]),
        .I5(stateSend[0]),
        .O(sendStrbToStart_i_2__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2726" *) 
  LUT4 #(
    .INIT(16'hD999)) 
    sendStrbToStart_i_3__0
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(\sendAXIL_rdata[31]_i_4_n_0 ),
        .I3(stateSend[0]),
        .O(sendStrbToStart_i_3__0_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFBFFFF)) 
    sendStrbToStart_i_4__0
       (.I0(sendStrbToStart_i_5__0_n_0),
        .I1(stateSend[0]),
        .I2(stateSend[1]),
        .I3(\stateRecv[2]_i_10__0_n_0 ),
        .I4(ixBlkWrite[1]),
        .I5(ixBlkWrite[0]),
        .O(sendStrbToStart_i_4__0_n_0));
  LUT4 #(
    .INIT(16'hFFFE)) 
    sendStrbToStart_i_5__0
       (.I0(sendStrbToStart_i_6__0_n_0),
        .I1(sendStrbToStart_i_7__0_n_0),
        .I2(sendStrbToStart_i_8__0_n_0),
        .I3(sendStrbToStart_i_9__0_n_0),
        .O(sendStrbToStart_i_5__0_n_0));
  LUT5 #(
    .INIT(32'hFFFFFEFF)) 
    sendStrbToStart_i_6__0
       (.I0(\AXIL_wdata_sig_reg_n_0_[4] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[14] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[18] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[15] ),
        .I4(sendStrbToStart_i_10__0_n_0),
        .O(sendStrbToStart_i_6__0_n_0));
  LUT5 #(
    .INIT(32'hFFFFFFF7)) 
    sendStrbToStart_i_7__0
       (.I0(\AXIL_wdata_sig_reg_n_0_[17] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[29] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[16] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[22] ),
        .I4(sendStrbToStart_i_11__0_n_0),
        .O(sendStrbToStart_i_7__0_n_0));
  LUT5 #(
    .INIT(32'hFFFFF7FF)) 
    sendStrbToStart_i_8__0
       (.I0(\AXIL_wdata_sig_reg_n_0_[7] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[19] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[26] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[31] ),
        .I4(sendStrbToStart_i_12__0_n_0),
        .O(sendStrbToStart_i_8__0_n_0));
  LUT5 #(
    .INIT(32'hFFFFFFFB)) 
    sendStrbToStart_i_9__0
       (.I0(\AXIL_wdata_sig_reg_n_0_[0] ),
        .I1(p_0_in[1]),
        .I2(p_0_in[0]),
        .I3(\AXIL_wdata_sig_reg_n_0_[6] ),
        .I4(sendStrbToStart_i_13__0_n_0),
        .O(sendStrbToStart_i_9__0_n_0));
  FDCE sendStrbToStart_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(sendStrbToStart_i_1__0_n_0),
        .Q(sendStrbToStart_reg_n_0));
  LUT6 #(
    .INIT(64'hAABAAAAAAA8AAAAA)) 
    sendStrbToStop_i_1__0
       (.I0(sendStrbToStop_i_2__0_n_0),
        .I1(sendStrbToStop_i_3__0_n_0),
        .I2(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I3(sendStrbToStop_i_4__0_n_0),
        .I4(sendStrbToStop_i_5__0_n_0),
        .I5(sendStrbToStop_reg_n_0),
        .O(sendStrbToStop_i_1__0_n_0));
  LUT6 #(
    .INIT(64'h5F5C0C0C00000000)) 
    sendStrbToStop_i_2__0
       (.I0(\stateSend[2]_i_5__0_n_0 ),
        .I1(\sendAXIL_rdata[31]_i_3_n_0 ),
        .I2(stateSend[0]),
        .I3(\stateSend[2]_i_3__0_n_0 ),
        .I4(\stateSend[2]_i_6__0_n_0 ),
        .I5(\sendAXIL_rdata[31]_i_5_n_0 ),
        .O(sendStrbToStop_i_2__0_n_0));
  LUT6 #(
    .INIT(64'h0400040007000400)) 
    sendStrbToStop_i_3__0
       (.I0(\stateSend[2]_i_5__0_n_0 ),
        .I1(stateSend[0]),
        .I2(stateSend[1]),
        .I3(stateSend[2]),
        .I4(\stateSend[2]_i_3__0_n_0 ),
        .I5(sendStrbToStart0),
        .O(sendStrbToStop_i_3__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2690" *) 
  LUT3 #(
    .INIT(8'h08)) 
    sendStrbToStop_i_4__0
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(stateSend[0]),
        .O(sendStrbToStop_i_4__0_n_0));
  LUT6 #(
    .INIT(64'hDFDFCFDFDFDFDFDF)) 
    sendStrbToStop_i_5__0
       (.I0(stateSend[0]),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(AXIL_araddr_sig[5]),
        .I4(AXIL_araddr_sig[4]),
        .I5(strbRead),
        .O(sendStrbToStop_i_5__0_n_0));
  FDCE sendStrbToStop_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(sendStrbToStop_i_1__0_n_0),
        .Q(sendStrbToStop_reg_n_0));
  LUT6 #(
    .INIT(64'h2222222200022202)) 
    \stateOp[0]_i_1__9 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(\stateOp[0]_i_3_n_0 ),
        .I2(\stateOp_reg[0]_8 ),
        .I3(Q[3]),
        .I4(\stateOp_reg[0]_9 ),
        .I5(Q[4]),
        .O(\stateOp_reg[1]_2 [0]));
  LUT6 #(
    .INIT(64'hBF00BFBFBFBFBFBF)) 
    \stateOp[0]_i_2__0 
       (.I0(\stateOp_reg[1]_5 ),
        .I1(\stateOp_reg[0]_10 [0]),
        .I2(\stateOp_reg[0]_10 [1]),
        .I3(\stateSend_reg[0]_0 ),
        .I4(\stateOp_reg[0]_11 [0]),
        .I5(\stateOp_reg[0]_11 [1]),
        .O(\stateOp[0]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h00B000F000B00000)) 
    \stateOp[0]_i_3 
       (.I0(Q[0]),
        .I1(\stateOp[0]_i_6__0_n_0 ),
        .I2(Q[4]),
        .I3(Q[3]),
        .I4(Q[2]),
        .I5(\stateOp_reg[0]_13 ),
        .O(\stateOp[0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp[0]_i_6__0 
       (.I0(Q[1]),
        .I1(\stateOp[0]_i_8__0_n_0 ),
        .I2(rxAXIS_tdata[1]),
        .I3(recvAXIS_tdata[1]),
        .I4(recvAXIS_tdata[3]),
        .I5(rxAXIS_tdata[7]),
        .O(\stateOp[0]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2725" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateOp[0]_i_8__0 
       (.I0(recvAXIS_tdata[2]),
        .I1(rxAXIS_tdata[6]),
        .I2(recvAXIS_tdata[0]),
        .I3(rxAXIS_tdata[2]),
        .O(\stateOp[0]_i_8__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2691" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \stateOp[1]_i_10__0 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .O(\stateOp[1]_i_10__0_n_0 ));
  LUT6 #(
    .INIT(64'h08AAAA0808080808)) 
    \stateOp[1]_i_1__5 
       (.I0(\stateOp_reg[1] ),
        .I1(\stateOp[1]_i_2__5_n_0 ),
        .I2(\stateOp_reg[1]_6 ),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(\stateOp_reg[1]_7 ),
        .O(\stateOp_reg[1]_2 [1]));
  LUT6 #(
    .INIT(64'hFFBF3F3FBFBF3F3F)) 
    \stateOp[1]_i_2__5 
       (.I0(\stateOp[2]_i_5__2_n_0 ),
        .I1(Q[2]),
        .I2(Q[3]),
        .I3(CO),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(\stateOp[1]_i_2__5_n_0 ));
  LUT6 #(
    .INIT(64'hFFF0FFFFEEEEFFFF)) 
    \stateOp[1]_i_3__1 
       (.I0(txAXIS_tready),
        .I1(\stateOp_reg[0]_12 ),
        .I2(rxAXIS_tvalid),
        .I3(stateOp_reg_4),
        .I4(ackRxtx),
        .I5(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .O(\stateSend_reg[0]_0 ));
  LUT6 #(
    .INIT(64'hFEBFEFDFFE37CFDF)) 
    \stateOp[1]_i_3__2 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(ackRxtx),
        .O(\stateOp_reg[1]_5 ));
  (* SOFT_HLUTNM = "soft_lutpair2688" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \stateOp[1]_i_5__2 
       (.I0(stateSend[0]),
        .I1(stateSend[1]),
        .I2(stateSend[2]),
        .O(txAXIS_tready));
  LUT6 #(
    .INIT(64'h7C007C007CFF7C00)) 
    \stateOp[1]_i_7__1 
       (.I0(stateRecv[0]),
        .I1(stateRecv[2]),
        .I2(stateRecv[1]),
        .I3(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I4(\stateOp[1]_i_9__1_n_0 ),
        .I5(\stateOp[1]_i_10__0_n_0 ),
        .O(ackRxtx));
  (* SOFT_HLUTNM = "soft_lutpair2689" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    \stateOp[1]_i_9__1 
       (.I0(stateSend[1]),
        .I1(stateSend[2]),
        .I2(stateSend[0]),
        .O(\stateOp[1]_i_9__1_n_0 ));
  LUT6 #(
    .INIT(64'h00022202AAAAAAAA)) 
    \stateOp[2]_i_1__2 
       (.I0(\stateOp_reg[1] ),
        .I1(Q[4]),
        .I2(\stateOp_reg[2]_3 ),
        .I3(Q[3]),
        .I4(\stateOp[2]_i_3__2_n_0 ),
        .I5(\stateOp_reg[2]_4 ),
        .O(\stateOp_reg[1]_2 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2683" *) 
  LUT5 #(
    .INIT(32'h00FC7F7F)) 
    \stateOp[2]_i_3__2 
       (.I0(CO),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(\stateOp[2]_i_5__2_n_0 ),
        .I4(Q[2]),
        .O(\stateOp[2]_i_3__2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \stateOp[2]_i_5__2 
       (.I0(crcAXIS_tlast_sig_i_9__0_0[3]),
        .I1(crcAXIS_tlast_sig_i_9__0_0[2]),
        .I2(crcAXIS_tlast_sig_i_9__0_0[1]),
        .I3(crcAXIS_tlast_sig_i_9__0_0[0]),
        .I4(crcAXIS_tlast_sig_i_9__0_1),
        .I5(\stateOp[0]_i_6__0_n_0 ),
        .O(\stateOp[2]_i_5__2_n_0 ));
  LUT6 #(
    .INIT(64'h0808080808080888)) 
    \stateOp[3]_i_1__0 
       (.I0(\stateOp[3]_i_2__0_n_0 ),
        .I1(\stateOp_reg[1] ),
        .I2(\stateOp_reg[3]_3 ),
        .I3(\txAXIS_tdata_reg[7]_0 ),
        .I4(\txAXIS_tdata_reg[7]_1 ),
        .I5(\stateOp_reg[3]_4 ),
        .O(\stateOp_reg[1]_2 [3]));
  LUT6 #(
    .INIT(64'h15FF15FFFFFF55FF)) 
    \stateOp[3]_i_2__0 
       (.I0(\stateOp_reg[3]_5 ),
        .I1(Q[2]),
        .I2(\stateOp[3]_i_8_n_0 ),
        .I3(\stateOp_reg[3]_6 ),
        .I4(Q[4]),
        .I5(Q[3]),
        .O(\stateOp[3]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2683" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \stateOp[3]_i_8 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(\stateOp[2]_i_5__2_n_0 ),
        .O(\stateOp[3]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h03F202F3038F3BFC)) 
    \stateOp[4]_i_19 
       (.I0(\rxlen[1]_i_4_n_0 ),
        .I1(Q[4]),
        .I2(Q[0]),
        .I3(Q[3]),
        .I4(Q[1]),
        .I5(Q[2]),
        .O(\stateOp[4]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFA2228000)) 
    \stateOp[4]_i_1__0 
       (.I0(\stateOp_reg[0]_4 ),
        .I1(\stateOp_reg[0]_5 ),
        .I2(rxAXIS_tvalid),
        .I3(CO),
        .I4(\stateOp_reg[0]_6 ),
        .I5(\stateOp[4]_i_7__0_n_0 ),
        .O(\stateOp_reg[2]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair2742" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \stateOp[4]_i_2__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\stateOp_reg[4]_1 ),
        .I2(\stateOp_reg[4]_2 ),
        .O(\stateOp_reg[1]_2 [4]));
  LUT6 #(
    .INIT(64'hFBFBFBBBBBBBFBBB)) 
    \stateOp[4]_i_7__0 
       (.I0(\stateOp[4]_i_19_n_0 ),
        .I1(\stateOp_reg[1] ),
        .I2(\stateOp_reg[0]_7 ),
        .I3(rxAXIS_tvalid),
        .I4(\stateOp_reg[0]_4 ),
        .I5(txAXIS_tready),
        .O(\stateOp[4]_i_7__0_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \stateOp[4]_i_8 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\stateOp_reg[1] ));
  (* SOFT_HLUTNM = "soft_lutpair2671" *) 
  LUT4 #(
    .INIT(16'h5155)) 
    stateOp_i_1__3
       (.I0(crcAXIS_tlast_sig_reg_2),
        .I1(rxAXIS_tvalid),
        .I2(stateOp_reg_4),
        .I3(recvAXIS_tlast),
        .O(crcAXIS_tlast_sig_reg));
  (* SOFT_HLUTNM = "soft_lutpair2787" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp_next[0]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(\stateOp_next_reg[0] ),
        .O(\stateOp_reg[1]_0 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2670" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \stateOp_next[1]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\stateOp_next_reg[1] ),
        .O(\stateOp_reg[1]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2670" *) 
  LUT5 #(
    .INIT(32'hFF002000)) 
    \stateOp_next[2]_i_1 
       (.I0(\stateOp_next_reg[2] ),
        .I1(\stateOp_next_reg[2]_0 ),
        .I2(\lastAXIS_tkeep_reg[3]_0 ),
        .I3(\stateOp_reg[1] ),
        .I4(\stateOp_next_reg[1] ),
        .O(\stateOp_reg[1]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2741" *) 
  LUT3 #(
    .INIT(8'h02)) 
    \stateOp_next[3]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\stateOp_next_reg[4] ),
        .I2(\lastAXIS_tkeep_reg[3]_0 ),
        .O(\stateOp_reg[1]_0 [3]));
  LUT6 #(
    .INIT(64'h00001000FFFFFFFF)) 
    \stateOp_next[4]_i_1__0 
       (.I0(Q[3]),
        .I1(Q[4]),
        .I2(Q[0]),
        .I3(Q[2]),
        .I4(Q[1]),
        .I5(\stateOp_reg[1] ),
        .O(\stateOp_reg[3]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair2741" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp_next[4]_i_2__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\stateOp_next_reg[4] ),
        .O(\stateOp_reg[1]_0 [4]));
  LUT6 #(
    .INIT(64'h06FF060006000600)) 
    \stateRecv[0]_i_1__0 
       (.I0(stateRecv[2]),
        .I1(stateRecv[1]),
        .I2(stateRecv[0]),
        .I3(p_1_in0),
        .I4(req),
        .I5(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .O(\stateRecv[0]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCC0CCCCC4CCC0)) 
    \stateRecv[1]_i_1__0 
       (.I0(recvAXIS_tlast),
        .I1(\stateRecv[2]_i_7__0_n_0 ),
        .I2(\stateSend[2]_i_10__0_n_0 ),
        .I3(stateRecv[1]),
        .I4(stateRecv[2]),
        .I5(stateRecv[0]),
        .O(\stateRecv[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2686" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \stateRecv[2]_i_10__0 
       (.I0(AXIL_bvalid_sig_reg_0),
        .I1(rpuAXIL_bready),
        .O(\stateRecv[2]_i_10__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFF5FFD5FFFFFFD5)) 
    \stateRecv[2]_i_1__0 
       (.I0(p_1_in0),
        .I1(\stateRecv[2]_i_4__0_n_0 ),
        .I2(stateRecv[0]),
        .I3(\stateRecv[2]_i_5__0_n_0 ),
        .I4(\stateRecv[2]_i_6_n_0 ),
        .I5(stateRecv[2]),
        .O(\stateRecv[2]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCCCC0CCC8C0C0)) 
    \stateRecv[2]_i_2__0 
       (.I0(recvAXIS_tlast),
        .I1(\stateRecv[2]_i_7__0_n_0 ),
        .I2(\stateSend[2]_i_10__0_n_0 ),
        .I3(stateRecv[1]),
        .I4(stateRecv[2]),
        .I5(stateRecv[0]),
        .O(\stateRecv[2]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'hAA2A2A2A2A2A2A00)) 
    \stateRecv[2]_i_3__0 
       (.I0(\stateRecv[2]_i_7__0_n_0 ),
        .I1(stateTo[0]),
        .I2(stateTo[1]),
        .I3(stateRecv[1]),
        .I4(stateRecv[2]),
        .I5(stateRecv[0]),
        .O(p_1_in0));
  LUT6 #(
    .INIT(64'h0000080000000000)) 
    \stateRecv[2]_i_4__0 
       (.I0(AXIL_bvalid_sig_reg_0),
        .I1(rpuAXIL_bready),
        .I2(ixBlkWrite[1]),
        .I3(ixBlkWrite[0]),
        .I4(stateRecv[2]),
        .I5(stateRecv[1]),
        .O(\stateRecv[2]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0F2F2F0F0F0FF)) 
    \stateRecv[2]_i_5__0 
       (.I0(recvAXIS_tready),
        .I1(stateRecv[0]),
        .I2(\recvAXIL_rdata[31]_i_2_n_0 ),
        .I3(\stateRecv[2]_i_9_n_0 ),
        .I4(stateRecv[1]),
        .I5(stateRecv[2]),
        .O(\stateRecv[2]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    \stateRecv[2]_i_6 
       (.I0(\stateSend[2]_i_11__0_n_0 ),
        .I1(stateRecv[2]),
        .I2(stateRecv[1]),
        .I3(ixBlkWrite[0]),
        .I4(\stateRecv[2]_i_10__0_n_0 ),
        .I5(ixBlkWrite[1]),
        .O(\stateRecv[2]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2669" *) 
  LUT5 #(
    .INIT(32'h01400000)) 
    \stateRecv[2]_i_7__0 
       (.I0(Q[3]),
        .I1(Q[4]),
        .I2(Q[2]),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\stateRecv[2]_i_7__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2685" *) 
  LUT5 #(
    .INIT(32'h00084240)) 
    \stateRecv[2]_i_8__0 
       (.I0(Q[0]),
        .I1(Q[2]),
        .I2(Q[4]),
        .I3(Q[1]),
        .I4(Q[3]),
        .O(recvAXIS_tready));
  LUT6 #(
    .INIT(64'hFFFFFFFFFBFFFFFF)) 
    \stateRecv[2]_i_9 
       (.I0(sendStrbToStart_i_5__0_n_0),
        .I1(stateRecv[0]),
        .I2(ixBlkWrite[0]),
        .I3(AXIL_bvalid_sig_reg_0),
        .I4(rpuAXIL_bready),
        .I5(ixBlkWrite[1]),
        .O(\stateRecv[2]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateRecv_reg[0] 
       (.C(aclk_sig),
        .CE(\stateRecv[2]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\stateRecv[0]_i_1__0_n_0 ),
        .Q(stateRecv[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateRecv_reg[1] 
       (.C(aclk_sig),
        .CE(\stateRecv[2]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\stateRecv[1]_i_1__0_n_0 ),
        .Q(stateRecv[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateRecv_reg[2] 
       (.C(aclk_sig),
        .CE(\stateRecv[2]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\stateRecv[2]_i_2__0_n_0 ),
        .Q(stateRecv[2]));
  LUT6 #(
    .INIT(64'h2AAA002A002A002A)) 
    \stateSend[0]_i_1__0 
       (.I0(\stateSend[2]_i_9__0_n_0 ),
        .I1(stateSend[2]),
        .I2(stateSend[1]),
        .I3(stateSend[0]),
        .I4(stateTo[1]),
        .I5(stateTo[0]),
        .O(\stateSend[0]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCCCCCC0CCCC40)) 
    \stateSend[1]_i_1__0 
       (.I0(sendStrbToStart0),
        .I1(\stateSend[2]_i_9__0_n_0 ),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .I5(\stateSend[2]_i_10__0_n_0 ),
        .O(\stateSend[1]_i_1__0_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \stateSend[2]_i_10__0 
       (.I0(stateTo[1]),
        .I1(stateTo[0]),
        .O(\stateSend[2]_i_10__0_n_0 ));
  LUT4 #(
    .INIT(16'h0004)) 
    \stateSend[2]_i_11__0 
       (.I0(\stateSend[2]_i_16__0_n_0 ),
        .I1(\stateSend[2]_i_17__0_n_0 ),
        .I2(\stateSend[2]_i_18__0_n_0 ),
        .I3(\stateSend[2]_i_19__0_n_0 ),
        .O(\stateSend[2]_i_11__0_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateSend[2]_i_13__0 
       (.I0(wordcnt_reg[30]),
        .O(\stateSend[2]_i_13__0_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateSend[2]_i_14__0 
       (.I0(wordcnt_reg[28]),
        .I1(wordcnt_reg[29]),
        .I2(wordcnt_reg[27]),
        .O(\stateSend[2]_i_14__0_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateSend[2]_i_15__0 
       (.I0(wordcnt_reg[25]),
        .I1(wordcnt_reg[26]),
        .I2(wordcnt_reg[24]),
        .O(\stateSend[2]_i_15__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFBFF)) 
    \stateSend[2]_i_16__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[5] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[6] ),
        .I2(p_0_in[1]),
        .I3(p_0_in[0]),
        .I4(\stateSend[2]_i_28__0_n_0 ),
        .O(\stateSend[2]_i_16__0_n_0 ));
  LUT5 #(
    .INIT(32'h00000040)) 
    \stateSend[2]_i_17__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[13] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[4] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[14] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[15] ),
        .I4(\stateSend[2]_i_29__0_n_0 ),
        .O(\stateSend[2]_i_17__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFB)) 
    \stateSend[2]_i_18__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[25] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[30] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[19] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[21] ),
        .I4(\stateSend[2]_i_30__0_n_0 ),
        .O(\stateSend[2]_i_18__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFBFFF)) 
    \stateSend[2]_i_19__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[7] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[0] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[16] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[18] ),
        .I4(\stateSend[2]_i_31__0_n_0 ),
        .O(\stateSend[2]_i_19__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF8B00)) 
    \stateSend[2]_i_1__0 
       (.I0(\stateSend[2]_i_3__0_n_0 ),
        .I1(\stateSend[2]_i_4__0_n_0 ),
        .I2(\stateSend[2]_i_5__0_n_0 ),
        .I3(\stateSend[2]_i_6__0_n_0 ),
        .I4(\stateSend[2]_i_7__0_n_0 ),
        .I5(\sendAXIL_rdata[31]_i_1__0_n_0 ),
        .O(\stateSend[2]_i_1__0_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateSend[2]_i_20__0 
       (.I0(wordcnt_reg[22]),
        .I1(wordcnt_reg[23]),
        .I2(wordcnt_reg[21]),
        .O(\stateSend[2]_i_20__0_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateSend[2]_i_21__0 
       (.I0(wordcnt_reg[19]),
        .I1(wordcnt_reg[20]),
        .I2(wordcnt_reg[18]),
        .O(\stateSend[2]_i_21__0_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateSend[2]_i_22__0 
       (.I0(wordcnt_reg[16]),
        .I1(wordcnt_reg[17]),
        .I2(wordcnt_reg[15]),
        .O(\stateSend[2]_i_22__0_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateSend[2]_i_23__0 
       (.I0(wordcnt_reg[13]),
        .I1(wordcnt_reg[14]),
        .I2(wordcnt_reg[12]),
        .O(\stateSend[2]_i_23__0_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateSend[2]_i_24__0 
       (.I0(wordcnt_reg[10]),
        .I1(wordcnt_reg[11]),
        .I2(wordcnt_reg[9]),
        .O(\stateSend[2]_i_24__0_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateSend[2]_i_25__0 
       (.I0(wordcnt_reg[7]),
        .I1(wordcnt_reg[8]),
        .I2(wordcnt_reg[6]),
        .O(\stateSend[2]_i_25__0_n_0 ));
  LUT5 #(
    .INIT(32'h00101101)) 
    \stateSend[2]_i_26__0 
       (.I0(wordcnt_reg[4]),
        .I1(wordcnt_reg[5]),
        .I2(recvAXIS_tlast_sig_reg_i_3__0_0[2]),
        .I3(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I4(wordcnt_reg[3]),
        .O(\stateSend[2]_i_26__0_n_0 ));
  LUT6 #(
    .INIT(64'h000000002D00002D)) 
    \stateSend[2]_i_27__0 
       (.I0(recvAXIS_tlast_sig_reg_i_3__0_0[0]),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(wordcnt_reg[0]),
        .I3(wordcnt_reg[1]),
        .I4(len),
        .I5(wordcnt_reg[2]),
        .O(\stateSend[2]_i_27__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2729" *) 
  LUT4 #(
    .INIT(16'hFFDF)) 
    \stateSend[2]_i_28__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[8] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[11] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[12] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[1] ),
        .O(\stateSend[2]_i_28__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2730" *) 
  LUT4 #(
    .INIT(16'hFFF7)) 
    \stateSend[2]_i_29__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[26] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[24] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[31] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[29] ),
        .O(\stateSend[2]_i_29__0_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCCCCCCCC0C080)) 
    \stateSend[2]_i_2__0 
       (.I0(sendStrbToStart0),
        .I1(\stateSend[2]_i_9__0_n_0 ),
        .I2(stateSend[2]),
        .I3(stateSend[1]),
        .I4(stateSend[0]),
        .I5(\stateSend[2]_i_10__0_n_0 ),
        .O(\stateSend[2]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2727" *) 
  LUT4 #(
    .INIT(16'hFFF7)) 
    \stateSend[2]_i_30__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[22] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[20] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[17] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[9] ),
        .O(\stateSend[2]_i_30__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2728" *) 
  LUT4 #(
    .INIT(16'hFFDF)) 
    \stateSend[2]_i_31__0 
       (.I0(\AXIL_wdata_sig_reg_n_0_[10] ),
        .I1(\AXIL_wdata_sig_reg_n_0_[23] ),
        .I2(\AXIL_wdata_sig_reg_n_0_[28] ),
        .I3(\AXIL_wdata_sig_reg_n_0_[27] ),
        .O(\stateSend[2]_i_31__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2743" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \stateSend[2]_i_32__0 
       (.I0(rxlen),
        .I1(\rpuAXIL_rdata[31]_INST_0_i_1_n_0 ),
        .I2(recvAXIS_tlast_sig_reg_i_3__0_0[1]),
        .O(len));
  (* SOFT_HLUTNM = "soft_lutpair2731" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \stateSend[2]_i_3__0 
       (.I0(AXIL_arready),
        .I1(rpuAXIL_arvalid),
        .I2(AXIL_araddr_sig[5]),
        .I3(AXIL_araddr_sig[4]),
        .O(\stateSend[2]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2687" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \stateSend[2]_i_4__0 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(stateSend[0]),
        .O(\stateSend[2]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2686" *) 
  LUT5 #(
    .INIT(32'hBFFFFFFF)) 
    \stateSend[2]_i_5__0 
       (.I0(ixBlkWrite[0]),
        .I1(ixBlkWrite[1]),
        .I2(AXIL_bvalid_sig_reg_0),
        .I3(rpuAXIL_bready),
        .I4(\stateSend[2]_i_11__0_n_0 ),
        .O(\stateSend[2]_i_5__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2692" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateSend[2]_i_6__0 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .O(\stateSend[2]_i_6__0_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \stateSend[2]_i_7__0 
       (.I0(stateSend[2]),
        .I1(sendStrbToStart_i_4__0_n_0),
        .O(\stateSend[2]_i_7__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2669" *) 
  LUT5 #(
    .INIT(32'h2616062E)) 
    \stateSend[2]_i_9__0 
       (.I0(Q[3]),
        .I1(Q[4]),
        .I2(Q[2]),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\stateSend[2]_i_9__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateSend_reg[0] 
       (.C(aclk_sig),
        .CE(\stateSend[2]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\stateSend[0]_i_1__0_n_0 ),
        .Q(stateSend[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSend_reg[1] 
       (.C(aclk_sig),
        .CE(\stateSend[2]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\stateSend[1]_i_1__0_n_0 ),
        .Q(stateSend[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSend_reg[2] 
       (.C(aclk_sig),
        .CE(\stateSend[2]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\stateSend[2]_i_2__0_n_0 ),
        .Q(stateSend[2]));
  CARRY8 \stateSend_reg[2]_i_12__0 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\stateSend_reg[2]_i_12__0_n_0 ,\stateSend_reg[2]_i_12__0_n_1 ,\stateSend_reg[2]_i_12__0_n_2 ,\stateSend_reg[2]_i_12__0_n_3 ,\stateSend_reg[2]_i_12__0_n_4 ,\stateSend_reg[2]_i_12__0_n_5 ,\stateSend_reg[2]_i_12__0_n_6 ,\stateSend_reg[2]_i_12__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_stateSend_reg[2]_i_12__0_O_UNCONNECTED [7:0]),
        .S({\stateSend[2]_i_20__0_n_0 ,\stateSend[2]_i_21__0_n_0 ,\stateSend[2]_i_22__0_n_0 ,\stateSend[2]_i_23__0_n_0 ,\stateSend[2]_i_24__0_n_0 ,\stateSend[2]_i_25__0_n_0 ,\stateSend[2]_i_26__0_n_0 ,\stateSend[2]_i_27__0_n_0 }));
  CARRY8 \stateSend_reg[2]_i_8__0 
       (.CI(\stateSend_reg[2]_i_12__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_stateSend_reg[2]_i_8__0_CO_UNCONNECTED [7:3],sendStrbToStart0,\stateSend_reg[2]_i_8__0_n_6 ,\stateSend_reg[2]_i_8__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_stateSend_reg[2]_i_8__0_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,\stateSend[2]_i_13__0_n_0 ,\stateSend[2]_i_14__0_n_0 ,\stateSend[2]_i_15__0_n_0 }));
  (* SOFT_HLUTNM = "soft_lutpair2693" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \stateTo[0]_i_1__0 
       (.I0(req),
        .I1(stateTo[1]),
        .I2(stateTo[0]),
        .O(\stateTo[0]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h55FD57FF55FD55FF)) 
    \stateTo[1]_i_1__0 
       (.I0(req),
        .I1(sendStrbToStart_reg_n_0),
        .I2(recvStrbToStart_reg_n_0),
        .I3(stateTo[1]),
        .I4(stateTo[0]),
        .I5(\stateTo[1]_i_4__0_n_0 ),
        .O(\stateTo[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2693" *) 
  LUT5 #(
    .INIT(32'h080808A8)) 
    \stateTo[1]_i_2__0 
       (.I0(req),
        .I1(stateTo[0]),
        .I2(stateTo[1]),
        .I3(recvStrbToStop_reg_n_0),
        .I4(sendStrbToStop_reg_n_0),
        .O(\stateTo[1]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2684" *) 
  LUT5 #(
    .INIT(32'h0B177630)) 
    \stateTo[1]_i_3__0 
       (.I0(Q[0]),
        .I1(Q[2]),
        .I2(Q[4]),
        .I3(Q[1]),
        .I4(Q[3]),
        .O(req));
  LUT6 #(
    .INIT(64'hEEEEEEEEEFEEEEFE)) 
    \stateTo[1]_i_4__0 
       (.I0(sendStrbToStop_reg_n_0),
        .I1(recvStrbToStop_reg_n_0),
        .I2(i[15]),
        .I3(\i[15]_i_4__0_n_0 ),
        .I4(i[14]),
        .I5(\stateTo[1]_i_5__0_n_0 ),
        .O(\stateTo[1]_i_4__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFDFF7F)) 
    \stateTo[1]_i_5__0 
       (.I0(i[12]),
        .I1(\i[12]_i_2__0_n_0 ),
        .I2(i[9]),
        .I3(\stateTo[1]_i_6__0_n_0 ),
        .I4(i[10]),
        .O(\stateTo[1]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFEF)) 
    \stateTo[1]_i_6__0 
       (.I0(\i[9]_i_2__4_n_0 ),
        .I1(i[7]),
        .I2(i[11]),
        .I3(i[8]),
        .I4(i[6]),
        .I5(i[13]),
        .O(\stateTo[1]_i_6__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateTo_reg[0] 
       (.C(aclk_sig),
        .CE(\stateTo[1]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\stateTo[0]_i_1__0_n_0 ),
        .Q(stateTo[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateTo_reg[1] 
       (.C(aclk_sig),
        .CE(\stateTo[1]_i_1__0_n_0 ),
        .CLR(\sendAXIL_rdata_reg[0]_0 ),
        .D(\stateTo[1]_i_2__0_n_0 ),
        .Q(stateTo[1]));
  (* SOFT_HLUTNM = "soft_lutpair2771" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[0]_i_1__0 
       (.I0(\tixVBuffer_reg[7] [0]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[0][7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2772" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[1]_i_1__0 
       (.I0(\tixVBuffer_reg[7] [1]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[0][7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2772" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[2]_i_1__0 
       (.I0(\tixVBuffer_reg[7] [2]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[0][7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2773" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[3]_i_1__0 
       (.I0(\tixVBuffer_reg[7] [3]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[0][7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2773" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[4]_i_1__0 
       (.I0(\tixVBuffer_reg[7] [4]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[0][7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2774" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[5]_i_1__0 
       (.I0(\tixVBuffer_reg[7] [5]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[0][7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2774" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[6]_i_1__0 
       (.I0(\tixVBuffer_reg[7] [6]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[0][7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2775" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVBuffer[7]_i_1 
       (.I0(\tixVBuffer_reg[7] [7]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[0][7] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2791" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[0]_i_1__0 
       (.I0(\tixVBufxfop_reg[7] [0]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[2][7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2788" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[1]_i_1__0 
       (.I0(\tixVBufxfop_reg[7] [1]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[2][7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2788" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[2]_i_1__0 
       (.I0(\tixVBufxfop_reg[7] [2]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[2][7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2789" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[3]_i_1__0 
       (.I0(\tixVBufxfop_reg[7] [3]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[2][7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2789" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[4]_i_1__0 
       (.I0(\tixVBufxfop_reg[7] [4]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[2][7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2790" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[5]_i_1__0 
       (.I0(\tixVBufxfop_reg[7] [5]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[2][7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2790" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[6]_i_1__0 
       (.I0(\tixVBufxfop_reg[7] [6]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[2][7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2791" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVCommand[7]_i_1__0 
       (.I0(\tixVBufxfop_reg[7] [7]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[2][7] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2783" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[0]_i_1__0 
       (.I0(\tixVController_reg[7]_0 [0]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[1][7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2784" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[1]_i_1__0 
       (.I0(\tixVController_reg[7]_0 [1]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[1][7] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2784" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[2]_i_1__0 
       (.I0(\tixVController_reg[7]_0 [2]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[1][7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2785" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[3]_i_1__0 
       (.I0(\tixVController_reg[7]_0 [3]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[1][7] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2785" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[4]_i_1__0 
       (.I0(\tixVController_reg[7]_0 [4]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[1][7] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2786" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[5]_i_1__0 
       (.I0(\tixVController_reg[7]_0 [5]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[1][7] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2786" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[6]_i_1__0 
       (.I0(\tixVController_reg[7]_0 [6]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[1][7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2787" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \tixVController[7]_i_2__0 
       (.I0(\tixVController_reg[7]_0 [7]),
        .I1(\stateOp_reg[1] ),
        .O(\opbuf_reg[1][7] [7]));
  LUT6 #(
    .INIT(64'hAAAA0020AAAAAAAA)) 
    \txAXIS_tdata[0]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[0] ),
        .I2(\txAXIS_tdata_reg[0]_0 ),
        .I3(Q[3]),
        .I4(\txAXIS_tdata_reg[0]_1 ),
        .I5(\txAXIS_tdata_reg[0]_2 ),
        .O(\stateOp_reg[1]_3 [0]));
  LUT6 #(
    .INIT(64'h8888888A88888888)) 
    \txAXIS_tdata[10]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[10] ),
        .I2(\txAXIS_tdata_reg[10]_0 ),
        .I3(\txAXIS_tdata_reg[10]_1 ),
        .I4(Q[1]),
        .I5(Q[4]),
        .O(\stateOp_reg[1]_3 [10]));
  LUT6 #(
    .INIT(64'h0000A808AAAAAAAA)) 
    \txAXIS_tdata[11]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[11]_1 ),
        .I2(Q[4]),
        .I3(\txAXIS_tdata_reg[11]_2 ),
        .I4(Q[1]),
        .I5(\txAXIS_tdata_reg[11]_3 ),
        .O(\stateOp_reg[1]_3 [11]));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \txAXIS_tdata[12]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[12] ),
        .I2(Q[4]),
        .I3(\txAXIS_tdata_reg[12]_0 ),
        .I4(Q[1]),
        .I5(\txAXIS_tdata_reg[12]_1 ),
        .O(\stateOp_reg[1]_3 [12]));
  LUT6 #(
    .INIT(64'h8A8A8A8888888A88)) 
    \txAXIS_tdata[13]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[13] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata_reg[13]_0 ),
        .I4(Q[4]),
        .I5(\txAXIS_tdata_reg[13]_1 ),
        .O(\stateOp_reg[1]_3 [13]));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \txAXIS_tdata[14]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[14]_1 ),
        .I2(Q[4]),
        .I3(\txAXIS_tdata_reg[14]_2 ),
        .I4(Q[1]),
        .I5(\txAXIS_tdata_reg[14]_3 ),
        .O(\stateOp_reg[1]_3 [14]));
  LUT6 #(
    .INIT(64'h57FF575757575757)) 
    \txAXIS_tdata[15]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(Q[1]),
        .I2(\txAXIS_tdata_reg[15]_3 ),
        .I3(\txAXIS_tdata_reg[15] [0]),
        .I4(\txAXIS_tdata_reg[15] [1]),
        .I5(\retbuf_reg[5][5]_0 ),
        .O(\resid_reg[0]_0 [1]));
  LUT6 #(
    .INIT(64'h8A8A8A8888888A88)) 
    \txAXIS_tdata[15]_i_2__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[15]_0 ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata_reg[15]_1 ),
        .I4(Q[4]),
        .I5(\txAXIS_tdata_reg[15]_2 ),
        .O(\stateOp_reg[1]_3 [15]));
  LUT6 #(
    .INIT(64'h000800080008AAAA)) 
    \txAXIS_tdata[17]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[17] ),
        .I2(\txAXIS_tdata_reg[17]_0 ),
        .I3(\txAXIS_tdata_reg[17]_1 ),
        .I4(\txAXIS_tdata_reg[17]_2 ),
        .I5(\txAXIS_tdata_reg[17]_3 ),
        .O(\stateOp_reg[1]_3 [16]));
  LUT6 #(
    .INIT(64'h000000A8AAAAAAAA)) 
    \txAXIS_tdata[19]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[19] ),
        .I2(\txAXIS_tdata_reg[19]_0 ),
        .I3(\txAXIS_tdata_reg[19]_1 ),
        .I4(\txAXIS_tdata_reg[17]_1 ),
        .I5(\txAXIS_tdata_reg[19]_2 ),
        .O(\stateOp_reg[1]_3 [17]));
  LUT5 #(
    .INIT(32'h00A8AAAA)) 
    \txAXIS_tdata[1]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[1] ),
        .I2(\txAXIS_tdata_reg[1]_0 ),
        .I3(\txAXIS_tdata_reg[1]_1 ),
        .I4(\txAXIS_tdata_reg[1]_2 ),
        .O(\stateOp_reg[1]_3 [1]));
  LUT6 #(
    .INIT(64'h8888888A8A8A888A)) 
    \txAXIS_tdata[20]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[20] ),
        .I2(\txAXIS_tdata_reg[17]_1 ),
        .I3(\txAXIS_tdata_reg[20]_0 ),
        .I4(\txAXIS_tdata_reg[20]_1 ),
        .I5(\txAXIS_tdata_reg[20]_2 ),
        .O(\stateOp_reg[1]_3 [18]));
  LUT6 #(
    .INIT(64'h000800080008AAAA)) 
    \txAXIS_tdata[21]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[21] ),
        .I2(\txAXIS_tdata_reg[21]_0 ),
        .I3(\txAXIS_tdata_reg[17]_1 ),
        .I4(\txAXIS_tdata_reg[17]_2 ),
        .I5(\txAXIS_tdata_reg[21]_1 ),
        .O(\stateOp_reg[1]_3 [19]));
  LUT6 #(
    .INIT(64'h00080000AAAAAAAA)) 
    \txAXIS_tdata[22]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[22] ),
        .I2(\txAXIS_tdata_reg[22]_0 ),
        .I3(Q[1]),
        .I4(Q[4]),
        .I5(\txAXIS_tdata_reg[22]_1 ),
        .O(\stateOp_reg[1]_3 [20]));
  LUT5 #(
    .INIT(32'hFF575757)) 
    \txAXIS_tdata[23]_i_1 
       (.I0(\stateOp_reg[1] ),
        .I1(Q[1]),
        .I2(\txAXIS_tdata_reg[15]_3 ),
        .I3(\txAXIS_tdata_reg[15] [1]),
        .I4(\retbuf_reg[5][5]_0 ),
        .O(\resid_reg[0]_0 [2]));
  LUT6 #(
    .INIT(64'h000800080008AAAA)) 
    \txAXIS_tdata[23]_i_2__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[23] ),
        .I2(\txAXIS_tdata_reg[23]_0 ),
        .I3(\txAXIS_tdata_reg[17]_1 ),
        .I4(\txAXIS_tdata_reg[17]_2 ),
        .I5(\txAXIS_tdata_reg[23]_1 ),
        .O(\stateOp_reg[1]_3 [21]));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \txAXIS_tdata[24]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[24] ),
        .I2(Q[4]),
        .I3(\txAXIS_tdata_reg[24]_0 ),
        .I4(Q[1]),
        .I5(\txAXIS_tdata_reg[24]_1 ),
        .O(\stateOp_reg[1]_3 [22]));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \txAXIS_tdata[25]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[24] ),
        .I2(Q[4]),
        .I3(\txAXIS_tdata_reg[25] ),
        .I4(Q[1]),
        .I5(\txAXIS_tdata_reg[25]_0 ),
        .O(\stateOp_reg[1]_3 [23]));
  LUT6 #(
    .INIT(64'h888888888888A8AA)) 
    \txAXIS_tdata[26]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[26] ),
        .I2(\txAXIS_tdata_reg[26]_0 ),
        .I3(\txAXIS_tdata_reg[26]_1 ),
        .I4(\txAXIS_tdata_reg[26]_2 ),
        .I5(\txAXIS_tdata_reg[17]_1 ),
        .O(\stateOp_reg[1]_3 [24]));
  LUT6 #(
    .INIT(64'h000000A8AAAAAAAA)) 
    \txAXIS_tdata[27]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[27] ),
        .I2(\txAXIS_tdata_reg[19]_0 ),
        .I3(\txAXIS_tdata_reg[27]_0 ),
        .I4(\txAXIS_tdata_reg[17]_1 ),
        .I5(\txAXIS_tdata_reg[27]_1 ),
        .O(\stateOp_reg[1]_3 [25]));
  LUT6 #(
    .INIT(64'h00080000AAAAAAAA)) 
    \txAXIS_tdata[28]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[28] ),
        .I2(\txAXIS_tdata_reg[28]_0 ),
        .I3(Q[1]),
        .I4(Q[4]),
        .I5(\txAXIS_tdata_reg[28]_1 ),
        .O(\stateOp_reg[1]_3 [26]));
  (* SOFT_HLUTNM = "soft_lutpair2703" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \txAXIS_tdata[29]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[29] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata_reg[29]_0 ),
        .O(\stateOp_reg[1]_3 [27]));
  LUT6 #(
    .INIT(64'hAAAA0020AAAAAAAA)) 
    \txAXIS_tdata[2]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[2] ),
        .I2(\txAXIS_tdata_reg[0]_0 ),
        .I3(Q[3]),
        .I4(\txAXIS_tdata_reg[2]_0 ),
        .I5(\txAXIS_tdata_reg[0]_2 ),
        .O(\stateOp_reg[1]_3 [2]));
  LUT6 #(
    .INIT(64'h00080000AAAAAAAA)) 
    \txAXIS_tdata[30]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[30]_0 ),
        .I2(\txAXIS_tdata_reg[30]_1 ),
        .I3(Q[1]),
        .I4(Q[4]),
        .I5(\txAXIS_tdata_reg[30]_2 ),
        .O(\stateOp_reg[1]_3 [28]));
  LUT6 #(
    .INIT(64'h90FF90FF90FFFFFF)) 
    \txAXIS_tdata[31]_i_1 
       (.I0(\txAXIS_tdata_reg[15] [0]),
        .I1(\txAXIS_tdata_reg[15] [1]),
        .I2(\retbuf_reg[5][5]_0 ),
        .I3(\stateOp_reg[1] ),
        .I4(Q[1]),
        .I5(\txAXIS_tdata_reg[15]_3 ),
        .O(\resid_reg[0]_0 [3]));
  LUT6 #(
    .INIT(64'h0000A808AAAAAAAA)) 
    \txAXIS_tdata[31]_i_2__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[31]_0 ),
        .I2(\txAXIS_tdata_reg[20]_1 ),
        .I3(\txAXIS_tdata_reg[31]_1 ),
        .I4(\txAXIS_tdata_reg[17]_1 ),
        .I5(\txAXIS_tdata_reg[31]_2 ),
        .O(\stateOp_reg[1]_3 [29]));
  LUT6 #(
    .INIT(64'h0000888AAAAAAAAA)) 
    \txAXIS_tdata[3]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[3] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata_reg[3]_0 ),
        .I4(\txAXIS_tdata_reg[3]_1 ),
        .I5(\txAXIS_tdata_reg[1]_2 ),
        .O(\stateOp_reg[1]_3 [3]));
  LUT6 #(
    .INIT(64'hAAAA0020AAAAAAAA)) 
    \txAXIS_tdata[4]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[4] ),
        .I2(\txAXIS_tdata_reg[0]_0 ),
        .I3(Q[3]),
        .I4(\txAXIS_tdata_reg[4]_0 ),
        .I5(\txAXIS_tdata_reg[0]_2 ),
        .O(\stateOp_reg[1]_3 [4]));
  LUT6 #(
    .INIT(64'h0000888AAAAAAAAA)) 
    \txAXIS_tdata[5]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[5] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata_reg[5]_0 ),
        .I4(\txAXIS_tdata_reg[5]_1 ),
        .I5(\txAXIS_tdata_reg[1]_2 ),
        .O(\stateOp_reg[1]_3 [5]));
  LUT6 #(
    .INIT(64'hAAAA0800AAAAAAAA)) 
    \txAXIS_tdata[6]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[0]_0 ),
        .I2(Q[3]),
        .I3(\txAXIS_tdata_reg[6] ),
        .I4(\txAXIS_tdata_reg[6]_0 ),
        .I5(\txAXIS_tdata_reg[0]_2 ),
        .O(\stateOp_reg[1]_3 [6]));
  LUT6 #(
    .INIT(64'hAAABAAAAAAAAAAAA)) 
    \txAXIS_tdata[7]_i_1__0 
       (.I0(\txAXIS_tdata[7]_i_3__0_n_0 ),
        .I1(\txAXIS_tdata_reg[7]_0 ),
        .I2(\txAXIS_tdata_reg[7]_1 ),
        .I3(Q[3]),
        .I4(Q[4]),
        .I5(Q[2]),
        .O(\resid_reg[0]_0 [0]));
  LUT6 #(
    .INIT(64'h0000888AAAAAAAAA)) 
    \txAXIS_tdata[7]_i_2__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[7]_2 ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata_reg[7]_3 ),
        .I4(\txAXIS_tdata_reg[7]_4 ),
        .I5(\txAXIS_tdata_reg[1]_2 ),
        .O(\stateOp_reg[1]_3 [7]));
  LUT6 #(
    .INIT(64'h01000014FFFFFFFF)) 
    \txAXIS_tdata[7]_i_3__0 
       (.I0(Q[1]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(\stateOp_reg[1] ),
        .O(\txAXIS_tdata[7]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000A808AAAAAAAA)) 
    \txAXIS_tdata[8]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[8] ),
        .I2(Q[4]),
        .I3(\txAXIS_tdata_reg[8]_0 ),
        .I4(Q[1]),
        .I5(\txAXIS_tdata_reg[8]_1 ),
        .O(\stateOp_reg[1]_3 [8]));
  LUT6 #(
    .INIT(64'h0000A808AAAAAAAA)) 
    \txAXIS_tdata[9]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(\txAXIS_tdata_reg[9] ),
        .I2(Q[4]),
        .I3(\txAXIS_tdata_reg[9]_0 ),
        .I4(Q[1]),
        .I5(\txAXIS_tdata_reg[9]_1 ),
        .O(\stateOp_reg[1]_3 [9]));
  LUT6 #(
    .INIT(64'h0000000000008000)) 
    \txlen[1]_i_1 
       (.I0(\tixVController_reg[0] [0]),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[3]),
        .I4(Q[0]),
        .I5(Q[4]),
        .O(\stateOp_reg[2] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2682" *) 
  LUT5 #(
    .INIT(32'hAAAAAABA)) 
    validCrc_sig_i_2__0
       (.I0(\crc_imd_reg[11] ),
        .I1(stateOp_reg_4),
        .I2(stateRecv[2]),
        .I3(stateRecv[1]),
        .I4(stateRecv[0]),
        .O(AXIS_tvalid));
  LUT6 #(
    .INIT(64'hAAAAABAAAAAAAAAA)) 
    validCrc_sig_i_3__0
       (.I0(crcAXIS_tlast_sig_reg_2),
        .I1(stateRecv[0]),
        .I2(stateRecv[1]),
        .I3(stateRecv[2]),
        .I4(stateOp_reg_4),
        .I5(recvAXIS_tlast),
        .O(AXIS_tlast));
  LUT6 #(
    .INIT(64'h777F777F777F0000)) 
    wdone_i_1__1
       (.I0(AXIL_bvalid_sig_reg_0),
        .I1(rpuAXIL_bready),
        .I2(AXIL_awready_sig_reg_0),
        .I3(awdone_reg_n_0),
        .I4(AXIL_wready_sig_reg_0),
        .I5(wdone_reg_n_0),
        .O(wdone_i_1__1_n_0));
  FDRE wdone_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(wdone_i_1__1_n_0),
        .Q(wdone_reg_n_0),
        .R(\sendAXIL_rdata_reg[0]_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[15]_i_2 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[15]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[15]_i_3 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[15]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[15]_i_4 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[15]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[15]_i_5 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[15]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[15]_i_6 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[15]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[15]_i_7 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[15]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[15]_i_8 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[15]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[15]_i_9 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[15]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[23]_i_2 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[23]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[23]_i_3 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[23]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[23]_i_4 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[23]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[23]_i_5 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[23]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[23]_i_6 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[23]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[23]_i_7 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[23]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[23]_i_8 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[23]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[23]_i_9 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[23]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[24]_i_2__0 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[24]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[7]_i_10 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[7]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h4)) 
    \wordcntCrcLast[7]_i_11 
       (.I0(\lastAXIS_tkeep_reg[3] ),
        .I1(\stateOp_reg[1] ),
        .O(\wordcntCrcLast[7]_i_11_n_0 ));
  LUT2 #(
    .INIT(4'h4)) 
    \wordcntCrcLast[7]_i_12 
       (.I0(lenRet1),
        .I1(\stateOp_reg[1] ),
        .O(\wordcntCrcLast[7]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \wordcntCrcLast[7]_i_2 
       (.I0(lenRet1),
        .I1(\stateOp_reg[1] ),
        .O(\wordcntCrcLast[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \wordcntCrcLast[7]_i_3 
       (.I0(\lastAXIS_tkeep_reg[3] ),
        .I1(\stateOp_reg[1] ),
        .O(\wordcntCrcLast[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \wordcntCrcLast[7]_i_4 
       (.I0(lenRet1),
        .I1(\stateOp_reg[1] ),
        .O(\wordcntCrcLast[7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[7]_i_5 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[7]_i_6 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[7]_i_7 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \wordcntCrcLast[7]_i_8 
       (.I0(\stateOp[0]_i_2__0_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\wordcntCrcLast[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h4)) 
    \wordcntCrcLast[7]_i_9 
       (.I0(lenRet1),
        .I1(\stateOp_reg[1] ),
        .O(\wordcntCrcLast[7]_i_9_n_0 ));
  CARRY8 \wordcntCrcLast_reg[15]_i_1 
       (.CI(\wordcntCrcLast_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcntCrcLast_reg[15]_i_1_n_0 ,\wordcntCrcLast_reg[15]_i_1_n_1 ,\wordcntCrcLast_reg[15]_i_1_n_2 ,\wordcntCrcLast_reg[15]_i_1_n_3 ,\wordcntCrcLast_reg[15]_i_1_n_4 ,\wordcntCrcLast_reg[15]_i_1_n_5 ,\wordcntCrcLast_reg[15]_i_1_n_6 ,\wordcntCrcLast_reg[15]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(out[15:8]),
        .S({\wordcntCrcLast[15]_i_2_n_0 ,\wordcntCrcLast[15]_i_3_n_0 ,\wordcntCrcLast[15]_i_4_n_0 ,\wordcntCrcLast[15]_i_5_n_0 ,\wordcntCrcLast[15]_i_6_n_0 ,\wordcntCrcLast[15]_i_7_n_0 ,\wordcntCrcLast[15]_i_8_n_0 ,\wordcntCrcLast[15]_i_9_n_0 }));
  CARRY8 \wordcntCrcLast_reg[23]_i_1 
       (.CI(\wordcntCrcLast_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcntCrcLast_reg[23]_i_1_n_0 ,\wordcntCrcLast_reg[23]_i_1_n_1 ,\wordcntCrcLast_reg[23]_i_1_n_2 ,\wordcntCrcLast_reg[23]_i_1_n_3 ,\wordcntCrcLast_reg[23]_i_1_n_4 ,\wordcntCrcLast_reg[23]_i_1_n_5 ,\wordcntCrcLast_reg[23]_i_1_n_6 ,\wordcntCrcLast_reg[23]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(out[23:16]),
        .S({\wordcntCrcLast[23]_i_2_n_0 ,\wordcntCrcLast[23]_i_3_n_0 ,\wordcntCrcLast[23]_i_4_n_0 ,\wordcntCrcLast[23]_i_5_n_0 ,\wordcntCrcLast[23]_i_6_n_0 ,\wordcntCrcLast[23]_i_7_n_0 ,\wordcntCrcLast[23]_i_8_n_0 ,\wordcntCrcLast[23]_i_9_n_0 }));
  CARRY8 \wordcntCrcLast_reg[24]_i_1 
       (.CI(\wordcntCrcLast_reg[23]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO(\NLW_wordcntCrcLast_reg[24]_i_1_CO_UNCONNECTED [7:0]),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_wordcntCrcLast_reg[24]_i_1_O_UNCONNECTED [7:1],out[24]}),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\wordcntCrcLast[24]_i_2__0_n_0 }));
  CARRY8 \wordcntCrcLast_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\wordcntCrcLast_reg[7]_i_1_n_0 ,\wordcntCrcLast_reg[7]_i_1_n_1 ,\wordcntCrcLast_reg[7]_i_1_n_2 ,\wordcntCrcLast_reg[7]_i_1_n_3 ,\wordcntCrcLast_reg[7]_i_1_n_4 ,\wordcntCrcLast_reg[7]_i_1_n_5 ,\wordcntCrcLast_reg[7]_i_1_n_6 ,\wordcntCrcLast_reg[7]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,\wordcntCrcLast[7]_i_2_n_0 ,1'b0,\wordcntCrcLast[7]_i_3_n_0 ,\wordcntCrcLast[7]_i_4_n_0 }),
        .O(out[7:0]),
        .S({\wordcntCrcLast[7]_i_5_n_0 ,\wordcntCrcLast[7]_i_6_n_0 ,\wordcntCrcLast[7]_i_7_n_0 ,\wordcntCrcLast[7]_i_8_n_0 ,\wordcntCrcLast[7]_i_9_n_0 ,\wordcntCrcLast[7]_i_10_n_0 ,\wordcntCrcLast[7]_i_11_n_0 ,\wordcntCrcLast[7]_i_12_n_0 }));
  (* SOFT_HLUTNM = "soft_lutpair2720" *) 
  LUT4 #(
    .INIT(16'hE000)) 
    \wordcntLast[0]_i_1__0 
       (.I0(lenRet1),
        .I1(Q[0]),
        .I2(\txlen_reg[0] ),
        .I3(\stateOp_reg[1] ),
        .O(\stateOp_reg[2] [0]));
  LUT6 #(
    .INIT(64'h2000002000000020)) 
    \wordcntLast[1]_i_1__0 
       (.I0(\wordcntLast_reg[1] ),
        .I1(Q[4]),
        .I2(\stateOp_reg[1] ),
        .I3(Q[3]),
        .I4(Q[2]),
        .I5(\lastAXIS_tkeep_reg[3] ),
        .O(\stateOp_reg[4]_0 ));
  LUT6 #(
    .INIT(64'h555D555555D5D575)) 
    \wordcntLast[3]_i_1__0 
       (.I0(\stateOp_reg[1] ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[3]),
        .I4(Q[0]),
        .I5(Q[4]),
        .O(\stateOp_reg[2]_1 ));
  LUT6 #(
    .INIT(64'h0000000000008000)) 
    \wordcntLast[3]_i_2 
       (.I0(\tixVController_reg[0] [2]),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[3]),
        .I4(Q[0]),
        .I5(Q[4]),
        .O(\stateOp_reg[2] [2]));
  LUT3 #(
    .INIT(8'h20)) 
    \wordcnt[0]__0_i_1__0 
       (.I0(\recvAXIL_rdata[31]_i_2_n_0 ),
        .I1(\sendAXIL_rdata_reg[0]_0 ),
        .I2(p_1_in0),
        .O(\wordcnt[0]__0_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000400)) 
    \wordcnt[0]__0_i_2__0 
       (.I0(\sendAXIL_rdata_reg[0]_0 ),
        .I1(p_1_in0),
        .I2(recvAXIS_tlast),
        .I3(\wordcnt[0]__0_i_4__0_n_0 ),
        .I4(stateRecv[0]),
        .I5(stateRecv[1]),
        .O(wordcnt0));
  LUT6 #(
    .INIT(64'h0204500000000000)) 
    \wordcnt[0]__0_i_4__0 
       (.I0(Q[3]),
        .I1(Q[1]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .I5(stateRecv[2]),
        .O(\wordcnt[0]__0_i_4__0_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcnt[0]__0_i_5__0 
       (.I0(\wordcnt_reg[0]__0_n_0 ),
        .O(\wordcnt[0]__0_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000200000000000)) 
    \wordcnt[0]_i_1__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[0]_0 ),
        .I2(\wordcnt[0]_i_4__0_n_0 ),
        .I3(AXIL_araddr_sig[5]),
        .I4(AXIL_araddr_sig[4]),
        .I5(strbRead),
        .O(\wordcnt[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2762" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \wordcnt[0]_i_1__1 
       (.I0(\wordcnt_reg[0]_0 ),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [0]));
  LUT6 #(
    .INIT(64'h0000002000000000)) 
    \wordcnt[0]_i_2__0 
       (.I0(\sendAXIL_rdata[31]_i_5_n_0 ),
        .I1(\sendAXIL_rdata_reg[0]_0 ),
        .I2(\stateSend[2]_i_6__0_n_0 ),
        .I3(stateSend[0]),
        .I4(sendStrbToStart0),
        .I5(\stateSend[2]_i_3__0_n_0 ),
        .O(\wordcnt[0]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2677" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \wordcnt[0]_i_4__0 
       (.I0(stateSend[2]),
        .I1(stateSend[1]),
        .I2(stateSend[0]),
        .O(\wordcnt[0]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2731" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \wordcnt[0]_i_5__0 
       (.I0(rpuAXIL_arvalid),
        .I1(AXIL_arready),
        .O(strbRead));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcnt[0]_i_6__0 
       (.I0(wordcnt_reg[0]),
        .O(\wordcnt[0]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2801" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[10]_i_1 
       (.I0(txlast1[9]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [10]));
  (* SOFT_HLUTNM = "soft_lutpair2801" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[11]_i_1 
       (.I0(txlast1[10]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [11]));
  (* SOFT_HLUTNM = "soft_lutpair2800" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[12]_i_1 
       (.I0(txlast1[11]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [12]));
  (* SOFT_HLUTNM = "soft_lutpair2800" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[13]_i_1 
       (.I0(txlast1[12]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [13]));
  (* SOFT_HLUTNM = "soft_lutpair2799" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[14]_i_1 
       (.I0(txlast1[13]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [14]));
  (* SOFT_HLUTNM = "soft_lutpair2799" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[15]_i_1 
       (.I0(txlast1[14]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [15]));
  (* SOFT_HLUTNM = "soft_lutpair2798" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[16]_i_1 
       (.I0(txlast1[15]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [16]));
  (* SOFT_HLUTNM = "soft_lutpair2798" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[17]_i_1 
       (.I0(txlast1[16]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [17]));
  (* SOFT_HLUTNM = "soft_lutpair2797" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[18]_i_1 
       (.I0(txlast1[17]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [18]));
  (* SOFT_HLUTNM = "soft_lutpair2797" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[19]_i_1 
       (.I0(txlast1[18]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [19]));
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[1]_i_1 
       (.I0(txlast1[0]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2796" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[20]_i_1 
       (.I0(txlast1[19]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [20]));
  (* SOFT_HLUTNM = "soft_lutpair2796" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[21]_i_1 
       (.I0(txlast1[20]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [21]));
  (* SOFT_HLUTNM = "soft_lutpair2795" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[22]_i_1 
       (.I0(txlast1[21]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [22]));
  (* SOFT_HLUTNM = "soft_lutpair2795" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[23]_i_1 
       (.I0(txlast1[22]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [23]));
  (* SOFT_HLUTNM = "soft_lutpair2794" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[24]_i_1 
       (.I0(txlast1[23]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [24]));
  (* SOFT_HLUTNM = "soft_lutpair2794" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[25]_i_1 
       (.I0(txlast1[24]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [25]));
  (* SOFT_HLUTNM = "soft_lutpair2793" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[26]_i_1 
       (.I0(txlast1[25]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [26]));
  (* SOFT_HLUTNM = "soft_lutpair2793" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[27]_i_1 
       (.I0(txlast1[26]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [27]));
  (* SOFT_HLUTNM = "soft_lutpair2792" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[28]_i_1 
       (.I0(txlast1[27]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [28]));
  (* SOFT_HLUTNM = "soft_lutpair2792" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[29]_i_1 
       (.I0(txlast1[28]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [29]));
  (* SOFT_HLUTNM = "soft_lutpair2805" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[2]_i_1 
       (.I0(txlast1[1]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [2]));
  LUT6 #(
    .INIT(64'hABBAABAAFFFFFFFF)) 
    \wordcnt[30]_i_1__0 
       (.I0(\wordcnt[30]_i_3__0_n_0 ),
        .I1(\wordcnt_reg[0]_1 ),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(\wordcnt[30]_i_5__0_n_0 ),
        .I5(\stateOp_reg[1] ),
        .O(\stateOp_reg[1]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2762" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[30]_i_2 
       (.I0(txlast1[29]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [30]));
  LUT6 #(
    .INIT(64'h0000540555555555)) 
    \wordcnt[30]_i_3__0 
       (.I0(Q[4]),
        .I1(\wordcnt[30]_i_5__0_n_0 ),
        .I2(Q[2]),
        .I3(Q[0]),
        .I4(crcAXIS_tlast_sig_reg_0),
        .I5(\wordcnt[30]_i_8__0_n_0 ),
        .O(\wordcnt[30]_i_3__0_n_0 ));
  LUT4 #(
    .INIT(16'h0010)) 
    \wordcnt[30]_i_5__0 
       (.I0(stateRecv[0]),
        .I1(stateRecv[1]),
        .I2(stateRecv[2]),
        .I3(CO),
        .O(\wordcnt[30]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'hDD0FFFFFFFFFFFFF)) 
    \wordcnt[30]_i_8__0 
       (.I0(txAXIS_tready),
        .I1(CO),
        .I2(Q[2]),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\wordcnt[30]_i_8__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2805" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[3]_i_1 
       (.I0(txlast1[2]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2804" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[4]_i_1 
       (.I0(txlast1[3]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2804" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[5]_i_1 
       (.I0(txlast1[4]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2803" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[6]_i_1 
       (.I0(txlast1[5]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2803" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[7]_i_1 
       (.I0(txlast1[6]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2802" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[8]_i_1 
       (.I0(txlast1[7]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [8]));
  (* SOFT_HLUTNM = "soft_lutpair2802" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcnt[9]_i_1 
       (.I0(txlast1[8]),
        .I1(\stateOp_reg[2]_1 ),
        .O(\wordcnt_reg[30]_0 [9]));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[0] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[0]_i_3__0_n_15 ),
        .Q(wordcnt_reg[0]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[0]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3__0_n_15 ),
        .Q(\wordcnt_reg[0]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[0]__0_i_3__0 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[0]__0_i_3__0_n_0 ,\wordcnt_reg[0]__0_i_3__0_n_1 ,\wordcnt_reg[0]__0_i_3__0_n_2 ,\wordcnt_reg[0]__0_i_3__0_n_3 ,\wordcnt_reg[0]__0_i_3__0_n_4 ,\wordcnt_reg[0]__0_i_3__0_n_5 ,\wordcnt_reg[0]__0_i_3__0_n_6 ,\wordcnt_reg[0]__0_i_3__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1}),
        .O({\wordcnt_reg[0]__0_i_3__0_n_8 ,\wordcnt_reg[0]__0_i_3__0_n_9 ,\wordcnt_reg[0]__0_i_3__0_n_10 ,\wordcnt_reg[0]__0_i_3__0_n_11 ,\wordcnt_reg[0]__0_i_3__0_n_12 ,\wordcnt_reg[0]__0_i_3__0_n_13 ,\wordcnt_reg[0]__0_i_3__0_n_14 ,\wordcnt_reg[0]__0_i_3__0_n_15 }),
        .S({\wordcnt_reg[7]__0_n_0 ,\wordcnt_reg[6]__0_n_0 ,\wordcnt_reg[5]__0_n_0 ,\wordcnt_reg[4]__0_n_0 ,\wordcnt_reg[3]__0_n_0 ,\wordcnt_reg[2]__0_n_0 ,\wordcnt_reg[1]__0_n_0 ,\wordcnt[0]__0_i_5__0_n_0 }));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[0]_i_3__0 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[0]_i_3__0_n_0 ,\wordcnt_reg[0]_i_3__0_n_1 ,\wordcnt_reg[0]_i_3__0_n_2 ,\wordcnt_reg[0]_i_3__0_n_3 ,\wordcnt_reg[0]_i_3__0_n_4 ,\wordcnt_reg[0]_i_3__0_n_5 ,\wordcnt_reg[0]_i_3__0_n_6 ,\wordcnt_reg[0]_i_3__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1}),
        .O({\wordcnt_reg[0]_i_3__0_n_8 ,\wordcnt_reg[0]_i_3__0_n_9 ,\wordcnt_reg[0]_i_3__0_n_10 ,\wordcnt_reg[0]_i_3__0_n_11 ,\wordcnt_reg[0]_i_3__0_n_12 ,\wordcnt_reg[0]_i_3__0_n_13 ,\wordcnt_reg[0]_i_3__0_n_14 ,\wordcnt_reg[0]_i_3__0_n_15 }),
        .S({wordcnt_reg[7:1],\wordcnt[0]_i_6__0_n_0 }));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[10] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[8]_i_1__0_n_13 ),
        .Q(wordcnt_reg[10]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[10]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1__0_n_13 ),
        .Q(\wordcnt_reg[10]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[11] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[8]_i_1__0_n_12 ),
        .Q(wordcnt_reg[11]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[11]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1__0_n_12 ),
        .Q(\wordcnt_reg[11]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[12] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[8]_i_1__0_n_11 ),
        .Q(wordcnt_reg[12]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[12]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1__0_n_11 ),
        .Q(\wordcnt_reg[12]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[13] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[8]_i_1__0_n_10 ),
        .Q(wordcnt_reg[13]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[13]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1__0_n_10 ),
        .Q(\wordcnt_reg[13]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[14] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[8]_i_1__0_n_9 ),
        .Q(wordcnt_reg[14]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[14]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1__0_n_9 ),
        .Q(\wordcnt_reg[14]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[15] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[8]_i_1__0_n_8 ),
        .Q(wordcnt_reg[15]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[15]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1__0_n_8 ),
        .Q(\wordcnt_reg[15]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[16] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[16]_i_1__0_n_15 ),
        .Q(wordcnt_reg[16]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[16]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1__0_n_15 ),
        .Q(\wordcnt_reg[16]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[16]__0_i_1__0 
       (.CI(\wordcnt_reg[8]__0_i_1__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[16]__0_i_1__0_n_0 ,\wordcnt_reg[16]__0_i_1__0_n_1 ,\wordcnt_reg[16]__0_i_1__0_n_2 ,\wordcnt_reg[16]__0_i_1__0_n_3 ,\wordcnt_reg[16]__0_i_1__0_n_4 ,\wordcnt_reg[16]__0_i_1__0_n_5 ,\wordcnt_reg[16]__0_i_1__0_n_6 ,\wordcnt_reg[16]__0_i_1__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\wordcnt_reg[16]__0_i_1__0_n_8 ,\wordcnt_reg[16]__0_i_1__0_n_9 ,\wordcnt_reg[16]__0_i_1__0_n_10 ,\wordcnt_reg[16]__0_i_1__0_n_11 ,\wordcnt_reg[16]__0_i_1__0_n_12 ,\wordcnt_reg[16]__0_i_1__0_n_13 ,\wordcnt_reg[16]__0_i_1__0_n_14 ,\wordcnt_reg[16]__0_i_1__0_n_15 }),
        .S({\wordcnt_reg[23]__0_n_0 ,\wordcnt_reg[22]__0_n_0 ,\wordcnt_reg[21]__0_n_0 ,\wordcnt_reg[20]__0_n_0 ,\wordcnt_reg[19]__0_n_0 ,\wordcnt_reg[18]__0_n_0 ,\wordcnt_reg[17]__0_n_0 ,\wordcnt_reg[16]__0_n_0 }));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[16]_i_1__0 
       (.CI(\wordcnt_reg[8]_i_1__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[16]_i_1__0_n_0 ,\wordcnt_reg[16]_i_1__0_n_1 ,\wordcnt_reg[16]_i_1__0_n_2 ,\wordcnt_reg[16]_i_1__0_n_3 ,\wordcnt_reg[16]_i_1__0_n_4 ,\wordcnt_reg[16]_i_1__0_n_5 ,\wordcnt_reg[16]_i_1__0_n_6 ,\wordcnt_reg[16]_i_1__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\wordcnt_reg[16]_i_1__0_n_8 ,\wordcnt_reg[16]_i_1__0_n_9 ,\wordcnt_reg[16]_i_1__0_n_10 ,\wordcnt_reg[16]_i_1__0_n_11 ,\wordcnt_reg[16]_i_1__0_n_12 ,\wordcnt_reg[16]_i_1__0_n_13 ,\wordcnt_reg[16]_i_1__0_n_14 ,\wordcnt_reg[16]_i_1__0_n_15 }),
        .S(wordcnt_reg[23:16]));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[17] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[16]_i_1__0_n_14 ),
        .Q(wordcnt_reg[17]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[17]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1__0_n_14 ),
        .Q(\wordcnt_reg[17]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[18] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[16]_i_1__0_n_13 ),
        .Q(wordcnt_reg[18]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[18]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1__0_n_13 ),
        .Q(\wordcnt_reg[18]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[19] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[16]_i_1__0_n_12 ),
        .Q(wordcnt_reg[19]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[19]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1__0_n_12 ),
        .Q(\wordcnt_reg[19]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[1] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[0]_i_3__0_n_14 ),
        .Q(wordcnt_reg[1]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[1]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3__0_n_14 ),
        .Q(\wordcnt_reg[1]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[20] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[16]_i_1__0_n_11 ),
        .Q(wordcnt_reg[20]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[20]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1__0_n_11 ),
        .Q(\wordcnt_reg[20]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[21] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[16]_i_1__0_n_10 ),
        .Q(wordcnt_reg[21]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[21]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1__0_n_10 ),
        .Q(\wordcnt_reg[21]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[22] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[16]_i_1__0_n_9 ),
        .Q(wordcnt_reg[22]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[22]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1__0_n_9 ),
        .Q(\wordcnt_reg[22]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[23] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[16]_i_1__0_n_8 ),
        .Q(wordcnt_reg[23]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[23]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[16]__0_i_1__0_n_8 ),
        .Q(\wordcnt_reg[23]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[24] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[24]_i_1__0_n_15 ),
        .Q(wordcnt_reg[24]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[24]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1__0_n_15 ),
        .Q(\wordcnt_reg[24]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[24]__0_i_1__0 
       (.CI(\wordcnt_reg[16]__0_i_1__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_wordcnt_reg[24]__0_i_1__0_CO_UNCONNECTED [7:6],\wordcnt_reg[24]__0_i_1__0_n_2 ,\wordcnt_reg[24]__0_i_1__0_n_3 ,\wordcnt_reg[24]__0_i_1__0_n_4 ,\wordcnt_reg[24]__0_i_1__0_n_5 ,\wordcnt_reg[24]__0_i_1__0_n_6 ,\wordcnt_reg[24]__0_i_1__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_wordcnt_reg[24]__0_i_1__0_O_UNCONNECTED [7],\wordcnt_reg[24]__0_i_1__0_n_9 ,\wordcnt_reg[24]__0_i_1__0_n_10 ,\wordcnt_reg[24]__0_i_1__0_n_11 ,\wordcnt_reg[24]__0_i_1__0_n_12 ,\wordcnt_reg[24]__0_i_1__0_n_13 ,\wordcnt_reg[24]__0_i_1__0_n_14 ,\wordcnt_reg[24]__0_i_1__0_n_15 }),
        .S({1'b0,\wordcnt_reg[30]__0_n_0 ,\wordcnt_reg[29]__0_n_0 ,\wordcnt_reg[28]__0_n_0 ,\wordcnt_reg[27]__0_n_0 ,\wordcnt_reg[26]__0_n_0 ,\wordcnt_reg[25]__0_n_0 ,\wordcnt_reg[24]__0_n_0 }));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[24]_i_1__0 
       (.CI(\wordcnt_reg[16]_i_1__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_wordcnt_reg[24]_i_1__0_CO_UNCONNECTED [7:6],\wordcnt_reg[24]_i_1__0_n_2 ,\wordcnt_reg[24]_i_1__0_n_3 ,\wordcnt_reg[24]_i_1__0_n_4 ,\wordcnt_reg[24]_i_1__0_n_5 ,\wordcnt_reg[24]_i_1__0_n_6 ,\wordcnt_reg[24]_i_1__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_wordcnt_reg[24]_i_1__0_O_UNCONNECTED [7],\wordcnt_reg[24]_i_1__0_n_9 ,\wordcnt_reg[24]_i_1__0_n_10 ,\wordcnt_reg[24]_i_1__0_n_11 ,\wordcnt_reg[24]_i_1__0_n_12 ,\wordcnt_reg[24]_i_1__0_n_13 ,\wordcnt_reg[24]_i_1__0_n_14 ,\wordcnt_reg[24]_i_1__0_n_15 }),
        .S({1'b0,wordcnt_reg[30:24]}));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[25] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[24]_i_1__0_n_14 ),
        .Q(wordcnt_reg[25]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[25]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1__0_n_14 ),
        .Q(\wordcnt_reg[25]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[26] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[24]_i_1__0_n_13 ),
        .Q(wordcnt_reg[26]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[26]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1__0_n_13 ),
        .Q(\wordcnt_reg[26]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[27] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[24]_i_1__0_n_12 ),
        .Q(wordcnt_reg[27]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[27]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1__0_n_12 ),
        .Q(\wordcnt_reg[27]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[28] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[24]_i_1__0_n_11 ),
        .Q(wordcnt_reg[28]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[28]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1__0_n_11 ),
        .Q(\wordcnt_reg[28]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[29] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[24]_i_1__0_n_10 ),
        .Q(wordcnt_reg[29]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[29]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1__0_n_10 ),
        .Q(\wordcnt_reg[29]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[2] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[0]_i_3__0_n_13 ),
        .Q(wordcnt_reg[2]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[2]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3__0_n_13 ),
        .Q(\wordcnt_reg[2]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[30] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[24]_i_1__0_n_9 ),
        .Q(wordcnt_reg[30]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[30]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[24]__0_i_1__0_n_9 ),
        .Q(\wordcnt_reg[30]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[3] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[0]_i_3__0_n_12 ),
        .Q(wordcnt_reg[3]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[3]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3__0_n_12 ),
        .Q(\wordcnt_reg[3]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[4] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[0]_i_3__0_n_11 ),
        .Q(wordcnt_reg[4]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[4]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3__0_n_11 ),
        .Q(\wordcnt_reg[4]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[5] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[0]_i_3__0_n_10 ),
        .Q(wordcnt_reg[5]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[5]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3__0_n_10 ),
        .Q(\wordcnt_reg[5]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[6] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[0]_i_3__0_n_9 ),
        .Q(wordcnt_reg[6]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[6]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3__0_n_9 ),
        .Q(\wordcnt_reg[6]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[7] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[0]_i_3__0_n_8 ),
        .Q(wordcnt_reg[7]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[7]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[0]__0_i_3__0_n_8 ),
        .Q(\wordcnt_reg[7]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[8] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[8]_i_1__0_n_15 ),
        .Q(wordcnt_reg[8]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[8]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1__0_n_15 ),
        .Q(\wordcnt_reg[8]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[8]__0_i_1__0 
       (.CI(\wordcnt_reg[0]__0_i_3__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[8]__0_i_1__0_n_0 ,\wordcnt_reg[8]__0_i_1__0_n_1 ,\wordcnt_reg[8]__0_i_1__0_n_2 ,\wordcnt_reg[8]__0_i_1__0_n_3 ,\wordcnt_reg[8]__0_i_1__0_n_4 ,\wordcnt_reg[8]__0_i_1__0_n_5 ,\wordcnt_reg[8]__0_i_1__0_n_6 ,\wordcnt_reg[8]__0_i_1__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\wordcnt_reg[8]__0_i_1__0_n_8 ,\wordcnt_reg[8]__0_i_1__0_n_9 ,\wordcnt_reg[8]__0_i_1__0_n_10 ,\wordcnt_reg[8]__0_i_1__0_n_11 ,\wordcnt_reg[8]__0_i_1__0_n_12 ,\wordcnt_reg[8]__0_i_1__0_n_13 ,\wordcnt_reg[8]__0_i_1__0_n_14 ,\wordcnt_reg[8]__0_i_1__0_n_15 }),
        .S({\wordcnt_reg[15]__0_n_0 ,\wordcnt_reg[14]__0_n_0 ,\wordcnt_reg[13]__0_n_0 ,\wordcnt_reg[12]__0_n_0 ,\wordcnt_reg[11]__0_n_0 ,\wordcnt_reg[10]__0_n_0 ,\wordcnt_reg[9]__0_n_0 ,\wordcnt_reg[8]__0_n_0 }));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \wordcnt_reg[8]_i_1__0 
       (.CI(\wordcnt_reg[0]_i_3__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[8]_i_1__0_n_0 ,\wordcnt_reg[8]_i_1__0_n_1 ,\wordcnt_reg[8]_i_1__0_n_2 ,\wordcnt_reg[8]_i_1__0_n_3 ,\wordcnt_reg[8]_i_1__0_n_4 ,\wordcnt_reg[8]_i_1__0_n_5 ,\wordcnt_reg[8]_i_1__0_n_6 ,\wordcnt_reg[8]_i_1__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\wordcnt_reg[8]_i_1__0_n_8 ,\wordcnt_reg[8]_i_1__0_n_9 ,\wordcnt_reg[8]_i_1__0_n_10 ,\wordcnt_reg[8]_i_1__0_n_11 ,\wordcnt_reg[8]_i_1__0_n_12 ,\wordcnt_reg[8]_i_1__0_n_13 ,\wordcnt_reg[8]_i_1__0_n_14 ,\wordcnt_reg[8]_i_1__0_n_15 }),
        .S(wordcnt_reg[15:8]));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[9] 
       (.C(aclk_sig),
        .CE(\wordcnt[0]_i_2__0_n_0 ),
        .D(\wordcnt_reg[8]_i_1__0_n_14 ),
        .Q(wordcnt_reg[9]),
        .R(\wordcnt[0]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \wordcnt_reg[9]__0 
       (.C(aclk_sig),
        .CE(wordcnt0),
        .D(\wordcnt_reg[8]__0_i_1__0_n_14 ),
        .Q(\wordcnt_reg[9]__0_n_0 ),
        .R(\wordcnt[0]__0_i_1__0_n_0 ));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Camif
   (DO,
    ackInvCamifConfigSynth,
    ackInvCamifConfig,
    stateOp_reg_0,
    ackInvCamifGetReg,
    ackInvCamifModReg,
    ackInvCamifSetReg,
    ackInvCamifGetCorereg,
    ackInvCamifSetCorereg,
    \ixTExp_lcl_reg[1]_0 ,
    \ixTExp_sig_reg[2]_0 ,
    \stateLive_reg[2]_0 ,
    \stateConfig_reg[3]_0 ,
    synthNotLive_reg_0,
    \stateSynth_reg[2]_0 ,
    camifToVideoinAXIS_tlast,
    \col_reg[10]_0 ,
    \row_reg[11]_0 ,
    camifToVideoinAXIS_tvalid,
    \rowRaw_lcl_reg[1]_0 ,
    \row_reg[0]_0 ,
    \rowRaw_lcl_reg[11]_0 ,
    \col_reg[1]_0 ,
    camifToVideoinAXIS_tdata,
    \mask_reg[0] ,
    grayToManyAXIS_tvalid_sig_reg,
    \stateStream_reg[0] ,
    synthNotLive_reg_1,
    \ixTExp_sig_reg[2]_1 ,
    \ixTExp_sig_reg[1]_0 ,
    \stateIgr_reg[1] ,
    \stateIgr_reg[1]_0 ,
    \stateIgr_reg[1]_1 ,
    toVideoinAXIS_tvalid_sig_reg_0,
    \FSM_sequential_stateRgbegr_reg[0] ,
    \klm_reg[0] ,
    \klm_reg[0]_0 ,
    \klm_reg[0]_1 ,
    \klm_reg[0]_2 ,
    \klm_reg[0]_3 ,
    \klm_reg[0]_4 ,
    \klm_reg[0]_5 ,
    \klm_reg[0]_6 ,
    \regVal_reg[6]_0 ,
    \regVal_reg[7]_0 ,
    \getCoreregVal_sig_reg[31]_0 ,
    \regVal_reg[5]_0 ,
    \regVal_reg[4]_0 ,
    \regVal_reg[3]_0 ,
    \regVal_reg[1]_0 ,
    \regVal_reg[0]_0 ,
    \liveSetRegAddr_reg[13]_0 ,
    scl,
    sda,
    aclk_sig,
    csi_clk_n,
    csi_clk_p,
    mipi_phy_if_data_n,
    mipi_phy_if_data_p,
    E,
    sda_sig_reg,
    stateOp47_out,
    synthNotLive,
    hdrNotFix,
    Q,
    reqInvConfigSynth,
    reqInvConfig,
    reqInvModReg,
    reqInvGetReg,
    reqInvSetReg,
    i2cReadNotWrite_reg_0,
    tkclk,
    ackLiveToConfigSetReg_reg_0,
    D,
    \i2cRegaddr_reg[13]_0 ,
    \i2cRegaddr_reg[12]_0 ,
    \i2cRegaddr_reg[6]_0 ,
    \i2cRegaddr_reg[4]_0 ,
    \i2cRegaddr_reg[3]_0 ,
    \i2cRegaddr_reg[0]_0 ,
    \i_reg[0]__0_0 ,
    rng,
    \row_reg[0]_1 ,
    \i_reg[0]__1_0 ,
    NRowRaw,
    \stateSynth_reg[0]_0 ,
    \stateSynth_reg[0]_1 ,
    \stateSynth_reg[0]_2 ,
    NColRaw,
    reqInvGetCorereg,
    reqInvSetCorereg,
    stateCorecfg0,
    ackInvGetCorereg_sig_reg_0,
    i2cReadNotWrite_reg_1,
    \capt_reg[0] ,
    grayVideoinToManyAXIS_tvalid,
    \stateStream_reg[0]_0 ,
    \klm_reg[0]_7 ,
    enEobufB_reg,
    \dwrEobuf_reg[63] ,
    \retbuf[0][0]_i_7 ,
    \tixVSynthmode_reg[7]_0 ,
    \toVideoinAXIS_tdata_sig_reg[23]_0 ,
    \i2cRegaddr_reg[15]_0 ,
    \corecfgAXIL_awaddr_reg[12]_0 ,
    \corecfgAXIL_wdata_reg[31]_0 ,
    \corecfgAXIL_araddr_reg[12]_0 );
  output [6:0]DO;
  output ackInvCamifConfigSynth;
  output ackInvCamifConfig;
  output stateOp_reg_0;
  output ackInvCamifGetReg;
  output ackInvCamifModReg;
  output ackInvCamifSetReg;
  output ackInvCamifGetCorereg;
  output ackInvCamifSetCorereg;
  output \ixTExp_lcl_reg[1]_0 ;
  output [0:0]\ixTExp_sig_reg[2]_0 ;
  output [2:0]\stateLive_reg[2]_0 ;
  output \stateConfig_reg[3]_0 ;
  output synthNotLive_reg_0;
  output [0:0]\stateSynth_reg[2]_0 ;
  output camifToVideoinAXIS_tlast;
  output [7:0]\col_reg[10]_0 ;
  output [8:0]\row_reg[11]_0 ;
  output camifToVideoinAXIS_tvalid;
  output \rowRaw_lcl_reg[1]_0 ;
  output \row_reg[0]_0 ;
  output [8:0]\rowRaw_lcl_reg[11]_0 ;
  output \col_reg[1]_0 ;
  output [23:0]camifToVideoinAXIS_tdata;
  output [0:0]\mask_reg[0] ;
  output grayToManyAXIS_tvalid_sig_reg;
  output \stateStream_reg[0] ;
  output synthNotLive_reg_1;
  output \ixTExp_sig_reg[2]_1 ;
  output \ixTExp_sig_reg[1]_0 ;
  output [0:0]\stateIgr_reg[1] ;
  output [0:0]\stateIgr_reg[1]_0 ;
  output \stateIgr_reg[1]_1 ;
  output toVideoinAXIS_tvalid_sig_reg_0;
  output \FSM_sequential_stateRgbegr_reg[0] ;
  output \klm_reg[0] ;
  output \klm_reg[0]_0 ;
  output \klm_reg[0]_1 ;
  output \klm_reg[0]_2 ;
  output \klm_reg[0]_3 ;
  output \klm_reg[0]_4 ;
  output \klm_reg[0]_5 ;
  output \klm_reg[0]_6 ;
  output \regVal_reg[6]_0 ;
  output [1:0]\regVal_reg[7]_0 ;
  output [25:0]\getCoreregVal_sig_reg[31]_0 ;
  output \regVal_reg[5]_0 ;
  output \regVal_reg[4]_0 ;
  output \regVal_reg[3]_0 ;
  output \regVal_reg[1]_0 ;
  output \regVal_reg[0]_0 ;
  output [1:0]\liveSetRegAddr_reg[13]_0 ;
  inout scl;
  inout sda;
  input aclk_sig;
  input csi_clk_n;
  input csi_clk_p;
  input [3:0]mipi_phy_if_data_n;
  input [3:0]mipi_phy_if_data_p;
  input [0:0]E;
  input sda_sig_reg;
  input stateOp47_out;
  input synthNotLive;
  input hdrNotFix;
  input [1:0]Q;
  input reqInvConfigSynth;
  input reqInvConfig;
  input reqInvModReg;
  input reqInvGetReg;
  input reqInvSetReg;
  input i2cReadNotWrite_reg_0;
  input tkclk;
  input ackLiveToConfigSetReg_reg_0;
  input [23:0]D;
  input \i2cRegaddr_reg[13]_0 ;
  input \i2cRegaddr_reg[12]_0 ;
  input \i2cRegaddr_reg[6]_0 ;
  input \i2cRegaddr_reg[4]_0 ;
  input \i2cRegaddr_reg[3]_0 ;
  input \i2cRegaddr_reg[0]_0 ;
  input \i_reg[0]__0_0 ;
  input rng;
  input \row_reg[0]_1 ;
  input \i_reg[0]__1_0 ;
  input [2:0]NRowRaw;
  input \stateSynth_reg[0]_0 ;
  input \stateSynth_reg[0]_1 ;
  input \stateSynth_reg[0]_2 ;
  input [2:0]NColRaw;
  input reqInvGetCorereg;
  input reqInvSetCorereg;
  input stateCorecfg0;
  input ackInvGetCorereg_sig_reg_0;
  input i2cReadNotWrite_reg_1;
  input \capt_reg[0] ;
  input grayVideoinToManyAXIS_tvalid;
  input [1:0]\stateStream_reg[0]_0 ;
  input [1:0]\klm_reg[0]_7 ;
  input [0:0]enEobufB_reg;
  input [0:0]\dwrEobuf_reg[63] ;
  input \retbuf[0][0]_i_7 ;
  input [7:0]\tixVSynthmode_reg[7]_0 ;
  input [0:0]\toVideoinAXIS_tdata_sig_reg[23]_0 ;
  input [9:0]\i2cRegaddr_reg[15]_0 ;
  input [6:0]\corecfgAXIL_awaddr_reg[12]_0 ;
  input [31:0]\corecfgAXIL_wdata_reg[31]_0 ;
  input [6:0]\corecfgAXIL_araddr_reg[12]_0 ;

  wire [23:0]D;
  wire [6:0]DO;
  wire [0:0]E;
  wire \FSM_sequential_stateRgbegr_reg[0] ;
  wire [2:0]NColRaw;
  wire [2:0]NRowRaw;
  wire [1:0]Q;
  wire [7:0]TLinepad;
  wire \aParrom[10]_i_3_n_0 ;
  wire \aParrom[10]_i_4_n_0 ;
  wire \aParrom[10]_i_5_n_0 ;
  wire \aParrom[10]_i_6_n_0 ;
  wire \aParrom[5]_i_2_n_0 ;
  wire \aParrom[8]_i_3_n_0 ;
  wire \aParrom[9]_i_2_n_0 ;
  wire \aParrom[9]_i_3_n_0 ;
  wire \aParrom_reg_n_0_[0] ;
  wire \aParrom_reg_n_0_[10] ;
  wire \aParrom_reg_n_0_[1] ;
  wire \aParrom_reg_n_0_[2] ;
  wire \aParrom_reg_n_0_[3] ;
  wire \aParrom_reg_n_0_[4] ;
  wire \aParrom_reg_n_0_[5] ;
  wire \aParrom_reg_n_0_[6] ;
  wire \aParrom_reg_n_0_[7] ;
  wire \aParrom_reg_n_0_[8] ;
  wire \aParrom_reg_n_0_[9] ;
  wire ackInvCamifConfig;
  wire ackInvCamifConfigSynth;
  wire ackInvCamifGetCorereg;
  wire ackInvCamifGetReg;
  wire ackInvCamifModReg;
  wire ackInvCamifSetCorereg;
  wire ackInvCamifSetReg;
  wire ackInvGetCorereg_sig_i_1_n_0;
  wire ackInvGetCorereg_sig_reg_0;
  wire ackInvGetReg_sig_i_1_n_0;
  wire ackInvGetReg_sig_i_2_n_0;
  wire ackInvGetReg_sig_i_3_n_0;
  wire ackInvModReg_sig_i_1_n_0;
  wire ackInvModReg_sig_i_2_n_0;
  wire ackInvSetCorereg_sig_i_1_n_0;
  wire ackInvSetCorereg_sig_i_2_n_0;
  wire ackInvSetReg_sig_i_1_n_0;
  wire ackInvSetReg_sig_i_2_n_0;
  wire ackLiveToConfigSetReg;
  wire ackLiveToConfigSetReg_i_1_n_0;
  wire ackLiveToConfigSetReg_i_2_n_0;
  wire ackLiveToConfigSetReg_reg_0;
  wire ackLiveToConfigSetReg_reg_n_0;
  wire aclk_sig;
  wire \b_lcl[0]_i_1_n_0 ;
  wire \b_lcl[10]_i_1_n_0 ;
  wire \b_lcl[10]_i_2_n_0 ;
  wire \b_lcl[11]_i_1_n_0 ;
  wire \b_lcl[11]_i_2_n_0 ;
  wire \b_lcl[11]_i_3_n_0 ;
  wire \b_lcl[11]_i_4_n_0 ;
  wire \b_lcl[11]_i_5_n_0 ;
  wire \b_lcl[11]_i_6_n_0 ;
  wire \b_lcl[11]_i_7_n_0 ;
  wire \b_lcl[11]_i_8_n_0 ;
  wire \b_lcl[1]_i_1_n_0 ;
  wire \b_lcl[2]_i_1_n_0 ;
  wire \b_lcl[3]_i_1_n_0 ;
  wire \b_lcl[4]_i_1_n_0 ;
  wire \b_lcl[5]_i_1_n_0 ;
  wire \b_lcl[5]_i_2_n_0 ;
  wire \b_lcl[5]_i_3_n_0 ;
  wire \b_lcl[6]_i_1_n_0 ;
  wire \b_lcl[6]_i_2_n_0 ;
  wire \b_lcl[7]_i_1_n_0 ;
  wire \b_lcl[7]_i_2_n_0 ;
  wire \b_lcl[8]_i_1_n_0 ;
  wire \b_lcl[8]_i_2_n_0 ;
  wire \b_lcl[9]_i_1_n_0 ;
  wire \b_lcl[9]_i_2_n_0 ;
  wire \b_lcl_reg_n_0_[0] ;
  wire \b_lcl_reg_n_0_[10] ;
  wire \b_lcl_reg_n_0_[11] ;
  wire \b_lcl_reg_n_0_[1] ;
  wire \b_lcl_reg_n_0_[2] ;
  wire \b_lcl_reg_n_0_[3] ;
  wire \b_lcl_reg_n_0_[4] ;
  wire \b_lcl_reg_n_0_[5] ;
  wire \b_lcl_reg_n_0_[6] ;
  wire \b_lcl_reg_n_0_[7] ;
  wire \b_lcl_reg_n_0_[8] ;
  wire \b_lcl_reg_n_0_[9] ;
  wire [10:0]blk1_out;
  wire \blk[10]_i_3_n_0 ;
  wire \blk[10]_i_4_n_0 ;
  wire \blk[10]_i_5_n_0 ;
  wire \blk[10]_i_6_n_0 ;
  wire \blk_reg_n_0_[0] ;
  wire \blk_reg_n_0_[10] ;
  wire \blk_reg_n_0_[1] ;
  wire \blk_reg_n_0_[2] ;
  wire \blk_reg_n_0_[3] ;
  wire \blk_reg_n_0_[4] ;
  wire \blk_reg_n_0_[5] ;
  wire \blk_reg_n_0_[6] ;
  wire \blk_reg_n_0_[7] ;
  wire \blk_reg_n_0_[8] ;
  wire \blk_reg_n_0_[9] ;
  wire bsh;
  wire \bsh[0]_i_1_n_0 ;
  wire \bsh[1]_i_2_n_0 ;
  wire \bsh[1]_i_3_n_0 ;
  wire \bsh[1]_i_4_n_0 ;
  wire \bsh[1]_i_5_n_0 ;
  wire \bsh_reg_n_0_[0] ;
  wire \bsh_reg_n_0_[1] ;
  wire bytecnt0;
  wire \bytecnt[1]_i_1_n_0 ;
  wire \bytecnt[1]_i_2_n_0 ;
  wire \bytecnt[1]_i_3_n_0 ;
  wire \bytecnt[1]_i_4_n_0 ;
  wire \bytecnt[2]_i_2_n_0 ;
  wire \bytecnt[2]_i_3_n_0 ;
  wire \bytecnt[2]_i_4_n_0 ;
  wire \bytecnt_reg_n_0_[0] ;
  wire \bytecnt_reg_n_0_[1] ;
  wire \bytecnt_reg_n_0_[2] ;
  wire [30:24]camifGetCoreregVal;
  wire [6:0]camifGetRegVal;
  wire [23:0]camifToVideoinAXIS_tdata;
  wire camifToVideoinAXIS_tlast;
  wire camifToVideoinAXIS_tvalid;
  wire \capt_reg[0] ;
  wire [2:0]col;
  wire \col[0]_i_1_n_0 ;
  wire \col[10]_i_1_n_0 ;
  wire \col[10]_i_2_n_0 ;
  wire \col[10]_i_3_n_0 ;
  wire \col[1]_i_1_n_0 ;
  wire \col[2]_i_1_n_0 ;
  wire \col[3]_i_1_n_0 ;
  wire \col[4]_i_1_n_0 ;
  wire \col[5]_i_1_n_0 ;
  wire \col[5]_i_2_n_0 ;
  wire \col[6]_i_1_n_0 ;
  wire \col[7]_i_1_n_0 ;
  wire \col[8]_i_1_n_0 ;
  wire \col[9]_i_1_n_0 ;
  wire \col[9]_i_2_n_0 ;
  wire \col[9]_i_3_n_0 ;
  wire [7:0]\col_reg[10]_0 ;
  wire \col_reg[1]_0 ;
  wire [3:0]colchk;
  wire \colchk[0]_i_1_n_0 ;
  wire \colchk[1]_i_1_n_0 ;
  wire \colchk[2]_i_1_n_0 ;
  wire \colchk[3]_i_1_n_0 ;
  wire \colchk[3]_i_2_n_0 ;
  wire \colchk[3]_i_3_n_0 ;
  wire \colchk[3]_i_4_n_0 ;
  wire \corecfgAXIL_araddr[12]_i_1_n_0 ;
  wire [6:0]\corecfgAXIL_araddr_reg[12]_0 ;
  wire \corecfgAXIL_araddr_reg_n_0_[12] ;
  wire \corecfgAXIL_araddr_reg_n_0_[2] ;
  wire \corecfgAXIL_araddr_reg_n_0_[3] ;
  wire \corecfgAXIL_araddr_reg_n_0_[4] ;
  wire \corecfgAXIL_araddr_reg_n_0_[5] ;
  wire \corecfgAXIL_araddr_reg_n_0_[6] ;
  wire \corecfgAXIL_araddr_reg_n_0_[7] ;
  wire corecfgAXIL_arready;
  wire \corecfgAXIL_awaddr[12]_i_1_n_0 ;
  wire [6:0]\corecfgAXIL_awaddr_reg[12]_0 ;
  wire \corecfgAXIL_awaddr_reg_n_0_[12] ;
  wire \corecfgAXIL_awaddr_reg_n_0_[2] ;
  wire \corecfgAXIL_awaddr_reg_n_0_[3] ;
  wire \corecfgAXIL_awaddr_reg_n_0_[4] ;
  wire \corecfgAXIL_awaddr_reg_n_0_[5] ;
  wire \corecfgAXIL_awaddr_reg_n_0_[6] ;
  wire \corecfgAXIL_awaddr_reg_n_0_[7] ;
  wire corecfgAXIL_bvalid;
  wire [31:0]corecfgAXIL_rdata;
  wire corecfgAXIL_rvalid;
  wire [31:0]\corecfgAXIL_wdata_reg[31]_0 ;
  wire \corecfgAXIL_wdata_reg_n_0_[0] ;
  wire \corecfgAXIL_wdata_reg_n_0_[10] ;
  wire \corecfgAXIL_wdata_reg_n_0_[11] ;
  wire \corecfgAXIL_wdata_reg_n_0_[12] ;
  wire \corecfgAXIL_wdata_reg_n_0_[13] ;
  wire \corecfgAXIL_wdata_reg_n_0_[14] ;
  wire \corecfgAXIL_wdata_reg_n_0_[15] ;
  wire \corecfgAXIL_wdata_reg_n_0_[16] ;
  wire \corecfgAXIL_wdata_reg_n_0_[17] ;
  wire \corecfgAXIL_wdata_reg_n_0_[18] ;
  wire \corecfgAXIL_wdata_reg_n_0_[19] ;
  wire \corecfgAXIL_wdata_reg_n_0_[1] ;
  wire \corecfgAXIL_wdata_reg_n_0_[20] ;
  wire \corecfgAXIL_wdata_reg_n_0_[21] ;
  wire \corecfgAXIL_wdata_reg_n_0_[22] ;
  wire \corecfgAXIL_wdata_reg_n_0_[23] ;
  wire \corecfgAXIL_wdata_reg_n_0_[24] ;
  wire \corecfgAXIL_wdata_reg_n_0_[25] ;
  wire \corecfgAXIL_wdata_reg_n_0_[26] ;
  wire \corecfgAXIL_wdata_reg_n_0_[27] ;
  wire \corecfgAXIL_wdata_reg_n_0_[28] ;
  wire \corecfgAXIL_wdata_reg_n_0_[29] ;
  wire \corecfgAXIL_wdata_reg_n_0_[2] ;
  wire \corecfgAXIL_wdata_reg_n_0_[30] ;
  wire \corecfgAXIL_wdata_reg_n_0_[31] ;
  wire \corecfgAXIL_wdata_reg_n_0_[3] ;
  wire \corecfgAXIL_wdata_reg_n_0_[4] ;
  wire \corecfgAXIL_wdata_reg_n_0_[5] ;
  wire \corecfgAXIL_wdata_reg_n_0_[6] ;
  wire \corecfgAXIL_wdata_reg_n_0_[7] ;
  wire \corecfgAXIL_wdata_reg_n_0_[8] ;
  wire \corecfgAXIL_wdata_reg_n_0_[9] ;
  wire corecfgAXIL_wready;
  wire csi_clk_n;
  wire csi_clk_p;
  wire csirxss_s_axi_arvalid;
  wire csirxss_s_axi_awready;
  wire csirxss_s_axi_awvalid;
  wire csirxss_s_axi_bready;
  wire csirxss_s_axi_rready;
  wire csirxss_s_axi_wvalid;
  wire [0:0]\dwrEobuf_reg[63] ;
  wire [0:0]enEobufB_reg;
  wire \g0_lcl[0]_i_1_n_0 ;
  wire \g0_lcl[10]_i_1_n_0 ;
  wire \g0_lcl[10]_i_2_n_0 ;
  wire \g0_lcl[11]_i_1_n_0 ;
  wire \g0_lcl[11]_i_2_n_0 ;
  wire \g0_lcl[11]_i_3_n_0 ;
  wire \g0_lcl[11]_i_4_n_0 ;
  wire \g0_lcl[1]_i_1_n_0 ;
  wire \g0_lcl[2]_i_1_n_0 ;
  wire \g0_lcl[3]_i_1_n_0 ;
  wire \g0_lcl[4]_i_1_n_0 ;
  wire \g0_lcl[4]_i_2_n_0 ;
  wire \g0_lcl[5]_i_1_n_0 ;
  wire \g0_lcl[5]_i_2_n_0 ;
  wire \g0_lcl[5]_i_3_n_0 ;
  wire \g0_lcl[6]_i_1_n_0 ;
  wire \g0_lcl[6]_i_2_n_0 ;
  wire \g0_lcl[7]_i_1_n_0 ;
  wire \g0_lcl[7]_i_2_n_0 ;
  wire \g0_lcl[8]_i_1_n_0 ;
  wire \g0_lcl[8]_i_2_n_0 ;
  wire \g0_lcl[9]_i_1_n_0 ;
  wire \g0_lcl[9]_i_2_n_0 ;
  wire \g0_lcl_reg_n_0_[0] ;
  wire \g0_lcl_reg_n_0_[10] ;
  wire \g0_lcl_reg_n_0_[11] ;
  wire \g0_lcl_reg_n_0_[1] ;
  wire \g0_lcl_reg_n_0_[2] ;
  wire \g0_lcl_reg_n_0_[3] ;
  wire \g0_lcl_reg_n_0_[4] ;
  wire \g0_lcl_reg_n_0_[5] ;
  wire \g0_lcl_reg_n_0_[6] ;
  wire \g0_lcl_reg_n_0_[7] ;
  wire \g0_lcl_reg_n_0_[8] ;
  wire \g0_lcl_reg_n_0_[9] ;
  wire \g1_lcl[0]_i_1_n_0 ;
  wire \g1_lcl[10]_i_1_n_0 ;
  wire \g1_lcl[10]_i_2_n_0 ;
  wire \g1_lcl[11]_i_1_n_0 ;
  wire \g1_lcl[11]_i_2_n_0 ;
  wire \g1_lcl[1]_i_1_n_0 ;
  wire \g1_lcl[2]_i_1_n_0 ;
  wire \g1_lcl[3]_i_1_n_0 ;
  wire \g1_lcl[3]_i_2_n_0 ;
  wire \g1_lcl[4]_i_1_n_0 ;
  wire \g1_lcl[4]_i_2_n_0 ;
  wire \g1_lcl[5]_i_1_n_0 ;
  wire \g1_lcl[5]_i_2_n_0 ;
  wire \g1_lcl[5]_i_3_n_0 ;
  wire \g1_lcl[6]_i_1_n_0 ;
  wire \g1_lcl[6]_i_2_n_0 ;
  wire \g1_lcl[7]_i_1_n_0 ;
  wire \g1_lcl[7]_i_2_n_0 ;
  wire \g1_lcl[8]_i_1_n_0 ;
  wire \g1_lcl[8]_i_2_n_0 ;
  wire \g1_lcl[9]_i_1_n_0 ;
  wire \g1_lcl[9]_i_2_n_0 ;
  wire \g1_lcl_reg_n_0_[0] ;
  wire \g1_lcl_reg_n_0_[10] ;
  wire \g1_lcl_reg_n_0_[11] ;
  wire \g1_lcl_reg_n_0_[1] ;
  wire \g1_lcl_reg_n_0_[2] ;
  wire \g1_lcl_reg_n_0_[3] ;
  wire \g1_lcl_reg_n_0_[4] ;
  wire \g1_lcl_reg_n_0_[5] ;
  wire \g1_lcl_reg_n_0_[6] ;
  wire \g1_lcl_reg_n_0_[7] ;
  wire \g1_lcl_reg_n_0_[8] ;
  wire \g1_lcl_reg_n_0_[9] ;
  wire \getCoreregVal_sig[31]_i_1_n_0 ;
  wire [25:0]\getCoreregVal_sig_reg[31]_0 ;
  wire grayToManyAXIS_tvalid_sig_reg;
  wire grayVideoinToManyAXIS_tvalid;
  wire [1:0]gsh;
  wire \gsh[0]_i_1_n_0 ;
  wire \gsh[1]_i_1_n_0 ;
  wire hdrNotFix;
  wire hdrNotFix48_out;
  wire hdrNotFix_reg_n_0;
  wire i0;
  wire i2cReadNotWrite;
  wire i2cReadNotWrite_i_1_n_0;
  wire i2cReadNotWrite_i_4_n_0;
  wire i2cReadNotWrite_i_5_n_0;
  wire i2cReadNotWrite_reg_0;
  wire i2cReadNotWrite_reg_1;
  wire \i2cRegaddr[15]_i_3_n_0 ;
  wire \i2cRegaddr[15]_i_4_n_0 ;
  wire \i2cRegaddr[15]_i_9_n_0 ;
  wire \i2cRegaddr[7]_i_1_n_0 ;
  wire \i2cRegaddr[7]_i_3_n_0 ;
  wire \i2cRegaddr_reg[0]_0 ;
  wire \i2cRegaddr_reg[12]_0 ;
  wire \i2cRegaddr_reg[13]_0 ;
  wire [9:0]\i2cRegaddr_reg[15]_0 ;
  wire \i2cRegaddr_reg[3]_0 ;
  wire \i2cRegaddr_reg[4]_0 ;
  wire \i2cRegaddr_reg[6]_0 ;
  wire \i2cRegaddr_reg_n_0_[0] ;
  wire \i2cRegaddr_reg_n_0_[10] ;
  wire \i2cRegaddr_reg_n_0_[11] ;
  wire \i2cRegaddr_reg_n_0_[12] ;
  wire \i2cRegaddr_reg_n_0_[13] ;
  wire \i2cRegaddr_reg_n_0_[14] ;
  wire \i2cRegaddr_reg_n_0_[15] ;
  wire \i2cRegaddr_reg_n_0_[1] ;
  wire \i2cRegaddr_reg_n_0_[2] ;
  wire \i2cRegaddr_reg_n_0_[3] ;
  wire \i2cRegaddr_reg_n_0_[4] ;
  wire \i2cRegaddr_reg_n_0_[5] ;
  wire \i2cRegaddr_reg_n_0_[6] ;
  wire \i2cRegaddr_reg_n_0_[7] ;
  wire \i2cRegaddr_reg_n_0_[8] ;
  wire \i2cRegaddr_reg_n_0_[9] ;
  wire \i2cSend[7]_i_1_n_0 ;
  wire \i2cSend[7]_i_3_n_0 ;
  wire \i2cSend[7]_i_4_n_0 ;
  wire \i2cSend[7]_i_5_n_0 ;
  wire \i2cSend_reg_n_0_[0] ;
  wire \i2cSend_reg_n_0_[1] ;
  wire \i2cSend_reg_n_0_[2] ;
  wire \i2cSend_reg_n_0_[3] ;
  wire \i2cSend_reg_n_0_[4] ;
  wire \i2cSend_reg_n_0_[5] ;
  wire \i2cSend_reg_n_0_[6] ;
  wire \i2cSend_reg_n_0_[7] ;
  wire \i[0]__0_i_1_n_0 ;
  wire \i[0]__1_i_1_n_0 ;
  wire \i[0]__1_i_2_n_0 ;
  wire \i[0]__1_i_3_n_0 ;
  wire \i[0]__1_i_4_n_0 ;
  wire \i[0]_i_1__0_n_0 ;
  wire \i[1]_i_1__0_n_0 ;
  wire \i[2]_i_1__0_n_0 ;
  wire \i[3]__0_i_1_n_0 ;
  wire \i[3]_i_1__0_n_0 ;
  wire \i[4]_i_1__0_n_0 ;
  wire \i[5]_i_1__0_n_0 ;
  wire \i[5]_i_2__0_n_0 ;
  wire \i[6]_i_1__0_n_0 ;
  wire \i[7]_i_10_n_0 ;
  wire \i[7]_i_11_n_0 ;
  wire \i[7]_i_1__0_n_0 ;
  wire \i[7]_i_2__0_n_0 ;
  wire \i[7]_i_4_n_0 ;
  wire \i[7]_i_5_n_0 ;
  wire [3:0]i_reg;
  wire \i_reg[0]__0_0 ;
  wire \i_reg[0]__0_n_0 ;
  wire \i_reg[0]__1_0 ;
  wire \i_reg[0]__1_n_0 ;
  wire \i_reg_n_0_[1] ;
  wire \i_reg_n_0_[2] ;
  wire \i_reg_n_0_[3] ;
  wire \i_reg_n_0_[4] ;
  wire \i_reg_n_0_[5] ;
  wire \i_reg_n_0_[6] ;
  wire \i_reg_n_0_[7] ;
  wire [1:0]ixTExp;
  wire \ixTExp_lcl[0]_i_1_n_0 ;
  wire \ixTExp_lcl[1]_i_1_n_0 ;
  wire \ixTExp_lcl[2]_i_1_n_0 ;
  wire \ixTExp_lcl[2]_i_2_n_0 ;
  wire \ixTExp_lcl[2]_i_3_n_0 ;
  wire \ixTExp_lcl_reg[1]_0 ;
  wire \ixTExp_lcl_reg_n_0_[0] ;
  wire \ixTExp_lcl_reg_n_0_[1] ;
  wire \ixTExp_lcl_reg_n_0_[2] ;
  wire \ixTExp_sig[0]_i_1_n_0 ;
  wire \ixTExp_sig[1]_i_1_n_0 ;
  wire \ixTExp_sig[2]_i_1_n_0 ;
  wire \ixTExp_sig[2]_i_2_n_0 ;
  wire \ixTExp_sig[2]_i_3_n_0 ;
  wire \ixTExp_sig[2]_i_4_n_0 ;
  wire \ixTExp_sig[2]_i_5_n_0 ;
  wire \ixTExp_sig[2]_i_6_n_0 ;
  wire \ixTExp_sig[2]_i_7_n_0 ;
  wire \ixTExp_sig[2]_i_8_n_0 ;
  wire \ixTExp_sig_reg[1]_0 ;
  wire [0:0]\ixTExp_sig_reg[2]_0 ;
  wire \ixTExp_sig_reg[2]_1 ;
  wire \ixTExp_sig_reg_n_0_[0] ;
  wire \ixTExp_sig_reg_n_0_[1] ;
  wire \ixTExp_sig_reg_n_0_[2] ;
  wire \j[0]_i_1_n_0 ;
  wire \j[15]_i_1_n_0 ;
  wire \j[15]_i_2_n_0 ;
  wire \j[15]_i_4_n_0 ;
  wire \j[1]_i_1_n_0 ;
  wire \j[2]_i_1_n_0 ;
  wire \j[3]_i_1_n_0 ;
  wire \j[4]_i_1_n_0 ;
  wire \j[5]_i_1_n_0 ;
  wire \j[5]_i_2_n_0 ;
  wire \j[6]_i_1_n_0 ;
  wire \j[7]_i_10_n_0 ;
  wire \j[7]_i_11_n_0 ;
  wire \j[7]_i_3_n_0 ;
  wire \j[7]_i_4_n_0 ;
  wire \j[7]_i_5_n_0 ;
  wire \j[7]_i_7_n_0 ;
  wire \j[7]_i_8_n_0 ;
  wire \j[7]_i_9_n_0 ;
  wire [15:0]j_reg;
  wire \j_reg[15]_i_3_n_2 ;
  wire \j_reg[15]_i_3_n_3 ;
  wire \j_reg[15]_i_3_n_4 ;
  wire \j_reg[15]_i_3_n_5 ;
  wire \j_reg[15]_i_3_n_6 ;
  wire \j_reg[15]_i_3_n_7 ;
  wire \j_reg[8]_i_1_n_0 ;
  wire \j_reg[8]_i_1_n_1 ;
  wire \j_reg[8]_i_1_n_2 ;
  wire \j_reg[8]_i_1_n_3 ;
  wire \j_reg[8]_i_1_n_4 ;
  wire \j_reg[8]_i_1_n_5 ;
  wire \j_reg[8]_i_1_n_6 ;
  wire \j_reg[8]_i_1_n_7 ;
  wire \j_reg_n_0_[0] ;
  wire \j_reg_n_0_[1] ;
  wire \j_reg_n_0_[2] ;
  wire \j_reg_n_0_[3] ;
  wire \j_reg_n_0_[4] ;
  wire \j_reg_n_0_[5] ;
  wire \j_reg_n_0_[6] ;
  wire \j_reg_n_0_[7] ;
  wire [1:0]k;
  wire k0;
  wire \k[1]_i_6_n_0 ;
  wire \k[1]_i_8_n_0 ;
  wire \klm[2]_i_4_n_0 ;
  wire \klm[2]_i_5_n_0 ;
  wire \klm_reg[0] ;
  wire \klm_reg[0]_0 ;
  wire \klm_reg[0]_1 ;
  wire \klm_reg[0]_2 ;
  wire \klm_reg[0]_3 ;
  wire \klm_reg[0]_4 ;
  wire \klm_reg[0]_5 ;
  wire \klm_reg[0]_6 ;
  wire [1:0]\klm_reg[0]_7 ;
  wire [2:0]liveIxTExp;
  wire \liveIxTExp[0]_i_1_n_0 ;
  wire \liveIxTExp[1]_i_1_n_0 ;
  wire \liveIxTExp[2]_i_1_n_0 ;
  wire \liveIxTExp[2]_i_2_n_0 ;
  wire liveNotExt;
  wire liveNotExt_i_1_n_0;
  wire [13:0]liveSetRegAddr;
  wire \liveSetRegAddr[13]_i_1_n_0 ;
  wire [1:0]\liveSetRegAddr_reg[13]_0 ;
  wire \liveSetRegVal[0]_i_1_n_0 ;
  wire \liveSetRegVal[1]_i_1_n_0 ;
  wire \liveSetRegVal[2]_i_1_n_0 ;
  wire \liveSetRegVal[3]_i_1_n_0 ;
  wire \liveSetRegVal[4]_i_1_n_0 ;
  wire \liveSetRegVal[6]_i_1_n_0 ;
  wire \liveSetRegVal[7]_i_1_n_0 ;
  wire \liveSetRegVal[7]_i_2_n_0 ;
  wire \liveSetRegVal[7]_i_3_n_0 ;
  wire \liveSetRegVal_reg_n_0_[0] ;
  wire \liveSetRegVal_reg_n_0_[1] ;
  wire \liveSetRegVal_reg_n_0_[2] ;
  wire \liveSetRegVal_reg_n_0_[3] ;
  wire \liveSetRegVal_reg_n_0_[4] ;
  wire \liveSetRegVal_reg_n_0_[6] ;
  wire \liveSetRegVal_reg_n_0_[7] ;
  wire [0:0]\mask_reg[0] ;
  wire [3:0]mipi_phy_if_data_n;
  wire [3:0]mipi_phy_if_data_p;
  wire modNotGetSet;
  wire modNotGetSet_i_1_n_0;
  wire modNotGetSet_i_2_n_0;
  wire modNotGetSet_i_3_n_0;
  wire myI2c_n_0;
  wire myI2c_n_1;
  wire myI2c_n_10;
  wire myI2c_n_11;
  wire myI2c_n_12;
  wire myI2c_n_13;
  wire myI2c_n_14;
  wire myI2c_n_15;
  wire myI2c_n_16;
  wire myI2c_n_2;
  wire myI2c_n_3;
  wire myI2c_n_4;
  wire myI2c_n_5;
  wire myI2c_n_6;
  wire myI2c_n_7;
  wire myI2c_n_8;
  wire myI2c_n_9;
  wire myMipirx_n_177;
  wire myParrom_n_10;
  wire myParrom_n_11;
  wire myParrom_n_12;
  wire myParrom_n_13;
  wire myParrom_n_14;
  wire myParrom_n_15;
  wire myParrom_n_16;
  wire myParrom_n_17;
  wire myParrom_n_18;
  wire myParrom_n_19;
  wire myParrom_n_20;
  wire myParrom_n_21;
  wire myParrom_n_22;
  wire myParrom_n_23;
  wire myParrom_n_24;
  wire myParrom_n_25;
  wire myParrom_n_26;
  wire myParrom_n_27;
  wire myParrom_n_28;
  wire myParrom_n_29;
  wire myParrom_n_30;
  wire myParrom_n_31;
  wire myParrom_n_32;
  wire myParrom_n_33;
  wire myParrom_n_34;
  wire myParrom_n_35;
  wire myParrom_n_36;
  wire myParrom_n_37;
  wire myParrom_n_38;
  wire myParrom_n_39;
  wire myParrom_n_40;
  wire myParrom_n_41;
  wire myParrom_n_42;
  wire myParrom_n_43;
  wire myParrom_n_7;
  wire myParrom_n_8;
  wire myParrom_n_9;
  wire [14:0]p_0_in;
  wire p_0_in0;
  wire [3:1]p_0_in__0;
  wire [15:0]p_0_in__0__0;
  wire p_0_out;
  wire prepdone;
  wire \probe[0]_INST_0_i_1_n_0 ;
  wire \probe[0]_INST_0_i_2_n_0 ;
  wire \r_lcl[0]_i_1_n_0 ;
  wire \r_lcl[10]_i_1_n_0 ;
  wire \r_lcl[10]_i_2_n_0 ;
  wire \r_lcl[11]_i_1_n_0 ;
  wire \r_lcl[11]_i_2_n_0 ;
  wire \r_lcl[1]_i_1_n_0 ;
  wire \r_lcl[2]_i_1_n_0 ;
  wire \r_lcl[3]_i_1_n_0 ;
  wire \r_lcl[4]_i_1_n_0 ;
  wire \r_lcl[5]_i_1_n_0 ;
  wire \r_lcl[5]_i_2_n_0 ;
  wire \r_lcl[5]_i_3_n_0 ;
  wire \r_lcl[6]_i_1_n_0 ;
  wire \r_lcl[6]_i_2_n_0 ;
  wire \r_lcl[7]_i_1_n_0 ;
  wire \r_lcl[7]_i_2_n_0 ;
  wire \r_lcl[8]_i_1_n_0 ;
  wire \r_lcl[8]_i_2_n_0 ;
  wire \r_lcl[9]_i_1_n_0 ;
  wire \r_lcl[9]_i_2_n_0 ;
  wire \r_lcl_reg_n_0_[0] ;
  wire \r_lcl_reg_n_0_[10] ;
  wire \r_lcl_reg_n_0_[11] ;
  wire \r_lcl_reg_n_0_[1] ;
  wire \r_lcl_reg_n_0_[2] ;
  wire \r_lcl_reg_n_0_[3] ;
  wire \r_lcl_reg_n_0_[4] ;
  wire \r_lcl_reg_n_0_[5] ;
  wire \r_lcl_reg_n_0_[6] ;
  wire \r_lcl_reg_n_0_[7] ;
  wire \r_lcl_reg_n_0_[8] ;
  wire \r_lcl_reg_n_0_[9] ;
  wire \regVal[7]_i_1_n_0 ;
  wire \regVal_reg[0]_0 ;
  wire \regVal_reg[1]_0 ;
  wire \regVal_reg[3]_0 ;
  wire \regVal_reg[4]_0 ;
  wire \regVal_reg[5]_0 ;
  wire \regVal_reg[6]_0 ;
  wire [1:0]\regVal_reg[7]_0 ;
  wire reqInvConfig;
  wire reqInvConfigSynth;
  wire reqInvGetCorereg;
  wire reqInvGetReg;
  wire reqInvModReg;
  wire reqInvSetCorereg;
  wire reqInvSetReg;
  wire \retbuf[0][0]_i_7 ;
  wire rng;
  wire \rowRaw_lcl[0]_i_1_n_0 ;
  wire \rowRaw_lcl[10]_i_1_n_0 ;
  wire \rowRaw_lcl[10]_i_2_n_0 ;
  wire \rowRaw_lcl[11]_i_1_n_0 ;
  wire \rowRaw_lcl[11]_i_2_n_0 ;
  wire \rowRaw_lcl[11]_i_3_n_0 ;
  wire \rowRaw_lcl[11]_i_4_n_0 ;
  wire \rowRaw_lcl[11]_i_5_n_0 ;
  wire \rowRaw_lcl[11]_i_6_n_0 ;
  wire \rowRaw_lcl[1]_i_1_n_0 ;
  wire \rowRaw_lcl[2]_i_1_n_0 ;
  wire \rowRaw_lcl[2]_i_2_n_0 ;
  wire \rowRaw_lcl[3]_i_1_n_0 ;
  wire \rowRaw_lcl[3]_i_2_n_0 ;
  wire \rowRaw_lcl[4]_i_1_n_0 ;
  wire \rowRaw_lcl[4]_i_2_n_0 ;
  wire \rowRaw_lcl[5]_i_1_n_0 ;
  wire \rowRaw_lcl[5]_i_2_n_0 ;
  wire \rowRaw_lcl[6]_i_1_n_0 ;
  wire \rowRaw_lcl[6]_i_2_n_0 ;
  wire \rowRaw_lcl[7]_i_1_n_0 ;
  wire \rowRaw_lcl[7]_i_2_n_0 ;
  wire \rowRaw_lcl[8]_i_1_n_0 ;
  wire \rowRaw_lcl[8]_i_2_n_0 ;
  wire \rowRaw_lcl[9]_i_1_n_0 ;
  wire \rowRaw_lcl[9]_i_2_n_0 ;
  wire [8:0]\rowRaw_lcl_reg[11]_0 ;
  wire \rowRaw_lcl_reg[1]_0 ;
  wire \rowRaw_lcl_reg_n_0_[0] ;
  wire \rowRaw_lcl_reg_n_0_[1] ;
  wire \rowRaw_lcl_reg_n_0_[2] ;
  wire \row[0]_i_1_n_0 ;
  wire \row[10]_i_1_n_0 ;
  wire \row[11]_i_1_n_0 ;
  wire \row[11]_i_2_n_0 ;
  wire \row[11]_i_3_n_0 ;
  wire \row[11]_i_5_n_0 ;
  wire \row[11]_i_6_n_0 ;
  wire \row[11]_i_7_n_0 ;
  wire \row[1]_i_1_n_0 ;
  wire \row[2]_i_1_n_0 ;
  wire \row[2]_i_2_n_0 ;
  wire \row[3]_i_1_n_0 ;
  wire \row[4]_i_1_n_0 ;
  wire \row[4]_i_2_n_0 ;
  wire \row[5]_i_1_n_0 ;
  wire \row[5]_i_2_n_0 ;
  wire \row[6]_i_1_n_0 ;
  wire \row[7]_i_1_n_0 ;
  wire \row[8]_i_1_n_0 ;
  wire \row[8]_i_2_n_0 ;
  wire \row[9]_i_1_n_0 ;
  wire \row[9]_i_2_n_0 ;
  wire \row_reg[0]_0 ;
  wire \row_reg[0]_1 ;
  wire [8:0]\row_reg[11]_0 ;
  wire \row_reg_n_0_[0] ;
  wire \row_reg_n_0_[1] ;
  wire \row_reg_n_0_[2] ;
  wire \rowchk[0]_i_1_n_0 ;
  wire \rowchk[1]_i_1_n_0 ;
  wire \rowchk[2]_i_1_n_0 ;
  wire \rowchk[3]_i_1_n_0 ;
  wire \rowchk[3]_i_2_n_0 ;
  wire \rowchk[3]_i_3_n_0 ;
  wire \rowchk[3]_i_4_n_0 ;
  wire \rowchk_reg_n_0_[0] ;
  wire \rowchk_reg_n_0_[1] ;
  wire \rowchk_reg_n_0_[2] ;
  wire \rowchk_reg_n_0_[3] ;
  wire \rsh[0]_i_1_n_0 ;
  wire \rsh[1]_i_1_n_0 ;
  wire \rsh_reg_n_0_[0] ;
  wire \rsh_reg_n_0_[1] ;
  wire scl;
  wire sda;
  wire sda_sig_reg;
  wire specNotGnr;
  wire [1:0]stateConfig1;
  wire \stateConfig[0]_i_2_n_0 ;
  wire \stateConfig[1]_i_3_n_0 ;
  wire \stateConfig[1]_i_4_n_0 ;
  wire \stateConfig[2]_i_2_n_0 ;
  wire \stateConfig[3]_i_3_n_0 ;
  wire \stateConfig[3]_i_5_n_0 ;
  wire \stateConfig[3]_i_6_n_0 ;
  wire \stateConfig[3]_i_7_n_0 ;
  wire \stateConfig[3]_i_9_n_0 ;
  wire \stateConfig_reg[3]_0 ;
  wire \stateConfig_reg_n_0_[0] ;
  wire \stateConfig_reg_n_0_[1] ;
  wire \stateConfig_reg_n_0_[2] ;
  wire \stateConfig_reg_n_0_[3] ;
  wire stateCorecfg0;
  wire \stateCorecfg[0]_i_1_n_0 ;
  wire \stateCorecfg[1]_i_1_n_0 ;
  wire \stateCorecfg[2]_i_2_n_0 ;
  wire \stateCorecfg[2]_i_3_n_0 ;
  wire \stateCorecfg_reg_n_0_[0] ;
  wire \stateCorecfg_reg_n_0_[1] ;
  wire \stateCorecfg_reg_n_0_[2] ;
  wire [0:0]\stateIgr_reg[1] ;
  wire [0:0]\stateIgr_reg[1]_0 ;
  wire \stateIgr_reg[1]_1 ;
  wire \stateLive[0]_i_1_n_0 ;
  wire \stateLive[0]_i_2_n_0 ;
  wire \stateLive[1]_i_10_n_0 ;
  wire \stateLive[1]_i_15_n_0 ;
  wire \stateLive[1]_i_16_n_0 ;
  wire \stateLive[1]_i_1_n_0 ;
  wire \stateLive[1]_i_2_n_0 ;
  wire \stateLive[1]_i_3_n_0 ;
  wire \stateLive[1]_i_5_n_0 ;
  wire \stateLive[2]_i_1_n_0 ;
  wire \stateLive[2]_i_2_n_0 ;
  wire [2:0]\stateLive_reg[2]_0 ;
  wire stateOp;
  wire stateOp47_out;
  wire stateOp_reg_0;
  wire \stateStream_reg[0] ;
  wire [1:0]\stateStream_reg[0]_0 ;
  wire \stateSynth[0]_i_1_n_0 ;
  wire \stateSynth[0]_i_2_n_0 ;
  wire \stateSynth[0]_i_3_n_0 ;
  wire \stateSynth[0]_i_4_n_0 ;
  wire \stateSynth[1]_i_1_n_0 ;
  wire \stateSynth[1]_i_2_n_0 ;
  wire \stateSynth[1]_i_3_n_0 ;
  wire \stateSynth[1]_i_4_n_0 ;
  wire \stateSynth[2]_i_10_n_0 ;
  wire \stateSynth[2]_i_11_n_0 ;
  wire \stateSynth[2]_i_1_n_0 ;
  wire \stateSynth[2]_i_2_n_0 ;
  wire \stateSynth[2]_i_3_n_0 ;
  wire \stateSynth[2]_i_4_n_0 ;
  wire \stateSynth[2]_i_5_n_0 ;
  wire \stateSynth[2]_i_6_n_0 ;
  wire \stateSynth[2]_i_7_n_0 ;
  wire \stateSynth[2]_i_8_n_0 ;
  wire \stateSynth[2]_i_9_n_0 ;
  wire \stateSynth_reg[0]_0 ;
  wire \stateSynth_reg[0]_1 ;
  wire \stateSynth_reg[0]_2 ;
  wire [0:0]\stateSynth_reg[2]_0 ;
  wire \stateSynth_reg_n_0_[0] ;
  wire \stateSynth_reg_n_0_[1] ;
  wire synthNotLive;
  wire synthNotLive_reg_0;
  wire synthNotLive_reg_1;
  wire synthNotLive_reg_n_0;
  wire [7:0]\tixVSynthmode_reg[7]_0 ;
  wire \tixVSynthmode_reg_n_0_[0] ;
  wire \tixVSynthmode_reg_n_0_[1] ;
  wire \tixVSynthmode_reg_n_0_[2] ;
  wire \tixVSynthmode_reg_n_0_[3] ;
  wire \tixVSynthmode_reg_n_0_[4] ;
  wire \tixVSynthmode_reg_n_0_[5] ;
  wire \tixVSynthmode_reg_n_0_[6] ;
  wire tkclk;
  wire \toVideoinAXIS_tdata_sig[0]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[0]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[0]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[0]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[0]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_10_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_11_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_12_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_13_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_14_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_15_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_16_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_17_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_18_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_19_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[10]_i_9_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_10_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_11_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_12_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_13_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_14_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_15_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_16_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_17_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_18_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[11]_i_9_n_0 ;
  wire \toVideoinAXIS_tdata_sig[12]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[12]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[12]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[12]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[13]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[13]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[13]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[13]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[13]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[14]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[14]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[14]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[14]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[14]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[14]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[14]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[14]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[15]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[15]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[15]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[15]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[16]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[16]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[16]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[16]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[16]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[16]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[17]_i_10_n_0 ;
  wire \toVideoinAXIS_tdata_sig[17]_i_11_n_0 ;
  wire \toVideoinAXIS_tdata_sig[17]_i_12_n_0 ;
  wire \toVideoinAXIS_tdata_sig[17]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[17]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[17]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[17]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[17]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[17]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[17]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[17]_i_9_n_0 ;
  wire \toVideoinAXIS_tdata_sig[18]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[18]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[18]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[18]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[18]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[18]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[18]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[18]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[18]_i_9_n_0 ;
  wire \toVideoinAXIS_tdata_sig[19]_i_10_n_0 ;
  wire \toVideoinAXIS_tdata_sig[19]_i_11_n_0 ;
  wire \toVideoinAXIS_tdata_sig[19]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[19]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[19]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[19]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[19]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[19]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[19]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[19]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[19]_i_9_n_0 ;
  wire \toVideoinAXIS_tdata_sig[1]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[1]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[1]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[1]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[20]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[20]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[20]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[20]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[20]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[20]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[20]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_10_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_14_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_15_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_16_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_17_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_18_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_19_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_20_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[21]_i_9_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_10_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_11_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_12_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_13_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_14_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_15_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_16_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_17_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_18_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_19_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_20_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_21_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[22]_i_9_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_10_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_11_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_12_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_13_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_14_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_15_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_16_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_17_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_18_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_19_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_20_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_21_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[23]_i_9_n_0 ;
  wire \toVideoinAXIS_tdata_sig[2]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[2]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[2]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[2]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[2]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[2]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[2]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[3]_i_10_n_0 ;
  wire \toVideoinAXIS_tdata_sig[3]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[3]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[3]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[3]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[3]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[3]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[3]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[3]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[3]_i_9_n_0 ;
  wire \toVideoinAXIS_tdata_sig[4]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[4]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[4]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[4]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[4]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[5]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[5]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[5]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[5]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[5]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[6]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[6]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[6]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[6]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[6]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[7]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[7]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[7]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[7]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[7]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[7]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[7]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[7]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[8]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[8]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[8]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[8]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[8]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[8]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[8]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig[8]_i_9_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_10_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_11_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_12_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_13_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_14_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_15_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_16_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_17_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_18_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_19_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_1_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_2_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_3_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_4_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_5_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig[9]_i_9_n_0 ;
  wire \toVideoinAXIS_tdata_sig_reg[10]_i_6_n_0 ;
  wire \toVideoinAXIS_tdata_sig_reg[10]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig_reg[17]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig_reg[21]_i_11_n_0 ;
  wire \toVideoinAXIS_tdata_sig_reg[21]_i_12_n_0 ;
  wire \toVideoinAXIS_tdata_sig_reg[21]_i_13_n_0 ;
  wire [0:0]\toVideoinAXIS_tdata_sig_reg[23]_0 ;
  wire \toVideoinAXIS_tdata_sig_reg[8]_i_7_n_0 ;
  wire \toVideoinAXIS_tdata_sig_reg[9]_i_8_n_0 ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[0] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[10] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[11] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[12] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[13] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[14] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[15] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[16] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[17] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[18] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[19] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[1] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[20] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[21] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[22] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[23] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[2] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[3] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[4] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[5] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[6] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[7] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[8] ;
  wire \toVideoinAXIS_tdata_sig_reg_n_0_[9] ;
  wire toVideoinAXIS_tvalid_sig;
  wire toVideoinAXIS_tvalid_sig_i_1_n_0;
  wire toVideoinAXIS_tvalid_sig_reg_0;
  wire video_aresetn;
  wire [23:0]video_out_tdata;
  wire video_out_tlast;
  wire [69:64]video_out_tuser;
  wire video_out_tvalid;
  wire [10:10]wht;
  wire whtNotBlk;
  wire whtNotBlk0;
  wire whtNotBlk0_i_1_n_0;
  wire whtNotBlk0_reg_n_0;
  wire whtNotBlk_i_1_n_0;
  wire whtNotBlk_i_3_n_0;
  wire \wht[0]_i_1_n_0 ;
  wire \wht[10]_i_1_n_0 ;
  wire \wht[10]_i_2_n_0 ;
  wire \wht[11]_i_1_n_0 ;
  wire \wht[1]_i_1_n_0 ;
  wire \wht[2]_i_1_n_0 ;
  wire \wht[3]_i_1_n_0 ;
  wire \wht[4]_i_1_n_0 ;
  wire \wht[5]_i_1_n_0 ;
  wire \wht[6]_i_1_n_0 ;
  wire \wht[7]_i_1_n_0 ;
  wire \wht[8]_i_1_n_0 ;
  wire \wht[9]_i_1_n_0 ;
  wire \wht_reg_n_0_[0] ;
  wire \wht_reg_n_0_[10] ;
  wire \wht_reg_n_0_[11] ;
  wire \wht_reg_n_0_[1] ;
  wire \wht_reg_n_0_[2] ;
  wire \wht_reg_n_0_[3] ;
  wire \wht_reg_n_0_[4] ;
  wire \wht_reg_n_0_[5] ;
  wire \wht_reg_n_0_[6] ;
  wire \wht_reg_n_0_[7] ;
  wire \wht_reg_n_0_[8] ;
  wire \wht_reg_n_0_[9] ;
  wire [7:6]\NLW_j_reg[15]_i_3_CO_UNCONNECTED ;
  wire [7:7]\NLW_j_reg[15]_i_3_O_UNCONNECTED ;
  wire NLW_myMipirx_clkoutphy_out_UNCONNECTED;
  wire NLW_myMipirx_csirxss_csi_irq_UNCONNECTED;
  wire NLW_myMipirx_frame_rcvd_pulse_out_UNCONNECTED;
  wire NLW_myMipirx_pll_lock_out_UNCONNECTED;
  wire NLW_myMipirx_rxbyteclkhs_UNCONNECTED;
  wire NLW_myMipirx_system_rst_out_UNCONNECTED;
  wire [1:0]NLW_myMipirx_csirxss_s_axi_bresp_UNCONNECTED;
  wire [1:0]NLW_myMipirx_csirxss_s_axi_rresp_UNCONNECTED;
  wire [9:0]NLW_myMipirx_video_out_tdest_UNCONNECTED;
  wire [95:1]NLW_myMipirx_video_out_tuser_UNCONNECTED;

  FDCE \TFramepad_reg[10] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[18]),
        .Q(p_0_in[9]));
  FDCE \TFramepad_reg[11] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[19]),
        .Q(p_0_in[10]));
  FDCE \TFramepad_reg[12] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[20]),
        .Q(p_0_in[11]));
  FDCE \TFramepad_reg[13] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[21]),
        .Q(p_0_in[12]));
  FDCE \TFramepad_reg[14] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[22]),
        .Q(p_0_in[13]));
  FDCE \TFramepad_reg[15] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[23]),
        .Q(p_0_in[14]));
  FDCE \TFramepad_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[9]),
        .Q(p_0_in[0]));
  FDCE \TFramepad_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[10]),
        .Q(p_0_in[1]));
  FDCE \TFramepad_reg[3] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[11]),
        .Q(p_0_in[2]));
  FDCE \TFramepad_reg[4] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[12]),
        .Q(p_0_in[3]));
  FDCE \TFramepad_reg[5] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[13]),
        .Q(p_0_in[4]));
  FDCE \TFramepad_reg[6] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[14]),
        .Q(p_0_in[5]));
  FDCE \TFramepad_reg[7] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[15]),
        .Q(p_0_in[6]));
  FDCE \TFramepad_reg[8] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[16]),
        .Q(p_0_in[7]));
  FDCE \TFramepad_reg[9] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[17]),
        .Q(p_0_in[8]));
  FDCE \TLinepad_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[0]),
        .Q(TLinepad[0]));
  FDCE \TLinepad_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[1]),
        .Q(TLinepad[1]));
  FDCE \TLinepad_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[2]),
        .Q(TLinepad[2]));
  FDCE \TLinepad_reg[3] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[3]),
        .Q(TLinepad[3]));
  FDCE \TLinepad_reg[4] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[4]),
        .Q(TLinepad[4]));
  FDCE \TLinepad_reg[5] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[5]),
        .Q(TLinepad[5]));
  FDCE \TLinepad_reg[6] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[6]),
        .Q(TLinepad[6]));
  FDCE \TLinepad_reg[7] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(D[7]),
        .Q(TLinepad[7]));
  (* SOFT_HLUTNM = "soft_lutpair674" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \aParrom[10]_i_3 
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[2] ),
        .O(\aParrom[10]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair674" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \aParrom[10]_i_4 
       (.I0(\k[1]_i_6_n_0 ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[2] ),
        .I3(\stateConfig_reg_n_0_[0] ),
        .O(\aParrom[10]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair692" *) 
  LUT3 #(
    .INIT(8'hDF)) 
    \aParrom[10]_i_5 
       (.I0(\stateConfig_reg_n_0_[2] ),
        .I1(\stateConfig_reg_n_0_[0] ),
        .I2(\stateConfig_reg_n_0_[1] ),
        .O(\aParrom[10]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h9555555555555555)) 
    \aParrom[10]_i_6 
       (.I0(\aParrom_reg_n_0_[10] ),
        .I1(\aParrom_reg_n_0_[7] ),
        .I2(\aParrom_reg_n_0_[6] ),
        .I3(\aParrom[8]_i_3_n_0 ),
        .I4(\aParrom_reg_n_0_[8] ),
        .I5(\aParrom_reg_n_0_[9] ),
        .O(\aParrom[10]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aParrom[5]_i_2 
       (.I0(\aParrom_reg_n_0_[3] ),
        .I1(\aParrom_reg_n_0_[1] ),
        .I2(\aParrom_reg_n_0_[0] ),
        .I3(\aParrom_reg_n_0_[2] ),
        .I4(\aParrom_reg_n_0_[4] ),
        .O(\aParrom[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aParrom[8]_i_3 
       (.I0(\aParrom_reg_n_0_[5] ),
        .I1(\aParrom_reg_n_0_[4] ),
        .I2(\aParrom_reg_n_0_[2] ),
        .I3(\aParrom_reg_n_0_[0] ),
        .I4(\aParrom_reg_n_0_[1] ),
        .I5(\aParrom_reg_n_0_[3] ),
        .O(\aParrom[8]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'h8000)) 
    \aParrom[9]_i_2 
       (.I0(\aParrom_reg_n_0_[7] ),
        .I1(\aParrom_reg_n_0_[6] ),
        .I2(\aParrom[8]_i_3_n_0 ),
        .I3(\aParrom_reg_n_0_[8] ),
        .O(\aParrom[9]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair762" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \aParrom[9]_i_3 
       (.I0(\stateConfig_reg_n_0_[2] ),
        .I1(\stateConfig_reg_n_0_[3] ),
        .O(\aParrom[9]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aParrom_reg[0] 
       (.C(aclk_sig),
        .CE(myParrom_n_41),
        .CLR(sda_sig_reg),
        .D(myParrom_n_37),
        .Q(\aParrom_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aParrom_reg[10] 
       (.C(aclk_sig),
        .CE(myParrom_n_41),
        .CLR(sda_sig_reg),
        .D(myParrom_n_27),
        .Q(\aParrom_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \aParrom_reg[1] 
       (.C(aclk_sig),
        .CE(myParrom_n_41),
        .CLR(sda_sig_reg),
        .D(myParrom_n_36),
        .Q(\aParrom_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aParrom_reg[2] 
       (.C(aclk_sig),
        .CE(myParrom_n_41),
        .CLR(sda_sig_reg),
        .D(myParrom_n_35),
        .Q(\aParrom_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aParrom_reg[3] 
       (.C(aclk_sig),
        .CE(myParrom_n_41),
        .CLR(sda_sig_reg),
        .D(myParrom_n_34),
        .Q(\aParrom_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aParrom_reg[4] 
       (.C(aclk_sig),
        .CE(myParrom_n_41),
        .CLR(sda_sig_reg),
        .D(myParrom_n_33),
        .Q(\aParrom_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aParrom_reg[5] 
       (.C(aclk_sig),
        .CE(myParrom_n_41),
        .CLR(sda_sig_reg),
        .D(myParrom_n_32),
        .Q(\aParrom_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aParrom_reg[6] 
       (.C(aclk_sig),
        .CE(myParrom_n_41),
        .CLR(sda_sig_reg),
        .D(myParrom_n_31),
        .Q(\aParrom_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aParrom_reg[7] 
       (.C(aclk_sig),
        .CE(myParrom_n_41),
        .CLR(sda_sig_reg),
        .D(myParrom_n_30),
        .Q(\aParrom_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aParrom_reg[8] 
       (.C(aclk_sig),
        .CE(myParrom_n_41),
        .CLR(sda_sig_reg),
        .D(myParrom_n_29),
        .Q(\aParrom_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \aParrom_reg[9] 
       (.C(aclk_sig),
        .CE(myParrom_n_41),
        .CLR(sda_sig_reg),
        .D(myParrom_n_28),
        .Q(\aParrom_reg_n_0_[9] ));
  LUT5 #(
    .INIT(32'h5D5DFF5D)) 
    ackInvConfigSynth_sig_i_1
       (.I0(stateOp_reg_0),
        .I1(ackInvCamifConfigSynth),
        .I2(reqInvConfigSynth),
        .I3(ackInvCamifConfig),
        .I4(reqInvConfig),
        .O(stateOp));
  FDCE ackInvConfigSynth_sig_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(sda_sig_reg),
        .D(E),
        .Q(ackInvCamifConfigSynth));
  LUT2 #(
    .INIT(4'h4)) 
    ackInvConfig_sig_i_1
       (.I0(stateOp_reg_0),
        .I1(reqInvConfig),
        .O(hdrNotFix48_out));
  FDCE ackInvConfig_sig_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(sda_sig_reg),
        .D(hdrNotFix48_out),
        .Q(ackInvCamifConfig));
  LUT6 #(
    .INIT(64'h7F7FFCFF30300000)) 
    ackInvGetCorereg_sig_i_1
       (.I0(stateCorecfg0),
        .I1(\stateCorecfg_reg_n_0_[2] ),
        .I2(\stateCorecfg_reg_n_0_[1] ),
        .I3(ackInvGetCorereg_sig_reg_0),
        .I4(\stateCorecfg_reg_n_0_[0] ),
        .I5(ackInvCamifGetCorereg),
        .O(ackInvGetCorereg_sig_i_1_n_0));
  FDCE ackInvGetCorereg_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(ackInvGetCorereg_sig_i_1_n_0),
        .Q(ackInvCamifGetCorereg));
  LUT6 #(
    .INIT(64'h010101FF01010100)) 
    ackInvGetReg_sig_i_1
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(ackInvGetReg_sig_i_2_n_0),
        .I3(ackInvGetReg_sig_i_3_n_0),
        .I4(\regVal[7]_i_1_n_0 ),
        .I5(ackInvCamifGetReg),
        .O(ackInvGetReg_sig_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair768" *) 
  LUT2 #(
    .INIT(4'hB)) 
    ackInvGetReg_sig_i_2
       (.I0(\stateConfig_reg_n_0_[2] ),
        .I1(\stateConfig_reg_n_0_[3] ),
        .O(ackInvGetReg_sig_i_2_n_0));
  LUT6 #(
    .INIT(64'h00000000AE000000)) 
    ackInvGetReg_sig_i_3
       (.I0(ackLiveToConfigSetReg_reg_0),
        .I1(ackLiveToConfigSetReg_reg_n_0),
        .I2(modNotGetSet_i_2_n_0),
        .I3(\stateConfig_reg_n_0_[1] ),
        .I4(\stateConfig_reg_n_0_[0] ),
        .I5(ackInvGetReg_sig_i_2_n_0),
        .O(ackInvGetReg_sig_i_3_n_0));
  FDCE ackInvGetReg_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(ackInvGetReg_sig_i_1_n_0),
        .Q(ackInvCamifGetReg));
  LUT6 #(
    .INIT(64'h0010FFFF00100000)) 
    ackInvModReg_sig_i_1
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[3] ),
        .I3(\stateConfig_reg_n_0_[2] ),
        .I4(ackInvModReg_sig_i_2_n_0),
        .I5(ackInvCamifModReg),
        .O(ackInvModReg_sig_i_1_n_0));
  LUT6 #(
    .INIT(64'hBFBBBBBBAAAAAAAA)) 
    ackInvModReg_sig_i_2
       (.I0(ackInvGetReg_sig_i_3_n_0),
        .I1(\stateConfig_reg_n_0_[3] ),
        .I2(i2cReadNotWrite),
        .I3(prepdone),
        .I4(modNotGetSet),
        .I5(\aParrom[10]_i_3_n_0 ),
        .O(ackInvModReg_sig_i_2_n_0));
  FDCE ackInvModReg_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(ackInvModReg_sig_i_1_n_0),
        .Q(ackInvCamifModReg));
  LUT6 #(
    .INIT(64'h2000FFFF20000000)) 
    ackInvSetCorereg_sig_i_1
       (.I0(\stateCorecfg_reg_n_0_[2] ),
        .I1(\stateCorecfg_reg_n_0_[0] ),
        .I2(corecfgAXIL_bvalid),
        .I3(\stateCorecfg_reg_n_0_[1] ),
        .I4(ackInvSetCorereg_sig_i_2_n_0),
        .I5(ackInvCamifSetCorereg),
        .O(ackInvSetCorereg_sig_i_1_n_0));
  LUT6 #(
    .INIT(64'hB800B80000330000)) 
    ackInvSetCorereg_sig_i_2
       (.I0(stateCorecfg0),
        .I1(\stateCorecfg_reg_n_0_[0] ),
        .I2(corecfgAXIL_bvalid),
        .I3(\stateCorecfg_reg_n_0_[1] ),
        .I4(ackInvGetCorereg_sig_reg_0),
        .I5(\stateCorecfg_reg_n_0_[2] ),
        .O(ackInvSetCorereg_sig_i_2_n_0));
  FDCE ackInvSetCorereg_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(ackInvSetCorereg_sig_i_1_n_0),
        .Q(ackInvCamifSetCorereg));
  LUT6 #(
    .INIT(64'h010101FF01010100)) 
    ackInvSetReg_sig_i_1
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(ackInvGetReg_sig_i_2_n_0),
        .I3(ackInvGetReg_sig_i_3_n_0),
        .I4(ackInvSetReg_sig_i_2_n_0),
        .I5(ackInvCamifSetReg),
        .O(ackInvSetReg_sig_i_1_n_0));
  LUT6 #(
    .INIT(64'h00000200AAAAAAAA)) 
    ackInvSetReg_sig_i_2
       (.I0(\aParrom[10]_i_3_n_0 ),
        .I1(modNotGetSet),
        .I2(i2cReadNotWrite),
        .I3(prepdone),
        .I4(liveNotExt),
        .I5(\stateConfig_reg_n_0_[3] ),
        .O(ackInvSetReg_sig_i_2_n_0));
  FDCE ackInvSetReg_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(ackInvSetReg_sig_i_1_n_0),
        .Q(ackInvCamifSetReg));
  LUT6 #(
    .INIT(64'h010101FF01010100)) 
    ackLiveToConfigSetReg_i_1
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(ackInvGetReg_sig_i_2_n_0),
        .I3(ackInvGetReg_sig_i_3_n_0),
        .I4(ackLiveToConfigSetReg_i_2_n_0),
        .I5(ackLiveToConfigSetReg_reg_n_0),
        .O(ackLiveToConfigSetReg_i_1_n_0));
  LUT6 #(
    .INIT(64'h0200000000000000)) 
    ackLiveToConfigSetReg_i_2
       (.I0(\stateConfig_reg_n_0_[3] ),
        .I1(modNotGetSet),
        .I2(i2cReadNotWrite),
        .I3(liveNotExt),
        .I4(prepdone),
        .I5(\aParrom[10]_i_3_n_0 ),
        .O(ackLiveToConfigSetReg_i_2_n_0));
  FDCE ackLiveToConfigSetReg_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(ackLiveToConfigSetReg_i_1_n_0),
        .Q(ackLiveToConfigSetReg_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair635" *) 
  LUT5 #(
    .INIT(32'hFFFFF77F)) 
    \b_lcl[0]_i_1 
       (.I0(rng),
        .I1(\b_lcl_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\stateSynth_reg[2]_0 ),
        .O(\b_lcl[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFD7FFFFFFFFFFD7)) 
    \b_lcl[10]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\b_lcl[10]_i_2_n_0 ),
        .I5(\b_lcl_reg_n_0_[10] ),
        .O(\b_lcl[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair650" *) 
  LUT5 #(
    .INIT(32'h00000010)) 
    \b_lcl[10]_i_2 
       (.I0(\b_lcl_reg_n_0_[8] ),
        .I1(\b_lcl_reg_n_0_[6] ),
        .I2(\b_lcl[6]_i_2_n_0 ),
        .I3(\b_lcl_reg_n_0_[7] ),
        .I4(\b_lcl_reg_n_0_[9] ),
        .O(\b_lcl[10]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFA00FA00FEFFFE00)) 
    \b_lcl[11]_i_1 
       (.I0(\b_lcl[11]_i_3_n_0 ),
        .I1(\b_lcl[11]_i_4_n_0 ),
        .I2(\b_lcl[11]_i_5_n_0 ),
        .I3(\stateSynth[2]_i_7_n_0 ),
        .I4(rng),
        .I5(\bsh[1]_i_3_n_0 ),
        .O(\b_lcl[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFD7FFFFFFFFFFD7)) 
    \b_lcl[11]_i_2 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\b_lcl[11]_i_6_n_0 ),
        .I5(\b_lcl_reg_n_0_[11] ),
        .O(\b_lcl[11]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair646" *) 
  LUT5 #(
    .INIT(32'h00001400)) 
    \b_lcl[11]_i_3 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\i_reg[0]__0_0 ),
        .O(\b_lcl[11]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair700" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \b_lcl[11]_i_4 
       (.I0(\stateSynth_reg_n_0_[0] ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\row[11]_i_5_n_0 ),
        .O(\b_lcl[11]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000020)) 
    \b_lcl[11]_i_5 
       (.I0(\stateSynth[2]_i_6_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(p_0_in0),
        .I4(\stateSynth_reg_n_0_[1] ),
        .I5(\b_lcl[11]_i_7_n_0 ),
        .O(\b_lcl[11]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    \b_lcl[11]_i_6 
       (.I0(\b_lcl_reg_n_0_[9] ),
        .I1(\b_lcl_reg_n_0_[7] ),
        .I2(\b_lcl[6]_i_2_n_0 ),
        .I3(\b_lcl_reg_n_0_[6] ),
        .I4(\b_lcl_reg_n_0_[8] ),
        .I5(\b_lcl_reg_n_0_[10] ),
        .O(\b_lcl[11]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h7777777777777770)) 
    \b_lcl[11]_i_7 
       (.I0(\stateSynth[0]_i_4_n_0 ),
        .I1(\row_reg_n_0_[0] ),
        .I2(\b_lcl[11]_i_8_n_0 ),
        .I3(\tixVSynthmode_reg_n_0_[5] ),
        .I4(\tixVSynthmode_reg_n_0_[3] ),
        .I5(\tixVSynthmode_reg_n_0_[4] ),
        .O(\b_lcl[11]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFEFFFFFFFF)) 
    \b_lcl[11]_i_8 
       (.I0(\tixVSynthmode_reg_n_0_[2] ),
        .I1(\tixVSynthmode_reg_n_0_[6] ),
        .I2(\tixVSynthmode_reg_n_0_[5] ),
        .I3(\tixVSynthmode_reg_n_0_[1] ),
        .I4(\tixVSynthmode_reg_n_0_[0] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\b_lcl[11]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFD7D7FF)) 
    \b_lcl[1]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\b_lcl_reg_n_0_[1] ),
        .I4(\b_lcl_reg_n_0_[0] ),
        .I5(\stateSynth_reg[2]_0 ),
        .O(\b_lcl[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair636" *) 
  LUT4 #(
    .INIT(16'hFEAB)) 
    \b_lcl[2]_i_1 
       (.I0(\b_lcl[5]_i_2_n_0 ),
        .I1(\b_lcl_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[1] ),
        .I3(\b_lcl_reg_n_0_[2] ),
        .O(\b_lcl[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair636" *) 
  LUT5 #(
    .INIT(32'hFFFEAAAB)) 
    \b_lcl[3]_i_1 
       (.I0(\b_lcl[5]_i_2_n_0 ),
        .I1(\b_lcl_reg_n_0_[1] ),
        .I2(\b_lcl_reg_n_0_[0] ),
        .I3(\b_lcl_reg_n_0_[2] ),
        .I4(\b_lcl_reg_n_0_[3] ),
        .O(\b_lcl[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFEAAAAAAAB)) 
    \b_lcl[4]_i_1 
       (.I0(\b_lcl[5]_i_2_n_0 ),
        .I1(\b_lcl_reg_n_0_[3] ),
        .I2(\b_lcl_reg_n_0_[2] ),
        .I3(\b_lcl_reg_n_0_[0] ),
        .I4(\b_lcl_reg_n_0_[1] ),
        .I5(\b_lcl_reg_n_0_[4] ),
        .O(\b_lcl[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair698" *) 
  LUT3 #(
    .INIT(8'hBE)) 
    \b_lcl[5]_i_1 
       (.I0(\b_lcl[5]_i_2_n_0 ),
        .I1(\b_lcl[5]_i_3_n_0 ),
        .I2(\b_lcl_reg_n_0_[5] ),
        .O(\b_lcl[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFF4F4FFFFFFFFFF)) 
    \b_lcl[5]_i_2 
       (.I0(\b_lcl_reg_n_0_[11] ),
        .I1(\b_lcl[11]_i_6_n_0 ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\stateSynth_reg_n_0_[1] ),
        .I5(rng),
        .O(\b_lcl[5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00000001)) 
    \b_lcl[5]_i_3 
       (.I0(\b_lcl_reg_n_0_[4] ),
        .I1(\b_lcl_reg_n_0_[1] ),
        .I2(\b_lcl_reg_n_0_[0] ),
        .I3(\b_lcl_reg_n_0_[2] ),
        .I4(\b_lcl_reg_n_0_[3] ),
        .O(\b_lcl[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFD7FFFFFFFFFFD7)) 
    \b_lcl[6]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\b_lcl[6]_i_2_n_0 ),
        .I5(\b_lcl_reg_n_0_[6] ),
        .O(\b_lcl[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \b_lcl[6]_i_2 
       (.I0(\b_lcl_reg_n_0_[3] ),
        .I1(\b_lcl_reg_n_0_[2] ),
        .I2(\b_lcl_reg_n_0_[0] ),
        .I3(\b_lcl_reg_n_0_[1] ),
        .I4(\b_lcl_reg_n_0_[4] ),
        .I5(\b_lcl_reg_n_0_[5] ),
        .O(\b_lcl[6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFD7FFFFFFFFFFD7)) 
    \b_lcl[7]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\b_lcl[7]_i_2_n_0 ),
        .I5(\b_lcl_reg_n_0_[7] ),
        .O(\b_lcl[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair710" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \b_lcl[7]_i_2 
       (.I0(\b_lcl[6]_i_2_n_0 ),
        .I1(\b_lcl_reg_n_0_[6] ),
        .O(\b_lcl[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFD7FFFFFFFFFFD7)) 
    \b_lcl[8]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\b_lcl[8]_i_2_n_0 ),
        .I5(\b_lcl_reg_n_0_[8] ),
        .O(\b_lcl[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair710" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \b_lcl[8]_i_2 
       (.I0(\b_lcl_reg_n_0_[6] ),
        .I1(\b_lcl[6]_i_2_n_0 ),
        .I2(\b_lcl_reg_n_0_[7] ),
        .O(\b_lcl[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFD7FFFFFFFFFFD7)) 
    \b_lcl[9]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\b_lcl[9]_i_2_n_0 ),
        .I5(\b_lcl_reg_n_0_[9] ),
        .O(\b_lcl[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair650" *) 
  LUT4 #(
    .INIT(16'h0004)) 
    \b_lcl[9]_i_2 
       (.I0(\b_lcl_reg_n_0_[7] ),
        .I1(\b_lcl[6]_i_2_n_0 ),
        .I2(\b_lcl_reg_n_0_[6] ),
        .I3(\b_lcl_reg_n_0_[8] ),
        .O(\b_lcl[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[0]_i_1_n_0 ),
        .Q(\b_lcl_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[10]_i_1_n_0 ),
        .Q(\b_lcl_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[11] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[11]_i_2_n_0 ),
        .Q(\b_lcl_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[1]_i_1_n_0 ),
        .Q(\b_lcl_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[2]_i_1_n_0 ),
        .Q(\b_lcl_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[3]_i_1_n_0 ),
        .Q(\b_lcl_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[4]_i_1_n_0 ),
        .Q(\b_lcl_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[5]_i_1_n_0 ),
        .Q(\b_lcl_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[6]_i_1_n_0 ),
        .Q(\b_lcl_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[7]_i_1_n_0 ),
        .Q(\b_lcl_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[8]_i_1_n_0 ),
        .Q(\b_lcl_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \b_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\b_lcl[9]_i_1_n_0 ),
        .Q(\b_lcl_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'h0000020000000000)) 
    \blk[0]_i_1 
       (.I0(\blk_reg_n_0_[1] ),
        .I1(\blk_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(blk1_out[0]));
  LUT6 #(
    .INIT(64'hFFFFFFFFAA20AA00)) 
    \blk[10]_i_1 
       (.I0(\rowchk[3]_i_4_n_0 ),
        .I1(\blk[10]_i_3_n_0 ),
        .I2(\stateSynth[2]_i_6_n_0 ),
        .I3(\blk[10]_i_4_n_0 ),
        .I4(\blk[10]_i_5_n_0 ),
        .I5(\blk[10]_i_6_n_0 ),
        .O(wht));
  (* SOFT_HLUTNM = "soft_lutpair643" *) 
  LUT5 #(
    .INIT(32'h00000020)) 
    \blk[10]_i_2 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\blk_reg_n_0_[0] ),
        .O(blk1_out[10]));
  LUT2 #(
    .INIT(4'hB)) 
    \blk[10]_i_3 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\rowchk[3]_i_3_n_0 ),
        .O(\blk[10]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair700" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \blk[10]_i_4 
       (.I0(\row[11]_i_5_n_0 ),
        .I1(\rowchk[3]_i_3_n_0 ),
        .O(\blk[10]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair678" *) 
  LUT4 #(
    .INIT(16'h0400)) 
    \blk[10]_i_5 
       (.I0(\rowchk_reg_n_0_[2] ),
        .I1(\rowchk_reg_n_0_[3] ),
        .I2(\rowchk_reg_n_0_[1] ),
        .I3(\rowchk_reg_n_0_[0] ),
        .O(\blk[10]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair634" *) 
  LUT5 #(
    .INIT(32'h00020000)) 
    \blk[10]_i_6 
       (.I0(\rowchk[3]_i_3_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(rng),
        .O(\blk[10]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h0000020000000000)) 
    \blk[1]_i_1 
       (.I0(\blk_reg_n_0_[2] ),
        .I1(\blk_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(blk1_out[1]));
  LUT6 #(
    .INIT(64'h0000020000000000)) 
    \blk[2]_i_1 
       (.I0(\blk_reg_n_0_[3] ),
        .I1(\blk_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(blk1_out[2]));
  LUT6 #(
    .INIT(64'h0000020000000000)) 
    \blk[3]_i_1 
       (.I0(\blk_reg_n_0_[4] ),
        .I1(\blk_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(blk1_out[3]));
  LUT6 #(
    .INIT(64'h0000020000000000)) 
    \blk[4]_i_1 
       (.I0(\blk_reg_n_0_[5] ),
        .I1(\blk_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(blk1_out[4]));
  LUT6 #(
    .INIT(64'h0000020000000000)) 
    \blk[5]_i_1 
       (.I0(\blk_reg_n_0_[6] ),
        .I1(\blk_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(blk1_out[5]));
  LUT6 #(
    .INIT(64'h0000020000000000)) 
    \blk[6]_i_1 
       (.I0(\blk_reg_n_0_[7] ),
        .I1(\blk_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(blk1_out[6]));
  LUT6 #(
    .INIT(64'h0000020000000000)) 
    \blk[7]_i_1 
       (.I0(\blk_reg_n_0_[8] ),
        .I1(\blk_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(blk1_out[7]));
  LUT6 #(
    .INIT(64'h0000020000000000)) 
    \blk[8]_i_1 
       (.I0(\blk_reg_n_0_[9] ),
        .I1(\blk_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(blk1_out[8]));
  LUT6 #(
    .INIT(64'h0000020000000000)) 
    \blk[9]_i_1 
       (.I0(\blk_reg_n_0_[10] ),
        .I1(\blk_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(blk1_out[9]));
  FDCE \blk_reg[0] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(blk1_out[0]),
        .Q(\blk_reg_n_0_[0] ));
  FDCE \blk_reg[10] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(blk1_out[10]),
        .Q(\blk_reg_n_0_[10] ));
  FDCE \blk_reg[1] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(blk1_out[1]),
        .Q(\blk_reg_n_0_[1] ));
  FDCE \blk_reg[2] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(blk1_out[2]),
        .Q(\blk_reg_n_0_[2] ));
  FDCE \blk_reg[3] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(blk1_out[3]),
        .Q(\blk_reg_n_0_[3] ));
  FDCE \blk_reg[4] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(blk1_out[4]),
        .Q(\blk_reg_n_0_[4] ));
  FDCE \blk_reg[5] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(blk1_out[5]),
        .Q(\blk_reg_n_0_[5] ));
  FDCE \blk_reg[6] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(blk1_out[6]),
        .Q(\blk_reg_n_0_[6] ));
  FDCE \blk_reg[7] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(blk1_out[7]),
        .Q(\blk_reg_n_0_[7] ));
  FDCE \blk_reg[8] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(blk1_out[8]),
        .Q(\blk_reg_n_0_[8] ));
  FDCE \blk_reg[9] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(blk1_out[9]),
        .Q(\blk_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'h0000000000000020)) 
    \bsh[0]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\bsh_reg_n_0_[0] ),
        .I5(\bsh_reg_n_0_[1] ),
        .O(\bsh[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h10FF101010101010)) 
    \bsh[1]_i_1 
       (.I0(\bsh[1]_i_3_n_0 ),
        .I1(\stateSynth[2]_i_3_n_0 ),
        .I2(\tixVSynthmode_reg_n_0_[0] ),
        .I3(\bsh[1]_i_4_n_0 ),
        .I4(\bsh[1]_i_5_n_0 ),
        .I5(rng),
        .O(bsh));
  LUT6 #(
    .INIT(64'hFFDFFFDFFFFFFFDF)) 
    \bsh[1]_i_2 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\bsh_reg_n_0_[0] ),
        .I5(\bsh_reg_n_0_[1] ),
        .O(\bsh[1]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \bsh[1]_i_3 
       (.I0(\tixVSynthmode_reg_n_0_[1] ),
        .I1(\stateSynth[2]_i_11_n_0 ),
        .O(\bsh[1]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h4F5F5F5F)) 
    \bsh[1]_i_4 
       (.I0(\row[11]_i_5_n_0 ),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth[0]_i_4_n_0 ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\stateSynth[2]_i_6_n_0 ),
        .O(\bsh[1]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair664" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \bsh[1]_i_5 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .O(\bsh[1]_i_5_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \bsh_reg[0] 
       (.C(aclk_sig),
        .CE(bsh),
        .CLR(sda_sig_reg),
        .D(\bsh[0]_i_1_n_0 ),
        .Q(\bsh_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \bsh_reg[1] 
       (.C(aclk_sig),
        .CE(bsh),
        .CLR(sda_sig_reg),
        .D(\bsh[1]_i_2_n_0 ),
        .Q(\bsh_reg_n_0_[1] ));
  LUT6 #(
    .INIT(64'hAEEAEEEEAEEAAAAA)) 
    \bytecnt[1]_i_1 
       (.I0(\bytecnt[1]_i_2_n_0 ),
        .I1(\bytecnt[1]_i_3_n_0 ),
        .I2(\bytecnt_reg_n_0_[0] ),
        .I3(\bytecnt_reg_n_0_[1] ),
        .I4(\bytecnt[1]_i_4_n_0 ),
        .I5(prepdone),
        .O(\bytecnt[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair626" *) 
  LUT5 #(
    .INIT(32'hF0D0F000)) 
    \bytecnt[1]_i_2 
       (.I0(\stateConfig_reg_n_0_[1] ),
        .I1(\stateConfig_reg_n_0_[2] ),
        .I2(prepdone),
        .I3(\stateConfig_reg_n_0_[3] ),
        .I4(\stateConfig_reg_n_0_[0] ),
        .O(\bytecnt[1]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \bytecnt[1]_i_3 
       (.I0(\stateConfig_reg_n_0_[3] ),
        .I1(\stateConfig_reg_n_0_[0] ),
        .O(\bytecnt[1]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair761" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \bytecnt[1]_i_4 
       (.I0(\stateConfig_reg_n_0_[2] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .O(\bytecnt[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAFFFFAAAE)) 
    \bytecnt[2]_i_1 
       (.I0(\bytecnt[2]_i_3_n_0 ),
        .I1(ackLiveToConfigSetReg),
        .I2(prepdone),
        .I3(i2cReadNotWrite),
        .I4(\bytecnt[2]_i_4_n_0 ),
        .I5(sda_sig_reg),
        .O(bytecnt0));
  LUT6 #(
    .INIT(64'hFE02F300FF00FF00)) 
    \bytecnt[2]_i_2 
       (.I0(\stateConfig[3]_i_5_n_0 ),
        .I1(\stateConfig_reg_n_0_[0] ),
        .I2(\stateConfig_reg_n_0_[3] ),
        .I3(prepdone),
        .I4(\stateConfig_reg_n_0_[2] ),
        .I5(\stateConfig_reg_n_0_[1] ),
        .O(\bytecnt[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0010000000000000)) 
    \bytecnt[2]_i_3 
       (.I0(\stateConfig_reg_n_0_[3] ),
        .I1(sda_sig_reg),
        .I2(\stateConfig_reg_n_0_[0] ),
        .I3(\stateConfig_reg_n_0_[2] ),
        .I4(\stateConfig_reg_n_0_[1] ),
        .I5(\k[1]_i_6_n_0 ),
        .O(\bytecnt[2]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair673" *) 
  LUT4 #(
    .INIT(16'h0400)) 
    \bytecnt[2]_i_4 
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[3] ),
        .I3(\stateConfig_reg_n_0_[2] ),
        .O(\bytecnt[2]_i_4_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[0] 
       (.C(aclk_sig),
        .CE(bytecnt0),
        .D(myParrom_n_38),
        .Q(\bytecnt_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[1] 
       (.C(aclk_sig),
        .CE(bytecnt0),
        .D(\bytecnt[1]_i_1_n_0 ),
        .Q(\bytecnt_reg_n_0_[1] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[2] 
       (.C(aclk_sig),
        .CE(bytecnt0),
        .D(\bytecnt[2]_i_2_n_0 ),
        .Q(\bytecnt_reg_n_0_[2] ),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair772" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \capt[0]_i_1 
       (.I0(synthNotLive_reg_0),
        .I1(\capt_reg[0] ),
        .O(\mask_reg[0] ));
  (* SOFT_HLUTNM = "soft_lutpair632" *) 
  LUT5 #(
    .INIT(32'h000000E0)) 
    \col[0]_i_1 
       (.I0(\stateSynth_reg_n_0_[0] ),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(rng),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(col[0]),
        .O(\col[0]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \col[10]_i_1 
       (.I0(\stateSynth[2]_i_9_n_0 ),
        .I1(\row[11]_i_1_n_0 ),
        .O(\col[10]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000444044400000)) 
    \col[10]_i_2 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(rng),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\col_reg[10]_0 [7]),
        .I5(\col[10]_i_3_n_0 ),
        .O(\col[10]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \col[10]_i_3 
       (.I0(\col_reg[10]_0 [5]),
        .I1(\col_reg[10]_0 [3]),
        .I2(\col[9]_i_3_n_0 ),
        .I3(\col_reg[10]_0 [4]),
        .I4(\col_reg[10]_0 [6]),
        .O(\col[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h000000E000E00000)) 
    \col[1]_i_1 
       (.I0(\stateSynth_reg_n_0_[0] ),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(rng),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(col[1]),
        .I5(col[0]),
        .O(\col[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair633" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \col[2]_i_1 
       (.I0(\col[9]_i_2_n_0 ),
        .I1(col[0]),
        .I2(col[1]),
        .I3(col[2]),
        .O(\col[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair633" *) 
  LUT5 #(
    .INIT(32'h28888888)) 
    \col[3]_i_1 
       (.I0(\col[9]_i_2_n_0 ),
        .I1(\col_reg[10]_0 [0]),
        .I2(col[1]),
        .I3(col[0]),
        .I4(col[2]),
        .O(\col[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \col[4]_i_1 
       (.I0(\col[9]_i_2_n_0 ),
        .I1(\col_reg[10]_0 [1]),
        .I2(col[2]),
        .I3(col[0]),
        .I4(col[1]),
        .I5(\col_reg[10]_0 [0]),
        .O(\col[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000444044400000)) 
    \col[5]_i_1 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(rng),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\col_reg[10]_0 [2]),
        .I5(\col[5]_i_2_n_0 ),
        .O(\col[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \col[5]_i_2 
       (.I0(\col_reg[10]_0 [0]),
        .I1(col[1]),
        .I2(col[0]),
        .I3(col[2]),
        .I4(\col_reg[10]_0 [1]),
        .O(\col[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000444044400000)) 
    \col[6]_i_1 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(rng),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\col_reg[10]_0 [3]),
        .I5(\col[9]_i_3_n_0 ),
        .O(\col[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair631" *) 
  LUT4 #(
    .INIT(16'h2888)) 
    \col[7]_i_1 
       (.I0(\col[9]_i_2_n_0 ),
        .I1(\col_reg[10]_0 [4]),
        .I2(\col[9]_i_3_n_0 ),
        .I3(\col_reg[10]_0 [3]),
        .O(\col[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair631" *) 
  LUT5 #(
    .INIT(32'h28888888)) 
    \col[8]_i_1 
       (.I0(\col[9]_i_2_n_0 ),
        .I1(\col_reg[10]_0 [5]),
        .I2(\col_reg[10]_0 [3]),
        .I3(\col[9]_i_3_n_0 ),
        .I4(\col_reg[10]_0 [4]),
        .O(\col[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \col[9]_i_1 
       (.I0(\col[9]_i_2_n_0 ),
        .I1(\col_reg[10]_0 [6]),
        .I2(\col_reg[10]_0 [4]),
        .I3(\col[9]_i_3_n_0 ),
        .I4(\col_reg[10]_0 [3]),
        .I5(\col_reg[10]_0 [5]),
        .O(\col[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair640" *) 
  LUT4 #(
    .INIT(16'h4440)) 
    \col[9]_i_2 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(rng),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .O(\col[9]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \col[9]_i_3 
       (.I0(\col_reg[10]_0 [1]),
        .I1(col[2]),
        .I2(col[0]),
        .I3(col[1]),
        .I4(\col_reg[10]_0 [0]),
        .I5(\col_reg[10]_0 [2]),
        .O(\col[9]_i_3_n_0 ));
  FDCE \col_reg[0] 
       (.C(aclk_sig),
        .CE(\col[10]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\col[0]_i_1_n_0 ),
        .Q(col[0]));
  FDCE \col_reg[10] 
       (.C(aclk_sig),
        .CE(\col[10]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\col[10]_i_2_n_0 ),
        .Q(\col_reg[10]_0 [7]));
  FDCE \col_reg[1] 
       (.C(aclk_sig),
        .CE(\col[10]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\col[1]_i_1_n_0 ),
        .Q(col[1]));
  FDCE \col_reg[2] 
       (.C(aclk_sig),
        .CE(\col[10]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\col[2]_i_1_n_0 ),
        .Q(col[2]));
  FDCE \col_reg[3] 
       (.C(aclk_sig),
        .CE(\col[10]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\col[3]_i_1_n_0 ),
        .Q(\col_reg[10]_0 [0]));
  FDCE \col_reg[4] 
       (.C(aclk_sig),
        .CE(\col[10]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\col[4]_i_1_n_0 ),
        .Q(\col_reg[10]_0 [1]));
  FDCE \col_reg[5] 
       (.C(aclk_sig),
        .CE(\col[10]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\col[5]_i_1_n_0 ),
        .Q(\col_reg[10]_0 [2]));
  FDCE \col_reg[6] 
       (.C(aclk_sig),
        .CE(\col[10]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\col[6]_i_1_n_0 ),
        .Q(\col_reg[10]_0 [3]));
  FDCE \col_reg[7] 
       (.C(aclk_sig),
        .CE(\col[10]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\col[7]_i_1_n_0 ),
        .Q(\col_reg[10]_0 [4]));
  FDCE \col_reg[8] 
       (.C(aclk_sig),
        .CE(\col[10]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\col[8]_i_1_n_0 ),
        .Q(\col_reg[10]_0 [5]));
  FDCE \col_reg[9] 
       (.C(aclk_sig),
        .CE(\col[10]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\col[9]_i_1_n_0 ),
        .Q(\col_reg[10]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair666" *) 
  LUT5 #(
    .INIT(32'h00004000)) 
    \colchk[0]_i_1 
       (.I0(colchk[0]),
        .I1(rng),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\stateSynth_reg[2]_0 ),
        .O(\colchk[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair644" *) 
  LUT5 #(
    .INIT(32'h00000FB0)) 
    \colchk[1]_i_1 
       (.I0(colchk[2]),
        .I1(colchk[3]),
        .I2(colchk[0]),
        .I3(colchk[1]),
        .I4(\colchk[3]_i_4_n_0 ),
        .O(\colchk[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair681" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \colchk[2]_i_1 
       (.I0(colchk[0]),
        .I1(colchk[1]),
        .I2(colchk[2]),
        .I3(\colchk[3]_i_4_n_0 ),
        .O(\colchk[2]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \colchk[3]_i_1 
       (.I0(\rowchk[3]_i_1_n_0 ),
        .I1(\colchk[3]_i_3_n_0 ),
        .O(\colchk[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair644" *) 
  LUT5 #(
    .INIT(32'h00007D80)) 
    \colchk[3]_i_2 
       (.I0(colchk[0]),
        .I1(colchk[1]),
        .I2(colchk[2]),
        .I3(colchk[3]),
        .I4(\colchk[3]_i_4_n_0 ),
        .O(\colchk[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair645" *) 
  LUT5 #(
    .INIT(32'h00000080)) 
    \colchk[3]_i_3 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\i_reg[0]__0_0 ),
        .O(\colchk[3]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair635" *) 
  LUT4 #(
    .INIT(16'hBFFF)) 
    \colchk[3]_i_4 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(rng),
        .O(\colchk[3]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \colchk_reg[0] 
       (.C(aclk_sig),
        .CE(\colchk[3]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\colchk[0]_i_1_n_0 ),
        .Q(colchk[0]));
  FDCE #(
    .INIT(1'b0)) 
    \colchk_reg[1] 
       (.C(aclk_sig),
        .CE(\colchk[3]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\colchk[1]_i_1_n_0 ),
        .Q(colchk[1]));
  FDCE #(
    .INIT(1'b0)) 
    \colchk_reg[2] 
       (.C(aclk_sig),
        .CE(\colchk[3]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\colchk[2]_i_1_n_0 ),
        .Q(colchk[2]));
  FDCE #(
    .INIT(1'b0)) 
    \colchk_reg[3] 
       (.C(aclk_sig),
        .CE(\colchk[3]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\colchk[3]_i_2_n_0 ),
        .Q(colchk[3]));
  LUT5 #(
    .INIT(32'h00001011)) 
    \corecfgAXIL_araddr[12]_i_1 
       (.I0(\stateCorecfg_reg_n_0_[2] ),
        .I1(\stateCorecfg_reg_n_0_[0] ),
        .I2(reqInvGetCorereg),
        .I3(reqInvSetCorereg),
        .I4(\stateCorecfg_reg_n_0_[1] ),
        .O(\corecfgAXIL_araddr[12]_i_1_n_0 ));
  FDCE \corecfgAXIL_araddr_reg[12] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_araddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_araddr_reg[12]_0 [6]),
        .Q(\corecfgAXIL_araddr_reg_n_0_[12] ));
  FDCE \corecfgAXIL_araddr_reg[2] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_araddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_araddr_reg[12]_0 [0]),
        .Q(\corecfgAXIL_araddr_reg_n_0_[2] ));
  FDCE \corecfgAXIL_araddr_reg[3] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_araddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_araddr_reg[12]_0 [1]),
        .Q(\corecfgAXIL_araddr_reg_n_0_[3] ));
  FDCE \corecfgAXIL_araddr_reg[4] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_araddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_araddr_reg[12]_0 [2]),
        .Q(\corecfgAXIL_araddr_reg_n_0_[4] ));
  FDCE \corecfgAXIL_araddr_reg[5] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_araddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_araddr_reg[12]_0 [3]),
        .Q(\corecfgAXIL_araddr_reg_n_0_[5] ));
  FDCE \corecfgAXIL_araddr_reg[6] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_araddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_araddr_reg[12]_0 [4]),
        .Q(\corecfgAXIL_araddr_reg_n_0_[6] ));
  FDCE \corecfgAXIL_araddr_reg[7] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_araddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_araddr_reg[12]_0 [5]),
        .Q(\corecfgAXIL_araddr_reg_n_0_[7] ));
  LUT4 #(
    .INIT(16'h0001)) 
    \corecfgAXIL_awaddr[12]_i_1 
       (.I0(\stateCorecfg_reg_n_0_[2] ),
        .I1(\stateCorecfg_reg_n_0_[0] ),
        .I2(reqInvGetCorereg),
        .I3(\stateCorecfg_reg_n_0_[1] ),
        .O(\corecfgAXIL_awaddr[12]_i_1_n_0 ));
  FDCE \corecfgAXIL_awaddr_reg[12] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_awaddr_reg[12]_0 [6]),
        .Q(\corecfgAXIL_awaddr_reg_n_0_[12] ));
  FDCE \corecfgAXIL_awaddr_reg[2] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_awaddr_reg[12]_0 [0]),
        .Q(\corecfgAXIL_awaddr_reg_n_0_[2] ));
  FDCE \corecfgAXIL_awaddr_reg[3] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_awaddr_reg[12]_0 [1]),
        .Q(\corecfgAXIL_awaddr_reg_n_0_[3] ));
  FDCE \corecfgAXIL_awaddr_reg[4] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_awaddr_reg[12]_0 [2]),
        .Q(\corecfgAXIL_awaddr_reg_n_0_[4] ));
  FDCE \corecfgAXIL_awaddr_reg[5] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_awaddr_reg[12]_0 [3]),
        .Q(\corecfgAXIL_awaddr_reg_n_0_[5] ));
  FDCE \corecfgAXIL_awaddr_reg[6] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_awaddr_reg[12]_0 [4]),
        .Q(\corecfgAXIL_awaddr_reg_n_0_[6] ));
  FDCE \corecfgAXIL_awaddr_reg[7] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_awaddr_reg[12]_0 [5]),
        .Q(\corecfgAXIL_awaddr_reg_n_0_[7] ));
  FDCE \corecfgAXIL_wdata_reg[0] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [0]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[0] ));
  FDCE \corecfgAXIL_wdata_reg[10] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [10]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[10] ));
  FDCE \corecfgAXIL_wdata_reg[11] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [11]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[11] ));
  FDCE \corecfgAXIL_wdata_reg[12] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [12]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[12] ));
  FDCE \corecfgAXIL_wdata_reg[13] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [13]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[13] ));
  FDCE \corecfgAXIL_wdata_reg[14] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [14]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[14] ));
  FDCE \corecfgAXIL_wdata_reg[15] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [15]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[15] ));
  FDCE \corecfgAXIL_wdata_reg[16] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [16]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[16] ));
  FDCE \corecfgAXIL_wdata_reg[17] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [17]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[17] ));
  FDCE \corecfgAXIL_wdata_reg[18] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [18]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[18] ));
  FDCE \corecfgAXIL_wdata_reg[19] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [19]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[19] ));
  FDCE \corecfgAXIL_wdata_reg[1] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [1]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[1] ));
  FDCE \corecfgAXIL_wdata_reg[20] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [20]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[20] ));
  FDCE \corecfgAXIL_wdata_reg[21] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [21]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[21] ));
  FDCE \corecfgAXIL_wdata_reg[22] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [22]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[22] ));
  FDCE \corecfgAXIL_wdata_reg[23] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [23]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[23] ));
  FDCE \corecfgAXIL_wdata_reg[24] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [24]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[24] ));
  FDCE \corecfgAXIL_wdata_reg[25] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [25]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[25] ));
  FDCE \corecfgAXIL_wdata_reg[26] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [26]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[26] ));
  FDCE \corecfgAXIL_wdata_reg[27] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [27]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[27] ));
  FDCE \corecfgAXIL_wdata_reg[28] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [28]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[28] ));
  FDCE \corecfgAXIL_wdata_reg[29] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [29]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[29] ));
  FDCE \corecfgAXIL_wdata_reg[2] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [2]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[2] ));
  FDCE \corecfgAXIL_wdata_reg[30] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [30]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[30] ));
  FDCE \corecfgAXIL_wdata_reg[31] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [31]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[31] ));
  FDCE \corecfgAXIL_wdata_reg[3] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [3]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[3] ));
  FDCE \corecfgAXIL_wdata_reg[4] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [4]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[4] ));
  FDCE \corecfgAXIL_wdata_reg[5] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [5]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[5] ));
  FDCE \corecfgAXIL_wdata_reg[6] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [6]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[6] ));
  FDCE \corecfgAXIL_wdata_reg[7] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [7]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[7] ));
  FDCE \corecfgAXIL_wdata_reg[8] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [8]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[8] ));
  FDCE \corecfgAXIL_wdata_reg[9] 
       (.C(aclk_sig),
        .CE(\corecfgAXIL_awaddr[12]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\corecfgAXIL_wdata_reg[31]_0 [9]),
        .Q(\corecfgAXIL_wdata_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair764" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrEobuf[39]_i_3 
       (.I0(camifToVideoinAXIS_tvalid),
        .I1(synthNotLive_reg_0),
        .O(toVideoinAXIS_tvalid_sig_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair776" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrEobuf[56]_i_2 
       (.I0(camifToVideoinAXIS_tdata[8]),
        .I1(\dwrEobuf_reg[63] ),
        .O(\klm_reg[0]_6 ));
  (* SOFT_HLUTNM = "soft_lutpair757" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobuf[56]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[0] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[0]),
        .O(camifToVideoinAXIS_tdata[0]));
  (* SOFT_HLUTNM = "soft_lutpair776" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrEobuf[57]_i_2 
       (.I0(camifToVideoinAXIS_tdata[9]),
        .I1(\dwrEobuf_reg[63] ),
        .O(\klm_reg[0]_5 ));
  (* SOFT_HLUTNM = "soft_lutpair757" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobuf[57]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[1] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[1]),
        .O(camifToVideoinAXIS_tdata[1]));
  (* SOFT_HLUTNM = "soft_lutpair775" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrEobuf[58]_i_2 
       (.I0(camifToVideoinAXIS_tdata[10]),
        .I1(\dwrEobuf_reg[63] ),
        .O(\klm_reg[0]_4 ));
  (* SOFT_HLUTNM = "soft_lutpair756" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobuf[58]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[2] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[2]),
        .O(camifToVideoinAXIS_tdata[2]));
  (* SOFT_HLUTNM = "soft_lutpair775" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrEobuf[59]_i_2 
       (.I0(camifToVideoinAXIS_tdata[11]),
        .I1(\dwrEobuf_reg[63] ),
        .O(\klm_reg[0]_3 ));
  (* SOFT_HLUTNM = "soft_lutpair756" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobuf[59]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[3] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[3]),
        .O(camifToVideoinAXIS_tdata[3]));
  (* SOFT_HLUTNM = "soft_lutpair774" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrEobuf[60]_i_2 
       (.I0(camifToVideoinAXIS_tdata[12]),
        .I1(\dwrEobuf_reg[63] ),
        .O(\klm_reg[0]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair755" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobuf[60]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[4] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[4]),
        .O(camifToVideoinAXIS_tdata[4]));
  (* SOFT_HLUTNM = "soft_lutpair774" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrEobuf[61]_i_2 
       (.I0(camifToVideoinAXIS_tdata[13]),
        .I1(\dwrEobuf_reg[63] ),
        .O(\klm_reg[0]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair755" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobuf[61]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[5] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[5]),
        .O(camifToVideoinAXIS_tdata[5]));
  (* SOFT_HLUTNM = "soft_lutpair773" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrEobuf[62]_i_2 
       (.I0(camifToVideoinAXIS_tdata[14]),
        .I1(\dwrEobuf_reg[63] ),
        .O(\klm_reg[0]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair754" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobuf[62]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[6] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[6]),
        .O(camifToVideoinAXIS_tdata[6]));
  (* SOFT_HLUTNM = "soft_lutpair773" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrEobuf[63]_i_3 
       (.I0(camifToVideoinAXIS_tdata[15]),
        .I1(\dwrEobuf_reg[63] ),
        .O(\klm_reg[0] ));
  (* SOFT_HLUTNM = "soft_lutpair754" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobuf[63]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[7] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[7]),
        .O(camifToVideoinAXIS_tdata[7]));
  (* SOFT_HLUTNM = "soft_lutpair753" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[0]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[8] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[8]),
        .O(camifToVideoinAXIS_tdata[8]));
  (* SOFT_HLUTNM = "soft_lutpair748" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[10]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[18] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[18]),
        .O(camifToVideoinAXIS_tdata[18]));
  (* SOFT_HLUTNM = "soft_lutpair748" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[11]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[19] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[19]),
        .O(camifToVideoinAXIS_tdata[19]));
  (* SOFT_HLUTNM = "soft_lutpair747" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[12]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[20] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[20]),
        .O(camifToVideoinAXIS_tdata[20]));
  (* SOFT_HLUTNM = "soft_lutpair747" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[13]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[21] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[21]),
        .O(camifToVideoinAXIS_tdata[21]));
  (* SOFT_HLUTNM = "soft_lutpair746" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[14]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[22] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[22]),
        .O(camifToVideoinAXIS_tdata[22]));
  (* SOFT_HLUTNM = "soft_lutpair764" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \dwrEobufp1[15]_i_3 
       (.I0(synthNotLive_reg_0),
        .I1(camifToVideoinAXIS_tvalid),
        .I2(\klm_reg[0]_7 [1]),
        .O(\stateIgr_reg[1]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair746" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[15]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[23] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[23]),
        .O(camifToVideoinAXIS_tdata[23]));
  (* SOFT_HLUTNM = "soft_lutpair753" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[1]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[9] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[9]),
        .O(camifToVideoinAXIS_tdata[9]));
  (* SOFT_HLUTNM = "soft_lutpair752" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[2]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[10] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[10]),
        .O(camifToVideoinAXIS_tdata[10]));
  (* SOFT_HLUTNM = "soft_lutpair752" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[3]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[11] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[11]),
        .O(camifToVideoinAXIS_tdata[11]));
  (* SOFT_HLUTNM = "soft_lutpair751" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[4]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[12] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[12]),
        .O(camifToVideoinAXIS_tdata[12]));
  (* SOFT_HLUTNM = "soft_lutpair751" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[5]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[13] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[13]),
        .O(camifToVideoinAXIS_tdata[13]));
  (* SOFT_HLUTNM = "soft_lutpair750" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[6]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[14] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[14]),
        .O(camifToVideoinAXIS_tdata[14]));
  (* SOFT_HLUTNM = "soft_lutpair750" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[7]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[15] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[15]),
        .O(camifToVideoinAXIS_tdata[15]));
  (* SOFT_HLUTNM = "soft_lutpair749" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[8]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[16] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[16]),
        .O(camifToVideoinAXIS_tdata[16]));
  (* SOFT_HLUTNM = "soft_lutpair749" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrEobufp1[9]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig_reg_n_0_[17] ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tdata[17]),
        .O(camifToVideoinAXIS_tdata[17]));
  (* SOFT_HLUTNM = "soft_lutpair689" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \dwrRowbuf[25]_i_8 
       (.I0(ixTExp[1]),
        .I1(ixTExp[0]),
        .I2(\ixTExp_sig_reg[2]_0 ),
        .O(\ixTExp_sig_reg[1]_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    enEobufB_i_3
       (.I0(synthNotLive_reg_0),
        .I1(enEobufB_reg),
        .O(\FSM_sequential_stateRgbegr_reg[0] ));
  LUT6 #(
    .INIT(64'h0000000044444440)) 
    \g0_lcl[0]_i_1 
       (.I0(\g0_lcl_reg_n_0_[0] ),
        .I1(rng),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\g0_lcl[5]_i_3_n_0 ),
        .O(\g0_lcl[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800280000)) 
    \g0_lcl[10]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\g0_lcl_reg_n_0_[10] ),
        .I5(\g0_lcl[10]_i_2_n_0 ),
        .O(\g0_lcl[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair652" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \g0_lcl[10]_i_2 
       (.I0(\g0_lcl_reg_n_0_[9] ),
        .I1(\g0_lcl_reg_n_0_[8] ),
        .I2(\g0_lcl_reg_n_0_[7] ),
        .I3(\g0_lcl_reg_n_0_[6] ),
        .I4(\g0_lcl[6]_i_2_n_0 ),
        .O(\g0_lcl[10]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFC00FC00FEFFFE00)) 
    \g0_lcl[11]_i_1 
       (.I0(\b_lcl[11]_i_4_n_0 ),
        .I1(\b_lcl[11]_i_5_n_0 ),
        .I2(\g0_lcl[11]_i_3_n_0 ),
        .I3(\stateSynth[2]_i_7_n_0 ),
        .I4(rng),
        .I5(\bsh[1]_i_3_n_0 ),
        .O(\g0_lcl[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFF6F6FFFFFFFFFF)) 
    \g0_lcl[11]_i_2 
       (.I0(\g0_lcl[11]_i_4_n_0 ),
        .I1(\g0_lcl_reg_n_0_[11] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\stateSynth_reg_n_0_[1] ),
        .I5(rng),
        .O(\g0_lcl[11]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair646" *) 
  LUT5 #(
    .INIT(32'h00000014)) 
    \g0_lcl[11]_i_3 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\i_reg[0]__0_0 ),
        .O(\g0_lcl[11]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \g0_lcl[11]_i_4 
       (.I0(\g0_lcl[6]_i_2_n_0 ),
        .I1(\g0_lcl_reg_n_0_[6] ),
        .I2(\g0_lcl_reg_n_0_[7] ),
        .I3(\g0_lcl_reg_n_0_[8] ),
        .I4(\g0_lcl_reg_n_0_[9] ),
        .I5(\g0_lcl_reg_n_0_[10] ),
        .O(\g0_lcl[11]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h0060)) 
    \g0_lcl[1]_i_1 
       (.I0(\g0_lcl_reg_n_0_[0] ),
        .I1(\g0_lcl_reg_n_0_[1] ),
        .I2(\stateSynth[2]_i_7_n_0 ),
        .I3(\g0_lcl[5]_i_3_n_0 ),
        .O(\g0_lcl[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair638" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \g0_lcl[2]_i_1 
       (.I0(\g1_lcl[3]_i_2_n_0 ),
        .I1(\g0_lcl_reg_n_0_[0] ),
        .I2(\g0_lcl_reg_n_0_[1] ),
        .I3(\g0_lcl_reg_n_0_[2] ),
        .O(\g0_lcl[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair638" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \g0_lcl[3]_i_1 
       (.I0(\g1_lcl[3]_i_2_n_0 ),
        .I1(\g0_lcl_reg_n_0_[1] ),
        .I2(\g0_lcl_reg_n_0_[0] ),
        .I3(\g0_lcl_reg_n_0_[2] ),
        .I4(\g0_lcl_reg_n_0_[3] ),
        .O(\g0_lcl[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \g0_lcl[4]_i_1 
       (.I0(\g0_lcl[4]_i_2_n_0 ),
        .I1(\g0_lcl_reg_n_0_[3] ),
        .I2(\g0_lcl_reg_n_0_[2] ),
        .I3(\g0_lcl_reg_n_0_[0] ),
        .I4(\g0_lcl_reg_n_0_[1] ),
        .I5(\g0_lcl_reg_n_0_[4] ),
        .O(\g0_lcl[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000002A002A0000)) 
    \g0_lcl[4]_i_2 
       (.I0(rng),
        .I1(\g0_lcl_reg_n_0_[11] ),
        .I2(\g0_lcl[11]_i_4_n_0 ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\g0_lcl[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0606060000000000)) 
    \g0_lcl[5]_i_1 
       (.I0(\g0_lcl[5]_i_2_n_0 ),
        .I1(\g0_lcl_reg_n_0_[5] ),
        .I2(\g0_lcl[5]_i_3_n_0 ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\stateSynth_reg_n_0_[1] ),
        .I5(rng),
        .O(\g0_lcl[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \g0_lcl[5]_i_2 
       (.I0(\g0_lcl_reg_n_0_[4] ),
        .I1(\g0_lcl_reg_n_0_[1] ),
        .I2(\g0_lcl_reg_n_0_[0] ),
        .I3(\g0_lcl_reg_n_0_[2] ),
        .I4(\g0_lcl_reg_n_0_[3] ),
        .O(\g0_lcl[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair648" *) 
  LUT5 #(
    .INIT(32'hFFF9F9F9)) 
    \g0_lcl[5]_i_3 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\g0_lcl[11]_i_4_n_0 ),
        .I4(\g0_lcl_reg_n_0_[11] ),
        .O(\g0_lcl[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800280000)) 
    \g0_lcl[6]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\g0_lcl_reg_n_0_[6] ),
        .I5(\g0_lcl[6]_i_2_n_0 ),
        .O(\g0_lcl[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \g0_lcl[6]_i_2 
       (.I0(\g0_lcl_reg_n_0_[5] ),
        .I1(\g0_lcl_reg_n_0_[3] ),
        .I2(\g0_lcl_reg_n_0_[2] ),
        .I3(\g0_lcl_reg_n_0_[0] ),
        .I4(\g0_lcl_reg_n_0_[1] ),
        .I5(\g0_lcl_reg_n_0_[4] ),
        .O(\g0_lcl[6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800280000)) 
    \g0_lcl[7]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\g0_lcl_reg_n_0_[7] ),
        .I5(\g0_lcl[7]_i_2_n_0 ),
        .O(\g0_lcl[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair712" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \g0_lcl[7]_i_2 
       (.I0(\g0_lcl[6]_i_2_n_0 ),
        .I1(\g0_lcl_reg_n_0_[6] ),
        .O(\g0_lcl[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0028000000000028)) 
    \g0_lcl[8]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\g0_lcl[8]_i_2_n_0 ),
        .I5(\g0_lcl_reg_n_0_[8] ),
        .O(\g0_lcl[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair712" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    \g0_lcl[8]_i_2 
       (.I0(\g0_lcl_reg_n_0_[7] ),
        .I1(\g0_lcl_reg_n_0_[6] ),
        .I2(\g0_lcl[6]_i_2_n_0 ),
        .O(\g0_lcl[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0028000000000028)) 
    \g0_lcl[9]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\g0_lcl[9]_i_2_n_0 ),
        .I5(\g0_lcl_reg_n_0_[9] ),
        .O(\g0_lcl[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair652" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    \g0_lcl[9]_i_2 
       (.I0(\g0_lcl[6]_i_2_n_0 ),
        .I1(\g0_lcl_reg_n_0_[6] ),
        .I2(\g0_lcl_reg_n_0_[7] ),
        .I3(\g0_lcl_reg_n_0_[8] ),
        .O(\g0_lcl[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[0]_i_1_n_0 ),
        .Q(\g0_lcl_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[10]_i_1_n_0 ),
        .Q(\g0_lcl_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[11] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[11]_i_2_n_0 ),
        .Q(\g0_lcl_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[1]_i_1_n_0 ),
        .Q(\g0_lcl_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[2]_i_1_n_0 ),
        .Q(\g0_lcl_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[3]_i_1_n_0 ),
        .Q(\g0_lcl_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[4]_i_1_n_0 ),
        .Q(\g0_lcl_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[5]_i_1_n_0 ),
        .Q(\g0_lcl_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[6]_i_1_n_0 ),
        .Q(\g0_lcl_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[7]_i_1_n_0 ),
        .Q(\g0_lcl_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[8]_i_1_n_0 ),
        .Q(\g0_lcl_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \g0_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g0_lcl[9]_i_1_n_0 ),
        .Q(\g0_lcl_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'h0000000044444440)) 
    \g1_lcl[0]_i_1 
       (.I0(\g1_lcl_reg_n_0_[0] ),
        .I1(rng),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\g1_lcl[5]_i_3_n_0 ),
        .O(\g1_lcl[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800280000)) 
    \g1_lcl[10]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\g1_lcl_reg_n_0_[10] ),
        .I5(\g1_lcl[10]_i_2_n_0 ),
        .O(\g1_lcl[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair651" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \g1_lcl[10]_i_2 
       (.I0(\g1_lcl_reg_n_0_[9] ),
        .I1(\g1_lcl_reg_n_0_[8] ),
        .I2(\g1_lcl_reg_n_0_[7] ),
        .I3(\g1_lcl_reg_n_0_[6] ),
        .I4(\g1_lcl[6]_i_2_n_0 ),
        .O(\g1_lcl[10]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFF6F6FFFFFFFFFF)) 
    \g1_lcl[11]_i_1 
       (.I0(\g1_lcl[11]_i_2_n_0 ),
        .I1(\g1_lcl_reg_n_0_[11] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\stateSynth_reg_n_0_[1] ),
        .I5(rng),
        .O(\g1_lcl[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \g1_lcl[11]_i_2 
       (.I0(\g1_lcl[6]_i_2_n_0 ),
        .I1(\g1_lcl_reg_n_0_[6] ),
        .I2(\g1_lcl_reg_n_0_[7] ),
        .I3(\g1_lcl_reg_n_0_[8] ),
        .I4(\g1_lcl_reg_n_0_[9] ),
        .I5(\g1_lcl_reg_n_0_[10] ),
        .O(\g1_lcl[11]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h0060)) 
    \g1_lcl[1]_i_1 
       (.I0(\g1_lcl_reg_n_0_[0] ),
        .I1(\g1_lcl_reg_n_0_[1] ),
        .I2(\stateSynth[2]_i_7_n_0 ),
        .I3(\g1_lcl[5]_i_3_n_0 ),
        .O(\g1_lcl[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair639" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \g1_lcl[2]_i_1 
       (.I0(\g1_lcl[3]_i_2_n_0 ),
        .I1(\g1_lcl_reg_n_0_[0] ),
        .I2(\g1_lcl_reg_n_0_[1] ),
        .I3(\g1_lcl_reg_n_0_[2] ),
        .O(\g1_lcl[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair639" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \g1_lcl[3]_i_1 
       (.I0(\g1_lcl[3]_i_2_n_0 ),
        .I1(\g1_lcl_reg_n_0_[1] ),
        .I2(\g1_lcl_reg_n_0_[0] ),
        .I3(\g1_lcl_reg_n_0_[2] ),
        .I4(\g1_lcl_reg_n_0_[3] ),
        .O(\g1_lcl[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair634" *) 
  LUT4 #(
    .INIT(16'h0028)) 
    \g1_lcl[3]_i_2 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .O(\g1_lcl[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \g1_lcl[4]_i_1 
       (.I0(\g1_lcl[4]_i_2_n_0 ),
        .I1(\g1_lcl_reg_n_0_[3] ),
        .I2(\g1_lcl_reg_n_0_[2] ),
        .I3(\g1_lcl_reg_n_0_[0] ),
        .I4(\g1_lcl_reg_n_0_[1] ),
        .I5(\g1_lcl_reg_n_0_[4] ),
        .O(\g1_lcl[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000002A002A0000)) 
    \g1_lcl[4]_i_2 
       (.I0(rng),
        .I1(\g1_lcl_reg_n_0_[11] ),
        .I2(\g1_lcl[11]_i_2_n_0 ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\g1_lcl[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0606060000000000)) 
    \g1_lcl[5]_i_1 
       (.I0(\g1_lcl[5]_i_2_n_0 ),
        .I1(\g1_lcl_reg_n_0_[5] ),
        .I2(\g1_lcl[5]_i_3_n_0 ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\stateSynth_reg_n_0_[1] ),
        .I5(rng),
        .O(\g1_lcl[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \g1_lcl[5]_i_2 
       (.I0(\g1_lcl_reg_n_0_[4] ),
        .I1(\g1_lcl_reg_n_0_[1] ),
        .I2(\g1_lcl_reg_n_0_[0] ),
        .I3(\g1_lcl_reg_n_0_[2] ),
        .I4(\g1_lcl_reg_n_0_[3] ),
        .O(\g1_lcl[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair647" *) 
  LUT5 #(
    .INIT(32'hFFF9F9F9)) 
    \g1_lcl[5]_i_3 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\g1_lcl[11]_i_2_n_0 ),
        .I4(\g1_lcl_reg_n_0_[11] ),
        .O(\g1_lcl[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800280000)) 
    \g1_lcl[6]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\g1_lcl_reg_n_0_[6] ),
        .I5(\g1_lcl[6]_i_2_n_0 ),
        .O(\g1_lcl[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \g1_lcl[6]_i_2 
       (.I0(\g1_lcl_reg_n_0_[5] ),
        .I1(\g1_lcl_reg_n_0_[3] ),
        .I2(\g1_lcl_reg_n_0_[2] ),
        .I3(\g1_lcl_reg_n_0_[0] ),
        .I4(\g1_lcl_reg_n_0_[1] ),
        .I5(\g1_lcl_reg_n_0_[4] ),
        .O(\g1_lcl[6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800280000)) 
    \g1_lcl[7]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\g1_lcl_reg_n_0_[7] ),
        .I5(\g1_lcl[7]_i_2_n_0 ),
        .O(\g1_lcl[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair711" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \g1_lcl[7]_i_2 
       (.I0(\g1_lcl[6]_i_2_n_0 ),
        .I1(\g1_lcl_reg_n_0_[6] ),
        .O(\g1_lcl[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0028000000000028)) 
    \g1_lcl[8]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\g1_lcl[8]_i_2_n_0 ),
        .I5(\g1_lcl_reg_n_0_[8] ),
        .O(\g1_lcl[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair711" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    \g1_lcl[8]_i_2 
       (.I0(\g1_lcl_reg_n_0_[7] ),
        .I1(\g1_lcl_reg_n_0_[6] ),
        .I2(\g1_lcl[6]_i_2_n_0 ),
        .O(\g1_lcl[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0028000000000028)) 
    \g1_lcl[9]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\g1_lcl[9]_i_2_n_0 ),
        .I5(\g1_lcl_reg_n_0_[9] ),
        .O(\g1_lcl[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair651" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    \g1_lcl[9]_i_2 
       (.I0(\g1_lcl[6]_i_2_n_0 ),
        .I1(\g1_lcl_reg_n_0_[6] ),
        .I2(\g1_lcl_reg_n_0_[7] ),
        .I3(\g1_lcl_reg_n_0_[8] ),
        .O(\g1_lcl[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[0]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[10]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[11] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[11]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[1]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[2]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[3]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[4]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[5]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[6]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[7]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[8]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \g1_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\b_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\g1_lcl[9]_i_1_n_0 ),
        .Q(\g1_lcl_reg_n_0_[9] ));
  LUT5 #(
    .INIT(32'h00002808)) 
    \getCoreregVal_sig[31]_i_1 
       (.I0(corecfgAXIL_rvalid),
        .I1(\stateCorecfg_reg_n_0_[1] ),
        .I2(\stateCorecfg_reg_n_0_[0] ),
        .I3(corecfgAXIL_arready),
        .I4(\stateCorecfg_reg_n_0_[2] ),
        .O(\getCoreregVal_sig[31]_i_1_n_0 ));
  FDCE \getCoreregVal_sig_reg[0] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[0]),
        .Q(\getCoreregVal_sig_reg[31]_0 [0]));
  FDCE \getCoreregVal_sig_reg[10] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[10]),
        .Q(\getCoreregVal_sig_reg[31]_0 [10]));
  FDCE \getCoreregVal_sig_reg[11] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[11]),
        .Q(\getCoreregVal_sig_reg[31]_0 [11]));
  FDCE \getCoreregVal_sig_reg[12] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[12]),
        .Q(\getCoreregVal_sig_reg[31]_0 [12]));
  FDCE \getCoreregVal_sig_reg[13] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[13]),
        .Q(\getCoreregVal_sig_reg[31]_0 [13]));
  FDCE \getCoreregVal_sig_reg[14] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[14]),
        .Q(\getCoreregVal_sig_reg[31]_0 [14]));
  FDCE \getCoreregVal_sig_reg[15] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[15]),
        .Q(\getCoreregVal_sig_reg[31]_0 [15]));
  FDCE \getCoreregVal_sig_reg[16] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[16]),
        .Q(\getCoreregVal_sig_reg[31]_0 [16]));
  FDCE \getCoreregVal_sig_reg[17] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[17]),
        .Q(\getCoreregVal_sig_reg[31]_0 [17]));
  FDCE \getCoreregVal_sig_reg[18] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[18]),
        .Q(\getCoreregVal_sig_reg[31]_0 [18]));
  FDCE \getCoreregVal_sig_reg[19] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[19]),
        .Q(\getCoreregVal_sig_reg[31]_0 [19]));
  FDCE \getCoreregVal_sig_reg[1] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[1]),
        .Q(\getCoreregVal_sig_reg[31]_0 [1]));
  FDCE \getCoreregVal_sig_reg[20] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[20]),
        .Q(\getCoreregVal_sig_reg[31]_0 [20]));
  FDCE \getCoreregVal_sig_reg[21] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[21]),
        .Q(\getCoreregVal_sig_reg[31]_0 [21]));
  FDCE \getCoreregVal_sig_reg[22] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[22]),
        .Q(\getCoreregVal_sig_reg[31]_0 [22]));
  FDCE \getCoreregVal_sig_reg[23] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[23]),
        .Q(\getCoreregVal_sig_reg[31]_0 [23]));
  FDCE \getCoreregVal_sig_reg[24] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[24]),
        .Q(camifGetCoreregVal[24]));
  FDCE \getCoreregVal_sig_reg[25] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[25]),
        .Q(camifGetCoreregVal[25]));
  FDCE \getCoreregVal_sig_reg[26] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[26]),
        .Q(\getCoreregVal_sig_reg[31]_0 [24]));
  FDCE \getCoreregVal_sig_reg[27] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[27]),
        .Q(camifGetCoreregVal[27]));
  FDCE \getCoreregVal_sig_reg[28] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[28]),
        .Q(camifGetCoreregVal[28]));
  FDCE \getCoreregVal_sig_reg[29] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[29]),
        .Q(camifGetCoreregVal[29]));
  FDCE \getCoreregVal_sig_reg[2] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[2]),
        .Q(\getCoreregVal_sig_reg[31]_0 [2]));
  FDCE \getCoreregVal_sig_reg[30] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[30]),
        .Q(camifGetCoreregVal[30]));
  FDCE \getCoreregVal_sig_reg[31] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[31]),
        .Q(\getCoreregVal_sig_reg[31]_0 [25]));
  FDCE \getCoreregVal_sig_reg[3] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[3]),
        .Q(\getCoreregVal_sig_reg[31]_0 [3]));
  FDCE \getCoreregVal_sig_reg[4] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[4]),
        .Q(\getCoreregVal_sig_reg[31]_0 [4]));
  FDCE \getCoreregVal_sig_reg[5] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[5]),
        .Q(\getCoreregVal_sig_reg[31]_0 [5]));
  FDCE \getCoreregVal_sig_reg[6] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[6]),
        .Q(\getCoreregVal_sig_reg[31]_0 [6]));
  FDCE \getCoreregVal_sig_reg[7] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[7]),
        .Q(\getCoreregVal_sig_reg[31]_0 [7]));
  FDCE \getCoreregVal_sig_reg[8] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[8]),
        .Q(\getCoreregVal_sig_reg[31]_0 [8]));
  FDCE \getCoreregVal_sig_reg[9] 
       (.C(aclk_sig),
        .CE(\getCoreregVal_sig[31]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(corecfgAXIL_rdata[9]),
        .Q(\getCoreregVal_sig_reg[31]_0 [9]));
  LUT6 #(
    .INIT(64'hFFFFFFFFFF1FFFFF)) 
    \gsh[0]_i_1 
       (.I0(gsh[0]),
        .I1(gsh[1]),
        .I2(rng),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\gsh[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000200000)) 
    \gsh[1]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(gsh[0]),
        .I5(gsh[1]),
        .O(\gsh[1]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \gsh_reg[0] 
       (.C(aclk_sig),
        .CE(bsh),
        .CLR(sda_sig_reg),
        .D(\gsh[0]_i_1_n_0 ),
        .Q(gsh[0]));
  FDCE #(
    .INIT(1'b0)) 
    \gsh_reg[1] 
       (.C(aclk_sig),
        .CE(bsh),
        .CLR(sda_sig_reg),
        .D(\gsh[1]_i_1_n_0 ),
        .Q(gsh[1]));
  FDCE hdrNotFix_reg
       (.C(aclk_sig),
        .CE(hdrNotFix48_out),
        .CLR(sda_sig_reg),
        .D(hdrNotFix),
        .Q(hdrNotFix_reg_n_0));
  LUT6 #(
    .INIT(64'hAA00EFFFAA002000)) 
    i2cReadNotWrite_i_1
       (.I0(i2cReadNotWrite_reg_1),
        .I1(i2cReadNotWrite_reg_0),
        .I2(prepdone),
        .I3(\stateConfig_reg[3]_0 ),
        .I4(i2cReadNotWrite_i_4_n_0),
        .I5(i2cReadNotWrite),
        .O(i2cReadNotWrite_i_1_n_0));
  LUT6 #(
    .INIT(64'h000000000E0000A0)) 
    i2cReadNotWrite_i_4
       (.I0(i2cReadNotWrite_i_5_n_0),
        .I1(\k[1]_i_6_n_0 ),
        .I2(\stateConfig_reg_n_0_[3] ),
        .I3(\stateConfig_reg_n_0_[0] ),
        .I4(\stateConfig_reg_n_0_[1] ),
        .I5(\stateConfig_reg_n_0_[2] ),
        .O(i2cReadNotWrite_i_4_n_0));
  (* SOFT_HLUTNM = "soft_lutpair762" *) 
  LUT3 #(
    .INIT(8'h80)) 
    i2cReadNotWrite_i_5
       (.I0(modNotGetSet),
        .I1(i2cReadNotWrite),
        .I2(\stateConfig_reg_n_0_[3] ),
        .O(i2cReadNotWrite_i_5_n_0));
  FDCE i2cReadNotWrite_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(i2cReadNotWrite_i_1_n_0),
        .Q(i2cReadNotWrite));
  LUT6 #(
    .INIT(64'h00000007FFFFFFFF)) 
    \i2cRegaddr[15]_i_3 
       (.I0(\i2cRegaddr[15]_i_9_n_0 ),
        .I1(\stateLive_reg[2]_0 [2]),
        .I2(reqInvModReg),
        .I3(reqInvGetReg),
        .I4(reqInvSetReg),
        .I5(prepdone),
        .O(\i2cRegaddr[15]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair691" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \i2cRegaddr[15]_i_4 
       (.I0(\bytecnt_reg_n_0_[1] ),
        .I1(\bytecnt_reg_n_0_[2] ),
        .I2(\bytecnt_reg_n_0_[0] ),
        .O(\i2cRegaddr[15]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair672" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \i2cRegaddr[15]_i_8 
       (.I0(\stateConfig_reg_n_0_[3] ),
        .I1(\stateConfig_reg_n_0_[2] ),
        .I2(\stateConfig_reg_n_0_[0] ),
        .I3(\stateConfig_reg_n_0_[1] ),
        .O(\stateConfig_reg[3]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair661" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \i2cRegaddr[15]_i_9 
       (.I0(\stateLive_reg[2]_0 [0]),
        .I1(\stateLive_reg[2]_0 [1]),
        .O(\i2cRegaddr[15]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h00002000AAAAAAAA)) 
    \i2cRegaddr[7]_i_1 
       (.I0(\i2cRegaddr[7]_i_3_n_0 ),
        .I1(\bytecnt_reg_n_0_[1] ),
        .I2(\bytecnt_reg_n_0_[0] ),
        .I3(\stateConfig_reg_n_0_[2] ),
        .I4(\bytecnt_reg_n_0_[2] ),
        .I5(\stateConfig_reg_n_0_[1] ),
        .O(\i2cRegaddr[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1111111100000100)) 
    \i2cRegaddr[7]_i_3 
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\stateConfig_reg_n_0_[3] ),
        .I2(\stateConfig_reg_n_0_[2] ),
        .I3(prepdone),
        .I4(i2cReadNotWrite_reg_0),
        .I5(\stateConfig_reg_n_0_[1] ),
        .O(\i2cRegaddr[7]_i_3_n_0 ));
  FDCE \i2cRegaddr_reg[0] 
       (.C(aclk_sig),
        .CE(\i2cRegaddr[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myParrom_n_22),
        .Q(\i2cRegaddr_reg_n_0_[0] ));
  FDCE \i2cRegaddr_reg[10] 
       (.C(aclk_sig),
        .CE(myParrom_n_8),
        .CLR(sda_sig_reg),
        .D(\i2cRegaddr_reg[15]_0 [6]),
        .Q(\i2cRegaddr_reg_n_0_[10] ));
  FDCE \i2cRegaddr_reg[11] 
       (.C(aclk_sig),
        .CE(myParrom_n_8),
        .CLR(sda_sig_reg),
        .D(\i2cRegaddr_reg[15]_0 [7]),
        .Q(\i2cRegaddr_reg_n_0_[11] ));
  FDCE \i2cRegaddr_reg[12] 
       (.C(aclk_sig),
        .CE(myParrom_n_8),
        .CLR(sda_sig_reg),
        .D(myParrom_n_18),
        .Q(\i2cRegaddr_reg_n_0_[12] ));
  FDCE \i2cRegaddr_reg[13] 
       (.C(aclk_sig),
        .CE(myParrom_n_8),
        .CLR(sda_sig_reg),
        .D(myParrom_n_17),
        .Q(\i2cRegaddr_reg_n_0_[13] ));
  FDCE \i2cRegaddr_reg[14] 
       (.C(aclk_sig),
        .CE(myParrom_n_8),
        .CLR(sda_sig_reg),
        .D(\i2cRegaddr_reg[15]_0 [8]),
        .Q(\i2cRegaddr_reg_n_0_[14] ));
  FDCE \i2cRegaddr_reg[15] 
       (.C(aclk_sig),
        .CE(myParrom_n_8),
        .CLR(sda_sig_reg),
        .D(\i2cRegaddr_reg[15]_0 [9]),
        .Q(\i2cRegaddr_reg_n_0_[15] ));
  FDCE \i2cRegaddr_reg[1] 
       (.C(aclk_sig),
        .CE(\i2cRegaddr[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\i2cRegaddr_reg[15]_0 [0]),
        .Q(\i2cRegaddr_reg_n_0_[1] ));
  FDCE \i2cRegaddr_reg[2] 
       (.C(aclk_sig),
        .CE(\i2cRegaddr[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\i2cRegaddr_reg[15]_0 [1]),
        .Q(\i2cRegaddr_reg_n_0_[2] ));
  FDCE \i2cRegaddr_reg[3] 
       (.C(aclk_sig),
        .CE(\i2cRegaddr[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myParrom_n_21),
        .Q(\i2cRegaddr_reg_n_0_[3] ));
  FDCE \i2cRegaddr_reg[4] 
       (.C(aclk_sig),
        .CE(\i2cRegaddr[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myParrom_n_20),
        .Q(\i2cRegaddr_reg_n_0_[4] ));
  FDCE \i2cRegaddr_reg[5] 
       (.C(aclk_sig),
        .CE(\i2cRegaddr[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\i2cRegaddr_reg[15]_0 [2]),
        .Q(\i2cRegaddr_reg_n_0_[5] ));
  FDCE \i2cRegaddr_reg[6] 
       (.C(aclk_sig),
        .CE(\i2cRegaddr[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myParrom_n_19),
        .Q(\i2cRegaddr_reg_n_0_[6] ));
  FDCE \i2cRegaddr_reg[7] 
       (.C(aclk_sig),
        .CE(\i2cRegaddr[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\i2cRegaddr_reg[15]_0 [3]),
        .Q(\i2cRegaddr_reg_n_0_[7] ));
  FDCE \i2cRegaddr_reg[8] 
       (.C(aclk_sig),
        .CE(myParrom_n_8),
        .CLR(sda_sig_reg),
        .D(\i2cRegaddr_reg[15]_0 [4]),
        .Q(\i2cRegaddr_reg_n_0_[8] ));
  FDCE \i2cRegaddr_reg[9] 
       (.C(aclk_sig),
        .CE(myParrom_n_8),
        .CLR(sda_sig_reg),
        .D(\i2cRegaddr_reg[15]_0 [5]),
        .Q(\i2cRegaddr_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'hFFFFFFFFD5550000)) 
    \i2cSend[7]_i_1 
       (.I0(\i2cSend[7]_i_3_n_0 ),
        .I1(\stateConfig_reg_n_0_[3] ),
        .I2(i2cReadNotWrite),
        .I3(modNotGetSet),
        .I4(\aParrom[10]_i_3_n_0 ),
        .I5(\i2cSend[7]_i_4_n_0 ),
        .O(\i2cSend[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hBBBBBBBBFFFBFFFF)) 
    \i2cSend[7]_i_3 
       (.I0(\stateConfig_reg_n_0_[3] ),
        .I1(prepdone),
        .I2(reqInvModReg),
        .I3(reqInvGetReg),
        .I4(modNotGetSet_i_2_n_0),
        .I5(reqInvSetReg),
        .O(\i2cSend[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000800)) 
    \i2cSend[7]_i_4 
       (.I0(\stateConfig_reg_n_0_[1] ),
        .I1(\j[7]_i_8_n_0 ),
        .I2(\stateConfig_reg_n_0_[0] ),
        .I3(\bytecnt_reg_n_0_[1] ),
        .I4(\bytecnt_reg_n_0_[0] ),
        .I5(\bytecnt_reg_n_0_[2] ),
        .O(\i2cSend[7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair672" *) 
  LUT4 #(
    .INIT(16'h0021)) 
    \i2cSend[7]_i_5 
       (.I0(\stateConfig_reg_n_0_[2] ),
        .I1(\stateConfig_reg_n_0_[3] ),
        .I2(\stateConfig_reg_n_0_[1] ),
        .I3(\stateConfig_reg_n_0_[0] ),
        .O(\i2cSend[7]_i_5_n_0 ));
  FDCE \i2cSend_reg[0] 
       (.C(aclk_sig),
        .CE(\i2cSend[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_8),
        .Q(\i2cSend_reg_n_0_[0] ));
  FDCE \i2cSend_reg[1] 
       (.C(aclk_sig),
        .CE(\i2cSend[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_7),
        .Q(\i2cSend_reg_n_0_[1] ));
  FDCE \i2cSend_reg[2] 
       (.C(aclk_sig),
        .CE(\i2cSend[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_6),
        .Q(\i2cSend_reg_n_0_[2] ));
  FDCE \i2cSend_reg[3] 
       (.C(aclk_sig),
        .CE(\i2cSend[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_5),
        .Q(\i2cSend_reg_n_0_[3] ));
  FDCE \i2cSend_reg[4] 
       (.C(aclk_sig),
        .CE(\i2cSend[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_4),
        .Q(\i2cSend_reg_n_0_[4] ));
  FDCE \i2cSend_reg[5] 
       (.C(aclk_sig),
        .CE(\i2cSend[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_3),
        .Q(\i2cSend_reg_n_0_[5] ));
  FDCE \i2cSend_reg[6] 
       (.C(aclk_sig),
        .CE(\i2cSend[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_2),
        .Q(\i2cSend_reg_n_0_[6] ));
  FDCE \i2cSend_reg[7] 
       (.C(aclk_sig),
        .CE(\i2cSend[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_1),
        .Q(\i2cSend_reg_n_0_[7] ));
  (* SOFT_HLUTNM = "soft_lutpair630" *) 
  LUT4 #(
    .INIT(16'h5501)) 
    \i[0]__0_i_1 
       (.I0(\i_reg[0]__0_n_0 ),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .O(\i[0]__0_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hBABBBBBB8A888888)) 
    \i[0]__1_i_1 
       (.I0(\i[0]__1_i_2_n_0 ),
        .I1(\i[0]__1_i_3_n_0 ),
        .I2(\i_reg[0]__1_0 ),
        .I3(hdrNotFix_reg_n_0),
        .I4(\i[0]__1_i_4_n_0 ),
        .I5(\i_reg[0]__1_n_0 ),
        .O(\i[0]__1_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair703" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \i[0]__1_i_2 
       (.I0(ackLiveToConfigSetReg_reg_n_0),
        .I1(\stateLive_reg[2]_0 [0]),
        .I2(\stateLive_reg[2]_0 [2]),
        .O(\i[0]__1_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair622" *) 
  LUT5 #(
    .INIT(32'h01110011)) 
    \i[0]__1_i_3 
       (.I0(\stateLive_reg[2]_0 [1]),
        .I1(\stateLive_reg[2]_0 [0]),
        .I2(\i_reg[0]__1_n_0 ),
        .I3(\stateLive_reg[2]_0 [2]),
        .I4(ackLiveToConfigSetReg_reg_n_0),
        .O(\i[0]__1_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair682" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \i[0]__1_i_4 
       (.I0(video_out_tvalid),
        .I1(video_out_tlast),
        .I2(\stateLive_reg[2]_0 [2]),
        .I3(\stateLive_reg[2]_0 [0]),
        .O(\i[0]__1_i_4_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \i[0]_i_1__0 
       (.I0(i_reg[0]),
        .O(\i[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair701" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \i[1]__0_i_1 
       (.I0(i_reg[1]),
        .I1(i_reg[0]),
        .O(p_0_in__0[1]));
  (* SOFT_HLUTNM = "soft_lutpair630" *) 
  LUT5 #(
    .INIT(32'h66660006)) 
    \i[1]_i_1__0 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg[0]__0_n_0 ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\stateSynth_reg[2]_0 ),
        .O(\i[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair701" *) 
  LUT3 #(
    .INIT(8'h6A)) 
    \i[2]__0_i_1 
       (.I0(i_reg[2]),
        .I1(i_reg[0]),
        .I2(i_reg[1]),
        .O(p_0_in__0[2]));
  LUT6 #(
    .INIT(64'h00ABAB00AB00AB00)) 
    \i[2]_i_1__0 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[2] ),
        .I4(\i_reg[0]__0_n_0 ),
        .I5(\i_reg_n_0_[1] ),
        .O(\i[2]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \i[3]__0_i_1 
       (.I0(\stateConfig_reg_n_0_[2] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[0] ),
        .I3(sda_sig_reg),
        .I4(\stateConfig_reg_n_0_[3] ),
        .I5(prepdone),
        .O(\i[3]__0_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    \i[3]__0_i_2 
       (.I0(\stateConfig_reg_n_0_[3] ),
        .I1(sda_sig_reg),
        .I2(\stateConfig_reg_n_0_[1] ),
        .I3(\stateConfig_reg_n_0_[2] ),
        .I4(tkclk),
        .I5(\stateConfig_reg_n_0_[0] ),
        .O(i0));
  (* SOFT_HLUTNM = "soft_lutpair627" *) 
  LUT4 #(
    .INIT(16'h6AAA)) 
    \i[3]__0_i_3 
       (.I0(i_reg[3]),
        .I1(i_reg[1]),
        .I2(i_reg[0]),
        .I3(i_reg[2]),
        .O(p_0_in__0[3]));
  LUT5 #(
    .INIT(32'h14444444)) 
    \i[3]_i_1__0 
       (.I0(\probe[0]_INST_0_i_2_n_0 ),
        .I1(\i_reg_n_0_[3] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\i_reg[0]__0_n_0 ),
        .I4(\i_reg_n_0_[2] ),
        .O(\i[3]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h1444444444444444)) 
    \i[4]_i_1__0 
       (.I0(\probe[0]_INST_0_i_2_n_0 ),
        .I1(\i_reg_n_0_[4] ),
        .I2(\i_reg_n_0_[2] ),
        .I3(\i_reg[0]__0_n_0 ),
        .I4(\i_reg_n_0_[1] ),
        .I5(\i_reg_n_0_[3] ),
        .O(\i[4]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair629" *) 
  LUT5 #(
    .INIT(32'h00ABAB00)) 
    \i[5]_i_1__0 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[5] ),
        .I4(\i[5]_i_2__0_n_0 ),
        .O(\i[5]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \i[5]_i_2__0 
       (.I0(\i_reg_n_0_[3] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg[0]__0_n_0 ),
        .I3(\i_reg_n_0_[2] ),
        .I4(\i_reg_n_0_[4] ),
        .O(\i[5]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair628" *) 
  LUT5 #(
    .INIT(32'h00ABAB00)) 
    \i[6]_i_1__0 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[6] ),
        .I4(\i[7]_i_5_n_0 ),
        .O(\i[6]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \i[7]_i_10 
       (.I0(TLinepad[0]),
        .I1(\i_reg[0]__0_n_0 ),
        .I2(\i_reg_n_0_[1] ),
        .I3(TLinepad[1]),
        .I4(\i_reg_n_0_[2] ),
        .I5(TLinepad[2]),
        .O(\i[7]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \i[7]_i_11 
       (.I0(TLinepad[3]),
        .I1(\i_reg_n_0_[3] ),
        .I2(\i_reg_n_0_[4] ),
        .I3(TLinepad[4]),
        .I4(\i_reg_n_0_[5] ),
        .I5(TLinepad[5]),
        .O(\i[7]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF6FF6BDDBFFFF)) 
    \i[7]_i_17 
       (.I0(col[1]),
        .I1(NColRaw[1]),
        .I2(col[2]),
        .I3(NColRaw[2]),
        .I4(col[0]),
        .I5(NColRaw[0]),
        .O(\col_reg[1]_0 ));
  LUT6 #(
    .INIT(64'h4000444440004000)) 
    \i[7]_i_1__0 
       (.I0(sda_sig_reg),
        .I1(\stateSynth[2]_i_7_n_0 ),
        .I2(\i_reg[0]__0_0 ),
        .I3(\probe[0]_INST_0_i_2_n_0 ),
        .I4(\i[7]_i_4_n_0 ),
        .I5(\row[11]_i_6_n_0 ),
        .O(\i[7]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h6A006A006A006A6A)) 
    \i[7]_i_2__0 
       (.I0(\i_reg_n_0_[7] ),
        .I1(\i_reg_n_0_[6] ),
        .I2(\i[7]_i_5_n_0 ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\i[7]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000009009)) 
    \i[7]_i_4 
       (.I0(\i_reg_n_0_[6] ),
        .I1(TLinepad[6]),
        .I2(\i_reg_n_0_[7] ),
        .I3(TLinepad[7]),
        .I4(\i[7]_i_10_n_0 ),
        .I5(\i[7]_i_11_n_0 ),
        .O(\i[7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \i[7]_i_5 
       (.I0(\i_reg_n_0_[4] ),
        .I1(\i_reg_n_0_[2] ),
        .I2(\i_reg[0]__0_n_0 ),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[3] ),
        .I5(\i_reg_n_0_[5] ),
        .O(\i[7]_i_5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(i0),
        .D(\i[0]_i_1__0_n_0 ),
        .Q(i_reg[0]),
        .R(\i[3]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[0]__0 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__0_n_0 ),
        .D(\i[0]__0_i_1_n_0 ),
        .Q(\i_reg[0]__0_n_0 ),
        .R(1'b0));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(\i[0]__1_i_1_n_0 ),
        .Q(\i_reg[0]__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__0_n_0 ),
        .D(\i[1]_i_1__0_n_0 ),
        .Q(\i_reg_n_0_[1] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[1]__0 
       (.C(aclk_sig),
        .CE(i0),
        .D(p_0_in__0[1]),
        .Q(i_reg[1]),
        .R(\i[3]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__0_n_0 ),
        .D(\i[2]_i_1__0_n_0 ),
        .Q(\i_reg_n_0_[2] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[2]__0 
       (.C(aclk_sig),
        .CE(i0),
        .D(p_0_in__0[2]),
        .Q(i_reg[2]),
        .R(\i[3]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__0_n_0 ),
        .D(\i[3]_i_1__0_n_0 ),
        .Q(\i_reg_n_0_[3] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[3]__0 
       (.C(aclk_sig),
        .CE(i0),
        .D(p_0_in__0[3]),
        .Q(i_reg[3]),
        .R(\i[3]__0_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__0_n_0 ),
        .D(\i[4]_i_1__0_n_0 ),
        .Q(\i_reg_n_0_[4] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__0_n_0 ),
        .D(\i[5]_i_1__0_n_0 ),
        .Q(\i_reg_n_0_[5] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__0_n_0 ),
        .D(\i[6]_i_1__0_n_0 ),
        .Q(\i_reg_n_0_[6] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__0_n_0 ),
        .D(\i[7]_i_2__0_n_0 ),
        .Q(\i_reg_n_0_[7] ),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair671" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \ixMem[7]_i_3 
       (.I0(\ixTExp_sig_reg[2]_0 ),
        .I1(ixTExp[1]),
        .I2(ixTExp[0]),
        .O(\ixTExp_sig_reg[2]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair758" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \ixMem[7]_i_4 
       (.I0(\ixTExp_sig_reg_n_0_[1] ),
        .I1(synthNotLive_reg_n_0),
        .I2(liveIxTExp[1]),
        .O(ixTExp[1]));
  (* SOFT_HLUTNM = "soft_lutpair759" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \ixMem[7]_i_5 
       (.I0(\ixTExp_sig_reg_n_0_[0] ),
        .I1(synthNotLive_reg_n_0),
        .I2(liveIxTExp[0]),
        .O(ixTExp[0]));
  LUT3 #(
    .INIT(8'h0D)) 
    \ixTExp_lcl[0]_i_1 
       (.I0(\ixTExp_lcl_reg_n_0_[2] ),
        .I1(\ixTExp_lcl_reg_n_0_[1] ),
        .I2(\ixTExp_lcl_reg_n_0_[0] ),
        .O(\ixTExp_lcl[0]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \ixTExp_lcl[1]_i_1 
       (.I0(\ixTExp_lcl_reg_n_0_[0] ),
        .I1(\ixTExp_lcl_reg_n_0_[1] ),
        .O(\ixTExp_lcl[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00200000)) 
    \ixTExp_lcl[2]_i_1 
       (.I0(\ixTExp_lcl[2]_i_3_n_0 ),
        .I1(\i_reg[0]__1_0 ),
        .I2(hdrNotFix_reg_n_0),
        .I3(\stateLive_reg[2]_0 [0]),
        .I4(\stateLive_reg[2]_0 [1]),
        .O(\ixTExp_lcl[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair662" *) 
  LUT3 #(
    .INIT(8'h68)) 
    \ixTExp_lcl[2]_i_2 
       (.I0(\ixTExp_lcl_reg_n_0_[2] ),
        .I1(\ixTExp_lcl_reg_n_0_[1] ),
        .I2(\ixTExp_lcl_reg_n_0_[0] ),
        .O(\ixTExp_lcl[2]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair682" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \ixTExp_lcl[2]_i_3 
       (.I0(\stateLive_reg[2]_0 [2]),
        .I1(video_out_tlast),
        .I2(video_out_tvalid),
        .O(\ixTExp_lcl[2]_i_3_n_0 ));
  FDPE #(
    .INIT(1'b0)) 
    \ixTExp_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\ixTExp_lcl[2]_i_1_n_0 ),
        .D(\ixTExp_lcl[0]_i_1_n_0 ),
        .PRE(sda_sig_reg),
        .Q(\ixTExp_lcl_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \ixTExp_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\ixTExp_lcl[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\ixTExp_lcl[1]_i_1_n_0 ),
        .Q(\ixTExp_lcl_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \ixTExp_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\ixTExp_lcl[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\ixTExp_lcl[2]_i_2_n_0 ),
        .Q(\ixTExp_lcl_reg_n_0_[2] ));
  (* SOFT_HLUTNM = "soft_lutpair677" *) 
  LUT4 #(
    .INIT(16'h00A2)) 
    \ixTExp_sig[0]_i_1 
       (.I0(\stateSynth[2]_i_7_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[2] ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[0] ),
        .O(\ixTExp_sig[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000FE00FE000000)) 
    \ixTExp_sig[1]_i_1 
       (.I0(\stateSynth_reg_n_0_[0] ),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(rng),
        .I4(\ixTExp_sig_reg_n_0_[0] ),
        .I5(\ixTExp_sig_reg_n_0_[1] ),
        .O(\ixTExp_sig[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0080000FFFFFFFFF)) 
    \ixTExp_sig[2]_i_1 
       (.I0(\ixTExp_sig[2]_i_3_n_0 ),
        .I1(hdrNotFix_reg_n_0),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(rng),
        .O(\ixTExp_sig[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair677" *) 
  LUT4 #(
    .INIT(16'h2880)) 
    \ixTExp_sig[2]_i_2 
       (.I0(\stateSynth[2]_i_7_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .O(\ixTExp_sig[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \ixTExp_sig[2]_i_3 
       (.I0(j_reg[15]),
        .I1(\ixTExp_sig[2]_i_4_n_0 ),
        .I2(\ixTExp_sig[2]_i_5_n_0 ),
        .I3(\ixTExp_sig[2]_i_6_n_0 ),
        .I4(\ixTExp_sig[2]_i_7_n_0 ),
        .I5(\ixTExp_sig[2]_i_8_n_0 ),
        .O(\ixTExp_sig[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \ixTExp_sig[2]_i_4 
       (.I0(p_0_in[6]),
        .I1(j_reg[6]),
        .I2(j_reg[8]),
        .I3(p_0_in[8]),
        .I4(j_reg[7]),
        .I5(p_0_in[7]),
        .O(\ixTExp_sig[2]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \ixTExp_sig[2]_i_5 
       (.I0(p_0_in[11]),
        .I1(j_reg[11]),
        .I2(j_reg[10]),
        .I3(p_0_in[10]),
        .I4(j_reg[9]),
        .I5(p_0_in[9]),
        .O(\ixTExp_sig[2]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \ixTExp_sig[2]_i_6 
       (.I0(j_reg[1]),
        .I1(p_0_in[1]),
        .I2(j_reg[2]),
        .I3(p_0_in[2]),
        .I4(p_0_in[0]),
        .I5(j_reg[0]),
        .O(\ixTExp_sig[2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \ixTExp_sig[2]_i_7 
       (.I0(p_0_in[3]),
        .I1(j_reg[3]),
        .I2(j_reg[4]),
        .I3(p_0_in[4]),
        .I4(j_reg[5]),
        .I5(p_0_in[5]),
        .O(\ixTExp_sig[2]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \ixTExp_sig[2]_i_8 
       (.I0(p_0_in[12]),
        .I1(j_reg[12]),
        .I2(j_reg[13]),
        .I3(p_0_in[13]),
        .I4(j_reg[14]),
        .I5(p_0_in[14]),
        .O(\ixTExp_sig[2]_i_8_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \ixTExp_sig_reg[0] 
       (.C(aclk_sig),
        .CE(\ixTExp_sig[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\ixTExp_sig[0]_i_1_n_0 ),
        .Q(\ixTExp_sig_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \ixTExp_sig_reg[1] 
       (.C(aclk_sig),
        .CE(\ixTExp_sig[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\ixTExp_sig[1]_i_1_n_0 ),
        .Q(\ixTExp_sig_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \ixTExp_sig_reg[2] 
       (.C(aclk_sig),
        .CE(\ixTExp_sig[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\ixTExp_sig[2]_i_2_n_0 ),
        .Q(\ixTExp_sig_reg_n_0_[2] ));
  LUT1 #(
    .INIT(2'h1)) 
    \j[0]__0_i_1 
       (.I0(j_reg[0]),
        .O(p_0_in__0__0[0]));
  LUT6 #(
    .INIT(64'h00000080FFFCFFBF)) 
    \j[0]_i_1 
       (.I0(specNotGnr),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[2] ),
        .I3(\stateConfig_reg_n_0_[3] ),
        .I4(\stateConfig_reg_n_0_[0] ),
        .I5(\j_reg_n_0_[0] ),
        .O(\j[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h4000000044444444)) 
    \j[15]_i_1 
       (.I0(sda_sig_reg),
        .I1(\stateSynth[2]_i_7_n_0 ),
        .I2(\row_reg[0]_1 ),
        .I3(\i[7]_i_4_n_0 ),
        .I4(\row[11]_i_6_n_0 ),
        .I5(\j[15]_i_4_n_0 ),
        .O(\j[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000006000)) 
    \j[15]_i_2 
       (.I0(\stateSynth_reg_n_0_[0] ),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(rng),
        .I4(sda_sig_reg),
        .I5(\row[11]_i_5_n_0 ),
        .O(\j[15]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair688" *) 
  LUT4 #(
    .INIT(16'hF7FF)) 
    \j[15]_i_4 
       (.I0(\ixTExp_sig[2]_i_3_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .O(\j[15]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h6666666066066666)) 
    \j[1]_i_1 
       (.I0(\j_reg_n_0_[0] ),
        .I1(\j_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[2] ),
        .I3(\stateConfig_reg_n_0_[3] ),
        .I4(\stateConfig_reg_n_0_[1] ),
        .I5(\stateConfig_reg_n_0_[0] ),
        .O(\j[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair625" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \j[2]_i_1 
       (.I0(\j[7]_i_9_n_0 ),
        .I1(\j_reg_n_0_[1] ),
        .I2(\j_reg_n_0_[0] ),
        .I3(\j_reg_n_0_[2] ),
        .O(\j[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair625" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \j[3]_i_1 
       (.I0(\j[7]_i_9_n_0 ),
        .I1(\j_reg_n_0_[0] ),
        .I2(\j_reg_n_0_[1] ),
        .I3(\j_reg_n_0_[2] ),
        .I4(\j_reg_n_0_[3] ),
        .O(\j[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \j[4]_i_1 
       (.I0(\j[7]_i_9_n_0 ),
        .I1(\j_reg_n_0_[2] ),
        .I2(\j_reg_n_0_[1] ),
        .I3(\j_reg_n_0_[0] ),
        .I4(\j_reg_n_0_[3] ),
        .I5(\j_reg_n_0_[4] ),
        .O(\j[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \j[5]_i_1 
       (.I0(\j[7]_i_9_n_0 ),
        .I1(\j_reg_n_0_[3] ),
        .I2(\j[5]_i_2_n_0 ),
        .I3(\j_reg_n_0_[2] ),
        .I4(\j_reg_n_0_[4] ),
        .I5(\j_reg_n_0_[5] ),
        .O(\j[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair675" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \j[5]_i_2 
       (.I0(\j_reg_n_0_[1] ),
        .I1(\j_reg_n_0_[0] ),
        .O(\j[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000FEBFFEBF0000)) 
    \j[6]_i_1 
       (.I0(\stateConfig_reg_n_0_[3] ),
        .I1(\stateConfig_reg_n_0_[2] ),
        .I2(\stateConfig_reg_n_0_[1] ),
        .I3(\stateConfig_reg_n_0_[0] ),
        .I4(\j[7]_i_10_n_0 ),
        .I5(\j_reg_n_0_[6] ),
        .O(\j[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \j[7]_i_10 
       (.I0(\j_reg_n_0_[4] ),
        .I1(\j_reg_n_0_[2] ),
        .I2(\j_reg_n_0_[1] ),
        .I3(\j_reg_n_0_[0] ),
        .I4(\j_reg_n_0_[3] ),
        .I5(\j_reg_n_0_[5] ),
        .O(\j[7]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair627" *) 
  LUT5 #(
    .INIT(32'h02000000)) 
    \j[7]_i_11 
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(i_reg[0]),
        .I2(i_reg[2]),
        .I3(i_reg[1]),
        .I4(i_reg[3]),
        .O(\j[7]_i_11_n_0 ));
  LUT4 #(
    .INIT(16'h2A80)) 
    \j[7]_i_3 
       (.I0(\j[7]_i_9_n_0 ),
        .I1(\j_reg_n_0_[6] ),
        .I2(\j[7]_i_10_n_0 ),
        .I3(\j_reg_n_0_[7] ),
        .O(\j[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800300008)) 
    \j[7]_i_4 
       (.I0(\j[7]_i_11_n_0 ),
        .I1(tkclk),
        .I2(\stateConfig_reg_n_0_[3] ),
        .I3(\stateConfig_reg_n_0_[2] ),
        .I4(\stateConfig_reg_n_0_[1] ),
        .I5(\stateConfig_reg_n_0_[0] ),
        .O(\j[7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair761" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \j[7]_i_5 
       (.I0(\stateConfig_reg_n_0_[1] ),
        .I1(\stateConfig_reg_n_0_[0] ),
        .I2(tkclk),
        .O(\j[7]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair692" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \j[7]_i_7 
       (.I0(\stateConfig_reg_n_0_[1] ),
        .I1(\stateConfig_reg_n_0_[0] ),
        .O(\j[7]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair768" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \j[7]_i_8 
       (.I0(\stateConfig_reg_n_0_[2] ),
        .I1(\stateConfig_reg_n_0_[3] ),
        .O(\j[7]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair673" *) 
  LUT4 #(
    .INIT(16'hFFBD)) 
    \j[7]_i_9 
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[2] ),
        .I3(\stateConfig_reg_n_0_[3] ),
        .O(\j[7]_i_9_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[0] 
       (.C(aclk_sig),
        .CE(myParrom_n_42),
        .D(\j[0]_i_1_n_0 ),
        .Q(\j_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[0]__0 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[0]),
        .Q(j_reg[0]),
        .R(\j[15]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[10] 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[10]),
        .Q(j_reg[10]),
        .R(\j[15]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[11] 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[11]),
        .Q(j_reg[11]),
        .R(\j[15]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[12] 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[12]),
        .Q(j_reg[12]),
        .R(\j[15]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[13] 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[13]),
        .Q(j_reg[13]),
        .R(\j[15]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[14] 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[14]),
        .Q(j_reg[14]),
        .R(\j[15]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[15] 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[15]),
        .Q(j_reg[15]),
        .R(\j[15]_i_1_n_0 ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \j_reg[15]_i_3 
       (.CI(\j_reg[8]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_j_reg[15]_i_3_CO_UNCONNECTED [7:6],\j_reg[15]_i_3_n_2 ,\j_reg[15]_i_3_n_3 ,\j_reg[15]_i_3_n_4 ,\j_reg[15]_i_3_n_5 ,\j_reg[15]_i_3_n_6 ,\j_reg[15]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_j_reg[15]_i_3_O_UNCONNECTED [7],p_0_in__0__0[15:9]}),
        .S({1'b0,j_reg[15:9]}));
  FDSE #(
    .INIT(1'b0)) 
    \j_reg[1] 
       (.C(aclk_sig),
        .CE(myParrom_n_42),
        .D(\j[1]_i_1_n_0 ),
        .Q(\j_reg_n_0_[1] ),
        .S(myParrom_n_43));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[1]__0 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[1]),
        .Q(j_reg[1]),
        .R(\j[15]_i_1_n_0 ));
  FDSE #(
    .INIT(1'b0)) 
    \j_reg[2] 
       (.C(aclk_sig),
        .CE(myParrom_n_42),
        .D(\j[2]_i_1_n_0 ),
        .Q(\j_reg_n_0_[2] ),
        .S(myParrom_n_43));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[2]__0 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[2]),
        .Q(j_reg[2]),
        .R(\j[15]_i_1_n_0 ));
  FDSE #(
    .INIT(1'b0)) 
    \j_reg[3] 
       (.C(aclk_sig),
        .CE(myParrom_n_42),
        .D(\j[3]_i_1_n_0 ),
        .Q(\j_reg_n_0_[3] ),
        .S(myParrom_n_43));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[3]__0 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[3]),
        .Q(j_reg[3]),
        .R(\j[15]_i_1_n_0 ));
  FDSE #(
    .INIT(1'b0)) 
    \j_reg[4] 
       (.C(aclk_sig),
        .CE(myParrom_n_42),
        .D(\j[4]_i_1_n_0 ),
        .Q(\j_reg_n_0_[4] ),
        .S(myParrom_n_43));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[4]__0 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[4]),
        .Q(j_reg[4]),
        .R(\j[15]_i_1_n_0 ));
  FDSE #(
    .INIT(1'b0)) 
    \j_reg[5] 
       (.C(aclk_sig),
        .CE(myParrom_n_42),
        .D(\j[5]_i_1_n_0 ),
        .Q(\j_reg_n_0_[5] ),
        .S(myParrom_n_43));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[5]__0 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[5]),
        .Q(j_reg[5]),
        .R(\j[15]_i_1_n_0 ));
  FDSE #(
    .INIT(1'b0)) 
    \j_reg[6] 
       (.C(aclk_sig),
        .CE(myParrom_n_42),
        .D(\j[6]_i_1_n_0 ),
        .Q(\j_reg_n_0_[6] ),
        .S(myParrom_n_43));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[6]__0 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[6]),
        .Q(j_reg[6]),
        .R(\j[15]_i_1_n_0 ));
  FDSE #(
    .INIT(1'b0)) 
    \j_reg[7] 
       (.C(aclk_sig),
        .CE(myParrom_n_42),
        .D(\j[7]_i_3_n_0 ),
        .Q(\j_reg_n_0_[7] ),
        .S(myParrom_n_43));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[7]__0 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[7]),
        .Q(j_reg[7]),
        .R(\j[15]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[8] 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[8]),
        .Q(j_reg[8]),
        .R(\j[15]_i_1_n_0 ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \j_reg[8]_i_1 
       (.CI(j_reg[0]),
        .CI_TOP(1'b0),
        .CO({\j_reg[8]_i_1_n_0 ,\j_reg[8]_i_1_n_1 ,\j_reg[8]_i_1_n_2 ,\j_reg[8]_i_1_n_3 ,\j_reg[8]_i_1_n_4 ,\j_reg[8]_i_1_n_5 ,\j_reg[8]_i_1_n_6 ,\j_reg[8]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(p_0_in__0__0[8:1]),
        .S(j_reg[8:1]));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[9] 
       (.C(aclk_sig),
        .CE(\j[15]_i_2_n_0 ),
        .D(p_0_in__0__0[9]),
        .Q(j_reg[9]),
        .R(\j[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair769" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \k[0]_i_1 
       (.I0(k[0]),
        .O(stateConfig1[0]));
  LUT5 #(
    .INIT(32'h00000020)) 
    \k[1]_i_2 
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[2] ),
        .I3(\stateConfig_reg_n_0_[3] ),
        .I4(sda_sig_reg),
        .O(k0));
  (* SOFT_HLUTNM = "soft_lutpair769" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \k[1]_i_3 
       (.I0(k[0]),
        .I1(k[1]),
        .O(stateConfig1[1]));
  (* SOFT_HLUTNM = "soft_lutpair626" *) 
  LUT4 #(
    .INIT(16'h0010)) 
    \k[1]_i_5 
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[3] ),
        .I3(\stateConfig_reg_n_0_[2] ),
        .O(ackLiveToConfigSetReg));
  LUT6 #(
    .INIT(64'h0000000020000000)) 
    \k[1]_i_6 
       (.I0(tkclk),
        .I1(\k[1]_i_8_n_0 ),
        .I2(\j_reg_n_0_[3] ),
        .I3(\j_reg_n_0_[7] ),
        .I4(\j_reg_n_0_[6] ),
        .I5(\j_reg_n_0_[5] ),
        .O(\k[1]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair675" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \k[1]_i_8 
       (.I0(\j_reg_n_0_[0] ),
        .I1(\j_reg_n_0_[1] ),
        .I2(\j_reg_n_0_[2] ),
        .I3(\j_reg_n_0_[4] ),
        .O(\k[1]_i_8_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \k_reg[0] 
       (.C(aclk_sig),
        .CE(k0),
        .D(stateConfig1[0]),
        .Q(k[0]),
        .R(myParrom_n_40));
  FDRE #(
    .INIT(1'b0)) 
    \k_reg[1] 
       (.C(aclk_sig),
        .CE(k0),
        .D(stateConfig1[1]),
        .Q(k[1]),
        .R(myParrom_n_40));
  (* SOFT_HLUTNM = "soft_lutpair690" *) 
  LUT4 #(
    .INIT(16'h03E3)) 
    \klm[2]_i_1 
       (.I0(camifToVideoinAXIS_tvalid),
        .I1(\klm_reg[0]_7 [1]),
        .I2(\klm_reg[0]_7 [0]),
        .I3(synthNotLive_reg_0),
        .O(\stateIgr_reg[1]_0 ));
  LUT6 #(
    .INIT(64'h888888888888B888)) 
    \klm[2]_i_3 
       (.I0(toVideoinAXIS_tvalid_sig),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tvalid),
        .I3(\klm[2]_i_4_n_0 ),
        .I4(\stateLive_reg[2]_0 [2]),
        .I5(\klm[2]_i_5_n_0 ),
        .O(camifToVideoinAXIS_tvalid));
  LUT6 #(
    .INIT(64'h0000000000200000)) 
    \klm[2]_i_4 
       (.I0(video_out_tuser[69]),
        .I1(video_out_tuser[68]),
        .I2(video_out_tuser[67]),
        .I3(video_out_tuser[65]),
        .I4(video_out_tuser[66]),
        .I5(video_out_tuser[64]),
        .O(\klm[2]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair703" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \klm[2]_i_5 
       (.I0(\stateLive_reg[2]_0 [0]),
        .I1(\stateLive_reg[2]_0 [1]),
        .O(\klm[2]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair709" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \liveIxTExp[0]_i_1 
       (.I0(\ixTExp_lcl_reg_n_0_[2] ),
        .I1(\ixTExp_lcl_reg_n_0_[1] ),
        .I2(\ixTExp_lcl_reg_n_0_[0] ),
        .O(\liveIxTExp[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair665" *) 
  LUT3 #(
    .INIT(8'hC2)) 
    \liveIxTExp[1]_i_1 
       (.I0(\ixTExp_lcl_reg_n_0_[2] ),
        .I1(\ixTExp_lcl_reg_n_0_[1] ),
        .I2(\ixTExp_lcl_reg_n_0_[0] ),
        .O(\liveIxTExp[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00080000)) 
    \liveIxTExp[2]_i_1 
       (.I0(\stateLive_reg[2]_0 [2]),
        .I1(\i_reg[0]__1_n_0 ),
        .I2(\stateLive_reg[2]_0 [0]),
        .I3(\stateLive_reg[2]_0 [1]),
        .I4(ackLiveToConfigSetReg_reg_n_0),
        .O(\liveIxTExp[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair709" *) 
  LUT3 #(
    .INIT(8'hA9)) 
    \liveIxTExp[2]_i_2 
       (.I0(\ixTExp_lcl_reg_n_0_[2] ),
        .I1(\ixTExp_lcl_reg_n_0_[0] ),
        .I2(\ixTExp_lcl_reg_n_0_[1] ),
        .O(\liveIxTExp[2]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \liveIxTExp_reg[0] 
       (.C(aclk_sig),
        .CE(\liveIxTExp[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\liveIxTExp[0]_i_1_n_0 ),
        .Q(liveIxTExp[0]));
  FDCE #(
    .INIT(1'b0)) 
    \liveIxTExp_reg[1] 
       (.C(aclk_sig),
        .CE(\liveIxTExp[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\liveIxTExp[1]_i_1_n_0 ),
        .Q(liveIxTExp[1]));
  FDCE #(
    .INIT(1'b0)) 
    \liveIxTExp_reg[2] 
       (.C(aclk_sig),
        .CE(\liveIxTExp[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\liveIxTExp[2]_i_2_n_0 ),
        .Q(liveIxTExp[2]));
  LUT6 #(
    .INIT(64'h0000000EAAAAAAAA)) 
    liveNotExt_i_1
       (.I0(liveNotExt),
        .I1(modNotGetSet_i_2_n_0),
        .I2(reqInvModReg),
        .I3(reqInvGetReg),
        .I4(reqInvSetReg),
        .I5(modNotGetSet_i_3_n_0),
        .O(liveNotExt_i_1_n_0));
  FDRE liveNotExt_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(liveNotExt_i_1_n_0),
        .Q(liveNotExt),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair622" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \liveSetRegAddr[0]_i_1 
       (.I0(\i_reg[0]__1_n_0 ),
        .I1(\stateLive_reg[2]_0 [0]),
        .I2(\stateLive_reg[2]_0 [1]),
        .O(liveSetRegAddr[0]));
  LUT3 #(
    .INIT(8'h41)) 
    \liveSetRegAddr[13]_i_1 
       (.I0(\stateLive_reg[2]_0 [2]),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\stateLive_reg[2]_0 [0]),
        .O(\liveSetRegAddr[13]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \liveSetRegAddr[13]_i_2 
       (.I0(\stateLive_reg[2]_0 [0]),
        .I1(\stateLive_reg[2]_0 [1]),
        .O(liveSetRegAddr[13]));
  FDCE \liveSetRegAddr_reg[0] 
       (.C(aclk_sig),
        .CE(\liveSetRegAddr[13]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(liveSetRegAddr[0]),
        .Q(\liveSetRegAddr_reg[13]_0 [0]));
  FDCE \liveSetRegAddr_reg[13] 
       (.C(aclk_sig),
        .CE(\liveSetRegAddr[13]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(liveSetRegAddr[13]),
        .Q(\liveSetRegAddr_reg[13]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair665" *) 
  LUT5 #(
    .INIT(32'h55545445)) 
    \liveSetRegVal[0]_i_1 
       (.I0(\liveSetRegVal[7]_i_3_n_0 ),
        .I1(\ixTExp_lcl_reg_n_0_[2] ),
        .I2(\ixTExp_lcl_reg_n_0_[1] ),
        .I3(\i_reg[0]__1_n_0 ),
        .I4(\ixTExp_lcl_reg_n_0_[0] ),
        .O(\liveSetRegVal[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair623" *) 
  LUT5 #(
    .INIT(32'h000F004A)) 
    \liveSetRegVal[1]_i_1 
       (.I0(\ixTExp_lcl_reg_n_0_[1] ),
        .I1(\ixTExp_lcl_reg_n_0_[0] ),
        .I2(\i_reg[0]__1_n_0 ),
        .I3(\liveSetRegVal[7]_i_3_n_0 ),
        .I4(\ixTExp_lcl_reg_n_0_[2] ),
        .O(\liveSetRegVal[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair662" *) 
  LUT5 #(
    .INIT(32'h00004440)) 
    \liveSetRegVal[2]_i_1 
       (.I0(\ixTExp_lcl_reg_n_0_[1] ),
        .I1(\ixTExp_lcl_reg_n_0_[0] ),
        .I2(\stateLive_reg[2]_0 [1]),
        .I3(\stateLive_reg[2]_0 [0]),
        .I4(\ixTExp_lcl_reg_n_0_[2] ),
        .O(\liveSetRegVal[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair623" *) 
  LUT5 #(
    .INIT(32'h01011001)) 
    \liveSetRegVal[3]_i_1 
       (.I0(\liveSetRegVal[7]_i_3_n_0 ),
        .I1(\ixTExp_lcl_reg_n_0_[2] ),
        .I2(\i_reg[0]__1_n_0 ),
        .I3(\ixTExp_lcl_reg_n_0_[0] ),
        .I4(\ixTExp_lcl_reg_n_0_[1] ),
        .O(\liveSetRegVal[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair661" *) 
  LUT5 #(
    .INIT(32'hEEEEE000)) 
    \liveSetRegVal[4]_i_1 
       (.I0(\stateLive_reg[2]_0 [0]),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_n_0 ),
        .I3(\ixTExp_lcl_reg_n_0_[1] ),
        .I4(\ixTExp_lcl_reg_n_0_[2] ),
        .O(\liveSetRegVal[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair624" *) 
  LUT5 #(
    .INIT(32'h00000006)) 
    \liveSetRegVal[6]_i_1 
       (.I0(\ixTExp_lcl_reg_n_0_[1] ),
        .I1(\ixTExp_lcl_reg_n_0_[0] ),
        .I2(\i_reg[0]__1_n_0 ),
        .I3(\liveSetRegVal[7]_i_3_n_0 ),
        .I4(\ixTExp_lcl_reg_n_0_[2] ),
        .O(\liveSetRegVal[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0002111122221111)) 
    \liveSetRegVal[7]_i_1 
       (.I0(\stateLive_reg[2]_0 [1]),
        .I1(\stateLive_reg[2]_0 [2]),
        .I2(\ixTExp_lcl_reg_n_0_[1] ),
        .I3(\ixTExp_lcl_reg_n_0_[0] ),
        .I4(\stateLive_reg[2]_0 [0]),
        .I5(\ixTExp_lcl_reg_n_0_[2] ),
        .O(\liveSetRegVal[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair624" *) 
  LUT5 #(
    .INIT(32'h000000F8)) 
    \liveSetRegVal[7]_i_2 
       (.I0(\ixTExp_lcl_reg_n_0_[1] ),
        .I1(\ixTExp_lcl_reg_n_0_[0] ),
        .I2(\ixTExp_lcl_reg_n_0_[2] ),
        .I3(\liveSetRegVal[7]_i_3_n_0 ),
        .I4(\i_reg[0]__1_n_0 ),
        .O(\liveSetRegVal[7]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair683" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \liveSetRegVal[7]_i_3 
       (.I0(\stateLive_reg[2]_0 [1]),
        .I1(\stateLive_reg[2]_0 [0]),
        .I2(\stateLive_reg[2]_0 [2]),
        .O(\liveSetRegVal[7]_i_3_n_0 ));
  FDCE \liveSetRegVal_reg[0] 
       (.C(aclk_sig),
        .CE(\liveSetRegVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\liveSetRegVal[0]_i_1_n_0 ),
        .Q(\liveSetRegVal_reg_n_0_[0] ));
  FDCE \liveSetRegVal_reg[1] 
       (.C(aclk_sig),
        .CE(\liveSetRegVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\liveSetRegVal[1]_i_1_n_0 ),
        .Q(\liveSetRegVal_reg_n_0_[1] ));
  FDCE \liveSetRegVal_reg[2] 
       (.C(aclk_sig),
        .CE(\liveSetRegVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\liveSetRegVal[2]_i_1_n_0 ),
        .Q(\liveSetRegVal_reg_n_0_[2] ));
  FDCE \liveSetRegVal_reg[3] 
       (.C(aclk_sig),
        .CE(\liveSetRegVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\liveSetRegVal[3]_i_1_n_0 ),
        .Q(\liveSetRegVal_reg_n_0_[3] ));
  FDCE \liveSetRegVal_reg[4] 
       (.C(aclk_sig),
        .CE(\liveSetRegVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\liveSetRegVal[4]_i_1_n_0 ),
        .Q(\liveSetRegVal_reg_n_0_[4] ));
  FDCE \liveSetRegVal_reg[6] 
       (.C(aclk_sig),
        .CE(\liveSetRegVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\liveSetRegVal[6]_i_1_n_0 ),
        .Q(\liveSetRegVal_reg_n_0_[6] ));
  FDCE \liveSetRegVal_reg[7] 
       (.C(aclk_sig),
        .CE(\liveSetRegVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\liveSetRegVal[7]_i_2_n_0 ),
        .Q(\liveSetRegVal_reg_n_0_[7] ));
  LUT6 #(
    .INIT(64'h000000CEAAAAAAAA)) 
    modNotGetSet_i_1
       (.I0(modNotGetSet),
        .I1(reqInvModReg),
        .I2(modNotGetSet_i_2_n_0),
        .I3(reqInvGetReg),
        .I4(reqInvSetReg),
        .I5(modNotGetSet_i_3_n_0),
        .O(modNotGetSet_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair702" *) 
  LUT3 #(
    .INIT(8'h10)) 
    modNotGetSet_i_2
       (.I0(\stateLive_reg[2]_0 [1]),
        .I1(\stateLive_reg[2]_0 [0]),
        .I2(\stateLive_reg[2]_0 [2]),
        .O(modNotGetSet_i_2_n_0));
  LUT6 #(
    .INIT(64'h0000000000010000)) 
    modNotGetSet_i_3
       (.I0(\stateConfig_reg_n_0_[1] ),
        .I1(\stateConfig_reg_n_0_[0] ),
        .I2(\stateConfig_reg_n_0_[2] ),
        .I3(\stateConfig_reg_n_0_[3] ),
        .I4(prepdone),
        .I5(sda_sig_reg),
        .O(modNotGetSet_i_3_n_0));
  FDRE modNotGetSet_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(modNotGetSet_i_1_n_0),
        .Q(modNotGetSet),
        .R(1'b0));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_I2cmaster_v1_0 myI2c
       (.D({myI2c_n_1,myI2c_n_2,myI2c_n_3,myI2c_n_4,myI2c_n_5,myI2c_n_6,myI2c_n_7,myI2c_n_8}),
        .E(myI2c_n_0),
        .Q({\stateConfig_reg_n_0_[3] ,\stateConfig_reg_n_0_[2] ,\stateConfig_reg_n_0_[1] ,\stateConfig_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .i2cReadNotWrite(i2cReadNotWrite),
        .\i2cSend_reg[0] (\i2cSend[7]_i_5_n_0 ),
        .\i2cSend_reg[0]_0 (myParrom_n_9),
        .\i2cSend_reg[1] (myParrom_n_10),
        .\i2cSend_reg[2] (myParrom_n_11),
        .\i2cSend_reg[3] (myParrom_n_12),
        .\i2cSend_reg[4] (myParrom_n_13),
        .\i2cSend_reg[5] (myParrom_n_14),
        .\i2cSend_reg[6] (myParrom_n_15),
        .\i2cSend_reg[7] (D[15:0]),
        .\i2cSend_reg[7]_0 (myParrom_n_16),
        .\recv_sig_reg[7]_0 ({myI2c_n_9,myI2c_n_10,myI2c_n_11,myI2c_n_12,myI2c_n_13,myI2c_n_14,myI2c_n_15,myI2c_n_16}),
        .scl(scl),
        .sda(sda),
        .sda_sig_i_12_0({\i2cSend_reg_n_0_[7] ,\i2cSend_reg_n_0_[6] ,\i2cSend_reg_n_0_[5] ,\i2cSend_reg_n_0_[4] ,\i2cSend_reg_n_0_[3] ,\i2cSend_reg_n_0_[2] ,\i2cSend_reg_n_0_[1] ,\i2cSend_reg_n_0_[0] }),
        .sda_sig_i_16_0({\i2cRegaddr_reg_n_0_[15] ,\i2cRegaddr_reg_n_0_[14] ,\i2cRegaddr_reg_n_0_[13] ,\i2cRegaddr_reg_n_0_[12] ,\i2cRegaddr_reg_n_0_[11] ,\i2cRegaddr_reg_n_0_[10] ,\i2cRegaddr_reg_n_0_[9] ,\i2cRegaddr_reg_n_0_[8] ,\i2cRegaddr_reg_n_0_[7] ,\i2cRegaddr_reg_n_0_[6] ,\i2cRegaddr_reg_n_0_[5] ,\i2cRegaddr_reg_n_0_[4] ,\i2cRegaddr_reg_n_0_[3] ,\i2cRegaddr_reg_n_0_[2] ,\i2cRegaddr_reg_n_0_[1] ,\i2cRegaddr_reg_n_0_[0] }),
        .sda_sig_reg_0(sda_sig_reg),
        .\stateConfig_reg[0] (\stateConfig[3]_i_3_n_0 ),
        .\stateConfig_reg[0]_0 (\j[7]_i_8_n_0 ),
        .\stateConfig_reg[0]_1 (\stateConfig[3]_i_5_n_0 ),
        .\stateConfig_reg[0]_2 (\j[7]_i_7_n_0 ),
        .\stateConfig_reg[0]_3 (\stateConfig[3]_i_6_n_0 ),
        .\stateConfig_reg[0]_4 (k),
        .tkclk(tkclk));
  (* CHECK_LICENSE_TYPE = "Mipirx_xlnx_comb_w4_r1188,bd_7289,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "bd_7289,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Mipirx_xlnx_comb_w4_r1188 myMipirx
       (.clkoutphy_out(NLW_myMipirx_clkoutphy_out_UNCONNECTED),
        .csirxss_csi_irq(NLW_myMipirx_csirxss_csi_irq_UNCONNECTED),
        .csirxss_s_axi_araddr({\corecfgAXIL_araddr_reg_n_0_[12] ,1'b0,1'b0,1'b0,1'b0,\corecfgAXIL_araddr_reg_n_0_[7] ,\corecfgAXIL_araddr_reg_n_0_[6] ,\corecfgAXIL_araddr_reg_n_0_[5] ,\corecfgAXIL_araddr_reg_n_0_[4] ,\corecfgAXIL_araddr_reg_n_0_[3] ,\corecfgAXIL_araddr_reg_n_0_[2] ,1'b0,1'b0}),
        .csirxss_s_axi_arprot({1'b0,1'b0,1'b0}),
        .csirxss_s_axi_arready(corecfgAXIL_arready),
        .csirxss_s_axi_arvalid(csirxss_s_axi_arvalid),
        .csirxss_s_axi_awaddr({\corecfgAXIL_awaddr_reg_n_0_[12] ,1'b0,1'b0,1'b0,1'b0,\corecfgAXIL_awaddr_reg_n_0_[7] ,\corecfgAXIL_awaddr_reg_n_0_[6] ,\corecfgAXIL_awaddr_reg_n_0_[5] ,\corecfgAXIL_awaddr_reg_n_0_[4] ,\corecfgAXIL_awaddr_reg_n_0_[3] ,\corecfgAXIL_awaddr_reg_n_0_[2] ,1'b0,1'b0}),
        .csirxss_s_axi_awprot({1'b0,1'b0,1'b0}),
        .csirxss_s_axi_awready(csirxss_s_axi_awready),
        .csirxss_s_axi_awvalid(csirxss_s_axi_awvalid),
        .csirxss_s_axi_bready(csirxss_s_axi_bready),
        .csirxss_s_axi_bresp(NLW_myMipirx_csirxss_s_axi_bresp_UNCONNECTED[1:0]),
        .csirxss_s_axi_bvalid(corecfgAXIL_bvalid),
        .csirxss_s_axi_rdata(corecfgAXIL_rdata),
        .csirxss_s_axi_rready(csirxss_s_axi_rready),
        .csirxss_s_axi_rresp(NLW_myMipirx_csirxss_s_axi_rresp_UNCONNECTED[1:0]),
        .csirxss_s_axi_rvalid(corecfgAXIL_rvalid),
        .csirxss_s_axi_wdata({\corecfgAXIL_wdata_reg_n_0_[31] ,\corecfgAXIL_wdata_reg_n_0_[30] ,\corecfgAXIL_wdata_reg_n_0_[29] ,\corecfgAXIL_wdata_reg_n_0_[28] ,\corecfgAXIL_wdata_reg_n_0_[27] ,\corecfgAXIL_wdata_reg_n_0_[26] ,\corecfgAXIL_wdata_reg_n_0_[25] ,\corecfgAXIL_wdata_reg_n_0_[24] ,\corecfgAXIL_wdata_reg_n_0_[23] ,\corecfgAXIL_wdata_reg_n_0_[22] ,\corecfgAXIL_wdata_reg_n_0_[21] ,\corecfgAXIL_wdata_reg_n_0_[20] ,\corecfgAXIL_wdata_reg_n_0_[19] ,\corecfgAXIL_wdata_reg_n_0_[18] ,\corecfgAXIL_wdata_reg_n_0_[17] ,\corecfgAXIL_wdata_reg_n_0_[16] ,\corecfgAXIL_wdata_reg_n_0_[15] ,\corecfgAXIL_wdata_reg_n_0_[14] ,\corecfgAXIL_wdata_reg_n_0_[13] ,\corecfgAXIL_wdata_reg_n_0_[12] ,\corecfgAXIL_wdata_reg_n_0_[11] ,\corecfgAXIL_wdata_reg_n_0_[10] ,\corecfgAXIL_wdata_reg_n_0_[9] ,\corecfgAXIL_wdata_reg_n_0_[8] ,\corecfgAXIL_wdata_reg_n_0_[7] ,\corecfgAXIL_wdata_reg_n_0_[6] ,\corecfgAXIL_wdata_reg_n_0_[5] ,\corecfgAXIL_wdata_reg_n_0_[4] ,\corecfgAXIL_wdata_reg_n_0_[3] ,\corecfgAXIL_wdata_reg_n_0_[2] ,\corecfgAXIL_wdata_reg_n_0_[1] ,\corecfgAXIL_wdata_reg_n_0_[0] }),
        .csirxss_s_axi_wready(corecfgAXIL_wready),
        .csirxss_s_axi_wstrb({1'b1,1'b1,1'b1,1'b1}),
        .csirxss_s_axi_wvalid(csirxss_s_axi_wvalid),
        .dphy_clk_200M(aclk_sig),
        .frame_rcvd_pulse_out(NLW_myMipirx_frame_rcvd_pulse_out_UNCONNECTED),
        .lite_aclk(1'b0),
        .lite_aresetn(1'b0),
        .mipi_phy_if_clk_n(csi_clk_n),
        .mipi_phy_if_clk_p(csi_clk_p),
        .mipi_phy_if_data_n(mipi_phy_if_data_n),
        .mipi_phy_if_data_p(mipi_phy_if_data_p),
        .pll_lock_out(NLW_myMipirx_pll_lock_out_UNCONNECTED),
        .rxbyteclkhs(NLW_myMipirx_rxbyteclkhs_UNCONNECTED),
        .system_rst_out(NLW_myMipirx_system_rst_out_UNCONNECTED),
        .video_aclk(1'b0),
        .video_aresetn(video_aresetn),
        .video_out_tdata(video_out_tdata),
        .video_out_tdest(NLW_myMipirx_video_out_tdest_UNCONNECTED[9:0]),
        .video_out_tlast(video_out_tlast),
        .video_out_tready(1'b1),
        .video_out_tuser({NLW_myMipirx_video_out_tuser_UNCONNECTED[95:70],video_out_tuser,NLW_myMipirx_video_out_tuser_UNCONNECTED[63:1],myMipirx_n_177}),
        .video_out_tvalid(video_out_tvalid));
  LUT1 #(
    .INIT(2'h1)) 
    myMipirx_i_1
       (.I0(sda_sig_reg),
        .O(video_aresetn));
  (* SOFT_HLUTNM = "soft_lutpair760" *) 
  LUT3 #(
    .INIT(8'h02)) 
    myMipirx_i_2
       (.I0(\stateCorecfg_reg_n_0_[2] ),
        .I1(\stateCorecfg_reg_n_0_[0] ),
        .I2(\stateCorecfg_reg_n_0_[1] ),
        .O(csirxss_s_axi_awvalid));
  LUT2 #(
    .INIT(4'h2)) 
    myMipirx_i_3
       (.I0(\stateCorecfg_reg_n_0_[2] ),
        .I1(\stateCorecfg_reg_n_0_[1] ),
        .O(csirxss_s_axi_wvalid));
  (* SOFT_HLUTNM = "soft_lutpair760" *) 
  LUT3 #(
    .INIT(8'h40)) 
    myMipirx_i_4
       (.I0(\stateCorecfg_reg_n_0_[0] ),
        .I1(\stateCorecfg_reg_n_0_[2] ),
        .I2(\stateCorecfg_reg_n_0_[1] ),
        .O(csirxss_s_axi_bready));
  (* SOFT_HLUTNM = "soft_lutpair687" *) 
  LUT3 #(
    .INIT(8'h02)) 
    myMipirx_i_5
       (.I0(\stateCorecfg_reg_n_0_[0] ),
        .I1(\stateCorecfg_reg_n_0_[2] ),
        .I2(\stateCorecfg_reg_n_0_[1] ),
        .O(csirxss_s_axi_arvalid));
  (* SOFT_HLUTNM = "soft_lutpair663" *) 
  LUT3 #(
    .INIT(8'h12)) 
    myMipirx_i_6
       (.I0(\stateCorecfg_reg_n_0_[0] ),
        .I1(\stateCorecfg_reg_n_0_[2] ),
        .I2(\stateCorecfg_reg_n_0_[1] ),
        .O(csirxss_s_axi_rready));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Parrom myParrom
       (.D(D[15:8]),
        .DO(DO),
        .E(myParrom_n_8),
        .Q({\aParrom_reg_n_0_[10] ,\aParrom_reg_n_0_[9] ,\aParrom_reg_n_0_[8] ,\aParrom_reg_n_0_[7] ,\aParrom_reg_n_0_[6] ,\aParrom_reg_n_0_[5] ,\aParrom_reg_n_0_[4] ,\aParrom_reg_n_0_[3] ,\aParrom_reg_n_0_[2] ,\aParrom_reg_n_0_[1] ,\aParrom_reg_n_0_[0] }),
        .SR(myParrom_n_40),
        .\aParrom_reg[10] (\aParrom[10]_i_3_n_0 ),
        .\aParrom_reg[10]_0 (\aParrom[10]_i_4_n_0 ),
        .\aParrom_reg[10]_1 (\aParrom[10]_i_6_n_0 ),
        .\aParrom_reg[5] (\aParrom[5]_i_2_n_0 ),
        .\aParrom_reg[6] (\aParrom[8]_i_3_n_0 ),
        .\aParrom_reg[9] (\aParrom[9]_i_2_n_0 ),
        .\aParrom_reg[9]_0 (\aParrom[9]_i_3_n_0 ),
        .ackLiveToConfigSetReg(ackLiveToConfigSetReg),
        .aclk_sig(aclk_sig),
        .\bytecnt_reg[0] (\bytecnt[1]_i_2_n_0 ),
        .\bytecnt_reg[0]_0 (\bytecnt[1]_i_4_n_0 ),
        .i2cReadNotWrite(i2cReadNotWrite),
        .\i2cRegaddr_reg[0] (\i2cRegaddr_reg[0]_0 ),
        .\i2cRegaddr_reg[12] (\i2cRegaddr_reg[12]_0 ),
        .\i2cRegaddr_reg[13] (\i2cRegaddr_reg[13]_0 ),
        .\i2cRegaddr_reg[15] (\i2cRegaddr[15]_i_3_n_0 ),
        .\i2cRegaddr_reg[15]_0 (\i2cRegaddr[15]_i_4_n_0 ),
        .\i2cRegaddr_reg[3] (\i2cRegaddr_reg[3]_0 ),
        .\i2cRegaddr_reg[4] (\i2cRegaddr_reg[4]_0 ),
        .\i2cRegaddr_reg[6] (\i2cRegaddr_reg[6]_0 ),
        .\i2cSend_reg[7] ({\liveSetRegVal_reg_n_0_[7] ,\liveSetRegVal_reg_n_0_[6] ,\liveSetRegVal_reg_n_0_[4] ,\liveSetRegVal_reg_n_0_[3] ,\liveSetRegVal_reg_n_0_[2] ,\liveSetRegVal_reg_n_0_[1] ,\liveSetRegVal_reg_n_0_[0] }),
        .\invbuf_reg[2][0] (myParrom_n_9),
        .\invbuf_reg[2][1] (myParrom_n_10),
        .\invbuf_reg[2][2] (myParrom_n_11),
        .\invbuf_reg[2][3] (myParrom_n_12),
        .\invbuf_reg[2][4] (myParrom_n_13),
        .\invbuf_reg[2][5] (myParrom_n_14),
        .\invbuf_reg[2][6] (myParrom_n_15),
        .\invbuf_reg[2][7] (myParrom_n_16),
        .\j_reg[1] ({\stateConfig_reg_n_0_[3] ,\stateConfig_reg_n_0_[2] ,\stateConfig_reg_n_0_[1] ,\stateConfig_reg_n_0_[0] }),
        .\j_reg[7] (sda_sig_reg),
        .\j_reg[7]_0 (\j[7]_i_4_n_0 ),
        .\j_reg[7]_1 (\j[7]_i_5_n_0 ),
        .\j_reg[7]_2 (\j[7]_i_8_n_0 ),
        .\k[1]_i_4_0 ({\bytecnt_reg_n_0_[2] ,\bytecnt_reg_n_0_[1] ,\bytecnt_reg_n_0_[0] }),
        .\k_reg[1] (\k[1]_i_6_n_0 ),
        .prepdone(prepdone),
        .prepdone_reg(myParrom_n_38),
        .prepdone_reg_0(\bytecnt[1]_i_3_n_0 ),
        .reqInvSetReg(reqInvSetReg),
        .reset_reg(myParrom_n_42),
        .specNotGnr(specNotGnr),
        .specNotGnr_reg(myParrom_n_39),
        .specNotGnr_reg_0(myParrom_n_43),
        .specNotGnr_reg_1(\aParrom[10]_i_5_n_0 ),
        .specNotGnr_reg_2(\bytecnt[2]_i_3_n_0 ),
        .\stateConfig_reg[0] ({myParrom_n_23,myParrom_n_24,myParrom_n_25,myParrom_n_26}),
        .\stateConfig_reg[0]_0 (\stateConfig[0]_i_2_n_0 ),
        .\stateConfig_reg[1] ({myParrom_n_27,myParrom_n_28,myParrom_n_29,myParrom_n_30,myParrom_n_31,myParrom_n_32,myParrom_n_33,myParrom_n_34,myParrom_n_35,myParrom_n_36,myParrom_n_37}),
        .\stateConfig_reg[1]_0 (\stateConfig[1]_i_3_n_0 ),
        .\stateConfig_reg[1]_1 (\j[7]_i_11_n_0 ),
        .\stateConfig_reg[1]_2 (\stateConfig[1]_i_4_n_0 ),
        .\stateConfig_reg[2] (\stateConfig[3]_i_7_n_0 ),
        .\stateConfig_reg[2]_0 (\stateConfig[2]_i_2_n_0 ),
        .\stateConfig_reg[2]_1 (\j[7]_i_7_n_0 ),
        .\stateConfig_reg[3] (myParrom_n_7),
        .\stateConfig_reg[3]_0 ({myParrom_n_17,myParrom_n_18,myParrom_n_19,myParrom_n_20,myParrom_n_21,myParrom_n_22}),
        .\stateConfig_reg[3]_1 (myParrom_n_41));
  FDCE prepdone_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(myParrom_n_39),
        .Q(prepdone));
  LUT6 #(
    .INIT(64'h1F1F1F101F101F1F)) 
    \probe[0]_INST_0 
       (.I0(\probe[0]_INST_0_i_1_n_0 ),
        .I1(\probe[0]_INST_0_i_2_n_0 ),
        .I2(synthNotLive_reg_n_0),
        .I3(\stateLive_reg[2]_0 [2]),
        .I4(\stateLive_reg[2]_0 [1]),
        .I5(\stateLive_reg[2]_0 [0]),
        .O(synthNotLive_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair666" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \probe[0]_INST_0_i_1 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(\stateSynth_reg_n_0_[1] ),
        .O(\probe[0]_INST_0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair629" *) 
  LUT3 #(
    .INIT(8'h54)) 
    \probe[0]_INST_0_i_2 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .O(\probe[0]_INST_0_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r_lcl[0]_i_1 
       (.I0(\r_lcl[5]_i_2_n_0 ),
        .I1(\r_lcl_reg_n_0_[0] ),
        .O(\r_lcl[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800280000)) 
    \r_lcl[10]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\r_lcl_reg_n_0_[10] ),
        .I5(\r_lcl[10]_i_2_n_0 ),
        .O(\r_lcl[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair653" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \r_lcl[10]_i_2 
       (.I0(\r_lcl_reg_n_0_[9] ),
        .I1(\r_lcl_reg_n_0_[8] ),
        .I2(\r_lcl_reg_n_0_[7] ),
        .I3(\r_lcl_reg_n_0_[6] ),
        .I4(\r_lcl[6]_i_2_n_0 ),
        .O(\r_lcl[10]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0028000000000028)) 
    \r_lcl[11]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\r_lcl_reg_n_0_[11] ),
        .I5(\r_lcl[11]_i_2_n_0 ),
        .O(\r_lcl[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \r_lcl[11]_i_2 
       (.I0(\r_lcl_reg_n_0_[10] ),
        .I1(\r_lcl[6]_i_2_n_0 ),
        .I2(\r_lcl_reg_n_0_[6] ),
        .I3(\r_lcl_reg_n_0_[7] ),
        .I4(\r_lcl_reg_n_0_[8] ),
        .I5(\r_lcl_reg_n_0_[9] ),
        .O(\r_lcl[11]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair699" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \r_lcl[1]_i_1 
       (.I0(\r_lcl[5]_i_2_n_0 ),
        .I1(\r_lcl_reg_n_0_[1] ),
        .I2(\r_lcl_reg_n_0_[0] ),
        .O(\r_lcl[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair637" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \r_lcl[2]_i_1 
       (.I0(\r_lcl[5]_i_2_n_0 ),
        .I1(\r_lcl_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[1] ),
        .I3(\r_lcl_reg_n_0_[2] ),
        .O(\r_lcl[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair637" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \r_lcl[3]_i_1 
       (.I0(\r_lcl[5]_i_2_n_0 ),
        .I1(\r_lcl_reg_n_0_[1] ),
        .I2(\r_lcl_reg_n_0_[0] ),
        .I3(\r_lcl_reg_n_0_[2] ),
        .I4(\r_lcl_reg_n_0_[3] ),
        .O(\r_lcl[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \r_lcl[4]_i_1 
       (.I0(\r_lcl[5]_i_2_n_0 ),
        .I1(\r_lcl_reg_n_0_[3] ),
        .I2(\r_lcl_reg_n_0_[2] ),
        .I3(\r_lcl_reg_n_0_[0] ),
        .I4(\r_lcl_reg_n_0_[1] ),
        .I5(\r_lcl_reg_n_0_[4] ),
        .O(\r_lcl[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair699" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \r_lcl[5]_i_1 
       (.I0(\r_lcl[5]_i_2_n_0 ),
        .I1(\r_lcl[5]_i_3_n_0 ),
        .I2(\r_lcl_reg_n_0_[5] ),
        .O(\r_lcl[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1400000014001400)) 
    \r_lcl[5]_i_2 
       (.I0(\stateSynth_reg[2]_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(rng),
        .I4(\r_lcl[11]_i_2_n_0 ),
        .I5(\r_lcl_reg_n_0_[11] ),
        .O(\r_lcl[5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \r_lcl[5]_i_3 
       (.I0(\r_lcl_reg_n_0_[4] ),
        .I1(\r_lcl_reg_n_0_[1] ),
        .I2(\r_lcl_reg_n_0_[0] ),
        .I3(\r_lcl_reg_n_0_[2] ),
        .I4(\r_lcl_reg_n_0_[3] ),
        .O(\r_lcl[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800280000)) 
    \r_lcl[6]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\r_lcl_reg_n_0_[6] ),
        .I5(\r_lcl[6]_i_2_n_0 ),
        .O(\r_lcl[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \r_lcl[6]_i_2 
       (.I0(\r_lcl_reg_n_0_[3] ),
        .I1(\r_lcl_reg_n_0_[2] ),
        .I2(\r_lcl_reg_n_0_[0] ),
        .I3(\r_lcl_reg_n_0_[1] ),
        .I4(\r_lcl_reg_n_0_[4] ),
        .I5(\r_lcl_reg_n_0_[5] ),
        .O(\r_lcl[6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800280000)) 
    \r_lcl[7]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\r_lcl_reg_n_0_[7] ),
        .I5(\r_lcl[7]_i_2_n_0 ),
        .O(\r_lcl[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair713" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \r_lcl[7]_i_2 
       (.I0(\r_lcl[6]_i_2_n_0 ),
        .I1(\r_lcl_reg_n_0_[6] ),
        .O(\r_lcl[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0028000000000028)) 
    \r_lcl[8]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\r_lcl[8]_i_2_n_0 ),
        .I5(\r_lcl_reg_n_0_[8] ),
        .O(\r_lcl[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair713" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    \r_lcl[8]_i_2 
       (.I0(\r_lcl_reg_n_0_[7] ),
        .I1(\r_lcl_reg_n_0_[6] ),
        .I2(\r_lcl[6]_i_2_n_0 ),
        .O(\r_lcl[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0028000000000028)) 
    \r_lcl[9]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\r_lcl[9]_i_2_n_0 ),
        .I5(\r_lcl_reg_n_0_[9] ),
        .O(\r_lcl[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair653" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    \r_lcl[9]_i_2 
       (.I0(\r_lcl[6]_i_2_n_0 ),
        .I1(\r_lcl_reg_n_0_[6] ),
        .I2(\r_lcl_reg_n_0_[7] ),
        .I3(\r_lcl_reg_n_0_[8] ),
        .O(\r_lcl[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[0]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[10]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[11] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[11]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[1]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[2]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[3]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[4]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[5]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[6]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[7]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[8]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \r_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\g0_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\r_lcl[9]_i_1_n_0 ),
        .Q(\r_lcl_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'h0000010001010101)) 
    \regVal[7]_i_1 
       (.I0(\stateConfig_reg_n_0_[2] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[0] ),
        .I3(i2cReadNotWrite),
        .I4(modNotGetSet),
        .I5(\stateConfig_reg_n_0_[3] ),
        .O(\regVal[7]_i_1_n_0 ));
  FDCE \regVal_reg[0] 
       (.C(aclk_sig),
        .CE(\regVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_16),
        .Q(camifGetRegVal[0]));
  FDCE \regVal_reg[1] 
       (.C(aclk_sig),
        .CE(\regVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_15),
        .Q(camifGetRegVal[1]));
  FDCE \regVal_reg[2] 
       (.C(aclk_sig),
        .CE(\regVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_14),
        .Q(\regVal_reg[7]_0 [0]));
  FDCE \regVal_reg[3] 
       (.C(aclk_sig),
        .CE(\regVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_13),
        .Q(camifGetRegVal[3]));
  FDCE \regVal_reg[4] 
       (.C(aclk_sig),
        .CE(\regVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_12),
        .Q(camifGetRegVal[4]));
  FDCE \regVal_reg[5] 
       (.C(aclk_sig),
        .CE(\regVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_11),
        .Q(camifGetRegVal[5]));
  FDCE \regVal_reg[6] 
       (.C(aclk_sig),
        .CE(\regVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_10),
        .Q(camifGetRegVal[6]));
  FDCE \regVal_reg[7] 
       (.C(aclk_sig),
        .CE(\regVal[7]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(myI2c_n_9),
        .Q(\regVal_reg[7]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair767" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \retbuf[0][0]_i_9 
       (.I0(camifGetRegVal[0]),
        .I1(\retbuf[0][0]_i_7 ),
        .I2(camifGetCoreregVal[24]),
        .O(\regVal_reg[0]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair767" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \retbuf[0][1]_i_8 
       (.I0(camifGetRegVal[1]),
        .I1(\retbuf[0][0]_i_7 ),
        .I2(camifGetCoreregVal[25]),
        .O(\regVal_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair766" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \retbuf[0][3]_i_5 
       (.I0(camifGetRegVal[3]),
        .I1(\retbuf[0][0]_i_7 ),
        .I2(camifGetCoreregVal[27]),
        .O(\regVal_reg[3]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair766" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \retbuf[0][4]_i_5 
       (.I0(camifGetRegVal[4]),
        .I1(\retbuf[0][0]_i_7 ),
        .I2(camifGetCoreregVal[28]),
        .O(\regVal_reg[4]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair765" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \retbuf[0][5]_i_5 
       (.I0(camifGetRegVal[5]),
        .I1(\retbuf[0][0]_i_7 ),
        .I2(camifGetCoreregVal[29]),
        .O(\regVal_reg[5]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair765" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \retbuf[0][6]_i_6 
       (.I0(camifGetRegVal[6]),
        .I1(\retbuf[0][0]_i_7 ),
        .I2(camifGetCoreregVal[30]),
        .O(\regVal_reg[6]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair660" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \rowRaw_lcl[0]_i_1 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl_reg_n_0_[0] ),
        .O(\rowRaw_lcl[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00E2E200)) 
    \rowRaw_lcl[10]_i_1 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl[10]_i_2_n_0 ),
        .I4(\rowRaw_lcl_reg[11]_0 [7]),
        .O(\rowRaw_lcl[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair667" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \rowRaw_lcl[10]_i_2 
       (.I0(\rowRaw_lcl_reg[11]_0 [5]),
        .I1(\rowRaw_lcl_reg[11]_0 [3]),
        .I2(\rowRaw_lcl[6]_i_2_n_0 ),
        .I3(\rowRaw_lcl_reg[11]_0 [4]),
        .I4(\rowRaw_lcl_reg[11]_0 [6]),
        .O(\rowRaw_lcl[10]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h07010101)) 
    \rowRaw_lcl[11]_i_1 
       (.I0(\stateLive_reg[2]_0 [0]),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\stateLive_reg[2]_0 [2]),
        .I3(video_out_tlast),
        .I4(video_out_tvalid),
        .O(\rowRaw_lcl[11]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hE20000E2)) 
    \rowRaw_lcl[11]_i_2 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl[11]_i_4_n_0 ),
        .I4(\rowRaw_lcl_reg[11]_0 [8]),
        .O(\rowRaw_lcl[11]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    \rowRaw_lcl[11]_i_3 
       (.I0(\stateLive_reg[2]_0 [0]),
        .I1(\rowRaw_lcl[11]_i_5_n_0 ),
        .I2(\rowRaw_lcl_reg[11]_0 [8]),
        .I3(\rowRaw_lcl_reg[11]_0 [5]),
        .I4(\rowRaw_lcl_reg[11]_0 [7]),
        .I5(\rowRaw_lcl_reg[11]_0 [6]),
        .O(\rowRaw_lcl[11]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \rowRaw_lcl[11]_i_4 
       (.I0(\rowRaw_lcl_reg[11]_0 [7]),
        .I1(\rowRaw_lcl_reg[11]_0 [6]),
        .I2(\rowRaw_lcl_reg[11]_0 [4]),
        .I3(\rowRaw_lcl[6]_i_2_n_0 ),
        .I4(\rowRaw_lcl_reg[11]_0 [3]),
        .I5(\rowRaw_lcl_reg[11]_0 [5]),
        .O(\rowRaw_lcl[11]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFF7)) 
    \rowRaw_lcl[11]_i_5 
       (.I0(\rowRaw_lcl_reg_n_0_[2] ),
        .I1(\rowRaw_lcl_reg[11]_0 [1]),
        .I2(\rowRaw_lcl_reg[11]_0 [0]),
        .I3(\rowRaw_lcl_reg[11]_0 [2]),
        .I4(\rowRaw_lcl[11]_i_6_n_0 ),
        .O(\rowRaw_lcl[11]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair684" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \rowRaw_lcl[11]_i_6 
       (.I0(\rowRaw_lcl_reg_n_0_[1] ),
        .I1(\rowRaw_lcl_reg_n_0_[0] ),
        .I2(\rowRaw_lcl_reg[11]_0 [4]),
        .I3(\rowRaw_lcl_reg[11]_0 [3]),
        .O(\rowRaw_lcl[11]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair660" *) 
  LUT5 #(
    .INIT(32'h00E2E200)) 
    \rowRaw_lcl[1]_i_1 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl_reg_n_0_[0] ),
        .I4(\rowRaw_lcl_reg_n_0_[1] ),
        .O(\rowRaw_lcl[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00E2E200)) 
    \rowRaw_lcl[2]_i_1 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl[2]_i_2_n_0 ),
        .I4(\rowRaw_lcl_reg_n_0_[2] ),
        .O(\rowRaw_lcl[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair763" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \rowRaw_lcl[2]_i_2 
       (.I0(\rowRaw_lcl_reg_n_0_[0] ),
        .I1(\rowRaw_lcl_reg_n_0_[1] ),
        .O(\rowRaw_lcl[2]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00E2E200)) 
    \rowRaw_lcl[3]_i_1 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl[3]_i_2_n_0 ),
        .I4(\rowRaw_lcl_reg[11]_0 [0]),
        .O(\rowRaw_lcl[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair763" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \rowRaw_lcl[3]_i_2 
       (.I0(\rowRaw_lcl_reg_n_0_[1] ),
        .I1(\rowRaw_lcl_reg_n_0_[0] ),
        .I2(\rowRaw_lcl_reg_n_0_[2] ),
        .O(\rowRaw_lcl[3]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00E2E200)) 
    \rowRaw_lcl[4]_i_1 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl[4]_i_2_n_0 ),
        .I4(\rowRaw_lcl_reg[11]_0 [1]),
        .O(\rowRaw_lcl[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair668" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \rowRaw_lcl[4]_i_2 
       (.I0(\rowRaw_lcl_reg_n_0_[2] ),
        .I1(\rowRaw_lcl_reg_n_0_[0] ),
        .I2(\rowRaw_lcl_reg_n_0_[1] ),
        .I3(\rowRaw_lcl_reg[11]_0 [0]),
        .O(\rowRaw_lcl[4]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00E2E200)) 
    \rowRaw_lcl[5]_i_1 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl[5]_i_2_n_0 ),
        .I4(\rowRaw_lcl_reg[11]_0 [2]),
        .O(\rowRaw_lcl[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair668" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \rowRaw_lcl[5]_i_2 
       (.I0(\rowRaw_lcl_reg[11]_0 [0]),
        .I1(\rowRaw_lcl_reg_n_0_[1] ),
        .I2(\rowRaw_lcl_reg_n_0_[0] ),
        .I3(\rowRaw_lcl_reg_n_0_[2] ),
        .I4(\rowRaw_lcl_reg[11]_0 [1]),
        .O(\rowRaw_lcl[5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00E2E200)) 
    \rowRaw_lcl[6]_i_1 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl[6]_i_2_n_0 ),
        .I4(\rowRaw_lcl_reg[11]_0 [3]),
        .O(\rowRaw_lcl[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \rowRaw_lcl[6]_i_2 
       (.I0(\rowRaw_lcl_reg[11]_0 [1]),
        .I1(\rowRaw_lcl_reg_n_0_[2] ),
        .I2(\rowRaw_lcl_reg_n_0_[0] ),
        .I3(\rowRaw_lcl_reg_n_0_[1] ),
        .I4(\rowRaw_lcl_reg[11]_0 [0]),
        .I5(\rowRaw_lcl_reg[11]_0 [2]),
        .O(\rowRaw_lcl[6]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00E2E200)) 
    \rowRaw_lcl[7]_i_1 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl[7]_i_2_n_0 ),
        .I4(\rowRaw_lcl_reg[11]_0 [4]),
        .O(\rowRaw_lcl[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \rowRaw_lcl[7]_i_2 
       (.I0(\rowRaw_lcl_reg[11]_0 [2]),
        .I1(\rowRaw_lcl_reg[11]_0 [0]),
        .I2(\rowRaw_lcl[2]_i_2_n_0 ),
        .I3(\rowRaw_lcl_reg_n_0_[2] ),
        .I4(\rowRaw_lcl_reg[11]_0 [1]),
        .I5(\rowRaw_lcl_reg[11]_0 [3]),
        .O(\rowRaw_lcl[7]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00E2E200)) 
    \rowRaw_lcl[8]_i_1 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl[8]_i_2_n_0 ),
        .I4(\rowRaw_lcl_reg[11]_0 [5]),
        .O(\rowRaw_lcl[8]_i_1_n_0 ));
  LUT3 #(
    .INIT(8'h80)) 
    \rowRaw_lcl[8]_i_2 
       (.I0(\rowRaw_lcl_reg[11]_0 [3]),
        .I1(\rowRaw_lcl[6]_i_2_n_0 ),
        .I2(\rowRaw_lcl_reg[11]_0 [4]),
        .O(\rowRaw_lcl[8]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00E2E200)) 
    \rowRaw_lcl[9]_i_1 
       (.I0(\rowRaw_lcl[11]_i_3_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\i_reg[0]__1_0 ),
        .I3(\rowRaw_lcl[9]_i_2_n_0 ),
        .I4(\rowRaw_lcl_reg[11]_0 [6]),
        .O(\rowRaw_lcl[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair667" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \rowRaw_lcl[9]_i_2 
       (.I0(\rowRaw_lcl_reg[11]_0 [4]),
        .I1(\rowRaw_lcl[6]_i_2_n_0 ),
        .I2(\rowRaw_lcl_reg[11]_0 [3]),
        .I3(\rowRaw_lcl_reg[11]_0 [5]),
        .O(\rowRaw_lcl[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[0]_i_1_n_0 ),
        .Q(\rowRaw_lcl_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[10]_i_1_n_0 ),
        .Q(\rowRaw_lcl_reg[11]_0 [7]));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[11] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[11]_i_2_n_0 ),
        .Q(\rowRaw_lcl_reg[11]_0 [8]));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[1]_i_1_n_0 ),
        .Q(\rowRaw_lcl_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[2]_i_1_n_0 ),
        .Q(\rowRaw_lcl_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[3]_i_1_n_0 ),
        .Q(\rowRaw_lcl_reg[11]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[4]_i_1_n_0 ),
        .Q(\rowRaw_lcl_reg[11]_0 [1]));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[5]_i_1_n_0 ),
        .Q(\rowRaw_lcl_reg[11]_0 [2]));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[6]_i_1_n_0 ),
        .Q(\rowRaw_lcl_reg[11]_0 [3]));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[7]_i_1_n_0 ),
        .Q(\rowRaw_lcl_reg[11]_0 [4]));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[8]_i_1_n_0 ),
        .Q(\rowRaw_lcl_reg[11]_0 [5]));
  FDCE #(
    .INIT(1'b0)) 
    \rowRaw_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\rowRaw_lcl[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowRaw_lcl[9]_i_1_n_0 ),
        .Q(\rowRaw_lcl_reg[11]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair640" *) 
  LUT5 #(
    .INIT(32'h00000020)) 
    \row[0]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\row_reg_n_0_[0] ),
        .O(\row[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000002000200000)) 
    \row[10]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\row_reg[11]_0 [7]),
        .I5(\row[11]_i_7_n_0 ),
        .O(\row[10]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1FFF1F1F1F1F1F1F)) 
    \row[11]_i_1 
       (.I0(\row[11]_i_3_n_0 ),
        .I1(\row_reg[0]_1 ),
        .I2(\stateSynth[2]_i_7_n_0 ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\row[11]_i_5_n_0 ),
        .O(\row[11]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h08808080)) 
    \row[11]_i_2 
       (.I0(\stateSynth[2]_i_7_n_0 ),
        .I1(\row[11]_i_6_n_0 ),
        .I2(\row_reg[11]_0 [8]),
        .I3(\row[11]_i_7_n_0 ),
        .I4(\row_reg[11]_0 [7]),
        .O(\row[11]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair680" *) 
  LUT4 #(
    .INIT(16'hFBFF)) 
    \row[11]_i_3 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\i[7]_i_4_n_0 ),
        .O(\row[11]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair685" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \row[11]_i_5 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\ixTExp_sig[2]_i_3_n_0 ),
        .O(\row[11]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair628" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \row[11]_i_6 
       (.I0(\stateSynth_reg_n_0_[0] ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .O(\row[11]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair669" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \row[11]_i_7 
       (.I0(\row_reg[11]_0 [5]),
        .I1(\row_reg[11]_0 [3]),
        .I2(\row[8]_i_2_n_0 ),
        .I3(\row_reg[11]_0 [4]),
        .I4(\row_reg[11]_0 [6]),
        .O(\row[11]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h0000002000200000)) 
    \row[1]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\row_reg_n_0_[1] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\row[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair679" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \row[2]_i_1 
       (.I0(\row[2]_i_2_n_0 ),
        .I1(\row_reg_n_0_[0] ),
        .I2(\row_reg_n_0_[1] ),
        .I3(\row_reg_n_0_[2] ),
        .O(\row[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair642" *) 
  LUT4 #(
    .INIT(16'h0400)) 
    \row[2]_i_2 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(rng),
        .O(\row[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0880808080808080)) 
    \row[3]_i_1 
       (.I0(\stateSynth[2]_i_7_n_0 ),
        .I1(\row[11]_i_6_n_0 ),
        .I2(\row_reg[11]_0 [0]),
        .I3(\row_reg_n_0_[2] ),
        .I4(\row_reg_n_0_[0] ),
        .I5(\row_reg_n_0_[1] ),
        .O(\row[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000002000200000)) 
    \row[4]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\row_reg[11]_0 [1]),
        .I5(\row[4]_i_2_n_0 ),
        .O(\row[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair670" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \row[4]_i_2 
       (.I0(\row_reg_n_0_[2] ),
        .I1(\row_reg_n_0_[0] ),
        .I2(\row_reg_n_0_[1] ),
        .I3(\row_reg[11]_0 [0]),
        .O(\row[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002000200000)) 
    \row[5]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\row_reg[11]_0 [2]),
        .I5(\row[5]_i_2_n_0 ),
        .O(\row[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair670" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \row[5]_i_2 
       (.I0(\row_reg[11]_0 [0]),
        .I1(\row_reg_n_0_[1] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\row_reg_n_0_[2] ),
        .I4(\row_reg[11]_0 [1]),
        .O(\row[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002000200000)) 
    \row[6]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\row_reg[11]_0 [3]),
        .I5(\row[8]_i_2_n_0 ),
        .O(\row[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h08808080)) 
    \row[7]_i_1 
       (.I0(\stateSynth[2]_i_7_n_0 ),
        .I1(\row[11]_i_6_n_0 ),
        .I2(\row_reg[11]_0 [4]),
        .I3(\row_reg[11]_0 [3]),
        .I4(\row[8]_i_2_n_0 ),
        .O(\row[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0880808080808080)) 
    \row[8]_i_1 
       (.I0(\stateSynth[2]_i_7_n_0 ),
        .I1(\row[11]_i_6_n_0 ),
        .I2(\row_reg[11]_0 [5]),
        .I3(\row_reg[11]_0 [4]),
        .I4(\row[8]_i_2_n_0 ),
        .I5(\row_reg[11]_0 [3]),
        .O(\row[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \row[8]_i_2 
       (.I0(\row_reg[11]_0 [1]),
        .I1(\row_reg_n_0_[2] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\row_reg_n_0_[1] ),
        .I4(\row_reg[11]_0 [0]),
        .I5(\row_reg[11]_0 [2]),
        .O(\row[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002000200000)) 
    \row[9]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\row_reg[11]_0 [6]),
        .I5(\row[9]_i_2_n_0 ),
        .O(\row[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair669" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \row[9]_i_2 
       (.I0(\row_reg[11]_0 [4]),
        .I1(\row[8]_i_2_n_0 ),
        .I2(\row_reg[11]_0 [3]),
        .I3(\row_reg[11]_0 [5]),
        .O(\row[9]_i_2_n_0 ));
  FDCE \row_reg[0] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[0]_i_1_n_0 ),
        .Q(\row_reg_n_0_[0] ));
  FDCE \row_reg[10] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[10]_i_1_n_0 ),
        .Q(\row_reg[11]_0 [7]));
  FDCE \row_reg[11] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[11]_i_2_n_0 ),
        .Q(\row_reg[11]_0 [8]));
  FDCE \row_reg[1] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[1]_i_1_n_0 ),
        .Q(\row_reg_n_0_[1] ));
  FDCE \row_reg[2] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[2]_i_1_n_0 ),
        .Q(\row_reg_n_0_[2] ));
  FDCE \row_reg[3] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[3]_i_1_n_0 ),
        .Q(\row_reg[11]_0 [0]));
  FDCE \row_reg[4] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[4]_i_1_n_0 ),
        .Q(\row_reg[11]_0 [1]));
  FDCE \row_reg[5] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[5]_i_1_n_0 ),
        .Q(\row_reg[11]_0 [2]));
  FDCE \row_reg[6] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[6]_i_1_n_0 ),
        .Q(\row_reg[11]_0 [3]));
  FDCE \row_reg[7] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[7]_i_1_n_0 ),
        .Q(\row_reg[11]_0 [4]));
  FDCE \row_reg[8] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[8]_i_1_n_0 ),
        .Q(\row_reg[11]_0 [5]));
  FDCE \row_reg[9] 
       (.C(aclk_sig),
        .CE(\row[11]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\row[9]_i_1_n_0 ),
        .Q(\row_reg[11]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair642" *) 
  LUT5 #(
    .INIT(32'h00000020)) 
    \rowchk[0]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\rowchk_reg_n_0_[0] ),
        .O(\rowchk[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair641" *) 
  LUT5 #(
    .INIT(32'h00B0F000)) 
    \rowchk[1]_i_1 
       (.I0(\rowchk_reg_n_0_[2] ),
        .I1(\rowchk_reg_n_0_[3] ),
        .I2(\row[2]_i_2_n_0 ),
        .I3(\rowchk_reg_n_0_[1] ),
        .I4(\rowchk_reg_n_0_[0] ),
        .O(\rowchk[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair678" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \rowchk[2]_i_1 
       (.I0(\row[2]_i_2_n_0 ),
        .I1(\rowchk_reg_n_0_[0] ),
        .I2(\rowchk_reg_n_0_[1] ),
        .I3(\rowchk_reg_n_0_[2] ),
        .O(\rowchk[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFF005D0055005500)) 
    \rowchk[3]_i_1 
       (.I0(\stateSynth[2]_i_3_n_0 ),
        .I1(\stateSynth[2]_i_6_n_0 ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\rowchk[3]_i_3_n_0 ),
        .I4(\row[11]_i_5_n_0 ),
        .I5(\rowchk[3]_i_4_n_0 ),
        .O(\rowchk[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair641" *) 
  LUT5 #(
    .INIT(32'h28AA8000)) 
    \rowchk[3]_i_2 
       (.I0(\row[2]_i_2_n_0 ),
        .I1(\rowchk_reg_n_0_[2] ),
        .I2(\rowchk_reg_n_0_[1] ),
        .I3(\rowchk_reg_n_0_[0] ),
        .I4(\rowchk_reg_n_0_[3] ),
        .O(\rowchk[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair704" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \rowchk[3]_i_3 
       (.I0(\stateSynth[2]_i_11_n_0 ),
        .I1(\tixVSynthmode_reg_n_0_[1] ),
        .I2(\tixVSynthmode_reg_n_0_[0] ),
        .O(\rowchk[3]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair643" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \rowchk[3]_i_4 
       (.I0(\stateSynth_reg_n_0_[0] ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(rng),
        .O(\rowchk[3]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \rowchk_reg[0] 
       (.C(aclk_sig),
        .CE(\rowchk[3]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowchk[0]_i_1_n_0 ),
        .Q(\rowchk_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \rowchk_reg[1] 
       (.C(aclk_sig),
        .CE(\rowchk[3]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowchk[1]_i_1_n_0 ),
        .Q(\rowchk_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \rowchk_reg[2] 
       (.C(aclk_sig),
        .CE(\rowchk[3]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowchk[2]_i_1_n_0 ),
        .Q(\rowchk_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \rowchk_reg[3] 
       (.C(aclk_sig),
        .CE(\rowchk[3]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\rowchk[3]_i_2_n_0 ),
        .Q(\rowchk_reg_n_0_[3] ));
  LUT6 #(
    .INIT(64'h0000000000000020)) 
    \rsh[0]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\rsh_reg_n_0_[1] ),
        .I5(\rsh_reg_n_0_[0] ),
        .O(\rsh[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000200000)) 
    \rsh[1]_i_1 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\rsh_reg_n_0_[0] ),
        .I5(\rsh_reg_n_0_[1] ),
        .O(\rsh[1]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \rsh_reg[0] 
       (.C(aclk_sig),
        .CE(bsh),
        .CLR(sda_sig_reg),
        .D(\rsh[0]_i_1_n_0 ),
        .Q(\rsh_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \rsh_reg[1] 
       (.C(aclk_sig),
        .CE(bsh),
        .CLR(sda_sig_reg),
        .D(\rsh[1]_i_1_n_0 ),
        .Q(\rsh_reg_n_0_[1] ));
  FDRE specNotGnr_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(myParrom_n_7),
        .Q(specNotGnr),
        .R(1'b0));
  LUT6 #(
    .INIT(64'h0000000013231322)) 
    \stateConfig[0]_i_2 
       (.I0(\stateConfig_reg_n_0_[3] ),
        .I1(\stateConfig_reg_n_0_[2] ),
        .I2(\stateConfig_reg_n_0_[0] ),
        .I3(\stateConfig_reg_n_0_[1] ),
        .I4(prepdone),
        .I5(\stateConfig[3]_i_9_n_0 ),
        .O(\stateConfig[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h1111111101010100)) 
    \stateConfig[1]_i_3 
       (.I0(\stateConfig_reg_n_0_[1] ),
        .I1(\stateConfig_reg_n_0_[2] ),
        .I2(\stateConfig_reg_n_0_[0] ),
        .I3(i2cReadNotWrite),
        .I4(prepdone),
        .I5(\stateConfig[3]_i_9_n_0 ),
        .O(\stateConfig[1]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \stateConfig[1]_i_4 
       (.I0(\bytecnt_reg_n_0_[0] ),
        .I1(\bytecnt_reg_n_0_[1] ),
        .O(\stateConfig[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h020B0209020B0208)) 
    \stateConfig[2]_i_2 
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[3] ),
        .I3(\stateConfig_reg_n_0_[2] ),
        .I4(\j[7]_i_11_n_0 ),
        .I5(prepdone),
        .O(\stateConfig[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hA008A20AA20AA20A)) 
    \stateConfig[3]_i_3 
       (.I0(\aParrom[9]_i_3_n_0 ),
        .I1(\stateConfig_reg_n_0_[1] ),
        .I2(\stateConfig_reg_n_0_[0] ),
        .I3(tkclk),
        .I4(i2cReadNotWrite_reg_0),
        .I5(prepdone),
        .O(\stateConfig[3]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair691" *) 
  LUT3 #(
    .INIT(8'h2A)) 
    \stateConfig[3]_i_5 
       (.I0(\bytecnt_reg_n_0_[2] ),
        .I1(\bytecnt_reg_n_0_[1] ),
        .I2(\bytecnt_reg_n_0_[0] ),
        .O(\stateConfig[3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAFBBAAAAAAAA)) 
    \stateConfig[3]_i_6 
       (.I0(ackInvGetReg_sig_i_3_n_0),
        .I1(\stateConfig_reg_n_0_[0] ),
        .I2(\stateConfig_reg_n_0_[1] ),
        .I3(tkclk),
        .I4(\stateConfig_reg_n_0_[2] ),
        .I5(\stateConfig_reg_n_0_[3] ),
        .O(\stateConfig[3]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFAAAFAEAE)) 
    \stateConfig[3]_i_7 
       (.I0(\stateConfig[3]_i_9_n_0 ),
        .I1(prepdone),
        .I2(\stateConfig_reg_n_0_[0] ),
        .I3(modNotGetSet),
        .I4(i2cReadNotWrite),
        .I5(\stateConfig_reg_n_0_[1] ),
        .O(\stateConfig[3]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAA8AAAAAAA)) 
    \stateConfig[3]_i_9 
       (.I0(\stateConfig_reg_n_0_[0] ),
        .I1(\k[1]_i_8_n_0 ),
        .I2(\j_reg_n_0_[3] ),
        .I3(\j_reg_n_0_[7] ),
        .I4(\j_reg_n_0_[6] ),
        .I5(\j_reg_n_0_[5] ),
        .O(\stateConfig[3]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateConfig_reg[0] 
       (.C(aclk_sig),
        .CE(myI2c_n_0),
        .CLR(sda_sig_reg),
        .D(myParrom_n_26),
        .Q(\stateConfig_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateConfig_reg[1] 
       (.C(aclk_sig),
        .CE(myI2c_n_0),
        .CLR(sda_sig_reg),
        .D(myParrom_n_25),
        .Q(\stateConfig_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateConfig_reg[2] 
       (.C(aclk_sig),
        .CE(myI2c_n_0),
        .CLR(sda_sig_reg),
        .D(myParrom_n_24),
        .Q(\stateConfig_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateConfig_reg[3] 
       (.C(aclk_sig),
        .CE(myI2c_n_0),
        .CLR(sda_sig_reg),
        .D(myParrom_n_23),
        .Q(\stateConfig_reg_n_0_[3] ));
  LUT6 #(
    .INIT(64'h3333FF743300FF74)) 
    \stateCorecfg[0]_i_1 
       (.I0(corecfgAXIL_wready),
        .I1(\stateCorecfg_reg_n_0_[2] ),
        .I2(reqInvGetCorereg),
        .I3(\stateCorecfg_reg_n_0_[1] ),
        .I4(\stateCorecfg_reg_n_0_[0] ),
        .I5(corecfgAXIL_rvalid),
        .O(\stateCorecfg[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair687" *) 
  LUT4 #(
    .INIT(16'h5FEA)) 
    \stateCorecfg[1]_i_1 
       (.I0(\stateCorecfg_reg_n_0_[0] ),
        .I1(corecfgAXIL_wready),
        .I2(\stateCorecfg_reg_n_0_[2] ),
        .I3(\stateCorecfg_reg_n_0_[1] ),
        .O(\stateCorecfg[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hBBBBBB88B8BBB8BB)) 
    \stateCorecfg[2]_i_1 
       (.I0(\stateCorecfg[2]_i_3_n_0 ),
        .I1(\stateCorecfg_reg_n_0_[2] ),
        .I2(corecfgAXIL_rvalid),
        .I3(\stateCorecfg_reg_n_0_[1] ),
        .I4(corecfgAXIL_arready),
        .I5(\stateCorecfg_reg_n_0_[0] ),
        .O(p_0_out));
  (* SOFT_HLUTNM = "soft_lutpair663" *) 
  LUT5 #(
    .INIT(32'h0FF0FF04)) 
    \stateCorecfg[2]_i_2 
       (.I0(reqInvGetCorereg),
        .I1(reqInvSetCorereg),
        .I2(\stateCorecfg_reg_n_0_[1] ),
        .I3(\stateCorecfg_reg_n_0_[2] ),
        .I4(\stateCorecfg_reg_n_0_[0] ),
        .O(\stateCorecfg[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \stateCorecfg[2]_i_3 
       (.I0(stateCorecfg0),
        .I1(corecfgAXIL_bvalid),
        .I2(\stateCorecfg_reg_n_0_[1] ),
        .I3(corecfgAXIL_wready),
        .I4(\stateCorecfg_reg_n_0_[0] ),
        .I5(csirxss_s_axi_awready),
        .O(\stateCorecfg[2]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateCorecfg_reg[0] 
       (.C(aclk_sig),
        .CE(p_0_out),
        .CLR(sda_sig_reg),
        .D(\stateCorecfg[0]_i_1_n_0 ),
        .Q(\stateCorecfg_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateCorecfg_reg[1] 
       (.C(aclk_sig),
        .CE(p_0_out),
        .CLR(sda_sig_reg),
        .D(\stateCorecfg[1]_i_1_n_0 ),
        .Q(\stateCorecfg_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateCorecfg_reg[2] 
       (.C(aclk_sig),
        .CE(p_0_out),
        .CLR(sda_sig_reg),
        .D(\stateCorecfg[2]_i_2_n_0 ),
        .Q(\stateCorecfg_reg_n_0_[2] ));
  (* SOFT_HLUTNM = "soft_lutpair772" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \stateCorner[1]_i_2 
       (.I0(synthNotLive_reg_0),
        .I1(grayVideoinToManyAXIS_tvalid),
        .O(grayToManyAXIS_tvalid_sig_reg));
  (* SOFT_HLUTNM = "soft_lutpair690" *) 
  LUT4 #(
    .INIT(16'hF4FF)) 
    \stateIgr[1]_i_1 
       (.I0(synthNotLive_reg_0),
        .I1(camifToVideoinAXIS_tvalid),
        .I2(\klm_reg[0]_7 [1]),
        .I3(\klm_reg[0]_7 [0]),
        .O(\stateIgr_reg[1] ));
  LUT6 #(
    .INIT(64'h7777777777747777)) 
    \stateIgr[1]_i_3 
       (.I0(\probe[0]_INST_0_i_2_n_0 ),
        .I1(synthNotLive_reg_n_0),
        .I2(video_out_tlast),
        .I3(\stateLive_reg[2]_0 [0]),
        .I4(\stateLive_reg[2]_0 [1]),
        .I5(\stateLive_reg[2]_0 [2]),
        .O(camifToVideoinAXIS_tlast));
  LUT6 #(
    .INIT(64'h4444444444544444)) 
    \stateLive[0]_i_1 
       (.I0(\stateLive[1]_i_2_n_0 ),
        .I1(\stateLive[0]_i_2_n_0 ),
        .I2(\stateLive_reg[2]_0 [1]),
        .I3(\stateLive_reg[2]_0 [0]),
        .I4(hdrNotFix_reg_n_0),
        .I5(\i_reg[0]__1_0 ),
        .O(\stateLive[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF13101010)) 
    \stateLive[0]_i_2 
       (.I0(\stateLive[1]_i_5_n_0 ),
        .I1(\stateLive_reg[2]_0 [1]),
        .I2(\stateLive_reg[2]_0 [0]),
        .I3(myMipirx_n_177),
        .I4(video_out_tvalid),
        .I5(\stateLive_reg[2]_0 [2]),
        .O(\stateLive[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h4454445444544444)) 
    \stateLive[1]_i_1 
       (.I0(\stateLive[1]_i_2_n_0 ),
        .I1(\stateLive[1]_i_3_n_0 ),
        .I2(\stateLive_reg[2]_0 [1]),
        .I3(\stateLive_reg[2]_0 [0]),
        .I4(\i_reg[0]__1_0 ),
        .I5(hdrNotFix_reg_n_0),
        .O(\stateLive[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFEF)) 
    \stateLive[1]_i_10 
       (.I0(\rowRaw_lcl_reg[11]_0 [0]),
        .I1(\rowRaw_lcl_reg[11]_0 [6]),
        .I2(\stateLive[1]_i_15_n_0 ),
        .I3(\rowRaw_lcl_reg[11]_0 [3]),
        .I4(\rowRaw_lcl_reg[11]_0 [7]),
        .I5(\stateLive[1]_i_16_n_0 ),
        .O(\stateLive[1]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \stateLive[1]_i_15 
       (.I0(\rowRaw_lcl_reg[11]_0 [5]),
        .I1(\rowRaw_lcl_reg[11]_0 [8]),
        .O(\stateLive[1]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair684" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \stateLive[1]_i_16 
       (.I0(\rowRaw_lcl_reg_n_0_[0] ),
        .I1(\rowRaw_lcl_reg_n_0_[1] ),
        .O(\stateLive[1]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \stateLive[1]_i_2 
       (.I0(\i_reg[0]__1_n_0 ),
        .I1(\stateLive_reg[2]_0 [2]),
        .O(\stateLive[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hDFEFBFF7FDFEFB7F)) 
    \stateLive[1]_i_20 
       (.I0(\rowRaw_lcl_reg_n_0_[1] ),
        .I1(\rowRaw_lcl_reg_n_0_[0] ),
        .I2(NRowRaw[2]),
        .I3(NRowRaw[1]),
        .I4(NRowRaw[0]),
        .I5(\rowRaw_lcl_reg_n_0_[2] ),
        .O(\rowRaw_lcl_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair683" *) 
  LUT4 #(
    .INIT(16'hAAEA)) 
    \stateLive[1]_i_3 
       (.I0(\stateLive_reg[2]_0 [2]),
        .I1(\stateLive[1]_i_5_n_0 ),
        .I2(\stateLive_reg[2]_0 [0]),
        .I3(\stateLive_reg[2]_0 [1]),
        .O(\stateLive[1]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h00000040)) 
    \stateLive[1]_i_5 
       (.I0(\rowRaw_lcl_reg[11]_0 [2]),
        .I1(\rowRaw_lcl_reg_n_0_[2] ),
        .I2(\rowRaw_lcl_reg[11]_0 [1]),
        .I3(\rowRaw_lcl_reg[11]_0 [4]),
        .I4(\stateLive[1]_i_10_n_0 ),
        .O(\stateLive[1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h333330003000BBBB)) 
    \stateLive[2]_i_1 
       (.I0(ackLiveToConfigSetReg_reg_n_0),
        .I1(\stateLive_reg[2]_0 [2]),
        .I2(video_out_tlast),
        .I3(video_out_tvalid),
        .I4(\stateLive_reg[2]_0 [0]),
        .I5(\stateLive_reg[2]_0 [1]),
        .O(\stateLive[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair702" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \stateLive[2]_i_2 
       (.I0(\stateLive_reg[2]_0 [1]),
        .I1(\stateLive_reg[2]_0 [0]),
        .I2(\stateLive_reg[2]_0 [2]),
        .O(\stateLive[2]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateLive_reg[0] 
       (.C(aclk_sig),
        .CE(\stateLive[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\stateLive[0]_i_1_n_0 ),
        .Q(\stateLive_reg[2]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateLive_reg[1] 
       (.C(aclk_sig),
        .CE(\stateLive[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\stateLive[1]_i_1_n_0 ),
        .Q(\stateLive_reg[2]_0 [1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateLive_reg[2] 
       (.C(aclk_sig),
        .CE(\stateLive[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\stateLive[2]_i_2_n_0 ),
        .Q(\stateLive_reg[2]_0 [2]));
  FDCE stateOp_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(sda_sig_reg),
        .D(stateOp47_out),
        .Q(stateOp_reg_0));
  LUT6 #(
    .INIT(64'h0100000000000000)) 
    \stateStream[0]_i_3 
       (.I0(\ixTExp_sig_reg[2]_0 ),
        .I1(ixTExp[1]),
        .I2(ixTExp[0]),
        .I3(synthNotLive_reg_0),
        .I4(\stateStream_reg[0]_0 [0]),
        .I5(\stateStream_reg[0]_0 [1]),
        .O(\stateStream_reg[0] ));
  (* SOFT_HLUTNM = "soft_lutpair689" *) 
  LUT4 #(
    .INIT(16'h0002)) 
    \stateStream[1]_i_6 
       (.I0(synthNotLive_reg_0),
        .I1(ixTExp[0]),
        .I2(ixTExp[1]),
        .I3(\ixTExp_sig_reg[2]_0 ),
        .O(synthNotLive_reg_1));
  LUT6 #(
    .INIT(64'hBA00BA00BAFFBA00)) 
    \stateSynth[0]_i_1 
       (.I0(\stateSynth[0]_i_2_n_0 ),
        .I1(\stateSynth[0]_i_3_n_0 ),
        .I2(\stateSynth[1]_i_4_n_0 ),
        .I3(\stateSynth[2]_i_7_n_0 ),
        .I4(rng),
        .I5(\stateSynth[0]_i_4_n_0 ),
        .O(\stateSynth[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0404FF0F04040404)) 
    \stateSynth[0]_i_2 
       (.I0(\i_reg[0]__0_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\stateSynth[0]_i_4_n_0 ),
        .I5(\stateSynth[2]_i_8_n_0 ),
        .O(\stateSynth[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000D000D0D0D0D0)) 
    \stateSynth[0]_i_3 
       (.I0(\stateSynth_reg_n_0_[0] ),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth[0]_i_4_n_0 ),
        .I4(\row_reg[0]_1 ),
        .I5(\i[7]_i_4_n_0 ),
        .O(\stateSynth[0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair770" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateSynth[0]_i_4 
       (.I0(\tixVSynthmode_reg_n_0_[0] ),
        .I1(\bsh[1]_i_3_n_0 ),
        .O(\stateSynth[0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000755530307575)) 
    \stateSynth[1]_i_1 
       (.I0(\stateSynth[2]_i_3_n_0 ),
        .I1(\stateSynth[1]_i_2_n_0 ),
        .I2(\stateSynth[2]_i_7_n_0 ),
        .I3(\stateSynth[2]_i_10_n_0 ),
        .I4(\stateSynth[1]_i_3_n_0 ),
        .I5(\stateSynth[1]_i_4_n_0 ),
        .O(\stateSynth[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hE3E3232023202320)) 
    \stateSynth[1]_i_2 
       (.I0(\i_reg[0]__0_0 ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .I4(\stateSynth[1]_i_3_n_0 ),
        .I5(\ixTExp_sig[2]_i_3_n_0 ),
        .O(\stateSynth[1]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair770" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \stateSynth[1]_i_3 
       (.I0(\tixVSynthmode_reg_n_0_[0] ),
        .I1(\bsh[1]_i_3_n_0 ),
        .O(\stateSynth[1]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair688" *) 
  LUT4 #(
    .INIT(16'h0700)) 
    \stateSynth[1]_i_4 
       (.I0(\ixTExp_sig[2]_i_3_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .O(\stateSynth[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hC8C8F8FAC8C8C8C8)) 
    \stateSynth[2]_i_1 
       (.I0(\stateSynth[2]_i_3_n_0 ),
        .I1(\stateSynth[2]_i_4_n_0 ),
        .I2(\stateSynth[2]_i_5_n_0 ),
        .I3(\stateSynth[2]_i_6_n_0 ),
        .I4(\stateSynth_reg_n_0_[1] ),
        .I5(\stateSynth_reg[2]_0 ),
        .O(\stateSynth[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair680" *) 
  LUT4 #(
    .INIT(16'hA200)) 
    \stateSynth[2]_i_10 
       (.I0(\stateSynth[2]_i_6_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .O(\stateSynth[2]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \stateSynth[2]_i_11 
       (.I0(\tixVSynthmode_reg_n_0_[4] ),
        .I1(\tixVSynthmode_reg_n_0_[3] ),
        .I2(\tixVSynthmode_reg_n_0_[5] ),
        .I3(\tixVSynthmode_reg_n_0_[6] ),
        .I4(\tixVSynthmode_reg_n_0_[2] ),
        .I5(p_0_in0),
        .O(\stateSynth[2]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hBFFDEFF7F7BFFDEF)) 
    \stateSynth[2]_i_19 
       (.I0(\row_reg_n_0_[0] ),
        .I1(\row_reg_n_0_[2] ),
        .I2(NRowRaw[0]),
        .I3(NRowRaw[1]),
        .I4(NRowRaw[2]),
        .I5(\row_reg_n_0_[1] ),
        .O(\row_reg[0]_0 ));
  LUT6 #(
    .INIT(64'h0000220200A022A2)) 
    \stateSynth[2]_i_2 
       (.I0(\stateSynth[2]_i_7_n_0 ),
        .I1(\stateSynth[2]_i_8_n_0 ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\stateSynth[2]_i_9_n_0 ),
        .I5(\stateSynth[2]_i_10_n_0 ),
        .O(\stateSynth[2]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair632" *) 
  LUT4 #(
    .INIT(16'hFFFD)) 
    \stateSynth[2]_i_3 
       (.I0(rng),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .O(\stateSynth[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0FFFD0FFFFFFFFFF)) 
    \stateSynth[2]_i_4 
       (.I0(\ixTExp_sig[2]_i_3_n_0 ),
        .I1(\stateSynth[2]_i_5_n_0 ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(\stateSynth[2]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair704" *) 
  LUT3 #(
    .INIT(8'h4C)) 
    \stateSynth[2]_i_5 
       (.I0(\tixVSynthmode_reg_n_0_[0] ),
        .I1(\stateSynth[2]_i_11_n_0 ),
        .I2(\tixVSynthmode_reg_n_0_[1] ),
        .O(\stateSynth[2]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAA82AAAAAAAAAA82)) 
    \stateSynth[2]_i_6 
       (.I0(\i[7]_i_4_n_0 ),
        .I1(\stateSynth_reg[0]_0 ),
        .I2(\row_reg[11]_0 [7]),
        .I3(\stateSynth_reg[0]_1 ),
        .I4(\row_reg[11]_0 [8]),
        .I5(\stateSynth_reg[0]_2 ),
        .O(\stateSynth[2]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'hAAA8)) 
    \stateSynth[2]_i_7 
       (.I0(rng),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .O(\stateSynth[2]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair676" *) 
  LUT4 #(
    .INIT(16'h808A)) 
    \stateSynth[2]_i_8 
       (.I0(\ixTExp_sig[2]_i_3_n_0 ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg_n_0_[0] ),
        .O(\stateSynth[2]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair645" *) 
  LUT4 #(
    .INIT(16'h000E)) 
    \stateSynth[2]_i_9 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\i_reg[0]__0_0 ),
        .O(\stateSynth[2]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateSynth_reg[0] 
       (.C(aclk_sig),
        .CE(\stateSynth[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\stateSynth[0]_i_1_n_0 ),
        .Q(\stateSynth_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateSynth_reg[1] 
       (.C(aclk_sig),
        .CE(\stateSynth[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\stateSynth[1]_i_1_n_0 ),
        .Q(\stateSynth_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateSynth_reg[2] 
       (.C(aclk_sig),
        .CE(\stateSynth[2]_i_1_n_0 ),
        .CLR(sda_sig_reg),
        .D(\stateSynth[2]_i_2_n_0 ),
        .Q(\stateSynth_reg[2]_0 ));
  FDCE synthNotLive_reg
       (.C(aclk_sig),
        .CE(hdrNotFix48_out),
        .CLR(sda_sig_reg),
        .D(synthNotLive),
        .Q(synthNotLive_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair671" *) 
  LUT4 #(
    .INIT(16'h6FF6)) 
    \tixVState[1]_i_6 
       (.I0(ixTExp[1]),
        .I1(Q[1]),
        .I2(ixTExp[0]),
        .I3(Q[0]),
        .O(\ixTExp_lcl_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair758" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \tixVState[1]_i_7 
       (.I0(\ixTExp_sig_reg_n_0_[2] ),
        .I1(synthNotLive_reg_n_0),
        .I2(liveIxTExp[2]),
        .O(\ixTExp_sig_reg[2]_0 ));
  FDCE \tixVSynthmode_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(\tixVSynthmode_reg[7]_0 [0]),
        .Q(\tixVSynthmode_reg_n_0_[0] ));
  FDCE \tixVSynthmode_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(\tixVSynthmode_reg[7]_0 [1]),
        .Q(\tixVSynthmode_reg_n_0_[1] ));
  FDCE \tixVSynthmode_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(\tixVSynthmode_reg[7]_0 [2]),
        .Q(\tixVSynthmode_reg_n_0_[2] ));
  FDCE \tixVSynthmode_reg[3] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(\tixVSynthmode_reg[7]_0 [3]),
        .Q(\tixVSynthmode_reg_n_0_[3] ));
  FDCE \tixVSynthmode_reg[4] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(\tixVSynthmode_reg[7]_0 [4]),
        .Q(\tixVSynthmode_reg_n_0_[4] ));
  FDCE \tixVSynthmode_reg[5] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(\tixVSynthmode_reg[7]_0 [5]),
        .Q(\tixVSynthmode_reg_n_0_[5] ));
  FDCE \tixVSynthmode_reg[6] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(\tixVSynthmode_reg[7]_0 [6]),
        .Q(\tixVSynthmode_reg_n_0_[6] ));
  FDCE \tixVSynthmode_reg[7] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(sda_sig_reg),
        .D(\tixVSynthmode_reg[7]_0 [7]),
        .Q(p_0_in0));
  LUT6 #(
    .INIT(64'hCCCCFFF400000000)) 
    \toVideoinAXIS_tdata_sig[0]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[12]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[0]_i_2_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[0]_i_3_n_0 ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00E20000)) 
    \toVideoinAXIS_tdata_sig[0]_i_2 
       (.I0(\g0_lcl_reg_n_0_[0] ),
        .I1(\row_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[0] ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00800A80A080AA80)) 
    \toVideoinAXIS_tdata_sig[0]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[0]_i_4_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[6]_i_4_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[0]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair735" *) 
  LUT3 #(
    .INIT(8'hA3)) 
    \toVideoinAXIS_tdata_sig[0]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig_reg[9]_i_8_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[3]_i_6_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[0]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair720" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[0]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[3]_i_7_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[9]_i_9_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \toVideoinAXIS_tdata_sig[10]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[10]_i_2_n_0 ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\blk_reg_n_0_[10] ),
        .I3(whtNotBlk),
        .I4(\wht_reg_n_0_[10] ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \toVideoinAXIS_tdata_sig[10]_i_10 
       (.I0(\g0_lcl_reg_n_0_[3] ),
        .I1(\g0_lcl_reg_n_0_[5] ),
        .I2(gsh[1]),
        .I3(\g0_lcl_reg_n_0_[7] ),
        .I4(gsh[0]),
        .I5(\g0_lcl_reg_n_0_[9] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \toVideoinAXIS_tdata_sig[10]_i_11 
       (.I0(\b_lcl_reg_n_0_[3] ),
        .I1(\b_lcl_reg_n_0_[5] ),
        .I2(\bsh_reg_n_0_[1] ),
        .I3(\b_lcl_reg_n_0_[7] ),
        .I4(\bsh_reg_n_0_[0] ),
        .I5(\b_lcl_reg_n_0_[9] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \toVideoinAXIS_tdata_sig[10]_i_12 
       (.I0(\g0_lcl_reg_n_0_[0] ),
        .I1(\g0_lcl_reg_n_0_[2] ),
        .I2(gsh[1]),
        .I3(\g0_lcl_reg_n_0_[4] ),
        .I4(gsh[0]),
        .I5(\g0_lcl_reg_n_0_[6] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \toVideoinAXIS_tdata_sig[10]_i_13 
       (.I0(\b_lcl_reg_n_0_[0] ),
        .I1(\b_lcl_reg_n_0_[2] ),
        .I2(\bsh_reg_n_0_[1] ),
        .I3(\b_lcl_reg_n_0_[4] ),
        .I4(\bsh_reg_n_0_[0] ),
        .I5(\b_lcl_reg_n_0_[6] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair658" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \toVideoinAXIS_tdata_sig[10]_i_14 
       (.I0(gsh[1]),
        .I1(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair679" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \toVideoinAXIS_tdata_sig[10]_i_15 
       (.I0(\row_reg_n_0_[0] ),
        .I1(\bsh_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair738" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[10]_i_16 
       (.I0(\b_lcl_reg_n_0_[9] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[11] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair743" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[10]_i_17 
       (.I0(\g0_lcl_reg_n_0_[6] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[8] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h4040404000FF0000)) 
    \toVideoinAXIS_tdata_sig[10]_i_18 
       (.I0(\bsh_reg_n_0_[1] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[10] ),
        .I3(\toVideoinAXIS_tdata_sig[23]_i_21_n_0 ),
        .I4(\g0_lcl_reg_n_0_[10] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair742" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[10]_i_19 
       (.I0(\b_lcl_reg_n_0_[6] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[8] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCFCEECCCCCCCC)) 
    \toVideoinAXIS_tdata_sig[10]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[10]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[10]_i_4_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[10]_i_5_n_0 ),
        .I3(\ixTExp_sig_reg_n_0_[1] ),
        .I4(\ixTExp_sig_reg_n_0_[2] ),
        .I5(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair737" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[10]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig_reg[10]_i_6_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig_reg[10]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8E8E82828E828E82)) 
    \toVideoinAXIS_tdata_sig[10]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[22]_i_8_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\g0_lcl_reg_n_0_[10] ),
        .I4(\b_lcl_reg_n_0_[10] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair705" *) 
  LUT3 #(
    .INIT(8'h74)) 
    \toVideoinAXIS_tdata_sig[10]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[10]_i_8_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[10]_i_9_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \toVideoinAXIS_tdata_sig[10]_i_8 
       (.I0(\g0_lcl_reg_n_0_[9] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[11] ),
        .I3(\toVideoinAXIS_tdata_sig[10]_i_14_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[10]_i_15_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[10]_i_16_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFF0F0F0F8F8F8F8)) 
    \toVideoinAXIS_tdata_sig[10]_i_9 
       (.I0(\toVideoinAXIS_tdata_sig[10]_i_17_n_0 ),
        .I1(gsh[1]),
        .I2(\toVideoinAXIS_tdata_sig[10]_i_18_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[10]_i_19_n_0 ),
        .I4(\bsh_reg_n_0_[1] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[10]_i_9_n_0 ));
  LUT5 #(
    .INIT(32'hA2020202)) 
    \toVideoinAXIS_tdata_sig[11]_i_1 
       (.I0(\stateSynth[2]_i_7_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[11]_i_2_n_0 ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(whtNotBlk),
        .I4(\wht_reg_n_0_[11] ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair744" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[11]_i_10 
       (.I0(\g0_lcl_reg_n_0_[4] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[6] ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hFF00B8000000B800)) 
    \toVideoinAXIS_tdata_sig[11]_i_11 
       (.I0(\b_lcl_reg_n_0_[8] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[10] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\bsh_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[11]_i_18_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair739" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[11]_i_12 
       (.I0(\g0_lcl_reg_n_0_[5] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[7] ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair741" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[11]_i_13 
       (.I0(\g0_lcl_reg_n_0_[1] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[3] ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hFF00B8000000B800)) 
    \toVideoinAXIS_tdata_sig[11]_i_14 
       (.I0(\b_lcl_reg_n_0_[5] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[7] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\bsh_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[7]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair739" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[11]_i_15 
       (.I0(\g0_lcl_reg_n_0_[7] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[9] ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h4040404000FF0000)) 
    \toVideoinAXIS_tdata_sig[11]_i_16 
       (.I0(\bsh_reg_n_0_[1] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[11] ),
        .I3(\toVideoinAXIS_tdata_sig[23]_i_21_n_0 ),
        .I4(\g0_lcl_reg_n_0_[11] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair738" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[11]_i_17 
       (.I0(\b_lcl_reg_n_0_[7] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[9] ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair740" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[11]_i_18 
       (.I0(\b_lcl_reg_n_0_[4] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[6] ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FF3AFFFF)) 
    \toVideoinAXIS_tdata_sig[11]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[11]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[11]_i_4_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[11]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair736" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[11]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[11]_i_6_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[11]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair706" *) 
  LUT3 #(
    .INIT(8'h74)) 
    \toVideoinAXIS_tdata_sig[11]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[2]_i_6_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[11]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAEAEAAAAAEAAAEAA)) 
    \toVideoinAXIS_tdata_sig[11]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[23]_i_10_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\g0_lcl_reg_n_0_[11] ),
        .I4(\b_lcl_reg_n_0_[11] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair658" *) 
  LUT5 #(
    .INIT(32'h0000CDEF)) 
    \toVideoinAXIS_tdata_sig[11]_i_6 
       (.I0(gsh[1]),
        .I1(\row_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[11]_i_9_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[11]_i_10_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[11]_i_11_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair659" *) 
  LUT5 #(
    .INIT(32'h0000CDEF)) 
    \toVideoinAXIS_tdata_sig[11]_i_7 
       (.I0(gsh[1]),
        .I1(\row_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[11]_i_12_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[11]_i_13_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[11]_i_14_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFF0F0F0F8F8F8F8)) 
    \toVideoinAXIS_tdata_sig[11]_i_8 
       (.I0(\toVideoinAXIS_tdata_sig[11]_i_15_n_0 ),
        .I1(gsh[1]),
        .I2(\toVideoinAXIS_tdata_sig[11]_i_16_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[11]_i_17_n_0 ),
        .I4(\bsh_reg_n_0_[1] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair743" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[11]_i_9 
       (.I0(\g0_lcl_reg_n_0_[8] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[10] ),
        .O(\toVideoinAXIS_tdata_sig[11]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0FFBA00000000)) 
    \toVideoinAXIS_tdata_sig[12]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[12]_i_2_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[12]_i_3_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[12]_i_4_n_0 ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[12]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00E40000)) 
    \toVideoinAXIS_tdata_sig[12]_i_2 
       (.I0(\row_reg_n_0_[0] ),
        .I1(\r_lcl_reg_n_0_[0] ),
        .I2(\g1_lcl_reg_n_0_[0] ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[12]_i_2_n_0 ));
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[12]_i_3 
       (.I0(\wht_reg_n_0_[0] ),
        .I1(whtNotBlk),
        .I2(\blk_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[12]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0AAA88000A008800)) 
    \toVideoinAXIS_tdata_sig[12]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[18]_i_7_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[18]_i_6_n_0 ),
        .I3(\ixTExp_sig_reg_n_0_[1] ),
        .I4(\ixTExp_sig_reg_n_0_[2] ),
        .I5(\toVideoinAXIS_tdata_sig[18]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[12]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0FFBA00000000)) 
    \toVideoinAXIS_tdata_sig[13]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[13]_i_2_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[13]_i_3_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[13]_i_4_n_0 ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[13]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h44400040)) 
    \toVideoinAXIS_tdata_sig[13]_i_2 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[1] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\g1_lcl_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[13]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair733" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[13]_i_3 
       (.I0(\wht_reg_n_0_[1] ),
        .I1(whtNotBlk),
        .I2(\blk_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[13]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA0800AAAA2820)) 
    \toVideoinAXIS_tdata_sig[13]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[2] ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\toVideoinAXIS_tdata_sig[19]_i_7_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[13]_i_5_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[19]_i_6_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[13]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair649" *) 
  LUT5 #(
    .INIT(32'h010001C0)) 
    \toVideoinAXIS_tdata_sig[13]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[16]_i_6_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[1] ),
        .I2(\ixTExp_sig_reg_n_0_[2] ),
        .I3(\ixTExp_sig_reg_n_0_[0] ),
        .I4(\toVideoinAXIS_tdata_sig[22]_i_9_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[13]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFAE00AE00000000)) 
    \toVideoinAXIS_tdata_sig[14]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_2_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[14]_i_4_n_0 ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\toVideoinAXIS_tdata_sig[14]_i_5_n_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[14]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAABAAAAAAAAAAAAA)) 
    \toVideoinAXIS_tdata_sig[14]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_6_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\ixTExp_sig_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[20]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[14]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair648" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \toVideoinAXIS_tdata_sig[14]_i_3 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFCFF550FFCFF55FF)) 
    \toVideoinAXIS_tdata_sig[14]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[20]_i_6_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[14]_i_7_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[0] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\ixTExp_sig_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[17]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[14]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair733" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[14]_i_5 
       (.I0(\wht_reg_n_0_[2] ),
        .I1(whtNotBlk),
        .I2(\blk_reg_n_0_[2] ),
        .O(\toVideoinAXIS_tdata_sig[14]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA0000CFC0AAAA)) 
    \toVideoinAXIS_tdata_sig[14]_i_6 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_5_n_0 ),
        .I1(\g1_lcl_reg_n_0_[2] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\r_lcl_reg_n_0_[2] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[14]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00FF7F7FFFFF7F7F)) 
    \toVideoinAXIS_tdata_sig[14]_i_7 
       (.I0(\rsh_reg_n_0_[0] ),
        .I1(\rsh_reg_n_0_[1] ),
        .I2(\r_lcl_reg_n_0_[10] ),
        .I3(\toVideoinAXIS_tdata_sig[14]_i_8_n_0 ),
        .I4(\row_reg_n_0_[0] ),
        .I5(\g1_lcl_reg_n_0_[10] ),
        .O(\toVideoinAXIS_tdata_sig[14]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair741" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \toVideoinAXIS_tdata_sig[14]_i_8 
       (.I0(gsh[1]),
        .I1(gsh[0]),
        .O(\toVideoinAXIS_tdata_sig[14]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \toVideoinAXIS_tdata_sig[15]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[15]_i_2_n_0 ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\blk_reg_n_0_[3] ),
        .I3(whtNotBlk),
        .I4(\wht_reg_n_0_[3] ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF55D50000)) 
    \toVideoinAXIS_tdata_sig[15]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[15]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_8_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[15]_i_4_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[15]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFCFF550FFCFF55FF)) 
    \toVideoinAXIS_tdata_sig[15]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[21]_i_7_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_9_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[0] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\ixTExp_sig_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[18]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[15]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA0000CFC0AAAA)) 
    \toVideoinAXIS_tdata_sig[15]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[3]_i_4_n_0 ),
        .I1(\g1_lcl_reg_n_0_[3] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\r_lcl_reg_n_0_[3] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[15]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0FFBA00000000)) 
    \toVideoinAXIS_tdata_sig[16]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[16]_i_2_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[16]_i_3_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[16]_i_4_n_0 ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[16]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h44400040)) 
    \toVideoinAXIS_tdata_sig[16]_i_2 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[4] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\g1_lcl_reg_n_0_[4] ),
        .O(\toVideoinAXIS_tdata_sig[16]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair732" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[16]_i_3 
       (.I0(\wht_reg_n_0_[4] ),
        .I1(whtNotBlk),
        .I2(\blk_reg_n_0_[4] ),
        .O(\toVideoinAXIS_tdata_sig[16]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA0A20AAAA0020)) 
    \toVideoinAXIS_tdata_sig[16]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[22]_i_3_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[16]_i_5_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[22]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[16]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h00011101)) 
    \toVideoinAXIS_tdata_sig[16]_i_5 
       (.I0(\ixTExp_sig_reg_n_0_[2] ),
        .I1(\ixTExp_sig_reg_n_0_[1] ),
        .I2(\toVideoinAXIS_tdata_sig[16]_i_6_n_0 ),
        .I3(\ixTExp_sig_reg_n_0_[0] ),
        .I4(\toVideoinAXIS_tdata_sig[19]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[16]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h00FDFFFDFFFDFFFD)) 
    \toVideoinAXIS_tdata_sig[16]_i_6 
       (.I0(\r_lcl_reg_n_0_[0] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\rsh_reg_n_0_[1] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\g1_lcl_reg_n_0_[0] ),
        .I5(\toVideoinAXIS_tdata_sig[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[16]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hFE0E0000)) 
    \toVideoinAXIS_tdata_sig[17]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[17]_i_2_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[17]_i_3_n_0 ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(\toVideoinAXIS_tdata_sig[17]_i_4_n_0 ),
        .I4(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair723" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \toVideoinAXIS_tdata_sig[17]_i_10 
       (.I0(\r_lcl_reg_n_0_[1] ),
        .I1(\rsh_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[17]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'h30BB3088)) 
    \toVideoinAXIS_tdata_sig[17]_i_11 
       (.I0(\r_lcl_reg_n_0_[0] ),
        .I1(\rsh_reg_n_0_[1] ),
        .I2(\r_lcl_reg_n_0_[2] ),
        .I3(\rsh_reg_n_0_[0] ),
        .I4(\r_lcl_reg_n_0_[4] ),
        .O(\toVideoinAXIS_tdata_sig[17]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'h30BB3088)) 
    \toVideoinAXIS_tdata_sig[17]_i_12 
       (.I0(\g1_lcl_reg_n_0_[0] ),
        .I1(gsh[1]),
        .I2(\g1_lcl_reg_n_0_[2] ),
        .I3(gsh[0]),
        .I4(\g1_lcl_reg_n_0_[4] ),
        .O(\toVideoinAXIS_tdata_sig[17]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hE020FFFFE020E020)) 
    \toVideoinAXIS_tdata_sig[17]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[17]_i_5_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[17]_i_6_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig_reg[17]_i_7_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[23]_i_4_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[17]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[17]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAABAAAAAAAAAAAAA)) 
    \toVideoinAXIS_tdata_sig[17]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[17]_i_9_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[1] ),
        .I4(\ixTExp_sig_reg_n_0_[2] ),
        .I5(\toVideoinAXIS_tdata_sig[23]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[17]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair731" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[17]_i_4 
       (.I0(\wht_reg_n_0_[5] ),
        .I1(whtNotBlk),
        .I2(\blk_reg_n_0_[5] ),
        .O(\toVideoinAXIS_tdata_sig[17]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0400040004FF0400)) 
    \toVideoinAXIS_tdata_sig[17]_i_5 
       (.I0(gsh[0]),
        .I1(\g1_lcl_reg_n_0_[1] ),
        .I2(gsh[1]),
        .I3(\row_reg_n_0_[0] ),
        .I4(\toVideoinAXIS_tdata_sig[17]_i_10_n_0 ),
        .I5(\rsh_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[17]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair686" *) 
  LUT4 #(
    .INIT(16'h0004)) 
    \toVideoinAXIS_tdata_sig[17]_i_6 
       (.I0(\stateSynth_reg_n_0_[0] ),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\ixTExp_sig_reg_n_0_[2] ),
        .I3(\ixTExp_sig_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[17]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair686" *) 
  LUT4 #(
    .INIT(16'h0400)) 
    \toVideoinAXIS_tdata_sig[17]_i_8 
       (.I0(\stateSynth_reg_n_0_[0] ),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\ixTExp_sig_reg_n_0_[2] ),
        .I3(\ixTExp_sig_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[17]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA0000CFC0AAAA)) 
    \toVideoinAXIS_tdata_sig[17]_i_9 
       (.I0(\toVideoinAXIS_tdata_sig[17]_i_4_n_0 ),
        .I1(\g1_lcl_reg_n_0_[5] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\r_lcl_reg_n_0_[5] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[17]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0FFBA00000000)) 
    \toVideoinAXIS_tdata_sig[18]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[18]_i_2_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[18]_i_3_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[18]_i_4_n_0 ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[18]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h44400040)) 
    \toVideoinAXIS_tdata_sig[18]_i_2 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[6] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\g1_lcl_reg_n_0_[6] ),
        .O(\toVideoinAXIS_tdata_sig[18]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair731" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[18]_i_3 
       (.I0(\wht_reg_n_0_[6] ),
        .I1(whtNotBlk),
        .I2(\blk_reg_n_0_[6] ),
        .O(\toVideoinAXIS_tdata_sig[18]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00880AAA00880A00)) 
    \toVideoinAXIS_tdata_sig[18]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[18]_i_5_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[18]_i_6_n_0 ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\ixTExp_sig_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[18]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[18]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair715" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[18]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig_reg[21]_i_11_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig_reg[21]_i_12_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[18]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair714" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[18]_i_6 
       (.I0(\toVideoinAXIS_tdata_sig[21]_i_9_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[21]_i_10_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[18]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair722" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[18]_i_7 
       (.I0(\toVideoinAXIS_tdata_sig_reg[21]_i_13_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[18]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[18]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hB800FFFFB800B800)) 
    \toVideoinAXIS_tdata_sig[18]_i_8 
       (.I0(\r_lcl_reg_n_0_[0] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[2] ),
        .I3(\toVideoinAXIS_tdata_sig[19]_i_9_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[19]_i_10_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[18]_i_9_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[18]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair729" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[18]_i_9 
       (.I0(\g1_lcl_reg_n_0_[0] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[2] ),
        .O(\toVideoinAXIS_tdata_sig[18]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0FFBA00000000)) 
    \toVideoinAXIS_tdata_sig[19]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[19]_i_2_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[19]_i_3_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[19]_i_4_n_0 ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair657" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \toVideoinAXIS_tdata_sig[19]_i_10 
       (.I0(gsh[1]),
        .I1(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[19]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair721" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[19]_i_11 
       (.I0(\g1_lcl_reg_n_0_[1] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[3] ),
        .O(\toVideoinAXIS_tdata_sig[19]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'h44400040)) 
    \toVideoinAXIS_tdata_sig[19]_i_2 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[7] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\g1_lcl_reg_n_0_[7] ),
        .O(\toVideoinAXIS_tdata_sig[19]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair730" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[19]_i_3 
       (.I0(\wht_reg_n_0_[7] ),
        .I1(whtNotBlk),
        .I2(\blk_reg_n_0_[7] ),
        .O(\toVideoinAXIS_tdata_sig[19]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0088AA0A0088000A)) 
    \toVideoinAXIS_tdata_sig[19]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[19]_i_5_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[19]_i_6_n_0 ),
        .I3(\ixTExp_sig_reg_n_0_[1] ),
        .I4(\ixTExp_sig_reg_n_0_[2] ),
        .I5(\toVideoinAXIS_tdata_sig[19]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[19]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair771" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \toVideoinAXIS_tdata_sig[19]_i_5 
       (.I0(\ixTExp_sig_reg_n_0_[0] ),
        .I1(\toVideoinAXIS_tdata_sig[22]_i_9_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[19]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair716" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[19]_i_6 
       (.I0(\toVideoinAXIS_tdata_sig[22]_i_7_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[19]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[19]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair707" *) 
  LUT3 #(
    .INIT(8'hA3)) 
    \toVideoinAXIS_tdata_sig[19]_i_7 
       (.I0(\toVideoinAXIS_tdata_sig[22]_i_10_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[22]_i_6_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[19]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \toVideoinAXIS_tdata_sig[19]_i_8 
       (.I0(\r_lcl_reg_n_0_[1] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[3] ),
        .I3(\toVideoinAXIS_tdata_sig[19]_i_9_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[19]_i_10_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[19]_i_11_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[19]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair655" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \toVideoinAXIS_tdata_sig[19]_i_9 
       (.I0(\row_reg_n_0_[0] ),
        .I1(\rsh_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[19]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \toVideoinAXIS_tdata_sig[1]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[1]_i_2_n_0 ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\blk_reg_n_0_[1] ),
        .I3(whtNotBlk),
        .I4(\wht_reg_n_0_[1] ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFF080000)) 
    \toVideoinAXIS_tdata_sig[1]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[7]_i_6_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[2] ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\toVideoinAXIS_tdata_sig[1]_i_3_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[1]_i_4_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h202020E0232320E0)) 
    \toVideoinAXIS_tdata_sig[1]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[7]_i_5_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[2] ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\toVideoinAXIS_tdata_sig[10]_i_8_n_0 ),
        .I4(\ixTExp_sig_reg_n_0_[0] ),
        .I5(\toVideoinAXIS_tdata_sig[4]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8E8E82828E828E82)) 
    \toVideoinAXIS_tdata_sig[1]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[13]_i_3_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\g0_lcl_reg_n_0_[1] ),
        .I4(\b_lcl_reg_n_0_[1] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0FFBA00000000)) 
    \toVideoinAXIS_tdata_sig[20]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[20]_i_2_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[20]_i_3_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[20]_i_4_n_0 ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[20]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h44400040)) 
    \toVideoinAXIS_tdata_sig[20]_i_2 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[8] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\g1_lcl_reg_n_0_[8] ),
        .O(\toVideoinAXIS_tdata_sig[20]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair730" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[20]_i_3 
       (.I0(\wht_reg_n_0_[8] ),
        .I1(whtNotBlk),
        .I2(\blk_reg_n_0_[8] ),
        .O(\toVideoinAXIS_tdata_sig[20]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h08AA080A08A00800)) 
    \toVideoinAXIS_tdata_sig[20]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[20]_i_5_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[20]_i_6_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[20]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[20]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \toVideoinAXIS_tdata_sig[20]_i_5 
       (.I0(\ixTExp_sig_reg_n_0_[0] ),
        .I1(\toVideoinAXIS_tdata_sig[14]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[20]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair708" *) 
  LUT3 #(
    .INIT(8'hA3)) 
    \toVideoinAXIS_tdata_sig[20]_i_6 
       (.I0(\toVideoinAXIS_tdata_sig[23]_i_9_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[23]_i_7_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[20]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair717" *) 
  LUT3 #(
    .INIT(8'h74)) 
    \toVideoinAXIS_tdata_sig[20]_i_7 
       (.I0(\toVideoinAXIS_tdata_sig[23]_i_8_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig_reg[17]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[20]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0FFBA00000000)) 
    \toVideoinAXIS_tdata_sig[21]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[21]_i_2_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[21]_i_4_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[21]_i_5_n_0 ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \toVideoinAXIS_tdata_sig[21]_i_10 
       (.I0(\r_lcl_reg_n_0_[8] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[10] ),
        .I3(\toVideoinAXIS_tdata_sig[22]_i_15_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[22]_i_16_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[21]_i_14_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair725" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[21]_i_14 
       (.I0(\g1_lcl_reg_n_0_[8] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[10] ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \toVideoinAXIS_tdata_sig[21]_i_15 
       (.I0(\r_lcl_reg_n_0_[5] ),
        .I1(\r_lcl_reg_n_0_[7] ),
        .I2(\rsh_reg_n_0_[1] ),
        .I3(\r_lcl_reg_n_0_[9] ),
        .I4(\rsh_reg_n_0_[0] ),
        .I5(\r_lcl_reg_n_0_[11] ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \toVideoinAXIS_tdata_sig[21]_i_16 
       (.I0(\g1_lcl_reg_n_0_[5] ),
        .I1(\g1_lcl_reg_n_0_[7] ),
        .I2(gsh[1]),
        .I3(\g1_lcl_reg_n_0_[9] ),
        .I4(gsh[0]),
        .I5(\g1_lcl_reg_n_0_[11] ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \toVideoinAXIS_tdata_sig[21]_i_17 
       (.I0(\r_lcl_reg_n_0_[2] ),
        .I1(\r_lcl_reg_n_0_[4] ),
        .I2(\rsh_reg_n_0_[1] ),
        .I3(\r_lcl_reg_n_0_[6] ),
        .I4(\rsh_reg_n_0_[0] ),
        .I5(\r_lcl_reg_n_0_[8] ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \toVideoinAXIS_tdata_sig[21]_i_18 
       (.I0(\g1_lcl_reg_n_0_[2] ),
        .I1(\g1_lcl_reg_n_0_[4] ),
        .I2(gsh[1]),
        .I3(\g1_lcl_reg_n_0_[6] ),
        .I4(gsh[0]),
        .I5(\g1_lcl_reg_n_0_[8] ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_18_n_0 ));
  LUT5 #(
    .INIT(32'h30BB3088)) 
    \toVideoinAXIS_tdata_sig[21]_i_19 
       (.I0(\r_lcl_reg_n_0_[1] ),
        .I1(\rsh_reg_n_0_[1] ),
        .I2(\r_lcl_reg_n_0_[3] ),
        .I3(\rsh_reg_n_0_[0] ),
        .I4(\r_lcl_reg_n_0_[5] ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h44400040)) 
    \toVideoinAXIS_tdata_sig[21]_i_2 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[9] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\g1_lcl_reg_n_0_[9] ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h30BB3088)) 
    \toVideoinAXIS_tdata_sig[21]_i_20 
       (.I0(\g1_lcl_reg_n_0_[1] ),
        .I1(gsh[1]),
        .I2(\g1_lcl_reg_n_0_[3] ),
        .I3(gsh[0]),
        .I4(\g1_lcl_reg_n_0_[5] ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair647" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \toVideoinAXIS_tdata_sig[21]_i_3 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair728" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[21]_i_4 
       (.I0(\wht_reg_n_0_[9] ),
        .I1(whtNotBlk),
        .I2(\blk_reg_n_0_[9] ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h08AA080A08A00800)) 
    \toVideoinAXIS_tdata_sig[21]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_6_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[21]_i_7_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[21]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair714" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \toVideoinAXIS_tdata_sig[21]_i_6 
       (.I0(\ixTExp_sig_reg_n_0_[0] ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_9_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair715" *) 
  LUT3 #(
    .INIT(8'h74)) 
    \toVideoinAXIS_tdata_sig[21]_i_7 
       (.I0(\toVideoinAXIS_tdata_sig[21]_i_10_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig_reg[21]_i_11_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair722" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[21]_i_8 
       (.I0(\toVideoinAXIS_tdata_sig_reg[21]_i_12_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig_reg[21]_i_13_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h00FF7F7FFFFF7F7F)) 
    \toVideoinAXIS_tdata_sig[21]_i_9 
       (.I0(\rsh_reg_n_0_[0] ),
        .I1(\rsh_reg_n_0_[1] ),
        .I2(\r_lcl_reg_n_0_[11] ),
        .I3(\toVideoinAXIS_tdata_sig[14]_i_8_n_0 ),
        .I4(\row_reg_n_0_[0] ),
        .I5(\g1_lcl_reg_n_0_[11] ),
        .O(\toVideoinAXIS_tdata_sig[21]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \toVideoinAXIS_tdata_sig[22]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[22]_i_2_n_0 ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\blk_reg_n_0_[10] ),
        .I3(whtNotBlk),
        .I4(\wht_reg_n_0_[10] ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFF0F0F0F8F8F8F8)) 
    \toVideoinAXIS_tdata_sig[22]_i_10 
       (.I0(\toVideoinAXIS_tdata_sig[22]_i_18_n_0 ),
        .I1(\rsh_reg_n_0_[1] ),
        .I2(\toVideoinAXIS_tdata_sig[22]_i_19_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[22]_i_20_n_0 ),
        .I4(gsh[1]),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[22]_i_11 
       (.I0(\r_lcl_reg_n_0_[3] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[5] ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hFF00B8000000B800)) 
    \toVideoinAXIS_tdata_sig[22]_i_12 
       (.I0(\g1_lcl_reg_n_0_[7] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[9] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(gsh[1]),
        .I5(\toVideoinAXIS_tdata_sig[22]_i_21_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair727" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[22]_i_13 
       (.I0(\r_lcl_reg_n_0_[0] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[2] ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hFF00B8000000B800)) 
    \toVideoinAXIS_tdata_sig[22]_i_14 
       (.I0(\g1_lcl_reg_n_0_[4] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[6] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(gsh[1]),
        .I5(\toVideoinAXIS_tdata_sig[18]_i_9_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair654" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \toVideoinAXIS_tdata_sig[22]_i_15 
       (.I0(\rsh_reg_n_0_[1] ),
        .I1(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair656" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \toVideoinAXIS_tdata_sig[22]_i_16 
       (.I0(\row_reg_n_0_[0] ),
        .I1(gsh[1]),
        .O(\toVideoinAXIS_tdata_sig[22]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair718" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[22]_i_17 
       (.I0(\g1_lcl_reg_n_0_[9] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[11] ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair726" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[22]_i_18 
       (.I0(\r_lcl_reg_n_0_[6] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[8] ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h444444440F000000)) 
    \toVideoinAXIS_tdata_sig[22]_i_19 
       (.I0(\toVideoinAXIS_tdata_sig[23]_i_21_n_0 ),
        .I1(\g1_lcl_reg_n_0_[10] ),
        .I2(\rsh_reg_n_0_[1] ),
        .I3(\rsh_reg_n_0_[0] ),
        .I4(\r_lcl_reg_n_0_[10] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCFCDDCCCCCCCC)) 
    \toVideoinAXIS_tdata_sig[22]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[22]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[22]_i_4_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[22]_i_5_n_0 ),
        .I3(\ixTExp_sig_reg_n_0_[1] ),
        .I4(\ixTExp_sig_reg_n_0_[2] ),
        .I5(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair724" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[22]_i_20 
       (.I0(\g1_lcl_reg_n_0_[6] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[8] ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair721" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[22]_i_21 
       (.I0(\g1_lcl_reg_n_0_[3] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[5] ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_21_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair716" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[22]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[22]_i_6_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[22]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFCA00FF00CA0000)) 
    \toVideoinAXIS_tdata_sig[22]_i_4 
       (.I0(\r_lcl_reg_n_0_[10] ),
        .I1(\g1_lcl_reg_n_0_[10] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\toVideoinAXIS_tdata_sig[22]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair707" *) 
  LUT3 #(
    .INIT(8'h74)) 
    \toVideoinAXIS_tdata_sig[22]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[22]_i_9_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[22]_i_10_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair654" *) 
  LUT5 #(
    .INIT(32'h0000CDEF)) 
    \toVideoinAXIS_tdata_sig[22]_i_6 
       (.I0(\rsh_reg_n_0_[1] ),
        .I1(\row_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[23]_i_17_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[22]_i_11_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[22]_i_12_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair655" *) 
  LUT5 #(
    .INIT(32'h0000F1FD)) 
    \toVideoinAXIS_tdata_sig[22]_i_7 
       (.I0(\toVideoinAXIS_tdata_sig[23]_i_12_n_0 ),
        .I1(\rsh_reg_n_0_[1] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\toVideoinAXIS_tdata_sig[22]_i_13_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[22]_i_14_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair728" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[22]_i_8 
       (.I0(\wht_reg_n_0_[10] ),
        .I1(whtNotBlk),
        .I2(\blk_reg_n_0_[10] ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \toVideoinAXIS_tdata_sig[22]_i_9 
       (.I0(\r_lcl_reg_n_0_[9] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[11] ),
        .I3(\toVideoinAXIS_tdata_sig[22]_i_15_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[22]_i_16_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[22]_i_17_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[22]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair685" *) 
  LUT4 #(
    .INIT(16'h8008)) 
    \toVideoinAXIS_tdata_sig[23]_i_10 
       (.I0(\wht_reg_n_0_[11] ),
        .I1(whtNotBlk),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair726" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[23]_i_11 
       (.I0(\r_lcl_reg_n_0_[8] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[10] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair727" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[23]_i_12 
       (.I0(\r_lcl_reg_n_0_[4] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[6] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hFF00B8000000B800)) 
    \toVideoinAXIS_tdata_sig[23]_i_13 
       (.I0(\g1_lcl_reg_n_0_[8] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[10] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(gsh[1]),
        .I5(\toVideoinAXIS_tdata_sig[23]_i_20_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair719" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[23]_i_14 
       (.I0(\r_lcl_reg_n_0_[5] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[7] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair723" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[23]_i_15 
       (.I0(\r_lcl_reg_n_0_[1] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[3] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hFF00B8000000B800)) 
    \toVideoinAXIS_tdata_sig[23]_i_16 
       (.I0(\g1_lcl_reg_n_0_[5] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[7] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(gsh[1]),
        .I5(\toVideoinAXIS_tdata_sig[19]_i_11_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair719" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[23]_i_17 
       (.I0(\r_lcl_reg_n_0_[7] ),
        .I1(\rsh_reg_n_0_[0] ),
        .I2(\r_lcl_reg_n_0_[9] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h444444440F000000)) 
    \toVideoinAXIS_tdata_sig[23]_i_18 
       (.I0(\toVideoinAXIS_tdata_sig[23]_i_21_n_0 ),
        .I1(\g1_lcl_reg_n_0_[11] ),
        .I2(\rsh_reg_n_0_[1] ),
        .I3(\rsh_reg_n_0_[0] ),
        .I4(\r_lcl_reg_n_0_[11] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair718" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[23]_i_19 
       (.I0(\g1_lcl_reg_n_0_[7] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[9] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hA2020202)) 
    \toVideoinAXIS_tdata_sig[23]_i_2 
       (.I0(\stateSynth[2]_i_7_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[23]_i_3_n_0 ),
        .I2(\stateSynth_reg[2]_0 ),
        .I3(whtNotBlk),
        .I4(\wht_reg_n_0_[11] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair724" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[23]_i_20 
       (.I0(\g1_lcl_reg_n_0_[4] ),
        .I1(gsh[0]),
        .I2(\g1_lcl_reg_n_0_[6] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair725" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \toVideoinAXIS_tdata_sig[23]_i_21 
       (.I0(gsh[1]),
        .I1(gsh[0]),
        .O(\toVideoinAXIS_tdata_sig[23]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FF3AFFFF)) 
    \toVideoinAXIS_tdata_sig[23]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[23]_i_4_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[23]_i_5_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[23]_i_6_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair717" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[23]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[23]_i_7_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[23]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair708" *) 
  LUT3 #(
    .INIT(8'h74)) 
    \toVideoinAXIS_tdata_sig[23]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_7_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[23]_i_9_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAEAEAAAAAEAAAEAA)) 
    \toVideoinAXIS_tdata_sig[23]_i_6 
       (.I0(\toVideoinAXIS_tdata_sig[23]_i_10_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\r_lcl_reg_n_0_[11] ),
        .I4(\g1_lcl_reg_n_0_[11] ),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h0000CDEF)) 
    \toVideoinAXIS_tdata_sig[23]_i_7 
       (.I0(\rsh_reg_n_0_[1] ),
        .I1(\row_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[23]_i_11_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[23]_i_12_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[23]_i_13_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h0000CDEF)) 
    \toVideoinAXIS_tdata_sig[23]_i_8 
       (.I0(\rsh_reg_n_0_[1] ),
        .I1(\row_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[23]_i_14_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[23]_i_15_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[23]_i_16_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFF0F0F0F8F8F8F8)) 
    \toVideoinAXIS_tdata_sig[23]_i_9 
       (.I0(\toVideoinAXIS_tdata_sig[23]_i_17_n_0 ),
        .I1(\rsh_reg_n_0_[1] ),
        .I2(\toVideoinAXIS_tdata_sig[23]_i_18_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[23]_i_19_n_0 ),
        .I4(gsh[1]),
        .I5(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[23]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFFAE00AE00000000)) 
    \toVideoinAXIS_tdata_sig[2]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[2]_i_2_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[2]_i_3_n_0 ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\toVideoinAXIS_tdata_sig[14]_i_5_n_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAABAAAAAAAAAAAAA)) 
    \toVideoinAXIS_tdata_sig[2]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[2]_i_4_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\ixTExp_sig_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[8]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF5FFF5F3C5FFC5F3)) 
    \toVideoinAXIS_tdata_sig[2]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[8]_i_6_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[2]_i_5_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[2]_i_6_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA0000CFC0AAAA)) 
    \toVideoinAXIS_tdata_sig[2]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_5_n_0 ),
        .I1(\b_lcl_reg_n_0_[2] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\g0_lcl_reg_n_0_[2] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[2]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF7F7F7F7F7F707F7)) 
    \toVideoinAXIS_tdata_sig[2]_i_5 
       (.I0(\g0_lcl_reg_n_0_[1] ),
        .I1(\toVideoinAXIS_tdata_sig[2]_i_7_n_0 ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\b_lcl_reg_n_0_[1] ),
        .I4(\bsh_reg_n_0_[1] ),
        .I5(\bsh_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[2]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0FFF7777FFFF7777)) 
    \toVideoinAXIS_tdata_sig[2]_i_6 
       (.I0(\g0_lcl_reg_n_0_[10] ),
        .I1(\toVideoinAXIS_tdata_sig[14]_i_8_n_0 ),
        .I2(\bsh_reg_n_0_[1] ),
        .I3(\bsh_reg_n_0_[0] ),
        .I4(\row_reg_n_0_[0] ),
        .I5(\b_lcl_reg_n_0_[10] ),
        .O(\toVideoinAXIS_tdata_sig[2]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair729" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \toVideoinAXIS_tdata_sig[2]_i_7 
       (.I0(gsh[1]),
        .I1(gsh[0]),
        .O(\toVideoinAXIS_tdata_sig[2]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFAE00AE00000000)) 
    \toVideoinAXIS_tdata_sig[3]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[3]_i_2_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[3]_i_3_n_0 ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\toVideoinAXIS_tdata_sig[3]_i_4_n_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair745" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[3]_i_10 
       (.I0(\b_lcl_reg_n_0_[0] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[2] ),
        .O(\toVideoinAXIS_tdata_sig[3]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hAABAAAAAAAAAAAAA)) 
    \toVideoinAXIS_tdata_sig[3]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[3]_i_5_n_0 ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\ixTExp_sig_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[9]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFAFFFAF3CAFFCAF3)) 
    \toVideoinAXIS_tdata_sig[3]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[9]_i_6_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[3]_i_6_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[3]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[3]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair732" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[3]_i_4 
       (.I0(\wht_reg_n_0_[3] ),
        .I1(whtNotBlk),
        .I2(\blk_reg_n_0_[3] ),
        .O(\toVideoinAXIS_tdata_sig[3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA0000CFC0AAAA)) 
    \toVideoinAXIS_tdata_sig[3]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[3]_i_4_n_0 ),
        .I1(\b_lcl_reg_n_0_[3] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\g0_lcl_reg_n_0_[3] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \toVideoinAXIS_tdata_sig[3]_i_6 
       (.I0(\g0_lcl_reg_n_0_[0] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[2] ),
        .I3(\toVideoinAXIS_tdata_sig[3]_i_8_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[3]_i_9_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[3]_i_10_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[3]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h0FFF7777FFFF7777)) 
    \toVideoinAXIS_tdata_sig[3]_i_7 
       (.I0(\g0_lcl_reg_n_0_[11] ),
        .I1(\toVideoinAXIS_tdata_sig[14]_i_8_n_0 ),
        .I2(\bsh_reg_n_0_[1] ),
        .I3(\bsh_reg_n_0_[0] ),
        .I4(\row_reg_n_0_[0] ),
        .I5(\b_lcl_reg_n_0_[11] ),
        .O(\toVideoinAXIS_tdata_sig[3]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair659" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \toVideoinAXIS_tdata_sig[3]_i_8 
       (.I0(\row_reg_n_0_[0] ),
        .I1(gsh[1]),
        .O(\toVideoinAXIS_tdata_sig[3]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \toVideoinAXIS_tdata_sig[3]_i_9 
       (.I0(\bsh_reg_n_0_[1] ),
        .I1(\row_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[3]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \toVideoinAXIS_tdata_sig[4]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[4]_i_2_n_0 ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\blk_reg_n_0_[4] ),
        .I3(whtNotBlk),
        .I4(\wht_reg_n_0_[4] ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFF080000)) 
    \toVideoinAXIS_tdata_sig[4]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[10]_i_5_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[2] ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\toVideoinAXIS_tdata_sig[4]_i_3_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[4]_i_4_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00AA00CF00AA0003)) 
    \toVideoinAXIS_tdata_sig[4]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[10]_i_3_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[4]_i_5_n_0 ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\ixTExp_sig_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[7]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA0000CFC0AAAA)) 
    \toVideoinAXIS_tdata_sig[4]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[16]_i_3_n_0 ),
        .I1(\b_lcl_reg_n_0_[4] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\g0_lcl_reg_n_0_[4] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF7F7F7F7F7F707F7)) 
    \toVideoinAXIS_tdata_sig[4]_i_5 
       (.I0(\g0_lcl_reg_n_0_[0] ),
        .I1(\toVideoinAXIS_tdata_sig[2]_i_7_n_0 ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\b_lcl_reg_n_0_[0] ),
        .I4(\bsh_reg_n_0_[1] ),
        .I5(\bsh_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \toVideoinAXIS_tdata_sig[5]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[5]_i_2_n_0 ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\blk_reg_n_0_[5] ),
        .I3(whtNotBlk),
        .I4(\wht_reg_n_0_[5] ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hCECCCCCCCEFCCCCC)) 
    \toVideoinAXIS_tdata_sig[5]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[11]_i_4_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[5]_i_3_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[11]_i_3_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0001000)) 
    \toVideoinAXIS_tdata_sig[5]_i_3 
       (.I0(\ixTExp_sig_reg_n_0_[0] ),
        .I1(\toVideoinAXIS_tdata_sig[2]_i_5_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[5]_i_4_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig_reg[8]_i_7_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[5]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[5]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair649" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \toVideoinAXIS_tdata_sig[5]_i_4 
       (.I0(\ixTExp_sig_reg_n_0_[1] ),
        .I1(\ixTExp_sig_reg_n_0_[2] ),
        .O(\toVideoinAXIS_tdata_sig[5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA0000CFC0AAAA)) 
    \toVideoinAXIS_tdata_sig[5]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[17]_i_4_n_0 ),
        .I1(\b_lcl_reg_n_0_[5] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\g0_lcl_reg_n_0_[5] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \toVideoinAXIS_tdata_sig[6]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[6]_i_2_n_0 ),
        .I1(\stateSynth_reg[2]_0 ),
        .I2(\blk_reg_n_0_[6] ),
        .I3(whtNotBlk),
        .I4(\wht_reg_n_0_[6] ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFAAAAAEAA)) 
    \toVideoinAXIS_tdata_sig[6]_i_2 
       (.I0(\toVideoinAXIS_tdata_sig[6]_i_3_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[1] ),
        .I2(\ixTExp_sig_reg_n_0_[2] ),
        .I3(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[6]_i_4_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[6]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000004000004440)) 
    \toVideoinAXIS_tdata_sig[6]_i_3 
       (.I0(\stateSynth_reg_n_0_[0] ),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\toVideoinAXIS_tdata_sig[0]_i_4_n_0 ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\ixTExp_sig_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[0]_i_5_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[6]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair734" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[6]_i_4 
       (.I0(\toVideoinAXIS_tdata_sig[9]_i_10_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[9]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[6]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA0000CFC0AAAA)) 
    \toVideoinAXIS_tdata_sig[6]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[18]_i_3_n_0 ),
        .I1(\b_lcl_reg_n_0_[6] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\g0_lcl_reg_n_0_[6] ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(\stateSynth_reg_n_0_[1] ),
        .O(\toVideoinAXIS_tdata_sig[6]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCFFF400000000)) 
    \toVideoinAXIS_tdata_sig[7]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[19]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[7]_i_2_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[7]_i_3_n_0 ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h44400040)) 
    \toVideoinAXIS_tdata_sig[7]_i_2 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\g0_lcl_reg_n_0_[7] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\b_lcl_reg_n_0_[7] ),
        .O(\toVideoinAXIS_tdata_sig[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h02AA02A0020A0200)) 
    \toVideoinAXIS_tdata_sig[7]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[7]_i_4_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[7]_i_5_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[7]_i_6_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair771" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \toVideoinAXIS_tdata_sig[7]_i_4 
       (.I0(\ixTExp_sig_reg_n_0_[0] ),
        .I1(\toVideoinAXIS_tdata_sig[10]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair737" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[7]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig_reg[10]_i_7_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[7]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[7]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair705" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[7]_i_6 
       (.I0(\toVideoinAXIS_tdata_sig[10]_i_9_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig_reg[10]_i_6_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hB800FFFFB800B800)) 
    \toVideoinAXIS_tdata_sig[7]_i_7 
       (.I0(\g0_lcl_reg_n_0_[1] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[3] ),
        .I3(\toVideoinAXIS_tdata_sig[3]_i_8_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[3]_i_9_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[7]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[7]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair740" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[7]_i_8 
       (.I0(\b_lcl_reg_n_0_[1] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[3] ),
        .O(\toVideoinAXIS_tdata_sig[7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCFFF400000000)) 
    \toVideoinAXIS_tdata_sig[8]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[20]_i_3_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[8]_i_2_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[8]_i_3_n_0 ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[8]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h44400040)) 
    \toVideoinAXIS_tdata_sig[8]_i_2 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\g0_lcl_reg_n_0_[8] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\b_lcl_reg_n_0_[8] ),
        .O(\toVideoinAXIS_tdata_sig[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h02AA02A0020A0200)) 
    \toVideoinAXIS_tdata_sig[8]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[8]_i_4_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[8]_i_5_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[8]_i_6_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[8]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair759" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \toVideoinAXIS_tdata_sig[8]_i_4 
       (.I0(\ixTExp_sig_reg_n_0_[0] ),
        .I1(\toVideoinAXIS_tdata_sig[2]_i_6_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[8]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair736" *) 
  LUT3 #(
    .INIT(8'h74)) 
    \toVideoinAXIS_tdata_sig[8]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[11]_i_7_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig_reg[8]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[8]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair706" *) 
  LUT3 #(
    .INIT(8'hA3)) 
    \toVideoinAXIS_tdata_sig[8]_i_6 
       (.I0(\toVideoinAXIS_tdata_sig[11]_i_8_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[11]_i_6_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[0] ),
        .O(\toVideoinAXIS_tdata_sig[8]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h30BB3088)) 
    \toVideoinAXIS_tdata_sig[8]_i_8 
       (.I0(\g0_lcl_reg_n_0_[0] ),
        .I1(gsh[1]),
        .I2(\g0_lcl_reg_n_0_[2] ),
        .I3(gsh[0]),
        .I4(\g0_lcl_reg_n_0_[4] ),
        .O(\toVideoinAXIS_tdata_sig[8]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h30BB3088)) 
    \toVideoinAXIS_tdata_sig[8]_i_9 
       (.I0(\b_lcl_reg_n_0_[0] ),
        .I1(\bsh_reg_n_0_[1] ),
        .I2(\b_lcl_reg_n_0_[2] ),
        .I3(\bsh_reg_n_0_[0] ),
        .I4(\b_lcl_reg_n_0_[4] ),
        .O(\toVideoinAXIS_tdata_sig[8]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCFFF400000000)) 
    \toVideoinAXIS_tdata_sig[9]_i_1 
       (.I0(\toVideoinAXIS_tdata_sig[21]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_4_n_0 ),
        .I2(\toVideoinAXIS_tdata_sig[9]_i_2_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[9]_i_3_n_0 ),
        .I4(\stateSynth_reg[2]_0 ),
        .I5(\stateSynth[2]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair656" *) 
  LUT5 #(
    .INIT(32'h0000CDEF)) 
    \toVideoinAXIS_tdata_sig[9]_i_10 
       (.I0(gsh[1]),
        .I1(\row_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[9]_i_16_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[11]_i_12_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[9]_i_17_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair744" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[9]_i_11 
       (.I0(\g0_lcl_reg_n_0_[2] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[4] ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hFF00B8000000B800)) 
    \toVideoinAXIS_tdata_sig[9]_i_12 
       (.I0(\b_lcl_reg_n_0_[6] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[8] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\bsh_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[9]_i_18_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'h30BB3088)) 
    \toVideoinAXIS_tdata_sig[9]_i_13 
       (.I0(\g0_lcl_reg_n_0_[1] ),
        .I1(gsh[1]),
        .I2(\g0_lcl_reg_n_0_[3] ),
        .I3(gsh[0]),
        .I4(\g0_lcl_reg_n_0_[5] ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_13_n_0 ));
  LUT5 #(
    .INIT(32'h30BB3088)) 
    \toVideoinAXIS_tdata_sig[9]_i_14 
       (.I0(\b_lcl_reg_n_0_[1] ),
        .I1(\bsh_reg_n_0_[1] ),
        .I2(\b_lcl_reg_n_0_[3] ),
        .I3(\bsh_reg_n_0_[0] ),
        .I4(\b_lcl_reg_n_0_[5] ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair742" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[9]_i_15 
       (.I0(\b_lcl_reg_n_0_[8] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[10] ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[9]_i_16 
       (.I0(\g0_lcl_reg_n_0_[9] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[11] ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'hFF00B8000000B800)) 
    \toVideoinAXIS_tdata_sig[9]_i_17 
       (.I0(\b_lcl_reg_n_0_[9] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[11] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\bsh_reg_n_0_[1] ),
        .I5(\toVideoinAXIS_tdata_sig[9]_i_19_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair745" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[9]_i_18 
       (.I0(\b_lcl_reg_n_0_[2] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[4] ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair698" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[9]_i_19 
       (.I0(\b_lcl_reg_n_0_[5] ),
        .I1(\bsh_reg_n_0_[0] ),
        .I2(\b_lcl_reg_n_0_[7] ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h44400040)) 
    \toVideoinAXIS_tdata_sig[9]_i_2 
       (.I0(\stateSynth_reg_n_0_[1] ),
        .I1(\stateSynth_reg_n_0_[0] ),
        .I2(\g0_lcl_reg_n_0_[9] ),
        .I3(\row_reg_n_0_[0] ),
        .I4(\b_lcl_reg_n_0_[9] ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h020A020002AA02A0)) 
    \toVideoinAXIS_tdata_sig[9]_i_3 
       (.I0(\toVideoinAXIS_tdata_sig[14]_i_3_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[9]_i_4_n_0 ),
        .I2(\ixTExp_sig_reg_n_0_[1] ),
        .I3(\ixTExp_sig_reg_n_0_[2] ),
        .I4(\toVideoinAXIS_tdata_sig[9]_i_5_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[9]_i_6_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair720" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \toVideoinAXIS_tdata_sig[9]_i_4 
       (.I0(\ixTExp_sig_reg_n_0_[0] ),
        .I1(\toVideoinAXIS_tdata_sig[3]_i_7_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair735" *) 
  LUT3 #(
    .INIT(8'h74)) 
    \toVideoinAXIS_tdata_sig[9]_i_5 
       (.I0(\toVideoinAXIS_tdata_sig[9]_i_7_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig_reg[9]_i_8_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair734" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \toVideoinAXIS_tdata_sig[9]_i_6 
       (.I0(\toVideoinAXIS_tdata_sig[9]_i_9_n_0 ),
        .I1(\ixTExp_sig_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[9]_i_10_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair657" *) 
  LUT5 #(
    .INIT(32'h0000CDEF)) 
    \toVideoinAXIS_tdata_sig[9]_i_7 
       (.I0(gsh[1]),
        .I1(\row_reg_n_0_[0] ),
        .I2(\toVideoinAXIS_tdata_sig[10]_i_17_n_0 ),
        .I3(\toVideoinAXIS_tdata_sig[9]_i_11_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[9]_i_12_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \toVideoinAXIS_tdata_sig[9]_i_9 
       (.I0(\g0_lcl_reg_n_0_[8] ),
        .I1(gsh[0]),
        .I2(\g0_lcl_reg_n_0_[10] ),
        .I3(\toVideoinAXIS_tdata_sig[10]_i_14_n_0 ),
        .I4(\toVideoinAXIS_tdata_sig[10]_i_15_n_0 ),
        .I5(\toVideoinAXIS_tdata_sig[9]_i_15_n_0 ),
        .O(\toVideoinAXIS_tdata_sig[9]_i_9_n_0 ));
  FDCE \toVideoinAXIS_tdata_sig_reg[0] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[0]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[0] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[10] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[10]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[10] ));
  MUXF7 \toVideoinAXIS_tdata_sig_reg[10]_i_6 
       (.I0(\toVideoinAXIS_tdata_sig[10]_i_10_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[10]_i_11_n_0 ),
        .O(\toVideoinAXIS_tdata_sig_reg[10]_i_6_n_0 ),
        .S(\row_reg_n_0_[0] ));
  MUXF7 \toVideoinAXIS_tdata_sig_reg[10]_i_7 
       (.I0(\toVideoinAXIS_tdata_sig[10]_i_12_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[10]_i_13_n_0 ),
        .O(\toVideoinAXIS_tdata_sig_reg[10]_i_7_n_0 ),
        .S(\row_reg_n_0_[0] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[11] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[11]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[11] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[12] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[12]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[12] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[13] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[13]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[13] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[14] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[14]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[14] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[15] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[15]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[15] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[16] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[16]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[16] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[17] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[17]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[17] ));
  MUXF7 \toVideoinAXIS_tdata_sig_reg[17]_i_7 
       (.I0(\toVideoinAXIS_tdata_sig[17]_i_11_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[17]_i_12_n_0 ),
        .O(\toVideoinAXIS_tdata_sig_reg[17]_i_7_n_0 ),
        .S(\row_reg_n_0_[0] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[18] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[18]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[18] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[19] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[19]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[19] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[1] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[1]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[1] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[20] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[20]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[20] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[21] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[21]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[21] ));
  MUXF7 \toVideoinAXIS_tdata_sig_reg[21]_i_11 
       (.I0(\toVideoinAXIS_tdata_sig[21]_i_15_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_16_n_0 ),
        .O(\toVideoinAXIS_tdata_sig_reg[21]_i_11_n_0 ),
        .S(\row_reg_n_0_[0] ));
  MUXF7 \toVideoinAXIS_tdata_sig_reg[21]_i_12 
       (.I0(\toVideoinAXIS_tdata_sig[21]_i_17_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_18_n_0 ),
        .O(\toVideoinAXIS_tdata_sig_reg[21]_i_12_n_0 ),
        .S(\row_reg_n_0_[0] ));
  MUXF7 \toVideoinAXIS_tdata_sig_reg[21]_i_13 
       (.I0(\toVideoinAXIS_tdata_sig[21]_i_19_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[21]_i_20_n_0 ),
        .O(\toVideoinAXIS_tdata_sig_reg[21]_i_13_n_0 ),
        .S(\row_reg_n_0_[0] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[22] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[22]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[22] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[23] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[23]_i_2_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[23] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[2] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[2]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[2] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[3] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[3]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[3] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[4] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[4]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[4] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[5] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[5]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[5] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[6] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[6]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[6] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[7] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[7]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[7] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[8] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[8]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[8] ));
  MUXF7 \toVideoinAXIS_tdata_sig_reg[8]_i_7 
       (.I0(\toVideoinAXIS_tdata_sig[8]_i_8_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[8]_i_9_n_0 ),
        .O(\toVideoinAXIS_tdata_sig_reg[8]_i_7_n_0 ),
        .S(\row_reg_n_0_[0] ));
  FDCE \toVideoinAXIS_tdata_sig_reg[9] 
       (.C(aclk_sig),
        .CE(\toVideoinAXIS_tdata_sig_reg[23]_0 ),
        .CLR(sda_sig_reg),
        .D(\toVideoinAXIS_tdata_sig[9]_i_1_n_0 ),
        .Q(\toVideoinAXIS_tdata_sig_reg_n_0_[9] ));
  MUXF7 \toVideoinAXIS_tdata_sig_reg[9]_i_8 
       (.I0(\toVideoinAXIS_tdata_sig[9]_i_13_n_0 ),
        .I1(\toVideoinAXIS_tdata_sig[9]_i_14_n_0 ),
        .O(\toVideoinAXIS_tdata_sig_reg[9]_i_8_n_0 ),
        .S(\row_reg_n_0_[0] ));
  (* SOFT_HLUTNM = "soft_lutpair664" *) 
  LUT5 #(
    .INIT(32'hA8A800A8)) 
    toVideoinAXIS_tvalid_sig_i_1
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(toVideoinAXIS_tvalid_sig),
        .O(toVideoinAXIS_tvalid_sig_i_1_n_0));
  FDCE toVideoinAXIS_tvalid_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(toVideoinAXIS_tvalid_sig_i_1_n_0),
        .Q(toVideoinAXIS_tvalid_sig));
  LUT4 #(
    .INIT(16'h4F80)) 
    whtNotBlk0_i_1
       (.I0(\blk[10]_i_5_n_0 ),
        .I1(\row[2]_i_2_n_0 ),
        .I2(\rowchk[3]_i_1_n_0 ),
        .I3(whtNotBlk0_reg_n_0),
        .O(whtNotBlk0_i_1_n_0));
  FDCE whtNotBlk0_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(whtNotBlk0_i_1_n_0),
        .Q(whtNotBlk0_reg_n_0));
  LUT6 #(
    .INIT(64'hAFAAAFAFB0BBB0B0)) 
    whtNotBlk_i_1
       (.I0(whtNotBlk0),
        .I1(\colchk[3]_i_4_n_0 ),
        .I2(\rowchk[3]_i_1_n_0 ),
        .I3(whtNotBlk_i_3_n_0),
        .I4(\colchk[3]_i_3_n_0 ),
        .I5(whtNotBlk),
        .O(whtNotBlk_i_1_n_0));
  LUT6 #(
    .INIT(64'hFBFF040000000000)) 
    whtNotBlk_i_2
       (.I0(\rowchk_reg_n_0_[2] ),
        .I1(\rowchk_reg_n_0_[3] ),
        .I2(\rowchk_reg_n_0_[1] ),
        .I3(\rowchk_reg_n_0_[0] ),
        .I4(whtNotBlk0_reg_n_0),
        .I5(\row[2]_i_2_n_0 ),
        .O(whtNotBlk0));
  (* SOFT_HLUTNM = "soft_lutpair681" *) 
  LUT4 #(
    .INIT(16'hFFF7)) 
    whtNotBlk_i_3
       (.I0(colchk[3]),
        .I1(colchk[0]),
        .I2(colchk[2]),
        .I3(colchk[1]),
        .O(whtNotBlk_i_3_n_0));
  FDCE whtNotBlk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(whtNotBlk_i_1_n_0),
        .Q(whtNotBlk));
  (* SOFT_HLUTNM = "soft_lutpair697" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \wht[0]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(\wht_reg_n_0_[1] ),
        .I2(blk1_out[10]),
        .O(\wht[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAA8AAAAAAAAAA)) 
    \wht[10]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(\blk_reg_n_0_[0] ),
        .I2(\stateSynth_reg_n_0_[1] ),
        .I3(\stateSynth_reg[2]_0 ),
        .I4(\stateSynth_reg_n_0_[0] ),
        .I5(rng),
        .O(\wht[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair676" *) 
  LUT4 #(
    .INIT(16'hFF57)) 
    \wht[10]_i_2 
       (.I0(rng),
        .I1(\stateSynth_reg_n_0_[1] ),
        .I2(\stateSynth_reg_n_0_[0] ),
        .I3(\ixTExp_sig[2]_i_3_n_0 ),
        .O(\wht[10]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hBBBBBBBF88888880)) 
    \wht[11]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(wht),
        .I2(\blk_reg_n_0_[0] ),
        .I3(\blk[10]_i_6_n_0 ),
        .I4(\blk[10]_i_4_n_0 ),
        .I5(\wht_reg_n_0_[11] ),
        .O(\wht[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair697" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \wht[1]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(\wht_reg_n_0_[2] ),
        .I2(blk1_out[10]),
        .O(\wht[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair696" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \wht[2]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(\wht_reg_n_0_[3] ),
        .I2(blk1_out[10]),
        .O(\wht[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair696" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \wht[3]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(\wht_reg_n_0_[4] ),
        .I2(blk1_out[10]),
        .O(\wht[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair695" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \wht[4]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(\wht_reg_n_0_[5] ),
        .I2(blk1_out[10]),
        .O(\wht[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair695" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \wht[5]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(\wht_reg_n_0_[6] ),
        .I2(blk1_out[10]),
        .O(\wht[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair694" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \wht[6]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(\wht_reg_n_0_[7] ),
        .I2(blk1_out[10]),
        .O(\wht[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair694" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \wht[7]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(\wht_reg_n_0_[8] ),
        .I2(blk1_out[10]),
        .O(\wht[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair693" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \wht[8]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(\wht_reg_n_0_[9] ),
        .I2(blk1_out[10]),
        .O(\wht[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair693" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \wht[9]_i_1 
       (.I0(\wht[10]_i_2_n_0 ),
        .I1(\wht_reg_n_0_[10] ),
        .I2(blk1_out[10]),
        .O(\wht[9]_i_1_n_0 ));
  FDCE \wht_reg[0] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(\wht[0]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[0] ));
  FDCE \wht_reg[10] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(\wht[10]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[10] ));
  FDCE \wht_reg[11] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg),
        .D(\wht[11]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[11] ));
  FDCE \wht_reg[1] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(\wht[1]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[1] ));
  FDCE \wht_reg[2] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(\wht[2]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[2] ));
  FDCE \wht_reg[3] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(\wht[3]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[3] ));
  FDCE \wht_reg[4] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(\wht[4]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[4] ));
  FDCE \wht_reg[5] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(\wht[5]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[5] ));
  FDCE \wht_reg[6] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(\wht[6]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[6] ));
  FDCE \wht_reg[7] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(\wht[7]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[7] ));
  FDCE \wht_reg[8] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(\wht[8]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[8] ));
  FDCE \wht_reg[9] 
       (.C(aclk_sig),
        .CE(wht),
        .CLR(sda_sig_reg),
        .D(\wht[9]_i_1_n_0 ),
        .Q(\wht_reg_n_0_[9] ));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Corner
   (doutb,
    ackInvCornerSet,
    ackInvCornerUnlock,
    ackInvCornerAcquire,
    ackInvCornerConfig,
    rng_reg_0,
    rng_reg_1,
    Q,
    \col_lcl_reg[10]_0 ,
    D,
    \tixVState_reg[1]_0 ,
    \stateOp_reg[1]_0 ,
    \tixVState_reg[1]_1 ,
    \row_lcl_reg[1]_0 ,
    \FSM_onehot_stateCoobufB_reg[5]_0 ,
    \tkst_reg[31]_0 ,
    \scoreMin_reg[7]_0 ,
    \scoreMax_reg[7]_0 ,
    ackCoobufCornerToHostif,
    aclk_sig,
    E,
    ackInvSet_sig,
    linNotLog_reg_0,
    ackInvUnlock_sig0_in,
    hdrNotFix,
    rng_reg_2,
    grayVideoinToManyAXIS_tdata,
    \aImdbufB_reg[0]_0 ,
    \tkst_reg[0]_0 ,
    enCoobuf_reg_0,
    \capt_reg[2] ,
    \capt_reg[1] ,
    \stateOp_reg[0]_0 ,
    vsync_last_reg_0,
    \tixVState_reg[1]_2 ,
    \stateCorner_reg[1]_0 ,
    grayVideoinToManyAXIS_tlast,
    grayVideoinToManyAXIS_tvalid,
    \col_lcl_reg[0]__0_0 ,
    NColRaw,
    \col_lcl[10]__0_i_3_0 ,
    \col_lcl[10]__0_i_5_0 ,
    \col_lcl[10]__0_i_3_1 ,
    \col_lcl[10]__0_i_3_2 ,
    NRowRaw,
    reqInvAcquire,
    reqInvCornerConfig,
    \tixVState_reg[1]_3 ,
    \tixVState_reg[1]_4 ,
    \tkst_reg[31]_1 ,
    \dy_reg[44]_0 ,
    \col1_reg[10]_0 ,
    \thd_reg[7]_0 ,
    \row1_reg[7]_0 ,
    \col0_reg[10]_0 ,
    coobufCornerToHostifAXIS_tready,
    dneCoobufCornerToHostif,
    reqCoobufCornerToHostif);
  output [63:0]doutb;
  output ackInvCornerSet;
  output ackInvCornerUnlock;
  output ackInvCornerAcquire;
  output ackInvCornerConfig;
  output rng_reg_0;
  output rng_reg_1;
  output [7:0]Q;
  output [10:0]\col_lcl_reg[10]_0 ;
  output [1:0]D;
  output [1:0]\tixVState_reg[1]_0 ;
  output [1:0]\stateOp_reg[1]_0 ;
  output \tixVState_reg[1]_1 ;
  output \row_lcl_reg[1]_0 ;
  output [1:0]\FSM_onehot_stateCoobufB_reg[5]_0 ;
  output [31:0]\tkst_reg[31]_0 ;
  output [7:0]\scoreMin_reg[7]_0 ;
  output [7:0]\scoreMax_reg[7]_0 ;
  output ackCoobufCornerToHostif;
  input aclk_sig;
  input [0:0]E;
  input ackInvSet_sig;
  input linNotLog_reg_0;
  input ackInvUnlock_sig0_in;
  input hdrNotFix;
  input rng_reg_2;
  input [39:0]grayVideoinToManyAXIS_tdata;
  input \aImdbufB_reg[0]_0 ;
  input \tkst_reg[0]_0 ;
  input enCoobuf_reg_0;
  input \capt_reg[2] ;
  input \capt_reg[1] ;
  input [0:0]\stateOp_reg[0]_0 ;
  input vsync_last_reg_0;
  input \tixVState_reg[1]_2 ;
  input \stateCorner_reg[1]_0 ;
  input grayVideoinToManyAXIS_tlast;
  input grayVideoinToManyAXIS_tvalid;
  input \col_lcl_reg[0]__0_0 ;
  input [9:0]NColRaw;
  input \col_lcl[10]__0_i_3_0 ;
  input \col_lcl[10]__0_i_5_0 ;
  input \col_lcl[10]__0_i_3_1 ;
  input \col_lcl[10]__0_i_3_2 ;
  input [2:0]NRowRaw;
  input reqInvAcquire;
  input reqInvCornerConfig;
  input [0:0]\tixVState_reg[1]_3 ;
  input [0:0]\tixVState_reg[1]_4 ;
  input [31:0]\tkst_reg[31]_1 ;
  input [44:0]\dy_reg[44]_0 ;
  input [10:0]\col1_reg[10]_0 ;
  input [21:0]\thd_reg[7]_0 ;
  input [7:0]\row1_reg[7]_0 ;
  input [10:0]\col0_reg[10]_0 ;
  input coobufCornerToHostifAXIS_tready;
  input dneCoobufCornerToHostif;
  input reqCoobufCornerToHostif;

  wire [8:0]A;
  wire [37:19]ARG;
  wire [8:0]B;
  wire [1:0]D;
  wire [0:0]E;
  wire \FSM_onehot_stateCoobufB[0]_i_1_n_0 ;
  wire \FSM_onehot_stateCoobufB[2]_i_1_n_0 ;
  wire \FSM_onehot_stateCoobufB[3]_i_1_n_0 ;
  wire \FSM_onehot_stateCoobufB[3]_i_2_n_0 ;
  wire \FSM_onehot_stateCoobufB[5]_i_1_n_0 ;
  wire \FSM_onehot_stateCoobufB[5]_i_3_n_0 ;
  wire [1:0]\FSM_onehot_stateCoobufB_reg[5]_0 ;
  wire \FSM_onehot_stateCoobufB_reg_n_0_[0] ;
  wire \FSM_onehot_stateCoobufB_reg_n_0_[2] ;
  wire [9:0]NColRaw;
  wire [2:0]NRowRaw;
  wire [7:0]Q;
  wire [17:0]RESIZE;
  wire [17:0]RESIZE0_in;
  wire [7:1]aCoobufB;
  wire \aCoobufB[0]_i_1_n_0 ;
  wire \aCoobufB[5]_i_2_n_0 ;
  wire \aCoobufB_reg_n_0_[0] ;
  wire \aCoobufB_reg_n_0_[1] ;
  wire \aCoobufB_reg_n_0_[2] ;
  wire \aCoobufB_reg_n_0_[3] ;
  wire \aCoobufB_reg_n_0_[4] ;
  wire \aCoobufB_reg_n_0_[5] ;
  wire \aCoobufB_reg_n_0_[6] ;
  wire \aCoobufB_reg_n_0_[7] ;
  wire \aCoobuf[3]_i_1_n_0 ;
  wire \aCoobuf[5]_i_2_n_0 ;
  wire \aCoobuf[8]_i_3_n_0 ;
  wire [8:0]aCoobuf_reg;
  wire aImdbufB;
  wire \aImdbufB[0]_i_1_n_0 ;
  wire \aImdbufB[10]_i_1_n_0 ;
  wire \aImdbufB[10]_i_2_n_0 ;
  wire \aImdbufB[1]_i_1_n_0 ;
  wire \aImdbufB[2]_i_1_n_0 ;
  wire \aImdbufB[3]_i_1_n_0 ;
  wire \aImdbufB[4]_i_1_n_0 ;
  wire \aImdbufB[4]_i_2_n_0 ;
  wire \aImdbufB[5]_i_1_n_0 ;
  wire \aImdbufB[5]_i_2_n_0 ;
  wire \aImdbufB[6]_i_1_n_0 ;
  wire \aImdbufB[7]_i_1_n_0 ;
  wire \aImdbufB[8]_i_1_n_0 ;
  wire \aImdbufB[8]_i_2_n_0 ;
  wire \aImdbufB[9]_i_1_n_0 ;
  wire \aImdbufB_reg[0]_0 ;
  wire \aImdbufB_reg_n_0_[0] ;
  wire \aImdbufB_reg_n_0_[10] ;
  wire \aImdbufB_reg_n_0_[1] ;
  wire \aImdbufB_reg_n_0_[2] ;
  wire \aImdbufB_reg_n_0_[3] ;
  wire \aImdbufB_reg_n_0_[4] ;
  wire \aImdbufB_reg_n_0_[5] ;
  wire \aImdbufB_reg_n_0_[6] ;
  wire \aImdbufB_reg_n_0_[7] ;
  wire \aImdbufB_reg_n_0_[8] ;
  wire \aImdbufB_reg_n_0_[9] ;
  wire \aImdbuf[0]_i_1_n_0 ;
  wire \aImdbuf[10]_i_2_n_0 ;
  wire \aImdbuf[10]_i_3_n_0 ;
  wire \aImdbuf[10]_i_4_n_0 ;
  wire \aImdbuf[10]_i_5_n_0 ;
  wire \aImdbuf[10]_i_6_n_0 ;
  wire \aImdbuf[10]_i_7_n_0 ;
  wire \aImdbuf[10]_i_8_n_0 ;
  wire \aImdbuf[1]_i_1_n_0 ;
  wire \aImdbuf[2]_i_1_n_0 ;
  wire \aImdbuf[3]_i_1_n_0 ;
  wire \aImdbuf[4]_i_1_n_0 ;
  wire \aImdbuf[4]_i_2_n_0 ;
  wire \aImdbuf[5]_i_1_n_0 ;
  wire \aImdbuf[5]_i_2_n_0 ;
  wire \aImdbuf[6]_i_1_n_0 ;
  wire \aImdbuf[7]_i_1_n_0 ;
  wire \aImdbuf[8]_i_1_n_0 ;
  wire \aImdbuf[8]_i_2_n_0 ;
  wire \aImdbuf[9]_i_1_n_0 ;
  wire \aImdbuf_reg_n_0_[0] ;
  wire \aImdbuf_reg_n_0_[10] ;
  wire \aImdbuf_reg_n_0_[1] ;
  wire \aImdbuf_reg_n_0_[2] ;
  wire \aImdbuf_reg_n_0_[3] ;
  wire \aImdbuf_reg_n_0_[4] ;
  wire \aImdbuf_reg_n_0_[5] ;
  wire \aImdbuf_reg_n_0_[6] ;
  wire \aImdbuf_reg_n_0_[7] ;
  wire \aImdbuf_reg_n_0_[8] ;
  wire \aImdbuf_reg_n_0_[9] ;
  wire \abcde[0]_i_1_n_0 ;
  wire \abcde[1]_i_1_n_0 ;
  wire \abcde[2]_i_1_n_0 ;
  wire \abcde[2]_i_2_n_0 ;
  wire [2:0]abcde__0;
  wire ackCoobufCornerToHostif;
  wire ackInvAcquire_sig;
  wire ackInvConfig_sig;
  wire ackInvCornerAcquire;
  wire ackInvCornerConfig;
  wire ackInvCornerSet;
  wire ackInvCornerUnlock;
  wire ackInvSet_sig;
  wire ackInvUnlock_sig0_in;
  wire aclk_sig;
  wire \capt_reg[1] ;
  wire \capt_reg[2] ;
  wire ceMaxsel_i_1_n_0;
  wire ceMaxsel_i_2_n_0;
  wire ceMaxsel_reg_n_0;
  wire ceScore;
  wire ceScore15_out;
  wire [10:0]col0;
  wire [10:0]\col0_reg[10]_0 ;
  wire [10:0]col1;
  wire [10:0]\col1_reg[10]_0 ;
  wire \col_lcl[0]__0_i_1_n_0 ;
  wire \col_lcl[0]_i_1_n_0 ;
  wire \col_lcl[10]__0_i_10_n_0 ;
  wire \col_lcl[10]__0_i_11_n_0 ;
  wire \col_lcl[10]__0_i_12_n_0 ;
  wire \col_lcl[10]__0_i_14_n_0 ;
  wire \col_lcl[10]__0_i_16_n_0 ;
  wire \col_lcl[10]__0_i_17_n_0 ;
  wire \col_lcl[10]__0_i_1_n_0 ;
  wire \col_lcl[10]__0_i_2_n_0 ;
  wire \col_lcl[10]__0_i_3_0 ;
  wire \col_lcl[10]__0_i_3_1 ;
  wire \col_lcl[10]__0_i_3_2 ;
  wire \col_lcl[10]__0_i_3_n_0 ;
  wire \col_lcl[10]__0_i_4_n_0 ;
  wire \col_lcl[10]__0_i_5_0 ;
  wire \col_lcl[10]__0_i_5_n_0 ;
  wire \col_lcl[10]__0_i_6_n_0 ;
  wire \col_lcl[10]__0_i_8_n_0 ;
  wire \col_lcl[10]__0_i_9_n_0 ;
  wire \col_lcl[10]_i_1__0_n_0 ;
  wire \col_lcl[10]_i_2_n_0 ;
  wire \col_lcl[10]_i_3_n_0 ;
  wire \col_lcl[10]_i_4_n_0 ;
  wire \col_lcl[10]_i_5_n_0 ;
  wire \col_lcl[1]__0_i_1_n_0 ;
  wire \col_lcl[1]_i_1_n_0 ;
  wire \col_lcl[2]__0_i_1_n_0 ;
  wire \col_lcl[2]_i_1_n_0 ;
  wire \col_lcl[3]__0_i_1_n_0 ;
  wire \col_lcl[3]_i_1_n_0 ;
  wire \col_lcl[4]__0_i_1_n_0 ;
  wire \col_lcl[4]__0_i_2_n_0 ;
  wire \col_lcl[4]_i_1_n_0 ;
  wire \col_lcl[5]__0_i_1_n_0 ;
  wire \col_lcl[5]__0_i_2_n_0 ;
  wire \col_lcl[5]_i_1_n_0 ;
  wire \col_lcl[5]_i_2__0_n_0 ;
  wire \col_lcl[6]__0_i_1_n_0 ;
  wire \col_lcl[6]_i_1_n_0 ;
  wire \col_lcl[7]__0_i_1_n_0 ;
  wire \col_lcl[7]_i_1_n_0 ;
  wire \col_lcl[8]__0_i_1_n_0 ;
  wire \col_lcl[8]__0_i_2_n_0 ;
  wire \col_lcl[8]__0_i_3_n_0 ;
  wire \col_lcl[8]__0_i_4_n_0 ;
  wire \col_lcl[8]_i_1__0_n_0 ;
  wire \col_lcl[9]__0_i_1_n_0 ;
  wire \col_lcl[9]__0_i_2_n_0 ;
  wire \col_lcl[9]_i_1__0_n_0 ;
  wire \col_lcl[9]_i_2__0_n_0 ;
  wire \col_lcl_reg[0]__0_0 ;
  wire \col_lcl_reg[0]__0_n_0 ;
  wire [10:0]\col_lcl_reg[10]_0 ;
  wire \col_lcl_reg[10]__0_n_0 ;
  wire \col_lcl_reg[1]__0_n_0 ;
  wire \col_lcl_reg[2]__0_n_0 ;
  wire \col_lcl_reg[3]__0_n_0 ;
  wire \col_lcl_reg[4]__0_n_0 ;
  wire \col_lcl_reg[5]__0_n_0 ;
  wire \col_lcl_reg[6]__0_n_0 ;
  wire \col_lcl_reg[7]__0_n_0 ;
  wire \col_lcl_reg[8]__0_n_0 ;
  wire \col_lcl_reg[9]__0_n_0 ;
  wire colmax_lcl;
  wire \colmax_lcl[0]_i_1_n_0 ;
  wire \colmax_lcl[1]_i_1_n_0 ;
  wire \colmax_lcl[2]_i_2_n_0 ;
  wire \colmax_lcl_reg_n_0_[0] ;
  wire \colmax_lcl_reg_n_0_[1] ;
  wire \colmax_lcl_reg_n_0_[2] ;
  wire [41:21]colsumX;
  wire [20:0]colsumX4p1;
  wire \colsumX4p1[0]_i_1_n_0 ;
  wire \colsumX4p1[10]_i_1_n_0 ;
  wire \colsumX4p1[11]_i_1_n_0 ;
  wire \colsumX4p1[12]_i_1_n_0 ;
  wire \colsumX4p1[13]_i_1_n_0 ;
  wire \colsumX4p1[14]_i_1_n_0 ;
  wire \colsumX4p1[15]_i_1_n_0 ;
  wire \colsumX4p1[16]_i_1_n_0 ;
  wire \colsumX4p1[17]_i_1_n_0 ;
  wire \colsumX4p1[18]_i_1_n_0 ;
  wire \colsumX4p1[19]_i_1_n_0 ;
  wire \colsumX4p1[1]_i_1_n_0 ;
  wire \colsumX4p1[20]_i_1_n_0 ;
  wire \colsumX4p1[2]_i_1_n_0 ;
  wire \colsumX4p1[3]_i_1_n_0 ;
  wire \colsumX4p1[4]_i_1_n_0 ;
  wire \colsumX4p1[5]_i_1_n_0 ;
  wire \colsumX4p1[6]_i_1_n_0 ;
  wire \colsumX4p1[7]_i_1_n_0 ;
  wire \colsumX4p1[8]_i_1_n_0 ;
  wire \colsumX4p1[9]_i_1_n_0 ;
  wire [20:0]colsumX4p2;
  wire \colsumX4p2[0]_i_1_n_0 ;
  wire \colsumX4p2[10]_i_1_n_0 ;
  wire \colsumX4p2[11]_i_1_n_0 ;
  wire \colsumX4p2[12]_i_1_n_0 ;
  wire \colsumX4p2[13]_i_1_n_0 ;
  wire \colsumX4p2[14]_i_1_n_0 ;
  wire \colsumX4p2[15]_i_1_n_0 ;
  wire \colsumX4p2[16]_i_1_n_0 ;
  wire \colsumX4p2[17]_i_1_n_0 ;
  wire \colsumX4p2[18]_i_1_n_0 ;
  wire \colsumX4p2[19]_i_1_n_0 ;
  wire \colsumX4p2[1]_i_1_n_0 ;
  wire \colsumX4p2[20]_i_1_n_0 ;
  wire \colsumX4p2[2]_i_1_n_0 ;
  wire \colsumX4p2[3]_i_1_n_0 ;
  wire \colsumX4p2[4]_i_1_n_0 ;
  wire \colsumX4p2[5]_i_1_n_0 ;
  wire \colsumX4p2[6]_i_1_n_0 ;
  wire \colsumX4p2[7]_i_1_n_0 ;
  wire \colsumX4p2[8]_i_1_n_0 ;
  wire \colsumX4p2[9]_i_1_n_0 ;
  wire [17:2]colsumXA0;
  wire [17:2]colsumXA00_in;
  wire \colsumXA[0]_i_1_n_0 ;
  wire \colsumXA[10]_i_1_n_0 ;
  wire \colsumXA[11]_i_1_n_0 ;
  wire \colsumXA[12]_i_1_n_0 ;
  wire \colsumXA[13]_i_1_n_0 ;
  wire \colsumXA[14]_i_1_n_0 ;
  wire \colsumXA[15]_i_1_n_0 ;
  wire \colsumXA[16]_i_1_n_0 ;
  wire \colsumXA[17]_i_10_n_0 ;
  wire \colsumXA[17]_i_11_n_0 ;
  wire \colsumXA[17]_i_1_n_0 ;
  wire \colsumXA[17]_i_3_n_0 ;
  wire \colsumXA[17]_i_4_n_0 ;
  wire \colsumXA[17]_i_5_n_0 ;
  wire \colsumXA[17]_i_6_n_0 ;
  wire \colsumXA[17]_i_7_n_0 ;
  wire \colsumXA[17]_i_8_n_0 ;
  wire \colsumXA[17]_i_9_n_0 ;
  wire \colsumXA[18]_i_1_n_0 ;
  wire \colsumXA[19]_i_1_n_0 ;
  wire \colsumXA[1]_i_1_n_0 ;
  wire \colsumXA[20]_i_1_n_0 ;
  wire \colsumXA[21]_i_1_n_0 ;
  wire \colsumXA[22]_i_1_n_0 ;
  wire \colsumXA[23]_i_1_n_0 ;
  wire \colsumXA[24]_i_1_n_0 ;
  wire \colsumXA[25]_i_1_n_0 ;
  wire \colsumXA[26]_i_1_n_0 ;
  wire \colsumXA[27]_i_1_n_0 ;
  wire \colsumXA[28]_i_10_n_0 ;
  wire \colsumXA[28]_i_1_n_0 ;
  wire \colsumXA[28]_i_3_n_0 ;
  wire \colsumXA[28]_i_4_n_0 ;
  wire \colsumXA[28]_i_5_n_0 ;
  wire \colsumXA[28]_i_6_n_0 ;
  wire \colsumXA[28]_i_7_n_0 ;
  wire \colsumXA[28]_i_8_n_0 ;
  wire \colsumXA[28]_i_9_n_0 ;
  wire \colsumXA[29]_i_1_n_0 ;
  wire \colsumXA[2]_i_1_n_0 ;
  wire \colsumXA[30]_i_1_n_0 ;
  wire \colsumXA[31]_i_1_n_0 ;
  wire \colsumXA[32]_i_1_n_0 ;
  wire \colsumXA[33]_i_1_n_0 ;
  wire \colsumXA[34]_i_1_n_0 ;
  wire \colsumXA[35]_i_1_n_0 ;
  wire \colsumXA[36]_i_10_n_0 ;
  wire \colsumXA[36]_i_11_n_0 ;
  wire \colsumXA[36]_i_1_n_0 ;
  wire \colsumXA[36]_i_3_n_0 ;
  wire \colsumXA[36]_i_4_n_0 ;
  wire \colsumXA[36]_i_5_n_0 ;
  wire \colsumXA[36]_i_6_n_0 ;
  wire \colsumXA[36]_i_7_n_0 ;
  wire \colsumXA[36]_i_8_n_0 ;
  wire \colsumXA[36]_i_9_n_0 ;
  wire \colsumXA[37]_i_1_n_0 ;
  wire \colsumXA[3]_i_1_n_0 ;
  wire \colsumXA[4]_i_1_n_0 ;
  wire \colsumXA[5]_i_1_n_0 ;
  wire \colsumXA[6]_i_1_n_0 ;
  wire \colsumXA[7]_i_1_n_0 ;
  wire \colsumXA[8]_i_1_n_0 ;
  wire \colsumXA[9]_i_10_n_0 ;
  wire \colsumXA[9]_i_1_n_0 ;
  wire \colsumXA[9]_i_3_n_0 ;
  wire \colsumXA[9]_i_4_n_0 ;
  wire \colsumXA[9]_i_5_n_0 ;
  wire \colsumXA[9]_i_6_n_0 ;
  wire \colsumXA[9]_i_7_n_0 ;
  wire \colsumXA[9]_i_8_n_0 ;
  wire \colsumXA[9]_i_9_n_0 ;
  wire \colsumXA_reg[17]_i_2_n_0 ;
  wire \colsumXA_reg[17]_i_2_n_1 ;
  wire \colsumXA_reg[17]_i_2_n_2 ;
  wire \colsumXA_reg[17]_i_2_n_3 ;
  wire \colsumXA_reg[17]_i_2_n_4 ;
  wire \colsumXA_reg[17]_i_2_n_5 ;
  wire \colsumXA_reg[17]_i_2_n_6 ;
  wire \colsumXA_reg[17]_i_2_n_7 ;
  wire \colsumXA_reg[18]_i_2_n_7 ;
  wire \colsumXA_reg[28]_i_2_n_0 ;
  wire \colsumXA_reg[28]_i_2_n_1 ;
  wire \colsumXA_reg[28]_i_2_n_2 ;
  wire \colsumXA_reg[28]_i_2_n_3 ;
  wire \colsumXA_reg[28]_i_2_n_4 ;
  wire \colsumXA_reg[28]_i_2_n_5 ;
  wire \colsumXA_reg[28]_i_2_n_6 ;
  wire \colsumXA_reg[28]_i_2_n_7 ;
  wire \colsumXA_reg[36]_i_2_n_0 ;
  wire \colsumXA_reg[36]_i_2_n_1 ;
  wire \colsumXA_reg[36]_i_2_n_2 ;
  wire \colsumXA_reg[36]_i_2_n_3 ;
  wire \colsumXA_reg[36]_i_2_n_4 ;
  wire \colsumXA_reg[36]_i_2_n_5 ;
  wire \colsumXA_reg[36]_i_2_n_6 ;
  wire \colsumXA_reg[36]_i_2_n_7 ;
  wire \colsumXA_reg[37]_i_2_n_7 ;
  wire \colsumXA_reg[9]_i_2_n_0 ;
  wire \colsumXA_reg[9]_i_2_n_1 ;
  wire \colsumXA_reg[9]_i_2_n_2 ;
  wire \colsumXA_reg[9]_i_2_n_3 ;
  wire \colsumXA_reg[9]_i_2_n_4 ;
  wire \colsumXA_reg[9]_i_2_n_5 ;
  wire \colsumXA_reg[9]_i_2_n_6 ;
  wire \colsumXA_reg[9]_i_2_n_7 ;
  wire \colsumXA_reg_n_0_[0] ;
  wire \colsumXA_reg_n_0_[10] ;
  wire \colsumXA_reg_n_0_[11] ;
  wire \colsumXA_reg_n_0_[12] ;
  wire \colsumXA_reg_n_0_[13] ;
  wire \colsumXA_reg_n_0_[14] ;
  wire \colsumXA_reg_n_0_[15] ;
  wire \colsumXA_reg_n_0_[16] ;
  wire \colsumXA_reg_n_0_[17] ;
  wire \colsumXA_reg_n_0_[18] ;
  wire \colsumXA_reg_n_0_[1] ;
  wire \colsumXA_reg_n_0_[2] ;
  wire \colsumXA_reg_n_0_[3] ;
  wire \colsumXA_reg_n_0_[4] ;
  wire \colsumXA_reg_n_0_[5] ;
  wire \colsumXA_reg_n_0_[6] ;
  wire \colsumXA_reg_n_0_[7] ;
  wire \colsumXA_reg_n_0_[8] ;
  wire \colsumXA_reg_n_0_[9] ;
  wire [19:0]colsumXB;
  wire \colsumXB[15]_i_10_n_0 ;
  wire \colsumXB[15]_i_11_n_0 ;
  wire \colsumXB[15]_i_12_n_0 ;
  wire \colsumXB[15]_i_13_n_0 ;
  wire \colsumXB[15]_i_14_n_0 ;
  wire \colsumXB[15]_i_15_n_0 ;
  wire \colsumXB[15]_i_16_n_0 ;
  wire \colsumXB[15]_i_17_n_0 ;
  wire \colsumXB[15]_i_2_n_0 ;
  wire \colsumXB[15]_i_3_n_0 ;
  wire \colsumXB[15]_i_4_n_0 ;
  wire \colsumXB[15]_i_5_n_0 ;
  wire \colsumXB[15]_i_6_n_0 ;
  wire \colsumXB[15]_i_7_n_0 ;
  wire \colsumXB[15]_i_8_n_0 ;
  wire \colsumXB[15]_i_9_n_0 ;
  wire \colsumXB[19]_i_2_n_0 ;
  wire \colsumXB[19]_i_3_n_0 ;
  wire \colsumXB[19]_i_4_n_0 ;
  wire \colsumXB[19]_i_5_n_0 ;
  wire \colsumXB[19]_i_6_n_0 ;
  wire \colsumXB[19]_i_7_n_0 ;
  wire \colsumXB[19]_i_8_n_0 ;
  wire \colsumXB[7]_i_10_n_0 ;
  wire \colsumXB[7]_i_11_n_0 ;
  wire \colsumXB[7]_i_12_n_0 ;
  wire \colsumXB[7]_i_13_n_0 ;
  wire \colsumXB[7]_i_14_n_0 ;
  wire \colsumXB[7]_i_15_n_0 ;
  wire \colsumXB[7]_i_16_n_0 ;
  wire \colsumXB[7]_i_17_n_0 ;
  wire \colsumXB[7]_i_2_n_0 ;
  wire \colsumXB[7]_i_3_n_0 ;
  wire \colsumXB[7]_i_4_n_0 ;
  wire \colsumXB[7]_i_5_n_0 ;
  wire \colsumXB[7]_i_6_n_0 ;
  wire \colsumXB[7]_i_7_n_0 ;
  wire \colsumXB[7]_i_8_n_0 ;
  wire \colsumXB[7]_i_9_n_0 ;
  wire \colsumXB_reg[15]_i_1_n_0 ;
  wire \colsumXB_reg[15]_i_1_n_1 ;
  wire \colsumXB_reg[15]_i_1_n_10 ;
  wire \colsumXB_reg[15]_i_1_n_11 ;
  wire \colsumXB_reg[15]_i_1_n_12 ;
  wire \colsumXB_reg[15]_i_1_n_13 ;
  wire \colsumXB_reg[15]_i_1_n_14 ;
  wire \colsumXB_reg[15]_i_1_n_15 ;
  wire \colsumXB_reg[15]_i_1_n_2 ;
  wire \colsumXB_reg[15]_i_1_n_3 ;
  wire \colsumXB_reg[15]_i_1_n_4 ;
  wire \colsumXB_reg[15]_i_1_n_5 ;
  wire \colsumXB_reg[15]_i_1_n_6 ;
  wire \colsumXB_reg[15]_i_1_n_7 ;
  wire \colsumXB_reg[15]_i_1_n_8 ;
  wire \colsumXB_reg[15]_i_1_n_9 ;
  wire \colsumXB_reg[19]_i_1_n_12 ;
  wire \colsumXB_reg[19]_i_1_n_13 ;
  wire \colsumXB_reg[19]_i_1_n_14 ;
  wire \colsumXB_reg[19]_i_1_n_15 ;
  wire \colsumXB_reg[19]_i_1_n_5 ;
  wire \colsumXB_reg[19]_i_1_n_6 ;
  wire \colsumXB_reg[19]_i_1_n_7 ;
  wire \colsumXB_reg[7]_i_1_n_0 ;
  wire \colsumXB_reg[7]_i_1_n_1 ;
  wire \colsumXB_reg[7]_i_1_n_10 ;
  wire \colsumXB_reg[7]_i_1_n_11 ;
  wire \colsumXB_reg[7]_i_1_n_12 ;
  wire \colsumXB_reg[7]_i_1_n_13 ;
  wire \colsumXB_reg[7]_i_1_n_14 ;
  wire \colsumXB_reg[7]_i_1_n_15 ;
  wire \colsumXB_reg[7]_i_1_n_2 ;
  wire \colsumXB_reg[7]_i_1_n_3 ;
  wire \colsumXB_reg[7]_i_1_n_4 ;
  wire \colsumXB_reg[7]_i_1_n_5 ;
  wire \colsumXB_reg[7]_i_1_n_6 ;
  wire \colsumXB_reg[7]_i_1_n_7 ;
  wire \colsumXB_reg[7]_i_1_n_8 ;
  wire \colsumXB_reg[7]_i_1_n_9 ;
  wire \colsumXC[15]_i_10_n_0 ;
  wire \colsumXC[15]_i_11_n_0 ;
  wire \colsumXC[15]_i_12_n_0 ;
  wire \colsumXC[15]_i_13_n_0 ;
  wire \colsumXC[15]_i_14_n_0 ;
  wire \colsumXC[15]_i_15_n_0 ;
  wire \colsumXC[15]_i_16_n_0 ;
  wire \colsumXC[15]_i_17_n_0 ;
  wire \colsumXC[15]_i_2_n_0 ;
  wire \colsumXC[15]_i_3_n_0 ;
  wire \colsumXC[15]_i_4_n_0 ;
  wire \colsumXC[15]_i_5_n_0 ;
  wire \colsumXC[15]_i_6_n_0 ;
  wire \colsumXC[15]_i_7_n_0 ;
  wire \colsumXC[15]_i_8_n_0 ;
  wire \colsumXC[15]_i_9_n_0 ;
  wire \colsumXC[20]_i_10_n_0 ;
  wire \colsumXC[20]_i_2_n_0 ;
  wire \colsumXC[20]_i_3_n_0 ;
  wire \colsumXC[20]_i_4_n_0 ;
  wire \colsumXC[20]_i_5_n_0 ;
  wire \colsumXC[20]_i_6_n_0 ;
  wire \colsumXC[20]_i_7_n_0 ;
  wire \colsumXC[20]_i_8_n_0 ;
  wire \colsumXC[20]_i_9_n_0 ;
  wire \colsumXC[7]_i_10_n_0 ;
  wire \colsumXC[7]_i_11_n_0 ;
  wire \colsumXC[7]_i_12_n_0 ;
  wire \colsumXC[7]_i_13_n_0 ;
  wire \colsumXC[7]_i_14_n_0 ;
  wire \colsumXC[7]_i_15_n_0 ;
  wire \colsumXC[7]_i_16_n_0 ;
  wire \colsumXC[7]_i_2_n_0 ;
  wire \colsumXC[7]_i_3_n_0 ;
  wire \colsumXC[7]_i_4_n_0 ;
  wire \colsumXC[7]_i_5_n_0 ;
  wire \colsumXC[7]_i_6_n_0 ;
  wire \colsumXC[7]_i_7_n_0 ;
  wire \colsumXC[7]_i_8_n_0 ;
  wire \colsumXC[7]_i_9_n_0 ;
  wire \colsumXC_reg[15]_i_1_n_0 ;
  wire \colsumXC_reg[15]_i_1_n_1 ;
  wire \colsumXC_reg[15]_i_1_n_10 ;
  wire \colsumXC_reg[15]_i_1_n_11 ;
  wire \colsumXC_reg[15]_i_1_n_12 ;
  wire \colsumXC_reg[15]_i_1_n_13 ;
  wire \colsumXC_reg[15]_i_1_n_14 ;
  wire \colsumXC_reg[15]_i_1_n_15 ;
  wire \colsumXC_reg[15]_i_1_n_2 ;
  wire \colsumXC_reg[15]_i_1_n_3 ;
  wire \colsumXC_reg[15]_i_1_n_4 ;
  wire \colsumXC_reg[15]_i_1_n_5 ;
  wire \colsumXC_reg[15]_i_1_n_6 ;
  wire \colsumXC_reg[15]_i_1_n_7 ;
  wire \colsumXC_reg[15]_i_1_n_8 ;
  wire \colsumXC_reg[15]_i_1_n_9 ;
  wire \colsumXC_reg[20]_i_1_n_11 ;
  wire \colsumXC_reg[20]_i_1_n_12 ;
  wire \colsumXC_reg[20]_i_1_n_13 ;
  wire \colsumXC_reg[20]_i_1_n_14 ;
  wire \colsumXC_reg[20]_i_1_n_15 ;
  wire \colsumXC_reg[20]_i_1_n_4 ;
  wire \colsumXC_reg[20]_i_1_n_5 ;
  wire \colsumXC_reg[20]_i_1_n_6 ;
  wire \colsumXC_reg[20]_i_1_n_7 ;
  wire \colsumXC_reg[7]_i_1_n_0 ;
  wire \colsumXC_reg[7]_i_1_n_1 ;
  wire \colsumXC_reg[7]_i_1_n_10 ;
  wire \colsumXC_reg[7]_i_1_n_11 ;
  wire \colsumXC_reg[7]_i_1_n_12 ;
  wire \colsumXC_reg[7]_i_1_n_13 ;
  wire \colsumXC_reg[7]_i_1_n_14 ;
  wire \colsumXC_reg[7]_i_1_n_15 ;
  wire \colsumXC_reg[7]_i_1_n_2 ;
  wire \colsumXC_reg[7]_i_1_n_3 ;
  wire \colsumXC_reg[7]_i_1_n_4 ;
  wire \colsumXC_reg[7]_i_1_n_5 ;
  wire \colsumXC_reg[7]_i_1_n_6 ;
  wire \colsumXC_reg[7]_i_1_n_7 ;
  wire \colsumXC_reg[7]_i_1_n_8 ;
  wire \colsumXC_reg[7]_i_1_n_9 ;
  wire [20:0]colsumXY4p1;
  wire \colsumXY4p1[0]_i_1_n_0 ;
  wire \colsumXY4p1[10]_i_1_n_0 ;
  wire \colsumXY4p1[11]_i_1_n_0 ;
  wire \colsumXY4p1[12]_i_1_n_0 ;
  wire \colsumXY4p1[13]_i_1_n_0 ;
  wire \colsumXY4p1[14]_i_1_n_0 ;
  wire \colsumXY4p1[15]_i_1_n_0 ;
  wire \colsumXY4p1[16]_i_1_n_0 ;
  wire \colsumXY4p1[17]_i_1_n_0 ;
  wire \colsumXY4p1[18]_i_1_n_0 ;
  wire \colsumXY4p1[19]_i_1_n_0 ;
  wire \colsumXY4p1[1]_i_1_n_0 ;
  wire \colsumXY4p1[20]_i_1_n_0 ;
  wire \colsumXY4p1[2]_i_1_n_0 ;
  wire \colsumXY4p1[3]_i_1_n_0 ;
  wire \colsumXY4p1[4]_i_1_n_0 ;
  wire \colsumXY4p1[5]_i_1_n_0 ;
  wire \colsumXY4p1[6]_i_1_n_0 ;
  wire \colsumXY4p1[7]_i_1_n_0 ;
  wire \colsumXY4p1[8]_i_1_n_0 ;
  wire \colsumXY4p1[9]_i_1_n_0 ;
  wire [20:0]colsumXY4p2;
  wire \colsumXY4p2[0]_i_1_n_0 ;
  wire \colsumXY4p2[10]_i_1_n_0 ;
  wire \colsumXY4p2[11]_i_1_n_0 ;
  wire \colsumXY4p2[12]_i_1_n_0 ;
  wire \colsumXY4p2[13]_i_1_n_0 ;
  wire \colsumXY4p2[14]_i_1_n_0 ;
  wire \colsumXY4p2[15]_i_1_n_0 ;
  wire \colsumXY4p2[16]_i_1_n_0 ;
  wire \colsumXY4p2[17]_i_1_n_0 ;
  wire \colsumXY4p2[18]_i_1_n_0 ;
  wire \colsumXY4p2[19]_i_1_n_0 ;
  wire \colsumXY4p2[1]_i_1_n_0 ;
  wire \colsumXY4p2[20]_i_1_n_0 ;
  wire \colsumXY4p2[2]_i_1_n_0 ;
  wire \colsumXY4p2[3]_i_1_n_0 ;
  wire \colsumXY4p2[4]_i_1_n_0 ;
  wire \colsumXY4p2[5]_i_1_n_0 ;
  wire \colsumXY4p2[6]_i_1_n_0 ;
  wire \colsumXY4p2[7]_i_1_n_0 ;
  wire \colsumXY4p2[8]_i_1_n_0 ;
  wire \colsumXY4p2[9]_i_1_n_0 ;
  wire [37:0]colsumXYA;
  wire [17:0]colsumXYA0;
  wire [17:0]colsumXYA00_in;
  wire \colsumXYA[0]_i_1_n_0 ;
  wire \colsumXYA[10]_i_1_n_0 ;
  wire \colsumXYA[11]_i_1_n_0 ;
  wire \colsumXYA[12]_i_1_n_0 ;
  wire \colsumXYA[13]_i_1_n_0 ;
  wire \colsumXYA[14]_i_1_n_0 ;
  wire \colsumXYA[15]_i_10_n_0 ;
  wire \colsumXYA[15]_i_1_n_0 ;
  wire \colsumXYA[15]_i_3_n_0 ;
  wire \colsumXYA[15]_i_4_n_0 ;
  wire \colsumXYA[15]_i_5_n_0 ;
  wire \colsumXYA[15]_i_6_n_0 ;
  wire \colsumXYA[15]_i_7_n_0 ;
  wire \colsumXYA[15]_i_8_n_0 ;
  wire \colsumXYA[15]_i_9_n_0 ;
  wire \colsumXYA[16]_i_1_n_0 ;
  wire \colsumXYA[17]_i_1_n_0 ;
  wire \colsumXYA[18]_i_1_n_0 ;
  wire \colsumXYA[18]_i_3_n_0 ;
  wire \colsumXYA[18]_i_4_n_0 ;
  wire \colsumXYA[18]_i_5_n_0 ;
  wire \colsumXYA[19]_i_1_n_0 ;
  wire \colsumXYA[1]_i_1_n_0 ;
  wire \colsumXYA[20]_i_1_n_0 ;
  wire \colsumXYA[21]_i_1_n_0 ;
  wire \colsumXYA[22]_i_1_n_0 ;
  wire \colsumXYA[23]_i_1_n_0 ;
  wire \colsumXYA[24]_i_1_n_0 ;
  wire \colsumXYA[25]_i_1_n_0 ;
  wire \colsumXYA[26]_i_10_n_0 ;
  wire \colsumXYA[26]_i_1_n_0 ;
  wire \colsumXYA[26]_i_3_n_0 ;
  wire \colsumXYA[26]_i_4_n_0 ;
  wire \colsumXYA[26]_i_5_n_0 ;
  wire \colsumXYA[26]_i_6_n_0 ;
  wire \colsumXYA[26]_i_7_n_0 ;
  wire \colsumXYA[26]_i_8_n_0 ;
  wire \colsumXYA[26]_i_9_n_0 ;
  wire \colsumXYA[27]_i_1_n_0 ;
  wire \colsumXYA[28]_i_1_n_0 ;
  wire \colsumXYA[29]_i_1_n_0 ;
  wire \colsumXYA[2]_i_1_n_0 ;
  wire \colsumXYA[30]_i_1_n_0 ;
  wire \colsumXYA[31]_i_1_n_0 ;
  wire \colsumXYA[32]_i_1_n_0 ;
  wire \colsumXYA[33]_i_1_n_0 ;
  wire \colsumXYA[34]_i_10_n_0 ;
  wire \colsumXYA[34]_i_1_n_0 ;
  wire \colsumXYA[34]_i_3_n_0 ;
  wire \colsumXYA[34]_i_4_n_0 ;
  wire \colsumXYA[34]_i_5_n_0 ;
  wire \colsumXYA[34]_i_6_n_0 ;
  wire \colsumXYA[34]_i_7_n_0 ;
  wire \colsumXYA[34]_i_8_n_0 ;
  wire \colsumXYA[34]_i_9_n_0 ;
  wire \colsumXYA[35]_i_1_n_0 ;
  wire \colsumXYA[36]_i_1_n_0 ;
  wire \colsumXYA[37]_i_1_n_0 ;
  wire \colsumXYA[37]_i_3_n_0 ;
  wire \colsumXYA[37]_i_4_n_0 ;
  wire \colsumXYA[37]_i_5_n_0 ;
  wire \colsumXYA[3]_i_1_n_0 ;
  wire \colsumXYA[4]_i_1_n_0 ;
  wire \colsumXYA[5]_i_1_n_0 ;
  wire \colsumXYA[6]_i_1_n_0 ;
  wire \colsumXYA[7]_i_10_n_0 ;
  wire \colsumXYA[7]_i_1_n_0 ;
  wire \colsumXYA[7]_i_3_n_0 ;
  wire \colsumXYA[7]_i_4_n_0 ;
  wire \colsumXYA[7]_i_5_n_0 ;
  wire \colsumXYA[7]_i_6_n_0 ;
  wire \colsumXYA[7]_i_7_n_0 ;
  wire \colsumXYA[7]_i_8_n_0 ;
  wire \colsumXYA[7]_i_9_n_0 ;
  wire \colsumXYA[8]_i_1_n_0 ;
  wire \colsumXYA[9]_i_1_n_0 ;
  wire \colsumXYA_reg[15]_i_2_n_0 ;
  wire \colsumXYA_reg[15]_i_2_n_1 ;
  wire \colsumXYA_reg[15]_i_2_n_2 ;
  wire \colsumXYA_reg[15]_i_2_n_3 ;
  wire \colsumXYA_reg[15]_i_2_n_4 ;
  wire \colsumXYA_reg[15]_i_2_n_5 ;
  wire \colsumXYA_reg[15]_i_2_n_6 ;
  wire \colsumXYA_reg[15]_i_2_n_7 ;
  wire \colsumXYA_reg[18]_i_2_n_5 ;
  wire \colsumXYA_reg[18]_i_2_n_7 ;
  wire \colsumXYA_reg[26]_i_2_n_0 ;
  wire \colsumXYA_reg[26]_i_2_n_1 ;
  wire \colsumXYA_reg[26]_i_2_n_2 ;
  wire \colsumXYA_reg[26]_i_2_n_3 ;
  wire \colsumXYA_reg[26]_i_2_n_4 ;
  wire \colsumXYA_reg[26]_i_2_n_5 ;
  wire \colsumXYA_reg[26]_i_2_n_6 ;
  wire \colsumXYA_reg[26]_i_2_n_7 ;
  wire \colsumXYA_reg[34]_i_2_n_0 ;
  wire \colsumXYA_reg[34]_i_2_n_1 ;
  wire \colsumXYA_reg[34]_i_2_n_2 ;
  wire \colsumXYA_reg[34]_i_2_n_3 ;
  wire \colsumXYA_reg[34]_i_2_n_4 ;
  wire \colsumXYA_reg[34]_i_2_n_5 ;
  wire \colsumXYA_reg[34]_i_2_n_6 ;
  wire \colsumXYA_reg[34]_i_2_n_7 ;
  wire \colsumXYA_reg[37]_i_2_n_5 ;
  wire \colsumXYA_reg[37]_i_2_n_7 ;
  wire \colsumXYA_reg[7]_i_2_n_0 ;
  wire \colsumXYA_reg[7]_i_2_n_1 ;
  wire \colsumXYA_reg[7]_i_2_n_2 ;
  wire \colsumXYA_reg[7]_i_2_n_3 ;
  wire \colsumXYA_reg[7]_i_2_n_4 ;
  wire \colsumXYA_reg[7]_i_2_n_5 ;
  wire \colsumXYA_reg[7]_i_2_n_6 ;
  wire \colsumXYA_reg[7]_i_2_n_7 ;
  wire [19:0]colsumXYB;
  wire \colsumXYB[15]_i_10_n_0 ;
  wire \colsumXYB[15]_i_11_n_0 ;
  wire \colsumXYB[15]_i_12_n_0 ;
  wire \colsumXYB[15]_i_13_n_0 ;
  wire \colsumXYB[15]_i_14_n_0 ;
  wire \colsumXYB[15]_i_15_n_0 ;
  wire \colsumXYB[15]_i_16_n_0 ;
  wire \colsumXYB[15]_i_17_n_0 ;
  wire \colsumXYB[15]_i_2_n_0 ;
  wire \colsumXYB[15]_i_3_n_0 ;
  wire \colsumXYB[15]_i_4_n_0 ;
  wire \colsumXYB[15]_i_5_n_0 ;
  wire \colsumXYB[15]_i_6_n_0 ;
  wire \colsumXYB[15]_i_7_n_0 ;
  wire \colsumXYB[15]_i_8_n_0 ;
  wire \colsumXYB[15]_i_9_n_0 ;
  wire \colsumXYB[19]_i_2_n_0 ;
  wire \colsumXYB[19]_i_3_n_0 ;
  wire \colsumXYB[19]_i_4_n_0 ;
  wire \colsumXYB[19]_i_5_n_0 ;
  wire \colsumXYB[19]_i_6_n_0 ;
  wire \colsumXYB[19]_i_7_n_0 ;
  wire \colsumXYB[19]_i_8_n_0 ;
  wire \colsumXYB[7]_i_10_n_0 ;
  wire \colsumXYB[7]_i_11_n_0 ;
  wire \colsumXYB[7]_i_12_n_0 ;
  wire \colsumXYB[7]_i_13_n_0 ;
  wire \colsumXYB[7]_i_14_n_0 ;
  wire \colsumXYB[7]_i_15_n_0 ;
  wire \colsumXYB[7]_i_16_n_0 ;
  wire \colsumXYB[7]_i_17_n_0 ;
  wire \colsumXYB[7]_i_2_n_0 ;
  wire \colsumXYB[7]_i_3_n_0 ;
  wire \colsumXYB[7]_i_4_n_0 ;
  wire \colsumXYB[7]_i_5_n_0 ;
  wire \colsumXYB[7]_i_6_n_0 ;
  wire \colsumXYB[7]_i_7_n_0 ;
  wire \colsumXYB[7]_i_8_n_0 ;
  wire \colsumXYB[7]_i_9_n_0 ;
  wire \colsumXYB_reg[15]_i_1_n_0 ;
  wire \colsumXYB_reg[15]_i_1_n_1 ;
  wire \colsumXYB_reg[15]_i_1_n_10 ;
  wire \colsumXYB_reg[15]_i_1_n_11 ;
  wire \colsumXYB_reg[15]_i_1_n_12 ;
  wire \colsumXYB_reg[15]_i_1_n_13 ;
  wire \colsumXYB_reg[15]_i_1_n_14 ;
  wire \colsumXYB_reg[15]_i_1_n_15 ;
  wire \colsumXYB_reg[15]_i_1_n_2 ;
  wire \colsumXYB_reg[15]_i_1_n_3 ;
  wire \colsumXYB_reg[15]_i_1_n_4 ;
  wire \colsumXYB_reg[15]_i_1_n_5 ;
  wire \colsumXYB_reg[15]_i_1_n_6 ;
  wire \colsumXYB_reg[15]_i_1_n_7 ;
  wire \colsumXYB_reg[15]_i_1_n_8 ;
  wire \colsumXYB_reg[15]_i_1_n_9 ;
  wire \colsumXYB_reg[19]_i_1_n_12 ;
  wire \colsumXYB_reg[19]_i_1_n_13 ;
  wire \colsumXYB_reg[19]_i_1_n_14 ;
  wire \colsumXYB_reg[19]_i_1_n_15 ;
  wire \colsumXYB_reg[19]_i_1_n_5 ;
  wire \colsumXYB_reg[19]_i_1_n_6 ;
  wire \colsumXYB_reg[19]_i_1_n_7 ;
  wire \colsumXYB_reg[7]_i_1_n_0 ;
  wire \colsumXYB_reg[7]_i_1_n_1 ;
  wire \colsumXYB_reg[7]_i_1_n_10 ;
  wire \colsumXYB_reg[7]_i_1_n_11 ;
  wire \colsumXYB_reg[7]_i_1_n_12 ;
  wire \colsumXYB_reg[7]_i_1_n_13 ;
  wire \colsumXYB_reg[7]_i_1_n_14 ;
  wire \colsumXYB_reg[7]_i_1_n_15 ;
  wire \colsumXYB_reg[7]_i_1_n_2 ;
  wire \colsumXYB_reg[7]_i_1_n_3 ;
  wire \colsumXYB_reg[7]_i_1_n_4 ;
  wire \colsumXYB_reg[7]_i_1_n_5 ;
  wire \colsumXYB_reg[7]_i_1_n_6 ;
  wire \colsumXYB_reg[7]_i_1_n_7 ;
  wire \colsumXYB_reg[7]_i_1_n_8 ;
  wire \colsumXYB_reg[7]_i_1_n_9 ;
  wire [20:0]colsumXYC;
  wire \colsumXYC[15]_i_10_n_0 ;
  wire \colsumXYC[15]_i_11_n_0 ;
  wire \colsumXYC[15]_i_12_n_0 ;
  wire \colsumXYC[15]_i_13_n_0 ;
  wire \colsumXYC[15]_i_14_n_0 ;
  wire \colsumXYC[15]_i_15_n_0 ;
  wire \colsumXYC[15]_i_16_n_0 ;
  wire \colsumXYC[15]_i_17_n_0 ;
  wire \colsumXYC[15]_i_2_n_0 ;
  wire \colsumXYC[15]_i_3_n_0 ;
  wire \colsumXYC[15]_i_4_n_0 ;
  wire \colsumXYC[15]_i_5_n_0 ;
  wire \colsumXYC[15]_i_6_n_0 ;
  wire \colsumXYC[15]_i_7_n_0 ;
  wire \colsumXYC[15]_i_8_n_0 ;
  wire \colsumXYC[15]_i_9_n_0 ;
  wire \colsumXYC[20]_i_10_n_0 ;
  wire \colsumXYC[20]_i_2_n_0 ;
  wire \colsumXYC[20]_i_3_n_0 ;
  wire \colsumXYC[20]_i_4_n_0 ;
  wire \colsumXYC[20]_i_5_n_0 ;
  wire \colsumXYC[20]_i_6_n_0 ;
  wire \colsumXYC[20]_i_7_n_0 ;
  wire \colsumXYC[20]_i_8_n_0 ;
  wire \colsumXYC[20]_i_9_n_0 ;
  wire \colsumXYC[7]_i_10_n_0 ;
  wire \colsumXYC[7]_i_11_n_0 ;
  wire \colsumXYC[7]_i_12_n_0 ;
  wire \colsumXYC[7]_i_13_n_0 ;
  wire \colsumXYC[7]_i_14_n_0 ;
  wire \colsumXYC[7]_i_15_n_0 ;
  wire \colsumXYC[7]_i_16_n_0 ;
  wire \colsumXYC[7]_i_17_n_0 ;
  wire \colsumXYC[7]_i_2_n_0 ;
  wire \colsumXYC[7]_i_3_n_0 ;
  wire \colsumXYC[7]_i_4_n_0 ;
  wire \colsumXYC[7]_i_5_n_0 ;
  wire \colsumXYC[7]_i_6_n_0 ;
  wire \colsumXYC[7]_i_7_n_0 ;
  wire \colsumXYC[7]_i_8_n_0 ;
  wire \colsumXYC[7]_i_9_n_0 ;
  wire \colsumXYC_reg[15]_i_1_n_0 ;
  wire \colsumXYC_reg[15]_i_1_n_1 ;
  wire \colsumXYC_reg[15]_i_1_n_10 ;
  wire \colsumXYC_reg[15]_i_1_n_11 ;
  wire \colsumXYC_reg[15]_i_1_n_12 ;
  wire \colsumXYC_reg[15]_i_1_n_13 ;
  wire \colsumXYC_reg[15]_i_1_n_14 ;
  wire \colsumXYC_reg[15]_i_1_n_15 ;
  wire \colsumXYC_reg[15]_i_1_n_2 ;
  wire \colsumXYC_reg[15]_i_1_n_3 ;
  wire \colsumXYC_reg[15]_i_1_n_4 ;
  wire \colsumXYC_reg[15]_i_1_n_5 ;
  wire \colsumXYC_reg[15]_i_1_n_6 ;
  wire \colsumXYC_reg[15]_i_1_n_7 ;
  wire \colsumXYC_reg[15]_i_1_n_8 ;
  wire \colsumXYC_reg[15]_i_1_n_9 ;
  wire \colsumXYC_reg[20]_i_1_n_11 ;
  wire \colsumXYC_reg[20]_i_1_n_12 ;
  wire \colsumXYC_reg[20]_i_1_n_13 ;
  wire \colsumXYC_reg[20]_i_1_n_14 ;
  wire \colsumXYC_reg[20]_i_1_n_15 ;
  wire \colsumXYC_reg[20]_i_1_n_4 ;
  wire \colsumXYC_reg[20]_i_1_n_5 ;
  wire \colsumXYC_reg[20]_i_1_n_6 ;
  wire \colsumXYC_reg[20]_i_1_n_7 ;
  wire \colsumXYC_reg[7]_i_1_n_0 ;
  wire \colsumXYC_reg[7]_i_1_n_1 ;
  wire \colsumXYC_reg[7]_i_1_n_10 ;
  wire \colsumXYC_reg[7]_i_1_n_11 ;
  wire \colsumXYC_reg[7]_i_1_n_12 ;
  wire \colsumXYC_reg[7]_i_1_n_13 ;
  wire \colsumXYC_reg[7]_i_1_n_14 ;
  wire \colsumXYC_reg[7]_i_1_n_15 ;
  wire \colsumXYC_reg[7]_i_1_n_2 ;
  wire \colsumXYC_reg[7]_i_1_n_3 ;
  wire \colsumXYC_reg[7]_i_1_n_4 ;
  wire \colsumXYC_reg[7]_i_1_n_5 ;
  wire \colsumXYC_reg[7]_i_1_n_6 ;
  wire \colsumXYC_reg[7]_i_1_n_7 ;
  wire \colsumXYC_reg[7]_i_1_n_8 ;
  wire \colsumXYC_reg[7]_i_1_n_9 ;
  wire \colsumXY[100]_i_1_n_0 ;
  wire \colsumXY[101]_i_1_n_0 ;
  wire \colsumXY[102]_i_1_n_0 ;
  wire \colsumXY[103]_i_1_n_0 ;
  wire \colsumXY[104]_i_1_n_0 ;
  wire \colsumXY[21]_i_1_n_0 ;
  wire \colsumXY[22]_i_1_n_0 ;
  wire \colsumXY[23]_i_1_n_0 ;
  wire \colsumXY[24]_i_1_n_0 ;
  wire \colsumXY[25]_i_1_n_0 ;
  wire \colsumXY[26]_i_1_n_0 ;
  wire \colsumXY[27]_i_1_n_0 ;
  wire \colsumXY[28]_i_1_n_0 ;
  wire \colsumXY[29]_i_1_n_0 ;
  wire \colsumXY[30]_i_1_n_0 ;
  wire \colsumXY[31]_i_1_n_0 ;
  wire \colsumXY[32]_i_1_n_0 ;
  wire \colsumXY[33]_i_1_n_0 ;
  wire \colsumXY[34]_i_1_n_0 ;
  wire \colsumXY[35]_i_1_n_0 ;
  wire \colsumXY[36]_i_1_n_0 ;
  wire \colsumXY[37]_i_1_n_0 ;
  wire \colsumXY[38]_i_1_n_0 ;
  wire \colsumXY[39]_i_1_n_0 ;
  wire \colsumXY[40]_i_1_n_0 ;
  wire \colsumXY[41]_i_1_n_0 ;
  wire \colsumXY[84]_i_1_n_0 ;
  wire \colsumXY[85]_i_1_n_0 ;
  wire \colsumXY[86]_i_1_n_0 ;
  wire \colsumXY[87]_i_1_n_0 ;
  wire \colsumXY[88]_i_1_n_0 ;
  wire \colsumXY[89]_i_1_n_0 ;
  wire \colsumXY[90]_i_1_n_0 ;
  wire \colsumXY[91]_i_1_n_0 ;
  wire \colsumXY[92]_i_1_n_0 ;
  wire \colsumXY[93]_i_1_n_0 ;
  wire \colsumXY[94]_i_1_n_0 ;
  wire \colsumXY[95]_i_1_n_0 ;
  wire \colsumXY[96]_i_1_n_0 ;
  wire \colsumXY[97]_i_1_n_0 ;
  wire \colsumXY[98]_i_1_n_0 ;
  wire \colsumXY[99]_i_1_n_0 ;
  wire \colsumXY_reg_n_0_[0] ;
  wire \colsumXY_reg_n_0_[100] ;
  wire \colsumXY_reg_n_0_[101] ;
  wire \colsumXY_reg_n_0_[102] ;
  wire \colsumXY_reg_n_0_[103] ;
  wire \colsumXY_reg_n_0_[104] ;
  wire \colsumXY_reg_n_0_[10] ;
  wire \colsumXY_reg_n_0_[11] ;
  wire \colsumXY_reg_n_0_[12] ;
  wire \colsumXY_reg_n_0_[13] ;
  wire \colsumXY_reg_n_0_[14] ;
  wire \colsumXY_reg_n_0_[15] ;
  wire \colsumXY_reg_n_0_[16] ;
  wire \colsumXY_reg_n_0_[17] ;
  wire \colsumXY_reg_n_0_[18] ;
  wire \colsumXY_reg_n_0_[19] ;
  wire \colsumXY_reg_n_0_[1] ;
  wire \colsumXY_reg_n_0_[20] ;
  wire \colsumXY_reg_n_0_[21] ;
  wire \colsumXY_reg_n_0_[22] ;
  wire \colsumXY_reg_n_0_[23] ;
  wire \colsumXY_reg_n_0_[24] ;
  wire \colsumXY_reg_n_0_[25] ;
  wire \colsumXY_reg_n_0_[26] ;
  wire \colsumXY_reg_n_0_[27] ;
  wire \colsumXY_reg_n_0_[28] ;
  wire \colsumXY_reg_n_0_[29] ;
  wire \colsumXY_reg_n_0_[2] ;
  wire \colsumXY_reg_n_0_[30] ;
  wire \colsumXY_reg_n_0_[31] ;
  wire \colsumXY_reg_n_0_[32] ;
  wire \colsumXY_reg_n_0_[33] ;
  wire \colsumXY_reg_n_0_[34] ;
  wire \colsumXY_reg_n_0_[35] ;
  wire \colsumXY_reg_n_0_[36] ;
  wire \colsumXY_reg_n_0_[37] ;
  wire \colsumXY_reg_n_0_[38] ;
  wire \colsumXY_reg_n_0_[39] ;
  wire \colsumXY_reg_n_0_[3] ;
  wire \colsumXY_reg_n_0_[40] ;
  wire \colsumXY_reg_n_0_[41] ;
  wire \colsumXY_reg_n_0_[42] ;
  wire \colsumXY_reg_n_0_[43] ;
  wire \colsumXY_reg_n_0_[44] ;
  wire \colsumXY_reg_n_0_[45] ;
  wire \colsumXY_reg_n_0_[46] ;
  wire \colsumXY_reg_n_0_[47] ;
  wire \colsumXY_reg_n_0_[48] ;
  wire \colsumXY_reg_n_0_[49] ;
  wire \colsumXY_reg_n_0_[4] ;
  wire \colsumXY_reg_n_0_[50] ;
  wire \colsumXY_reg_n_0_[51] ;
  wire \colsumXY_reg_n_0_[52] ;
  wire \colsumXY_reg_n_0_[53] ;
  wire \colsumXY_reg_n_0_[54] ;
  wire \colsumXY_reg_n_0_[55] ;
  wire \colsumXY_reg_n_0_[56] ;
  wire \colsumXY_reg_n_0_[57] ;
  wire \colsumXY_reg_n_0_[58] ;
  wire \colsumXY_reg_n_0_[59] ;
  wire \colsumXY_reg_n_0_[5] ;
  wire \colsumXY_reg_n_0_[60] ;
  wire \colsumXY_reg_n_0_[61] ;
  wire \colsumXY_reg_n_0_[62] ;
  wire \colsumXY_reg_n_0_[63] ;
  wire \colsumXY_reg_n_0_[64] ;
  wire \colsumXY_reg_n_0_[65] ;
  wire \colsumXY_reg_n_0_[66] ;
  wire \colsumXY_reg_n_0_[67] ;
  wire \colsumXY_reg_n_0_[68] ;
  wire \colsumXY_reg_n_0_[69] ;
  wire \colsumXY_reg_n_0_[6] ;
  wire \colsumXY_reg_n_0_[70] ;
  wire \colsumXY_reg_n_0_[71] ;
  wire \colsumXY_reg_n_0_[72] ;
  wire \colsumXY_reg_n_0_[73] ;
  wire \colsumXY_reg_n_0_[74] ;
  wire \colsumXY_reg_n_0_[75] ;
  wire \colsumXY_reg_n_0_[76] ;
  wire \colsumXY_reg_n_0_[77] ;
  wire \colsumXY_reg_n_0_[78] ;
  wire \colsumXY_reg_n_0_[79] ;
  wire \colsumXY_reg_n_0_[7] ;
  wire \colsumXY_reg_n_0_[80] ;
  wire \colsumXY_reg_n_0_[81] ;
  wire \colsumXY_reg_n_0_[82] ;
  wire \colsumXY_reg_n_0_[83] ;
  wire \colsumXY_reg_n_0_[84] ;
  wire \colsumXY_reg_n_0_[85] ;
  wire \colsumXY_reg_n_0_[86] ;
  wire \colsumXY_reg_n_0_[87] ;
  wire \colsumXY_reg_n_0_[88] ;
  wire \colsumXY_reg_n_0_[89] ;
  wire \colsumXY_reg_n_0_[8] ;
  wire \colsumXY_reg_n_0_[90] ;
  wire \colsumXY_reg_n_0_[91] ;
  wire \colsumXY_reg_n_0_[92] ;
  wire \colsumXY_reg_n_0_[93] ;
  wire \colsumXY_reg_n_0_[94] ;
  wire \colsumXY_reg_n_0_[95] ;
  wire \colsumXY_reg_n_0_[96] ;
  wire \colsumXY_reg_n_0_[97] ;
  wire \colsumXY_reg_n_0_[98] ;
  wire \colsumXY_reg_n_0_[99] ;
  wire \colsumXY_reg_n_0_[9] ;
  wire \colsumX[100]_i_1_n_0 ;
  wire \colsumX[101]_i_1_n_0 ;
  wire \colsumX[102]_i_1_n_0 ;
  wire \colsumX[103]_i_1_n_0 ;
  wire \colsumX[104]_i_1_n_0 ;
  wire \colsumX[104]_i_2_n_0 ;
  wire \colsumX[20]_i_1_n_0 ;
  wire \colsumX[21]_i_1_n_0 ;
  wire \colsumX[22]_i_1_n_0 ;
  wire \colsumX[23]_i_1_n_0 ;
  wire \colsumX[24]_i_1_n_0 ;
  wire \colsumX[25]_i_1_n_0 ;
  wire \colsumX[26]_i_1_n_0 ;
  wire \colsumX[27]_i_1_n_0 ;
  wire \colsumX[28]_i_1_n_0 ;
  wire \colsumX[29]_i_1_n_0 ;
  wire \colsumX[30]_i_1_n_0 ;
  wire \colsumX[31]_i_1_n_0 ;
  wire \colsumX[32]_i_1_n_0 ;
  wire \colsumX[33]_i_1_n_0 ;
  wire \colsumX[34]_i_1_n_0 ;
  wire \colsumX[35]_i_1_n_0 ;
  wire \colsumX[36]_i_1_n_0 ;
  wire \colsumX[37]_i_1_n_0 ;
  wire \colsumX[38]_i_1_n_0 ;
  wire \colsumX[39]_i_1_n_0 ;
  wire \colsumX[40]_i_1_n_0 ;
  wire \colsumX[41]_i_1_n_0 ;
  wire \colsumX[41]_i_2_n_0 ;
  wire \colsumX[62]_i_1_n_0 ;
  wire \colsumX[83]_i_1_n_0 ;
  wire \colsumX[84]_i_1_n_0 ;
  wire \colsumX[85]_i_1_n_0 ;
  wire \colsumX[86]_i_1_n_0 ;
  wire \colsumX[87]_i_1_n_0 ;
  wire \colsumX[88]_i_1_n_0 ;
  wire \colsumX[89]_i_1_n_0 ;
  wire \colsumX[90]_i_1_n_0 ;
  wire \colsumX[91]_i_1_n_0 ;
  wire \colsumX[92]_i_1_n_0 ;
  wire \colsumX[93]_i_1_n_0 ;
  wire \colsumX[94]_i_1_n_0 ;
  wire \colsumX[95]_i_1_n_0 ;
  wire \colsumX[96]_i_1_n_0 ;
  wire \colsumX[97]_i_1_n_0 ;
  wire \colsumX[98]_i_1_n_0 ;
  wire \colsumX[99]_i_1_n_0 ;
  wire \colsumX_reg_n_0_[0] ;
  wire \colsumX_reg_n_0_[100] ;
  wire \colsumX_reg_n_0_[101] ;
  wire \colsumX_reg_n_0_[102] ;
  wire \colsumX_reg_n_0_[103] ;
  wire \colsumX_reg_n_0_[104] ;
  wire \colsumX_reg_n_0_[10] ;
  wire \colsumX_reg_n_0_[11] ;
  wire \colsumX_reg_n_0_[12] ;
  wire \colsumX_reg_n_0_[13] ;
  wire \colsumX_reg_n_0_[14] ;
  wire \colsumX_reg_n_0_[15] ;
  wire \colsumX_reg_n_0_[16] ;
  wire \colsumX_reg_n_0_[17] ;
  wire \colsumX_reg_n_0_[18] ;
  wire \colsumX_reg_n_0_[19] ;
  wire \colsumX_reg_n_0_[1] ;
  wire \colsumX_reg_n_0_[20] ;
  wire \colsumX_reg_n_0_[21] ;
  wire \colsumX_reg_n_0_[22] ;
  wire \colsumX_reg_n_0_[23] ;
  wire \colsumX_reg_n_0_[24] ;
  wire \colsumX_reg_n_0_[25] ;
  wire \colsumX_reg_n_0_[26] ;
  wire \colsumX_reg_n_0_[27] ;
  wire \colsumX_reg_n_0_[28] ;
  wire \colsumX_reg_n_0_[29] ;
  wire \colsumX_reg_n_0_[2] ;
  wire \colsumX_reg_n_0_[30] ;
  wire \colsumX_reg_n_0_[31] ;
  wire \colsumX_reg_n_0_[32] ;
  wire \colsumX_reg_n_0_[33] ;
  wire \colsumX_reg_n_0_[34] ;
  wire \colsumX_reg_n_0_[35] ;
  wire \colsumX_reg_n_0_[36] ;
  wire \colsumX_reg_n_0_[37] ;
  wire \colsumX_reg_n_0_[38] ;
  wire \colsumX_reg_n_0_[39] ;
  wire \colsumX_reg_n_0_[3] ;
  wire \colsumX_reg_n_0_[40] ;
  wire \colsumX_reg_n_0_[41] ;
  wire \colsumX_reg_n_0_[42] ;
  wire \colsumX_reg_n_0_[43] ;
  wire \colsumX_reg_n_0_[44] ;
  wire \colsumX_reg_n_0_[45] ;
  wire \colsumX_reg_n_0_[46] ;
  wire \colsumX_reg_n_0_[47] ;
  wire \colsumX_reg_n_0_[48] ;
  wire \colsumX_reg_n_0_[49] ;
  wire \colsumX_reg_n_0_[4] ;
  wire \colsumX_reg_n_0_[50] ;
  wire \colsumX_reg_n_0_[51] ;
  wire \colsumX_reg_n_0_[52] ;
  wire \colsumX_reg_n_0_[53] ;
  wire \colsumX_reg_n_0_[54] ;
  wire \colsumX_reg_n_0_[55] ;
  wire \colsumX_reg_n_0_[56] ;
  wire \colsumX_reg_n_0_[57] ;
  wire \colsumX_reg_n_0_[58] ;
  wire \colsumX_reg_n_0_[59] ;
  wire \colsumX_reg_n_0_[5] ;
  wire \colsumX_reg_n_0_[60] ;
  wire \colsumX_reg_n_0_[61] ;
  wire \colsumX_reg_n_0_[62] ;
  wire \colsumX_reg_n_0_[63] ;
  wire \colsumX_reg_n_0_[64] ;
  wire \colsumX_reg_n_0_[65] ;
  wire \colsumX_reg_n_0_[66] ;
  wire \colsumX_reg_n_0_[67] ;
  wire \colsumX_reg_n_0_[68] ;
  wire \colsumX_reg_n_0_[69] ;
  wire \colsumX_reg_n_0_[6] ;
  wire \colsumX_reg_n_0_[70] ;
  wire \colsumX_reg_n_0_[71] ;
  wire \colsumX_reg_n_0_[72] ;
  wire \colsumX_reg_n_0_[73] ;
  wire \colsumX_reg_n_0_[74] ;
  wire \colsumX_reg_n_0_[75] ;
  wire \colsumX_reg_n_0_[76] ;
  wire \colsumX_reg_n_0_[77] ;
  wire \colsumX_reg_n_0_[78] ;
  wire \colsumX_reg_n_0_[79] ;
  wire \colsumX_reg_n_0_[7] ;
  wire \colsumX_reg_n_0_[80] ;
  wire \colsumX_reg_n_0_[81] ;
  wire \colsumX_reg_n_0_[82] ;
  wire \colsumX_reg_n_0_[83] ;
  wire \colsumX_reg_n_0_[84] ;
  wire \colsumX_reg_n_0_[85] ;
  wire \colsumX_reg_n_0_[86] ;
  wire \colsumX_reg_n_0_[87] ;
  wire \colsumX_reg_n_0_[88] ;
  wire \colsumX_reg_n_0_[89] ;
  wire \colsumX_reg_n_0_[8] ;
  wire \colsumX_reg_n_0_[90] ;
  wire \colsumX_reg_n_0_[91] ;
  wire \colsumX_reg_n_0_[92] ;
  wire \colsumX_reg_n_0_[93] ;
  wire \colsumX_reg_n_0_[94] ;
  wire \colsumX_reg_n_0_[95] ;
  wire \colsumX_reg_n_0_[96] ;
  wire \colsumX_reg_n_0_[97] ;
  wire \colsumX_reg_n_0_[98] ;
  wire \colsumX_reg_n_0_[99] ;
  wire \colsumX_reg_n_0_[9] ;
  wire [41:21]colsumY;
  wire [20:0]colsumY4p1;
  wire \colsumY4p1[0]_i_1_n_0 ;
  wire \colsumY4p1[10]_i_1_n_0 ;
  wire \colsumY4p1[11]_i_1_n_0 ;
  wire \colsumY4p1[12]_i_1_n_0 ;
  wire \colsumY4p1[13]_i_1_n_0 ;
  wire \colsumY4p1[14]_i_1_n_0 ;
  wire \colsumY4p1[15]_i_1_n_0 ;
  wire \colsumY4p1[16]_i_1_n_0 ;
  wire \colsumY4p1[17]_i_1_n_0 ;
  wire \colsumY4p1[18]_i_1_n_0 ;
  wire \colsumY4p1[19]_i_1_n_0 ;
  wire \colsumY4p1[1]_i_1_n_0 ;
  wire \colsumY4p1[20]_i_1_n_0 ;
  wire \colsumY4p1[2]_i_1_n_0 ;
  wire \colsumY4p1[3]_i_1_n_0 ;
  wire \colsumY4p1[4]_i_1_n_0 ;
  wire \colsumY4p1[5]_i_1_n_0 ;
  wire \colsumY4p1[6]_i_1_n_0 ;
  wire \colsumY4p1[7]_i_1_n_0 ;
  wire \colsumY4p1[8]_i_1_n_0 ;
  wire \colsumY4p1[9]_i_1_n_0 ;
  wire [20:0]colsumY4p2;
  wire \colsumY4p2[0]_i_1_n_0 ;
  wire \colsumY4p2[10]_i_1_n_0 ;
  wire \colsumY4p2[11]_i_1_n_0 ;
  wire \colsumY4p2[12]_i_1_n_0 ;
  wire \colsumY4p2[13]_i_1_n_0 ;
  wire \colsumY4p2[14]_i_1_n_0 ;
  wire \colsumY4p2[15]_i_1_n_0 ;
  wire \colsumY4p2[16]_i_1_n_0 ;
  wire \colsumY4p2[17]_i_1_n_0 ;
  wire \colsumY4p2[18]_i_1_n_0 ;
  wire \colsumY4p2[19]_i_1_n_0 ;
  wire \colsumY4p2[1]_i_1_n_0 ;
  wire \colsumY4p2[20]_i_1_n_0 ;
  wire \colsumY4p2[2]_i_1_n_0 ;
  wire \colsumY4p2[3]_i_1_n_0 ;
  wire \colsumY4p2[4]_i_1_n_0 ;
  wire \colsumY4p2[5]_i_1_n_0 ;
  wire \colsumY4p2[6]_i_1_n_0 ;
  wire \colsumY4p2[7]_i_1_n_0 ;
  wire \colsumY4p2[8]_i_1_n_0 ;
  wire \colsumY4p2[9]_i_1_n_0 ;
  wire [37:0]colsumYA;
  wire [17:2]colsumYA0;
  wire [17:2]colsumYA00_in;
  wire \colsumYA[0]_i_1_n_0 ;
  wire \colsumYA[10]_i_1_n_0 ;
  wire \colsumYA[11]_i_1_n_0 ;
  wire \colsumYA[12]_i_1_n_0 ;
  wire \colsumYA[13]_i_1_n_0 ;
  wire \colsumYA[14]_i_1_n_0 ;
  wire \colsumYA[15]_i_1_n_0 ;
  wire \colsumYA[16]_i_1_n_0 ;
  wire \colsumYA[17]_i_10_n_0 ;
  wire \colsumYA[17]_i_11_n_0 ;
  wire \colsumYA[17]_i_1_n_0 ;
  wire \colsumYA[17]_i_3_n_0 ;
  wire \colsumYA[17]_i_4_n_0 ;
  wire \colsumYA[17]_i_5_n_0 ;
  wire \colsumYA[17]_i_6_n_0 ;
  wire \colsumYA[17]_i_7_n_0 ;
  wire \colsumYA[17]_i_8_n_0 ;
  wire \colsumYA[17]_i_9_n_0 ;
  wire \colsumYA[18]_i_1_n_0 ;
  wire \colsumYA[19]_i_1_n_0 ;
  wire \colsumYA[1]_i_1_n_0 ;
  wire \colsumYA[20]_i_1_n_0 ;
  wire \colsumYA[21]_i_1_n_0 ;
  wire \colsumYA[22]_i_1_n_0 ;
  wire \colsumYA[23]_i_1_n_0 ;
  wire \colsumYA[24]_i_1_n_0 ;
  wire \colsumYA[25]_i_1_n_0 ;
  wire \colsumYA[26]_i_1_n_0 ;
  wire \colsumYA[27]_i_1_n_0 ;
  wire \colsumYA[28]_i_10_n_0 ;
  wire \colsumYA[28]_i_1_n_0 ;
  wire \colsumYA[28]_i_3_n_0 ;
  wire \colsumYA[28]_i_4_n_0 ;
  wire \colsumYA[28]_i_5_n_0 ;
  wire \colsumYA[28]_i_6_n_0 ;
  wire \colsumYA[28]_i_7_n_0 ;
  wire \colsumYA[28]_i_8_n_0 ;
  wire \colsumYA[28]_i_9_n_0 ;
  wire \colsumYA[29]_i_1_n_0 ;
  wire \colsumYA[2]_i_1_n_0 ;
  wire \colsumYA[30]_i_1_n_0 ;
  wire \colsumYA[31]_i_1_n_0 ;
  wire \colsumYA[32]_i_1_n_0 ;
  wire \colsumYA[33]_i_1_n_0 ;
  wire \colsumYA[34]_i_1_n_0 ;
  wire \colsumYA[35]_i_1_n_0 ;
  wire \colsumYA[36]_i_10_n_0 ;
  wire \colsumYA[36]_i_11_n_0 ;
  wire \colsumYA[36]_i_1_n_0 ;
  wire \colsumYA[36]_i_3_n_0 ;
  wire \colsumYA[36]_i_4_n_0 ;
  wire \colsumYA[36]_i_5_n_0 ;
  wire \colsumYA[36]_i_6_n_0 ;
  wire \colsumYA[36]_i_7_n_0 ;
  wire \colsumYA[36]_i_8_n_0 ;
  wire \colsumYA[36]_i_9_n_0 ;
  wire \colsumYA[37]_i_1_n_0 ;
  wire \colsumYA[3]_i_1_n_0 ;
  wire \colsumYA[4]_i_1_n_0 ;
  wire \colsumYA[5]_i_1_n_0 ;
  wire \colsumYA[6]_i_1_n_0 ;
  wire \colsumYA[7]_i_1_n_0 ;
  wire \colsumYA[8]_i_1_n_0 ;
  wire \colsumYA[9]_i_10_n_0 ;
  wire \colsumYA[9]_i_1_n_0 ;
  wire \colsumYA[9]_i_3_n_0 ;
  wire \colsumYA[9]_i_4_n_0 ;
  wire \colsumYA[9]_i_5_n_0 ;
  wire \colsumYA[9]_i_6_n_0 ;
  wire \colsumYA[9]_i_7_n_0 ;
  wire \colsumYA[9]_i_8_n_0 ;
  wire \colsumYA[9]_i_9_n_0 ;
  wire \colsumYA_reg[17]_i_2_n_0 ;
  wire \colsumYA_reg[17]_i_2_n_1 ;
  wire \colsumYA_reg[17]_i_2_n_2 ;
  wire \colsumYA_reg[17]_i_2_n_3 ;
  wire \colsumYA_reg[17]_i_2_n_4 ;
  wire \colsumYA_reg[17]_i_2_n_5 ;
  wire \colsumYA_reg[17]_i_2_n_6 ;
  wire \colsumYA_reg[17]_i_2_n_7 ;
  wire \colsumYA_reg[18]_i_2_n_7 ;
  wire \colsumYA_reg[28]_i_2_n_0 ;
  wire \colsumYA_reg[28]_i_2_n_1 ;
  wire \colsumYA_reg[28]_i_2_n_2 ;
  wire \colsumYA_reg[28]_i_2_n_3 ;
  wire \colsumYA_reg[28]_i_2_n_4 ;
  wire \colsumYA_reg[28]_i_2_n_5 ;
  wire \colsumYA_reg[28]_i_2_n_6 ;
  wire \colsumYA_reg[28]_i_2_n_7 ;
  wire \colsumYA_reg[36]_i_2_n_0 ;
  wire \colsumYA_reg[36]_i_2_n_1 ;
  wire \colsumYA_reg[36]_i_2_n_2 ;
  wire \colsumYA_reg[36]_i_2_n_3 ;
  wire \colsumYA_reg[36]_i_2_n_4 ;
  wire \colsumYA_reg[36]_i_2_n_5 ;
  wire \colsumYA_reg[36]_i_2_n_6 ;
  wire \colsumYA_reg[36]_i_2_n_7 ;
  wire \colsumYA_reg[37]_i_2_n_7 ;
  wire \colsumYA_reg[9]_i_2_n_0 ;
  wire \colsumYA_reg[9]_i_2_n_1 ;
  wire \colsumYA_reg[9]_i_2_n_2 ;
  wire \colsumYA_reg[9]_i_2_n_3 ;
  wire \colsumYA_reg[9]_i_2_n_4 ;
  wire \colsumYA_reg[9]_i_2_n_5 ;
  wire \colsumYA_reg[9]_i_2_n_6 ;
  wire \colsumYA_reg[9]_i_2_n_7 ;
  wire [19:0]colsumYB;
  wire \colsumYB[15]_i_10_n_0 ;
  wire \colsumYB[15]_i_11_n_0 ;
  wire \colsumYB[15]_i_12_n_0 ;
  wire \colsumYB[15]_i_13_n_0 ;
  wire \colsumYB[15]_i_14_n_0 ;
  wire \colsumYB[15]_i_15_n_0 ;
  wire \colsumYB[15]_i_16_n_0 ;
  wire \colsumYB[15]_i_17_n_0 ;
  wire \colsumYB[15]_i_2_n_0 ;
  wire \colsumYB[15]_i_3_n_0 ;
  wire \colsumYB[15]_i_4_n_0 ;
  wire \colsumYB[15]_i_5_n_0 ;
  wire \colsumYB[15]_i_6_n_0 ;
  wire \colsumYB[15]_i_7_n_0 ;
  wire \colsumYB[15]_i_8_n_0 ;
  wire \colsumYB[15]_i_9_n_0 ;
  wire \colsumYB[19]_i_2_n_0 ;
  wire \colsumYB[19]_i_3_n_0 ;
  wire \colsumYB[19]_i_4_n_0 ;
  wire \colsumYB[19]_i_5_n_0 ;
  wire \colsumYB[19]_i_6_n_0 ;
  wire \colsumYB[19]_i_7_n_0 ;
  wire \colsumYB[19]_i_8_n_0 ;
  wire \colsumYB[7]_i_10_n_0 ;
  wire \colsumYB[7]_i_11_n_0 ;
  wire \colsumYB[7]_i_12_n_0 ;
  wire \colsumYB[7]_i_13_n_0 ;
  wire \colsumYB[7]_i_14_n_0 ;
  wire \colsumYB[7]_i_15_n_0 ;
  wire \colsumYB[7]_i_16_n_0 ;
  wire \colsumYB[7]_i_17_n_0 ;
  wire \colsumYB[7]_i_2_n_0 ;
  wire \colsumYB[7]_i_3_n_0 ;
  wire \colsumYB[7]_i_4_n_0 ;
  wire \colsumYB[7]_i_5_n_0 ;
  wire \colsumYB[7]_i_6_n_0 ;
  wire \colsumYB[7]_i_7_n_0 ;
  wire \colsumYB[7]_i_8_n_0 ;
  wire \colsumYB[7]_i_9_n_0 ;
  wire \colsumYB_reg[15]_i_1_n_0 ;
  wire \colsumYB_reg[15]_i_1_n_1 ;
  wire \colsumYB_reg[15]_i_1_n_10 ;
  wire \colsumYB_reg[15]_i_1_n_11 ;
  wire \colsumYB_reg[15]_i_1_n_12 ;
  wire \colsumYB_reg[15]_i_1_n_13 ;
  wire \colsumYB_reg[15]_i_1_n_14 ;
  wire \colsumYB_reg[15]_i_1_n_15 ;
  wire \colsumYB_reg[15]_i_1_n_2 ;
  wire \colsumYB_reg[15]_i_1_n_3 ;
  wire \colsumYB_reg[15]_i_1_n_4 ;
  wire \colsumYB_reg[15]_i_1_n_5 ;
  wire \colsumYB_reg[15]_i_1_n_6 ;
  wire \colsumYB_reg[15]_i_1_n_7 ;
  wire \colsumYB_reg[15]_i_1_n_8 ;
  wire \colsumYB_reg[15]_i_1_n_9 ;
  wire \colsumYB_reg[19]_i_1_n_12 ;
  wire \colsumYB_reg[19]_i_1_n_13 ;
  wire \colsumYB_reg[19]_i_1_n_14 ;
  wire \colsumYB_reg[19]_i_1_n_15 ;
  wire \colsumYB_reg[19]_i_1_n_5 ;
  wire \colsumYB_reg[19]_i_1_n_6 ;
  wire \colsumYB_reg[19]_i_1_n_7 ;
  wire \colsumYB_reg[7]_i_1_n_0 ;
  wire \colsumYB_reg[7]_i_1_n_1 ;
  wire \colsumYB_reg[7]_i_1_n_10 ;
  wire \colsumYB_reg[7]_i_1_n_11 ;
  wire \colsumYB_reg[7]_i_1_n_12 ;
  wire \colsumYB_reg[7]_i_1_n_13 ;
  wire \colsumYB_reg[7]_i_1_n_14 ;
  wire \colsumYB_reg[7]_i_1_n_15 ;
  wire \colsumYB_reg[7]_i_1_n_2 ;
  wire \colsumYB_reg[7]_i_1_n_3 ;
  wire \colsumYB_reg[7]_i_1_n_4 ;
  wire \colsumYB_reg[7]_i_1_n_5 ;
  wire \colsumYB_reg[7]_i_1_n_6 ;
  wire \colsumYB_reg[7]_i_1_n_7 ;
  wire \colsumYB_reg[7]_i_1_n_8 ;
  wire \colsumYB_reg[7]_i_1_n_9 ;
  wire \colsumYC[15]_i_10_n_0 ;
  wire \colsumYC[15]_i_11_n_0 ;
  wire \colsumYC[15]_i_12_n_0 ;
  wire \colsumYC[15]_i_13_n_0 ;
  wire \colsumYC[15]_i_14_n_0 ;
  wire \colsumYC[15]_i_15_n_0 ;
  wire \colsumYC[15]_i_16_n_0 ;
  wire \colsumYC[15]_i_17_n_0 ;
  wire \colsumYC[15]_i_2_n_0 ;
  wire \colsumYC[15]_i_3_n_0 ;
  wire \colsumYC[15]_i_4_n_0 ;
  wire \colsumYC[15]_i_5_n_0 ;
  wire \colsumYC[15]_i_6_n_0 ;
  wire \colsumYC[15]_i_7_n_0 ;
  wire \colsumYC[15]_i_8_n_0 ;
  wire \colsumYC[15]_i_9_n_0 ;
  wire \colsumYC[20]_i_10_n_0 ;
  wire \colsumYC[20]_i_2_n_0 ;
  wire \colsumYC[20]_i_3_n_0 ;
  wire \colsumYC[20]_i_4_n_0 ;
  wire \colsumYC[20]_i_5_n_0 ;
  wire \colsumYC[20]_i_6_n_0 ;
  wire \colsumYC[20]_i_7_n_0 ;
  wire \colsumYC[20]_i_8_n_0 ;
  wire \colsumYC[20]_i_9_n_0 ;
  wire \colsumYC[7]_i_10_n_0 ;
  wire \colsumYC[7]_i_11_n_0 ;
  wire \colsumYC[7]_i_12_n_0 ;
  wire \colsumYC[7]_i_13_n_0 ;
  wire \colsumYC[7]_i_14_n_0 ;
  wire \colsumYC[7]_i_15_n_0 ;
  wire \colsumYC[7]_i_16_n_0 ;
  wire \colsumYC[7]_i_2_n_0 ;
  wire \colsumYC[7]_i_3_n_0 ;
  wire \colsumYC[7]_i_4_n_0 ;
  wire \colsumYC[7]_i_5_n_0 ;
  wire \colsumYC[7]_i_6_n_0 ;
  wire \colsumYC[7]_i_7_n_0 ;
  wire \colsumYC[7]_i_8_n_0 ;
  wire \colsumYC[7]_i_9_n_0 ;
  wire \colsumYC_reg[15]_i_1_n_0 ;
  wire \colsumYC_reg[15]_i_1_n_1 ;
  wire \colsumYC_reg[15]_i_1_n_10 ;
  wire \colsumYC_reg[15]_i_1_n_11 ;
  wire \colsumYC_reg[15]_i_1_n_12 ;
  wire \colsumYC_reg[15]_i_1_n_13 ;
  wire \colsumYC_reg[15]_i_1_n_14 ;
  wire \colsumYC_reg[15]_i_1_n_15 ;
  wire \colsumYC_reg[15]_i_1_n_2 ;
  wire \colsumYC_reg[15]_i_1_n_3 ;
  wire \colsumYC_reg[15]_i_1_n_4 ;
  wire \colsumYC_reg[15]_i_1_n_5 ;
  wire \colsumYC_reg[15]_i_1_n_6 ;
  wire \colsumYC_reg[15]_i_1_n_7 ;
  wire \colsumYC_reg[15]_i_1_n_8 ;
  wire \colsumYC_reg[15]_i_1_n_9 ;
  wire \colsumYC_reg[20]_i_1_n_11 ;
  wire \colsumYC_reg[20]_i_1_n_12 ;
  wire \colsumYC_reg[20]_i_1_n_13 ;
  wire \colsumYC_reg[20]_i_1_n_14 ;
  wire \colsumYC_reg[20]_i_1_n_15 ;
  wire \colsumYC_reg[20]_i_1_n_4 ;
  wire \colsumYC_reg[20]_i_1_n_5 ;
  wire \colsumYC_reg[20]_i_1_n_6 ;
  wire \colsumYC_reg[20]_i_1_n_7 ;
  wire \colsumYC_reg[7]_i_1_n_0 ;
  wire \colsumYC_reg[7]_i_1_n_1 ;
  wire \colsumYC_reg[7]_i_1_n_10 ;
  wire \colsumYC_reg[7]_i_1_n_11 ;
  wire \colsumYC_reg[7]_i_1_n_12 ;
  wire \colsumYC_reg[7]_i_1_n_13 ;
  wire \colsumYC_reg[7]_i_1_n_14 ;
  wire \colsumYC_reg[7]_i_1_n_15 ;
  wire \colsumYC_reg[7]_i_1_n_2 ;
  wire \colsumYC_reg[7]_i_1_n_3 ;
  wire \colsumYC_reg[7]_i_1_n_4 ;
  wire \colsumYC_reg[7]_i_1_n_5 ;
  wire \colsumYC_reg[7]_i_1_n_6 ;
  wire \colsumYC_reg[7]_i_1_n_7 ;
  wire \colsumYC_reg[7]_i_1_n_8 ;
  wire \colsumYC_reg[7]_i_1_n_9 ;
  wire \colsumY[100]_i_1_n_0 ;
  wire \colsumY[101]_i_1_n_0 ;
  wire \colsumY[102]_i_1_n_0 ;
  wire \colsumY[103]_i_1_n_0 ;
  wire \colsumY[104]_i_1_n_0 ;
  wire \colsumY[21]_i_1_n_0 ;
  wire \colsumY[22]_i_1_n_0 ;
  wire \colsumY[23]_i_1_n_0 ;
  wire \colsumY[24]_i_1_n_0 ;
  wire \colsumY[25]_i_1_n_0 ;
  wire \colsumY[26]_i_1_n_0 ;
  wire \colsumY[27]_i_1_n_0 ;
  wire \colsumY[28]_i_1_n_0 ;
  wire \colsumY[29]_i_1_n_0 ;
  wire \colsumY[30]_i_1_n_0 ;
  wire \colsumY[31]_i_1_n_0 ;
  wire \colsumY[32]_i_1_n_0 ;
  wire \colsumY[33]_i_1_n_0 ;
  wire \colsumY[34]_i_1_n_0 ;
  wire \colsumY[35]_i_1_n_0 ;
  wire \colsumY[36]_i_1_n_0 ;
  wire \colsumY[37]_i_1_n_0 ;
  wire \colsumY[38]_i_1_n_0 ;
  wire \colsumY[39]_i_1_n_0 ;
  wire \colsumY[40]_i_1_n_0 ;
  wire \colsumY[41]_i_1_n_0 ;
  wire \colsumY[84]_i_1_n_0 ;
  wire \colsumY[85]_i_1_n_0 ;
  wire \colsumY[86]_i_1_n_0 ;
  wire \colsumY[87]_i_1_n_0 ;
  wire \colsumY[88]_i_1_n_0 ;
  wire \colsumY[89]_i_1_n_0 ;
  wire \colsumY[90]_i_1_n_0 ;
  wire \colsumY[91]_i_1_n_0 ;
  wire \colsumY[92]_i_1_n_0 ;
  wire \colsumY[93]_i_1_n_0 ;
  wire \colsumY[94]_i_1_n_0 ;
  wire \colsumY[95]_i_1_n_0 ;
  wire \colsumY[96]_i_1_n_0 ;
  wire \colsumY[97]_i_1_n_0 ;
  wire \colsumY[98]_i_1_n_0 ;
  wire \colsumY[99]_i_1_n_0 ;
  wire \colsumY_reg_n_0_[0] ;
  wire \colsumY_reg_n_0_[100] ;
  wire \colsumY_reg_n_0_[101] ;
  wire \colsumY_reg_n_0_[102] ;
  wire \colsumY_reg_n_0_[103] ;
  wire \colsumY_reg_n_0_[104] ;
  wire \colsumY_reg_n_0_[10] ;
  wire \colsumY_reg_n_0_[11] ;
  wire \colsumY_reg_n_0_[12] ;
  wire \colsumY_reg_n_0_[13] ;
  wire \colsumY_reg_n_0_[14] ;
  wire \colsumY_reg_n_0_[15] ;
  wire \colsumY_reg_n_0_[16] ;
  wire \colsumY_reg_n_0_[17] ;
  wire \colsumY_reg_n_0_[18] ;
  wire \colsumY_reg_n_0_[19] ;
  wire \colsumY_reg_n_0_[1] ;
  wire \colsumY_reg_n_0_[20] ;
  wire \colsumY_reg_n_0_[21] ;
  wire \colsumY_reg_n_0_[22] ;
  wire \colsumY_reg_n_0_[23] ;
  wire \colsumY_reg_n_0_[24] ;
  wire \colsumY_reg_n_0_[25] ;
  wire \colsumY_reg_n_0_[26] ;
  wire \colsumY_reg_n_0_[27] ;
  wire \colsumY_reg_n_0_[28] ;
  wire \colsumY_reg_n_0_[29] ;
  wire \colsumY_reg_n_0_[2] ;
  wire \colsumY_reg_n_0_[30] ;
  wire \colsumY_reg_n_0_[31] ;
  wire \colsumY_reg_n_0_[32] ;
  wire \colsumY_reg_n_0_[33] ;
  wire \colsumY_reg_n_0_[34] ;
  wire \colsumY_reg_n_0_[35] ;
  wire \colsumY_reg_n_0_[36] ;
  wire \colsumY_reg_n_0_[37] ;
  wire \colsumY_reg_n_0_[38] ;
  wire \colsumY_reg_n_0_[39] ;
  wire \colsumY_reg_n_0_[3] ;
  wire \colsumY_reg_n_0_[40] ;
  wire \colsumY_reg_n_0_[41] ;
  wire \colsumY_reg_n_0_[42] ;
  wire \colsumY_reg_n_0_[43] ;
  wire \colsumY_reg_n_0_[44] ;
  wire \colsumY_reg_n_0_[45] ;
  wire \colsumY_reg_n_0_[46] ;
  wire \colsumY_reg_n_0_[47] ;
  wire \colsumY_reg_n_0_[48] ;
  wire \colsumY_reg_n_0_[49] ;
  wire \colsumY_reg_n_0_[4] ;
  wire \colsumY_reg_n_0_[50] ;
  wire \colsumY_reg_n_0_[51] ;
  wire \colsumY_reg_n_0_[52] ;
  wire \colsumY_reg_n_0_[53] ;
  wire \colsumY_reg_n_0_[54] ;
  wire \colsumY_reg_n_0_[55] ;
  wire \colsumY_reg_n_0_[56] ;
  wire \colsumY_reg_n_0_[57] ;
  wire \colsumY_reg_n_0_[58] ;
  wire \colsumY_reg_n_0_[59] ;
  wire \colsumY_reg_n_0_[5] ;
  wire \colsumY_reg_n_0_[60] ;
  wire \colsumY_reg_n_0_[61] ;
  wire \colsumY_reg_n_0_[62] ;
  wire \colsumY_reg_n_0_[63] ;
  wire \colsumY_reg_n_0_[64] ;
  wire \colsumY_reg_n_0_[65] ;
  wire \colsumY_reg_n_0_[66] ;
  wire \colsumY_reg_n_0_[67] ;
  wire \colsumY_reg_n_0_[68] ;
  wire \colsumY_reg_n_0_[69] ;
  wire \colsumY_reg_n_0_[6] ;
  wire \colsumY_reg_n_0_[70] ;
  wire \colsumY_reg_n_0_[71] ;
  wire \colsumY_reg_n_0_[72] ;
  wire \colsumY_reg_n_0_[73] ;
  wire \colsumY_reg_n_0_[74] ;
  wire \colsumY_reg_n_0_[75] ;
  wire \colsumY_reg_n_0_[76] ;
  wire \colsumY_reg_n_0_[77] ;
  wire \colsumY_reg_n_0_[78] ;
  wire \colsumY_reg_n_0_[79] ;
  wire \colsumY_reg_n_0_[7] ;
  wire \colsumY_reg_n_0_[80] ;
  wire \colsumY_reg_n_0_[81] ;
  wire \colsumY_reg_n_0_[82] ;
  wire \colsumY_reg_n_0_[83] ;
  wire \colsumY_reg_n_0_[84] ;
  wire \colsumY_reg_n_0_[85] ;
  wire \colsumY_reg_n_0_[86] ;
  wire \colsumY_reg_n_0_[87] ;
  wire \colsumY_reg_n_0_[88] ;
  wire \colsumY_reg_n_0_[89] ;
  wire \colsumY_reg_n_0_[8] ;
  wire \colsumY_reg_n_0_[90] ;
  wire \colsumY_reg_n_0_[91] ;
  wire \colsumY_reg_n_0_[92] ;
  wire \colsumY_reg_n_0_[93] ;
  wire \colsumY_reg_n_0_[94] ;
  wire \colsumY_reg_n_0_[95] ;
  wire \colsumY_reg_n_0_[96] ;
  wire \colsumY_reg_n_0_[97] ;
  wire \colsumY_reg_n_0_[98] ;
  wire \colsumY_reg_n_0_[99] ;
  wire \colsumY_reg_n_0_[9] ;
  wire coobufCornerToHostifAXIS_tready;
  wire \dIgrm1[0]_i_1_n_0 ;
  wire \dIgrm1[10]_i_1_n_0 ;
  wire \dIgrm1[11]_i_1_n_0 ;
  wire \dIgrm1[12]_i_1_n_0 ;
  wire \dIgrm1[13]_i_1_n_0 ;
  wire \dIgrm1[14]_i_1_n_0 ;
  wire \dIgrm1[15]_i_1_n_0 ;
  wire \dIgrm1[16]_i_1_n_0 ;
  wire \dIgrm1[17]_i_1_n_0 ;
  wire \dIgrm1[18]_i_1_n_0 ;
  wire \dIgrm1[19]_i_1_n_0 ;
  wire \dIgrm1[1]_i_1_n_0 ;
  wire \dIgrm1[20]_i_1_n_0 ;
  wire \dIgrm1[21]_i_1_n_0 ;
  wire \dIgrm1[22]_i_1_n_0 ;
  wire \dIgrm1[23]_i_1_n_0 ;
  wire \dIgrm1[24]_i_1_n_0 ;
  wire \dIgrm1[25]_i_1_n_0 ;
  wire \dIgrm1[26]_i_1_n_0 ;
  wire \dIgrm1[27]_i_1_n_0 ;
  wire \dIgrm1[28]_i_1_n_0 ;
  wire \dIgrm1[29]_i_1_n_0 ;
  wire \dIgrm1[2]_i_1_n_0 ;
  wire \dIgrm1[30]_i_1_n_0 ;
  wire \dIgrm1[31]_i_1_n_0 ;
  wire \dIgrm1[32]_i_1_n_0 ;
  wire \dIgrm1[33]_i_1_n_0 ;
  wire \dIgrm1[34]_i_1_n_0 ;
  wire \dIgrm1[35]_i_1_n_0 ;
  wire \dIgrm1[36]_i_1_n_0 ;
  wire \dIgrm1[37]_i_1_n_0 ;
  wire \dIgrm1[38]_i_1_n_0 ;
  wire \dIgrm1[39]_i_2_n_0 ;
  wire \dIgrm1[3]_i_1_n_0 ;
  wire \dIgrm1[4]_i_1_n_0 ;
  wire \dIgrm1[5]_i_1_n_0 ;
  wire \dIgrm1[6]_i_1_n_0 ;
  wire \dIgrm1[7]_i_1_n_0 ;
  wire \dIgrm1[8]_i_1_n_0 ;
  wire \dIgrm1[9]_i_1_n_0 ;
  wire \dIgrm1_reg_n_0_[0] ;
  wire \dIgrm1_reg_n_0_[10] ;
  wire \dIgrm1_reg_n_0_[11] ;
  wire \dIgrm1_reg_n_0_[12] ;
  wire \dIgrm1_reg_n_0_[13] ;
  wire \dIgrm1_reg_n_0_[14] ;
  wire \dIgrm1_reg_n_0_[15] ;
  wire \dIgrm1_reg_n_0_[16] ;
  wire \dIgrm1_reg_n_0_[17] ;
  wire \dIgrm1_reg_n_0_[18] ;
  wire \dIgrm1_reg_n_0_[19] ;
  wire \dIgrm1_reg_n_0_[1] ;
  wire \dIgrm1_reg_n_0_[20] ;
  wire \dIgrm1_reg_n_0_[21] ;
  wire \dIgrm1_reg_n_0_[22] ;
  wire \dIgrm1_reg_n_0_[23] ;
  wire \dIgrm1_reg_n_0_[24] ;
  wire \dIgrm1_reg_n_0_[25] ;
  wire \dIgrm1_reg_n_0_[26] ;
  wire \dIgrm1_reg_n_0_[27] ;
  wire \dIgrm1_reg_n_0_[28] ;
  wire \dIgrm1_reg_n_0_[29] ;
  wire \dIgrm1_reg_n_0_[2] ;
  wire \dIgrm1_reg_n_0_[30] ;
  wire \dIgrm1_reg_n_0_[31] ;
  wire \dIgrm1_reg_n_0_[32] ;
  wire \dIgrm1_reg_n_0_[33] ;
  wire \dIgrm1_reg_n_0_[34] ;
  wire \dIgrm1_reg_n_0_[35] ;
  wire \dIgrm1_reg_n_0_[36] ;
  wire \dIgrm1_reg_n_0_[37] ;
  wire \dIgrm1_reg_n_0_[38] ;
  wire \dIgrm1_reg_n_0_[39] ;
  wire \dIgrm1_reg_n_0_[3] ;
  wire \dIgrm1_reg_n_0_[4] ;
  wire \dIgrm1_reg_n_0_[5] ;
  wire \dIgrm1_reg_n_0_[6] ;
  wire \dIgrm1_reg_n_0_[7] ;
  wire \dIgrm1_reg_n_0_[8] ;
  wire \dIgrm1_reg_n_0_[9] ;
  wire \dImd[39]_i_1_n_0 ;
  wire \dImd[39]_i_3_n_0 ;
  wire \dImd[39]_i_5_n_0 ;
  wire \dImd_reg_n_0_[0] ;
  wire \dImd_reg_n_0_[1] ;
  wire \dImd_reg_n_0_[2] ;
  wire \dImd_reg_n_0_[3] ;
  wire \dImd_reg_n_0_[4] ;
  wire \dImd_reg_n_0_[5] ;
  wire \dImd_reg_n_0_[6] ;
  wire \dImd_reg_n_0_[7] ;
  wire [7:0]data0;
  wire [7:0]data1;
  wire [7:0]data2;
  wire [7:0]data3;
  wire [46:0]diffI_II;
  wire \diffI_II[15]_i_10_n_0 ;
  wire \diffI_II[15]_i_11_n_0 ;
  wire \diffI_II[15]_i_12_n_0 ;
  wire \diffI_II[15]_i_13_n_0 ;
  wire \diffI_II[15]_i_14_n_0 ;
  wire \diffI_II[15]_i_15_n_0 ;
  wire \diffI_II[15]_i_16_n_0 ;
  wire \diffI_II[15]_i_17_n_0 ;
  wire \diffI_II[15]_i_2_n_0 ;
  wire \diffI_II[15]_i_3_n_0 ;
  wire \diffI_II[15]_i_4_n_0 ;
  wire \diffI_II[15]_i_5_n_0 ;
  wire \diffI_II[15]_i_6_n_0 ;
  wire \diffI_II[15]_i_7_n_0 ;
  wire \diffI_II[15]_i_8_n_0 ;
  wire \diffI_II[15]_i_9_n_0 ;
  wire \diffI_II[23]_i_10_n_0 ;
  wire \diffI_II[23]_i_11_n_0 ;
  wire \diffI_II[23]_i_12_n_0 ;
  wire \diffI_II[23]_i_13_n_0 ;
  wire \diffI_II[23]_i_14_n_0 ;
  wire \diffI_II[23]_i_15_n_0 ;
  wire \diffI_II[23]_i_16_n_0 ;
  wire \diffI_II[23]_i_17_n_0 ;
  wire \diffI_II[23]_i_2_n_0 ;
  wire \diffI_II[23]_i_3_n_0 ;
  wire \diffI_II[23]_i_4_n_0 ;
  wire \diffI_II[23]_i_5_n_0 ;
  wire \diffI_II[23]_i_6_n_0 ;
  wire \diffI_II[23]_i_7_n_0 ;
  wire \diffI_II[23]_i_8_n_0 ;
  wire \diffI_II[23]_i_9_n_0 ;
  wire \diffI_II[31]_i_10_n_0 ;
  wire \diffI_II[31]_i_11_n_0 ;
  wire \diffI_II[31]_i_12_n_0 ;
  wire \diffI_II[31]_i_13_n_0 ;
  wire \diffI_II[31]_i_14_n_0 ;
  wire \diffI_II[31]_i_15_n_0 ;
  wire \diffI_II[31]_i_16_n_0 ;
  wire \diffI_II[31]_i_17_n_0 ;
  wire \diffI_II[31]_i_2_n_0 ;
  wire \diffI_II[31]_i_3_n_0 ;
  wire \diffI_II[31]_i_4_n_0 ;
  wire \diffI_II[31]_i_5_n_0 ;
  wire \diffI_II[31]_i_6_n_0 ;
  wire \diffI_II[31]_i_7_n_0 ;
  wire \diffI_II[31]_i_8_n_0 ;
  wire \diffI_II[31]_i_9_n_0 ;
  wire \diffI_II[39]_i_10_n_0 ;
  wire \diffI_II[39]_i_11_n_0 ;
  wire \diffI_II[39]_i_12_n_0 ;
  wire \diffI_II[39]_i_13_n_0 ;
  wire \diffI_II[39]_i_14_n_0 ;
  wire \diffI_II[39]_i_15_n_0 ;
  wire \diffI_II[39]_i_16_n_0 ;
  wire \diffI_II[39]_i_17_n_0 ;
  wire \diffI_II[39]_i_2_n_0 ;
  wire \diffI_II[39]_i_3_n_0 ;
  wire \diffI_II[39]_i_4_n_0 ;
  wire \diffI_II[39]_i_5_n_0 ;
  wire \diffI_II[39]_i_6_n_0 ;
  wire \diffI_II[39]_i_7_n_0 ;
  wire \diffI_II[39]_i_8_n_0 ;
  wire \diffI_II[39]_i_9_n_0 ;
  wire \diffI_II[46]_i_10_n_0 ;
  wire \diffI_II[46]_i_11_n_0 ;
  wire \diffI_II[46]_i_12_n_0 ;
  wire \diffI_II[46]_i_13_n_0 ;
  wire \diffI_II[46]_i_14_n_0 ;
  wire \diffI_II[46]_i_2_n_0 ;
  wire \diffI_II[46]_i_3_n_0 ;
  wire \diffI_II[46]_i_4_n_0 ;
  wire \diffI_II[46]_i_5_n_0 ;
  wire \diffI_II[46]_i_6_n_0 ;
  wire \diffI_II[46]_i_7_n_0 ;
  wire \diffI_II[46]_i_8_n_0 ;
  wire \diffI_II[46]_i_9_n_0 ;
  wire \diffI_II[7]_i_10_n_0 ;
  wire \diffI_II[7]_i_11_n_0 ;
  wire \diffI_II[7]_i_12_n_0 ;
  wire \diffI_II[7]_i_13_n_0 ;
  wire \diffI_II[7]_i_14_n_0 ;
  wire \diffI_II[7]_i_15_n_0 ;
  wire \diffI_II[7]_i_16_n_0 ;
  wire \diffI_II[7]_i_17_n_0 ;
  wire \diffI_II[7]_i_2_n_0 ;
  wire \diffI_II[7]_i_3_n_0 ;
  wire \diffI_II[7]_i_4_n_0 ;
  wire \diffI_II[7]_i_5_n_0 ;
  wire \diffI_II[7]_i_6_n_0 ;
  wire \diffI_II[7]_i_7_n_0 ;
  wire \diffI_II[7]_i_8_n_0 ;
  wire \diffI_II[7]_i_9_n_0 ;
  wire \diffI_II_reg[15]_i_1_n_0 ;
  wire \diffI_II_reg[15]_i_1_n_1 ;
  wire \diffI_II_reg[15]_i_1_n_10 ;
  wire \diffI_II_reg[15]_i_1_n_11 ;
  wire \diffI_II_reg[15]_i_1_n_12 ;
  wire \diffI_II_reg[15]_i_1_n_13 ;
  wire \diffI_II_reg[15]_i_1_n_14 ;
  wire \diffI_II_reg[15]_i_1_n_15 ;
  wire \diffI_II_reg[15]_i_1_n_2 ;
  wire \diffI_II_reg[15]_i_1_n_3 ;
  wire \diffI_II_reg[15]_i_1_n_4 ;
  wire \diffI_II_reg[15]_i_1_n_5 ;
  wire \diffI_II_reg[15]_i_1_n_6 ;
  wire \diffI_II_reg[15]_i_1_n_7 ;
  wire \diffI_II_reg[15]_i_1_n_8 ;
  wire \diffI_II_reg[15]_i_1_n_9 ;
  wire \diffI_II_reg[23]_i_1_n_0 ;
  wire \diffI_II_reg[23]_i_1_n_1 ;
  wire \diffI_II_reg[23]_i_1_n_10 ;
  wire \diffI_II_reg[23]_i_1_n_11 ;
  wire \diffI_II_reg[23]_i_1_n_12 ;
  wire \diffI_II_reg[23]_i_1_n_13 ;
  wire \diffI_II_reg[23]_i_1_n_14 ;
  wire \diffI_II_reg[23]_i_1_n_15 ;
  wire \diffI_II_reg[23]_i_1_n_2 ;
  wire \diffI_II_reg[23]_i_1_n_3 ;
  wire \diffI_II_reg[23]_i_1_n_4 ;
  wire \diffI_II_reg[23]_i_1_n_5 ;
  wire \diffI_II_reg[23]_i_1_n_6 ;
  wire \diffI_II_reg[23]_i_1_n_7 ;
  wire \diffI_II_reg[23]_i_1_n_8 ;
  wire \diffI_II_reg[23]_i_1_n_9 ;
  wire \diffI_II_reg[31]_i_1_n_0 ;
  wire \diffI_II_reg[31]_i_1_n_1 ;
  wire \diffI_II_reg[31]_i_1_n_10 ;
  wire \diffI_II_reg[31]_i_1_n_11 ;
  wire \diffI_II_reg[31]_i_1_n_12 ;
  wire \diffI_II_reg[31]_i_1_n_13 ;
  wire \diffI_II_reg[31]_i_1_n_14 ;
  wire \diffI_II_reg[31]_i_1_n_15 ;
  wire \diffI_II_reg[31]_i_1_n_2 ;
  wire \diffI_II_reg[31]_i_1_n_3 ;
  wire \diffI_II_reg[31]_i_1_n_4 ;
  wire \diffI_II_reg[31]_i_1_n_5 ;
  wire \diffI_II_reg[31]_i_1_n_6 ;
  wire \diffI_II_reg[31]_i_1_n_7 ;
  wire \diffI_II_reg[31]_i_1_n_8 ;
  wire \diffI_II_reg[31]_i_1_n_9 ;
  wire \diffI_II_reg[39]_i_1_n_0 ;
  wire \diffI_II_reg[39]_i_1_n_1 ;
  wire \diffI_II_reg[39]_i_1_n_10 ;
  wire \diffI_II_reg[39]_i_1_n_11 ;
  wire \diffI_II_reg[39]_i_1_n_12 ;
  wire \diffI_II_reg[39]_i_1_n_13 ;
  wire \diffI_II_reg[39]_i_1_n_14 ;
  wire \diffI_II_reg[39]_i_1_n_15 ;
  wire \diffI_II_reg[39]_i_1_n_2 ;
  wire \diffI_II_reg[39]_i_1_n_3 ;
  wire \diffI_II_reg[39]_i_1_n_4 ;
  wire \diffI_II_reg[39]_i_1_n_5 ;
  wire \diffI_II_reg[39]_i_1_n_6 ;
  wire \diffI_II_reg[39]_i_1_n_7 ;
  wire \diffI_II_reg[39]_i_1_n_8 ;
  wire \diffI_II_reg[39]_i_1_n_9 ;
  wire \diffI_II_reg[46]_i_1_n_10 ;
  wire \diffI_II_reg[46]_i_1_n_11 ;
  wire \diffI_II_reg[46]_i_1_n_12 ;
  wire \diffI_II_reg[46]_i_1_n_13 ;
  wire \diffI_II_reg[46]_i_1_n_14 ;
  wire \diffI_II_reg[46]_i_1_n_15 ;
  wire \diffI_II_reg[46]_i_1_n_2 ;
  wire \diffI_II_reg[46]_i_1_n_3 ;
  wire \diffI_II_reg[46]_i_1_n_4 ;
  wire \diffI_II_reg[46]_i_1_n_5 ;
  wire \diffI_II_reg[46]_i_1_n_6 ;
  wire \diffI_II_reg[46]_i_1_n_7 ;
  wire \diffI_II_reg[46]_i_1_n_9 ;
  wire \diffI_II_reg[7]_i_1_n_0 ;
  wire \diffI_II_reg[7]_i_1_n_1 ;
  wire \diffI_II_reg[7]_i_1_n_10 ;
  wire \diffI_II_reg[7]_i_1_n_11 ;
  wire \diffI_II_reg[7]_i_1_n_12 ;
  wire \diffI_II_reg[7]_i_1_n_13 ;
  wire \diffI_II_reg[7]_i_1_n_14 ;
  wire \diffI_II_reg[7]_i_1_n_15 ;
  wire \diffI_II_reg[7]_i_1_n_2 ;
  wire \diffI_II_reg[7]_i_1_n_3 ;
  wire \diffI_II_reg[7]_i_1_n_4 ;
  wire \diffI_II_reg[7]_i_1_n_5 ;
  wire \diffI_II_reg[7]_i_1_n_6 ;
  wire \diffI_II_reg[7]_i_1_n_7 ;
  wire \diffI_II_reg[7]_i_1_n_8 ;
  wire \diffI_II_reg[7]_i_1_n_9 ;
  wire [46:0]diffI_IIp1;
  wire \diffI_IIp1[0]_i_1_n_0 ;
  wire \diffI_IIp1[10]_i_1_n_0 ;
  wire \diffI_IIp1[11]_i_1_n_0 ;
  wire \diffI_IIp1[12]_i_1_n_0 ;
  wire \diffI_IIp1[13]_i_1_n_0 ;
  wire \diffI_IIp1[14]_i_1_n_0 ;
  wire \diffI_IIp1[15]_i_1_n_0 ;
  wire \diffI_IIp1[16]_i_1_n_0 ;
  wire \diffI_IIp1[17]_i_1_n_0 ;
  wire \diffI_IIp1[18]_i_1_n_0 ;
  wire \diffI_IIp1[19]_i_1_n_0 ;
  wire \diffI_IIp1[1]_i_1_n_0 ;
  wire \diffI_IIp1[20]_i_1_n_0 ;
  wire \diffI_IIp1[21]_i_1_n_0 ;
  wire \diffI_IIp1[22]_i_1_n_0 ;
  wire \diffI_IIp1[23]_i_1_n_0 ;
  wire \diffI_IIp1[24]_i_1_n_0 ;
  wire \diffI_IIp1[25]_i_1_n_0 ;
  wire \diffI_IIp1[26]_i_1_n_0 ;
  wire \diffI_IIp1[27]_i_1_n_0 ;
  wire \diffI_IIp1[28]_i_1_n_0 ;
  wire \diffI_IIp1[29]_i_1_n_0 ;
  wire \diffI_IIp1[2]_i_1_n_0 ;
  wire \diffI_IIp1[30]_i_1_n_0 ;
  wire \diffI_IIp1[31]_i_1_n_0 ;
  wire \diffI_IIp1[32]_i_1_n_0 ;
  wire \diffI_IIp1[33]_i_1_n_0 ;
  wire \diffI_IIp1[34]_i_1_n_0 ;
  wire \diffI_IIp1[35]_i_1_n_0 ;
  wire \diffI_IIp1[36]_i_1_n_0 ;
  wire \diffI_IIp1[37]_i_1_n_0 ;
  wire \diffI_IIp1[38]_i_1_n_0 ;
  wire \diffI_IIp1[39]_i_1_n_0 ;
  wire \diffI_IIp1[3]_i_1_n_0 ;
  wire \diffI_IIp1[40]_i_1_n_0 ;
  wire \diffI_IIp1[41]_i_1_n_0 ;
  wire \diffI_IIp1[42]_i_1_n_0 ;
  wire \diffI_IIp1[43]_i_1_n_0 ;
  wire \diffI_IIp1[44]_i_1_n_0 ;
  wire \diffI_IIp1[45]_i_1_n_0 ;
  wire \diffI_IIp1[46]_i_1_n_0 ;
  wire \diffI_IIp1[4]_i_1_n_0 ;
  wire \diffI_IIp1[5]_i_1_n_0 ;
  wire \diffI_IIp1[6]_i_1_n_0 ;
  wire \diffI_IIp1[7]_i_1_n_0 ;
  wire \diffI_IIp1[8]_i_1_n_0 ;
  wire \diffI_IIp1[9]_i_1_n_0 ;
  wire dneCoobufCornerToHostif;
  wire [63:0]doutb;
  wire [7:0]drdImd0bufB;
  wire [7:0]drdImd1bufB;
  wire [7:0]drdImd2bufB;
  wire [7:0]drdImd3bufB;
  wire [7:0]drdImd4bufB;
  wire \dwrCoobuf[0]_i_1_n_0 ;
  wire \dwrCoobuf[10]_i_1_n_0 ;
  wire \dwrCoobuf[16]_i_1_n_0 ;
  wire \dwrCoobuf[17]_i_1_n_0 ;
  wire \dwrCoobuf[18]_i_1_n_0 ;
  wire \dwrCoobuf[19]_i_1_n_0 ;
  wire \dwrCoobuf[1]_i_1_n_0 ;
  wire \dwrCoobuf[20]_i_1_n_0 ;
  wire \dwrCoobuf[21]_i_1_n_0 ;
  wire \dwrCoobuf[22]_i_1_n_0 ;
  wire \dwrCoobuf[23]_i_1_n_0 ;
  wire \dwrCoobuf[24]_i_1_n_0 ;
  wire \dwrCoobuf[25]_i_1_n_0 ;
  wire \dwrCoobuf[26]_i_1_n_0 ;
  wire \dwrCoobuf[2]_i_1_n_0 ;
  wire \dwrCoobuf[31]_i_100_n_0 ;
  wire \dwrCoobuf[31]_i_101_n_0 ;
  wire \dwrCoobuf[31]_i_103_n_0 ;
  wire \dwrCoobuf[31]_i_104_n_0 ;
  wire \dwrCoobuf[31]_i_105_n_0 ;
  wire \dwrCoobuf[31]_i_106_n_0 ;
  wire \dwrCoobuf[31]_i_107_n_0 ;
  wire \dwrCoobuf[31]_i_108_n_0 ;
  wire \dwrCoobuf[31]_i_109_n_0 ;
  wire \dwrCoobuf[31]_i_110_n_0 ;
  wire \dwrCoobuf[31]_i_12_n_0 ;
  wire \dwrCoobuf[31]_i_13_n_0 ;
  wire \dwrCoobuf[31]_i_16_n_0 ;
  wire \dwrCoobuf[31]_i_18_n_0 ;
  wire \dwrCoobuf[31]_i_19_n_0 ;
  wire \dwrCoobuf[31]_i_1_n_0 ;
  wire \dwrCoobuf[31]_i_20_n_0 ;
  wire \dwrCoobuf[31]_i_21_n_0 ;
  wire \dwrCoobuf[31]_i_22_n_0 ;
  wire \dwrCoobuf[31]_i_23_n_0 ;
  wire \dwrCoobuf[31]_i_24_n_0 ;
  wire \dwrCoobuf[31]_i_25_n_0 ;
  wire \dwrCoobuf[31]_i_26_n_0 ;
  wire \dwrCoobuf[31]_i_27_n_0 ;
  wire \dwrCoobuf[31]_i_28_n_0 ;
  wire \dwrCoobuf[31]_i_29_n_0 ;
  wire \dwrCoobuf[31]_i_2_n_0 ;
  wire \dwrCoobuf[31]_i_30_n_0 ;
  wire \dwrCoobuf[31]_i_31_n_0 ;
  wire \dwrCoobuf[31]_i_32_n_0 ;
  wire \dwrCoobuf[31]_i_33_n_0 ;
  wire \dwrCoobuf[31]_i_34_n_0 ;
  wire \dwrCoobuf[31]_i_35_n_0 ;
  wire \dwrCoobuf[31]_i_36_n_0 ;
  wire \dwrCoobuf[31]_i_37_n_0 ;
  wire \dwrCoobuf[31]_i_38_n_0 ;
  wire \dwrCoobuf[31]_i_39_n_0 ;
  wire \dwrCoobuf[31]_i_3_n_0 ;
  wire \dwrCoobuf[31]_i_40_n_0 ;
  wire \dwrCoobuf[31]_i_41_n_0 ;
  wire \dwrCoobuf[31]_i_42_n_0 ;
  wire \dwrCoobuf[31]_i_43_n_0 ;
  wire \dwrCoobuf[31]_i_44_n_0 ;
  wire \dwrCoobuf[31]_i_45_n_0 ;
  wire \dwrCoobuf[31]_i_46_n_0 ;
  wire \dwrCoobuf[31]_i_47_n_0 ;
  wire \dwrCoobuf[31]_i_48_n_0 ;
  wire \dwrCoobuf[31]_i_49_n_0 ;
  wire \dwrCoobuf[31]_i_4_n_0 ;
  wire \dwrCoobuf[31]_i_50_n_0 ;
  wire \dwrCoobuf[31]_i_51_n_0 ;
  wire \dwrCoobuf[31]_i_52_n_0 ;
  wire \dwrCoobuf[31]_i_53_n_0 ;
  wire \dwrCoobuf[31]_i_54_n_0 ;
  wire \dwrCoobuf[31]_i_55_n_0 ;
  wire \dwrCoobuf[31]_i_56_n_0 ;
  wire \dwrCoobuf[31]_i_57_n_0 ;
  wire \dwrCoobuf[31]_i_58_n_0 ;
  wire \dwrCoobuf[31]_i_59_n_0 ;
  wire \dwrCoobuf[31]_i_5_n_0 ;
  wire \dwrCoobuf[31]_i_60_n_0 ;
  wire \dwrCoobuf[31]_i_61_n_0 ;
  wire \dwrCoobuf[31]_i_62_n_0 ;
  wire \dwrCoobuf[31]_i_63_n_0 ;
  wire \dwrCoobuf[31]_i_64_n_0 ;
  wire \dwrCoobuf[31]_i_65_n_0 ;
  wire \dwrCoobuf[31]_i_66_n_0 ;
  wire \dwrCoobuf[31]_i_68_n_0 ;
  wire \dwrCoobuf[31]_i_69_n_0 ;
  wire \dwrCoobuf[31]_i_6_n_0 ;
  wire \dwrCoobuf[31]_i_70_n_0 ;
  wire \dwrCoobuf[31]_i_71_n_0 ;
  wire \dwrCoobuf[31]_i_72_n_0 ;
  wire \dwrCoobuf[31]_i_73_n_0 ;
  wire \dwrCoobuf[31]_i_74_n_0 ;
  wire \dwrCoobuf[31]_i_75_n_0 ;
  wire \dwrCoobuf[31]_i_76_n_0 ;
  wire \dwrCoobuf[31]_i_77_n_0 ;
  wire \dwrCoobuf[31]_i_78_n_0 ;
  wire \dwrCoobuf[31]_i_79_n_0 ;
  wire \dwrCoobuf[31]_i_7_n_0 ;
  wire \dwrCoobuf[31]_i_80_n_0 ;
  wire \dwrCoobuf[31]_i_81_n_0 ;
  wire \dwrCoobuf[31]_i_82_n_0 ;
  wire \dwrCoobuf[31]_i_83_n_0 ;
  wire \dwrCoobuf[31]_i_84_n_0 ;
  wire \dwrCoobuf[31]_i_85_n_0 ;
  wire \dwrCoobuf[31]_i_86_n_0 ;
  wire \dwrCoobuf[31]_i_87_n_0 ;
  wire \dwrCoobuf[31]_i_88_n_0 ;
  wire \dwrCoobuf[31]_i_89_n_0 ;
  wire \dwrCoobuf[31]_i_90_n_0 ;
  wire \dwrCoobuf[31]_i_91_n_0 ;
  wire \dwrCoobuf[31]_i_92_n_0 ;
  wire \dwrCoobuf[31]_i_93_n_0 ;
  wire \dwrCoobuf[31]_i_94_n_0 ;
  wire \dwrCoobuf[31]_i_95_n_0 ;
  wire \dwrCoobuf[31]_i_96_n_0 ;
  wire \dwrCoobuf[31]_i_97_n_0 ;
  wire \dwrCoobuf[31]_i_98_n_0 ;
  wire \dwrCoobuf[31]_i_99_n_0 ;
  wire \dwrCoobuf[3]_i_1_n_0 ;
  wire \dwrCoobuf[4]_i_1_n_0 ;
  wire \dwrCoobuf[5]_i_1_n_0 ;
  wire \dwrCoobuf[6]_i_1_n_0 ;
  wire \dwrCoobuf[7]_i_1_n_0 ;
  wire \dwrCoobuf[8]_i_1_n_0 ;
  wire \dwrCoobuf[9]_i_1_n_0 ;
  wire \dwrCoobuf_reg[31]_i_102_n_5 ;
  wire \dwrCoobuf_reg[31]_i_102_n_6 ;
  wire \dwrCoobuf_reg[31]_i_102_n_7 ;
  wire \dwrCoobuf_reg[31]_i_10_n_3 ;
  wire \dwrCoobuf_reg[31]_i_10_n_4 ;
  wire \dwrCoobuf_reg[31]_i_10_n_5 ;
  wire \dwrCoobuf_reg[31]_i_10_n_6 ;
  wire \dwrCoobuf_reg[31]_i_10_n_7 ;
  wire \dwrCoobuf_reg[31]_i_11_n_3 ;
  wire \dwrCoobuf_reg[31]_i_11_n_4 ;
  wire \dwrCoobuf_reg[31]_i_11_n_5 ;
  wire \dwrCoobuf_reg[31]_i_11_n_6 ;
  wire \dwrCoobuf_reg[31]_i_11_n_7 ;
  wire \dwrCoobuf_reg[31]_i_14_n_5 ;
  wire \dwrCoobuf_reg[31]_i_14_n_6 ;
  wire \dwrCoobuf_reg[31]_i_14_n_7 ;
  wire \dwrCoobuf_reg[31]_i_15_n_5 ;
  wire \dwrCoobuf_reg[31]_i_15_n_6 ;
  wire \dwrCoobuf_reg[31]_i_15_n_7 ;
  wire \dwrCoobuf_reg[31]_i_17_n_5 ;
  wire \dwrCoobuf_reg[31]_i_17_n_6 ;
  wire \dwrCoobuf_reg[31]_i_17_n_7 ;
  wire \dwrCoobuf_reg[31]_i_67_n_5 ;
  wire \dwrCoobuf_reg[31]_i_67_n_6 ;
  wire \dwrCoobuf_reg[31]_i_67_n_7 ;
  wire \dwrCoobuf_reg[31]_i_8_n_3 ;
  wire \dwrCoobuf_reg[31]_i_8_n_4 ;
  wire \dwrCoobuf_reg[31]_i_8_n_5 ;
  wire \dwrCoobuf_reg[31]_i_8_n_6 ;
  wire \dwrCoobuf_reg[31]_i_8_n_7 ;
  wire \dwrCoobuf_reg[31]_i_9_n_3 ;
  wire \dwrCoobuf_reg[31]_i_9_n_4 ;
  wire \dwrCoobuf_reg[31]_i_9_n_5 ;
  wire \dwrCoobuf_reg[31]_i_9_n_6 ;
  wire \dwrCoobuf_reg[31]_i_9_n_7 ;
  wire \dwrCoobuf_reg_n_0_[0] ;
  wire \dwrCoobuf_reg_n_0_[10] ;
  wire \dwrCoobuf_reg_n_0_[16] ;
  wire \dwrCoobuf_reg_n_0_[17] ;
  wire \dwrCoobuf_reg_n_0_[18] ;
  wire \dwrCoobuf_reg_n_0_[19] ;
  wire \dwrCoobuf_reg_n_0_[1] ;
  wire \dwrCoobuf_reg_n_0_[20] ;
  wire \dwrCoobuf_reg_n_0_[21] ;
  wire \dwrCoobuf_reg_n_0_[22] ;
  wire \dwrCoobuf_reg_n_0_[23] ;
  wire \dwrCoobuf_reg_n_0_[24] ;
  wire \dwrCoobuf_reg_n_0_[25] ;
  wire \dwrCoobuf_reg_n_0_[26] ;
  wire \dwrCoobuf_reg_n_0_[2] ;
  wire \dwrCoobuf_reg_n_0_[31] ;
  wire \dwrCoobuf_reg_n_0_[3] ;
  wire \dwrCoobuf_reg_n_0_[4] ;
  wire \dwrCoobuf_reg_n_0_[5] ;
  wire \dwrCoobuf_reg_n_0_[6] ;
  wire \dwrCoobuf_reg_n_0_[7] ;
  wire \dwrCoobuf_reg_n_0_[8] ;
  wire \dwrCoobuf_reg_n_0_[9] ;
  wire \dx[0]_i_1_n_0 ;
  wire \dx[10]_i_1_n_0 ;
  wire \dx[11]_i_1_n_0 ;
  wire \dx[11]_i_2_n_0 ;
  wire \dx[12]_i_1_n_0 ;
  wire \dx[13]_i_1_n_0 ;
  wire \dx[13]_i_2_n_0 ;
  wire \dx[14]_i_1_n_0 ;
  wire \dx[15]_i_1_n_0 ;
  wire \dx[15]_i_2_n_0 ;
  wire \dx[16]_i_1_n_0 ;
  wire \dx[17]_i_1_n_0 ;
  wire \dx[17]_i_2_n_0 ;
  wire \dx[18]_i_1_n_0 ;
  wire \dx[19]_i_1_n_0 ;
  wire \dx[1]_i_1_n_0 ;
  wire \dx[20]_i_1_n_0 ;
  wire \dx[20]_i_2_n_0 ;
  wire \dx[21]_i_1_n_0 ;
  wire \dx[22]_i_1_n_0 ;
  wire \dx[22]_i_2_n_0 ;
  wire \dx[23]_i_1_n_0 ;
  wire \dx[24]_i_1_n_0 ;
  wire \dx[24]_i_2_n_0 ;
  wire \dx[25]_i_1_n_0 ;
  wire \dx[26]_i_1_n_0 ;
  wire \dx[26]_i_2_n_0 ;
  wire \dx[27]_i_1_n_0 ;
  wire \dx[28]_i_1_n_0 ;
  wire \dx[29]_i_1_n_0 ;
  wire \dx[29]_i_2_n_0 ;
  wire \dx[2]_i_1_n_0 ;
  wire \dx[2]_i_2_n_0 ;
  wire \dx[30]_i_1_n_0 ;
  wire \dx[31]_i_1_n_0 ;
  wire \dx[31]_i_2_n_0 ;
  wire \dx[32]_i_1_n_0 ;
  wire \dx[33]_i_1_n_0 ;
  wire \dx[33]_i_2_n_0 ;
  wire \dx[34]_i_1_n_0 ;
  wire \dx[35]_i_1_n_0 ;
  wire \dx[35]_i_2_n_0 ;
  wire \dx[36]_i_1_n_0 ;
  wire \dx[37]_i_1_n_0 ;
  wire \dx[38]_i_1_n_0 ;
  wire \dx[38]_i_2_n_0 ;
  wire \dx[39]_i_1_n_0 ;
  wire \dx[3]_i_1_n_0 ;
  wire \dx[40]_i_1_n_0 ;
  wire \dx[40]_i_2_n_0 ;
  wire \dx[41]_i_1_n_0 ;
  wire \dx[42]_i_1_n_0 ;
  wire \dx[42]_i_2_n_0 ;
  wire \dx[43]_i_1_n_0 ;
  wire \dx[44]_i_1_n_0 ;
  wire \dx[44]_i_2_n_0 ;
  wire \dx[4]_i_1_n_0 ;
  wire \dx[4]_i_2_n_0 ;
  wire \dx[5]_i_1_n_0 ;
  wire \dx[6]_i_1_n_0 ;
  wire \dx[6]_i_2_n_0 ;
  wire \dx[7]_i_1_n_0 ;
  wire \dx[8]_i_1_n_0 ;
  wire \dx[8]_i_2_n_0 ;
  wire \dx[9]_i_1_n_0 ;
  wire \dx_reg_n_0_[0] ;
  wire \dx_reg_n_0_[18] ;
  wire \dx_reg_n_0_[19] ;
  wire \dx_reg_n_0_[1] ;
  wire \dx_reg_n_0_[20] ;
  wire \dx_reg_n_0_[21] ;
  wire \dx_reg_n_0_[22] ;
  wire \dx_reg_n_0_[23] ;
  wire \dx_reg_n_0_[24] ;
  wire \dx_reg_n_0_[25] ;
  wire \dx_reg_n_0_[26] ;
  wire \dx_reg_n_0_[27] ;
  wire \dx_reg_n_0_[28] ;
  wire \dx_reg_n_0_[29] ;
  wire \dx_reg_n_0_[2] ;
  wire \dx_reg_n_0_[30] ;
  wire \dx_reg_n_0_[31] ;
  wire \dx_reg_n_0_[32] ;
  wire \dx_reg_n_0_[33] ;
  wire \dx_reg_n_0_[34] ;
  wire \dx_reg_n_0_[35] ;
  wire \dx_reg_n_0_[36] ;
  wire \dx_reg_n_0_[37] ;
  wire \dx_reg_n_0_[38] ;
  wire \dx_reg_n_0_[39] ;
  wire \dx_reg_n_0_[3] ;
  wire \dx_reg_n_0_[40] ;
  wire \dx_reg_n_0_[41] ;
  wire \dx_reg_n_0_[42] ;
  wire \dx_reg_n_0_[43] ;
  wire \dx_reg_n_0_[44] ;
  wire \dx_reg_n_0_[4] ;
  wire \dx_reg_n_0_[5] ;
  wire \dx_reg_n_0_[6] ;
  wire \dx_reg_n_0_[7] ;
  wire \dx_reg_n_0_[8] ;
  wire dy;
  wire [44:0]\dy_reg[44]_0 ;
  wire \dy_reg_n_0_[0] ;
  wire \dy_reg_n_0_[18] ;
  wire \dy_reg_n_0_[19] ;
  wire \dy_reg_n_0_[1] ;
  wire \dy_reg_n_0_[20] ;
  wire \dy_reg_n_0_[21] ;
  wire \dy_reg_n_0_[22] ;
  wire \dy_reg_n_0_[23] ;
  wire \dy_reg_n_0_[24] ;
  wire \dy_reg_n_0_[25] ;
  wire \dy_reg_n_0_[26] ;
  wire \dy_reg_n_0_[27] ;
  wire \dy_reg_n_0_[28] ;
  wire \dy_reg_n_0_[29] ;
  wire \dy_reg_n_0_[2] ;
  wire \dy_reg_n_0_[30] ;
  wire \dy_reg_n_0_[31] ;
  wire \dy_reg_n_0_[32] ;
  wire \dy_reg_n_0_[33] ;
  wire \dy_reg_n_0_[34] ;
  wire \dy_reg_n_0_[35] ;
  wire \dy_reg_n_0_[36] ;
  wire \dy_reg_n_0_[37] ;
  wire \dy_reg_n_0_[38] ;
  wire \dy_reg_n_0_[39] ;
  wire \dy_reg_n_0_[3] ;
  wire \dy_reg_n_0_[40] ;
  wire \dy_reg_n_0_[41] ;
  wire \dy_reg_n_0_[42] ;
  wire \dy_reg_n_0_[43] ;
  wire \dy_reg_n_0_[44] ;
  wire \dy_reg_n_0_[4] ;
  wire \dy_reg_n_0_[5] ;
  wire \dy_reg_n_0_[6] ;
  wire \dy_reg_n_0_[7] ;
  wire \dy_reg_n_0_[8] ;
  wire enCoobufB;
  wire enCoobuf_i_1_n_0;
  wire enCoobuf_reg_0;
  wire enCoobuf_reg_n_0;
  wire enImdbuf_i_1_n_0;
  wire enImdbuf_reg_n_0;
  wire [30:0]fghij;
  wire [30:1]fghij0;
  wire \fghij[0]_i_1_n_0 ;
  wire \fghij[10]_i_1_n_0 ;
  wire \fghij[11]_i_1_n_0 ;
  wire \fghij[12]_i_1_n_0 ;
  wire \fghij[13]_i_1_n_0 ;
  wire \fghij[14]_i_1_n_0 ;
  wire \fghij[15]_i_1_n_0 ;
  wire \fghij[16]_i_1_n_0 ;
  wire \fghij[17]_i_1_n_0 ;
  wire \fghij[18]_i_1_n_0 ;
  wire \fghij[19]_i_1_n_0 ;
  wire \fghij[1]_i_1_n_0 ;
  wire \fghij[20]_i_1_n_0 ;
  wire \fghij[21]_i_1_n_0 ;
  wire \fghij[22]_i_1_n_0 ;
  wire \fghij[23]_i_1_n_0 ;
  wire \fghij[24]_i_1_n_0 ;
  wire \fghij[25]_i_1_n_0 ;
  wire \fghij[26]_i_1_n_0 ;
  wire \fghij[27]_i_1_n_0 ;
  wire \fghij[28]_i_1_n_0 ;
  wire \fghij[29]_i_1_n_0 ;
  wire \fghij[2]_i_1_n_0 ;
  wire \fghij[30]_i_1_n_0 ;
  wire \fghij[30]_i_2_n_0 ;
  wire \fghij[3]_i_1_n_0 ;
  wire \fghij[4]_i_1_n_0 ;
  wire \fghij[5]_i_1_n_0 ;
  wire \fghij[6]_i_1_n_0 ;
  wire \fghij[7]_i_1_n_0 ;
  wire \fghij[8]_i_1_n_0 ;
  wire \fghij[9]_i_1_n_0 ;
  wire \fghij_reg[16]_i_2_n_0 ;
  wire \fghij_reg[16]_i_2_n_1 ;
  wire \fghij_reg[16]_i_2_n_2 ;
  wire \fghij_reg[16]_i_2_n_3 ;
  wire \fghij_reg[16]_i_2_n_4 ;
  wire \fghij_reg[16]_i_2_n_5 ;
  wire \fghij_reg[16]_i_2_n_6 ;
  wire \fghij_reg[16]_i_2_n_7 ;
  wire \fghij_reg[24]_i_2_n_0 ;
  wire \fghij_reg[24]_i_2_n_1 ;
  wire \fghij_reg[24]_i_2_n_2 ;
  wire \fghij_reg[24]_i_2_n_3 ;
  wire \fghij_reg[24]_i_2_n_4 ;
  wire \fghij_reg[24]_i_2_n_5 ;
  wire \fghij_reg[24]_i_2_n_6 ;
  wire \fghij_reg[24]_i_2_n_7 ;
  wire \fghij_reg[30]_i_3_n_3 ;
  wire \fghij_reg[30]_i_3_n_4 ;
  wire \fghij_reg[30]_i_3_n_5 ;
  wire \fghij_reg[30]_i_3_n_6 ;
  wire \fghij_reg[30]_i_3_n_7 ;
  wire \fghij_reg[8]_i_2_n_0 ;
  wire \fghij_reg[8]_i_2_n_1 ;
  wire \fghij_reg[8]_i_2_n_2 ;
  wire \fghij_reg[8]_i_2_n_3 ;
  wire \fghij_reg[8]_i_2_n_4 ;
  wire \fghij_reg[8]_i_2_n_5 ;
  wire \fghij_reg[8]_i_2_n_6 ;
  wire \fghij_reg[8]_i_2_n_7 ;
  wire flag1;
  wire flag2;
  wire flag234_in;
  wire flag238_in;
  wire flag241_in;
  wire flag3;
  wire flag4;
  wire flag5;
  wire flag52_in;
  wire [39:0]grayVideoinToManyAXIS_tdata;
  wire grayVideoinToManyAXIS_tlast;
  wire grayVideoinToManyAXIS_tvalid;
  wire hdrNotFix;
  wire \i[0]_i_1__1_n_0 ;
  wire \i[1]_i_1__4_n_0 ;
  wire \i[1]_i_2_n_0 ;
  wire \i[1]_i_3_n_0 ;
  wire [1:0]i__0;
  wire [2:0]ixMax;
  wire \ixMax[2]_i_10_n_0 ;
  wire \ixMax[2]_i_11_n_0 ;
  wire \ixMax[2]_i_12_n_0 ;
  wire \ixMax[2]_i_13_n_0 ;
  wire \ixMax[2]_i_14_n_0 ;
  wire \ixMax[2]_i_15_n_0 ;
  wire \ixMax[2]_i_16_n_0 ;
  wire \ixMax[2]_i_17_n_0 ;
  wire \ixMax[2]_i_18_n_0 ;
  wire \ixMax[2]_i_19_n_0 ;
  wire \ixMax[2]_i_20_n_0 ;
  wire \ixMax[2]_i_21_n_0 ;
  wire \ixMax[2]_i_22_n_0 ;
  wire \ixMax[2]_i_23_n_0 ;
  wire \ixMax[2]_i_24_n_0 ;
  wire \ixMax[2]_i_25_n_0 ;
  wire \ixMax[2]_i_26_n_0 ;
  wire \ixMax[2]_i_27_n_0 ;
  wire \ixMax[2]_i_28_n_0 ;
  wire \ixMax[2]_i_29_n_0 ;
  wire \ixMax[2]_i_2_n_0 ;
  wire \ixMax[2]_i_30_n_0 ;
  wire \ixMax[2]_i_31_n_0 ;
  wire \ixMax[2]_i_32_n_0 ;
  wire \ixMax[2]_i_33_n_0 ;
  wire \ixMax[2]_i_34_n_0 ;
  wire \ixMax[2]_i_35_n_0 ;
  wire \ixMax[2]_i_36_n_0 ;
  wire \ixMax[2]_i_37_n_0 ;
  wire \ixMax[2]_i_38_n_0 ;
  wire \ixMax[2]_i_39_n_0 ;
  wire \ixMax[2]_i_3_n_0 ;
  wire \ixMax[2]_i_40_n_0 ;
  wire \ixMax[2]_i_41_n_0 ;
  wire \ixMax[2]_i_42_n_0 ;
  wire \ixMax[2]_i_43_n_0 ;
  wire \ixMax[2]_i_44_n_0 ;
  wire \ixMax[2]_i_45_n_0 ;
  wire \ixMax[2]_i_46_n_0 ;
  wire \ixMax[2]_i_47_n_0 ;
  wire \ixMax[2]_i_48_n_0 ;
  wire \ixMax[2]_i_49_n_0 ;
  wire \ixMax[2]_i_4_n_0 ;
  wire \ixMax[2]_i_50_n_0 ;
  wire \ixMax[2]_i_51_n_0 ;
  wire \ixMax[2]_i_52_n_0 ;
  wire \ixMax[2]_i_53_n_0 ;
  wire \ixMax[2]_i_54_n_0 ;
  wire \ixMax[2]_i_55_n_0 ;
  wire \ixMax[2]_i_56_n_0 ;
  wire \ixMax[2]_i_57_n_0 ;
  wire \ixMax[2]_i_58_n_0 ;
  wire \ixMax[2]_i_59_n_0 ;
  wire \ixMax[2]_i_5_n_0 ;
  wire \ixMax[2]_i_60_n_0 ;
  wire \ixMax[2]_i_61_n_0 ;
  wire \ixMax[2]_i_62_n_0 ;
  wire \ixMax[2]_i_63_n_0 ;
  wire \ixMax[2]_i_64_n_0 ;
  wire \ixMax[2]_i_6_n_0 ;
  wire \ixMax[2]_i_7_n_0 ;
  wire \ixMax[2]_i_8_n_0 ;
  wire \ixMax[2]_i_9_n_0 ;
  wire \ixMax_reg_n_0_[0] ;
  wire \ixMax_reg_n_0_[1] ;
  wire \ixMax_reg_n_0_[2] ;
  wire [4:4]lat;
  wire \lat[4]_i_1_n_0 ;
  wire linNotLog_reg_0;
  wire linNotLog_reg_n_0;
  wire \maximds[0][7]_i_1_n_0 ;
  wire [7:0]\maximds[0]_40 ;
  wire \maximds[1][7]_i_1_n_0 ;
  wire \maximds[2][7]_i_1_n_0 ;
  wire \maximds[3][7]_i_1_n_0 ;
  wire \maximds[4][0]_i_2_n_0 ;
  wire \maximds[4][1]_i_2_n_0 ;
  wire \maximds[4][2]_i_2_n_0 ;
  wire \maximds[4][3]_i_2_n_0 ;
  wire \maximds[4][4]_i_2_n_0 ;
  wire \maximds[4][5]_i_2_n_0 ;
  wire \maximds[4][6]_i_2_n_0 ;
  wire \maximds[4][7]_i_10_n_0 ;
  wire \maximds[4][7]_i_11_n_0 ;
  wire \maximds[4][7]_i_12_n_0 ;
  wire \maximds[4][7]_i_13_n_0 ;
  wire \maximds[4][7]_i_14_n_0 ;
  wire \maximds[4][7]_i_15_n_0 ;
  wire \maximds[4][7]_i_16_n_0 ;
  wire \maximds[4][7]_i_17_n_0 ;
  wire \maximds[4][7]_i_18_n_0 ;
  wire \maximds[4][7]_i_19_n_0 ;
  wire \maximds[4][7]_i_1_n_0 ;
  wire \maximds[4][7]_i_20_n_0 ;
  wire \maximds[4][7]_i_21_n_0 ;
  wire \maximds[4][7]_i_22_n_0 ;
  wire \maximds[4][7]_i_23_n_0 ;
  wire \maximds[4][7]_i_24_n_0 ;
  wire \maximds[4][7]_i_25_n_0 ;
  wire \maximds[4][7]_i_26_n_0 ;
  wire \maximds[4][7]_i_27_n_0 ;
  wire \maximds[4][7]_i_28_n_0 ;
  wire \maximds[4][7]_i_29_n_0 ;
  wire \maximds[4][7]_i_30_n_0 ;
  wire \maximds[4][7]_i_31_n_0 ;
  wire \maximds[4][7]_i_32_n_0 ;
  wire \maximds[4][7]_i_33_n_0 ;
  wire \maximds[4][7]_i_34_n_0 ;
  wire \maximds[4][7]_i_35_n_0 ;
  wire \maximds[4][7]_i_36_n_0 ;
  wire \maximds[4][7]_i_37_n_0 ;
  wire \maximds[4][7]_i_38_n_0 ;
  wire \maximds[4][7]_i_39_n_0 ;
  wire \maximds[4][7]_i_3_n_0 ;
  wire \maximds[4][7]_i_40_n_0 ;
  wire \maximds[4][7]_i_41_n_0 ;
  wire \maximds[4][7]_i_42_n_0 ;
  wire \maximds[4][7]_i_43_n_0 ;
  wire \maximds[4][7]_i_44_n_0 ;
  wire \maximds[4][7]_i_45_n_0 ;
  wire \maximds[4][7]_i_46_n_0 ;
  wire \maximds[4][7]_i_47_n_0 ;
  wire \maximds[4][7]_i_48_n_0 ;
  wire \maximds[4][7]_i_49_n_0 ;
  wire \maximds[4][7]_i_4_n_0 ;
  wire \maximds[4][7]_i_50_n_0 ;
  wire \maximds[4][7]_i_51_n_0 ;
  wire \maximds[4][7]_i_52_n_0 ;
  wire \maximds[4][7]_i_53_n_0 ;
  wire \maximds[4][7]_i_54_n_0 ;
  wire \maximds[4][7]_i_55_n_0 ;
  wire \maximds[4][7]_i_56_n_0 ;
  wire \maximds[4][7]_i_57_n_0 ;
  wire \maximds[4][7]_i_58_n_0 ;
  wire \maximds[4][7]_i_59_n_0 ;
  wire \maximds[4][7]_i_5_n_0 ;
  wire \maximds[4][7]_i_60_n_0 ;
  wire \maximds[4][7]_i_61_n_0 ;
  wire \maximds[4][7]_i_62_n_0 ;
  wire \maximds[4][7]_i_63_n_0 ;
  wire \maximds[4][7]_i_64_n_0 ;
  wire \maximds[4][7]_i_65_n_0 ;
  wire \maximds[4][7]_i_66_n_0 ;
  wire \maximds[4][7]_i_67_n_0 ;
  wire \maximds[4][7]_i_68_n_0 ;
  wire \maximds[4][7]_i_69_n_0 ;
  wire \maximds[4][7]_i_6_n_0 ;
  wire \maximds[4][7]_i_7_n_0 ;
  wire \maximds[4][7]_i_8_n_0 ;
  wire \maximds[4][7]_i_9_n_0 ;
  wire \maximds_reg_n_0_[0][0] ;
  wire \maximds_reg_n_0_[0][1] ;
  wire \maximds_reg_n_0_[0][2] ;
  wire \maximds_reg_n_0_[0][3] ;
  wire \maximds_reg_n_0_[0][4] ;
  wire \maximds_reg_n_0_[0][5] ;
  wire \maximds_reg_n_0_[0][6] ;
  wire \maximds_reg_n_0_[0][7] ;
  wire \maximds_reg_n_0_[1][0] ;
  wire \maximds_reg_n_0_[1][1] ;
  wire \maximds_reg_n_0_[1][2] ;
  wire \maximds_reg_n_0_[1][3] ;
  wire \maximds_reg_n_0_[1][4] ;
  wire \maximds_reg_n_0_[1][5] ;
  wire \maximds_reg_n_0_[1][6] ;
  wire \maximds_reg_n_0_[1][7] ;
  wire \maximds_reg_n_0_[2][0] ;
  wire \maximds_reg_n_0_[2][1] ;
  wire \maximds_reg_n_0_[2][2] ;
  wire \maximds_reg_n_0_[2][3] ;
  wire \maximds_reg_n_0_[2][4] ;
  wire \maximds_reg_n_0_[2][5] ;
  wire \maximds_reg_n_0_[2][6] ;
  wire \maximds_reg_n_0_[2][7] ;
  wire \maximds_reg_n_0_[3][0] ;
  wire \maximds_reg_n_0_[3][1] ;
  wire \maximds_reg_n_0_[3][2] ;
  wire \maximds_reg_n_0_[3][3] ;
  wire \maximds_reg_n_0_[3][4] ;
  wire \maximds_reg_n_0_[3][5] ;
  wire \maximds_reg_n_0_[3][6] ;
  wire \maximds_reg_n_0_[3][7] ;
  wire \maximds_reg_n_0_[4][0] ;
  wire \maximds_reg_n_0_[4][1] ;
  wire \maximds_reg_n_0_[4][2] ;
  wire \maximds_reg_n_0_[4][3] ;
  wire \maximds_reg_n_0_[4][4] ;
  wire \maximds_reg_n_0_[4][5] ;
  wire \maximds_reg_n_0_[4][6] ;
  wire \maximds_reg_n_0_[4][7] ;
  wire \maximdsm1_reg[0]0 ;
  wire [7:0]\maximdsm1_reg[0]_36 ;
  wire [7:0]\maximdsm1_reg[1]_35 ;
  wire [7:0]\maximdsm1_reg[2]_39 ;
  wire [7:0]\maximdsm1_reg[3]_38 ;
  wire [7:0]\maximdsm1_reg[4]_37 ;
  wire [5:0]msb;
  wire msb0;
  wire \msb[0]_i_10_n_0 ;
  wire \msb[0]_i_11_n_0 ;
  wire \msb[0]_i_12_n_0 ;
  wire \msb[0]_i_13_n_0 ;
  wire \msb[0]_i_1_n_0 ;
  wire \msb[0]_i_2_n_0 ;
  wire \msb[0]_i_3_n_0 ;
  wire \msb[0]_i_4_n_0 ;
  wire \msb[0]_i_5_n_0 ;
  wire \msb[0]_i_6_n_0 ;
  wire \msb[0]_i_7_n_0 ;
  wire \msb[0]_i_8_n_0 ;
  wire \msb[0]_i_9_n_0 ;
  wire \msb[1]_i_10_n_0 ;
  wire \msb[1]_i_11_n_0 ;
  wire \msb[1]_i_12_n_0 ;
  wire \msb[1]_i_13_n_0 ;
  wire \msb[1]_i_1_n_0 ;
  wire \msb[1]_i_2_n_0 ;
  wire \msb[1]_i_3_n_0 ;
  wire \msb[1]_i_4_n_0 ;
  wire \msb[1]_i_5_n_0 ;
  wire \msb[1]_i_6_n_0 ;
  wire \msb[1]_i_7_n_0 ;
  wire \msb[1]_i_8_n_0 ;
  wire \msb[1]_i_9_n_0 ;
  wire \msb[2]_i_10_n_0 ;
  wire \msb[2]_i_11_n_0 ;
  wire \msb[2]_i_12_n_0 ;
  wire \msb[2]_i_13_n_0 ;
  wire \msb[2]_i_14_n_0 ;
  wire \msb[2]_i_1_n_0 ;
  wire \msb[2]_i_2_n_0 ;
  wire \msb[2]_i_3_n_0 ;
  wire \msb[2]_i_4_n_0 ;
  wire \msb[2]_i_5_n_0 ;
  wire \msb[2]_i_6_n_0 ;
  wire \msb[2]_i_7_n_0 ;
  wire \msb[2]_i_8_n_0 ;
  wire \msb[2]_i_9_n_0 ;
  wire \msb[3]_i_10_n_0 ;
  wire \msb[3]_i_11_n_0 ;
  wire \msb[3]_i_12_n_0 ;
  wire \msb[3]_i_13_n_0 ;
  wire \msb[3]_i_1_n_0 ;
  wire \msb[3]_i_2_n_0 ;
  wire \msb[3]_i_3_n_0 ;
  wire \msb[3]_i_4_n_0 ;
  wire \msb[3]_i_5_n_0 ;
  wire \msb[3]_i_6_n_0 ;
  wire \msb[3]_i_7_n_0 ;
  wire \msb[3]_i_8_n_0 ;
  wire \msb[3]_i_9_n_0 ;
  wire \msb[4]_i_1_n_0 ;
  wire \msb[4]_i_2_n_0 ;
  wire \msb[4]_i_3_n_0 ;
  wire \msb[4]_i_4_n_0 ;
  wire \msb[4]_i_5_n_0 ;
  wire \msb[5]_i_2_n_0 ;
  wire \msb[5]_i_3_n_0 ;
  wire \msb[5]_i_4_n_0 ;
  wire \msb[5]_i_5_n_0 ;
  wire myImd0buf_n_10;
  wire myImd0buf_n_11;
  wire myImd0buf_n_12;
  wire myImd0buf_n_13;
  wire myImd0buf_n_14;
  wire myImd0buf_n_15;
  wire myImd0buf_n_8;
  wire myImd0buf_n_9;
  wire myImd1buf_n_10;
  wire myImd1buf_n_11;
  wire myImd1buf_n_12;
  wire myImd1buf_n_13;
  wire myImd1buf_n_14;
  wire myImd1buf_n_15;
  wire myImd1buf_n_16;
  wire myImd1buf_n_17;
  wire myImd1buf_n_18;
  wire myImd1buf_n_19;
  wire myImd1buf_n_8;
  wire myImd1buf_n_9;
  wire myImd2buf_n_10;
  wire myImd2buf_n_11;
  wire myImd2buf_n_12;
  wire myImd2buf_n_13;
  wire myImd2buf_n_14;
  wire myImd2buf_n_15;
  wire myImd2buf_n_8;
  wire myImd2buf_n_9;
  wire myImd3buf_n_10;
  wire myImd3buf_n_11;
  wire myImd3buf_n_12;
  wire myImd3buf_n_13;
  wire myImd3buf_n_14;
  wire myImd3buf_n_15;
  wire myImd3buf_n_8;
  wire myImd3buf_n_9;
  wire myImd4buf_n_10;
  wire myImd4buf_n_11;
  wire myImd4buf_n_12;
  wire myImd4buf_n_13;
  wire myImd4buf_n_14;
  wire myImd4buf_n_15;
  wire myImd4buf_n_16;
  wire myImd4buf_n_8;
  wire myImd4buf_n_9;
  wire [10:0]p_0_in;
  wire [8:0]p_0_in__0;
  wire p_0_out;
  wire p_1_in;
  wire postNotLive_i_1_n_0;
  wire postNotLive_reg_n_0;
  wire \postcol_lcl[0]_i_1_n_0 ;
  wire \postcol_lcl[10]_i_1_n_0 ;
  wire \postcol_lcl[10]_i_2_n_0 ;
  wire \postcol_lcl[10]_i_3_n_0 ;
  wire \postcol_lcl[10]_i_4_n_0 ;
  wire \postcol_lcl[1]_i_1_n_0 ;
  wire \postcol_lcl[2]_i_1_n_0 ;
  wire \postcol_lcl[3]_i_1_n_0 ;
  wire \postcol_lcl[4]_i_1_n_0 ;
  wire \postcol_lcl[4]_i_2_n_0 ;
  wire \postcol_lcl[5]_i_1_n_0 ;
  wire \postcol_lcl[5]_i_2_n_0 ;
  wire \postcol_lcl[6]_i_1_n_0 ;
  wire \postcol_lcl[7]_i_1_n_0 ;
  wire \postcol_lcl[8]_i_1_n_0 ;
  wire \postcol_lcl[9]_i_1_n_0 ;
  wire \postcol_lcl[9]_i_2_n_0 ;
  wire \postcol_lcl[9]_i_3_n_0 ;
  wire [10:0]postcol_lcl__0;
  wire \r[15]_i_10_n_0 ;
  wire \r[15]_i_11_n_0 ;
  wire \r[15]_i_12_n_0 ;
  wire \r[15]_i_13_n_0 ;
  wire \r[15]_i_14_n_0 ;
  wire \r[15]_i_15_n_0 ;
  wire \r[15]_i_16_n_0 ;
  wire \r[15]_i_17_n_0 ;
  wire \r[15]_i_2_n_0 ;
  wire \r[15]_i_3_n_0 ;
  wire \r[15]_i_4_n_0 ;
  wire \r[15]_i_5_n_0 ;
  wire \r[15]_i_6_n_0 ;
  wire \r[15]_i_7_n_0 ;
  wire \r[15]_i_8_n_0 ;
  wire \r[15]_i_9_n_0 ;
  wire \r[23]_i_10_n_0 ;
  wire \r[23]_i_11_n_0 ;
  wire \r[23]_i_12_n_0 ;
  wire \r[23]_i_13_n_0 ;
  wire \r[23]_i_14_n_0 ;
  wire \r[23]_i_15_n_0 ;
  wire \r[23]_i_16_n_0 ;
  wire \r[23]_i_17_n_0 ;
  wire \r[23]_i_2_n_0 ;
  wire \r[23]_i_3_n_0 ;
  wire \r[23]_i_4_n_0 ;
  wire \r[23]_i_5_n_0 ;
  wire \r[23]_i_6_n_0 ;
  wire \r[23]_i_7_n_0 ;
  wire \r[23]_i_8_n_0 ;
  wire \r[23]_i_9_n_0 ;
  wire \r[31]_i_10_n_0 ;
  wire \r[31]_i_11_n_0 ;
  wire \r[31]_i_12_n_0 ;
  wire \r[31]_i_13_n_0 ;
  wire \r[31]_i_14_n_0 ;
  wire \r[31]_i_15_n_0 ;
  wire \r[31]_i_16_n_0 ;
  wire \r[31]_i_17_n_0 ;
  wire \r[31]_i_2_n_0 ;
  wire \r[31]_i_3_n_0 ;
  wire \r[31]_i_4_n_0 ;
  wire \r[31]_i_5_n_0 ;
  wire \r[31]_i_6_n_0 ;
  wire \r[31]_i_7_n_0 ;
  wire \r[31]_i_8_n_0 ;
  wire \r[31]_i_9_n_0 ;
  wire \r[39]_i_10_n_0 ;
  wire \r[39]_i_11_n_0 ;
  wire \r[39]_i_12_n_0 ;
  wire \r[39]_i_13_n_0 ;
  wire \r[39]_i_14_n_0 ;
  wire \r[39]_i_15_n_0 ;
  wire \r[39]_i_16_n_0 ;
  wire \r[39]_i_17_n_0 ;
  wire \r[39]_i_2_n_0 ;
  wire \r[39]_i_3_n_0 ;
  wire \r[39]_i_4_n_0 ;
  wire \r[39]_i_5_n_0 ;
  wire \r[39]_i_6_n_0 ;
  wire \r[39]_i_7_n_0 ;
  wire \r[39]_i_8_n_0 ;
  wire \r[39]_i_9_n_0 ;
  wire \r[47]_i_10_n_0 ;
  wire \r[47]_i_11_n_0 ;
  wire \r[47]_i_12_n_0 ;
  wire \r[47]_i_13_n_0 ;
  wire \r[47]_i_14_n_0 ;
  wire \r[47]_i_15_n_0 ;
  wire \r[47]_i_16_n_0 ;
  wire \r[47]_i_2_n_0 ;
  wire \r[47]_i_3_n_0 ;
  wire \r[47]_i_4_n_0 ;
  wire \r[47]_i_5_n_0 ;
  wire \r[47]_i_6_n_0 ;
  wire \r[47]_i_7_n_0 ;
  wire \r[47]_i_8_n_0 ;
  wire \r[47]_i_9_n_0 ;
  wire \r[7]_i_10_n_0 ;
  wire \r[7]_i_11_n_0 ;
  wire \r[7]_i_12_n_0 ;
  wire \r[7]_i_13_n_0 ;
  wire \r[7]_i_14_n_0 ;
  wire \r[7]_i_15_n_0 ;
  wire \r[7]_i_16_n_0 ;
  wire \r[7]_i_17_n_0 ;
  wire \r[7]_i_2_n_0 ;
  wire \r[7]_i_3_n_0 ;
  wire \r[7]_i_4_n_0 ;
  wire \r[7]_i_5_n_0 ;
  wire \r[7]_i_6_n_0 ;
  wire \r[7]_i_7_n_0 ;
  wire \r[7]_i_8_n_0 ;
  wire \r[7]_i_9_n_0 ;
  wire \r_reg[15]_i_1_n_0 ;
  wire \r_reg[15]_i_1_n_1 ;
  wire \r_reg[15]_i_1_n_10 ;
  wire \r_reg[15]_i_1_n_11 ;
  wire \r_reg[15]_i_1_n_12 ;
  wire \r_reg[15]_i_1_n_13 ;
  wire \r_reg[15]_i_1_n_14 ;
  wire \r_reg[15]_i_1_n_15 ;
  wire \r_reg[15]_i_1_n_2 ;
  wire \r_reg[15]_i_1_n_3 ;
  wire \r_reg[15]_i_1_n_4 ;
  wire \r_reg[15]_i_1_n_5 ;
  wire \r_reg[15]_i_1_n_6 ;
  wire \r_reg[15]_i_1_n_7 ;
  wire \r_reg[15]_i_1_n_8 ;
  wire \r_reg[15]_i_1_n_9 ;
  wire \r_reg[23]_i_1_n_0 ;
  wire \r_reg[23]_i_1_n_1 ;
  wire \r_reg[23]_i_1_n_10 ;
  wire \r_reg[23]_i_1_n_11 ;
  wire \r_reg[23]_i_1_n_12 ;
  wire \r_reg[23]_i_1_n_13 ;
  wire \r_reg[23]_i_1_n_14 ;
  wire \r_reg[23]_i_1_n_15 ;
  wire \r_reg[23]_i_1_n_2 ;
  wire \r_reg[23]_i_1_n_3 ;
  wire \r_reg[23]_i_1_n_4 ;
  wire \r_reg[23]_i_1_n_5 ;
  wire \r_reg[23]_i_1_n_6 ;
  wire \r_reg[23]_i_1_n_7 ;
  wire \r_reg[23]_i_1_n_8 ;
  wire \r_reg[23]_i_1_n_9 ;
  wire \r_reg[31]_i_1_n_0 ;
  wire \r_reg[31]_i_1_n_1 ;
  wire \r_reg[31]_i_1_n_10 ;
  wire \r_reg[31]_i_1_n_11 ;
  wire \r_reg[31]_i_1_n_12 ;
  wire \r_reg[31]_i_1_n_13 ;
  wire \r_reg[31]_i_1_n_14 ;
  wire \r_reg[31]_i_1_n_15 ;
  wire \r_reg[31]_i_1_n_2 ;
  wire \r_reg[31]_i_1_n_3 ;
  wire \r_reg[31]_i_1_n_4 ;
  wire \r_reg[31]_i_1_n_5 ;
  wire \r_reg[31]_i_1_n_6 ;
  wire \r_reg[31]_i_1_n_7 ;
  wire \r_reg[31]_i_1_n_8 ;
  wire \r_reg[31]_i_1_n_9 ;
  wire \r_reg[39]_i_1_n_0 ;
  wire \r_reg[39]_i_1_n_1 ;
  wire \r_reg[39]_i_1_n_10 ;
  wire \r_reg[39]_i_1_n_11 ;
  wire \r_reg[39]_i_1_n_12 ;
  wire \r_reg[39]_i_1_n_13 ;
  wire \r_reg[39]_i_1_n_14 ;
  wire \r_reg[39]_i_1_n_15 ;
  wire \r_reg[39]_i_1_n_2 ;
  wire \r_reg[39]_i_1_n_3 ;
  wire \r_reg[39]_i_1_n_4 ;
  wire \r_reg[39]_i_1_n_5 ;
  wire \r_reg[39]_i_1_n_6 ;
  wire \r_reg[39]_i_1_n_7 ;
  wire \r_reg[39]_i_1_n_8 ;
  wire \r_reg[39]_i_1_n_9 ;
  wire \r_reg[47]_i_1_n_1 ;
  wire \r_reg[47]_i_1_n_10 ;
  wire \r_reg[47]_i_1_n_11 ;
  wire \r_reg[47]_i_1_n_12 ;
  wire \r_reg[47]_i_1_n_13 ;
  wire \r_reg[47]_i_1_n_14 ;
  wire \r_reg[47]_i_1_n_15 ;
  wire \r_reg[47]_i_1_n_2 ;
  wire \r_reg[47]_i_1_n_3 ;
  wire \r_reg[47]_i_1_n_4 ;
  wire \r_reg[47]_i_1_n_5 ;
  wire \r_reg[47]_i_1_n_6 ;
  wire \r_reg[47]_i_1_n_7 ;
  wire \r_reg[47]_i_1_n_8 ;
  wire \r_reg[47]_i_1_n_9 ;
  wire \r_reg[7]_i_1_n_0 ;
  wire \r_reg[7]_i_1_n_1 ;
  wire \r_reg[7]_i_1_n_10 ;
  wire \r_reg[7]_i_1_n_11 ;
  wire \r_reg[7]_i_1_n_12 ;
  wire \r_reg[7]_i_1_n_13 ;
  wire \r_reg[7]_i_1_n_14 ;
  wire \r_reg[7]_i_1_n_15 ;
  wire \r_reg[7]_i_1_n_2 ;
  wire \r_reg[7]_i_1_n_3 ;
  wire \r_reg[7]_i_1_n_4 ;
  wire \r_reg[7]_i_1_n_5 ;
  wire \r_reg[7]_i_1_n_6 ;
  wire \r_reg[7]_i_1_n_7 ;
  wire \r_reg[7]_i_1_n_8 ;
  wire \r_reg[7]_i_1_n_9 ;
  wire \r_reg_n_0_[0] ;
  wire \r_reg_n_0_[10] ;
  wire \r_reg_n_0_[11] ;
  wire \r_reg_n_0_[12] ;
  wire \r_reg_n_0_[13] ;
  wire \r_reg_n_0_[14] ;
  wire \r_reg_n_0_[15] ;
  wire \r_reg_n_0_[16] ;
  wire \r_reg_n_0_[17] ;
  wire \r_reg_n_0_[18] ;
  wire \r_reg_n_0_[19] ;
  wire \r_reg_n_0_[1] ;
  wire \r_reg_n_0_[20] ;
  wire \r_reg_n_0_[21] ;
  wire \r_reg_n_0_[22] ;
  wire \r_reg_n_0_[23] ;
  wire \r_reg_n_0_[24] ;
  wire \r_reg_n_0_[25] ;
  wire \r_reg_n_0_[26] ;
  wire \r_reg_n_0_[27] ;
  wire \r_reg_n_0_[28] ;
  wire \r_reg_n_0_[29] ;
  wire \r_reg_n_0_[2] ;
  wire \r_reg_n_0_[30] ;
  wire \r_reg_n_0_[31] ;
  wire \r_reg_n_0_[32] ;
  wire \r_reg_n_0_[33] ;
  wire \r_reg_n_0_[34] ;
  wire \r_reg_n_0_[35] ;
  wire \r_reg_n_0_[36] ;
  wire \r_reg_n_0_[37] ;
  wire \r_reg_n_0_[38] ;
  wire \r_reg_n_0_[39] ;
  wire \r_reg_n_0_[3] ;
  wire \r_reg_n_0_[40] ;
  wire \r_reg_n_0_[41] ;
  wire \r_reg_n_0_[42] ;
  wire \r_reg_n_0_[43] ;
  wire \r_reg_n_0_[44] ;
  wire \r_reg_n_0_[45] ;
  wire \r_reg_n_0_[46] ;
  wire \r_reg_n_0_[47] ;
  wire \r_reg_n_0_[4] ;
  wire \r_reg_n_0_[5] ;
  wire \r_reg_n_0_[6] ;
  wire \r_reg_n_0_[7] ;
  wire \r_reg_n_0_[8] ;
  wire \r_reg_n_0_[9] ;
  wire reqCoobufCornerToHostif;
  wire reqInvAcquire;
  wire reqInvCornerConfig;
  wire \rexp[0]_i_10_n_0 ;
  wire \rexp[0]_i_1_n_0 ;
  wire \rexp[0]_i_2_n_0 ;
  wire \rexp[0]_i_3_n_0 ;
  wire \rexp[0]_i_4_n_0 ;
  wire \rexp[0]_i_5_n_0 ;
  wire \rexp[0]_i_6_n_0 ;
  wire \rexp[0]_i_7_n_0 ;
  wire \rexp[0]_i_8_n_0 ;
  wire \rexp[0]_i_9_n_0 ;
  wire \rexp[1]_i_10_n_0 ;
  wire \rexp[1]_i_11_n_0 ;
  wire \rexp[1]_i_12_n_0 ;
  wire \rexp[1]_i_13_n_0 ;
  wire \rexp[1]_i_14_n_0 ;
  wire \rexp[1]_i_15_n_0 ;
  wire \rexp[1]_i_16_n_0 ;
  wire \rexp[1]_i_17_n_0 ;
  wire \rexp[1]_i_18_n_0 ;
  wire \rexp[1]_i_19_n_0 ;
  wire \rexp[1]_i_1_n_0 ;
  wire \rexp[1]_i_20_n_0 ;
  wire \rexp[1]_i_21_n_0 ;
  wire \rexp[1]_i_22_n_0 ;
  wire \rexp[1]_i_23_n_0 ;
  wire \rexp[1]_i_24_n_0 ;
  wire \rexp[1]_i_25_n_0 ;
  wire \rexp[1]_i_26_n_0 ;
  wire \rexp[1]_i_27_n_0 ;
  wire \rexp[1]_i_28_n_0 ;
  wire \rexp[1]_i_29_n_0 ;
  wire \rexp[1]_i_2_n_0 ;
  wire \rexp[1]_i_30_n_0 ;
  wire \rexp[1]_i_32_n_0 ;
  wire \rexp[1]_i_33_n_0 ;
  wire \rexp[1]_i_34_n_0 ;
  wire \rexp[1]_i_35_n_0 ;
  wire \rexp[1]_i_36_n_0 ;
  wire \rexp[1]_i_37_n_0 ;
  wire \rexp[1]_i_38_n_0 ;
  wire \rexp[1]_i_3_n_0 ;
  wire \rexp[1]_i_4_n_0 ;
  wire \rexp[1]_i_5_n_0 ;
  wire \rexp[1]_i_6_n_0 ;
  wire \rexp[1]_i_7_n_0 ;
  wire \rexp[1]_i_8_n_0 ;
  wire \rexp[1]_i_9_n_0 ;
  wire \rexp[2]_i_1_n_0 ;
  wire \rexp[2]_i_2_n_0 ;
  wire \rexp[2]_i_3_n_0 ;
  wire \rexp[2]_i_4_n_0 ;
  wire \rexp[2]_i_5_n_0 ;
  wire \rexp[2]_i_6_n_0 ;
  wire \rexp[2]_i_7_n_0 ;
  wire \rexp[2]_i_8_n_0 ;
  wire \rexp[2]_i_9_n_0 ;
  wire \rexp[3]_i_1_n_0 ;
  wire \rexp[3]_i_2_n_0 ;
  wire \rexp[4]_i_1_n_0 ;
  wire \rexp[4]_i_2_n_0 ;
  wire \rexp[4]_i_3_n_0 ;
  wire \rexp[4]_i_4_n_0 ;
  wire \rexp[4]_i_5_n_0 ;
  wire \rexp[4]_i_6_n_0 ;
  wire \rexp[5]_i_1_n_0 ;
  wire \rexp[5]_i_2_n_0 ;
  wire \rexp[5]_i_3_n_0 ;
  wire \rexp[5]_i_4_n_0 ;
  wire \rexp[5]_i_5_n_0 ;
  wire \rexp[5]_i_6_n_0 ;
  wire \rexp[6]_i_1_n_0 ;
  wire \rexp[6]_i_2_n_0 ;
  wire \rexp[6]_i_3_n_0 ;
  wire \rexp[6]_i_4_n_0 ;
  wire \rexp[6]_i_5_n_0 ;
  wire \rexp[6]_i_6_n_0 ;
  wire \rexp[7]_i_10_n_0 ;
  wire \rexp[7]_i_11_n_0 ;
  wire \rexp[7]_i_12_n_0 ;
  wire \rexp[7]_i_13_n_0 ;
  wire \rexp[7]_i_14_n_0 ;
  wire \rexp[7]_i_15_n_0 ;
  wire \rexp[7]_i_16_n_0 ;
  wire \rexp[7]_i_17_n_0 ;
  wire \rexp[7]_i_18_n_0 ;
  wire \rexp[7]_i_19_n_0 ;
  wire \rexp[7]_i_1_n_0 ;
  wire \rexp[7]_i_20_n_0 ;
  wire \rexp[7]_i_21_n_0 ;
  wire \rexp[7]_i_22_n_0 ;
  wire \rexp[7]_i_23_n_0 ;
  wire \rexp[7]_i_24_n_0 ;
  wire \rexp[7]_i_25_n_0 ;
  wire \rexp[7]_i_26_n_0 ;
  wire \rexp[7]_i_27_n_0 ;
  wire \rexp[7]_i_28_n_0 ;
  wire \rexp[7]_i_29_n_0 ;
  wire \rexp[7]_i_2_n_0 ;
  wire \rexp[7]_i_30_n_0 ;
  wire \rexp[7]_i_31_n_0 ;
  wire \rexp[7]_i_32_n_0 ;
  wire \rexp[7]_i_33_n_0 ;
  wire \rexp[7]_i_34_n_0 ;
  wire \rexp[7]_i_35_n_0 ;
  wire \rexp[7]_i_36_n_0 ;
  wire \rexp[7]_i_37_n_0 ;
  wire \rexp[7]_i_38_n_0 ;
  wire \rexp[7]_i_39_n_0 ;
  wire \rexp[7]_i_3_n_0 ;
  wire \rexp[7]_i_4_n_0 ;
  wire \rexp[7]_i_5_n_0 ;
  wire \rexp[7]_i_6_n_0 ;
  wire \rexp[7]_i_7_n_0 ;
  wire \rexp[7]_i_8_n_0 ;
  wire \rexp[7]_i_9_n_0 ;
  wire \rexp_reg[1]_i_31_n_0 ;
  wire \rexp_reg_n_0_[0] ;
  wire \rexp_reg_n_0_[1] ;
  wire \rexp_reg_n_0_[2] ;
  wire \rexp_reg_n_0_[3] ;
  wire \rexp_reg_n_0_[4] ;
  wire \rexp_reg_n_0_[5] ;
  wire \rexp_reg_n_0_[6] ;
  wire \rexp_reg_n_0_[7] ;
  wire rng_reg_0;
  wire rng_reg_1;
  wire rng_reg_2;
  wire [10:0]row0;
  wire [10:0]row1;
  wire [7:0]\row1_reg[7]_0 ;
  wire \row_lcl[10]_i_1_n_0 ;
  wire \row_lcl[10]_i_3_n_0 ;
  wire \row_lcl[5]_i_2_n_0 ;
  wire \row_lcl[9]_i_1_n_0 ;
  wire \row_lcl[9]_i_2_n_0 ;
  wire [2:0]row_lcl_reg;
  wire \row_lcl_reg[1]_0 ;
  wire \rshift[0]_i_1_n_0 ;
  wire \rshift[1]_i_1_n_0 ;
  wire \rshift[2]_i_1_n_0 ;
  wire \rshift[3]_i_1_n_0 ;
  wire \rshift[4]_i_1_n_0 ;
  wire \rshift[4]_i_2_n_0 ;
  wire \rshift[4]_i_3_n_0 ;
  wire \rshift[4]_i_4_n_0 ;
  wire \rshift[5]_i_1_n_0 ;
  wire \rshift[5]_i_2_n_0 ;
  wire \rshift[5]_i_3_n_0 ;
  wire \rshift[5]_i_4_n_0 ;
  wire [5:0]rshift__0;
  wire scoreMax;
  wire \scoreMax[0]_i_1_n_0 ;
  wire \scoreMax[1]_i_1_n_0 ;
  wire \scoreMax[2]_i_1_n_0 ;
  wire \scoreMax[3]_i_1_n_0 ;
  wire \scoreMax[4]_i_1_n_0 ;
  wire \scoreMax[5]_i_1_n_0 ;
  wire \scoreMax[6]_i_1_n_0 ;
  wire \scoreMax[7]_i_1_n_0 ;
  wire scoreMax_lcl0;
  wire \scoreMax_lcl[0]_i_1_n_0 ;
  wire \scoreMax_lcl[1]_i_1_n_0 ;
  wire \scoreMax_lcl[2]_i_1_n_0 ;
  wire \scoreMax_lcl[3]_i_1_n_0 ;
  wire \scoreMax_lcl[4]_i_1_n_0 ;
  wire \scoreMax_lcl[5]_i_1_n_0 ;
  wire \scoreMax_lcl[6]_i_1_n_0 ;
  wire \scoreMax_lcl[7]_i_10_n_0 ;
  wire \scoreMax_lcl[7]_i_11_n_0 ;
  wire \scoreMax_lcl[7]_i_1_n_0 ;
  wire \scoreMax_lcl[7]_i_2_n_0 ;
  wire \scoreMax_lcl[7]_i_4_n_0 ;
  wire \scoreMax_lcl[7]_i_5_n_0 ;
  wire \scoreMax_lcl[7]_i_6_n_0 ;
  wire \scoreMax_lcl[7]_i_7_n_0 ;
  wire \scoreMax_lcl[7]_i_8_n_0 ;
  wire \scoreMax_lcl[7]_i_9_n_0 ;
  wire [7:0]scoreMax_lcl__0;
  wire \scoreMax_lcl_reg[7]_i_3_n_5 ;
  wire \scoreMax_lcl_reg[7]_i_3_n_6 ;
  wire \scoreMax_lcl_reg[7]_i_3_n_7 ;
  wire [7:0]\scoreMax_reg[7]_0 ;
  wire \scoreMin[0]_i_1_n_0 ;
  wire \scoreMin[1]_i_1_n_0 ;
  wire \scoreMin[2]_i_1_n_0 ;
  wire \scoreMin[3]_i_1_n_0 ;
  wire \scoreMin[4]_i_1_n_0 ;
  wire \scoreMin[5]_i_1_n_0 ;
  wire \scoreMin[6]_i_1_n_0 ;
  wire \scoreMin[7]_i_1_n_0 ;
  wire scoreMin_lcl0;
  wire \scoreMin_lcl[0]_i_1_n_0 ;
  wire \scoreMin_lcl[1]_i_1_n_0 ;
  wire \scoreMin_lcl[2]_i_1_n_0 ;
  wire \scoreMin_lcl[3]_i_1_n_0 ;
  wire \scoreMin_lcl[4]_i_1_n_0 ;
  wire \scoreMin_lcl[5]_i_1_n_0 ;
  wire \scoreMin_lcl[6]_i_1_n_0 ;
  wire \scoreMin_lcl[7]_i_10_n_0 ;
  wire \scoreMin_lcl[7]_i_11_n_0 ;
  wire \scoreMin_lcl[7]_i_1_n_0 ;
  wire \scoreMin_lcl[7]_i_2_n_0 ;
  wire \scoreMin_lcl[7]_i_4_n_0 ;
  wire \scoreMin_lcl[7]_i_5_n_0 ;
  wire \scoreMin_lcl[7]_i_6_n_0 ;
  wire \scoreMin_lcl[7]_i_7_n_0 ;
  wire \scoreMin_lcl[7]_i_8_n_0 ;
  wire \scoreMin_lcl[7]_i_9_n_0 ;
  wire [7:0]scoreMin_lcl__0;
  wire \scoreMin_lcl_reg[7]_i_3_n_5 ;
  wire \scoreMin_lcl_reg[7]_i_3_n_6 ;
  wire \scoreMin_lcl_reg[7]_i_3_n_7 ;
  wire [7:0]\scoreMin_reg[7]_0 ;
  wire sel;
  wire [5:0]shift;
  wire \shift[0]_i_1_n_0 ;
  wire \shift[1]_i_1_n_0 ;
  wire \shift[2]_i_1_n_0 ;
  wire \shift[3]_i_1_n_0 ;
  wire \shift[4]_i_1_n_0 ;
  wire \shift[5]_i_2_n_0 ;
  wire \shift_lcl[0]_i_1_n_0 ;
  wire \shift_lcl[1]_i_1_n_0 ;
  wire \shift_lcl[2]_i_1_n_0 ;
  wire \shift_lcl[3]_i_1_n_0 ;
  wire \shift_lcl[4]_i_1_n_0 ;
  wire \shift_lcl[5]_i_1_n_0 ;
  wire \shift_lcl[5]_i_2_n_0 ;
  wire \shift_lcl[5]_i_3_n_0 ;
  wire \shift_lcl[5]_i_4_n_0 ;
  wire \shift_lcl[5]_i_5_n_0 ;
  wire \shift_lcl[5]_i_6_n_0 ;
  wire [5:0]shift_lcl__0;
  wire [1:0]stateCorner;
  wire \stateCorner[0]_i_1_n_0 ;
  wire \stateCorner[0]_i_2_n_0 ;
  wire \stateCorner[1]_i_1_n_0 ;
  wire \stateCorner[1]_i_4_n_0 ;
  wire \stateCorner[1]_i_5_n_0 ;
  wire \stateCorner[1]_i_6_n_0 ;
  wire \stateCorner_reg[1]_0 ;
  wire \stateImdstream[0]_i_1_n_0 ;
  wire \stateImdstream[0]_i_2_n_0 ;
  wire \stateImdstream[0]_i_3_n_0 ;
  wire \stateImdstream[0]_i_4_n_0 ;
  wire \stateImdstream[1]_i_1_n_0 ;
  wire \stateImdstream[1]_i_2_n_0 ;
  wire \stateImdstream[1]_i_3_n_0 ;
  wire \stateImdstream[1]_i_4_n_0 ;
  wire \stateImdstream[2]_i_1_n_0 ;
  wire \stateImdstream[2]_i_2_n_0 ;
  wire \stateImdstream_reg_n_0_[0] ;
  wire \stateImdstream_reg_n_0_[1] ;
  wire \stateMaxsel[0]_i_1_n_0 ;
  wire \stateMaxsel[1]_i_1_n_0 ;
  wire \stateMaxsel[1]_i_2_n_0 ;
  wire \stateMaxsel[1]_i_3_n_0 ;
  wire \stateMaxsel_reg_n_0_[0] ;
  wire \stateMaxsel_reg_n_0_[1] ;
  wire [1:1]stateOp;
  wire [0:0]\stateOp_reg[0]_0 ;
  wire [1:0]\stateOp_reg[1]_0 ;
  wire stateScore;
  wire stateScore_reg_rep__0_n_0;
  wire stateScore_reg_rep__10_n_0;
  wire stateScore_reg_rep__11_n_0;
  wire stateScore_reg_rep__12_n_0;
  wire stateScore_reg_rep__13_n_0;
  wire stateScore_reg_rep__14_n_0;
  wire stateScore_reg_rep__15_n_0;
  wire stateScore_reg_rep__16_n_0;
  wire stateScore_reg_rep__17_n_0;
  wire stateScore_reg_rep__18_n_0;
  wire stateScore_reg_rep__1_n_0;
  wire stateScore_reg_rep__2_n_0;
  wire stateScore_reg_rep__3_n_0;
  wire stateScore_reg_rep__4_n_0;
  wire stateScore_reg_rep__5_n_0;
  wire stateScore_reg_rep__6_n_0;
  wire stateScore_reg_rep__7_n_0;
  wire stateScore_reg_rep__8_n_0;
  wire stateScore_reg_rep__9_n_0;
  wire stateScore_reg_rep_n_0;
  wire [23:0]sumIII;
  wire \sumIII[15]_i_10_n_0 ;
  wire \sumIII[15]_i_11_n_0 ;
  wire \sumIII[15]_i_12_n_0 ;
  wire \sumIII[15]_i_13_n_0 ;
  wire \sumIII[15]_i_14_n_0 ;
  wire \sumIII[15]_i_15_n_0 ;
  wire \sumIII[15]_i_16_n_0 ;
  wire \sumIII[15]_i_17_n_0 ;
  wire \sumIII[15]_i_2_n_0 ;
  wire \sumIII[15]_i_3_n_0 ;
  wire \sumIII[15]_i_4_n_0 ;
  wire \sumIII[15]_i_5_n_0 ;
  wire \sumIII[15]_i_6_n_0 ;
  wire \sumIII[15]_i_7_n_0 ;
  wire \sumIII[15]_i_8_n_0 ;
  wire \sumIII[15]_i_9_n_0 ;
  wire \sumIII[23]_i_10_n_0 ;
  wire \sumIII[23]_i_11_n_0 ;
  wire \sumIII[23]_i_12_n_0 ;
  wire \sumIII[23]_i_13_n_0 ;
  wire \sumIII[23]_i_14_n_0 ;
  wire \sumIII[23]_i_15_n_0 ;
  wire \sumIII[23]_i_16_n_0 ;
  wire \sumIII[23]_i_2_n_0 ;
  wire \sumIII[23]_i_3_n_0 ;
  wire \sumIII[23]_i_4_n_0 ;
  wire \sumIII[23]_i_5_n_0 ;
  wire \sumIII[23]_i_6_n_0 ;
  wire \sumIII[23]_i_7_n_0 ;
  wire \sumIII[23]_i_8_n_0 ;
  wire \sumIII[23]_i_9_n_0 ;
  wire \sumIII[7]_i_10_n_0 ;
  wire \sumIII[7]_i_11_n_0 ;
  wire \sumIII[7]_i_12_n_0 ;
  wire \sumIII[7]_i_13_n_0 ;
  wire \sumIII[7]_i_14_n_0 ;
  wire \sumIII[7]_i_15_n_0 ;
  wire \sumIII[7]_i_16_n_0 ;
  wire \sumIII[7]_i_17_n_0 ;
  wire \sumIII[7]_i_2_n_0 ;
  wire \sumIII[7]_i_3_n_0 ;
  wire \sumIII[7]_i_4_n_0 ;
  wire \sumIII[7]_i_5_n_0 ;
  wire \sumIII[7]_i_6_n_0 ;
  wire \sumIII[7]_i_7_n_0 ;
  wire \sumIII[7]_i_8_n_0 ;
  wire \sumIII[7]_i_9_n_0 ;
  wire \sumIII_reg[15]_i_1_n_0 ;
  wire \sumIII_reg[15]_i_1_n_1 ;
  wire \sumIII_reg[15]_i_1_n_10 ;
  wire \sumIII_reg[15]_i_1_n_11 ;
  wire \sumIII_reg[15]_i_1_n_12 ;
  wire \sumIII_reg[15]_i_1_n_13 ;
  wire \sumIII_reg[15]_i_1_n_14 ;
  wire \sumIII_reg[15]_i_1_n_15 ;
  wire \sumIII_reg[15]_i_1_n_2 ;
  wire \sumIII_reg[15]_i_1_n_3 ;
  wire \sumIII_reg[15]_i_1_n_4 ;
  wire \sumIII_reg[15]_i_1_n_5 ;
  wire \sumIII_reg[15]_i_1_n_6 ;
  wire \sumIII_reg[15]_i_1_n_7 ;
  wire \sumIII_reg[15]_i_1_n_8 ;
  wire \sumIII_reg[15]_i_1_n_9 ;
  wire \sumIII_reg[23]_i_1_n_1 ;
  wire \sumIII_reg[23]_i_1_n_10 ;
  wire \sumIII_reg[23]_i_1_n_11 ;
  wire \sumIII_reg[23]_i_1_n_12 ;
  wire \sumIII_reg[23]_i_1_n_13 ;
  wire \sumIII_reg[23]_i_1_n_14 ;
  wire \sumIII_reg[23]_i_1_n_15 ;
  wire \sumIII_reg[23]_i_1_n_2 ;
  wire \sumIII_reg[23]_i_1_n_3 ;
  wire \sumIII_reg[23]_i_1_n_4 ;
  wire \sumIII_reg[23]_i_1_n_5 ;
  wire \sumIII_reg[23]_i_1_n_6 ;
  wire \sumIII_reg[23]_i_1_n_7 ;
  wire \sumIII_reg[23]_i_1_n_8 ;
  wire \sumIII_reg[23]_i_1_n_9 ;
  wire \sumIII_reg[7]_i_1_n_0 ;
  wire \sumIII_reg[7]_i_1_n_1 ;
  wire \sumIII_reg[7]_i_1_n_10 ;
  wire \sumIII_reg[7]_i_1_n_11 ;
  wire \sumIII_reg[7]_i_1_n_12 ;
  wire \sumIII_reg[7]_i_1_n_13 ;
  wire \sumIII_reg[7]_i_1_n_14 ;
  wire \sumIII_reg[7]_i_1_n_15 ;
  wire \sumIII_reg[7]_i_1_n_2 ;
  wire \sumIII_reg[7]_i_1_n_3 ;
  wire \sumIII_reg[7]_i_1_n_4 ;
  wire \sumIII_reg[7]_i_1_n_5 ;
  wire \sumIII_reg[7]_i_1_n_6 ;
  wire \sumIII_reg[7]_i_1_n_7 ;
  wire \sumIII_reg[7]_i_1_n_8 ;
  wire \sumIII_reg[7]_i_1_n_9 ;
  wire [22:0]sumX;
  wire [43:0]sumXA;
  wire [20:0]sumXA0;
  wire [20:0]sumXA00_in;
  wire \sumXA[0]_i_1_n_0 ;
  wire \sumXA[10]_i_1_n_0 ;
  wire \sumXA[11]_i_1_n_0 ;
  wire \sumXA[12]_i_1_n_0 ;
  wire \sumXA[13]_i_1_n_0 ;
  wire \sumXA[14]_i_1_n_0 ;
  wire \sumXA[15]_i_10_n_0 ;
  wire \sumXA[15]_i_1_n_0 ;
  wire \sumXA[15]_i_3_n_0 ;
  wire \sumXA[15]_i_4_n_0 ;
  wire \sumXA[15]_i_5_n_0 ;
  wire \sumXA[15]_i_6_n_0 ;
  wire \sumXA[15]_i_7_n_0 ;
  wire \sumXA[15]_i_8_n_0 ;
  wire \sumXA[15]_i_9_n_0 ;
  wire \sumXA[16]_i_1_n_0 ;
  wire \sumXA[17]_i_1_n_0 ;
  wire \sumXA[18]_i_1_n_0 ;
  wire \sumXA[19]_i_1_n_0 ;
  wire \sumXA[1]_i_1_n_0 ;
  wire \sumXA[20]_i_1_n_0 ;
  wire \sumXA[21]_i_1_n_0 ;
  wire \sumXA[21]_i_3_n_0 ;
  wire \sumXA[21]_i_4_n_0 ;
  wire \sumXA[21]_i_5_n_0 ;
  wire \sumXA[21]_i_6_n_0 ;
  wire \sumXA[21]_i_7_n_0 ;
  wire \sumXA[21]_i_8_n_0 ;
  wire \sumXA[22]_i_1_n_0 ;
  wire \sumXA[23]_i_1_n_0 ;
  wire \sumXA[24]_i_1_n_0 ;
  wire \sumXA[25]_i_1_n_0 ;
  wire \sumXA[26]_i_1_n_0 ;
  wire \sumXA[27]_i_1_n_0 ;
  wire \sumXA[28]_i_1_n_0 ;
  wire \sumXA[29]_i_10_n_0 ;
  wire \sumXA[29]_i_1_n_0 ;
  wire \sumXA[29]_i_3_n_0 ;
  wire \sumXA[29]_i_4_n_0 ;
  wire \sumXA[29]_i_5_n_0 ;
  wire \sumXA[29]_i_6_n_0 ;
  wire \sumXA[29]_i_7_n_0 ;
  wire \sumXA[29]_i_8_n_0 ;
  wire \sumXA[29]_i_9_n_0 ;
  wire \sumXA[2]_i_1_n_0 ;
  wire \sumXA[30]_i_1_n_0 ;
  wire \sumXA[31]_i_1_n_0 ;
  wire \sumXA[32]_i_1_n_0 ;
  wire \sumXA[33]_i_1_n_0 ;
  wire \sumXA[34]_i_1_n_0 ;
  wire \sumXA[35]_i_1_n_0 ;
  wire \sumXA[36]_i_1_n_0 ;
  wire \sumXA[37]_i_10_n_0 ;
  wire \sumXA[37]_i_1_n_0 ;
  wire \sumXA[37]_i_3_n_0 ;
  wire \sumXA[37]_i_4_n_0 ;
  wire \sumXA[37]_i_5_n_0 ;
  wire \sumXA[37]_i_6_n_0 ;
  wire \sumXA[37]_i_7_n_0 ;
  wire \sumXA[37]_i_8_n_0 ;
  wire \sumXA[37]_i_9_n_0 ;
  wire \sumXA[38]_i_1_n_0 ;
  wire \sumXA[39]_i_1_n_0 ;
  wire \sumXA[3]_i_1_n_0 ;
  wire \sumXA[40]_i_1_n_0 ;
  wire \sumXA[41]_i_1_n_0 ;
  wire \sumXA[42]_i_1_n_0 ;
  wire \sumXA[43]_i_1_n_0 ;
  wire \sumXA[43]_i_3_n_0 ;
  wire \sumXA[43]_i_4_n_0 ;
  wire \sumXA[43]_i_5_n_0 ;
  wire \sumXA[43]_i_6_n_0 ;
  wire \sumXA[43]_i_7_n_0 ;
  wire \sumXA[43]_i_8_n_0 ;
  wire \sumXA[4]_i_1_n_0 ;
  wire \sumXA[5]_i_1_n_0 ;
  wire \sumXA[6]_i_1_n_0 ;
  wire \sumXA[7]_i_10_n_0 ;
  wire \sumXA[7]_i_1_n_0 ;
  wire \sumXA[7]_i_3_n_0 ;
  wire \sumXA[7]_i_4_n_0 ;
  wire \sumXA[7]_i_5_n_0 ;
  wire \sumXA[7]_i_6_n_0 ;
  wire \sumXA[7]_i_7_n_0 ;
  wire \sumXA[7]_i_8_n_0 ;
  wire \sumXA[7]_i_9_n_0 ;
  wire \sumXA[8]_i_1_n_0 ;
  wire \sumXA[9]_i_1_n_0 ;
  wire \sumXA_reg[15]_i_2_n_0 ;
  wire \sumXA_reg[15]_i_2_n_1 ;
  wire \sumXA_reg[15]_i_2_n_2 ;
  wire \sumXA_reg[15]_i_2_n_3 ;
  wire \sumXA_reg[15]_i_2_n_4 ;
  wire \sumXA_reg[15]_i_2_n_5 ;
  wire \sumXA_reg[15]_i_2_n_6 ;
  wire \sumXA_reg[15]_i_2_n_7 ;
  wire \sumXA_reg[21]_i_2_n_2 ;
  wire \sumXA_reg[21]_i_2_n_4 ;
  wire \sumXA_reg[21]_i_2_n_5 ;
  wire \sumXA_reg[21]_i_2_n_6 ;
  wire \sumXA_reg[21]_i_2_n_7 ;
  wire \sumXA_reg[29]_i_2_n_0 ;
  wire \sumXA_reg[29]_i_2_n_1 ;
  wire \sumXA_reg[29]_i_2_n_2 ;
  wire \sumXA_reg[29]_i_2_n_3 ;
  wire \sumXA_reg[29]_i_2_n_4 ;
  wire \sumXA_reg[29]_i_2_n_5 ;
  wire \sumXA_reg[29]_i_2_n_6 ;
  wire \sumXA_reg[29]_i_2_n_7 ;
  wire \sumXA_reg[37]_i_2_n_0 ;
  wire \sumXA_reg[37]_i_2_n_1 ;
  wire \sumXA_reg[37]_i_2_n_2 ;
  wire \sumXA_reg[37]_i_2_n_3 ;
  wire \sumXA_reg[37]_i_2_n_4 ;
  wire \sumXA_reg[37]_i_2_n_5 ;
  wire \sumXA_reg[37]_i_2_n_6 ;
  wire \sumXA_reg[37]_i_2_n_7 ;
  wire \sumXA_reg[43]_i_2_n_2 ;
  wire \sumXA_reg[43]_i_2_n_4 ;
  wire \sumXA_reg[43]_i_2_n_5 ;
  wire \sumXA_reg[43]_i_2_n_6 ;
  wire \sumXA_reg[43]_i_2_n_7 ;
  wire \sumXA_reg[7]_i_2_n_0 ;
  wire \sumXA_reg[7]_i_2_n_1 ;
  wire \sumXA_reg[7]_i_2_n_2 ;
  wire \sumXA_reg[7]_i_2_n_3 ;
  wire \sumXA_reg[7]_i_2_n_4 ;
  wire \sumXA_reg[7]_i_2_n_5 ;
  wire \sumXA_reg[7]_i_2_n_6 ;
  wire \sumXA_reg[7]_i_2_n_7 ;
  wire \sumXB[15]_i_10_n_0 ;
  wire \sumXB[15]_i_11_n_0 ;
  wire \sumXB[15]_i_12_n_0 ;
  wire \sumXB[15]_i_13_n_0 ;
  wire \sumXB[15]_i_14_n_0 ;
  wire \sumXB[15]_i_15_n_0 ;
  wire \sumXB[15]_i_16_n_0 ;
  wire \sumXB[15]_i_17_n_0 ;
  wire \sumXB[15]_i_2_n_0 ;
  wire \sumXB[15]_i_3_n_0 ;
  wire \sumXB[15]_i_4_n_0 ;
  wire \sumXB[15]_i_5_n_0 ;
  wire \sumXB[15]_i_6_n_0 ;
  wire \sumXB[15]_i_7_n_0 ;
  wire \sumXB[15]_i_8_n_0 ;
  wire \sumXB[15]_i_9_n_0 ;
  wire \sumXB[22]_i_10_n_0 ;
  wire \sumXB[22]_i_11_n_0 ;
  wire \sumXB[22]_i_12_n_0 ;
  wire \sumXB[22]_i_13_n_0 ;
  wire \sumXB[22]_i_14_n_0 ;
  wire \sumXB[22]_i_2_n_0 ;
  wire \sumXB[22]_i_3_n_0 ;
  wire \sumXB[22]_i_4_n_0 ;
  wire \sumXB[22]_i_5_n_0 ;
  wire \sumXB[22]_i_6_n_0 ;
  wire \sumXB[22]_i_7_n_0 ;
  wire \sumXB[22]_i_8_n_0 ;
  wire \sumXB[22]_i_9_n_0 ;
  wire \sumXB[7]_i_10_n_0 ;
  wire \sumXB[7]_i_11_n_0 ;
  wire \sumXB[7]_i_12_n_0 ;
  wire \sumXB[7]_i_13_n_0 ;
  wire \sumXB[7]_i_14_n_0 ;
  wire \sumXB[7]_i_15_n_0 ;
  wire \sumXB[7]_i_16_n_0 ;
  wire \sumXB[7]_i_17_n_0 ;
  wire \sumXB[7]_i_2_n_0 ;
  wire \sumXB[7]_i_3_n_0 ;
  wire \sumXB[7]_i_4_n_0 ;
  wire \sumXB[7]_i_5_n_0 ;
  wire \sumXB[7]_i_6_n_0 ;
  wire \sumXB[7]_i_7_n_0 ;
  wire \sumXB[7]_i_8_n_0 ;
  wire \sumXB[7]_i_9_n_0 ;
  wire \sumXB_reg[15]_i_1_n_0 ;
  wire \sumXB_reg[15]_i_1_n_1 ;
  wire \sumXB_reg[15]_i_1_n_10 ;
  wire \sumXB_reg[15]_i_1_n_11 ;
  wire \sumXB_reg[15]_i_1_n_12 ;
  wire \sumXB_reg[15]_i_1_n_13 ;
  wire \sumXB_reg[15]_i_1_n_14 ;
  wire \sumXB_reg[15]_i_1_n_15 ;
  wire \sumXB_reg[15]_i_1_n_2 ;
  wire \sumXB_reg[15]_i_1_n_3 ;
  wire \sumXB_reg[15]_i_1_n_4 ;
  wire \sumXB_reg[15]_i_1_n_5 ;
  wire \sumXB_reg[15]_i_1_n_6 ;
  wire \sumXB_reg[15]_i_1_n_7 ;
  wire \sumXB_reg[15]_i_1_n_8 ;
  wire \sumXB_reg[15]_i_1_n_9 ;
  wire \sumXB_reg[22]_i_1_n_10 ;
  wire \sumXB_reg[22]_i_1_n_11 ;
  wire \sumXB_reg[22]_i_1_n_12 ;
  wire \sumXB_reg[22]_i_1_n_13 ;
  wire \sumXB_reg[22]_i_1_n_14 ;
  wire \sumXB_reg[22]_i_1_n_15 ;
  wire \sumXB_reg[22]_i_1_n_2 ;
  wire \sumXB_reg[22]_i_1_n_3 ;
  wire \sumXB_reg[22]_i_1_n_4 ;
  wire \sumXB_reg[22]_i_1_n_5 ;
  wire \sumXB_reg[22]_i_1_n_6 ;
  wire \sumXB_reg[22]_i_1_n_7 ;
  wire \sumXB_reg[22]_i_1_n_9 ;
  wire \sumXB_reg[7]_i_1_n_0 ;
  wire \sumXB_reg[7]_i_1_n_1 ;
  wire \sumXB_reg[7]_i_1_n_10 ;
  wire \sumXB_reg[7]_i_1_n_11 ;
  wire \sumXB_reg[7]_i_1_n_12 ;
  wire \sumXB_reg[7]_i_1_n_13 ;
  wire \sumXB_reg[7]_i_1_n_14 ;
  wire \sumXB_reg[7]_i_1_n_15 ;
  wire \sumXB_reg[7]_i_1_n_2 ;
  wire \sumXB_reg[7]_i_1_n_3 ;
  wire \sumXB_reg[7]_i_1_n_4 ;
  wire \sumXB_reg[7]_i_1_n_5 ;
  wire \sumXB_reg[7]_i_1_n_6 ;
  wire \sumXB_reg[7]_i_1_n_7 ;
  wire \sumXB_reg[7]_i_1_n_8 ;
  wire \sumXB_reg[7]_i_1_n_9 ;
  wire \sumXB_reg_n_0_[0] ;
  wire \sumXB_reg_n_0_[10] ;
  wire \sumXB_reg_n_0_[11] ;
  wire \sumXB_reg_n_0_[12] ;
  wire \sumXB_reg_n_0_[13] ;
  wire \sumXB_reg_n_0_[14] ;
  wire \sumXB_reg_n_0_[15] ;
  wire \sumXB_reg_n_0_[16] ;
  wire \sumXB_reg_n_0_[17] ;
  wire \sumXB_reg_n_0_[18] ;
  wire \sumXB_reg_n_0_[19] ;
  wire \sumXB_reg_n_0_[1] ;
  wire \sumXB_reg_n_0_[20] ;
  wire \sumXB_reg_n_0_[21] ;
  wire \sumXB_reg_n_0_[22] ;
  wire \sumXB_reg_n_0_[2] ;
  wire \sumXB_reg_n_0_[3] ;
  wire \sumXB_reg_n_0_[4] ;
  wire \sumXB_reg_n_0_[5] ;
  wire \sumXB_reg_n_0_[6] ;
  wire \sumXB_reg_n_0_[7] ;
  wire \sumXB_reg_n_0_[8] ;
  wire \sumXB_reg_n_0_[9] ;
  wire [22:0]sumXY;
  wire [43:0]sumXYA;
  wire [20:0]sumXYA0;
  wire [20:0]sumXYA00_in;
  wire \sumXYA[0]_i_1_n_0 ;
  wire \sumXYA[10]_i_1_n_0 ;
  wire \sumXYA[11]_i_1_n_0 ;
  wire \sumXYA[12]_i_1_n_0 ;
  wire \sumXYA[13]_i_1_n_0 ;
  wire \sumXYA[14]_i_1_n_0 ;
  wire \sumXYA[15]_i_10_n_0 ;
  wire \sumXYA[15]_i_1_n_0 ;
  wire \sumXYA[15]_i_3_n_0 ;
  wire \sumXYA[15]_i_4_n_0 ;
  wire \sumXYA[15]_i_5_n_0 ;
  wire \sumXYA[15]_i_6_n_0 ;
  wire \sumXYA[15]_i_7_n_0 ;
  wire \sumXYA[15]_i_8_n_0 ;
  wire \sumXYA[15]_i_9_n_0 ;
  wire \sumXYA[16]_i_1_n_0 ;
  wire \sumXYA[17]_i_1_n_0 ;
  wire \sumXYA[18]_i_1_n_0 ;
  wire \sumXYA[19]_i_1_n_0 ;
  wire \sumXYA[1]_i_1_n_0 ;
  wire \sumXYA[20]_i_1_n_0 ;
  wire \sumXYA[21]_i_1_n_0 ;
  wire \sumXYA[21]_i_3_n_0 ;
  wire \sumXYA[21]_i_4_n_0 ;
  wire \sumXYA[21]_i_5_n_0 ;
  wire \sumXYA[21]_i_6_n_0 ;
  wire \sumXYA[21]_i_7_n_0 ;
  wire \sumXYA[21]_i_8_n_0 ;
  wire \sumXYA[22]_i_1_n_0 ;
  wire \sumXYA[23]_i_1_n_0 ;
  wire \sumXYA[24]_i_1_n_0 ;
  wire \sumXYA[25]_i_1_n_0 ;
  wire \sumXYA[26]_i_1_n_0 ;
  wire \sumXYA[27]_i_1_n_0 ;
  wire \sumXYA[28]_i_1_n_0 ;
  wire \sumXYA[29]_i_10_n_0 ;
  wire \sumXYA[29]_i_1_n_0 ;
  wire \sumXYA[29]_i_3_n_0 ;
  wire \sumXYA[29]_i_4_n_0 ;
  wire \sumXYA[29]_i_5_n_0 ;
  wire \sumXYA[29]_i_6_n_0 ;
  wire \sumXYA[29]_i_7_n_0 ;
  wire \sumXYA[29]_i_8_n_0 ;
  wire \sumXYA[29]_i_9_n_0 ;
  wire \sumXYA[2]_i_1_n_0 ;
  wire \sumXYA[30]_i_1_n_0 ;
  wire \sumXYA[31]_i_1_n_0 ;
  wire \sumXYA[32]_i_1_n_0 ;
  wire \sumXYA[33]_i_1_n_0 ;
  wire \sumXYA[34]_i_1_n_0 ;
  wire \sumXYA[35]_i_1_n_0 ;
  wire \sumXYA[36]_i_1_n_0 ;
  wire \sumXYA[37]_i_10_n_0 ;
  wire \sumXYA[37]_i_1_n_0 ;
  wire \sumXYA[37]_i_3_n_0 ;
  wire \sumXYA[37]_i_4_n_0 ;
  wire \sumXYA[37]_i_5_n_0 ;
  wire \sumXYA[37]_i_6_n_0 ;
  wire \sumXYA[37]_i_7_n_0 ;
  wire \sumXYA[37]_i_8_n_0 ;
  wire \sumXYA[37]_i_9_n_0 ;
  wire \sumXYA[38]_i_1_n_0 ;
  wire \sumXYA[39]_i_1_n_0 ;
  wire \sumXYA[3]_i_1_n_0 ;
  wire \sumXYA[40]_i_1_n_0 ;
  wire \sumXYA[41]_i_1_n_0 ;
  wire \sumXYA[42]_i_1_n_0 ;
  wire \sumXYA[43]_i_1_n_0 ;
  wire \sumXYA[43]_i_3_n_0 ;
  wire \sumXYA[43]_i_4_n_0 ;
  wire \sumXYA[43]_i_5_n_0 ;
  wire \sumXYA[43]_i_6_n_0 ;
  wire \sumXYA[43]_i_7_n_0 ;
  wire \sumXYA[43]_i_8_n_0 ;
  wire \sumXYA[4]_i_1_n_0 ;
  wire \sumXYA[5]_i_1_n_0 ;
  wire \sumXYA[6]_i_1_n_0 ;
  wire \sumXYA[7]_i_10_n_0 ;
  wire \sumXYA[7]_i_1_n_0 ;
  wire \sumXYA[7]_i_3_n_0 ;
  wire \sumXYA[7]_i_4_n_0 ;
  wire \sumXYA[7]_i_5_n_0 ;
  wire \sumXYA[7]_i_6_n_0 ;
  wire \sumXYA[7]_i_7_n_0 ;
  wire \sumXYA[7]_i_8_n_0 ;
  wire \sumXYA[7]_i_9_n_0 ;
  wire \sumXYA[8]_i_1_n_0 ;
  wire \sumXYA[9]_i_1_n_0 ;
  wire \sumXYA_reg[15]_i_2_n_0 ;
  wire \sumXYA_reg[15]_i_2_n_1 ;
  wire \sumXYA_reg[15]_i_2_n_2 ;
  wire \sumXYA_reg[15]_i_2_n_3 ;
  wire \sumXYA_reg[15]_i_2_n_4 ;
  wire \sumXYA_reg[15]_i_2_n_5 ;
  wire \sumXYA_reg[15]_i_2_n_6 ;
  wire \sumXYA_reg[15]_i_2_n_7 ;
  wire \sumXYA_reg[21]_i_2_n_2 ;
  wire \sumXYA_reg[21]_i_2_n_4 ;
  wire \sumXYA_reg[21]_i_2_n_5 ;
  wire \sumXYA_reg[21]_i_2_n_6 ;
  wire \sumXYA_reg[21]_i_2_n_7 ;
  wire \sumXYA_reg[29]_i_2_n_0 ;
  wire \sumXYA_reg[29]_i_2_n_1 ;
  wire \sumXYA_reg[29]_i_2_n_2 ;
  wire \sumXYA_reg[29]_i_2_n_3 ;
  wire \sumXYA_reg[29]_i_2_n_4 ;
  wire \sumXYA_reg[29]_i_2_n_5 ;
  wire \sumXYA_reg[29]_i_2_n_6 ;
  wire \sumXYA_reg[29]_i_2_n_7 ;
  wire \sumXYA_reg[37]_i_2_n_0 ;
  wire \sumXYA_reg[37]_i_2_n_1 ;
  wire \sumXYA_reg[37]_i_2_n_2 ;
  wire \sumXYA_reg[37]_i_2_n_3 ;
  wire \sumXYA_reg[37]_i_2_n_4 ;
  wire \sumXYA_reg[37]_i_2_n_5 ;
  wire \sumXYA_reg[37]_i_2_n_6 ;
  wire \sumXYA_reg[37]_i_2_n_7 ;
  wire \sumXYA_reg[43]_i_2_n_2 ;
  wire \sumXYA_reg[43]_i_2_n_4 ;
  wire \sumXYA_reg[43]_i_2_n_5 ;
  wire \sumXYA_reg[43]_i_2_n_6 ;
  wire \sumXYA_reg[43]_i_2_n_7 ;
  wire \sumXYA_reg[7]_i_2_n_0 ;
  wire \sumXYA_reg[7]_i_2_n_1 ;
  wire \sumXYA_reg[7]_i_2_n_2 ;
  wire \sumXYA_reg[7]_i_2_n_3 ;
  wire \sumXYA_reg[7]_i_2_n_4 ;
  wire \sumXYA_reg[7]_i_2_n_5 ;
  wire \sumXYA_reg[7]_i_2_n_6 ;
  wire \sumXYA_reg[7]_i_2_n_7 ;
  wire \sumXYB[15]_i_10_n_0 ;
  wire \sumXYB[15]_i_11_n_0 ;
  wire \sumXYB[15]_i_12_n_0 ;
  wire \sumXYB[15]_i_13_n_0 ;
  wire \sumXYB[15]_i_14_n_0 ;
  wire \sumXYB[15]_i_15_n_0 ;
  wire \sumXYB[15]_i_16_n_0 ;
  wire \sumXYB[15]_i_17_n_0 ;
  wire \sumXYB[15]_i_2_n_0 ;
  wire \sumXYB[15]_i_3_n_0 ;
  wire \sumXYB[15]_i_4_n_0 ;
  wire \sumXYB[15]_i_5_n_0 ;
  wire \sumXYB[15]_i_6_n_0 ;
  wire \sumXYB[15]_i_7_n_0 ;
  wire \sumXYB[15]_i_8_n_0 ;
  wire \sumXYB[15]_i_9_n_0 ;
  wire \sumXYB[22]_i_10_n_0 ;
  wire \sumXYB[22]_i_11_n_0 ;
  wire \sumXYB[22]_i_12_n_0 ;
  wire \sumXYB[22]_i_13_n_0 ;
  wire \sumXYB[22]_i_14_n_0 ;
  wire \sumXYB[22]_i_2_n_0 ;
  wire \sumXYB[22]_i_3_n_0 ;
  wire \sumXYB[22]_i_4_n_0 ;
  wire \sumXYB[22]_i_5_n_0 ;
  wire \sumXYB[22]_i_6_n_0 ;
  wire \sumXYB[22]_i_7_n_0 ;
  wire \sumXYB[22]_i_8_n_0 ;
  wire \sumXYB[22]_i_9_n_0 ;
  wire \sumXYB[7]_i_10_n_0 ;
  wire \sumXYB[7]_i_11_n_0 ;
  wire \sumXYB[7]_i_12_n_0 ;
  wire \sumXYB[7]_i_13_n_0 ;
  wire \sumXYB[7]_i_14_n_0 ;
  wire \sumXYB[7]_i_15_n_0 ;
  wire \sumXYB[7]_i_16_n_0 ;
  wire \sumXYB[7]_i_17_n_0 ;
  wire \sumXYB[7]_i_2_n_0 ;
  wire \sumXYB[7]_i_3_n_0 ;
  wire \sumXYB[7]_i_4_n_0 ;
  wire \sumXYB[7]_i_5_n_0 ;
  wire \sumXYB[7]_i_6_n_0 ;
  wire \sumXYB[7]_i_7_n_0 ;
  wire \sumXYB[7]_i_8_n_0 ;
  wire \sumXYB[7]_i_9_n_0 ;
  wire \sumXYB_reg[15]_i_1_n_0 ;
  wire \sumXYB_reg[15]_i_1_n_1 ;
  wire \sumXYB_reg[15]_i_1_n_10 ;
  wire \sumXYB_reg[15]_i_1_n_11 ;
  wire \sumXYB_reg[15]_i_1_n_12 ;
  wire \sumXYB_reg[15]_i_1_n_13 ;
  wire \sumXYB_reg[15]_i_1_n_14 ;
  wire \sumXYB_reg[15]_i_1_n_15 ;
  wire \sumXYB_reg[15]_i_1_n_2 ;
  wire \sumXYB_reg[15]_i_1_n_3 ;
  wire \sumXYB_reg[15]_i_1_n_4 ;
  wire \sumXYB_reg[15]_i_1_n_5 ;
  wire \sumXYB_reg[15]_i_1_n_6 ;
  wire \sumXYB_reg[15]_i_1_n_7 ;
  wire \sumXYB_reg[15]_i_1_n_8 ;
  wire \sumXYB_reg[15]_i_1_n_9 ;
  wire \sumXYB_reg[22]_i_1_n_10 ;
  wire \sumXYB_reg[22]_i_1_n_11 ;
  wire \sumXYB_reg[22]_i_1_n_12 ;
  wire \sumXYB_reg[22]_i_1_n_13 ;
  wire \sumXYB_reg[22]_i_1_n_14 ;
  wire \sumXYB_reg[22]_i_1_n_15 ;
  wire \sumXYB_reg[22]_i_1_n_2 ;
  wire \sumXYB_reg[22]_i_1_n_3 ;
  wire \sumXYB_reg[22]_i_1_n_4 ;
  wire \sumXYB_reg[22]_i_1_n_5 ;
  wire \sumXYB_reg[22]_i_1_n_6 ;
  wire \sumXYB_reg[22]_i_1_n_7 ;
  wire \sumXYB_reg[22]_i_1_n_9 ;
  wire \sumXYB_reg[7]_i_1_n_0 ;
  wire \sumXYB_reg[7]_i_1_n_1 ;
  wire \sumXYB_reg[7]_i_1_n_10 ;
  wire \sumXYB_reg[7]_i_1_n_11 ;
  wire \sumXYB_reg[7]_i_1_n_12 ;
  wire \sumXYB_reg[7]_i_1_n_13 ;
  wire \sumXYB_reg[7]_i_1_n_14 ;
  wire \sumXYB_reg[7]_i_1_n_15 ;
  wire \sumXYB_reg[7]_i_1_n_2 ;
  wire \sumXYB_reg[7]_i_1_n_3 ;
  wire \sumXYB_reg[7]_i_1_n_4 ;
  wire \sumXYB_reg[7]_i_1_n_5 ;
  wire \sumXYB_reg[7]_i_1_n_6 ;
  wire \sumXYB_reg[7]_i_1_n_7 ;
  wire \sumXYB_reg[7]_i_1_n_8 ;
  wire \sumXYB_reg[7]_i_1_n_9 ;
  wire \sumXYB_reg_n_0_[0] ;
  wire \sumXYB_reg_n_0_[10] ;
  wire \sumXYB_reg_n_0_[11] ;
  wire \sumXYB_reg_n_0_[12] ;
  wire \sumXYB_reg_n_0_[13] ;
  wire \sumXYB_reg_n_0_[14] ;
  wire \sumXYB_reg_n_0_[15] ;
  wire \sumXYB_reg_n_0_[16] ;
  wire \sumXYB_reg_n_0_[17] ;
  wire \sumXYB_reg_n_0_[18] ;
  wire \sumXYB_reg_n_0_[19] ;
  wire \sumXYB_reg_n_0_[1] ;
  wire \sumXYB_reg_n_0_[20] ;
  wire \sumXYB_reg_n_0_[21] ;
  wire \sumXYB_reg_n_0_[22] ;
  wire \sumXYB_reg_n_0_[2] ;
  wire \sumXYB_reg_n_0_[3] ;
  wire \sumXYB_reg_n_0_[4] ;
  wire \sumXYB_reg_n_0_[5] ;
  wire \sumXYB_reg_n_0_[6] ;
  wire \sumXYB_reg_n_0_[7] ;
  wire \sumXYB_reg_n_0_[8] ;
  wire \sumXYB_reg_n_0_[9] ;
  wire \sumXY[15]_i_10_n_0 ;
  wire \sumXY[15]_i_11_n_0 ;
  wire \sumXY[15]_i_12_n_0 ;
  wire \sumXY[15]_i_13_n_0 ;
  wire \sumXY[15]_i_14_n_0 ;
  wire \sumXY[15]_i_15_n_0 ;
  wire \sumXY[15]_i_16_n_0 ;
  wire \sumXY[15]_i_17_n_0 ;
  wire \sumXY[15]_i_2_n_0 ;
  wire \sumXY[15]_i_3_n_0 ;
  wire \sumXY[15]_i_4_n_0 ;
  wire \sumXY[15]_i_5_n_0 ;
  wire \sumXY[15]_i_6_n_0 ;
  wire \sumXY[15]_i_7_n_0 ;
  wire \sumXY[15]_i_8_n_0 ;
  wire \sumXY[15]_i_9_n_0 ;
  wire \sumXY[22]_i_10_n_0 ;
  wire \sumXY[22]_i_11_n_0 ;
  wire \sumXY[22]_i_12_n_0 ;
  wire \sumXY[22]_i_13_n_0 ;
  wire \sumXY[22]_i_14_n_0 ;
  wire \sumXY[22]_i_2_n_0 ;
  wire \sumXY[22]_i_3_n_0 ;
  wire \sumXY[22]_i_4_n_0 ;
  wire \sumXY[22]_i_5_n_0 ;
  wire \sumXY[22]_i_6_n_0 ;
  wire \sumXY[22]_i_7_n_0 ;
  wire \sumXY[22]_i_8_n_0 ;
  wire \sumXY[22]_i_9_n_0 ;
  wire \sumXY[7]_i_10_n_0 ;
  wire \sumXY[7]_i_11_n_0 ;
  wire \sumXY[7]_i_12_n_0 ;
  wire \sumXY[7]_i_13_n_0 ;
  wire \sumXY[7]_i_14_n_0 ;
  wire \sumXY[7]_i_15_n_0 ;
  wire \sumXY[7]_i_16_n_0 ;
  wire \sumXY[7]_i_17_n_0 ;
  wire \sumXY[7]_i_2_n_0 ;
  wire \sumXY[7]_i_3_n_0 ;
  wire \sumXY[7]_i_4_n_0 ;
  wire \sumXY[7]_i_5_n_0 ;
  wire \sumXY[7]_i_6_n_0 ;
  wire \sumXY[7]_i_7_n_0 ;
  wire \sumXY[7]_i_8_n_0 ;
  wire \sumXY[7]_i_9_n_0 ;
  wire \sumXY_reg[15]_i_1_n_0 ;
  wire \sumXY_reg[15]_i_1_n_1 ;
  wire \sumXY_reg[15]_i_1_n_10 ;
  wire \sumXY_reg[15]_i_1_n_11 ;
  wire \sumXY_reg[15]_i_1_n_12 ;
  wire \sumXY_reg[15]_i_1_n_13 ;
  wire \sumXY_reg[15]_i_1_n_14 ;
  wire \sumXY_reg[15]_i_1_n_15 ;
  wire \sumXY_reg[15]_i_1_n_2 ;
  wire \sumXY_reg[15]_i_1_n_3 ;
  wire \sumXY_reg[15]_i_1_n_4 ;
  wire \sumXY_reg[15]_i_1_n_5 ;
  wire \sumXY_reg[15]_i_1_n_6 ;
  wire \sumXY_reg[15]_i_1_n_7 ;
  wire \sumXY_reg[15]_i_1_n_8 ;
  wire \sumXY_reg[15]_i_1_n_9 ;
  wire \sumXY_reg[22]_i_1_n_10 ;
  wire \sumXY_reg[22]_i_1_n_11 ;
  wire \sumXY_reg[22]_i_1_n_12 ;
  wire \sumXY_reg[22]_i_1_n_13 ;
  wire \sumXY_reg[22]_i_1_n_14 ;
  wire \sumXY_reg[22]_i_1_n_15 ;
  wire \sumXY_reg[22]_i_1_n_2 ;
  wire \sumXY_reg[22]_i_1_n_3 ;
  wire \sumXY_reg[22]_i_1_n_4 ;
  wire \sumXY_reg[22]_i_1_n_5 ;
  wire \sumXY_reg[22]_i_1_n_6 ;
  wire \sumXY_reg[22]_i_1_n_7 ;
  wire \sumXY_reg[22]_i_1_n_9 ;
  wire \sumXY_reg[7]_i_1_n_0 ;
  wire \sumXY_reg[7]_i_1_n_1 ;
  wire \sumXY_reg[7]_i_1_n_10 ;
  wire \sumXY_reg[7]_i_1_n_11 ;
  wire \sumXY_reg[7]_i_1_n_12 ;
  wire \sumXY_reg[7]_i_1_n_13 ;
  wire \sumXY_reg[7]_i_1_n_14 ;
  wire \sumXY_reg[7]_i_1_n_15 ;
  wire \sumXY_reg[7]_i_1_n_2 ;
  wire \sumXY_reg[7]_i_1_n_3 ;
  wire \sumXY_reg[7]_i_1_n_4 ;
  wire \sumXY_reg[7]_i_1_n_5 ;
  wire \sumXY_reg[7]_i_1_n_6 ;
  wire \sumXY_reg[7]_i_1_n_7 ;
  wire \sumXY_reg[7]_i_1_n_8 ;
  wire \sumXY_reg[7]_i_1_n_9 ;
  wire \sumX[15]_i_10_n_0 ;
  wire \sumX[15]_i_11_n_0 ;
  wire \sumX[15]_i_12_n_0 ;
  wire \sumX[15]_i_13_n_0 ;
  wire \sumX[15]_i_14_n_0 ;
  wire \sumX[15]_i_15_n_0 ;
  wire \sumX[15]_i_16_n_0 ;
  wire \sumX[15]_i_17_n_0 ;
  wire \sumX[15]_i_2_n_0 ;
  wire \sumX[15]_i_3_n_0 ;
  wire \sumX[15]_i_4_n_0 ;
  wire \sumX[15]_i_5_n_0 ;
  wire \sumX[15]_i_6_n_0 ;
  wire \sumX[15]_i_7_n_0 ;
  wire \sumX[15]_i_8_n_0 ;
  wire \sumX[15]_i_9_n_0 ;
  wire \sumX[22]_i_10_n_0 ;
  wire \sumX[22]_i_11_n_0 ;
  wire \sumX[22]_i_12_n_0 ;
  wire \sumX[22]_i_13_n_0 ;
  wire \sumX[22]_i_14_n_0 ;
  wire \sumX[22]_i_2_n_0 ;
  wire \sumX[22]_i_3_n_0 ;
  wire \sumX[22]_i_4_n_0 ;
  wire \sumX[22]_i_5_n_0 ;
  wire \sumX[22]_i_6_n_0 ;
  wire \sumX[22]_i_7_n_0 ;
  wire \sumX[22]_i_8_n_0 ;
  wire \sumX[22]_i_9_n_0 ;
  wire \sumX[7]_i_10_n_0 ;
  wire \sumX[7]_i_11_n_0 ;
  wire \sumX[7]_i_12_n_0 ;
  wire \sumX[7]_i_13_n_0 ;
  wire \sumX[7]_i_14_n_0 ;
  wire \sumX[7]_i_15_n_0 ;
  wire \sumX[7]_i_16_n_0 ;
  wire \sumX[7]_i_17_n_0 ;
  wire \sumX[7]_i_2_n_0 ;
  wire \sumX[7]_i_3_n_0 ;
  wire \sumX[7]_i_4_n_0 ;
  wire \sumX[7]_i_5_n_0 ;
  wire \sumX[7]_i_6_n_0 ;
  wire \sumX[7]_i_7_n_0 ;
  wire \sumX[7]_i_8_n_0 ;
  wire \sumX[7]_i_9_n_0 ;
  wire \sumX_reg[15]_i_1_n_0 ;
  wire \sumX_reg[15]_i_1_n_1 ;
  wire \sumX_reg[15]_i_1_n_10 ;
  wire \sumX_reg[15]_i_1_n_11 ;
  wire \sumX_reg[15]_i_1_n_12 ;
  wire \sumX_reg[15]_i_1_n_13 ;
  wire \sumX_reg[15]_i_1_n_14 ;
  wire \sumX_reg[15]_i_1_n_15 ;
  wire \sumX_reg[15]_i_1_n_2 ;
  wire \sumX_reg[15]_i_1_n_3 ;
  wire \sumX_reg[15]_i_1_n_4 ;
  wire \sumX_reg[15]_i_1_n_5 ;
  wire \sumX_reg[15]_i_1_n_6 ;
  wire \sumX_reg[15]_i_1_n_7 ;
  wire \sumX_reg[15]_i_1_n_8 ;
  wire \sumX_reg[15]_i_1_n_9 ;
  wire \sumX_reg[22]_i_1_n_10 ;
  wire \sumX_reg[22]_i_1_n_11 ;
  wire \sumX_reg[22]_i_1_n_12 ;
  wire \sumX_reg[22]_i_1_n_13 ;
  wire \sumX_reg[22]_i_1_n_14 ;
  wire \sumX_reg[22]_i_1_n_15 ;
  wire \sumX_reg[22]_i_1_n_2 ;
  wire \sumX_reg[22]_i_1_n_3 ;
  wire \sumX_reg[22]_i_1_n_4 ;
  wire \sumX_reg[22]_i_1_n_5 ;
  wire \sumX_reg[22]_i_1_n_6 ;
  wire \sumX_reg[22]_i_1_n_7 ;
  wire \sumX_reg[22]_i_1_n_9 ;
  wire \sumX_reg[7]_i_1_n_0 ;
  wire \sumX_reg[7]_i_1_n_1 ;
  wire \sumX_reg[7]_i_1_n_10 ;
  wire \sumX_reg[7]_i_1_n_11 ;
  wire \sumX_reg[7]_i_1_n_12 ;
  wire \sumX_reg[7]_i_1_n_13 ;
  wire \sumX_reg[7]_i_1_n_14 ;
  wire \sumX_reg[7]_i_1_n_15 ;
  wire \sumX_reg[7]_i_1_n_2 ;
  wire \sumX_reg[7]_i_1_n_3 ;
  wire \sumX_reg[7]_i_1_n_4 ;
  wire \sumX_reg[7]_i_1_n_5 ;
  wire \sumX_reg[7]_i_1_n_6 ;
  wire \sumX_reg[7]_i_1_n_7 ;
  wire \sumX_reg[7]_i_1_n_8 ;
  wire \sumX_reg[7]_i_1_n_9 ;
  wire [43:0]sumYA;
  wire [20:0]sumYA0;
  wire [20:0]sumYA00_in;
  wire \sumYA[0]_i_1_n_0 ;
  wire \sumYA[10]_i_1_n_0 ;
  wire \sumYA[11]_i_1_n_0 ;
  wire \sumYA[12]_i_1_n_0 ;
  wire \sumYA[13]_i_1_n_0 ;
  wire \sumYA[14]_i_1_n_0 ;
  wire \sumYA[15]_i_10_n_0 ;
  wire \sumYA[15]_i_1_n_0 ;
  wire \sumYA[15]_i_3_n_0 ;
  wire \sumYA[15]_i_4_n_0 ;
  wire \sumYA[15]_i_5_n_0 ;
  wire \sumYA[15]_i_6_n_0 ;
  wire \sumYA[15]_i_7_n_0 ;
  wire \sumYA[15]_i_8_n_0 ;
  wire \sumYA[15]_i_9_n_0 ;
  wire \sumYA[16]_i_1_n_0 ;
  wire \sumYA[17]_i_1_n_0 ;
  wire \sumYA[18]_i_1_n_0 ;
  wire \sumYA[19]_i_1_n_0 ;
  wire \sumYA[1]_i_1_n_0 ;
  wire \sumYA[20]_i_1_n_0 ;
  wire \sumYA[21]_i_1_n_0 ;
  wire \sumYA[21]_i_3_n_0 ;
  wire \sumYA[21]_i_4_n_0 ;
  wire \sumYA[21]_i_5_n_0 ;
  wire \sumYA[21]_i_6_n_0 ;
  wire \sumYA[21]_i_7_n_0 ;
  wire \sumYA[21]_i_8_n_0 ;
  wire \sumYA[22]_i_1_n_0 ;
  wire \sumYA[23]_i_1_n_0 ;
  wire \sumYA[24]_i_1_n_0 ;
  wire \sumYA[25]_i_1_n_0 ;
  wire \sumYA[26]_i_1_n_0 ;
  wire \sumYA[27]_i_1_n_0 ;
  wire \sumYA[28]_i_1_n_0 ;
  wire \sumYA[29]_i_10_n_0 ;
  wire \sumYA[29]_i_1_n_0 ;
  wire \sumYA[29]_i_3_n_0 ;
  wire \sumYA[29]_i_4_n_0 ;
  wire \sumYA[29]_i_5_n_0 ;
  wire \sumYA[29]_i_6_n_0 ;
  wire \sumYA[29]_i_7_n_0 ;
  wire \sumYA[29]_i_8_n_0 ;
  wire \sumYA[29]_i_9_n_0 ;
  wire \sumYA[2]_i_1_n_0 ;
  wire \sumYA[30]_i_1_n_0 ;
  wire \sumYA[31]_i_1_n_0 ;
  wire \sumYA[32]_i_1_n_0 ;
  wire \sumYA[33]_i_1_n_0 ;
  wire \sumYA[34]_i_1_n_0 ;
  wire \sumYA[35]_i_1_n_0 ;
  wire \sumYA[36]_i_1_n_0 ;
  wire \sumYA[37]_i_10_n_0 ;
  wire \sumYA[37]_i_1_n_0 ;
  wire \sumYA[37]_i_3_n_0 ;
  wire \sumYA[37]_i_4_n_0 ;
  wire \sumYA[37]_i_5_n_0 ;
  wire \sumYA[37]_i_6_n_0 ;
  wire \sumYA[37]_i_7_n_0 ;
  wire \sumYA[37]_i_8_n_0 ;
  wire \sumYA[37]_i_9_n_0 ;
  wire \sumYA[38]_i_1_n_0 ;
  wire \sumYA[39]_i_1_n_0 ;
  wire \sumYA[3]_i_1_n_0 ;
  wire \sumYA[40]_i_1_n_0 ;
  wire \sumYA[41]_i_1_n_0 ;
  wire \sumYA[42]_i_1_n_0 ;
  wire \sumYA[43]_i_1_n_0 ;
  wire \sumYA[43]_i_3_n_0 ;
  wire \sumYA[43]_i_4_n_0 ;
  wire \sumYA[43]_i_5_n_0 ;
  wire \sumYA[43]_i_6_n_0 ;
  wire \sumYA[43]_i_7_n_0 ;
  wire \sumYA[43]_i_8_n_0 ;
  wire \sumYA[4]_i_1_n_0 ;
  wire \sumYA[5]_i_1_n_0 ;
  wire \sumYA[6]_i_1_n_0 ;
  wire \sumYA[7]_i_10_n_0 ;
  wire \sumYA[7]_i_1_n_0 ;
  wire \sumYA[7]_i_3_n_0 ;
  wire \sumYA[7]_i_4_n_0 ;
  wire \sumYA[7]_i_5_n_0 ;
  wire \sumYA[7]_i_6_n_0 ;
  wire \sumYA[7]_i_7_n_0 ;
  wire \sumYA[7]_i_8_n_0 ;
  wire \sumYA[7]_i_9_n_0 ;
  wire \sumYA[8]_i_1_n_0 ;
  wire \sumYA[9]_i_1_n_0 ;
  wire \sumYA_reg[15]_i_2_n_0 ;
  wire \sumYA_reg[15]_i_2_n_1 ;
  wire \sumYA_reg[15]_i_2_n_2 ;
  wire \sumYA_reg[15]_i_2_n_3 ;
  wire \sumYA_reg[15]_i_2_n_4 ;
  wire \sumYA_reg[15]_i_2_n_5 ;
  wire \sumYA_reg[15]_i_2_n_6 ;
  wire \sumYA_reg[15]_i_2_n_7 ;
  wire \sumYA_reg[21]_i_2_n_2 ;
  wire \sumYA_reg[21]_i_2_n_4 ;
  wire \sumYA_reg[21]_i_2_n_5 ;
  wire \sumYA_reg[21]_i_2_n_6 ;
  wire \sumYA_reg[21]_i_2_n_7 ;
  wire \sumYA_reg[29]_i_2_n_0 ;
  wire \sumYA_reg[29]_i_2_n_1 ;
  wire \sumYA_reg[29]_i_2_n_2 ;
  wire \sumYA_reg[29]_i_2_n_3 ;
  wire \sumYA_reg[29]_i_2_n_4 ;
  wire \sumYA_reg[29]_i_2_n_5 ;
  wire \sumYA_reg[29]_i_2_n_6 ;
  wire \sumYA_reg[29]_i_2_n_7 ;
  wire \sumYA_reg[37]_i_2_n_0 ;
  wire \sumYA_reg[37]_i_2_n_1 ;
  wire \sumYA_reg[37]_i_2_n_2 ;
  wire \sumYA_reg[37]_i_2_n_3 ;
  wire \sumYA_reg[37]_i_2_n_4 ;
  wire \sumYA_reg[37]_i_2_n_5 ;
  wire \sumYA_reg[37]_i_2_n_6 ;
  wire \sumYA_reg[37]_i_2_n_7 ;
  wire \sumYA_reg[43]_i_2_n_2 ;
  wire \sumYA_reg[43]_i_2_n_4 ;
  wire \sumYA_reg[43]_i_2_n_5 ;
  wire \sumYA_reg[43]_i_2_n_6 ;
  wire \sumYA_reg[43]_i_2_n_7 ;
  wire \sumYA_reg[7]_i_2_n_0 ;
  wire \sumYA_reg[7]_i_2_n_1 ;
  wire \sumYA_reg[7]_i_2_n_2 ;
  wire \sumYA_reg[7]_i_2_n_3 ;
  wire \sumYA_reg[7]_i_2_n_4 ;
  wire \sumYA_reg[7]_i_2_n_5 ;
  wire \sumYA_reg[7]_i_2_n_6 ;
  wire \sumYA_reg[7]_i_2_n_7 ;
  wire \sumYB[15]_i_10_n_0 ;
  wire \sumYB[15]_i_11_n_0 ;
  wire \sumYB[15]_i_12_n_0 ;
  wire \sumYB[15]_i_13_n_0 ;
  wire \sumYB[15]_i_14_n_0 ;
  wire \sumYB[15]_i_15_n_0 ;
  wire \sumYB[15]_i_16_n_0 ;
  wire \sumYB[15]_i_17_n_0 ;
  wire \sumYB[15]_i_2_n_0 ;
  wire \sumYB[15]_i_3_n_0 ;
  wire \sumYB[15]_i_4_n_0 ;
  wire \sumYB[15]_i_5_n_0 ;
  wire \sumYB[15]_i_6_n_0 ;
  wire \sumYB[15]_i_7_n_0 ;
  wire \sumYB[15]_i_8_n_0 ;
  wire \sumYB[15]_i_9_n_0 ;
  wire \sumYB[22]_i_10_n_0 ;
  wire \sumYB[22]_i_11_n_0 ;
  wire \sumYB[22]_i_12_n_0 ;
  wire \sumYB[22]_i_13_n_0 ;
  wire \sumYB[22]_i_14_n_0 ;
  wire \sumYB[22]_i_2_n_0 ;
  wire \sumYB[22]_i_3_n_0 ;
  wire \sumYB[22]_i_4_n_0 ;
  wire \sumYB[22]_i_5_n_0 ;
  wire \sumYB[22]_i_6_n_0 ;
  wire \sumYB[22]_i_7_n_0 ;
  wire \sumYB[22]_i_8_n_0 ;
  wire \sumYB[22]_i_9_n_0 ;
  wire \sumYB[7]_i_10_n_0 ;
  wire \sumYB[7]_i_11_n_0 ;
  wire \sumYB[7]_i_12_n_0 ;
  wire \sumYB[7]_i_13_n_0 ;
  wire \sumYB[7]_i_14_n_0 ;
  wire \sumYB[7]_i_15_n_0 ;
  wire \sumYB[7]_i_16_n_0 ;
  wire \sumYB[7]_i_17_n_0 ;
  wire \sumYB[7]_i_2_n_0 ;
  wire \sumYB[7]_i_3_n_0 ;
  wire \sumYB[7]_i_4_n_0 ;
  wire \sumYB[7]_i_5_n_0 ;
  wire \sumYB[7]_i_6_n_0 ;
  wire \sumYB[7]_i_7_n_0 ;
  wire \sumYB[7]_i_8_n_0 ;
  wire \sumYB[7]_i_9_n_0 ;
  wire \sumYB_reg[15]_i_1_n_0 ;
  wire \sumYB_reg[15]_i_1_n_1 ;
  wire \sumYB_reg[15]_i_1_n_10 ;
  wire \sumYB_reg[15]_i_1_n_11 ;
  wire \sumYB_reg[15]_i_1_n_12 ;
  wire \sumYB_reg[15]_i_1_n_13 ;
  wire \sumYB_reg[15]_i_1_n_14 ;
  wire \sumYB_reg[15]_i_1_n_15 ;
  wire \sumYB_reg[15]_i_1_n_2 ;
  wire \sumYB_reg[15]_i_1_n_3 ;
  wire \sumYB_reg[15]_i_1_n_4 ;
  wire \sumYB_reg[15]_i_1_n_5 ;
  wire \sumYB_reg[15]_i_1_n_6 ;
  wire \sumYB_reg[15]_i_1_n_7 ;
  wire \sumYB_reg[15]_i_1_n_8 ;
  wire \sumYB_reg[15]_i_1_n_9 ;
  wire \sumYB_reg[22]_i_1_n_10 ;
  wire \sumYB_reg[22]_i_1_n_11 ;
  wire \sumYB_reg[22]_i_1_n_12 ;
  wire \sumYB_reg[22]_i_1_n_13 ;
  wire \sumYB_reg[22]_i_1_n_14 ;
  wire \sumYB_reg[22]_i_1_n_15 ;
  wire \sumYB_reg[22]_i_1_n_2 ;
  wire \sumYB_reg[22]_i_1_n_3 ;
  wire \sumYB_reg[22]_i_1_n_4 ;
  wire \sumYB_reg[22]_i_1_n_5 ;
  wire \sumYB_reg[22]_i_1_n_6 ;
  wire \sumYB_reg[22]_i_1_n_7 ;
  wire \sumYB_reg[22]_i_1_n_9 ;
  wire \sumYB_reg[7]_i_1_n_0 ;
  wire \sumYB_reg[7]_i_1_n_1 ;
  wire \sumYB_reg[7]_i_1_n_10 ;
  wire \sumYB_reg[7]_i_1_n_11 ;
  wire \sumYB_reg[7]_i_1_n_12 ;
  wire \sumYB_reg[7]_i_1_n_13 ;
  wire \sumYB_reg[7]_i_1_n_14 ;
  wire \sumYB_reg[7]_i_1_n_15 ;
  wire \sumYB_reg[7]_i_1_n_2 ;
  wire \sumYB_reg[7]_i_1_n_3 ;
  wire \sumYB_reg[7]_i_1_n_4 ;
  wire \sumYB_reg[7]_i_1_n_5 ;
  wire \sumYB_reg[7]_i_1_n_6 ;
  wire \sumYB_reg[7]_i_1_n_7 ;
  wire \sumYB_reg[7]_i_1_n_8 ;
  wire \sumYB_reg[7]_i_1_n_9 ;
  wire \sumYB_reg_n_0_[0] ;
  wire \sumYB_reg_n_0_[10] ;
  wire \sumYB_reg_n_0_[11] ;
  wire \sumYB_reg_n_0_[12] ;
  wire \sumYB_reg_n_0_[13] ;
  wire \sumYB_reg_n_0_[14] ;
  wire \sumYB_reg_n_0_[15] ;
  wire \sumYB_reg_n_0_[16] ;
  wire \sumYB_reg_n_0_[17] ;
  wire \sumYB_reg_n_0_[18] ;
  wire \sumYB_reg_n_0_[19] ;
  wire \sumYB_reg_n_0_[1] ;
  wire \sumYB_reg_n_0_[20] ;
  wire \sumYB_reg_n_0_[21] ;
  wire \sumYB_reg_n_0_[22] ;
  wire \sumYB_reg_n_0_[2] ;
  wire \sumYB_reg_n_0_[3] ;
  wire \sumYB_reg_n_0_[4] ;
  wire \sumYB_reg_n_0_[5] ;
  wire \sumYB_reg_n_0_[6] ;
  wire \sumYB_reg_n_0_[7] ;
  wire \sumYB_reg_n_0_[8] ;
  wire \sumYB_reg_n_0_[9] ;
  wire \sumY[15]_i_10_n_0 ;
  wire \sumY[15]_i_11_n_0 ;
  wire \sumY[15]_i_12_n_0 ;
  wire \sumY[15]_i_13_n_0 ;
  wire \sumY[15]_i_14_n_0 ;
  wire \sumY[15]_i_15_n_0 ;
  wire \sumY[15]_i_16_n_0 ;
  wire \sumY[15]_i_17_n_0 ;
  wire \sumY[15]_i_2_n_0 ;
  wire \sumY[15]_i_3_n_0 ;
  wire \sumY[15]_i_4_n_0 ;
  wire \sumY[15]_i_5_n_0 ;
  wire \sumY[15]_i_6_n_0 ;
  wire \sumY[15]_i_7_n_0 ;
  wire \sumY[15]_i_8_n_0 ;
  wire \sumY[15]_i_9_n_0 ;
  wire \sumY[22]_i_10_n_0 ;
  wire \sumY[22]_i_11_n_0 ;
  wire \sumY[22]_i_12_n_0 ;
  wire \sumY[22]_i_13_n_0 ;
  wire \sumY[22]_i_14_n_0 ;
  wire \sumY[22]_i_2_n_0 ;
  wire \sumY[22]_i_3_n_0 ;
  wire \sumY[22]_i_4_n_0 ;
  wire \sumY[22]_i_5_n_0 ;
  wire \sumY[22]_i_6_n_0 ;
  wire \sumY[22]_i_7_n_0 ;
  wire \sumY[22]_i_8_n_0 ;
  wire \sumY[22]_i_9_n_0 ;
  wire \sumY[7]_i_10_n_0 ;
  wire \sumY[7]_i_11_n_0 ;
  wire \sumY[7]_i_12_n_0 ;
  wire \sumY[7]_i_13_n_0 ;
  wire \sumY[7]_i_14_n_0 ;
  wire \sumY[7]_i_15_n_0 ;
  wire \sumY[7]_i_16_n_0 ;
  wire \sumY[7]_i_17_n_0 ;
  wire \sumY[7]_i_2_n_0 ;
  wire \sumY[7]_i_3_n_0 ;
  wire \sumY[7]_i_4_n_0 ;
  wire \sumY[7]_i_5_n_0 ;
  wire \sumY[7]_i_6_n_0 ;
  wire \sumY[7]_i_7_n_0 ;
  wire \sumY[7]_i_8_n_0 ;
  wire \sumY[7]_i_9_n_0 ;
  wire \sumY_reg[15]_i_1_n_0 ;
  wire \sumY_reg[15]_i_1_n_1 ;
  wire \sumY_reg[15]_i_1_n_10 ;
  wire \sumY_reg[15]_i_1_n_11 ;
  wire \sumY_reg[15]_i_1_n_12 ;
  wire \sumY_reg[15]_i_1_n_13 ;
  wire \sumY_reg[15]_i_1_n_14 ;
  wire \sumY_reg[15]_i_1_n_15 ;
  wire \sumY_reg[15]_i_1_n_2 ;
  wire \sumY_reg[15]_i_1_n_3 ;
  wire \sumY_reg[15]_i_1_n_4 ;
  wire \sumY_reg[15]_i_1_n_5 ;
  wire \sumY_reg[15]_i_1_n_6 ;
  wire \sumY_reg[15]_i_1_n_7 ;
  wire \sumY_reg[15]_i_1_n_8 ;
  wire \sumY_reg[15]_i_1_n_9 ;
  wire \sumY_reg[22]_i_1_n_10 ;
  wire \sumY_reg[22]_i_1_n_11 ;
  wire \sumY_reg[22]_i_1_n_12 ;
  wire \sumY_reg[22]_i_1_n_13 ;
  wire \sumY_reg[22]_i_1_n_14 ;
  wire \sumY_reg[22]_i_1_n_15 ;
  wire \sumY_reg[22]_i_1_n_2 ;
  wire \sumY_reg[22]_i_1_n_3 ;
  wire \sumY_reg[22]_i_1_n_4 ;
  wire \sumY_reg[22]_i_1_n_5 ;
  wire \sumY_reg[22]_i_1_n_6 ;
  wire \sumY_reg[22]_i_1_n_7 ;
  wire \sumY_reg[22]_i_1_n_9 ;
  wire \sumY_reg[7]_i_1_n_0 ;
  wire \sumY_reg[7]_i_1_n_1 ;
  wire \sumY_reg[7]_i_1_n_10 ;
  wire \sumY_reg[7]_i_1_n_11 ;
  wire \sumY_reg[7]_i_1_n_12 ;
  wire \sumY_reg[7]_i_1_n_13 ;
  wire \sumY_reg[7]_i_1_n_14 ;
  wire \sumY_reg[7]_i_1_n_15 ;
  wire \sumY_reg[7]_i_1_n_2 ;
  wire \sumY_reg[7]_i_1_n_3 ;
  wire \sumY_reg[7]_i_1_n_4 ;
  wire \sumY_reg[7]_i_1_n_5 ;
  wire \sumY_reg[7]_i_1_n_6 ;
  wire \sumY_reg[7]_i_1_n_7 ;
  wire \sumY_reg[7]_i_1_n_8 ;
  wire \sumY_reg[7]_i_1_n_9 ;
  wire \sumY_reg_n_0_[0] ;
  wire \sumY_reg_n_0_[10] ;
  wire \sumY_reg_n_0_[11] ;
  wire \sumY_reg_n_0_[12] ;
  wire \sumY_reg_n_0_[13] ;
  wire \sumY_reg_n_0_[14] ;
  wire \sumY_reg_n_0_[15] ;
  wire \sumY_reg_n_0_[16] ;
  wire \sumY_reg_n_0_[17] ;
  wire \sumY_reg_n_0_[18] ;
  wire \sumY_reg_n_0_[19] ;
  wire \sumY_reg_n_0_[1] ;
  wire \sumY_reg_n_0_[20] ;
  wire \sumY_reg_n_0_[21] ;
  wire \sumY_reg_n_0_[22] ;
  wire \sumY_reg_n_0_[2] ;
  wire \sumY_reg_n_0_[3] ;
  wire \sumY_reg_n_0_[4] ;
  wire \sumY_reg_n_0_[5] ;
  wire \sumY_reg_n_0_[6] ;
  wire \sumY_reg_n_0_[7] ;
  wire \sumY_reg_n_0_[8] ;
  wire \sumY_reg_n_0_[9] ;
  wire [45:0]termI;
  wire termI0__0_n_100;
  wire termI0__0_n_101;
  wire termI0__0_n_102;
  wire termI0__0_n_103;
  wire termI0__0_n_104;
  wire termI0__0_n_105;
  wire termI0__0_n_77;
  wire termI0__0_n_78;
  wire termI0__0_n_79;
  wire termI0__0_n_80;
  wire termI0__0_n_81;
  wire termI0__0_n_82;
  wire termI0__0_n_83;
  wire termI0__0_n_84;
  wire termI0__0_n_85;
  wire termI0__0_n_86;
  wire termI0__0_n_87;
  wire termI0__0_n_88;
  wire termI0__0_n_89;
  wire termI0__0_n_90;
  wire termI0__0_n_91;
  wire termI0__0_n_92;
  wire termI0__0_n_93;
  wire termI0__0_n_94;
  wire termI0__0_n_95;
  wire termI0__0_n_96;
  wire termI0__0_n_97;
  wire termI0__0_n_98;
  wire termI0__0_n_99;
  wire termI0_n_100;
  wire termI0_n_101;
  wire termI0_n_102;
  wire termI0_n_103;
  wire termI0_n_104;
  wire termI0_n_105;
  wire termI0_n_106;
  wire termI0_n_107;
  wire termI0_n_108;
  wire termI0_n_109;
  wire termI0_n_110;
  wire termI0_n_111;
  wire termI0_n_112;
  wire termI0_n_113;
  wire termI0_n_114;
  wire termI0_n_115;
  wire termI0_n_116;
  wire termI0_n_117;
  wire termI0_n_118;
  wire termI0_n_119;
  wire termI0_n_120;
  wire termI0_n_121;
  wire termI0_n_122;
  wire termI0_n_123;
  wire termI0_n_124;
  wire termI0_n_125;
  wire termI0_n_126;
  wire termI0_n_127;
  wire termI0_n_128;
  wire termI0_n_129;
  wire termI0_n_130;
  wire termI0_n_131;
  wire termI0_n_132;
  wire termI0_n_133;
  wire termI0_n_134;
  wire termI0_n_135;
  wire termI0_n_136;
  wire termI0_n_137;
  wire termI0_n_138;
  wire termI0_n_139;
  wire termI0_n_140;
  wire termI0_n_141;
  wire termI0_n_142;
  wire termI0_n_143;
  wire termI0_n_144;
  wire termI0_n_145;
  wire termI0_n_146;
  wire termI0_n_147;
  wire termI0_n_148;
  wire termI0_n_149;
  wire termI0_n_150;
  wire termI0_n_151;
  wire termI0_n_152;
  wire termI0_n_153;
  wire termI0_n_58;
  wire termI0_n_59;
  wire termI0_n_60;
  wire termI0_n_61;
  wire termI0_n_62;
  wire termI0_n_63;
  wire termI0_n_64;
  wire termI0_n_65;
  wire termI0_n_66;
  wire termI0_n_67;
  wire termI0_n_68;
  wire termI0_n_69;
  wire termI0_n_70;
  wire termI0_n_71;
  wire termI0_n_72;
  wire termI0_n_73;
  wire termI0_n_74;
  wire termI0_n_75;
  wire termI0_n_76;
  wire termI0_n_77;
  wire termI0_n_78;
  wire termI0_n_79;
  wire termI0_n_80;
  wire termI0_n_81;
  wire termI0_n_82;
  wire termI0_n_83;
  wire termI0_n_84;
  wire termI0_n_85;
  wire termI0_n_86;
  wire termI0_n_87;
  wire termI0_n_88;
  wire termI0_n_89;
  wire termI0_n_90;
  wire termI0_n_91;
  wire termI0_n_92;
  wire termI0_n_93;
  wire termI0_n_94;
  wire termI0_n_95;
  wire termI0_n_96;
  wire termI0_n_97;
  wire termI0_n_98;
  wire termI0_n_99;
  wire termII0__0_n_100;
  wire termII0__0_n_101;
  wire termII0__0_n_102;
  wire termII0__0_n_103;
  wire termII0__0_n_104;
  wire termII0__0_n_105;
  wire termII0__0_n_77;
  wire termII0__0_n_78;
  wire termII0__0_n_79;
  wire termII0__0_n_80;
  wire termII0__0_n_81;
  wire termII0__0_n_82;
  wire termII0__0_n_83;
  wire termII0__0_n_84;
  wire termII0__0_n_85;
  wire termII0__0_n_86;
  wire termII0__0_n_87;
  wire termII0__0_n_88;
  wire termII0__0_n_89;
  wire termII0__0_n_90;
  wire termII0__0_n_91;
  wire termII0__0_n_92;
  wire termII0__0_n_93;
  wire termII0__0_n_94;
  wire termII0__0_n_95;
  wire termII0__0_n_96;
  wire termII0__0_n_97;
  wire termII0__0_n_98;
  wire termII0__0_n_99;
  wire termII0_n_100;
  wire termII0_n_101;
  wire termII0_n_102;
  wire termII0_n_103;
  wire termII0_n_104;
  wire termII0_n_105;
  wire termII0_n_106;
  wire termII0_n_107;
  wire termII0_n_108;
  wire termII0_n_109;
  wire termII0_n_110;
  wire termII0_n_111;
  wire termII0_n_112;
  wire termII0_n_113;
  wire termII0_n_114;
  wire termII0_n_115;
  wire termII0_n_116;
  wire termII0_n_117;
  wire termII0_n_118;
  wire termII0_n_119;
  wire termII0_n_120;
  wire termII0_n_121;
  wire termII0_n_122;
  wire termII0_n_123;
  wire termII0_n_124;
  wire termII0_n_125;
  wire termII0_n_126;
  wire termII0_n_127;
  wire termII0_n_128;
  wire termII0_n_129;
  wire termII0_n_130;
  wire termII0_n_131;
  wire termII0_n_132;
  wire termII0_n_133;
  wire termII0_n_134;
  wire termII0_n_135;
  wire termII0_n_136;
  wire termII0_n_137;
  wire termII0_n_138;
  wire termII0_n_139;
  wire termII0_n_140;
  wire termII0_n_141;
  wire termII0_n_142;
  wire termII0_n_143;
  wire termII0_n_144;
  wire termII0_n_145;
  wire termII0_n_146;
  wire termII0_n_147;
  wire termII0_n_148;
  wire termII0_n_149;
  wire termII0_n_150;
  wire termII0_n_151;
  wire termII0_n_152;
  wire termII0_n_153;
  wire termII0_n_58;
  wire termII0_n_59;
  wire termII0_n_60;
  wire termII0_n_61;
  wire termII0_n_62;
  wire termII0_n_63;
  wire termII0_n_64;
  wire termII0_n_65;
  wire termII0_n_66;
  wire termII0_n_67;
  wire termII0_n_68;
  wire termII0_n_69;
  wire termII0_n_70;
  wire termII0_n_71;
  wire termII0_n_72;
  wire termII0_n_73;
  wire termII0_n_74;
  wire termII0_n_75;
  wire termII0_n_76;
  wire termII0_n_77;
  wire termII0_n_78;
  wire termII0_n_79;
  wire termII0_n_80;
  wire termII0_n_81;
  wire termII0_n_82;
  wire termII0_n_83;
  wire termII0_n_84;
  wire termII0_n_85;
  wire termII0_n_86;
  wire termII0_n_87;
  wire termII0_n_88;
  wire termII0_n_89;
  wire termII0_n_90;
  wire termII0_n_91;
  wire termII0_n_92;
  wire termII0_n_93;
  wire termII0_n_94;
  wire termII0_n_95;
  wire termII0_n_96;
  wire termII0_n_97;
  wire termII0_n_98;
  wire termII0_n_99;
  wire [47:0]termIII;
  wire termIII0__0_n_100;
  wire termIII0__0_n_101;
  wire termIII0__0_n_102;
  wire termIII0__0_n_103;
  wire termIII0__0_n_104;
  wire termIII0__0_n_105;
  wire termIII0__0_n_75;
  wire termIII0__0_n_76;
  wire termIII0__0_n_77;
  wire termIII0__0_n_78;
  wire termIII0__0_n_79;
  wire termIII0__0_n_80;
  wire termIII0__0_n_81;
  wire termIII0__0_n_82;
  wire termIII0__0_n_83;
  wire termIII0__0_n_84;
  wire termIII0__0_n_85;
  wire termIII0__0_n_86;
  wire termIII0__0_n_87;
  wire termIII0__0_n_88;
  wire termIII0__0_n_89;
  wire termIII0__0_n_90;
  wire termIII0__0_n_91;
  wire termIII0__0_n_92;
  wire termIII0__0_n_93;
  wire termIII0__0_n_94;
  wire termIII0__0_n_95;
  wire termIII0__0_n_96;
  wire termIII0__0_n_97;
  wire termIII0__0_n_98;
  wire termIII0__0_n_99;
  wire termIII0_n_100;
  wire termIII0_n_101;
  wire termIII0_n_102;
  wire termIII0_n_103;
  wire termIII0_n_104;
  wire termIII0_n_105;
  wire termIII0_n_106;
  wire termIII0_n_107;
  wire termIII0_n_108;
  wire termIII0_n_109;
  wire termIII0_n_110;
  wire termIII0_n_111;
  wire termIII0_n_112;
  wire termIII0_n_113;
  wire termIII0_n_114;
  wire termIII0_n_115;
  wire termIII0_n_116;
  wire termIII0_n_117;
  wire termIII0_n_118;
  wire termIII0_n_119;
  wire termIII0_n_120;
  wire termIII0_n_121;
  wire termIII0_n_122;
  wire termIII0_n_123;
  wire termIII0_n_124;
  wire termIII0_n_125;
  wire termIII0_n_126;
  wire termIII0_n_127;
  wire termIII0_n_128;
  wire termIII0_n_129;
  wire termIII0_n_130;
  wire termIII0_n_131;
  wire termIII0_n_132;
  wire termIII0_n_133;
  wire termIII0_n_134;
  wire termIII0_n_135;
  wire termIII0_n_136;
  wire termIII0_n_137;
  wire termIII0_n_138;
  wire termIII0_n_139;
  wire termIII0_n_140;
  wire termIII0_n_141;
  wire termIII0_n_142;
  wire termIII0_n_143;
  wire termIII0_n_144;
  wire termIII0_n_145;
  wire termIII0_n_146;
  wire termIII0_n_147;
  wire termIII0_n_148;
  wire termIII0_n_149;
  wire termIII0_n_150;
  wire termIII0_n_151;
  wire termIII0_n_152;
  wire termIII0_n_153;
  wire termIII0_n_58;
  wire termIII0_n_59;
  wire termIII0_n_60;
  wire termIII0_n_61;
  wire termIII0_n_62;
  wire termIII0_n_63;
  wire termIII0_n_64;
  wire termIII0_n_65;
  wire termIII0_n_66;
  wire termIII0_n_67;
  wire termIII0_n_68;
  wire termIII0_n_69;
  wire termIII0_n_70;
  wire termIII0_n_71;
  wire termIII0_n_72;
  wire termIII0_n_73;
  wire termIII0_n_74;
  wire termIII0_n_75;
  wire termIII0_n_76;
  wire termIII0_n_77;
  wire termIII0_n_78;
  wire termIII0_n_79;
  wire termIII0_n_80;
  wire termIII0_n_81;
  wire termIII0_n_82;
  wire termIII0_n_83;
  wire termIII0_n_84;
  wire termIII0_n_85;
  wire termIII0_n_86;
  wire termIII0_n_87;
  wire termIII0_n_88;
  wire termIII0_n_89;
  wire termIII0_n_90;
  wire termIII0_n_91;
  wire termIII0_n_92;
  wire termIII0_n_93;
  wire termIII0_n_94;
  wire termIII0_n_95;
  wire termIII0_n_96;
  wire termIII0_n_97;
  wire termIII0_n_98;
  wire termIII0_n_99;
  wire \termIII[0]_i_1_n_0 ;
  wire \termIII[10]_i_1_n_0 ;
  wire \termIII[11]_i_1_n_0 ;
  wire \termIII[12]_i_1_n_0 ;
  wire \termIII[13]_i_1_n_0 ;
  wire \termIII[14]_i_1_n_0 ;
  wire \termIII[15]_i_1_n_0 ;
  wire \termIII[16]_i_1_n_0 ;
  wire \termIII[17]_i_1_n_0 ;
  wire \termIII[18]_i_1_n_0 ;
  wire \termIII[19]_i_1_n_0 ;
  wire \termIII[1]_i_1_n_0 ;
  wire \termIII[20]_i_1_n_0 ;
  wire \termIII[21]_i_1_n_0 ;
  wire \termIII[22]_i_1_n_0 ;
  wire \termIII[23]_i_1_n_0 ;
  wire \termIII[24]_i_1_n_0 ;
  wire \termIII[25]_i_1_n_0 ;
  wire \termIII[26]_i_1_n_0 ;
  wire \termIII[27]_i_1_n_0 ;
  wire \termIII[28]_i_1_n_0 ;
  wire \termIII[29]_i_1_n_0 ;
  wire \termIII[2]_i_1_n_0 ;
  wire \termIII[30]_i_1_n_0 ;
  wire \termIII[31]_i_1_n_0 ;
  wire \termIII[32]_i_1_n_0 ;
  wire \termIII[33]_i_1_n_0 ;
  wire \termIII[34]_i_1_n_0 ;
  wire \termIII[35]_i_1_n_0 ;
  wire \termIII[36]_i_1_n_0 ;
  wire \termIII[37]_i_1_n_0 ;
  wire \termIII[38]_i_1_n_0 ;
  wire \termIII[39]_i_1_n_0 ;
  wire \termIII[3]_i_1_n_0 ;
  wire \termIII[40]_i_1_n_0 ;
  wire \termIII[41]_i_1_n_0 ;
  wire \termIII[42]_i_1_n_0 ;
  wire \termIII[43]_i_1_n_0 ;
  wire \termIII[44]_i_1_n_0 ;
  wire \termIII[45]_i_1_n_0 ;
  wire \termIII[46]_i_1_n_0 ;
  wire \termIII[47]_i_1_n_0 ;
  wire \termIII[4]_i_1_n_0 ;
  wire \termIII[5]_i_1_n_0 ;
  wire \termIII[6]_i_1_n_0 ;
  wire \termIII[7]_i_1_n_0 ;
  wire \termIII[8]_i_1_n_0 ;
  wire \termIII[9]_i_1_n_0 ;
  wire [43:0]termIIIk;
  wire [50:7]termIIIk0;
  wire \termIIIk[0]_i_1_n_0 ;
  wire \termIIIk[10]_i_1_n_0 ;
  wire \termIIIk[11]_i_1_n_0 ;
  wire \termIIIk[12]_i_1_n_0 ;
  wire \termIIIk[13]_i_1_n_0 ;
  wire \termIIIk[14]_i_1_n_0 ;
  wire \termIIIk[15]_i_1_n_0 ;
  wire \termIIIk[16]_i_1_n_0 ;
  wire \termIIIk[17]_i_10_n_0 ;
  wire \termIIIk[17]_i_1_n_0 ;
  wire \termIIIk[17]_i_3_n_0 ;
  wire \termIIIk[17]_i_4_n_0 ;
  wire \termIIIk[17]_i_5_n_0 ;
  wire \termIIIk[17]_i_6_n_0 ;
  wire \termIIIk[17]_i_7_n_0 ;
  wire \termIIIk[17]_i_8_n_0 ;
  wire \termIIIk[17]_i_9_n_0 ;
  wire \termIIIk[18]_i_1_n_0 ;
  wire \termIIIk[19]_i_1_n_0 ;
  wire \termIIIk[1]_i_1_n_0 ;
  wire \termIIIk[1]_i_3_n_0 ;
  wire \termIIIk[1]_i_4_n_0 ;
  wire \termIIIk[1]_i_5_n_0 ;
  wire \termIIIk[1]_i_6_n_0 ;
  wire \termIIIk[1]_i_7_n_0 ;
  wire \termIIIk[1]_i_8_n_0 ;
  wire \termIIIk[1]_i_9_n_0 ;
  wire \termIIIk[20]_i_1_n_0 ;
  wire \termIIIk[21]_i_1_n_0 ;
  wire \termIIIk[22]_i_1_n_0 ;
  wire \termIIIk[23]_i_1_n_0 ;
  wire \termIIIk[24]_i_1_n_0 ;
  wire \termIIIk[25]_i_10_n_0 ;
  wire \termIIIk[25]_i_1_n_0 ;
  wire \termIIIk[25]_i_3_n_0 ;
  wire \termIIIk[25]_i_4_n_0 ;
  wire \termIIIk[25]_i_5_n_0 ;
  wire \termIIIk[25]_i_6_n_0 ;
  wire \termIIIk[25]_i_7_n_0 ;
  wire \termIIIk[25]_i_8_n_0 ;
  wire \termIIIk[25]_i_9_n_0 ;
  wire \termIIIk[26]_i_1_n_0 ;
  wire \termIIIk[27]_i_1_n_0 ;
  wire \termIIIk[28]_i_1_n_0 ;
  wire \termIIIk[29]_i_1_n_0 ;
  wire \termIIIk[2]_i_1_n_0 ;
  wire \termIIIk[30]_i_1_n_0 ;
  wire \termIIIk[31]_i_1_n_0 ;
  wire \termIIIk[32]_i_1_n_0 ;
  wire \termIIIk[33]_i_10_n_0 ;
  wire \termIIIk[33]_i_1_n_0 ;
  wire \termIIIk[33]_i_3_n_0 ;
  wire \termIIIk[33]_i_4_n_0 ;
  wire \termIIIk[33]_i_5_n_0 ;
  wire \termIIIk[33]_i_6_n_0 ;
  wire \termIIIk[33]_i_7_n_0 ;
  wire \termIIIk[33]_i_8_n_0 ;
  wire \termIIIk[33]_i_9_n_0 ;
  wire \termIIIk[34]_i_1_n_0 ;
  wire \termIIIk[35]_i_1_n_0 ;
  wire \termIIIk[36]_i_1_n_0 ;
  wire \termIIIk[37]_i_1_n_0 ;
  wire \termIIIk[38]_i_1_n_0 ;
  wire \termIIIk[39]_i_1_n_0 ;
  wire \termIIIk[3]_i_1_n_0 ;
  wire \termIIIk[40]_i_1_n_0 ;
  wire \termIIIk[41]_i_1_n_0 ;
  wire \termIIIk[41]_i_3_n_0 ;
  wire \termIIIk[41]_i_4_n_0 ;
  wire \termIIIk[41]_i_5_n_0 ;
  wire \termIIIk[41]_i_6_n_0 ;
  wire \termIIIk[41]_i_7_n_0 ;
  wire \termIIIk[41]_i_8_n_0 ;
  wire \termIIIk[41]_i_9_n_0 ;
  wire \termIIIk[42]_i_1_n_0 ;
  wire \termIIIk[43]_i_1_n_0 ;
  wire \termIIIk[4]_i_1_n_0 ;
  wire \termIIIk[5]_i_1_n_0 ;
  wire \termIIIk[6]_i_1_n_0 ;
  wire \termIIIk[7]_i_1_n_0 ;
  wire \termIIIk[8]_i_1_n_0 ;
  wire \termIIIk[9]_i_10_n_0 ;
  wire \termIIIk[9]_i_1_n_0 ;
  wire \termIIIk[9]_i_3_n_0 ;
  wire \termIIIk[9]_i_4_n_0 ;
  wire \termIIIk[9]_i_5_n_0 ;
  wire \termIIIk[9]_i_6_n_0 ;
  wire \termIIIk[9]_i_7_n_0 ;
  wire \termIIIk[9]_i_8_n_0 ;
  wire \termIIIk[9]_i_9_n_0 ;
  wire \termIIIk_reg[17]_i_2_n_0 ;
  wire \termIIIk_reg[17]_i_2_n_1 ;
  wire \termIIIk_reg[17]_i_2_n_2 ;
  wire \termIIIk_reg[17]_i_2_n_3 ;
  wire \termIIIk_reg[17]_i_2_n_4 ;
  wire \termIIIk_reg[17]_i_2_n_5 ;
  wire \termIIIk_reg[17]_i_2_n_6 ;
  wire \termIIIk_reg[17]_i_2_n_7 ;
  wire \termIIIk_reg[1]_i_2_n_0 ;
  wire \termIIIk_reg[1]_i_2_n_1 ;
  wire \termIIIk_reg[1]_i_2_n_2 ;
  wire \termIIIk_reg[1]_i_2_n_3 ;
  wire \termIIIk_reg[1]_i_2_n_4 ;
  wire \termIIIk_reg[1]_i_2_n_5 ;
  wire \termIIIk_reg[1]_i_2_n_6 ;
  wire \termIIIk_reg[1]_i_2_n_7 ;
  wire \termIIIk_reg[25]_i_2_n_0 ;
  wire \termIIIk_reg[25]_i_2_n_1 ;
  wire \termIIIk_reg[25]_i_2_n_2 ;
  wire \termIIIk_reg[25]_i_2_n_3 ;
  wire \termIIIk_reg[25]_i_2_n_4 ;
  wire \termIIIk_reg[25]_i_2_n_5 ;
  wire \termIIIk_reg[25]_i_2_n_6 ;
  wire \termIIIk_reg[25]_i_2_n_7 ;
  wire \termIIIk_reg[33]_i_2_n_0 ;
  wire \termIIIk_reg[33]_i_2_n_1 ;
  wire \termIIIk_reg[33]_i_2_n_2 ;
  wire \termIIIk_reg[33]_i_2_n_3 ;
  wire \termIIIk_reg[33]_i_2_n_4 ;
  wire \termIIIk_reg[33]_i_2_n_5 ;
  wire \termIIIk_reg[33]_i_2_n_6 ;
  wire \termIIIk_reg[33]_i_2_n_7 ;
  wire \termIIIk_reg[41]_i_2_n_0 ;
  wire \termIIIk_reg[41]_i_2_n_1 ;
  wire \termIIIk_reg[41]_i_2_n_2 ;
  wire \termIIIk_reg[41]_i_2_n_3 ;
  wire \termIIIk_reg[41]_i_2_n_4 ;
  wire \termIIIk_reg[41]_i_2_n_5 ;
  wire \termIIIk_reg[41]_i_2_n_6 ;
  wire \termIIIk_reg[41]_i_2_n_7 ;
  wire \termIIIk_reg[9]_i_2_n_0 ;
  wire \termIIIk_reg[9]_i_2_n_1 ;
  wire \termIIIk_reg[9]_i_2_n_2 ;
  wire \termIIIk_reg[9]_i_2_n_3 ;
  wire \termIIIk_reg[9]_i_2_n_4 ;
  wire \termIIIk_reg[9]_i_2_n_5 ;
  wire \termIIIk_reg[9]_i_2_n_6 ;
  wire \termIIIk_reg[9]_i_2_n_7 ;
  wire \termII[0]_i_1_n_0 ;
  wire \termII[10]_i_1_n_0 ;
  wire \termII[11]_i_1_n_0 ;
  wire \termII[12]_i_1_n_0 ;
  wire \termII[13]_i_1_n_0 ;
  wire \termII[14]_i_1_n_0 ;
  wire \termII[15]_i_1_n_0 ;
  wire \termII[16]_i_1_n_0 ;
  wire \termII[17]_i_1_n_0 ;
  wire \termII[18]_i_1_n_0 ;
  wire \termII[19]_i_1_n_0 ;
  wire \termII[1]_i_1_n_0 ;
  wire \termII[20]_i_1_n_0 ;
  wire \termII[21]_i_1_n_0 ;
  wire \termII[22]_i_1_n_0 ;
  wire \termII[23]_i_1_n_0 ;
  wire \termII[24]_i_1_n_0 ;
  wire \termII[25]_i_1_n_0 ;
  wire \termII[26]_i_1_n_0 ;
  wire \termII[27]_i_1_n_0 ;
  wire \termII[28]_i_1_n_0 ;
  wire \termII[29]_i_1_n_0 ;
  wire \termII[2]_i_1_n_0 ;
  wire \termII[30]_i_1_n_0 ;
  wire \termII[31]_i_1_n_0 ;
  wire \termII[32]_i_1_n_0 ;
  wire \termII[33]_i_1_n_0 ;
  wire \termII[34]_i_1_n_0 ;
  wire \termII[35]_i_1_n_0 ;
  wire \termII[36]_i_1_n_0 ;
  wire \termII[37]_i_1_n_0 ;
  wire \termII[38]_i_1_n_0 ;
  wire \termII[39]_i_1_n_0 ;
  wire \termII[3]_i_1_n_0 ;
  wire \termII[40]_i_1_n_0 ;
  wire \termII[41]_i_1_n_0 ;
  wire \termII[42]_i_1_n_0 ;
  wire \termII[43]_i_1_n_0 ;
  wire \termII[44]_i_1_n_0 ;
  wire \termII[45]_i_1_n_0 ;
  wire \termII[4]_i_1_n_0 ;
  wire \termII[5]_i_1_n_0 ;
  wire \termII[6]_i_1_n_0 ;
  wire \termII[7]_i_1_n_0 ;
  wire \termII[8]_i_1_n_0 ;
  wire \termII[9]_i_1_n_0 ;
  wire \termII_reg_n_0_[0] ;
  wire \termII_reg_n_0_[10] ;
  wire \termII_reg_n_0_[11] ;
  wire \termII_reg_n_0_[12] ;
  wire \termII_reg_n_0_[13] ;
  wire \termII_reg_n_0_[14] ;
  wire \termII_reg_n_0_[15] ;
  wire \termII_reg_n_0_[16] ;
  wire \termII_reg_n_0_[17] ;
  wire \termII_reg_n_0_[18] ;
  wire \termII_reg_n_0_[19] ;
  wire \termII_reg_n_0_[1] ;
  wire \termII_reg_n_0_[20] ;
  wire \termII_reg_n_0_[21] ;
  wire \termII_reg_n_0_[22] ;
  wire \termII_reg_n_0_[23] ;
  wire \termII_reg_n_0_[24] ;
  wire \termII_reg_n_0_[25] ;
  wire \termII_reg_n_0_[26] ;
  wire \termII_reg_n_0_[27] ;
  wire \termII_reg_n_0_[28] ;
  wire \termII_reg_n_0_[29] ;
  wire \termII_reg_n_0_[2] ;
  wire \termII_reg_n_0_[30] ;
  wire \termII_reg_n_0_[31] ;
  wire \termII_reg_n_0_[32] ;
  wire \termII_reg_n_0_[33] ;
  wire \termII_reg_n_0_[34] ;
  wire \termII_reg_n_0_[35] ;
  wire \termII_reg_n_0_[36] ;
  wire \termII_reg_n_0_[37] ;
  wire \termII_reg_n_0_[38] ;
  wire \termII_reg_n_0_[39] ;
  wire \termII_reg_n_0_[3] ;
  wire \termII_reg_n_0_[40] ;
  wire \termII_reg_n_0_[41] ;
  wire \termII_reg_n_0_[42] ;
  wire \termII_reg_n_0_[43] ;
  wire \termII_reg_n_0_[44] ;
  wire \termII_reg_n_0_[45] ;
  wire \termII_reg_n_0_[4] ;
  wire \termII_reg_n_0_[5] ;
  wire \termII_reg_n_0_[6] ;
  wire \termII_reg_n_0_[7] ;
  wire \termII_reg_n_0_[8] ;
  wire \termII_reg_n_0_[9] ;
  wire \termI[0]_i_1_n_0 ;
  wire \termI[10]_i_1_n_0 ;
  wire \termI[11]_i_1_n_0 ;
  wire \termI[12]_i_1_n_0 ;
  wire \termI[13]_i_1_n_0 ;
  wire \termI[14]_i_1_n_0 ;
  wire \termI[15]_i_1_n_0 ;
  wire \termI[16]_i_1_n_0 ;
  wire \termI[17]_i_1_n_0 ;
  wire \termI[18]_i_1_n_0 ;
  wire \termI[19]_i_1_n_0 ;
  wire \termI[1]_i_1_n_0 ;
  wire \termI[20]_i_1_n_0 ;
  wire \termI[21]_i_1_n_0 ;
  wire \termI[22]_i_1_n_0 ;
  wire \termI[23]_i_1_n_0 ;
  wire \termI[24]_i_1_n_0 ;
  wire \termI[25]_i_1_n_0 ;
  wire \termI[26]_i_1_n_0 ;
  wire \termI[27]_i_1_n_0 ;
  wire \termI[28]_i_1_n_0 ;
  wire \termI[29]_i_1_n_0 ;
  wire \termI[2]_i_1_n_0 ;
  wire \termI[30]_i_1_n_0 ;
  wire \termI[31]_i_1_n_0 ;
  wire \termI[32]_i_1_n_0 ;
  wire \termI[33]_i_1_n_0 ;
  wire \termI[34]_i_1_n_0 ;
  wire \termI[35]_i_1_n_0 ;
  wire \termI[36]_i_1_n_0 ;
  wire \termI[37]_i_1_n_0 ;
  wire \termI[38]_i_1_n_0 ;
  wire \termI[39]_i_1_n_0 ;
  wire \termI[3]_i_1_n_0 ;
  wire \termI[40]_i_1_n_0 ;
  wire \termI[41]_i_1_n_0 ;
  wire \termI[42]_i_1_n_0 ;
  wire \termI[43]_i_1_n_0 ;
  wire \termI[44]_i_1_n_0 ;
  wire \termI[45]_i_1_n_0 ;
  wire \termI[4]_i_1_n_0 ;
  wire \termI[5]_i_1_n_0 ;
  wire \termI[6]_i_1_n_0 ;
  wire \termI[7]_i_1_n_0 ;
  wire \termI[8]_i_1_n_0 ;
  wire \termI[9]_i_1_n_0 ;
  wire [21:0]\thd_reg[7]_0 ;
  wire \thd_reg_n_0_[0] ;
  wire \thd_reg_n_0_[1] ;
  wire \thd_reg_n_0_[2] ;
  wire \thd_reg_n_0_[3] ;
  wire \thd_reg_n_0_[4] ;
  wire \thd_reg_n_0_[5] ;
  wire \thd_reg_n_0_[6] ;
  wire \thd_reg_n_0_[7] ;
  wire [1:0]\tixVState_reg[1]_0 ;
  wire \tixVState_reg[1]_1 ;
  wire \tixVState_reg[1]_2 ;
  wire [0:0]\tixVState_reg[1]_3 ;
  wire [0:0]\tixVState_reg[1]_4 ;
  wire tkst;
  wire \tkst_reg[0]_0 ;
  wire [31:0]\tkst_reg[31]_0 ;
  wire [31:0]\tkst_reg[31]_1 ;
  wire vsync_last_i_1_n_0;
  wire vsync_last_reg_0;
  wire vsync_last_reg_n_0;
  wire [17:2]xsqr0;
  wire [17:2]xsqr00_in;
  wire [17:2]xsqr01_in;
  wire [17:2]xsqr02_in;
  wire [17:2]xsqr03_in;
  wire [17:0]xsqr4p1;
  wire \xsqr4p1[0]_i_1_n_0 ;
  wire \xsqr4p1[10]_i_1_n_0 ;
  wire \xsqr4p1[11]_i_1_n_0 ;
  wire \xsqr4p1[12]_i_1_n_0 ;
  wire \xsqr4p1[13]_i_1_n_0 ;
  wire \xsqr4p1[14]_i_1_n_0 ;
  wire \xsqr4p1[15]_i_1_n_0 ;
  wire \xsqr4p1[16]_i_1_n_0 ;
  wire \xsqr4p1[17]_i_1_n_0 ;
  wire \xsqr4p1[2]_i_1_n_0 ;
  wire \xsqr4p1[3]_i_1_n_0 ;
  wire \xsqr4p1[4]_i_1_n_0 ;
  wire \xsqr4p1[5]_i_1_n_0 ;
  wire \xsqr4p1[6]_i_1_n_0 ;
  wire \xsqr4p1[7]_i_1_n_0 ;
  wire \xsqr4p1[8]_i_1_n_0 ;
  wire \xsqr4p1[9]_i_1_n_0 ;
  wire [17:0]xsqr4p2;
  wire \xsqr4p2[0]_i_1_n_0 ;
  wire \xsqr4p2[10]_i_1_n_0 ;
  wire \xsqr4p2[11]_i_1_n_0 ;
  wire \xsqr4p2[12]_i_1_n_0 ;
  wire \xsqr4p2[13]_i_1_n_0 ;
  wire \xsqr4p2[14]_i_1_n_0 ;
  wire \xsqr4p2[15]_i_1_n_0 ;
  wire \xsqr4p2[16]_i_1_n_0 ;
  wire \xsqr4p2[17]_i_1_n_0 ;
  wire \xsqr4p2[2]_i_1_n_0 ;
  wire \xsqr4p2[3]_i_1_n_0 ;
  wire \xsqr4p2[4]_i_1_n_0 ;
  wire \xsqr4p2[5]_i_1_n_0 ;
  wire \xsqr4p2[6]_i_1_n_0 ;
  wire \xsqr4p2[7]_i_1_n_0 ;
  wire \xsqr4p2[8]_i_1_n_0 ;
  wire \xsqr4p2[9]_i_1_n_0 ;
  wire \xsqr[0]_i_1_n_0 ;
  wire \xsqr[10]_i_1_n_0 ;
  wire \xsqr[11]_i_10_n_0 ;
  wire \xsqr[11]_i_11_n_0 ;
  wire \xsqr[11]_i_12_n_0 ;
  wire \xsqr[11]_i_13_n_0 ;
  wire \xsqr[11]_i_14_n_0 ;
  wire \xsqr[11]_i_15_n_0 ;
  wire \xsqr[11]_i_16_n_0 ;
  wire \xsqr[11]_i_17_n_0 ;
  wire \xsqr[11]_i_18_n_0 ;
  wire \xsqr[11]_i_19_n_0 ;
  wire \xsqr[11]_i_1_n_0 ;
  wire \xsqr[11]_i_3_n_0 ;
  wire \xsqr[11]_i_4_n_0 ;
  wire \xsqr[11]_i_5_n_0 ;
  wire \xsqr[11]_i_6_n_0 ;
  wire \xsqr[11]_i_7_n_0 ;
  wire \xsqr[11]_i_8_n_0 ;
  wire \xsqr[11]_i_9_n_0 ;
  wire \xsqr[12]_i_1_n_0 ;
  wire \xsqr[13]_i_1_n_0 ;
  wire \xsqr[14]_i_1_n_0 ;
  wire \xsqr[15]_i_1_n_0 ;
  wire \xsqr[16]_i_1_n_0 ;
  wire \xsqr[17]_i_10_n_0 ;
  wire \xsqr[17]_i_11_n_0 ;
  wire \xsqr[17]_i_12_n_0 ;
  wire \xsqr[17]_i_14_n_0 ;
  wire \xsqr[17]_i_15_n_0 ;
  wire \xsqr[17]_i_16_n_0 ;
  wire \xsqr[17]_i_19_n_0 ;
  wire \xsqr[17]_i_1_n_0 ;
  wire \xsqr[17]_i_20_n_0 ;
  wire \xsqr[17]_i_21_n_0 ;
  wire \xsqr[17]_i_22_n_0 ;
  wire \xsqr[17]_i_23_n_0 ;
  wire \xsqr[17]_i_24_n_0 ;
  wire \xsqr[17]_i_25_n_0 ;
  wire \xsqr[17]_i_26_n_0 ;
  wire \xsqr[17]_i_27_n_0 ;
  wire \xsqr[17]_i_28_n_0 ;
  wire \xsqr[17]_i_29_n_0 ;
  wire \xsqr[17]_i_30_n_0 ;
  wire \xsqr[17]_i_31_n_0 ;
  wire \xsqr[17]_i_32_n_0 ;
  wire \xsqr[17]_i_33_n_0 ;
  wire \xsqr[17]_i_34_n_0 ;
  wire \xsqr[17]_i_35_n_0 ;
  wire \xsqr[17]_i_36_n_0 ;
  wire \xsqr[17]_i_37_n_0 ;
  wire \xsqr[17]_i_38_n_0 ;
  wire \xsqr[17]_i_39_n_0 ;
  wire \xsqr[17]_i_40_n_0 ;
  wire \xsqr[17]_i_41_n_0 ;
  wire \xsqr[17]_i_42_n_0 ;
  wire \xsqr[17]_i_43_n_0 ;
  wire \xsqr[17]_i_44_n_0 ;
  wire \xsqr[17]_i_45_n_0 ;
  wire \xsqr[17]_i_4_n_0 ;
  wire \xsqr[17]_i_5_n_0 ;
  wire \xsqr[17]_i_6_n_0 ;
  wire \xsqr[17]_i_7_n_0 ;
  wire \xsqr[17]_i_8_n_0 ;
  wire \xsqr[17]_i_9_n_0 ;
  wire \xsqr[18]_i_1_n_0 ;
  wire \xsqr[20]_i_1_n_0 ;
  wire \xsqr[21]_i_10_n_0 ;
  wire \xsqr[21]_i_11_n_0 ;
  wire \xsqr[21]_i_12_n_0 ;
  wire \xsqr[21]_i_13_n_0 ;
  wire \xsqr[21]_i_14_n_0 ;
  wire \xsqr[21]_i_15_n_0 ;
  wire \xsqr[21]_i_16_n_0 ;
  wire \xsqr[21]_i_17_n_0 ;
  wire \xsqr[21]_i_18_n_0 ;
  wire \xsqr[21]_i_19_n_0 ;
  wire \xsqr[21]_i_1_n_0 ;
  wire \xsqr[21]_i_20_n_0 ;
  wire \xsqr[21]_i_21_n_0 ;
  wire \xsqr[21]_i_22_n_0 ;
  wire \xsqr[21]_i_23_n_0 ;
  wire \xsqr[21]_i_24_n_0 ;
  wire \xsqr[21]_i_25_n_0 ;
  wire \xsqr[21]_i_26_n_0 ;
  wire \xsqr[21]_i_27_n_0 ;
  wire \xsqr[21]_i_28_n_0 ;
  wire \xsqr[21]_i_29_n_0 ;
  wire \xsqr[21]_i_30_n_0 ;
  wire \xsqr[21]_i_31_n_0 ;
  wire \xsqr[21]_i_32_n_0 ;
  wire \xsqr[21]_i_33_n_0 ;
  wire \xsqr[21]_i_4_n_0 ;
  wire \xsqr[21]_i_5_n_0 ;
  wire \xsqr[21]_i_6_n_0 ;
  wire \xsqr[21]_i_7_n_0 ;
  wire \xsqr[21]_i_8_n_0 ;
  wire \xsqr[21]_i_9_n_0 ;
  wire \xsqr[22]_i_1_n_0 ;
  wire \xsqr[23]_i_1_n_0 ;
  wire \xsqr[24]_i_1_n_0 ;
  wire \xsqr[25]_i_1_n_0 ;
  wire \xsqr[26]_i_1_n_0 ;
  wire \xsqr[27]_i_1_n_0 ;
  wire \xsqr[28]_i_1_n_0 ;
  wire \xsqr[29]_i_10_n_0 ;
  wire \xsqr[29]_i_11_n_0 ;
  wire \xsqr[29]_i_12_n_0 ;
  wire \xsqr[29]_i_13_n_0 ;
  wire \xsqr[29]_i_14_n_0 ;
  wire \xsqr[29]_i_15_n_0 ;
  wire \xsqr[29]_i_16_n_0 ;
  wire \xsqr[29]_i_17_n_0 ;
  wire \xsqr[29]_i_18_n_0 ;
  wire \xsqr[29]_i_19_n_0 ;
  wire \xsqr[29]_i_1_n_0 ;
  wire \xsqr[29]_i_3_n_0 ;
  wire \xsqr[29]_i_4_n_0 ;
  wire \xsqr[29]_i_5_n_0 ;
  wire \xsqr[29]_i_6_n_0 ;
  wire \xsqr[29]_i_7_n_0 ;
  wire \xsqr[29]_i_8_n_0 ;
  wire \xsqr[29]_i_9_n_0 ;
  wire \xsqr[2]_i_1_n_0 ;
  wire \xsqr[30]_i_1_n_0 ;
  wire \xsqr[31]_i_1_n_0 ;
  wire \xsqr[32]_i_1_n_0 ;
  wire \xsqr[33]_i_1_n_0 ;
  wire \xsqr[34]_i_1_n_0 ;
  wire \xsqr[35]_i_10_n_0 ;
  wire \xsqr[35]_i_11_n_0 ;
  wire \xsqr[35]_i_12_n_0 ;
  wire \xsqr[35]_i_14_n_0 ;
  wire \xsqr[35]_i_15_n_0 ;
  wire \xsqr[35]_i_16_n_0 ;
  wire \xsqr[35]_i_19_n_0 ;
  wire \xsqr[35]_i_1_n_0 ;
  wire \xsqr[35]_i_20_n_0 ;
  wire \xsqr[35]_i_21_n_0 ;
  wire \xsqr[35]_i_22_n_0 ;
  wire \xsqr[35]_i_23_n_0 ;
  wire \xsqr[35]_i_24_n_0 ;
  wire \xsqr[35]_i_25_n_0 ;
  wire \xsqr[35]_i_26_n_0 ;
  wire \xsqr[35]_i_27_n_0 ;
  wire \xsqr[35]_i_28_n_0 ;
  wire \xsqr[35]_i_29_n_0 ;
  wire \xsqr[35]_i_30_n_0 ;
  wire \xsqr[35]_i_31_n_0 ;
  wire \xsqr[35]_i_32_n_0 ;
  wire \xsqr[35]_i_33_n_0 ;
  wire \xsqr[35]_i_34_n_0 ;
  wire \xsqr[35]_i_35_n_0 ;
  wire \xsqr[35]_i_36_n_0 ;
  wire \xsqr[35]_i_37_n_0 ;
  wire \xsqr[35]_i_38_n_0 ;
  wire \xsqr[35]_i_39_n_0 ;
  wire \xsqr[35]_i_40_n_0 ;
  wire \xsqr[35]_i_41_n_0 ;
  wire \xsqr[35]_i_42_n_0 ;
  wire \xsqr[35]_i_43_n_0 ;
  wire \xsqr[35]_i_44_n_0 ;
  wire \xsqr[35]_i_45_n_0 ;
  wire \xsqr[35]_i_4_n_0 ;
  wire \xsqr[35]_i_5_n_0 ;
  wire \xsqr[35]_i_6_n_0 ;
  wire \xsqr[35]_i_7_n_0 ;
  wire \xsqr[35]_i_8_n_0 ;
  wire \xsqr[35]_i_9_n_0 ;
  wire \xsqr[36]_i_1_n_0 ;
  wire \xsqr[38]_i_1_n_0 ;
  wire \xsqr[39]_i_10_n_0 ;
  wire \xsqr[39]_i_11_n_0 ;
  wire \xsqr[39]_i_12_n_0 ;
  wire \xsqr[39]_i_13_n_0 ;
  wire \xsqr[39]_i_14_n_0 ;
  wire \xsqr[39]_i_15_n_0 ;
  wire \xsqr[39]_i_16_n_0 ;
  wire \xsqr[39]_i_17_n_0 ;
  wire \xsqr[39]_i_18_n_0 ;
  wire \xsqr[39]_i_19_n_0 ;
  wire \xsqr[39]_i_1_n_0 ;
  wire \xsqr[39]_i_20_n_0 ;
  wire \xsqr[39]_i_21_n_0 ;
  wire \xsqr[39]_i_22_n_0 ;
  wire \xsqr[39]_i_23_n_0 ;
  wire \xsqr[39]_i_24_n_0 ;
  wire \xsqr[39]_i_25_n_0 ;
  wire \xsqr[39]_i_26_n_0 ;
  wire \xsqr[39]_i_27_n_0 ;
  wire \xsqr[39]_i_28_n_0 ;
  wire \xsqr[39]_i_29_n_0 ;
  wire \xsqr[39]_i_30_n_0 ;
  wire \xsqr[39]_i_31_n_0 ;
  wire \xsqr[39]_i_32_n_0 ;
  wire \xsqr[39]_i_33_n_0 ;
  wire \xsqr[39]_i_4_n_0 ;
  wire \xsqr[39]_i_5_n_0 ;
  wire \xsqr[39]_i_6_n_0 ;
  wire \xsqr[39]_i_7_n_0 ;
  wire \xsqr[39]_i_8_n_0 ;
  wire \xsqr[39]_i_9_n_0 ;
  wire \xsqr[3]_i_10_n_0 ;
  wire \xsqr[3]_i_11_n_0 ;
  wire \xsqr[3]_i_12_n_0 ;
  wire \xsqr[3]_i_13_n_0 ;
  wire \xsqr[3]_i_14_n_0 ;
  wire \xsqr[3]_i_15_n_0 ;
  wire \xsqr[3]_i_16_n_0 ;
  wire \xsqr[3]_i_17_n_0 ;
  wire \xsqr[3]_i_18_n_0 ;
  wire \xsqr[3]_i_19_n_0 ;
  wire \xsqr[3]_i_1_n_0 ;
  wire \xsqr[3]_i_20_n_0 ;
  wire \xsqr[3]_i_21_n_0 ;
  wire \xsqr[3]_i_22_n_0 ;
  wire \xsqr[3]_i_23_n_0 ;
  wire \xsqr[3]_i_24_n_0 ;
  wire \xsqr[3]_i_25_n_0 ;
  wire \xsqr[3]_i_26_n_0 ;
  wire \xsqr[3]_i_27_n_0 ;
  wire \xsqr[3]_i_28_n_0 ;
  wire \xsqr[3]_i_29_n_0 ;
  wire \xsqr[3]_i_30_n_0 ;
  wire \xsqr[3]_i_31_n_0 ;
  wire \xsqr[3]_i_32_n_0 ;
  wire \xsqr[3]_i_33_n_0 ;
  wire \xsqr[3]_i_4_n_0 ;
  wire \xsqr[3]_i_5_n_0 ;
  wire \xsqr[3]_i_6_n_0 ;
  wire \xsqr[3]_i_7_n_0 ;
  wire \xsqr[3]_i_8_n_0 ;
  wire \xsqr[3]_i_9_n_0 ;
  wire \xsqr[40]_i_1_n_0 ;
  wire \xsqr[41]_i_1_n_0 ;
  wire \xsqr[42]_i_1_n_0 ;
  wire \xsqr[43]_i_1_n_0 ;
  wire \xsqr[44]_i_1_n_0 ;
  wire \xsqr[45]_i_1_n_0 ;
  wire \xsqr[46]_i_1_n_0 ;
  wire \xsqr[47]_i_10_n_0 ;
  wire \xsqr[47]_i_11_n_0 ;
  wire \xsqr[47]_i_12_n_0 ;
  wire \xsqr[47]_i_13_n_0 ;
  wire \xsqr[47]_i_14_n_0 ;
  wire \xsqr[47]_i_15_n_0 ;
  wire \xsqr[47]_i_16_n_0 ;
  wire \xsqr[47]_i_17_n_0 ;
  wire \xsqr[47]_i_18_n_0 ;
  wire \xsqr[47]_i_19_n_0 ;
  wire \xsqr[47]_i_1_n_0 ;
  wire \xsqr[47]_i_3_n_0 ;
  wire \xsqr[47]_i_4_n_0 ;
  wire \xsqr[47]_i_5_n_0 ;
  wire \xsqr[47]_i_6_n_0 ;
  wire \xsqr[47]_i_7_n_0 ;
  wire \xsqr[47]_i_8_n_0 ;
  wire \xsqr[47]_i_9_n_0 ;
  wire \xsqr[48]_i_1_n_0 ;
  wire \xsqr[49]_i_1_n_0 ;
  wire \xsqr[4]_i_1_n_0 ;
  wire \xsqr[50]_i_1_n_0 ;
  wire \xsqr[51]_i_1_n_0 ;
  wire \xsqr[52]_i_1_n_0 ;
  wire \xsqr[53]_i_10_n_0 ;
  wire \xsqr[53]_i_11_n_0 ;
  wire \xsqr[53]_i_12_n_0 ;
  wire \xsqr[53]_i_14_n_0 ;
  wire \xsqr[53]_i_15_n_0 ;
  wire \xsqr[53]_i_16_n_0 ;
  wire \xsqr[53]_i_19_n_0 ;
  wire \xsqr[53]_i_1_n_0 ;
  wire \xsqr[53]_i_20_n_0 ;
  wire \xsqr[53]_i_21_n_0 ;
  wire \xsqr[53]_i_22_n_0 ;
  wire \xsqr[53]_i_23_n_0 ;
  wire \xsqr[53]_i_24_n_0 ;
  wire \xsqr[53]_i_25_n_0 ;
  wire \xsqr[53]_i_26_n_0 ;
  wire \xsqr[53]_i_27_n_0 ;
  wire \xsqr[53]_i_28_n_0 ;
  wire \xsqr[53]_i_29_n_0 ;
  wire \xsqr[53]_i_30_n_0 ;
  wire \xsqr[53]_i_31_n_0 ;
  wire \xsqr[53]_i_32_n_0 ;
  wire \xsqr[53]_i_33_n_0 ;
  wire \xsqr[53]_i_34_n_0 ;
  wire \xsqr[53]_i_35_n_0 ;
  wire \xsqr[53]_i_36_n_0 ;
  wire \xsqr[53]_i_37_n_0 ;
  wire \xsqr[53]_i_38_n_0 ;
  wire \xsqr[53]_i_39_n_0 ;
  wire \xsqr[53]_i_40_n_0 ;
  wire \xsqr[53]_i_41_n_0 ;
  wire \xsqr[53]_i_42_n_0 ;
  wire \xsqr[53]_i_43_n_0 ;
  wire \xsqr[53]_i_44_n_0 ;
  wire \xsqr[53]_i_45_n_0 ;
  wire \xsqr[53]_i_4_n_0 ;
  wire \xsqr[53]_i_5_n_0 ;
  wire \xsqr[53]_i_6_n_0 ;
  wire \xsqr[53]_i_7_n_0 ;
  wire \xsqr[53]_i_8_n_0 ;
  wire \xsqr[53]_i_9_n_0 ;
  wire \xsqr[54]_i_1_n_0 ;
  wire \xsqr[56]_i_1_n_0 ;
  wire \xsqr[57]_i_10_n_0 ;
  wire \xsqr[57]_i_11_n_0 ;
  wire \xsqr[57]_i_12_n_0 ;
  wire \xsqr[57]_i_13_n_0 ;
  wire \xsqr[57]_i_14_n_0 ;
  wire \xsqr[57]_i_15_n_0 ;
  wire \xsqr[57]_i_16_n_0 ;
  wire \xsqr[57]_i_17_n_0 ;
  wire \xsqr[57]_i_18_n_0 ;
  wire \xsqr[57]_i_19_n_0 ;
  wire \xsqr[57]_i_1_n_0 ;
  wire \xsqr[57]_i_20_n_0 ;
  wire \xsqr[57]_i_21_n_0 ;
  wire \xsqr[57]_i_22_n_0 ;
  wire \xsqr[57]_i_23_n_0 ;
  wire \xsqr[57]_i_24_n_0 ;
  wire \xsqr[57]_i_25_n_0 ;
  wire \xsqr[57]_i_26_n_0 ;
  wire \xsqr[57]_i_27_n_0 ;
  wire \xsqr[57]_i_28_n_0 ;
  wire \xsqr[57]_i_29_n_0 ;
  wire \xsqr[57]_i_30_n_0 ;
  wire \xsqr[57]_i_31_n_0 ;
  wire \xsqr[57]_i_32_n_0 ;
  wire \xsqr[57]_i_33_n_0 ;
  wire \xsqr[57]_i_4_n_0 ;
  wire \xsqr[57]_i_5_n_0 ;
  wire \xsqr[57]_i_6_n_0 ;
  wire \xsqr[57]_i_7_n_0 ;
  wire \xsqr[57]_i_8_n_0 ;
  wire \xsqr[57]_i_9_n_0 ;
  wire \xsqr[58]_i_1_n_0 ;
  wire \xsqr[59]_i_1_n_0 ;
  wire \xsqr[5]_i_1_n_0 ;
  wire \xsqr[60]_i_1_n_0 ;
  wire \xsqr[61]_i_1_n_0 ;
  wire \xsqr[62]_i_1_n_0 ;
  wire \xsqr[63]_i_1_n_0 ;
  wire \xsqr[64]_i_1_n_0 ;
  wire \xsqr[65]_i_10_n_0 ;
  wire \xsqr[65]_i_11_n_0 ;
  wire \xsqr[65]_i_12_n_0 ;
  wire \xsqr[65]_i_13_n_0 ;
  wire \xsqr[65]_i_14_n_0 ;
  wire \xsqr[65]_i_15_n_0 ;
  wire \xsqr[65]_i_16_n_0 ;
  wire \xsqr[65]_i_17_n_0 ;
  wire \xsqr[65]_i_18_n_0 ;
  wire \xsqr[65]_i_19_n_0 ;
  wire \xsqr[65]_i_1_n_0 ;
  wire \xsqr[65]_i_3_n_0 ;
  wire \xsqr[65]_i_4_n_0 ;
  wire \xsqr[65]_i_5_n_0 ;
  wire \xsqr[65]_i_6_n_0 ;
  wire \xsqr[65]_i_7_n_0 ;
  wire \xsqr[65]_i_8_n_0 ;
  wire \xsqr[65]_i_9_n_0 ;
  wire \xsqr[66]_i_1_n_0 ;
  wire \xsqr[67]_i_1_n_0 ;
  wire \xsqr[68]_i_1_n_0 ;
  wire \xsqr[69]_i_1_n_0 ;
  wire \xsqr[6]_i_1_n_0 ;
  wire \xsqr[70]_i_1_n_0 ;
  wire \xsqr[71]_i_10_n_0 ;
  wire \xsqr[71]_i_11_n_0 ;
  wire \xsqr[71]_i_12_n_0 ;
  wire \xsqr[71]_i_14_n_0 ;
  wire \xsqr[71]_i_15_n_0 ;
  wire \xsqr[71]_i_16_n_0 ;
  wire \xsqr[71]_i_19_n_0 ;
  wire \xsqr[71]_i_1_n_0 ;
  wire \xsqr[71]_i_20_n_0 ;
  wire \xsqr[71]_i_21_n_0 ;
  wire \xsqr[71]_i_22_n_0 ;
  wire \xsqr[71]_i_23_n_0 ;
  wire \xsqr[71]_i_24_n_0 ;
  wire \xsqr[71]_i_25_n_0 ;
  wire \xsqr[71]_i_26_n_0 ;
  wire \xsqr[71]_i_27_n_0 ;
  wire \xsqr[71]_i_28_n_0 ;
  wire \xsqr[71]_i_29_n_0 ;
  wire \xsqr[71]_i_30_n_0 ;
  wire \xsqr[71]_i_31_n_0 ;
  wire \xsqr[71]_i_32_n_0 ;
  wire \xsqr[71]_i_33_n_0 ;
  wire \xsqr[71]_i_34_n_0 ;
  wire \xsqr[71]_i_35_n_0 ;
  wire \xsqr[71]_i_36_n_0 ;
  wire \xsqr[71]_i_37_n_0 ;
  wire \xsqr[71]_i_38_n_0 ;
  wire \xsqr[71]_i_39_n_0 ;
  wire \xsqr[71]_i_40_n_0 ;
  wire \xsqr[71]_i_41_n_0 ;
  wire \xsqr[71]_i_42_n_0 ;
  wire \xsqr[71]_i_43_n_0 ;
  wire \xsqr[71]_i_44_n_0 ;
  wire \xsqr[71]_i_45_n_0 ;
  wire \xsqr[71]_i_4_n_0 ;
  wire \xsqr[71]_i_5_n_0 ;
  wire \xsqr[71]_i_6_n_0 ;
  wire \xsqr[71]_i_7_n_0 ;
  wire \xsqr[71]_i_8_n_0 ;
  wire \xsqr[71]_i_9_n_0 ;
  wire \xsqr[72]_i_1_n_0 ;
  wire \xsqr[74]_i_1_n_0 ;
  wire \xsqr[75]_i_10_n_0 ;
  wire \xsqr[75]_i_11_n_0 ;
  wire \xsqr[75]_i_12_n_0 ;
  wire \xsqr[75]_i_13_n_0 ;
  wire \xsqr[75]_i_14_n_0 ;
  wire \xsqr[75]_i_15_n_0 ;
  wire \xsqr[75]_i_16_n_0 ;
  wire \xsqr[75]_i_17_n_0 ;
  wire \xsqr[75]_i_18_n_0 ;
  wire \xsqr[75]_i_19_n_0 ;
  wire \xsqr[75]_i_1_n_0 ;
  wire \xsqr[75]_i_20_n_0 ;
  wire \xsqr[75]_i_21_n_0 ;
  wire \xsqr[75]_i_22_n_0 ;
  wire \xsqr[75]_i_23_n_0 ;
  wire \xsqr[75]_i_24_n_0 ;
  wire \xsqr[75]_i_25_n_0 ;
  wire \xsqr[75]_i_26_n_0 ;
  wire \xsqr[75]_i_27_n_0 ;
  wire \xsqr[75]_i_28_n_0 ;
  wire \xsqr[75]_i_29_n_0 ;
  wire \xsqr[75]_i_30_n_0 ;
  wire \xsqr[75]_i_31_n_0 ;
  wire \xsqr[75]_i_32_n_0 ;
  wire \xsqr[75]_i_33_n_0 ;
  wire \xsqr[75]_i_4_n_0 ;
  wire \xsqr[75]_i_5_n_0 ;
  wire \xsqr[75]_i_6_n_0 ;
  wire \xsqr[75]_i_7_n_0 ;
  wire \xsqr[75]_i_8_n_0 ;
  wire \xsqr[75]_i_9_n_0 ;
  wire \xsqr[76]_i_1_n_0 ;
  wire \xsqr[77]_i_1_n_0 ;
  wire \xsqr[78]_i_1_n_0 ;
  wire \xsqr[79]_i_1_n_0 ;
  wire \xsqr[7]_i_1_n_0 ;
  wire \xsqr[80]_i_1_n_0 ;
  wire \xsqr[81]_i_1_n_0 ;
  wire \xsqr[82]_i_1_n_0 ;
  wire \xsqr[83]_i_10_n_0 ;
  wire \xsqr[83]_i_11_n_0 ;
  wire \xsqr[83]_i_12_n_0 ;
  wire \xsqr[83]_i_13_n_0 ;
  wire \xsqr[83]_i_14_n_0 ;
  wire \xsqr[83]_i_15_n_0 ;
  wire \xsqr[83]_i_16_n_0 ;
  wire \xsqr[83]_i_17_n_0 ;
  wire \xsqr[83]_i_18_n_0 ;
  wire \xsqr[83]_i_19_n_0 ;
  wire \xsqr[83]_i_1_n_0 ;
  wire \xsqr[83]_i_3_n_0 ;
  wire \xsqr[83]_i_4_n_0 ;
  wire \xsqr[83]_i_5_n_0 ;
  wire \xsqr[83]_i_6_n_0 ;
  wire \xsqr[83]_i_7_n_0 ;
  wire \xsqr[83]_i_8_n_0 ;
  wire \xsqr[83]_i_9_n_0 ;
  wire \xsqr[84]_i_1_n_0 ;
  wire \xsqr[85]_i_1_n_0 ;
  wire \xsqr[86]_i_1_n_0 ;
  wire \xsqr[87]_i_1_n_0 ;
  wire \xsqr[88]_i_1_n_0 ;
  wire \xsqr[89]_i_10_n_0 ;
  wire \xsqr[89]_i_11_n_0 ;
  wire \xsqr[89]_i_12_n_0 ;
  wire \xsqr[89]_i_13_n_0 ;
  wire \xsqr[89]_i_15_n_0 ;
  wire \xsqr[89]_i_16_n_0 ;
  wire \xsqr[89]_i_17_n_0 ;
  wire \xsqr[89]_i_1_n_0 ;
  wire \xsqr[89]_i_20_n_0 ;
  wire \xsqr[89]_i_21_n_0 ;
  wire \xsqr[89]_i_22_n_0 ;
  wire \xsqr[89]_i_23_n_0 ;
  wire \xsqr[89]_i_24_n_0 ;
  wire \xsqr[89]_i_25_n_0 ;
  wire \xsqr[89]_i_26_n_0 ;
  wire \xsqr[89]_i_27_n_0 ;
  wire \xsqr[89]_i_28_n_0 ;
  wire \xsqr[89]_i_29_n_0 ;
  wire \xsqr[89]_i_2_n_0 ;
  wire \xsqr[89]_i_30_n_0 ;
  wire \xsqr[89]_i_31_n_0 ;
  wire \xsqr[89]_i_32_n_0 ;
  wire \xsqr[89]_i_33_n_0 ;
  wire \xsqr[89]_i_34_n_0 ;
  wire \xsqr[89]_i_35_n_0 ;
  wire \xsqr[89]_i_36_n_0 ;
  wire \xsqr[89]_i_37_n_0 ;
  wire \xsqr[89]_i_38_n_0 ;
  wire \xsqr[89]_i_39_n_0 ;
  wire \xsqr[89]_i_40_n_0 ;
  wire \xsqr[89]_i_41_n_0 ;
  wire \xsqr[89]_i_42_n_0 ;
  wire \xsqr[89]_i_43_n_0 ;
  wire \xsqr[89]_i_44_n_0 ;
  wire \xsqr[89]_i_45_n_0 ;
  wire \xsqr[89]_i_46_n_0 ;
  wire \xsqr[89]_i_5_n_0 ;
  wire \xsqr[89]_i_6_n_0 ;
  wire \xsqr[89]_i_7_n_0 ;
  wire \xsqr[89]_i_8_n_0 ;
  wire \xsqr[89]_i_9_n_0 ;
  wire \xsqr[8]_i_1_n_0 ;
  wire \xsqr[9]_i_1_n_0 ;
  wire \xsqr_reg[11]_i_2_n_0 ;
  wire \xsqr_reg[11]_i_2_n_1 ;
  wire \xsqr_reg[11]_i_2_n_2 ;
  wire \xsqr_reg[11]_i_2_n_3 ;
  wire \xsqr_reg[11]_i_2_n_4 ;
  wire \xsqr_reg[11]_i_2_n_5 ;
  wire \xsqr_reg[11]_i_2_n_6 ;
  wire \xsqr_reg[11]_i_2_n_7 ;
  wire \xsqr_reg[17]_i_13_n_0 ;
  wire \xsqr_reg[17]_i_13_n_1 ;
  wire \xsqr_reg[17]_i_13_n_10 ;
  wire \xsqr_reg[17]_i_13_n_11 ;
  wire \xsqr_reg[17]_i_13_n_12 ;
  wire \xsqr_reg[17]_i_13_n_13 ;
  wire \xsqr_reg[17]_i_13_n_14 ;
  wire \xsqr_reg[17]_i_13_n_15 ;
  wire \xsqr_reg[17]_i_13_n_2 ;
  wire \xsqr_reg[17]_i_13_n_3 ;
  wire \xsqr_reg[17]_i_13_n_4 ;
  wire \xsqr_reg[17]_i_13_n_5 ;
  wire \xsqr_reg[17]_i_13_n_6 ;
  wire \xsqr_reg[17]_i_13_n_7 ;
  wire \xsqr_reg[17]_i_13_n_8 ;
  wire \xsqr_reg[17]_i_13_n_9 ;
  wire \xsqr_reg[17]_i_17_n_13 ;
  wire \xsqr_reg[17]_i_17_n_14 ;
  wire \xsqr_reg[17]_i_17_n_15 ;
  wire \xsqr_reg[17]_i_17_n_4 ;
  wire \xsqr_reg[17]_i_17_n_6 ;
  wire \xsqr_reg[17]_i_17_n_7 ;
  wire \xsqr_reg[17]_i_18_n_14 ;
  wire \xsqr_reg[17]_i_18_n_15 ;
  wire \xsqr_reg[17]_i_18_n_5 ;
  wire \xsqr_reg[17]_i_18_n_7 ;
  wire \xsqr_reg[17]_i_2_n_3 ;
  wire \xsqr_reg[17]_i_2_n_4 ;
  wire \xsqr_reg[17]_i_2_n_5 ;
  wire \xsqr_reg[17]_i_2_n_6 ;
  wire \xsqr_reg[17]_i_2_n_7 ;
  wire \xsqr_reg[17]_i_3_n_12 ;
  wire \xsqr_reg[17]_i_3_n_13 ;
  wire \xsqr_reg[17]_i_3_n_14 ;
  wire \xsqr_reg[17]_i_3_n_15 ;
  wire \xsqr_reg[17]_i_3_n_5 ;
  wire \xsqr_reg[17]_i_3_n_6 ;
  wire \xsqr_reg[17]_i_3_n_7 ;
  wire \xsqr_reg[21]_i_2_n_0 ;
  wire \xsqr_reg[21]_i_2_n_1 ;
  wire \xsqr_reg[21]_i_2_n_10 ;
  wire \xsqr_reg[21]_i_2_n_11 ;
  wire \xsqr_reg[21]_i_2_n_12 ;
  wire \xsqr_reg[21]_i_2_n_13 ;
  wire \xsqr_reg[21]_i_2_n_2 ;
  wire \xsqr_reg[21]_i_2_n_3 ;
  wire \xsqr_reg[21]_i_2_n_4 ;
  wire \xsqr_reg[21]_i_2_n_5 ;
  wire \xsqr_reg[21]_i_2_n_6 ;
  wire \xsqr_reg[21]_i_2_n_7 ;
  wire \xsqr_reg[21]_i_2_n_8 ;
  wire \xsqr_reg[21]_i_2_n_9 ;
  wire \xsqr_reg[21]_i_3_n_0 ;
  wire \xsqr_reg[21]_i_3_n_1 ;
  wire \xsqr_reg[21]_i_3_n_10 ;
  wire \xsqr_reg[21]_i_3_n_11 ;
  wire \xsqr_reg[21]_i_3_n_12 ;
  wire \xsqr_reg[21]_i_3_n_13 ;
  wire \xsqr_reg[21]_i_3_n_14 ;
  wire \xsqr_reg[21]_i_3_n_15 ;
  wire \xsqr_reg[21]_i_3_n_2 ;
  wire \xsqr_reg[21]_i_3_n_3 ;
  wire \xsqr_reg[21]_i_3_n_4 ;
  wire \xsqr_reg[21]_i_3_n_5 ;
  wire \xsqr_reg[21]_i_3_n_6 ;
  wire \xsqr_reg[21]_i_3_n_7 ;
  wire \xsqr_reg[21]_i_3_n_8 ;
  wire \xsqr_reg[21]_i_3_n_9 ;
  wire \xsqr_reg[29]_i_2_n_0 ;
  wire \xsqr_reg[29]_i_2_n_1 ;
  wire \xsqr_reg[29]_i_2_n_2 ;
  wire \xsqr_reg[29]_i_2_n_3 ;
  wire \xsqr_reg[29]_i_2_n_4 ;
  wire \xsqr_reg[29]_i_2_n_5 ;
  wire \xsqr_reg[29]_i_2_n_6 ;
  wire \xsqr_reg[29]_i_2_n_7 ;
  wire \xsqr_reg[35]_i_13_n_0 ;
  wire \xsqr_reg[35]_i_13_n_1 ;
  wire \xsqr_reg[35]_i_13_n_10 ;
  wire \xsqr_reg[35]_i_13_n_11 ;
  wire \xsqr_reg[35]_i_13_n_12 ;
  wire \xsqr_reg[35]_i_13_n_13 ;
  wire \xsqr_reg[35]_i_13_n_14 ;
  wire \xsqr_reg[35]_i_13_n_15 ;
  wire \xsqr_reg[35]_i_13_n_2 ;
  wire \xsqr_reg[35]_i_13_n_3 ;
  wire \xsqr_reg[35]_i_13_n_4 ;
  wire \xsqr_reg[35]_i_13_n_5 ;
  wire \xsqr_reg[35]_i_13_n_6 ;
  wire \xsqr_reg[35]_i_13_n_7 ;
  wire \xsqr_reg[35]_i_13_n_8 ;
  wire \xsqr_reg[35]_i_13_n_9 ;
  wire \xsqr_reg[35]_i_17_n_13 ;
  wire \xsqr_reg[35]_i_17_n_14 ;
  wire \xsqr_reg[35]_i_17_n_15 ;
  wire \xsqr_reg[35]_i_17_n_4 ;
  wire \xsqr_reg[35]_i_17_n_6 ;
  wire \xsqr_reg[35]_i_17_n_7 ;
  wire \xsqr_reg[35]_i_18_n_14 ;
  wire \xsqr_reg[35]_i_18_n_15 ;
  wire \xsqr_reg[35]_i_18_n_5 ;
  wire \xsqr_reg[35]_i_18_n_7 ;
  wire \xsqr_reg[35]_i_2_n_3 ;
  wire \xsqr_reg[35]_i_2_n_4 ;
  wire \xsqr_reg[35]_i_2_n_5 ;
  wire \xsqr_reg[35]_i_2_n_6 ;
  wire \xsqr_reg[35]_i_2_n_7 ;
  wire \xsqr_reg[35]_i_3_n_12 ;
  wire \xsqr_reg[35]_i_3_n_13 ;
  wire \xsqr_reg[35]_i_3_n_14 ;
  wire \xsqr_reg[35]_i_3_n_15 ;
  wire \xsqr_reg[35]_i_3_n_5 ;
  wire \xsqr_reg[35]_i_3_n_6 ;
  wire \xsqr_reg[35]_i_3_n_7 ;
  wire \xsqr_reg[39]_i_2_n_0 ;
  wire \xsqr_reg[39]_i_2_n_1 ;
  wire \xsqr_reg[39]_i_2_n_10 ;
  wire \xsqr_reg[39]_i_2_n_11 ;
  wire \xsqr_reg[39]_i_2_n_12 ;
  wire \xsqr_reg[39]_i_2_n_13 ;
  wire \xsqr_reg[39]_i_2_n_2 ;
  wire \xsqr_reg[39]_i_2_n_3 ;
  wire \xsqr_reg[39]_i_2_n_4 ;
  wire \xsqr_reg[39]_i_2_n_5 ;
  wire \xsqr_reg[39]_i_2_n_6 ;
  wire \xsqr_reg[39]_i_2_n_7 ;
  wire \xsqr_reg[39]_i_2_n_8 ;
  wire \xsqr_reg[39]_i_2_n_9 ;
  wire \xsqr_reg[39]_i_3_n_0 ;
  wire \xsqr_reg[39]_i_3_n_1 ;
  wire \xsqr_reg[39]_i_3_n_10 ;
  wire \xsqr_reg[39]_i_3_n_11 ;
  wire \xsqr_reg[39]_i_3_n_12 ;
  wire \xsqr_reg[39]_i_3_n_13 ;
  wire \xsqr_reg[39]_i_3_n_14 ;
  wire \xsqr_reg[39]_i_3_n_15 ;
  wire \xsqr_reg[39]_i_3_n_2 ;
  wire \xsqr_reg[39]_i_3_n_3 ;
  wire \xsqr_reg[39]_i_3_n_4 ;
  wire \xsqr_reg[39]_i_3_n_5 ;
  wire \xsqr_reg[39]_i_3_n_6 ;
  wire \xsqr_reg[39]_i_3_n_7 ;
  wire \xsqr_reg[39]_i_3_n_8 ;
  wire \xsqr_reg[39]_i_3_n_9 ;
  wire \xsqr_reg[3]_i_2_n_0 ;
  wire \xsqr_reg[3]_i_2_n_1 ;
  wire \xsqr_reg[3]_i_2_n_10 ;
  wire \xsqr_reg[3]_i_2_n_11 ;
  wire \xsqr_reg[3]_i_2_n_12 ;
  wire \xsqr_reg[3]_i_2_n_13 ;
  wire \xsqr_reg[3]_i_2_n_2 ;
  wire \xsqr_reg[3]_i_2_n_3 ;
  wire \xsqr_reg[3]_i_2_n_4 ;
  wire \xsqr_reg[3]_i_2_n_5 ;
  wire \xsqr_reg[3]_i_2_n_6 ;
  wire \xsqr_reg[3]_i_2_n_7 ;
  wire \xsqr_reg[3]_i_2_n_8 ;
  wire \xsqr_reg[3]_i_2_n_9 ;
  wire \xsqr_reg[3]_i_3_n_0 ;
  wire \xsqr_reg[3]_i_3_n_1 ;
  wire \xsqr_reg[3]_i_3_n_10 ;
  wire \xsqr_reg[3]_i_3_n_11 ;
  wire \xsqr_reg[3]_i_3_n_12 ;
  wire \xsqr_reg[3]_i_3_n_13 ;
  wire \xsqr_reg[3]_i_3_n_14 ;
  wire \xsqr_reg[3]_i_3_n_15 ;
  wire \xsqr_reg[3]_i_3_n_2 ;
  wire \xsqr_reg[3]_i_3_n_3 ;
  wire \xsqr_reg[3]_i_3_n_4 ;
  wire \xsqr_reg[3]_i_3_n_5 ;
  wire \xsqr_reg[3]_i_3_n_6 ;
  wire \xsqr_reg[3]_i_3_n_7 ;
  wire \xsqr_reg[3]_i_3_n_8 ;
  wire \xsqr_reg[3]_i_3_n_9 ;
  wire \xsqr_reg[47]_i_2_n_0 ;
  wire \xsqr_reg[47]_i_2_n_1 ;
  wire \xsqr_reg[47]_i_2_n_2 ;
  wire \xsqr_reg[47]_i_2_n_3 ;
  wire \xsqr_reg[47]_i_2_n_4 ;
  wire \xsqr_reg[47]_i_2_n_5 ;
  wire \xsqr_reg[47]_i_2_n_6 ;
  wire \xsqr_reg[47]_i_2_n_7 ;
  wire \xsqr_reg[53]_i_13_n_0 ;
  wire \xsqr_reg[53]_i_13_n_1 ;
  wire \xsqr_reg[53]_i_13_n_10 ;
  wire \xsqr_reg[53]_i_13_n_11 ;
  wire \xsqr_reg[53]_i_13_n_12 ;
  wire \xsqr_reg[53]_i_13_n_13 ;
  wire \xsqr_reg[53]_i_13_n_14 ;
  wire \xsqr_reg[53]_i_13_n_15 ;
  wire \xsqr_reg[53]_i_13_n_2 ;
  wire \xsqr_reg[53]_i_13_n_3 ;
  wire \xsqr_reg[53]_i_13_n_4 ;
  wire \xsqr_reg[53]_i_13_n_5 ;
  wire \xsqr_reg[53]_i_13_n_6 ;
  wire \xsqr_reg[53]_i_13_n_7 ;
  wire \xsqr_reg[53]_i_13_n_8 ;
  wire \xsqr_reg[53]_i_13_n_9 ;
  wire \xsqr_reg[53]_i_17_n_13 ;
  wire \xsqr_reg[53]_i_17_n_14 ;
  wire \xsqr_reg[53]_i_17_n_15 ;
  wire \xsqr_reg[53]_i_17_n_4 ;
  wire \xsqr_reg[53]_i_17_n_6 ;
  wire \xsqr_reg[53]_i_17_n_7 ;
  wire \xsqr_reg[53]_i_18_n_14 ;
  wire \xsqr_reg[53]_i_18_n_15 ;
  wire \xsqr_reg[53]_i_18_n_5 ;
  wire \xsqr_reg[53]_i_18_n_7 ;
  wire \xsqr_reg[53]_i_2_n_3 ;
  wire \xsqr_reg[53]_i_2_n_4 ;
  wire \xsqr_reg[53]_i_2_n_5 ;
  wire \xsqr_reg[53]_i_2_n_6 ;
  wire \xsqr_reg[53]_i_2_n_7 ;
  wire \xsqr_reg[53]_i_3_n_12 ;
  wire \xsqr_reg[53]_i_3_n_13 ;
  wire \xsqr_reg[53]_i_3_n_14 ;
  wire \xsqr_reg[53]_i_3_n_15 ;
  wire \xsqr_reg[53]_i_3_n_5 ;
  wire \xsqr_reg[53]_i_3_n_6 ;
  wire \xsqr_reg[53]_i_3_n_7 ;
  wire \xsqr_reg[57]_i_2_n_0 ;
  wire \xsqr_reg[57]_i_2_n_1 ;
  wire \xsqr_reg[57]_i_2_n_10 ;
  wire \xsqr_reg[57]_i_2_n_11 ;
  wire \xsqr_reg[57]_i_2_n_12 ;
  wire \xsqr_reg[57]_i_2_n_13 ;
  wire \xsqr_reg[57]_i_2_n_2 ;
  wire \xsqr_reg[57]_i_2_n_3 ;
  wire \xsqr_reg[57]_i_2_n_4 ;
  wire \xsqr_reg[57]_i_2_n_5 ;
  wire \xsqr_reg[57]_i_2_n_6 ;
  wire \xsqr_reg[57]_i_2_n_7 ;
  wire \xsqr_reg[57]_i_2_n_8 ;
  wire \xsqr_reg[57]_i_2_n_9 ;
  wire \xsqr_reg[57]_i_3_n_0 ;
  wire \xsqr_reg[57]_i_3_n_1 ;
  wire \xsqr_reg[57]_i_3_n_10 ;
  wire \xsqr_reg[57]_i_3_n_11 ;
  wire \xsqr_reg[57]_i_3_n_12 ;
  wire \xsqr_reg[57]_i_3_n_13 ;
  wire \xsqr_reg[57]_i_3_n_14 ;
  wire \xsqr_reg[57]_i_3_n_15 ;
  wire \xsqr_reg[57]_i_3_n_2 ;
  wire \xsqr_reg[57]_i_3_n_3 ;
  wire \xsqr_reg[57]_i_3_n_4 ;
  wire \xsqr_reg[57]_i_3_n_5 ;
  wire \xsqr_reg[57]_i_3_n_6 ;
  wire \xsqr_reg[57]_i_3_n_7 ;
  wire \xsqr_reg[57]_i_3_n_8 ;
  wire \xsqr_reg[57]_i_3_n_9 ;
  wire \xsqr_reg[65]_i_2_n_0 ;
  wire \xsqr_reg[65]_i_2_n_1 ;
  wire \xsqr_reg[65]_i_2_n_2 ;
  wire \xsqr_reg[65]_i_2_n_3 ;
  wire \xsqr_reg[65]_i_2_n_4 ;
  wire \xsqr_reg[65]_i_2_n_5 ;
  wire \xsqr_reg[65]_i_2_n_6 ;
  wire \xsqr_reg[65]_i_2_n_7 ;
  wire \xsqr_reg[71]_i_13_n_0 ;
  wire \xsqr_reg[71]_i_13_n_1 ;
  wire \xsqr_reg[71]_i_13_n_10 ;
  wire \xsqr_reg[71]_i_13_n_11 ;
  wire \xsqr_reg[71]_i_13_n_12 ;
  wire \xsqr_reg[71]_i_13_n_13 ;
  wire \xsqr_reg[71]_i_13_n_14 ;
  wire \xsqr_reg[71]_i_13_n_15 ;
  wire \xsqr_reg[71]_i_13_n_2 ;
  wire \xsqr_reg[71]_i_13_n_3 ;
  wire \xsqr_reg[71]_i_13_n_4 ;
  wire \xsqr_reg[71]_i_13_n_5 ;
  wire \xsqr_reg[71]_i_13_n_6 ;
  wire \xsqr_reg[71]_i_13_n_7 ;
  wire \xsqr_reg[71]_i_13_n_8 ;
  wire \xsqr_reg[71]_i_13_n_9 ;
  wire \xsqr_reg[71]_i_17_n_13 ;
  wire \xsqr_reg[71]_i_17_n_14 ;
  wire \xsqr_reg[71]_i_17_n_15 ;
  wire \xsqr_reg[71]_i_17_n_4 ;
  wire \xsqr_reg[71]_i_17_n_6 ;
  wire \xsqr_reg[71]_i_17_n_7 ;
  wire \xsqr_reg[71]_i_18_n_14 ;
  wire \xsqr_reg[71]_i_18_n_15 ;
  wire \xsqr_reg[71]_i_18_n_5 ;
  wire \xsqr_reg[71]_i_18_n_7 ;
  wire \xsqr_reg[71]_i_2_n_3 ;
  wire \xsqr_reg[71]_i_2_n_4 ;
  wire \xsqr_reg[71]_i_2_n_5 ;
  wire \xsqr_reg[71]_i_2_n_6 ;
  wire \xsqr_reg[71]_i_2_n_7 ;
  wire \xsqr_reg[71]_i_3_n_12 ;
  wire \xsqr_reg[71]_i_3_n_13 ;
  wire \xsqr_reg[71]_i_3_n_14 ;
  wire \xsqr_reg[71]_i_3_n_15 ;
  wire \xsqr_reg[71]_i_3_n_5 ;
  wire \xsqr_reg[71]_i_3_n_6 ;
  wire \xsqr_reg[71]_i_3_n_7 ;
  wire \xsqr_reg[75]_i_2_n_0 ;
  wire \xsqr_reg[75]_i_2_n_1 ;
  wire \xsqr_reg[75]_i_2_n_10 ;
  wire \xsqr_reg[75]_i_2_n_11 ;
  wire \xsqr_reg[75]_i_2_n_12 ;
  wire \xsqr_reg[75]_i_2_n_13 ;
  wire \xsqr_reg[75]_i_2_n_2 ;
  wire \xsqr_reg[75]_i_2_n_3 ;
  wire \xsqr_reg[75]_i_2_n_4 ;
  wire \xsqr_reg[75]_i_2_n_5 ;
  wire \xsqr_reg[75]_i_2_n_6 ;
  wire \xsqr_reg[75]_i_2_n_7 ;
  wire \xsqr_reg[75]_i_2_n_8 ;
  wire \xsqr_reg[75]_i_2_n_9 ;
  wire \xsqr_reg[75]_i_3_n_0 ;
  wire \xsqr_reg[75]_i_3_n_1 ;
  wire \xsqr_reg[75]_i_3_n_10 ;
  wire \xsqr_reg[75]_i_3_n_11 ;
  wire \xsqr_reg[75]_i_3_n_12 ;
  wire \xsqr_reg[75]_i_3_n_13 ;
  wire \xsqr_reg[75]_i_3_n_14 ;
  wire \xsqr_reg[75]_i_3_n_15 ;
  wire \xsqr_reg[75]_i_3_n_2 ;
  wire \xsqr_reg[75]_i_3_n_3 ;
  wire \xsqr_reg[75]_i_3_n_4 ;
  wire \xsqr_reg[75]_i_3_n_5 ;
  wire \xsqr_reg[75]_i_3_n_6 ;
  wire \xsqr_reg[75]_i_3_n_7 ;
  wire \xsqr_reg[75]_i_3_n_8 ;
  wire \xsqr_reg[75]_i_3_n_9 ;
  wire \xsqr_reg[83]_i_2_n_0 ;
  wire \xsqr_reg[83]_i_2_n_1 ;
  wire \xsqr_reg[83]_i_2_n_2 ;
  wire \xsqr_reg[83]_i_2_n_3 ;
  wire \xsqr_reg[83]_i_2_n_4 ;
  wire \xsqr_reg[83]_i_2_n_5 ;
  wire \xsqr_reg[83]_i_2_n_6 ;
  wire \xsqr_reg[83]_i_2_n_7 ;
  wire \xsqr_reg[89]_i_14_n_0 ;
  wire \xsqr_reg[89]_i_14_n_1 ;
  wire \xsqr_reg[89]_i_14_n_10 ;
  wire \xsqr_reg[89]_i_14_n_11 ;
  wire \xsqr_reg[89]_i_14_n_12 ;
  wire \xsqr_reg[89]_i_14_n_13 ;
  wire \xsqr_reg[89]_i_14_n_14 ;
  wire \xsqr_reg[89]_i_14_n_15 ;
  wire \xsqr_reg[89]_i_14_n_2 ;
  wire \xsqr_reg[89]_i_14_n_3 ;
  wire \xsqr_reg[89]_i_14_n_4 ;
  wire \xsqr_reg[89]_i_14_n_5 ;
  wire \xsqr_reg[89]_i_14_n_6 ;
  wire \xsqr_reg[89]_i_14_n_7 ;
  wire \xsqr_reg[89]_i_14_n_8 ;
  wire \xsqr_reg[89]_i_14_n_9 ;
  wire \xsqr_reg[89]_i_18_n_13 ;
  wire \xsqr_reg[89]_i_18_n_14 ;
  wire \xsqr_reg[89]_i_18_n_15 ;
  wire \xsqr_reg[89]_i_18_n_4 ;
  wire \xsqr_reg[89]_i_18_n_6 ;
  wire \xsqr_reg[89]_i_18_n_7 ;
  wire \xsqr_reg[89]_i_19_n_14 ;
  wire \xsqr_reg[89]_i_19_n_15 ;
  wire \xsqr_reg[89]_i_19_n_5 ;
  wire \xsqr_reg[89]_i_19_n_7 ;
  wire \xsqr_reg[89]_i_3_n_3 ;
  wire \xsqr_reg[89]_i_3_n_4 ;
  wire \xsqr_reg[89]_i_3_n_5 ;
  wire \xsqr_reg[89]_i_3_n_6 ;
  wire \xsqr_reg[89]_i_3_n_7 ;
  wire \xsqr_reg[89]_i_4_n_12 ;
  wire \xsqr_reg[89]_i_4_n_13 ;
  wire \xsqr_reg[89]_i_4_n_14 ;
  wire \xsqr_reg[89]_i_4_n_15 ;
  wire \xsqr_reg[89]_i_4_n_5 ;
  wire \xsqr_reg[89]_i_4_n_6 ;
  wire \xsqr_reg[89]_i_4_n_7 ;
  wire \xsqr_reg_n_0_[0] ;
  wire \xsqr_reg_n_0_[10] ;
  wire \xsqr_reg_n_0_[11] ;
  wire \xsqr_reg_n_0_[12] ;
  wire \xsqr_reg_n_0_[13] ;
  wire \xsqr_reg_n_0_[14] ;
  wire \xsqr_reg_n_0_[15] ;
  wire \xsqr_reg_n_0_[16] ;
  wire \xsqr_reg_n_0_[17] ;
  wire \xsqr_reg_n_0_[2] ;
  wire \xsqr_reg_n_0_[3] ;
  wire \xsqr_reg_n_0_[4] ;
  wire \xsqr_reg_n_0_[54] ;
  wire \xsqr_reg_n_0_[56] ;
  wire \xsqr_reg_n_0_[57] ;
  wire \xsqr_reg_n_0_[58] ;
  wire \xsqr_reg_n_0_[59] ;
  wire \xsqr_reg_n_0_[5] ;
  wire \xsqr_reg_n_0_[60] ;
  wire \xsqr_reg_n_0_[61] ;
  wire \xsqr_reg_n_0_[62] ;
  wire \xsqr_reg_n_0_[63] ;
  wire \xsqr_reg_n_0_[64] ;
  wire \xsqr_reg_n_0_[65] ;
  wire \xsqr_reg_n_0_[66] ;
  wire \xsqr_reg_n_0_[67] ;
  wire \xsqr_reg_n_0_[68] ;
  wire \xsqr_reg_n_0_[69] ;
  wire \xsqr_reg_n_0_[6] ;
  wire \xsqr_reg_n_0_[70] ;
  wire \xsqr_reg_n_0_[71] ;
  wire \xsqr_reg_n_0_[72] ;
  wire \xsqr_reg_n_0_[74] ;
  wire \xsqr_reg_n_0_[75] ;
  wire \xsqr_reg_n_0_[76] ;
  wire \xsqr_reg_n_0_[77] ;
  wire \xsqr_reg_n_0_[78] ;
  wire \xsqr_reg_n_0_[79] ;
  wire \xsqr_reg_n_0_[7] ;
  wire \xsqr_reg_n_0_[80] ;
  wire \xsqr_reg_n_0_[81] ;
  wire \xsqr_reg_n_0_[82] ;
  wire \xsqr_reg_n_0_[83] ;
  wire \xsqr_reg_n_0_[84] ;
  wire \xsqr_reg_n_0_[85] ;
  wire \xsqr_reg_n_0_[86] ;
  wire \xsqr_reg_n_0_[87] ;
  wire \xsqr_reg_n_0_[88] ;
  wire \xsqr_reg_n_0_[89] ;
  wire \xsqr_reg_n_0_[8] ;
  wire \xsqr_reg_n_0_[9] ;
  wire [89:0]xy;
  wire [17:0]xy0;
  wire [17:0]xy00_in;
  wire [17:0]xy01_in;
  wire [17:0]xy02_in;
  wire [17:0]xy03_in;
  wire [17:0]xy4p1;
  wire \xy4p1[0]_i_1_n_0 ;
  wire \xy4p1[10]_i_1_n_0 ;
  wire \xy4p1[11]_i_1_n_0 ;
  wire \xy4p1[12]_i_1_n_0 ;
  wire \xy4p1[13]_i_1_n_0 ;
  wire \xy4p1[14]_i_1_n_0 ;
  wire \xy4p1[15]_i_1_n_0 ;
  wire \xy4p1[16]_i_1_n_0 ;
  wire \xy4p1[17]_i_1_n_0 ;
  wire \xy4p1[1]_i_1_n_0 ;
  wire \xy4p1[2]_i_1_n_0 ;
  wire \xy4p1[3]_i_1_n_0 ;
  wire \xy4p1[4]_i_1_n_0 ;
  wire \xy4p1[5]_i_1_n_0 ;
  wire \xy4p1[6]_i_1_n_0 ;
  wire \xy4p1[7]_i_1_n_0 ;
  wire \xy4p1[8]_i_1_n_0 ;
  wire \xy4p1[9]_i_1_n_0 ;
  wire [17:0]xy4p2;
  wire \xy4p2[0]_i_1_n_0 ;
  wire \xy4p2[10]_i_1_n_0 ;
  wire \xy4p2[11]_i_1_n_0 ;
  wire \xy4p2[12]_i_1_n_0 ;
  wire \xy4p2[13]_i_1_n_0 ;
  wire \xy4p2[14]_i_1_n_0 ;
  wire \xy4p2[15]_i_1_n_0 ;
  wire \xy4p2[16]_i_1_n_0 ;
  wire \xy4p2[17]_i_1_n_0 ;
  wire \xy4p2[1]_i_1_n_0 ;
  wire \xy4p2[2]_i_1_n_0 ;
  wire \xy4p2[3]_i_1_n_0 ;
  wire \xy4p2[4]_i_1_n_0 ;
  wire \xy4p2[5]_i_1_n_0 ;
  wire \xy4p2[6]_i_1_n_0 ;
  wire \xy4p2[7]_i_1_n_0 ;
  wire \xy4p2[8]_i_1_n_0 ;
  wire \xy4p2[9]_i_1_n_0 ;
  wire \xy[0]_i_1_n_0 ;
  wire \xy[10]_i_1_n_0 ;
  wire \xy[11]_i_10_n_0 ;
  wire \xy[11]_i_11_n_0 ;
  wire \xy[11]_i_12_n_0 ;
  wire \xy[11]_i_13_n_0 ;
  wire \xy[11]_i_14_n_0 ;
  wire \xy[11]_i_15_n_0 ;
  wire \xy[11]_i_16_n_0 ;
  wire \xy[11]_i_17_n_0 ;
  wire \xy[11]_i_18_n_0 ;
  wire \xy[11]_i_19_n_0 ;
  wire \xy[11]_i_1_n_0 ;
  wire \xy[11]_i_3_n_0 ;
  wire \xy[11]_i_4_n_0 ;
  wire \xy[11]_i_5_n_0 ;
  wire \xy[11]_i_6_n_0 ;
  wire \xy[11]_i_7_n_0 ;
  wire \xy[11]_i_8_n_0 ;
  wire \xy[11]_i_9_n_0 ;
  wire \xy[12]_i_1_n_0 ;
  wire \xy[13]_i_1_n_0 ;
  wire \xy[14]_i_1_n_0 ;
  wire \xy[15]_i_1_n_0 ;
  wire \xy[16]_i_1_n_0 ;
  wire \xy[17]_i_10_n_0 ;
  wire \xy[17]_i_11_n_0 ;
  wire \xy[17]_i_12_n_0 ;
  wire \xy[17]_i_14_n_0 ;
  wire \xy[17]_i_15_n_0 ;
  wire \xy[17]_i_16_n_0 ;
  wire \xy[17]_i_17_n_0 ;
  wire \xy[17]_i_18_n_0 ;
  wire \xy[17]_i_19_n_0 ;
  wire \xy[17]_i_1_n_0 ;
  wire \xy[17]_i_22_n_0 ;
  wire \xy[17]_i_23_n_0 ;
  wire \xy[17]_i_24_n_0 ;
  wire \xy[17]_i_25_n_0 ;
  wire \xy[17]_i_26_n_0 ;
  wire \xy[17]_i_27_n_0 ;
  wire \xy[17]_i_28_n_0 ;
  wire \xy[17]_i_29_n_0 ;
  wire \xy[17]_i_30_n_0 ;
  wire \xy[17]_i_31_n_0 ;
  wire \xy[17]_i_32_n_0 ;
  wire \xy[17]_i_33_n_0 ;
  wire \xy[17]_i_34_n_0 ;
  wire \xy[17]_i_35_n_0 ;
  wire \xy[17]_i_36_n_0 ;
  wire \xy[17]_i_37_n_0 ;
  wire \xy[17]_i_38_n_0 ;
  wire \xy[17]_i_39_n_0 ;
  wire \xy[17]_i_40_n_0 ;
  wire \xy[17]_i_41_n_0 ;
  wire \xy[17]_i_42_n_0 ;
  wire \xy[17]_i_43_n_0 ;
  wire \xy[17]_i_44_n_0 ;
  wire \xy[17]_i_45_n_0 ;
  wire \xy[17]_i_46_n_0 ;
  wire \xy[17]_i_47_n_0 ;
  wire \xy[17]_i_48_n_0 ;
  wire \xy[17]_i_49_n_0 ;
  wire \xy[17]_i_4_n_0 ;
  wire \xy[17]_i_50_n_0 ;
  wire \xy[17]_i_51_n_0 ;
  wire \xy[17]_i_52_n_0 ;
  wire \xy[17]_i_53_n_0 ;
  wire \xy[17]_i_54_n_0 ;
  wire \xy[17]_i_55_n_0 ;
  wire \xy[17]_i_5_n_0 ;
  wire \xy[17]_i_6_n_0 ;
  wire \xy[17]_i_7_n_0 ;
  wire \xy[17]_i_8_n_0 ;
  wire \xy[17]_i_9_n_0 ;
  wire \xy[18]_i_1_n_0 ;
  wire \xy[19]_i_1_n_0 ;
  wire \xy[1]_i_1_n_0 ;
  wire \xy[20]_i_1_n_0 ;
  wire \xy[21]_i_10_n_0 ;
  wire \xy[21]_i_11_n_0 ;
  wire \xy[21]_i_12_n_0 ;
  wire \xy[21]_i_13_n_0 ;
  wire \xy[21]_i_14_n_0 ;
  wire \xy[21]_i_15_n_0 ;
  wire \xy[21]_i_16_n_0 ;
  wire \xy[21]_i_17_n_0 ;
  wire \xy[21]_i_18_n_0 ;
  wire \xy[21]_i_19_n_0 ;
  wire \xy[21]_i_1_n_0 ;
  wire \xy[21]_i_20_n_0 ;
  wire \xy[21]_i_21_n_0 ;
  wire \xy[21]_i_22_n_0 ;
  wire \xy[21]_i_23_n_0 ;
  wire \xy[21]_i_24_n_0 ;
  wire \xy[21]_i_25_n_0 ;
  wire \xy[21]_i_26_n_0 ;
  wire \xy[21]_i_27_n_0 ;
  wire \xy[21]_i_28_n_0 ;
  wire \xy[21]_i_29_n_0 ;
  wire \xy[21]_i_30_n_0 ;
  wire \xy[21]_i_31_n_0 ;
  wire \xy[21]_i_32_n_0 ;
  wire \xy[21]_i_33_n_0 ;
  wire \xy[21]_i_34_n_0 ;
  wire \xy[21]_i_35_n_0 ;
  wire \xy[21]_i_36_n_0 ;
  wire \xy[21]_i_37_n_0 ;
  wire \xy[21]_i_38_n_0 ;
  wire \xy[21]_i_39_n_0 ;
  wire \xy[21]_i_40_n_0 ;
  wire \xy[21]_i_41_n_0 ;
  wire \xy[21]_i_4_n_0 ;
  wire \xy[21]_i_5_n_0 ;
  wire \xy[21]_i_6_n_0 ;
  wire \xy[21]_i_7_n_0 ;
  wire \xy[21]_i_8_n_0 ;
  wire \xy[21]_i_9_n_0 ;
  wire \xy[22]_i_1_n_0 ;
  wire \xy[23]_i_1_n_0 ;
  wire \xy[24]_i_1_n_0 ;
  wire \xy[25]_i_1_n_0 ;
  wire \xy[26]_i_1_n_0 ;
  wire \xy[27]_i_1_n_0 ;
  wire \xy[28]_i_1_n_0 ;
  wire \xy[29]_i_10_n_0 ;
  wire \xy[29]_i_11_n_0 ;
  wire \xy[29]_i_12_n_0 ;
  wire \xy[29]_i_13_n_0 ;
  wire \xy[29]_i_14_n_0 ;
  wire \xy[29]_i_15_n_0 ;
  wire \xy[29]_i_16_n_0 ;
  wire \xy[29]_i_17_n_0 ;
  wire \xy[29]_i_18_n_0 ;
  wire \xy[29]_i_19_n_0 ;
  wire \xy[29]_i_1_n_0 ;
  wire \xy[29]_i_3_n_0 ;
  wire \xy[29]_i_4_n_0 ;
  wire \xy[29]_i_5_n_0 ;
  wire \xy[29]_i_6_n_0 ;
  wire \xy[29]_i_7_n_0 ;
  wire \xy[29]_i_8_n_0 ;
  wire \xy[29]_i_9_n_0 ;
  wire \xy[2]_i_1_n_0 ;
  wire \xy[30]_i_1_n_0 ;
  wire \xy[31]_i_1_n_0 ;
  wire \xy[32]_i_1_n_0 ;
  wire \xy[33]_i_1_n_0 ;
  wire \xy[34]_i_1_n_0 ;
  wire \xy[35]_i_10_n_0 ;
  wire \xy[35]_i_11_n_0 ;
  wire \xy[35]_i_12_n_0 ;
  wire \xy[35]_i_14_n_0 ;
  wire \xy[35]_i_15_n_0 ;
  wire \xy[35]_i_16_n_0 ;
  wire \xy[35]_i_17_n_0 ;
  wire \xy[35]_i_18_n_0 ;
  wire \xy[35]_i_19_n_0 ;
  wire \xy[35]_i_1_n_0 ;
  wire \xy[35]_i_22_n_0 ;
  wire \xy[35]_i_23_n_0 ;
  wire \xy[35]_i_24_n_0 ;
  wire \xy[35]_i_25_n_0 ;
  wire \xy[35]_i_26_n_0 ;
  wire \xy[35]_i_27_n_0 ;
  wire \xy[35]_i_28_n_0 ;
  wire \xy[35]_i_29_n_0 ;
  wire \xy[35]_i_30_n_0 ;
  wire \xy[35]_i_31_n_0 ;
  wire \xy[35]_i_32_n_0 ;
  wire \xy[35]_i_33_n_0 ;
  wire \xy[35]_i_34_n_0 ;
  wire \xy[35]_i_35_n_0 ;
  wire \xy[35]_i_36_n_0 ;
  wire \xy[35]_i_37_n_0 ;
  wire \xy[35]_i_38_n_0 ;
  wire \xy[35]_i_39_n_0 ;
  wire \xy[35]_i_40_n_0 ;
  wire \xy[35]_i_41_n_0 ;
  wire \xy[35]_i_42_n_0 ;
  wire \xy[35]_i_43_n_0 ;
  wire \xy[35]_i_44_n_0 ;
  wire \xy[35]_i_45_n_0 ;
  wire \xy[35]_i_46_n_0 ;
  wire \xy[35]_i_47_n_0 ;
  wire \xy[35]_i_48_n_0 ;
  wire \xy[35]_i_49_n_0 ;
  wire \xy[35]_i_4_n_0 ;
  wire \xy[35]_i_50_n_0 ;
  wire \xy[35]_i_51_n_0 ;
  wire \xy[35]_i_52_n_0 ;
  wire \xy[35]_i_53_n_0 ;
  wire \xy[35]_i_54_n_0 ;
  wire \xy[35]_i_55_n_0 ;
  wire \xy[35]_i_5_n_0 ;
  wire \xy[35]_i_6_n_0 ;
  wire \xy[35]_i_7_n_0 ;
  wire \xy[35]_i_8_n_0 ;
  wire \xy[35]_i_9_n_0 ;
  wire \xy[36]_i_1_n_0 ;
  wire \xy[37]_i_1_n_0 ;
  wire \xy[38]_i_1_n_0 ;
  wire \xy[39]_i_10_n_0 ;
  wire \xy[39]_i_11_n_0 ;
  wire \xy[39]_i_12_n_0 ;
  wire \xy[39]_i_13_n_0 ;
  wire \xy[39]_i_14_n_0 ;
  wire \xy[39]_i_15_n_0 ;
  wire \xy[39]_i_16_n_0 ;
  wire \xy[39]_i_17_n_0 ;
  wire \xy[39]_i_18_n_0 ;
  wire \xy[39]_i_19_n_0 ;
  wire \xy[39]_i_1_n_0 ;
  wire \xy[39]_i_20_n_0 ;
  wire \xy[39]_i_21_n_0 ;
  wire \xy[39]_i_22_n_0 ;
  wire \xy[39]_i_23_n_0 ;
  wire \xy[39]_i_24_n_0 ;
  wire \xy[39]_i_25_n_0 ;
  wire \xy[39]_i_26_n_0 ;
  wire \xy[39]_i_27_n_0 ;
  wire \xy[39]_i_28_n_0 ;
  wire \xy[39]_i_29_n_0 ;
  wire \xy[39]_i_30_n_0 ;
  wire \xy[39]_i_31_n_0 ;
  wire \xy[39]_i_32_n_0 ;
  wire \xy[39]_i_33_n_0 ;
  wire \xy[39]_i_34_n_0 ;
  wire \xy[39]_i_35_n_0 ;
  wire \xy[39]_i_36_n_0 ;
  wire \xy[39]_i_37_n_0 ;
  wire \xy[39]_i_38_n_0 ;
  wire \xy[39]_i_39_n_0 ;
  wire \xy[39]_i_40_n_0 ;
  wire \xy[39]_i_41_n_0 ;
  wire \xy[39]_i_4_n_0 ;
  wire \xy[39]_i_5_n_0 ;
  wire \xy[39]_i_6_n_0 ;
  wire \xy[39]_i_7_n_0 ;
  wire \xy[39]_i_8_n_0 ;
  wire \xy[39]_i_9_n_0 ;
  wire \xy[3]_i_10_n_0 ;
  wire \xy[3]_i_11_n_0 ;
  wire \xy[3]_i_12_n_0 ;
  wire \xy[3]_i_13_n_0 ;
  wire \xy[3]_i_14_n_0 ;
  wire \xy[3]_i_15_n_0 ;
  wire \xy[3]_i_16_n_0 ;
  wire \xy[3]_i_17_n_0 ;
  wire \xy[3]_i_18_n_0 ;
  wire \xy[3]_i_19_n_0 ;
  wire \xy[3]_i_1_n_0 ;
  wire \xy[3]_i_20_n_0 ;
  wire \xy[3]_i_21_n_0 ;
  wire \xy[3]_i_22_n_0 ;
  wire \xy[3]_i_23_n_0 ;
  wire \xy[3]_i_24_n_0 ;
  wire \xy[3]_i_25_n_0 ;
  wire \xy[3]_i_26_n_0 ;
  wire \xy[3]_i_27_n_0 ;
  wire \xy[3]_i_28_n_0 ;
  wire \xy[3]_i_29_n_0 ;
  wire \xy[3]_i_30_n_0 ;
  wire \xy[3]_i_31_n_0 ;
  wire \xy[3]_i_32_n_0 ;
  wire \xy[3]_i_33_n_0 ;
  wire \xy[3]_i_34_n_0 ;
  wire \xy[3]_i_35_n_0 ;
  wire \xy[3]_i_36_n_0 ;
  wire \xy[3]_i_37_n_0 ;
  wire \xy[3]_i_38_n_0 ;
  wire \xy[3]_i_39_n_0 ;
  wire \xy[3]_i_40_n_0 ;
  wire \xy[3]_i_41_n_0 ;
  wire \xy[3]_i_4_n_0 ;
  wire \xy[3]_i_5_n_0 ;
  wire \xy[3]_i_6_n_0 ;
  wire \xy[3]_i_7_n_0 ;
  wire \xy[3]_i_8_n_0 ;
  wire \xy[3]_i_9_n_0 ;
  wire \xy[40]_i_1_n_0 ;
  wire \xy[41]_i_1_n_0 ;
  wire \xy[42]_i_1_n_0 ;
  wire \xy[43]_i_1_n_0 ;
  wire \xy[44]_i_1_n_0 ;
  wire \xy[45]_i_1_n_0 ;
  wire \xy[46]_i_1_n_0 ;
  wire \xy[47]_i_10_n_0 ;
  wire \xy[47]_i_11_n_0 ;
  wire \xy[47]_i_12_n_0 ;
  wire \xy[47]_i_13_n_0 ;
  wire \xy[47]_i_14_n_0 ;
  wire \xy[47]_i_15_n_0 ;
  wire \xy[47]_i_16_n_0 ;
  wire \xy[47]_i_17_n_0 ;
  wire \xy[47]_i_18_n_0 ;
  wire \xy[47]_i_19_n_0 ;
  wire \xy[47]_i_1_n_0 ;
  wire \xy[47]_i_3_n_0 ;
  wire \xy[47]_i_4_n_0 ;
  wire \xy[47]_i_5_n_0 ;
  wire \xy[47]_i_6_n_0 ;
  wire \xy[47]_i_7_n_0 ;
  wire \xy[47]_i_8_n_0 ;
  wire \xy[47]_i_9_n_0 ;
  wire \xy[48]_i_1_n_0 ;
  wire \xy[49]_i_1_n_0 ;
  wire \xy[4]_i_1_n_0 ;
  wire \xy[50]_i_1_n_0 ;
  wire \xy[51]_i_1_n_0 ;
  wire \xy[52]_i_1_n_0 ;
  wire \xy[53]_i_10_n_0 ;
  wire \xy[53]_i_11_n_0 ;
  wire \xy[53]_i_12_n_0 ;
  wire \xy[53]_i_14_n_0 ;
  wire \xy[53]_i_15_n_0 ;
  wire \xy[53]_i_16_n_0 ;
  wire \xy[53]_i_17_n_0 ;
  wire \xy[53]_i_18_n_0 ;
  wire \xy[53]_i_19_n_0 ;
  wire \xy[53]_i_1_n_0 ;
  wire \xy[53]_i_22_n_0 ;
  wire \xy[53]_i_23_n_0 ;
  wire \xy[53]_i_24_n_0 ;
  wire \xy[53]_i_25_n_0 ;
  wire \xy[53]_i_26_n_0 ;
  wire \xy[53]_i_27_n_0 ;
  wire \xy[53]_i_28_n_0 ;
  wire \xy[53]_i_29_n_0 ;
  wire \xy[53]_i_30_n_0 ;
  wire \xy[53]_i_31_n_0 ;
  wire \xy[53]_i_32_n_0 ;
  wire \xy[53]_i_33_n_0 ;
  wire \xy[53]_i_34_n_0 ;
  wire \xy[53]_i_35_n_0 ;
  wire \xy[53]_i_36_n_0 ;
  wire \xy[53]_i_37_n_0 ;
  wire \xy[53]_i_38_n_0 ;
  wire \xy[53]_i_39_n_0 ;
  wire \xy[53]_i_40_n_0 ;
  wire \xy[53]_i_41_n_0 ;
  wire \xy[53]_i_42_n_0 ;
  wire \xy[53]_i_43_n_0 ;
  wire \xy[53]_i_44_n_0 ;
  wire \xy[53]_i_45_n_0 ;
  wire \xy[53]_i_46_n_0 ;
  wire \xy[53]_i_47_n_0 ;
  wire \xy[53]_i_48_n_0 ;
  wire \xy[53]_i_49_n_0 ;
  wire \xy[53]_i_4_n_0 ;
  wire \xy[53]_i_50_n_0 ;
  wire \xy[53]_i_51_n_0 ;
  wire \xy[53]_i_52_n_0 ;
  wire \xy[53]_i_53_n_0 ;
  wire \xy[53]_i_54_n_0 ;
  wire \xy[53]_i_55_n_0 ;
  wire \xy[53]_i_5_n_0 ;
  wire \xy[53]_i_6_n_0 ;
  wire \xy[53]_i_7_n_0 ;
  wire \xy[53]_i_8_n_0 ;
  wire \xy[53]_i_9_n_0 ;
  wire \xy[54]_i_1_n_0 ;
  wire \xy[55]_i_1_n_0 ;
  wire \xy[56]_i_1_n_0 ;
  wire \xy[57]_i_10_n_0 ;
  wire \xy[57]_i_11_n_0 ;
  wire \xy[57]_i_12_n_0 ;
  wire \xy[57]_i_13_n_0 ;
  wire \xy[57]_i_14_n_0 ;
  wire \xy[57]_i_15_n_0 ;
  wire \xy[57]_i_16_n_0 ;
  wire \xy[57]_i_17_n_0 ;
  wire \xy[57]_i_18_n_0 ;
  wire \xy[57]_i_19_n_0 ;
  wire \xy[57]_i_1_n_0 ;
  wire \xy[57]_i_20_n_0 ;
  wire \xy[57]_i_21_n_0 ;
  wire \xy[57]_i_22_n_0 ;
  wire \xy[57]_i_23_n_0 ;
  wire \xy[57]_i_24_n_0 ;
  wire \xy[57]_i_25_n_0 ;
  wire \xy[57]_i_26_n_0 ;
  wire \xy[57]_i_27_n_0 ;
  wire \xy[57]_i_28_n_0 ;
  wire \xy[57]_i_29_n_0 ;
  wire \xy[57]_i_30_n_0 ;
  wire \xy[57]_i_31_n_0 ;
  wire \xy[57]_i_32_n_0 ;
  wire \xy[57]_i_33_n_0 ;
  wire \xy[57]_i_34_n_0 ;
  wire \xy[57]_i_35_n_0 ;
  wire \xy[57]_i_36_n_0 ;
  wire \xy[57]_i_37_n_0 ;
  wire \xy[57]_i_38_n_0 ;
  wire \xy[57]_i_39_n_0 ;
  wire \xy[57]_i_40_n_0 ;
  wire \xy[57]_i_41_n_0 ;
  wire \xy[57]_i_4_n_0 ;
  wire \xy[57]_i_5_n_0 ;
  wire \xy[57]_i_6_n_0 ;
  wire \xy[57]_i_7_n_0 ;
  wire \xy[57]_i_8_n_0 ;
  wire \xy[57]_i_9_n_0 ;
  wire \xy[58]_i_1_n_0 ;
  wire \xy[59]_i_1_n_0 ;
  wire \xy[5]_i_1_n_0 ;
  wire \xy[60]_i_1_n_0 ;
  wire \xy[61]_i_1_n_0 ;
  wire \xy[62]_i_1_n_0 ;
  wire \xy[63]_i_1_n_0 ;
  wire \xy[64]_i_1_n_0 ;
  wire \xy[65]_i_10_n_0 ;
  wire \xy[65]_i_11_n_0 ;
  wire \xy[65]_i_12_n_0 ;
  wire \xy[65]_i_13_n_0 ;
  wire \xy[65]_i_14_n_0 ;
  wire \xy[65]_i_15_n_0 ;
  wire \xy[65]_i_16_n_0 ;
  wire \xy[65]_i_17_n_0 ;
  wire \xy[65]_i_18_n_0 ;
  wire \xy[65]_i_19_n_0 ;
  wire \xy[65]_i_1_n_0 ;
  wire \xy[65]_i_3_n_0 ;
  wire \xy[65]_i_4_n_0 ;
  wire \xy[65]_i_5_n_0 ;
  wire \xy[65]_i_6_n_0 ;
  wire \xy[65]_i_7_n_0 ;
  wire \xy[65]_i_8_n_0 ;
  wire \xy[65]_i_9_n_0 ;
  wire \xy[66]_i_1_n_0 ;
  wire \xy[67]_i_1_n_0 ;
  wire \xy[68]_i_1_n_0 ;
  wire \xy[69]_i_1_n_0 ;
  wire \xy[6]_i_1_n_0 ;
  wire \xy[70]_i_1_n_0 ;
  wire \xy[71]_i_10_n_0 ;
  wire \xy[71]_i_11_n_0 ;
  wire \xy[71]_i_12_n_0 ;
  wire \xy[71]_i_14_n_0 ;
  wire \xy[71]_i_15_n_0 ;
  wire \xy[71]_i_16_n_0 ;
  wire \xy[71]_i_17_n_0 ;
  wire \xy[71]_i_18_n_0 ;
  wire \xy[71]_i_19_n_0 ;
  wire \xy[71]_i_1_n_0 ;
  wire \xy[71]_i_22_n_0 ;
  wire \xy[71]_i_23_n_0 ;
  wire \xy[71]_i_24_n_0 ;
  wire \xy[71]_i_25_n_0 ;
  wire \xy[71]_i_26_n_0 ;
  wire \xy[71]_i_27_n_0 ;
  wire \xy[71]_i_28_n_0 ;
  wire \xy[71]_i_29_n_0 ;
  wire \xy[71]_i_30_n_0 ;
  wire \xy[71]_i_31_n_0 ;
  wire \xy[71]_i_32_n_0 ;
  wire \xy[71]_i_33_n_0 ;
  wire \xy[71]_i_34_n_0 ;
  wire \xy[71]_i_35_n_0 ;
  wire \xy[71]_i_36_n_0 ;
  wire \xy[71]_i_37_n_0 ;
  wire \xy[71]_i_38_n_0 ;
  wire \xy[71]_i_39_n_0 ;
  wire \xy[71]_i_40_n_0 ;
  wire \xy[71]_i_41_n_0 ;
  wire \xy[71]_i_42_n_0 ;
  wire \xy[71]_i_43_n_0 ;
  wire \xy[71]_i_44_n_0 ;
  wire \xy[71]_i_45_n_0 ;
  wire \xy[71]_i_46_n_0 ;
  wire \xy[71]_i_47_n_0 ;
  wire \xy[71]_i_48_n_0 ;
  wire \xy[71]_i_49_n_0 ;
  wire \xy[71]_i_4_n_0 ;
  wire \xy[71]_i_50_n_0 ;
  wire \xy[71]_i_51_n_0 ;
  wire \xy[71]_i_52_n_0 ;
  wire \xy[71]_i_53_n_0 ;
  wire \xy[71]_i_54_n_0 ;
  wire \xy[71]_i_55_n_0 ;
  wire \xy[71]_i_5_n_0 ;
  wire \xy[71]_i_6_n_0 ;
  wire \xy[71]_i_7_n_0 ;
  wire \xy[71]_i_8_n_0 ;
  wire \xy[71]_i_9_n_0 ;
  wire \xy[72]_i_1_n_0 ;
  wire \xy[73]_i_1_n_0 ;
  wire \xy[74]_i_1_n_0 ;
  wire \xy[75]_i_10_n_0 ;
  wire \xy[75]_i_11_n_0 ;
  wire \xy[75]_i_12_n_0 ;
  wire \xy[75]_i_13_n_0 ;
  wire \xy[75]_i_14_n_0 ;
  wire \xy[75]_i_15_n_0 ;
  wire \xy[75]_i_16_n_0 ;
  wire \xy[75]_i_17_n_0 ;
  wire \xy[75]_i_18_n_0 ;
  wire \xy[75]_i_19_n_0 ;
  wire \xy[75]_i_1_n_0 ;
  wire \xy[75]_i_20_n_0 ;
  wire \xy[75]_i_21_n_0 ;
  wire \xy[75]_i_22_n_0 ;
  wire \xy[75]_i_23_n_0 ;
  wire \xy[75]_i_24_n_0 ;
  wire \xy[75]_i_25_n_0 ;
  wire \xy[75]_i_26_n_0 ;
  wire \xy[75]_i_27_n_0 ;
  wire \xy[75]_i_28_n_0 ;
  wire \xy[75]_i_29_n_0 ;
  wire \xy[75]_i_30_n_0 ;
  wire \xy[75]_i_31_n_0 ;
  wire \xy[75]_i_32_n_0 ;
  wire \xy[75]_i_33_n_0 ;
  wire \xy[75]_i_34_n_0 ;
  wire \xy[75]_i_35_n_0 ;
  wire \xy[75]_i_36_n_0 ;
  wire \xy[75]_i_37_n_0 ;
  wire \xy[75]_i_38_n_0 ;
  wire \xy[75]_i_39_n_0 ;
  wire \xy[75]_i_40_n_0 ;
  wire \xy[75]_i_41_n_0 ;
  wire \xy[75]_i_4_n_0 ;
  wire \xy[75]_i_5_n_0 ;
  wire \xy[75]_i_6_n_0 ;
  wire \xy[75]_i_7_n_0 ;
  wire \xy[75]_i_8_n_0 ;
  wire \xy[75]_i_9_n_0 ;
  wire \xy[76]_i_1_n_0 ;
  wire \xy[77]_i_1_n_0 ;
  wire \xy[78]_i_1_n_0 ;
  wire \xy[79]_i_1_n_0 ;
  wire \xy[7]_i_1_n_0 ;
  wire \xy[80]_i_1_n_0 ;
  wire \xy[81]_i_1_n_0 ;
  wire \xy[82]_i_1_n_0 ;
  wire \xy[83]_i_10_n_0 ;
  wire \xy[83]_i_11_n_0 ;
  wire \xy[83]_i_12_n_0 ;
  wire \xy[83]_i_13_n_0 ;
  wire \xy[83]_i_14_n_0 ;
  wire \xy[83]_i_15_n_0 ;
  wire \xy[83]_i_16_n_0 ;
  wire \xy[83]_i_17_n_0 ;
  wire \xy[83]_i_18_n_0 ;
  wire \xy[83]_i_19_n_0 ;
  wire \xy[83]_i_1_n_0 ;
  wire \xy[83]_i_3_n_0 ;
  wire \xy[83]_i_4_n_0 ;
  wire \xy[83]_i_5_n_0 ;
  wire \xy[83]_i_6_n_0 ;
  wire \xy[83]_i_7_n_0 ;
  wire \xy[83]_i_8_n_0 ;
  wire \xy[83]_i_9_n_0 ;
  wire \xy[84]_i_1_n_0 ;
  wire \xy[85]_i_1_n_0 ;
  wire \xy[86]_i_1_n_0 ;
  wire \xy[87]_i_1_n_0 ;
  wire \xy[88]_i_1_n_0 ;
  wire \xy[89]_i_10_n_0 ;
  wire \xy[89]_i_11_n_0 ;
  wire \xy[89]_i_12_n_0 ;
  wire \xy[89]_i_14_n_0 ;
  wire \xy[89]_i_15_n_0 ;
  wire \xy[89]_i_16_n_0 ;
  wire \xy[89]_i_17_n_0 ;
  wire \xy[89]_i_18_n_0 ;
  wire \xy[89]_i_19_n_0 ;
  wire \xy[89]_i_1_n_0 ;
  wire \xy[89]_i_22_n_0 ;
  wire \xy[89]_i_23_n_0 ;
  wire \xy[89]_i_24_n_0 ;
  wire \xy[89]_i_25_n_0 ;
  wire \xy[89]_i_26_n_0 ;
  wire \xy[89]_i_27_n_0 ;
  wire \xy[89]_i_28_n_0 ;
  wire \xy[89]_i_29_n_0 ;
  wire \xy[89]_i_30_n_0 ;
  wire \xy[89]_i_31_n_0 ;
  wire \xy[89]_i_32_n_0 ;
  wire \xy[89]_i_33_n_0 ;
  wire \xy[89]_i_34_n_0 ;
  wire \xy[89]_i_35_n_0 ;
  wire \xy[89]_i_36_n_0 ;
  wire \xy[89]_i_37_n_0 ;
  wire \xy[89]_i_38_n_0 ;
  wire \xy[89]_i_39_n_0 ;
  wire \xy[89]_i_40_n_0 ;
  wire \xy[89]_i_41_n_0 ;
  wire \xy[89]_i_42_n_0 ;
  wire \xy[89]_i_43_n_0 ;
  wire \xy[89]_i_44_n_0 ;
  wire \xy[89]_i_45_n_0 ;
  wire \xy[89]_i_46_n_0 ;
  wire \xy[89]_i_47_n_0 ;
  wire \xy[89]_i_48_n_0 ;
  wire \xy[89]_i_49_n_0 ;
  wire \xy[89]_i_4_n_0 ;
  wire \xy[89]_i_50_n_0 ;
  wire \xy[89]_i_51_n_0 ;
  wire \xy[89]_i_52_n_0 ;
  wire \xy[89]_i_53_n_0 ;
  wire \xy[89]_i_54_n_0 ;
  wire \xy[89]_i_55_n_0 ;
  wire \xy[89]_i_5_n_0 ;
  wire \xy[89]_i_6_n_0 ;
  wire \xy[89]_i_7_n_0 ;
  wire \xy[89]_i_8_n_0 ;
  wire \xy[89]_i_9_n_0 ;
  wire \xy[8]_i_1_n_0 ;
  wire \xy[9]_i_1_n_0 ;
  wire \xy_reg[11]_i_2_n_0 ;
  wire \xy_reg[11]_i_2_n_1 ;
  wire \xy_reg[11]_i_2_n_2 ;
  wire \xy_reg[11]_i_2_n_3 ;
  wire \xy_reg[11]_i_2_n_4 ;
  wire \xy_reg[11]_i_2_n_5 ;
  wire \xy_reg[11]_i_2_n_6 ;
  wire \xy_reg[11]_i_2_n_7 ;
  wire \xy_reg[17]_i_13_n_0 ;
  wire \xy_reg[17]_i_13_n_1 ;
  wire \xy_reg[17]_i_13_n_10 ;
  wire \xy_reg[17]_i_13_n_11 ;
  wire \xy_reg[17]_i_13_n_12 ;
  wire \xy_reg[17]_i_13_n_13 ;
  wire \xy_reg[17]_i_13_n_14 ;
  wire \xy_reg[17]_i_13_n_15 ;
  wire \xy_reg[17]_i_13_n_2 ;
  wire \xy_reg[17]_i_13_n_3 ;
  wire \xy_reg[17]_i_13_n_4 ;
  wire \xy_reg[17]_i_13_n_5 ;
  wire \xy_reg[17]_i_13_n_6 ;
  wire \xy_reg[17]_i_13_n_7 ;
  wire \xy_reg[17]_i_13_n_8 ;
  wire \xy_reg[17]_i_13_n_9 ;
  wire \xy_reg[17]_i_20_n_13 ;
  wire \xy_reg[17]_i_20_n_14 ;
  wire \xy_reg[17]_i_20_n_15 ;
  wire \xy_reg[17]_i_20_n_4 ;
  wire \xy_reg[17]_i_20_n_6 ;
  wire \xy_reg[17]_i_20_n_7 ;
  wire \xy_reg[17]_i_21_n_13 ;
  wire \xy_reg[17]_i_21_n_14 ;
  wire \xy_reg[17]_i_21_n_15 ;
  wire \xy_reg[17]_i_21_n_4 ;
  wire \xy_reg[17]_i_21_n_6 ;
  wire \xy_reg[17]_i_21_n_7 ;
  wire \xy_reg[17]_i_2_n_3 ;
  wire \xy_reg[17]_i_2_n_4 ;
  wire \xy_reg[17]_i_2_n_5 ;
  wire \xy_reg[17]_i_2_n_6 ;
  wire \xy_reg[17]_i_2_n_7 ;
  wire \xy_reg[17]_i_3_n_12 ;
  wire \xy_reg[17]_i_3_n_13 ;
  wire \xy_reg[17]_i_3_n_14 ;
  wire \xy_reg[17]_i_3_n_15 ;
  wire \xy_reg[17]_i_3_n_5 ;
  wire \xy_reg[17]_i_3_n_6 ;
  wire \xy_reg[17]_i_3_n_7 ;
  wire \xy_reg[21]_i_2_n_0 ;
  wire \xy_reg[21]_i_2_n_1 ;
  wire \xy_reg[21]_i_2_n_10 ;
  wire \xy_reg[21]_i_2_n_11 ;
  wire \xy_reg[21]_i_2_n_12 ;
  wire \xy_reg[21]_i_2_n_2 ;
  wire \xy_reg[21]_i_2_n_3 ;
  wire \xy_reg[21]_i_2_n_4 ;
  wire \xy_reg[21]_i_2_n_5 ;
  wire \xy_reg[21]_i_2_n_6 ;
  wire \xy_reg[21]_i_2_n_7 ;
  wire \xy_reg[21]_i_2_n_8 ;
  wire \xy_reg[21]_i_2_n_9 ;
  wire \xy_reg[21]_i_3_n_0 ;
  wire \xy_reg[21]_i_3_n_1 ;
  wire \xy_reg[21]_i_3_n_10 ;
  wire \xy_reg[21]_i_3_n_11 ;
  wire \xy_reg[21]_i_3_n_12 ;
  wire \xy_reg[21]_i_3_n_13 ;
  wire \xy_reg[21]_i_3_n_14 ;
  wire \xy_reg[21]_i_3_n_15 ;
  wire \xy_reg[21]_i_3_n_2 ;
  wire \xy_reg[21]_i_3_n_3 ;
  wire \xy_reg[21]_i_3_n_4 ;
  wire \xy_reg[21]_i_3_n_5 ;
  wire \xy_reg[21]_i_3_n_6 ;
  wire \xy_reg[21]_i_3_n_7 ;
  wire \xy_reg[21]_i_3_n_8 ;
  wire \xy_reg[21]_i_3_n_9 ;
  wire \xy_reg[29]_i_2_n_0 ;
  wire \xy_reg[29]_i_2_n_1 ;
  wire \xy_reg[29]_i_2_n_2 ;
  wire \xy_reg[29]_i_2_n_3 ;
  wire \xy_reg[29]_i_2_n_4 ;
  wire \xy_reg[29]_i_2_n_5 ;
  wire \xy_reg[29]_i_2_n_6 ;
  wire \xy_reg[29]_i_2_n_7 ;
  wire \xy_reg[35]_i_13_n_0 ;
  wire \xy_reg[35]_i_13_n_1 ;
  wire \xy_reg[35]_i_13_n_10 ;
  wire \xy_reg[35]_i_13_n_11 ;
  wire \xy_reg[35]_i_13_n_12 ;
  wire \xy_reg[35]_i_13_n_13 ;
  wire \xy_reg[35]_i_13_n_14 ;
  wire \xy_reg[35]_i_13_n_15 ;
  wire \xy_reg[35]_i_13_n_2 ;
  wire \xy_reg[35]_i_13_n_3 ;
  wire \xy_reg[35]_i_13_n_4 ;
  wire \xy_reg[35]_i_13_n_5 ;
  wire \xy_reg[35]_i_13_n_6 ;
  wire \xy_reg[35]_i_13_n_7 ;
  wire \xy_reg[35]_i_13_n_8 ;
  wire \xy_reg[35]_i_13_n_9 ;
  wire \xy_reg[35]_i_20_n_13 ;
  wire \xy_reg[35]_i_20_n_14 ;
  wire \xy_reg[35]_i_20_n_15 ;
  wire \xy_reg[35]_i_20_n_4 ;
  wire \xy_reg[35]_i_20_n_6 ;
  wire \xy_reg[35]_i_20_n_7 ;
  wire \xy_reg[35]_i_21_n_13 ;
  wire \xy_reg[35]_i_21_n_14 ;
  wire \xy_reg[35]_i_21_n_15 ;
  wire \xy_reg[35]_i_21_n_4 ;
  wire \xy_reg[35]_i_21_n_6 ;
  wire \xy_reg[35]_i_21_n_7 ;
  wire \xy_reg[35]_i_2_n_3 ;
  wire \xy_reg[35]_i_2_n_4 ;
  wire \xy_reg[35]_i_2_n_5 ;
  wire \xy_reg[35]_i_2_n_6 ;
  wire \xy_reg[35]_i_2_n_7 ;
  wire \xy_reg[35]_i_3_n_12 ;
  wire \xy_reg[35]_i_3_n_13 ;
  wire \xy_reg[35]_i_3_n_14 ;
  wire \xy_reg[35]_i_3_n_15 ;
  wire \xy_reg[35]_i_3_n_5 ;
  wire \xy_reg[35]_i_3_n_6 ;
  wire \xy_reg[35]_i_3_n_7 ;
  wire \xy_reg[39]_i_2_n_0 ;
  wire \xy_reg[39]_i_2_n_1 ;
  wire \xy_reg[39]_i_2_n_10 ;
  wire \xy_reg[39]_i_2_n_11 ;
  wire \xy_reg[39]_i_2_n_12 ;
  wire \xy_reg[39]_i_2_n_2 ;
  wire \xy_reg[39]_i_2_n_3 ;
  wire \xy_reg[39]_i_2_n_4 ;
  wire \xy_reg[39]_i_2_n_5 ;
  wire \xy_reg[39]_i_2_n_6 ;
  wire \xy_reg[39]_i_2_n_7 ;
  wire \xy_reg[39]_i_2_n_8 ;
  wire \xy_reg[39]_i_2_n_9 ;
  wire \xy_reg[39]_i_3_n_0 ;
  wire \xy_reg[39]_i_3_n_1 ;
  wire \xy_reg[39]_i_3_n_10 ;
  wire \xy_reg[39]_i_3_n_11 ;
  wire \xy_reg[39]_i_3_n_12 ;
  wire \xy_reg[39]_i_3_n_13 ;
  wire \xy_reg[39]_i_3_n_14 ;
  wire \xy_reg[39]_i_3_n_15 ;
  wire \xy_reg[39]_i_3_n_2 ;
  wire \xy_reg[39]_i_3_n_3 ;
  wire \xy_reg[39]_i_3_n_4 ;
  wire \xy_reg[39]_i_3_n_5 ;
  wire \xy_reg[39]_i_3_n_6 ;
  wire \xy_reg[39]_i_3_n_7 ;
  wire \xy_reg[39]_i_3_n_8 ;
  wire \xy_reg[39]_i_3_n_9 ;
  wire \xy_reg[3]_i_2_n_0 ;
  wire \xy_reg[3]_i_2_n_1 ;
  wire \xy_reg[3]_i_2_n_10 ;
  wire \xy_reg[3]_i_2_n_11 ;
  wire \xy_reg[3]_i_2_n_12 ;
  wire \xy_reg[3]_i_2_n_2 ;
  wire \xy_reg[3]_i_2_n_3 ;
  wire \xy_reg[3]_i_2_n_4 ;
  wire \xy_reg[3]_i_2_n_5 ;
  wire \xy_reg[3]_i_2_n_6 ;
  wire \xy_reg[3]_i_2_n_7 ;
  wire \xy_reg[3]_i_2_n_8 ;
  wire \xy_reg[3]_i_2_n_9 ;
  wire \xy_reg[3]_i_3_n_0 ;
  wire \xy_reg[3]_i_3_n_1 ;
  wire \xy_reg[3]_i_3_n_10 ;
  wire \xy_reg[3]_i_3_n_11 ;
  wire \xy_reg[3]_i_3_n_12 ;
  wire \xy_reg[3]_i_3_n_13 ;
  wire \xy_reg[3]_i_3_n_14 ;
  wire \xy_reg[3]_i_3_n_15 ;
  wire \xy_reg[3]_i_3_n_2 ;
  wire \xy_reg[3]_i_3_n_3 ;
  wire \xy_reg[3]_i_3_n_4 ;
  wire \xy_reg[3]_i_3_n_5 ;
  wire \xy_reg[3]_i_3_n_6 ;
  wire \xy_reg[3]_i_3_n_7 ;
  wire \xy_reg[3]_i_3_n_8 ;
  wire \xy_reg[3]_i_3_n_9 ;
  wire \xy_reg[47]_i_2_n_0 ;
  wire \xy_reg[47]_i_2_n_1 ;
  wire \xy_reg[47]_i_2_n_2 ;
  wire \xy_reg[47]_i_2_n_3 ;
  wire \xy_reg[47]_i_2_n_4 ;
  wire \xy_reg[47]_i_2_n_5 ;
  wire \xy_reg[47]_i_2_n_6 ;
  wire \xy_reg[47]_i_2_n_7 ;
  wire \xy_reg[53]_i_13_n_0 ;
  wire \xy_reg[53]_i_13_n_1 ;
  wire \xy_reg[53]_i_13_n_10 ;
  wire \xy_reg[53]_i_13_n_11 ;
  wire \xy_reg[53]_i_13_n_12 ;
  wire \xy_reg[53]_i_13_n_13 ;
  wire \xy_reg[53]_i_13_n_14 ;
  wire \xy_reg[53]_i_13_n_15 ;
  wire \xy_reg[53]_i_13_n_2 ;
  wire \xy_reg[53]_i_13_n_3 ;
  wire \xy_reg[53]_i_13_n_4 ;
  wire \xy_reg[53]_i_13_n_5 ;
  wire \xy_reg[53]_i_13_n_6 ;
  wire \xy_reg[53]_i_13_n_7 ;
  wire \xy_reg[53]_i_13_n_8 ;
  wire \xy_reg[53]_i_13_n_9 ;
  wire \xy_reg[53]_i_20_n_13 ;
  wire \xy_reg[53]_i_20_n_14 ;
  wire \xy_reg[53]_i_20_n_15 ;
  wire \xy_reg[53]_i_20_n_4 ;
  wire \xy_reg[53]_i_20_n_6 ;
  wire \xy_reg[53]_i_20_n_7 ;
  wire \xy_reg[53]_i_21_n_13 ;
  wire \xy_reg[53]_i_21_n_14 ;
  wire \xy_reg[53]_i_21_n_15 ;
  wire \xy_reg[53]_i_21_n_4 ;
  wire \xy_reg[53]_i_21_n_6 ;
  wire \xy_reg[53]_i_21_n_7 ;
  wire \xy_reg[53]_i_2_n_3 ;
  wire \xy_reg[53]_i_2_n_4 ;
  wire \xy_reg[53]_i_2_n_5 ;
  wire \xy_reg[53]_i_2_n_6 ;
  wire \xy_reg[53]_i_2_n_7 ;
  wire \xy_reg[53]_i_3_n_12 ;
  wire \xy_reg[53]_i_3_n_13 ;
  wire \xy_reg[53]_i_3_n_14 ;
  wire \xy_reg[53]_i_3_n_15 ;
  wire \xy_reg[53]_i_3_n_5 ;
  wire \xy_reg[53]_i_3_n_6 ;
  wire \xy_reg[53]_i_3_n_7 ;
  wire \xy_reg[57]_i_2_n_0 ;
  wire \xy_reg[57]_i_2_n_1 ;
  wire \xy_reg[57]_i_2_n_10 ;
  wire \xy_reg[57]_i_2_n_11 ;
  wire \xy_reg[57]_i_2_n_12 ;
  wire \xy_reg[57]_i_2_n_2 ;
  wire \xy_reg[57]_i_2_n_3 ;
  wire \xy_reg[57]_i_2_n_4 ;
  wire \xy_reg[57]_i_2_n_5 ;
  wire \xy_reg[57]_i_2_n_6 ;
  wire \xy_reg[57]_i_2_n_7 ;
  wire \xy_reg[57]_i_2_n_8 ;
  wire \xy_reg[57]_i_2_n_9 ;
  wire \xy_reg[57]_i_3_n_0 ;
  wire \xy_reg[57]_i_3_n_1 ;
  wire \xy_reg[57]_i_3_n_10 ;
  wire \xy_reg[57]_i_3_n_11 ;
  wire \xy_reg[57]_i_3_n_12 ;
  wire \xy_reg[57]_i_3_n_13 ;
  wire \xy_reg[57]_i_3_n_14 ;
  wire \xy_reg[57]_i_3_n_15 ;
  wire \xy_reg[57]_i_3_n_2 ;
  wire \xy_reg[57]_i_3_n_3 ;
  wire \xy_reg[57]_i_3_n_4 ;
  wire \xy_reg[57]_i_3_n_5 ;
  wire \xy_reg[57]_i_3_n_6 ;
  wire \xy_reg[57]_i_3_n_7 ;
  wire \xy_reg[57]_i_3_n_8 ;
  wire \xy_reg[57]_i_3_n_9 ;
  wire \xy_reg[65]_i_2_n_0 ;
  wire \xy_reg[65]_i_2_n_1 ;
  wire \xy_reg[65]_i_2_n_2 ;
  wire \xy_reg[65]_i_2_n_3 ;
  wire \xy_reg[65]_i_2_n_4 ;
  wire \xy_reg[65]_i_2_n_5 ;
  wire \xy_reg[65]_i_2_n_6 ;
  wire \xy_reg[65]_i_2_n_7 ;
  wire \xy_reg[71]_i_13_n_0 ;
  wire \xy_reg[71]_i_13_n_1 ;
  wire \xy_reg[71]_i_13_n_10 ;
  wire \xy_reg[71]_i_13_n_11 ;
  wire \xy_reg[71]_i_13_n_12 ;
  wire \xy_reg[71]_i_13_n_13 ;
  wire \xy_reg[71]_i_13_n_14 ;
  wire \xy_reg[71]_i_13_n_15 ;
  wire \xy_reg[71]_i_13_n_2 ;
  wire \xy_reg[71]_i_13_n_3 ;
  wire \xy_reg[71]_i_13_n_4 ;
  wire \xy_reg[71]_i_13_n_5 ;
  wire \xy_reg[71]_i_13_n_6 ;
  wire \xy_reg[71]_i_13_n_7 ;
  wire \xy_reg[71]_i_13_n_8 ;
  wire \xy_reg[71]_i_13_n_9 ;
  wire \xy_reg[71]_i_20_n_13 ;
  wire \xy_reg[71]_i_20_n_14 ;
  wire \xy_reg[71]_i_20_n_15 ;
  wire \xy_reg[71]_i_20_n_4 ;
  wire \xy_reg[71]_i_20_n_6 ;
  wire \xy_reg[71]_i_20_n_7 ;
  wire \xy_reg[71]_i_21_n_13 ;
  wire \xy_reg[71]_i_21_n_14 ;
  wire \xy_reg[71]_i_21_n_15 ;
  wire \xy_reg[71]_i_21_n_4 ;
  wire \xy_reg[71]_i_21_n_6 ;
  wire \xy_reg[71]_i_21_n_7 ;
  wire \xy_reg[71]_i_2_n_3 ;
  wire \xy_reg[71]_i_2_n_4 ;
  wire \xy_reg[71]_i_2_n_5 ;
  wire \xy_reg[71]_i_2_n_6 ;
  wire \xy_reg[71]_i_2_n_7 ;
  wire \xy_reg[71]_i_3_n_12 ;
  wire \xy_reg[71]_i_3_n_13 ;
  wire \xy_reg[71]_i_3_n_14 ;
  wire \xy_reg[71]_i_3_n_15 ;
  wire \xy_reg[71]_i_3_n_5 ;
  wire \xy_reg[71]_i_3_n_6 ;
  wire \xy_reg[71]_i_3_n_7 ;
  wire \xy_reg[75]_i_2_n_0 ;
  wire \xy_reg[75]_i_2_n_1 ;
  wire \xy_reg[75]_i_2_n_10 ;
  wire \xy_reg[75]_i_2_n_11 ;
  wire \xy_reg[75]_i_2_n_12 ;
  wire \xy_reg[75]_i_2_n_2 ;
  wire \xy_reg[75]_i_2_n_3 ;
  wire \xy_reg[75]_i_2_n_4 ;
  wire \xy_reg[75]_i_2_n_5 ;
  wire \xy_reg[75]_i_2_n_6 ;
  wire \xy_reg[75]_i_2_n_7 ;
  wire \xy_reg[75]_i_2_n_8 ;
  wire \xy_reg[75]_i_2_n_9 ;
  wire \xy_reg[75]_i_3_n_0 ;
  wire \xy_reg[75]_i_3_n_1 ;
  wire \xy_reg[75]_i_3_n_10 ;
  wire \xy_reg[75]_i_3_n_11 ;
  wire \xy_reg[75]_i_3_n_12 ;
  wire \xy_reg[75]_i_3_n_13 ;
  wire \xy_reg[75]_i_3_n_14 ;
  wire \xy_reg[75]_i_3_n_15 ;
  wire \xy_reg[75]_i_3_n_2 ;
  wire \xy_reg[75]_i_3_n_3 ;
  wire \xy_reg[75]_i_3_n_4 ;
  wire \xy_reg[75]_i_3_n_5 ;
  wire \xy_reg[75]_i_3_n_6 ;
  wire \xy_reg[75]_i_3_n_7 ;
  wire \xy_reg[75]_i_3_n_8 ;
  wire \xy_reg[75]_i_3_n_9 ;
  wire \xy_reg[83]_i_2_n_0 ;
  wire \xy_reg[83]_i_2_n_1 ;
  wire \xy_reg[83]_i_2_n_2 ;
  wire \xy_reg[83]_i_2_n_3 ;
  wire \xy_reg[83]_i_2_n_4 ;
  wire \xy_reg[83]_i_2_n_5 ;
  wire \xy_reg[83]_i_2_n_6 ;
  wire \xy_reg[83]_i_2_n_7 ;
  wire \xy_reg[89]_i_13_n_0 ;
  wire \xy_reg[89]_i_13_n_1 ;
  wire \xy_reg[89]_i_13_n_10 ;
  wire \xy_reg[89]_i_13_n_11 ;
  wire \xy_reg[89]_i_13_n_12 ;
  wire \xy_reg[89]_i_13_n_13 ;
  wire \xy_reg[89]_i_13_n_14 ;
  wire \xy_reg[89]_i_13_n_15 ;
  wire \xy_reg[89]_i_13_n_2 ;
  wire \xy_reg[89]_i_13_n_3 ;
  wire \xy_reg[89]_i_13_n_4 ;
  wire \xy_reg[89]_i_13_n_5 ;
  wire \xy_reg[89]_i_13_n_6 ;
  wire \xy_reg[89]_i_13_n_7 ;
  wire \xy_reg[89]_i_13_n_8 ;
  wire \xy_reg[89]_i_13_n_9 ;
  wire \xy_reg[89]_i_20_n_13 ;
  wire \xy_reg[89]_i_20_n_14 ;
  wire \xy_reg[89]_i_20_n_15 ;
  wire \xy_reg[89]_i_20_n_4 ;
  wire \xy_reg[89]_i_20_n_6 ;
  wire \xy_reg[89]_i_20_n_7 ;
  wire \xy_reg[89]_i_21_n_13 ;
  wire \xy_reg[89]_i_21_n_14 ;
  wire \xy_reg[89]_i_21_n_15 ;
  wire \xy_reg[89]_i_21_n_4 ;
  wire \xy_reg[89]_i_21_n_6 ;
  wire \xy_reg[89]_i_21_n_7 ;
  wire \xy_reg[89]_i_2_n_3 ;
  wire \xy_reg[89]_i_2_n_4 ;
  wire \xy_reg[89]_i_2_n_5 ;
  wire \xy_reg[89]_i_2_n_6 ;
  wire \xy_reg[89]_i_2_n_7 ;
  wire \xy_reg[89]_i_3_n_12 ;
  wire \xy_reg[89]_i_3_n_13 ;
  wire \xy_reg[89]_i_3_n_14 ;
  wire \xy_reg[89]_i_3_n_15 ;
  wire \xy_reg[89]_i_3_n_5 ;
  wire \xy_reg[89]_i_3_n_6 ;
  wire \xy_reg[89]_i_3_n_7 ;
  wire [89:0]ysqr;
  wire [17:2]ysqr0;
  wire [17:2]ysqr00_in;
  wire [17:2]ysqr01_in;
  wire [17:2]ysqr02_in;
  wire [17:2]ysqr03_in;
  wire [17:0]ysqr4p1;
  wire \ysqr4p1[0]_i_1_n_0 ;
  wire \ysqr4p1[10]_i_1_n_0 ;
  wire \ysqr4p1[11]_i_1_n_0 ;
  wire \ysqr4p1[12]_i_1_n_0 ;
  wire \ysqr4p1[13]_i_1_n_0 ;
  wire \ysqr4p1[14]_i_1_n_0 ;
  wire \ysqr4p1[15]_i_1_n_0 ;
  wire \ysqr4p1[16]_i_1_n_0 ;
  wire \ysqr4p1[17]_i_1_n_0 ;
  wire \ysqr4p1[2]_i_1_n_0 ;
  wire \ysqr4p1[3]_i_1_n_0 ;
  wire \ysqr4p1[4]_i_1_n_0 ;
  wire \ysqr4p1[5]_i_1_n_0 ;
  wire \ysqr4p1[6]_i_1_n_0 ;
  wire \ysqr4p1[7]_i_1_n_0 ;
  wire \ysqr4p1[8]_i_1_n_0 ;
  wire \ysqr4p1[9]_i_1_n_0 ;
  wire [17:0]ysqr4p2;
  wire \ysqr4p2[0]_i_1_n_0 ;
  wire \ysqr4p2[10]_i_1_n_0 ;
  wire \ysqr4p2[11]_i_1_n_0 ;
  wire \ysqr4p2[12]_i_1_n_0 ;
  wire \ysqr4p2[13]_i_1_n_0 ;
  wire \ysqr4p2[14]_i_1_n_0 ;
  wire \ysqr4p2[15]_i_1_n_0 ;
  wire \ysqr4p2[16]_i_1_n_0 ;
  wire \ysqr4p2[17]_i_1_n_0 ;
  wire \ysqr4p2[2]_i_1_n_0 ;
  wire \ysqr4p2[3]_i_1_n_0 ;
  wire \ysqr4p2[4]_i_1_n_0 ;
  wire \ysqr4p2[5]_i_1_n_0 ;
  wire \ysqr4p2[6]_i_1_n_0 ;
  wire \ysqr4p2[7]_i_1_n_0 ;
  wire \ysqr4p2[8]_i_1_n_0 ;
  wire \ysqr4p2[9]_i_1_n_0 ;
  wire \ysqr[0]_i_1_n_0 ;
  wire \ysqr[10]_i_1_n_0 ;
  wire \ysqr[11]_i_10_n_0 ;
  wire \ysqr[11]_i_11_n_0 ;
  wire \ysqr[11]_i_12_n_0 ;
  wire \ysqr[11]_i_13_n_0 ;
  wire \ysqr[11]_i_14_n_0 ;
  wire \ysqr[11]_i_15_n_0 ;
  wire \ysqr[11]_i_16_n_0 ;
  wire \ysqr[11]_i_17_n_0 ;
  wire \ysqr[11]_i_18_n_0 ;
  wire \ysqr[11]_i_19_n_0 ;
  wire \ysqr[11]_i_1_n_0 ;
  wire \ysqr[11]_i_3_n_0 ;
  wire \ysqr[11]_i_4_n_0 ;
  wire \ysqr[11]_i_5_n_0 ;
  wire \ysqr[11]_i_6_n_0 ;
  wire \ysqr[11]_i_7_n_0 ;
  wire \ysqr[11]_i_8_n_0 ;
  wire \ysqr[11]_i_9_n_0 ;
  wire \ysqr[12]_i_1_n_0 ;
  wire \ysqr[13]_i_1_n_0 ;
  wire \ysqr[14]_i_1_n_0 ;
  wire \ysqr[15]_i_1_n_0 ;
  wire \ysqr[16]_i_1_n_0 ;
  wire \ysqr[17]_i_10_n_0 ;
  wire \ysqr[17]_i_11_n_0 ;
  wire \ysqr[17]_i_12_n_0 ;
  wire \ysqr[17]_i_14_n_0 ;
  wire \ysqr[17]_i_15_n_0 ;
  wire \ysqr[17]_i_16_n_0 ;
  wire \ysqr[17]_i_19_n_0 ;
  wire \ysqr[17]_i_1_n_0 ;
  wire \ysqr[17]_i_20_n_0 ;
  wire \ysqr[17]_i_21_n_0 ;
  wire \ysqr[17]_i_22_n_0 ;
  wire \ysqr[17]_i_23_n_0 ;
  wire \ysqr[17]_i_24_n_0 ;
  wire \ysqr[17]_i_25_n_0 ;
  wire \ysqr[17]_i_26_n_0 ;
  wire \ysqr[17]_i_27_n_0 ;
  wire \ysqr[17]_i_28_n_0 ;
  wire \ysqr[17]_i_29_n_0 ;
  wire \ysqr[17]_i_30_n_0 ;
  wire \ysqr[17]_i_31_n_0 ;
  wire \ysqr[17]_i_32_n_0 ;
  wire \ysqr[17]_i_33_n_0 ;
  wire \ysqr[17]_i_34_n_0 ;
  wire \ysqr[17]_i_35_n_0 ;
  wire \ysqr[17]_i_36_n_0 ;
  wire \ysqr[17]_i_37_n_0 ;
  wire \ysqr[17]_i_38_n_0 ;
  wire \ysqr[17]_i_39_n_0 ;
  wire \ysqr[17]_i_40_n_0 ;
  wire \ysqr[17]_i_41_n_0 ;
  wire \ysqr[17]_i_42_n_0 ;
  wire \ysqr[17]_i_43_n_0 ;
  wire \ysqr[17]_i_44_n_0 ;
  wire \ysqr[17]_i_45_n_0 ;
  wire \ysqr[17]_i_4_n_0 ;
  wire \ysqr[17]_i_5_n_0 ;
  wire \ysqr[17]_i_6_n_0 ;
  wire \ysqr[17]_i_7_n_0 ;
  wire \ysqr[17]_i_8_n_0 ;
  wire \ysqr[17]_i_9_n_0 ;
  wire \ysqr[18]_i_1_n_0 ;
  wire \ysqr[20]_i_1_n_0 ;
  wire \ysqr[21]_i_10_n_0 ;
  wire \ysqr[21]_i_11_n_0 ;
  wire \ysqr[21]_i_12_n_0 ;
  wire \ysqr[21]_i_13_n_0 ;
  wire \ysqr[21]_i_14_n_0 ;
  wire \ysqr[21]_i_15_n_0 ;
  wire \ysqr[21]_i_16_n_0 ;
  wire \ysqr[21]_i_17_n_0 ;
  wire \ysqr[21]_i_18_n_0 ;
  wire \ysqr[21]_i_19_n_0 ;
  wire \ysqr[21]_i_1_n_0 ;
  wire \ysqr[21]_i_20_n_0 ;
  wire \ysqr[21]_i_21_n_0 ;
  wire \ysqr[21]_i_22_n_0 ;
  wire \ysqr[21]_i_23_n_0 ;
  wire \ysqr[21]_i_24_n_0 ;
  wire \ysqr[21]_i_25_n_0 ;
  wire \ysqr[21]_i_26_n_0 ;
  wire \ysqr[21]_i_27_n_0 ;
  wire \ysqr[21]_i_28_n_0 ;
  wire \ysqr[21]_i_29_n_0 ;
  wire \ysqr[21]_i_30_n_0 ;
  wire \ysqr[21]_i_31_n_0 ;
  wire \ysqr[21]_i_32_n_0 ;
  wire \ysqr[21]_i_33_n_0 ;
  wire \ysqr[21]_i_4_n_0 ;
  wire \ysqr[21]_i_5_n_0 ;
  wire \ysqr[21]_i_6_n_0 ;
  wire \ysqr[21]_i_7_n_0 ;
  wire \ysqr[21]_i_8_n_0 ;
  wire \ysqr[21]_i_9_n_0 ;
  wire \ysqr[22]_i_1_n_0 ;
  wire \ysqr[23]_i_1_n_0 ;
  wire \ysqr[24]_i_1_n_0 ;
  wire \ysqr[25]_i_1_n_0 ;
  wire \ysqr[26]_i_1_n_0 ;
  wire \ysqr[27]_i_1_n_0 ;
  wire \ysqr[28]_i_1_n_0 ;
  wire \ysqr[29]_i_10_n_0 ;
  wire \ysqr[29]_i_11_n_0 ;
  wire \ysqr[29]_i_12_n_0 ;
  wire \ysqr[29]_i_13_n_0 ;
  wire \ysqr[29]_i_14_n_0 ;
  wire \ysqr[29]_i_15_n_0 ;
  wire \ysqr[29]_i_16_n_0 ;
  wire \ysqr[29]_i_17_n_0 ;
  wire \ysqr[29]_i_18_n_0 ;
  wire \ysqr[29]_i_19_n_0 ;
  wire \ysqr[29]_i_1_n_0 ;
  wire \ysqr[29]_i_3_n_0 ;
  wire \ysqr[29]_i_4_n_0 ;
  wire \ysqr[29]_i_5_n_0 ;
  wire \ysqr[29]_i_6_n_0 ;
  wire \ysqr[29]_i_7_n_0 ;
  wire \ysqr[29]_i_8_n_0 ;
  wire \ysqr[29]_i_9_n_0 ;
  wire \ysqr[2]_i_1_n_0 ;
  wire \ysqr[30]_i_1_n_0 ;
  wire \ysqr[31]_i_1_n_0 ;
  wire \ysqr[32]_i_1_n_0 ;
  wire \ysqr[33]_i_1_n_0 ;
  wire \ysqr[34]_i_1_n_0 ;
  wire \ysqr[35]_i_10_n_0 ;
  wire \ysqr[35]_i_11_n_0 ;
  wire \ysqr[35]_i_12_n_0 ;
  wire \ysqr[35]_i_14_n_0 ;
  wire \ysqr[35]_i_15_n_0 ;
  wire \ysqr[35]_i_16_n_0 ;
  wire \ysqr[35]_i_19_n_0 ;
  wire \ysqr[35]_i_1_n_0 ;
  wire \ysqr[35]_i_20_n_0 ;
  wire \ysqr[35]_i_21_n_0 ;
  wire \ysqr[35]_i_22_n_0 ;
  wire \ysqr[35]_i_23_n_0 ;
  wire \ysqr[35]_i_24_n_0 ;
  wire \ysqr[35]_i_25_n_0 ;
  wire \ysqr[35]_i_26_n_0 ;
  wire \ysqr[35]_i_27_n_0 ;
  wire \ysqr[35]_i_28_n_0 ;
  wire \ysqr[35]_i_29_n_0 ;
  wire \ysqr[35]_i_30_n_0 ;
  wire \ysqr[35]_i_31_n_0 ;
  wire \ysqr[35]_i_32_n_0 ;
  wire \ysqr[35]_i_33_n_0 ;
  wire \ysqr[35]_i_34_n_0 ;
  wire \ysqr[35]_i_35_n_0 ;
  wire \ysqr[35]_i_36_n_0 ;
  wire \ysqr[35]_i_37_n_0 ;
  wire \ysqr[35]_i_38_n_0 ;
  wire \ysqr[35]_i_39_n_0 ;
  wire \ysqr[35]_i_40_n_0 ;
  wire \ysqr[35]_i_41_n_0 ;
  wire \ysqr[35]_i_42_n_0 ;
  wire \ysqr[35]_i_43_n_0 ;
  wire \ysqr[35]_i_44_n_0 ;
  wire \ysqr[35]_i_45_n_0 ;
  wire \ysqr[35]_i_4_n_0 ;
  wire \ysqr[35]_i_5_n_0 ;
  wire \ysqr[35]_i_6_n_0 ;
  wire \ysqr[35]_i_7_n_0 ;
  wire \ysqr[35]_i_8_n_0 ;
  wire \ysqr[35]_i_9_n_0 ;
  wire \ysqr[36]_i_1_n_0 ;
  wire \ysqr[38]_i_1_n_0 ;
  wire \ysqr[39]_i_10_n_0 ;
  wire \ysqr[39]_i_11_n_0 ;
  wire \ysqr[39]_i_12_n_0 ;
  wire \ysqr[39]_i_13_n_0 ;
  wire \ysqr[39]_i_14_n_0 ;
  wire \ysqr[39]_i_15_n_0 ;
  wire \ysqr[39]_i_16_n_0 ;
  wire \ysqr[39]_i_17_n_0 ;
  wire \ysqr[39]_i_18_n_0 ;
  wire \ysqr[39]_i_19_n_0 ;
  wire \ysqr[39]_i_1_n_0 ;
  wire \ysqr[39]_i_20_n_0 ;
  wire \ysqr[39]_i_21_n_0 ;
  wire \ysqr[39]_i_22_n_0 ;
  wire \ysqr[39]_i_23_n_0 ;
  wire \ysqr[39]_i_24_n_0 ;
  wire \ysqr[39]_i_25_n_0 ;
  wire \ysqr[39]_i_26_n_0 ;
  wire \ysqr[39]_i_27_n_0 ;
  wire \ysqr[39]_i_28_n_0 ;
  wire \ysqr[39]_i_29_n_0 ;
  wire \ysqr[39]_i_30_n_0 ;
  wire \ysqr[39]_i_31_n_0 ;
  wire \ysqr[39]_i_32_n_0 ;
  wire \ysqr[39]_i_33_n_0 ;
  wire \ysqr[39]_i_4_n_0 ;
  wire \ysqr[39]_i_5_n_0 ;
  wire \ysqr[39]_i_6_n_0 ;
  wire \ysqr[39]_i_7_n_0 ;
  wire \ysqr[39]_i_8_n_0 ;
  wire \ysqr[39]_i_9_n_0 ;
  wire \ysqr[3]_i_10_n_0 ;
  wire \ysqr[3]_i_11_n_0 ;
  wire \ysqr[3]_i_12_n_0 ;
  wire \ysqr[3]_i_13_n_0 ;
  wire \ysqr[3]_i_14_n_0 ;
  wire \ysqr[3]_i_15_n_0 ;
  wire \ysqr[3]_i_16_n_0 ;
  wire \ysqr[3]_i_17_n_0 ;
  wire \ysqr[3]_i_18_n_0 ;
  wire \ysqr[3]_i_19_n_0 ;
  wire \ysqr[3]_i_1_n_0 ;
  wire \ysqr[3]_i_20_n_0 ;
  wire \ysqr[3]_i_21_n_0 ;
  wire \ysqr[3]_i_22_n_0 ;
  wire \ysqr[3]_i_23_n_0 ;
  wire \ysqr[3]_i_24_n_0 ;
  wire \ysqr[3]_i_25_n_0 ;
  wire \ysqr[3]_i_26_n_0 ;
  wire \ysqr[3]_i_27_n_0 ;
  wire \ysqr[3]_i_28_n_0 ;
  wire \ysqr[3]_i_29_n_0 ;
  wire \ysqr[3]_i_30_n_0 ;
  wire \ysqr[3]_i_31_n_0 ;
  wire \ysqr[3]_i_32_n_0 ;
  wire \ysqr[3]_i_33_n_0 ;
  wire \ysqr[3]_i_4_n_0 ;
  wire \ysqr[3]_i_5_n_0 ;
  wire \ysqr[3]_i_6_n_0 ;
  wire \ysqr[3]_i_7_n_0 ;
  wire \ysqr[3]_i_8_n_0 ;
  wire \ysqr[3]_i_9_n_0 ;
  wire \ysqr[40]_i_1_n_0 ;
  wire \ysqr[41]_i_1_n_0 ;
  wire \ysqr[42]_i_1_n_0 ;
  wire \ysqr[43]_i_1_n_0 ;
  wire \ysqr[44]_i_1_n_0 ;
  wire \ysqr[45]_i_1_n_0 ;
  wire \ysqr[46]_i_1_n_0 ;
  wire \ysqr[47]_i_10_n_0 ;
  wire \ysqr[47]_i_11_n_0 ;
  wire \ysqr[47]_i_12_n_0 ;
  wire \ysqr[47]_i_13_n_0 ;
  wire \ysqr[47]_i_14_n_0 ;
  wire \ysqr[47]_i_15_n_0 ;
  wire \ysqr[47]_i_16_n_0 ;
  wire \ysqr[47]_i_17_n_0 ;
  wire \ysqr[47]_i_18_n_0 ;
  wire \ysqr[47]_i_19_n_0 ;
  wire \ysqr[47]_i_1_n_0 ;
  wire \ysqr[47]_i_3_n_0 ;
  wire \ysqr[47]_i_4_n_0 ;
  wire \ysqr[47]_i_5_n_0 ;
  wire \ysqr[47]_i_6_n_0 ;
  wire \ysqr[47]_i_7_n_0 ;
  wire \ysqr[47]_i_8_n_0 ;
  wire \ysqr[47]_i_9_n_0 ;
  wire \ysqr[48]_i_1_n_0 ;
  wire \ysqr[49]_i_1_n_0 ;
  wire \ysqr[4]_i_1_n_0 ;
  wire \ysqr[50]_i_1_n_0 ;
  wire \ysqr[51]_i_1_n_0 ;
  wire \ysqr[52]_i_1_n_0 ;
  wire \ysqr[53]_i_10_n_0 ;
  wire \ysqr[53]_i_11_n_0 ;
  wire \ysqr[53]_i_12_n_0 ;
  wire \ysqr[53]_i_14_n_0 ;
  wire \ysqr[53]_i_15_n_0 ;
  wire \ysqr[53]_i_16_n_0 ;
  wire \ysqr[53]_i_19_n_0 ;
  wire \ysqr[53]_i_1_n_0 ;
  wire \ysqr[53]_i_20_n_0 ;
  wire \ysqr[53]_i_21_n_0 ;
  wire \ysqr[53]_i_22_n_0 ;
  wire \ysqr[53]_i_23_n_0 ;
  wire \ysqr[53]_i_24_n_0 ;
  wire \ysqr[53]_i_25_n_0 ;
  wire \ysqr[53]_i_26_n_0 ;
  wire \ysqr[53]_i_27_n_0 ;
  wire \ysqr[53]_i_28_n_0 ;
  wire \ysqr[53]_i_29_n_0 ;
  wire \ysqr[53]_i_30_n_0 ;
  wire \ysqr[53]_i_31_n_0 ;
  wire \ysqr[53]_i_32_n_0 ;
  wire \ysqr[53]_i_33_n_0 ;
  wire \ysqr[53]_i_34_n_0 ;
  wire \ysqr[53]_i_35_n_0 ;
  wire \ysqr[53]_i_36_n_0 ;
  wire \ysqr[53]_i_37_n_0 ;
  wire \ysqr[53]_i_38_n_0 ;
  wire \ysqr[53]_i_39_n_0 ;
  wire \ysqr[53]_i_40_n_0 ;
  wire \ysqr[53]_i_41_n_0 ;
  wire \ysqr[53]_i_42_n_0 ;
  wire \ysqr[53]_i_43_n_0 ;
  wire \ysqr[53]_i_44_n_0 ;
  wire \ysqr[53]_i_45_n_0 ;
  wire \ysqr[53]_i_4_n_0 ;
  wire \ysqr[53]_i_5_n_0 ;
  wire \ysqr[53]_i_6_n_0 ;
  wire \ysqr[53]_i_7_n_0 ;
  wire \ysqr[53]_i_8_n_0 ;
  wire \ysqr[53]_i_9_n_0 ;
  wire \ysqr[54]_i_1_n_0 ;
  wire \ysqr[56]_i_1_n_0 ;
  wire \ysqr[57]_i_10_n_0 ;
  wire \ysqr[57]_i_11_n_0 ;
  wire \ysqr[57]_i_12_n_0 ;
  wire \ysqr[57]_i_13_n_0 ;
  wire \ysqr[57]_i_14_n_0 ;
  wire \ysqr[57]_i_15_n_0 ;
  wire \ysqr[57]_i_16_n_0 ;
  wire \ysqr[57]_i_17_n_0 ;
  wire \ysqr[57]_i_18_n_0 ;
  wire \ysqr[57]_i_19_n_0 ;
  wire \ysqr[57]_i_1_n_0 ;
  wire \ysqr[57]_i_20_n_0 ;
  wire \ysqr[57]_i_21_n_0 ;
  wire \ysqr[57]_i_22_n_0 ;
  wire \ysqr[57]_i_23_n_0 ;
  wire \ysqr[57]_i_24_n_0 ;
  wire \ysqr[57]_i_25_n_0 ;
  wire \ysqr[57]_i_26_n_0 ;
  wire \ysqr[57]_i_27_n_0 ;
  wire \ysqr[57]_i_28_n_0 ;
  wire \ysqr[57]_i_29_n_0 ;
  wire \ysqr[57]_i_30_n_0 ;
  wire \ysqr[57]_i_31_n_0 ;
  wire \ysqr[57]_i_32_n_0 ;
  wire \ysqr[57]_i_33_n_0 ;
  wire \ysqr[57]_i_4_n_0 ;
  wire \ysqr[57]_i_5_n_0 ;
  wire \ysqr[57]_i_6_n_0 ;
  wire \ysqr[57]_i_7_n_0 ;
  wire \ysqr[57]_i_8_n_0 ;
  wire \ysqr[57]_i_9_n_0 ;
  wire \ysqr[58]_i_1_n_0 ;
  wire \ysqr[59]_i_1_n_0 ;
  wire \ysqr[5]_i_1_n_0 ;
  wire \ysqr[60]_i_1_n_0 ;
  wire \ysqr[61]_i_1_n_0 ;
  wire \ysqr[62]_i_1_n_0 ;
  wire \ysqr[63]_i_1_n_0 ;
  wire \ysqr[64]_i_1_n_0 ;
  wire \ysqr[65]_i_10_n_0 ;
  wire \ysqr[65]_i_11_n_0 ;
  wire \ysqr[65]_i_12_n_0 ;
  wire \ysqr[65]_i_13_n_0 ;
  wire \ysqr[65]_i_14_n_0 ;
  wire \ysqr[65]_i_15_n_0 ;
  wire \ysqr[65]_i_16_n_0 ;
  wire \ysqr[65]_i_17_n_0 ;
  wire \ysqr[65]_i_18_n_0 ;
  wire \ysqr[65]_i_19_n_0 ;
  wire \ysqr[65]_i_1_n_0 ;
  wire \ysqr[65]_i_3_n_0 ;
  wire \ysqr[65]_i_4_n_0 ;
  wire \ysqr[65]_i_5_n_0 ;
  wire \ysqr[65]_i_6_n_0 ;
  wire \ysqr[65]_i_7_n_0 ;
  wire \ysqr[65]_i_8_n_0 ;
  wire \ysqr[65]_i_9_n_0 ;
  wire \ysqr[66]_i_1_n_0 ;
  wire \ysqr[67]_i_1_n_0 ;
  wire \ysqr[68]_i_1_n_0 ;
  wire \ysqr[69]_i_1_n_0 ;
  wire \ysqr[6]_i_1_n_0 ;
  wire \ysqr[70]_i_1_n_0 ;
  wire \ysqr[71]_i_10_n_0 ;
  wire \ysqr[71]_i_11_n_0 ;
  wire \ysqr[71]_i_12_n_0 ;
  wire \ysqr[71]_i_14_n_0 ;
  wire \ysqr[71]_i_15_n_0 ;
  wire \ysqr[71]_i_16_n_0 ;
  wire \ysqr[71]_i_19_n_0 ;
  wire \ysqr[71]_i_1_n_0 ;
  wire \ysqr[71]_i_20_n_0 ;
  wire \ysqr[71]_i_21_n_0 ;
  wire \ysqr[71]_i_22_n_0 ;
  wire \ysqr[71]_i_23_n_0 ;
  wire \ysqr[71]_i_24_n_0 ;
  wire \ysqr[71]_i_25_n_0 ;
  wire \ysqr[71]_i_26_n_0 ;
  wire \ysqr[71]_i_27_n_0 ;
  wire \ysqr[71]_i_28_n_0 ;
  wire \ysqr[71]_i_29_n_0 ;
  wire \ysqr[71]_i_30_n_0 ;
  wire \ysqr[71]_i_31_n_0 ;
  wire \ysqr[71]_i_32_n_0 ;
  wire \ysqr[71]_i_33_n_0 ;
  wire \ysqr[71]_i_34_n_0 ;
  wire \ysqr[71]_i_35_n_0 ;
  wire \ysqr[71]_i_36_n_0 ;
  wire \ysqr[71]_i_37_n_0 ;
  wire \ysqr[71]_i_38_n_0 ;
  wire \ysqr[71]_i_39_n_0 ;
  wire \ysqr[71]_i_40_n_0 ;
  wire \ysqr[71]_i_41_n_0 ;
  wire \ysqr[71]_i_42_n_0 ;
  wire \ysqr[71]_i_43_n_0 ;
  wire \ysqr[71]_i_44_n_0 ;
  wire \ysqr[71]_i_45_n_0 ;
  wire \ysqr[71]_i_4_n_0 ;
  wire \ysqr[71]_i_5_n_0 ;
  wire \ysqr[71]_i_6_n_0 ;
  wire \ysqr[71]_i_7_n_0 ;
  wire \ysqr[71]_i_8_n_0 ;
  wire \ysqr[71]_i_9_n_0 ;
  wire \ysqr[72]_i_1_n_0 ;
  wire \ysqr[74]_i_1_n_0 ;
  wire \ysqr[75]_i_10_n_0 ;
  wire \ysqr[75]_i_11_n_0 ;
  wire \ysqr[75]_i_12_n_0 ;
  wire \ysqr[75]_i_13_n_0 ;
  wire \ysqr[75]_i_14_n_0 ;
  wire \ysqr[75]_i_15_n_0 ;
  wire \ysqr[75]_i_16_n_0 ;
  wire \ysqr[75]_i_17_n_0 ;
  wire \ysqr[75]_i_18_n_0 ;
  wire \ysqr[75]_i_19_n_0 ;
  wire \ysqr[75]_i_1_n_0 ;
  wire \ysqr[75]_i_20_n_0 ;
  wire \ysqr[75]_i_21_n_0 ;
  wire \ysqr[75]_i_22_n_0 ;
  wire \ysqr[75]_i_23_n_0 ;
  wire \ysqr[75]_i_24_n_0 ;
  wire \ysqr[75]_i_25_n_0 ;
  wire \ysqr[75]_i_26_n_0 ;
  wire \ysqr[75]_i_27_n_0 ;
  wire \ysqr[75]_i_28_n_0 ;
  wire \ysqr[75]_i_29_n_0 ;
  wire \ysqr[75]_i_30_n_0 ;
  wire \ysqr[75]_i_31_n_0 ;
  wire \ysqr[75]_i_32_n_0 ;
  wire \ysqr[75]_i_33_n_0 ;
  wire \ysqr[75]_i_4_n_0 ;
  wire \ysqr[75]_i_5_n_0 ;
  wire \ysqr[75]_i_6_n_0 ;
  wire \ysqr[75]_i_7_n_0 ;
  wire \ysqr[75]_i_8_n_0 ;
  wire \ysqr[75]_i_9_n_0 ;
  wire \ysqr[76]_i_1_n_0 ;
  wire \ysqr[77]_i_1_n_0 ;
  wire \ysqr[78]_i_1_n_0 ;
  wire \ysqr[79]_i_1_n_0 ;
  wire \ysqr[7]_i_1_n_0 ;
  wire \ysqr[80]_i_1_n_0 ;
  wire \ysqr[81]_i_1_n_0 ;
  wire \ysqr[82]_i_1_n_0 ;
  wire \ysqr[83]_i_10_n_0 ;
  wire \ysqr[83]_i_11_n_0 ;
  wire \ysqr[83]_i_12_n_0 ;
  wire \ysqr[83]_i_13_n_0 ;
  wire \ysqr[83]_i_14_n_0 ;
  wire \ysqr[83]_i_15_n_0 ;
  wire \ysqr[83]_i_16_n_0 ;
  wire \ysqr[83]_i_17_n_0 ;
  wire \ysqr[83]_i_18_n_0 ;
  wire \ysqr[83]_i_19_n_0 ;
  wire \ysqr[83]_i_1_n_0 ;
  wire \ysqr[83]_i_3_n_0 ;
  wire \ysqr[83]_i_4_n_0 ;
  wire \ysqr[83]_i_5_n_0 ;
  wire \ysqr[83]_i_6_n_0 ;
  wire \ysqr[83]_i_7_n_0 ;
  wire \ysqr[83]_i_8_n_0 ;
  wire \ysqr[83]_i_9_n_0 ;
  wire \ysqr[84]_i_1_n_0 ;
  wire \ysqr[85]_i_1_n_0 ;
  wire \ysqr[86]_i_1_n_0 ;
  wire \ysqr[87]_i_1_n_0 ;
  wire \ysqr[88]_i_1_n_0 ;
  wire \ysqr[89]_i_10_n_0 ;
  wire \ysqr[89]_i_11_n_0 ;
  wire \ysqr[89]_i_12_n_0 ;
  wire \ysqr[89]_i_14_n_0 ;
  wire \ysqr[89]_i_15_n_0 ;
  wire \ysqr[89]_i_16_n_0 ;
  wire \ysqr[89]_i_19_n_0 ;
  wire \ysqr[89]_i_1_n_0 ;
  wire \ysqr[89]_i_20_n_0 ;
  wire \ysqr[89]_i_21_n_0 ;
  wire \ysqr[89]_i_22_n_0 ;
  wire \ysqr[89]_i_23_n_0 ;
  wire \ysqr[89]_i_24_n_0 ;
  wire \ysqr[89]_i_25_n_0 ;
  wire \ysqr[89]_i_26_n_0 ;
  wire \ysqr[89]_i_27_n_0 ;
  wire \ysqr[89]_i_28_n_0 ;
  wire \ysqr[89]_i_29_n_0 ;
  wire \ysqr[89]_i_30_n_0 ;
  wire \ysqr[89]_i_31_n_0 ;
  wire \ysqr[89]_i_32_n_0 ;
  wire \ysqr[89]_i_33_n_0 ;
  wire \ysqr[89]_i_34_n_0 ;
  wire \ysqr[89]_i_35_n_0 ;
  wire \ysqr[89]_i_36_n_0 ;
  wire \ysqr[89]_i_37_n_0 ;
  wire \ysqr[89]_i_38_n_0 ;
  wire \ysqr[89]_i_39_n_0 ;
  wire \ysqr[89]_i_40_n_0 ;
  wire \ysqr[89]_i_41_n_0 ;
  wire \ysqr[89]_i_42_n_0 ;
  wire \ysqr[89]_i_43_n_0 ;
  wire \ysqr[89]_i_44_n_0 ;
  wire \ysqr[89]_i_45_n_0 ;
  wire \ysqr[89]_i_4_n_0 ;
  wire \ysqr[89]_i_5_n_0 ;
  wire \ysqr[89]_i_6_n_0 ;
  wire \ysqr[89]_i_7_n_0 ;
  wire \ysqr[89]_i_8_n_0 ;
  wire \ysqr[89]_i_9_n_0 ;
  wire \ysqr[8]_i_1_n_0 ;
  wire \ysqr[9]_i_1_n_0 ;
  wire \ysqr_reg[11]_i_2_n_0 ;
  wire \ysqr_reg[11]_i_2_n_1 ;
  wire \ysqr_reg[11]_i_2_n_2 ;
  wire \ysqr_reg[11]_i_2_n_3 ;
  wire \ysqr_reg[11]_i_2_n_4 ;
  wire \ysqr_reg[11]_i_2_n_5 ;
  wire \ysqr_reg[11]_i_2_n_6 ;
  wire \ysqr_reg[11]_i_2_n_7 ;
  wire \ysqr_reg[17]_i_13_n_0 ;
  wire \ysqr_reg[17]_i_13_n_1 ;
  wire \ysqr_reg[17]_i_13_n_10 ;
  wire \ysqr_reg[17]_i_13_n_11 ;
  wire \ysqr_reg[17]_i_13_n_12 ;
  wire \ysqr_reg[17]_i_13_n_13 ;
  wire \ysqr_reg[17]_i_13_n_14 ;
  wire \ysqr_reg[17]_i_13_n_15 ;
  wire \ysqr_reg[17]_i_13_n_2 ;
  wire \ysqr_reg[17]_i_13_n_3 ;
  wire \ysqr_reg[17]_i_13_n_4 ;
  wire \ysqr_reg[17]_i_13_n_5 ;
  wire \ysqr_reg[17]_i_13_n_6 ;
  wire \ysqr_reg[17]_i_13_n_7 ;
  wire \ysqr_reg[17]_i_13_n_8 ;
  wire \ysqr_reg[17]_i_13_n_9 ;
  wire \ysqr_reg[17]_i_17_n_13 ;
  wire \ysqr_reg[17]_i_17_n_14 ;
  wire \ysqr_reg[17]_i_17_n_15 ;
  wire \ysqr_reg[17]_i_17_n_4 ;
  wire \ysqr_reg[17]_i_17_n_6 ;
  wire \ysqr_reg[17]_i_17_n_7 ;
  wire \ysqr_reg[17]_i_18_n_14 ;
  wire \ysqr_reg[17]_i_18_n_15 ;
  wire \ysqr_reg[17]_i_18_n_5 ;
  wire \ysqr_reg[17]_i_18_n_7 ;
  wire \ysqr_reg[17]_i_2_n_3 ;
  wire \ysqr_reg[17]_i_2_n_4 ;
  wire \ysqr_reg[17]_i_2_n_5 ;
  wire \ysqr_reg[17]_i_2_n_6 ;
  wire \ysqr_reg[17]_i_2_n_7 ;
  wire \ysqr_reg[17]_i_3_n_12 ;
  wire \ysqr_reg[17]_i_3_n_13 ;
  wire \ysqr_reg[17]_i_3_n_14 ;
  wire \ysqr_reg[17]_i_3_n_15 ;
  wire \ysqr_reg[17]_i_3_n_5 ;
  wire \ysqr_reg[17]_i_3_n_6 ;
  wire \ysqr_reg[17]_i_3_n_7 ;
  wire \ysqr_reg[21]_i_2_n_0 ;
  wire \ysqr_reg[21]_i_2_n_1 ;
  wire \ysqr_reg[21]_i_2_n_10 ;
  wire \ysqr_reg[21]_i_2_n_11 ;
  wire \ysqr_reg[21]_i_2_n_12 ;
  wire \ysqr_reg[21]_i_2_n_13 ;
  wire \ysqr_reg[21]_i_2_n_2 ;
  wire \ysqr_reg[21]_i_2_n_3 ;
  wire \ysqr_reg[21]_i_2_n_4 ;
  wire \ysqr_reg[21]_i_2_n_5 ;
  wire \ysqr_reg[21]_i_2_n_6 ;
  wire \ysqr_reg[21]_i_2_n_7 ;
  wire \ysqr_reg[21]_i_2_n_8 ;
  wire \ysqr_reg[21]_i_2_n_9 ;
  wire \ysqr_reg[21]_i_3_n_0 ;
  wire \ysqr_reg[21]_i_3_n_1 ;
  wire \ysqr_reg[21]_i_3_n_10 ;
  wire \ysqr_reg[21]_i_3_n_11 ;
  wire \ysqr_reg[21]_i_3_n_12 ;
  wire \ysqr_reg[21]_i_3_n_13 ;
  wire \ysqr_reg[21]_i_3_n_14 ;
  wire \ysqr_reg[21]_i_3_n_15 ;
  wire \ysqr_reg[21]_i_3_n_2 ;
  wire \ysqr_reg[21]_i_3_n_3 ;
  wire \ysqr_reg[21]_i_3_n_4 ;
  wire \ysqr_reg[21]_i_3_n_5 ;
  wire \ysqr_reg[21]_i_3_n_6 ;
  wire \ysqr_reg[21]_i_3_n_7 ;
  wire \ysqr_reg[21]_i_3_n_8 ;
  wire \ysqr_reg[21]_i_3_n_9 ;
  wire \ysqr_reg[29]_i_2_n_0 ;
  wire \ysqr_reg[29]_i_2_n_1 ;
  wire \ysqr_reg[29]_i_2_n_2 ;
  wire \ysqr_reg[29]_i_2_n_3 ;
  wire \ysqr_reg[29]_i_2_n_4 ;
  wire \ysqr_reg[29]_i_2_n_5 ;
  wire \ysqr_reg[29]_i_2_n_6 ;
  wire \ysqr_reg[29]_i_2_n_7 ;
  wire \ysqr_reg[35]_i_13_n_0 ;
  wire \ysqr_reg[35]_i_13_n_1 ;
  wire \ysqr_reg[35]_i_13_n_10 ;
  wire \ysqr_reg[35]_i_13_n_11 ;
  wire \ysqr_reg[35]_i_13_n_12 ;
  wire \ysqr_reg[35]_i_13_n_13 ;
  wire \ysqr_reg[35]_i_13_n_14 ;
  wire \ysqr_reg[35]_i_13_n_15 ;
  wire \ysqr_reg[35]_i_13_n_2 ;
  wire \ysqr_reg[35]_i_13_n_3 ;
  wire \ysqr_reg[35]_i_13_n_4 ;
  wire \ysqr_reg[35]_i_13_n_5 ;
  wire \ysqr_reg[35]_i_13_n_6 ;
  wire \ysqr_reg[35]_i_13_n_7 ;
  wire \ysqr_reg[35]_i_13_n_8 ;
  wire \ysqr_reg[35]_i_13_n_9 ;
  wire \ysqr_reg[35]_i_17_n_13 ;
  wire \ysqr_reg[35]_i_17_n_14 ;
  wire \ysqr_reg[35]_i_17_n_15 ;
  wire \ysqr_reg[35]_i_17_n_4 ;
  wire \ysqr_reg[35]_i_17_n_6 ;
  wire \ysqr_reg[35]_i_17_n_7 ;
  wire \ysqr_reg[35]_i_18_n_14 ;
  wire \ysqr_reg[35]_i_18_n_15 ;
  wire \ysqr_reg[35]_i_18_n_5 ;
  wire \ysqr_reg[35]_i_18_n_7 ;
  wire \ysqr_reg[35]_i_2_n_3 ;
  wire \ysqr_reg[35]_i_2_n_4 ;
  wire \ysqr_reg[35]_i_2_n_5 ;
  wire \ysqr_reg[35]_i_2_n_6 ;
  wire \ysqr_reg[35]_i_2_n_7 ;
  wire \ysqr_reg[35]_i_3_n_12 ;
  wire \ysqr_reg[35]_i_3_n_13 ;
  wire \ysqr_reg[35]_i_3_n_14 ;
  wire \ysqr_reg[35]_i_3_n_15 ;
  wire \ysqr_reg[35]_i_3_n_5 ;
  wire \ysqr_reg[35]_i_3_n_6 ;
  wire \ysqr_reg[35]_i_3_n_7 ;
  wire \ysqr_reg[39]_i_2_n_0 ;
  wire \ysqr_reg[39]_i_2_n_1 ;
  wire \ysqr_reg[39]_i_2_n_10 ;
  wire \ysqr_reg[39]_i_2_n_11 ;
  wire \ysqr_reg[39]_i_2_n_12 ;
  wire \ysqr_reg[39]_i_2_n_13 ;
  wire \ysqr_reg[39]_i_2_n_2 ;
  wire \ysqr_reg[39]_i_2_n_3 ;
  wire \ysqr_reg[39]_i_2_n_4 ;
  wire \ysqr_reg[39]_i_2_n_5 ;
  wire \ysqr_reg[39]_i_2_n_6 ;
  wire \ysqr_reg[39]_i_2_n_7 ;
  wire \ysqr_reg[39]_i_2_n_8 ;
  wire \ysqr_reg[39]_i_2_n_9 ;
  wire \ysqr_reg[39]_i_3_n_0 ;
  wire \ysqr_reg[39]_i_3_n_1 ;
  wire \ysqr_reg[39]_i_3_n_10 ;
  wire \ysqr_reg[39]_i_3_n_11 ;
  wire \ysqr_reg[39]_i_3_n_12 ;
  wire \ysqr_reg[39]_i_3_n_13 ;
  wire \ysqr_reg[39]_i_3_n_14 ;
  wire \ysqr_reg[39]_i_3_n_15 ;
  wire \ysqr_reg[39]_i_3_n_2 ;
  wire \ysqr_reg[39]_i_3_n_3 ;
  wire \ysqr_reg[39]_i_3_n_4 ;
  wire \ysqr_reg[39]_i_3_n_5 ;
  wire \ysqr_reg[39]_i_3_n_6 ;
  wire \ysqr_reg[39]_i_3_n_7 ;
  wire \ysqr_reg[39]_i_3_n_8 ;
  wire \ysqr_reg[39]_i_3_n_9 ;
  wire \ysqr_reg[3]_i_2_n_0 ;
  wire \ysqr_reg[3]_i_2_n_1 ;
  wire \ysqr_reg[3]_i_2_n_10 ;
  wire \ysqr_reg[3]_i_2_n_11 ;
  wire \ysqr_reg[3]_i_2_n_12 ;
  wire \ysqr_reg[3]_i_2_n_13 ;
  wire \ysqr_reg[3]_i_2_n_2 ;
  wire \ysqr_reg[3]_i_2_n_3 ;
  wire \ysqr_reg[3]_i_2_n_4 ;
  wire \ysqr_reg[3]_i_2_n_5 ;
  wire \ysqr_reg[3]_i_2_n_6 ;
  wire \ysqr_reg[3]_i_2_n_7 ;
  wire \ysqr_reg[3]_i_2_n_8 ;
  wire \ysqr_reg[3]_i_2_n_9 ;
  wire \ysqr_reg[3]_i_3_n_0 ;
  wire \ysqr_reg[3]_i_3_n_1 ;
  wire \ysqr_reg[3]_i_3_n_10 ;
  wire \ysqr_reg[3]_i_3_n_11 ;
  wire \ysqr_reg[3]_i_3_n_12 ;
  wire \ysqr_reg[3]_i_3_n_13 ;
  wire \ysqr_reg[3]_i_3_n_14 ;
  wire \ysqr_reg[3]_i_3_n_15 ;
  wire \ysqr_reg[3]_i_3_n_2 ;
  wire \ysqr_reg[3]_i_3_n_3 ;
  wire \ysqr_reg[3]_i_3_n_4 ;
  wire \ysqr_reg[3]_i_3_n_5 ;
  wire \ysqr_reg[3]_i_3_n_6 ;
  wire \ysqr_reg[3]_i_3_n_7 ;
  wire \ysqr_reg[3]_i_3_n_8 ;
  wire \ysqr_reg[3]_i_3_n_9 ;
  wire \ysqr_reg[47]_i_2_n_0 ;
  wire \ysqr_reg[47]_i_2_n_1 ;
  wire \ysqr_reg[47]_i_2_n_2 ;
  wire \ysqr_reg[47]_i_2_n_3 ;
  wire \ysqr_reg[47]_i_2_n_4 ;
  wire \ysqr_reg[47]_i_2_n_5 ;
  wire \ysqr_reg[47]_i_2_n_6 ;
  wire \ysqr_reg[47]_i_2_n_7 ;
  wire \ysqr_reg[53]_i_13_n_0 ;
  wire \ysqr_reg[53]_i_13_n_1 ;
  wire \ysqr_reg[53]_i_13_n_10 ;
  wire \ysqr_reg[53]_i_13_n_11 ;
  wire \ysqr_reg[53]_i_13_n_12 ;
  wire \ysqr_reg[53]_i_13_n_13 ;
  wire \ysqr_reg[53]_i_13_n_14 ;
  wire \ysqr_reg[53]_i_13_n_15 ;
  wire \ysqr_reg[53]_i_13_n_2 ;
  wire \ysqr_reg[53]_i_13_n_3 ;
  wire \ysqr_reg[53]_i_13_n_4 ;
  wire \ysqr_reg[53]_i_13_n_5 ;
  wire \ysqr_reg[53]_i_13_n_6 ;
  wire \ysqr_reg[53]_i_13_n_7 ;
  wire \ysqr_reg[53]_i_13_n_8 ;
  wire \ysqr_reg[53]_i_13_n_9 ;
  wire \ysqr_reg[53]_i_17_n_13 ;
  wire \ysqr_reg[53]_i_17_n_14 ;
  wire \ysqr_reg[53]_i_17_n_15 ;
  wire \ysqr_reg[53]_i_17_n_4 ;
  wire \ysqr_reg[53]_i_17_n_6 ;
  wire \ysqr_reg[53]_i_17_n_7 ;
  wire \ysqr_reg[53]_i_18_n_14 ;
  wire \ysqr_reg[53]_i_18_n_15 ;
  wire \ysqr_reg[53]_i_18_n_5 ;
  wire \ysqr_reg[53]_i_18_n_7 ;
  wire \ysqr_reg[53]_i_2_n_3 ;
  wire \ysqr_reg[53]_i_2_n_4 ;
  wire \ysqr_reg[53]_i_2_n_5 ;
  wire \ysqr_reg[53]_i_2_n_6 ;
  wire \ysqr_reg[53]_i_2_n_7 ;
  wire \ysqr_reg[53]_i_3_n_12 ;
  wire \ysqr_reg[53]_i_3_n_13 ;
  wire \ysqr_reg[53]_i_3_n_14 ;
  wire \ysqr_reg[53]_i_3_n_15 ;
  wire \ysqr_reg[53]_i_3_n_5 ;
  wire \ysqr_reg[53]_i_3_n_6 ;
  wire \ysqr_reg[53]_i_3_n_7 ;
  wire \ysqr_reg[57]_i_2_n_0 ;
  wire \ysqr_reg[57]_i_2_n_1 ;
  wire \ysqr_reg[57]_i_2_n_10 ;
  wire \ysqr_reg[57]_i_2_n_11 ;
  wire \ysqr_reg[57]_i_2_n_12 ;
  wire \ysqr_reg[57]_i_2_n_13 ;
  wire \ysqr_reg[57]_i_2_n_2 ;
  wire \ysqr_reg[57]_i_2_n_3 ;
  wire \ysqr_reg[57]_i_2_n_4 ;
  wire \ysqr_reg[57]_i_2_n_5 ;
  wire \ysqr_reg[57]_i_2_n_6 ;
  wire \ysqr_reg[57]_i_2_n_7 ;
  wire \ysqr_reg[57]_i_2_n_8 ;
  wire \ysqr_reg[57]_i_2_n_9 ;
  wire \ysqr_reg[57]_i_3_n_0 ;
  wire \ysqr_reg[57]_i_3_n_1 ;
  wire \ysqr_reg[57]_i_3_n_10 ;
  wire \ysqr_reg[57]_i_3_n_11 ;
  wire \ysqr_reg[57]_i_3_n_12 ;
  wire \ysqr_reg[57]_i_3_n_13 ;
  wire \ysqr_reg[57]_i_3_n_14 ;
  wire \ysqr_reg[57]_i_3_n_15 ;
  wire \ysqr_reg[57]_i_3_n_2 ;
  wire \ysqr_reg[57]_i_3_n_3 ;
  wire \ysqr_reg[57]_i_3_n_4 ;
  wire \ysqr_reg[57]_i_3_n_5 ;
  wire \ysqr_reg[57]_i_3_n_6 ;
  wire \ysqr_reg[57]_i_3_n_7 ;
  wire \ysqr_reg[57]_i_3_n_8 ;
  wire \ysqr_reg[57]_i_3_n_9 ;
  wire \ysqr_reg[65]_i_2_n_0 ;
  wire \ysqr_reg[65]_i_2_n_1 ;
  wire \ysqr_reg[65]_i_2_n_2 ;
  wire \ysqr_reg[65]_i_2_n_3 ;
  wire \ysqr_reg[65]_i_2_n_4 ;
  wire \ysqr_reg[65]_i_2_n_5 ;
  wire \ysqr_reg[65]_i_2_n_6 ;
  wire \ysqr_reg[65]_i_2_n_7 ;
  wire \ysqr_reg[71]_i_13_n_0 ;
  wire \ysqr_reg[71]_i_13_n_1 ;
  wire \ysqr_reg[71]_i_13_n_10 ;
  wire \ysqr_reg[71]_i_13_n_11 ;
  wire \ysqr_reg[71]_i_13_n_12 ;
  wire \ysqr_reg[71]_i_13_n_13 ;
  wire \ysqr_reg[71]_i_13_n_14 ;
  wire \ysqr_reg[71]_i_13_n_15 ;
  wire \ysqr_reg[71]_i_13_n_2 ;
  wire \ysqr_reg[71]_i_13_n_3 ;
  wire \ysqr_reg[71]_i_13_n_4 ;
  wire \ysqr_reg[71]_i_13_n_5 ;
  wire \ysqr_reg[71]_i_13_n_6 ;
  wire \ysqr_reg[71]_i_13_n_7 ;
  wire \ysqr_reg[71]_i_13_n_8 ;
  wire \ysqr_reg[71]_i_13_n_9 ;
  wire \ysqr_reg[71]_i_17_n_13 ;
  wire \ysqr_reg[71]_i_17_n_14 ;
  wire \ysqr_reg[71]_i_17_n_15 ;
  wire \ysqr_reg[71]_i_17_n_4 ;
  wire \ysqr_reg[71]_i_17_n_6 ;
  wire \ysqr_reg[71]_i_17_n_7 ;
  wire \ysqr_reg[71]_i_18_n_14 ;
  wire \ysqr_reg[71]_i_18_n_15 ;
  wire \ysqr_reg[71]_i_18_n_5 ;
  wire \ysqr_reg[71]_i_18_n_7 ;
  wire \ysqr_reg[71]_i_2_n_3 ;
  wire \ysqr_reg[71]_i_2_n_4 ;
  wire \ysqr_reg[71]_i_2_n_5 ;
  wire \ysqr_reg[71]_i_2_n_6 ;
  wire \ysqr_reg[71]_i_2_n_7 ;
  wire \ysqr_reg[71]_i_3_n_12 ;
  wire \ysqr_reg[71]_i_3_n_13 ;
  wire \ysqr_reg[71]_i_3_n_14 ;
  wire \ysqr_reg[71]_i_3_n_15 ;
  wire \ysqr_reg[71]_i_3_n_5 ;
  wire \ysqr_reg[71]_i_3_n_6 ;
  wire \ysqr_reg[71]_i_3_n_7 ;
  wire \ysqr_reg[75]_i_2_n_0 ;
  wire \ysqr_reg[75]_i_2_n_1 ;
  wire \ysqr_reg[75]_i_2_n_10 ;
  wire \ysqr_reg[75]_i_2_n_11 ;
  wire \ysqr_reg[75]_i_2_n_12 ;
  wire \ysqr_reg[75]_i_2_n_13 ;
  wire \ysqr_reg[75]_i_2_n_2 ;
  wire \ysqr_reg[75]_i_2_n_3 ;
  wire \ysqr_reg[75]_i_2_n_4 ;
  wire \ysqr_reg[75]_i_2_n_5 ;
  wire \ysqr_reg[75]_i_2_n_6 ;
  wire \ysqr_reg[75]_i_2_n_7 ;
  wire \ysqr_reg[75]_i_2_n_8 ;
  wire \ysqr_reg[75]_i_2_n_9 ;
  wire \ysqr_reg[75]_i_3_n_0 ;
  wire \ysqr_reg[75]_i_3_n_1 ;
  wire \ysqr_reg[75]_i_3_n_10 ;
  wire \ysqr_reg[75]_i_3_n_11 ;
  wire \ysqr_reg[75]_i_3_n_12 ;
  wire \ysqr_reg[75]_i_3_n_13 ;
  wire \ysqr_reg[75]_i_3_n_14 ;
  wire \ysqr_reg[75]_i_3_n_15 ;
  wire \ysqr_reg[75]_i_3_n_2 ;
  wire \ysqr_reg[75]_i_3_n_3 ;
  wire \ysqr_reg[75]_i_3_n_4 ;
  wire \ysqr_reg[75]_i_3_n_5 ;
  wire \ysqr_reg[75]_i_3_n_6 ;
  wire \ysqr_reg[75]_i_3_n_7 ;
  wire \ysqr_reg[75]_i_3_n_8 ;
  wire \ysqr_reg[75]_i_3_n_9 ;
  wire \ysqr_reg[83]_i_2_n_0 ;
  wire \ysqr_reg[83]_i_2_n_1 ;
  wire \ysqr_reg[83]_i_2_n_2 ;
  wire \ysqr_reg[83]_i_2_n_3 ;
  wire \ysqr_reg[83]_i_2_n_4 ;
  wire \ysqr_reg[83]_i_2_n_5 ;
  wire \ysqr_reg[83]_i_2_n_6 ;
  wire \ysqr_reg[83]_i_2_n_7 ;
  wire \ysqr_reg[89]_i_13_n_0 ;
  wire \ysqr_reg[89]_i_13_n_1 ;
  wire \ysqr_reg[89]_i_13_n_10 ;
  wire \ysqr_reg[89]_i_13_n_11 ;
  wire \ysqr_reg[89]_i_13_n_12 ;
  wire \ysqr_reg[89]_i_13_n_13 ;
  wire \ysqr_reg[89]_i_13_n_14 ;
  wire \ysqr_reg[89]_i_13_n_15 ;
  wire \ysqr_reg[89]_i_13_n_2 ;
  wire \ysqr_reg[89]_i_13_n_3 ;
  wire \ysqr_reg[89]_i_13_n_4 ;
  wire \ysqr_reg[89]_i_13_n_5 ;
  wire \ysqr_reg[89]_i_13_n_6 ;
  wire \ysqr_reg[89]_i_13_n_7 ;
  wire \ysqr_reg[89]_i_13_n_8 ;
  wire \ysqr_reg[89]_i_13_n_9 ;
  wire \ysqr_reg[89]_i_17_n_13 ;
  wire \ysqr_reg[89]_i_17_n_14 ;
  wire \ysqr_reg[89]_i_17_n_15 ;
  wire \ysqr_reg[89]_i_17_n_4 ;
  wire \ysqr_reg[89]_i_17_n_6 ;
  wire \ysqr_reg[89]_i_17_n_7 ;
  wire \ysqr_reg[89]_i_18_n_14 ;
  wire \ysqr_reg[89]_i_18_n_15 ;
  wire \ysqr_reg[89]_i_18_n_5 ;
  wire \ysqr_reg[89]_i_18_n_7 ;
  wire \ysqr_reg[89]_i_2_n_3 ;
  wire \ysqr_reg[89]_i_2_n_4 ;
  wire \ysqr_reg[89]_i_2_n_5 ;
  wire \ysqr_reg[89]_i_2_n_6 ;
  wire \ysqr_reg[89]_i_2_n_7 ;
  wire \ysqr_reg[89]_i_3_n_12 ;
  wire \ysqr_reg[89]_i_3_n_13 ;
  wire \ysqr_reg[89]_i_3_n_14 ;
  wire \ysqr_reg[89]_i_3_n_15 ;
  wire \ysqr_reg[89]_i_3_n_5 ;
  wire \ysqr_reg[89]_i_3_n_6 ;
  wire \ysqr_reg[89]_i_3_n_7 ;
  wire [7:1]\NLW_colsumXA_reg[18]_i_2_CO_UNCONNECTED ;
  wire [7:0]\NLW_colsumXA_reg[18]_i_2_O_UNCONNECTED ;
  wire [7:1]\NLW_colsumXA_reg[37]_i_2_CO_UNCONNECTED ;
  wire [7:0]\NLW_colsumXA_reg[37]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_colsumXB_reg[19]_i_1_CO_UNCONNECTED ;
  wire [7:4]\NLW_colsumXB_reg[19]_i_1_O_UNCONNECTED ;
  wire [7:4]\NLW_colsumXC_reg[20]_i_1_CO_UNCONNECTED ;
  wire [7:5]\NLW_colsumXC_reg[20]_i_1_O_UNCONNECTED ;
  wire [7:1]\NLW_colsumXYA_reg[18]_i_2_CO_UNCONNECTED ;
  wire [7:2]\NLW_colsumXYA_reg[18]_i_2_O_UNCONNECTED ;
  wire [7:1]\NLW_colsumXYA_reg[37]_i_2_CO_UNCONNECTED ;
  wire [7:2]\NLW_colsumXYA_reg[37]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_colsumXYB_reg[19]_i_1_CO_UNCONNECTED ;
  wire [7:4]\NLW_colsumXYB_reg[19]_i_1_O_UNCONNECTED ;
  wire [7:4]\NLW_colsumXYC_reg[20]_i_1_CO_UNCONNECTED ;
  wire [7:5]\NLW_colsumXYC_reg[20]_i_1_O_UNCONNECTED ;
  wire [7:1]\NLW_colsumYA_reg[18]_i_2_CO_UNCONNECTED ;
  wire [7:0]\NLW_colsumYA_reg[18]_i_2_O_UNCONNECTED ;
  wire [7:1]\NLW_colsumYA_reg[37]_i_2_CO_UNCONNECTED ;
  wire [7:0]\NLW_colsumYA_reg[37]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_colsumYB_reg[19]_i_1_CO_UNCONNECTED ;
  wire [7:4]\NLW_colsumYB_reg[19]_i_1_O_UNCONNECTED ;
  wire [7:4]\NLW_colsumYC_reg[20]_i_1_CO_UNCONNECTED ;
  wire [7:5]\NLW_colsumYC_reg[20]_i_1_O_UNCONNECTED ;
  wire [7:6]\NLW_diffI_II_reg[46]_i_1_CO_UNCONNECTED ;
  wire [7:7]\NLW_diffI_II_reg[46]_i_1_O_UNCONNECTED ;
  wire [7:6]\NLW_dwrCoobuf_reg[31]_i_10_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrCoobuf_reg[31]_i_10_O_UNCONNECTED ;
  wire [7:4]\NLW_dwrCoobuf_reg[31]_i_102_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrCoobuf_reg[31]_i_102_O_UNCONNECTED ;
  wire [7:6]\NLW_dwrCoobuf_reg[31]_i_11_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrCoobuf_reg[31]_i_11_O_UNCONNECTED ;
  wire [7:4]\NLW_dwrCoobuf_reg[31]_i_14_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrCoobuf_reg[31]_i_14_O_UNCONNECTED ;
  wire [7:4]\NLW_dwrCoobuf_reg[31]_i_15_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrCoobuf_reg[31]_i_15_O_UNCONNECTED ;
  wire [7:4]\NLW_dwrCoobuf_reg[31]_i_17_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrCoobuf_reg[31]_i_17_O_UNCONNECTED ;
  wire [7:4]\NLW_dwrCoobuf_reg[31]_i_67_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrCoobuf_reg[31]_i_67_O_UNCONNECTED ;
  wire [7:6]\NLW_dwrCoobuf_reg[31]_i_8_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrCoobuf_reg[31]_i_8_O_UNCONNECTED ;
  wire [7:6]\NLW_dwrCoobuf_reg[31]_i_9_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrCoobuf_reg[31]_i_9_O_UNCONNECTED ;
  wire [7:5]\NLW_fghij_reg[30]_i_3_CO_UNCONNECTED ;
  wire [7:6]\NLW_fghij_reg[30]_i_3_O_UNCONNECTED ;
  wire [7:7]\NLW_r_reg[47]_i_1_CO_UNCONNECTED ;
  wire [7:4]\NLW_scoreMax_lcl_reg[7]_i_3_CO_UNCONNECTED ;
  wire [7:0]\NLW_scoreMax_lcl_reg[7]_i_3_O_UNCONNECTED ;
  wire [7:4]\NLW_scoreMin_lcl_reg[7]_i_3_CO_UNCONNECTED ;
  wire [7:0]\NLW_scoreMin_lcl_reg[7]_i_3_O_UNCONNECTED ;
  wire [7:7]\NLW_sumIII_reg[23]_i_1_CO_UNCONNECTED ;
  wire [7:4]\NLW_sumXA_reg[21]_i_2_CO_UNCONNECTED ;
  wire [7:5]\NLW_sumXA_reg[21]_i_2_O_UNCONNECTED ;
  wire [7:4]\NLW_sumXA_reg[43]_i_2_CO_UNCONNECTED ;
  wire [7:5]\NLW_sumXA_reg[43]_i_2_O_UNCONNECTED ;
  wire [7:6]\NLW_sumXB_reg[22]_i_1_CO_UNCONNECTED ;
  wire [7:7]\NLW_sumXB_reg[22]_i_1_O_UNCONNECTED ;
  wire [7:4]\NLW_sumXYA_reg[21]_i_2_CO_UNCONNECTED ;
  wire [7:5]\NLW_sumXYA_reg[21]_i_2_O_UNCONNECTED ;
  wire [7:4]\NLW_sumXYA_reg[43]_i_2_CO_UNCONNECTED ;
  wire [7:5]\NLW_sumXYA_reg[43]_i_2_O_UNCONNECTED ;
  wire [7:6]\NLW_sumXYB_reg[22]_i_1_CO_UNCONNECTED ;
  wire [7:7]\NLW_sumXYB_reg[22]_i_1_O_UNCONNECTED ;
  wire [7:6]\NLW_sumXY_reg[22]_i_1_CO_UNCONNECTED ;
  wire [7:7]\NLW_sumXY_reg[22]_i_1_O_UNCONNECTED ;
  wire [7:6]\NLW_sumX_reg[22]_i_1_CO_UNCONNECTED ;
  wire [7:7]\NLW_sumX_reg[22]_i_1_O_UNCONNECTED ;
  wire [7:4]\NLW_sumYA_reg[21]_i_2_CO_UNCONNECTED ;
  wire [7:5]\NLW_sumYA_reg[21]_i_2_O_UNCONNECTED ;
  wire [7:4]\NLW_sumYA_reg[43]_i_2_CO_UNCONNECTED ;
  wire [7:5]\NLW_sumYA_reg[43]_i_2_O_UNCONNECTED ;
  wire [7:6]\NLW_sumYB_reg[22]_i_1_CO_UNCONNECTED ;
  wire [7:7]\NLW_sumYB_reg[22]_i_1_O_UNCONNECTED ;
  wire [7:6]\NLW_sumY_reg[22]_i_1_CO_UNCONNECTED ;
  wire [7:7]\NLW_sumY_reg[22]_i_1_O_UNCONNECTED ;
  wire NLW_termI0_CARRYCASCOUT_UNCONNECTED;
  wire NLW_termI0_MULTSIGNOUT_UNCONNECTED;
  wire NLW_termI0_OVERFLOW_UNCONNECTED;
  wire NLW_termI0_PATTERNBDETECT_UNCONNECTED;
  wire NLW_termI0_PATTERNDETECT_UNCONNECTED;
  wire NLW_termI0_UNDERFLOW_UNCONNECTED;
  wire [29:0]NLW_termI0_ACOUT_UNCONNECTED;
  wire [17:0]NLW_termI0_BCOUT_UNCONNECTED;
  wire [3:0]NLW_termI0_CARRYOUT_UNCONNECTED;
  wire [7:0]NLW_termI0_XOROUT_UNCONNECTED;
  wire NLW_termI0__0_CARRYCASCOUT_UNCONNECTED;
  wire NLW_termI0__0_MULTSIGNOUT_UNCONNECTED;
  wire NLW_termI0__0_OVERFLOW_UNCONNECTED;
  wire NLW_termI0__0_PATTERNBDETECT_UNCONNECTED;
  wire NLW_termI0__0_PATTERNDETECT_UNCONNECTED;
  wire NLW_termI0__0_UNDERFLOW_UNCONNECTED;
  wire [29:0]NLW_termI0__0_ACOUT_UNCONNECTED;
  wire [17:0]NLW_termI0__0_BCOUT_UNCONNECTED;
  wire [3:0]NLW_termI0__0_CARRYOUT_UNCONNECTED;
  wire [47:29]NLW_termI0__0_P_UNCONNECTED;
  wire [47:0]NLW_termI0__0_PCOUT_UNCONNECTED;
  wire [7:0]NLW_termI0__0_XOROUT_UNCONNECTED;
  wire NLW_termII0_CARRYCASCOUT_UNCONNECTED;
  wire NLW_termII0_MULTSIGNOUT_UNCONNECTED;
  wire NLW_termII0_OVERFLOW_UNCONNECTED;
  wire NLW_termII0_PATTERNBDETECT_UNCONNECTED;
  wire NLW_termII0_PATTERNDETECT_UNCONNECTED;
  wire NLW_termII0_UNDERFLOW_UNCONNECTED;
  wire [29:0]NLW_termII0_ACOUT_UNCONNECTED;
  wire [17:0]NLW_termII0_BCOUT_UNCONNECTED;
  wire [3:0]NLW_termII0_CARRYOUT_UNCONNECTED;
  wire [7:0]NLW_termII0_XOROUT_UNCONNECTED;
  wire NLW_termII0__0_CARRYCASCOUT_UNCONNECTED;
  wire NLW_termII0__0_MULTSIGNOUT_UNCONNECTED;
  wire NLW_termII0__0_OVERFLOW_UNCONNECTED;
  wire NLW_termII0__0_PATTERNBDETECT_UNCONNECTED;
  wire NLW_termII0__0_PATTERNDETECT_UNCONNECTED;
  wire NLW_termII0__0_UNDERFLOW_UNCONNECTED;
  wire [29:0]NLW_termII0__0_ACOUT_UNCONNECTED;
  wire [17:0]NLW_termII0__0_BCOUT_UNCONNECTED;
  wire [3:0]NLW_termII0__0_CARRYOUT_UNCONNECTED;
  wire [47:29]NLW_termII0__0_P_UNCONNECTED;
  wire [47:0]NLW_termII0__0_PCOUT_UNCONNECTED;
  wire [7:0]NLW_termII0__0_XOROUT_UNCONNECTED;
  wire NLW_termIII0_CARRYCASCOUT_UNCONNECTED;
  wire NLW_termIII0_MULTSIGNOUT_UNCONNECTED;
  wire NLW_termIII0_OVERFLOW_UNCONNECTED;
  wire NLW_termIII0_PATTERNBDETECT_UNCONNECTED;
  wire NLW_termIII0_PATTERNDETECT_UNCONNECTED;
  wire NLW_termIII0_UNDERFLOW_UNCONNECTED;
  wire [29:0]NLW_termIII0_ACOUT_UNCONNECTED;
  wire [17:0]NLW_termIII0_BCOUT_UNCONNECTED;
  wire [3:0]NLW_termIII0_CARRYOUT_UNCONNECTED;
  wire [7:0]NLW_termIII0_XOROUT_UNCONNECTED;
  wire NLW_termIII0__0_CARRYCASCOUT_UNCONNECTED;
  wire NLW_termIII0__0_MULTSIGNOUT_UNCONNECTED;
  wire NLW_termIII0__0_OVERFLOW_UNCONNECTED;
  wire NLW_termIII0__0_PATTERNBDETECT_UNCONNECTED;
  wire NLW_termIII0__0_PATTERNDETECT_UNCONNECTED;
  wire NLW_termIII0__0_UNDERFLOW_UNCONNECTED;
  wire [29:0]NLW_termIII0__0_ACOUT_UNCONNECTED;
  wire [17:0]NLW_termIII0__0_BCOUT_UNCONNECTED;
  wire [3:0]NLW_termIII0__0_CARRYOUT_UNCONNECTED;
  wire [47:31]NLW_termIII0__0_P_UNCONNECTED;
  wire [47:0]NLW_termIII0__0_PCOUT_UNCONNECTED;
  wire [7:0]NLW_termIII0__0_XOROUT_UNCONNECTED;
  wire [5:0]\NLW_termIIIk_reg[1]_i_2_O_UNCONNECTED ;
  wire [7:0]\NLW_termIIIk_reg[43]_i_2_CO_UNCONNECTED ;
  wire [7:1]\NLW_termIIIk_reg[43]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_xsqr_reg[17]_i_17_CO_UNCONNECTED ;
  wire [7:3]\NLW_xsqr_reg[17]_i_17_O_UNCONNECTED ;
  wire [7:1]\NLW_xsqr_reg[17]_i_18_CO_UNCONNECTED ;
  wire [7:2]\NLW_xsqr_reg[17]_i_18_O_UNCONNECTED ;
  wire [7:5]\NLW_xsqr_reg[17]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_xsqr_reg[17]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_xsqr_reg[17]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_xsqr_reg[17]_i_3_O_UNCONNECTED ;
  wire [0:0]\NLW_xsqr_reg[21]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_xsqr_reg[35]_i_17_CO_UNCONNECTED ;
  wire [7:3]\NLW_xsqr_reg[35]_i_17_O_UNCONNECTED ;
  wire [7:1]\NLW_xsqr_reg[35]_i_18_CO_UNCONNECTED ;
  wire [7:2]\NLW_xsqr_reg[35]_i_18_O_UNCONNECTED ;
  wire [7:5]\NLW_xsqr_reg[35]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_xsqr_reg[35]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_xsqr_reg[35]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_xsqr_reg[35]_i_3_O_UNCONNECTED ;
  wire [0:0]\NLW_xsqr_reg[39]_i_2_O_UNCONNECTED ;
  wire [0:0]\NLW_xsqr_reg[3]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_xsqr_reg[53]_i_17_CO_UNCONNECTED ;
  wire [7:3]\NLW_xsqr_reg[53]_i_17_O_UNCONNECTED ;
  wire [7:1]\NLW_xsqr_reg[53]_i_18_CO_UNCONNECTED ;
  wire [7:2]\NLW_xsqr_reg[53]_i_18_O_UNCONNECTED ;
  wire [7:5]\NLW_xsqr_reg[53]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_xsqr_reg[53]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_xsqr_reg[53]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_xsqr_reg[53]_i_3_O_UNCONNECTED ;
  wire [0:0]\NLW_xsqr_reg[57]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_xsqr_reg[71]_i_17_CO_UNCONNECTED ;
  wire [7:3]\NLW_xsqr_reg[71]_i_17_O_UNCONNECTED ;
  wire [7:1]\NLW_xsqr_reg[71]_i_18_CO_UNCONNECTED ;
  wire [7:2]\NLW_xsqr_reg[71]_i_18_O_UNCONNECTED ;
  wire [7:5]\NLW_xsqr_reg[71]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_xsqr_reg[71]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_xsqr_reg[71]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_xsqr_reg[71]_i_3_O_UNCONNECTED ;
  wire [0:0]\NLW_xsqr_reg[75]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_xsqr_reg[89]_i_18_CO_UNCONNECTED ;
  wire [7:3]\NLW_xsqr_reg[89]_i_18_O_UNCONNECTED ;
  wire [7:1]\NLW_xsqr_reg[89]_i_19_CO_UNCONNECTED ;
  wire [7:2]\NLW_xsqr_reg[89]_i_19_O_UNCONNECTED ;
  wire [7:5]\NLW_xsqr_reg[89]_i_3_CO_UNCONNECTED ;
  wire [7:6]\NLW_xsqr_reg[89]_i_3_O_UNCONNECTED ;
  wire [7:3]\NLW_xsqr_reg[89]_i_4_CO_UNCONNECTED ;
  wire [7:4]\NLW_xsqr_reg[89]_i_4_O_UNCONNECTED ;
  wire [7:5]\NLW_xy_reg[17]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_xy_reg[17]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_xy_reg[17]_i_20_CO_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[17]_i_20_O_UNCONNECTED ;
  wire [7:2]\NLW_xy_reg[17]_i_21_CO_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[17]_i_21_O_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[17]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_xy_reg[17]_i_3_O_UNCONNECTED ;
  wire [7:5]\NLW_xy_reg[35]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_xy_reg[35]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_xy_reg[35]_i_20_CO_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[35]_i_20_O_UNCONNECTED ;
  wire [7:2]\NLW_xy_reg[35]_i_21_CO_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[35]_i_21_O_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[35]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_xy_reg[35]_i_3_O_UNCONNECTED ;
  wire [7:5]\NLW_xy_reg[53]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_xy_reg[53]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_xy_reg[53]_i_20_CO_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[53]_i_20_O_UNCONNECTED ;
  wire [7:2]\NLW_xy_reg[53]_i_21_CO_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[53]_i_21_O_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[53]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_xy_reg[53]_i_3_O_UNCONNECTED ;
  wire [7:5]\NLW_xy_reg[71]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_xy_reg[71]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_xy_reg[71]_i_20_CO_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[71]_i_20_O_UNCONNECTED ;
  wire [7:2]\NLW_xy_reg[71]_i_21_CO_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[71]_i_21_O_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[71]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_xy_reg[71]_i_3_O_UNCONNECTED ;
  wire [7:5]\NLW_xy_reg[89]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_xy_reg[89]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_xy_reg[89]_i_20_CO_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[89]_i_20_O_UNCONNECTED ;
  wire [7:2]\NLW_xy_reg[89]_i_21_CO_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[89]_i_21_O_UNCONNECTED ;
  wire [7:3]\NLW_xy_reg[89]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_xy_reg[89]_i_3_O_UNCONNECTED ;
  wire [7:2]\NLW_ysqr_reg[17]_i_17_CO_UNCONNECTED ;
  wire [7:3]\NLW_ysqr_reg[17]_i_17_O_UNCONNECTED ;
  wire [7:1]\NLW_ysqr_reg[17]_i_18_CO_UNCONNECTED ;
  wire [7:2]\NLW_ysqr_reg[17]_i_18_O_UNCONNECTED ;
  wire [7:5]\NLW_ysqr_reg[17]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_ysqr_reg[17]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_ysqr_reg[17]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_ysqr_reg[17]_i_3_O_UNCONNECTED ;
  wire [0:0]\NLW_ysqr_reg[21]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_ysqr_reg[35]_i_17_CO_UNCONNECTED ;
  wire [7:3]\NLW_ysqr_reg[35]_i_17_O_UNCONNECTED ;
  wire [7:1]\NLW_ysqr_reg[35]_i_18_CO_UNCONNECTED ;
  wire [7:2]\NLW_ysqr_reg[35]_i_18_O_UNCONNECTED ;
  wire [7:5]\NLW_ysqr_reg[35]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_ysqr_reg[35]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_ysqr_reg[35]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_ysqr_reg[35]_i_3_O_UNCONNECTED ;
  wire [0:0]\NLW_ysqr_reg[39]_i_2_O_UNCONNECTED ;
  wire [0:0]\NLW_ysqr_reg[3]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_ysqr_reg[53]_i_17_CO_UNCONNECTED ;
  wire [7:3]\NLW_ysqr_reg[53]_i_17_O_UNCONNECTED ;
  wire [7:1]\NLW_ysqr_reg[53]_i_18_CO_UNCONNECTED ;
  wire [7:2]\NLW_ysqr_reg[53]_i_18_O_UNCONNECTED ;
  wire [7:5]\NLW_ysqr_reg[53]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_ysqr_reg[53]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_ysqr_reg[53]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_ysqr_reg[53]_i_3_O_UNCONNECTED ;
  wire [0:0]\NLW_ysqr_reg[57]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_ysqr_reg[71]_i_17_CO_UNCONNECTED ;
  wire [7:3]\NLW_ysqr_reg[71]_i_17_O_UNCONNECTED ;
  wire [7:1]\NLW_ysqr_reg[71]_i_18_CO_UNCONNECTED ;
  wire [7:2]\NLW_ysqr_reg[71]_i_18_O_UNCONNECTED ;
  wire [7:5]\NLW_ysqr_reg[71]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_ysqr_reg[71]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_ysqr_reg[71]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_ysqr_reg[71]_i_3_O_UNCONNECTED ;
  wire [0:0]\NLW_ysqr_reg[75]_i_2_O_UNCONNECTED ;
  wire [7:2]\NLW_ysqr_reg[89]_i_17_CO_UNCONNECTED ;
  wire [7:3]\NLW_ysqr_reg[89]_i_17_O_UNCONNECTED ;
  wire [7:1]\NLW_ysqr_reg[89]_i_18_CO_UNCONNECTED ;
  wire [7:2]\NLW_ysqr_reg[89]_i_18_O_UNCONNECTED ;
  wire [7:5]\NLW_ysqr_reg[89]_i_2_CO_UNCONNECTED ;
  wire [7:6]\NLW_ysqr_reg[89]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_ysqr_reg[89]_i_3_CO_UNCONNECTED ;
  wire [7:4]\NLW_ysqr_reg[89]_i_3_O_UNCONNECTED ;

  LUT6 #(
    .INIT(64'h000100010001FF01)) 
    \FSM_onehot_stateCoobufB[0]_i_1 
       (.I0(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .I1(enCoobufB),
        .I2(\FSM_onehot_stateCoobufB_reg[5]_0 [1]),
        .I3(\FSM_onehot_stateCoobufB_reg[5]_0 [0]),
        .I4(reqCoobufCornerToHostif),
        .I5(coobufCornerToHostifAXIS_tready),
        .O(\FSM_onehot_stateCoobufB[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00800000)) 
    \FSM_onehot_stateCoobufB[2]_i_1 
       (.I0(coobufCornerToHostifAXIS_tready),
        .I1(\FSM_onehot_stateCoobufB_reg[5]_0 [0]),
        .I2(\aCoobufB_reg_n_0_[7] ),
        .I3(\FSM_onehot_stateCoobufB[3]_i_2_n_0 ),
        .I4(\aCoobufB_reg_n_0_[6] ),
        .O(\FSM_onehot_stateCoobufB[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFDF000000)) 
    \FSM_onehot_stateCoobufB[3]_i_1 
       (.I0(\aCoobufB_reg_n_0_[7] ),
        .I1(\FSM_onehot_stateCoobufB[3]_i_2_n_0 ),
        .I2(\aCoobufB_reg_n_0_[6] ),
        .I3(\FSM_onehot_stateCoobufB_reg[5]_0 [0]),
        .I4(coobufCornerToHostifAXIS_tready),
        .I5(\FSM_onehot_stateCoobufB_reg[5]_0 [1]),
        .O(\FSM_onehot_stateCoobufB[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \FSM_onehot_stateCoobufB[3]_i_2 
       (.I0(\aCoobufB_reg_n_0_[4] ),
        .I1(\aCoobufB_reg_n_0_[2] ),
        .I2(\aCoobufB_reg_n_0_[0] ),
        .I3(\aCoobufB_reg_n_0_[1] ),
        .I4(\aCoobufB_reg_n_0_[3] ),
        .I5(\aCoobufB_reg_n_0_[5] ),
        .O(\FSM_onehot_stateCoobufB[3]_i_2_n_0 ));
  LUT3 #(
    .INIT(8'hF8)) 
    \FSM_onehot_stateCoobufB[5]_i_1 
       (.I0(\FSM_onehot_stateCoobufB_reg_n_0_[2] ),
        .I1(dneCoobufCornerToHostif),
        .I2(\FSM_onehot_stateCoobufB[5]_i_3_n_0 ),
        .O(\FSM_onehot_stateCoobufB[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFE2FFF3FFE2)) 
    \FSM_onehot_stateCoobufB[5]_i_3 
       (.I0(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .I1(reqCoobufCornerToHostif),
        .I2(\FSM_onehot_stateCoobufB_reg[5]_0 [1]),
        .I3(enCoobufB),
        .I4(\FSM_onehot_stateCoobufB_reg[5]_0 [0]),
        .I5(coobufCornerToHostifAXIS_tready),
        .O(\FSM_onehot_stateCoobufB[5]_i_3_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDPE #(
    .INIT(1'b1)) 
    \FSM_onehot_stateCoobufB_reg[0] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateCoobufB[5]_i_1_n_0 ),
        .D(\FSM_onehot_stateCoobufB[0]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(\FSM_onehot_stateCoobufB_reg_n_0_[0] ));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateCoobufB_reg[1] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateCoobufB[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(enCoobufB),
        .Q(\FSM_onehot_stateCoobufB_reg[5]_0 [0]));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateCoobufB_reg[2] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateCoobufB[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\FSM_onehot_stateCoobufB[2]_i_1_n_0 ),
        .Q(\FSM_onehot_stateCoobufB_reg_n_0_[2] ));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateCoobufB_reg[3] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateCoobufB[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\FSM_onehot_stateCoobufB[3]_i_1_n_0 ),
        .Q(enCoobufB));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateCoobufB_reg[5] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateCoobufB[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .Q(\FSM_onehot_stateCoobufB_reg[5]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair952" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \aCoobufB[0]_i_1 
       (.I0(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .I1(\aCoobufB_reg_n_0_[0] ),
        .O(\aCoobufB[0]_i_1_n_0 ));
  LUT3 #(
    .INIT(8'h14)) 
    \aCoobufB[1]_i_1 
       (.I0(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .I1(\aCoobufB_reg_n_0_[0] ),
        .I2(\aCoobufB_reg_n_0_[1] ),
        .O(aCoobufB[1]));
  (* SOFT_HLUTNM = "soft_lutpair826" *) 
  LUT4 #(
    .INIT(16'h0708)) 
    \aCoobufB[2]_i_1 
       (.I0(\aCoobufB_reg_n_0_[0] ),
        .I1(\aCoobufB_reg_n_0_[1] ),
        .I2(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .I3(\aCoobufB_reg_n_0_[2] ),
        .O(aCoobufB[2]));
  (* SOFT_HLUTNM = "soft_lutpair826" *) 
  LUT5 #(
    .INIT(32'h007F0080)) 
    \aCoobufB[3]_i_1 
       (.I0(\aCoobufB_reg_n_0_[1] ),
        .I1(\aCoobufB_reg_n_0_[0] ),
        .I2(\aCoobufB_reg_n_0_[2] ),
        .I3(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .I4(\aCoobufB_reg_n_0_[3] ),
        .O(aCoobufB[3]));
  LUT6 #(
    .INIT(64'h00007FFF00008000)) 
    \aCoobufB[4]_i_1 
       (.I0(\aCoobufB_reg_n_0_[2] ),
        .I1(\aCoobufB_reg_n_0_[0] ),
        .I2(\aCoobufB_reg_n_0_[1] ),
        .I3(\aCoobufB_reg_n_0_[3] ),
        .I4(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .I5(\aCoobufB_reg_n_0_[4] ),
        .O(aCoobufB[4]));
  (* SOFT_HLUTNM = "soft_lutpair952" *) 
  LUT3 #(
    .INIT(8'h21)) 
    \aCoobufB[5]_i_1 
       (.I0(\aCoobufB[5]_i_2_n_0 ),
        .I1(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .I2(\aCoobufB_reg_n_0_[5] ),
        .O(aCoobufB[5]));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \aCoobufB[5]_i_2 
       (.I0(\aCoobufB_reg_n_0_[3] ),
        .I1(\aCoobufB_reg_n_0_[1] ),
        .I2(\aCoobufB_reg_n_0_[0] ),
        .I3(\aCoobufB_reg_n_0_[2] ),
        .I4(\aCoobufB_reg_n_0_[4] ),
        .O(\aCoobufB[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair862" *) 
  LUT3 #(
    .INIT(8'h21)) 
    \aCoobufB[6]_i_1 
       (.I0(\FSM_onehot_stateCoobufB[3]_i_2_n_0 ),
        .I1(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .I2(\aCoobufB_reg_n_0_[6] ),
        .O(aCoobufB[6]));
  LUT6 #(
    .INIT(64'hFFFFFFFFDF000000)) 
    \aCoobufB[7]_i_1 
       (.I0(\aCoobufB_reg_n_0_[7] ),
        .I1(\FSM_onehot_stateCoobufB[3]_i_2_n_0 ),
        .I2(\aCoobufB_reg_n_0_[6] ),
        .I3(\FSM_onehot_stateCoobufB_reg[5]_0 [0]),
        .I4(coobufCornerToHostifAXIS_tready),
        .I5(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .O(p_0_out));
  (* SOFT_HLUTNM = "soft_lutpair862" *) 
  LUT4 #(
    .INIT(16'h0B04)) 
    \aCoobufB[7]_i_2 
       (.I0(\FSM_onehot_stateCoobufB[3]_i_2_n_0 ),
        .I1(\aCoobufB_reg_n_0_[6] ),
        .I2(\FSM_onehot_stateCoobufB_reg_n_0_[0] ),
        .I3(\aCoobufB_reg_n_0_[7] ),
        .O(aCoobufB[7]));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobufB_reg[0] 
       (.C(aclk_sig),
        .CE(p_0_out),
        .CLR(linNotLog_reg_0),
        .D(\aCoobufB[0]_i_1_n_0 ),
        .Q(\aCoobufB_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobufB_reg[1] 
       (.C(aclk_sig),
        .CE(p_0_out),
        .CLR(linNotLog_reg_0),
        .D(aCoobufB[1]),
        .Q(\aCoobufB_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobufB_reg[2] 
       (.C(aclk_sig),
        .CE(p_0_out),
        .CLR(linNotLog_reg_0),
        .D(aCoobufB[2]),
        .Q(\aCoobufB_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobufB_reg[3] 
       (.C(aclk_sig),
        .CE(p_0_out),
        .CLR(linNotLog_reg_0),
        .D(aCoobufB[3]),
        .Q(\aCoobufB_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobufB_reg[4] 
       (.C(aclk_sig),
        .CE(p_0_out),
        .CLR(linNotLog_reg_0),
        .D(aCoobufB[4]),
        .Q(\aCoobufB_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobufB_reg[5] 
       (.C(aclk_sig),
        .CE(p_0_out),
        .CLR(linNotLog_reg_0),
        .D(aCoobufB[5]),
        .Q(\aCoobufB_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobufB_reg[6] 
       (.C(aclk_sig),
        .CE(p_0_out),
        .CLR(linNotLog_reg_0),
        .D(aCoobufB[6]),
        .Q(\aCoobufB_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobufB_reg[7] 
       (.C(aclk_sig),
        .CE(p_0_out),
        .CLR(linNotLog_reg_0),
        .D(aCoobufB[7]),
        .Q(\aCoobufB_reg_n_0_[7] ));
  (* SOFT_HLUTNM = "soft_lutpair803" *) 
  LUT4 #(
    .INIT(16'h00A8)) 
    \aCoobuf[0]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(aCoobuf_reg[0]),
        .O(p_0_in__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair803" *) 
  LUT5 #(
    .INIT(32'h00A8A800)) 
    \aCoobuf[1]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(aCoobuf_reg[1]),
        .I4(aCoobuf_reg[0]),
        .O(p_0_in__0[1]));
  LUT6 #(
    .INIT(64'h00A8A8A8A8000000)) 
    \aCoobuf[2]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(aCoobuf_reg[0]),
        .I4(aCoobuf_reg[1]),
        .I5(aCoobuf_reg[2]),
        .O(p_0_in__0[2]));
  LUT5 #(
    .INIT(32'h7F800000)) 
    \aCoobuf[3]_i_1 
       (.I0(aCoobuf_reg[1]),
        .I1(aCoobuf_reg[0]),
        .I2(aCoobuf_reg[2]),
        .I3(aCoobuf_reg[3]),
        .I4(\col_lcl[8]__0_i_2_n_0 ),
        .O(\aCoobuf[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \aCoobuf[4]_i_1 
       (.I0(\col_lcl[8]__0_i_2_n_0 ),
        .I1(aCoobuf_reg[3]),
        .I2(aCoobuf_reg[2]),
        .I3(aCoobuf_reg[0]),
        .I4(aCoobuf_reg[1]),
        .I5(aCoobuf_reg[4]),
        .O(p_0_in__0[4]));
  LUT5 #(
    .INIT(32'h00A8A800)) 
    \aCoobuf[5]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\aCoobuf[5]_i_2_n_0 ),
        .I4(aCoobuf_reg[5]),
        .O(p_0_in__0[5]));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aCoobuf[5]_i_2 
       (.I0(aCoobuf_reg[4]),
        .I1(aCoobuf_reg[1]),
        .I2(aCoobuf_reg[0]),
        .I3(aCoobuf_reg[2]),
        .I4(aCoobuf_reg[3]),
        .O(\aCoobuf[5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00A8A800)) 
    \aCoobuf[6]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\aCoobuf[8]_i_3_n_0 ),
        .I4(aCoobuf_reg[6]),
        .O(p_0_in__0[6]));
  LUT6 #(
    .INIT(64'h00A8A8A8A8000000)) 
    \aCoobuf[7]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\aCoobuf[8]_i_3_n_0 ),
        .I4(aCoobuf_reg[6]),
        .I5(aCoobuf_reg[7]),
        .O(p_0_in__0[7]));
  LUT4 #(
    .INIT(16'h0DFF)) 
    \aCoobuf[8]_i_1 
       (.I0(\stateMaxsel_reg_n_0_[0] ),
        .I1(enCoobuf_reg_n_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .O(sel));
  (* SOFT_HLUTNM = "soft_lutpair804" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \aCoobuf[8]_i_2 
       (.I0(\col_lcl[8]__0_i_2_n_0 ),
        .I1(aCoobuf_reg[6]),
        .I2(\aCoobuf[8]_i_3_n_0 ),
        .I3(aCoobuf_reg[7]),
        .I4(aCoobuf_reg[8]),
        .O(p_0_in__0[8]));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aCoobuf[8]_i_3 
       (.I0(aCoobuf_reg[3]),
        .I1(aCoobuf_reg[2]),
        .I2(aCoobuf_reg[0]),
        .I3(aCoobuf_reg[1]),
        .I4(aCoobuf_reg[4]),
        .I5(aCoobuf_reg[5]),
        .O(\aCoobuf[8]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobuf_reg[0] 
       (.C(aclk_sig),
        .CE(sel),
        .CLR(linNotLog_reg_0),
        .D(p_0_in__0[0]),
        .Q(aCoobuf_reg[0]));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobuf_reg[1] 
       (.C(aclk_sig),
        .CE(sel),
        .CLR(linNotLog_reg_0),
        .D(p_0_in__0[1]),
        .Q(aCoobuf_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobuf_reg[2] 
       (.C(aclk_sig),
        .CE(sel),
        .CLR(linNotLog_reg_0),
        .D(p_0_in__0[2]),
        .Q(aCoobuf_reg[2]));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobuf_reg[3] 
       (.C(aclk_sig),
        .CE(sel),
        .CLR(linNotLog_reg_0),
        .D(\aCoobuf[3]_i_1_n_0 ),
        .Q(aCoobuf_reg[3]));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobuf_reg[4] 
       (.C(aclk_sig),
        .CE(sel),
        .CLR(linNotLog_reg_0),
        .D(p_0_in__0[4]),
        .Q(aCoobuf_reg[4]));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobuf_reg[5] 
       (.C(aclk_sig),
        .CE(sel),
        .CLR(linNotLog_reg_0),
        .D(p_0_in__0[5]),
        .Q(aCoobuf_reg[5]));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobuf_reg[6] 
       (.C(aclk_sig),
        .CE(sel),
        .CLR(linNotLog_reg_0),
        .D(p_0_in__0[6]),
        .Q(aCoobuf_reg[6]));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobuf_reg[7] 
       (.C(aclk_sig),
        .CE(sel),
        .CLR(linNotLog_reg_0),
        .D(p_0_in__0[7]),
        .Q(aCoobuf_reg[7]));
  FDCE #(
    .INIT(1'b0)) 
    \aCoobuf_reg[8] 
       (.C(aclk_sig),
        .CE(sel),
        .CLR(linNotLog_reg_0),
        .D(p_0_in__0[8]),
        .Q(aCoobuf_reg[8]));
  (* SOFT_HLUTNM = "soft_lutpair798" *) 
  LUT5 #(
    .INIT(32'h00001000)) 
    \aImdbufB[0]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(\aImdbufB_reg_n_0_[0] ),
        .O(\aImdbufB[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00002888)) 
    \aImdbufB[10]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(\aImdbufB_reg_n_0_[10] ),
        .I2(\aImdbufB[10]_i_2_n_0 ),
        .I3(\aImdbufB_reg_n_0_[9] ),
        .I4(\aImdbuf[10]_i_6_n_0 ),
        .O(\aImdbufB[10]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h8000)) 
    \aImdbufB[10]_i_2 
       (.I0(\aImdbufB_reg_n_0_[7] ),
        .I1(\aImdbufB[8]_i_2_n_0 ),
        .I2(\aImdbufB_reg_n_0_[6] ),
        .I3(\aImdbufB_reg_n_0_[8] ),
        .O(\aImdbufB[10]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000100010000000)) 
    \aImdbufB[1]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(\aImdbufB_reg_n_0_[1] ),
        .I5(\aImdbufB_reg_n_0_[0] ),
        .O(\aImdbufB[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00002888)) 
    \aImdbufB[2]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(\aImdbufB_reg_n_0_[2] ),
        .I2(\aImdbufB_reg_n_0_[1] ),
        .I3(\aImdbufB_reg_n_0_[0] ),
        .I4(\aImdbuf[10]_i_6_n_0 ),
        .O(\aImdbufB[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000028888888)) 
    \aImdbufB[3]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(\aImdbufB_reg_n_0_[3] ),
        .I2(\aImdbufB_reg_n_0_[2] ),
        .I3(\aImdbufB_reg_n_0_[0] ),
        .I4(\aImdbufB_reg_n_0_[1] ),
        .I5(\aImdbuf[10]_i_6_n_0 ),
        .O(\aImdbufB[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800000000)) 
    \aImdbufB[4]_i_1 
       (.I0(rng_reg_0),
        .I1(\aImdbufB_reg_n_0_[4] ),
        .I2(\aImdbufB[4]_i_2_n_0 ),
        .I3(p_1_in),
        .I4(\stateImdstream_reg_n_0_[0] ),
        .I5(\stateImdstream_reg_n_0_[1] ),
        .O(\aImdbufB[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair783" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \aImdbufB[4]_i_2 
       (.I0(\aImdbufB_reg_n_0_[2] ),
        .I1(\aImdbufB_reg_n_0_[0] ),
        .I2(\aImdbufB_reg_n_0_[1] ),
        .I3(\aImdbufB_reg_n_0_[3] ),
        .O(\aImdbufB[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800000000)) 
    \aImdbufB[5]_i_1 
       (.I0(rng_reg_0),
        .I1(\aImdbufB_reg_n_0_[5] ),
        .I2(\aImdbufB[5]_i_2_n_0 ),
        .I3(p_1_in),
        .I4(\stateImdstream_reg_n_0_[0] ),
        .I5(\stateImdstream_reg_n_0_[1] ),
        .O(\aImdbufB[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair783" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \aImdbufB[5]_i_2 
       (.I0(\aImdbufB_reg_n_0_[3] ),
        .I1(\aImdbufB_reg_n_0_[1] ),
        .I2(\aImdbufB_reg_n_0_[0] ),
        .I3(\aImdbufB_reg_n_0_[2] ),
        .I4(\aImdbufB_reg_n_0_[4] ),
        .O(\aImdbufB[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800000000)) 
    \aImdbufB[6]_i_1 
       (.I0(rng_reg_0),
        .I1(\aImdbufB_reg_n_0_[6] ),
        .I2(\aImdbufB[8]_i_2_n_0 ),
        .I3(p_1_in),
        .I4(\stateImdstream_reg_n_0_[0] ),
        .I5(\stateImdstream_reg_n_0_[1] ),
        .O(\aImdbufB[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00002888)) 
    \aImdbufB[7]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(\aImdbufB_reg_n_0_[7] ),
        .I2(\aImdbufB_reg_n_0_[6] ),
        .I3(\aImdbufB[8]_i_2_n_0 ),
        .I4(\aImdbuf[10]_i_6_n_0 ),
        .O(\aImdbufB[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000028888888)) 
    \aImdbufB[8]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(\aImdbufB_reg_n_0_[8] ),
        .I2(\aImdbufB_reg_n_0_[7] ),
        .I3(\aImdbufB[8]_i_2_n_0 ),
        .I4(\aImdbufB_reg_n_0_[6] ),
        .I5(\aImdbuf[10]_i_6_n_0 ),
        .O(\aImdbufB[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aImdbufB[8]_i_2 
       (.I0(\aImdbufB_reg_n_0_[4] ),
        .I1(\aImdbufB_reg_n_0_[2] ),
        .I2(\aImdbufB_reg_n_0_[0] ),
        .I3(\aImdbufB_reg_n_0_[1] ),
        .I4(\aImdbufB_reg_n_0_[3] ),
        .I5(\aImdbufB_reg_n_0_[5] ),
        .O(\aImdbufB[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800000000)) 
    \aImdbufB[9]_i_1 
       (.I0(rng_reg_0),
        .I1(\aImdbufB_reg_n_0_[9] ),
        .I2(\aImdbufB[10]_i_2_n_0 ),
        .I3(p_1_in),
        .I4(\stateImdstream_reg_n_0_[0] ),
        .I5(\stateImdstream_reg_n_0_[1] ),
        .O(\aImdbufB[9]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbufB_reg[0] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbufB[0]_i_1_n_0 ),
        .Q(\aImdbufB_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbufB_reg[10] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbufB[10]_i_1_n_0 ),
        .Q(\aImdbufB_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbufB_reg[1] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbufB[1]_i_1_n_0 ),
        .Q(\aImdbufB_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbufB_reg[2] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbufB[2]_i_1_n_0 ),
        .Q(\aImdbufB_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbufB_reg[3] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbufB[3]_i_1_n_0 ),
        .Q(\aImdbufB_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbufB_reg[4] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbufB[4]_i_1_n_0 ),
        .Q(\aImdbufB_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbufB_reg[5] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbufB[5]_i_1_n_0 ),
        .Q(\aImdbufB_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbufB_reg[6] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbufB[6]_i_1_n_0 ),
        .Q(\aImdbufB_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbufB_reg[7] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbufB[7]_i_1_n_0 ),
        .Q(\aImdbufB_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbufB_reg[8] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbufB[8]_i_1_n_0 ),
        .Q(\aImdbufB_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbufB_reg[9] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbufB[9]_i_1_n_0 ),
        .Q(\aImdbufB_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair799" *) 
  LUT5 #(
    .INIT(32'h00001000)) 
    \aImdbuf[0]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(\aImdbuf_reg_n_0_[0] ),
        .O(\aImdbuf[0]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hABAA)) 
    \aImdbuf[10]_i_1 
       (.I0(\col_lcl[10]_i_3_n_0 ),
        .I1(\aImdbuf[10]_i_3_n_0 ),
        .I2(\aImdbuf[10]_i_4_n_0 ),
        .I3(\aImdbufB_reg[0]_0 ),
        .O(aImdbufB));
  LUT5 #(
    .INIT(32'h00002888)) 
    \aImdbuf[10]_i_2 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(\aImdbuf_reg_n_0_[10] ),
        .I2(\aImdbuf[10]_i_5_n_0 ),
        .I3(\aImdbuf_reg_n_0_[9] ),
        .I4(\aImdbuf[10]_i_6_n_0 ),
        .O(\aImdbuf[10]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00000002)) 
    \aImdbuf[10]_i_3 
       (.I0(\aImdbuf[10]_i_7_n_0 ),
        .I1(\col_lcl_reg[10]_0 [2]),
        .I2(\col_lcl_reg[10]_0 [4]),
        .I3(\col_lcl_reg[10]_0 [1]),
        .I4(\aImdbuf[10]_i_8_n_0 ),
        .O(\aImdbuf[10]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair855" *) 
  LUT4 #(
    .INIT(16'hEFFF)) 
    \aImdbuf[10]_i_4 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(ceScore),
        .O(\aImdbuf[10]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8000)) 
    \aImdbuf[10]_i_5 
       (.I0(\aImdbuf_reg_n_0_[7] ),
        .I1(\aImdbuf[8]_i_2_n_0 ),
        .I2(\aImdbuf_reg_n_0_[6] ),
        .I3(\aImdbuf_reg_n_0_[8] ),
        .O(\aImdbuf[10]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair798" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \aImdbuf[10]_i_6 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .O(\aImdbuf[10]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair854" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \aImdbuf[10]_i_7 
       (.I0(\col_lcl_reg[10]_0 [8]),
        .I1(\col_lcl_reg[10]_0 [0]),
        .I2(\col_lcl_reg[10]_0 [5]),
        .I3(\col_lcl_reg[10]_0 [3]),
        .O(\aImdbuf[10]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \aImdbuf[10]_i_8 
       (.I0(\col_lcl_reg[10]_0 [9]),
        .I1(\col_lcl_reg[10]_0 [6]),
        .I2(\col_lcl_reg[10]_0 [10]),
        .I3(\col_lcl_reg[10]_0 [7]),
        .O(\aImdbuf[10]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h0000100010000000)) 
    \aImdbuf[1]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(\aImdbuf_reg_n_0_[1] ),
        .I5(\aImdbuf_reg_n_0_[0] ),
        .O(\aImdbuf[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00002888)) 
    \aImdbuf[2]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(\aImdbuf_reg_n_0_[2] ),
        .I2(\aImdbuf_reg_n_0_[1] ),
        .I3(\aImdbuf_reg_n_0_[0] ),
        .I4(\aImdbuf[10]_i_6_n_0 ),
        .O(\aImdbuf[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000028888888)) 
    \aImdbuf[3]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(\aImdbuf_reg_n_0_[3] ),
        .I2(\aImdbuf_reg_n_0_[2] ),
        .I3(\aImdbuf_reg_n_0_[0] ),
        .I4(\aImdbuf_reg_n_0_[1] ),
        .I5(\aImdbuf[10]_i_6_n_0 ),
        .O(\aImdbuf[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800000000)) 
    \aImdbuf[4]_i_1 
       (.I0(rng_reg_0),
        .I1(\aImdbuf_reg_n_0_[4] ),
        .I2(\aImdbuf[4]_i_2_n_0 ),
        .I3(p_1_in),
        .I4(\stateImdstream_reg_n_0_[0] ),
        .I5(\stateImdstream_reg_n_0_[1] ),
        .O(\aImdbuf[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair782" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \aImdbuf[4]_i_2 
       (.I0(\aImdbuf_reg_n_0_[2] ),
        .I1(\aImdbuf_reg_n_0_[0] ),
        .I2(\aImdbuf_reg_n_0_[1] ),
        .I3(\aImdbuf_reg_n_0_[3] ),
        .O(\aImdbuf[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800000000)) 
    \aImdbuf[5]_i_1 
       (.I0(rng_reg_0),
        .I1(\aImdbuf_reg_n_0_[5] ),
        .I2(\aImdbuf[5]_i_2_n_0 ),
        .I3(p_1_in),
        .I4(\stateImdstream_reg_n_0_[0] ),
        .I5(\stateImdstream_reg_n_0_[1] ),
        .O(\aImdbuf[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair782" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \aImdbuf[5]_i_2 
       (.I0(\aImdbuf_reg_n_0_[3] ),
        .I1(\aImdbuf_reg_n_0_[1] ),
        .I2(\aImdbuf_reg_n_0_[0] ),
        .I3(\aImdbuf_reg_n_0_[2] ),
        .I4(\aImdbuf_reg_n_0_[4] ),
        .O(\aImdbuf[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800000000)) 
    \aImdbuf[6]_i_1 
       (.I0(rng_reg_0),
        .I1(\aImdbuf_reg_n_0_[6] ),
        .I2(\aImdbuf[8]_i_2_n_0 ),
        .I3(p_1_in),
        .I4(\stateImdstream_reg_n_0_[0] ),
        .I5(\stateImdstream_reg_n_0_[1] ),
        .O(\aImdbuf[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00002888)) 
    \aImdbuf[7]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(\aImdbuf_reg_n_0_[7] ),
        .I2(\aImdbuf_reg_n_0_[6] ),
        .I3(\aImdbuf[8]_i_2_n_0 ),
        .I4(\aImdbuf[10]_i_6_n_0 ),
        .O(\aImdbuf[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000028888888)) 
    \aImdbuf[8]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(\aImdbuf_reg_n_0_[8] ),
        .I2(\aImdbuf_reg_n_0_[7] ),
        .I3(\aImdbuf[8]_i_2_n_0 ),
        .I4(\aImdbuf_reg_n_0_[6] ),
        .I5(\aImdbuf[10]_i_6_n_0 ),
        .O(\aImdbuf[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aImdbuf[8]_i_2 
       (.I0(\aImdbuf_reg_n_0_[4] ),
        .I1(\aImdbuf_reg_n_0_[2] ),
        .I2(\aImdbuf_reg_n_0_[0] ),
        .I3(\aImdbuf_reg_n_0_[1] ),
        .I4(\aImdbuf_reg_n_0_[3] ),
        .I5(\aImdbuf_reg_n_0_[5] ),
        .O(\aImdbuf[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000002800000000)) 
    \aImdbuf[9]_i_1 
       (.I0(rng_reg_0),
        .I1(\aImdbuf_reg_n_0_[9] ),
        .I2(\aImdbuf[10]_i_5_n_0 ),
        .I3(p_1_in),
        .I4(\stateImdstream_reg_n_0_[0] ),
        .I5(\stateImdstream_reg_n_0_[1] ),
        .O(\aImdbuf[9]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbuf_reg[0] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbuf[0]_i_1_n_0 ),
        .Q(\aImdbuf_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbuf_reg[10] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbuf[10]_i_2_n_0 ),
        .Q(\aImdbuf_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbuf_reg[1] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbuf[1]_i_1_n_0 ),
        .Q(\aImdbuf_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbuf_reg[2] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbuf[2]_i_1_n_0 ),
        .Q(\aImdbuf_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbuf_reg[3] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbuf[3]_i_1_n_0 ),
        .Q(\aImdbuf_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbuf_reg[4] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbuf[4]_i_1_n_0 ),
        .Q(\aImdbuf_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbuf_reg[5] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbuf[5]_i_1_n_0 ),
        .Q(\aImdbuf_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbuf_reg[6] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbuf[6]_i_1_n_0 ),
        .Q(\aImdbuf_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbuf_reg[7] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbuf[7]_i_1_n_0 ),
        .Q(\aImdbuf_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbuf_reg[8] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbuf[8]_i_1_n_0 ),
        .Q(\aImdbuf_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \aImdbuf_reg[9] 
       (.C(aclk_sig),
        .CE(aImdbufB),
        .CLR(linNotLog_reg_0),
        .D(\aImdbuf[9]_i_1_n_0 ),
        .Q(\aImdbuf_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'h0000000020200020)) 
    \abcde[0]_i_1 
       (.I0(stateCorner[0]),
        .I1(stateCorner[1]),
        .I2(rng_reg_0),
        .I3(abcde__0[2]),
        .I4(abcde__0[1]),
        .I5(abcde__0[0]),
        .O(\abcde[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00002800)) 
    \abcde[1]_i_1 
       (.I0(rng_reg_1),
        .I1(abcde__0[0]),
        .I2(abcde__0[1]),
        .I3(stateCorner[0]),
        .I4(stateCorner[1]),
        .O(\abcde[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h33BB3F3333BB3333)) 
    \abcde[2]_i_1 
       (.I0(ceScore),
        .I1(rng_reg_1),
        .I2(\tkst_reg[0]_0 ),
        .I3(stateCorner[1]),
        .I4(stateCorner[0]),
        .I5(\stateCorner[1]_i_4_n_0 ),
        .O(\abcde[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000028800000)) 
    \abcde[2]_i_2 
       (.I0(rng_reg_1),
        .I1(abcde__0[0]),
        .I2(abcde__0[1]),
        .I3(abcde__0[2]),
        .I4(stateCorner[0]),
        .I5(stateCorner[1]),
        .O(\abcde[2]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \abcde_reg[0] 
       (.C(aclk_sig),
        .CE(\abcde[2]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\abcde[0]_i_1_n_0 ),
        .Q(abcde__0[0]));
  FDCE #(
    .INIT(1'b0)) 
    \abcde_reg[1] 
       (.C(aclk_sig),
        .CE(\abcde[2]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\abcde[1]_i_1_n_0 ),
        .Q(abcde__0[1]));
  FDCE #(
    .INIT(1'b0)) 
    \abcde_reg[2] 
       (.C(aclk_sig),
        .CE(\abcde[2]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\abcde[2]_i_2_n_0 ),
        .Q(abcde__0[2]));
  (* SOFT_HLUTNM = "soft_lutpair833" *) 
  LUT3 #(
    .INIT(8'h8C)) 
    ackInvAcquire_sig_i_1
       (.I0(\stateOp_reg[1]_0 [1]),
        .I1(reqInvAcquire),
        .I2(\stateOp_reg[1]_0 [0]),
        .O(ackInvAcquire_sig));
  FDCE ackInvAcquire_sig_reg
       (.C(aclk_sig),
        .CE(E),
        .CLR(linNotLog_reg_0),
        .D(ackInvAcquire_sig),
        .Q(ackInvCornerAcquire));
  LUT4 #(
    .INIT(16'h2030)) 
    ackInvConfig_sig_i_1__0
       (.I0(\stateOp_reg[1]_0 [1]),
        .I1(reqInvAcquire),
        .I2(reqInvCornerConfig),
        .I3(\stateOp_reg[1]_0 [0]),
        .O(ackInvConfig_sig));
  FDCE ackInvConfig_sig_reg
       (.C(aclk_sig),
        .CE(E),
        .CLR(linNotLog_reg_0),
        .D(ackInvConfig_sig),
        .Q(ackInvCornerConfig));
  FDCE ackInvSet_sig_reg
       (.C(aclk_sig),
        .CE(E),
        .CLR(linNotLog_reg_0),
        .D(ackInvSet_sig),
        .Q(ackInvCornerSet));
  FDCE ackInvUnlock_sig_reg
       (.C(aclk_sig),
        .CE(E),
        .CLR(linNotLog_reg_0),
        .D(ackInvUnlock_sig0_in),
        .Q(ackInvCornerUnlock));
  LUT2 #(
    .INIT(4'h2)) 
    \capt[1]_i_1 
       (.I0(\tixVState_reg[1]_0 [0]),
        .I1(\capt_reg[1] ),
        .O(D[0]));
  LUT2 #(
    .INIT(4'h2)) 
    \capt[2]_i_1 
       (.I0(\tixVState_reg[1]_0 [1]),
        .I1(\capt_reg[2] ),
        .O(D[1]));
  LUT5 #(
    .INIT(32'h04FF0400)) 
    ceMaxsel_i_1
       (.I0(\aImdbuf[10]_i_6_n_0 ),
        .I1(rng_reg_0),
        .I2(\aImdbuf[10]_i_3_n_0 ),
        .I3(ceMaxsel_i_2_n_0),
        .I4(ceMaxsel_reg_n_0),
        .O(ceMaxsel_i_1_n_0));
  LUT6 #(
    .INIT(64'h55775577DD77FD77)) 
    ceMaxsel_i_2
       (.I0(rng_reg_0),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(ceScore),
        .I3(\stateImdstream_reg_n_0_[1] ),
        .I4(\aImdbuf[10]_i_3_n_0 ),
        .I5(p_1_in),
        .O(ceMaxsel_i_2_n_0));
  FDCE ceMaxsel_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(ceMaxsel_i_1_n_0),
        .Q(ceMaxsel_reg_n_0));
  LUT6 #(
    .INIT(64'hAAAAAAAA00002000)) 
    ceScore_i_1
       (.I0(rng_reg_1),
        .I1(stateCorner[1]),
        .I2(stateCorner[0]),
        .I3(grayVideoinToManyAXIS_tvalid),
        .I4(\tkst_reg[0]_0 ),
        .I5(\stateCorner[0]_i_2_n_0 ),
        .O(ceScore15_out));
  FDCE ceScore_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(ceScore15_out),
        .Q(ceScore));
  FDCE #(
    .INIT(1'b0)) 
    \col0_reg[0] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col0_reg[10]_0 [0]),
        .Q(col0[0]));
  FDCE #(
    .INIT(1'b0)) 
    \col0_reg[10] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col0_reg[10]_0 [10]),
        .Q(col0[10]));
  FDCE #(
    .INIT(1'b0)) 
    \col0_reg[1] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col0_reg[10]_0 [1]),
        .Q(col0[1]));
  FDCE #(
    .INIT(1'b0)) 
    \col0_reg[2] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col0_reg[10]_0 [2]),
        .Q(col0[2]));
  FDCE #(
    .INIT(1'b0)) 
    \col0_reg[3] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col0_reg[10]_0 [3]),
        .Q(col0[3]));
  FDCE #(
    .INIT(1'b0)) 
    \col0_reg[4] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col0_reg[10]_0 [4]),
        .Q(col0[4]));
  FDCE #(
    .INIT(1'b0)) 
    \col0_reg[5] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col0_reg[10]_0 [5]),
        .Q(col0[5]));
  FDCE #(
    .INIT(1'b0)) 
    \col0_reg[6] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col0_reg[10]_0 [6]),
        .Q(col0[6]));
  FDCE #(
    .INIT(1'b0)) 
    \col0_reg[7] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col0_reg[10]_0 [7]),
        .Q(col0[7]));
  FDCE #(
    .INIT(1'b0)) 
    \col0_reg[8] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col0_reg[10]_0 [8]),
        .Q(col0[8]));
  FDCE #(
    .INIT(1'b0)) 
    \col0_reg[9] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col0_reg[10]_0 [9]),
        .Q(col0[9]));
  FDPE #(
    .INIT(1'b0)) 
    \col1_reg[0] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\col1_reg[10]_0 [0]),
        .PRE(linNotLog_reg_0),
        .Q(col1[0]));
  FDPE #(
    .INIT(1'b0)) 
    \col1_reg[10] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\col1_reg[10]_0 [10]),
        .PRE(linNotLog_reg_0),
        .Q(col1[10]));
  FDPE #(
    .INIT(1'b0)) 
    \col1_reg[1] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\col1_reg[10]_0 [1]),
        .PRE(linNotLog_reg_0),
        .Q(col1[1]));
  FDPE #(
    .INIT(1'b0)) 
    \col1_reg[2] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\col1_reg[10]_0 [2]),
        .PRE(linNotLog_reg_0),
        .Q(col1[2]));
  FDPE #(
    .INIT(1'b0)) 
    \col1_reg[3] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\col1_reg[10]_0 [3]),
        .PRE(linNotLog_reg_0),
        .Q(col1[3]));
  FDCE #(
    .INIT(1'b0)) 
    \col1_reg[4] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col1_reg[10]_0 [4]),
        .Q(col1[4]));
  FDCE #(
    .INIT(1'b0)) 
    \col1_reg[5] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\col1_reg[10]_0 [5]),
        .Q(col1[5]));
  FDPE #(
    .INIT(1'b0)) 
    \col1_reg[6] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\col1_reg[10]_0 [6]),
        .PRE(linNotLog_reg_0),
        .Q(col1[6]));
  FDPE #(
    .INIT(1'b0)) 
    \col1_reg[7] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\col1_reg[10]_0 [7]),
        .PRE(linNotLog_reg_0),
        .Q(col1[7]));
  FDPE #(
    .INIT(1'b0)) 
    \col1_reg[8] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\col1_reg[10]_0 [8]),
        .PRE(linNotLog_reg_0),
        .Q(col1[8]));
  FDPE #(
    .INIT(1'b0)) 
    \col1_reg[9] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\col1_reg[10]_0 [9]),
        .PRE(linNotLog_reg_0),
        .Q(col1[9]));
  (* SOFT_HLUTNM = "soft_lutpair801" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    \col_lcl[0]__0_i_1 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(rng_reg_0),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\col_lcl_reg[0]__0_n_0 ),
        .O(\col_lcl[0]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair854" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \col_lcl[0]_i_1 
       (.I0(\col_lcl[10]_i_5_n_0 ),
        .I1(\col_lcl_reg[10]_0 [0]),
        .O(\col_lcl[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF0000FFFF4440)) 
    \col_lcl[10]__0_i_1 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(ceMaxsel_reg_n_0),
        .I3(postNotLive_reg_n_0),
        .I4(\row_lcl[10]_i_1_n_0 ),
        .I5(\col_lcl[10]__0_i_3_n_0 ),
        .O(\col_lcl[10]__0_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hBD7EEBD7D7EBBD7E)) 
    \col_lcl[10]__0_i_10 
       (.I0(\col_lcl_reg[10]__0_n_0 ),
        .I1(\col_lcl_reg[9]__0_n_0 ),
        .I2(\col_lcl[10]__0_i_16_n_0 ),
        .I3(NColRaw[9]),
        .I4(NColRaw[8]),
        .I5(\col_lcl[10]__0_i_3_2 ),
        .O(\col_lcl[10]__0_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \col_lcl[10]__0_i_11 
       (.I0(\col_lcl_reg[5]__0_n_0 ),
        .I1(\col_lcl_reg[3]__0_n_0 ),
        .I2(\col_lcl_reg[1]__0_n_0 ),
        .I3(\col_lcl_reg[2]__0_n_0 ),
        .I4(\col_lcl_reg[4]__0_n_0 ),
        .I5(\col_lcl_reg[6]__0_n_0 ),
        .O(\col_lcl[10]__0_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hBD7EEBD7D7EBBD7E)) 
    \col_lcl[10]__0_i_12 
       (.I0(\col_lcl_reg[5]__0_n_0 ),
        .I1(\col_lcl_reg[4]__0_n_0 ),
        .I2(\col_lcl[10]__0_i_17_n_0 ),
        .I3(NColRaw[5]),
        .I4(NColRaw[4]),
        .I5(\col_lcl[10]__0_i_5_0 ),
        .O(\col_lcl[10]__0_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair777" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \col_lcl[10]__0_i_14 
       (.I0(\col_lcl_reg[4]__0_n_0 ),
        .I1(\col_lcl_reg[2]__0_n_0 ),
        .I2(\col_lcl_reg[1]__0_n_0 ),
        .I3(\col_lcl_reg[3]__0_n_0 ),
        .I4(\col_lcl_reg[5]__0_n_0 ),
        .O(\col_lcl[10]__0_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair827" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \col_lcl[10]__0_i_16 
       (.I0(\col_lcl_reg[7]__0_n_0 ),
        .I1(\col_lcl[10]__0_i_11_n_0 ),
        .I2(\col_lcl_reg[8]__0_n_0 ),
        .O(\col_lcl[10]__0_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair777" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \col_lcl[10]__0_i_17 
       (.I0(\col_lcl_reg[2]__0_n_0 ),
        .I1(\col_lcl_reg[1]__0_n_0 ),
        .I2(\col_lcl_reg[3]__0_n_0 ),
        .O(\col_lcl[10]__0_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h0008080008000800)) 
    \col_lcl[10]__0_i_2 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\col_lcl_reg[10]__0_n_0 ),
        .I4(\col_lcl[10]__0_i_4_n_0 ),
        .I5(\col_lcl_reg[0]__0_n_0 ),
        .O(\col_lcl[10]__0_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000010010000)) 
    \col_lcl[10]__0_i_3 
       (.I0(\col_lcl[10]__0_i_5_n_0 ),
        .I1(\col_lcl[10]__0_i_6_n_0 ),
        .I2(\col_lcl_reg[0]__0_0 ),
        .I3(\col_lcl[10]__0_i_8_n_0 ),
        .I4(\col_lcl[10]__0_i_9_n_0 ),
        .I5(\col_lcl[10]__0_i_10_n_0 ),
        .O(\col_lcl[10]__0_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair827" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \col_lcl[10]__0_i_4 
       (.I0(\col_lcl_reg[8]__0_n_0 ),
        .I1(\col_lcl[10]__0_i_11_n_0 ),
        .I2(\col_lcl_reg[7]__0_n_0 ),
        .I3(\col_lcl_reg[9]__0_n_0 ),
        .O(\col_lcl[10]__0_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hBEEEEBBBEBBBBEEE)) 
    \col_lcl[10]__0_i_5 
       (.I0(\col_lcl[10]__0_i_12_n_0 ),
        .I1(\col_lcl_reg[3]__0_n_0 ),
        .I2(\col_lcl_reg[2]__0_n_0 ),
        .I3(\col_lcl_reg[1]__0_n_0 ),
        .I4(NColRaw[3]),
        .I5(\col_lcl[10]__0_i_3_0 ),
        .O(\col_lcl[10]__0_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hEFFFFB7DFB7DEFFF)) 
    \col_lcl[10]__0_i_6 
       (.I0(\col_lcl_reg[0]__0_n_0 ),
        .I1(\col_lcl_reg[1]__0_n_0 ),
        .I2(NColRaw[1]),
        .I3(NColRaw[0]),
        .I4(NColRaw[2]),
        .I5(\col_lcl_reg[2]__0_n_0 ),
        .O(\col_lcl[10]__0_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair863" *) 
  LUT3 #(
    .INIT(8'h6A)) 
    \col_lcl[10]__0_i_8 
       (.I0(\col_lcl_reg[8]__0_n_0 ),
        .I1(\col_lcl_reg[7]__0_n_0 ),
        .I2(\col_lcl[10]__0_i_11_n_0 ),
        .O(\col_lcl[10]__0_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h4281142828144281)) 
    \col_lcl[10]__0_i_9 
       (.I0(\col_lcl_reg[7]__0_n_0 ),
        .I1(\col_lcl_reg[6]__0_n_0 ),
        .I2(\col_lcl[10]__0_i_14_n_0 ),
        .I3(NColRaw[7]),
        .I4(NColRaw[6]),
        .I5(\col_lcl[10]__0_i_3_1 ),
        .O(\col_lcl[10]__0_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00003800)) 
    \col_lcl[10]_i_1__0 
       (.I0(\aImdbufB_reg[0]_0 ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(\stateImdstream_reg_n_0_[0] ),
        .I3(ceScore),
        .I4(p_1_in),
        .I5(\col_lcl[10]_i_3_n_0 ),
        .O(\col_lcl[10]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair946" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \col_lcl[10]_i_2 
       (.I0(\col_lcl_reg[10]_0 [10]),
        .I1(\col_lcl[10]_i_4_n_0 ),
        .I2(\col_lcl[10]_i_5_n_0 ),
        .O(\col_lcl[10]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h0111FFFF)) 
    \col_lcl[10]_i_3 
       (.I0(\stateImdstream_reg_n_0_[0] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(\tkst_reg[0]_0 ),
        .I3(p_1_in),
        .I4(rng_reg_0),
        .O(\col_lcl[10]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \col_lcl[10]_i_4 
       (.I0(\col_lcl_reg[10]_0 [8]),
        .I1(\col_lcl_reg[10]_0 [7]),
        .I2(\col_lcl_reg[10]_0 [6]),
        .I3(\col_lcl[9]_i_2__0_n_0 ),
        .I4(\col_lcl_reg[10]_0 [9]),
        .O(\col_lcl[10]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair797" *) 
  LUT5 #(
    .INIT(32'h00005400)) 
    \col_lcl[10]_i_5 
       (.I0(\stateImdstream[1]_i_2_n_0 ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(\stateImdstream_reg_n_0_[0] ),
        .I3(rng_reg_0),
        .I4(p_1_in),
        .O(\col_lcl[10]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h00404000)) 
    \col_lcl[1]__0_i_1 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(rng_reg_0),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\col_lcl_reg[1]__0_n_0 ),
        .I4(\col_lcl_reg[0]__0_n_0 ),
        .O(\col_lcl[1]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair945" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \col_lcl[1]_i_1 
       (.I0(\col_lcl[10]_i_5_n_0 ),
        .I1(\col_lcl_reg[10]_0 [1]),
        .I2(\col_lcl_reg[10]_0 [0]),
        .O(\col_lcl[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0008080008000800)) 
    \col_lcl[2]__0_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\col_lcl_reg[2]__0_n_0 ),
        .I4(\col_lcl_reg[1]__0_n_0 ),
        .I5(\col_lcl_reg[0]__0_n_0 ),
        .O(\col_lcl[2]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair796" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \col_lcl[2]_i_1 
       (.I0(\col_lcl[10]_i_5_n_0 ),
        .I1(\col_lcl_reg[10]_0 [0]),
        .I2(\col_lcl_reg[10]_0 [1]),
        .I3(\col_lcl_reg[10]_0 [2]),
        .O(\col_lcl[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0880808080808080)) 
    \col_lcl[3]__0_i_1 
       (.I0(\col_lcl[8]__0_i_2_n_0 ),
        .I1(\col_lcl[8]__0_i_3_n_0 ),
        .I2(\col_lcl_reg[3]__0_n_0 ),
        .I3(\col_lcl_reg[2]__0_n_0 ),
        .I4(\col_lcl_reg[0]__0_n_0 ),
        .I5(\col_lcl_reg[1]__0_n_0 ),
        .O(\col_lcl[3]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair796" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \col_lcl[3]_i_1 
       (.I0(\col_lcl[10]_i_5_n_0 ),
        .I1(\col_lcl_reg[10]_0 [1]),
        .I2(\col_lcl_reg[10]_0 [0]),
        .I3(\col_lcl_reg[10]_0 [2]),
        .I4(\col_lcl_reg[10]_0 [3]),
        .O(\col_lcl[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00080800)) 
    \col_lcl[4]__0_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\col_lcl_reg[4]__0_n_0 ),
        .I4(\col_lcl[4]__0_i_2_n_0 ),
        .O(\col_lcl[4]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair781" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \col_lcl[4]__0_i_2 
       (.I0(\col_lcl_reg[2]__0_n_0 ),
        .I1(\col_lcl_reg[0]__0_n_0 ),
        .I2(\col_lcl_reg[1]__0_n_0 ),
        .I3(\col_lcl_reg[3]__0_n_0 ),
        .O(\col_lcl[4]__0_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \col_lcl[4]_i_1 
       (.I0(\col_lcl[10]_i_5_n_0 ),
        .I1(\col_lcl_reg[10]_0 [2]),
        .I2(\col_lcl_reg[10]_0 [0]),
        .I3(\col_lcl_reg[10]_0 [1]),
        .I4(\col_lcl_reg[10]_0 [3]),
        .I5(\col_lcl_reg[10]_0 [4]),
        .O(\col_lcl[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00080800)) 
    \col_lcl[5]__0_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\col_lcl_reg[5]__0_n_0 ),
        .I4(\col_lcl[5]__0_i_2_n_0 ),
        .O(\col_lcl[5]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair781" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \col_lcl[5]__0_i_2 
       (.I0(\col_lcl_reg[3]__0_n_0 ),
        .I1(\col_lcl_reg[1]__0_n_0 ),
        .I2(\col_lcl_reg[0]__0_n_0 ),
        .I3(\col_lcl_reg[2]__0_n_0 ),
        .I4(\col_lcl_reg[4]__0_n_0 ),
        .O(\col_lcl[5]__0_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair945" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \col_lcl[5]_i_1 
       (.I0(\col_lcl[10]_i_5_n_0 ),
        .I1(\col_lcl[5]_i_2__0_n_0 ),
        .I2(\col_lcl_reg[10]_0 [5]),
        .O(\col_lcl[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \col_lcl[5]_i_2__0 
       (.I0(\col_lcl_reg[10]_0 [3]),
        .I1(\col_lcl_reg[10]_0 [1]),
        .I2(\col_lcl_reg[10]_0 [0]),
        .I3(\col_lcl_reg[10]_0 [2]),
        .I4(\col_lcl_reg[10]_0 [4]),
        .O(\col_lcl[5]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'h00080800)) 
    \col_lcl[6]__0_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\col_lcl_reg[6]__0_n_0 ),
        .I4(\col_lcl[8]__0_i_4_n_0 ),
        .O(\col_lcl[6]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair946" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \col_lcl[6]_i_1 
       (.I0(\col_lcl[10]_i_5_n_0 ),
        .I1(\col_lcl[9]_i_2__0_n_0 ),
        .I2(\col_lcl_reg[10]_0 [6]),
        .O(\col_lcl[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0008080008000800)) 
    \col_lcl[7]__0_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\col_lcl_reg[7]__0_n_0 ),
        .I4(\col_lcl_reg[6]__0_n_0 ),
        .I5(\col_lcl[8]__0_i_4_n_0 ),
        .O(\col_lcl[7]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair785" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \col_lcl[7]_i_1 
       (.I0(\col_lcl[10]_i_5_n_0 ),
        .I1(\col_lcl[9]_i_2__0_n_0 ),
        .I2(\col_lcl_reg[10]_0 [6]),
        .I3(\col_lcl_reg[10]_0 [7]),
        .O(\col_lcl[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0880808080808080)) 
    \col_lcl[8]__0_i_1 
       (.I0(\col_lcl[8]__0_i_2_n_0 ),
        .I1(\col_lcl[8]__0_i_3_n_0 ),
        .I2(\col_lcl_reg[8]__0_n_0 ),
        .I3(\col_lcl_reg[7]__0_n_0 ),
        .I4(\col_lcl[8]__0_i_4_n_0 ),
        .I5(\col_lcl_reg[6]__0_n_0 ),
        .O(\col_lcl[8]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair786" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \col_lcl[8]__0_i_2 
       (.I0(\stateMaxsel_reg_n_0_[0] ),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(rng_reg_0),
        .O(\col_lcl[8]__0_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair789" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \col_lcl[8]__0_i_3 
       (.I0(\stateMaxsel_reg_n_0_[0] ),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .O(\col_lcl[8]__0_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \col_lcl[8]__0_i_4 
       (.I0(\col_lcl_reg[4]__0_n_0 ),
        .I1(\col_lcl_reg[2]__0_n_0 ),
        .I2(\col_lcl_reg[0]__0_n_0 ),
        .I3(\col_lcl_reg[1]__0_n_0 ),
        .I4(\col_lcl_reg[3]__0_n_0 ),
        .I5(\col_lcl_reg[5]__0_n_0 ),
        .O(\col_lcl[8]__0_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair785" *) 
  LUT5 #(
    .INIT(32'h7F008000)) 
    \col_lcl[8]_i_1__0 
       (.I0(\col_lcl_reg[10]_0 [7]),
        .I1(\col_lcl_reg[10]_0 [6]),
        .I2(\col_lcl[9]_i_2__0_n_0 ),
        .I3(\col_lcl[10]_i_5_n_0 ),
        .I4(\col_lcl_reg[10]_0 [8]),
        .O(\col_lcl[8]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0008080008000800)) 
    \col_lcl[9]__0_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\col_lcl_reg[9]__0_n_0 ),
        .I4(\col_lcl_reg[8]__0_n_0 ),
        .I5(\col_lcl[9]__0_i_2_n_0 ),
        .O(\col_lcl[9]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair863" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \col_lcl[9]__0_i_2 
       (.I0(\col_lcl_reg[6]__0_n_0 ),
        .I1(\col_lcl[8]__0_i_4_n_0 ),
        .I2(\col_lcl_reg[7]__0_n_0 ),
        .O(\col_lcl[9]__0_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h7FFF000080000000)) 
    \col_lcl[9]_i_1__0 
       (.I0(\col_lcl[9]_i_2__0_n_0 ),
        .I1(\col_lcl_reg[10]_0 [6]),
        .I2(\col_lcl_reg[10]_0 [7]),
        .I3(\col_lcl_reg[10]_0 [8]),
        .I4(\col_lcl[10]_i_5_n_0 ),
        .I5(\col_lcl_reg[10]_0 [9]),
        .O(\col_lcl[9]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \col_lcl[9]_i_2__0 
       (.I0(\col_lcl_reg[10]_0 [4]),
        .I1(\col_lcl_reg[10]_0 [2]),
        .I2(\col_lcl_reg[10]_0 [0]),
        .I3(\col_lcl_reg[10]_0 [1]),
        .I4(\col_lcl_reg[10]_0 [3]),
        .I5(\col_lcl_reg[10]_0 [5]),
        .O(\col_lcl[9]_i_2__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1__0_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[0]_i_1_n_0 ),
        .Q(\col_lcl_reg[10]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[0]__0 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__0_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[0]__0_i_1_n_0 ),
        .Q(\col_lcl_reg[0]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1__0_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[10]_i_2_n_0 ),
        .Q(\col_lcl_reg[10]_0 [10]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[10]__0 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__0_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[10]__0_i_2_n_0 ),
        .Q(\col_lcl_reg[10]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1__0_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[1]_i_1_n_0 ),
        .Q(\col_lcl_reg[10]_0 [1]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[1]__0 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__0_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[1]__0_i_1_n_0 ),
        .Q(\col_lcl_reg[1]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1__0_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[2]_i_1_n_0 ),
        .Q(\col_lcl_reg[10]_0 [2]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[2]__0 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__0_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[2]__0_i_1_n_0 ),
        .Q(\col_lcl_reg[2]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1__0_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[3]_i_1_n_0 ),
        .Q(\col_lcl_reg[10]_0 [3]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[3]__0 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__0_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[3]__0_i_1_n_0 ),
        .Q(\col_lcl_reg[3]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1__0_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[4]_i_1_n_0 ),
        .Q(\col_lcl_reg[10]_0 [4]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[4]__0 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__0_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[4]__0_i_1_n_0 ),
        .Q(\col_lcl_reg[4]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1__0_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[5]_i_1_n_0 ),
        .Q(\col_lcl_reg[10]_0 [5]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[5]__0 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__0_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[5]__0_i_1_n_0 ),
        .Q(\col_lcl_reg[5]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1__0_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[6]_i_1_n_0 ),
        .Q(\col_lcl_reg[10]_0 [6]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[6]__0 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__0_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[6]__0_i_1_n_0 ),
        .Q(\col_lcl_reg[6]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1__0_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[7]_i_1_n_0 ),
        .Q(\col_lcl_reg[10]_0 [7]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[7]__0 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__0_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[7]__0_i_1_n_0 ),
        .Q(\col_lcl_reg[7]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1__0_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[8]_i_1__0_n_0 ),
        .Q(\col_lcl_reg[10]_0 [8]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[8]__0 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__0_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[8]__0_i_1_n_0 ),
        .Q(\col_lcl_reg[8]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1__0_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[9]_i_1__0_n_0 ),
        .Q(\col_lcl_reg[10]_0 [9]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[9]__0 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__0_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\col_lcl[9]__0_i_1_n_0 ),
        .Q(\col_lcl_reg[9]__0_n_0 ));
  LUT6 #(
    .INIT(64'h0200020000000200)) 
    \colmax_lcl[0]_i_1 
       (.I0(rng_reg_0),
        .I1(\colmax_lcl_reg_n_0_[0] ),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\colmax_lcl_reg_n_0_[2] ),
        .I5(\colmax_lcl_reg_n_0_[1] ),
        .O(\colmax_lcl[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00404000)) 
    \colmax_lcl[1]_i_1 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(rng_reg_0),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\colmax_lcl_reg_n_0_[0] ),
        .I4(\colmax_lcl_reg_n_0_[1] ),
        .O(\colmax_lcl[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAAAFEAA)) 
    \colmax_lcl[2]_i_1 
       (.I0(\row_lcl[10]_i_1_n_0 ),
        .I1(postNotLive_reg_n_0),
        .I2(ceMaxsel_reg_n_0),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\stateMaxsel_reg_n_0_[1] ),
        .O(colmax_lcl));
  LUT6 #(
    .INIT(64'h0040400040000000)) 
    \colmax_lcl[2]_i_2 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(rng_reg_0),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\colmax_lcl_reg_n_0_[2] ),
        .I4(\colmax_lcl_reg_n_0_[1] ),
        .I5(\colmax_lcl_reg_n_0_[0] ),
        .O(\colmax_lcl[2]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \colmax_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(colmax_lcl),
        .CLR(linNotLog_reg_0),
        .D(\colmax_lcl[0]_i_1_n_0 ),
        .Q(\colmax_lcl_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \colmax_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(colmax_lcl),
        .CLR(linNotLog_reg_0),
        .D(\colmax_lcl[1]_i_1_n_0 ),
        .Q(\colmax_lcl_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \colmax_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(colmax_lcl),
        .CLR(linNotLog_reg_0),
        .D(\colmax_lcl[2]_i_2_n_0 ),
        .Q(\colmax_lcl_reg_n_0_[2] ));
  (* SOFT_HLUTNM = "soft_lutpair1122" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[0]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[84] ),
        .O(\colsumX4p1[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1117" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[10]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[94] ),
        .O(\colsumX4p1[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1117" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[11]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[95] ),
        .O(\colsumX4p1[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1116" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[12]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[96] ),
        .O(\colsumX4p1[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1116" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[13]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[97] ),
        .O(\colsumX4p1[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1115" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[14]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[98] ),
        .O(\colsumX4p1[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1115" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[15]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[99] ),
        .O(\colsumX4p1[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1114" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[16]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\colsumX_reg_n_0_[100] ),
        .O(\colsumX4p1[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1113" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[17]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\colsumX_reg_n_0_[101] ),
        .O(\colsumX4p1[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1113" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[18]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\colsumX_reg_n_0_[102] ),
        .O(\colsumX4p1[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1112" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[19]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\colsumX_reg_n_0_[103] ),
        .O(\colsumX4p1[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1122" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[1]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[85] ),
        .O(\colsumX4p1[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1112" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[20]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\colsumX_reg_n_0_[104] ),
        .O(\colsumX4p1[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1121" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[2]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[86] ),
        .O(\colsumX4p1[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1121" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[3]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[87] ),
        .O(\colsumX4p1[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1120" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[4]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[88] ),
        .O(\colsumX4p1[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1120" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[5]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[89] ),
        .O(\colsumX4p1[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1119" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[6]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[90] ),
        .O(\colsumX4p1[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1119" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[7]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[91] ),
        .O(\colsumX4p1[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1118" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[8]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[92] ),
        .O(\colsumX4p1[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1118" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p1[9]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(\colsumX_reg_n_0_[93] ),
        .O(\colsumX4p1[9]_i_1_n_0 ));
  FDCE \colsumX4p1_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[0]_i_1_n_0 ),
        .Q(colsumX4p1[0]));
  FDCE \colsumX4p1_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[10]_i_1_n_0 ),
        .Q(colsumX4p1[10]));
  FDCE \colsumX4p1_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[11]_i_1_n_0 ),
        .Q(colsumX4p1[11]));
  FDCE \colsumX4p1_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[12]_i_1_n_0 ),
        .Q(colsumX4p1[12]));
  FDCE \colsumX4p1_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[13]_i_1_n_0 ),
        .Q(colsumX4p1[13]));
  FDCE \colsumX4p1_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[14]_i_1_n_0 ),
        .Q(colsumX4p1[14]));
  FDCE \colsumX4p1_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[15]_i_1_n_0 ),
        .Q(colsumX4p1[15]));
  FDCE \colsumX4p1_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[16]_i_1_n_0 ),
        .Q(colsumX4p1[16]));
  FDCE \colsumX4p1_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[17]_i_1_n_0 ),
        .Q(colsumX4p1[17]));
  FDCE \colsumX4p1_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[18]_i_1_n_0 ),
        .Q(colsumX4p1[18]));
  FDCE \colsumX4p1_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[19]_i_1_n_0 ),
        .Q(colsumX4p1[19]));
  FDCE \colsumX4p1_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[1]_i_1_n_0 ),
        .Q(colsumX4p1[1]));
  FDCE \colsumX4p1_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[20]_i_1_n_0 ),
        .Q(colsumX4p1[20]));
  FDCE \colsumX4p1_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[2]_i_1_n_0 ),
        .Q(colsumX4p1[2]));
  FDCE \colsumX4p1_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[3]_i_1_n_0 ),
        .Q(colsumX4p1[3]));
  FDCE \colsumX4p1_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[4]_i_1_n_0 ),
        .Q(colsumX4p1[4]));
  FDCE \colsumX4p1_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[5]_i_1_n_0 ),
        .Q(colsumX4p1[5]));
  FDCE \colsumX4p1_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[6]_i_1_n_0 ),
        .Q(colsumX4p1[6]));
  FDCE \colsumX4p1_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[7]_i_1_n_0 ),
        .Q(colsumX4p1[7]));
  FDCE \colsumX4p1_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[8]_i_1_n_0 ),
        .Q(colsumX4p1[8]));
  FDCE \colsumX4p1_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p1[9]_i_1_n_0 ),
        .Q(colsumX4p1[9]));
  (* SOFT_HLUTNM = "soft_lutpair1132" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[0]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[0]),
        .O(\colsumX4p2[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1127" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[10]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[10]),
        .O(\colsumX4p2[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1127" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[11]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[11]),
        .O(\colsumX4p2[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1126" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[12]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[12]),
        .O(\colsumX4p2[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1126" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[13]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[13]),
        .O(\colsumX4p2[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1125" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[14]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[14]),
        .O(\colsumX4p2[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1125" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[15]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[15]),
        .O(\colsumX4p2[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1124" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[16]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(colsumX4p1[16]),
        .O(\colsumX4p2[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1124" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[17]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(colsumX4p1[17]),
        .O(\colsumX4p2[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1123" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[18]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(colsumX4p1[18]),
        .O(\colsumX4p2[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1123" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[19]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(colsumX4p1[19]),
        .O(\colsumX4p2[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1132" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[1]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[1]),
        .O(\colsumX4p2[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1114" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[20]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(colsumX4p1[20]),
        .O(\colsumX4p2[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1131" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[2]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[2]),
        .O(\colsumX4p2[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1131" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[3]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[3]),
        .O(\colsumX4p2[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1130" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[4]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[4]),
        .O(\colsumX4p2[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1130" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[5]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[5]),
        .O(\colsumX4p2[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1129" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[6]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[6]),
        .O(\colsumX4p2[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1129" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[7]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[7]),
        .O(\colsumX4p2[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1128" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[8]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[8]),
        .O(\colsumX4p2[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1128" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumX4p2[9]_i_1 
       (.I0(stateScore_reg_rep__9_n_0),
        .I1(colsumX4p1[9]),
        .O(\colsumX4p2[9]_i_1_n_0 ));
  FDCE \colsumX4p2_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[0]_i_1_n_0 ),
        .Q(colsumX4p2[0]));
  FDCE \colsumX4p2_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[10]_i_1_n_0 ),
        .Q(colsumX4p2[10]));
  FDCE \colsumX4p2_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[11]_i_1_n_0 ),
        .Q(colsumX4p2[11]));
  FDCE \colsumX4p2_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[12]_i_1_n_0 ),
        .Q(colsumX4p2[12]));
  FDCE \colsumX4p2_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[13]_i_1_n_0 ),
        .Q(colsumX4p2[13]));
  FDCE \colsumX4p2_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[14]_i_1_n_0 ),
        .Q(colsumX4p2[14]));
  FDCE \colsumX4p2_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[15]_i_1_n_0 ),
        .Q(colsumX4p2[15]));
  FDCE \colsumX4p2_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[16]_i_1_n_0 ),
        .Q(colsumX4p2[16]));
  FDCE \colsumX4p2_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[17]_i_1_n_0 ),
        .Q(colsumX4p2[17]));
  FDCE \colsumX4p2_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[18]_i_1_n_0 ),
        .Q(colsumX4p2[18]));
  FDCE \colsumX4p2_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[19]_i_1_n_0 ),
        .Q(colsumX4p2[19]));
  FDCE \colsumX4p2_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[1]_i_1_n_0 ),
        .Q(colsumX4p2[1]));
  FDCE \colsumX4p2_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[20]_i_1_n_0 ),
        .Q(colsumX4p2[20]));
  FDCE \colsumX4p2_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[2]_i_1_n_0 ),
        .Q(colsumX4p2[2]));
  FDCE \colsumX4p2_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[3]_i_1_n_0 ),
        .Q(colsumX4p2[3]));
  FDCE \colsumX4p2_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[4]_i_1_n_0 ),
        .Q(colsumX4p2[4]));
  FDCE \colsumX4p2_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[5]_i_1_n_0 ),
        .Q(colsumX4p2[5]));
  FDCE \colsumX4p2_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[6]_i_1_n_0 ),
        .Q(colsumX4p2[6]));
  FDCE \colsumX4p2_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[7]_i_1_n_0 ),
        .Q(colsumX4p2[7]));
  FDCE \colsumX4p2_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[8]_i_1_n_0 ),
        .Q(colsumX4p2[8]));
  FDCE \colsumX4p2_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX4p2[9]_i_1_n_0 ),
        .Q(colsumX4p2[9]));
  (* SOFT_HLUTNM = "soft_lutpair936" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \colsumXA[0]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(\xsqr_reg_n_0_[0] ),
        .I2(RESIZE0_in[0]),
        .O(\colsumXA[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1068" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[10]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[10]),
        .O(\colsumXA[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1068" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[11]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[11]),
        .O(\colsumXA[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1067" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[12]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[12]),
        .O(\colsumXA[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1067" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[13]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[13]),
        .O(\colsumXA[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1066" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[14]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[14]),
        .O(\colsumXA[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1066" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[15]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[15]),
        .O(\colsumXA[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1065" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[16]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumXA0[16]),
        .O(\colsumXA[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1065" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[17]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumXA0[17]),
        .O(\colsumXA[17]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[17]_i_10 
       (.I0(RESIZE0_in[11]),
        .I1(\xsqr_reg_n_0_[11] ),
        .O(\colsumXA[17]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[17]_i_11 
       (.I0(RESIZE0_in[10]),
        .I1(\xsqr_reg_n_0_[10] ),
        .O(\colsumXA[17]_i_11_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \colsumXA[17]_i_3 
       (.I0(RESIZE0_in[17]),
        .O(\colsumXA[17]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[17]_i_4 
       (.I0(RESIZE0_in[17]),
        .I1(\xsqr_reg_n_0_[17] ),
        .O(\colsumXA[17]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[17]_i_5 
       (.I0(RESIZE0_in[16]),
        .I1(\xsqr_reg_n_0_[16] ),
        .O(\colsumXA[17]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[17]_i_6 
       (.I0(RESIZE0_in[15]),
        .I1(\xsqr_reg_n_0_[15] ),
        .O(\colsumXA[17]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[17]_i_7 
       (.I0(RESIZE0_in[14]),
        .I1(\xsqr_reg_n_0_[14] ),
        .O(\colsumXA[17]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[17]_i_8 
       (.I0(RESIZE0_in[13]),
        .I1(\xsqr_reg_n_0_[13] ),
        .O(\colsumXA[17]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[17]_i_9 
       (.I0(RESIZE0_in[12]),
        .I1(\xsqr_reg_n_0_[12] ),
        .O(\colsumXA[17]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1057" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \colsumXA[18]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(\colsumXA_reg[18]_i_2_n_7 ),
        .O(\colsumXA[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair937" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \colsumXA[19]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(RESIZE[0]),
        .I2(\xsqr_reg_n_0_[54] ),
        .O(\colsumXA[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair936" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXA[1]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(RESIZE0_in[0]),
        .I2(\xsqr_reg_n_0_[0] ),
        .O(\colsumXA[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair937" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXA[20]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(\xsqr_reg_n_0_[54] ),
        .I2(RESIZE[0]),
        .O(\colsumXA[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1064" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[21]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[2]),
        .O(\colsumXA[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1064" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[22]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[3]),
        .O(\colsumXA[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1063" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[23]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[4]),
        .O(\colsumXA[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1063" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[24]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[5]),
        .O(\colsumXA[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1062" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[25]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[6]),
        .O(\colsumXA[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1062" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[26]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[7]),
        .O(\colsumXA[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1061" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[27]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[8]),
        .O(\colsumXA[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1061" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[28]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[9]),
        .O(\colsumXA[28]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[28]_i_10 
       (.I0(\xsqr_reg_n_0_[56] ),
        .I1(RESIZE[2]),
        .O(\colsumXA[28]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[28]_i_3 
       (.I0(\xsqr_reg_n_0_[63] ),
        .I1(RESIZE[9]),
        .O(\colsumXA[28]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[28]_i_4 
       (.I0(\xsqr_reg_n_0_[62] ),
        .I1(RESIZE[8]),
        .O(\colsumXA[28]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[28]_i_5 
       (.I0(\xsqr_reg_n_0_[61] ),
        .I1(RESIZE[7]),
        .O(\colsumXA[28]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[28]_i_6 
       (.I0(\xsqr_reg_n_0_[60] ),
        .I1(RESIZE[6]),
        .O(\colsumXA[28]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[28]_i_7 
       (.I0(\xsqr_reg_n_0_[59] ),
        .I1(RESIZE[5]),
        .O(\colsumXA[28]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[28]_i_8 
       (.I0(\xsqr_reg_n_0_[58] ),
        .I1(RESIZE[4]),
        .O(\colsumXA[28]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[28]_i_9 
       (.I0(\xsqr_reg_n_0_[57] ),
        .I1(RESIZE[3]),
        .O(\colsumXA[28]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1060" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[29]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[10]),
        .O(\colsumXA[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1072" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[2]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[2]),
        .O(\colsumXA[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1060" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[30]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[11]),
        .O(\colsumXA[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1059" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[31]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[12]),
        .O(\colsumXA[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1059" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[32]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[13]),
        .O(\colsumXA[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1058" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[33]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[14]),
        .O(\colsumXA[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1058" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[34]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA00_in[15]),
        .O(\colsumXA[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1057" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[35]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumXA00_in[16]),
        .O(\colsumXA[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1056" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[36]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumXA00_in[17]),
        .O(\colsumXA[36]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[36]_i_10 
       (.I0(\xsqr_reg_n_0_[65] ),
        .I1(RESIZE[11]),
        .O(\colsumXA[36]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[36]_i_11 
       (.I0(\xsqr_reg_n_0_[64] ),
        .I1(RESIZE[10]),
        .O(\colsumXA[36]_i_11_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \colsumXA[36]_i_3 
       (.I0(\xsqr_reg_n_0_[71] ),
        .O(\colsumXA[36]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[36]_i_4 
       (.I0(\xsqr_reg_n_0_[71] ),
        .I1(RESIZE[17]),
        .O(\colsumXA[36]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[36]_i_5 
       (.I0(\xsqr_reg_n_0_[70] ),
        .I1(RESIZE[16]),
        .O(\colsumXA[36]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[36]_i_6 
       (.I0(\xsqr_reg_n_0_[69] ),
        .I1(RESIZE[15]),
        .O(\colsumXA[36]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[36]_i_7 
       (.I0(\xsqr_reg_n_0_[68] ),
        .I1(RESIZE[14]),
        .O(\colsumXA[36]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[36]_i_8 
       (.I0(\xsqr_reg_n_0_[67] ),
        .I1(RESIZE[13]),
        .O(\colsumXA[36]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[36]_i_9 
       (.I0(\xsqr_reg_n_0_[66] ),
        .I1(RESIZE[12]),
        .O(\colsumXA[36]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1056" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \colsumXA[37]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(\colsumXA_reg[37]_i_2_n_7 ),
        .O(\colsumXA[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1072" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[3]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[3]),
        .O(\colsumXA[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1071" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[4]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[4]),
        .O(\colsumXA[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1071" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[5]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[5]),
        .O(\colsumXA[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1070" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[6]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[6]),
        .O(\colsumXA[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1070" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[7]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[7]),
        .O(\colsumXA[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1069" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[8]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[8]),
        .O(\colsumXA[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1069" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXA[9]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(colsumXA0[9]),
        .O(\colsumXA[9]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[9]_i_10 
       (.I0(RESIZE0_in[2]),
        .I1(\xsqr_reg_n_0_[2] ),
        .O(\colsumXA[9]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[9]_i_3 
       (.I0(RESIZE0_in[9]),
        .I1(\xsqr_reg_n_0_[9] ),
        .O(\colsumXA[9]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[9]_i_4 
       (.I0(RESIZE0_in[8]),
        .I1(\xsqr_reg_n_0_[8] ),
        .O(\colsumXA[9]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[9]_i_5 
       (.I0(RESIZE0_in[7]),
        .I1(\xsqr_reg_n_0_[7] ),
        .O(\colsumXA[9]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[9]_i_6 
       (.I0(RESIZE0_in[6]),
        .I1(\xsqr_reg_n_0_[6] ),
        .O(\colsumXA[9]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[9]_i_7 
       (.I0(RESIZE0_in[5]),
        .I1(\xsqr_reg_n_0_[5] ),
        .O(\colsumXA[9]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[9]_i_8 
       (.I0(RESIZE0_in[4]),
        .I1(\xsqr_reg_n_0_[4] ),
        .O(\colsumXA[9]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXA[9]_i_9 
       (.I0(RESIZE0_in[3]),
        .I1(\xsqr_reg_n_0_[3] ),
        .O(\colsumXA[9]_i_9_n_0 ));
  FDCE \colsumXA_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[0]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[0] ));
  FDCE \colsumXA_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[10]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[10] ));
  FDCE \colsumXA_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[11]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[11] ));
  FDCE \colsumXA_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[12]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[12] ));
  FDCE \colsumXA_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[13]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[13] ));
  FDCE \colsumXA_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[14]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[14] ));
  FDCE \colsumXA_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[15]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[15] ));
  FDCE \colsumXA_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[16]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[16] ));
  FDCE \colsumXA_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[17]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[17] ));
  CARRY8 \colsumXA_reg[17]_i_2 
       (.CI(\colsumXA_reg[9]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumXA_reg[17]_i_2_n_0 ,\colsumXA_reg[17]_i_2_n_1 ,\colsumXA_reg[17]_i_2_n_2 ,\colsumXA_reg[17]_i_2_n_3 ,\colsumXA_reg[17]_i_2_n_4 ,\colsumXA_reg[17]_i_2_n_5 ,\colsumXA_reg[17]_i_2_n_6 ,\colsumXA_reg[17]_i_2_n_7 }),
        .DI({\colsumXA[17]_i_3_n_0 ,RESIZE0_in[16:10]}),
        .O(colsumXA0[17:10]),
        .S({\colsumXA[17]_i_4_n_0 ,\colsumXA[17]_i_5_n_0 ,\colsumXA[17]_i_6_n_0 ,\colsumXA[17]_i_7_n_0 ,\colsumXA[17]_i_8_n_0 ,\colsumXA[17]_i_9_n_0 ,\colsumXA[17]_i_10_n_0 ,\colsumXA[17]_i_11_n_0 }));
  FDCE \colsumXA_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[18]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[18] ));
  CARRY8 \colsumXA_reg[18]_i_2 
       (.CI(\colsumXA_reg[17]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumXA_reg[18]_i_2_CO_UNCONNECTED [7:1],\colsumXA_reg[18]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_colsumXA_reg[18]_i_2_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1}));
  FDCE \colsumXA_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[19]_i_1_n_0 ),
        .Q(ARG[19]));
  FDCE \colsumXA_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[1]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[1] ));
  FDCE \colsumXA_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[20]_i_1_n_0 ),
        .Q(ARG[20]));
  FDCE \colsumXA_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[21]_i_1_n_0 ),
        .Q(ARG[21]));
  FDCE \colsumXA_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[22]_i_1_n_0 ),
        .Q(ARG[22]));
  FDCE \colsumXA_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[23]_i_1_n_0 ),
        .Q(ARG[23]));
  FDCE \colsumXA_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[24]_i_1_n_0 ),
        .Q(ARG[24]));
  FDCE \colsumXA_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[25]_i_1_n_0 ),
        .Q(ARG[25]));
  FDCE \colsumXA_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[26]_i_1_n_0 ),
        .Q(ARG[26]));
  FDCE \colsumXA_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[27]_i_1_n_0 ),
        .Q(ARG[27]));
  FDCE \colsumXA_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[28]_i_1_n_0 ),
        .Q(ARG[28]));
  CARRY8 \colsumXA_reg[28]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumXA_reg[28]_i_2_n_0 ,\colsumXA_reg[28]_i_2_n_1 ,\colsumXA_reg[28]_i_2_n_2 ,\colsumXA_reg[28]_i_2_n_3 ,\colsumXA_reg[28]_i_2_n_4 ,\colsumXA_reg[28]_i_2_n_5 ,\colsumXA_reg[28]_i_2_n_6 ,\colsumXA_reg[28]_i_2_n_7 }),
        .DI({\xsqr_reg_n_0_[63] ,\xsqr_reg_n_0_[62] ,\xsqr_reg_n_0_[61] ,\xsqr_reg_n_0_[60] ,\xsqr_reg_n_0_[59] ,\xsqr_reg_n_0_[58] ,\xsqr_reg_n_0_[57] ,\xsqr_reg_n_0_[56] }),
        .O(colsumXA00_in[9:2]),
        .S({\colsumXA[28]_i_3_n_0 ,\colsumXA[28]_i_4_n_0 ,\colsumXA[28]_i_5_n_0 ,\colsumXA[28]_i_6_n_0 ,\colsumXA[28]_i_7_n_0 ,\colsumXA[28]_i_8_n_0 ,\colsumXA[28]_i_9_n_0 ,\colsumXA[28]_i_10_n_0 }));
  FDCE \colsumXA_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[29]_i_1_n_0 ),
        .Q(ARG[29]));
  FDCE \colsumXA_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[2]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[2] ));
  FDCE \colsumXA_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[30]_i_1_n_0 ),
        .Q(ARG[30]));
  FDCE \colsumXA_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[31]_i_1_n_0 ),
        .Q(ARG[31]));
  FDCE \colsumXA_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[32]_i_1_n_0 ),
        .Q(ARG[32]));
  FDCE \colsumXA_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[33]_i_1_n_0 ),
        .Q(ARG[33]));
  FDCE \colsumXA_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[34]_i_1_n_0 ),
        .Q(ARG[34]));
  FDCE \colsumXA_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[35]_i_1_n_0 ),
        .Q(ARG[35]));
  FDCE \colsumXA_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[36]_i_1_n_0 ),
        .Q(ARG[36]));
  CARRY8 \colsumXA_reg[36]_i_2 
       (.CI(\colsumXA_reg[28]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumXA_reg[36]_i_2_n_0 ,\colsumXA_reg[36]_i_2_n_1 ,\colsumXA_reg[36]_i_2_n_2 ,\colsumXA_reg[36]_i_2_n_3 ,\colsumXA_reg[36]_i_2_n_4 ,\colsumXA_reg[36]_i_2_n_5 ,\colsumXA_reg[36]_i_2_n_6 ,\colsumXA_reg[36]_i_2_n_7 }),
        .DI({\colsumXA[36]_i_3_n_0 ,\xsqr_reg_n_0_[70] ,\xsqr_reg_n_0_[69] ,\xsqr_reg_n_0_[68] ,\xsqr_reg_n_0_[67] ,\xsqr_reg_n_0_[66] ,\xsqr_reg_n_0_[65] ,\xsqr_reg_n_0_[64] }),
        .O(colsumXA00_in[17:10]),
        .S({\colsumXA[36]_i_4_n_0 ,\colsumXA[36]_i_5_n_0 ,\colsumXA[36]_i_6_n_0 ,\colsumXA[36]_i_7_n_0 ,\colsumXA[36]_i_8_n_0 ,\colsumXA[36]_i_9_n_0 ,\colsumXA[36]_i_10_n_0 ,\colsumXA[36]_i_11_n_0 }));
  FDCE \colsumXA_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[37]_i_1_n_0 ),
        .Q(ARG[37]));
  CARRY8 \colsumXA_reg[37]_i_2 
       (.CI(\colsumXA_reg[36]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumXA_reg[37]_i_2_CO_UNCONNECTED [7:1],\colsumXA_reg[37]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_colsumXA_reg[37]_i_2_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1}));
  FDCE \colsumXA_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[3]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[3] ));
  FDCE \colsumXA_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[4]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[4] ));
  FDCE \colsumXA_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[5]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[5] ));
  FDCE \colsumXA_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[6]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[6] ));
  FDCE \colsumXA_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[7]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[7] ));
  FDCE \colsumXA_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[8]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[8] ));
  FDCE \colsumXA_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXA[9]_i_1_n_0 ),
        .Q(\colsumXA_reg_n_0_[9] ));
  CARRY8 \colsumXA_reg[9]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumXA_reg[9]_i_2_n_0 ,\colsumXA_reg[9]_i_2_n_1 ,\colsumXA_reg[9]_i_2_n_2 ,\colsumXA_reg[9]_i_2_n_3 ,\colsumXA_reg[9]_i_2_n_4 ,\colsumXA_reg[9]_i_2_n_5 ,\colsumXA_reg[9]_i_2_n_6 ,\colsumXA_reg[9]_i_2_n_7 }),
        .DI(RESIZE0_in[9:2]),
        .O(colsumXA0[9:2]),
        .S({\colsumXA[9]_i_3_n_0 ,\colsumXA[9]_i_4_n_0 ,\colsumXA[9]_i_5_n_0 ,\colsumXA[9]_i_6_n_0 ,\colsumXA[9]_i_7_n_0 ,\colsumXA[9]_i_8_n_0 ,\colsumXA[9]_i_9_n_0 ,\colsumXA[9]_i_10_n_0 }));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[15]_i_10 
       (.I0(\colsumXA_reg_n_0_[15] ),
        .I1(ARG[34]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[15]_i_11 
       (.I0(\colsumXA_reg_n_0_[14] ),
        .I1(ARG[33]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[15]_i_12 
       (.I0(\colsumXA_reg_n_0_[13] ),
        .I1(ARG[32]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[15]_i_13 
       (.I0(\colsumXA_reg_n_0_[12] ),
        .I1(ARG[31]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[15]_i_14 
       (.I0(\colsumXA_reg_n_0_[11] ),
        .I1(ARG[30]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[15]_i_15 
       (.I0(\colsumXA_reg_n_0_[10] ),
        .I1(ARG[29]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[15]_i_16 
       (.I0(\colsumXA_reg_n_0_[9] ),
        .I1(ARG[28]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[15]_i_17 
       (.I0(\colsumXA_reg_n_0_[8] ),
        .I1(ARG[27]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[15]_i_2 
       (.I0(\colsumXA_reg_n_0_[15] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[15]_i_3 
       (.I0(\colsumXA_reg_n_0_[14] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[15]_i_4 
       (.I0(\colsumXA_reg_n_0_[13] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[15]_i_5 
       (.I0(\colsumXA_reg_n_0_[12] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[15]_i_6 
       (.I0(\colsumXA_reg_n_0_[11] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[15]_i_7 
       (.I0(\colsumXA_reg_n_0_[10] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[15]_i_8 
       (.I0(\colsumXA_reg_n_0_[9] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[15]_i_9 
       (.I0(\colsumXA_reg_n_0_[8] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[15]_i_9_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[19]_i_2 
       (.I0(\colsumXA_reg_n_0_[18] ),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXB[19]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[19]_i_3 
       (.I0(\colsumXA_reg_n_0_[17] ),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXB[19]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[19]_i_4 
       (.I0(\colsumXA_reg_n_0_[16] ),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXB[19]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[19]_i_5 
       (.I0(\colsumXA_reg_n_0_[18] ),
        .I1(ARG[37]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXB[19]_i_5_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[19]_i_6 
       (.I0(\colsumXA_reg_n_0_[18] ),
        .I1(ARG[37]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXB[19]_i_6_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[19]_i_7 
       (.I0(\colsumXA_reg_n_0_[17] ),
        .I1(ARG[36]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXB[19]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[19]_i_8 
       (.I0(\colsumXA_reg_n_0_[16] ),
        .I1(ARG[35]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXB[19]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[7]_i_10 
       (.I0(\colsumXA_reg_n_0_[7] ),
        .I1(ARG[26]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[7]_i_11 
       (.I0(\colsumXA_reg_n_0_[6] ),
        .I1(ARG[25]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[7]_i_12 
       (.I0(\colsumXA_reg_n_0_[5] ),
        .I1(ARG[24]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[7]_i_13 
       (.I0(\colsumXA_reg_n_0_[4] ),
        .I1(ARG[23]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[7]_i_14 
       (.I0(\colsumXA_reg_n_0_[3] ),
        .I1(ARG[22]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[7]_i_15 
       (.I0(\colsumXA_reg_n_0_[2] ),
        .I1(ARG[21]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[7]_i_16 
       (.I0(\colsumXA_reg_n_0_[1] ),
        .I1(ARG[20]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXB[7]_i_17 
       (.I0(\colsumXA_reg_n_0_[0] ),
        .I1(ARG[19]),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[7]_i_2 
       (.I0(\colsumXA_reg_n_0_[7] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[7]_i_3 
       (.I0(\colsumXA_reg_n_0_[6] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[7]_i_4 
       (.I0(\colsumXA_reg_n_0_[5] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[7]_i_5 
       (.I0(\colsumXA_reg_n_0_[4] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[7]_i_6 
       (.I0(\colsumXA_reg_n_0_[3] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[7]_i_7 
       (.I0(\colsumXA_reg_n_0_[2] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[7]_i_8 
       (.I0(\colsumXA_reg_n_0_[1] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXB[7]_i_9 
       (.I0(\colsumXA_reg_n_0_[0] ),
        .I1(stateScore_reg_rep__12_n_0),
        .O(\colsumXB[7]_i_9_n_0 ));
  FDCE \colsumXB_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[7]_i_1_n_15 ),
        .Q(colsumXB[0]));
  FDCE \colsumXB_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[15]_i_1_n_13 ),
        .Q(colsumXB[10]));
  FDCE \colsumXB_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[15]_i_1_n_12 ),
        .Q(colsumXB[11]));
  FDCE \colsumXB_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[15]_i_1_n_11 ),
        .Q(colsumXB[12]));
  FDCE \colsumXB_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[15]_i_1_n_10 ),
        .Q(colsumXB[13]));
  FDCE \colsumXB_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[15]_i_1_n_9 ),
        .Q(colsumXB[14]));
  FDCE \colsumXB_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[15]_i_1_n_8 ),
        .Q(colsumXB[15]));
  CARRY8 \colsumXB_reg[15]_i_1 
       (.CI(\colsumXB_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumXB_reg[15]_i_1_n_0 ,\colsumXB_reg[15]_i_1_n_1 ,\colsumXB_reg[15]_i_1_n_2 ,\colsumXB_reg[15]_i_1_n_3 ,\colsumXB_reg[15]_i_1_n_4 ,\colsumXB_reg[15]_i_1_n_5 ,\colsumXB_reg[15]_i_1_n_6 ,\colsumXB_reg[15]_i_1_n_7 }),
        .DI({\colsumXB[15]_i_2_n_0 ,\colsumXB[15]_i_3_n_0 ,\colsumXB[15]_i_4_n_0 ,\colsumXB[15]_i_5_n_0 ,\colsumXB[15]_i_6_n_0 ,\colsumXB[15]_i_7_n_0 ,\colsumXB[15]_i_8_n_0 ,\colsumXB[15]_i_9_n_0 }),
        .O({\colsumXB_reg[15]_i_1_n_8 ,\colsumXB_reg[15]_i_1_n_9 ,\colsumXB_reg[15]_i_1_n_10 ,\colsumXB_reg[15]_i_1_n_11 ,\colsumXB_reg[15]_i_1_n_12 ,\colsumXB_reg[15]_i_1_n_13 ,\colsumXB_reg[15]_i_1_n_14 ,\colsumXB_reg[15]_i_1_n_15 }),
        .S({\colsumXB[15]_i_10_n_0 ,\colsumXB[15]_i_11_n_0 ,\colsumXB[15]_i_12_n_0 ,\colsumXB[15]_i_13_n_0 ,\colsumXB[15]_i_14_n_0 ,\colsumXB[15]_i_15_n_0 ,\colsumXB[15]_i_16_n_0 ,\colsumXB[15]_i_17_n_0 }));
  FDCE \colsumXB_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[19]_i_1_n_15 ),
        .Q(colsumXB[16]));
  FDCE \colsumXB_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[19]_i_1_n_14 ),
        .Q(colsumXB[17]));
  FDCE \colsumXB_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[19]_i_1_n_13 ),
        .Q(colsumXB[18]));
  FDCE \colsumXB_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[19]_i_1_n_12 ),
        .Q(colsumXB[19]));
  CARRY8 \colsumXB_reg[19]_i_1 
       (.CI(\colsumXB_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumXB_reg[19]_i_1_CO_UNCONNECTED [7:3],\colsumXB_reg[19]_i_1_n_5 ,\colsumXB_reg[19]_i_1_n_6 ,\colsumXB_reg[19]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\colsumXB[19]_i_2_n_0 ,\colsumXB[19]_i_3_n_0 ,\colsumXB[19]_i_4_n_0 }),
        .O({\NLW_colsumXB_reg[19]_i_1_O_UNCONNECTED [7:4],\colsumXB_reg[19]_i_1_n_12 ,\colsumXB_reg[19]_i_1_n_13 ,\colsumXB_reg[19]_i_1_n_14 ,\colsumXB_reg[19]_i_1_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,\colsumXB[19]_i_5_n_0 ,\colsumXB[19]_i_6_n_0 ,\colsumXB[19]_i_7_n_0 ,\colsumXB[19]_i_8_n_0 }));
  FDCE \colsumXB_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[7]_i_1_n_14 ),
        .Q(colsumXB[1]));
  FDCE \colsumXB_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[7]_i_1_n_13 ),
        .Q(colsumXB[2]));
  FDCE \colsumXB_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[7]_i_1_n_12 ),
        .Q(colsumXB[3]));
  FDCE \colsumXB_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[7]_i_1_n_11 ),
        .Q(colsumXB[4]));
  FDCE \colsumXB_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[7]_i_1_n_10 ),
        .Q(colsumXB[5]));
  FDCE \colsumXB_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[7]_i_1_n_9 ),
        .Q(colsumXB[6]));
  FDCE \colsumXB_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[7]_i_1_n_8 ),
        .Q(colsumXB[7]));
  CARRY8 \colsumXB_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumXB_reg[7]_i_1_n_0 ,\colsumXB_reg[7]_i_1_n_1 ,\colsumXB_reg[7]_i_1_n_2 ,\colsumXB_reg[7]_i_1_n_3 ,\colsumXB_reg[7]_i_1_n_4 ,\colsumXB_reg[7]_i_1_n_5 ,\colsumXB_reg[7]_i_1_n_6 ,\colsumXB_reg[7]_i_1_n_7 }),
        .DI({\colsumXB[7]_i_2_n_0 ,\colsumXB[7]_i_3_n_0 ,\colsumXB[7]_i_4_n_0 ,\colsumXB[7]_i_5_n_0 ,\colsumXB[7]_i_6_n_0 ,\colsumXB[7]_i_7_n_0 ,\colsumXB[7]_i_8_n_0 ,\colsumXB[7]_i_9_n_0 }),
        .O({\colsumXB_reg[7]_i_1_n_8 ,\colsumXB_reg[7]_i_1_n_9 ,\colsumXB_reg[7]_i_1_n_10 ,\colsumXB_reg[7]_i_1_n_11 ,\colsumXB_reg[7]_i_1_n_12 ,\colsumXB_reg[7]_i_1_n_13 ,\colsumXB_reg[7]_i_1_n_14 ,\colsumXB_reg[7]_i_1_n_15 }),
        .S({\colsumXB[7]_i_10_n_0 ,\colsumXB[7]_i_11_n_0 ,\colsumXB[7]_i_12_n_0 ,\colsumXB[7]_i_13_n_0 ,\colsumXB[7]_i_14_n_0 ,\colsumXB[7]_i_15_n_0 ,\colsumXB[7]_i_16_n_0 ,\colsumXB[7]_i_17_n_0 }));
  FDCE \colsumXB_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[15]_i_1_n_15 ),
        .Q(colsumXB[8]));
  FDCE \colsumXB_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXB_reg[15]_i_1_n_14 ),
        .Q(colsumXB[9]));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[15]_i_10 
       (.I0(xsqr4p2[15]),
        .I1(colsumXB[15]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[15]_i_11 
       (.I0(xsqr4p2[14]),
        .I1(colsumXB[14]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[15]_i_12 
       (.I0(xsqr4p2[13]),
        .I1(colsumXB[13]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[15]_i_13 
       (.I0(xsqr4p2[12]),
        .I1(colsumXB[12]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[15]_i_14 
       (.I0(xsqr4p2[11]),
        .I1(colsumXB[11]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[15]_i_15 
       (.I0(xsqr4p2[10]),
        .I1(colsumXB[10]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[15]_i_16 
       (.I0(xsqr4p2[9]),
        .I1(colsumXB[9]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[15]_i_17 
       (.I0(xsqr4p2[8]),
        .I1(colsumXB[8]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[15]_i_2 
       (.I0(xsqr4p2[15]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[15]_i_3 
       (.I0(xsqr4p2[14]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[15]_i_4 
       (.I0(xsqr4p2[13]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[15]_i_5 
       (.I0(xsqr4p2[12]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[15]_i_6 
       (.I0(xsqr4p2[11]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[15]_i_7 
       (.I0(xsqr4p2[10]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[15]_i_8 
       (.I0(xsqr4p2[9]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[15]_i_9 
       (.I0(xsqr4p2[8]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[20]_i_10 
       (.I0(xsqr4p2[16]),
        .I1(colsumXB[16]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXC[20]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[20]_i_2 
       (.I0(xsqr4p2[17]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXC[20]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[20]_i_3 
       (.I0(xsqr4p2[17]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXC[20]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[20]_i_4 
       (.I0(xsqr4p2[17]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXC[20]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[20]_i_5 
       (.I0(xsqr4p2[16]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXC[20]_i_5_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[20]_i_6 
       (.I0(xsqr4p2[17]),
        .I1(colsumXB[19]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXC[20]_i_6_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[20]_i_7 
       (.I0(xsqr4p2[17]),
        .I1(colsumXB[19]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXC[20]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[20]_i_8 
       (.I0(xsqr4p2[17]),
        .I1(colsumXB[18]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXC[20]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[20]_i_9 
       (.I0(xsqr4p2[17]),
        .I1(colsumXB[17]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXC[20]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[7]_i_10 
       (.I0(xsqr4p2[6]),
        .I1(colsumXB[6]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[7]_i_11 
       (.I0(xsqr4p2[5]),
        .I1(colsumXB[5]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[7]_i_12 
       (.I0(xsqr4p2[4]),
        .I1(colsumXB[4]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[7]_i_13 
       (.I0(xsqr4p2[3]),
        .I1(colsumXB[3]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[7]_i_14 
       (.I0(xsqr4p2[2]),
        .I1(colsumXB[2]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[7]_i_15 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(colsumXB[1]),
        .O(\colsumXC[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[7]_i_16 
       (.I0(xsqr4p2[0]),
        .I1(colsumXB[0]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[7]_i_2 
       (.I0(xsqr4p2[7]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[7]_i_3 
       (.I0(xsqr4p2[6]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[7]_i_4 
       (.I0(xsqr4p2[5]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[7]_i_5 
       (.I0(xsqr4p2[4]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[7]_i_6 
       (.I0(xsqr4p2[3]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[7]_i_7 
       (.I0(xsqr4p2[2]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXC[7]_i_8 
       (.I0(xsqr4p2[0]),
        .I1(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXC[7]_i_9 
       (.I0(xsqr4p2[7]),
        .I1(colsumXB[7]),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\colsumXC[7]_i_9_n_0 ));
  FDCE \colsumXC_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[7]_i_1_n_15 ),
        .Q(colsumX[21]));
  FDCE \colsumXC_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[15]_i_1_n_13 ),
        .Q(colsumX[31]));
  FDCE \colsumXC_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[15]_i_1_n_12 ),
        .Q(colsumX[32]));
  FDCE \colsumXC_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[15]_i_1_n_11 ),
        .Q(colsumX[33]));
  FDCE \colsumXC_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[15]_i_1_n_10 ),
        .Q(colsumX[34]));
  FDCE \colsumXC_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[15]_i_1_n_9 ),
        .Q(colsumX[35]));
  FDCE \colsumXC_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[15]_i_1_n_8 ),
        .Q(colsumX[36]));
  CARRY8 \colsumXC_reg[15]_i_1 
       (.CI(\colsumXC_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumXC_reg[15]_i_1_n_0 ,\colsumXC_reg[15]_i_1_n_1 ,\colsumXC_reg[15]_i_1_n_2 ,\colsumXC_reg[15]_i_1_n_3 ,\colsumXC_reg[15]_i_1_n_4 ,\colsumXC_reg[15]_i_1_n_5 ,\colsumXC_reg[15]_i_1_n_6 ,\colsumXC_reg[15]_i_1_n_7 }),
        .DI({\colsumXC[15]_i_2_n_0 ,\colsumXC[15]_i_3_n_0 ,\colsumXC[15]_i_4_n_0 ,\colsumXC[15]_i_5_n_0 ,\colsumXC[15]_i_6_n_0 ,\colsumXC[15]_i_7_n_0 ,\colsumXC[15]_i_8_n_0 ,\colsumXC[15]_i_9_n_0 }),
        .O({\colsumXC_reg[15]_i_1_n_8 ,\colsumXC_reg[15]_i_1_n_9 ,\colsumXC_reg[15]_i_1_n_10 ,\colsumXC_reg[15]_i_1_n_11 ,\colsumXC_reg[15]_i_1_n_12 ,\colsumXC_reg[15]_i_1_n_13 ,\colsumXC_reg[15]_i_1_n_14 ,\colsumXC_reg[15]_i_1_n_15 }),
        .S({\colsumXC[15]_i_10_n_0 ,\colsumXC[15]_i_11_n_0 ,\colsumXC[15]_i_12_n_0 ,\colsumXC[15]_i_13_n_0 ,\colsumXC[15]_i_14_n_0 ,\colsumXC[15]_i_15_n_0 ,\colsumXC[15]_i_16_n_0 ,\colsumXC[15]_i_17_n_0 }));
  FDCE \colsumXC_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[20]_i_1_n_15 ),
        .Q(colsumX[37]));
  FDCE \colsumXC_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[20]_i_1_n_14 ),
        .Q(colsumX[38]));
  FDCE \colsumXC_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[20]_i_1_n_13 ),
        .Q(colsumX[39]));
  FDCE \colsumXC_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[20]_i_1_n_12 ),
        .Q(colsumX[40]));
  FDCE \colsumXC_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[7]_i_1_n_14 ),
        .Q(colsumX[22]));
  FDCE \colsumXC_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[20]_i_1_n_11 ),
        .Q(colsumX[41]));
  CARRY8 \colsumXC_reg[20]_i_1 
       (.CI(\colsumXC_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumXC_reg[20]_i_1_CO_UNCONNECTED [7:4],\colsumXC_reg[20]_i_1_n_4 ,\colsumXC_reg[20]_i_1_n_5 ,\colsumXC_reg[20]_i_1_n_6 ,\colsumXC_reg[20]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,\colsumXC[20]_i_2_n_0 ,\colsumXC[20]_i_3_n_0 ,\colsumXC[20]_i_4_n_0 ,\colsumXC[20]_i_5_n_0 }),
        .O({\NLW_colsumXC_reg[20]_i_1_O_UNCONNECTED [7:5],\colsumXC_reg[20]_i_1_n_11 ,\colsumXC_reg[20]_i_1_n_12 ,\colsumXC_reg[20]_i_1_n_13 ,\colsumXC_reg[20]_i_1_n_14 ,\colsumXC_reg[20]_i_1_n_15 }),
        .S({1'b0,1'b0,1'b0,\colsumXC[20]_i_6_n_0 ,\colsumXC[20]_i_7_n_0 ,\colsumXC[20]_i_8_n_0 ,\colsumXC[20]_i_9_n_0 ,\colsumXC[20]_i_10_n_0 }));
  FDCE \colsumXC_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[7]_i_1_n_13 ),
        .Q(colsumX[23]));
  FDCE \colsumXC_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[7]_i_1_n_12 ),
        .Q(colsumX[24]));
  FDCE \colsumXC_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[7]_i_1_n_11 ),
        .Q(colsumX[25]));
  FDCE \colsumXC_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[7]_i_1_n_10 ),
        .Q(colsumX[26]));
  FDCE \colsumXC_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[7]_i_1_n_9 ),
        .Q(colsumX[27]));
  FDCE \colsumXC_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[7]_i_1_n_8 ),
        .Q(colsumX[28]));
  CARRY8 \colsumXC_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumXC_reg[7]_i_1_n_0 ,\colsumXC_reg[7]_i_1_n_1 ,\colsumXC_reg[7]_i_1_n_2 ,\colsumXC_reg[7]_i_1_n_3 ,\colsumXC_reg[7]_i_1_n_4 ,\colsumXC_reg[7]_i_1_n_5 ,\colsumXC_reg[7]_i_1_n_6 ,\colsumXC_reg[7]_i_1_n_7 }),
        .DI({\colsumXC[7]_i_2_n_0 ,\colsumXC[7]_i_3_n_0 ,\colsumXC[7]_i_4_n_0 ,\colsumXC[7]_i_5_n_0 ,\colsumXC[7]_i_6_n_0 ,\colsumXC[7]_i_7_n_0 ,1'b0,\colsumXC[7]_i_8_n_0 }),
        .O({\colsumXC_reg[7]_i_1_n_8 ,\colsumXC_reg[7]_i_1_n_9 ,\colsumXC_reg[7]_i_1_n_10 ,\colsumXC_reg[7]_i_1_n_11 ,\colsumXC_reg[7]_i_1_n_12 ,\colsumXC_reg[7]_i_1_n_13 ,\colsumXC_reg[7]_i_1_n_14 ,\colsumXC_reg[7]_i_1_n_15 }),
        .S({\colsumXC[7]_i_9_n_0 ,\colsumXC[7]_i_10_n_0 ,\colsumXC[7]_i_11_n_0 ,\colsumXC[7]_i_12_n_0 ,\colsumXC[7]_i_13_n_0 ,\colsumXC[7]_i_14_n_0 ,\colsumXC[7]_i_15_n_0 ,\colsumXC[7]_i_16_n_0 }));
  FDCE \colsumXC_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[15]_i_1_n_15 ),
        .Q(colsumX[29]));
  FDCE \colsumXC_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXC_reg[15]_i_1_n_14 ),
        .Q(colsumX[30]));
  (* SOFT_HLUTNM = "soft_lutpair1383" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[0]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[84] ),
        .O(\colsumXY4p1[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1378" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[10]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[94] ),
        .O(\colsumXY4p1[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1378" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[11]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[95] ),
        .O(\colsumXY4p1[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1377" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[12]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[96] ),
        .O(\colsumXY4p1[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1377" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[13]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[97] ),
        .O(\colsumXY4p1[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1376" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[14]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[98] ),
        .O(\colsumXY4p1[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1376" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[15]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[99] ),
        .O(\colsumXY4p1[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1375" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[16]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(\colsumXY_reg_n_0_[100] ),
        .O(\colsumXY4p1[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1374" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[17]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(\colsumXY_reg_n_0_[101] ),
        .O(\colsumXY4p1[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1374" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[18]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(\colsumXY_reg_n_0_[102] ),
        .O(\colsumXY4p1[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1373" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[19]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(\colsumXY_reg_n_0_[103] ),
        .O(\colsumXY4p1[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1383" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[1]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[85] ),
        .O(\colsumXY4p1[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1373" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[20]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(\colsumXY_reg_n_0_[104] ),
        .O(\colsumXY4p1[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1382" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[2]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[86] ),
        .O(\colsumXY4p1[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1382" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[3]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[87] ),
        .O(\colsumXY4p1[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1381" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[4]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[88] ),
        .O(\colsumXY4p1[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1381" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[5]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[89] ),
        .O(\colsumXY4p1[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1380" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[6]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[90] ),
        .O(\colsumXY4p1[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1380" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[7]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[91] ),
        .O(\colsumXY4p1[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1379" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[8]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[92] ),
        .O(\colsumXY4p1[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1379" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p1[9]_i_1 
       (.I0(stateScore),
        .I1(\colsumXY_reg_n_0_[93] ),
        .O(\colsumXY4p1[9]_i_1_n_0 ));
  FDCE \colsumXY4p1_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[0]_i_1_n_0 ),
        .Q(colsumXY4p1[0]));
  FDCE \colsumXY4p1_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[10]_i_1_n_0 ),
        .Q(colsumXY4p1[10]));
  FDCE \colsumXY4p1_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[11]_i_1_n_0 ),
        .Q(colsumXY4p1[11]));
  FDCE \colsumXY4p1_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[12]_i_1_n_0 ),
        .Q(colsumXY4p1[12]));
  FDCE \colsumXY4p1_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[13]_i_1_n_0 ),
        .Q(colsumXY4p1[13]));
  FDCE \colsumXY4p1_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[14]_i_1_n_0 ),
        .Q(colsumXY4p1[14]));
  FDCE \colsumXY4p1_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[15]_i_1_n_0 ),
        .Q(colsumXY4p1[15]));
  FDCE \colsumXY4p1_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[16]_i_1_n_0 ),
        .Q(colsumXY4p1[16]));
  FDCE \colsumXY4p1_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[17]_i_1_n_0 ),
        .Q(colsumXY4p1[17]));
  FDCE \colsumXY4p1_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[18]_i_1_n_0 ),
        .Q(colsumXY4p1[18]));
  FDCE \colsumXY4p1_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[19]_i_1_n_0 ),
        .Q(colsumXY4p1[19]));
  FDCE \colsumXY4p1_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[1]_i_1_n_0 ),
        .Q(colsumXY4p1[1]));
  FDCE \colsumXY4p1_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[20]_i_1_n_0 ),
        .Q(colsumXY4p1[20]));
  FDCE \colsumXY4p1_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[2]_i_1_n_0 ),
        .Q(colsumXY4p1[2]));
  FDCE \colsumXY4p1_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[3]_i_1_n_0 ),
        .Q(colsumXY4p1[3]));
  FDCE \colsumXY4p1_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[4]_i_1_n_0 ),
        .Q(colsumXY4p1[4]));
  FDCE \colsumXY4p1_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[5]_i_1_n_0 ),
        .Q(colsumXY4p1[5]));
  FDCE \colsumXY4p1_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[6]_i_1_n_0 ),
        .Q(colsumXY4p1[6]));
  FDCE \colsumXY4p1_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[7]_i_1_n_0 ),
        .Q(colsumXY4p1[7]));
  FDCE \colsumXY4p1_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[8]_i_1_n_0 ),
        .Q(colsumXY4p1[8]));
  FDCE \colsumXY4p1_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p1[9]_i_1_n_0 ),
        .Q(colsumXY4p1[9]));
  (* SOFT_HLUTNM = "soft_lutpair1393" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[0]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[0]),
        .O(\colsumXY4p2[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1388" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[10]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[10]),
        .O(\colsumXY4p2[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1388" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[11]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[11]),
        .O(\colsumXY4p2[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1387" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[12]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[12]),
        .O(\colsumXY4p2[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1387" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[13]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[13]),
        .O(\colsumXY4p2[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1386" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[14]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[14]),
        .O(\colsumXY4p2[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1386" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[15]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[15]),
        .O(\colsumXY4p2[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1385" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[16]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(colsumXY4p1[16]),
        .O(\colsumXY4p2[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1385" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[17]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(colsumXY4p1[17]),
        .O(\colsumXY4p2[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1384" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[18]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(colsumXY4p1[18]),
        .O(\colsumXY4p2[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1384" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[19]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(colsumXY4p1[19]),
        .O(\colsumXY4p2[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1393" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[1]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[1]),
        .O(\colsumXY4p2[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1375" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[20]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(colsumXY4p1[20]),
        .O(\colsumXY4p2[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1392" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[2]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[2]),
        .O(\colsumXY4p2[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1392" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[3]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[3]),
        .O(\colsumXY4p2[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1391" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[4]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[4]),
        .O(\colsumXY4p2[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1391" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[5]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[5]),
        .O(\colsumXY4p2[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1390" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[6]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[6]),
        .O(\colsumXY4p2[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1390" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[7]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[7]),
        .O(\colsumXY4p2[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1389" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[8]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[8]),
        .O(\colsumXY4p2[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1389" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXY4p2[9]_i_1 
       (.I0(stateScore),
        .I1(colsumXY4p1[9]),
        .O(\colsumXY4p2[9]_i_1_n_0 ));
  FDCE \colsumXY4p2_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[0]_i_1_n_0 ),
        .Q(colsumXY4p2[0]));
  FDCE \colsumXY4p2_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[10]_i_1_n_0 ),
        .Q(colsumXY4p2[10]));
  FDCE \colsumXY4p2_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[11]_i_1_n_0 ),
        .Q(colsumXY4p2[11]));
  FDCE \colsumXY4p2_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[12]_i_1_n_0 ),
        .Q(colsumXY4p2[12]));
  FDCE \colsumXY4p2_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[13]_i_1_n_0 ),
        .Q(colsumXY4p2[13]));
  FDCE \colsumXY4p2_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[14]_i_1_n_0 ),
        .Q(colsumXY4p2[14]));
  FDCE \colsumXY4p2_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[15]_i_1_n_0 ),
        .Q(colsumXY4p2[15]));
  FDCE \colsumXY4p2_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[16]_i_1_n_0 ),
        .Q(colsumXY4p2[16]));
  FDCE \colsumXY4p2_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[17]_i_1_n_0 ),
        .Q(colsumXY4p2[17]));
  FDCE \colsumXY4p2_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[18]_i_1_n_0 ),
        .Q(colsumXY4p2[18]));
  FDCE \colsumXY4p2_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[19]_i_1_n_0 ),
        .Q(colsumXY4p2[19]));
  FDCE \colsumXY4p2_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[1]_i_1_n_0 ),
        .Q(colsumXY4p2[1]));
  FDCE \colsumXY4p2_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[20]_i_1_n_0 ),
        .Q(colsumXY4p2[20]));
  FDCE \colsumXY4p2_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[2]_i_1_n_0 ),
        .Q(colsumXY4p2[2]));
  FDCE \colsumXY4p2_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[3]_i_1_n_0 ),
        .Q(colsumXY4p2[3]));
  FDCE \colsumXY4p2_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[4]_i_1_n_0 ),
        .Q(colsumXY4p2[4]));
  FDCE \colsumXY4p2_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[5]_i_1_n_0 ),
        .Q(colsumXY4p2[5]));
  FDCE \colsumXY4p2_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[6]_i_1_n_0 ),
        .Q(colsumXY4p2[6]));
  FDCE \colsumXY4p2_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[7]_i_1_n_0 ),
        .Q(colsumXY4p2[7]));
  FDCE \colsumXY4p2_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[8]_i_1_n_0 ),
        .Q(colsumXY4p2[8]));
  FDCE \colsumXY4p2_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY4p2[9]_i_1_n_0 ),
        .Q(colsumXY4p2[9]));
  (* SOFT_HLUTNM = "soft_lutpair1332" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[0]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[0]),
        .O(\colsumXYA[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1327" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[10]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[10]),
        .O(\colsumXYA[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1327" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[11]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[11]),
        .O(\colsumXYA[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1326" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[12]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[12]),
        .O(\colsumXYA[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1326" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[13]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[13]),
        .O(\colsumXYA[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1325" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[14]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[14]),
        .O(\colsumXYA[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1325" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[15]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[15]),
        .O(\colsumXYA[15]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[15]_i_10 
       (.I0(xy[26]),
        .I1(xy[8]),
        .O(\colsumXYA[15]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[15]_i_3 
       (.I0(xy[33]),
        .I1(xy[15]),
        .O(\colsumXYA[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[15]_i_4 
       (.I0(xy[32]),
        .I1(xy[14]),
        .O(\colsumXYA[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[15]_i_5 
       (.I0(xy[31]),
        .I1(xy[13]),
        .O(\colsumXYA[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[15]_i_6 
       (.I0(xy[30]),
        .I1(xy[12]),
        .O(\colsumXYA[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[15]_i_7 
       (.I0(xy[29]),
        .I1(xy[11]),
        .O(\colsumXYA[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[15]_i_8 
       (.I0(xy[28]),
        .I1(xy[10]),
        .O(\colsumXYA[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[15]_i_9 
       (.I0(xy[27]),
        .I1(xy[9]),
        .O(\colsumXYA[15]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1324" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[16]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumXYA0[16]),
        .O(\colsumXYA[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1324" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[17]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumXYA0[17]),
        .O(\colsumXYA[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1315" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \colsumXYA[18]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(\colsumXYA_reg[18]_i_2_n_5 ),
        .O(\colsumXYA[18]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \colsumXYA[18]_i_3 
       (.I0(xy[35]),
        .O(\colsumXYA[18]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[18]_i_4 
       (.I0(xy[35]),
        .I1(xy[17]),
        .O(\colsumXYA[18]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[18]_i_5 
       (.I0(xy[34]),
        .I1(xy[16]),
        .O(\colsumXYA[18]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1323" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[19]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[0]),
        .O(\colsumXYA[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1332" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[1]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[1]),
        .O(\colsumXYA[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1323" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[20]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[1]),
        .O(\colsumXYA[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1322" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[21]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[2]),
        .O(\colsumXYA[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1322" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[22]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[3]),
        .O(\colsumXYA[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1321" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[23]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[4]),
        .O(\colsumXYA[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1321" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[24]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[5]),
        .O(\colsumXYA[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1320" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[25]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[6]),
        .O(\colsumXYA[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1320" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[26]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[7]),
        .O(\colsumXYA[26]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[26]_i_10 
       (.I0(xy[54]),
        .I1(xy[36]),
        .O(\colsumXYA[26]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[26]_i_3 
       (.I0(xy[61]),
        .I1(xy[43]),
        .O(\colsumXYA[26]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[26]_i_4 
       (.I0(xy[60]),
        .I1(xy[42]),
        .O(\colsumXYA[26]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[26]_i_5 
       (.I0(xy[59]),
        .I1(xy[41]),
        .O(\colsumXYA[26]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[26]_i_6 
       (.I0(xy[58]),
        .I1(xy[40]),
        .O(\colsumXYA[26]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[26]_i_7 
       (.I0(xy[57]),
        .I1(xy[39]),
        .O(\colsumXYA[26]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[26]_i_8 
       (.I0(xy[56]),
        .I1(xy[38]),
        .O(\colsumXYA[26]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[26]_i_9 
       (.I0(xy[55]),
        .I1(xy[37]),
        .O(\colsumXYA[26]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1319" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[27]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[8]),
        .O(\colsumXYA[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1319" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[28]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[9]),
        .O(\colsumXYA[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1318" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[29]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[10]),
        .O(\colsumXYA[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1331" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[2]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[2]),
        .O(\colsumXYA[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1318" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[30]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[11]),
        .O(\colsumXYA[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1317" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[31]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[12]),
        .O(\colsumXYA[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1317" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[32]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[13]),
        .O(\colsumXYA[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1316" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[33]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[14]),
        .O(\colsumXYA[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1316" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[34]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA00_in[15]),
        .O(\colsumXYA[34]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[34]_i_10 
       (.I0(xy[62]),
        .I1(xy[44]),
        .O(\colsumXYA[34]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[34]_i_3 
       (.I0(xy[69]),
        .I1(xy[51]),
        .O(\colsumXYA[34]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[34]_i_4 
       (.I0(xy[68]),
        .I1(xy[50]),
        .O(\colsumXYA[34]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[34]_i_5 
       (.I0(xy[67]),
        .I1(xy[49]),
        .O(\colsumXYA[34]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[34]_i_6 
       (.I0(xy[66]),
        .I1(xy[48]),
        .O(\colsumXYA[34]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[34]_i_7 
       (.I0(xy[65]),
        .I1(xy[47]),
        .O(\colsumXYA[34]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[34]_i_8 
       (.I0(xy[64]),
        .I1(xy[46]),
        .O(\colsumXYA[34]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[34]_i_9 
       (.I0(xy[63]),
        .I1(xy[45]),
        .O(\colsumXYA[34]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1315" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[35]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumXYA00_in[16]),
        .O(\colsumXYA[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1314" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[36]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumXYA00_in[17]),
        .O(\colsumXYA[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1314" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \colsumXYA[37]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(\colsumXYA_reg[37]_i_2_n_5 ),
        .O(\colsumXYA[37]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \colsumXYA[37]_i_3 
       (.I0(xy[71]),
        .O(\colsumXYA[37]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[37]_i_4 
       (.I0(xy[71]),
        .I1(xy[53]),
        .O(\colsumXYA[37]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[37]_i_5 
       (.I0(xy[70]),
        .I1(xy[52]),
        .O(\colsumXYA[37]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1331" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[3]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[3]),
        .O(\colsumXYA[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1330" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[4]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[4]),
        .O(\colsumXYA[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1330" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[5]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[5]),
        .O(\colsumXYA[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1329" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[6]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[6]),
        .O(\colsumXYA[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1329" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[7]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[7]),
        .O(\colsumXYA[7]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[7]_i_10 
       (.I0(xy[18]),
        .I1(xy[0]),
        .O(\colsumXYA[7]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[7]_i_3 
       (.I0(xy[25]),
        .I1(xy[7]),
        .O(\colsumXYA[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[7]_i_4 
       (.I0(xy[24]),
        .I1(xy[6]),
        .O(\colsumXYA[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[7]_i_5 
       (.I0(xy[23]),
        .I1(xy[5]),
        .O(\colsumXYA[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[7]_i_6 
       (.I0(xy[22]),
        .I1(xy[4]),
        .O(\colsumXYA[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[7]_i_7 
       (.I0(xy[21]),
        .I1(xy[3]),
        .O(\colsumXYA[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[7]_i_8 
       (.I0(xy[20]),
        .I1(xy[2]),
        .O(\colsumXYA[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumXYA[7]_i_9 
       (.I0(xy[19]),
        .I1(xy[1]),
        .O(\colsumXYA[7]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1328" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[8]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[8]),
        .O(\colsumXYA[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1328" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYA[9]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(colsumXYA0[9]),
        .O(\colsumXYA[9]_i_1_n_0 ));
  FDCE \colsumXYA_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[0]_i_1_n_0 ),
        .Q(colsumXYA[0]));
  FDCE \colsumXYA_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[10]_i_1_n_0 ),
        .Q(colsumXYA[10]));
  FDCE \colsumXYA_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[11]_i_1_n_0 ),
        .Q(colsumXYA[11]));
  FDCE \colsumXYA_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[12]_i_1_n_0 ),
        .Q(colsumXYA[12]));
  FDCE \colsumXYA_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[13]_i_1_n_0 ),
        .Q(colsumXYA[13]));
  FDCE \colsumXYA_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[14]_i_1_n_0 ),
        .Q(colsumXYA[14]));
  FDCE \colsumXYA_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[15]_i_1_n_0 ),
        .Q(colsumXYA[15]));
  CARRY8 \colsumXYA_reg[15]_i_2 
       (.CI(\colsumXYA_reg[7]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumXYA_reg[15]_i_2_n_0 ,\colsumXYA_reg[15]_i_2_n_1 ,\colsumXYA_reg[15]_i_2_n_2 ,\colsumXYA_reg[15]_i_2_n_3 ,\colsumXYA_reg[15]_i_2_n_4 ,\colsumXYA_reg[15]_i_2_n_5 ,\colsumXYA_reg[15]_i_2_n_6 ,\colsumXYA_reg[15]_i_2_n_7 }),
        .DI(xy[33:26]),
        .O(colsumXYA0[15:8]),
        .S({\colsumXYA[15]_i_3_n_0 ,\colsumXYA[15]_i_4_n_0 ,\colsumXYA[15]_i_5_n_0 ,\colsumXYA[15]_i_6_n_0 ,\colsumXYA[15]_i_7_n_0 ,\colsumXYA[15]_i_8_n_0 ,\colsumXYA[15]_i_9_n_0 ,\colsumXYA[15]_i_10_n_0 }));
  FDCE \colsumXYA_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[16]_i_1_n_0 ),
        .Q(colsumXYA[16]));
  FDCE \colsumXYA_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[17]_i_1_n_0 ),
        .Q(colsumXYA[17]));
  FDCE \colsumXYA_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[18]_i_1_n_0 ),
        .Q(colsumXYA[18]));
  CARRY8 \colsumXYA_reg[18]_i_2 
       (.CI(\colsumXYA_reg[15]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumXYA_reg[18]_i_2_CO_UNCONNECTED [7:3],\colsumXYA_reg[18]_i_2_n_5 ,\NLW_colsumXYA_reg[18]_i_2_CO_UNCONNECTED [1],\colsumXYA_reg[18]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\colsumXYA[18]_i_3_n_0 ,xy[34]}),
        .O({\NLW_colsumXYA_reg[18]_i_2_O_UNCONNECTED [7:2],colsumXYA0[17:16]}),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\colsumXYA[18]_i_4_n_0 ,\colsumXYA[18]_i_5_n_0 }));
  FDCE \colsumXYA_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[19]_i_1_n_0 ),
        .Q(colsumXYA[19]));
  FDCE \colsumXYA_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[1]_i_1_n_0 ),
        .Q(colsumXYA[1]));
  FDCE \colsumXYA_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[20]_i_1_n_0 ),
        .Q(colsumXYA[20]));
  FDCE \colsumXYA_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[21]_i_1_n_0 ),
        .Q(colsumXYA[21]));
  FDCE \colsumXYA_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[22]_i_1_n_0 ),
        .Q(colsumXYA[22]));
  FDCE \colsumXYA_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[23]_i_1_n_0 ),
        .Q(colsumXYA[23]));
  FDCE \colsumXYA_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[24]_i_1_n_0 ),
        .Q(colsumXYA[24]));
  FDCE \colsumXYA_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[25]_i_1_n_0 ),
        .Q(colsumXYA[25]));
  FDCE \colsumXYA_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[26]_i_1_n_0 ),
        .Q(colsumXYA[26]));
  CARRY8 \colsumXYA_reg[26]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumXYA_reg[26]_i_2_n_0 ,\colsumXYA_reg[26]_i_2_n_1 ,\colsumXYA_reg[26]_i_2_n_2 ,\colsumXYA_reg[26]_i_2_n_3 ,\colsumXYA_reg[26]_i_2_n_4 ,\colsumXYA_reg[26]_i_2_n_5 ,\colsumXYA_reg[26]_i_2_n_6 ,\colsumXYA_reg[26]_i_2_n_7 }),
        .DI(xy[61:54]),
        .O(colsumXYA00_in[7:0]),
        .S({\colsumXYA[26]_i_3_n_0 ,\colsumXYA[26]_i_4_n_0 ,\colsumXYA[26]_i_5_n_0 ,\colsumXYA[26]_i_6_n_0 ,\colsumXYA[26]_i_7_n_0 ,\colsumXYA[26]_i_8_n_0 ,\colsumXYA[26]_i_9_n_0 ,\colsumXYA[26]_i_10_n_0 }));
  FDCE \colsumXYA_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[27]_i_1_n_0 ),
        .Q(colsumXYA[27]));
  FDCE \colsumXYA_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[28]_i_1_n_0 ),
        .Q(colsumXYA[28]));
  FDCE \colsumXYA_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[29]_i_1_n_0 ),
        .Q(colsumXYA[29]));
  FDCE \colsumXYA_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[2]_i_1_n_0 ),
        .Q(colsumXYA[2]));
  FDCE \colsumXYA_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[30]_i_1_n_0 ),
        .Q(colsumXYA[30]));
  FDCE \colsumXYA_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[31]_i_1_n_0 ),
        .Q(colsumXYA[31]));
  FDCE \colsumXYA_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[32]_i_1_n_0 ),
        .Q(colsumXYA[32]));
  FDCE \colsumXYA_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[33]_i_1_n_0 ),
        .Q(colsumXYA[33]));
  FDCE \colsumXYA_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[34]_i_1_n_0 ),
        .Q(colsumXYA[34]));
  CARRY8 \colsumXYA_reg[34]_i_2 
       (.CI(\colsumXYA_reg[26]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumXYA_reg[34]_i_2_n_0 ,\colsumXYA_reg[34]_i_2_n_1 ,\colsumXYA_reg[34]_i_2_n_2 ,\colsumXYA_reg[34]_i_2_n_3 ,\colsumXYA_reg[34]_i_2_n_4 ,\colsumXYA_reg[34]_i_2_n_5 ,\colsumXYA_reg[34]_i_2_n_6 ,\colsumXYA_reg[34]_i_2_n_7 }),
        .DI(xy[69:62]),
        .O(colsumXYA00_in[15:8]),
        .S({\colsumXYA[34]_i_3_n_0 ,\colsumXYA[34]_i_4_n_0 ,\colsumXYA[34]_i_5_n_0 ,\colsumXYA[34]_i_6_n_0 ,\colsumXYA[34]_i_7_n_0 ,\colsumXYA[34]_i_8_n_0 ,\colsumXYA[34]_i_9_n_0 ,\colsumXYA[34]_i_10_n_0 }));
  FDCE \colsumXYA_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[35]_i_1_n_0 ),
        .Q(colsumXYA[35]));
  FDCE \colsumXYA_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[36]_i_1_n_0 ),
        .Q(colsumXYA[36]));
  FDCE \colsumXYA_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[37]_i_1_n_0 ),
        .Q(colsumXYA[37]));
  CARRY8 \colsumXYA_reg[37]_i_2 
       (.CI(\colsumXYA_reg[34]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumXYA_reg[37]_i_2_CO_UNCONNECTED [7:3],\colsumXYA_reg[37]_i_2_n_5 ,\NLW_colsumXYA_reg[37]_i_2_CO_UNCONNECTED [1],\colsumXYA_reg[37]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\colsumXYA[37]_i_3_n_0 ,xy[70]}),
        .O({\NLW_colsumXYA_reg[37]_i_2_O_UNCONNECTED [7:2],colsumXYA00_in[17:16]}),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\colsumXYA[37]_i_4_n_0 ,\colsumXYA[37]_i_5_n_0 }));
  FDCE \colsumXYA_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[3]_i_1_n_0 ),
        .Q(colsumXYA[3]));
  FDCE \colsumXYA_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[4]_i_1_n_0 ),
        .Q(colsumXYA[4]));
  FDCE \colsumXYA_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[5]_i_1_n_0 ),
        .Q(colsumXYA[5]));
  FDCE \colsumXYA_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[6]_i_1_n_0 ),
        .Q(colsumXYA[6]));
  FDCE \colsumXYA_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[7]_i_1_n_0 ),
        .Q(colsumXYA[7]));
  CARRY8 \colsumXYA_reg[7]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumXYA_reg[7]_i_2_n_0 ,\colsumXYA_reg[7]_i_2_n_1 ,\colsumXYA_reg[7]_i_2_n_2 ,\colsumXYA_reg[7]_i_2_n_3 ,\colsumXYA_reg[7]_i_2_n_4 ,\colsumXYA_reg[7]_i_2_n_5 ,\colsumXYA_reg[7]_i_2_n_6 ,\colsumXYA_reg[7]_i_2_n_7 }),
        .DI(xy[25:18]),
        .O(colsumXYA0[7:0]),
        .S({\colsumXYA[7]_i_3_n_0 ,\colsumXYA[7]_i_4_n_0 ,\colsumXYA[7]_i_5_n_0 ,\colsumXYA[7]_i_6_n_0 ,\colsumXYA[7]_i_7_n_0 ,\colsumXYA[7]_i_8_n_0 ,\colsumXYA[7]_i_9_n_0 ,\colsumXYA[7]_i_10_n_0 }));
  FDCE \colsumXYA_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[8]_i_1_n_0 ),
        .Q(colsumXYA[8]));
  FDCE \colsumXYA_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYA[9]_i_1_n_0 ),
        .Q(colsumXYA[9]));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[15]_i_10 
       (.I0(colsumXYA[15]),
        .I1(colsumXYA[34]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[15]_i_11 
       (.I0(colsumXYA[14]),
        .I1(colsumXYA[33]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[15]_i_12 
       (.I0(colsumXYA[13]),
        .I1(colsumXYA[32]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[15]_i_13 
       (.I0(colsumXYA[12]),
        .I1(colsumXYA[31]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[15]_i_14 
       (.I0(colsumXYA[11]),
        .I1(colsumXYA[30]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[15]_i_15 
       (.I0(colsumXYA[10]),
        .I1(colsumXYA[29]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[15]_i_16 
       (.I0(colsumXYA[9]),
        .I1(colsumXYA[28]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[15]_i_17 
       (.I0(colsumXYA[8]),
        .I1(colsumXYA[27]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[15]_i_2 
       (.I0(colsumXYA[15]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[15]_i_3 
       (.I0(colsumXYA[14]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[15]_i_4 
       (.I0(colsumXYA[13]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[15]_i_5 
       (.I0(colsumXYA[12]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[15]_i_6 
       (.I0(colsumXYA[11]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[15]_i_7 
       (.I0(colsumXYA[10]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[15]_i_8 
       (.I0(colsumXYA[9]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[15]_i_9 
       (.I0(colsumXYA[8]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[15]_i_9_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[19]_i_2 
       (.I0(colsumXYA[18]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXYB[19]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[19]_i_3 
       (.I0(colsumXYA[17]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXYB[19]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[19]_i_4 
       (.I0(colsumXYA[16]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXYB[19]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[19]_i_5 
       (.I0(colsumXYA[18]),
        .I1(colsumXYA[37]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXYB[19]_i_5_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[19]_i_6 
       (.I0(colsumXYA[18]),
        .I1(colsumXYA[37]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXYB[19]_i_6_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[19]_i_7 
       (.I0(colsumXYA[17]),
        .I1(colsumXYA[36]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXYB[19]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[19]_i_8 
       (.I0(colsumXYA[16]),
        .I1(colsumXYA[35]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXYB[19]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[7]_i_10 
       (.I0(colsumXYA[7]),
        .I1(colsumXYA[26]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[7]_i_11 
       (.I0(colsumXYA[6]),
        .I1(colsumXYA[25]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[7]_i_12 
       (.I0(colsumXYA[5]),
        .I1(colsumXYA[24]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[7]_i_13 
       (.I0(colsumXYA[4]),
        .I1(colsumXYA[23]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[7]_i_14 
       (.I0(colsumXYA[3]),
        .I1(colsumXYA[22]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[7]_i_15 
       (.I0(colsumXYA[2]),
        .I1(colsumXYA[21]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[7]_i_16 
       (.I0(colsumXYA[1]),
        .I1(colsumXYA[20]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYB[7]_i_17 
       (.I0(colsumXYA[0]),
        .I1(colsumXYA[19]),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[7]_i_2 
       (.I0(colsumXYA[7]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[7]_i_3 
       (.I0(colsumXYA[6]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[7]_i_4 
       (.I0(colsumXYA[5]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[7]_i_5 
       (.I0(colsumXYA[4]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[7]_i_6 
       (.I0(colsumXYA[3]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[7]_i_7 
       (.I0(colsumXYA[2]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[7]_i_8 
       (.I0(colsumXYA[1]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYB[7]_i_9 
       (.I0(colsumXYA[0]),
        .I1(stateScore_reg_rep__1_n_0),
        .O(\colsumXYB[7]_i_9_n_0 ));
  FDCE \colsumXYB_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[7]_i_1_n_15 ),
        .Q(colsumXYB[0]));
  FDCE \colsumXYB_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[15]_i_1_n_13 ),
        .Q(colsumXYB[10]));
  FDCE \colsumXYB_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[15]_i_1_n_12 ),
        .Q(colsumXYB[11]));
  FDCE \colsumXYB_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[15]_i_1_n_11 ),
        .Q(colsumXYB[12]));
  FDCE \colsumXYB_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[15]_i_1_n_10 ),
        .Q(colsumXYB[13]));
  FDCE \colsumXYB_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[15]_i_1_n_9 ),
        .Q(colsumXYB[14]));
  FDCE \colsumXYB_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[15]_i_1_n_8 ),
        .Q(colsumXYB[15]));
  CARRY8 \colsumXYB_reg[15]_i_1 
       (.CI(\colsumXYB_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumXYB_reg[15]_i_1_n_0 ,\colsumXYB_reg[15]_i_1_n_1 ,\colsumXYB_reg[15]_i_1_n_2 ,\colsumXYB_reg[15]_i_1_n_3 ,\colsumXYB_reg[15]_i_1_n_4 ,\colsumXYB_reg[15]_i_1_n_5 ,\colsumXYB_reg[15]_i_1_n_6 ,\colsumXYB_reg[15]_i_1_n_7 }),
        .DI({\colsumXYB[15]_i_2_n_0 ,\colsumXYB[15]_i_3_n_0 ,\colsumXYB[15]_i_4_n_0 ,\colsumXYB[15]_i_5_n_0 ,\colsumXYB[15]_i_6_n_0 ,\colsumXYB[15]_i_7_n_0 ,\colsumXYB[15]_i_8_n_0 ,\colsumXYB[15]_i_9_n_0 }),
        .O({\colsumXYB_reg[15]_i_1_n_8 ,\colsumXYB_reg[15]_i_1_n_9 ,\colsumXYB_reg[15]_i_1_n_10 ,\colsumXYB_reg[15]_i_1_n_11 ,\colsumXYB_reg[15]_i_1_n_12 ,\colsumXYB_reg[15]_i_1_n_13 ,\colsumXYB_reg[15]_i_1_n_14 ,\colsumXYB_reg[15]_i_1_n_15 }),
        .S({\colsumXYB[15]_i_10_n_0 ,\colsumXYB[15]_i_11_n_0 ,\colsumXYB[15]_i_12_n_0 ,\colsumXYB[15]_i_13_n_0 ,\colsumXYB[15]_i_14_n_0 ,\colsumXYB[15]_i_15_n_0 ,\colsumXYB[15]_i_16_n_0 ,\colsumXYB[15]_i_17_n_0 }));
  FDCE \colsumXYB_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[19]_i_1_n_15 ),
        .Q(colsumXYB[16]));
  FDCE \colsumXYB_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[19]_i_1_n_14 ),
        .Q(colsumXYB[17]));
  FDCE \colsumXYB_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[19]_i_1_n_13 ),
        .Q(colsumXYB[18]));
  FDCE \colsumXYB_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[19]_i_1_n_12 ),
        .Q(colsumXYB[19]));
  CARRY8 \colsumXYB_reg[19]_i_1 
       (.CI(\colsumXYB_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumXYB_reg[19]_i_1_CO_UNCONNECTED [7:3],\colsumXYB_reg[19]_i_1_n_5 ,\colsumXYB_reg[19]_i_1_n_6 ,\colsumXYB_reg[19]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\colsumXYB[19]_i_2_n_0 ,\colsumXYB[19]_i_3_n_0 ,\colsumXYB[19]_i_4_n_0 }),
        .O({\NLW_colsumXYB_reg[19]_i_1_O_UNCONNECTED [7:4],\colsumXYB_reg[19]_i_1_n_12 ,\colsumXYB_reg[19]_i_1_n_13 ,\colsumXYB_reg[19]_i_1_n_14 ,\colsumXYB_reg[19]_i_1_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,\colsumXYB[19]_i_5_n_0 ,\colsumXYB[19]_i_6_n_0 ,\colsumXYB[19]_i_7_n_0 ,\colsumXYB[19]_i_8_n_0 }));
  FDCE \colsumXYB_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[7]_i_1_n_14 ),
        .Q(colsumXYB[1]));
  FDCE \colsumXYB_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[7]_i_1_n_13 ),
        .Q(colsumXYB[2]));
  FDCE \colsumXYB_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[7]_i_1_n_12 ),
        .Q(colsumXYB[3]));
  FDCE \colsumXYB_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[7]_i_1_n_11 ),
        .Q(colsumXYB[4]));
  FDCE \colsumXYB_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[7]_i_1_n_10 ),
        .Q(colsumXYB[5]));
  FDCE \colsumXYB_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[7]_i_1_n_9 ),
        .Q(colsumXYB[6]));
  FDCE \colsumXYB_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[7]_i_1_n_8 ),
        .Q(colsumXYB[7]));
  CARRY8 \colsumXYB_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumXYB_reg[7]_i_1_n_0 ,\colsumXYB_reg[7]_i_1_n_1 ,\colsumXYB_reg[7]_i_1_n_2 ,\colsumXYB_reg[7]_i_1_n_3 ,\colsumXYB_reg[7]_i_1_n_4 ,\colsumXYB_reg[7]_i_1_n_5 ,\colsumXYB_reg[7]_i_1_n_6 ,\colsumXYB_reg[7]_i_1_n_7 }),
        .DI({\colsumXYB[7]_i_2_n_0 ,\colsumXYB[7]_i_3_n_0 ,\colsumXYB[7]_i_4_n_0 ,\colsumXYB[7]_i_5_n_0 ,\colsumXYB[7]_i_6_n_0 ,\colsumXYB[7]_i_7_n_0 ,\colsumXYB[7]_i_8_n_0 ,\colsumXYB[7]_i_9_n_0 }),
        .O({\colsumXYB_reg[7]_i_1_n_8 ,\colsumXYB_reg[7]_i_1_n_9 ,\colsumXYB_reg[7]_i_1_n_10 ,\colsumXYB_reg[7]_i_1_n_11 ,\colsumXYB_reg[7]_i_1_n_12 ,\colsumXYB_reg[7]_i_1_n_13 ,\colsumXYB_reg[7]_i_1_n_14 ,\colsumXYB_reg[7]_i_1_n_15 }),
        .S({\colsumXYB[7]_i_10_n_0 ,\colsumXYB[7]_i_11_n_0 ,\colsumXYB[7]_i_12_n_0 ,\colsumXYB[7]_i_13_n_0 ,\colsumXYB[7]_i_14_n_0 ,\colsumXYB[7]_i_15_n_0 ,\colsumXYB[7]_i_16_n_0 ,\colsumXYB[7]_i_17_n_0 }));
  FDCE \colsumXYB_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[15]_i_1_n_15 ),
        .Q(colsumXYB[8]));
  FDCE \colsumXYB_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYB_reg[15]_i_1_n_14 ),
        .Q(colsumXYB[9]));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[15]_i_10 
       (.I0(xy4p2[15]),
        .I1(colsumXYB[15]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[15]_i_11 
       (.I0(xy4p2[14]),
        .I1(colsumXYB[14]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[15]_i_12 
       (.I0(xy4p2[13]),
        .I1(colsumXYB[13]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[15]_i_13 
       (.I0(xy4p2[12]),
        .I1(colsumXYB[12]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[15]_i_14 
       (.I0(xy4p2[11]),
        .I1(colsumXYB[11]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[15]_i_15 
       (.I0(xy4p2[10]),
        .I1(colsumXYB[10]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[15]_i_16 
       (.I0(xy4p2[9]),
        .I1(colsumXYB[9]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[15]_i_17 
       (.I0(xy4p2[8]),
        .I1(colsumXYB[8]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[15]_i_2 
       (.I0(xy4p2[15]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[15]_i_3 
       (.I0(xy4p2[14]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[15]_i_4 
       (.I0(xy4p2[13]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[15]_i_5 
       (.I0(xy4p2[12]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[15]_i_6 
       (.I0(xy4p2[11]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[15]_i_7 
       (.I0(xy4p2[10]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[15]_i_8 
       (.I0(xy4p2[9]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[15]_i_9 
       (.I0(xy4p2[8]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[20]_i_10 
       (.I0(xy4p2[16]),
        .I1(colsumXYB[16]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXYC[20]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[20]_i_2 
       (.I0(xy4p2[17]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXYC[20]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[20]_i_3 
       (.I0(xy4p2[17]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXYC[20]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[20]_i_4 
       (.I0(xy4p2[17]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXYC[20]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[20]_i_5 
       (.I0(xy4p2[16]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumXYC[20]_i_5_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[20]_i_6 
       (.I0(xy4p2[17]),
        .I1(colsumXYB[19]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXYC[20]_i_6_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[20]_i_7 
       (.I0(xy4p2[17]),
        .I1(colsumXYB[19]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXYC[20]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[20]_i_8 
       (.I0(xy4p2[17]),
        .I1(colsumXYB[18]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXYC[20]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[20]_i_9 
       (.I0(xy4p2[17]),
        .I1(colsumXYB[17]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXYC[20]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[7]_i_10 
       (.I0(xy4p2[7]),
        .I1(colsumXYB[7]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[7]_i_11 
       (.I0(xy4p2[6]),
        .I1(colsumXYB[6]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[7]_i_12 
       (.I0(xy4p2[5]),
        .I1(colsumXYB[5]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[7]_i_13 
       (.I0(xy4p2[4]),
        .I1(colsumXYB[4]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[7]_i_14 
       (.I0(xy4p2[3]),
        .I1(colsumXYB[3]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[7]_i_15 
       (.I0(xy4p2[2]),
        .I1(colsumXYB[2]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[7]_i_16 
       (.I0(xy4p2[1]),
        .I1(colsumXYB[1]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumXYC[7]_i_17 
       (.I0(xy4p2[0]),
        .I1(colsumXYB[0]),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[7]_i_2 
       (.I0(xy4p2[7]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[7]_i_3 
       (.I0(xy4p2[6]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[7]_i_4 
       (.I0(xy4p2[5]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[7]_i_5 
       (.I0(xy4p2[4]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[7]_i_6 
       (.I0(xy4p2[3]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[7]_i_7 
       (.I0(xy4p2[2]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[7]_i_8 
       (.I0(xy4p2[1]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumXYC[7]_i_9 
       (.I0(xy4p2[0]),
        .I1(stateScore_reg_rep__2_n_0),
        .O(\colsumXYC[7]_i_9_n_0 ));
  FDCE \colsumXYC_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[7]_i_1_n_15 ),
        .Q(colsumXYC[0]));
  FDCE \colsumXYC_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[15]_i_1_n_13 ),
        .Q(colsumXYC[10]));
  FDCE \colsumXYC_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[15]_i_1_n_12 ),
        .Q(colsumXYC[11]));
  FDCE \colsumXYC_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[15]_i_1_n_11 ),
        .Q(colsumXYC[12]));
  FDCE \colsumXYC_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[15]_i_1_n_10 ),
        .Q(colsumXYC[13]));
  FDCE \colsumXYC_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[15]_i_1_n_9 ),
        .Q(colsumXYC[14]));
  FDCE \colsumXYC_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[15]_i_1_n_8 ),
        .Q(colsumXYC[15]));
  CARRY8 \colsumXYC_reg[15]_i_1 
       (.CI(\colsumXYC_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumXYC_reg[15]_i_1_n_0 ,\colsumXYC_reg[15]_i_1_n_1 ,\colsumXYC_reg[15]_i_1_n_2 ,\colsumXYC_reg[15]_i_1_n_3 ,\colsumXYC_reg[15]_i_1_n_4 ,\colsumXYC_reg[15]_i_1_n_5 ,\colsumXYC_reg[15]_i_1_n_6 ,\colsumXYC_reg[15]_i_1_n_7 }),
        .DI({\colsumXYC[15]_i_2_n_0 ,\colsumXYC[15]_i_3_n_0 ,\colsumXYC[15]_i_4_n_0 ,\colsumXYC[15]_i_5_n_0 ,\colsumXYC[15]_i_6_n_0 ,\colsumXYC[15]_i_7_n_0 ,\colsumXYC[15]_i_8_n_0 ,\colsumXYC[15]_i_9_n_0 }),
        .O({\colsumXYC_reg[15]_i_1_n_8 ,\colsumXYC_reg[15]_i_1_n_9 ,\colsumXYC_reg[15]_i_1_n_10 ,\colsumXYC_reg[15]_i_1_n_11 ,\colsumXYC_reg[15]_i_1_n_12 ,\colsumXYC_reg[15]_i_1_n_13 ,\colsumXYC_reg[15]_i_1_n_14 ,\colsumXYC_reg[15]_i_1_n_15 }),
        .S({\colsumXYC[15]_i_10_n_0 ,\colsumXYC[15]_i_11_n_0 ,\colsumXYC[15]_i_12_n_0 ,\colsumXYC[15]_i_13_n_0 ,\colsumXYC[15]_i_14_n_0 ,\colsumXYC[15]_i_15_n_0 ,\colsumXYC[15]_i_16_n_0 ,\colsumXYC[15]_i_17_n_0 }));
  FDCE \colsumXYC_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[20]_i_1_n_15 ),
        .Q(colsumXYC[16]));
  FDCE \colsumXYC_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[20]_i_1_n_14 ),
        .Q(colsumXYC[17]));
  FDCE \colsumXYC_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[20]_i_1_n_13 ),
        .Q(colsumXYC[18]));
  FDCE \colsumXYC_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[20]_i_1_n_12 ),
        .Q(colsumXYC[19]));
  FDCE \colsumXYC_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[7]_i_1_n_14 ),
        .Q(colsumXYC[1]));
  FDCE \colsumXYC_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[20]_i_1_n_11 ),
        .Q(colsumXYC[20]));
  CARRY8 \colsumXYC_reg[20]_i_1 
       (.CI(\colsumXYC_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumXYC_reg[20]_i_1_CO_UNCONNECTED [7:4],\colsumXYC_reg[20]_i_1_n_4 ,\colsumXYC_reg[20]_i_1_n_5 ,\colsumXYC_reg[20]_i_1_n_6 ,\colsumXYC_reg[20]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,\colsumXYC[20]_i_2_n_0 ,\colsumXYC[20]_i_3_n_0 ,\colsumXYC[20]_i_4_n_0 ,\colsumXYC[20]_i_5_n_0 }),
        .O({\NLW_colsumXYC_reg[20]_i_1_O_UNCONNECTED [7:5],\colsumXYC_reg[20]_i_1_n_11 ,\colsumXYC_reg[20]_i_1_n_12 ,\colsumXYC_reg[20]_i_1_n_13 ,\colsumXYC_reg[20]_i_1_n_14 ,\colsumXYC_reg[20]_i_1_n_15 }),
        .S({1'b0,1'b0,1'b0,\colsumXYC[20]_i_6_n_0 ,\colsumXYC[20]_i_7_n_0 ,\colsumXYC[20]_i_8_n_0 ,\colsumXYC[20]_i_9_n_0 ,\colsumXYC[20]_i_10_n_0 }));
  FDCE \colsumXYC_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[7]_i_1_n_13 ),
        .Q(colsumXYC[2]));
  FDCE \colsumXYC_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[7]_i_1_n_12 ),
        .Q(colsumXYC[3]));
  FDCE \colsumXYC_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[7]_i_1_n_11 ),
        .Q(colsumXYC[4]));
  FDCE \colsumXYC_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[7]_i_1_n_10 ),
        .Q(colsumXYC[5]));
  FDCE \colsumXYC_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[7]_i_1_n_9 ),
        .Q(colsumXYC[6]));
  FDCE \colsumXYC_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[7]_i_1_n_8 ),
        .Q(colsumXYC[7]));
  CARRY8 \colsumXYC_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumXYC_reg[7]_i_1_n_0 ,\colsumXYC_reg[7]_i_1_n_1 ,\colsumXYC_reg[7]_i_1_n_2 ,\colsumXYC_reg[7]_i_1_n_3 ,\colsumXYC_reg[7]_i_1_n_4 ,\colsumXYC_reg[7]_i_1_n_5 ,\colsumXYC_reg[7]_i_1_n_6 ,\colsumXYC_reg[7]_i_1_n_7 }),
        .DI({\colsumXYC[7]_i_2_n_0 ,\colsumXYC[7]_i_3_n_0 ,\colsumXYC[7]_i_4_n_0 ,\colsumXYC[7]_i_5_n_0 ,\colsumXYC[7]_i_6_n_0 ,\colsumXYC[7]_i_7_n_0 ,\colsumXYC[7]_i_8_n_0 ,\colsumXYC[7]_i_9_n_0 }),
        .O({\colsumXYC_reg[7]_i_1_n_8 ,\colsumXYC_reg[7]_i_1_n_9 ,\colsumXYC_reg[7]_i_1_n_10 ,\colsumXYC_reg[7]_i_1_n_11 ,\colsumXYC_reg[7]_i_1_n_12 ,\colsumXYC_reg[7]_i_1_n_13 ,\colsumXYC_reg[7]_i_1_n_14 ,\colsumXYC_reg[7]_i_1_n_15 }),
        .S({\colsumXYC[7]_i_10_n_0 ,\colsumXYC[7]_i_11_n_0 ,\colsumXYC[7]_i_12_n_0 ,\colsumXYC[7]_i_13_n_0 ,\colsumXYC[7]_i_14_n_0 ,\colsumXYC[7]_i_15_n_0 ,\colsumXYC[7]_i_16_n_0 ,\colsumXYC[7]_i_17_n_0 }));
  FDCE \colsumXYC_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[15]_i_1_n_15 ),
        .Q(colsumXYC[8]));
  FDCE \colsumXYC_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXYC_reg[15]_i_1_n_14 ),
        .Q(colsumXYC[9]));
  (* SOFT_HLUTNM = "soft_lutpair919" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[100]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[16]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[100]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair918" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[101]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[17]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[101]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair917" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[102]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[18]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[102]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair916" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[103]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[19]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[103]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair915" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[104]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[20]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[104]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair935" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[21]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[0]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair934" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[22]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[1]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair933" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[23]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[2]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair932" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[24]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[3]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair931" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[25]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[4]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair930" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[26]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[5]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair929" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[27]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[6]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair928" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[28]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[7]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair927" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[29]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[8]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair926" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[30]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[9]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair925" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[31]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[10]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair924" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[32]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[11]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair923" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[33]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[12]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair922" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[34]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[13]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair921" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[35]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[14]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXY[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair920" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[36]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[15]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXY[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair919" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[37]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[16]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXY[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair918" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[38]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[17]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXY[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair917" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[39]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[18]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXY[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair916" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[40]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[19]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumXY[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair915" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumXY[41]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[20]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair935" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[84]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[0]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[84]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair934" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[85]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[1]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[85]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair933" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[86]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[2]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[86]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair932" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[87]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[3]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[87]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair931" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[88]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[4]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[88]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair930" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[89]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[5]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[89]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair929" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[90]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[6]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[90]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair928" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[91]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[7]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[91]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair927" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[92]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[8]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[92]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair926" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[93]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[9]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[93]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair925" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[94]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[10]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[94]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair924" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[95]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[11]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[95]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair923" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[96]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[12]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[96]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair922" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[97]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[13]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[97]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair921" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[98]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[14]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[98]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair920" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumXY[99]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumXYC[15]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumXY[99]_i_1_n_0 ));
  FDCE \colsumXY_reg[0] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[84]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[0] ));
  FDCE \colsumXY_reg[100] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[100]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[100] ));
  FDCE \colsumXY_reg[101] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[101]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[101] ));
  FDCE \colsumXY_reg[102] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[102]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[102] ));
  FDCE \colsumXY_reg[103] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[103]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[103] ));
  FDCE \colsumXY_reg[104] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[104]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[104] ));
  FDCE \colsumXY_reg[10] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[94]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[10] ));
  FDCE \colsumXY_reg[11] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[95]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[11] ));
  FDCE \colsumXY_reg[12] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[96]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[12] ));
  FDCE \colsumXY_reg[13] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[97]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[13] ));
  FDCE \colsumXY_reg[14] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[98]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[14] ));
  FDCE \colsumXY_reg[15] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[99]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[15] ));
  FDCE \colsumXY_reg[16] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[100]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[16] ));
  FDCE \colsumXY_reg[17] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[101]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[17] ));
  FDCE \colsumXY_reg[18] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[102]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[18] ));
  FDCE \colsumXY_reg[19] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[103]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[19] ));
  FDCE \colsumXY_reg[1] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[85]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[1] ));
  FDCE \colsumXY_reg[20] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[104]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[20] ));
  FDCE \colsumXY_reg[21] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[21]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[21] ));
  FDCE \colsumXY_reg[22] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[22]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[22] ));
  FDCE \colsumXY_reg[23] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[23]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[23] ));
  FDCE \colsumXY_reg[24] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[24]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[24] ));
  FDCE \colsumXY_reg[25] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[25]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[25] ));
  FDCE \colsumXY_reg[26] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[26]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[26] ));
  FDCE \colsumXY_reg[27] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[27]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[27] ));
  FDCE \colsumXY_reg[28] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[28]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[28] ));
  FDCE \colsumXY_reg[29] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[29]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[29] ));
  FDCE \colsumXY_reg[2] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[86]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[2] ));
  FDCE \colsumXY_reg[30] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[30]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[30] ));
  FDCE \colsumXY_reg[31] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[31]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[31] ));
  FDCE \colsumXY_reg[32] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[32]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[32] ));
  FDCE \colsumXY_reg[33] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[33]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[33] ));
  FDCE \colsumXY_reg[34] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[34]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[34] ));
  FDCE \colsumXY_reg[35] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[35]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[35] ));
  FDCE \colsumXY_reg[36] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[36]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[36] ));
  FDCE \colsumXY_reg[37] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[37]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[37] ));
  FDCE \colsumXY_reg[38] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[38]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[38] ));
  FDCE \colsumXY_reg[39] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[39]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[39] ));
  FDCE \colsumXY_reg[3] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[87]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[3] ));
  FDCE \colsumXY_reg[40] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[40]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[40] ));
  FDCE \colsumXY_reg[41] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[41]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[41] ));
  FDCE \colsumXY_reg[42] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[84]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[42] ));
  FDCE \colsumXY_reg[43] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[85]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[43] ));
  FDCE \colsumXY_reg[44] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[86]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[44] ));
  FDCE \colsumXY_reg[45] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[87]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[45] ));
  FDCE \colsumXY_reg[46] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[88]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[46] ));
  FDCE \colsumXY_reg[47] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[89]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[47] ));
  FDCE \colsumXY_reg[48] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[90]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[48] ));
  FDCE \colsumXY_reg[49] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[91]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[49] ));
  FDCE \colsumXY_reg[4] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[88]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[4] ));
  FDCE \colsumXY_reg[50] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[92]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[50] ));
  FDCE \colsumXY_reg[51] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[93]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[51] ));
  FDCE \colsumXY_reg[52] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[94]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[52] ));
  FDCE \colsumXY_reg[53] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[95]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[53] ));
  FDCE \colsumXY_reg[54] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[96]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[54] ));
  FDCE \colsumXY_reg[55] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[97]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[55] ));
  FDCE \colsumXY_reg[56] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[98]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[56] ));
  FDCE \colsumXY_reg[57] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[99]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[57] ));
  FDCE \colsumXY_reg[58] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[100]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[58] ));
  FDCE \colsumXY_reg[59] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[101]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[59] ));
  FDCE \colsumXY_reg[5] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[89]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[5] ));
  FDCE \colsumXY_reg[60] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[102]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[60] ));
  FDCE \colsumXY_reg[61] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[103]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[61] ));
  FDCE \colsumXY_reg[62] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[104]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[62] ));
  FDCE \colsumXY_reg[63] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[84]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[63] ));
  FDCE \colsumXY_reg[64] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[85]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[64] ));
  FDCE \colsumXY_reg[65] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[86]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[65] ));
  FDCE \colsumXY_reg[66] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[87]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[66] ));
  FDCE \colsumXY_reg[67] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[88]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[67] ));
  FDCE \colsumXY_reg[68] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[89]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[68] ));
  FDCE \colsumXY_reg[69] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[90]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[69] ));
  FDCE \colsumXY_reg[6] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[90]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[6] ));
  FDCE \colsumXY_reg[70] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[91]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[70] ));
  FDCE \colsumXY_reg[71] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[92]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[71] ));
  FDCE \colsumXY_reg[72] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[93]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[72] ));
  FDCE \colsumXY_reg[73] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[94]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[73] ));
  FDCE \colsumXY_reg[74] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[95]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[74] ));
  FDCE \colsumXY_reg[75] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[96]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[75] ));
  FDCE \colsumXY_reg[76] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[97]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[76] ));
  FDCE \colsumXY_reg[77] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[98]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[77] ));
  FDCE \colsumXY_reg[78] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[99]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[78] ));
  FDCE \colsumXY_reg[79] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[100]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[79] ));
  FDCE \colsumXY_reg[7] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[91]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[7] ));
  FDCE \colsumXY_reg[80] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[101]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[80] ));
  FDCE \colsumXY_reg[81] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[102]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[81] ));
  FDCE \colsumXY_reg[82] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[103]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[82] ));
  FDCE \colsumXY_reg[83] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[104]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[83] ));
  FDCE \colsumXY_reg[84] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[84]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[84] ));
  FDCE \colsumXY_reg[85] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[85]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[85] ));
  FDCE \colsumXY_reg[86] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[86]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[86] ));
  FDCE \colsumXY_reg[87] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[87]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[87] ));
  FDCE \colsumXY_reg[88] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[88]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[88] ));
  FDCE \colsumXY_reg[89] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[89]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[89] ));
  FDCE \colsumXY_reg[8] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[92]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[8] ));
  FDCE \colsumXY_reg[90] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[90]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[90] ));
  FDCE \colsumXY_reg[91] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[91]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[91] ));
  FDCE \colsumXY_reg[92] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[92]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[92] ));
  FDCE \colsumXY_reg[93] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[93]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[93] ));
  FDCE \colsumXY_reg[94] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[94]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[94] ));
  FDCE \colsumXY_reg[95] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[95]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[95] ));
  FDCE \colsumXY_reg[96] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[96]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[96] ));
  FDCE \colsumXY_reg[97] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[97]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[97] ));
  FDCE \colsumXY_reg[98] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[98]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[98] ));
  FDCE \colsumXY_reg[99] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[99]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[99] ));
  FDCE \colsumXY_reg[9] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumXY[93]_i_1_n_0 ),
        .Q(\colsumXY_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair871" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[100]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[37]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[100]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair870" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[101]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[38]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[101]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair869" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[102]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[39]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[102]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair868" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[103]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[40]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[103]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0040FFFF)) 
    \colsumX[104]_i_1 
       (.I0(abcde__0[2]),
        .I1(abcde__0[0]),
        .I2(ceScore),
        .I3(abcde__0[1]),
        .I4(stateScore_reg_rep__18_n_0),
        .O(\colsumX[104]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair867" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[104]_i_2 
       (.I0(abcde__0[2]),
        .I1(colsumX[41]),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\colsumX[104]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h0010FFFF)) 
    \colsumX[20]_i_1 
       (.I0(abcde__0[2]),
        .I1(abcde__0[0]),
        .I2(ceScore),
        .I3(abcde__0[1]),
        .I4(stateScore_reg_rep__18_n_0),
        .O(\colsumX[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair887" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[21]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[21]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair886" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[22]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[22]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair885" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[23]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[23]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair884" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[24]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[24]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair883" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[25]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[25]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair882" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[26]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[26]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair881" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[27]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[27]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair880" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[28]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[28]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair879" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[29]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[29]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair878" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[30]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[30]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair877" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[31]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[31]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair876" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[32]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[32]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair875" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[33]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[33]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair874" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[34]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[34]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair873" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[35]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[35]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumX[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair872" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[36]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[36]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumX[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair871" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[37]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[37]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumX[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair870" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[38]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[38]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumX[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair869" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[39]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[39]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumX[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair868" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[40]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[40]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumX[40]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0200FFFF)) 
    \colsumX[41]_i_1 
       (.I0(abcde__0[2]),
        .I1(abcde__0[1]),
        .I2(abcde__0[0]),
        .I3(ceScore),
        .I4(stateScore_reg_rep__17_n_0),
        .O(\colsumX[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair867" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumX[41]_i_2 
       (.I0(abcde__0[2]),
        .I1(colsumX[41]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[41]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h0800FFFF)) 
    \colsumX[62]_i_1 
       (.I0(ceScore),
        .I1(abcde__0[1]),
        .I2(abcde__0[2]),
        .I3(abcde__0[0]),
        .I4(stateScore_reg_rep__18_n_0),
        .O(\colsumX[62]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0008FFFF)) 
    \colsumX[83]_i_1 
       (.I0(ceScore),
        .I1(abcde__0[1]),
        .I2(abcde__0[2]),
        .I3(abcde__0[0]),
        .I4(stateScore_reg_rep__18_n_0),
        .O(\colsumX[83]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair887" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[84]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[21]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[84]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair886" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[85]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[22]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[85]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair885" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[86]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[23]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[86]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair884" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[87]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[24]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[87]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair883" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[88]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[25]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[88]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair882" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[89]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[26]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[89]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair881" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[90]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[27]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[90]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair880" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[91]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[28]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[91]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair879" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[92]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[29]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[92]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair878" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[93]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[30]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[93]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair877" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[94]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[31]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[94]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair876" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[95]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[32]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[95]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair875" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[96]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[33]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[96]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair874" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[97]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[34]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[97]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair873" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[98]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[35]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[98]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair872" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumX[99]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumX[36]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumX[99]_i_1_n_0 ));
  FDCE \colsumX_reg[0] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[84]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[0] ));
  FDCE \colsumX_reg[100] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[100]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[100] ));
  FDCE \colsumX_reg[101] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[101]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[101] ));
  FDCE \colsumX_reg[102] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[102]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[102] ));
  FDCE \colsumX_reg[103] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[103]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[103] ));
  FDCE \colsumX_reg[104] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[104]_i_2_n_0 ),
        .Q(\colsumX_reg_n_0_[104] ));
  FDCE \colsumX_reg[10] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[94]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[10] ));
  FDCE \colsumX_reg[11] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[95]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[11] ));
  FDCE \colsumX_reg[12] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[96]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[12] ));
  FDCE \colsumX_reg[13] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[97]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[13] ));
  FDCE \colsumX_reg[14] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[98]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[14] ));
  FDCE \colsumX_reg[15] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[99]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[15] ));
  FDCE \colsumX_reg[16] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[100]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[16] ));
  FDCE \colsumX_reg[17] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[101]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[17] ));
  FDCE \colsumX_reg[18] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[102]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[18] ));
  FDCE \colsumX_reg[19] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[103]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[19] ));
  FDCE \colsumX_reg[1] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[85]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[1] ));
  FDCE \colsumX_reg[20] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[104]_i_2_n_0 ),
        .Q(\colsumX_reg_n_0_[20] ));
  FDCE \colsumX_reg[21] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[21]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[21] ));
  FDCE \colsumX_reg[22] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[22]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[22] ));
  FDCE \colsumX_reg[23] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[23]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[23] ));
  FDCE \colsumX_reg[24] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[24]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[24] ));
  FDCE \colsumX_reg[25] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[25]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[25] ));
  FDCE \colsumX_reg[26] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[26]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[26] ));
  FDCE \colsumX_reg[27] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[27]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[27] ));
  FDCE \colsumX_reg[28] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[28]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[28] ));
  FDCE \colsumX_reg[29] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[29]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[29] ));
  FDCE \colsumX_reg[2] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[86]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[2] ));
  FDCE \colsumX_reg[30] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[30]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[30] ));
  FDCE \colsumX_reg[31] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[31]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[31] ));
  FDCE \colsumX_reg[32] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[32]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[32] ));
  FDCE \colsumX_reg[33] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[33]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[33] ));
  FDCE \colsumX_reg[34] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[34]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[34] ));
  FDCE \colsumX_reg[35] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[35]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[35] ));
  FDCE \colsumX_reg[36] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[36]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[36] ));
  FDCE \colsumX_reg[37] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[37]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[37] ));
  FDCE \colsumX_reg[38] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[38]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[38] ));
  FDCE \colsumX_reg[39] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[39]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[39] ));
  FDCE \colsumX_reg[3] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[87]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[3] ));
  FDCE \colsumX_reg[40] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[40]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[40] ));
  FDCE \colsumX_reg[41] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[41]_i_2_n_0 ),
        .Q(\colsumX_reg_n_0_[41] ));
  FDCE \colsumX_reg[42] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[84]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[42] ));
  FDCE \colsumX_reg[43] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[85]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[43] ));
  FDCE \colsumX_reg[44] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[86]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[44] ));
  FDCE \colsumX_reg[45] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[87]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[45] ));
  FDCE \colsumX_reg[46] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[88]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[46] ));
  FDCE \colsumX_reg[47] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[89]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[47] ));
  FDCE \colsumX_reg[48] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[90]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[48] ));
  FDCE \colsumX_reg[49] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[91]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[49] ));
  FDCE \colsumX_reg[4] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[88]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[4] ));
  FDCE \colsumX_reg[50] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[92]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[50] ));
  FDCE \colsumX_reg[51] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[93]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[51] ));
  FDCE \colsumX_reg[52] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[94]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[52] ));
  FDCE \colsumX_reg[53] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[95]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[53] ));
  FDCE \colsumX_reg[54] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[96]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[54] ));
  FDCE \colsumX_reg[55] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[97]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[55] ));
  FDCE \colsumX_reg[56] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[98]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[56] ));
  FDCE \colsumX_reg[57] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[99]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[57] ));
  FDCE \colsumX_reg[58] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[100]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[58] ));
  FDCE \colsumX_reg[59] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[101]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[59] ));
  FDCE \colsumX_reg[5] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[89]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[5] ));
  FDCE \colsumX_reg[60] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[102]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[60] ));
  FDCE \colsumX_reg[61] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[103]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[61] ));
  FDCE \colsumX_reg[62] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[104]_i_2_n_0 ),
        .Q(\colsumX_reg_n_0_[62] ));
  FDCE \colsumX_reg[63] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[84]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[63] ));
  FDCE \colsumX_reg[64] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[85]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[64] ));
  FDCE \colsumX_reg[65] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[86]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[65] ));
  FDCE \colsumX_reg[66] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[87]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[66] ));
  FDCE \colsumX_reg[67] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[88]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[67] ));
  FDCE \colsumX_reg[68] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[89]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[68] ));
  FDCE \colsumX_reg[69] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[90]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[69] ));
  FDCE \colsumX_reg[6] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[90]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[6] ));
  FDCE \colsumX_reg[70] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[91]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[70] ));
  FDCE \colsumX_reg[71] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[92]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[71] ));
  FDCE \colsumX_reg[72] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[93]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[72] ));
  FDCE \colsumX_reg[73] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[94]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[73] ));
  FDCE \colsumX_reg[74] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[95]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[74] ));
  FDCE \colsumX_reg[75] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[96]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[75] ));
  FDCE \colsumX_reg[76] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[97]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[76] ));
  FDCE \colsumX_reg[77] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[98]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[77] ));
  FDCE \colsumX_reg[78] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[99]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[78] ));
  FDCE \colsumX_reg[79] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[100]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[79] ));
  FDCE \colsumX_reg[7] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[91]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[7] ));
  FDCE \colsumX_reg[80] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[101]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[80] ));
  FDCE \colsumX_reg[81] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[102]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[81] ));
  FDCE \colsumX_reg[82] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[103]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[82] ));
  FDCE \colsumX_reg[83] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[104]_i_2_n_0 ),
        .Q(\colsumX_reg_n_0_[83] ));
  FDCE \colsumX_reg[84] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[84]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[84] ));
  FDCE \colsumX_reg[85] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[85]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[85] ));
  FDCE \colsumX_reg[86] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[86]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[86] ));
  FDCE \colsumX_reg[87] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[87]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[87] ));
  FDCE \colsumX_reg[88] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[88]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[88] ));
  FDCE \colsumX_reg[89] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[89]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[89] ));
  FDCE \colsumX_reg[8] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[92]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[8] ));
  FDCE \colsumX_reg[90] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[90]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[90] ));
  FDCE \colsumX_reg[91] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[91]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[91] ));
  FDCE \colsumX_reg[92] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[92]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[92] ));
  FDCE \colsumX_reg[93] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[93]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[93] ));
  FDCE \colsumX_reg[94] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[94]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[94] ));
  FDCE \colsumX_reg[95] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[95]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[95] ));
  FDCE \colsumX_reg[96] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[96]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[96] ));
  FDCE \colsumX_reg[97] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[97]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[97] ));
  FDCE \colsumX_reg[98] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[98]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[98] ));
  FDCE \colsumX_reg[99] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[99]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[99] ));
  FDCE \colsumX_reg[9] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumX[93]_i_1_n_0 ),
        .Q(\colsumX_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1238" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[0]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[84] ),
        .O(\colsumY4p1[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1233" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[10]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[94] ),
        .O(\colsumY4p1[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1233" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[11]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[95] ),
        .O(\colsumY4p1[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1232" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[12]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[96] ),
        .O(\colsumY4p1[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1232" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[13]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[97] ),
        .O(\colsumY4p1[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1231" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[14]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[98] ),
        .O(\colsumY4p1[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1231" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[15]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[99] ),
        .O(\colsumY4p1[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1230" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[16]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\colsumY_reg_n_0_[100] ),
        .O(\colsumY4p1[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1229" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[17]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\colsumY_reg_n_0_[101] ),
        .O(\colsumY4p1[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1229" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[18]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\colsumY_reg_n_0_[102] ),
        .O(\colsumY4p1[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1228" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[19]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\colsumY_reg_n_0_[103] ),
        .O(\colsumY4p1[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1238" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[1]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[85] ),
        .O(\colsumY4p1[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1228" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[20]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\colsumY_reg_n_0_[104] ),
        .O(\colsumY4p1[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1237" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[2]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[86] ),
        .O(\colsumY4p1[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1237" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[3]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[87] ),
        .O(\colsumY4p1[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1236" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[4]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[88] ),
        .O(\colsumY4p1[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1236" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[5]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[89] ),
        .O(\colsumY4p1[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1235" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[6]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[90] ),
        .O(\colsumY4p1[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1235" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[7]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[91] ),
        .O(\colsumY4p1[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1234" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[8]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[92] ),
        .O(\colsumY4p1[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1234" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p1[9]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(\colsumY_reg_n_0_[93] ),
        .O(\colsumY4p1[9]_i_1_n_0 ));
  FDCE \colsumY4p1_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[0]_i_1_n_0 ),
        .Q(colsumY4p1[0]));
  FDCE \colsumY4p1_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[10]_i_1_n_0 ),
        .Q(colsumY4p1[10]));
  FDCE \colsumY4p1_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[11]_i_1_n_0 ),
        .Q(colsumY4p1[11]));
  FDCE \colsumY4p1_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[12]_i_1_n_0 ),
        .Q(colsumY4p1[12]));
  FDCE \colsumY4p1_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[13]_i_1_n_0 ),
        .Q(colsumY4p1[13]));
  FDCE \colsumY4p1_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[14]_i_1_n_0 ),
        .Q(colsumY4p1[14]));
  FDCE \colsumY4p1_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[15]_i_1_n_0 ),
        .Q(colsumY4p1[15]));
  FDCE \colsumY4p1_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[16]_i_1_n_0 ),
        .Q(colsumY4p1[16]));
  FDCE \colsumY4p1_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[17]_i_1_n_0 ),
        .Q(colsumY4p1[17]));
  FDCE \colsumY4p1_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[18]_i_1_n_0 ),
        .Q(colsumY4p1[18]));
  FDCE \colsumY4p1_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[19]_i_1_n_0 ),
        .Q(colsumY4p1[19]));
  FDCE \colsumY4p1_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[1]_i_1_n_0 ),
        .Q(colsumY4p1[1]));
  FDCE \colsumY4p1_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[20]_i_1_n_0 ),
        .Q(colsumY4p1[20]));
  FDCE \colsumY4p1_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[2]_i_1_n_0 ),
        .Q(colsumY4p1[2]));
  FDCE \colsumY4p1_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[3]_i_1_n_0 ),
        .Q(colsumY4p1[3]));
  FDCE \colsumY4p1_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[4]_i_1_n_0 ),
        .Q(colsumY4p1[4]));
  FDCE \colsumY4p1_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[5]_i_1_n_0 ),
        .Q(colsumY4p1[5]));
  FDCE \colsumY4p1_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[6]_i_1_n_0 ),
        .Q(colsumY4p1[6]));
  FDCE \colsumY4p1_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[7]_i_1_n_0 ),
        .Q(colsumY4p1[7]));
  FDCE \colsumY4p1_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[8]_i_1_n_0 ),
        .Q(colsumY4p1[8]));
  FDCE \colsumY4p1_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p1[9]_i_1_n_0 ),
        .Q(colsumY4p1[9]));
  (* SOFT_HLUTNM = "soft_lutpair1248" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[0]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[0]),
        .O(\colsumY4p2[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1243" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[10]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[10]),
        .O(\colsumY4p2[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1243" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[11]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[11]),
        .O(\colsumY4p2[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1242" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[12]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[12]),
        .O(\colsumY4p2[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1242" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[13]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[13]),
        .O(\colsumY4p2[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1241" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[14]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[14]),
        .O(\colsumY4p2[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1241" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[15]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[15]),
        .O(\colsumY4p2[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1240" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[16]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(colsumY4p1[16]),
        .O(\colsumY4p2[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1240" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[17]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(colsumY4p1[17]),
        .O(\colsumY4p2[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1239" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[18]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(colsumY4p1[18]),
        .O(\colsumY4p2[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1239" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[19]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(colsumY4p1[19]),
        .O(\colsumY4p2[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1248" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[1]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[1]),
        .O(\colsumY4p2[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1230" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[20]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(colsumY4p1[20]),
        .O(\colsumY4p2[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1247" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[2]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[2]),
        .O(\colsumY4p2[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1247" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[3]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[3]),
        .O(\colsumY4p2[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1246" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[4]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[4]),
        .O(\colsumY4p2[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1246" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[5]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[5]),
        .O(\colsumY4p2[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1245" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[6]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[6]),
        .O(\colsumY4p2[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1245" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[7]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[7]),
        .O(\colsumY4p2[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1244" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[8]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[8]),
        .O(\colsumY4p2[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1244" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumY4p2[9]_i_1 
       (.I0(stateScore_reg_rep__5_n_0),
        .I1(colsumY4p1[9]),
        .O(\colsumY4p2[9]_i_1_n_0 ));
  FDCE \colsumY4p2_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[0]_i_1_n_0 ),
        .Q(colsumY4p2[0]));
  FDCE \colsumY4p2_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[10]_i_1_n_0 ),
        .Q(colsumY4p2[10]));
  FDCE \colsumY4p2_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[11]_i_1_n_0 ),
        .Q(colsumY4p2[11]));
  FDCE \colsumY4p2_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[12]_i_1_n_0 ),
        .Q(colsumY4p2[12]));
  FDCE \colsumY4p2_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[13]_i_1_n_0 ),
        .Q(colsumY4p2[13]));
  FDCE \colsumY4p2_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[14]_i_1_n_0 ),
        .Q(colsumY4p2[14]));
  FDCE \colsumY4p2_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[15]_i_1_n_0 ),
        .Q(colsumY4p2[15]));
  FDCE \colsumY4p2_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[16]_i_1_n_0 ),
        .Q(colsumY4p2[16]));
  FDCE \colsumY4p2_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[17]_i_1_n_0 ),
        .Q(colsumY4p2[17]));
  FDCE \colsumY4p2_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[18]_i_1_n_0 ),
        .Q(colsumY4p2[18]));
  FDCE \colsumY4p2_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[19]_i_1_n_0 ),
        .Q(colsumY4p2[19]));
  FDCE \colsumY4p2_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[1]_i_1_n_0 ),
        .Q(colsumY4p2[1]));
  FDCE \colsumY4p2_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[20]_i_1_n_0 ),
        .Q(colsumY4p2[20]));
  FDCE \colsumY4p2_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[2]_i_1_n_0 ),
        .Q(colsumY4p2[2]));
  FDCE \colsumY4p2_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[3]_i_1_n_0 ),
        .Q(colsumY4p2[3]));
  FDCE \colsumY4p2_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[4]_i_1_n_0 ),
        .Q(colsumY4p2[4]));
  FDCE \colsumY4p2_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[5]_i_1_n_0 ),
        .Q(colsumY4p2[5]));
  FDCE \colsumY4p2_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[6]_i_1_n_0 ),
        .Q(colsumY4p2[6]));
  FDCE \colsumY4p2_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[7]_i_1_n_0 ),
        .Q(colsumY4p2[7]));
  FDCE \colsumY4p2_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[8]_i_1_n_0 ),
        .Q(colsumY4p2[8]));
  FDCE \colsumY4p2_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY4p2[9]_i_1_n_0 ),
        .Q(colsumY4p2[9]));
  (* SOFT_HLUTNM = "soft_lutpair938" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \colsumYA[0]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr[0]),
        .I2(ysqr[18]),
        .O(\colsumYA[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1185" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[10]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[10]),
        .O(\colsumYA[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1185" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[11]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[11]),
        .O(\colsumYA[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1184" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[12]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[12]),
        .O(\colsumYA[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1184" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[13]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[13]),
        .O(\colsumYA[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1183" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[14]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[14]),
        .O(\colsumYA[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1183" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[15]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[15]),
        .O(\colsumYA[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1182" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[16]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumYA0[16]),
        .O(\colsumYA[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1182" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[17]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumYA0[17]),
        .O(\colsumYA[17]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[17]_i_10 
       (.I0(ysqr[29]),
        .I1(ysqr[11]),
        .O(\colsumYA[17]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[17]_i_11 
       (.I0(ysqr[28]),
        .I1(ysqr[10]),
        .O(\colsumYA[17]_i_11_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \colsumYA[17]_i_3 
       (.I0(ysqr[35]),
        .O(\colsumYA[17]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[17]_i_4 
       (.I0(ysqr[35]),
        .I1(ysqr[17]),
        .O(\colsumYA[17]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[17]_i_5 
       (.I0(ysqr[34]),
        .I1(ysqr[16]),
        .O(\colsumYA[17]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[17]_i_6 
       (.I0(ysqr[33]),
        .I1(ysqr[15]),
        .O(\colsumYA[17]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[17]_i_7 
       (.I0(ysqr[32]),
        .I1(ysqr[14]),
        .O(\colsumYA[17]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[17]_i_8 
       (.I0(ysqr[31]),
        .I1(ysqr[13]),
        .O(\colsumYA[17]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[17]_i_9 
       (.I0(ysqr[30]),
        .I1(ysqr[12]),
        .O(\colsumYA[17]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1174" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \colsumYA[18]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(\colsumYA_reg[18]_i_2_n_7 ),
        .O(\colsumYA[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair939" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \colsumYA[19]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr[36]),
        .I2(ysqr[54]),
        .O(\colsumYA[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair938" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumYA[1]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr[18]),
        .I2(ysqr[0]),
        .O(\colsumYA[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair939" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumYA[20]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr[54]),
        .I2(ysqr[36]),
        .O(\colsumYA[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1181" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[21]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[2]),
        .O(\colsumYA[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1181" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[22]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[3]),
        .O(\colsumYA[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1180" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[23]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[4]),
        .O(\colsumYA[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1180" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[24]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[5]),
        .O(\colsumYA[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1179" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[25]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[6]),
        .O(\colsumYA[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1179" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[26]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[7]),
        .O(\colsumYA[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1178" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[27]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[8]),
        .O(\colsumYA[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1178" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[28]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[9]),
        .O(\colsumYA[28]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[28]_i_10 
       (.I0(ysqr[56]),
        .I1(ysqr[38]),
        .O(\colsumYA[28]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[28]_i_3 
       (.I0(ysqr[63]),
        .I1(ysqr[45]),
        .O(\colsumYA[28]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[28]_i_4 
       (.I0(ysqr[62]),
        .I1(ysqr[44]),
        .O(\colsumYA[28]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[28]_i_5 
       (.I0(ysqr[61]),
        .I1(ysqr[43]),
        .O(\colsumYA[28]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[28]_i_6 
       (.I0(ysqr[60]),
        .I1(ysqr[42]),
        .O(\colsumYA[28]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[28]_i_7 
       (.I0(ysqr[59]),
        .I1(ysqr[41]),
        .O(\colsumYA[28]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[28]_i_8 
       (.I0(ysqr[58]),
        .I1(ysqr[40]),
        .O(\colsumYA[28]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[28]_i_9 
       (.I0(ysqr[57]),
        .I1(ysqr[39]),
        .O(\colsumYA[28]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1177" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[29]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[10]),
        .O(\colsumYA[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1189" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[2]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[2]),
        .O(\colsumYA[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1177" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[30]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[11]),
        .O(\colsumYA[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1176" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[31]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[12]),
        .O(\colsumYA[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1176" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[32]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[13]),
        .O(\colsumYA[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1175" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[33]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[14]),
        .O(\colsumYA[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1175" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[34]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA00_in[15]),
        .O(\colsumYA[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1174" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[35]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumYA00_in[16]),
        .O(\colsumYA[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1173" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[36]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(colsumYA00_in[17]),
        .O(\colsumYA[36]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[36]_i_10 
       (.I0(ysqr[65]),
        .I1(ysqr[47]),
        .O(\colsumYA[36]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[36]_i_11 
       (.I0(ysqr[64]),
        .I1(ysqr[46]),
        .O(\colsumYA[36]_i_11_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \colsumYA[36]_i_3 
       (.I0(ysqr[71]),
        .O(\colsumYA[36]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[36]_i_4 
       (.I0(ysqr[71]),
        .I1(ysqr[53]),
        .O(\colsumYA[36]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[36]_i_5 
       (.I0(ysqr[70]),
        .I1(ysqr[52]),
        .O(\colsumYA[36]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[36]_i_6 
       (.I0(ysqr[69]),
        .I1(ysqr[51]),
        .O(\colsumYA[36]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[36]_i_7 
       (.I0(ysqr[68]),
        .I1(ysqr[50]),
        .O(\colsumYA[36]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[36]_i_8 
       (.I0(ysqr[67]),
        .I1(ysqr[49]),
        .O(\colsumYA[36]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[36]_i_9 
       (.I0(ysqr[66]),
        .I1(ysqr[48]),
        .O(\colsumYA[36]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1173" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \colsumYA[37]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(\colsumYA_reg[37]_i_2_n_7 ),
        .O(\colsumYA[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1189" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[3]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[3]),
        .O(\colsumYA[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1188" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[4]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[4]),
        .O(\colsumYA[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1188" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[5]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[5]),
        .O(\colsumYA[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1187" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[6]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[6]),
        .O(\colsumYA[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1187" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[7]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[7]),
        .O(\colsumYA[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1186" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[8]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[8]),
        .O(\colsumYA[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1186" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYA[9]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(colsumYA0[9]),
        .O(\colsumYA[9]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[9]_i_10 
       (.I0(ysqr[20]),
        .I1(ysqr[2]),
        .O(\colsumYA[9]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[9]_i_3 
       (.I0(ysqr[27]),
        .I1(ysqr[9]),
        .O(\colsumYA[9]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[9]_i_4 
       (.I0(ysqr[26]),
        .I1(ysqr[8]),
        .O(\colsumYA[9]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[9]_i_5 
       (.I0(ysqr[25]),
        .I1(ysqr[7]),
        .O(\colsumYA[9]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[9]_i_6 
       (.I0(ysqr[24]),
        .I1(ysqr[6]),
        .O(\colsumYA[9]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[9]_i_7 
       (.I0(ysqr[23]),
        .I1(ysqr[5]),
        .O(\colsumYA[9]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[9]_i_8 
       (.I0(ysqr[22]),
        .I1(ysqr[4]),
        .O(\colsumYA[9]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \colsumYA[9]_i_9 
       (.I0(ysqr[21]),
        .I1(ysqr[3]),
        .O(\colsumYA[9]_i_9_n_0 ));
  FDCE \colsumYA_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[0]_i_1_n_0 ),
        .Q(colsumYA[0]));
  FDCE \colsumYA_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[10]_i_1_n_0 ),
        .Q(colsumYA[10]));
  FDCE \colsumYA_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[11]_i_1_n_0 ),
        .Q(colsumYA[11]));
  FDCE \colsumYA_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[12]_i_1_n_0 ),
        .Q(colsumYA[12]));
  FDCE \colsumYA_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[13]_i_1_n_0 ),
        .Q(colsumYA[13]));
  FDCE \colsumYA_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[14]_i_1_n_0 ),
        .Q(colsumYA[14]));
  FDCE \colsumYA_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[15]_i_1_n_0 ),
        .Q(colsumYA[15]));
  FDCE \colsumYA_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[16]_i_1_n_0 ),
        .Q(colsumYA[16]));
  FDCE \colsumYA_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[17]_i_1_n_0 ),
        .Q(colsumYA[17]));
  CARRY8 \colsumYA_reg[17]_i_2 
       (.CI(\colsumYA_reg[9]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumYA_reg[17]_i_2_n_0 ,\colsumYA_reg[17]_i_2_n_1 ,\colsumYA_reg[17]_i_2_n_2 ,\colsumYA_reg[17]_i_2_n_3 ,\colsumYA_reg[17]_i_2_n_4 ,\colsumYA_reg[17]_i_2_n_5 ,\colsumYA_reg[17]_i_2_n_6 ,\colsumYA_reg[17]_i_2_n_7 }),
        .DI({\colsumYA[17]_i_3_n_0 ,ysqr[34:28]}),
        .O(colsumYA0[17:10]),
        .S({\colsumYA[17]_i_4_n_0 ,\colsumYA[17]_i_5_n_0 ,\colsumYA[17]_i_6_n_0 ,\colsumYA[17]_i_7_n_0 ,\colsumYA[17]_i_8_n_0 ,\colsumYA[17]_i_9_n_0 ,\colsumYA[17]_i_10_n_0 ,\colsumYA[17]_i_11_n_0 }));
  FDCE \colsumYA_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[18]_i_1_n_0 ),
        .Q(colsumYA[18]));
  CARRY8 \colsumYA_reg[18]_i_2 
       (.CI(\colsumYA_reg[17]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumYA_reg[18]_i_2_CO_UNCONNECTED [7:1],\colsumYA_reg[18]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_colsumYA_reg[18]_i_2_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1}));
  FDCE \colsumYA_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[19]_i_1_n_0 ),
        .Q(colsumYA[19]));
  FDCE \colsumYA_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[1]_i_1_n_0 ),
        .Q(colsumYA[1]));
  FDCE \colsumYA_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[20]_i_1_n_0 ),
        .Q(colsumYA[20]));
  FDCE \colsumYA_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[21]_i_1_n_0 ),
        .Q(colsumYA[21]));
  FDCE \colsumYA_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[22]_i_1_n_0 ),
        .Q(colsumYA[22]));
  FDCE \colsumYA_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[23]_i_1_n_0 ),
        .Q(colsumYA[23]));
  FDCE \colsumYA_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[24]_i_1_n_0 ),
        .Q(colsumYA[24]));
  FDCE \colsumYA_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[25]_i_1_n_0 ),
        .Q(colsumYA[25]));
  FDCE \colsumYA_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[26]_i_1_n_0 ),
        .Q(colsumYA[26]));
  FDCE \colsumYA_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[27]_i_1_n_0 ),
        .Q(colsumYA[27]));
  FDCE \colsumYA_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[28]_i_1_n_0 ),
        .Q(colsumYA[28]));
  CARRY8 \colsumYA_reg[28]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumYA_reg[28]_i_2_n_0 ,\colsumYA_reg[28]_i_2_n_1 ,\colsumYA_reg[28]_i_2_n_2 ,\colsumYA_reg[28]_i_2_n_3 ,\colsumYA_reg[28]_i_2_n_4 ,\colsumYA_reg[28]_i_2_n_5 ,\colsumYA_reg[28]_i_2_n_6 ,\colsumYA_reg[28]_i_2_n_7 }),
        .DI(ysqr[63:56]),
        .O(colsumYA00_in[9:2]),
        .S({\colsumYA[28]_i_3_n_0 ,\colsumYA[28]_i_4_n_0 ,\colsumYA[28]_i_5_n_0 ,\colsumYA[28]_i_6_n_0 ,\colsumYA[28]_i_7_n_0 ,\colsumYA[28]_i_8_n_0 ,\colsumYA[28]_i_9_n_0 ,\colsumYA[28]_i_10_n_0 }));
  FDCE \colsumYA_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[29]_i_1_n_0 ),
        .Q(colsumYA[29]));
  FDCE \colsumYA_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[2]_i_1_n_0 ),
        .Q(colsumYA[2]));
  FDCE \colsumYA_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[30]_i_1_n_0 ),
        .Q(colsumYA[30]));
  FDCE \colsumYA_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[31]_i_1_n_0 ),
        .Q(colsumYA[31]));
  FDCE \colsumYA_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[32]_i_1_n_0 ),
        .Q(colsumYA[32]));
  FDCE \colsumYA_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[33]_i_1_n_0 ),
        .Q(colsumYA[33]));
  FDCE \colsumYA_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[34]_i_1_n_0 ),
        .Q(colsumYA[34]));
  FDCE \colsumYA_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[35]_i_1_n_0 ),
        .Q(colsumYA[35]));
  FDCE \colsumYA_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[36]_i_1_n_0 ),
        .Q(colsumYA[36]));
  CARRY8 \colsumYA_reg[36]_i_2 
       (.CI(\colsumYA_reg[28]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumYA_reg[36]_i_2_n_0 ,\colsumYA_reg[36]_i_2_n_1 ,\colsumYA_reg[36]_i_2_n_2 ,\colsumYA_reg[36]_i_2_n_3 ,\colsumYA_reg[36]_i_2_n_4 ,\colsumYA_reg[36]_i_2_n_5 ,\colsumYA_reg[36]_i_2_n_6 ,\colsumYA_reg[36]_i_2_n_7 }),
        .DI({\colsumYA[36]_i_3_n_0 ,ysqr[70:64]}),
        .O(colsumYA00_in[17:10]),
        .S({\colsumYA[36]_i_4_n_0 ,\colsumYA[36]_i_5_n_0 ,\colsumYA[36]_i_6_n_0 ,\colsumYA[36]_i_7_n_0 ,\colsumYA[36]_i_8_n_0 ,\colsumYA[36]_i_9_n_0 ,\colsumYA[36]_i_10_n_0 ,\colsumYA[36]_i_11_n_0 }));
  FDCE \colsumYA_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[37]_i_1_n_0 ),
        .Q(colsumYA[37]));
  CARRY8 \colsumYA_reg[37]_i_2 
       (.CI(\colsumYA_reg[36]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumYA_reg[37]_i_2_CO_UNCONNECTED [7:1],\colsumYA_reg[37]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_colsumYA_reg[37]_i_2_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1}));
  FDCE \colsumYA_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[3]_i_1_n_0 ),
        .Q(colsumYA[3]));
  FDCE \colsumYA_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[4]_i_1_n_0 ),
        .Q(colsumYA[4]));
  FDCE \colsumYA_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[5]_i_1_n_0 ),
        .Q(colsumYA[5]));
  FDCE \colsumYA_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[6]_i_1_n_0 ),
        .Q(colsumYA[6]));
  FDCE \colsumYA_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[7]_i_1_n_0 ),
        .Q(colsumYA[7]));
  FDCE \colsumYA_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[8]_i_1_n_0 ),
        .Q(colsumYA[8]));
  FDCE \colsumYA_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYA[9]_i_1_n_0 ),
        .Q(colsumYA[9]));
  CARRY8 \colsumYA_reg[9]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumYA_reg[9]_i_2_n_0 ,\colsumYA_reg[9]_i_2_n_1 ,\colsumYA_reg[9]_i_2_n_2 ,\colsumYA_reg[9]_i_2_n_3 ,\colsumYA_reg[9]_i_2_n_4 ,\colsumYA_reg[9]_i_2_n_5 ,\colsumYA_reg[9]_i_2_n_6 ,\colsumYA_reg[9]_i_2_n_7 }),
        .DI(ysqr[27:20]),
        .O(colsumYA0[9:2]),
        .S({\colsumYA[9]_i_3_n_0 ,\colsumYA[9]_i_4_n_0 ,\colsumYA[9]_i_5_n_0 ,\colsumYA[9]_i_6_n_0 ,\colsumYA[9]_i_7_n_0 ,\colsumYA[9]_i_8_n_0 ,\colsumYA[9]_i_9_n_0 ,\colsumYA[9]_i_10_n_0 }));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[15]_i_10 
       (.I0(colsumYA[15]),
        .I1(colsumYA[34]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[15]_i_11 
       (.I0(colsumYA[14]),
        .I1(colsumYA[33]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[15]_i_12 
       (.I0(colsumYA[13]),
        .I1(colsumYA[32]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[15]_i_13 
       (.I0(colsumYA[12]),
        .I1(colsumYA[31]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[15]_i_14 
       (.I0(colsumYA[11]),
        .I1(colsumYA[30]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[15]_i_15 
       (.I0(colsumYA[10]),
        .I1(colsumYA[29]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[15]_i_16 
       (.I0(colsumYA[9]),
        .I1(colsumYA[28]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[15]_i_17 
       (.I0(colsumYA[8]),
        .I1(colsumYA[27]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[15]_i_2 
       (.I0(colsumYA[15]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[15]_i_3 
       (.I0(colsumYA[14]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[15]_i_4 
       (.I0(colsumYA[13]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[15]_i_5 
       (.I0(colsumYA[12]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[15]_i_6 
       (.I0(colsumYA[11]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[15]_i_7 
       (.I0(colsumYA[10]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[15]_i_8 
       (.I0(colsumYA[9]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[15]_i_9 
       (.I0(colsumYA[8]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[15]_i_9_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[19]_i_2 
       (.I0(colsumYA[18]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumYB[19]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[19]_i_3 
       (.I0(colsumYA[17]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumYB[19]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[19]_i_4 
       (.I0(colsumYA[16]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumYB[19]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[19]_i_5 
       (.I0(colsumYA[18]),
        .I1(colsumYA[37]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumYB[19]_i_5_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[19]_i_6 
       (.I0(colsumYA[18]),
        .I1(colsumYA[37]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumYB[19]_i_6_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[19]_i_7 
       (.I0(colsumYA[17]),
        .I1(colsumYA[36]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumYB[19]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[19]_i_8 
       (.I0(colsumYA[16]),
        .I1(colsumYA[35]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumYB[19]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[7]_i_10 
       (.I0(colsumYA[7]),
        .I1(colsumYA[26]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[7]_i_11 
       (.I0(colsumYA[6]),
        .I1(colsumYA[25]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[7]_i_12 
       (.I0(colsumYA[5]),
        .I1(colsumYA[24]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[7]_i_13 
       (.I0(colsumYA[4]),
        .I1(colsumYA[23]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[7]_i_14 
       (.I0(colsumYA[3]),
        .I1(colsumYA[22]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[7]_i_15 
       (.I0(colsumYA[2]),
        .I1(colsumYA[21]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[7]_i_16 
       (.I0(colsumYA[1]),
        .I1(colsumYA[20]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYB[7]_i_17 
       (.I0(colsumYA[0]),
        .I1(colsumYA[19]),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[7]_i_2 
       (.I0(colsumYA[7]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[7]_i_3 
       (.I0(colsumYA[6]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[7]_i_4 
       (.I0(colsumYA[5]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[7]_i_5 
       (.I0(colsumYA[4]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[7]_i_6 
       (.I0(colsumYA[3]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[7]_i_7 
       (.I0(colsumYA[2]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[7]_i_8 
       (.I0(colsumYA[1]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYB[7]_i_9 
       (.I0(colsumYA[0]),
        .I1(stateScore_reg_rep__7_n_0),
        .O(\colsumYB[7]_i_9_n_0 ));
  FDCE \colsumYB_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[7]_i_1_n_15 ),
        .Q(colsumYB[0]));
  FDCE \colsumYB_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[15]_i_1_n_13 ),
        .Q(colsumYB[10]));
  FDCE \colsumYB_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[15]_i_1_n_12 ),
        .Q(colsumYB[11]));
  FDCE \colsumYB_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[15]_i_1_n_11 ),
        .Q(colsumYB[12]));
  FDCE \colsumYB_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[15]_i_1_n_10 ),
        .Q(colsumYB[13]));
  FDCE \colsumYB_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[15]_i_1_n_9 ),
        .Q(colsumYB[14]));
  FDCE \colsumYB_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[15]_i_1_n_8 ),
        .Q(colsumYB[15]));
  CARRY8 \colsumYB_reg[15]_i_1 
       (.CI(\colsumYB_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumYB_reg[15]_i_1_n_0 ,\colsumYB_reg[15]_i_1_n_1 ,\colsumYB_reg[15]_i_1_n_2 ,\colsumYB_reg[15]_i_1_n_3 ,\colsumYB_reg[15]_i_1_n_4 ,\colsumYB_reg[15]_i_1_n_5 ,\colsumYB_reg[15]_i_1_n_6 ,\colsumYB_reg[15]_i_1_n_7 }),
        .DI({\colsumYB[15]_i_2_n_0 ,\colsumYB[15]_i_3_n_0 ,\colsumYB[15]_i_4_n_0 ,\colsumYB[15]_i_5_n_0 ,\colsumYB[15]_i_6_n_0 ,\colsumYB[15]_i_7_n_0 ,\colsumYB[15]_i_8_n_0 ,\colsumYB[15]_i_9_n_0 }),
        .O({\colsumYB_reg[15]_i_1_n_8 ,\colsumYB_reg[15]_i_1_n_9 ,\colsumYB_reg[15]_i_1_n_10 ,\colsumYB_reg[15]_i_1_n_11 ,\colsumYB_reg[15]_i_1_n_12 ,\colsumYB_reg[15]_i_1_n_13 ,\colsumYB_reg[15]_i_1_n_14 ,\colsumYB_reg[15]_i_1_n_15 }),
        .S({\colsumYB[15]_i_10_n_0 ,\colsumYB[15]_i_11_n_0 ,\colsumYB[15]_i_12_n_0 ,\colsumYB[15]_i_13_n_0 ,\colsumYB[15]_i_14_n_0 ,\colsumYB[15]_i_15_n_0 ,\colsumYB[15]_i_16_n_0 ,\colsumYB[15]_i_17_n_0 }));
  FDCE \colsumYB_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[19]_i_1_n_15 ),
        .Q(colsumYB[16]));
  FDCE \colsumYB_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[19]_i_1_n_14 ),
        .Q(colsumYB[17]));
  FDCE \colsumYB_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[19]_i_1_n_13 ),
        .Q(colsumYB[18]));
  FDCE \colsumYB_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[19]_i_1_n_12 ),
        .Q(colsumYB[19]));
  CARRY8 \colsumYB_reg[19]_i_1 
       (.CI(\colsumYB_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumYB_reg[19]_i_1_CO_UNCONNECTED [7:3],\colsumYB_reg[19]_i_1_n_5 ,\colsumYB_reg[19]_i_1_n_6 ,\colsumYB_reg[19]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\colsumYB[19]_i_2_n_0 ,\colsumYB[19]_i_3_n_0 ,\colsumYB[19]_i_4_n_0 }),
        .O({\NLW_colsumYB_reg[19]_i_1_O_UNCONNECTED [7:4],\colsumYB_reg[19]_i_1_n_12 ,\colsumYB_reg[19]_i_1_n_13 ,\colsumYB_reg[19]_i_1_n_14 ,\colsumYB_reg[19]_i_1_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,\colsumYB[19]_i_5_n_0 ,\colsumYB[19]_i_6_n_0 ,\colsumYB[19]_i_7_n_0 ,\colsumYB[19]_i_8_n_0 }));
  FDCE \colsumYB_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[7]_i_1_n_14 ),
        .Q(colsumYB[1]));
  FDCE \colsumYB_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[7]_i_1_n_13 ),
        .Q(colsumYB[2]));
  FDCE \colsumYB_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[7]_i_1_n_12 ),
        .Q(colsumYB[3]));
  FDCE \colsumYB_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[7]_i_1_n_11 ),
        .Q(colsumYB[4]));
  FDCE \colsumYB_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[7]_i_1_n_10 ),
        .Q(colsumYB[5]));
  FDCE \colsumYB_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[7]_i_1_n_9 ),
        .Q(colsumYB[6]));
  FDCE \colsumYB_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[7]_i_1_n_8 ),
        .Q(colsumYB[7]));
  CARRY8 \colsumYB_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumYB_reg[7]_i_1_n_0 ,\colsumYB_reg[7]_i_1_n_1 ,\colsumYB_reg[7]_i_1_n_2 ,\colsumYB_reg[7]_i_1_n_3 ,\colsumYB_reg[7]_i_1_n_4 ,\colsumYB_reg[7]_i_1_n_5 ,\colsumYB_reg[7]_i_1_n_6 ,\colsumYB_reg[7]_i_1_n_7 }),
        .DI({\colsumYB[7]_i_2_n_0 ,\colsumYB[7]_i_3_n_0 ,\colsumYB[7]_i_4_n_0 ,\colsumYB[7]_i_5_n_0 ,\colsumYB[7]_i_6_n_0 ,\colsumYB[7]_i_7_n_0 ,\colsumYB[7]_i_8_n_0 ,\colsumYB[7]_i_9_n_0 }),
        .O({\colsumYB_reg[7]_i_1_n_8 ,\colsumYB_reg[7]_i_1_n_9 ,\colsumYB_reg[7]_i_1_n_10 ,\colsumYB_reg[7]_i_1_n_11 ,\colsumYB_reg[7]_i_1_n_12 ,\colsumYB_reg[7]_i_1_n_13 ,\colsumYB_reg[7]_i_1_n_14 ,\colsumYB_reg[7]_i_1_n_15 }),
        .S({\colsumYB[7]_i_10_n_0 ,\colsumYB[7]_i_11_n_0 ,\colsumYB[7]_i_12_n_0 ,\colsumYB[7]_i_13_n_0 ,\colsumYB[7]_i_14_n_0 ,\colsumYB[7]_i_15_n_0 ,\colsumYB[7]_i_16_n_0 ,\colsumYB[7]_i_17_n_0 }));
  FDCE \colsumYB_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[15]_i_1_n_15 ),
        .Q(colsumYB[8]));
  FDCE \colsumYB_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYB_reg[15]_i_1_n_14 ),
        .Q(colsumYB[9]));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[15]_i_10 
       (.I0(ysqr4p2[15]),
        .I1(colsumYB[15]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[15]_i_11 
       (.I0(ysqr4p2[14]),
        .I1(colsumYB[14]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[15]_i_12 
       (.I0(ysqr4p2[13]),
        .I1(colsumYB[13]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[15]_i_13 
       (.I0(ysqr4p2[12]),
        .I1(colsumYB[12]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[15]_i_14 
       (.I0(ysqr4p2[11]),
        .I1(colsumYB[11]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[15]_i_15 
       (.I0(ysqr4p2[10]),
        .I1(colsumYB[10]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[15]_i_16 
       (.I0(ysqr4p2[9]),
        .I1(colsumYB[9]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[15]_i_17 
       (.I0(ysqr4p2[8]),
        .I1(colsumYB[8]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[15]_i_2 
       (.I0(ysqr4p2[15]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[15]_i_3 
       (.I0(ysqr4p2[14]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[15]_i_4 
       (.I0(ysqr4p2[13]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[15]_i_5 
       (.I0(ysqr4p2[12]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[15]_i_6 
       (.I0(ysqr4p2[11]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[15]_i_7 
       (.I0(ysqr4p2[10]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[15]_i_8 
       (.I0(ysqr4p2[9]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[15]_i_9 
       (.I0(ysqr4p2[8]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[20]_i_10 
       (.I0(ysqr4p2[16]),
        .I1(colsumYB[16]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumYC[20]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[20]_i_2 
       (.I0(ysqr4p2[17]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumYC[20]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[20]_i_3 
       (.I0(ysqr4p2[17]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumYC[20]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[20]_i_4 
       (.I0(ysqr4p2[17]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumYC[20]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[20]_i_5 
       (.I0(ysqr4p2[16]),
        .I1(stateScore_reg_rep__17_n_0),
        .O(\colsumYC[20]_i_5_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[20]_i_6 
       (.I0(ysqr4p2[17]),
        .I1(colsumYB[19]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumYC[20]_i_6_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[20]_i_7 
       (.I0(ysqr4p2[17]),
        .I1(colsumYB[19]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumYC[20]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[20]_i_8 
       (.I0(ysqr4p2[17]),
        .I1(colsumYB[18]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumYC[20]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[20]_i_9 
       (.I0(ysqr4p2[17]),
        .I1(colsumYB[17]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumYC[20]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[7]_i_10 
       (.I0(ysqr4p2[6]),
        .I1(colsumYB[6]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[7]_i_11 
       (.I0(ysqr4p2[5]),
        .I1(colsumYB[5]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[7]_i_12 
       (.I0(ysqr4p2[4]),
        .I1(colsumYB[4]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[7]_i_13 
       (.I0(ysqr4p2[3]),
        .I1(colsumYB[3]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[7]_i_14 
       (.I0(ysqr4p2[2]),
        .I1(colsumYB[2]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[7]_i_15 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(colsumYB[1]),
        .O(\colsumYC[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[7]_i_16 
       (.I0(ysqr4p2[0]),
        .I1(colsumYB[0]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[7]_i_2 
       (.I0(ysqr4p2[7]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[7]_i_3 
       (.I0(ysqr4p2[6]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[7]_i_4 
       (.I0(ysqr4p2[5]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[7]_i_5 
       (.I0(ysqr4p2[4]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[7]_i_6 
       (.I0(ysqr4p2[3]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[7]_i_7 
       (.I0(ysqr4p2[2]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \colsumYC[7]_i_8 
       (.I0(ysqr4p2[0]),
        .I1(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \colsumYC[7]_i_9 
       (.I0(ysqr4p2[7]),
        .I1(colsumYB[7]),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\colsumYC[7]_i_9_n_0 ));
  FDCE \colsumYC_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[7]_i_1_n_15 ),
        .Q(colsumY[21]));
  FDCE \colsumYC_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[15]_i_1_n_13 ),
        .Q(colsumY[31]));
  FDCE \colsumYC_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[15]_i_1_n_12 ),
        .Q(colsumY[32]));
  FDCE \colsumYC_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[15]_i_1_n_11 ),
        .Q(colsumY[33]));
  FDCE \colsumYC_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[15]_i_1_n_10 ),
        .Q(colsumY[34]));
  FDCE \colsumYC_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[15]_i_1_n_9 ),
        .Q(colsumY[35]));
  FDCE \colsumYC_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[15]_i_1_n_8 ),
        .Q(colsumY[36]));
  CARRY8 \colsumYC_reg[15]_i_1 
       (.CI(\colsumYC_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\colsumYC_reg[15]_i_1_n_0 ,\colsumYC_reg[15]_i_1_n_1 ,\colsumYC_reg[15]_i_1_n_2 ,\colsumYC_reg[15]_i_1_n_3 ,\colsumYC_reg[15]_i_1_n_4 ,\colsumYC_reg[15]_i_1_n_5 ,\colsumYC_reg[15]_i_1_n_6 ,\colsumYC_reg[15]_i_1_n_7 }),
        .DI({\colsumYC[15]_i_2_n_0 ,\colsumYC[15]_i_3_n_0 ,\colsumYC[15]_i_4_n_0 ,\colsumYC[15]_i_5_n_0 ,\colsumYC[15]_i_6_n_0 ,\colsumYC[15]_i_7_n_0 ,\colsumYC[15]_i_8_n_0 ,\colsumYC[15]_i_9_n_0 }),
        .O({\colsumYC_reg[15]_i_1_n_8 ,\colsumYC_reg[15]_i_1_n_9 ,\colsumYC_reg[15]_i_1_n_10 ,\colsumYC_reg[15]_i_1_n_11 ,\colsumYC_reg[15]_i_1_n_12 ,\colsumYC_reg[15]_i_1_n_13 ,\colsumYC_reg[15]_i_1_n_14 ,\colsumYC_reg[15]_i_1_n_15 }),
        .S({\colsumYC[15]_i_10_n_0 ,\colsumYC[15]_i_11_n_0 ,\colsumYC[15]_i_12_n_0 ,\colsumYC[15]_i_13_n_0 ,\colsumYC[15]_i_14_n_0 ,\colsumYC[15]_i_15_n_0 ,\colsumYC[15]_i_16_n_0 ,\colsumYC[15]_i_17_n_0 }));
  FDCE \colsumYC_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[20]_i_1_n_15 ),
        .Q(colsumY[37]));
  FDCE \colsumYC_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[20]_i_1_n_14 ),
        .Q(colsumY[38]));
  FDCE \colsumYC_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[20]_i_1_n_13 ),
        .Q(colsumY[39]));
  FDCE \colsumYC_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[20]_i_1_n_12 ),
        .Q(colsumY[40]));
  FDCE \colsumYC_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[7]_i_1_n_14 ),
        .Q(colsumY[22]));
  FDCE \colsumYC_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[20]_i_1_n_11 ),
        .Q(colsumY[41]));
  CARRY8 \colsumYC_reg[20]_i_1 
       (.CI(\colsumYC_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_colsumYC_reg[20]_i_1_CO_UNCONNECTED [7:4],\colsumYC_reg[20]_i_1_n_4 ,\colsumYC_reg[20]_i_1_n_5 ,\colsumYC_reg[20]_i_1_n_6 ,\colsumYC_reg[20]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,\colsumYC[20]_i_2_n_0 ,\colsumYC[20]_i_3_n_0 ,\colsumYC[20]_i_4_n_0 ,\colsumYC[20]_i_5_n_0 }),
        .O({\NLW_colsumYC_reg[20]_i_1_O_UNCONNECTED [7:5],\colsumYC_reg[20]_i_1_n_11 ,\colsumYC_reg[20]_i_1_n_12 ,\colsumYC_reg[20]_i_1_n_13 ,\colsumYC_reg[20]_i_1_n_14 ,\colsumYC_reg[20]_i_1_n_15 }),
        .S({1'b0,1'b0,1'b0,\colsumYC[20]_i_6_n_0 ,\colsumYC[20]_i_7_n_0 ,\colsumYC[20]_i_8_n_0 ,\colsumYC[20]_i_9_n_0 ,\colsumYC[20]_i_10_n_0 }));
  FDCE \colsumYC_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[7]_i_1_n_13 ),
        .Q(colsumY[23]));
  FDCE \colsumYC_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[7]_i_1_n_12 ),
        .Q(colsumY[24]));
  FDCE \colsumYC_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[7]_i_1_n_11 ),
        .Q(colsumY[25]));
  FDCE \colsumYC_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[7]_i_1_n_10 ),
        .Q(colsumY[26]));
  FDCE \colsumYC_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[7]_i_1_n_9 ),
        .Q(colsumY[27]));
  FDCE \colsumYC_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[7]_i_1_n_8 ),
        .Q(colsumY[28]));
  CARRY8 \colsumYC_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\colsumYC_reg[7]_i_1_n_0 ,\colsumYC_reg[7]_i_1_n_1 ,\colsumYC_reg[7]_i_1_n_2 ,\colsumYC_reg[7]_i_1_n_3 ,\colsumYC_reg[7]_i_1_n_4 ,\colsumYC_reg[7]_i_1_n_5 ,\colsumYC_reg[7]_i_1_n_6 ,\colsumYC_reg[7]_i_1_n_7 }),
        .DI({\colsumYC[7]_i_2_n_0 ,\colsumYC[7]_i_3_n_0 ,\colsumYC[7]_i_4_n_0 ,\colsumYC[7]_i_5_n_0 ,\colsumYC[7]_i_6_n_0 ,\colsumYC[7]_i_7_n_0 ,1'b0,\colsumYC[7]_i_8_n_0 }),
        .O({\colsumYC_reg[7]_i_1_n_8 ,\colsumYC_reg[7]_i_1_n_9 ,\colsumYC_reg[7]_i_1_n_10 ,\colsumYC_reg[7]_i_1_n_11 ,\colsumYC_reg[7]_i_1_n_12 ,\colsumYC_reg[7]_i_1_n_13 ,\colsumYC_reg[7]_i_1_n_14 ,\colsumYC_reg[7]_i_1_n_15 }),
        .S({\colsumYC[7]_i_9_n_0 ,\colsumYC[7]_i_10_n_0 ,\colsumYC[7]_i_11_n_0 ,\colsumYC[7]_i_12_n_0 ,\colsumYC[7]_i_13_n_0 ,\colsumYC[7]_i_14_n_0 ,\colsumYC[7]_i_15_n_0 ,\colsumYC[7]_i_16_n_0 }));
  FDCE \colsumYC_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[15]_i_1_n_15 ),
        .Q(colsumY[29]));
  FDCE \colsumYC_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumYC_reg[15]_i_1_n_14 ),
        .Q(colsumY[30]));
  (* SOFT_HLUTNM = "soft_lutpair895" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[100]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[37]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[100]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair894" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[101]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[38]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[101]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair893" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[102]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[39]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[102]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair892" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[103]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[40]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[103]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair891" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[104]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[41]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[104]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair911" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[21]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[21]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair910" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[22]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[22]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair909" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[23]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[23]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair908" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[24]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[24]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair907" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[25]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[25]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair906" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[26]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[26]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair905" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[27]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[27]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair904" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[28]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[28]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair903" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[29]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[29]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair902" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[30]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[30]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair901" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[31]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[31]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair900" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[32]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[32]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair899" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[33]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[33]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair898" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[34]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[34]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair897" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[35]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[35]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumY[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair896" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[36]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[36]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumY[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair895" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[37]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[37]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumY[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair894" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[38]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[38]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumY[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair893" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[39]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[39]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumY[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair892" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[40]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[40]),
        .I2(stateScore_reg_rep__17_n_0),
        .O(\colsumY[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair891" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \colsumY[41]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[41]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair911" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[84]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[21]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[84]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair910" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[85]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[22]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[85]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair909" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[86]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[23]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[86]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair908" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[87]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[24]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[87]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair907" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[88]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[25]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[88]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair906" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[89]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[26]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[89]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair905" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[90]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[27]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[90]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair904" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[91]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[28]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[91]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair903" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[92]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[29]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[92]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair902" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[93]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[30]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[93]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair901" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[94]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[31]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[94]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair900" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[95]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[32]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[95]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair899" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[96]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[33]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[96]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair898" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[97]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[34]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[97]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair897" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[98]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[35]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[98]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair896" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \colsumY[99]_i_1 
       (.I0(abcde__0[2]),
        .I1(colsumY[36]),
        .I2(stateScore_reg_rep__18_n_0),
        .O(\colsumY[99]_i_1_n_0 ));
  FDCE \colsumY_reg[0] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[84]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[0] ));
  FDCE \colsumY_reg[100] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[100]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[100] ));
  FDCE \colsumY_reg[101] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[101]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[101] ));
  FDCE \colsumY_reg[102] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[102]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[102] ));
  FDCE \colsumY_reg[103] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[103]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[103] ));
  FDCE \colsumY_reg[104] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[104]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[104] ));
  FDCE \colsumY_reg[10] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[94]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[10] ));
  FDCE \colsumY_reg[11] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[95]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[11] ));
  FDCE \colsumY_reg[12] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[96]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[12] ));
  FDCE \colsumY_reg[13] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[97]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[13] ));
  FDCE \colsumY_reg[14] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[98]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[14] ));
  FDCE \colsumY_reg[15] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[99]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[15] ));
  FDCE \colsumY_reg[16] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[100]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[16] ));
  FDCE \colsumY_reg[17] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[101]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[17] ));
  FDCE \colsumY_reg[18] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[102]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[18] ));
  FDCE \colsumY_reg[19] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[103]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[19] ));
  FDCE \colsumY_reg[1] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[85]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[1] ));
  FDCE \colsumY_reg[20] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[104]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[20] ));
  FDCE \colsumY_reg[21] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[21]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[21] ));
  FDCE \colsumY_reg[22] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[22]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[22] ));
  FDCE \colsumY_reg[23] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[23]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[23] ));
  FDCE \colsumY_reg[24] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[24]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[24] ));
  FDCE \colsumY_reg[25] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[25]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[25] ));
  FDCE \colsumY_reg[26] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[26]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[26] ));
  FDCE \colsumY_reg[27] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[27]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[27] ));
  FDCE \colsumY_reg[28] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[28]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[28] ));
  FDCE \colsumY_reg[29] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[29]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[29] ));
  FDCE \colsumY_reg[2] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[86]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[2] ));
  FDCE \colsumY_reg[30] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[30]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[30] ));
  FDCE \colsumY_reg[31] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[31]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[31] ));
  FDCE \colsumY_reg[32] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[32]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[32] ));
  FDCE \colsumY_reg[33] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[33]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[33] ));
  FDCE \colsumY_reg[34] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[34]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[34] ));
  FDCE \colsumY_reg[35] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[35]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[35] ));
  FDCE \colsumY_reg[36] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[36]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[36] ));
  FDCE \colsumY_reg[37] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[37]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[37] ));
  FDCE \colsumY_reg[38] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[38]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[38] ));
  FDCE \colsumY_reg[39] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[39]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[39] ));
  FDCE \colsumY_reg[3] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[87]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[3] ));
  FDCE \colsumY_reg[40] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[40]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[40] ));
  FDCE \colsumY_reg[41] 
       (.C(aclk_sig),
        .CE(\colsumX[41]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[41]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[41] ));
  FDCE \colsumY_reg[42] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[84]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[42] ));
  FDCE \colsumY_reg[43] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[85]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[43] ));
  FDCE \colsumY_reg[44] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[86]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[44] ));
  FDCE \colsumY_reg[45] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[87]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[45] ));
  FDCE \colsumY_reg[46] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[88]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[46] ));
  FDCE \colsumY_reg[47] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[89]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[47] ));
  FDCE \colsumY_reg[48] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[90]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[48] ));
  FDCE \colsumY_reg[49] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[91]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[49] ));
  FDCE \colsumY_reg[4] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[88]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[4] ));
  FDCE \colsumY_reg[50] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[92]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[50] ));
  FDCE \colsumY_reg[51] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[93]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[51] ));
  FDCE \colsumY_reg[52] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[94]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[52] ));
  FDCE \colsumY_reg[53] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[95]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[53] ));
  FDCE \colsumY_reg[54] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[96]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[54] ));
  FDCE \colsumY_reg[55] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[97]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[55] ));
  FDCE \colsumY_reg[56] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[98]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[56] ));
  FDCE \colsumY_reg[57] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[99]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[57] ));
  FDCE \colsumY_reg[58] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[100]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[58] ));
  FDCE \colsumY_reg[59] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[101]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[59] ));
  FDCE \colsumY_reg[5] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[89]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[5] ));
  FDCE \colsumY_reg[60] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[102]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[60] ));
  FDCE \colsumY_reg[61] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[103]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[61] ));
  FDCE \colsumY_reg[62] 
       (.C(aclk_sig),
        .CE(\colsumX[62]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[104]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[62] ));
  FDCE \colsumY_reg[63] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[84]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[63] ));
  FDCE \colsumY_reg[64] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[85]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[64] ));
  FDCE \colsumY_reg[65] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[86]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[65] ));
  FDCE \colsumY_reg[66] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[87]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[66] ));
  FDCE \colsumY_reg[67] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[88]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[67] ));
  FDCE \colsumY_reg[68] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[89]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[68] ));
  FDCE \colsumY_reg[69] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[90]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[69] ));
  FDCE \colsumY_reg[6] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[90]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[6] ));
  FDCE \colsumY_reg[70] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[91]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[70] ));
  FDCE \colsumY_reg[71] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[92]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[71] ));
  FDCE \colsumY_reg[72] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[93]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[72] ));
  FDCE \colsumY_reg[73] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[94]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[73] ));
  FDCE \colsumY_reg[74] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[95]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[74] ));
  FDCE \colsumY_reg[75] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[96]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[75] ));
  FDCE \colsumY_reg[76] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[97]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[76] ));
  FDCE \colsumY_reg[77] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[98]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[77] ));
  FDCE \colsumY_reg[78] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[99]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[78] ));
  FDCE \colsumY_reg[79] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[100]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[79] ));
  FDCE \colsumY_reg[7] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[91]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[7] ));
  FDCE \colsumY_reg[80] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[101]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[80] ));
  FDCE \colsumY_reg[81] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[102]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[81] ));
  FDCE \colsumY_reg[82] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[103]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[82] ));
  FDCE \colsumY_reg[83] 
       (.C(aclk_sig),
        .CE(\colsumX[83]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[104]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[83] ));
  FDCE \colsumY_reg[84] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[84]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[84] ));
  FDCE \colsumY_reg[85] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[85]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[85] ));
  FDCE \colsumY_reg[86] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[86]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[86] ));
  FDCE \colsumY_reg[87] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[87]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[87] ));
  FDCE \colsumY_reg[88] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[88]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[88] ));
  FDCE \colsumY_reg[89] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[89]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[89] ));
  FDCE \colsumY_reg[8] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[92]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[8] ));
  FDCE \colsumY_reg[90] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[90]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[90] ));
  FDCE \colsumY_reg[91] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[91]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[91] ));
  FDCE \colsumY_reg[92] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[92]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[92] ));
  FDCE \colsumY_reg[93] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[93]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[93] ));
  FDCE \colsumY_reg[94] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[94]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[94] ));
  FDCE \colsumY_reg[95] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[95]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[95] ));
  FDCE \colsumY_reg[96] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[96]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[96] ));
  FDCE \colsumY_reg[97] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[97]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[97] ));
  FDCE \colsumY_reg[98] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[98]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[98] ));
  FDCE \colsumY_reg[99] 
       (.C(aclk_sig),
        .CE(\colsumX[104]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[99]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[99] ));
  FDCE \colsumY_reg[9] 
       (.C(aclk_sig),
        .CE(\colsumX[20]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\colsumY[93]_i_1_n_0 ),
        .Q(\colsumY_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair940" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[0]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[0]),
        .O(\dIgrm1[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair842" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[10]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[10]),
        .O(\dIgrm1[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair843" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[11]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[11]),
        .O(\dIgrm1[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair955" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[12]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[12]),
        .O(\dIgrm1[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair844" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[13]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[13]),
        .O(\dIgrm1[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair956" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[14]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[14]),
        .O(\dIgrm1[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair956" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[15]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[15]),
        .O(\dIgrm1[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair942" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[16]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[16]),
        .O(\dIgrm1[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair957" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[17]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[17]),
        .O(\dIgrm1[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair845" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[18]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[18]),
        .O(\dIgrm1[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair846" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[19]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[19]),
        .O(\dIgrm1[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair953" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[1]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[1]),
        .O(\dIgrm1[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair957" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[20]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[20]),
        .O(\dIgrm1[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair847" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[21]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[21]),
        .O(\dIgrm1[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair958" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[22]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[22]),
        .O(\dIgrm1[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair958" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[23]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[23]),
        .O(\dIgrm1[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair943" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[24]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[24]),
        .O(\dIgrm1[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair959" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[25]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[25]),
        .O(\dIgrm1[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair848" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[26]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[26]),
        .O(\dIgrm1[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair849" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[27]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[27]),
        .O(\dIgrm1[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair959" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[28]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[28]),
        .O(\dIgrm1[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair850" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[29]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[29]),
        .O(\dIgrm1[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair839" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[2]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[2]),
        .O(\dIgrm1[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair960" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[30]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[30]),
        .O(\dIgrm1[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair960" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[31]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[31]),
        .O(\dIgrm1[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair944" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[32]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[32]),
        .O(\dIgrm1[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair961" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[33]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[33]),
        .O(\dIgrm1[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair851" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[34]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[34]),
        .O(\dIgrm1[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair852" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[35]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[35]),
        .O(\dIgrm1[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair961" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[36]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[36]),
        .O(\dIgrm1[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair853" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[37]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[37]),
        .O(\dIgrm1[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair962" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[38]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[38]),
        .O(\dIgrm1[38]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0040FFFF)) 
    \dIgrm1[39]_i_1 
       (.I0(\tkst_reg[0]_0 ),
        .I1(grayVideoinToManyAXIS_tvalid),
        .I2(stateCorner[0]),
        .I3(stateCorner[1]),
        .I4(rng_reg_1),
        .O(dy));
  (* SOFT_HLUTNM = "soft_lutpair962" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[39]_i_2 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[39]),
        .O(\dIgrm1[39]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair840" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[3]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[3]),
        .O(\dIgrm1[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair953" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[4]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[4]),
        .O(\dIgrm1[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair841" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[5]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[5]),
        .O(\dIgrm1[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair954" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[6]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[6]),
        .O(\dIgrm1[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair954" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[7]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[7]),
        .O(\dIgrm1[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair941" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[8]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[8]),
        .O(\dIgrm1[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair955" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \dIgrm1[9]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[9]),
        .O(\dIgrm1[9]_i_1_n_0 ));
  FDCE \dIgrm1_reg[0] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[0]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[0] ));
  FDCE \dIgrm1_reg[10] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[10]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[10] ));
  FDCE \dIgrm1_reg[11] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[11]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[11] ));
  FDCE \dIgrm1_reg[12] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[12]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[12] ));
  FDCE \dIgrm1_reg[13] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[13]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[13] ));
  FDCE \dIgrm1_reg[14] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[14]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[14] ));
  FDCE \dIgrm1_reg[15] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[15]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[15] ));
  FDCE \dIgrm1_reg[16] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[16]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[16] ));
  FDCE \dIgrm1_reg[17] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[17]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[17] ));
  FDCE \dIgrm1_reg[18] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[18]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[18] ));
  FDCE \dIgrm1_reg[19] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[19]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[19] ));
  FDCE \dIgrm1_reg[1] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[1]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[1] ));
  FDCE \dIgrm1_reg[20] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[20]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[20] ));
  FDCE \dIgrm1_reg[21] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[21]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[21] ));
  FDCE \dIgrm1_reg[22] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[22]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[22] ));
  FDCE \dIgrm1_reg[23] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[23]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[23] ));
  FDCE \dIgrm1_reg[24] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[24]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[24] ));
  FDCE \dIgrm1_reg[25] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[25]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[25] ));
  FDCE \dIgrm1_reg[26] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[26]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[26] ));
  FDCE \dIgrm1_reg[27] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[27]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[27] ));
  FDCE \dIgrm1_reg[28] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[28]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[28] ));
  FDCE \dIgrm1_reg[29] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[29]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[29] ));
  FDCE \dIgrm1_reg[2] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[2]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[2] ));
  FDCE \dIgrm1_reg[30] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[30]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[30] ));
  FDCE \dIgrm1_reg[31] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[31]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[31] ));
  FDCE \dIgrm1_reg[32] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[32]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[32] ));
  FDCE \dIgrm1_reg[33] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[33]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[33] ));
  FDCE \dIgrm1_reg[34] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[34]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[34] ));
  FDCE \dIgrm1_reg[35] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[35]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[35] ));
  FDCE \dIgrm1_reg[36] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[36]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[36] ));
  FDCE \dIgrm1_reg[37] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[37]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[37] ));
  FDCE \dIgrm1_reg[38] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[38]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[38] ));
  FDCE \dIgrm1_reg[39] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[39]_i_2_n_0 ),
        .Q(\dIgrm1_reg_n_0_[39] ));
  FDCE \dIgrm1_reg[3] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[3]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[3] ));
  FDCE \dIgrm1_reg[4] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[4]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[4] ));
  FDCE \dIgrm1_reg[5] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[5]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[5] ));
  FDCE \dIgrm1_reg[6] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[6]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[6] ));
  FDCE \dIgrm1_reg[7] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[7]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[7] ));
  FDCE \dIgrm1_reg[8] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[8]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[8] ));
  FDCE \dIgrm1_reg[9] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dIgrm1[9]_i_1_n_0 ),
        .Q(\dIgrm1_reg_n_0_[9] ));
  LUT5 #(
    .INIT(32'h0100FFFF)) 
    \dImd[39]_i_1 
       (.I0(myImd1buf_n_17),
        .I1(\dImd[39]_i_3_n_0 ),
        .I2(myImd1buf_n_18),
        .I3(\dImd[39]_i_5_n_0 ),
        .I4(\stateImdstream[0]_i_3_n_0 ),
        .O(\dImd[39]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFA8)) 
    \dImd[39]_i_3 
       (.I0(fghij[2]),
        .I1(fghij[1]),
        .I2(fghij[0]),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(p_1_in),
        .I5(myImd1buf_n_19),
        .O(\dImd[39]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair855" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \dImd[39]_i_5 
       (.I0(\aImdbuf[10]_i_3_n_0 ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(ceScore),
        .O(\dImd[39]_i_5_n_0 ));
  FDCE \dImd_reg[0] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd4buf_n_15),
        .Q(\dImd_reg_n_0_[0] ));
  FDCE \dImd_reg[10] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd3buf_n_13),
        .Q(data3[2]));
  FDCE \dImd_reg[11] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd3buf_n_12),
        .Q(data3[3]));
  FDCE \dImd_reg[12] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd3buf_n_11),
        .Q(data3[4]));
  FDCE \dImd_reg[13] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd3buf_n_10),
        .Q(data3[5]));
  FDCE \dImd_reg[14] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd3buf_n_9),
        .Q(data3[6]));
  FDCE \dImd_reg[15] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd3buf_n_8),
        .Q(data3[7]));
  FDCE \dImd_reg[16] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd2buf_n_15),
        .Q(data2[0]));
  FDCE \dImd_reg[17] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd2buf_n_14),
        .Q(data2[1]));
  FDCE \dImd_reg[18] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd2buf_n_13),
        .Q(data2[2]));
  FDCE \dImd_reg[19] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd2buf_n_12),
        .Q(data2[3]));
  FDCE \dImd_reg[1] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd4buf_n_14),
        .Q(\dImd_reg_n_0_[1] ));
  FDCE \dImd_reg[20] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd2buf_n_11),
        .Q(data2[4]));
  FDCE \dImd_reg[21] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd2buf_n_10),
        .Q(data2[5]));
  FDCE \dImd_reg[22] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd2buf_n_9),
        .Q(data2[6]));
  FDCE \dImd_reg[23] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd2buf_n_8),
        .Q(data2[7]));
  FDCE \dImd_reg[24] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd1buf_n_15),
        .Q(data1[0]));
  FDCE \dImd_reg[25] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd1buf_n_14),
        .Q(data1[1]));
  FDCE \dImd_reg[26] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd1buf_n_13),
        .Q(data1[2]));
  FDCE \dImd_reg[27] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd1buf_n_12),
        .Q(data1[3]));
  FDCE \dImd_reg[28] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd1buf_n_11),
        .Q(data1[4]));
  FDCE \dImd_reg[29] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd1buf_n_10),
        .Q(data1[5]));
  FDCE \dImd_reg[2] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd4buf_n_13),
        .Q(\dImd_reg_n_0_[2] ));
  FDCE \dImd_reg[30] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd1buf_n_9),
        .Q(data1[6]));
  FDCE \dImd_reg[31] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd1buf_n_8),
        .Q(data1[7]));
  FDCE \dImd_reg[32] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd0buf_n_15),
        .Q(data0[0]));
  FDCE \dImd_reg[33] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd0buf_n_14),
        .Q(data0[1]));
  FDCE \dImd_reg[34] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd0buf_n_13),
        .Q(data0[2]));
  FDCE \dImd_reg[35] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd0buf_n_12),
        .Q(data0[3]));
  FDCE \dImd_reg[36] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd0buf_n_11),
        .Q(data0[4]));
  FDCE \dImd_reg[37] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd0buf_n_10),
        .Q(data0[5]));
  FDCE \dImd_reg[38] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd0buf_n_9),
        .Q(data0[6]));
  FDCE \dImd_reg[39] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd0buf_n_8),
        .Q(data0[7]));
  FDCE \dImd_reg[3] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd4buf_n_12),
        .Q(\dImd_reg_n_0_[3] ));
  FDCE \dImd_reg[4] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd4buf_n_11),
        .Q(\dImd_reg_n_0_[4] ));
  FDCE \dImd_reg[5] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd4buf_n_10),
        .Q(\dImd_reg_n_0_[5] ));
  FDCE \dImd_reg[6] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd4buf_n_9),
        .Q(\dImd_reg_n_0_[6] ));
  FDCE \dImd_reg[7] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd4buf_n_8),
        .Q(\dImd_reg_n_0_[7] ));
  FDCE \dImd_reg[8] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd3buf_n_15),
        .Q(data3[0]));
  FDCE \dImd_reg[9] 
       (.C(aclk_sig),
        .CE(\dImd[39]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(myImd3buf_n_14),
        .Q(data3[1]));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[15]_i_10 
       (.I0(\termII_reg_n_0_[15] ),
        .I1(termI[15]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[15]_i_11 
       (.I0(\termII_reg_n_0_[14] ),
        .I1(termI[14]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[15]_i_12 
       (.I0(\termII_reg_n_0_[13] ),
        .I1(termI[13]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[15]_i_13 
       (.I0(\termII_reg_n_0_[12] ),
        .I1(termI[12]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[15]_i_14 
       (.I0(\termII_reg_n_0_[11] ),
        .I1(termI[11]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[15]_i_15 
       (.I0(\termII_reg_n_0_[10] ),
        .I1(termI[10]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[15]_i_16 
       (.I0(\termII_reg_n_0_[9] ),
        .I1(termI[9]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[15]_i_17 
       (.I0(\termII_reg_n_0_[8] ),
        .I1(termI[8]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[15]_i_2 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[15] ),
        .O(\diffI_II[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[15]_i_3 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[14] ),
        .O(\diffI_II[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[15]_i_4 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[13] ),
        .O(\diffI_II[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[15]_i_5 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[12] ),
        .O(\diffI_II[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[15]_i_6 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[11] ),
        .O(\diffI_II[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[15]_i_7 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[10] ),
        .O(\diffI_II[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[15]_i_8 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[9] ),
        .O(\diffI_II[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[15]_i_9 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[8] ),
        .O(\diffI_II[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[23]_i_10 
       (.I0(\termII_reg_n_0_[23] ),
        .I1(termI[23]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[23]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[23]_i_11 
       (.I0(\termII_reg_n_0_[22] ),
        .I1(termI[22]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[23]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[23]_i_12 
       (.I0(\termII_reg_n_0_[21] ),
        .I1(termI[21]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[23]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[23]_i_13 
       (.I0(\termII_reg_n_0_[20] ),
        .I1(termI[20]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[23]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[23]_i_14 
       (.I0(\termII_reg_n_0_[19] ),
        .I1(termI[19]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[23]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[23]_i_15 
       (.I0(\termII_reg_n_0_[18] ),
        .I1(termI[18]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[23]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[23]_i_16 
       (.I0(\termII_reg_n_0_[17] ),
        .I1(termI[17]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[23]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[23]_i_17 
       (.I0(\termII_reg_n_0_[16] ),
        .I1(termI[16]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[23]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[23]_i_2 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[23] ),
        .O(\diffI_II[23]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[23]_i_3 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[22] ),
        .O(\diffI_II[23]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[23]_i_4 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[21] ),
        .O(\diffI_II[23]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[23]_i_5 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[20] ),
        .O(\diffI_II[23]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[23]_i_6 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[19] ),
        .O(\diffI_II[23]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[23]_i_7 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[18] ),
        .O(\diffI_II[23]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[23]_i_8 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[17] ),
        .O(\diffI_II[23]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[23]_i_9 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[16] ),
        .O(\diffI_II[23]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[31]_i_10 
       (.I0(\termII_reg_n_0_[31] ),
        .I1(termI[31]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[31]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[31]_i_11 
       (.I0(\termII_reg_n_0_[30] ),
        .I1(termI[30]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[31]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[31]_i_12 
       (.I0(\termII_reg_n_0_[29] ),
        .I1(termI[29]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[31]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[31]_i_13 
       (.I0(\termII_reg_n_0_[28] ),
        .I1(termI[28]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[31]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[31]_i_14 
       (.I0(\termII_reg_n_0_[27] ),
        .I1(termI[27]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[31]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[31]_i_15 
       (.I0(\termII_reg_n_0_[26] ),
        .I1(termI[26]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[31]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[31]_i_16 
       (.I0(\termII_reg_n_0_[25] ),
        .I1(termI[25]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[31]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[31]_i_17 
       (.I0(\termII_reg_n_0_[24] ),
        .I1(termI[24]),
        .I2(stateScore_reg_rep__4_n_0),
        .O(\diffI_II[31]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[31]_i_2 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[31] ),
        .O(\diffI_II[31]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[31]_i_3 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[30] ),
        .O(\diffI_II[31]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[31]_i_4 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[29] ),
        .O(\diffI_II[31]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[31]_i_5 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[28] ),
        .O(\diffI_II[31]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[31]_i_6 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[27] ),
        .O(\diffI_II[31]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[31]_i_7 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[26] ),
        .O(\diffI_II[31]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[31]_i_8 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[25] ),
        .O(\diffI_II[31]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[31]_i_9 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(\termII_reg_n_0_[24] ),
        .O(\diffI_II[31]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[39]_i_10 
       (.I0(\termII_reg_n_0_[39] ),
        .I1(termI[39]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[39]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[39]_i_11 
       (.I0(\termII_reg_n_0_[38] ),
        .I1(termI[38]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[39]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[39]_i_12 
       (.I0(\termII_reg_n_0_[37] ),
        .I1(termI[37]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[39]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[39]_i_13 
       (.I0(\termII_reg_n_0_[36] ),
        .I1(termI[36]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[39]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[39]_i_14 
       (.I0(\termII_reg_n_0_[35] ),
        .I1(termI[35]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[39]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[39]_i_15 
       (.I0(\termII_reg_n_0_[34] ),
        .I1(termI[34]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[39]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[39]_i_16 
       (.I0(\termII_reg_n_0_[33] ),
        .I1(termI[33]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[39]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[39]_i_17 
       (.I0(\termII_reg_n_0_[32] ),
        .I1(termI[32]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[39]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[39]_i_2 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[39] ),
        .O(\diffI_II[39]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[39]_i_3 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[38] ),
        .O(\diffI_II[39]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[39]_i_4 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[37] ),
        .O(\diffI_II[39]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[39]_i_5 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[36] ),
        .O(\diffI_II[39]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[39]_i_6 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[35] ),
        .O(\diffI_II[39]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[39]_i_7 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[34] ),
        .O(\diffI_II[39]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[39]_i_8 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[33] ),
        .O(\diffI_II[39]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[39]_i_9 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[32] ),
        .O(\diffI_II[39]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[46]_i_10 
       (.I0(\termII_reg_n_0_[44] ),
        .I1(termI[44]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[46]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[46]_i_11 
       (.I0(\termII_reg_n_0_[43] ),
        .I1(termI[43]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[46]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[46]_i_12 
       (.I0(\termII_reg_n_0_[42] ),
        .I1(termI[42]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[46]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[46]_i_13 
       (.I0(\termII_reg_n_0_[41] ),
        .I1(termI[41]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[46]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[46]_i_14 
       (.I0(\termII_reg_n_0_[40] ),
        .I1(termI[40]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[46]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[46]_i_2 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[45] ),
        .O(\diffI_II[46]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[46]_i_3 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[44] ),
        .O(\diffI_II[46]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[46]_i_4 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[43] ),
        .O(\diffI_II[46]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[46]_i_5 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[42] ),
        .O(\diffI_II[46]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[46]_i_6 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[41] ),
        .O(\diffI_II[46]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[46]_i_7 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(\termII_reg_n_0_[40] ),
        .O(\diffI_II[46]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[46]_i_8 
       (.I0(\termII_reg_n_0_[45] ),
        .I1(termI[45]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[46]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[46]_i_9 
       (.I0(\termII_reg_n_0_[45] ),
        .I1(termI[45]),
        .I2(stateScore_reg_rep__14_n_0),
        .O(\diffI_II[46]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[7]_i_10 
       (.I0(\termII_reg_n_0_[7] ),
        .I1(termI[7]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[7]_i_11 
       (.I0(\termII_reg_n_0_[6] ),
        .I1(termI[6]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[7]_i_12 
       (.I0(\termII_reg_n_0_[5] ),
        .I1(termI[5]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[7]_i_13 
       (.I0(\termII_reg_n_0_[4] ),
        .I1(termI[4]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[7]_i_14 
       (.I0(\termII_reg_n_0_[3] ),
        .I1(termI[3]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[7]_i_15 
       (.I0(\termII_reg_n_0_[2] ),
        .I1(termI[2]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[7]_i_16 
       (.I0(\termII_reg_n_0_[1] ),
        .I1(termI[1]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \diffI_II[7]_i_17 
       (.I0(\termII_reg_n_0_[0] ),
        .I1(termI[0]),
        .I2(stateScore_reg_rep__3_n_0),
        .O(\diffI_II[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[7]_i_2 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[7] ),
        .O(\diffI_II[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[7]_i_3 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[6] ),
        .O(\diffI_II[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[7]_i_4 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[5] ),
        .O(\diffI_II[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[7]_i_5 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[4] ),
        .O(\diffI_II[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[7]_i_6 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[3] ),
        .O(\diffI_II[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[7]_i_7 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[2] ),
        .O(\diffI_II[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[7]_i_8 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[1] ),
        .O(\diffI_II[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \diffI_II[7]_i_9 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(\termII_reg_n_0_[0] ),
        .O(\diffI_II[7]_i_9_n_0 ));
  FDCE \diffI_II_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[7]_i_1_n_15 ),
        .Q(diffI_II[0]));
  FDCE \diffI_II_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[15]_i_1_n_13 ),
        .Q(diffI_II[10]));
  FDCE \diffI_II_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[15]_i_1_n_12 ),
        .Q(diffI_II[11]));
  FDCE \diffI_II_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[15]_i_1_n_11 ),
        .Q(diffI_II[12]));
  FDCE \diffI_II_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[15]_i_1_n_10 ),
        .Q(diffI_II[13]));
  FDCE \diffI_II_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[15]_i_1_n_9 ),
        .Q(diffI_II[14]));
  FDCE \diffI_II_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[15]_i_1_n_8 ),
        .Q(diffI_II[15]));
  CARRY8 \diffI_II_reg[15]_i_1 
       (.CI(\diffI_II_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\diffI_II_reg[15]_i_1_n_0 ,\diffI_II_reg[15]_i_1_n_1 ,\diffI_II_reg[15]_i_1_n_2 ,\diffI_II_reg[15]_i_1_n_3 ,\diffI_II_reg[15]_i_1_n_4 ,\diffI_II_reg[15]_i_1_n_5 ,\diffI_II_reg[15]_i_1_n_6 ,\diffI_II_reg[15]_i_1_n_7 }),
        .DI({\diffI_II[15]_i_2_n_0 ,\diffI_II[15]_i_3_n_0 ,\diffI_II[15]_i_4_n_0 ,\diffI_II[15]_i_5_n_0 ,\diffI_II[15]_i_6_n_0 ,\diffI_II[15]_i_7_n_0 ,\diffI_II[15]_i_8_n_0 ,\diffI_II[15]_i_9_n_0 }),
        .O({\diffI_II_reg[15]_i_1_n_8 ,\diffI_II_reg[15]_i_1_n_9 ,\diffI_II_reg[15]_i_1_n_10 ,\diffI_II_reg[15]_i_1_n_11 ,\diffI_II_reg[15]_i_1_n_12 ,\diffI_II_reg[15]_i_1_n_13 ,\diffI_II_reg[15]_i_1_n_14 ,\diffI_II_reg[15]_i_1_n_15 }),
        .S({\diffI_II[15]_i_10_n_0 ,\diffI_II[15]_i_11_n_0 ,\diffI_II[15]_i_12_n_0 ,\diffI_II[15]_i_13_n_0 ,\diffI_II[15]_i_14_n_0 ,\diffI_II[15]_i_15_n_0 ,\diffI_II[15]_i_16_n_0 ,\diffI_II[15]_i_17_n_0 }));
  FDCE \diffI_II_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[23]_i_1_n_15 ),
        .Q(diffI_II[16]));
  FDCE \diffI_II_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[23]_i_1_n_14 ),
        .Q(diffI_II[17]));
  FDCE \diffI_II_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[23]_i_1_n_13 ),
        .Q(diffI_II[18]));
  FDCE \diffI_II_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[23]_i_1_n_12 ),
        .Q(diffI_II[19]));
  FDCE \diffI_II_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[7]_i_1_n_14 ),
        .Q(diffI_II[1]));
  FDCE \diffI_II_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[23]_i_1_n_11 ),
        .Q(diffI_II[20]));
  FDCE \diffI_II_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[23]_i_1_n_10 ),
        .Q(diffI_II[21]));
  FDCE \diffI_II_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[23]_i_1_n_9 ),
        .Q(diffI_II[22]));
  FDCE \diffI_II_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[23]_i_1_n_8 ),
        .Q(diffI_II[23]));
  CARRY8 \diffI_II_reg[23]_i_1 
       (.CI(\diffI_II_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\diffI_II_reg[23]_i_1_n_0 ,\diffI_II_reg[23]_i_1_n_1 ,\diffI_II_reg[23]_i_1_n_2 ,\diffI_II_reg[23]_i_1_n_3 ,\diffI_II_reg[23]_i_1_n_4 ,\diffI_II_reg[23]_i_1_n_5 ,\diffI_II_reg[23]_i_1_n_6 ,\diffI_II_reg[23]_i_1_n_7 }),
        .DI({\diffI_II[23]_i_2_n_0 ,\diffI_II[23]_i_3_n_0 ,\diffI_II[23]_i_4_n_0 ,\diffI_II[23]_i_5_n_0 ,\diffI_II[23]_i_6_n_0 ,\diffI_II[23]_i_7_n_0 ,\diffI_II[23]_i_8_n_0 ,\diffI_II[23]_i_9_n_0 }),
        .O({\diffI_II_reg[23]_i_1_n_8 ,\diffI_II_reg[23]_i_1_n_9 ,\diffI_II_reg[23]_i_1_n_10 ,\diffI_II_reg[23]_i_1_n_11 ,\diffI_II_reg[23]_i_1_n_12 ,\diffI_II_reg[23]_i_1_n_13 ,\diffI_II_reg[23]_i_1_n_14 ,\diffI_II_reg[23]_i_1_n_15 }),
        .S({\diffI_II[23]_i_10_n_0 ,\diffI_II[23]_i_11_n_0 ,\diffI_II[23]_i_12_n_0 ,\diffI_II[23]_i_13_n_0 ,\diffI_II[23]_i_14_n_0 ,\diffI_II[23]_i_15_n_0 ,\diffI_II[23]_i_16_n_0 ,\diffI_II[23]_i_17_n_0 }));
  FDCE \diffI_II_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[31]_i_1_n_15 ),
        .Q(diffI_II[24]));
  FDCE \diffI_II_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[31]_i_1_n_14 ),
        .Q(diffI_II[25]));
  FDCE \diffI_II_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[31]_i_1_n_13 ),
        .Q(diffI_II[26]));
  FDCE \diffI_II_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[31]_i_1_n_12 ),
        .Q(diffI_II[27]));
  FDCE \diffI_II_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[31]_i_1_n_11 ),
        .Q(diffI_II[28]));
  FDCE \diffI_II_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[31]_i_1_n_10 ),
        .Q(diffI_II[29]));
  FDCE \diffI_II_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[7]_i_1_n_13 ),
        .Q(diffI_II[2]));
  FDCE \diffI_II_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[31]_i_1_n_9 ),
        .Q(diffI_II[30]));
  FDCE \diffI_II_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[31]_i_1_n_8 ),
        .Q(diffI_II[31]));
  CARRY8 \diffI_II_reg[31]_i_1 
       (.CI(\diffI_II_reg[23]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\diffI_II_reg[31]_i_1_n_0 ,\diffI_II_reg[31]_i_1_n_1 ,\diffI_II_reg[31]_i_1_n_2 ,\diffI_II_reg[31]_i_1_n_3 ,\diffI_II_reg[31]_i_1_n_4 ,\diffI_II_reg[31]_i_1_n_5 ,\diffI_II_reg[31]_i_1_n_6 ,\diffI_II_reg[31]_i_1_n_7 }),
        .DI({\diffI_II[31]_i_2_n_0 ,\diffI_II[31]_i_3_n_0 ,\diffI_II[31]_i_4_n_0 ,\diffI_II[31]_i_5_n_0 ,\diffI_II[31]_i_6_n_0 ,\diffI_II[31]_i_7_n_0 ,\diffI_II[31]_i_8_n_0 ,\diffI_II[31]_i_9_n_0 }),
        .O({\diffI_II_reg[31]_i_1_n_8 ,\diffI_II_reg[31]_i_1_n_9 ,\diffI_II_reg[31]_i_1_n_10 ,\diffI_II_reg[31]_i_1_n_11 ,\diffI_II_reg[31]_i_1_n_12 ,\diffI_II_reg[31]_i_1_n_13 ,\diffI_II_reg[31]_i_1_n_14 ,\diffI_II_reg[31]_i_1_n_15 }),
        .S({\diffI_II[31]_i_10_n_0 ,\diffI_II[31]_i_11_n_0 ,\diffI_II[31]_i_12_n_0 ,\diffI_II[31]_i_13_n_0 ,\diffI_II[31]_i_14_n_0 ,\diffI_II[31]_i_15_n_0 ,\diffI_II[31]_i_16_n_0 ,\diffI_II[31]_i_17_n_0 }));
  FDCE \diffI_II_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[39]_i_1_n_15 ),
        .Q(diffI_II[32]));
  FDCE \diffI_II_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[39]_i_1_n_14 ),
        .Q(diffI_II[33]));
  FDCE \diffI_II_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[39]_i_1_n_13 ),
        .Q(diffI_II[34]));
  FDCE \diffI_II_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[39]_i_1_n_12 ),
        .Q(diffI_II[35]));
  FDCE \diffI_II_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[39]_i_1_n_11 ),
        .Q(diffI_II[36]));
  FDCE \diffI_II_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[39]_i_1_n_10 ),
        .Q(diffI_II[37]));
  FDCE \diffI_II_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[39]_i_1_n_9 ),
        .Q(diffI_II[38]));
  FDCE \diffI_II_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[39]_i_1_n_8 ),
        .Q(diffI_II[39]));
  CARRY8 \diffI_II_reg[39]_i_1 
       (.CI(\diffI_II_reg[31]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\diffI_II_reg[39]_i_1_n_0 ,\diffI_II_reg[39]_i_1_n_1 ,\diffI_II_reg[39]_i_1_n_2 ,\diffI_II_reg[39]_i_1_n_3 ,\diffI_II_reg[39]_i_1_n_4 ,\diffI_II_reg[39]_i_1_n_5 ,\diffI_II_reg[39]_i_1_n_6 ,\diffI_II_reg[39]_i_1_n_7 }),
        .DI({\diffI_II[39]_i_2_n_0 ,\diffI_II[39]_i_3_n_0 ,\diffI_II[39]_i_4_n_0 ,\diffI_II[39]_i_5_n_0 ,\diffI_II[39]_i_6_n_0 ,\diffI_II[39]_i_7_n_0 ,\diffI_II[39]_i_8_n_0 ,\diffI_II[39]_i_9_n_0 }),
        .O({\diffI_II_reg[39]_i_1_n_8 ,\diffI_II_reg[39]_i_1_n_9 ,\diffI_II_reg[39]_i_1_n_10 ,\diffI_II_reg[39]_i_1_n_11 ,\diffI_II_reg[39]_i_1_n_12 ,\diffI_II_reg[39]_i_1_n_13 ,\diffI_II_reg[39]_i_1_n_14 ,\diffI_II_reg[39]_i_1_n_15 }),
        .S({\diffI_II[39]_i_10_n_0 ,\diffI_II[39]_i_11_n_0 ,\diffI_II[39]_i_12_n_0 ,\diffI_II[39]_i_13_n_0 ,\diffI_II[39]_i_14_n_0 ,\diffI_II[39]_i_15_n_0 ,\diffI_II[39]_i_16_n_0 ,\diffI_II[39]_i_17_n_0 }));
  FDCE \diffI_II_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[7]_i_1_n_12 ),
        .Q(diffI_II[3]));
  FDCE \diffI_II_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[46]_i_1_n_15 ),
        .Q(diffI_II[40]));
  FDCE \diffI_II_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[46]_i_1_n_14 ),
        .Q(diffI_II[41]));
  FDCE \diffI_II_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[46]_i_1_n_13 ),
        .Q(diffI_II[42]));
  FDCE \diffI_II_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[46]_i_1_n_12 ),
        .Q(diffI_II[43]));
  FDCE \diffI_II_reg[44] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[46]_i_1_n_11 ),
        .Q(diffI_II[44]));
  FDCE \diffI_II_reg[45] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[46]_i_1_n_10 ),
        .Q(diffI_II[45]));
  FDCE \diffI_II_reg[46] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[46]_i_1_n_9 ),
        .Q(diffI_II[46]));
  CARRY8 \diffI_II_reg[46]_i_1 
       (.CI(\diffI_II_reg[39]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_diffI_II_reg[46]_i_1_CO_UNCONNECTED [7:6],\diffI_II_reg[46]_i_1_n_2 ,\diffI_II_reg[46]_i_1_n_3 ,\diffI_II_reg[46]_i_1_n_4 ,\diffI_II_reg[46]_i_1_n_5 ,\diffI_II_reg[46]_i_1_n_6 ,\diffI_II_reg[46]_i_1_n_7 }),
        .DI({1'b0,1'b0,\diffI_II[46]_i_2_n_0 ,\diffI_II[46]_i_3_n_0 ,\diffI_II[46]_i_4_n_0 ,\diffI_II[46]_i_5_n_0 ,\diffI_II[46]_i_6_n_0 ,\diffI_II[46]_i_7_n_0 }),
        .O({\NLW_diffI_II_reg[46]_i_1_O_UNCONNECTED [7],\diffI_II_reg[46]_i_1_n_9 ,\diffI_II_reg[46]_i_1_n_10 ,\diffI_II_reg[46]_i_1_n_11 ,\diffI_II_reg[46]_i_1_n_12 ,\diffI_II_reg[46]_i_1_n_13 ,\diffI_II_reg[46]_i_1_n_14 ,\diffI_II_reg[46]_i_1_n_15 }),
        .S({1'b0,\diffI_II[46]_i_8_n_0 ,\diffI_II[46]_i_9_n_0 ,\diffI_II[46]_i_10_n_0 ,\diffI_II[46]_i_11_n_0 ,\diffI_II[46]_i_12_n_0 ,\diffI_II[46]_i_13_n_0 ,\diffI_II[46]_i_14_n_0 }));
  FDCE \diffI_II_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[7]_i_1_n_11 ),
        .Q(diffI_II[4]));
  FDCE \diffI_II_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[7]_i_1_n_10 ),
        .Q(diffI_II[5]));
  FDCE \diffI_II_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[7]_i_1_n_9 ),
        .Q(diffI_II[6]));
  FDCE \diffI_II_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[7]_i_1_n_8 ),
        .Q(diffI_II[7]));
  CARRY8 \diffI_II_reg[7]_i_1 
       (.CI(stateScore_reg_rep__3_n_0),
        .CI_TOP(1'b0),
        .CO({\diffI_II_reg[7]_i_1_n_0 ,\diffI_II_reg[7]_i_1_n_1 ,\diffI_II_reg[7]_i_1_n_2 ,\diffI_II_reg[7]_i_1_n_3 ,\diffI_II_reg[7]_i_1_n_4 ,\diffI_II_reg[7]_i_1_n_5 ,\diffI_II_reg[7]_i_1_n_6 ,\diffI_II_reg[7]_i_1_n_7 }),
        .DI({\diffI_II[7]_i_2_n_0 ,\diffI_II[7]_i_3_n_0 ,\diffI_II[7]_i_4_n_0 ,\diffI_II[7]_i_5_n_0 ,\diffI_II[7]_i_6_n_0 ,\diffI_II[7]_i_7_n_0 ,\diffI_II[7]_i_8_n_0 ,\diffI_II[7]_i_9_n_0 }),
        .O({\diffI_II_reg[7]_i_1_n_8 ,\diffI_II_reg[7]_i_1_n_9 ,\diffI_II_reg[7]_i_1_n_10 ,\diffI_II_reg[7]_i_1_n_11 ,\diffI_II_reg[7]_i_1_n_12 ,\diffI_II_reg[7]_i_1_n_13 ,\diffI_II_reg[7]_i_1_n_14 ,\diffI_II_reg[7]_i_1_n_15 }),
        .S({\diffI_II[7]_i_10_n_0 ,\diffI_II[7]_i_11_n_0 ,\diffI_II[7]_i_12_n_0 ,\diffI_II[7]_i_13_n_0 ,\diffI_II[7]_i_14_n_0 ,\diffI_II[7]_i_15_n_0 ,\diffI_II[7]_i_16_n_0 ,\diffI_II[7]_i_17_n_0 }));
  FDCE \diffI_II_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[15]_i_1_n_15 ),
        .Q(diffI_II[8]));
  FDCE \diffI_II_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_II_reg[15]_i_1_n_14 ),
        .Q(diffI_II[9]));
  (* SOFT_HLUTNM = "soft_lutpair1440" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[0]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[0]),
        .O(\diffI_IIp1[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1435" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[10]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[10]),
        .O(\diffI_IIp1[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1435" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[11]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[11]),
        .O(\diffI_IIp1[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1434" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[12]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[12]),
        .O(\diffI_IIp1[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1434" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[13]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[13]),
        .O(\diffI_IIp1[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1433" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[14]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[14]),
        .O(\diffI_IIp1[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1433" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[15]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[15]),
        .O(\diffI_IIp1[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1432" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[16]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[16]),
        .O(\diffI_IIp1[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1432" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[17]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[17]),
        .O(\diffI_IIp1[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1431" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[18]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[18]),
        .O(\diffI_IIp1[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1431" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[19]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[19]),
        .O(\diffI_IIp1[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1440" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[1]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[1]),
        .O(\diffI_IIp1[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1430" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[20]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[20]),
        .O(\diffI_IIp1[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1430" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[21]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[21]),
        .O(\diffI_IIp1[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1429" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[22]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[22]),
        .O(\diffI_IIp1[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1429" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[23]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[23]),
        .O(\diffI_IIp1[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1428" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[24]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[24]),
        .O(\diffI_IIp1[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1427" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[25]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[25]),
        .O(\diffI_IIp1[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1427" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[26]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[26]),
        .O(\diffI_IIp1[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1426" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[27]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[27]),
        .O(\diffI_IIp1[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1426" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[28]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[28]),
        .O(\diffI_IIp1[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1425" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[29]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[29]),
        .O(\diffI_IIp1[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1439" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[2]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[2]),
        .O(\diffI_IIp1[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1425" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[30]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[30]),
        .O(\diffI_IIp1[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1424" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[31]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[31]),
        .O(\diffI_IIp1[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1424" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[32]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[32]),
        .O(\diffI_IIp1[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1423" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[33]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[33]),
        .O(\diffI_IIp1[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1423" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[34]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[34]),
        .O(\diffI_IIp1[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1422" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[35]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[35]),
        .O(\diffI_IIp1[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1422" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[36]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[36]),
        .O(\diffI_IIp1[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1421" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[37]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[37]),
        .O(\diffI_IIp1[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1421" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[38]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[38]),
        .O(\diffI_IIp1[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1420" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[39]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[39]),
        .O(\diffI_IIp1[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1439" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[3]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[3]),
        .O(\diffI_IIp1[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1420" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[40]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[40]),
        .O(\diffI_IIp1[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1419" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[41]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[41]),
        .O(\diffI_IIp1[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1419" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[42]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[42]),
        .O(\diffI_IIp1[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1418" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[43]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[43]),
        .O(\diffI_IIp1[43]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1418" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[44]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[44]),
        .O(\diffI_IIp1[44]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1417" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[45]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[45]),
        .O(\diffI_IIp1[45]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1417" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[46]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(diffI_II[46]),
        .O(\diffI_IIp1[46]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1438" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[4]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[4]),
        .O(\diffI_IIp1[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1438" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[5]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[5]),
        .O(\diffI_IIp1[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1437" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[6]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[6]),
        .O(\diffI_IIp1[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1437" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[7]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[7]),
        .O(\diffI_IIp1[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1436" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[8]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[8]),
        .O(\diffI_IIp1[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1436" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \diffI_IIp1[9]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(diffI_II[9]),
        .O(\diffI_IIp1[9]_i_1_n_0 ));
  FDCE \diffI_IIp1_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[0]_i_1_n_0 ),
        .Q(diffI_IIp1[0]));
  FDCE \diffI_IIp1_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[10]_i_1_n_0 ),
        .Q(diffI_IIp1[10]));
  FDCE \diffI_IIp1_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[11]_i_1_n_0 ),
        .Q(diffI_IIp1[11]));
  FDCE \diffI_IIp1_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[12]_i_1_n_0 ),
        .Q(diffI_IIp1[12]));
  FDCE \diffI_IIp1_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[13]_i_1_n_0 ),
        .Q(diffI_IIp1[13]));
  FDCE \diffI_IIp1_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[14]_i_1_n_0 ),
        .Q(diffI_IIp1[14]));
  FDCE \diffI_IIp1_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[15]_i_1_n_0 ),
        .Q(diffI_IIp1[15]));
  FDCE \diffI_IIp1_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[16]_i_1_n_0 ),
        .Q(diffI_IIp1[16]));
  FDCE \diffI_IIp1_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[17]_i_1_n_0 ),
        .Q(diffI_IIp1[17]));
  FDCE \diffI_IIp1_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[18]_i_1_n_0 ),
        .Q(diffI_IIp1[18]));
  FDCE \diffI_IIp1_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[19]_i_1_n_0 ),
        .Q(diffI_IIp1[19]));
  FDCE \diffI_IIp1_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[1]_i_1_n_0 ),
        .Q(diffI_IIp1[1]));
  FDCE \diffI_IIp1_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[20]_i_1_n_0 ),
        .Q(diffI_IIp1[20]));
  FDCE \diffI_IIp1_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[21]_i_1_n_0 ),
        .Q(diffI_IIp1[21]));
  FDCE \diffI_IIp1_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[22]_i_1_n_0 ),
        .Q(diffI_IIp1[22]));
  FDCE \diffI_IIp1_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[23]_i_1_n_0 ),
        .Q(diffI_IIp1[23]));
  FDCE \diffI_IIp1_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[24]_i_1_n_0 ),
        .Q(diffI_IIp1[24]));
  FDCE \diffI_IIp1_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[25]_i_1_n_0 ),
        .Q(diffI_IIp1[25]));
  FDCE \diffI_IIp1_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[26]_i_1_n_0 ),
        .Q(diffI_IIp1[26]));
  FDCE \diffI_IIp1_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[27]_i_1_n_0 ),
        .Q(diffI_IIp1[27]));
  FDCE \diffI_IIp1_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[28]_i_1_n_0 ),
        .Q(diffI_IIp1[28]));
  FDCE \diffI_IIp1_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[29]_i_1_n_0 ),
        .Q(diffI_IIp1[29]));
  FDCE \diffI_IIp1_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[2]_i_1_n_0 ),
        .Q(diffI_IIp1[2]));
  FDCE \diffI_IIp1_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[30]_i_1_n_0 ),
        .Q(diffI_IIp1[30]));
  FDCE \diffI_IIp1_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[31]_i_1_n_0 ),
        .Q(diffI_IIp1[31]));
  FDCE \diffI_IIp1_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[32]_i_1_n_0 ),
        .Q(diffI_IIp1[32]));
  FDCE \diffI_IIp1_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[33]_i_1_n_0 ),
        .Q(diffI_IIp1[33]));
  FDCE \diffI_IIp1_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[34]_i_1_n_0 ),
        .Q(diffI_IIp1[34]));
  FDCE \diffI_IIp1_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[35]_i_1_n_0 ),
        .Q(diffI_IIp1[35]));
  FDCE \diffI_IIp1_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[36]_i_1_n_0 ),
        .Q(diffI_IIp1[36]));
  FDCE \diffI_IIp1_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[37]_i_1_n_0 ),
        .Q(diffI_IIp1[37]));
  FDCE \diffI_IIp1_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[38]_i_1_n_0 ),
        .Q(diffI_IIp1[38]));
  FDCE \diffI_IIp1_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[39]_i_1_n_0 ),
        .Q(diffI_IIp1[39]));
  FDCE \diffI_IIp1_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[3]_i_1_n_0 ),
        .Q(diffI_IIp1[3]));
  FDCE \diffI_IIp1_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[40]_i_1_n_0 ),
        .Q(diffI_IIp1[40]));
  FDCE \diffI_IIp1_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[41]_i_1_n_0 ),
        .Q(diffI_IIp1[41]));
  FDCE \diffI_IIp1_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[42]_i_1_n_0 ),
        .Q(diffI_IIp1[42]));
  FDCE \diffI_IIp1_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[43]_i_1_n_0 ),
        .Q(diffI_IIp1[43]));
  FDCE \diffI_IIp1_reg[44] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[44]_i_1_n_0 ),
        .Q(diffI_IIp1[44]));
  FDCE \diffI_IIp1_reg[45] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[45]_i_1_n_0 ),
        .Q(diffI_IIp1[45]));
  FDCE \diffI_IIp1_reg[46] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[46]_i_1_n_0 ),
        .Q(diffI_IIp1[46]));
  FDCE \diffI_IIp1_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[4]_i_1_n_0 ),
        .Q(diffI_IIp1[4]));
  FDCE \diffI_IIp1_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[5]_i_1_n_0 ),
        .Q(diffI_IIp1[5]));
  FDCE \diffI_IIp1_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[6]_i_1_n_0 ),
        .Q(diffI_IIp1[6]));
  FDCE \diffI_IIp1_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[7]_i_1_n_0 ),
        .Q(diffI_IIp1[7]));
  FDCE \diffI_IIp1_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[8]_i_1_n_0 ),
        .Q(diffI_IIp1[8]));
  FDCE \diffI_IIp1_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\diffI_IIp1[9]_i_1_n_0 ),
        .Q(diffI_IIp1[9]));
  (* SOFT_HLUTNM = "soft_lutpair801" *) 
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[0]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\col_lcl_reg[0]__0_n_0 ),
        .O(\dwrCoobuf[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair788" *) 
  LUT5 #(
    .INIT(32'h4E000A00)) 
    \dwrCoobuf[10]_i_1 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(enCoobuf_reg_0),
        .I3(rng_reg_0),
        .I4(\col_lcl_reg[10]__0_n_0 ),
        .O(\dwrCoobuf[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair802" *) 
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[16]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(row_lcl_reg[0]),
        .O(\dwrCoobuf[16]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[17]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(row_lcl_reg[1]),
        .O(\dwrCoobuf[17]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[18]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(row_lcl_reg[2]),
        .O(\dwrCoobuf[18]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[19]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(Q[0]),
        .O(\dwrCoobuf[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair789" *) 
  LUT5 #(
    .INIT(32'h4E000A00)) 
    \dwrCoobuf[1]_i_1 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(enCoobuf_reg_0),
        .I3(rng_reg_0),
        .I4(\col_lcl_reg[1]__0_n_0 ),
        .O(\dwrCoobuf[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[20]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(Q[1]),
        .O(\dwrCoobuf[20]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[21]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(Q[2]),
        .O(\dwrCoobuf[21]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[22]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(Q[3]),
        .O(\dwrCoobuf[22]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[23]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(Q[4]),
        .O(\dwrCoobuf[23]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[24]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(Q[5]),
        .O(\dwrCoobuf[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair787" *) 
  LUT5 #(
    .INIT(32'h4E000A00)) 
    \dwrCoobuf[25]_i_1 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(enCoobuf_reg_0),
        .I3(rng_reg_0),
        .I4(Q[6]),
        .O(\dwrCoobuf[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair786" *) 
  LUT5 #(
    .INIT(32'h4E000A00)) 
    \dwrCoobuf[26]_i_1 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(enCoobuf_reg_0),
        .I3(rng_reg_0),
        .I4(Q[7]),
        .O(\dwrCoobuf[26]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[2]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\col_lcl_reg[2]__0_n_0 ),
        .O(\dwrCoobuf[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h373FFFFF)) 
    \dwrCoobuf[31]_i_1 
       (.I0(enCoobuf_reg_0),
        .I1(\dwrCoobuf[31]_i_3_n_0 ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\stateMaxsel_reg_n_0_[1] ),
        .I4(rng_reg_0),
        .O(\dwrCoobuf[31]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_100 
       (.I0(\maximdsm1_reg[2]_39 [3]),
        .I1(\thd_reg_n_0_[3] ),
        .I2(\maximdsm1_reg[2]_39 [2]),
        .I3(\thd_reg_n_0_[2] ),
        .O(\dwrCoobuf[31]_i_100_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_101 
       (.I0(\maximdsm1_reg[2]_39 [1]),
        .I1(\thd_reg_n_0_[1] ),
        .I2(\maximdsm1_reg[2]_39 [0]),
        .I3(\thd_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_101_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_103 
       (.I0(\thd_reg_n_0_[7] ),
        .I1(\maximdsm1_reg[3]_38 [7]),
        .I2(\maximdsm1_reg[3]_38 [6]),
        .I3(\thd_reg_n_0_[6] ),
        .O(\dwrCoobuf[31]_i_103_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_104 
       (.I0(\thd_reg_n_0_[5] ),
        .I1(\maximdsm1_reg[3]_38 [5]),
        .I2(\maximdsm1_reg[3]_38 [4]),
        .I3(\thd_reg_n_0_[4] ),
        .O(\dwrCoobuf[31]_i_104_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_105 
       (.I0(\thd_reg_n_0_[3] ),
        .I1(\maximdsm1_reg[3]_38 [3]),
        .I2(\maximdsm1_reg[3]_38 [2]),
        .I3(\thd_reg_n_0_[2] ),
        .O(\dwrCoobuf[31]_i_105_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_106 
       (.I0(\thd_reg_n_0_[1] ),
        .I1(\maximdsm1_reg[3]_38 [1]),
        .I2(\maximdsm1_reg[3]_38 [0]),
        .I3(\thd_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_106_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_107 
       (.I0(\maximdsm1_reg[3]_38 [7]),
        .I1(\thd_reg_n_0_[7] ),
        .I2(\maximdsm1_reg[3]_38 [6]),
        .I3(\thd_reg_n_0_[6] ),
        .O(\dwrCoobuf[31]_i_107_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_108 
       (.I0(\maximdsm1_reg[3]_38 [5]),
        .I1(\thd_reg_n_0_[5] ),
        .I2(\maximdsm1_reg[3]_38 [4]),
        .I3(\thd_reg_n_0_[4] ),
        .O(\dwrCoobuf[31]_i_108_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_109 
       (.I0(\maximdsm1_reg[3]_38 [3]),
        .I1(\thd_reg_n_0_[3] ),
        .I2(\maximdsm1_reg[3]_38 [2]),
        .I3(\thd_reg_n_0_[2] ),
        .O(\dwrCoobuf[31]_i_109_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_110 
       (.I0(\maximdsm1_reg[3]_38 [1]),
        .I1(\thd_reg_n_0_[1] ),
        .I2(\maximdsm1_reg[3]_38 [0]),
        .I3(\thd_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_110_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair806" *) 
  LUT4 #(
    .INIT(16'hBBBF)) 
    \dwrCoobuf[31]_i_12 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(ceMaxsel_reg_n_0),
        .I3(postNotLive_reg_n_0),
        .O(\dwrCoobuf[31]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FDFF0000)) 
    \dwrCoobuf[31]_i_13 
       (.I0(flag1),
        .I1(\ixMax_reg_n_0_[2] ),
        .I2(\ixMax_reg_n_0_[0] ),
        .I3(\dwrCoobuf[31]_i_68_n_0 ),
        .I4(\ixMax_reg_n_0_[1] ),
        .I5(\dwrCoobuf[31]_i_69_n_0 ),
        .O(\dwrCoobuf[31]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h02)) 
    \dwrCoobuf[31]_i_16 
       (.I0(\colmax_lcl_reg_n_0_[1] ),
        .I1(\colmax_lcl_reg_n_0_[2] ),
        .I2(\colmax_lcl_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair947" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \dwrCoobuf[31]_i_18 
       (.I0(\colmax_lcl_reg_n_0_[1] ),
        .I1(\colmax_lcl_reg_n_0_[0] ),
        .I2(\colmax_lcl_reg_n_0_[2] ),
        .O(\dwrCoobuf[31]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \dwrCoobuf[31]_i_19 
       (.I0(col0[10]),
        .I1(\col_lcl_reg[10]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_19_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair788" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \dwrCoobuf[31]_i_2 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(rng_reg_0),
        .I2(enCoobuf_reg_0),
        .O(\dwrCoobuf[31]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_20 
       (.I0(\col_lcl_reg[9]__0_n_0 ),
        .I1(col0[9]),
        .I2(col0[8]),
        .I3(\col_lcl_reg[8]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_20_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_21 
       (.I0(\col_lcl_reg[7]__0_n_0 ),
        .I1(col0[7]),
        .I2(col0[6]),
        .I3(\col_lcl_reg[6]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_21_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_22 
       (.I0(\col_lcl_reg[5]__0_n_0 ),
        .I1(col0[5]),
        .I2(col0[4]),
        .I3(\col_lcl_reg[4]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_23 
       (.I0(\col_lcl_reg[3]__0_n_0 ),
        .I1(col0[3]),
        .I2(col0[2]),
        .I3(\col_lcl_reg[2]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_24 
       (.I0(\col_lcl_reg[1]__0_n_0 ),
        .I1(col0[1]),
        .I2(col0[0]),
        .I3(\col_lcl_reg[0]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \dwrCoobuf[31]_i_25 
       (.I0(\col_lcl_reg[10]__0_n_0 ),
        .I1(col0[10]),
        .O(\dwrCoobuf[31]_i_25_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_26 
       (.I0(col0[9]),
        .I1(\col_lcl_reg[9]__0_n_0 ),
        .I2(col0[8]),
        .I3(\col_lcl_reg[8]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_26_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_27 
       (.I0(col0[7]),
        .I1(\col_lcl_reg[7]__0_n_0 ),
        .I2(col0[6]),
        .I3(\col_lcl_reg[6]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_27_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_28 
       (.I0(col0[5]),
        .I1(\col_lcl_reg[5]__0_n_0 ),
        .I2(col0[4]),
        .I3(\col_lcl_reg[4]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_29 
       (.I0(col0[3]),
        .I1(\col_lcl_reg[3]__0_n_0 ),
        .I2(col0[2]),
        .I3(\col_lcl_reg[2]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'hF8F8F8F8F8F8F8FF)) 
    \dwrCoobuf[31]_i_3 
       (.I0(aCoobuf_reg[8]),
        .I1(\dwrCoobuf[31]_i_4_n_0 ),
        .I2(\dwrCoobuf[31]_i_5_n_0 ),
        .I3(\dwrCoobuf[31]_i_6_n_0 ),
        .I4(\ixMax_reg_n_0_[1] ),
        .I5(\dwrCoobuf[31]_i_7_n_0 ),
        .O(\dwrCoobuf[31]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_30 
       (.I0(col0[1]),
        .I1(\col_lcl_reg[1]__0_n_0 ),
        .I2(col0[0]),
        .I3(\col_lcl_reg[0]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_30_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \dwrCoobuf[31]_i_31 
       (.I0(Q[7]),
        .I1(row1[10]),
        .O(\dwrCoobuf[31]_i_31_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_32 
       (.I0(Q[6]),
        .I1(row1[9]),
        .I2(Q[5]),
        .I3(row1[8]),
        .O(\dwrCoobuf[31]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_33 
       (.I0(Q[4]),
        .I1(row1[7]),
        .I2(Q[3]),
        .I3(row1[6]),
        .O(\dwrCoobuf[31]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_34 
       (.I0(Q[2]),
        .I1(row1[5]),
        .I2(Q[1]),
        .I3(row1[4]),
        .O(\dwrCoobuf[31]_i_34_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_35 
       (.I0(Q[0]),
        .I1(row1[3]),
        .I2(row_lcl_reg[2]),
        .I3(row1[2]),
        .O(\dwrCoobuf[31]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_36 
       (.I0(row_lcl_reg[1]),
        .I1(row1[1]),
        .I2(row_lcl_reg[0]),
        .I3(row1[0]),
        .O(\dwrCoobuf[31]_i_36_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \dwrCoobuf[31]_i_37 
       (.I0(row1[10]),
        .I1(Q[7]),
        .O(\dwrCoobuf[31]_i_37_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_38 
       (.I0(row1[9]),
        .I1(Q[6]),
        .I2(row1[8]),
        .I3(Q[5]),
        .O(\dwrCoobuf[31]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_39 
       (.I0(row1[7]),
        .I1(Q[4]),
        .I2(row1[6]),
        .I3(Q[3]),
        .O(\dwrCoobuf[31]_i_39_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair804" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \dwrCoobuf[31]_i_4 
       (.I0(aCoobuf_reg[6]),
        .I1(\aCoobuf[8]_i_3_n_0 ),
        .I2(aCoobuf_reg[7]),
        .O(\dwrCoobuf[31]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_40 
       (.I0(row1[5]),
        .I1(Q[2]),
        .I2(row1[4]),
        .I3(Q[1]),
        .O(\dwrCoobuf[31]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_41 
       (.I0(row1[3]),
        .I1(Q[0]),
        .I2(row1[2]),
        .I3(row_lcl_reg[2]),
        .O(\dwrCoobuf[31]_i_41_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_42 
       (.I0(row1[1]),
        .I1(row_lcl_reg[1]),
        .I2(row1[0]),
        .I3(row_lcl_reg[0]),
        .O(\dwrCoobuf[31]_i_42_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \dwrCoobuf[31]_i_43 
       (.I0(row0[10]),
        .I1(Q[7]),
        .O(\dwrCoobuf[31]_i_43_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_44 
       (.I0(Q[6]),
        .I1(row0[9]),
        .I2(row0[8]),
        .I3(Q[5]),
        .O(\dwrCoobuf[31]_i_44_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_45 
       (.I0(Q[4]),
        .I1(row0[7]),
        .I2(row0[6]),
        .I3(Q[3]),
        .O(\dwrCoobuf[31]_i_45_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_46 
       (.I0(Q[2]),
        .I1(row0[5]),
        .I2(row0[4]),
        .I3(Q[1]),
        .O(\dwrCoobuf[31]_i_46_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_47 
       (.I0(Q[0]),
        .I1(row0[3]),
        .I2(row0[2]),
        .I3(row_lcl_reg[2]),
        .O(\dwrCoobuf[31]_i_47_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_48 
       (.I0(row_lcl_reg[1]),
        .I1(row0[1]),
        .I2(row0[0]),
        .I3(row_lcl_reg[0]),
        .O(\dwrCoobuf[31]_i_48_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \dwrCoobuf[31]_i_49 
       (.I0(Q[7]),
        .I1(row0[10]),
        .O(\dwrCoobuf[31]_i_49_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \dwrCoobuf[31]_i_5 
       (.I0(flag52_in),
        .I1(flag3),
        .I2(flag4),
        .I3(flag5),
        .I4(\dwrCoobuf[31]_i_12_n_0 ),
        .I5(\dwrCoobuf[31]_i_13_n_0 ),
        .O(\dwrCoobuf[31]_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_50 
       (.I0(row0[9]),
        .I1(Q[6]),
        .I2(row0[8]),
        .I3(Q[5]),
        .O(\dwrCoobuf[31]_i_50_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_51 
       (.I0(row0[7]),
        .I1(Q[4]),
        .I2(row0[6]),
        .I3(Q[3]),
        .O(\dwrCoobuf[31]_i_51_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_52 
       (.I0(row0[5]),
        .I1(Q[2]),
        .I2(row0[4]),
        .I3(Q[1]),
        .O(\dwrCoobuf[31]_i_52_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_53 
       (.I0(row0[3]),
        .I1(Q[0]),
        .I2(row0[2]),
        .I3(row_lcl_reg[2]),
        .O(\dwrCoobuf[31]_i_53_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_54 
       (.I0(row0[1]),
        .I1(row_lcl_reg[1]),
        .I2(row0[0]),
        .I3(row_lcl_reg[0]),
        .O(\dwrCoobuf[31]_i_54_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \dwrCoobuf[31]_i_55 
       (.I0(\col_lcl_reg[10]__0_n_0 ),
        .I1(col1[10]),
        .O(\dwrCoobuf[31]_i_55_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_56 
       (.I0(\col_lcl_reg[9]__0_n_0 ),
        .I1(col1[9]),
        .I2(\col_lcl_reg[8]__0_n_0 ),
        .I3(col1[8]),
        .O(\dwrCoobuf[31]_i_56_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_57 
       (.I0(\col_lcl_reg[7]__0_n_0 ),
        .I1(col1[7]),
        .I2(\col_lcl_reg[6]__0_n_0 ),
        .I3(col1[6]),
        .O(\dwrCoobuf[31]_i_57_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_58 
       (.I0(\col_lcl_reg[5]__0_n_0 ),
        .I1(col1[5]),
        .I2(\col_lcl_reg[4]__0_n_0 ),
        .I3(col1[4]),
        .O(\dwrCoobuf[31]_i_58_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_59 
       (.I0(\col_lcl_reg[3]__0_n_0 ),
        .I1(col1[3]),
        .I2(\col_lcl_reg[2]__0_n_0 ),
        .I3(col1[2]),
        .O(\dwrCoobuf[31]_i_59_n_0 ));
  LUT6 #(
    .INIT(64'h0000400000000000)) 
    \dwrCoobuf[31]_i_6 
       (.I0(\colmax_lcl_reg_n_0_[2] ),
        .I1(\colmax_lcl_reg_n_0_[0] ),
        .I2(\colmax_lcl_reg_n_0_[1] ),
        .I3(flag2),
        .I4(\ixMax_reg_n_0_[2] ),
        .I5(\ixMax_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_60 
       (.I0(\col_lcl_reg[1]__0_n_0 ),
        .I1(col1[1]),
        .I2(\col_lcl_reg[0]__0_n_0 ),
        .I3(col1[0]),
        .O(\dwrCoobuf[31]_i_60_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \dwrCoobuf[31]_i_61 
       (.I0(col1[10]),
        .I1(\col_lcl_reg[10]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_61_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_62 
       (.I0(col1[9]),
        .I1(\col_lcl_reg[9]__0_n_0 ),
        .I2(col1[8]),
        .I3(\col_lcl_reg[8]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_62_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_63 
       (.I0(col1[7]),
        .I1(\col_lcl_reg[7]__0_n_0 ),
        .I2(col1[6]),
        .I3(\col_lcl_reg[6]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_63_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_64 
       (.I0(col1[5]),
        .I1(\col_lcl_reg[5]__0_n_0 ),
        .I2(col1[4]),
        .I3(\col_lcl_reg[4]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_64_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_65 
       (.I0(col1[3]),
        .I1(\col_lcl_reg[3]__0_n_0 ),
        .I2(col1[2]),
        .I3(\col_lcl_reg[2]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_65_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_66 
       (.I0(col1[1]),
        .I1(\col_lcl_reg[1]__0_n_0 ),
        .I2(col1[0]),
        .I3(\col_lcl_reg[0]__0_n_0 ),
        .O(\dwrCoobuf[31]_i_66_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair947" *) 
  LUT3 #(
    .INIT(8'h02)) 
    \dwrCoobuf[31]_i_68 
       (.I0(\colmax_lcl_reg_n_0_[2] ),
        .I1(\colmax_lcl_reg_n_0_[1] ),
        .I2(\colmax_lcl_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_68_n_0 ));
  LUT6 #(
    .INIT(64'h0000010000000000)) 
    \dwrCoobuf[31]_i_69 
       (.I0(\colmax_lcl_reg_n_0_[0] ),
        .I1(\colmax_lcl_reg_n_0_[1] ),
        .I2(\colmax_lcl_reg_n_0_[2] ),
        .I3(flag241_in),
        .I4(\ixMax_reg_n_0_[2] ),
        .I5(\ixMax_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_69_n_0 ));
  LUT6 #(
    .INIT(64'h00F8000800080008)) 
    \dwrCoobuf[31]_i_7 
       (.I0(flag234_in),
        .I1(\dwrCoobuf[31]_i_16_n_0 ),
        .I2(\ixMax_reg_n_0_[2] ),
        .I3(\ixMax_reg_n_0_[0] ),
        .I4(flag238_in),
        .I5(\dwrCoobuf[31]_i_18_n_0 ),
        .O(\dwrCoobuf[31]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_70 
       (.I0(\maximdsm1_reg[1]_35 [7]),
        .I1(\thd_reg_n_0_[7] ),
        .I2(\maximdsm1_reg[1]_35 [6]),
        .I3(\thd_reg_n_0_[6] ),
        .O(\dwrCoobuf[31]_i_70_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_71 
       (.I0(\maximdsm1_reg[1]_35 [5]),
        .I1(\thd_reg_n_0_[5] ),
        .I2(\maximdsm1_reg[1]_35 [4]),
        .I3(\thd_reg_n_0_[4] ),
        .O(\dwrCoobuf[31]_i_71_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_72 
       (.I0(\maximdsm1_reg[1]_35 [3]),
        .I1(\thd_reg_n_0_[3] ),
        .I2(\maximdsm1_reg[1]_35 [2]),
        .I3(\thd_reg_n_0_[2] ),
        .O(\dwrCoobuf[31]_i_72_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrCoobuf[31]_i_73 
       (.I0(\maximdsm1_reg[1]_35 [1]),
        .I1(\thd_reg_n_0_[1] ),
        .I2(\maximdsm1_reg[1]_35 [0]),
        .I3(\thd_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_73_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_74 
       (.I0(\thd_reg_n_0_[7] ),
        .I1(\maximdsm1_reg[1]_35 [7]),
        .I2(\thd_reg_n_0_[6] ),
        .I3(\maximdsm1_reg[1]_35 [6]),
        .O(\dwrCoobuf[31]_i_74_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_75 
       (.I0(\thd_reg_n_0_[5] ),
        .I1(\maximdsm1_reg[1]_35 [5]),
        .I2(\thd_reg_n_0_[4] ),
        .I3(\maximdsm1_reg[1]_35 [4]),
        .O(\dwrCoobuf[31]_i_75_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_76 
       (.I0(\thd_reg_n_0_[3] ),
        .I1(\maximdsm1_reg[1]_35 [3]),
        .I2(\thd_reg_n_0_[2] ),
        .I3(\maximdsm1_reg[1]_35 [2]),
        .O(\dwrCoobuf[31]_i_76_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_77 
       (.I0(\thd_reg_n_0_[1] ),
        .I1(\maximdsm1_reg[1]_35 [1]),
        .I2(\thd_reg_n_0_[0] ),
        .I3(\maximdsm1_reg[1]_35 [0]),
        .O(\dwrCoobuf[31]_i_77_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_78 
       (.I0(\thd_reg_n_0_[7] ),
        .I1(\maximdsm1_reg[0]_36 [7]),
        .I2(\maximdsm1_reg[0]_36 [6]),
        .I3(\thd_reg_n_0_[6] ),
        .O(\dwrCoobuf[31]_i_78_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_79 
       (.I0(\thd_reg_n_0_[5] ),
        .I1(\maximdsm1_reg[0]_36 [5]),
        .I2(\maximdsm1_reg[0]_36 [4]),
        .I3(\thd_reg_n_0_[4] ),
        .O(\dwrCoobuf[31]_i_79_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_80 
       (.I0(\thd_reg_n_0_[3] ),
        .I1(\maximdsm1_reg[0]_36 [3]),
        .I2(\maximdsm1_reg[0]_36 [2]),
        .I3(\thd_reg_n_0_[2] ),
        .O(\dwrCoobuf[31]_i_80_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_81 
       (.I0(\thd_reg_n_0_[1] ),
        .I1(\maximdsm1_reg[0]_36 [1]),
        .I2(\maximdsm1_reg[0]_36 [0]),
        .I3(\thd_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_81_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_82 
       (.I0(\maximdsm1_reg[0]_36 [7]),
        .I1(\thd_reg_n_0_[7] ),
        .I2(\maximdsm1_reg[0]_36 [6]),
        .I3(\thd_reg_n_0_[6] ),
        .O(\dwrCoobuf[31]_i_82_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_83 
       (.I0(\maximdsm1_reg[0]_36 [5]),
        .I1(\thd_reg_n_0_[5] ),
        .I2(\maximdsm1_reg[0]_36 [4]),
        .I3(\thd_reg_n_0_[4] ),
        .O(\dwrCoobuf[31]_i_83_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_84 
       (.I0(\maximdsm1_reg[0]_36 [3]),
        .I1(\thd_reg_n_0_[3] ),
        .I2(\maximdsm1_reg[0]_36 [2]),
        .I3(\thd_reg_n_0_[2] ),
        .O(\dwrCoobuf[31]_i_84_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_85 
       (.I0(\maximdsm1_reg[0]_36 [1]),
        .I1(\thd_reg_n_0_[1] ),
        .I2(\maximdsm1_reg[0]_36 [0]),
        .I3(\thd_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_85_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_86 
       (.I0(\thd_reg_n_0_[7] ),
        .I1(\maximdsm1_reg[4]_37 [7]),
        .I2(\maximdsm1_reg[4]_37 [6]),
        .I3(\thd_reg_n_0_[6] ),
        .O(\dwrCoobuf[31]_i_86_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_87 
       (.I0(\thd_reg_n_0_[5] ),
        .I1(\maximdsm1_reg[4]_37 [5]),
        .I2(\maximdsm1_reg[4]_37 [4]),
        .I3(\thd_reg_n_0_[4] ),
        .O(\dwrCoobuf[31]_i_87_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_88 
       (.I0(\thd_reg_n_0_[3] ),
        .I1(\maximdsm1_reg[4]_37 [3]),
        .I2(\maximdsm1_reg[4]_37 [2]),
        .I3(\thd_reg_n_0_[2] ),
        .O(\dwrCoobuf[31]_i_88_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_89 
       (.I0(\thd_reg_n_0_[1] ),
        .I1(\maximdsm1_reg[4]_37 [1]),
        .I2(\maximdsm1_reg[4]_37 [0]),
        .I3(\thd_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_89_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_90 
       (.I0(\maximdsm1_reg[4]_37 [7]),
        .I1(\thd_reg_n_0_[7] ),
        .I2(\maximdsm1_reg[4]_37 [6]),
        .I3(\thd_reg_n_0_[6] ),
        .O(\dwrCoobuf[31]_i_90_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_91 
       (.I0(\maximdsm1_reg[4]_37 [5]),
        .I1(\thd_reg_n_0_[5] ),
        .I2(\maximdsm1_reg[4]_37 [4]),
        .I3(\thd_reg_n_0_[4] ),
        .O(\dwrCoobuf[31]_i_91_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_92 
       (.I0(\maximdsm1_reg[4]_37 [3]),
        .I1(\thd_reg_n_0_[3] ),
        .I2(\maximdsm1_reg[4]_37 [2]),
        .I3(\thd_reg_n_0_[2] ),
        .O(\dwrCoobuf[31]_i_92_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_93 
       (.I0(\maximdsm1_reg[4]_37 [1]),
        .I1(\thd_reg_n_0_[1] ),
        .I2(\maximdsm1_reg[4]_37 [0]),
        .I3(\thd_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_93_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_94 
       (.I0(\thd_reg_n_0_[7] ),
        .I1(\maximdsm1_reg[2]_39 [7]),
        .I2(\maximdsm1_reg[2]_39 [6]),
        .I3(\thd_reg_n_0_[6] ),
        .O(\dwrCoobuf[31]_i_94_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_95 
       (.I0(\thd_reg_n_0_[5] ),
        .I1(\maximdsm1_reg[2]_39 [5]),
        .I2(\maximdsm1_reg[2]_39 [4]),
        .I3(\thd_reg_n_0_[4] ),
        .O(\dwrCoobuf[31]_i_95_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_96 
       (.I0(\thd_reg_n_0_[3] ),
        .I1(\maximdsm1_reg[2]_39 [3]),
        .I2(\maximdsm1_reg[2]_39 [2]),
        .I3(\thd_reg_n_0_[2] ),
        .O(\dwrCoobuf[31]_i_96_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrCoobuf[31]_i_97 
       (.I0(\thd_reg_n_0_[1] ),
        .I1(\maximdsm1_reg[2]_39 [1]),
        .I2(\maximdsm1_reg[2]_39 [0]),
        .I3(\thd_reg_n_0_[0] ),
        .O(\dwrCoobuf[31]_i_97_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_98 
       (.I0(\maximdsm1_reg[2]_39 [7]),
        .I1(\thd_reg_n_0_[7] ),
        .I2(\maximdsm1_reg[2]_39 [6]),
        .I3(\thd_reg_n_0_[6] ),
        .O(\dwrCoobuf[31]_i_98_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrCoobuf[31]_i_99 
       (.I0(\maximdsm1_reg[2]_39 [5]),
        .I1(\thd_reg_n_0_[5] ),
        .I2(\maximdsm1_reg[2]_39 [4]),
        .I3(\thd_reg_n_0_[4] ),
        .O(\dwrCoobuf[31]_i_99_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[3]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\col_lcl_reg[3]__0_n_0 ),
        .O(\dwrCoobuf[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[4]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\col_lcl_reg[4]__0_n_0 ),
        .O(\dwrCoobuf[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[5]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\col_lcl_reg[5]__0_n_0 ),
        .O(\dwrCoobuf[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[6]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\col_lcl_reg[6]__0_n_0 ),
        .O(\dwrCoobuf[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[7]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\col_lcl_reg[7]__0_n_0 ),
        .O(\dwrCoobuf[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[8]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\col_lcl_reg[8]__0_n_0 ),
        .O(\dwrCoobuf[8]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h2A202020)) 
    \dwrCoobuf[9]_i_1 
       (.I0(rng_reg_0),
        .I1(enCoobuf_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\col_lcl_reg[9]__0_n_0 ),
        .O(\dwrCoobuf[9]_i_1_n_0 ));
  FDCE \dwrCoobuf_reg[0] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[0]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[0] ));
  FDCE \dwrCoobuf_reg[10] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[10]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[10] ));
  FDCE \dwrCoobuf_reg[16] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[16]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[16] ));
  FDCE \dwrCoobuf_reg[17] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[17]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[17] ));
  FDCE \dwrCoobuf_reg[18] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[18]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[18] ));
  FDCE \dwrCoobuf_reg[19] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[19]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[19] ));
  FDCE \dwrCoobuf_reg[1] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[1]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[1] ));
  FDCE \dwrCoobuf_reg[20] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[20]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[20] ));
  FDCE \dwrCoobuf_reg[21] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[21]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[21] ));
  FDCE \dwrCoobuf_reg[22] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[22]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[22] ));
  FDCE \dwrCoobuf_reg[23] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[23]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[23] ));
  FDCE \dwrCoobuf_reg[24] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[24]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[24] ));
  FDCE \dwrCoobuf_reg[25] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[25]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[25] ));
  FDCE \dwrCoobuf_reg[26] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[26]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[26] ));
  FDCE \dwrCoobuf_reg[2] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[2]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[2] ));
  FDCE \dwrCoobuf_reg[31] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[31]_i_2_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[31] ));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrCoobuf_reg[31]_i_10 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrCoobuf_reg[31]_i_10_CO_UNCONNECTED [7:6],flag4,\dwrCoobuf_reg[31]_i_10_n_3 ,\dwrCoobuf_reg[31]_i_10_n_4 ,\dwrCoobuf_reg[31]_i_10_n_5 ,\dwrCoobuf_reg[31]_i_10_n_6 ,\dwrCoobuf_reg[31]_i_10_n_7 }),
        .DI({1'b0,1'b0,\dwrCoobuf[31]_i_43_n_0 ,\dwrCoobuf[31]_i_44_n_0 ,\dwrCoobuf[31]_i_45_n_0 ,\dwrCoobuf[31]_i_46_n_0 ,\dwrCoobuf[31]_i_47_n_0 ,\dwrCoobuf[31]_i_48_n_0 }),
        .O(\NLW_dwrCoobuf_reg[31]_i_10_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,\dwrCoobuf[31]_i_49_n_0 ,\dwrCoobuf[31]_i_50_n_0 ,\dwrCoobuf[31]_i_51_n_0 ,\dwrCoobuf[31]_i_52_n_0 ,\dwrCoobuf[31]_i_53_n_0 ,\dwrCoobuf[31]_i_54_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrCoobuf_reg[31]_i_102 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrCoobuf_reg[31]_i_102_CO_UNCONNECTED [7:4],flag241_in,\dwrCoobuf_reg[31]_i_102_n_5 ,\dwrCoobuf_reg[31]_i_102_n_6 ,\dwrCoobuf_reg[31]_i_102_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,\dwrCoobuf[31]_i_103_n_0 ,\dwrCoobuf[31]_i_104_n_0 ,\dwrCoobuf[31]_i_105_n_0 ,\dwrCoobuf[31]_i_106_n_0 }),
        .O(\NLW_dwrCoobuf_reg[31]_i_102_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,\dwrCoobuf[31]_i_107_n_0 ,\dwrCoobuf[31]_i_108_n_0 ,\dwrCoobuf[31]_i_109_n_0 ,\dwrCoobuf[31]_i_110_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrCoobuf_reg[31]_i_11 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrCoobuf_reg[31]_i_11_CO_UNCONNECTED [7:6],flag5,\dwrCoobuf_reg[31]_i_11_n_3 ,\dwrCoobuf_reg[31]_i_11_n_4 ,\dwrCoobuf_reg[31]_i_11_n_5 ,\dwrCoobuf_reg[31]_i_11_n_6 ,\dwrCoobuf_reg[31]_i_11_n_7 }),
        .DI({1'b0,1'b0,\dwrCoobuf[31]_i_55_n_0 ,\dwrCoobuf[31]_i_56_n_0 ,\dwrCoobuf[31]_i_57_n_0 ,\dwrCoobuf[31]_i_58_n_0 ,\dwrCoobuf[31]_i_59_n_0 ,\dwrCoobuf[31]_i_60_n_0 }),
        .O(\NLW_dwrCoobuf_reg[31]_i_11_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,\dwrCoobuf[31]_i_61_n_0 ,\dwrCoobuf[31]_i_62_n_0 ,\dwrCoobuf[31]_i_63_n_0 ,\dwrCoobuf[31]_i_64_n_0 ,\dwrCoobuf[31]_i_65_n_0 ,\dwrCoobuf[31]_i_66_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrCoobuf_reg[31]_i_14 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrCoobuf_reg[31]_i_14_CO_UNCONNECTED [7:4],flag2,\dwrCoobuf_reg[31]_i_14_n_5 ,\dwrCoobuf_reg[31]_i_14_n_6 ,\dwrCoobuf_reg[31]_i_14_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,\dwrCoobuf[31]_i_70_n_0 ,\dwrCoobuf[31]_i_71_n_0 ,\dwrCoobuf[31]_i_72_n_0 ,\dwrCoobuf[31]_i_73_n_0 }),
        .O(\NLW_dwrCoobuf_reg[31]_i_14_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,\dwrCoobuf[31]_i_74_n_0 ,\dwrCoobuf[31]_i_75_n_0 ,\dwrCoobuf[31]_i_76_n_0 ,\dwrCoobuf[31]_i_77_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrCoobuf_reg[31]_i_15 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrCoobuf_reg[31]_i_15_CO_UNCONNECTED [7:4],flag234_in,\dwrCoobuf_reg[31]_i_15_n_5 ,\dwrCoobuf_reg[31]_i_15_n_6 ,\dwrCoobuf_reg[31]_i_15_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,\dwrCoobuf[31]_i_78_n_0 ,\dwrCoobuf[31]_i_79_n_0 ,\dwrCoobuf[31]_i_80_n_0 ,\dwrCoobuf[31]_i_81_n_0 }),
        .O(\NLW_dwrCoobuf_reg[31]_i_15_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,\dwrCoobuf[31]_i_82_n_0 ,\dwrCoobuf[31]_i_83_n_0 ,\dwrCoobuf[31]_i_84_n_0 ,\dwrCoobuf[31]_i_85_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrCoobuf_reg[31]_i_17 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrCoobuf_reg[31]_i_17_CO_UNCONNECTED [7:4],flag238_in,\dwrCoobuf_reg[31]_i_17_n_5 ,\dwrCoobuf_reg[31]_i_17_n_6 ,\dwrCoobuf_reg[31]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,\dwrCoobuf[31]_i_86_n_0 ,\dwrCoobuf[31]_i_87_n_0 ,\dwrCoobuf[31]_i_88_n_0 ,\dwrCoobuf[31]_i_89_n_0 }),
        .O(\NLW_dwrCoobuf_reg[31]_i_17_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,\dwrCoobuf[31]_i_90_n_0 ,\dwrCoobuf[31]_i_91_n_0 ,\dwrCoobuf[31]_i_92_n_0 ,\dwrCoobuf[31]_i_93_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrCoobuf_reg[31]_i_67 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrCoobuf_reg[31]_i_67_CO_UNCONNECTED [7:4],flag1,\dwrCoobuf_reg[31]_i_67_n_5 ,\dwrCoobuf_reg[31]_i_67_n_6 ,\dwrCoobuf_reg[31]_i_67_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,\dwrCoobuf[31]_i_94_n_0 ,\dwrCoobuf[31]_i_95_n_0 ,\dwrCoobuf[31]_i_96_n_0 ,\dwrCoobuf[31]_i_97_n_0 }),
        .O(\NLW_dwrCoobuf_reg[31]_i_67_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,\dwrCoobuf[31]_i_98_n_0 ,\dwrCoobuf[31]_i_99_n_0 ,\dwrCoobuf[31]_i_100_n_0 ,\dwrCoobuf[31]_i_101_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrCoobuf_reg[31]_i_8 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrCoobuf_reg[31]_i_8_CO_UNCONNECTED [7:6],flag52_in,\dwrCoobuf_reg[31]_i_8_n_3 ,\dwrCoobuf_reg[31]_i_8_n_4 ,\dwrCoobuf_reg[31]_i_8_n_5 ,\dwrCoobuf_reg[31]_i_8_n_6 ,\dwrCoobuf_reg[31]_i_8_n_7 }),
        .DI({1'b0,1'b0,\dwrCoobuf[31]_i_19_n_0 ,\dwrCoobuf[31]_i_20_n_0 ,\dwrCoobuf[31]_i_21_n_0 ,\dwrCoobuf[31]_i_22_n_0 ,\dwrCoobuf[31]_i_23_n_0 ,\dwrCoobuf[31]_i_24_n_0 }),
        .O(\NLW_dwrCoobuf_reg[31]_i_8_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,\dwrCoobuf[31]_i_25_n_0 ,\dwrCoobuf[31]_i_26_n_0 ,\dwrCoobuf[31]_i_27_n_0 ,\dwrCoobuf[31]_i_28_n_0 ,\dwrCoobuf[31]_i_29_n_0 ,\dwrCoobuf[31]_i_30_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrCoobuf_reg[31]_i_9 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrCoobuf_reg[31]_i_9_CO_UNCONNECTED [7:6],flag3,\dwrCoobuf_reg[31]_i_9_n_3 ,\dwrCoobuf_reg[31]_i_9_n_4 ,\dwrCoobuf_reg[31]_i_9_n_5 ,\dwrCoobuf_reg[31]_i_9_n_6 ,\dwrCoobuf_reg[31]_i_9_n_7 }),
        .DI({1'b0,1'b0,\dwrCoobuf[31]_i_31_n_0 ,\dwrCoobuf[31]_i_32_n_0 ,\dwrCoobuf[31]_i_33_n_0 ,\dwrCoobuf[31]_i_34_n_0 ,\dwrCoobuf[31]_i_35_n_0 ,\dwrCoobuf[31]_i_36_n_0 }),
        .O(\NLW_dwrCoobuf_reg[31]_i_9_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,\dwrCoobuf[31]_i_37_n_0 ,\dwrCoobuf[31]_i_38_n_0 ,\dwrCoobuf[31]_i_39_n_0 ,\dwrCoobuf[31]_i_40_n_0 ,\dwrCoobuf[31]_i_41_n_0 ,\dwrCoobuf[31]_i_42_n_0 }));
  FDCE \dwrCoobuf_reg[3] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[3]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[3] ));
  FDCE \dwrCoobuf_reg[4] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[4]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[4] ));
  FDCE \dwrCoobuf_reg[5] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[5]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[5] ));
  FDCE \dwrCoobuf_reg[6] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[6]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[6] ));
  FDCE \dwrCoobuf_reg[7] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[7]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[7] ));
  FDCE \dwrCoobuf_reg[8] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[8]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[8] ));
  FDCE \dwrCoobuf_reg[9] 
       (.C(aclk_sig),
        .CE(\dwrCoobuf[31]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\dwrCoobuf[9]_i_1_n_0 ),
        .Q(\dwrCoobuf_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair940" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \dx[0]_i_1 
       (.I0(rng_reg_1),
        .I1(\dIgrm1_reg_n_0_[0] ),
        .I2(grayVideoinToManyAXIS_tdata[0]),
        .O(\dx[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair792" *) 
  LUT5 #(
    .INIT(32'h28288228)) 
    \dx[10]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[9]),
        .I2(\dIgrm1_reg_n_0_[9] ),
        .I3(\dIgrm1_reg_n_0_[8] ),
        .I4(grayVideoinToManyAXIS_tdata[8]),
        .O(\dx[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair842" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[11]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[10]),
        .I2(\dIgrm1_reg_n_0_[10] ),
        .I3(\dx[11]_i_2_n_0 ),
        .O(\dx[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair792" *) 
  LUT4 #(
    .INIT(16'h2B22)) 
    \dx[11]_i_2 
       (.I0(\dIgrm1_reg_n_0_[9] ),
        .I1(grayVideoinToManyAXIS_tdata[9]),
        .I2(grayVideoinToManyAXIS_tdata[8]),
        .I3(\dIgrm1_reg_n_0_[8] ),
        .O(\dx[11]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair843" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[12]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[11]),
        .I2(\dIgrm1_reg_n_0_[11] ),
        .I3(\dx[13]_i_2_n_0 ),
        .O(\dx[12]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dx[13]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[12]),
        .I2(\dIgrm1_reg_n_0_[12] ),
        .I3(\dIgrm1_reg_n_0_[11] ),
        .I4(grayVideoinToManyAXIS_tdata[11]),
        .I5(\dx[13]_i_2_n_0 ),
        .O(\dx[13]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h22B2BBBB222222B2)) 
    \dx[13]_i_2 
       (.I0(\dIgrm1_reg_n_0_[10] ),
        .I1(grayVideoinToManyAXIS_tdata[10]),
        .I2(\dIgrm1_reg_n_0_[8] ),
        .I3(grayVideoinToManyAXIS_tdata[8]),
        .I4(grayVideoinToManyAXIS_tdata[9]),
        .I5(\dIgrm1_reg_n_0_[9] ),
        .O(\dx[13]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair844" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[14]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[13]),
        .I2(\dIgrm1_reg_n_0_[13] ),
        .I3(\dx[15]_i_2_n_0 ),
        .O(\dx[14]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dx[15]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[14]),
        .I2(\dIgrm1_reg_n_0_[14] ),
        .I3(\dIgrm1_reg_n_0_[13] ),
        .I4(grayVideoinToManyAXIS_tdata[13]),
        .I5(\dx[15]_i_2_n_0 ),
        .O(\dx[15]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dx[15]_i_2 
       (.I0(\dIgrm1_reg_n_0_[12] ),
        .I1(grayVideoinToManyAXIS_tdata[12]),
        .I2(\dx[13]_i_2_n_0 ),
        .I3(grayVideoinToManyAXIS_tdata[11]),
        .I4(\dIgrm1_reg_n_0_[11] ),
        .O(\dx[15]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair835" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[16]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[15]),
        .I2(\dIgrm1_reg_n_0_[15] ),
        .I3(\dx[17]_i_2_n_0 ),
        .O(\dx[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair835" *) 
  LUT4 #(
    .INIT(16'h8C08)) 
    \dx[17]_i_1 
       (.I0(\dIgrm1_reg_n_0_[15] ),
        .I1(rng_reg_1),
        .I2(grayVideoinToManyAXIS_tdata[15]),
        .I3(\dx[17]_i_2_n_0 ),
        .O(\dx[17]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dx[17]_i_2 
       (.I0(\dIgrm1_reg_n_0_[14] ),
        .I1(grayVideoinToManyAXIS_tdata[14]),
        .I2(\dx[15]_i_2_n_0 ),
        .I3(grayVideoinToManyAXIS_tdata[13]),
        .I4(\dIgrm1_reg_n_0_[13] ),
        .O(\dx[17]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair942" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \dx[18]_i_1 
       (.I0(rng_reg_1),
        .I1(\dIgrm1_reg_n_0_[16] ),
        .I2(grayVideoinToManyAXIS_tdata[16]),
        .O(\dx[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair793" *) 
  LUT5 #(
    .INIT(32'h28288228)) 
    \dx[19]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[17]),
        .I2(\dIgrm1_reg_n_0_[17] ),
        .I3(\dIgrm1_reg_n_0_[16] ),
        .I4(grayVideoinToManyAXIS_tdata[16]),
        .O(\dx[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair791" *) 
  LUT5 #(
    .INIT(32'h28288228)) 
    \dx[1]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[1]),
        .I2(\dIgrm1_reg_n_0_[1] ),
        .I3(\dIgrm1_reg_n_0_[0] ),
        .I4(grayVideoinToManyAXIS_tdata[0]),
        .O(\dx[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair845" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[20]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[18]),
        .I2(\dIgrm1_reg_n_0_[18] ),
        .I3(\dx[20]_i_2_n_0 ),
        .O(\dx[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair793" *) 
  LUT4 #(
    .INIT(16'h2B22)) 
    \dx[20]_i_2 
       (.I0(\dIgrm1_reg_n_0_[17] ),
        .I1(grayVideoinToManyAXIS_tdata[17]),
        .I2(grayVideoinToManyAXIS_tdata[16]),
        .I3(\dIgrm1_reg_n_0_[16] ),
        .O(\dx[20]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair846" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[21]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[19]),
        .I2(\dIgrm1_reg_n_0_[19] ),
        .I3(\dx[22]_i_2_n_0 ),
        .O(\dx[21]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dx[22]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[20]),
        .I2(\dIgrm1_reg_n_0_[20] ),
        .I3(\dIgrm1_reg_n_0_[19] ),
        .I4(grayVideoinToManyAXIS_tdata[19]),
        .I5(\dx[22]_i_2_n_0 ),
        .O(\dx[22]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h22B2BBBB222222B2)) 
    \dx[22]_i_2 
       (.I0(\dIgrm1_reg_n_0_[18] ),
        .I1(grayVideoinToManyAXIS_tdata[18]),
        .I2(\dIgrm1_reg_n_0_[16] ),
        .I3(grayVideoinToManyAXIS_tdata[16]),
        .I4(grayVideoinToManyAXIS_tdata[17]),
        .I5(\dIgrm1_reg_n_0_[17] ),
        .O(\dx[22]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair847" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[23]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[21]),
        .I2(\dIgrm1_reg_n_0_[21] ),
        .I3(\dx[24]_i_2_n_0 ),
        .O(\dx[23]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dx[24]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[22]),
        .I2(\dIgrm1_reg_n_0_[22] ),
        .I3(\dIgrm1_reg_n_0_[21] ),
        .I4(grayVideoinToManyAXIS_tdata[21]),
        .I5(\dx[24]_i_2_n_0 ),
        .O(\dx[24]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dx[24]_i_2 
       (.I0(\dIgrm1_reg_n_0_[20] ),
        .I1(grayVideoinToManyAXIS_tdata[20]),
        .I2(\dx[22]_i_2_n_0 ),
        .I3(grayVideoinToManyAXIS_tdata[19]),
        .I4(\dIgrm1_reg_n_0_[19] ),
        .O(\dx[24]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair836" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[25]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[23]),
        .I2(\dIgrm1_reg_n_0_[23] ),
        .I3(\dx[26]_i_2_n_0 ),
        .O(\dx[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair836" *) 
  LUT4 #(
    .INIT(16'h8C08)) 
    \dx[26]_i_1 
       (.I0(\dIgrm1_reg_n_0_[23] ),
        .I1(rng_reg_1),
        .I2(grayVideoinToManyAXIS_tdata[23]),
        .I3(\dx[26]_i_2_n_0 ),
        .O(\dx[26]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dx[26]_i_2 
       (.I0(\dIgrm1_reg_n_0_[22] ),
        .I1(grayVideoinToManyAXIS_tdata[22]),
        .I2(\dx[24]_i_2_n_0 ),
        .I3(grayVideoinToManyAXIS_tdata[21]),
        .I4(\dIgrm1_reg_n_0_[21] ),
        .O(\dx[26]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair943" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \dx[27]_i_1 
       (.I0(rng_reg_1),
        .I1(\dIgrm1_reg_n_0_[24] ),
        .I2(grayVideoinToManyAXIS_tdata[24]),
        .O(\dx[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair794" *) 
  LUT5 #(
    .INIT(32'h28288228)) 
    \dx[28]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[25]),
        .I2(\dIgrm1_reg_n_0_[25] ),
        .I3(\dIgrm1_reg_n_0_[24] ),
        .I4(grayVideoinToManyAXIS_tdata[24]),
        .O(\dx[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair848" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[29]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[26]),
        .I2(\dIgrm1_reg_n_0_[26] ),
        .I3(\dx[29]_i_2_n_0 ),
        .O(\dx[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair794" *) 
  LUT4 #(
    .INIT(16'h2B22)) 
    \dx[29]_i_2 
       (.I0(\dIgrm1_reg_n_0_[25] ),
        .I1(grayVideoinToManyAXIS_tdata[25]),
        .I2(grayVideoinToManyAXIS_tdata[24]),
        .I3(\dIgrm1_reg_n_0_[24] ),
        .O(\dx[29]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair839" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[2]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[2]),
        .I2(\dIgrm1_reg_n_0_[2] ),
        .I3(\dx[2]_i_2_n_0 ),
        .O(\dx[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair791" *) 
  LUT4 #(
    .INIT(16'h2B22)) 
    \dx[2]_i_2 
       (.I0(\dIgrm1_reg_n_0_[1] ),
        .I1(grayVideoinToManyAXIS_tdata[1]),
        .I2(grayVideoinToManyAXIS_tdata[0]),
        .I3(\dIgrm1_reg_n_0_[0] ),
        .O(\dx[2]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair849" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[30]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[27]),
        .I2(\dIgrm1_reg_n_0_[27] ),
        .I3(\dx[31]_i_2_n_0 ),
        .O(\dx[30]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dx[31]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[28]),
        .I2(\dIgrm1_reg_n_0_[28] ),
        .I3(\dIgrm1_reg_n_0_[27] ),
        .I4(grayVideoinToManyAXIS_tdata[27]),
        .I5(\dx[31]_i_2_n_0 ),
        .O(\dx[31]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h22B2BBBB222222B2)) 
    \dx[31]_i_2 
       (.I0(\dIgrm1_reg_n_0_[26] ),
        .I1(grayVideoinToManyAXIS_tdata[26]),
        .I2(\dIgrm1_reg_n_0_[24] ),
        .I3(grayVideoinToManyAXIS_tdata[24]),
        .I4(grayVideoinToManyAXIS_tdata[25]),
        .I5(\dIgrm1_reg_n_0_[25] ),
        .O(\dx[31]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair850" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[32]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[29]),
        .I2(\dIgrm1_reg_n_0_[29] ),
        .I3(\dx[33]_i_2_n_0 ),
        .O(\dx[32]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dx[33]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[30]),
        .I2(\dIgrm1_reg_n_0_[30] ),
        .I3(\dIgrm1_reg_n_0_[29] ),
        .I4(grayVideoinToManyAXIS_tdata[29]),
        .I5(\dx[33]_i_2_n_0 ),
        .O(\dx[33]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dx[33]_i_2 
       (.I0(\dIgrm1_reg_n_0_[28] ),
        .I1(grayVideoinToManyAXIS_tdata[28]),
        .I2(\dx[31]_i_2_n_0 ),
        .I3(grayVideoinToManyAXIS_tdata[27]),
        .I4(\dIgrm1_reg_n_0_[27] ),
        .O(\dx[33]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair837" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[34]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[31]),
        .I2(\dIgrm1_reg_n_0_[31] ),
        .I3(\dx[35]_i_2_n_0 ),
        .O(\dx[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair837" *) 
  LUT4 #(
    .INIT(16'h8C08)) 
    \dx[35]_i_1 
       (.I0(\dIgrm1_reg_n_0_[31] ),
        .I1(rng_reg_1),
        .I2(grayVideoinToManyAXIS_tdata[31]),
        .I3(\dx[35]_i_2_n_0 ),
        .O(\dx[35]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dx[35]_i_2 
       (.I0(\dIgrm1_reg_n_0_[30] ),
        .I1(grayVideoinToManyAXIS_tdata[30]),
        .I2(\dx[33]_i_2_n_0 ),
        .I3(grayVideoinToManyAXIS_tdata[29]),
        .I4(\dIgrm1_reg_n_0_[29] ),
        .O(\dx[35]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair944" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \dx[36]_i_1 
       (.I0(rng_reg_1),
        .I1(\dIgrm1_reg_n_0_[32] ),
        .I2(grayVideoinToManyAXIS_tdata[32]),
        .O(\dx[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair795" *) 
  LUT5 #(
    .INIT(32'h28288228)) 
    \dx[37]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[33]),
        .I2(\dIgrm1_reg_n_0_[33] ),
        .I3(\dIgrm1_reg_n_0_[32] ),
        .I4(grayVideoinToManyAXIS_tdata[32]),
        .O(\dx[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair851" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[38]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[34]),
        .I2(\dIgrm1_reg_n_0_[34] ),
        .I3(\dx[38]_i_2_n_0 ),
        .O(\dx[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair795" *) 
  LUT4 #(
    .INIT(16'h2B22)) 
    \dx[38]_i_2 
       (.I0(\dIgrm1_reg_n_0_[33] ),
        .I1(grayVideoinToManyAXIS_tdata[33]),
        .I2(grayVideoinToManyAXIS_tdata[32]),
        .I3(\dIgrm1_reg_n_0_[32] ),
        .O(\dx[38]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair852" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[39]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[35]),
        .I2(\dIgrm1_reg_n_0_[35] ),
        .I3(\dx[40]_i_2_n_0 ),
        .O(\dx[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair840" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[3]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[3]),
        .I2(\dIgrm1_reg_n_0_[3] ),
        .I3(\dx[4]_i_2_n_0 ),
        .O(\dx[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dx[40]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[36]),
        .I2(\dIgrm1_reg_n_0_[36] ),
        .I3(\dIgrm1_reg_n_0_[35] ),
        .I4(grayVideoinToManyAXIS_tdata[35]),
        .I5(\dx[40]_i_2_n_0 ),
        .O(\dx[40]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h22B2BBBB222222B2)) 
    \dx[40]_i_2 
       (.I0(\dIgrm1_reg_n_0_[34] ),
        .I1(grayVideoinToManyAXIS_tdata[34]),
        .I2(\dIgrm1_reg_n_0_[32] ),
        .I3(grayVideoinToManyAXIS_tdata[32]),
        .I4(grayVideoinToManyAXIS_tdata[33]),
        .I5(\dIgrm1_reg_n_0_[33] ),
        .O(\dx[40]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair853" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[41]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[37]),
        .I2(\dIgrm1_reg_n_0_[37] ),
        .I3(\dx[42]_i_2_n_0 ),
        .O(\dx[41]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dx[42]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[38]),
        .I2(\dIgrm1_reg_n_0_[38] ),
        .I3(\dIgrm1_reg_n_0_[37] ),
        .I4(grayVideoinToManyAXIS_tdata[37]),
        .I5(\dx[42]_i_2_n_0 ),
        .O(\dx[42]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dx[42]_i_2 
       (.I0(\dIgrm1_reg_n_0_[36] ),
        .I1(grayVideoinToManyAXIS_tdata[36]),
        .I2(\dx[40]_i_2_n_0 ),
        .I3(grayVideoinToManyAXIS_tdata[35]),
        .I4(\dIgrm1_reg_n_0_[35] ),
        .O(\dx[42]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair838" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[43]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[39]),
        .I2(\dIgrm1_reg_n_0_[39] ),
        .I3(\dx[44]_i_2_n_0 ),
        .O(\dx[43]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair838" *) 
  LUT4 #(
    .INIT(16'h8C08)) 
    \dx[44]_i_1 
       (.I0(\dIgrm1_reg_n_0_[39] ),
        .I1(rng_reg_1),
        .I2(grayVideoinToManyAXIS_tdata[39]),
        .I3(\dx[44]_i_2_n_0 ),
        .O(\dx[44]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dx[44]_i_2 
       (.I0(\dIgrm1_reg_n_0_[38] ),
        .I1(grayVideoinToManyAXIS_tdata[38]),
        .I2(\dx[42]_i_2_n_0 ),
        .I3(grayVideoinToManyAXIS_tdata[37]),
        .I4(\dIgrm1_reg_n_0_[37] ),
        .O(\dx[44]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dx[4]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[4]),
        .I2(\dIgrm1_reg_n_0_[4] ),
        .I3(\dIgrm1_reg_n_0_[3] ),
        .I4(grayVideoinToManyAXIS_tdata[3]),
        .I5(\dx[4]_i_2_n_0 ),
        .O(\dx[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h22B2BBBB222222B2)) 
    \dx[4]_i_2 
       (.I0(\dIgrm1_reg_n_0_[2] ),
        .I1(grayVideoinToManyAXIS_tdata[2]),
        .I2(\dIgrm1_reg_n_0_[0] ),
        .I3(grayVideoinToManyAXIS_tdata[0]),
        .I4(grayVideoinToManyAXIS_tdata[1]),
        .I5(\dIgrm1_reg_n_0_[1] ),
        .O(\dx[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair841" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[5]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[5]),
        .I2(\dIgrm1_reg_n_0_[5] ),
        .I3(\dx[6]_i_2_n_0 ),
        .O(\dx[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dx[6]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[6]),
        .I2(\dIgrm1_reg_n_0_[6] ),
        .I3(\dIgrm1_reg_n_0_[5] ),
        .I4(grayVideoinToManyAXIS_tdata[5]),
        .I5(\dx[6]_i_2_n_0 ),
        .O(\dx[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dx[6]_i_2 
       (.I0(\dIgrm1_reg_n_0_[4] ),
        .I1(grayVideoinToManyAXIS_tdata[4]),
        .I2(\dx[4]_i_2_n_0 ),
        .I3(grayVideoinToManyAXIS_tdata[3]),
        .I4(\dIgrm1_reg_n_0_[3] ),
        .O(\dx[6]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair834" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dx[7]_i_1 
       (.I0(rng_reg_1),
        .I1(grayVideoinToManyAXIS_tdata[7]),
        .I2(\dIgrm1_reg_n_0_[7] ),
        .I3(\dx[8]_i_2_n_0 ),
        .O(\dx[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair834" *) 
  LUT4 #(
    .INIT(16'h8C08)) 
    \dx[8]_i_1 
       (.I0(\dIgrm1_reg_n_0_[7] ),
        .I1(rng_reg_1),
        .I2(grayVideoinToManyAXIS_tdata[7]),
        .I3(\dx[8]_i_2_n_0 ),
        .O(\dx[8]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dx[8]_i_2 
       (.I0(\dIgrm1_reg_n_0_[6] ),
        .I1(grayVideoinToManyAXIS_tdata[6]),
        .I2(\dx[6]_i_2_n_0 ),
        .I3(grayVideoinToManyAXIS_tdata[5]),
        .I4(\dIgrm1_reg_n_0_[5] ),
        .O(\dx[8]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair941" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \dx[9]_i_1 
       (.I0(rng_reg_1),
        .I1(\dIgrm1_reg_n_0_[8] ),
        .I2(grayVideoinToManyAXIS_tdata[8]),
        .O(\dx[9]_i_1_n_0 ));
  FDCE \dx_reg[0] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[0]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[0] ));
  FDCE \dx_reg[10] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[10]_i_1_n_0 ),
        .Q(A[1]));
  FDCE \dx_reg[11] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[11]_i_1_n_0 ),
        .Q(A[2]));
  FDCE \dx_reg[12] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[12]_i_1_n_0 ),
        .Q(A[3]));
  FDCE \dx_reg[13] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[13]_i_1_n_0 ),
        .Q(A[4]));
  FDCE \dx_reg[14] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[14]_i_1_n_0 ),
        .Q(A[5]));
  FDCE \dx_reg[15] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[15]_i_1_n_0 ),
        .Q(A[6]));
  FDCE \dx_reg[16] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[16]_i_1_n_0 ),
        .Q(A[7]));
  FDCE \dx_reg[17] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[17]_i_1_n_0 ),
        .Q(A[8]));
  FDCE \dx_reg[18] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[18]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[18] ));
  FDCE \dx_reg[19] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[19]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[19] ));
  FDCE \dx_reg[1] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[1]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[1] ));
  FDCE \dx_reg[20] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[20]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[20] ));
  FDCE \dx_reg[21] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[21]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[21] ));
  FDCE \dx_reg[22] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[22]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[22] ));
  FDCE \dx_reg[23] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[23]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[23] ));
  FDCE \dx_reg[24] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[24]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[24] ));
  FDCE \dx_reg[25] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[25]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[25] ));
  FDCE \dx_reg[26] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[26]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[26] ));
  FDCE \dx_reg[27] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[27]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[27] ));
  FDCE \dx_reg[28] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[28]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[28] ));
  FDCE \dx_reg[29] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[29]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[29] ));
  FDCE \dx_reg[2] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[2]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[2] ));
  FDCE \dx_reg[30] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[30]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[30] ));
  FDCE \dx_reg[31] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[31]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[31] ));
  FDCE \dx_reg[32] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[32]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[32] ));
  FDCE \dx_reg[33] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[33]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[33] ));
  FDCE \dx_reg[34] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[34]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[34] ));
  FDCE \dx_reg[35] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[35]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[35] ));
  FDCE \dx_reg[36] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[36]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[36] ));
  FDCE \dx_reg[37] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[37]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[37] ));
  FDCE \dx_reg[38] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[38]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[38] ));
  FDCE \dx_reg[39] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[39]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[39] ));
  FDCE \dx_reg[3] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[3]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[3] ));
  FDCE \dx_reg[40] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[40]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[40] ));
  FDCE \dx_reg[41] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[41]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[41] ));
  FDCE \dx_reg[42] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[42]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[42] ));
  FDCE \dx_reg[43] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[43]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[43] ));
  FDCE \dx_reg[44] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[44]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[44] ));
  FDCE \dx_reg[4] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[4]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[4] ));
  FDCE \dx_reg[5] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[5]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[5] ));
  FDCE \dx_reg[6] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[6]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[6] ));
  FDCE \dx_reg[7] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[7]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[7] ));
  FDCE \dx_reg[8] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[8]_i_1_n_0 ),
        .Q(\dx_reg_n_0_[8] ));
  FDCE \dx_reg[9] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dx[9]_i_1_n_0 ),
        .Q(A[0]));
  FDCE \dy_reg[0] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [0]),
        .Q(\dy_reg_n_0_[0] ));
  FDCE \dy_reg[10] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [10]),
        .Q(B[1]));
  FDCE \dy_reg[11] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [11]),
        .Q(B[2]));
  FDCE \dy_reg[12] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [12]),
        .Q(B[3]));
  FDCE \dy_reg[13] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [13]),
        .Q(B[4]));
  FDCE \dy_reg[14] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [14]),
        .Q(B[5]));
  FDCE \dy_reg[15] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [15]),
        .Q(B[6]));
  FDCE \dy_reg[16] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [16]),
        .Q(B[7]));
  FDCE \dy_reg[17] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [17]),
        .Q(B[8]));
  FDCE \dy_reg[18] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [18]),
        .Q(\dy_reg_n_0_[18] ));
  FDCE \dy_reg[19] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [19]),
        .Q(\dy_reg_n_0_[19] ));
  FDCE \dy_reg[1] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [1]),
        .Q(\dy_reg_n_0_[1] ));
  FDCE \dy_reg[20] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [20]),
        .Q(\dy_reg_n_0_[20] ));
  FDCE \dy_reg[21] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [21]),
        .Q(\dy_reg_n_0_[21] ));
  FDCE \dy_reg[22] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [22]),
        .Q(\dy_reg_n_0_[22] ));
  FDCE \dy_reg[23] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [23]),
        .Q(\dy_reg_n_0_[23] ));
  FDCE \dy_reg[24] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [24]),
        .Q(\dy_reg_n_0_[24] ));
  FDCE \dy_reg[25] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [25]),
        .Q(\dy_reg_n_0_[25] ));
  FDCE \dy_reg[26] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [26]),
        .Q(\dy_reg_n_0_[26] ));
  FDCE \dy_reg[27] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [27]),
        .Q(\dy_reg_n_0_[27] ));
  FDCE \dy_reg[28] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [28]),
        .Q(\dy_reg_n_0_[28] ));
  FDCE \dy_reg[29] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [29]),
        .Q(\dy_reg_n_0_[29] ));
  FDCE \dy_reg[2] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [2]),
        .Q(\dy_reg_n_0_[2] ));
  FDCE \dy_reg[30] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [30]),
        .Q(\dy_reg_n_0_[30] ));
  FDCE \dy_reg[31] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [31]),
        .Q(\dy_reg_n_0_[31] ));
  FDCE \dy_reg[32] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [32]),
        .Q(\dy_reg_n_0_[32] ));
  FDCE \dy_reg[33] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [33]),
        .Q(\dy_reg_n_0_[33] ));
  FDCE \dy_reg[34] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [34]),
        .Q(\dy_reg_n_0_[34] ));
  FDCE \dy_reg[35] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [35]),
        .Q(\dy_reg_n_0_[35] ));
  FDCE \dy_reg[36] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [36]),
        .Q(\dy_reg_n_0_[36] ));
  FDCE \dy_reg[37] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [37]),
        .Q(\dy_reg_n_0_[37] ));
  FDCE \dy_reg[38] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [38]),
        .Q(\dy_reg_n_0_[38] ));
  FDCE \dy_reg[39] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [39]),
        .Q(\dy_reg_n_0_[39] ));
  FDCE \dy_reg[3] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [3]),
        .Q(\dy_reg_n_0_[3] ));
  FDCE \dy_reg[40] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [40]),
        .Q(\dy_reg_n_0_[40] ));
  FDCE \dy_reg[41] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [41]),
        .Q(\dy_reg_n_0_[41] ));
  FDCE \dy_reg[42] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [42]),
        .Q(\dy_reg_n_0_[42] ));
  FDCE \dy_reg[43] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [43]),
        .Q(\dy_reg_n_0_[43] ));
  FDCE \dy_reg[44] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [44]),
        .Q(\dy_reg_n_0_[44] ));
  FDCE \dy_reg[4] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [4]),
        .Q(\dy_reg_n_0_[4] ));
  FDCE \dy_reg[5] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [5]),
        .Q(\dy_reg_n_0_[5] ));
  FDCE \dy_reg[6] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [6]),
        .Q(\dy_reg_n_0_[6] ));
  FDCE \dy_reg[7] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [7]),
        .Q(\dy_reg_n_0_[7] ));
  FDCE \dy_reg[8] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [8]),
        .Q(\dy_reg_n_0_[8] ));
  FDCE \dy_reg[9] 
       (.C(aclk_sig),
        .CE(dy),
        .CLR(linNotLog_reg_0),
        .D(\dy_reg[44]_0 [9]),
        .Q(B[0]));
  LUT6 #(
    .INIT(64'hF370000003700000)) 
    enCoobuf_i_1
       (.I0(enCoobuf_reg_0),
        .I1(\dwrCoobuf[31]_i_3_n_0 ),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .I5(enCoobuf_reg_n_0),
        .O(enCoobuf_i_1_n_0));
  FDCE enCoobuf_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(enCoobuf_i_1_n_0),
        .Q(enCoobuf_reg_n_0));
  LUT6 #(
    .INIT(64'hAAA00AA000000080)) 
    enImdbuf_i_1
       (.I0(rng_reg_0),
        .I1(ceScore),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(p_1_in),
        .I5(enImdbuf_reg_n_0),
        .O(enImdbuf_i_1_n_0));
  FDCE enImdbuf_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(enImdbuf_i_1_n_0),
        .Q(enImdbuf_reg_n_0));
  LUT6 #(
    .INIT(64'h0000000010000000)) 
    \fghij[0]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij[0]),
        .O(\fghij[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[10]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[10]),
        .O(\fghij[10]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[11]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[11]),
        .O(\fghij[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[12]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[12]),
        .O(\fghij[12]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[13]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[13]),
        .O(\fghij[13]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[14]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[14]),
        .O(\fghij[14]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[15]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[15]),
        .O(\fghij[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[16]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[16]),
        .O(\fghij[16]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[17]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[17]),
        .O(\fghij[17]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[18]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[18]),
        .O(\fghij[18]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[19]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[19]),
        .O(\fghij[19]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[1]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[1]),
        .O(\fghij[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[20]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[20]),
        .O(\fghij[20]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[21]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[21]),
        .O(\fghij[21]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[22]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[22]),
        .O(\fghij[22]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[23]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[23]),
        .O(\fghij[23]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[24]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[24]),
        .O(\fghij[24]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[25]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[25]),
        .O(\fghij[25]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[26]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[26]),
        .O(\fghij[26]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[27]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[27]),
        .O(\fghij[27]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[28]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[28]),
        .O(\fghij[28]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[29]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[29]),
        .O(\fghij[29]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[2]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[2]),
        .O(\fghij[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h555555775555F5FF)) 
    \fghij[30]_i_1 
       (.I0(rng_reg_0),
        .I1(\tkst_reg[0]_0 ),
        .I2(ceScore),
        .I3(\stateImdstream_reg_n_0_[1] ),
        .I4(\stateImdstream_reg_n_0_[0] ),
        .I5(p_1_in),
        .O(\fghij[30]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[30]_i_2 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[30]),
        .O(\fghij[30]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[3]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[3]),
        .O(\fghij[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[4]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[4]),
        .O(\fghij[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[5]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[5]),
        .O(\fghij[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[6]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[6]),
        .O(\fghij[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[7]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[7]),
        .O(\fghij[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[8]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[8]),
        .O(\fghij[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \fghij[9]_i_1 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(myImd4buf_n_16),
        .I5(fghij0[9]),
        .O(\fghij[9]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[0] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[0]_i_1_n_0 ),
        .Q(fghij[0]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[10] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[10]_i_1_n_0 ),
        .Q(fghij[10]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[11] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[11]_i_1_n_0 ),
        .Q(fghij[11]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[12] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[12]_i_1_n_0 ),
        .Q(fghij[12]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[13] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[13]_i_1_n_0 ),
        .Q(fghij[13]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[14] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[14]_i_1_n_0 ),
        .Q(fghij[14]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[15] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[15]_i_1_n_0 ),
        .Q(fghij[15]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[16] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[16]_i_1_n_0 ),
        .Q(fghij[16]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \fghij_reg[16]_i_2 
       (.CI(\fghij_reg[8]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\fghij_reg[16]_i_2_n_0 ,\fghij_reg[16]_i_2_n_1 ,\fghij_reg[16]_i_2_n_2 ,\fghij_reg[16]_i_2_n_3 ,\fghij_reg[16]_i_2_n_4 ,\fghij_reg[16]_i_2_n_5 ,\fghij_reg[16]_i_2_n_6 ,\fghij_reg[16]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(fghij0[16:9]),
        .S(fghij[16:9]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[17] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[17]_i_1_n_0 ),
        .Q(fghij[17]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[18] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[18]_i_1_n_0 ),
        .Q(fghij[18]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[19] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[19]_i_1_n_0 ),
        .Q(fghij[19]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[1] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[1]_i_1_n_0 ),
        .Q(fghij[1]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[20] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[20]_i_1_n_0 ),
        .Q(fghij[20]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[21] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[21]_i_1_n_0 ),
        .Q(fghij[21]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[22] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[22]_i_1_n_0 ),
        .Q(fghij[22]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[23] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[23]_i_1_n_0 ),
        .Q(fghij[23]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[24] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[24]_i_1_n_0 ),
        .Q(fghij[24]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \fghij_reg[24]_i_2 
       (.CI(\fghij_reg[16]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\fghij_reg[24]_i_2_n_0 ,\fghij_reg[24]_i_2_n_1 ,\fghij_reg[24]_i_2_n_2 ,\fghij_reg[24]_i_2_n_3 ,\fghij_reg[24]_i_2_n_4 ,\fghij_reg[24]_i_2_n_5 ,\fghij_reg[24]_i_2_n_6 ,\fghij_reg[24]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(fghij0[24:17]),
        .S(fghij[24:17]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[25] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[25]_i_1_n_0 ),
        .Q(fghij[25]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[26] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[26]_i_1_n_0 ),
        .Q(fghij[26]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[27] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[27]_i_1_n_0 ),
        .Q(fghij[27]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[28] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[28]_i_1_n_0 ),
        .Q(fghij[28]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[29] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[29]_i_1_n_0 ),
        .Q(fghij[29]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[2] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[2]_i_1_n_0 ),
        .Q(fghij[2]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[30] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[30]_i_2_n_0 ),
        .Q(fghij[30]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \fghij_reg[30]_i_3 
       (.CI(\fghij_reg[24]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_fghij_reg[30]_i_3_CO_UNCONNECTED [7:5],\fghij_reg[30]_i_3_n_3 ,\fghij_reg[30]_i_3_n_4 ,\fghij_reg[30]_i_3_n_5 ,\fghij_reg[30]_i_3_n_6 ,\fghij_reg[30]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_fghij_reg[30]_i_3_O_UNCONNECTED [7:6],fghij0[30:25]}),
        .S({1'b0,1'b0,fghij[30:25]}));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[3] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[3]_i_1_n_0 ),
        .Q(fghij[3]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[4] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[4]_i_1_n_0 ),
        .Q(fghij[4]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[5] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[5]_i_1_n_0 ),
        .Q(fghij[5]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[6] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[6]_i_1_n_0 ),
        .Q(fghij[6]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[7] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[7]_i_1_n_0 ),
        .Q(fghij[7]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[8] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[8]_i_1_n_0 ),
        .Q(fghij[8]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \fghij_reg[8]_i_2 
       (.CI(fghij[0]),
        .CI_TOP(1'b0),
        .CO({\fghij_reg[8]_i_2_n_0 ,\fghij_reg[8]_i_2_n_1 ,\fghij_reg[8]_i_2_n_2 ,\fghij_reg[8]_i_2_n_3 ,\fghij_reg[8]_i_2_n_4 ,\fghij_reg[8]_i_2_n_5 ,\fghij_reg[8]_i_2_n_6 ,\fghij_reg[8]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(fghij0[8:1]),
        .S(fghij[8:1]));
  FDCE #(
    .INIT(1'b0)) 
    \fghij_reg[9] 
       (.C(aclk_sig),
        .CE(\fghij[30]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\fghij[9]_i_1_n_0 ),
        .Q(fghij[9]));
  LUT5 #(
    .INIT(32'h0000E000)) 
    \i[0]_i_1__1 
       (.I0(\stateMaxsel_reg_n_0_[0] ),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(rng_reg_0),
        .I3(postNotLive_reg_n_0),
        .I4(i__0[0]),
        .O(\i[0]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'hF700FFFF)) 
    \i[1]_i_1__4 
       (.I0(postNotLive_reg_n_0),
        .I1(i__0[1]),
        .I2(i__0[0]),
        .I3(\i[1]_i_3_n_0 ),
        .I4(\col_lcl[8]__0_i_2_n_0 ),
        .O(\i[1]_i_1__4_n_0 ));
  LUT6 #(
    .INIT(64'h0000E000E0000000)) 
    \i[1]_i_2 
       (.I0(\stateMaxsel_reg_n_0_[0] ),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(rng_reg_0),
        .I3(postNotLive_reg_n_0),
        .I4(i__0[1]),
        .I5(i__0[0]),
        .O(\i[1]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair806" *) 
  LUT5 #(
    .INIT(32'h0000A800)) 
    \i[1]_i_3 
       (.I0(\col_lcl[10]__0_i_3_n_0 ),
        .I1(postNotLive_reg_n_0),
        .I2(ceMaxsel_reg_n_0),
        .I3(\stateMaxsel_reg_n_0_[0] ),
        .I4(\stateMaxsel_reg_n_0_[1] ),
        .O(\i[1]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__4_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\i[0]_i_1__1_n_0 ),
        .Q(i__0[0]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__4_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\i[1]_i_2_n_0 ),
        .Q(i__0[1]));
  LUT3 #(
    .INIT(8'h8A)) 
    \ixMax[0]_i_1 
       (.I0(\ixMax[2]_i_7_n_0 ),
        .I1(\ixMax[2]_i_6_n_0 ),
        .I2(\ixMax[2]_i_2_n_0 ),
        .O(ixMax[0]));
  LUT6 #(
    .INIT(64'h0000557500000000)) 
    \ixMax[1]_i_1 
       (.I0(\ixMax[2]_i_2_n_0 ),
        .I1(\ixMax[2]_i_3_n_0 ),
        .I2(\ixMax[2]_i_4_n_0 ),
        .I3(\ixMax[2]_i_5_n_0 ),
        .I4(\ixMax[2]_i_6_n_0 ),
        .I5(\ixMax[2]_i_7_n_0 ),
        .O(ixMax[1]));
  LUT6 #(
    .INIT(64'h0000AA8A00000000)) 
    \ixMax[2]_i_1 
       (.I0(\ixMax[2]_i_2_n_0 ),
        .I1(\ixMax[2]_i_3_n_0 ),
        .I2(\ixMax[2]_i_4_n_0 ),
        .I3(\ixMax[2]_i_5_n_0 ),
        .I4(\ixMax[2]_i_6_n_0 ),
        .I5(\ixMax[2]_i_7_n_0 ),
        .O(ixMax[2]));
  LUT5 #(
    .INIT(32'hB0FB00F0)) 
    \ixMax[2]_i_10 
       (.I0(\maximds_reg_n_0_[1][6] ),
        .I1(\maximds_reg_n_0_[3][6] ),
        .I2(\maximds_reg_n_0_[1][7] ),
        .I3(\maximds_reg_n_0_[3][7] ),
        .I4(\ixMax[2]_i_20_n_0 ),
        .O(\ixMax[2]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'h4F04FF0F)) 
    \ixMax[2]_i_11 
       (.I0(\maximds_reg_n_0_[1][6] ),
        .I1(\maximds_reg_n_0_[2][6] ),
        .I2(\maximds_reg_n_0_[1][7] ),
        .I3(\maximds_reg_n_0_[2][7] ),
        .I4(\ixMax[2]_i_21_n_0 ),
        .O(\ixMax[2]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_12 
       (.I0(\maximds_reg_n_0_[2][4] ),
        .I1(\maximds_reg_n_0_[4][4] ),
        .I2(\maximds_reg_n_0_[2][5] ),
        .I3(\maximds_reg_n_0_[4][5] ),
        .I4(\ixMax[2]_i_22_n_0 ),
        .I5(\ixMax[2]_i_23_n_0 ),
        .O(\ixMax[2]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_13 
       (.I0(\maximds_reg_n_0_[2][4] ),
        .I1(\maximds_reg_n_0_[3][4] ),
        .I2(\maximds_reg_n_0_[2][5] ),
        .I3(\maximds_reg_n_0_[3][5] ),
        .I4(\ixMax[2]_i_24_n_0 ),
        .I5(\ixMax[2]_i_25_n_0 ),
        .O(\ixMax[2]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_14 
       (.I0(\maximds_reg_n_0_[0][4] ),
        .I1(\maximds_reg_n_0_[2][4] ),
        .I2(\maximds_reg_n_0_[0][5] ),
        .I3(\maximds_reg_n_0_[2][5] ),
        .I4(\ixMax[2]_i_26_n_0 ),
        .I5(\ixMax[2]_i_27_n_0 ),
        .O(\ixMax[2]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'h4F04FF0F)) 
    \ixMax[2]_i_15 
       (.I0(\maximds_reg_n_0_[1][6] ),
        .I1(\maximds_reg_n_0_[4][6] ),
        .I2(\maximds_reg_n_0_[1][7] ),
        .I3(\maximds_reg_n_0_[4][7] ),
        .I4(\ixMax[2]_i_28_n_0 ),
        .O(\ixMax[2]_i_15_n_0 ));
  LUT5 #(
    .INIT(32'h4F04FF0F)) 
    \ixMax[2]_i_16 
       (.I0(\maximds_reg_n_0_[0][6] ),
        .I1(\maximds_reg_n_0_[1][6] ),
        .I2(\maximds_reg_n_0_[0][7] ),
        .I3(\maximds_reg_n_0_[1][7] ),
        .I4(\ixMax[2]_i_29_n_0 ),
        .O(\ixMax[2]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'hBAFBBAFBFAFFBAFB)) 
    \ixMax[2]_i_17 
       (.I0(\ixMax[2]_i_8_n_0 ),
        .I1(\ixMax[2]_i_30_n_0 ),
        .I2(\maximds_reg_n_0_[4][7] ),
        .I3(\maximds_reg_n_0_[0][7] ),
        .I4(\maximds_reg_n_0_[4][6] ),
        .I5(\maximds_reg_n_0_[0][6] ),
        .O(\ixMax[2]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_18 
       (.I0(\maximds_reg_n_0_[0][4] ),
        .I1(\maximds_reg_n_0_[3][4] ),
        .I2(\maximds_reg_n_0_[0][5] ),
        .I3(\maximds_reg_n_0_[3][5] ),
        .I4(\ixMax[2]_i_31_n_0 ),
        .I5(\ixMax[2]_i_32_n_0 ),
        .O(\ixMax[2]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_19 
       (.I0(\maximds_reg_n_0_[3][4] ),
        .I1(\maximds_reg_n_0_[4][4] ),
        .I2(\maximds_reg_n_0_[3][5] ),
        .I3(\maximds_reg_n_0_[4][5] ),
        .I4(\ixMax[2]_i_33_n_0 ),
        .I5(\ixMax[2]_i_34_n_0 ),
        .O(\ixMax[2]_i_19_n_0 ));
  LUT4 #(
    .INIT(16'hFFFD)) 
    \ixMax[2]_i_2 
       (.I0(\ixMax[2]_i_8_n_0 ),
        .I1(\ixMax[2]_i_9_n_0 ),
        .I2(\ixMax[2]_i_4_n_0 ),
        .I3(\ixMax[2]_i_10_n_0 ),
        .O(\ixMax[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_20 
       (.I0(\maximds_reg_n_0_[1][4] ),
        .I1(\maximds_reg_n_0_[3][4] ),
        .I2(\maximds_reg_n_0_[1][5] ),
        .I3(\maximds_reg_n_0_[3][5] ),
        .I4(\ixMax[2]_i_35_n_0 ),
        .I5(\ixMax[2]_i_36_n_0 ),
        .O(\ixMax[2]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_21 
       (.I0(\maximds_reg_n_0_[1][4] ),
        .I1(\maximds_reg_n_0_[2][4] ),
        .I2(\maximds_reg_n_0_[1][5] ),
        .I3(\maximds_reg_n_0_[2][5] ),
        .I4(\ixMax[2]_i_37_n_0 ),
        .I5(\ixMax[2]_i_38_n_0 ),
        .O(\ixMax[2]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_22 
       (.I0(\maximds_reg_n_0_[2][2] ),
        .I1(\maximds_reg_n_0_[4][2] ),
        .I2(\maximds_reg_n_0_[2][3] ),
        .I3(\maximds_reg_n_0_[4][3] ),
        .I4(\ixMax[2]_i_39_n_0 ),
        .I5(\ixMax[2]_i_40_n_0 ),
        .O(\ixMax[2]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_23 
       (.I0(\maximds_reg_n_0_[4][6] ),
        .I1(\maximds_reg_n_0_[2][6] ),
        .I2(\maximds_reg_n_0_[4][5] ),
        .I3(\maximds_reg_n_0_[2][5] ),
        .O(\ixMax[2]_i_23_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_24 
       (.I0(\maximds_reg_n_0_[2][3] ),
        .I1(\maximds_reg_n_0_[3][3] ),
        .I2(\maximds_reg_n_0_[2][2] ),
        .I3(\maximds_reg_n_0_[3][2] ),
        .I4(\ixMax[2]_i_41_n_0 ),
        .I5(\ixMax[2]_i_42_n_0 ),
        .O(\ixMax[2]_i_24_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_25 
       (.I0(\maximds_reg_n_0_[3][6] ),
        .I1(\maximds_reg_n_0_[2][6] ),
        .I2(\maximds_reg_n_0_[3][5] ),
        .I3(\maximds_reg_n_0_[2][5] ),
        .O(\ixMax[2]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_26 
       (.I0(\maximds_reg_n_0_[0][3] ),
        .I1(\maximds_reg_n_0_[2][3] ),
        .I2(\maximds_reg_n_0_[0][2] ),
        .I3(\maximds_reg_n_0_[2][2] ),
        .I4(\ixMax[2]_i_43_n_0 ),
        .I5(\ixMax[2]_i_44_n_0 ),
        .O(\ixMax[2]_i_26_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_27 
       (.I0(\maximds_reg_n_0_[2][6] ),
        .I1(\maximds_reg_n_0_[0][6] ),
        .I2(\maximds_reg_n_0_[2][5] ),
        .I3(\maximds_reg_n_0_[0][5] ),
        .O(\ixMax[2]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_28 
       (.I0(\maximds_reg_n_0_[1][4] ),
        .I1(\maximds_reg_n_0_[4][4] ),
        .I2(\maximds_reg_n_0_[1][5] ),
        .I3(\maximds_reg_n_0_[4][5] ),
        .I4(\ixMax[2]_i_45_n_0 ),
        .I5(\ixMax[2]_i_46_n_0 ),
        .O(\ixMax[2]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_29 
       (.I0(\maximds_reg_n_0_[0][4] ),
        .I1(\maximds_reg_n_0_[1][4] ),
        .I2(\maximds_reg_n_0_[0][5] ),
        .I3(\maximds_reg_n_0_[1][5] ),
        .I4(\ixMax[2]_i_47_n_0 ),
        .I5(\ixMax[2]_i_48_n_0 ),
        .O(\ixMax[2]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h5DDF5DDFDFDF5DDF)) 
    \ixMax[2]_i_3 
       (.I0(\ixMax[2]_i_11_n_0 ),
        .I1(\maximds_reg_n_0_[4][7] ),
        .I2(\maximds_reg_n_0_[2][7] ),
        .I3(\ixMax[2]_i_12_n_0 ),
        .I4(\maximds_reg_n_0_[4][6] ),
        .I5(\maximds_reg_n_0_[2][6] ),
        .O(\ixMax[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_30 
       (.I0(\maximds_reg_n_0_[0][5] ),
        .I1(\maximds_reg_n_0_[4][5] ),
        .I2(\maximds_reg_n_0_[0][4] ),
        .I3(\maximds_reg_n_0_[4][4] ),
        .I4(\ixMax[2]_i_49_n_0 ),
        .I5(\ixMax[2]_i_50_n_0 ),
        .O(\ixMax[2]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_31 
       (.I0(\maximds_reg_n_0_[0][2] ),
        .I1(\maximds_reg_n_0_[3][2] ),
        .I2(\maximds_reg_n_0_[0][3] ),
        .I3(\maximds_reg_n_0_[3][3] ),
        .I4(\ixMax[2]_i_51_n_0 ),
        .I5(\ixMax[2]_i_52_n_0 ),
        .O(\ixMax[2]_i_31_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_32 
       (.I0(\maximds_reg_n_0_[3][6] ),
        .I1(\maximds_reg_n_0_[0][6] ),
        .I2(\maximds_reg_n_0_[3][5] ),
        .I3(\maximds_reg_n_0_[0][5] ),
        .O(\ixMax[2]_i_32_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_33 
       (.I0(\maximds_reg_n_0_[3][2] ),
        .I1(\maximds_reg_n_0_[4][2] ),
        .I2(\maximds_reg_n_0_[3][3] ),
        .I3(\maximds_reg_n_0_[4][3] ),
        .I4(\ixMax[2]_i_53_n_0 ),
        .I5(\ixMax[2]_i_54_n_0 ),
        .O(\ixMax[2]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_34 
       (.I0(\maximds_reg_n_0_[4][6] ),
        .I1(\maximds_reg_n_0_[3][6] ),
        .I2(\maximds_reg_n_0_[4][5] ),
        .I3(\maximds_reg_n_0_[3][5] ),
        .O(\ixMax[2]_i_34_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_35 
       (.I0(\maximds_reg_n_0_[1][3] ),
        .I1(\maximds_reg_n_0_[3][3] ),
        .I2(\maximds_reg_n_0_[1][2] ),
        .I3(\maximds_reg_n_0_[3][2] ),
        .I4(\ixMax[2]_i_55_n_0 ),
        .I5(\ixMax[2]_i_56_n_0 ),
        .O(\ixMax[2]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_36 
       (.I0(\maximds_reg_n_0_[3][6] ),
        .I1(\maximds_reg_n_0_[1][6] ),
        .I2(\maximds_reg_n_0_[3][5] ),
        .I3(\maximds_reg_n_0_[1][5] ),
        .O(\ixMax[2]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_37 
       (.I0(\maximds_reg_n_0_[1][3] ),
        .I1(\maximds_reg_n_0_[2][3] ),
        .I2(\maximds_reg_n_0_[1][2] ),
        .I3(\maximds_reg_n_0_[2][2] ),
        .I4(\ixMax[2]_i_57_n_0 ),
        .I5(\ixMax[2]_i_58_n_0 ),
        .O(\ixMax[2]_i_37_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_38 
       (.I0(\maximds_reg_n_0_[2][6] ),
        .I1(\maximds_reg_n_0_[1][6] ),
        .I2(\maximds_reg_n_0_[2][5] ),
        .I3(\maximds_reg_n_0_[1][5] ),
        .O(\ixMax[2]_i_38_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \ixMax[2]_i_39 
       (.I0(\maximds_reg_n_0_[2][0] ),
        .I1(\maximds_reg_n_0_[4][0] ),
        .I2(\maximds_reg_n_0_[2][1] ),
        .I3(\maximds_reg_n_0_[4][1] ),
        .I4(\maximds_reg_n_0_[2][2] ),
        .I5(\maximds_reg_n_0_[4][2] ),
        .O(\ixMax[2]_i_39_n_0 ));
  LUT5 #(
    .INIT(32'hB0FB00F0)) 
    \ixMax[2]_i_4 
       (.I0(\maximds_reg_n_0_[2][6] ),
        .I1(\maximds_reg_n_0_[3][6] ),
        .I2(\maximds_reg_n_0_[2][7] ),
        .I3(\maximds_reg_n_0_[3][7] ),
        .I4(\ixMax[2]_i_13_n_0 ),
        .O(\ixMax[2]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_40 
       (.I0(\maximds_reg_n_0_[4][4] ),
        .I1(\maximds_reg_n_0_[2][4] ),
        .I2(\maximds_reg_n_0_[4][3] ),
        .I3(\maximds_reg_n_0_[2][3] ),
        .O(\ixMax[2]_i_40_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \ixMax[2]_i_41 
       (.I0(\maximds_reg_n_0_[2][0] ),
        .I1(\maximds_reg_n_0_[3][0] ),
        .I2(\maximds_reg_n_0_[2][1] ),
        .I3(\maximds_reg_n_0_[3][1] ),
        .I4(\maximds_reg_n_0_[2][2] ),
        .I5(\maximds_reg_n_0_[3][2] ),
        .O(\ixMax[2]_i_41_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_42 
       (.I0(\maximds_reg_n_0_[3][4] ),
        .I1(\maximds_reg_n_0_[2][4] ),
        .I2(\maximds_reg_n_0_[3][3] ),
        .I3(\maximds_reg_n_0_[2][3] ),
        .O(\ixMax[2]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \ixMax[2]_i_43 
       (.I0(\maximds_reg_n_0_[0][0] ),
        .I1(\maximds_reg_n_0_[2][0] ),
        .I2(\maximds_reg_n_0_[0][1] ),
        .I3(\maximds_reg_n_0_[2][1] ),
        .I4(\maximds_reg_n_0_[0][2] ),
        .I5(\maximds_reg_n_0_[2][2] ),
        .O(\ixMax[2]_i_43_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_44 
       (.I0(\maximds_reg_n_0_[2][4] ),
        .I1(\maximds_reg_n_0_[0][4] ),
        .I2(\maximds_reg_n_0_[2][3] ),
        .I3(\maximds_reg_n_0_[0][3] ),
        .O(\ixMax[2]_i_44_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_45 
       (.I0(\maximds_reg_n_0_[1][2] ),
        .I1(\maximds_reg_n_0_[4][2] ),
        .I2(\maximds_reg_n_0_[1][3] ),
        .I3(\maximds_reg_n_0_[4][3] ),
        .I4(\ixMax[2]_i_59_n_0 ),
        .I5(\ixMax[2]_i_60_n_0 ),
        .O(\ixMax[2]_i_45_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_46 
       (.I0(\maximds_reg_n_0_[4][6] ),
        .I1(\maximds_reg_n_0_[1][6] ),
        .I2(\maximds_reg_n_0_[4][5] ),
        .I3(\maximds_reg_n_0_[1][5] ),
        .O(\ixMax[2]_i_46_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_47 
       (.I0(\maximds_reg_n_0_[0][3] ),
        .I1(\maximds_reg_n_0_[1][3] ),
        .I2(\maximds_reg_n_0_[0][2] ),
        .I3(\maximds_reg_n_0_[1][2] ),
        .I4(\ixMax[2]_i_61_n_0 ),
        .I5(\ixMax[2]_i_62_n_0 ),
        .O(\ixMax[2]_i_47_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_48 
       (.I0(\maximds_reg_n_0_[1][6] ),
        .I1(\maximds_reg_n_0_[0][6] ),
        .I2(\maximds_reg_n_0_[1][5] ),
        .I3(\maximds_reg_n_0_[0][5] ),
        .O(\ixMax[2]_i_48_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \ixMax[2]_i_49 
       (.I0(\maximds_reg_n_0_[0][3] ),
        .I1(\maximds_reg_n_0_[4][3] ),
        .I2(\maximds_reg_n_0_[0][2] ),
        .I3(\maximds_reg_n_0_[4][2] ),
        .I4(\ixMax[2]_i_63_n_0 ),
        .I5(\ixMax[2]_i_64_n_0 ),
        .O(\ixMax[2]_i_49_n_0 ));
  LUT5 #(
    .INIT(32'hB0FB00F0)) 
    \ixMax[2]_i_5 
       (.I0(\maximds_reg_n_0_[0][6] ),
        .I1(\maximds_reg_n_0_[2][6] ),
        .I2(\maximds_reg_n_0_[0][7] ),
        .I3(\maximds_reg_n_0_[2][7] ),
        .I4(\ixMax[2]_i_14_n_0 ),
        .O(\ixMax[2]_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_50 
       (.I0(\maximds_reg_n_0_[4][6] ),
        .I1(\maximds_reg_n_0_[0][6] ),
        .I2(\maximds_reg_n_0_[4][5] ),
        .I3(\maximds_reg_n_0_[0][5] ),
        .O(\ixMax[2]_i_50_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \ixMax[2]_i_51 
       (.I0(\maximds_reg_n_0_[0][0] ),
        .I1(\maximds_reg_n_0_[3][0] ),
        .I2(\maximds_reg_n_0_[0][1] ),
        .I3(\maximds_reg_n_0_[3][1] ),
        .I4(\maximds_reg_n_0_[0][2] ),
        .I5(\maximds_reg_n_0_[3][2] ),
        .O(\ixMax[2]_i_51_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_52 
       (.I0(\maximds_reg_n_0_[3][4] ),
        .I1(\maximds_reg_n_0_[0][4] ),
        .I2(\maximds_reg_n_0_[3][3] ),
        .I3(\maximds_reg_n_0_[0][3] ),
        .O(\ixMax[2]_i_52_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \ixMax[2]_i_53 
       (.I0(\maximds_reg_n_0_[3][0] ),
        .I1(\maximds_reg_n_0_[4][0] ),
        .I2(\maximds_reg_n_0_[3][1] ),
        .I3(\maximds_reg_n_0_[4][1] ),
        .I4(\maximds_reg_n_0_[3][2] ),
        .I5(\maximds_reg_n_0_[4][2] ),
        .O(\ixMax[2]_i_53_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_54 
       (.I0(\maximds_reg_n_0_[4][4] ),
        .I1(\maximds_reg_n_0_[3][4] ),
        .I2(\maximds_reg_n_0_[4][3] ),
        .I3(\maximds_reg_n_0_[3][3] ),
        .O(\ixMax[2]_i_54_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \ixMax[2]_i_55 
       (.I0(\maximds_reg_n_0_[1][0] ),
        .I1(\maximds_reg_n_0_[3][0] ),
        .I2(\maximds_reg_n_0_[1][1] ),
        .I3(\maximds_reg_n_0_[3][1] ),
        .I4(\maximds_reg_n_0_[1][2] ),
        .I5(\maximds_reg_n_0_[3][2] ),
        .O(\ixMax[2]_i_55_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_56 
       (.I0(\maximds_reg_n_0_[3][4] ),
        .I1(\maximds_reg_n_0_[1][4] ),
        .I2(\maximds_reg_n_0_[3][3] ),
        .I3(\maximds_reg_n_0_[1][3] ),
        .O(\ixMax[2]_i_56_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \ixMax[2]_i_57 
       (.I0(\maximds_reg_n_0_[1][0] ),
        .I1(\maximds_reg_n_0_[2][0] ),
        .I2(\maximds_reg_n_0_[1][1] ),
        .I3(\maximds_reg_n_0_[2][1] ),
        .I4(\maximds_reg_n_0_[1][2] ),
        .I5(\maximds_reg_n_0_[2][2] ),
        .O(\ixMax[2]_i_57_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_58 
       (.I0(\maximds_reg_n_0_[2][4] ),
        .I1(\maximds_reg_n_0_[1][4] ),
        .I2(\maximds_reg_n_0_[2][3] ),
        .I3(\maximds_reg_n_0_[1][3] ),
        .O(\ixMax[2]_i_58_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \ixMax[2]_i_59 
       (.I0(\maximds_reg_n_0_[1][0] ),
        .I1(\maximds_reg_n_0_[4][0] ),
        .I2(\maximds_reg_n_0_[1][1] ),
        .I3(\maximds_reg_n_0_[4][1] ),
        .I4(\maximds_reg_n_0_[1][2] ),
        .I5(\maximds_reg_n_0_[4][2] ),
        .O(\ixMax[2]_i_59_n_0 ));
  LUT4 #(
    .INIT(16'h0040)) 
    \ixMax[2]_i_6 
       (.I0(\ixMax[2]_i_15_n_0 ),
        .I1(\ixMax[2]_i_10_n_0 ),
        .I2(\ixMax[2]_i_16_n_0 ),
        .I3(\ixMax[2]_i_11_n_0 ),
        .O(\ixMax[2]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_60 
       (.I0(\maximds_reg_n_0_[4][4] ),
        .I1(\maximds_reg_n_0_[1][4] ),
        .I2(\maximds_reg_n_0_[4][3] ),
        .I3(\maximds_reg_n_0_[1][3] ),
        .O(\ixMax[2]_i_60_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \ixMax[2]_i_61 
       (.I0(\maximds_reg_n_0_[0][0] ),
        .I1(\maximds_reg_n_0_[1][0] ),
        .I2(\maximds_reg_n_0_[0][1] ),
        .I3(\maximds_reg_n_0_[1][1] ),
        .I4(\maximds_reg_n_0_[0][2] ),
        .I5(\maximds_reg_n_0_[1][2] ),
        .O(\ixMax[2]_i_61_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_62 
       (.I0(\maximds_reg_n_0_[1][4] ),
        .I1(\maximds_reg_n_0_[0][4] ),
        .I2(\maximds_reg_n_0_[1][3] ),
        .I3(\maximds_reg_n_0_[0][3] ),
        .O(\ixMax[2]_i_62_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \ixMax[2]_i_63 
       (.I0(\maximds_reg_n_0_[0][0] ),
        .I1(\maximds_reg_n_0_[4][0] ),
        .I2(\maximds_reg_n_0_[0][1] ),
        .I3(\maximds_reg_n_0_[4][1] ),
        .I4(\maximds_reg_n_0_[0][2] ),
        .I5(\maximds_reg_n_0_[4][2] ),
        .O(\ixMax[2]_i_63_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \ixMax[2]_i_64 
       (.I0(\maximds_reg_n_0_[4][4] ),
        .I1(\maximds_reg_n_0_[0][4] ),
        .I2(\maximds_reg_n_0_[4][3] ),
        .I3(\maximds_reg_n_0_[0][3] ),
        .O(\ixMax[2]_i_64_n_0 ));
  LUT6 #(
    .INIT(64'h4040404040004040)) 
    \ixMax[2]_i_7 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(rng_reg_0),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\ixMax[2]_i_17_n_0 ),
        .I4(\ixMax[2]_i_5_n_0 ),
        .I5(\ixMax[2]_i_16_n_0 ),
        .O(\ixMax[2]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h4F04FF0F)) 
    \ixMax[2]_i_8 
       (.I0(\maximds_reg_n_0_[0][6] ),
        .I1(\maximds_reg_n_0_[3][6] ),
        .I2(\maximds_reg_n_0_[0][7] ),
        .I3(\maximds_reg_n_0_[3][7] ),
        .I4(\ixMax[2]_i_18_n_0 ),
        .O(\ixMax[2]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h4F04FF0F)) 
    \ixMax[2]_i_9 
       (.I0(\maximds_reg_n_0_[3][6] ),
        .I1(\maximds_reg_n_0_[4][6] ),
        .I2(\maximds_reg_n_0_[3][7] ),
        .I3(\maximds_reg_n_0_[4][7] ),
        .I4(\ixMax[2]_i_19_n_0 ),
        .O(\ixMax[2]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \ixMax_reg[0] 
       (.C(aclk_sig),
        .CE(colmax_lcl),
        .CLR(linNotLog_reg_0),
        .D(ixMax[0]),
        .Q(\ixMax_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \ixMax_reg[1] 
       (.C(aclk_sig),
        .CE(colmax_lcl),
        .CLR(linNotLog_reg_0),
        .D(ixMax[1]),
        .Q(\ixMax_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \ixMax_reg[2] 
       (.C(aclk_sig),
        .CE(colmax_lcl),
        .CLR(linNotLog_reg_0),
        .D(ixMax[2]),
        .Q(\ixMax_reg_n_0_[2] ));
  (* SOFT_HLUTNM = "soft_lutpair829" *) 
  LUT4 #(
    .INIT(16'hFF1F)) 
    \lat[4]_i_1 
       (.I0(stateCorner[1]),
        .I1(stateCorner[0]),
        .I2(rng_reg_0),
        .I3(lat),
        .O(\lat[4]_i_1_n_0 ));
  FDPE #(
    .INIT(1'b0)) 
    \lat_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\lat[4]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(lat));
  FDCE linNotLog_reg
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(hdrNotFix),
        .Q(linNotLog_reg_n_0));
  LUT5 #(
    .INIT(32'h8888888A)) 
    \maximds[0][7]_i_1 
       (.I0(colmax_lcl),
        .I1(\row_lcl[10]_i_1_n_0 ),
        .I2(\colmax_lcl_reg_n_0_[2] ),
        .I3(\colmax_lcl_reg_n_0_[1] ),
        .I4(\colmax_lcl_reg_n_0_[0] ),
        .O(\maximds[0][7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h88888A88)) 
    \maximds[1][7]_i_1 
       (.I0(colmax_lcl),
        .I1(\row_lcl[10]_i_1_n_0 ),
        .I2(\colmax_lcl_reg_n_0_[1] ),
        .I3(\colmax_lcl_reg_n_0_[0] ),
        .I4(\colmax_lcl_reg_n_0_[2] ),
        .O(\maximds[1][7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h888888A8)) 
    \maximds[2][7]_i_1 
       (.I0(colmax_lcl),
        .I1(\row_lcl[10]_i_1_n_0 ),
        .I2(\colmax_lcl_reg_n_0_[1] ),
        .I3(\colmax_lcl_reg_n_0_[2] ),
        .I4(\colmax_lcl_reg_n_0_[0] ),
        .O(\maximds[2][7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h8888A888)) 
    \maximds[3][7]_i_1 
       (.I0(colmax_lcl),
        .I1(\row_lcl[10]_i_1_n_0 ),
        .I2(\colmax_lcl_reg_n_0_[1] ),
        .I3(\colmax_lcl_reg_n_0_[0] ),
        .I4(\colmax_lcl_reg_n_0_[2] ),
        .O(\maximds[3][7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h20AA2020AAAAAAAA)) 
    \maximds[4][0]_i_1 
       (.I0(\maximds[4][7]_i_3_n_0 ),
        .I1(\maximds[4][7]_i_4_n_0 ),
        .I2(data1[0]),
        .I3(\maximds[4][7]_i_5_n_0 ),
        .I4(data0[0]),
        .I5(\maximds[4][0]_i_2_n_0 ),
        .O(\maximds[0]_40 [0]));
  LUT6 #(
    .INIT(64'hFFFFFFFF474700FF)) 
    \maximds[4][0]_i_2 
       (.I0(\dImd_reg_n_0_[0] ),
        .I1(\maximds[4][7]_i_14_n_0 ),
        .I2(data3[0]),
        .I3(data2[0]),
        .I4(\maximds[4][7]_i_15_n_0 ),
        .I5(\maximds[4][7]_i_16_n_0 ),
        .O(\maximds[4][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h20AA2020AAAAAAAA)) 
    \maximds[4][1]_i_1 
       (.I0(\maximds[4][7]_i_3_n_0 ),
        .I1(\maximds[4][7]_i_4_n_0 ),
        .I2(data1[1]),
        .I3(\maximds[4][7]_i_5_n_0 ),
        .I4(data0[1]),
        .I5(\maximds[4][1]_i_2_n_0 ),
        .O(\maximds[0]_40 [1]));
  LUT6 #(
    .INIT(64'hFFFFFFFF474700FF)) 
    \maximds[4][1]_i_2 
       (.I0(\dImd_reg_n_0_[1] ),
        .I1(\maximds[4][7]_i_14_n_0 ),
        .I2(data3[1]),
        .I3(data2[1]),
        .I4(\maximds[4][7]_i_15_n_0 ),
        .I5(\maximds[4][7]_i_16_n_0 ),
        .O(\maximds[4][1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h20AA2020AAAAAAAA)) 
    \maximds[4][2]_i_1 
       (.I0(\maximds[4][7]_i_3_n_0 ),
        .I1(\maximds[4][7]_i_4_n_0 ),
        .I2(data1[2]),
        .I3(\maximds[4][7]_i_5_n_0 ),
        .I4(data0[2]),
        .I5(\maximds[4][2]_i_2_n_0 ),
        .O(\maximds[0]_40 [2]));
  LUT6 #(
    .INIT(64'hFFFFFFFF474700FF)) 
    \maximds[4][2]_i_2 
       (.I0(\dImd_reg_n_0_[2] ),
        .I1(\maximds[4][7]_i_14_n_0 ),
        .I2(data3[2]),
        .I3(data2[2]),
        .I4(\maximds[4][7]_i_15_n_0 ),
        .I5(\maximds[4][7]_i_16_n_0 ),
        .O(\maximds[4][2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h20AA2020AAAAAAAA)) 
    \maximds[4][3]_i_1 
       (.I0(\maximds[4][7]_i_3_n_0 ),
        .I1(\maximds[4][7]_i_4_n_0 ),
        .I2(data1[3]),
        .I3(\maximds[4][7]_i_5_n_0 ),
        .I4(data0[3]),
        .I5(\maximds[4][3]_i_2_n_0 ),
        .O(\maximds[0]_40 [3]));
  LUT6 #(
    .INIT(64'hFFFFFFFF474700FF)) 
    \maximds[4][3]_i_2 
       (.I0(\dImd_reg_n_0_[3] ),
        .I1(\maximds[4][7]_i_14_n_0 ),
        .I2(data3[3]),
        .I3(data2[3]),
        .I4(\maximds[4][7]_i_15_n_0 ),
        .I5(\maximds[4][7]_i_16_n_0 ),
        .O(\maximds[4][3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h20AA2020AAAAAAAA)) 
    \maximds[4][4]_i_1 
       (.I0(\maximds[4][7]_i_3_n_0 ),
        .I1(\maximds[4][7]_i_4_n_0 ),
        .I2(data1[4]),
        .I3(\maximds[4][7]_i_5_n_0 ),
        .I4(data0[4]),
        .I5(\maximds[4][4]_i_2_n_0 ),
        .O(\maximds[0]_40 [4]));
  LUT6 #(
    .INIT(64'hFFFFFFFF474700FF)) 
    \maximds[4][4]_i_2 
       (.I0(\dImd_reg_n_0_[4] ),
        .I1(\maximds[4][7]_i_14_n_0 ),
        .I2(data3[4]),
        .I3(data2[4]),
        .I4(\maximds[4][7]_i_15_n_0 ),
        .I5(\maximds[4][7]_i_16_n_0 ),
        .O(\maximds[4][4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h20AA2020AAAAAAAA)) 
    \maximds[4][5]_i_1 
       (.I0(\maximds[4][7]_i_3_n_0 ),
        .I1(\maximds[4][7]_i_4_n_0 ),
        .I2(data1[5]),
        .I3(\maximds[4][7]_i_5_n_0 ),
        .I4(data0[5]),
        .I5(\maximds[4][5]_i_2_n_0 ),
        .O(\maximds[0]_40 [5]));
  LUT6 #(
    .INIT(64'hFFFFFFFF474700FF)) 
    \maximds[4][5]_i_2 
       (.I0(\dImd_reg_n_0_[5] ),
        .I1(\maximds[4][7]_i_14_n_0 ),
        .I2(data3[5]),
        .I3(data2[5]),
        .I4(\maximds[4][7]_i_15_n_0 ),
        .I5(\maximds[4][7]_i_16_n_0 ),
        .O(\maximds[4][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h20AA2020AAAAAAAA)) 
    \maximds[4][6]_i_1 
       (.I0(\maximds[4][7]_i_3_n_0 ),
        .I1(\maximds[4][7]_i_4_n_0 ),
        .I2(data1[6]),
        .I3(\maximds[4][7]_i_5_n_0 ),
        .I4(data0[6]),
        .I5(\maximds[4][6]_i_2_n_0 ),
        .O(\maximds[0]_40 [6]));
  LUT6 #(
    .INIT(64'hFFFFFFFF474700FF)) 
    \maximds[4][6]_i_2 
       (.I0(\dImd_reg_n_0_[6] ),
        .I1(\maximds[4][7]_i_14_n_0 ),
        .I2(data3[6]),
        .I3(data2[6]),
        .I4(\maximds[4][7]_i_15_n_0 ),
        .I5(\maximds[4][7]_i_16_n_0 ),
        .O(\maximds[4][6]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h888888A8)) 
    \maximds[4][7]_i_1 
       (.I0(colmax_lcl),
        .I1(\row_lcl[10]_i_1_n_0 ),
        .I2(\colmax_lcl_reg_n_0_[2] ),
        .I3(\colmax_lcl_reg_n_0_[1] ),
        .I4(\colmax_lcl_reg_n_0_[0] ),
        .O(\maximds[4][7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h4F04FF0F)) 
    \maximds[4][7]_i_10 
       (.I0(data1[6]),
        .I1(data3[6]),
        .I2(data1[7]),
        .I3(data3[7]),
        .I4(\maximds[4][7]_i_20_n_0 ),
        .O(\maximds[4][7]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'hB0FB00F0)) 
    \maximds[4][7]_i_11 
       (.I0(data0[6]),
        .I1(data3[6]),
        .I2(data0[7]),
        .I3(data3[7]),
        .I4(\maximds[4][7]_i_21_n_0 ),
        .O(\maximds[4][7]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'h4F04FF0F)) 
    \maximds[4][7]_i_12 
       (.I0(data0[6]),
        .I1(\dImd_reg_n_0_[6] ),
        .I2(data0[7]),
        .I3(\dImd_reg_n_0_[7] ),
        .I4(\maximds[4][7]_i_22_n_0 ),
        .O(\maximds[4][7]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'h4F04FF0F)) 
    \maximds[4][7]_i_13 
       (.I0(data0[6]),
        .I1(data2[6]),
        .I2(data0[7]),
        .I3(data2[7]),
        .I4(\maximds[4][7]_i_23_n_0 ),
        .O(\maximds[4][7]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'hFF7F)) 
    \maximds[4][7]_i_14 
       (.I0(\maximds[4][7]_i_24_n_0 ),
        .I1(\maximds[4][7]_i_10_n_0 ),
        .I2(\maximds[4][7]_i_25_n_0 ),
        .I3(\maximds[4][7]_i_11_n_0 ),
        .O(\maximds[4][7]_i_14_n_0 ));
  LUT4 #(
    .INIT(16'hEFFF)) 
    \maximds[4][7]_i_15 
       (.I0(\maximds[4][7]_i_25_n_0 ),
        .I1(\maximds[4][7]_i_8_n_0 ),
        .I2(\maximds[4][7]_i_26_n_0 ),
        .I3(\maximds[4][7]_i_13_n_0 ),
        .O(\maximds[4][7]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \maximds[4][7]_i_16 
       (.I0(\maximds[4][7]_i_5_n_0 ),
        .I1(\maximds[4][7]_i_4_n_0 ),
        .O(\maximds[4][7]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_17 
       (.I0(data0[4]),
        .I1(data1[4]),
        .I2(data0[5]),
        .I3(data1[5]),
        .I4(\maximds[4][7]_i_27_n_0 ),
        .I5(\maximds[4][7]_i_28_n_0 ),
        .O(\maximds[4][7]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_18 
       (.I0(data1[4]),
        .I1(data2[4]),
        .I2(data1[5]),
        .I3(data2[5]),
        .I4(\maximds[4][7]_i_29_n_0 ),
        .I5(\maximds[4][7]_i_30_n_0 ),
        .O(\maximds[4][7]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_19 
       (.I0(data1[4]),
        .I1(\dImd_reg_n_0_[4] ),
        .I2(data1[5]),
        .I3(\dImd_reg_n_0_[5] ),
        .I4(\maximds[4][7]_i_31_n_0 ),
        .I5(\maximds[4][7]_i_32_n_0 ),
        .O(\maximds[4][7]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h20AA2020AAAAAAAA)) 
    \maximds[4][7]_i_2 
       (.I0(\maximds[4][7]_i_3_n_0 ),
        .I1(\maximds[4][7]_i_4_n_0 ),
        .I2(data1[7]),
        .I3(\maximds[4][7]_i_5_n_0 ),
        .I4(data0[7]),
        .I5(\maximds[4][7]_i_6_n_0 ),
        .O(\maximds[0]_40 [7]));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_20 
       (.I0(data1[4]),
        .I1(data3[4]),
        .I2(data1[5]),
        .I3(data3[5]),
        .I4(\maximds[4][7]_i_33_n_0 ),
        .I5(\maximds[4][7]_i_34_n_0 ),
        .O(\maximds[4][7]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_21 
       (.I0(data0[4]),
        .I1(data3[4]),
        .I2(data0[5]),
        .I3(data3[5]),
        .I4(\maximds[4][7]_i_35_n_0 ),
        .I5(\maximds[4][7]_i_36_n_0 ),
        .O(\maximds[4][7]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_22 
       (.I0(data0[4]),
        .I1(\dImd_reg_n_0_[4] ),
        .I2(data0[5]),
        .I3(\dImd_reg_n_0_[5] ),
        .I4(\maximds[4][7]_i_37_n_0 ),
        .I5(\maximds[4][7]_i_38_n_0 ),
        .O(\maximds[4][7]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_23 
       (.I0(data0[4]),
        .I1(data2[4]),
        .I2(data0[5]),
        .I3(data2[5]),
        .I4(\maximds[4][7]_i_39_n_0 ),
        .I5(\maximds[4][7]_i_40_n_0 ),
        .O(\maximds[4][7]_i_23_n_0 ));
  LUT5 #(
    .INIT(32'hB000FFB0)) 
    \maximds[4][7]_i_24 
       (.I0(data3[6]),
        .I1(\dImd_reg_n_0_[6] ),
        .I2(\maximds[4][7]_i_41_n_0 ),
        .I3(data3[7]),
        .I4(\dImd_reg_n_0_[7] ),
        .O(\maximds[4][7]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'h4F04FF0F)) 
    \maximds[4][7]_i_25 
       (.I0(data2[6]),
        .I1(data3[6]),
        .I2(data2[7]),
        .I3(data3[7]),
        .I4(\maximds[4][7]_i_42_n_0 ),
        .O(\maximds[4][7]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'hB000FFB0)) 
    \maximds[4][7]_i_26 
       (.I0(data2[6]),
        .I1(\dImd_reg_n_0_[6] ),
        .I2(\maximds[4][7]_i_43_n_0 ),
        .I3(data2[7]),
        .I4(\dImd_reg_n_0_[7] ),
        .O(\maximds[4][7]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_27 
       (.I0(data0[3]),
        .I1(data1[3]),
        .I2(data0[2]),
        .I3(data1[2]),
        .I4(\maximds[4][7]_i_44_n_0 ),
        .I5(\maximds[4][7]_i_45_n_0 ),
        .O(\maximds[4][7]_i_27_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_28 
       (.I0(data1[6]),
        .I1(data0[6]),
        .I2(data1[5]),
        .I3(data0[5]),
        .O(\maximds[4][7]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_29 
       (.I0(data1[2]),
        .I1(data2[2]),
        .I2(data1[3]),
        .I3(data2[3]),
        .I4(\maximds[4][7]_i_46_n_0 ),
        .I5(\maximds[4][7]_i_47_n_0 ),
        .O(\maximds[4][7]_i_29_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair787" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \maximds[4][7]_i_3 
       (.I0(\stateMaxsel_reg_n_0_[0] ),
        .I1(rng_reg_0),
        .I2(\stateMaxsel_reg_n_0_[1] ),
        .O(\maximds[4][7]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_30 
       (.I0(data2[6]),
        .I1(data1[6]),
        .I2(data2[5]),
        .I3(data1[5]),
        .O(\maximds[4][7]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_31 
       (.I0(data1[2]),
        .I1(\dImd_reg_n_0_[2] ),
        .I2(data1[3]),
        .I3(\dImd_reg_n_0_[3] ),
        .I4(\maximds[4][7]_i_48_n_0 ),
        .I5(\maximds[4][7]_i_49_n_0 ),
        .O(\maximds[4][7]_i_31_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_32 
       (.I0(\dImd_reg_n_0_[6] ),
        .I1(data1[6]),
        .I2(\dImd_reg_n_0_[5] ),
        .I3(data1[5]),
        .O(\maximds[4][7]_i_32_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_33 
       (.I0(data1[2]),
        .I1(data3[2]),
        .I2(data1[3]),
        .I3(data3[3]),
        .I4(\maximds[4][7]_i_50_n_0 ),
        .I5(\maximds[4][7]_i_51_n_0 ),
        .O(\maximds[4][7]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_34 
       (.I0(data3[6]),
        .I1(data1[6]),
        .I2(data3[5]),
        .I3(data1[5]),
        .O(\maximds[4][7]_i_34_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_35 
       (.I0(data0[2]),
        .I1(data3[2]),
        .I2(data0[3]),
        .I3(data3[3]),
        .I4(\maximds[4][7]_i_52_n_0 ),
        .I5(\maximds[4][7]_i_53_n_0 ),
        .O(\maximds[4][7]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_36 
       (.I0(data3[6]),
        .I1(data0[6]),
        .I2(data3[5]),
        .I3(data0[5]),
        .O(\maximds[4][7]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_37 
       (.I0(data0[3]),
        .I1(\dImd_reg_n_0_[3] ),
        .I2(data0[2]),
        .I3(\dImd_reg_n_0_[2] ),
        .I4(\maximds[4][7]_i_54_n_0 ),
        .I5(\maximds[4][7]_i_55_n_0 ),
        .O(\maximds[4][7]_i_37_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_38 
       (.I0(\dImd_reg_n_0_[6] ),
        .I1(data0[6]),
        .I2(\dImd_reg_n_0_[5] ),
        .I3(data0[5]),
        .O(\maximds[4][7]_i_38_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_39 
       (.I0(data0[3]),
        .I1(data2[3]),
        .I2(data0[2]),
        .I3(data2[2]),
        .I4(\maximds[4][7]_i_56_n_0 ),
        .I5(\maximds[4][7]_i_57_n_0 ),
        .O(\maximds[4][7]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'hFFF7)) 
    \maximds[4][7]_i_4 
       (.I0(\maximds[4][7]_i_7_n_0 ),
        .I1(\maximds[4][7]_i_8_n_0 ),
        .I2(\maximds[4][7]_i_9_n_0 ),
        .I3(\maximds[4][7]_i_10_n_0 ),
        .O(\maximds[4][7]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_40 
       (.I0(data2[6]),
        .I1(data0[6]),
        .I2(data2[5]),
        .I3(data0[5]),
        .O(\maximds[4][7]_i_40_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_41 
       (.I0(data3[4]),
        .I1(\dImd_reg_n_0_[4] ),
        .I2(data3[5]),
        .I3(\dImd_reg_n_0_[5] ),
        .I4(\maximds[4][7]_i_58_n_0 ),
        .I5(\maximds[4][7]_i_59_n_0 ),
        .O(\maximds[4][7]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_42 
       (.I0(data2[4]),
        .I1(data3[4]),
        .I2(data2[5]),
        .I3(data3[5]),
        .I4(\maximds[4][7]_i_60_n_0 ),
        .I5(\maximds[4][7]_i_61_n_0 ),
        .O(\maximds[4][7]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_43 
       (.I0(data2[4]),
        .I1(\dImd_reg_n_0_[4] ),
        .I2(data2[5]),
        .I3(\dImd_reg_n_0_[5] ),
        .I4(\maximds[4][7]_i_62_n_0 ),
        .I5(\maximds[4][7]_i_63_n_0 ),
        .O(\maximds[4][7]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \maximds[4][7]_i_44 
       (.I0(data0[0]),
        .I1(data1[0]),
        .I2(data0[1]),
        .I3(data1[1]),
        .I4(data0[2]),
        .I5(data1[2]),
        .O(\maximds[4][7]_i_44_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_45 
       (.I0(data1[4]),
        .I1(data0[4]),
        .I2(data1[3]),
        .I3(data0[3]),
        .O(\maximds[4][7]_i_45_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \maximds[4][7]_i_46 
       (.I0(data1[0]),
        .I1(data2[0]),
        .I2(data1[1]),
        .I3(data2[1]),
        .I4(data1[2]),
        .I5(data2[2]),
        .O(\maximds[4][7]_i_46_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_47 
       (.I0(data2[4]),
        .I1(data1[4]),
        .I2(data2[3]),
        .I3(data1[3]),
        .O(\maximds[4][7]_i_47_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \maximds[4][7]_i_48 
       (.I0(data1[0]),
        .I1(\dImd_reg_n_0_[0] ),
        .I2(data1[1]),
        .I3(\dImd_reg_n_0_[1] ),
        .I4(data1[2]),
        .I5(\dImd_reg_n_0_[2] ),
        .O(\maximds[4][7]_i_48_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_49 
       (.I0(\dImd_reg_n_0_[4] ),
        .I1(data1[4]),
        .I2(\dImd_reg_n_0_[3] ),
        .I3(data1[3]),
        .O(\maximds[4][7]_i_49_n_0 ));
  LUT4 #(
    .INIT(16'hFFFD)) 
    \maximds[4][7]_i_5 
       (.I0(\maximds[4][7]_i_11_n_0 ),
        .I1(\maximds[4][7]_i_7_n_0 ),
        .I2(\maximds[4][7]_i_12_n_0 ),
        .I3(\maximds[4][7]_i_13_n_0 ),
        .O(\maximds[4][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \maximds[4][7]_i_50 
       (.I0(data1[0]),
        .I1(data3[0]),
        .I2(data1[1]),
        .I3(data3[1]),
        .I4(data1[2]),
        .I5(data3[2]),
        .O(\maximds[4][7]_i_50_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_51 
       (.I0(data3[4]),
        .I1(data1[4]),
        .I2(data3[3]),
        .I3(data1[3]),
        .O(\maximds[4][7]_i_51_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \maximds[4][7]_i_52 
       (.I0(data0[0]),
        .I1(data3[0]),
        .I2(data0[1]),
        .I3(data3[1]),
        .I4(data0[2]),
        .I5(data3[2]),
        .O(\maximds[4][7]_i_52_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_53 
       (.I0(data3[4]),
        .I1(data0[4]),
        .I2(data3[3]),
        .I3(data0[3]),
        .O(\maximds[4][7]_i_53_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \maximds[4][7]_i_54 
       (.I0(data0[0]),
        .I1(\dImd_reg_n_0_[0] ),
        .I2(data0[1]),
        .I3(\dImd_reg_n_0_[1] ),
        .I4(data0[2]),
        .I5(\dImd_reg_n_0_[2] ),
        .O(\maximds[4][7]_i_54_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_55 
       (.I0(\dImd_reg_n_0_[4] ),
        .I1(data0[4]),
        .I2(\dImd_reg_n_0_[3] ),
        .I3(data0[3]),
        .O(\maximds[4][7]_i_55_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \maximds[4][7]_i_56 
       (.I0(data0[0]),
        .I1(data2[0]),
        .I2(data0[1]),
        .I3(data2[1]),
        .I4(data0[2]),
        .I5(data2[2]),
        .O(\maximds[4][7]_i_56_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_57 
       (.I0(data2[4]),
        .I1(data0[4]),
        .I2(data2[3]),
        .I3(data0[3]),
        .O(\maximds[4][7]_i_57_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_58 
       (.I0(data3[3]),
        .I1(\dImd_reg_n_0_[3] ),
        .I2(data3[2]),
        .I3(\dImd_reg_n_0_[2] ),
        .I4(\maximds[4][7]_i_64_n_0 ),
        .I5(\maximds[4][7]_i_65_n_0 ),
        .O(\maximds[4][7]_i_58_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_59 
       (.I0(\dImd_reg_n_0_[6] ),
        .I1(data3[6]),
        .I2(\dImd_reg_n_0_[5] ),
        .I3(data3[5]),
        .O(\maximds[4][7]_i_59_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF474700FF)) 
    \maximds[4][7]_i_6 
       (.I0(\dImd_reg_n_0_[7] ),
        .I1(\maximds[4][7]_i_14_n_0 ),
        .I2(data3[7]),
        .I3(data2[7]),
        .I4(\maximds[4][7]_i_15_n_0 ),
        .I5(\maximds[4][7]_i_16_n_0 ),
        .O(\maximds[4][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_60 
       (.I0(data2[3]),
        .I1(data3[3]),
        .I2(data2[2]),
        .I3(data3[2]),
        .I4(\maximds[4][7]_i_66_n_0 ),
        .I5(\maximds[4][7]_i_67_n_0 ),
        .O(\maximds[4][7]_i_60_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_61 
       (.I0(data3[6]),
        .I1(data2[6]),
        .I2(data3[5]),
        .I3(data2[5]),
        .O(\maximds[4][7]_i_61_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB0BB0000)) 
    \maximds[4][7]_i_62 
       (.I0(data2[2]),
        .I1(\dImd_reg_n_0_[2] ),
        .I2(data2[3]),
        .I3(\dImd_reg_n_0_[3] ),
        .I4(\maximds[4][7]_i_68_n_0 ),
        .I5(\maximds[4][7]_i_69_n_0 ),
        .O(\maximds[4][7]_i_62_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_63 
       (.I0(\dImd_reg_n_0_[6] ),
        .I1(data2[6]),
        .I2(\dImd_reg_n_0_[5] ),
        .I3(data2[5]),
        .O(\maximds[4][7]_i_63_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \maximds[4][7]_i_64 
       (.I0(data3[0]),
        .I1(\dImd_reg_n_0_[0] ),
        .I2(data3[1]),
        .I3(\dImd_reg_n_0_[1] ),
        .I4(data3[2]),
        .I5(\dImd_reg_n_0_[2] ),
        .O(\maximds[4][7]_i_64_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_65 
       (.I0(\dImd_reg_n_0_[4] ),
        .I1(data3[4]),
        .I2(\dImd_reg_n_0_[3] ),
        .I3(data3[3]),
        .O(\maximds[4][7]_i_65_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \maximds[4][7]_i_66 
       (.I0(data2[0]),
        .I1(data3[0]),
        .I2(data2[1]),
        .I3(data3[1]),
        .I4(data2[2]),
        .I5(data3[2]),
        .O(\maximds[4][7]_i_66_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_67 
       (.I0(data3[4]),
        .I1(data2[4]),
        .I2(data3[3]),
        .I3(data2[3]),
        .O(\maximds[4][7]_i_67_n_0 ));
  LUT6 #(
    .INIT(64'hB0FBB0FBFFFFB0FB)) 
    \maximds[4][7]_i_68 
       (.I0(data2[0]),
        .I1(\dImd_reg_n_0_[0] ),
        .I2(data2[1]),
        .I3(\dImd_reg_n_0_[1] ),
        .I4(data2[2]),
        .I5(\dImd_reg_n_0_[2] ),
        .O(\maximds[4][7]_i_68_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \maximds[4][7]_i_69 
       (.I0(\dImd_reg_n_0_[4] ),
        .I1(data2[4]),
        .I2(\dImd_reg_n_0_[3] ),
        .I3(data2[3]),
        .O(\maximds[4][7]_i_69_n_0 ));
  LUT5 #(
    .INIT(32'h4F04FF0F)) 
    \maximds[4][7]_i_7 
       (.I0(data0[6]),
        .I1(data1[6]),
        .I2(data0[7]),
        .I3(data1[7]),
        .I4(\maximds[4][7]_i_17_n_0 ),
        .O(\maximds[4][7]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'hB0FB00F0)) 
    \maximds[4][7]_i_8 
       (.I0(data1[6]),
        .I1(data2[6]),
        .I2(data1[7]),
        .I3(data2[7]),
        .I4(\maximds[4][7]_i_18_n_0 ),
        .O(\maximds[4][7]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h4F04FF0F)) 
    \maximds[4][7]_i_9 
       (.I0(data1[6]),
        .I1(\dImd_reg_n_0_[6] ),
        .I2(data1[7]),
        .I3(\dImd_reg_n_0_[7] ),
        .I4(\maximds[4][7]_i_19_n_0 ),
        .O(\maximds[4][7]_i_9_n_0 ));
  FDCE \maximds_reg[0][0] 
       (.C(aclk_sig),
        .CE(\maximds[0][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [0]),
        .Q(\maximds_reg_n_0_[0][0] ));
  FDCE \maximds_reg[0][1] 
       (.C(aclk_sig),
        .CE(\maximds[0][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [1]),
        .Q(\maximds_reg_n_0_[0][1] ));
  FDCE \maximds_reg[0][2] 
       (.C(aclk_sig),
        .CE(\maximds[0][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [2]),
        .Q(\maximds_reg_n_0_[0][2] ));
  FDCE \maximds_reg[0][3] 
       (.C(aclk_sig),
        .CE(\maximds[0][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [3]),
        .Q(\maximds_reg_n_0_[0][3] ));
  FDCE \maximds_reg[0][4] 
       (.C(aclk_sig),
        .CE(\maximds[0][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [4]),
        .Q(\maximds_reg_n_0_[0][4] ));
  FDCE \maximds_reg[0][5] 
       (.C(aclk_sig),
        .CE(\maximds[0][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [5]),
        .Q(\maximds_reg_n_0_[0][5] ));
  FDCE \maximds_reg[0][6] 
       (.C(aclk_sig),
        .CE(\maximds[0][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [6]),
        .Q(\maximds_reg_n_0_[0][6] ));
  FDCE \maximds_reg[0][7] 
       (.C(aclk_sig),
        .CE(\maximds[0][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [7]),
        .Q(\maximds_reg_n_0_[0][7] ));
  FDCE \maximds_reg[1][0] 
       (.C(aclk_sig),
        .CE(\maximds[1][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [0]),
        .Q(\maximds_reg_n_0_[1][0] ));
  FDCE \maximds_reg[1][1] 
       (.C(aclk_sig),
        .CE(\maximds[1][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [1]),
        .Q(\maximds_reg_n_0_[1][1] ));
  FDCE \maximds_reg[1][2] 
       (.C(aclk_sig),
        .CE(\maximds[1][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [2]),
        .Q(\maximds_reg_n_0_[1][2] ));
  FDCE \maximds_reg[1][3] 
       (.C(aclk_sig),
        .CE(\maximds[1][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [3]),
        .Q(\maximds_reg_n_0_[1][3] ));
  FDCE \maximds_reg[1][4] 
       (.C(aclk_sig),
        .CE(\maximds[1][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [4]),
        .Q(\maximds_reg_n_0_[1][4] ));
  FDCE \maximds_reg[1][5] 
       (.C(aclk_sig),
        .CE(\maximds[1][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [5]),
        .Q(\maximds_reg_n_0_[1][5] ));
  FDCE \maximds_reg[1][6] 
       (.C(aclk_sig),
        .CE(\maximds[1][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [6]),
        .Q(\maximds_reg_n_0_[1][6] ));
  FDCE \maximds_reg[1][7] 
       (.C(aclk_sig),
        .CE(\maximds[1][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [7]),
        .Q(\maximds_reg_n_0_[1][7] ));
  FDCE \maximds_reg[2][0] 
       (.C(aclk_sig),
        .CE(\maximds[2][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [0]),
        .Q(\maximds_reg_n_0_[2][0] ));
  FDCE \maximds_reg[2][1] 
       (.C(aclk_sig),
        .CE(\maximds[2][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [1]),
        .Q(\maximds_reg_n_0_[2][1] ));
  FDCE \maximds_reg[2][2] 
       (.C(aclk_sig),
        .CE(\maximds[2][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [2]),
        .Q(\maximds_reg_n_0_[2][2] ));
  FDCE \maximds_reg[2][3] 
       (.C(aclk_sig),
        .CE(\maximds[2][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [3]),
        .Q(\maximds_reg_n_0_[2][3] ));
  FDCE \maximds_reg[2][4] 
       (.C(aclk_sig),
        .CE(\maximds[2][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [4]),
        .Q(\maximds_reg_n_0_[2][4] ));
  FDCE \maximds_reg[2][5] 
       (.C(aclk_sig),
        .CE(\maximds[2][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [5]),
        .Q(\maximds_reg_n_0_[2][5] ));
  FDCE \maximds_reg[2][6] 
       (.C(aclk_sig),
        .CE(\maximds[2][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [6]),
        .Q(\maximds_reg_n_0_[2][6] ));
  FDCE \maximds_reg[2][7] 
       (.C(aclk_sig),
        .CE(\maximds[2][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [7]),
        .Q(\maximds_reg_n_0_[2][7] ));
  FDCE \maximds_reg[3][0] 
       (.C(aclk_sig),
        .CE(\maximds[3][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [0]),
        .Q(\maximds_reg_n_0_[3][0] ));
  FDCE \maximds_reg[3][1] 
       (.C(aclk_sig),
        .CE(\maximds[3][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [1]),
        .Q(\maximds_reg_n_0_[3][1] ));
  FDCE \maximds_reg[3][2] 
       (.C(aclk_sig),
        .CE(\maximds[3][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [2]),
        .Q(\maximds_reg_n_0_[3][2] ));
  FDCE \maximds_reg[3][3] 
       (.C(aclk_sig),
        .CE(\maximds[3][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [3]),
        .Q(\maximds_reg_n_0_[3][3] ));
  FDCE \maximds_reg[3][4] 
       (.C(aclk_sig),
        .CE(\maximds[3][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [4]),
        .Q(\maximds_reg_n_0_[3][4] ));
  FDCE \maximds_reg[3][5] 
       (.C(aclk_sig),
        .CE(\maximds[3][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [5]),
        .Q(\maximds_reg_n_0_[3][5] ));
  FDCE \maximds_reg[3][6] 
       (.C(aclk_sig),
        .CE(\maximds[3][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [6]),
        .Q(\maximds_reg_n_0_[3][6] ));
  FDCE \maximds_reg[3][7] 
       (.C(aclk_sig),
        .CE(\maximds[3][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [7]),
        .Q(\maximds_reg_n_0_[3][7] ));
  FDCE \maximds_reg[4][0] 
       (.C(aclk_sig),
        .CE(\maximds[4][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [0]),
        .Q(\maximds_reg_n_0_[4][0] ));
  FDCE \maximds_reg[4][1] 
       (.C(aclk_sig),
        .CE(\maximds[4][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [1]),
        .Q(\maximds_reg_n_0_[4][1] ));
  FDCE \maximds_reg[4][2] 
       (.C(aclk_sig),
        .CE(\maximds[4][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [2]),
        .Q(\maximds_reg_n_0_[4][2] ));
  FDCE \maximds_reg[4][3] 
       (.C(aclk_sig),
        .CE(\maximds[4][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [3]),
        .Q(\maximds_reg_n_0_[4][3] ));
  FDCE \maximds_reg[4][4] 
       (.C(aclk_sig),
        .CE(\maximds[4][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [4]),
        .Q(\maximds_reg_n_0_[4][4] ));
  FDCE \maximds_reg[4][5] 
       (.C(aclk_sig),
        .CE(\maximds[4][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [5]),
        .Q(\maximds_reg_n_0_[4][5] ));
  FDCE \maximds_reg[4][6] 
       (.C(aclk_sig),
        .CE(\maximds[4][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [6]),
        .Q(\maximds_reg_n_0_[4][6] ));
  FDCE \maximds_reg[4][7] 
       (.C(aclk_sig),
        .CE(\maximds[4][7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\maximds[0]_40 [7]),
        .Q(\maximds_reg_n_0_[4][7] ));
  LUT6 #(
    .INIT(64'h0000000020202000)) 
    \maximdsm1[1][7]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(ceMaxsel_reg_n_0),
        .I4(postNotLive_reg_n_0),
        .I5(linNotLog_reg_0),
        .O(\maximdsm1_reg[0]0 ));
  FDRE \maximdsm1_reg[0][0] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[0][0] ),
        .Q(\maximdsm1_reg[0]_36 [0]),
        .R(1'b0));
  FDRE \maximdsm1_reg[0][1] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[0][1] ),
        .Q(\maximdsm1_reg[0]_36 [1]),
        .R(1'b0));
  FDRE \maximdsm1_reg[0][2] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[0][2] ),
        .Q(\maximdsm1_reg[0]_36 [2]),
        .R(1'b0));
  FDRE \maximdsm1_reg[0][3] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[0][3] ),
        .Q(\maximdsm1_reg[0]_36 [3]),
        .R(1'b0));
  FDRE \maximdsm1_reg[0][4] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[0][4] ),
        .Q(\maximdsm1_reg[0]_36 [4]),
        .R(1'b0));
  FDRE \maximdsm1_reg[0][5] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[0][5] ),
        .Q(\maximdsm1_reg[0]_36 [5]),
        .R(1'b0));
  FDRE \maximdsm1_reg[0][6] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[0][6] ),
        .Q(\maximdsm1_reg[0]_36 [6]),
        .R(1'b0));
  FDRE \maximdsm1_reg[0][7] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[0][7] ),
        .Q(\maximdsm1_reg[0]_36 [7]),
        .R(1'b0));
  FDRE \maximdsm1_reg[1][0] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[1][0] ),
        .Q(\maximdsm1_reg[1]_35 [0]),
        .R(1'b0));
  FDRE \maximdsm1_reg[1][1] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[1][1] ),
        .Q(\maximdsm1_reg[1]_35 [1]),
        .R(1'b0));
  FDRE \maximdsm1_reg[1][2] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[1][2] ),
        .Q(\maximdsm1_reg[1]_35 [2]),
        .R(1'b0));
  FDRE \maximdsm1_reg[1][3] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[1][3] ),
        .Q(\maximdsm1_reg[1]_35 [3]),
        .R(1'b0));
  FDRE \maximdsm1_reg[1][4] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[1][4] ),
        .Q(\maximdsm1_reg[1]_35 [4]),
        .R(1'b0));
  FDRE \maximdsm1_reg[1][5] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[1][5] ),
        .Q(\maximdsm1_reg[1]_35 [5]),
        .R(1'b0));
  FDRE \maximdsm1_reg[1][6] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[1][6] ),
        .Q(\maximdsm1_reg[1]_35 [6]),
        .R(1'b0));
  FDRE \maximdsm1_reg[1][7] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[1][7] ),
        .Q(\maximdsm1_reg[1]_35 [7]),
        .R(1'b0));
  FDRE \maximdsm1_reg[2][0] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[2][0] ),
        .Q(\maximdsm1_reg[2]_39 [0]),
        .R(1'b0));
  FDRE \maximdsm1_reg[2][1] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[2][1] ),
        .Q(\maximdsm1_reg[2]_39 [1]),
        .R(1'b0));
  FDRE \maximdsm1_reg[2][2] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[2][2] ),
        .Q(\maximdsm1_reg[2]_39 [2]),
        .R(1'b0));
  FDRE \maximdsm1_reg[2][3] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[2][3] ),
        .Q(\maximdsm1_reg[2]_39 [3]),
        .R(1'b0));
  FDRE \maximdsm1_reg[2][4] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[2][4] ),
        .Q(\maximdsm1_reg[2]_39 [4]),
        .R(1'b0));
  FDRE \maximdsm1_reg[2][5] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[2][5] ),
        .Q(\maximdsm1_reg[2]_39 [5]),
        .R(1'b0));
  FDRE \maximdsm1_reg[2][6] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[2][6] ),
        .Q(\maximdsm1_reg[2]_39 [6]),
        .R(1'b0));
  FDRE \maximdsm1_reg[2][7] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[2][7] ),
        .Q(\maximdsm1_reg[2]_39 [7]),
        .R(1'b0));
  FDRE \maximdsm1_reg[3][0] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[3][0] ),
        .Q(\maximdsm1_reg[3]_38 [0]),
        .R(1'b0));
  FDRE \maximdsm1_reg[3][1] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[3][1] ),
        .Q(\maximdsm1_reg[3]_38 [1]),
        .R(1'b0));
  FDRE \maximdsm1_reg[3][2] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[3][2] ),
        .Q(\maximdsm1_reg[3]_38 [2]),
        .R(1'b0));
  FDRE \maximdsm1_reg[3][3] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[3][3] ),
        .Q(\maximdsm1_reg[3]_38 [3]),
        .R(1'b0));
  FDRE \maximdsm1_reg[3][4] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[3][4] ),
        .Q(\maximdsm1_reg[3]_38 [4]),
        .R(1'b0));
  FDRE \maximdsm1_reg[3][5] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[3][5] ),
        .Q(\maximdsm1_reg[3]_38 [5]),
        .R(1'b0));
  FDRE \maximdsm1_reg[3][6] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[3][6] ),
        .Q(\maximdsm1_reg[3]_38 [6]),
        .R(1'b0));
  FDRE \maximdsm1_reg[3][7] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[3][7] ),
        .Q(\maximdsm1_reg[3]_38 [7]),
        .R(1'b0));
  FDRE \maximdsm1_reg[4][0] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[4][0] ),
        .Q(\maximdsm1_reg[4]_37 [0]),
        .R(1'b0));
  FDRE \maximdsm1_reg[4][1] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[4][1] ),
        .Q(\maximdsm1_reg[4]_37 [1]),
        .R(1'b0));
  FDRE \maximdsm1_reg[4][2] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[4][2] ),
        .Q(\maximdsm1_reg[4]_37 [2]),
        .R(1'b0));
  FDRE \maximdsm1_reg[4][3] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[4][3] ),
        .Q(\maximdsm1_reg[4]_37 [3]),
        .R(1'b0));
  FDRE \maximdsm1_reg[4][4] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[4][4] ),
        .Q(\maximdsm1_reg[4]_37 [4]),
        .R(1'b0));
  FDRE \maximdsm1_reg[4][5] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[4][5] ),
        .Q(\maximdsm1_reg[4]_37 [5]),
        .R(1'b0));
  FDRE \maximdsm1_reg[4][6] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[4][6] ),
        .Q(\maximdsm1_reg[4]_37 [6]),
        .R(1'b0));
  FDRE \maximdsm1_reg[4][7] 
       (.C(aclk_sig),
        .CE(\maximdsm1_reg[0]0 ),
        .D(\maximds_reg_n_0_[4][7] ),
        .Q(\maximdsm1_reg[4]_37 [7]),
        .R(1'b0));
  LUT4 #(
    .INIT(16'hAAFB)) 
    \msb[0]_i_1 
       (.I0(\msb[0]_i_2_n_0 ),
        .I1(\msb[0]_i_3_n_0 ),
        .I2(\msb[0]_i_4_n_0 ),
        .I3(\msb[2]_i_7_n_0 ),
        .O(\msb[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair779" *) 
  LUT4 #(
    .INIT(16'h8A88)) 
    \msb[0]_i_10 
       (.I0(\msb[3]_i_12_n_0 ),
        .I1(\r_reg_n_0_[37] ),
        .I2(\r_reg_n_0_[36] ),
        .I3(\r_reg_n_0_[35] ),
        .O(\msb[0]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair816" *) 
  LUT5 #(
    .INIT(32'h45444545)) 
    \msb[0]_i_11 
       (.I0(\r_reg_n_0_[31] ),
        .I1(\r_reg_n_0_[30] ),
        .I2(\r_reg_n_0_[29] ),
        .I3(\r_reg_n_0_[28] ),
        .I4(\r_reg_n_0_[27] ),
        .O(\msb[0]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair779" *) 
  LUT5 #(
    .INIT(32'hFFFDFFFF)) 
    \msb[0]_i_12 
       (.I0(\msb[3]_i_12_n_0 ),
        .I1(\r_reg_n_0_[37] ),
        .I2(\r_reg_n_0_[36] ),
        .I3(\r_reg_n_0_[35] ),
        .I4(\msb[3]_i_11_n_0 ),
        .O(\msb[0]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair860" *) 
  LUT4 #(
    .INIT(16'h55F7)) 
    \msb[0]_i_13 
       (.I0(\msb[4]_i_5_n_0 ),
        .I1(msb[0]),
        .I2(\r_reg_n_0_[0] ),
        .I3(\r_reg_n_0_[1] ),
        .O(\msb[0]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFBABABABB)) 
    \msb[0]_i_2 
       (.I0(\r_reg_n_0_[47] ),
        .I1(\r_reg_n_0_[46] ),
        .I2(\r_reg_n_0_[45] ),
        .I3(\r_reg_n_0_[44] ),
        .I4(\msb[0]_i_5_n_0 ),
        .I5(\msb[0]_i_6_n_0 ),
        .O(\msb[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFF4F4F0FF)) 
    \msb[0]_i_3 
       (.I0(\r_reg_n_0_[15] ),
        .I1(\msb[0]_i_7_n_0 ),
        .I2(\msb[2]_i_5_n_0 ),
        .I3(\msb[0]_i_8_n_0 ),
        .I4(\msb[4]_i_3_n_0 ),
        .I5(\r_reg_n_0_[16] ),
        .O(\msb[0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair813" *) 
  LUT5 #(
    .INIT(32'hFFFF0F04)) 
    \msb[0]_i_4 
       (.I0(\r_reg_n_0_[22] ),
        .I1(\msb[0]_i_9_n_0 ),
        .I2(\r_reg_n_0_[24] ),
        .I3(\r_reg_n_0_[23] ),
        .I4(\r_reg_n_0_[25] ),
        .O(\msb[0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h000000000F000F0B)) 
    \msb[0]_i_5 
       (.I0(\r_reg_n_0_[40] ),
        .I1(\r_reg_n_0_[39] ),
        .I2(\r_reg_n_0_[43] ),
        .I3(\r_reg_n_0_[42] ),
        .I4(\r_reg_n_0_[41] ),
        .I5(\msb[0]_i_10_n_0 ),
        .O(\msb[0]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair815" *) 
  LUT5 #(
    .INIT(32'h00005501)) 
    \msb[0]_i_6 
       (.I0(\r_reg_n_0_[34] ),
        .I1(\r_reg_n_0_[32] ),
        .I2(\msb[0]_i_11_n_0 ),
        .I3(\r_reg_n_0_[33] ),
        .I4(\msb[0]_i_12_n_0 ),
        .O(\msb[0]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hBABABABABBBABBBB)) 
    \msb[0]_i_7 
       (.I0(\r_reg_n_0_[14] ),
        .I1(\r_reg_n_0_[13] ),
        .I2(\r_reg_n_0_[12] ),
        .I3(\r_reg_n_0_[10] ),
        .I4(\r_reg_n_0_[9] ),
        .I5(\r_reg_n_0_[11] ),
        .O(\msb[0]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFF0FFFFFFF0FFF4F)) 
    \msb[0]_i_8 
       (.I0(\r_reg_n_0_[4] ),
        .I1(\r_reg_n_0_[3] ),
        .I2(\msb[0]_i_13_n_0 ),
        .I3(\r_reg_n_0_[7] ),
        .I4(\r_reg_n_0_[6] ),
        .I5(\r_reg_n_0_[5] ),
        .O(\msb[0]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair820" *) 
  LUT5 #(
    .INIT(32'hAAAAEFEE)) 
    \msb[0]_i_9 
       (.I0(\r_reg_n_0_[21] ),
        .I1(\r_reg_n_0_[19] ),
        .I2(\r_reg_n_0_[18] ),
        .I3(\r_reg_n_0_[17] ),
        .I4(\r_reg_n_0_[20] ),
        .O(\msb[0]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hBFB0BFB0BFBFBFB0)) 
    \msb[1]_i_1 
       (.I0(\msb[1]_i_2_n_0 ),
        .I1(\msb[1]_i_3_n_0 ),
        .I2(\msb[2]_i_7_n_0 ),
        .I3(\msb[1]_i_4_n_0 ),
        .I4(\msb[1]_i_5_n_0 ),
        .I5(\msb[1]_i_6_n_0 ),
        .O(\msb[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair819" *) 
  LUT5 #(
    .INIT(32'h000000FB)) 
    \msb[1]_i_10 
       (.I0(\r_reg_n_0_[36] ),
        .I1(\r_reg_n_0_[35] ),
        .I2(\r_reg_n_0_[37] ),
        .I3(\r_reg_n_0_[39] ),
        .I4(\r_reg_n_0_[38] ),
        .O(\msb[1]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'h000000FD)) 
    \msb[1]_i_11 
       (.I0(msb[1]),
        .I1(\r_reg_n_0_[0] ),
        .I2(\r_reg_n_0_[1] ),
        .I3(\r_reg_n_0_[3] ),
        .I4(\r_reg_n_0_[2] ),
        .O(\msb[1]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair861" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \msb[1]_i_12 
       (.I0(\r_reg_n_0_[6] ),
        .I1(\r_reg_n_0_[7] ),
        .O(\msb[1]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h000000000000FFF1)) 
    \msb[1]_i_13 
       (.I0(\r_reg_n_0_[8] ),
        .I1(\r_reg_n_0_[9] ),
        .I2(\r_reg_n_0_[10] ),
        .I3(\r_reg_n_0_[11] ),
        .I4(\r_reg_n_0_[13] ),
        .I5(\r_reg_n_0_[12] ),
        .O(\msb[1]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hF200000000000000)) 
    \msb[1]_i_2 
       (.I0(\msb[3]_i_13_n_0 ),
        .I1(\msb[1]_i_7_n_0 ),
        .I2(\r_reg_n_0_[34] ),
        .I3(\msb[3]_i_11_n_0 ),
        .I4(\msb[1]_i_8_n_0 ),
        .I5(\msb[3]_i_12_n_0 ),
        .O(\msb[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h1000101011111111)) 
    \msb[1]_i_3 
       (.I0(\r_reg_n_0_[47] ),
        .I1(\r_reg_n_0_[46] ),
        .I2(\msb[1]_i_9_n_0 ),
        .I3(\msb[1]_i_10_n_0 ),
        .I4(\msb[2]_i_8_n_0 ),
        .I5(\msb[3]_i_11_n_0 ),
        .O(\msb[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFFFFF54)) 
    \msb[1]_i_4 
       (.I0(\msb[2]_i_12_n_0 ),
        .I1(\r_reg_n_0_[19] ),
        .I2(\r_reg_n_0_[18] ),
        .I3(\r_reg_n_0_[22] ),
        .I4(\r_reg_n_0_[23] ),
        .I5(\msb[3]_i_2_n_0 ),
        .O(\msb[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFF4FF)) 
    \msb[1]_i_5 
       (.I0(\msb[1]_i_11_n_0 ),
        .I1(\msb[2]_i_13_n_0 ),
        .I2(\r_reg_n_0_[16] ),
        .I3(\msb[3]_i_9_n_0 ),
        .I4(\msb[3]_i_10_n_0 ),
        .I5(\msb[1]_i_12_n_0 ),
        .O(\msb[1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFEFEFEFEFEFEFEFF)) 
    \msb[1]_i_6 
       (.I0(\msb[2]_i_11_n_0 ),
        .I1(\msb[3]_i_8_n_0 ),
        .I2(\r_reg_n_0_[16] ),
        .I3(\msb[1]_i_13_n_0 ),
        .I4(\r_reg_n_0_[14] ),
        .I5(\r_reg_n_0_[15] ),
        .O(\msb[1]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h1110111011101111)) 
    \msb[1]_i_7 
       (.I0(\r_reg_n_0_[31] ),
        .I1(\r_reg_n_0_[30] ),
        .I2(\r_reg_n_0_[28] ),
        .I3(\r_reg_n_0_[29] ),
        .I4(\r_reg_n_0_[26] ),
        .I5(\r_reg_n_0_[27] ),
        .O(\msb[1]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair819" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \msb[1]_i_8 
       (.I0(\r_reg_n_0_[37] ),
        .I1(\r_reg_n_0_[36] ),
        .I2(\r_reg_n_0_[35] ),
        .O(\msb[1]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \msb[1]_i_9 
       (.I0(\r_reg_n_0_[42] ),
        .I1(\r_reg_n_0_[43] ),
        .O(\msb[1]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hEEEEEEEEEFEEEFFF)) 
    \msb[2]_i_1 
       (.I0(\msb[2]_i_2_n_0 ),
        .I1(\msb[2]_i_3_n_0 ),
        .I2(\msb[2]_i_4_n_0 ),
        .I3(\msb[2]_i_5_n_0 ),
        .I4(\msb[2]_i_6_n_0 ),
        .I5(\msb[2]_i_7_n_0 ),
        .O(\msb[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair816" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \msb[2]_i_10 
       (.I0(\r_reg_n_0_[31] ),
        .I1(\r_reg_n_0_[30] ),
        .I2(\r_reg_n_0_[29] ),
        .I3(\r_reg_n_0_[28] ),
        .O(\msb[2]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair812" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \msb[2]_i_11 
       (.I0(\r_reg_n_0_[23] ),
        .I1(\r_reg_n_0_[25] ),
        .I2(\r_reg_n_0_[24] ),
        .O(\msb[2]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair820" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \msb[2]_i_12 
       (.I0(\r_reg_n_0_[20] ),
        .I1(\r_reg_n_0_[21] ),
        .O(\msb[2]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair861" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \msb[2]_i_13 
       (.I0(\r_reg_n_0_[6] ),
        .I1(\r_reg_n_0_[7] ),
        .I2(\r_reg_n_0_[5] ),
        .I3(\r_reg_n_0_[4] ),
        .O(\msb[2]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000100)) 
    \msb[2]_i_14 
       (.I0(\r_reg_n_0_[2] ),
        .I1(\r_reg_n_0_[3] ),
        .I2(\r_reg_n_0_[4] ),
        .I3(msb[2]),
        .I4(\r_reg_n_0_[0] ),
        .I5(\r_reg_n_0_[1] ),
        .O(\msb[2]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'hFFFE0000FFFFFFFF)) 
    \msb[2]_i_2 
       (.I0(\r_reg_n_0_[37] ),
        .I1(\r_reg_n_0_[36] ),
        .I2(\r_reg_n_0_[39] ),
        .I3(\r_reg_n_0_[38] ),
        .I4(\msb[2]_i_8_n_0 ),
        .I5(\msb[3]_i_11_n_0 ),
        .O(\msb[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000800000)) 
    \msb[2]_i_3 
       (.I0(\msb[3]_i_13_n_0 ),
        .I1(\msb[3]_i_12_n_0 ),
        .I2(\msb[2]_i_9_n_0 ),
        .I3(\r_reg_n_0_[35] ),
        .I4(\msb[3]_i_11_n_0 ),
        .I5(\msb[2]_i_10_n_0 ),
        .O(\msb[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hEEEEEEEEEEEEEEEF)) 
    \msb[2]_i_4 
       (.I0(\r_reg_n_0_[25] ),
        .I1(\r_reg_n_0_[24] ),
        .I2(\r_reg_n_0_[22] ),
        .I3(\r_reg_n_0_[23] ),
        .I4(\r_reg_n_0_[20] ),
        .I5(\r_reg_n_0_[21] ),
        .O(\msb[2]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \msb[2]_i_5 
       (.I0(\msb[2]_i_11_n_0 ),
        .I1(\r_reg_n_0_[19] ),
        .I2(\r_reg_n_0_[18] ),
        .I3(\r_reg_n_0_[22] ),
        .I4(\r_reg_n_0_[17] ),
        .I5(\msb[2]_i_12_n_0 ),
        .O(\msb[2]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFF200)) 
    \msb[2]_i_6 
       (.I0(\msb[2]_i_13_n_0 ),
        .I1(\msb[2]_i_14_n_0 ),
        .I2(\msb[3]_i_10_n_0 ),
        .I3(\msb[3]_i_9_n_0 ),
        .I4(\r_reg_n_0_[16] ),
        .O(\msb[2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFF7FFFFF)) 
    \msb[2]_i_7 
       (.I0(\msb[3]_i_13_n_0 ),
        .I1(\msb[3]_i_12_n_0 ),
        .I2(\msb[2]_i_9_n_0 ),
        .I3(\r_reg_n_0_[35] ),
        .I4(\msb[3]_i_11_n_0 ),
        .I5(\msb[3]_i_5_n_0 ),
        .O(\msb[2]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair818" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \msb[2]_i_8 
       (.I0(\r_reg_n_0_[40] ),
        .I1(\r_reg_n_0_[42] ),
        .I2(\r_reg_n_0_[43] ),
        .I3(\r_reg_n_0_[41] ),
        .O(\msb[2]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \msb[2]_i_9 
       (.I0(\r_reg_n_0_[36] ),
        .I1(\r_reg_n_0_[37] ),
        .O(\msb[2]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF0000FFBAFFBA)) 
    \msb[3]_i_1 
       (.I0(\msb[3]_i_2_n_0 ),
        .I1(\msb[3]_i_3_n_0 ),
        .I2(\msb[3]_i_4_n_0 ),
        .I3(\msb[3]_i_5_n_0 ),
        .I4(\msb[3]_i_6_n_0 ),
        .I5(\msb[3]_i_7_n_0 ),
        .O(\msb[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair814" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \msb[3]_i_10 
       (.I0(\r_reg_n_0_[9] ),
        .I1(\r_reg_n_0_[8] ),
        .I2(\r_reg_n_0_[11] ),
        .I3(\r_reg_n_0_[10] ),
        .O(\msb[3]_i_10_n_0 ));
  LUT4 #(
    .INIT(16'h0001)) 
    \msb[3]_i_11 
       (.I0(\r_reg_n_0_[47] ),
        .I1(\r_reg_n_0_[46] ),
        .I2(\r_reg_n_0_[45] ),
        .I3(\r_reg_n_0_[44] ),
        .O(\msb[3]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \msb[3]_i_12 
       (.I0(\r_reg_n_0_[38] ),
        .I1(\r_reg_n_0_[39] ),
        .I2(\r_reg_n_0_[40] ),
        .I3(\r_reg_n_0_[42] ),
        .I4(\r_reg_n_0_[43] ),
        .I5(\r_reg_n_0_[41] ),
        .O(\msb[3]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair815" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \msb[3]_i_13 
       (.I0(\r_reg_n_0_[33] ),
        .I1(\r_reg_n_0_[34] ),
        .I2(\r_reg_n_0_[32] ),
        .O(\msb[3]_i_13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair813" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \msb[3]_i_2 
       (.I0(\r_reg_n_0_[24] ),
        .I1(\r_reg_n_0_[25] ),
        .O(\msb[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair812" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \msb[3]_i_3 
       (.I0(\r_reg_n_0_[16] ),
        .I1(\msb[3]_i_8_n_0 ),
        .I2(\r_reg_n_0_[23] ),
        .I3(\r_reg_n_0_[25] ),
        .I4(\r_reg_n_0_[24] ),
        .O(\msb[3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hDDDFDDDDDDDDDDDD)) 
    \msb[3]_i_4 
       (.I0(\msb[3]_i_9_n_0 ),
        .I1(\msb[3]_i_10_n_0 ),
        .I2(\r_reg_n_0_[1] ),
        .I3(\r_reg_n_0_[0] ),
        .I4(msb[3]),
        .I5(\msb[4]_i_5_n_0 ),
        .O(\msb[3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \msb[3]_i_5 
       (.I0(\r_reg_n_0_[27] ),
        .I1(\r_reg_n_0_[26] ),
        .I2(\r_reg_n_0_[28] ),
        .I3(\r_reg_n_0_[29] ),
        .I4(\r_reg_n_0_[30] ),
        .I5(\r_reg_n_0_[31] ),
        .O(\msb[3]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair818" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFD)) 
    \msb[3]_i_6 
       (.I0(\msb[3]_i_11_n_0 ),
        .I1(\r_reg_n_0_[41] ),
        .I2(\r_reg_n_0_[43] ),
        .I3(\r_reg_n_0_[42] ),
        .I4(\r_reg_n_0_[40] ),
        .O(\msb[3]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFDFFFFFFFFFFFF)) 
    \msb[3]_i_7 
       (.I0(\msb[3]_i_11_n_0 ),
        .I1(\r_reg_n_0_[35] ),
        .I2(\r_reg_n_0_[36] ),
        .I3(\r_reg_n_0_[37] ),
        .I4(\msb[3]_i_12_n_0 ),
        .I5(\msb[3]_i_13_n_0 ),
        .O(\msb[3]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \msb[3]_i_8 
       (.I0(\r_reg_n_0_[21] ),
        .I1(\r_reg_n_0_[20] ),
        .I2(\r_reg_n_0_[17] ),
        .I3(\r_reg_n_0_[22] ),
        .I4(\r_reg_n_0_[18] ),
        .I5(\r_reg_n_0_[19] ),
        .O(\msb[3]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h0001)) 
    \msb[3]_i_9 
       (.I0(\r_reg_n_0_[15] ),
        .I1(\r_reg_n_0_[14] ),
        .I2(\r_reg_n_0_[13] ),
        .I3(\r_reg_n_0_[12] ),
        .O(\msb[3]_i_9_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \msb[4]_i_1 
       (.I0(\msb[4]_i_2_n_0 ),
        .O(\msb[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAABBBABBBB)) 
    \msb[4]_i_2 
       (.I0(\msb[3]_i_7_n_0 ),
        .I1(\msb[3]_i_5_n_0 ),
        .I2(\msb[4]_i_3_n_0 ),
        .I3(\msb[4]_i_4_n_0 ),
        .I4(\msb[4]_i_5_n_0 ),
        .I5(\msb[3]_i_3_n_0 ),
        .O(\msb[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair814" *) 
  LUT5 #(
    .INIT(32'hFFFEFFFF)) 
    \msb[4]_i_3 
       (.I0(\r_reg_n_0_[10] ),
        .I1(\r_reg_n_0_[11] ),
        .I2(\r_reg_n_0_[8] ),
        .I3(\r_reg_n_0_[9] ),
        .I4(\msb[3]_i_9_n_0 ),
        .O(\msb[4]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair860" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \msb[4]_i_4 
       (.I0(\r_reg_n_0_[1] ),
        .I1(\r_reg_n_0_[0] ),
        .I2(msb[4]),
        .O(\msb[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \msb[4]_i_5 
       (.I0(\r_reg_n_0_[6] ),
        .I1(\r_reg_n_0_[7] ),
        .I2(\r_reg_n_0_[5] ),
        .I3(\r_reg_n_0_[2] ),
        .I4(\r_reg_n_0_[3] ),
        .I5(\r_reg_n_0_[4] ),
        .O(\msb[4]_i_5_n_0 ));
  LUT3 #(
    .INIT(8'h08)) 
    \msb[5]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(ceScore),
        .I2(linNotLog_reg_0),
        .O(msb0));
  LUT1 #(
    .INIT(2'h1)) 
    \msb[5]_i_2 
       (.I0(\msb[5]_i_3_n_0 ),
        .O(\msb[5]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h5455)) 
    \msb[5]_i_3 
       (.I0(\msb[3]_i_7_n_0 ),
        .I1(\msb[5]_i_4_n_0 ),
        .I2(\msb[2]_i_5_n_0 ),
        .I3(\msb[5]_i_5_n_0 ),
        .O(\msb[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFB)) 
    \msb[5]_i_4 
       (.I0(\r_reg_n_0_[16] ),
        .I1(\msb[3]_i_9_n_0 ),
        .I2(\r_reg_n_0_[9] ),
        .I3(\r_reg_n_0_[8] ),
        .I4(\r_reg_n_0_[11] ),
        .I5(\r_reg_n_0_[10] ),
        .O(\msb[5]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair817" *) 
  LUT5 #(
    .INIT(32'h00001000)) 
    \msb[5]_i_5 
       (.I0(\r_reg_n_0_[1] ),
        .I1(\r_reg_n_0_[0] ),
        .I2(msb[5]),
        .I3(\msb[4]_i_5_n_0 ),
        .I4(\msb[3]_i_5_n_0 ),
        .O(\msb[5]_i_5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \msb_reg[0] 
       (.C(aclk_sig),
        .CE(msb0),
        .D(\msb[0]_i_1_n_0 ),
        .Q(msb[0]),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \msb_reg[1] 
       (.C(aclk_sig),
        .CE(msb0),
        .D(\msb[1]_i_1_n_0 ),
        .Q(msb[1]),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \msb_reg[2] 
       (.C(aclk_sig),
        .CE(msb0),
        .D(\msb[2]_i_1_n_0 ),
        .Q(msb[2]),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \msb_reg[3] 
       (.C(aclk_sig),
        .CE(msb0),
        .D(\msb[3]_i_1_n_0 ),
        .Q(msb[3]),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \msb_reg[4] 
       (.C(aclk_sig),
        .CE(msb0),
        .D(\msb[4]_i_1_n_0 ),
        .Q(msb[4]),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \msb_reg[5] 
       (.C(aclk_sig),
        .CE(msb0),
        .D(\msb[5]_i_2_n_0 ),
        .Q(msb[5]),
        .R(1'b0));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a32b64 myCoobuf
       (.\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ({\dwrCoobuf_reg_n_0_[31] ,\dwrCoobuf_reg_n_0_[26] ,\dwrCoobuf_reg_n_0_[25] ,\dwrCoobuf_reg_n_0_[24] ,\dwrCoobuf_reg_n_0_[23] ,\dwrCoobuf_reg_n_0_[22] ,\dwrCoobuf_reg_n_0_[21] ,\dwrCoobuf_reg_n_0_[20] ,\dwrCoobuf_reg_n_0_[19] ,\dwrCoobuf_reg_n_0_[18] ,\dwrCoobuf_reg_n_0_[17] ,\dwrCoobuf_reg_n_0_[16] ,\dwrCoobuf_reg_n_0_[10] ,\dwrCoobuf_reg_n_0_[9] ,\dwrCoobuf_reg_n_0_[8] ,\dwrCoobuf_reg_n_0_[7] ,\dwrCoobuf_reg_n_0_[6] ,\dwrCoobuf_reg_n_0_[5] ,\dwrCoobuf_reg_n_0_[4] ,\dwrCoobuf_reg_n_0_[3] ,\dwrCoobuf_reg_n_0_[2] ,\dwrCoobuf_reg_n_0_[1] ,\dwrCoobuf_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 (enCoobufB),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ({\aCoobufB_reg_n_0_[7] ,\aCoobufB_reg_n_0_[6] ,\aCoobufB_reg_n_0_[5] ,\aCoobufB_reg_n_0_[4] ,\aCoobufB_reg_n_0_[3] ,\aCoobufB_reg_n_0_[2] ,\aCoobufB_reg_n_0_[1] ,\aCoobufB_reg_n_0_[0] }),
        .Q(aCoobuf_reg),
        .aclk_sig(aclk_sig),
        .doutb(doutb),
        .ena(enCoobuf_reg_n_0));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a8b8__xdcDup__1 myImd0buf
       (.D({myImd0buf_n_8,myImd0buf_n_9,myImd0buf_n_10,myImd0buf_n_11,myImd0buf_n_12,myImd0buf_n_13,myImd0buf_n_14,myImd0buf_n_15}),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ({\rexp_reg_n_0_[7] ,\rexp_reg_n_0_[6] ,\rexp_reg_n_0_[5] ,\rexp_reg_n_0_[4] ,\rexp_reg_n_0_[3] ,\rexp_reg_n_0_[2] ,\rexp_reg_n_0_[1] ,\rexp_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 (enImdbuf_reg_n_0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ({\aImdbufB_reg_n_0_[10] ,\aImdbufB_reg_n_0_[9] ,\aImdbufB_reg_n_0_[8] ,\aImdbufB_reg_n_0_[7] ,\aImdbufB_reg_n_0_[6] ,\aImdbufB_reg_n_0_[5] ,\aImdbufB_reg_n_0_[4] ,\aImdbufB_reg_n_0_[3] ,\aImdbufB_reg_n_0_[2] ,\aImdbufB_reg_n_0_[1] ,\aImdbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 (myImd1buf_n_16),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 (myImd1buf_n_17),
        .Q({\aImdbuf_reg_n_0_[10] ,\aImdbuf_reg_n_0_[9] ,\aImdbuf_reg_n_0_[8] ,\aImdbuf_reg_n_0_[7] ,\aImdbuf_reg_n_0_[6] ,\aImdbuf_reg_n_0_[5] ,\aImdbuf_reg_n_0_[4] ,\aImdbuf_reg_n_0_[3] ,\aImdbuf_reg_n_0_[2] ,\aImdbuf_reg_n_0_[1] ,\aImdbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .\dImd_reg[39] (fghij[2:0]),
        .\dImd_reg[39]_0 (drdImd1bufB),
        .\dImd_reg[39]_1 (\stateImdstream[0]_i_3_n_0 ),
        .\dImd_reg[39]_2 (drdImd4bufB),
        .\dImd_reg[39]_3 (drdImd3bufB),
        .\dImd_reg[39]_4 (drdImd2bufB),
        .doutb(drdImd0bufB));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a8b8__xdcDup__2 myImd1buf
       (.D({myImd1buf_n_8,myImd1buf_n_9,myImd1buf_n_10,myImd1buf_n_11,myImd1buf_n_12,myImd1buf_n_13,myImd1buf_n_14,myImd1buf_n_15}),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ({\rexp_reg_n_0_[7] ,\rexp_reg_n_0_[6] ,\rexp_reg_n_0_[5] ,\rexp_reg_n_0_[4] ,\rexp_reg_n_0_[3] ,\rexp_reg_n_0_[2] ,\rexp_reg_n_0_[1] ,\rexp_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 (enImdbuf_reg_n_0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ({\aImdbufB_reg_n_0_[10] ,\aImdbufB_reg_n_0_[9] ,\aImdbufB_reg_n_0_[8] ,\aImdbufB_reg_n_0_[7] ,\aImdbufB_reg_n_0_[6] ,\aImdbufB_reg_n_0_[5] ,\aImdbufB_reg_n_0_[4] ,\aImdbufB_reg_n_0_[3] ,\aImdbufB_reg_n_0_[2] ,\aImdbufB_reg_n_0_[1] ,\aImdbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 (fghij),
        .Q({\aImdbuf_reg_n_0_[10] ,\aImdbuf_reg_n_0_[9] ,\aImdbuf_reg_n_0_[8] ,\aImdbuf_reg_n_0_[7] ,\aImdbuf_reg_n_0_[6] ,\aImdbuf_reg_n_0_[5] ,\aImdbuf_reg_n_0_[4] ,\aImdbuf_reg_n_0_[3] ,\aImdbuf_reg_n_0_[2] ,\aImdbuf_reg_n_0_[1] ,\aImdbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .\dImd_reg[31] (drdImd2bufB),
        .\dImd_reg[31]_0 (\stateImdstream[0]_i_3_n_0 ),
        .\dImd_reg[31]_1 (drdImd0bufB),
        .\dImd_reg[31]_2 (drdImd4bufB),
        .\dImd_reg[31]_3 (drdImd3bufB),
        .doutb(drdImd1bufB),
        .\fghij_reg[11] (myImd1buf_n_16),
        .\fghij_reg[11]_0 (myImd1buf_n_18),
        .\fghij_reg[13] (myImd1buf_n_19),
        .\fghij_reg[30] (myImd1buf_n_17));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a8b8__xdcDup__3 myImd2buf
       (.D({myImd2buf_n_8,myImd2buf_n_9,myImd2buf_n_10,myImd2buf_n_11,myImd2buf_n_12,myImd2buf_n_13,myImd2buf_n_14,myImd2buf_n_15}),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ({\rexp_reg_n_0_[7] ,\rexp_reg_n_0_[6] ,\rexp_reg_n_0_[5] ,\rexp_reg_n_0_[4] ,\rexp_reg_n_0_[3] ,\rexp_reg_n_0_[2] ,\rexp_reg_n_0_[1] ,\rexp_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 (enImdbuf_reg_n_0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ({\aImdbufB_reg_n_0_[10] ,\aImdbufB_reg_n_0_[9] ,\aImdbufB_reg_n_0_[8] ,\aImdbufB_reg_n_0_[7] ,\aImdbufB_reg_n_0_[6] ,\aImdbufB_reg_n_0_[5] ,\aImdbufB_reg_n_0_[4] ,\aImdbufB_reg_n_0_[3] ,\aImdbufB_reg_n_0_[2] ,\aImdbufB_reg_n_0_[1] ,\aImdbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 (myImd1buf_n_16),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 (myImd1buf_n_17),
        .Q({\aImdbuf_reg_n_0_[10] ,\aImdbuf_reg_n_0_[9] ,\aImdbuf_reg_n_0_[8] ,\aImdbuf_reg_n_0_[7] ,\aImdbuf_reg_n_0_[6] ,\aImdbuf_reg_n_0_[5] ,\aImdbuf_reg_n_0_[4] ,\aImdbuf_reg_n_0_[3] ,\aImdbuf_reg_n_0_[2] ,\aImdbuf_reg_n_0_[1] ,\aImdbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .\dImd_reg[23] (fghij[2:0]),
        .\dImd_reg[23]_0 (drdImd3bufB),
        .\dImd_reg[23]_1 (\stateImdstream[0]_i_3_n_0 ),
        .\dImd_reg[23]_2 (drdImd1bufB),
        .\dImd_reg[23]_3 (drdImd0bufB),
        .\dImd_reg[23]_4 (drdImd4bufB),
        .doutb(drdImd2bufB));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a8b8__xdcDup__4 myImd3buf
       (.D({myImd3buf_n_8,myImd3buf_n_9,myImd3buf_n_10,myImd3buf_n_11,myImd3buf_n_12,myImd3buf_n_13,myImd3buf_n_14,myImd3buf_n_15}),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ({\rexp_reg_n_0_[7] ,\rexp_reg_n_0_[6] ,\rexp_reg_n_0_[5] ,\rexp_reg_n_0_[4] ,\rexp_reg_n_0_[3] ,\rexp_reg_n_0_[2] ,\rexp_reg_n_0_[1] ,\rexp_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 (enImdbuf_reg_n_0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ({\aImdbufB_reg_n_0_[10] ,\aImdbufB_reg_n_0_[9] ,\aImdbufB_reg_n_0_[8] ,\aImdbufB_reg_n_0_[7] ,\aImdbufB_reg_n_0_[6] ,\aImdbufB_reg_n_0_[5] ,\aImdbufB_reg_n_0_[4] ,\aImdbufB_reg_n_0_[3] ,\aImdbufB_reg_n_0_[2] ,\aImdbufB_reg_n_0_[1] ,\aImdbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 (myImd1buf_n_16),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 (myImd1buf_n_17),
        .Q({\aImdbuf_reg_n_0_[10] ,\aImdbuf_reg_n_0_[9] ,\aImdbuf_reg_n_0_[8] ,\aImdbuf_reg_n_0_[7] ,\aImdbuf_reg_n_0_[6] ,\aImdbuf_reg_n_0_[5] ,\aImdbuf_reg_n_0_[4] ,\aImdbuf_reg_n_0_[3] ,\aImdbuf_reg_n_0_[2] ,\aImdbuf_reg_n_0_[1] ,\aImdbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .\dImd_reg[15] (fghij[2:0]),
        .\dImd_reg[15]_0 (drdImd4bufB),
        .\dImd_reg[15]_1 (\stateImdstream[0]_i_3_n_0 ),
        .\dImd_reg[15]_2 (drdImd2bufB),
        .\dImd_reg[15]_3 (drdImd1bufB),
        .\dImd_reg[15]_4 (drdImd0bufB),
        .doutb(drdImd3bufB));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a8b8 myImd4buf
       (.D({myImd4buf_n_8,myImd4buf_n_9,myImd4buf_n_10,myImd4buf_n_11,myImd4buf_n_12,myImd4buf_n_13,myImd4buf_n_14,myImd4buf_n_15}),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ({\rexp_reg_n_0_[7] ,\rexp_reg_n_0_[6] ,\rexp_reg_n_0_[5] ,\rexp_reg_n_0_[4] ,\rexp_reg_n_0_[3] ,\rexp_reg_n_0_[2] ,\rexp_reg_n_0_[1] ,\rexp_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 (enImdbuf_reg_n_0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ({\aImdbufB_reg_n_0_[10] ,\aImdbufB_reg_n_0_[9] ,\aImdbufB_reg_n_0_[8] ,\aImdbufB_reg_n_0_[7] ,\aImdbufB_reg_n_0_[6] ,\aImdbufB_reg_n_0_[5] ,\aImdbufB_reg_n_0_[4] ,\aImdbufB_reg_n_0_[3] ,\aImdbufB_reg_n_0_[2] ,\aImdbufB_reg_n_0_[1] ,\aImdbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 (myImd1buf_n_17),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 (myImd1buf_n_16),
        .Q({\aImdbuf_reg_n_0_[10] ,\aImdbuf_reg_n_0_[9] ,\aImdbuf_reg_n_0_[8] ,\aImdbuf_reg_n_0_[7] ,\aImdbuf_reg_n_0_[6] ,\aImdbuf_reg_n_0_[5] ,\aImdbuf_reg_n_0_[4] ,\aImdbuf_reg_n_0_[3] ,\aImdbuf_reg_n_0_[2] ,\aImdbuf_reg_n_0_[1] ,\aImdbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .\dImd_reg[7] (fghij[2:0]),
        .\dImd_reg[7]_0 (drdImd0bufB),
        .\dImd_reg[7]_1 (\stateImdstream[0]_i_3_n_0 ),
        .\dImd_reg[7]_2 (drdImd3bufB),
        .\dImd_reg[7]_3 (drdImd2bufB),
        .\dImd_reg[7]_4 (drdImd1bufB),
        .doutb(drdImd4bufB),
        .\fghij_reg[2] (myImd4buf_n_16));
  LUT6 #(
    .INIT(64'hBA30B830B830B830)) 
    postNotLive_i_1
       (.I0(\maximds[4][7]_i_3_n_0 ),
        .I1(\row_lcl[10]_i_1_n_0 ),
        .I2(postNotLive_reg_n_0),
        .I3(\col_lcl[10]__0_i_3_n_0 ),
        .I4(ceMaxsel_reg_n_0),
        .I5(\col_lcl[8]__0_i_3_n_0 ),
        .O(postNotLive_i_1_n_0));
  FDCE postNotLive_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(postNotLive_i_1_n_0),
        .Q(postNotLive_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair948" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \postcol_lcl[0]_i_1 
       (.I0(stateCorner[1]),
        .I1(rng_reg_0),
        .I2(postcol_lcl__0[0]),
        .O(\postcol_lcl[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hBBFBBBBBBBBBBBBB)) 
    \postcol_lcl[10]_i_1 
       (.I0(\stateCorner[0]_i_2_n_0 ),
        .I1(rng_reg_1),
        .I2(grayVideoinToManyAXIS_tlast),
        .I3(\tkst_reg[0]_0 ),
        .I4(grayVideoinToManyAXIS_tvalid),
        .I5(\postcol_lcl[10]_i_3_n_0 ),
        .O(\postcol_lcl[10]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h28280028)) 
    \postcol_lcl[10]_i_2 
       (.I0(rng_reg_1),
        .I1(postcol_lcl__0[10]),
        .I2(\postcol_lcl[10]_i_4_n_0 ),
        .I3(stateCorner[0]),
        .I4(stateCorner[1]),
        .O(\postcol_lcl[10]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair790" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \postcol_lcl[10]_i_3 
       (.I0(stateCorner[0]),
        .I1(stateCorner[1]),
        .O(\postcol_lcl[10]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair821" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \postcol_lcl[10]_i_4 
       (.I0(postcol_lcl__0[9]),
        .I1(postcol_lcl__0[8]),
        .I2(postcol_lcl__0[6]),
        .I3(\postcol_lcl[9]_i_3_n_0 ),
        .I4(postcol_lcl__0[7]),
        .O(\postcol_lcl[10]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair822" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \postcol_lcl[1]_i_1 
       (.I0(stateCorner[1]),
        .I1(rng_reg_0),
        .I2(postcol_lcl__0[1]),
        .I3(postcol_lcl__0[0]),
        .O(\postcol_lcl[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair822" *) 
  LUT5 #(
    .INIT(32'h08888000)) 
    \postcol_lcl[2]_i_1 
       (.I0(stateCorner[1]),
        .I1(rng_reg_0),
        .I2(postcol_lcl__0[0]),
        .I3(postcol_lcl__0[1]),
        .I4(postcol_lcl__0[2]),
        .O(\postcol_lcl[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0888888880000000)) 
    \postcol_lcl[3]_i_1 
       (.I0(stateCorner[1]),
        .I1(rng_reg_0),
        .I2(postcol_lcl__0[1]),
        .I3(postcol_lcl__0[0]),
        .I4(postcol_lcl__0[2]),
        .I5(postcol_lcl__0[3]),
        .O(\postcol_lcl[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair790" *) 
  LUT5 #(
    .INIT(32'h28280028)) 
    \postcol_lcl[4]_i_1 
       (.I0(rng_reg_1),
        .I1(postcol_lcl__0[4]),
        .I2(\postcol_lcl[4]_i_2_n_0 ),
        .I3(stateCorner[0]),
        .I4(stateCorner[1]),
        .O(\postcol_lcl[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair780" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \postcol_lcl[4]_i_2 
       (.I0(postcol_lcl__0[2]),
        .I1(postcol_lcl__0[0]),
        .I2(postcol_lcl__0[1]),
        .I3(postcol_lcl__0[3]),
        .O(\postcol_lcl[4]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h28280028)) 
    \postcol_lcl[5]_i_1 
       (.I0(rng_reg_1),
        .I1(postcol_lcl__0[5]),
        .I2(\postcol_lcl[5]_i_2_n_0 ),
        .I3(stateCorner[0]),
        .I4(stateCorner[1]),
        .O(\postcol_lcl[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair780" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \postcol_lcl[5]_i_2 
       (.I0(postcol_lcl__0[3]),
        .I1(postcol_lcl__0[1]),
        .I2(postcol_lcl__0[0]),
        .I3(postcol_lcl__0[2]),
        .I4(postcol_lcl__0[4]),
        .O(\postcol_lcl[5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h28280028)) 
    \postcol_lcl[6]_i_1 
       (.I0(rng_reg_1),
        .I1(postcol_lcl__0[6]),
        .I2(\postcol_lcl[9]_i_3_n_0 ),
        .I3(stateCorner[0]),
        .I4(stateCorner[1]),
        .O(\postcol_lcl[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2888288800002888)) 
    \postcol_lcl[7]_i_1 
       (.I0(rng_reg_1),
        .I1(postcol_lcl__0[7]),
        .I2(postcol_lcl__0[6]),
        .I3(\postcol_lcl[9]_i_3_n_0 ),
        .I4(stateCorner[0]),
        .I5(stateCorner[1]),
        .O(\postcol_lcl[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000028888888)) 
    \postcol_lcl[8]_i_1 
       (.I0(rng_reg_1),
        .I1(postcol_lcl__0[8]),
        .I2(postcol_lcl__0[7]),
        .I3(\postcol_lcl[9]_i_3_n_0 ),
        .I4(postcol_lcl__0[6]),
        .I5(\postcol_lcl[10]_i_3_n_0 ),
        .O(\postcol_lcl[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \postcol_lcl[9]_i_1 
       (.I0(\postcol_lcl[9]_i_2_n_0 ),
        .I1(postcol_lcl__0[9]),
        .I2(postcol_lcl__0[8]),
        .I3(postcol_lcl__0[6]),
        .I4(\postcol_lcl[9]_i_3_n_0 ),
        .I5(postcol_lcl__0[7]),
        .O(\postcol_lcl[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair948" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \postcol_lcl[9]_i_2 
       (.I0(rng_reg_0),
        .I1(stateCorner[1]),
        .O(\postcol_lcl[9]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \postcol_lcl[9]_i_3 
       (.I0(postcol_lcl__0[4]),
        .I1(postcol_lcl__0[2]),
        .I2(postcol_lcl__0[0]),
        .I3(postcol_lcl__0[1]),
        .I4(postcol_lcl__0[3]),
        .I5(postcol_lcl__0[5]),
        .O(\postcol_lcl[9]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \postcol_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\postcol_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\postcol_lcl[0]_i_1_n_0 ),
        .Q(postcol_lcl__0[0]));
  FDCE #(
    .INIT(1'b0)) 
    \postcol_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\postcol_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\postcol_lcl[10]_i_2_n_0 ),
        .Q(postcol_lcl__0[10]));
  FDCE #(
    .INIT(1'b0)) 
    \postcol_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\postcol_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\postcol_lcl[1]_i_1_n_0 ),
        .Q(postcol_lcl__0[1]));
  FDCE #(
    .INIT(1'b0)) 
    \postcol_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\postcol_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\postcol_lcl[2]_i_1_n_0 ),
        .Q(postcol_lcl__0[2]));
  FDCE #(
    .INIT(1'b0)) 
    \postcol_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\postcol_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\postcol_lcl[3]_i_1_n_0 ),
        .Q(postcol_lcl__0[3]));
  FDCE #(
    .INIT(1'b0)) 
    \postcol_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\postcol_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\postcol_lcl[4]_i_1_n_0 ),
        .Q(postcol_lcl__0[4]));
  FDCE #(
    .INIT(1'b0)) 
    \postcol_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\postcol_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\postcol_lcl[5]_i_1_n_0 ),
        .Q(postcol_lcl__0[5]));
  FDCE #(
    .INIT(1'b0)) 
    \postcol_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\postcol_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\postcol_lcl[6]_i_1_n_0 ),
        .Q(postcol_lcl__0[6]));
  FDCE #(
    .INIT(1'b0)) 
    \postcol_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\postcol_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\postcol_lcl[7]_i_1_n_0 ),
        .Q(postcol_lcl__0[7]));
  FDCE #(
    .INIT(1'b0)) 
    \postcol_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\postcol_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\postcol_lcl[8]_i_1_n_0 ),
        .Q(postcol_lcl__0[8]));
  FDCE #(
    .INIT(1'b0)) 
    \postcol_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\postcol_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\postcol_lcl[9]_i_1_n_0 ),
        .Q(postcol_lcl__0[9]));
  LUT3 #(
    .INIT(8'h90)) 
    \r[15]_i_10 
       (.I0(termIIIk[15]),
        .I1(diffI_IIp1[15]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[15]_i_11 
       (.I0(termIIIk[14]),
        .I1(diffI_IIp1[14]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[15]_i_12 
       (.I0(termIIIk[13]),
        .I1(diffI_IIp1[13]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[15]_i_13 
       (.I0(termIIIk[12]),
        .I1(diffI_IIp1[12]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[15]_i_14 
       (.I0(termIIIk[11]),
        .I1(diffI_IIp1[11]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[15]_i_15 
       (.I0(termIIIk[10]),
        .I1(diffI_IIp1[10]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[15]_i_16 
       (.I0(termIIIk[9]),
        .I1(diffI_IIp1[9]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[15]_i_17 
       (.I0(termIIIk[8]),
        .I1(diffI_IIp1[8]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[15]_i_2 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[15]),
        .O(\r[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[15]_i_3 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[14]),
        .O(\r[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[15]_i_4 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[13]),
        .O(\r[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[15]_i_5 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[12]),
        .O(\r[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[15]_i_6 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[11]),
        .O(\r[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[15]_i_7 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[10]),
        .O(\r[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[15]_i_8 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[9]),
        .O(\r[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[15]_i_9 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[8]),
        .O(\r[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[23]_i_10 
       (.I0(termIIIk[23]),
        .I1(diffI_IIp1[23]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[23]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[23]_i_11 
       (.I0(termIIIk[22]),
        .I1(diffI_IIp1[22]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[23]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[23]_i_12 
       (.I0(termIIIk[21]),
        .I1(diffI_IIp1[21]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[23]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[23]_i_13 
       (.I0(termIIIk[20]),
        .I1(diffI_IIp1[20]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[23]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[23]_i_14 
       (.I0(termIIIk[19]),
        .I1(diffI_IIp1[19]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[23]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[23]_i_15 
       (.I0(termIIIk[18]),
        .I1(diffI_IIp1[18]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[23]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[23]_i_16 
       (.I0(termIIIk[17]),
        .I1(diffI_IIp1[17]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[23]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[23]_i_17 
       (.I0(termIIIk[16]),
        .I1(diffI_IIp1[16]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[23]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[23]_i_2 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[23]),
        .O(\r[23]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[23]_i_3 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[22]),
        .O(\r[23]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[23]_i_4 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[21]),
        .O(\r[23]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[23]_i_5 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[20]),
        .O(\r[23]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[23]_i_6 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[19]),
        .O(\r[23]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[23]_i_7 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[18]),
        .O(\r[23]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[23]_i_8 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[17]),
        .O(\r[23]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[23]_i_9 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[16]),
        .O(\r[23]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[31]_i_10 
       (.I0(termIIIk[31]),
        .I1(diffI_IIp1[31]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[31]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[31]_i_11 
       (.I0(termIIIk[30]),
        .I1(diffI_IIp1[30]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[31]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[31]_i_12 
       (.I0(termIIIk[29]),
        .I1(diffI_IIp1[29]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[31]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[31]_i_13 
       (.I0(termIIIk[28]),
        .I1(diffI_IIp1[28]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[31]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[31]_i_14 
       (.I0(termIIIk[27]),
        .I1(diffI_IIp1[27]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[31]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[31]_i_15 
       (.I0(termIIIk[26]),
        .I1(diffI_IIp1[26]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[31]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[31]_i_16 
       (.I0(termIIIk[25]),
        .I1(diffI_IIp1[25]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[31]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[31]_i_17 
       (.I0(termIIIk[24]),
        .I1(diffI_IIp1[24]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[31]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[31]_i_2 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[31]),
        .O(\r[31]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[31]_i_3 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[30]),
        .O(\r[31]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[31]_i_4 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[29]),
        .O(\r[31]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[31]_i_5 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[28]),
        .O(\r[31]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[31]_i_6 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[27]),
        .O(\r[31]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[31]_i_7 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[26]),
        .O(\r[31]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[31]_i_8 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[25]),
        .O(\r[31]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[31]_i_9 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[24]),
        .O(\r[31]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[39]_i_10 
       (.I0(termIIIk[39]),
        .I1(diffI_IIp1[39]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[39]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[39]_i_11 
       (.I0(termIIIk[38]),
        .I1(diffI_IIp1[38]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[39]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[39]_i_12 
       (.I0(termIIIk[37]),
        .I1(diffI_IIp1[37]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[39]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[39]_i_13 
       (.I0(termIIIk[36]),
        .I1(diffI_IIp1[36]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[39]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[39]_i_14 
       (.I0(termIIIk[35]),
        .I1(diffI_IIp1[35]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[39]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[39]_i_15 
       (.I0(termIIIk[34]),
        .I1(diffI_IIp1[34]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[39]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[39]_i_16 
       (.I0(termIIIk[33]),
        .I1(diffI_IIp1[33]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[39]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[39]_i_17 
       (.I0(termIIIk[32]),
        .I1(diffI_IIp1[32]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[39]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[39]_i_2 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[39]),
        .O(\r[39]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[39]_i_3 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[38]),
        .O(\r[39]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[39]_i_4 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[37]),
        .O(\r[39]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[39]_i_5 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[36]),
        .O(\r[39]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[39]_i_6 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[35]),
        .O(\r[39]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[39]_i_7 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[34]),
        .O(\r[39]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[39]_i_8 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[33]),
        .O(\r[39]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[39]_i_9 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[32]),
        .O(\r[39]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[47]_i_10 
       (.I0(termIIIk[43]),
        .I1(diffI_IIp1[46]),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\r[47]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[47]_i_11 
       (.I0(termIIIk[43]),
        .I1(diffI_IIp1[45]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[47]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[47]_i_12 
       (.I0(termIIIk[43]),
        .I1(diffI_IIp1[44]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[47]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[47]_i_13 
       (.I0(termIIIk[43]),
        .I1(diffI_IIp1[43]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[47]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[47]_i_14 
       (.I0(termIIIk[42]),
        .I1(diffI_IIp1[42]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[47]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[47]_i_15 
       (.I0(termIIIk[41]),
        .I1(diffI_IIp1[41]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[47]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[47]_i_16 
       (.I0(termIIIk[40]),
        .I1(diffI_IIp1[40]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[47]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[47]_i_2 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[43]),
        .O(\r[47]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[47]_i_3 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[43]),
        .O(\r[47]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[47]_i_4 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[43]),
        .O(\r[47]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[47]_i_5 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[43]),
        .O(\r[47]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[47]_i_6 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[42]),
        .O(\r[47]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[47]_i_7 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[41]),
        .O(\r[47]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[47]_i_8 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk[40]),
        .O(\r[47]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[47]_i_9 
       (.I0(termIIIk[43]),
        .I1(diffI_IIp1[46]),
        .I2(stateScore_reg_rep__16_n_0),
        .O(\r[47]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[7]_i_10 
       (.I0(termIIIk[7]),
        .I1(diffI_IIp1[7]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[7]_i_11 
       (.I0(termIIIk[6]),
        .I1(diffI_IIp1[6]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[7]_i_12 
       (.I0(termIIIk[5]),
        .I1(diffI_IIp1[5]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[7]_i_13 
       (.I0(termIIIk[4]),
        .I1(diffI_IIp1[4]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[7]_i_14 
       (.I0(termIIIk[3]),
        .I1(diffI_IIp1[3]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[7]_i_15 
       (.I0(termIIIk[2]),
        .I1(diffI_IIp1[2]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[7]_i_16 
       (.I0(termIIIk[1]),
        .I1(diffI_IIp1[1]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h90)) 
    \r[7]_i_17 
       (.I0(termIIIk[0]),
        .I1(diffI_IIp1[0]),
        .I2(stateScore_reg_rep__15_n_0),
        .O(\r[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[7]_i_2 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[7]),
        .O(\r[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[7]_i_3 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[6]),
        .O(\r[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[7]_i_4 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[5]),
        .O(\r[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[7]_i_5 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[4]),
        .O(\r[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[7]_i_6 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[3]),
        .O(\r[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[7]_i_7 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[2]),
        .O(\r[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[7]_i_8 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[1]),
        .O(\r[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \r[7]_i_9 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk[0]),
        .O(\r[7]_i_9_n_0 ));
  FDCE \r_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[7]_i_1_n_15 ),
        .Q(\r_reg_n_0_[0] ));
  FDCE \r_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[15]_i_1_n_13 ),
        .Q(\r_reg_n_0_[10] ));
  FDCE \r_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[15]_i_1_n_12 ),
        .Q(\r_reg_n_0_[11] ));
  FDCE \r_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[15]_i_1_n_11 ),
        .Q(\r_reg_n_0_[12] ));
  FDCE \r_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[15]_i_1_n_10 ),
        .Q(\r_reg_n_0_[13] ));
  FDCE \r_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[15]_i_1_n_9 ),
        .Q(\r_reg_n_0_[14] ));
  FDCE \r_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[15]_i_1_n_8 ),
        .Q(\r_reg_n_0_[15] ));
  CARRY8 \r_reg[15]_i_1 
       (.CI(\r_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\r_reg[15]_i_1_n_0 ,\r_reg[15]_i_1_n_1 ,\r_reg[15]_i_1_n_2 ,\r_reg[15]_i_1_n_3 ,\r_reg[15]_i_1_n_4 ,\r_reg[15]_i_1_n_5 ,\r_reg[15]_i_1_n_6 ,\r_reg[15]_i_1_n_7 }),
        .DI({\r[15]_i_2_n_0 ,\r[15]_i_3_n_0 ,\r[15]_i_4_n_0 ,\r[15]_i_5_n_0 ,\r[15]_i_6_n_0 ,\r[15]_i_7_n_0 ,\r[15]_i_8_n_0 ,\r[15]_i_9_n_0 }),
        .O({\r_reg[15]_i_1_n_8 ,\r_reg[15]_i_1_n_9 ,\r_reg[15]_i_1_n_10 ,\r_reg[15]_i_1_n_11 ,\r_reg[15]_i_1_n_12 ,\r_reg[15]_i_1_n_13 ,\r_reg[15]_i_1_n_14 ,\r_reg[15]_i_1_n_15 }),
        .S({\r[15]_i_10_n_0 ,\r[15]_i_11_n_0 ,\r[15]_i_12_n_0 ,\r[15]_i_13_n_0 ,\r[15]_i_14_n_0 ,\r[15]_i_15_n_0 ,\r[15]_i_16_n_0 ,\r[15]_i_17_n_0 }));
  FDCE \r_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[23]_i_1_n_15 ),
        .Q(\r_reg_n_0_[16] ));
  FDCE \r_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[23]_i_1_n_14 ),
        .Q(\r_reg_n_0_[17] ));
  FDCE \r_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[23]_i_1_n_13 ),
        .Q(\r_reg_n_0_[18] ));
  FDCE \r_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[23]_i_1_n_12 ),
        .Q(\r_reg_n_0_[19] ));
  FDCE \r_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[7]_i_1_n_14 ),
        .Q(\r_reg_n_0_[1] ));
  FDCE \r_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[23]_i_1_n_11 ),
        .Q(\r_reg_n_0_[20] ));
  FDCE \r_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[23]_i_1_n_10 ),
        .Q(\r_reg_n_0_[21] ));
  FDCE \r_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[23]_i_1_n_9 ),
        .Q(\r_reg_n_0_[22] ));
  FDCE \r_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[23]_i_1_n_8 ),
        .Q(\r_reg_n_0_[23] ));
  CARRY8 \r_reg[23]_i_1 
       (.CI(\r_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\r_reg[23]_i_1_n_0 ,\r_reg[23]_i_1_n_1 ,\r_reg[23]_i_1_n_2 ,\r_reg[23]_i_1_n_3 ,\r_reg[23]_i_1_n_4 ,\r_reg[23]_i_1_n_5 ,\r_reg[23]_i_1_n_6 ,\r_reg[23]_i_1_n_7 }),
        .DI({\r[23]_i_2_n_0 ,\r[23]_i_3_n_0 ,\r[23]_i_4_n_0 ,\r[23]_i_5_n_0 ,\r[23]_i_6_n_0 ,\r[23]_i_7_n_0 ,\r[23]_i_8_n_0 ,\r[23]_i_9_n_0 }),
        .O({\r_reg[23]_i_1_n_8 ,\r_reg[23]_i_1_n_9 ,\r_reg[23]_i_1_n_10 ,\r_reg[23]_i_1_n_11 ,\r_reg[23]_i_1_n_12 ,\r_reg[23]_i_1_n_13 ,\r_reg[23]_i_1_n_14 ,\r_reg[23]_i_1_n_15 }),
        .S({\r[23]_i_10_n_0 ,\r[23]_i_11_n_0 ,\r[23]_i_12_n_0 ,\r[23]_i_13_n_0 ,\r[23]_i_14_n_0 ,\r[23]_i_15_n_0 ,\r[23]_i_16_n_0 ,\r[23]_i_17_n_0 }));
  FDCE \r_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[31]_i_1_n_15 ),
        .Q(\r_reg_n_0_[24] ));
  FDCE \r_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[31]_i_1_n_14 ),
        .Q(\r_reg_n_0_[25] ));
  FDCE \r_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[31]_i_1_n_13 ),
        .Q(\r_reg_n_0_[26] ));
  FDCE \r_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[31]_i_1_n_12 ),
        .Q(\r_reg_n_0_[27] ));
  FDCE \r_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[31]_i_1_n_11 ),
        .Q(\r_reg_n_0_[28] ));
  FDCE \r_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[31]_i_1_n_10 ),
        .Q(\r_reg_n_0_[29] ));
  FDCE \r_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[7]_i_1_n_13 ),
        .Q(\r_reg_n_0_[2] ));
  FDCE \r_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[31]_i_1_n_9 ),
        .Q(\r_reg_n_0_[30] ));
  FDCE \r_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[31]_i_1_n_8 ),
        .Q(\r_reg_n_0_[31] ));
  CARRY8 \r_reg[31]_i_1 
       (.CI(\r_reg[23]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\r_reg[31]_i_1_n_0 ,\r_reg[31]_i_1_n_1 ,\r_reg[31]_i_1_n_2 ,\r_reg[31]_i_1_n_3 ,\r_reg[31]_i_1_n_4 ,\r_reg[31]_i_1_n_5 ,\r_reg[31]_i_1_n_6 ,\r_reg[31]_i_1_n_7 }),
        .DI({\r[31]_i_2_n_0 ,\r[31]_i_3_n_0 ,\r[31]_i_4_n_0 ,\r[31]_i_5_n_0 ,\r[31]_i_6_n_0 ,\r[31]_i_7_n_0 ,\r[31]_i_8_n_0 ,\r[31]_i_9_n_0 }),
        .O({\r_reg[31]_i_1_n_8 ,\r_reg[31]_i_1_n_9 ,\r_reg[31]_i_1_n_10 ,\r_reg[31]_i_1_n_11 ,\r_reg[31]_i_1_n_12 ,\r_reg[31]_i_1_n_13 ,\r_reg[31]_i_1_n_14 ,\r_reg[31]_i_1_n_15 }),
        .S({\r[31]_i_10_n_0 ,\r[31]_i_11_n_0 ,\r[31]_i_12_n_0 ,\r[31]_i_13_n_0 ,\r[31]_i_14_n_0 ,\r[31]_i_15_n_0 ,\r[31]_i_16_n_0 ,\r[31]_i_17_n_0 }));
  FDCE \r_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[39]_i_1_n_15 ),
        .Q(\r_reg_n_0_[32] ));
  FDCE \r_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[39]_i_1_n_14 ),
        .Q(\r_reg_n_0_[33] ));
  FDCE \r_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[39]_i_1_n_13 ),
        .Q(\r_reg_n_0_[34] ));
  FDCE \r_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[39]_i_1_n_12 ),
        .Q(\r_reg_n_0_[35] ));
  FDCE \r_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[39]_i_1_n_11 ),
        .Q(\r_reg_n_0_[36] ));
  FDCE \r_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[39]_i_1_n_10 ),
        .Q(\r_reg_n_0_[37] ));
  FDCE \r_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[39]_i_1_n_9 ),
        .Q(\r_reg_n_0_[38] ));
  FDCE \r_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[39]_i_1_n_8 ),
        .Q(\r_reg_n_0_[39] ));
  CARRY8 \r_reg[39]_i_1 
       (.CI(\r_reg[31]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\r_reg[39]_i_1_n_0 ,\r_reg[39]_i_1_n_1 ,\r_reg[39]_i_1_n_2 ,\r_reg[39]_i_1_n_3 ,\r_reg[39]_i_1_n_4 ,\r_reg[39]_i_1_n_5 ,\r_reg[39]_i_1_n_6 ,\r_reg[39]_i_1_n_7 }),
        .DI({\r[39]_i_2_n_0 ,\r[39]_i_3_n_0 ,\r[39]_i_4_n_0 ,\r[39]_i_5_n_0 ,\r[39]_i_6_n_0 ,\r[39]_i_7_n_0 ,\r[39]_i_8_n_0 ,\r[39]_i_9_n_0 }),
        .O({\r_reg[39]_i_1_n_8 ,\r_reg[39]_i_1_n_9 ,\r_reg[39]_i_1_n_10 ,\r_reg[39]_i_1_n_11 ,\r_reg[39]_i_1_n_12 ,\r_reg[39]_i_1_n_13 ,\r_reg[39]_i_1_n_14 ,\r_reg[39]_i_1_n_15 }),
        .S({\r[39]_i_10_n_0 ,\r[39]_i_11_n_0 ,\r[39]_i_12_n_0 ,\r[39]_i_13_n_0 ,\r[39]_i_14_n_0 ,\r[39]_i_15_n_0 ,\r[39]_i_16_n_0 ,\r[39]_i_17_n_0 }));
  FDCE \r_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[7]_i_1_n_12 ),
        .Q(\r_reg_n_0_[3] ));
  FDCE \r_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[47]_i_1_n_15 ),
        .Q(\r_reg_n_0_[40] ));
  FDCE \r_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[47]_i_1_n_14 ),
        .Q(\r_reg_n_0_[41] ));
  FDCE \r_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[47]_i_1_n_13 ),
        .Q(\r_reg_n_0_[42] ));
  FDCE \r_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[47]_i_1_n_12 ),
        .Q(\r_reg_n_0_[43] ));
  FDCE \r_reg[44] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[47]_i_1_n_11 ),
        .Q(\r_reg_n_0_[44] ));
  FDCE \r_reg[45] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[47]_i_1_n_10 ),
        .Q(\r_reg_n_0_[45] ));
  FDCE \r_reg[46] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[47]_i_1_n_9 ),
        .Q(\r_reg_n_0_[46] ));
  FDCE \r_reg[47] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[47]_i_1_n_8 ),
        .Q(\r_reg_n_0_[47] ));
  CARRY8 \r_reg[47]_i_1 
       (.CI(\r_reg[39]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_r_reg[47]_i_1_CO_UNCONNECTED [7],\r_reg[47]_i_1_n_1 ,\r_reg[47]_i_1_n_2 ,\r_reg[47]_i_1_n_3 ,\r_reg[47]_i_1_n_4 ,\r_reg[47]_i_1_n_5 ,\r_reg[47]_i_1_n_6 ,\r_reg[47]_i_1_n_7 }),
        .DI({1'b0,\r[47]_i_2_n_0 ,\r[47]_i_3_n_0 ,\r[47]_i_4_n_0 ,\r[47]_i_5_n_0 ,\r[47]_i_6_n_0 ,\r[47]_i_7_n_0 ,\r[47]_i_8_n_0 }),
        .O({\r_reg[47]_i_1_n_8 ,\r_reg[47]_i_1_n_9 ,\r_reg[47]_i_1_n_10 ,\r_reg[47]_i_1_n_11 ,\r_reg[47]_i_1_n_12 ,\r_reg[47]_i_1_n_13 ,\r_reg[47]_i_1_n_14 ,\r_reg[47]_i_1_n_15 }),
        .S({\r[47]_i_9_n_0 ,\r[47]_i_10_n_0 ,\r[47]_i_11_n_0 ,\r[47]_i_12_n_0 ,\r[47]_i_13_n_0 ,\r[47]_i_14_n_0 ,\r[47]_i_15_n_0 ,\r[47]_i_16_n_0 }));
  FDCE \r_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[7]_i_1_n_11 ),
        .Q(\r_reg_n_0_[4] ));
  FDCE \r_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[7]_i_1_n_10 ),
        .Q(\r_reg_n_0_[5] ));
  FDCE \r_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[7]_i_1_n_9 ),
        .Q(\r_reg_n_0_[6] ));
  FDCE \r_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[7]_i_1_n_8 ),
        .Q(\r_reg_n_0_[7] ));
  CARRY8 \r_reg[7]_i_1 
       (.CI(stateScore_reg_rep__15_n_0),
        .CI_TOP(1'b0),
        .CO({\r_reg[7]_i_1_n_0 ,\r_reg[7]_i_1_n_1 ,\r_reg[7]_i_1_n_2 ,\r_reg[7]_i_1_n_3 ,\r_reg[7]_i_1_n_4 ,\r_reg[7]_i_1_n_5 ,\r_reg[7]_i_1_n_6 ,\r_reg[7]_i_1_n_7 }),
        .DI({\r[7]_i_2_n_0 ,\r[7]_i_3_n_0 ,\r[7]_i_4_n_0 ,\r[7]_i_5_n_0 ,\r[7]_i_6_n_0 ,\r[7]_i_7_n_0 ,\r[7]_i_8_n_0 ,\r[7]_i_9_n_0 }),
        .O({\r_reg[7]_i_1_n_8 ,\r_reg[7]_i_1_n_9 ,\r_reg[7]_i_1_n_10 ,\r_reg[7]_i_1_n_11 ,\r_reg[7]_i_1_n_12 ,\r_reg[7]_i_1_n_13 ,\r_reg[7]_i_1_n_14 ,\r_reg[7]_i_1_n_15 }),
        .S({\r[7]_i_10_n_0 ,\r[7]_i_11_n_0 ,\r[7]_i_12_n_0 ,\r[7]_i_13_n_0 ,\r[7]_i_14_n_0 ,\r[7]_i_15_n_0 ,\r[7]_i_16_n_0 ,\r[7]_i_17_n_0 }));
  FDCE \r_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[15]_i_1_n_15 ),
        .Q(\r_reg_n_0_[8] ));
  FDCE \r_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\r_reg[15]_i_1_n_14 ),
        .Q(\r_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'h4F4F4FFF44444444)) 
    \rexp[0]_i_1 
       (.I0(\rexp[0]_i_2_n_0 ),
        .I1(\rexp[7]_i_4_n_0 ),
        .I2(\rexp[0]_i_3_n_0 ),
        .I3(\rexp[0]_i_4_n_0 ),
        .I4(\rexp[0]_i_5_n_0 ),
        .I5(\rexp[1]_i_6_n_0 ),
        .O(\rexp[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAABFBFFFFABFB)) 
    \rexp[0]_i_10 
       (.I0(shift[3]),
        .I1(\r_reg_n_0_[0] ),
        .I2(shift[5]),
        .I3(\r_reg_n_0_[32] ),
        .I4(shift[4]),
        .I5(\r_reg_n_0_[16] ),
        .O(\rexp[0]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h8A888A888A8A8A88)) 
    \rexp[0]_i_2 
       (.I0(\rexp[0]_i_6_n_0 ),
        .I1(\rexp[1]_i_8_n_0 ),
        .I2(\rexp[1]_i_9_n_0 ),
        .I3(\rexp[7]_i_13_n_0 ),
        .I4(\rexp[7]_i_12_n_0 ),
        .I5(\rexp[7]_i_11_n_0 ),
        .O(\rexp[0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair831" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    \rexp[0]_i_3 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(\rshift[4]_i_3_n_0 ),
        .I2(\rexp[7]_i_21_n_0 ),
        .I3(\r_reg_n_0_[0] ),
        .O(\rexp[0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h2F202F2F2F202020)) 
    \rexp[0]_i_4 
       (.I0(\rexp[1]_i_12_n_0 ),
        .I1(\rexp[1]_i_13_n_0 ),
        .I2(\msb[0]_i_1_n_0 ),
        .I3(\rexp[0]_i_7_n_0 ),
        .I4(\msb[1]_i_1_n_0 ),
        .I5(\rexp[1]_i_10_n_0 ),
        .O(\rexp[0]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair807" *) 
  LUT5 #(
    .INIT(32'h00008000)) 
    \rexp[0]_i_5 
       (.I0(\msb[3]_i_1_n_0 ),
        .I1(\msb[0]_i_1_n_0 ),
        .I2(\rshift[5]_i_4_n_0 ),
        .I3(\msb[4]_i_2_n_0 ),
        .I4(\msb[5]_i_3_n_0 ),
        .O(\rexp[0]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h88888BBB)) 
    \rexp[0]_i_6 
       (.I0(\rexp[1]_i_14_n_0 ),
        .I1(shift[0]),
        .I2(\rexp[2]_i_6_n_0 ),
        .I3(shift[1]),
        .I4(\rexp[0]_i_8_n_0 ),
        .O(\rexp[0]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hA0A0C0C0AFAFC0CF)) 
    \rexp[0]_i_7 
       (.I0(\rexp[1]_i_24_n_0 ),
        .I1(\rexp[0]_i_9_n_0 ),
        .I2(\rexp[1]_i_19_n_0 ),
        .I3(\rexp[1]_i_20_n_0 ),
        .I4(\rexp[1]_i_23_n_0 ),
        .I5(\rexp[1]_i_21_n_0 ),
        .O(\rexp[0]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h4540404045454545)) 
    \rexp[0]_i_8 
       (.I0(shift[1]),
        .I1(\rexp[4]_i_5_n_0 ),
        .I2(shift[2]),
        .I3(\rexp[7]_i_31_n_0 ),
        .I4(shift[3]),
        .I5(\rexp[0]_i_10_n_0 ),
        .O(\rexp[0]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h470047FF)) 
    \rexp[0]_i_9 
       (.I0(\r_reg_n_0_[0] ),
        .I1(\rexp[1]_i_35_n_0 ),
        .I2(\r_reg_n_0_[32] ),
        .I3(\rexp[1]_i_34_n_0 ),
        .I4(\r_reg_n_0_[16] ),
        .O(\rexp[0]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF444F44444444)) 
    \rexp[1]_i_1 
       (.I0(\rexp[1]_i_2_n_0 ),
        .I1(\rexp[7]_i_4_n_0 ),
        .I2(\rexp[1]_i_3_n_0 ),
        .I3(\rexp[1]_i_4_n_0 ),
        .I4(\rexp[1]_i_5_n_0 ),
        .I5(\rexp[1]_i_6_n_0 ),
        .O(\rexp[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00404444)) 
    \rexp[1]_i_10 
       (.I0(\rexp[1]_i_15_n_0 ),
        .I1(\rexp[1]_i_16_n_0 ),
        .I2(\rexp[1]_i_17_n_0 ),
        .I3(\rexp[1]_i_18_n_0 ),
        .I4(\rexp[1]_i_19_n_0 ),
        .O(\rexp[1]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h3F301F1F3F301010)) 
    \rexp[1]_i_11 
       (.I0(\rexp[1]_i_20_n_0 ),
        .I1(\rexp[1]_i_21_n_0 ),
        .I2(\rexp[1]_i_19_n_0 ),
        .I3(\rexp[1]_i_22_n_0 ),
        .I4(\rexp[1]_i_23_n_0 ),
        .I5(\rexp[1]_i_24_n_0 ),
        .O(\rexp[1]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF444400F0)) 
    \rexp[1]_i_12 
       (.I0(\rexp[1]_i_25_n_0 ),
        .I1(\rexp[1]_i_26_n_0 ),
        .I2(\rexp[1]_i_27_n_0 ),
        .I3(\rexp[1]_i_28_n_0 ),
        .I4(\msb[2]_i_1_n_0 ),
        .I5(\msb[1]_i_1_n_0 ),
        .O(\rexp[1]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair808" *) 
  LUT5 #(
    .INIT(32'hDD000F00)) 
    \rexp[1]_i_13 
       (.I0(\rexp[1]_i_29_n_0 ),
        .I1(\rexp[1]_i_30_n_0 ),
        .I2(\rexp_reg[1]_i_31_n_0 ),
        .I3(\msb[1]_i_1_n_0 ),
        .I4(\msb[2]_i_1_n_0 ),
        .O(\rexp[1]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h0000FFFF55035503)) 
    \rexp[1]_i_14 
       (.I0(\rexp[5]_i_5_n_0 ),
        .I1(\rexp[1]_i_32_n_0 ),
        .I2(\rexp[1]_i_33_n_0 ),
        .I3(shift[2]),
        .I4(\rexp[2]_i_5_n_0 ),
        .I5(shift[1]),
        .O(\rexp[1]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \rexp[1]_i_15 
       (.I0(\r_reg_n_0_[22] ),
        .I1(\rexp[1]_i_34_n_0 ),
        .I2(\r_reg_n_0_[38] ),
        .I3(\rexp[1]_i_35_n_0 ),
        .I4(\r_reg_n_0_[6] ),
        .I5(\rexp[1]_i_23_n_0 ),
        .O(\rexp[1]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h111F0000111FFFFF)) 
    \rexp[1]_i_16 
       (.I0(\rexp[1]_i_35_n_0 ),
        .I1(\r_reg_n_0_[46] ),
        .I2(\rexp[1]_i_36_n_0 ),
        .I3(\r_reg_n_0_[14] ),
        .I4(\rexp[1]_i_34_n_0 ),
        .I5(\r_reg_n_0_[30] ),
        .O(\rexp[1]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'hCFDDCFDDCCDDCFDD)) 
    \rexp[1]_i_17 
       (.I0(\r_reg_n_0_[18] ),
        .I1(\rexp[1]_i_23_n_0 ),
        .I2(\r_reg_n_0_[34] ),
        .I3(\rexp[1]_i_34_n_0 ),
        .I4(\r_reg_n_0_[2] ),
        .I5(\rexp[1]_i_36_n_0 ),
        .O(\rexp[1]_i_17_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[1]_i_18 
       (.I0(\r_reg_n_0_[10] ),
        .I1(\rexp[1]_i_35_n_0 ),
        .I2(\r_reg_n_0_[42] ),
        .I3(\rexp[1]_i_34_n_0 ),
        .I4(\r_reg_n_0_[26] ),
        .O(\rexp[1]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \rexp[1]_i_19 
       (.I0(\msb[1]_i_1_n_0 ),
        .I1(\msb[2]_i_1_n_0 ),
        .O(\rexp[1]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h8A888A888A8A8A88)) 
    \rexp[1]_i_2 
       (.I0(\rexp[1]_i_7_n_0 ),
        .I1(\rexp[1]_i_8_n_0 ),
        .I2(\rexp[1]_i_9_n_0 ),
        .I3(\rexp[7]_i_13_n_0 ),
        .I4(\rexp[7]_i_12_n_0 ),
        .I5(\rexp[7]_i_11_n_0 ),
        .O(\rexp[1]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[1]_i_20 
       (.I0(\r_reg_n_0_[4] ),
        .I1(\rexp[1]_i_35_n_0 ),
        .I2(\r_reg_n_0_[36] ),
        .I3(\rexp[1]_i_34_n_0 ),
        .I4(\r_reg_n_0_[20] ),
        .O(\rexp[1]_i_20_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[1]_i_21 
       (.I0(\r_reg_n_0_[12] ),
        .I1(\rexp[1]_i_35_n_0 ),
        .I2(\r_reg_n_0_[44] ),
        .I3(\rexp[1]_i_34_n_0 ),
        .I4(\r_reg_n_0_[28] ),
        .O(\rexp[1]_i_21_n_0 ));
  LUT5 #(
    .INIT(32'h47444777)) 
    \rexp[1]_i_22 
       (.I0(\r_reg_n_0_[16] ),
        .I1(\rexp[1]_i_34_n_0 ),
        .I2(\r_reg_n_0_[0] ),
        .I3(\rexp[1]_i_36_n_0 ),
        .I4(\r_reg_n_0_[32] ),
        .O(\rexp[1]_i_22_n_0 ));
  LUT3 #(
    .INIT(8'hA9)) 
    \rexp[1]_i_23 
       (.I0(\msb[3]_i_1_n_0 ),
        .I1(\msb[2]_i_1_n_0 ),
        .I2(\msb[1]_i_1_n_0 ),
        .O(\rexp[1]_i_23_n_0 ));
  LUT5 #(
    .INIT(32'h450045FF)) 
    \rexp[1]_i_24 
       (.I0(\r_reg_n_0_[40] ),
        .I1(\rexp[1]_i_36_n_0 ),
        .I2(\r_reg_n_0_[8] ),
        .I3(\rexp[1]_i_34_n_0 ),
        .I4(\r_reg_n_0_[24] ),
        .O(\rexp[1]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[1]_i_25 
       (.I0(\r_reg_n_0_[11] ),
        .I1(\rexp[1]_i_35_n_0 ),
        .I2(\r_reg_n_0_[43] ),
        .I3(\rexp[1]_i_34_n_0 ),
        .I4(\r_reg_n_0_[27] ),
        .O(\rexp[1]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hABABABFBFBFBABFB)) 
    \rexp[1]_i_26 
       (.I0(\rexp[1]_i_23_n_0 ),
        .I1(\r_reg_n_0_[19] ),
        .I2(\rexp[1]_i_34_n_0 ),
        .I3(\r_reg_n_0_[35] ),
        .I4(\rexp[1]_i_35_n_0 ),
        .I5(\r_reg_n_0_[3] ),
        .O(\rexp[1]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'hABABABFBFBFBABFB)) 
    \rexp[1]_i_27 
       (.I0(\rexp[1]_i_23_n_0 ),
        .I1(\r_reg_n_0_[23] ),
        .I2(\rexp[1]_i_34_n_0 ),
        .I3(\r_reg_n_0_[39] ),
        .I4(\rexp[1]_i_35_n_0 ),
        .I5(\r_reg_n_0_[7] ),
        .O(\rexp[1]_i_27_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[1]_i_28 
       (.I0(\r_reg_n_0_[15] ),
        .I1(\rexp[1]_i_35_n_0 ),
        .I2(\r_reg_n_0_[47] ),
        .I3(\rexp[1]_i_34_n_0 ),
        .I4(\r_reg_n_0_[31] ),
        .O(\rexp[1]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h111F0000111FFFFF)) 
    \rexp[1]_i_29 
       (.I0(\rexp[1]_i_35_n_0 ),
        .I1(\r_reg_n_0_[45] ),
        .I2(\rexp[1]_i_36_n_0 ),
        .I3(\r_reg_n_0_[13] ),
        .I4(\rexp[1]_i_34_n_0 ),
        .I5(\r_reg_n_0_[29] ),
        .O(\rexp[1]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'hB800B800B8FFB800)) 
    \rexp[1]_i_3 
       (.I0(\rexp[1]_i_10_n_0 ),
        .I1(\msb[1]_i_1_n_0 ),
        .I2(\rexp[1]_i_11_n_0 ),
        .I3(\msb[0]_i_1_n_0 ),
        .I4(\rexp[1]_i_12_n_0 ),
        .I5(\rexp[1]_i_13_n_0 ),
        .O(\rexp[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \rexp[1]_i_30 
       (.I0(\r_reg_n_0_[21] ),
        .I1(\rexp[1]_i_34_n_0 ),
        .I2(\r_reg_n_0_[37] ),
        .I3(\rexp[1]_i_35_n_0 ),
        .I4(\r_reg_n_0_[5] ),
        .I5(\rexp[1]_i_23_n_0 ),
        .O(\rexp[1]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h5554445411100010)) 
    \rexp[1]_i_32 
       (.I0(shift[3]),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[1] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[33] ),
        .I5(\r_reg_n_0_[17] ),
        .O(\rexp[1]_i_32_n_0 ));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \rexp[1]_i_33 
       (.I0(\r_reg_n_0_[9] ),
        .I1(shift[5]),
        .I2(\r_reg_n_0_[41] ),
        .I3(shift[4]),
        .I4(\r_reg_n_0_[25] ),
        .I5(shift[3]),
        .O(\rexp[1]_i_33_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair858" *) 
  LUT4 #(
    .INIT(16'hAAA9)) 
    \rexp[1]_i_34 
       (.I0(\msb[4]_i_2_n_0 ),
        .I1(\msb[1]_i_1_n_0 ),
        .I2(\msb[2]_i_1_n_0 ),
        .I3(\msb[3]_i_1_n_0 ),
        .O(\rexp[1]_i_34_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair778" *) 
  LUT5 #(
    .INIT(32'hAAAAAAA6)) 
    \rexp[1]_i_35 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(\msb[4]_i_2_n_0 ),
        .I2(\msb[3]_i_1_n_0 ),
        .I3(\msb[2]_i_1_n_0 ),
        .I4(\msb[1]_i_1_n_0 ),
        .O(\rexp[1]_i_35_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair778" *) 
  LUT5 #(
    .INIT(32'h55555559)) 
    \rexp[1]_i_36 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(\msb[4]_i_2_n_0 ),
        .I2(\msb[3]_i_1_n_0 ),
        .I3(\msb[2]_i_1_n_0 ),
        .I4(\msb[1]_i_1_n_0 ),
        .O(\rexp[1]_i_36_n_0 ));
  LUT5 #(
    .INIT(32'h470047FF)) 
    \rexp[1]_i_37 
       (.I0(\r_reg_n_0_[1] ),
        .I1(\rexp[1]_i_35_n_0 ),
        .I2(\r_reg_n_0_[33] ),
        .I3(\rexp[1]_i_34_n_0 ),
        .I4(\r_reg_n_0_[17] ),
        .O(\rexp[1]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'h111F0000111FFFFF)) 
    \rexp[1]_i_38 
       (.I0(\rexp[1]_i_35_n_0 ),
        .I1(\r_reg_n_0_[41] ),
        .I2(\rexp[1]_i_36_n_0 ),
        .I3(\r_reg_n_0_[9] ),
        .I4(\rexp[1]_i_34_n_0 ),
        .I5(\r_reg_n_0_[25] ),
        .O(\rexp[1]_i_38_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair784" *) 
  LUT4 #(
    .INIT(16'hFF80)) 
    \rexp[1]_i_4 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(\rshift[4]_i_3_n_0 ),
        .I2(\rexp[7]_i_21_n_0 ),
        .I3(\rexp[0]_i_5_n_0 ),
        .O(\rexp[1]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair831" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \rexp[1]_i_5 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(\rshift[4]_i_3_n_0 ),
        .I2(\rexp[7]_i_21_n_0 ),
        .I3(\r_reg_n_0_[1] ),
        .O(\rexp[1]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair963" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \rexp[1]_i_6 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(linNotLog_reg_n_0),
        .O(\rexp[1]_i_6_n_0 ));
  LUT3 #(
    .INIT(8'h2E)) 
    \rexp[1]_i_7 
       (.I0(\rexp[1]_i_14_n_0 ),
        .I1(shift[0]),
        .I2(\rexp[2]_i_3_n_0 ),
        .O(\rexp[1]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair809" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \rexp[1]_i_8 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(\rexp[7]_i_37_n_0 ),
        .I2(shift[4]),
        .I3(shift[5]),
        .O(\rexp[1]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair809" *) 
  LUT5 #(
    .INIT(32'h4111F11F)) 
    \rexp[1]_i_9 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(shift[5]),
        .I2(shift[4]),
        .I3(\rexp[7]_i_37_n_0 ),
        .I4(\msb[4]_i_2_n_0 ),
        .O(\rexp[1]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFB80000)) 
    \rexp[2]_i_1 
       (.I0(\rexp[2]_i_2_n_0 ),
        .I1(shift[0]),
        .I2(\rexp[2]_i_3_n_0 ),
        .I3(\rexp[7]_i_3_n_0 ),
        .I4(\rexp[7]_i_4_n_0 ),
        .I5(\rexp[2]_i_4_n_0 ),
        .O(\rexp[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair949" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rexp[2]_i_2 
       (.I0(\rexp[5]_i_4_n_0 ),
        .I1(shift[1]),
        .I2(\rexp[2]_i_5_n_0 ),
        .O(\rexp[2]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair949" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rexp[2]_i_3 
       (.I0(\rexp[4]_i_4_n_0 ),
        .I1(shift[1]),
        .I2(\rexp[2]_i_6_n_0 ),
        .O(\rexp[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000007F00)) 
    \rexp[2]_i_4 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(\rshift[4]_i_3_n_0 ),
        .I2(\rexp[7]_i_21_n_0 ),
        .I3(stateScore_reg_rep__0_n_0),
        .I4(linNotLog_reg_n_0),
        .I5(\msb[0]_i_1_n_0 ),
        .O(\rexp[2]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hBFB0BFBFBFB0B0B0)) 
    \rexp[2]_i_5 
       (.I0(\rexp[7]_i_26_n_0 ),
        .I1(\rexp[7]_i_27_n_0 ),
        .I2(shift[2]),
        .I3(\rexp[7]_i_29_n_0 ),
        .I4(shift[3]),
        .I5(\rexp[2]_i_7_n_0 ),
        .O(\rexp[2]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hB8B8B8B8FFCCFF00)) 
    \rexp[2]_i_6 
       (.I0(\rexp[7]_i_34_n_0 ),
        .I1(shift[3]),
        .I2(\rexp[6]_i_6_n_0 ),
        .I3(\rexp[2]_i_8_n_0 ),
        .I4(\rexp[2]_i_9_n_0 ),
        .I5(shift[2]),
        .O(\rexp[2]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rexp[2]_i_7 
       (.I0(\r_reg_n_0_[19] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[35] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[3] ),
        .O(\rexp[2]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \rexp[2]_i_8 
       (.I0(\r_reg_n_0_[2] ),
        .I1(shift[5]),
        .I2(\r_reg_n_0_[34] ),
        .I3(shift[4]),
        .I4(\r_reg_n_0_[18] ),
        .I5(shift[3]),
        .O(\rexp[2]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rexp[2]_i_9 
       (.I0(\r_reg_n_0_[26] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[42] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[10] ),
        .O(\rexp[2]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFF9F9999FF0F0000)) 
    \rexp[3]_i_1 
       (.I0(\msb[1]_i_1_n_0 ),
        .I1(\msb[0]_i_1_n_0 ),
        .I2(\rexp[3]_i_2_n_0 ),
        .I3(\rexp[7]_i_3_n_0 ),
        .I4(\rexp[7]_i_4_n_0 ),
        .I5(\rexp[7]_i_6_n_0 ),
        .O(\rexp[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h474700FF)) 
    \rexp[3]_i_2 
       (.I0(\rexp[6]_i_5_n_0 ),
        .I1(shift[1]),
        .I2(\rexp[4]_i_4_n_0 ),
        .I3(\rexp[2]_i_2_n_0 ),
        .I4(shift[0]),
        .O(\rexp[3]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hD0FFD0D0)) 
    \rexp[4]_i_1 
       (.I0(\rexp[4]_i_2_n_0 ),
        .I1(\rexp[7]_i_3_n_0 ),
        .I2(\rexp[7]_i_4_n_0 ),
        .I3(\rexp[4]_i_3_n_0 ),
        .I4(\rexp[7]_i_6_n_0 ),
        .O(\rexp[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8B8B8B8B00CC33FF)) 
    \rexp[4]_i_2 
       (.I0(\rexp[7]_i_8_n_0 ),
        .I1(shift[1]),
        .I2(\rexp[5]_i_4_n_0 ),
        .I3(\rexp[6]_i_5_n_0 ),
        .I4(\rexp[4]_i_4_n_0 ),
        .I5(shift[0]),
        .O(\rexp[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair858" *) 
  LUT3 #(
    .INIT(8'h56)) 
    \rexp[4]_i_3 
       (.I0(\msb[2]_i_1_n_0 ),
        .I1(\msb[0]_i_1_n_0 ),
        .I2(\msb[1]_i_1_n_0 ),
        .O(\rexp[4]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[4]_i_4 
       (.I0(\rexp[7]_i_30_n_0 ),
        .I1(shift[3]),
        .I2(\rexp[7]_i_31_n_0 ),
        .I3(shift[2]),
        .I4(\rexp[4]_i_5_n_0 ),
        .O(\rexp[4]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair951" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rexp[4]_i_5 
       (.I0(\rexp[7]_i_33_n_0 ),
        .I1(shift[3]),
        .I2(\rexp[4]_i_6_n_0 ),
        .O(\rexp[4]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair824" *) 
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rexp[4]_i_6 
       (.I0(\r_reg_n_0_[20] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[36] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[4] ),
        .O(\rexp[4]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hD0FFD0D0)) 
    \rexp[5]_i_1 
       (.I0(\rexp[5]_i_2_n_0 ),
        .I1(\rexp[7]_i_3_n_0 ),
        .I2(\rexp[7]_i_4_n_0 ),
        .I3(\rexp[5]_i_3_n_0 ),
        .I4(\rexp[7]_i_6_n_0 ),
        .O(\rexp[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00CC33FF8B8B8B8B)) 
    \rexp[5]_i_2 
       (.I0(\rexp[7]_i_8_n_0 ),
        .I1(shift[1]),
        .I2(\rexp[5]_i_4_n_0 ),
        .I3(\rexp[7]_i_9_n_0 ),
        .I4(\rexp[6]_i_5_n_0 ),
        .I5(shift[0]),
        .O(\rexp[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair830" *) 
  LUT4 #(
    .INIT(16'h0F1E)) 
    \rexp[5]_i_3 
       (.I0(\msb[1]_i_1_n_0 ),
        .I1(\msb[2]_i_1_n_0 ),
        .I2(\msb[3]_i_1_n_0 ),
        .I3(\msb[0]_i_1_n_0 ),
        .O(\rexp[5]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[5]_i_4 
       (.I0(\rexp[7]_i_22_n_0 ),
        .I1(shift[3]),
        .I2(\rexp[7]_i_23_n_0 ),
        .I3(shift[2]),
        .I4(\rexp[5]_i_5_n_0 ),
        .O(\rexp[5]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair951" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rexp[5]_i_5 
       (.I0(\rexp[7]_i_25_n_0 ),
        .I1(shift[3]),
        .I2(\rexp[5]_i_6_n_0 ),
        .O(\rexp[5]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair825" *) 
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rexp[5]_i_6 
       (.I0(\r_reg_n_0_[21] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[37] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[5] ),
        .O(\rexp[5]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hFF4F4444)) 
    \rexp[6]_i_1 
       (.I0(\rexp[6]_i_2_n_0 ),
        .I1(\rexp[6]_i_3_n_0 ),
        .I2(\rexp[6]_i_4_n_0 ),
        .I3(\rexp[7]_i_3_n_0 ),
        .I4(\rexp[7]_i_4_n_0 ),
        .O(\rexp[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair828" *) 
  LUT4 #(
    .INIT(16'hA6FF)) 
    \rexp[6]_i_2 
       (.I0(\msb[4]_i_2_n_0 ),
        .I1(\rexp[7]_i_21_n_0 ),
        .I2(\msb[0]_i_1_n_0 ),
        .I3(stateScore_reg_rep__0_n_0),
        .O(\rexp[6]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair784" *) 
  LUT5 #(
    .INIT(32'h0000007F)) 
    \rexp[6]_i_3 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(\rshift[4]_i_3_n_0 ),
        .I2(\rexp[7]_i_21_n_0 ),
        .I3(linNotLog_reg_n_0),
        .I4(\rexp[0]_i_5_n_0 ),
        .O(\rexp[6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hB8B8B8B800CC33FF)) 
    \rexp[6]_i_4 
       (.I0(\rexp[7]_i_7_n_0 ),
        .I1(shift[1]),
        .I2(\rexp[7]_i_8_n_0 ),
        .I3(\rexp[7]_i_9_n_0 ),
        .I4(\rexp[6]_i_5_n_0 ),
        .I5(shift[0]),
        .O(\rexp[6]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hFF00B8B8)) 
    \rexp[6]_i_5 
       (.I0(\rexp[7]_i_34_n_0 ),
        .I1(shift[3]),
        .I2(\rexp[6]_i_6_n_0 ),
        .I3(\rexp[7]_i_36_n_0 ),
        .I4(shift[2]),
        .O(\rexp[6]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair823" *) 
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rexp[6]_i_6 
       (.I0(\r_reg_n_0_[22] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[38] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[6] ),
        .O(\rexp[6]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFD0D0FFD0D0D0D0)) 
    \rexp[7]_i_1 
       (.I0(\rexp[7]_i_2_n_0 ),
        .I1(\rexp[7]_i_3_n_0 ),
        .I2(\rexp[7]_i_4_n_0 ),
        .I3(\msb[5]_i_3_n_0 ),
        .I4(\rexp[7]_i_5_n_0 ),
        .I5(\rexp[7]_i_6_n_0 ),
        .O(\rexp[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFD5DFFFFFD5D5555)) 
    \rexp[7]_i_10 
       (.I0(shift[1]),
        .I1(\rexp[7]_i_34_n_0 ),
        .I2(shift[3]),
        .I3(\rexp[7]_i_35_n_0 ),
        .I4(shift[2]),
        .I5(\rexp[7]_i_36_n_0 ),
        .O(\rexp[7]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hB2BBB2BB22B2B2BB)) 
    \rexp[7]_i_11 
       (.I0(\msb[2]_i_1_n_0 ),
        .I1(shift[2]),
        .I2(\msb[1]_i_1_n_0 ),
        .I3(shift[1]),
        .I4(shift[0]),
        .I5(\msb[0]_i_1_n_0 ),
        .O(\rexp[7]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair811" *) 
  LUT5 #(
    .INIT(32'h77777770)) 
    \rexp[7]_i_12 
       (.I0(\msb[3]_i_1_n_0 ),
        .I1(shift[3]),
        .I2(shift[0]),
        .I3(shift[1]),
        .I4(shift[2]),
        .O(\rexp[7]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair810" *) 
  LUT5 #(
    .INIT(32'h4444FF8F)) 
    \rexp[7]_i_13 
       (.I0(shift[4]),
        .I1(\msb[4]_i_2_n_0 ),
        .I2(\msb[3]_i_1_n_0 ),
        .I3(shift[3]),
        .I4(\rexp[7]_i_37_n_0 ),
        .O(\rexp[7]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h4444444011111115)) 
    \rexp[7]_i_14 
       (.I0(\msb[4]_i_2_n_0 ),
        .I1(shift[3]),
        .I2(shift[0]),
        .I3(shift[1]),
        .I4(shift[2]),
        .I5(shift[4]),
        .O(\rexp[7]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h9595959595959555)) 
    \rexp[7]_i_15 
       (.I0(shift[5]),
        .I1(shift[4]),
        .I2(shift[3]),
        .I3(shift[0]),
        .I4(shift[1]),
        .I5(shift[2]),
        .O(\rexp[7]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair810" *) 
  LUT4 #(
    .INIT(16'h444F)) 
    \rexp[7]_i_16 
       (.I0(shift[3]),
        .I1(\msb[3]_i_1_n_0 ),
        .I2(\msb[4]_i_2_n_0 ),
        .I3(shift[4]),
        .O(\rexp[7]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair950" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \rexp[7]_i_17 
       (.I0(shift[3]),
        .I1(\msb[3]_i_1_n_0 ),
        .O(\rexp[7]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair859" *) 
  LUT4 #(
    .INIT(16'hF888)) 
    \rexp[7]_i_18 
       (.I0(shift[5]),
        .I1(\msb[5]_i_3_n_0 ),
        .I2(shift[4]),
        .I3(\msb[4]_i_2_n_0 ),
        .O(\rexp[7]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair859" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \rexp[7]_i_19 
       (.I0(shift[5]),
        .I1(\msb[5]_i_3_n_0 ),
        .O(\rexp[7]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h0033FFFFB8B8B8B8)) 
    \rexp[7]_i_2 
       (.I0(\rexp[7]_i_7_n_0 ),
        .I1(shift[1]),
        .I2(\rexp[7]_i_8_n_0 ),
        .I3(\rexp[7]_i_9_n_0 ),
        .I4(\rexp[7]_i_10_n_0 ),
        .I5(shift[0]),
        .O(\rexp[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF40000000)) 
    \rexp[7]_i_20 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(\msb[4]_i_2_n_0 ),
        .I2(\rshift[5]_i_4_n_0 ),
        .I3(\msb[0]_i_1_n_0 ),
        .I4(\msb[3]_i_1_n_0 ),
        .I5(\rexp[7]_i_38_n_0 ),
        .O(\rexp[7]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair830" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \rexp[7]_i_21 
       (.I0(\msb[3]_i_1_n_0 ),
        .I1(\msb[2]_i_1_n_0 ),
        .I2(\msb[1]_i_1_n_0 ),
        .O(\rexp[7]_i_21_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[7]_i_22 
       (.I0(\r_reg_n_0_[1] ),
        .I1(shift[5]),
        .I2(\r_reg_n_0_[33] ),
        .I3(shift[4]),
        .I4(\r_reg_n_0_[17] ),
        .O(\rexp[7]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rexp[7]_i_23 
       (.I0(\r_reg_n_0_[25] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[41] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[9] ),
        .O(\rexp[7]_i_23_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair825" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[7]_i_24 
       (.I0(\r_reg_n_0_[5] ),
        .I1(shift[5]),
        .I2(\r_reg_n_0_[37] ),
        .I3(shift[4]),
        .I4(\r_reg_n_0_[21] ),
        .O(\rexp[7]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rexp[7]_i_25 
       (.I0(\r_reg_n_0_[29] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[45] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[13] ),
        .O(\rexp[7]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \rexp[7]_i_26 
       (.I0(\r_reg_n_0_[7] ),
        .I1(shift[5]),
        .I2(\r_reg_n_0_[39] ),
        .I3(shift[4]),
        .I4(\r_reg_n_0_[23] ),
        .I5(shift[3]),
        .O(\rexp[7]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h555557F7FFFF57F7)) 
    \rexp[7]_i_27 
       (.I0(shift[3]),
        .I1(\r_reg_n_0_[15] ),
        .I2(shift[5]),
        .I3(\r_reg_n_0_[47] ),
        .I4(shift[4]),
        .I5(\r_reg_n_0_[31] ),
        .O(\rexp[7]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \rexp[7]_i_28 
       (.I0(\r_reg_n_0_[19] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[35] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[3] ),
        .I5(shift[3]),
        .O(\rexp[7]_i_28_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rexp[7]_i_29 
       (.I0(\r_reg_n_0_[27] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[43] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[11] ),
        .O(\rexp[7]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'hFF0B0000FFFFFF0B)) 
    \rexp[7]_i_3 
       (.I0(\rexp[7]_i_11_n_0 ),
        .I1(\rexp[7]_i_12_n_0 ),
        .I2(\rexp[7]_i_13_n_0 ),
        .I3(\rexp[7]_i_14_n_0 ),
        .I4(\rexp[7]_i_15_n_0 ),
        .I5(\msb[5]_i_3_n_0 ),
        .O(\rexp[7]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[7]_i_30 
       (.I0(\r_reg_n_0_[0] ),
        .I1(shift[5]),
        .I2(\r_reg_n_0_[32] ),
        .I3(shift[4]),
        .I4(\r_reg_n_0_[16] ),
        .O(\rexp[7]_i_30_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rexp[7]_i_31 
       (.I0(\r_reg_n_0_[24] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[40] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[8] ),
        .O(\rexp[7]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair824" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[7]_i_32 
       (.I0(\r_reg_n_0_[4] ),
        .I1(shift[5]),
        .I2(\r_reg_n_0_[36] ),
        .I3(shift[4]),
        .I4(\r_reg_n_0_[20] ),
        .O(\rexp[7]_i_32_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rexp[7]_i_33 
       (.I0(\r_reg_n_0_[28] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[44] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[12] ),
        .O(\rexp[7]_i_33_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rexp[7]_i_34 
       (.I0(\r_reg_n_0_[30] ),
        .I1(shift[4]),
        .I2(\r_reg_n_0_[46] ),
        .I3(shift[5]),
        .I4(\r_reg_n_0_[14] ),
        .O(\rexp[7]_i_34_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair823" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[7]_i_35 
       (.I0(\r_reg_n_0_[6] ),
        .I1(shift[5]),
        .I2(\r_reg_n_0_[38] ),
        .I3(shift[4]),
        .I4(\r_reg_n_0_[22] ),
        .O(\rexp[7]_i_35_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair950" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rexp[7]_i_36 
       (.I0(\rexp[7]_i_39_n_0 ),
        .I1(shift[3]),
        .I2(\rexp[2]_i_9_n_0 ),
        .O(\rexp[7]_i_36_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair811" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \rexp[7]_i_37 
       (.I0(shift[3]),
        .I1(shift[0]),
        .I2(shift[1]),
        .I3(shift[2]),
        .O(\rexp[7]_i_37_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair963" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \rexp[7]_i_38 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(linNotLog_reg_n_0),
        .O(\rexp[7]_i_38_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rexp[7]_i_39 
       (.I0(\r_reg_n_0_[2] ),
        .I1(shift[5]),
        .I2(\r_reg_n_0_[34] ),
        .I3(shift[4]),
        .I4(\r_reg_n_0_[18] ),
        .O(\rexp[7]_i_39_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFFF00AE)) 
    \rexp[7]_i_4 
       (.I0(\rexp[7]_i_16_n_0 ),
        .I1(\rexp[7]_i_11_n_0 ),
        .I2(\rexp[7]_i_17_n_0 ),
        .I3(\rexp[7]_i_18_n_0 ),
        .I4(\rexp[7]_i_19_n_0 ),
        .I5(\rexp[7]_i_20_n_0 ),
        .O(\rexp[7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair828" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \rexp[7]_i_5 
       (.I0(\msb[4]_i_2_n_0 ),
        .I1(\rexp[7]_i_21_n_0 ),
        .I2(\msb[0]_i_1_n_0 ),
        .O(\rexp[7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000007F00000000)) 
    \rexp[7]_i_6 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(\rshift[4]_i_3_n_0 ),
        .I2(\rexp[7]_i_21_n_0 ),
        .I3(\rexp[0]_i_5_n_0 ),
        .I4(linNotLog_reg_n_0),
        .I5(stateScore_reg_rep__0_n_0),
        .O(\rexp[7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h0047CC473347FF47)) 
    \rexp[7]_i_7 
       (.I0(\rexp[7]_i_22_n_0 ),
        .I1(shift[3]),
        .I2(\rexp[7]_i_23_n_0 ),
        .I3(shift[2]),
        .I4(\rexp[7]_i_24_n_0 ),
        .I5(\rexp[7]_i_25_n_0 ),
        .O(\rexp[7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F000F44444444)) 
    \rexp[7]_i_8 
       (.I0(\rexp[7]_i_26_n_0 ),
        .I1(\rexp[7]_i_27_n_0 ),
        .I2(\rexp[7]_i_28_n_0 ),
        .I3(\rexp[7]_i_29_n_0 ),
        .I4(shift[3]),
        .I5(shift[2]),
        .O(\rexp[7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFF33CC00B8B8B8B8)) 
    \rexp[7]_i_9 
       (.I0(\rexp[7]_i_30_n_0 ),
        .I1(shift[3]),
        .I2(\rexp[7]_i_31_n_0 ),
        .I3(\rexp[7]_i_32_n_0 ),
        .I4(\rexp[7]_i_33_n_0 ),
        .I5(shift[2]),
        .O(\rexp[7]_i_9_n_0 ));
  FDCE \rexp_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rexp[0]_i_1_n_0 ),
        .Q(\rexp_reg_n_0_[0] ));
  FDCE \rexp_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rexp[1]_i_1_n_0 ),
        .Q(\rexp_reg_n_0_[1] ));
  MUXF7 \rexp_reg[1]_i_31 
       (.I0(\rexp[1]_i_37_n_0 ),
        .I1(\rexp[1]_i_38_n_0 ),
        .O(\rexp_reg[1]_i_31_n_0 ),
        .S(\rexp[1]_i_23_n_0 ));
  FDCE \rexp_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rexp[2]_i_1_n_0 ),
        .Q(\rexp_reg_n_0_[2] ));
  FDCE \rexp_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rexp[3]_i_1_n_0 ),
        .Q(\rexp_reg_n_0_[3] ));
  FDCE \rexp_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rexp[4]_i_1_n_0 ),
        .Q(\rexp_reg_n_0_[4] ));
  FDCE \rexp_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rexp[5]_i_1_n_0 ),
        .Q(\rexp_reg_n_0_[5] ));
  FDCE \rexp_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rexp[6]_i_1_n_0 ),
        .Q(\rexp_reg_n_0_[6] ));
  FDCE \rexp_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rexp[7]_i_1_n_0 ),
        .Q(\rexp_reg_n_0_[7] ));
  FDCE rng_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(rng_reg_2),
        .Q(rng_reg_0));
  FDCE #(
    .INIT(1'b0)) 
    \row0_reg[0] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [3]),
        .Q(row0[0]));
  FDCE #(
    .INIT(1'b0)) 
    \row0_reg[10] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [13]),
        .Q(row0[10]));
  FDCE #(
    .INIT(1'b0)) 
    \row0_reg[1] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [4]),
        .Q(row0[1]));
  FDCE #(
    .INIT(1'b0)) 
    \row0_reg[2] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [5]),
        .Q(row0[2]));
  FDCE #(
    .INIT(1'b0)) 
    \row0_reg[3] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [6]),
        .Q(row0[3]));
  FDCE #(
    .INIT(1'b0)) 
    \row0_reg[4] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [7]),
        .Q(row0[4]));
  FDCE #(
    .INIT(1'b0)) 
    \row0_reg[5] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [8]),
        .Q(row0[5]));
  FDCE #(
    .INIT(1'b0)) 
    \row0_reg[6] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [9]),
        .Q(row0[6]));
  FDCE #(
    .INIT(1'b0)) 
    \row0_reg[7] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [10]),
        .Q(row0[7]));
  FDCE #(
    .INIT(1'b0)) 
    \row0_reg[8] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [11]),
        .Q(row0[8]));
  FDCE #(
    .INIT(1'b0)) 
    \row0_reg[9] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [12]),
        .Q(row0[9]));
  FDPE #(
    .INIT(1'b0)) 
    \row1_reg[0] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\row1_reg[7]_0 [0]),
        .PRE(linNotLog_reg_0),
        .Q(row1[0]));
  FDPE #(
    .INIT(1'b0)) 
    \row1_reg[10] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\thd_reg[7]_0 [2]),
        .PRE(linNotLog_reg_0),
        .Q(row1[10]));
  FDPE #(
    .INIT(1'b0)) 
    \row1_reg[1] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\row1_reg[7]_0 [1]),
        .PRE(linNotLog_reg_0),
        .Q(row1[1]));
  FDCE #(
    .INIT(1'b0)) 
    \row1_reg[2] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\row1_reg[7]_0 [2]),
        .Q(row1[2]));
  FDPE #(
    .INIT(1'b0)) 
    \row1_reg[3] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\row1_reg[7]_0 [3]),
        .PRE(linNotLog_reg_0),
        .Q(row1[3]));
  FDPE #(
    .INIT(1'b0)) 
    \row1_reg[4] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\row1_reg[7]_0 [4]),
        .PRE(linNotLog_reg_0),
        .Q(row1[4]));
  FDCE #(
    .INIT(1'b0)) 
    \row1_reg[5] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\row1_reg[7]_0 [5]),
        .Q(row1[5]));
  FDPE #(
    .INIT(1'b0)) 
    \row1_reg[6] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\row1_reg[7]_0 [6]),
        .PRE(linNotLog_reg_0),
        .Q(row1[6]));
  FDPE #(
    .INIT(1'b0)) 
    \row1_reg[7] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\row1_reg[7]_0 [7]),
        .PRE(linNotLog_reg_0),
        .Q(row1[7]));
  FDPE #(
    .INIT(1'b0)) 
    \row1_reg[8] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\thd_reg[7]_0 [0]),
        .PRE(linNotLog_reg_0),
        .Q(row1[8]));
  FDCE #(
    .INIT(1'b0)) 
    \row1_reg[9] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [1]),
        .Q(row1[9]));
  (* SOFT_HLUTNM = "soft_lutpair802" *) 
  LUT4 #(
    .INIT(16'h00A8)) 
    \row_lcl[0]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(row_lcl_reg[0]),
        .O(p_0_in[0]));
  LUT4 #(
    .INIT(16'h4F5F)) 
    \row_lcl[10]_i_1 
       (.I0(\stateMaxsel_reg_n_0_[0] ),
        .I1(enCoobuf_reg_0),
        .I2(rng_reg_0),
        .I3(\stateMaxsel_reg_n_0_[1] ),
        .O(\row_lcl[10]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00A8A8A8A8000000)) 
    \row_lcl[10]_i_2 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(Q[6]),
        .I4(\row_lcl[10]_i_3_n_0 ),
        .I5(Q[7]),
        .O(p_0_in[10]));
  (* SOFT_HLUTNM = "soft_lutpair805" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \row_lcl[10]_i_3 
       (.I0(Q[4]),
        .I1(\row_lcl[9]_i_2_n_0 ),
        .I2(Q[3]),
        .I3(Q[5]),
        .O(\row_lcl[10]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h00A8A800)) 
    \row_lcl[1]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(row_lcl_reg[0]),
        .I4(row_lcl_reg[1]),
        .O(p_0_in[1]));
  LUT6 #(
    .INIT(64'h00A8A8A8A8000000)) 
    \row_lcl[2]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(row_lcl_reg[1]),
        .I4(row_lcl_reg[0]),
        .I5(row_lcl_reg[2]),
        .O(p_0_in[2]));
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \row_lcl[3]_i_1 
       (.I0(\col_lcl[8]__0_i_2_n_0 ),
        .I1(row_lcl_reg[0]),
        .I2(row_lcl_reg[1]),
        .I3(row_lcl_reg[2]),
        .I4(Q[0]),
        .O(p_0_in[3]));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \row_lcl[4]_i_1 
       (.I0(\col_lcl[8]__0_i_2_n_0 ),
        .I1(row_lcl_reg[2]),
        .I2(row_lcl_reg[1]),
        .I3(row_lcl_reg[0]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(p_0_in[4]));
  LUT5 #(
    .INIT(32'h00A8A800)) 
    \row_lcl[5]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\row_lcl[5]_i_2_n_0 ),
        .I4(Q[2]),
        .O(p_0_in[5]));
  LUT5 #(
    .INIT(32'h80000000)) 
    \row_lcl[5]_i_2 
       (.I0(Q[0]),
        .I1(row_lcl_reg[0]),
        .I2(row_lcl_reg[1]),
        .I3(row_lcl_reg[2]),
        .I4(Q[1]),
        .O(\row_lcl[5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00A8A800)) 
    \row_lcl[6]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\row_lcl[9]_i_2_n_0 ),
        .I4(Q[3]),
        .O(p_0_in[6]));
  LUT6 #(
    .INIT(64'h00A8A8A8A8000000)) 
    \row_lcl[7]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel_reg_n_0_[1] ),
        .I2(\stateMaxsel_reg_n_0_[0] ),
        .I3(\row_lcl[9]_i_2_n_0 ),
        .I4(Q[3]),
        .I5(Q[4]),
        .O(p_0_in[7]));
  (* SOFT_HLUTNM = "soft_lutpair805" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \row_lcl[8]_i_1 
       (.I0(\col_lcl[8]__0_i_2_n_0 ),
        .I1(Q[3]),
        .I2(\row_lcl[9]_i_2_n_0 ),
        .I3(Q[4]),
        .I4(Q[5]),
        .O(p_0_in[8]));
  LUT6 #(
    .INIT(64'h7FFF800000000000)) 
    \row_lcl[9]_i_1 
       (.I0(Q[4]),
        .I1(\row_lcl[9]_i_2_n_0 ),
        .I2(Q[3]),
        .I3(Q[5]),
        .I4(Q[6]),
        .I5(\col_lcl[8]__0_i_2_n_0 ),
        .O(\row_lcl[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \row_lcl[9]_i_2 
       (.I0(Q[1]),
        .I1(row_lcl_reg[2]),
        .I2(row_lcl_reg[1]),
        .I3(row_lcl_reg[0]),
        .I4(Q[0]),
        .I5(Q[2]),
        .O(\row_lcl[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \row_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\row_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(p_0_in[0]),
        .Q(row_lcl_reg[0]));
  FDCE #(
    .INIT(1'b0)) 
    \row_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\row_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(p_0_in[10]),
        .Q(Q[7]));
  FDCE #(
    .INIT(1'b0)) 
    \row_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\row_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(p_0_in[1]),
        .Q(row_lcl_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \row_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\row_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(p_0_in[2]),
        .Q(row_lcl_reg[2]));
  FDCE #(
    .INIT(1'b0)) 
    \row_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\row_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(p_0_in[3]),
        .Q(Q[0]));
  FDCE #(
    .INIT(1'b0)) 
    \row_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\row_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(p_0_in[4]),
        .Q(Q[1]));
  FDCE #(
    .INIT(1'b0)) 
    \row_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\row_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(p_0_in[5]),
        .Q(Q[2]));
  FDCE #(
    .INIT(1'b0)) 
    \row_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\row_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(p_0_in[6]),
        .Q(Q[3]));
  FDCE #(
    .INIT(1'b0)) 
    \row_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\row_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(p_0_in[7]),
        .Q(Q[4]));
  FDCE #(
    .INIT(1'b0)) 
    \row_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\row_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(p_0_in[8]),
        .Q(Q[5]));
  FDCE #(
    .INIT(1'b0)) 
    \row_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\row_lcl[10]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\row_lcl[9]_i_1_n_0 ),
        .Q(Q[6]));
  LUT2 #(
    .INIT(4'h2)) 
    \rshift[0]_i_1 
       (.I0(\rshift[4]_i_2_n_0 ),
        .I1(\msb[0]_i_1_n_0 ),
        .O(\rshift[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair857" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \rshift[1]_i_1 
       (.I0(\msb[1]_i_1_n_0 ),
        .I1(\msb[0]_i_1_n_0 ),
        .I2(\rshift[4]_i_2_n_0 ),
        .O(\rshift[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair857" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \rshift[2]_i_1 
       (.I0(\rshift[4]_i_2_n_0 ),
        .I1(\msb[0]_i_1_n_0 ),
        .I2(\msb[1]_i_1_n_0 ),
        .I3(\msb[2]_i_1_n_0 ),
        .O(\rshift[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair832" *) 
  LUT3 #(
    .INIT(8'h90)) 
    \rshift[3]_i_1 
       (.I0(\msb[3]_i_1_n_0 ),
        .I1(\rshift[5]_i_3_n_0 ),
        .I2(\rshift[4]_i_2_n_0 ),
        .O(\rshift[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair832" *) 
  LUT4 #(
    .INIT(16'h10E0)) 
    \rshift[4]_i_1 
       (.I0(\msb[3]_i_1_n_0 ),
        .I1(\rshift[5]_i_3_n_0 ),
        .I2(\rshift[4]_i_2_n_0 ),
        .I3(\msb[4]_i_2_n_0 ),
        .O(\rshift[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hA0F0F070F0F0F070)) 
    \rshift[4]_i_2 
       (.I0(\msb[5]_i_3_n_0 ),
        .I1(\rshift[4]_i_3_n_0 ),
        .I2(stateScore_reg_rep__0_n_0),
        .I3(\rshift[5]_i_3_n_0 ),
        .I4(\msb[3]_i_1_n_0 ),
        .I5(\msb[4]_i_2_n_0 ),
        .O(\rshift[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000055555155)) 
    \rshift[4]_i_3 
       (.I0(\msb[3]_i_3_n_0 ),
        .I1(\msb[4]_i_5_n_0 ),
        .I2(\rshift[4]_i_4_n_0 ),
        .I3(msb[4]),
        .I4(\msb[4]_i_3_n_0 ),
        .I5(\msb[3]_i_5_n_0 ),
        .O(\rshift[4]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair817" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \rshift[4]_i_4 
       (.I0(\r_reg_n_0_[0] ),
        .I1(\r_reg_n_0_[1] ),
        .O(\rshift[4]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'hB3)) 
    \rshift[5]_i_1 
       (.I0(ceScore),
        .I1(stateScore_reg_rep__0_n_0),
        .I2(linNotLog_reg_n_0),
        .O(\rshift[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00006F00)) 
    \rshift[5]_i_2 
       (.I0(\msb[3]_i_1_n_0 ),
        .I1(\rshift[5]_i_3_n_0 ),
        .I2(\msb[4]_i_2_n_0 ),
        .I3(stateScore_reg_rep__0_n_0),
        .I4(\msb[5]_i_3_n_0 ),
        .O(\rshift[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair807" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \rshift[5]_i_3 
       (.I0(\msb[0]_i_1_n_0 ),
        .I1(\rshift[5]_i_4_n_0 ),
        .O(\rshift[5]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair808" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \rshift[5]_i_4 
       (.I0(\msb[1]_i_1_n_0 ),
        .I1(\msb[2]_i_1_n_0 ),
        .O(\rshift[5]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \rshift_reg[0] 
       (.C(aclk_sig),
        .CE(\rshift[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rshift[0]_i_1_n_0 ),
        .Q(rshift__0[0]));
  FDCE #(
    .INIT(1'b0)) 
    \rshift_reg[1] 
       (.C(aclk_sig),
        .CE(\rshift[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rshift[1]_i_1_n_0 ),
        .Q(rshift__0[1]));
  FDCE #(
    .INIT(1'b0)) 
    \rshift_reg[2] 
       (.C(aclk_sig),
        .CE(\rshift[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rshift[2]_i_1_n_0 ),
        .Q(rshift__0[2]));
  FDCE #(
    .INIT(1'b0)) 
    \rshift_reg[3] 
       (.C(aclk_sig),
        .CE(\rshift[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rshift[3]_i_1_n_0 ),
        .Q(rshift__0[3]));
  FDCE #(
    .INIT(1'b0)) 
    \rshift_reg[4] 
       (.C(aclk_sig),
        .CE(\rshift[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rshift[4]_i_1_n_0 ),
        .Q(rshift__0[4]));
  FDCE #(
    .INIT(1'b0)) 
    \rshift_reg[5] 
       (.C(aclk_sig),
        .CE(\rshift[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\rshift[5]_i_2_n_0 ),
        .Q(rshift__0[5]));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax[0]_i_1 
       (.I0(scoreMax_lcl__0[0]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax[1]_i_1 
       (.I0(scoreMax_lcl__0[1]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax[2]_i_1 
       (.I0(scoreMax_lcl__0[2]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax[3]_i_1 
       (.I0(scoreMax_lcl__0[3]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax[4]_i_1 
       (.I0(scoreMax_lcl__0[4]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax[5]_i_1 
       (.I0(scoreMax_lcl__0[5]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax[6]_i_1 
       (.I0(scoreMax_lcl__0[6]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax[7]_i_1 
       (.I0(scoreMax_lcl__0[7]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax_lcl[0]_i_1 
       (.I0(\rexp_reg_n_0_[0] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax_lcl[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax_lcl[1]_i_1 
       (.I0(\rexp_reg_n_0_[1] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax_lcl[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax_lcl[2]_i_1 
       (.I0(\rexp_reg_n_0_[2] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax_lcl[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax_lcl[3]_i_1 
       (.I0(\rexp_reg_n_0_[3] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax_lcl[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax_lcl[4]_i_1 
       (.I0(\rexp_reg_n_0_[4] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax_lcl[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax_lcl[5]_i_1 
       (.I0(\rexp_reg_n_0_[5] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax_lcl[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax_lcl[6]_i_1 
       (.I0(\rexp_reg_n_0_[6] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax_lcl[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h555D555F5555555F)) 
    \scoreMax_lcl[7]_i_1 
       (.I0(rng_reg_0),
        .I1(scoreMax_lcl0),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(\stateImdstream_reg_n_0_[1] ),
        .I5(ceScore),
        .O(\scoreMax_lcl[7]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \scoreMax_lcl[7]_i_10 
       (.I0(scoreMax_lcl__0[3]),
        .I1(\rexp_reg_n_0_[3] ),
        .I2(scoreMax_lcl__0[2]),
        .I3(\rexp_reg_n_0_[2] ),
        .O(\scoreMax_lcl[7]_i_10_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \scoreMax_lcl[7]_i_11 
       (.I0(scoreMax_lcl__0[1]),
        .I1(\rexp_reg_n_0_[1] ),
        .I2(scoreMax_lcl__0[0]),
        .I3(\rexp_reg_n_0_[0] ),
        .O(\scoreMax_lcl[7]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \scoreMax_lcl[7]_i_2 
       (.I0(\rexp_reg_n_0_[7] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMax_lcl[7]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \scoreMax_lcl[7]_i_4 
       (.I0(\rexp_reg_n_0_[7] ),
        .I1(scoreMax_lcl__0[7]),
        .I2(\rexp_reg_n_0_[6] ),
        .I3(scoreMax_lcl__0[6]),
        .O(\scoreMax_lcl[7]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \scoreMax_lcl[7]_i_5 
       (.I0(\rexp_reg_n_0_[5] ),
        .I1(scoreMax_lcl__0[5]),
        .I2(\rexp_reg_n_0_[4] ),
        .I3(scoreMax_lcl__0[4]),
        .O(\scoreMax_lcl[7]_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \scoreMax_lcl[7]_i_6 
       (.I0(\rexp_reg_n_0_[3] ),
        .I1(scoreMax_lcl__0[3]),
        .I2(\rexp_reg_n_0_[2] ),
        .I3(scoreMax_lcl__0[2]),
        .O(\scoreMax_lcl[7]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \scoreMax_lcl[7]_i_7 
       (.I0(\rexp_reg_n_0_[1] ),
        .I1(scoreMax_lcl__0[1]),
        .I2(\rexp_reg_n_0_[0] ),
        .I3(scoreMax_lcl__0[0]),
        .O(\scoreMax_lcl[7]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \scoreMax_lcl[7]_i_8 
       (.I0(scoreMax_lcl__0[7]),
        .I1(\rexp_reg_n_0_[7] ),
        .I2(scoreMax_lcl__0[6]),
        .I3(\rexp_reg_n_0_[6] ),
        .O(\scoreMax_lcl[7]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \scoreMax_lcl[7]_i_9 
       (.I0(scoreMax_lcl__0[5]),
        .I1(\rexp_reg_n_0_[5] ),
        .I2(scoreMax_lcl__0[4]),
        .I3(\rexp_reg_n_0_[4] ),
        .O(\scoreMax_lcl[7]_i_9_n_0 ));
  FDCE \scoreMax_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\scoreMax_lcl[7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax_lcl[0]_i_1_n_0 ),
        .Q(scoreMax_lcl__0[0]));
  FDCE \scoreMax_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\scoreMax_lcl[7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax_lcl[1]_i_1_n_0 ),
        .Q(scoreMax_lcl__0[1]));
  FDCE \scoreMax_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\scoreMax_lcl[7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax_lcl[2]_i_1_n_0 ),
        .Q(scoreMax_lcl__0[2]));
  FDCE \scoreMax_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\scoreMax_lcl[7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax_lcl[3]_i_1_n_0 ),
        .Q(scoreMax_lcl__0[3]));
  FDCE \scoreMax_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\scoreMax_lcl[7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax_lcl[4]_i_1_n_0 ),
        .Q(scoreMax_lcl__0[4]));
  FDCE \scoreMax_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\scoreMax_lcl[7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax_lcl[5]_i_1_n_0 ),
        .Q(scoreMax_lcl__0[5]));
  FDCE \scoreMax_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\scoreMax_lcl[7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax_lcl[6]_i_1_n_0 ),
        .Q(scoreMax_lcl__0[6]));
  FDCE \scoreMax_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\scoreMax_lcl[7]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax_lcl[7]_i_2_n_0 ),
        .Q(scoreMax_lcl__0[7]));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \scoreMax_lcl_reg[7]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_scoreMax_lcl_reg[7]_i_3_CO_UNCONNECTED [7:4],scoreMax_lcl0,\scoreMax_lcl_reg[7]_i_3_n_5 ,\scoreMax_lcl_reg[7]_i_3_n_6 ,\scoreMax_lcl_reg[7]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,\scoreMax_lcl[7]_i_4_n_0 ,\scoreMax_lcl[7]_i_5_n_0 ,\scoreMax_lcl[7]_i_6_n_0 ,\scoreMax_lcl[7]_i_7_n_0 }),
        .O(\NLW_scoreMax_lcl_reg[7]_i_3_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,\scoreMax_lcl[7]_i_8_n_0 ,\scoreMax_lcl[7]_i_9_n_0 ,\scoreMax_lcl[7]_i_10_n_0 ,\scoreMax_lcl[7]_i_11_n_0 }));
  FDCE \scoreMax_reg[0] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax[0]_i_1_n_0 ),
        .Q(\scoreMax_reg[7]_0 [0]));
  FDCE \scoreMax_reg[1] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax[1]_i_1_n_0 ),
        .Q(\scoreMax_reg[7]_0 [1]));
  FDCE \scoreMax_reg[2] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax[2]_i_1_n_0 ),
        .Q(\scoreMax_reg[7]_0 [2]));
  FDCE \scoreMax_reg[3] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax[3]_i_1_n_0 ),
        .Q(\scoreMax_reg[7]_0 [3]));
  FDCE \scoreMax_reg[4] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax[4]_i_1_n_0 ),
        .Q(\scoreMax_reg[7]_0 [4]));
  FDCE \scoreMax_reg[5] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax[5]_i_1_n_0 ),
        .Q(\scoreMax_reg[7]_0 [5]));
  FDCE \scoreMax_reg[6] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax[6]_i_1_n_0 ),
        .Q(\scoreMax_reg[7]_0 [6]));
  FDCE \scoreMax_reg[7] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\scoreMax[7]_i_1_n_0 ),
        .Q(\scoreMax_reg[7]_0 [7]));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin[0]_i_1 
       (.I0(scoreMin_lcl__0[0]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin[1]_i_1 
       (.I0(scoreMin_lcl__0[1]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin[2]_i_1 
       (.I0(scoreMin_lcl__0[2]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin[3]_i_1 
       (.I0(scoreMin_lcl__0[3]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin[4]_i_1 
       (.I0(scoreMin_lcl__0[4]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin[5]_i_1 
       (.I0(scoreMin_lcl__0[5]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin[6]_i_1 
       (.I0(scoreMin_lcl__0[6]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin[7]_i_1 
       (.I0(scoreMin_lcl__0[7]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin_lcl[0]_i_1 
       (.I0(\rexp_reg_n_0_[0] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin_lcl[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin_lcl[1]_i_1 
       (.I0(\rexp_reg_n_0_[1] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin_lcl[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin_lcl[2]_i_1 
       (.I0(\rexp_reg_n_0_[2] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin_lcl[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin_lcl[3]_i_1 
       (.I0(\rexp_reg_n_0_[3] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin_lcl[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin_lcl[4]_i_1 
       (.I0(\rexp_reg_n_0_[4] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin_lcl[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin_lcl[5]_i_1 
       (.I0(\rexp_reg_n_0_[5] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin_lcl[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin_lcl[6]_i_1 
       (.I0(\rexp_reg_n_0_[6] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin_lcl[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h555D555F5555555F)) 
    \scoreMin_lcl[7]_i_1 
       (.I0(rng_reg_0),
        .I1(scoreMin_lcl0),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(\stateImdstream_reg_n_0_[1] ),
        .I5(ceScore),
        .O(\scoreMin_lcl[7]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \scoreMin_lcl[7]_i_10 
       (.I0(\rexp_reg_n_0_[3] ),
        .I1(scoreMin_lcl__0[3]),
        .I2(\rexp_reg_n_0_[2] ),
        .I3(scoreMin_lcl__0[2]),
        .O(\scoreMin_lcl[7]_i_10_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \scoreMin_lcl[7]_i_11 
       (.I0(\rexp_reg_n_0_[1] ),
        .I1(scoreMin_lcl__0[1]),
        .I2(\rexp_reg_n_0_[0] ),
        .I3(scoreMin_lcl__0[0]),
        .O(\scoreMin_lcl[7]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \scoreMin_lcl[7]_i_2 
       (.I0(\rexp_reg_n_0_[7] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\scoreMin_lcl[7]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \scoreMin_lcl[7]_i_4 
       (.I0(scoreMin_lcl__0[7]),
        .I1(\rexp_reg_n_0_[7] ),
        .I2(scoreMin_lcl__0[6]),
        .I3(\rexp_reg_n_0_[6] ),
        .O(\scoreMin_lcl[7]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \scoreMin_lcl[7]_i_5 
       (.I0(scoreMin_lcl__0[5]),
        .I1(\rexp_reg_n_0_[5] ),
        .I2(scoreMin_lcl__0[4]),
        .I3(\rexp_reg_n_0_[4] ),
        .O(\scoreMin_lcl[7]_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \scoreMin_lcl[7]_i_6 
       (.I0(scoreMin_lcl__0[3]),
        .I1(\rexp_reg_n_0_[3] ),
        .I2(scoreMin_lcl__0[2]),
        .I3(\rexp_reg_n_0_[2] ),
        .O(\scoreMin_lcl[7]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \scoreMin_lcl[7]_i_7 
       (.I0(scoreMin_lcl__0[1]),
        .I1(\rexp_reg_n_0_[1] ),
        .I2(scoreMin_lcl__0[0]),
        .I3(\rexp_reg_n_0_[0] ),
        .O(\scoreMin_lcl[7]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \scoreMin_lcl[7]_i_8 
       (.I0(\rexp_reg_n_0_[7] ),
        .I1(scoreMin_lcl__0[7]),
        .I2(\rexp_reg_n_0_[6] ),
        .I3(scoreMin_lcl__0[6]),
        .O(\scoreMin_lcl[7]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \scoreMin_lcl[7]_i_9 
       (.I0(\rexp_reg_n_0_[5] ),
        .I1(scoreMin_lcl__0[5]),
        .I2(\rexp_reg_n_0_[4] ),
        .I3(scoreMin_lcl__0[4]),
        .O(\scoreMin_lcl[7]_i_9_n_0 ));
  FDPE \scoreMin_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\scoreMin_lcl[7]_i_1_n_0 ),
        .D(\scoreMin_lcl[0]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(scoreMin_lcl__0[0]));
  FDPE \scoreMin_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\scoreMin_lcl[7]_i_1_n_0 ),
        .D(\scoreMin_lcl[1]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(scoreMin_lcl__0[1]));
  FDPE \scoreMin_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\scoreMin_lcl[7]_i_1_n_0 ),
        .D(\scoreMin_lcl[2]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(scoreMin_lcl__0[2]));
  FDPE \scoreMin_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\scoreMin_lcl[7]_i_1_n_0 ),
        .D(\scoreMin_lcl[3]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(scoreMin_lcl__0[3]));
  FDPE \scoreMin_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\scoreMin_lcl[7]_i_1_n_0 ),
        .D(\scoreMin_lcl[4]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(scoreMin_lcl__0[4]));
  FDPE \scoreMin_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\scoreMin_lcl[7]_i_1_n_0 ),
        .D(\scoreMin_lcl[5]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(scoreMin_lcl__0[5]));
  FDPE \scoreMin_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\scoreMin_lcl[7]_i_1_n_0 ),
        .D(\scoreMin_lcl[6]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(scoreMin_lcl__0[6]));
  FDPE \scoreMin_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\scoreMin_lcl[7]_i_1_n_0 ),
        .D(\scoreMin_lcl[7]_i_2_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(scoreMin_lcl__0[7]));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \scoreMin_lcl_reg[7]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_scoreMin_lcl_reg[7]_i_3_CO_UNCONNECTED [7:4],scoreMin_lcl0,\scoreMin_lcl_reg[7]_i_3_n_5 ,\scoreMin_lcl_reg[7]_i_3_n_6 ,\scoreMin_lcl_reg[7]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,\scoreMin_lcl[7]_i_4_n_0 ,\scoreMin_lcl[7]_i_5_n_0 ,\scoreMin_lcl[7]_i_6_n_0 ,\scoreMin_lcl[7]_i_7_n_0 }),
        .O(\NLW_scoreMin_lcl_reg[7]_i_3_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,\scoreMin_lcl[7]_i_8_n_0 ,\scoreMin_lcl[7]_i_9_n_0 ,\scoreMin_lcl[7]_i_10_n_0 ,\scoreMin_lcl[7]_i_11_n_0 }));
  FDPE \scoreMin_reg[0] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .D(\scoreMin[0]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(\scoreMin_reg[7]_0 [0]));
  FDPE \scoreMin_reg[1] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .D(\scoreMin[1]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(\scoreMin_reg[7]_0 [1]));
  FDPE \scoreMin_reg[2] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .D(\scoreMin[2]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(\scoreMin_reg[7]_0 [2]));
  FDPE \scoreMin_reg[3] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .D(\scoreMin[3]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(\scoreMin_reg[7]_0 [3]));
  FDPE \scoreMin_reg[4] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .D(\scoreMin[4]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(\scoreMin_reg[7]_0 [4]));
  FDPE \scoreMin_reg[5] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .D(\scoreMin[5]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(\scoreMin_reg[7]_0 [5]));
  FDPE \scoreMin_reg[6] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .D(\scoreMin[6]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(\scoreMin_reg[7]_0 [6]));
  FDPE \scoreMin_reg[7] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .D(\scoreMin[7]_i_1_n_0 ),
        .PRE(linNotLog_reg_0),
        .Q(\scoreMin_reg[7]_0 [7]));
  (* SOFT_HLUTNM = "soft_lutpair800" *) 
  LUT5 #(
    .INIT(32'h08080888)) 
    \shift[0]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(shift_lcl__0[0]),
        .I2(shift_lcl__0[5]),
        .I3(shift_lcl__0[4]),
        .I4(shift_lcl__0[3]),
        .O(\shift[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h08080888)) 
    \shift[1]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(shift_lcl__0[1]),
        .I2(shift_lcl__0[5]),
        .I3(shift_lcl__0[4]),
        .I4(shift_lcl__0[3]),
        .O(\shift[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h08080888)) 
    \shift[2]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(shift_lcl__0[2]),
        .I2(shift_lcl__0[5]),
        .I3(shift_lcl__0[4]),
        .I4(shift_lcl__0[3]),
        .O(\shift[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair800" *) 
  LUT4 #(
    .INIT(16'hAA80)) 
    \shift[3]_i_1 
       (.I0(\stateImdstream[0]_i_3_n_0 ),
        .I1(shift_lcl__0[5]),
        .I2(shift_lcl__0[4]),
        .I3(shift_lcl__0[3]),
        .O(\shift[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FE000000)) 
    \shift[4]_i_1 
       (.I0(\stateImdstream_reg_n_0_[1] ),
        .I1(p_1_in),
        .I2(\stateImdstream_reg_n_0_[0] ),
        .I3(rng_reg_0),
        .I4(shift_lcl__0[4]),
        .I5(shift_lcl__0[5]),
        .O(\shift[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h555555DF)) 
    \shift[5]_i_1 
       (.I0(rng_reg_0),
        .I1(\tkst_reg[0]_0 ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(\stateImdstream_reg_n_0_[1] ),
        .O(scoreMax));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \shift[5]_i_2 
       (.I0(shift_lcl__0[5]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\shift[5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \shift_lcl[0]_i_1 
       (.I0(rshift__0[0]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\shift_lcl[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \shift_lcl[1]_i_1 
       (.I0(rshift__0[1]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\shift_lcl[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \shift_lcl[2]_i_1 
       (.I0(rshift__0[2]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\shift_lcl[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \shift_lcl[3]_i_1 
       (.I0(rshift__0[3]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\shift_lcl[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \shift_lcl[4]_i_1 
       (.I0(rshift__0[4]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\shift_lcl[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAABFFFF)) 
    \shift_lcl[5]_i_1 
       (.I0(\shift_lcl[5]_i_3_n_0 ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\shift_lcl[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAAA80000)) 
    \shift_lcl[5]_i_2 
       (.I0(rshift__0[5]),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .O(\shift_lcl[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000F4FF00F4)) 
    \shift_lcl[5]_i_3 
       (.I0(shift_lcl__0[4]),
        .I1(rshift__0[4]),
        .I2(\shift_lcl[5]_i_4_n_0 ),
        .I3(shift_lcl__0[5]),
        .I4(rshift__0[5]),
        .I5(\aImdbuf[10]_i_4_n_0 ),
        .O(\shift_lcl[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFFF4F44)) 
    \shift_lcl[5]_i_4 
       (.I0(shift_lcl__0[3]),
        .I1(rshift__0[3]),
        .I2(shift_lcl__0[2]),
        .I3(rshift__0[2]),
        .I4(\shift_lcl[5]_i_5_n_0 ),
        .I5(\shift_lcl[5]_i_6_n_0 ),
        .O(\shift_lcl[5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h40F4000040F440F4)) 
    \shift_lcl[5]_i_5 
       (.I0(shift_lcl__0[0]),
        .I1(rshift__0[0]),
        .I2(rshift__0[1]),
        .I3(shift_lcl__0[1]),
        .I4(rshift__0[2]),
        .I5(shift_lcl__0[2]),
        .O(\shift_lcl[5]_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h4F44)) 
    \shift_lcl[5]_i_6 
       (.I0(rshift__0[3]),
        .I1(shift_lcl__0[3]),
        .I2(rshift__0[4]),
        .I3(shift_lcl__0[4]),
        .O(\shift_lcl[5]_i_6_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \shift_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\shift_lcl[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\shift_lcl[0]_i_1_n_0 ),
        .Q(shift_lcl__0[0]));
  FDCE #(
    .INIT(1'b0)) 
    \shift_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\shift_lcl[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\shift_lcl[1]_i_1_n_0 ),
        .Q(shift_lcl__0[1]));
  FDCE #(
    .INIT(1'b0)) 
    \shift_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\shift_lcl[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\shift_lcl[2]_i_1_n_0 ),
        .Q(shift_lcl__0[2]));
  FDCE #(
    .INIT(1'b0)) 
    \shift_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\shift_lcl[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\shift_lcl[3]_i_1_n_0 ),
        .Q(shift_lcl__0[3]));
  FDCE #(
    .INIT(1'b0)) 
    \shift_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\shift_lcl[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\shift_lcl[4]_i_1_n_0 ),
        .Q(shift_lcl__0[4]));
  FDCE #(
    .INIT(1'b0)) 
    \shift_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\shift_lcl[5]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\shift_lcl[5]_i_2_n_0 ),
        .Q(shift_lcl__0[5]));
  FDCE #(
    .INIT(1'b0)) 
    \shift_reg[0] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\shift[0]_i_1_n_0 ),
        .Q(shift[0]));
  FDCE #(
    .INIT(1'b0)) 
    \shift_reg[1] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\shift[1]_i_1_n_0 ),
        .Q(shift[1]));
  FDCE #(
    .INIT(1'b0)) 
    \shift_reg[2] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\shift[2]_i_1_n_0 ),
        .Q(shift[2]));
  FDCE #(
    .INIT(1'b0)) 
    \shift_reg[3] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\shift[3]_i_1_n_0 ),
        .Q(shift[3]));
  FDCE #(
    .INIT(1'b0)) 
    \shift_reg[4] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\shift[4]_i_1_n_0 ),
        .Q(shift[4]));
  FDCE #(
    .INIT(1'b0)) 
    \shift_reg[5] 
       (.C(aclk_sig),
        .CE(scoreMax),
        .CLR(linNotLog_reg_0),
        .D(\shift[5]_i_2_n_0 ),
        .Q(shift[5]));
  LUT6 #(
    .INIT(64'hBAFFBA00BE00BE00)) 
    \stateCorner[0]_i_1 
       (.I0(\stateCorner[0]_i_2_n_0 ),
        .I1(stateCorner[1]),
        .I2(stateCorner[0]),
        .I3(rng_reg_1),
        .I4(rng_reg_0),
        .I5(\tkst_reg[0]_0 ),
        .O(\stateCorner[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair829" *) 
  LUT3 #(
    .INIT(8'h02)) 
    \stateCorner[0]_i_2 
       (.I0(stateCorner[1]),
        .I1(stateCorner[0]),
        .I2(\stateCorner[1]_i_4_n_0 ),
        .O(\stateCorner[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF00040F0F0F040F0)) 
    \stateCorner[1]_i_1 
       (.I0(\stateCorner_reg[1]_0 ),
        .I1(grayVideoinToManyAXIS_tlast),
        .I2(rng_reg_1),
        .I3(stateCorner[0]),
        .I4(stateCorner[1]),
        .I5(\stateCorner[1]_i_4_n_0 ),
        .O(\stateCorner[1]_i_1_n_0 ));
  LUT3 #(
    .INIT(8'hA8)) 
    \stateCorner[1]_i_3 
       (.I0(rng_reg_0),
        .I1(stateCorner[0]),
        .I2(stateCorner[1]),
        .O(rng_reg_1));
  LUT6 #(
    .INIT(64'h0010000000000100)) 
    \stateCorner[1]_i_4 
       (.I0(\stateCorner[1]_i_5_n_0 ),
        .I1(\stateCorner[1]_i_6_n_0 ),
        .I2(postcol_lcl__0[3]),
        .I3(postcol_lcl__0[1]),
        .I4(postcol_lcl__0[4]),
        .I5(lat),
        .O(\stateCorner[1]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateCorner[1]_i_5 
       (.I0(postcol_lcl__0[5]),
        .I1(postcol_lcl__0[0]),
        .I2(postcol_lcl__0[10]),
        .I3(postcol_lcl__0[2]),
        .O(\stateCorner[1]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair821" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateCorner[1]_i_6 
       (.I0(postcol_lcl__0[7]),
        .I1(postcol_lcl__0[6]),
        .I2(postcol_lcl__0[9]),
        .I3(postcol_lcl__0[8]),
        .O(\stateCorner[1]_i_6_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateCorner_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(\stateCorner[0]_i_1_n_0 ),
        .Q(stateCorner[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateCorner_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(\stateCorner[1]_i_1_n_0 ),
        .Q(stateCorner[1]));
  LUT6 #(
    .INIT(64'h4474FFFF44740000)) 
    \stateImdstream[0]_i_1 
       (.I0(\tkst_reg[0]_0 ),
        .I1(p_1_in),
        .I2(\stateImdstream[0]_i_2_n_0 ),
        .I3(\stateImdstream[1]_i_2_n_0 ),
        .I4(\stateImdstream[0]_i_3_n_0 ),
        .I5(\stateImdstream[0]_i_4_n_0 ),
        .O(\stateImdstream[0]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hF8FB)) 
    \stateImdstream[0]_i_2 
       (.I0(\aImdbufB_reg[0]_0 ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(\stateImdstream_reg_n_0_[0] ),
        .I3(\tkst_reg[0]_0 ),
        .O(\stateImdstream[0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair797" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \stateImdstream[0]_i_3 
       (.I0(rng_reg_0),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(p_1_in),
        .I3(\stateImdstream_reg_n_0_[1] ),
        .O(\stateImdstream[0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair856" *) 
  LUT4 #(
    .INIT(16'h8088)) 
    \stateImdstream[0]_i_4 
       (.I0(\tkst_reg[0]_0 ),
        .I1(rng_reg_0),
        .I2(\tixVState_reg[1]_0 [0]),
        .I3(\tixVState_reg[1]_0 [1]),
        .O(\stateImdstream[0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h00000000F8C80000)) 
    \stateImdstream[1]_i_1 
       (.I0(\aImdbufB_reg[0]_0 ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .I2(\stateImdstream[1]_i_2_n_0 ),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(rng_reg_0),
        .I5(p_1_in),
        .O(\stateImdstream[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEAAAAAABAAAAAAAA)) 
    \stateImdstream[1]_i_2 
       (.I0(\stateImdstream[1]_i_3_n_0 ),
        .I1(lat),
        .I2(\col_lcl_reg[10]_0 [2]),
        .I3(\col_lcl_reg[10]_0 [4]),
        .I4(\col_lcl_reg[10]_0 [1]),
        .I5(\stateImdstream[1]_i_4_n_0 ),
        .O(\stateImdstream[1]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair799" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \stateImdstream[1]_i_3 
       (.I0(\stateImdstream_reg_n_0_[0] ),
        .I1(\stateImdstream_reg_n_0_[1] ),
        .O(\stateImdstream[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000010000)) 
    \stateImdstream[1]_i_4 
       (.I0(\col_lcl_reg[10]_0 [3]),
        .I1(\col_lcl_reg[10]_0 [5]),
        .I2(\col_lcl_reg[10]_0 [0]),
        .I3(\col_lcl_reg[10]_0 [8]),
        .I4(\stateImdstream_reg_n_0_[0] ),
        .I5(\aImdbuf[10]_i_8_n_0 ),
        .O(\stateImdstream[1]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h555FFDDF)) 
    \stateImdstream[2]_i_1 
       (.I0(rng_reg_0),
        .I1(ceScore),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(\stateImdstream_reg_n_0_[0] ),
        .I4(p_1_in),
        .O(\stateImdstream[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00001000)) 
    \stateImdstream[2]_i_2 
       (.I0(p_1_in),
        .I1(\stateImdstream_reg_n_0_[0] ),
        .I2(\stateImdstream_reg_n_0_[1] ),
        .I3(rng_reg_0),
        .I4(\aImdbufB_reg[0]_0 ),
        .O(\stateImdstream[2]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateImdstream_reg[0] 
       (.C(aclk_sig),
        .CE(\stateImdstream[2]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\stateImdstream[0]_i_1_n_0 ),
        .Q(\stateImdstream_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateImdstream_reg[1] 
       (.C(aclk_sig),
        .CE(\stateImdstream[2]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\stateImdstream[1]_i_1_n_0 ),
        .Q(\stateImdstream_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateImdstream_reg[2] 
       (.C(aclk_sig),
        .CE(\stateImdstream[2]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\stateImdstream[2]_i_2_n_0 ),
        .Q(p_1_in));
  LUT6 #(
    .INIT(64'hFFE4FF00FF00FF00)) 
    \stateMaxsel[0]_i_1 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(enCoobuf_reg_0),
        .I3(tkst),
        .I4(rng_reg_0),
        .I5(\stateMaxsel[1]_i_3_n_0 ),
        .O(\stateMaxsel[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFBDDB6FF6FFFF)) 
    \stateMaxsel[0]_i_10 
       (.I0(row_lcl_reg[1]),
        .I1(NRowRaw[1]),
        .I2(row_lcl_reg[2]),
        .I3(NRowRaw[2]),
        .I4(NRowRaw[0]),
        .I5(row_lcl_reg[0]),
        .O(\row_lcl_reg[1]_0 ));
  LUT3 #(
    .INIT(8'h7F)) 
    \stateMaxsel[1]_i_1 
       (.I0(\stateMaxsel_reg_n_0_[1] ),
        .I1(\stateMaxsel_reg_n_0_[0] ),
        .I2(rng_reg_0),
        .O(\stateMaxsel[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair856" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateMaxsel[1]_i_2 
       (.I0(rng_reg_0),
        .I1(\stateMaxsel[1]_i_3_n_0 ),
        .O(\stateMaxsel[1]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hDFFF)) 
    \stateMaxsel[1]_i_3 
       (.I0(\i[1]_i_3_n_0 ),
        .I1(i__0[0]),
        .I2(i__0[1]),
        .I3(postNotLive_reg_n_0),
        .O(\stateMaxsel[1]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateMaxsel_reg[0] 
       (.C(aclk_sig),
        .CE(\stateMaxsel[1]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\stateMaxsel[0]_i_1_n_0 ),
        .Q(\stateMaxsel_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateMaxsel_reg[1] 
       (.C(aclk_sig),
        .CE(\stateMaxsel[1]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\stateMaxsel[1]_i_2_n_0 ),
        .Q(\stateMaxsel_reg_n_0_[1] ));
  (* SOFT_HLUTNM = "soft_lutpair833" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    \stateOp[1]_i_1 
       (.I0(\stateOp_reg[1]_0 [0]),
        .I1(vsync_last_reg_0),
        .I2(rng_reg_0),
        .I3(\stateOp_reg[1]_0 [1]),
        .O(stateOp));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(linNotLog_reg_0),
        .D(\stateOp_reg[0]_0 ),
        .Q(\stateOp_reg[1]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(linNotLog_reg_0),
        .D(stateOp),
        .Q(\stateOp_reg[1]_0 [1]));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__0
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__0_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__1
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__1_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__10
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__10_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__11
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__11_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__12
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__12_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__13
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__13_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__14
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__14_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__15
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__15_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__16
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__16_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__17
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__17_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__18
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__18_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__2
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__2_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__3
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__3_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__4
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__4_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__5
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__5_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__6
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__6_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__7
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__7_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__8
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__8_n_0));
  (* ORIG_CELL_NAME = "stateScore_reg" *) 
  FDCE stateScore_reg_rep__9
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(1'b1),
        .Q(stateScore_reg_rep__9_n_0));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[15]_i_10 
       (.I0(\sumY_reg_n_0_[15] ),
        .I1(sumX[15]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[15]_i_11 
       (.I0(\sumY_reg_n_0_[14] ),
        .I1(sumX[14]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[15]_i_12 
       (.I0(\sumY_reg_n_0_[13] ),
        .I1(sumX[13]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[15]_i_13 
       (.I0(\sumY_reg_n_0_[12] ),
        .I1(sumX[12]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[15]_i_14 
       (.I0(\sumY_reg_n_0_[11] ),
        .I1(sumX[11]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[15]_i_15 
       (.I0(\sumY_reg_n_0_[10] ),
        .I1(sumX[10]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[15]_i_16 
       (.I0(\sumY_reg_n_0_[9] ),
        .I1(sumX[9]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[15]_i_17 
       (.I0(\sumY_reg_n_0_[8] ),
        .I1(sumX[8]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[15]_i_2 
       (.I0(\sumY_reg_n_0_[15] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[15]_i_3 
       (.I0(\sumY_reg_n_0_[14] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[15]_i_4 
       (.I0(\sumY_reg_n_0_[13] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[15]_i_5 
       (.I0(\sumY_reg_n_0_[12] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[15]_i_6 
       (.I0(\sumY_reg_n_0_[11] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[15]_i_7 
       (.I0(\sumY_reg_n_0_[10] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[15]_i_8 
       (.I0(\sumY_reg_n_0_[9] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[15]_i_9 
       (.I0(\sumY_reg_n_0_[8] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[23]_i_10 
       (.I0(\sumY_reg_n_0_[22] ),
        .I1(sumX[22]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[23]_i_11 
       (.I0(\sumY_reg_n_0_[21] ),
        .I1(sumX[21]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[23]_i_12 
       (.I0(\sumY_reg_n_0_[20] ),
        .I1(sumX[20]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[23]_i_13 
       (.I0(\sumY_reg_n_0_[19] ),
        .I1(sumX[19]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[23]_i_14 
       (.I0(\sumY_reg_n_0_[18] ),
        .I1(sumX[18]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[23]_i_15 
       (.I0(\sumY_reg_n_0_[17] ),
        .I1(sumX[17]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[23]_i_16 
       (.I0(\sumY_reg_n_0_[16] ),
        .I1(sumX[16]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[23]_i_2 
       (.I0(\sumY_reg_n_0_[22] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[23]_i_3 
       (.I0(\sumY_reg_n_0_[21] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[23]_i_4 
       (.I0(\sumY_reg_n_0_[20] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[23]_i_5 
       (.I0(\sumY_reg_n_0_[19] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[23]_i_6 
       (.I0(\sumY_reg_n_0_[18] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[23]_i_7 
       (.I0(\sumY_reg_n_0_[17] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[23]_i_8 
       (.I0(\sumY_reg_n_0_[16] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[23]_i_9 
       (.I0(\sumY_reg_n_0_[22] ),
        .I1(sumX[22]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[23]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[7]_i_10 
       (.I0(\sumY_reg_n_0_[7] ),
        .I1(sumX[7]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[7]_i_11 
       (.I0(\sumY_reg_n_0_[6] ),
        .I1(sumX[6]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[7]_i_12 
       (.I0(\sumY_reg_n_0_[5] ),
        .I1(sumX[5]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[7]_i_13 
       (.I0(\sumY_reg_n_0_[4] ),
        .I1(sumX[4]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[7]_i_14 
       (.I0(\sumY_reg_n_0_[3] ),
        .I1(sumX[3]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[7]_i_15 
       (.I0(\sumY_reg_n_0_[2] ),
        .I1(sumX[2]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[7]_i_16 
       (.I0(\sumY_reg_n_0_[1] ),
        .I1(sumX[1]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumIII[7]_i_17 
       (.I0(\sumY_reg_n_0_[0] ),
        .I1(sumX[0]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[7]_i_2 
       (.I0(\sumY_reg_n_0_[7] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[7]_i_3 
       (.I0(\sumY_reg_n_0_[6] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[7]_i_4 
       (.I0(\sumY_reg_n_0_[5] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[7]_i_5 
       (.I0(\sumY_reg_n_0_[4] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[7]_i_6 
       (.I0(\sumY_reg_n_0_[3] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[7]_i_7 
       (.I0(\sumY_reg_n_0_[2] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[7]_i_8 
       (.I0(\sumY_reg_n_0_[1] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumIII[7]_i_9 
       (.I0(\sumY_reg_n_0_[0] ),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumIII[7]_i_9_n_0 ));
  FDCE \sumIII_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[7]_i_1_n_15 ),
        .Q(sumIII[0]));
  FDCE \sumIII_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[15]_i_1_n_13 ),
        .Q(sumIII[10]));
  FDCE \sumIII_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[15]_i_1_n_12 ),
        .Q(sumIII[11]));
  FDCE \sumIII_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[15]_i_1_n_11 ),
        .Q(sumIII[12]));
  FDCE \sumIII_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[15]_i_1_n_10 ),
        .Q(sumIII[13]));
  FDCE \sumIII_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[15]_i_1_n_9 ),
        .Q(sumIII[14]));
  FDCE \sumIII_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[15]_i_1_n_8 ),
        .Q(sumIII[15]));
  CARRY8 \sumIII_reg[15]_i_1 
       (.CI(\sumIII_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumIII_reg[15]_i_1_n_0 ,\sumIII_reg[15]_i_1_n_1 ,\sumIII_reg[15]_i_1_n_2 ,\sumIII_reg[15]_i_1_n_3 ,\sumIII_reg[15]_i_1_n_4 ,\sumIII_reg[15]_i_1_n_5 ,\sumIII_reg[15]_i_1_n_6 ,\sumIII_reg[15]_i_1_n_7 }),
        .DI({\sumIII[15]_i_2_n_0 ,\sumIII[15]_i_3_n_0 ,\sumIII[15]_i_4_n_0 ,\sumIII[15]_i_5_n_0 ,\sumIII[15]_i_6_n_0 ,\sumIII[15]_i_7_n_0 ,\sumIII[15]_i_8_n_0 ,\sumIII[15]_i_9_n_0 }),
        .O({\sumIII_reg[15]_i_1_n_8 ,\sumIII_reg[15]_i_1_n_9 ,\sumIII_reg[15]_i_1_n_10 ,\sumIII_reg[15]_i_1_n_11 ,\sumIII_reg[15]_i_1_n_12 ,\sumIII_reg[15]_i_1_n_13 ,\sumIII_reg[15]_i_1_n_14 ,\sumIII_reg[15]_i_1_n_15 }),
        .S({\sumIII[15]_i_10_n_0 ,\sumIII[15]_i_11_n_0 ,\sumIII[15]_i_12_n_0 ,\sumIII[15]_i_13_n_0 ,\sumIII[15]_i_14_n_0 ,\sumIII[15]_i_15_n_0 ,\sumIII[15]_i_16_n_0 ,\sumIII[15]_i_17_n_0 }));
  FDCE \sumIII_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[23]_i_1_n_15 ),
        .Q(sumIII[16]));
  FDCE \sumIII_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[23]_i_1_n_14 ),
        .Q(sumIII[17]));
  FDCE \sumIII_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[23]_i_1_n_13 ),
        .Q(sumIII[18]));
  FDCE \sumIII_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[23]_i_1_n_12 ),
        .Q(sumIII[19]));
  FDCE \sumIII_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[7]_i_1_n_14 ),
        .Q(sumIII[1]));
  FDCE \sumIII_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[23]_i_1_n_11 ),
        .Q(sumIII[20]));
  FDCE \sumIII_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[23]_i_1_n_10 ),
        .Q(sumIII[21]));
  FDCE \sumIII_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[23]_i_1_n_9 ),
        .Q(sumIII[22]));
  FDCE \sumIII_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[23]_i_1_n_8 ),
        .Q(sumIII[23]));
  CARRY8 \sumIII_reg[23]_i_1 
       (.CI(\sumIII_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumIII_reg[23]_i_1_CO_UNCONNECTED [7],\sumIII_reg[23]_i_1_n_1 ,\sumIII_reg[23]_i_1_n_2 ,\sumIII_reg[23]_i_1_n_3 ,\sumIII_reg[23]_i_1_n_4 ,\sumIII_reg[23]_i_1_n_5 ,\sumIII_reg[23]_i_1_n_6 ,\sumIII_reg[23]_i_1_n_7 }),
        .DI({1'b0,\sumIII[23]_i_2_n_0 ,\sumIII[23]_i_3_n_0 ,\sumIII[23]_i_4_n_0 ,\sumIII[23]_i_5_n_0 ,\sumIII[23]_i_6_n_0 ,\sumIII[23]_i_7_n_0 ,\sumIII[23]_i_8_n_0 }),
        .O({\sumIII_reg[23]_i_1_n_8 ,\sumIII_reg[23]_i_1_n_9 ,\sumIII_reg[23]_i_1_n_10 ,\sumIII_reg[23]_i_1_n_11 ,\sumIII_reg[23]_i_1_n_12 ,\sumIII_reg[23]_i_1_n_13 ,\sumIII_reg[23]_i_1_n_14 ,\sumIII_reg[23]_i_1_n_15 }),
        .S({\sumIII[23]_i_9_n_0 ,\sumIII[23]_i_10_n_0 ,\sumIII[23]_i_11_n_0 ,\sumIII[23]_i_12_n_0 ,\sumIII[23]_i_13_n_0 ,\sumIII[23]_i_14_n_0 ,\sumIII[23]_i_15_n_0 ,\sumIII[23]_i_16_n_0 }));
  FDCE \sumIII_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[7]_i_1_n_13 ),
        .Q(sumIII[2]));
  FDCE \sumIII_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[7]_i_1_n_12 ),
        .Q(sumIII[3]));
  FDCE \sumIII_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[7]_i_1_n_11 ),
        .Q(sumIII[4]));
  FDCE \sumIII_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[7]_i_1_n_10 ),
        .Q(sumIII[5]));
  FDCE \sumIII_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[7]_i_1_n_9 ),
        .Q(sumIII[6]));
  FDCE \sumIII_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[7]_i_1_n_8 ),
        .Q(sumIII[7]));
  CARRY8 \sumIII_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumIII_reg[7]_i_1_n_0 ,\sumIII_reg[7]_i_1_n_1 ,\sumIII_reg[7]_i_1_n_2 ,\sumIII_reg[7]_i_1_n_3 ,\sumIII_reg[7]_i_1_n_4 ,\sumIII_reg[7]_i_1_n_5 ,\sumIII_reg[7]_i_1_n_6 ,\sumIII_reg[7]_i_1_n_7 }),
        .DI({\sumIII[7]_i_2_n_0 ,\sumIII[7]_i_3_n_0 ,\sumIII[7]_i_4_n_0 ,\sumIII[7]_i_5_n_0 ,\sumIII[7]_i_6_n_0 ,\sumIII[7]_i_7_n_0 ,\sumIII[7]_i_8_n_0 ,\sumIII[7]_i_9_n_0 }),
        .O({\sumIII_reg[7]_i_1_n_8 ,\sumIII_reg[7]_i_1_n_9 ,\sumIII_reg[7]_i_1_n_10 ,\sumIII_reg[7]_i_1_n_11 ,\sumIII_reg[7]_i_1_n_12 ,\sumIII_reg[7]_i_1_n_13 ,\sumIII_reg[7]_i_1_n_14 ,\sumIII_reg[7]_i_1_n_15 }),
        .S({\sumIII[7]_i_10_n_0 ,\sumIII[7]_i_11_n_0 ,\sumIII[7]_i_12_n_0 ,\sumIII[7]_i_13_n_0 ,\sumIII[7]_i_14_n_0 ,\sumIII[7]_i_15_n_0 ,\sumIII[7]_i_16_n_0 ,\sumIII[7]_i_17_n_0 }));
  FDCE \sumIII_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[15]_i_1_n_15 ),
        .Q(sumIII[8]));
  FDCE \sumIII_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumIII_reg[15]_i_1_n_14 ),
        .Q(sumIII[9]));
  (* SOFT_HLUTNM = "soft_lutpair1111" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[0]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[0]),
        .O(\sumXA[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1106" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[10]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[10]),
        .O(\sumXA[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1106" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[11]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[11]),
        .O(\sumXA[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1105" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[12]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[12]),
        .O(\sumXA[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1105" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[13]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[13]),
        .O(\sumXA[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1104" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[14]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[14]),
        .O(\sumXA[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1104" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[15]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[15]),
        .O(\sumXA[15]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[15]_i_10 
       (.I0(\colsumX_reg_n_0_[29] ),
        .I1(\colsumX_reg_n_0_[8] ),
        .O(\sumXA[15]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[15]_i_3 
       (.I0(\colsumX_reg_n_0_[36] ),
        .I1(\colsumX_reg_n_0_[15] ),
        .O(\sumXA[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[15]_i_4 
       (.I0(\colsumX_reg_n_0_[35] ),
        .I1(\colsumX_reg_n_0_[14] ),
        .O(\sumXA[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[15]_i_5 
       (.I0(\colsumX_reg_n_0_[34] ),
        .I1(\colsumX_reg_n_0_[13] ),
        .O(\sumXA[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[15]_i_6 
       (.I0(\colsumX_reg_n_0_[33] ),
        .I1(\colsumX_reg_n_0_[12] ),
        .O(\sumXA[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[15]_i_7 
       (.I0(\colsumX_reg_n_0_[32] ),
        .I1(\colsumX_reg_n_0_[11] ),
        .O(\sumXA[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[15]_i_8 
       (.I0(\colsumX_reg_n_0_[31] ),
        .I1(\colsumX_reg_n_0_[10] ),
        .O(\sumXA[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[15]_i_9 
       (.I0(\colsumX_reg_n_0_[30] ),
        .I1(\colsumX_reg_n_0_[9] ),
        .O(\sumXA[15]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1103" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[16]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumXA0[16]),
        .O(\sumXA[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1103" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[17]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumXA0[17]),
        .O(\sumXA[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1102" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[18]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumXA0[18]),
        .O(\sumXA[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1102" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[19]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumXA0[19]),
        .O(\sumXA[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1111" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[1]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[1]),
        .O(\sumXA[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1101" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[20]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumXA0[20]),
        .O(\sumXA[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1101" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \sumXA[21]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\sumXA_reg[21]_i_2_n_2 ),
        .O(\sumXA[21]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \sumXA[21]_i_3 
       (.I0(\colsumX_reg_n_0_[41] ),
        .O(\sumXA[21]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[21]_i_4 
       (.I0(\colsumX_reg_n_0_[41] ),
        .I1(\colsumX_reg_n_0_[20] ),
        .O(\sumXA[21]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[21]_i_5 
       (.I0(\colsumX_reg_n_0_[40] ),
        .I1(\colsumX_reg_n_0_[19] ),
        .O(\sumXA[21]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[21]_i_6 
       (.I0(\colsumX_reg_n_0_[39] ),
        .I1(\colsumX_reg_n_0_[18] ),
        .O(\sumXA[21]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[21]_i_7 
       (.I0(\colsumX_reg_n_0_[38] ),
        .I1(\colsumX_reg_n_0_[17] ),
        .O(\sumXA[21]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[21]_i_8 
       (.I0(\colsumX_reg_n_0_[37] ),
        .I1(\colsumX_reg_n_0_[16] ),
        .O(\sumXA[21]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1100" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[22]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[0]),
        .O(\sumXA[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1100" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[23]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[1]),
        .O(\sumXA[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1099" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[24]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[2]),
        .O(\sumXA[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1099" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[25]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[3]),
        .O(\sumXA[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1098" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[26]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[4]),
        .O(\sumXA[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1098" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[27]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[5]),
        .O(\sumXA[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1097" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[28]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[6]),
        .O(\sumXA[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1097" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[29]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[7]),
        .O(\sumXA[29]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[29]_i_10 
       (.I0(\colsumX_reg_n_0_[63] ),
        .I1(\colsumX_reg_n_0_[42] ),
        .O(\sumXA[29]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[29]_i_3 
       (.I0(\colsumX_reg_n_0_[70] ),
        .I1(\colsumX_reg_n_0_[49] ),
        .O(\sumXA[29]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[29]_i_4 
       (.I0(\colsumX_reg_n_0_[69] ),
        .I1(\colsumX_reg_n_0_[48] ),
        .O(\sumXA[29]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[29]_i_5 
       (.I0(\colsumX_reg_n_0_[68] ),
        .I1(\colsumX_reg_n_0_[47] ),
        .O(\sumXA[29]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[29]_i_6 
       (.I0(\colsumX_reg_n_0_[67] ),
        .I1(\colsumX_reg_n_0_[46] ),
        .O(\sumXA[29]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[29]_i_7 
       (.I0(\colsumX_reg_n_0_[66] ),
        .I1(\colsumX_reg_n_0_[45] ),
        .O(\sumXA[29]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[29]_i_8 
       (.I0(\colsumX_reg_n_0_[65] ),
        .I1(\colsumX_reg_n_0_[44] ),
        .O(\sumXA[29]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[29]_i_9 
       (.I0(\colsumX_reg_n_0_[64] ),
        .I1(\colsumX_reg_n_0_[43] ),
        .O(\sumXA[29]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1110" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[2]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[2]),
        .O(\sumXA[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1096" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[30]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[8]),
        .O(\sumXA[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1096" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[31]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[9]),
        .O(\sumXA[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1095" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[32]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[10]),
        .O(\sumXA[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1095" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[33]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[11]),
        .O(\sumXA[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1094" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[34]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[12]),
        .O(\sumXA[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1094" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[35]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[13]),
        .O(\sumXA[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1093" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[36]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[14]),
        .O(\sumXA[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1093" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[37]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA00_in[15]),
        .O(\sumXA[37]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[37]_i_10 
       (.I0(\colsumX_reg_n_0_[71] ),
        .I1(\colsumX_reg_n_0_[50] ),
        .O(\sumXA[37]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[37]_i_3 
       (.I0(\colsumX_reg_n_0_[78] ),
        .I1(\colsumX_reg_n_0_[57] ),
        .O(\sumXA[37]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[37]_i_4 
       (.I0(\colsumX_reg_n_0_[77] ),
        .I1(\colsumX_reg_n_0_[56] ),
        .O(\sumXA[37]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[37]_i_5 
       (.I0(\colsumX_reg_n_0_[76] ),
        .I1(\colsumX_reg_n_0_[55] ),
        .O(\sumXA[37]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[37]_i_6 
       (.I0(\colsumX_reg_n_0_[75] ),
        .I1(\colsumX_reg_n_0_[54] ),
        .O(\sumXA[37]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[37]_i_7 
       (.I0(\colsumX_reg_n_0_[74] ),
        .I1(\colsumX_reg_n_0_[53] ),
        .O(\sumXA[37]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[37]_i_8 
       (.I0(\colsumX_reg_n_0_[73] ),
        .I1(\colsumX_reg_n_0_[52] ),
        .O(\sumXA[37]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[37]_i_9 
       (.I0(\colsumX_reg_n_0_[72] ),
        .I1(\colsumX_reg_n_0_[51] ),
        .O(\sumXA[37]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1092" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[38]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumXA00_in[16]),
        .O(\sumXA[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1092" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[39]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumXA00_in[17]),
        .O(\sumXA[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1110" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[3]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[3]),
        .O(\sumXA[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1091" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[40]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumXA00_in[18]),
        .O(\sumXA[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1091" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[41]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumXA00_in[19]),
        .O(\sumXA[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1090" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[42]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumXA00_in[20]),
        .O(\sumXA[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1090" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \sumXA[43]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\sumXA_reg[43]_i_2_n_2 ),
        .O(\sumXA[43]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \sumXA[43]_i_3 
       (.I0(\colsumX_reg_n_0_[83] ),
        .O(\sumXA[43]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[43]_i_4 
       (.I0(\colsumX_reg_n_0_[83] ),
        .I1(\colsumX_reg_n_0_[62] ),
        .O(\sumXA[43]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[43]_i_5 
       (.I0(\colsumX_reg_n_0_[82] ),
        .I1(\colsumX_reg_n_0_[61] ),
        .O(\sumXA[43]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[43]_i_6 
       (.I0(\colsumX_reg_n_0_[81] ),
        .I1(\colsumX_reg_n_0_[60] ),
        .O(\sumXA[43]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[43]_i_7 
       (.I0(\colsumX_reg_n_0_[80] ),
        .I1(\colsumX_reg_n_0_[59] ),
        .O(\sumXA[43]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[43]_i_8 
       (.I0(\colsumX_reg_n_0_[79] ),
        .I1(\colsumX_reg_n_0_[58] ),
        .O(\sumXA[43]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1109" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[4]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[4]),
        .O(\sumXA[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1109" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[5]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[5]),
        .O(\sumXA[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1108" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[6]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[6]),
        .O(\sumXA[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1108" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[7]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[7]),
        .O(\sumXA[7]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[7]_i_10 
       (.I0(\colsumX_reg_n_0_[21] ),
        .I1(\colsumX_reg_n_0_[0] ),
        .O(\sumXA[7]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[7]_i_3 
       (.I0(\colsumX_reg_n_0_[28] ),
        .I1(\colsumX_reg_n_0_[7] ),
        .O(\sumXA[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[7]_i_4 
       (.I0(\colsumX_reg_n_0_[27] ),
        .I1(\colsumX_reg_n_0_[6] ),
        .O(\sumXA[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[7]_i_5 
       (.I0(\colsumX_reg_n_0_[26] ),
        .I1(\colsumX_reg_n_0_[5] ),
        .O(\sumXA[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[7]_i_6 
       (.I0(\colsumX_reg_n_0_[25] ),
        .I1(\colsumX_reg_n_0_[4] ),
        .O(\sumXA[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[7]_i_7 
       (.I0(\colsumX_reg_n_0_[24] ),
        .I1(\colsumX_reg_n_0_[3] ),
        .O(\sumXA[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[7]_i_8 
       (.I0(\colsumX_reg_n_0_[23] ),
        .I1(\colsumX_reg_n_0_[2] ),
        .O(\sumXA[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXA[7]_i_9 
       (.I0(\colsumX_reg_n_0_[22] ),
        .I1(\colsumX_reg_n_0_[1] ),
        .O(\sumXA[7]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1107" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[8]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[8]),
        .O(\sumXA[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1107" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXA[9]_i_1 
       (.I0(stateScore_reg_rep__10_n_0),
        .I1(sumXA0[9]),
        .O(\sumXA[9]_i_1_n_0 ));
  FDCE \sumXA_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[0]_i_1_n_0 ),
        .Q(sumXA[0]));
  FDCE \sumXA_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[10]_i_1_n_0 ),
        .Q(sumXA[10]));
  FDCE \sumXA_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[11]_i_1_n_0 ),
        .Q(sumXA[11]));
  FDCE \sumXA_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[12]_i_1_n_0 ),
        .Q(sumXA[12]));
  FDCE \sumXA_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[13]_i_1_n_0 ),
        .Q(sumXA[13]));
  FDCE \sumXA_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[14]_i_1_n_0 ),
        .Q(sumXA[14]));
  FDCE \sumXA_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[15]_i_1_n_0 ),
        .Q(sumXA[15]));
  CARRY8 \sumXA_reg[15]_i_2 
       (.CI(\sumXA_reg[7]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumXA_reg[15]_i_2_n_0 ,\sumXA_reg[15]_i_2_n_1 ,\sumXA_reg[15]_i_2_n_2 ,\sumXA_reg[15]_i_2_n_3 ,\sumXA_reg[15]_i_2_n_4 ,\sumXA_reg[15]_i_2_n_5 ,\sumXA_reg[15]_i_2_n_6 ,\sumXA_reg[15]_i_2_n_7 }),
        .DI({\colsumX_reg_n_0_[36] ,\colsumX_reg_n_0_[35] ,\colsumX_reg_n_0_[34] ,\colsumX_reg_n_0_[33] ,\colsumX_reg_n_0_[32] ,\colsumX_reg_n_0_[31] ,\colsumX_reg_n_0_[30] ,\colsumX_reg_n_0_[29] }),
        .O(sumXA0[15:8]),
        .S({\sumXA[15]_i_3_n_0 ,\sumXA[15]_i_4_n_0 ,\sumXA[15]_i_5_n_0 ,\sumXA[15]_i_6_n_0 ,\sumXA[15]_i_7_n_0 ,\sumXA[15]_i_8_n_0 ,\sumXA[15]_i_9_n_0 ,\sumXA[15]_i_10_n_0 }));
  FDCE \sumXA_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[16]_i_1_n_0 ),
        .Q(sumXA[16]));
  FDCE \sumXA_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[17]_i_1_n_0 ),
        .Q(sumXA[17]));
  FDCE \sumXA_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[18]_i_1_n_0 ),
        .Q(sumXA[18]));
  FDCE \sumXA_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[19]_i_1_n_0 ),
        .Q(sumXA[19]));
  FDCE \sumXA_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[1]_i_1_n_0 ),
        .Q(sumXA[1]));
  FDCE \sumXA_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[20]_i_1_n_0 ),
        .Q(sumXA[20]));
  FDCE \sumXA_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[21]_i_1_n_0 ),
        .Q(sumXA[21]));
  CARRY8 \sumXA_reg[21]_i_2 
       (.CI(\sumXA_reg[15]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumXA_reg[21]_i_2_CO_UNCONNECTED [7:6],\sumXA_reg[21]_i_2_n_2 ,\NLW_sumXA_reg[21]_i_2_CO_UNCONNECTED [4],\sumXA_reg[21]_i_2_n_4 ,\sumXA_reg[21]_i_2_n_5 ,\sumXA_reg[21]_i_2_n_6 ,\sumXA_reg[21]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\sumXA[21]_i_3_n_0 ,\colsumX_reg_n_0_[40] ,\colsumX_reg_n_0_[39] ,\colsumX_reg_n_0_[38] ,\colsumX_reg_n_0_[37] }),
        .O({\NLW_sumXA_reg[21]_i_2_O_UNCONNECTED [7:5],sumXA0[20:16]}),
        .S({1'b0,1'b0,1'b1,\sumXA[21]_i_4_n_0 ,\sumXA[21]_i_5_n_0 ,\sumXA[21]_i_6_n_0 ,\sumXA[21]_i_7_n_0 ,\sumXA[21]_i_8_n_0 }));
  FDCE \sumXA_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[22]_i_1_n_0 ),
        .Q(sumXA[22]));
  FDCE \sumXA_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[23]_i_1_n_0 ),
        .Q(sumXA[23]));
  FDCE \sumXA_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[24]_i_1_n_0 ),
        .Q(sumXA[24]));
  FDCE \sumXA_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[25]_i_1_n_0 ),
        .Q(sumXA[25]));
  FDCE \sumXA_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[26]_i_1_n_0 ),
        .Q(sumXA[26]));
  FDCE \sumXA_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[27]_i_1_n_0 ),
        .Q(sumXA[27]));
  FDCE \sumXA_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[28]_i_1_n_0 ),
        .Q(sumXA[28]));
  FDCE \sumXA_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[29]_i_1_n_0 ),
        .Q(sumXA[29]));
  CARRY8 \sumXA_reg[29]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumXA_reg[29]_i_2_n_0 ,\sumXA_reg[29]_i_2_n_1 ,\sumXA_reg[29]_i_2_n_2 ,\sumXA_reg[29]_i_2_n_3 ,\sumXA_reg[29]_i_2_n_4 ,\sumXA_reg[29]_i_2_n_5 ,\sumXA_reg[29]_i_2_n_6 ,\sumXA_reg[29]_i_2_n_7 }),
        .DI({\colsumX_reg_n_0_[70] ,\colsumX_reg_n_0_[69] ,\colsumX_reg_n_0_[68] ,\colsumX_reg_n_0_[67] ,\colsumX_reg_n_0_[66] ,\colsumX_reg_n_0_[65] ,\colsumX_reg_n_0_[64] ,\colsumX_reg_n_0_[63] }),
        .O(sumXA00_in[7:0]),
        .S({\sumXA[29]_i_3_n_0 ,\sumXA[29]_i_4_n_0 ,\sumXA[29]_i_5_n_0 ,\sumXA[29]_i_6_n_0 ,\sumXA[29]_i_7_n_0 ,\sumXA[29]_i_8_n_0 ,\sumXA[29]_i_9_n_0 ,\sumXA[29]_i_10_n_0 }));
  FDCE \sumXA_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[2]_i_1_n_0 ),
        .Q(sumXA[2]));
  FDCE \sumXA_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[30]_i_1_n_0 ),
        .Q(sumXA[30]));
  FDCE \sumXA_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[31]_i_1_n_0 ),
        .Q(sumXA[31]));
  FDCE \sumXA_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[32]_i_1_n_0 ),
        .Q(sumXA[32]));
  FDCE \sumXA_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[33]_i_1_n_0 ),
        .Q(sumXA[33]));
  FDCE \sumXA_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[34]_i_1_n_0 ),
        .Q(sumXA[34]));
  FDCE \sumXA_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[35]_i_1_n_0 ),
        .Q(sumXA[35]));
  FDCE \sumXA_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[36]_i_1_n_0 ),
        .Q(sumXA[36]));
  FDCE \sumXA_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[37]_i_1_n_0 ),
        .Q(sumXA[37]));
  CARRY8 \sumXA_reg[37]_i_2 
       (.CI(\sumXA_reg[29]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumXA_reg[37]_i_2_n_0 ,\sumXA_reg[37]_i_2_n_1 ,\sumXA_reg[37]_i_2_n_2 ,\sumXA_reg[37]_i_2_n_3 ,\sumXA_reg[37]_i_2_n_4 ,\sumXA_reg[37]_i_2_n_5 ,\sumXA_reg[37]_i_2_n_6 ,\sumXA_reg[37]_i_2_n_7 }),
        .DI({\colsumX_reg_n_0_[78] ,\colsumX_reg_n_0_[77] ,\colsumX_reg_n_0_[76] ,\colsumX_reg_n_0_[75] ,\colsumX_reg_n_0_[74] ,\colsumX_reg_n_0_[73] ,\colsumX_reg_n_0_[72] ,\colsumX_reg_n_0_[71] }),
        .O(sumXA00_in[15:8]),
        .S({\sumXA[37]_i_3_n_0 ,\sumXA[37]_i_4_n_0 ,\sumXA[37]_i_5_n_0 ,\sumXA[37]_i_6_n_0 ,\sumXA[37]_i_7_n_0 ,\sumXA[37]_i_8_n_0 ,\sumXA[37]_i_9_n_0 ,\sumXA[37]_i_10_n_0 }));
  FDCE \sumXA_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[38]_i_1_n_0 ),
        .Q(sumXA[38]));
  FDCE \sumXA_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[39]_i_1_n_0 ),
        .Q(sumXA[39]));
  FDCE \sumXA_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[3]_i_1_n_0 ),
        .Q(sumXA[3]));
  FDCE \sumXA_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[40]_i_1_n_0 ),
        .Q(sumXA[40]));
  FDCE \sumXA_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[41]_i_1_n_0 ),
        .Q(sumXA[41]));
  FDCE \sumXA_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[42]_i_1_n_0 ),
        .Q(sumXA[42]));
  FDCE \sumXA_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[43]_i_1_n_0 ),
        .Q(sumXA[43]));
  CARRY8 \sumXA_reg[43]_i_2 
       (.CI(\sumXA_reg[37]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumXA_reg[43]_i_2_CO_UNCONNECTED [7:6],\sumXA_reg[43]_i_2_n_2 ,\NLW_sumXA_reg[43]_i_2_CO_UNCONNECTED [4],\sumXA_reg[43]_i_2_n_4 ,\sumXA_reg[43]_i_2_n_5 ,\sumXA_reg[43]_i_2_n_6 ,\sumXA_reg[43]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\sumXA[43]_i_3_n_0 ,\colsumX_reg_n_0_[82] ,\colsumX_reg_n_0_[81] ,\colsumX_reg_n_0_[80] ,\colsumX_reg_n_0_[79] }),
        .O({\NLW_sumXA_reg[43]_i_2_O_UNCONNECTED [7:5],sumXA00_in[20:16]}),
        .S({1'b0,1'b0,1'b1,\sumXA[43]_i_4_n_0 ,\sumXA[43]_i_5_n_0 ,\sumXA[43]_i_6_n_0 ,\sumXA[43]_i_7_n_0 ,\sumXA[43]_i_8_n_0 }));
  FDCE \sumXA_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[4]_i_1_n_0 ),
        .Q(sumXA[4]));
  FDCE \sumXA_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[5]_i_1_n_0 ),
        .Q(sumXA[5]));
  FDCE \sumXA_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[6]_i_1_n_0 ),
        .Q(sumXA[6]));
  FDCE \sumXA_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[7]_i_1_n_0 ),
        .Q(sumXA[7]));
  CARRY8 \sumXA_reg[7]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumXA_reg[7]_i_2_n_0 ,\sumXA_reg[7]_i_2_n_1 ,\sumXA_reg[7]_i_2_n_2 ,\sumXA_reg[7]_i_2_n_3 ,\sumXA_reg[7]_i_2_n_4 ,\sumXA_reg[7]_i_2_n_5 ,\sumXA_reg[7]_i_2_n_6 ,\sumXA_reg[7]_i_2_n_7 }),
        .DI({\colsumX_reg_n_0_[28] ,\colsumX_reg_n_0_[27] ,\colsumX_reg_n_0_[26] ,\colsumX_reg_n_0_[25] ,\colsumX_reg_n_0_[24] ,\colsumX_reg_n_0_[23] ,\colsumX_reg_n_0_[22] ,\colsumX_reg_n_0_[21] }),
        .O(sumXA0[7:0]),
        .S({\sumXA[7]_i_3_n_0 ,\sumXA[7]_i_4_n_0 ,\sumXA[7]_i_5_n_0 ,\sumXA[7]_i_6_n_0 ,\sumXA[7]_i_7_n_0 ,\sumXA[7]_i_8_n_0 ,\sumXA[7]_i_9_n_0 ,\sumXA[7]_i_10_n_0 }));
  FDCE \sumXA_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[8]_i_1_n_0 ),
        .Q(sumXA[8]));
  FDCE \sumXA_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXA[9]_i_1_n_0 ),
        .Q(sumXA[9]));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[15]_i_10 
       (.I0(sumXA[15]),
        .I1(sumXA[37]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[15]_i_11 
       (.I0(sumXA[14]),
        .I1(sumXA[36]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[15]_i_12 
       (.I0(sumXA[13]),
        .I1(sumXA[35]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[15]_i_13 
       (.I0(sumXA[12]),
        .I1(sumXA[34]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[15]_i_14 
       (.I0(sumXA[11]),
        .I1(sumXA[33]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[15]_i_15 
       (.I0(sumXA[10]),
        .I1(sumXA[32]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[15]_i_16 
       (.I0(sumXA[9]),
        .I1(sumXA[31]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[15]_i_17 
       (.I0(sumXA[8]),
        .I1(sumXA[30]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[15]_i_2 
       (.I0(sumXA[15]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[15]_i_3 
       (.I0(sumXA[14]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[15]_i_4 
       (.I0(sumXA[13]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[15]_i_5 
       (.I0(sumXA[12]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[15]_i_6 
       (.I0(sumXA[11]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[15]_i_7 
       (.I0(sumXA[10]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[15]_i_8 
       (.I0(sumXA[9]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[15]_i_9 
       (.I0(sumXA[8]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[22]_i_10 
       (.I0(sumXA[20]),
        .I1(sumXA[42]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[22]_i_11 
       (.I0(sumXA[19]),
        .I1(sumXA[41]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[22]_i_12 
       (.I0(sumXA[18]),
        .I1(sumXA[40]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[22]_i_13 
       (.I0(sumXA[17]),
        .I1(sumXA[39]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[22]_i_14 
       (.I0(sumXA[16]),
        .I1(sumXA[38]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[22]_i_2 
       (.I0(sumXA[21]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[22]_i_3 
       (.I0(sumXA[20]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[22]_i_4 
       (.I0(sumXA[19]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[22]_i_5 
       (.I0(sumXA[18]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[22]_i_6 
       (.I0(sumXA[17]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[22]_i_7 
       (.I0(sumXA[16]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[22]_i_8 
       (.I0(sumXA[21]),
        .I1(sumXA[43]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[22]_i_9 
       (.I0(sumXA[21]),
        .I1(sumXA[43]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumXB[22]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[7]_i_10 
       (.I0(sumXA[7]),
        .I1(sumXA[29]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[7]_i_11 
       (.I0(sumXA[6]),
        .I1(sumXA[28]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[7]_i_12 
       (.I0(sumXA[5]),
        .I1(sumXA[27]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[7]_i_13 
       (.I0(sumXA[4]),
        .I1(sumXA[26]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[7]_i_14 
       (.I0(sumXA[3]),
        .I1(sumXA[25]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[7]_i_15 
       (.I0(sumXA[2]),
        .I1(sumXA[24]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[7]_i_16 
       (.I0(sumXA[1]),
        .I1(sumXA[23]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXB[7]_i_17 
       (.I0(sumXA[0]),
        .I1(sumXA[22]),
        .I2(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[7]_i_2 
       (.I0(sumXA[7]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[7]_i_3 
       (.I0(sumXA[6]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[7]_i_4 
       (.I0(sumXA[5]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[7]_i_5 
       (.I0(sumXA[4]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[7]_i_6 
       (.I0(sumXA[3]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[7]_i_7 
       (.I0(sumXA[2]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[7]_i_8 
       (.I0(sumXA[1]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXB[7]_i_9 
       (.I0(sumXA[0]),
        .I1(stateScore_reg_rep__10_n_0),
        .O(\sumXB[7]_i_9_n_0 ));
  FDCE \sumXB_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[7]_i_1_n_15 ),
        .Q(\sumXB_reg_n_0_[0] ));
  FDCE \sumXB_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[15]_i_1_n_13 ),
        .Q(\sumXB_reg_n_0_[10] ));
  FDCE \sumXB_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[15]_i_1_n_12 ),
        .Q(\sumXB_reg_n_0_[11] ));
  FDCE \sumXB_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[15]_i_1_n_11 ),
        .Q(\sumXB_reg_n_0_[12] ));
  FDCE \sumXB_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[15]_i_1_n_10 ),
        .Q(\sumXB_reg_n_0_[13] ));
  FDCE \sumXB_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[15]_i_1_n_9 ),
        .Q(\sumXB_reg_n_0_[14] ));
  FDCE \sumXB_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[15]_i_1_n_8 ),
        .Q(\sumXB_reg_n_0_[15] ));
  CARRY8 \sumXB_reg[15]_i_1 
       (.CI(\sumXB_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumXB_reg[15]_i_1_n_0 ,\sumXB_reg[15]_i_1_n_1 ,\sumXB_reg[15]_i_1_n_2 ,\sumXB_reg[15]_i_1_n_3 ,\sumXB_reg[15]_i_1_n_4 ,\sumXB_reg[15]_i_1_n_5 ,\sumXB_reg[15]_i_1_n_6 ,\sumXB_reg[15]_i_1_n_7 }),
        .DI({\sumXB[15]_i_2_n_0 ,\sumXB[15]_i_3_n_0 ,\sumXB[15]_i_4_n_0 ,\sumXB[15]_i_5_n_0 ,\sumXB[15]_i_6_n_0 ,\sumXB[15]_i_7_n_0 ,\sumXB[15]_i_8_n_0 ,\sumXB[15]_i_9_n_0 }),
        .O({\sumXB_reg[15]_i_1_n_8 ,\sumXB_reg[15]_i_1_n_9 ,\sumXB_reg[15]_i_1_n_10 ,\sumXB_reg[15]_i_1_n_11 ,\sumXB_reg[15]_i_1_n_12 ,\sumXB_reg[15]_i_1_n_13 ,\sumXB_reg[15]_i_1_n_14 ,\sumXB_reg[15]_i_1_n_15 }),
        .S({\sumXB[15]_i_10_n_0 ,\sumXB[15]_i_11_n_0 ,\sumXB[15]_i_12_n_0 ,\sumXB[15]_i_13_n_0 ,\sumXB[15]_i_14_n_0 ,\sumXB[15]_i_15_n_0 ,\sumXB[15]_i_16_n_0 ,\sumXB[15]_i_17_n_0 }));
  FDCE \sumXB_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[22]_i_1_n_15 ),
        .Q(\sumXB_reg_n_0_[16] ));
  FDCE \sumXB_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[22]_i_1_n_14 ),
        .Q(\sumXB_reg_n_0_[17] ));
  FDCE \sumXB_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[22]_i_1_n_13 ),
        .Q(\sumXB_reg_n_0_[18] ));
  FDCE \sumXB_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[22]_i_1_n_12 ),
        .Q(\sumXB_reg_n_0_[19] ));
  FDCE \sumXB_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[7]_i_1_n_14 ),
        .Q(\sumXB_reg_n_0_[1] ));
  FDCE \sumXB_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[22]_i_1_n_11 ),
        .Q(\sumXB_reg_n_0_[20] ));
  FDCE \sumXB_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[22]_i_1_n_10 ),
        .Q(\sumXB_reg_n_0_[21] ));
  FDCE \sumXB_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[22]_i_1_n_9 ),
        .Q(\sumXB_reg_n_0_[22] ));
  CARRY8 \sumXB_reg[22]_i_1 
       (.CI(\sumXB_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumXB_reg[22]_i_1_CO_UNCONNECTED [7:6],\sumXB_reg[22]_i_1_n_2 ,\sumXB_reg[22]_i_1_n_3 ,\sumXB_reg[22]_i_1_n_4 ,\sumXB_reg[22]_i_1_n_5 ,\sumXB_reg[22]_i_1_n_6 ,\sumXB_reg[22]_i_1_n_7 }),
        .DI({1'b0,1'b0,\sumXB[22]_i_2_n_0 ,\sumXB[22]_i_3_n_0 ,\sumXB[22]_i_4_n_0 ,\sumXB[22]_i_5_n_0 ,\sumXB[22]_i_6_n_0 ,\sumXB[22]_i_7_n_0 }),
        .O({\NLW_sumXB_reg[22]_i_1_O_UNCONNECTED [7],\sumXB_reg[22]_i_1_n_9 ,\sumXB_reg[22]_i_1_n_10 ,\sumXB_reg[22]_i_1_n_11 ,\sumXB_reg[22]_i_1_n_12 ,\sumXB_reg[22]_i_1_n_13 ,\sumXB_reg[22]_i_1_n_14 ,\sumXB_reg[22]_i_1_n_15 }),
        .S({1'b0,\sumXB[22]_i_8_n_0 ,\sumXB[22]_i_9_n_0 ,\sumXB[22]_i_10_n_0 ,\sumXB[22]_i_11_n_0 ,\sumXB[22]_i_12_n_0 ,\sumXB[22]_i_13_n_0 ,\sumXB[22]_i_14_n_0 }));
  FDCE \sumXB_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[7]_i_1_n_13 ),
        .Q(\sumXB_reg_n_0_[2] ));
  FDCE \sumXB_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[7]_i_1_n_12 ),
        .Q(\sumXB_reg_n_0_[3] ));
  FDCE \sumXB_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[7]_i_1_n_11 ),
        .Q(\sumXB_reg_n_0_[4] ));
  FDCE \sumXB_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[7]_i_1_n_10 ),
        .Q(\sumXB_reg_n_0_[5] ));
  FDCE \sumXB_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[7]_i_1_n_9 ),
        .Q(\sumXB_reg_n_0_[6] ));
  FDCE \sumXB_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[7]_i_1_n_8 ),
        .Q(\sumXB_reg_n_0_[7] ));
  CARRY8 \sumXB_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumXB_reg[7]_i_1_n_0 ,\sumXB_reg[7]_i_1_n_1 ,\sumXB_reg[7]_i_1_n_2 ,\sumXB_reg[7]_i_1_n_3 ,\sumXB_reg[7]_i_1_n_4 ,\sumXB_reg[7]_i_1_n_5 ,\sumXB_reg[7]_i_1_n_6 ,\sumXB_reg[7]_i_1_n_7 }),
        .DI({\sumXB[7]_i_2_n_0 ,\sumXB[7]_i_3_n_0 ,\sumXB[7]_i_4_n_0 ,\sumXB[7]_i_5_n_0 ,\sumXB[7]_i_6_n_0 ,\sumXB[7]_i_7_n_0 ,\sumXB[7]_i_8_n_0 ,\sumXB[7]_i_9_n_0 }),
        .O({\sumXB_reg[7]_i_1_n_8 ,\sumXB_reg[7]_i_1_n_9 ,\sumXB_reg[7]_i_1_n_10 ,\sumXB_reg[7]_i_1_n_11 ,\sumXB_reg[7]_i_1_n_12 ,\sumXB_reg[7]_i_1_n_13 ,\sumXB_reg[7]_i_1_n_14 ,\sumXB_reg[7]_i_1_n_15 }),
        .S({\sumXB[7]_i_10_n_0 ,\sumXB[7]_i_11_n_0 ,\sumXB[7]_i_12_n_0 ,\sumXB[7]_i_13_n_0 ,\sumXB[7]_i_14_n_0 ,\sumXB[7]_i_15_n_0 ,\sumXB[7]_i_16_n_0 ,\sumXB[7]_i_17_n_0 }));
  FDCE \sumXB_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[15]_i_1_n_15 ),
        .Q(\sumXB_reg_n_0_[8] ));
  FDCE \sumXB_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXB_reg[15]_i_1_n_14 ),
        .Q(\sumXB_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1372" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[0]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[0]),
        .O(\sumXYA[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1367" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[10]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[10]),
        .O(\sumXYA[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1367" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[11]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[11]),
        .O(\sumXYA[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1366" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[12]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[12]),
        .O(\sumXYA[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1366" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[13]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[13]),
        .O(\sumXYA[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1365" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[14]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[14]),
        .O(\sumXYA[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1365" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[15]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[15]),
        .O(\sumXYA[15]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[15]_i_10 
       (.I0(\colsumXY_reg_n_0_[29] ),
        .I1(\colsumXY_reg_n_0_[8] ),
        .O(\sumXYA[15]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[15]_i_3 
       (.I0(\colsumXY_reg_n_0_[36] ),
        .I1(\colsumXY_reg_n_0_[15] ),
        .O(\sumXYA[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[15]_i_4 
       (.I0(\colsumXY_reg_n_0_[35] ),
        .I1(\colsumXY_reg_n_0_[14] ),
        .O(\sumXYA[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[15]_i_5 
       (.I0(\colsumXY_reg_n_0_[34] ),
        .I1(\colsumXY_reg_n_0_[13] ),
        .O(\sumXYA[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[15]_i_6 
       (.I0(\colsumXY_reg_n_0_[33] ),
        .I1(\colsumXY_reg_n_0_[12] ),
        .O(\sumXYA[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[15]_i_7 
       (.I0(\colsumXY_reg_n_0_[32] ),
        .I1(\colsumXY_reg_n_0_[11] ),
        .O(\sumXYA[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[15]_i_8 
       (.I0(\colsumXY_reg_n_0_[31] ),
        .I1(\colsumXY_reg_n_0_[10] ),
        .O(\sumXYA[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[15]_i_9 
       (.I0(\colsumXY_reg_n_0_[30] ),
        .I1(\colsumXY_reg_n_0_[9] ),
        .O(\sumXYA[15]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1364" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[16]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(sumXYA0[16]),
        .O(\sumXYA[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1364" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[17]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(sumXYA0[17]),
        .O(\sumXYA[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1363" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[18]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(sumXYA0[18]),
        .O(\sumXYA[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1363" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[19]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(sumXYA0[19]),
        .O(\sumXYA[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1372" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[1]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[1]),
        .O(\sumXYA[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1362" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[20]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(sumXYA0[20]),
        .O(\sumXYA[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1362" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \sumXYA[21]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(\sumXYA_reg[21]_i_2_n_2 ),
        .O(\sumXYA[21]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \sumXYA[21]_i_3 
       (.I0(\colsumXY_reg_n_0_[41] ),
        .O(\sumXYA[21]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[21]_i_4 
       (.I0(\colsumXY_reg_n_0_[41] ),
        .I1(\colsumXY_reg_n_0_[20] ),
        .O(\sumXYA[21]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[21]_i_5 
       (.I0(\colsumXY_reg_n_0_[40] ),
        .I1(\colsumXY_reg_n_0_[19] ),
        .O(\sumXYA[21]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[21]_i_6 
       (.I0(\colsumXY_reg_n_0_[39] ),
        .I1(\colsumXY_reg_n_0_[18] ),
        .O(\sumXYA[21]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[21]_i_7 
       (.I0(\colsumXY_reg_n_0_[38] ),
        .I1(\colsumXY_reg_n_0_[17] ),
        .O(\sumXYA[21]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[21]_i_8 
       (.I0(\colsumXY_reg_n_0_[37] ),
        .I1(\colsumXY_reg_n_0_[16] ),
        .O(\sumXYA[21]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1361" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[22]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[0]),
        .O(\sumXYA[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1361" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[23]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[1]),
        .O(\sumXYA[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1360" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[24]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[2]),
        .O(\sumXYA[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1360" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[25]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[3]),
        .O(\sumXYA[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1359" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[26]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[4]),
        .O(\sumXYA[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1359" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[27]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[5]),
        .O(\sumXYA[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1358" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[28]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[6]),
        .O(\sumXYA[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1358" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[29]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[7]),
        .O(\sumXYA[29]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[29]_i_10 
       (.I0(\colsumXY_reg_n_0_[63] ),
        .I1(\colsumXY_reg_n_0_[42] ),
        .O(\sumXYA[29]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[29]_i_3 
       (.I0(\colsumXY_reg_n_0_[70] ),
        .I1(\colsumXY_reg_n_0_[49] ),
        .O(\sumXYA[29]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[29]_i_4 
       (.I0(\colsumXY_reg_n_0_[69] ),
        .I1(\colsumXY_reg_n_0_[48] ),
        .O(\sumXYA[29]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[29]_i_5 
       (.I0(\colsumXY_reg_n_0_[68] ),
        .I1(\colsumXY_reg_n_0_[47] ),
        .O(\sumXYA[29]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[29]_i_6 
       (.I0(\colsumXY_reg_n_0_[67] ),
        .I1(\colsumXY_reg_n_0_[46] ),
        .O(\sumXYA[29]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[29]_i_7 
       (.I0(\colsumXY_reg_n_0_[66] ),
        .I1(\colsumXY_reg_n_0_[45] ),
        .O(\sumXYA[29]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[29]_i_8 
       (.I0(\colsumXY_reg_n_0_[65] ),
        .I1(\colsumXY_reg_n_0_[44] ),
        .O(\sumXYA[29]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[29]_i_9 
       (.I0(\colsumXY_reg_n_0_[64] ),
        .I1(\colsumXY_reg_n_0_[43] ),
        .O(\sumXYA[29]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1371" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[2]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[2]),
        .O(\sumXYA[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1357" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[30]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[8]),
        .O(\sumXYA[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1357" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[31]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[9]),
        .O(\sumXYA[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1356" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[32]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[10]),
        .O(\sumXYA[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1356" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[33]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[11]),
        .O(\sumXYA[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1355" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[34]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[12]),
        .O(\sumXYA[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1355" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[35]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[13]),
        .O(\sumXYA[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1354" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[36]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[14]),
        .O(\sumXYA[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1354" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[37]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA00_in[15]),
        .O(\sumXYA[37]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[37]_i_10 
       (.I0(\colsumXY_reg_n_0_[71] ),
        .I1(\colsumXY_reg_n_0_[50] ),
        .O(\sumXYA[37]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[37]_i_3 
       (.I0(\colsumXY_reg_n_0_[78] ),
        .I1(\colsumXY_reg_n_0_[57] ),
        .O(\sumXYA[37]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[37]_i_4 
       (.I0(\colsumXY_reg_n_0_[77] ),
        .I1(\colsumXY_reg_n_0_[56] ),
        .O(\sumXYA[37]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[37]_i_5 
       (.I0(\colsumXY_reg_n_0_[76] ),
        .I1(\colsumXY_reg_n_0_[55] ),
        .O(\sumXYA[37]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[37]_i_6 
       (.I0(\colsumXY_reg_n_0_[75] ),
        .I1(\colsumXY_reg_n_0_[54] ),
        .O(\sumXYA[37]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[37]_i_7 
       (.I0(\colsumXY_reg_n_0_[74] ),
        .I1(\colsumXY_reg_n_0_[53] ),
        .O(\sumXYA[37]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[37]_i_8 
       (.I0(\colsumXY_reg_n_0_[73] ),
        .I1(\colsumXY_reg_n_0_[52] ),
        .O(\sumXYA[37]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[37]_i_9 
       (.I0(\colsumXY_reg_n_0_[72] ),
        .I1(\colsumXY_reg_n_0_[51] ),
        .O(\sumXYA[37]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1353" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[38]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(sumXYA00_in[16]),
        .O(\sumXYA[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1353" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[39]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(sumXYA00_in[17]),
        .O(\sumXYA[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1371" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[3]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[3]),
        .O(\sumXYA[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1352" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[40]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(sumXYA00_in[18]),
        .O(\sumXYA[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1352" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[41]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(sumXYA00_in[19]),
        .O(\sumXYA[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1351" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[42]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(sumXYA00_in[20]),
        .O(\sumXYA[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1351" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \sumXYA[43]_i_1 
       (.I0(stateScore_reg_rep__0_n_0),
        .I1(\sumXYA_reg[43]_i_2_n_2 ),
        .O(\sumXYA[43]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \sumXYA[43]_i_3 
       (.I0(\colsumXY_reg_n_0_[83] ),
        .O(\sumXYA[43]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[43]_i_4 
       (.I0(\colsumXY_reg_n_0_[83] ),
        .I1(\colsumXY_reg_n_0_[62] ),
        .O(\sumXYA[43]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[43]_i_5 
       (.I0(\colsumXY_reg_n_0_[82] ),
        .I1(\colsumXY_reg_n_0_[61] ),
        .O(\sumXYA[43]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[43]_i_6 
       (.I0(\colsumXY_reg_n_0_[81] ),
        .I1(\colsumXY_reg_n_0_[60] ),
        .O(\sumXYA[43]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[43]_i_7 
       (.I0(\colsumXY_reg_n_0_[80] ),
        .I1(\colsumXY_reg_n_0_[59] ),
        .O(\sumXYA[43]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[43]_i_8 
       (.I0(\colsumXY_reg_n_0_[79] ),
        .I1(\colsumXY_reg_n_0_[58] ),
        .O(\sumXYA[43]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1370" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[4]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[4]),
        .O(\sumXYA[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1370" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[5]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[5]),
        .O(\sumXYA[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1369" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[6]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[6]),
        .O(\sumXYA[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1369" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[7]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[7]),
        .O(\sumXYA[7]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[7]_i_10 
       (.I0(\colsumXY_reg_n_0_[21] ),
        .I1(\colsumXY_reg_n_0_[0] ),
        .O(\sumXYA[7]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[7]_i_3 
       (.I0(\colsumXY_reg_n_0_[28] ),
        .I1(\colsumXY_reg_n_0_[7] ),
        .O(\sumXYA[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[7]_i_4 
       (.I0(\colsumXY_reg_n_0_[27] ),
        .I1(\colsumXY_reg_n_0_[6] ),
        .O(\sumXYA[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[7]_i_5 
       (.I0(\colsumXY_reg_n_0_[26] ),
        .I1(\colsumXY_reg_n_0_[5] ),
        .O(\sumXYA[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[7]_i_6 
       (.I0(\colsumXY_reg_n_0_[25] ),
        .I1(\colsumXY_reg_n_0_[4] ),
        .O(\sumXYA[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[7]_i_7 
       (.I0(\colsumXY_reg_n_0_[24] ),
        .I1(\colsumXY_reg_n_0_[3] ),
        .O(\sumXYA[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[7]_i_8 
       (.I0(\colsumXY_reg_n_0_[23] ),
        .I1(\colsumXY_reg_n_0_[2] ),
        .O(\sumXYA[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumXYA[7]_i_9 
       (.I0(\colsumXY_reg_n_0_[22] ),
        .I1(\colsumXY_reg_n_0_[1] ),
        .O(\sumXYA[7]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1368" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[8]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[8]),
        .O(\sumXYA[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1368" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYA[9]_i_1 
       (.I0(stateScore_reg_rep_n_0),
        .I1(sumXYA0[9]),
        .O(\sumXYA[9]_i_1_n_0 ));
  FDCE \sumXYA_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[0]_i_1_n_0 ),
        .Q(sumXYA[0]));
  FDCE \sumXYA_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[10]_i_1_n_0 ),
        .Q(sumXYA[10]));
  FDCE \sumXYA_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[11]_i_1_n_0 ),
        .Q(sumXYA[11]));
  FDCE \sumXYA_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[12]_i_1_n_0 ),
        .Q(sumXYA[12]));
  FDCE \sumXYA_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[13]_i_1_n_0 ),
        .Q(sumXYA[13]));
  FDCE \sumXYA_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[14]_i_1_n_0 ),
        .Q(sumXYA[14]));
  FDCE \sumXYA_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[15]_i_1_n_0 ),
        .Q(sumXYA[15]));
  CARRY8 \sumXYA_reg[15]_i_2 
       (.CI(\sumXYA_reg[7]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumXYA_reg[15]_i_2_n_0 ,\sumXYA_reg[15]_i_2_n_1 ,\sumXYA_reg[15]_i_2_n_2 ,\sumXYA_reg[15]_i_2_n_3 ,\sumXYA_reg[15]_i_2_n_4 ,\sumXYA_reg[15]_i_2_n_5 ,\sumXYA_reg[15]_i_2_n_6 ,\sumXYA_reg[15]_i_2_n_7 }),
        .DI({\colsumXY_reg_n_0_[36] ,\colsumXY_reg_n_0_[35] ,\colsumXY_reg_n_0_[34] ,\colsumXY_reg_n_0_[33] ,\colsumXY_reg_n_0_[32] ,\colsumXY_reg_n_0_[31] ,\colsumXY_reg_n_0_[30] ,\colsumXY_reg_n_0_[29] }),
        .O(sumXYA0[15:8]),
        .S({\sumXYA[15]_i_3_n_0 ,\sumXYA[15]_i_4_n_0 ,\sumXYA[15]_i_5_n_0 ,\sumXYA[15]_i_6_n_0 ,\sumXYA[15]_i_7_n_0 ,\sumXYA[15]_i_8_n_0 ,\sumXYA[15]_i_9_n_0 ,\sumXYA[15]_i_10_n_0 }));
  FDCE \sumXYA_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[16]_i_1_n_0 ),
        .Q(sumXYA[16]));
  FDCE \sumXYA_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[17]_i_1_n_0 ),
        .Q(sumXYA[17]));
  FDCE \sumXYA_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[18]_i_1_n_0 ),
        .Q(sumXYA[18]));
  FDCE \sumXYA_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[19]_i_1_n_0 ),
        .Q(sumXYA[19]));
  FDCE \sumXYA_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[1]_i_1_n_0 ),
        .Q(sumXYA[1]));
  FDCE \sumXYA_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[20]_i_1_n_0 ),
        .Q(sumXYA[20]));
  FDCE \sumXYA_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[21]_i_1_n_0 ),
        .Q(sumXYA[21]));
  CARRY8 \sumXYA_reg[21]_i_2 
       (.CI(\sumXYA_reg[15]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumXYA_reg[21]_i_2_CO_UNCONNECTED [7:6],\sumXYA_reg[21]_i_2_n_2 ,\NLW_sumXYA_reg[21]_i_2_CO_UNCONNECTED [4],\sumXYA_reg[21]_i_2_n_4 ,\sumXYA_reg[21]_i_2_n_5 ,\sumXYA_reg[21]_i_2_n_6 ,\sumXYA_reg[21]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\sumXYA[21]_i_3_n_0 ,\colsumXY_reg_n_0_[40] ,\colsumXY_reg_n_0_[39] ,\colsumXY_reg_n_0_[38] ,\colsumXY_reg_n_0_[37] }),
        .O({\NLW_sumXYA_reg[21]_i_2_O_UNCONNECTED [7:5],sumXYA0[20:16]}),
        .S({1'b0,1'b0,1'b1,\sumXYA[21]_i_4_n_0 ,\sumXYA[21]_i_5_n_0 ,\sumXYA[21]_i_6_n_0 ,\sumXYA[21]_i_7_n_0 ,\sumXYA[21]_i_8_n_0 }));
  FDCE \sumXYA_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[22]_i_1_n_0 ),
        .Q(sumXYA[22]));
  FDCE \sumXYA_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[23]_i_1_n_0 ),
        .Q(sumXYA[23]));
  FDCE \sumXYA_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[24]_i_1_n_0 ),
        .Q(sumXYA[24]));
  FDCE \sumXYA_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[25]_i_1_n_0 ),
        .Q(sumXYA[25]));
  FDCE \sumXYA_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[26]_i_1_n_0 ),
        .Q(sumXYA[26]));
  FDCE \sumXYA_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[27]_i_1_n_0 ),
        .Q(sumXYA[27]));
  FDCE \sumXYA_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[28]_i_1_n_0 ),
        .Q(sumXYA[28]));
  FDCE \sumXYA_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[29]_i_1_n_0 ),
        .Q(sumXYA[29]));
  CARRY8 \sumXYA_reg[29]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumXYA_reg[29]_i_2_n_0 ,\sumXYA_reg[29]_i_2_n_1 ,\sumXYA_reg[29]_i_2_n_2 ,\sumXYA_reg[29]_i_2_n_3 ,\sumXYA_reg[29]_i_2_n_4 ,\sumXYA_reg[29]_i_2_n_5 ,\sumXYA_reg[29]_i_2_n_6 ,\sumXYA_reg[29]_i_2_n_7 }),
        .DI({\colsumXY_reg_n_0_[70] ,\colsumXY_reg_n_0_[69] ,\colsumXY_reg_n_0_[68] ,\colsumXY_reg_n_0_[67] ,\colsumXY_reg_n_0_[66] ,\colsumXY_reg_n_0_[65] ,\colsumXY_reg_n_0_[64] ,\colsumXY_reg_n_0_[63] }),
        .O(sumXYA00_in[7:0]),
        .S({\sumXYA[29]_i_3_n_0 ,\sumXYA[29]_i_4_n_0 ,\sumXYA[29]_i_5_n_0 ,\sumXYA[29]_i_6_n_0 ,\sumXYA[29]_i_7_n_0 ,\sumXYA[29]_i_8_n_0 ,\sumXYA[29]_i_9_n_0 ,\sumXYA[29]_i_10_n_0 }));
  FDCE \sumXYA_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[2]_i_1_n_0 ),
        .Q(sumXYA[2]));
  FDCE \sumXYA_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[30]_i_1_n_0 ),
        .Q(sumXYA[30]));
  FDCE \sumXYA_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[31]_i_1_n_0 ),
        .Q(sumXYA[31]));
  FDCE \sumXYA_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[32]_i_1_n_0 ),
        .Q(sumXYA[32]));
  FDCE \sumXYA_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[33]_i_1_n_0 ),
        .Q(sumXYA[33]));
  FDCE \sumXYA_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[34]_i_1_n_0 ),
        .Q(sumXYA[34]));
  FDCE \sumXYA_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[35]_i_1_n_0 ),
        .Q(sumXYA[35]));
  FDCE \sumXYA_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[36]_i_1_n_0 ),
        .Q(sumXYA[36]));
  FDCE \sumXYA_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[37]_i_1_n_0 ),
        .Q(sumXYA[37]));
  CARRY8 \sumXYA_reg[37]_i_2 
       (.CI(\sumXYA_reg[29]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumXYA_reg[37]_i_2_n_0 ,\sumXYA_reg[37]_i_2_n_1 ,\sumXYA_reg[37]_i_2_n_2 ,\sumXYA_reg[37]_i_2_n_3 ,\sumXYA_reg[37]_i_2_n_4 ,\sumXYA_reg[37]_i_2_n_5 ,\sumXYA_reg[37]_i_2_n_6 ,\sumXYA_reg[37]_i_2_n_7 }),
        .DI({\colsumXY_reg_n_0_[78] ,\colsumXY_reg_n_0_[77] ,\colsumXY_reg_n_0_[76] ,\colsumXY_reg_n_0_[75] ,\colsumXY_reg_n_0_[74] ,\colsumXY_reg_n_0_[73] ,\colsumXY_reg_n_0_[72] ,\colsumXY_reg_n_0_[71] }),
        .O(sumXYA00_in[15:8]),
        .S({\sumXYA[37]_i_3_n_0 ,\sumXYA[37]_i_4_n_0 ,\sumXYA[37]_i_5_n_0 ,\sumXYA[37]_i_6_n_0 ,\sumXYA[37]_i_7_n_0 ,\sumXYA[37]_i_8_n_0 ,\sumXYA[37]_i_9_n_0 ,\sumXYA[37]_i_10_n_0 }));
  FDCE \sumXYA_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[38]_i_1_n_0 ),
        .Q(sumXYA[38]));
  FDCE \sumXYA_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[39]_i_1_n_0 ),
        .Q(sumXYA[39]));
  FDCE \sumXYA_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[3]_i_1_n_0 ),
        .Q(sumXYA[3]));
  FDCE \sumXYA_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[40]_i_1_n_0 ),
        .Q(sumXYA[40]));
  FDCE \sumXYA_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[41]_i_1_n_0 ),
        .Q(sumXYA[41]));
  FDCE \sumXYA_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[42]_i_1_n_0 ),
        .Q(sumXYA[42]));
  FDCE \sumXYA_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[43]_i_1_n_0 ),
        .Q(sumXYA[43]));
  CARRY8 \sumXYA_reg[43]_i_2 
       (.CI(\sumXYA_reg[37]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumXYA_reg[43]_i_2_CO_UNCONNECTED [7:6],\sumXYA_reg[43]_i_2_n_2 ,\NLW_sumXYA_reg[43]_i_2_CO_UNCONNECTED [4],\sumXYA_reg[43]_i_2_n_4 ,\sumXYA_reg[43]_i_2_n_5 ,\sumXYA_reg[43]_i_2_n_6 ,\sumXYA_reg[43]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\sumXYA[43]_i_3_n_0 ,\colsumXY_reg_n_0_[82] ,\colsumXY_reg_n_0_[81] ,\colsumXY_reg_n_0_[80] ,\colsumXY_reg_n_0_[79] }),
        .O({\NLW_sumXYA_reg[43]_i_2_O_UNCONNECTED [7:5],sumXYA00_in[20:16]}),
        .S({1'b0,1'b0,1'b1,\sumXYA[43]_i_4_n_0 ,\sumXYA[43]_i_5_n_0 ,\sumXYA[43]_i_6_n_0 ,\sumXYA[43]_i_7_n_0 ,\sumXYA[43]_i_8_n_0 }));
  FDCE \sumXYA_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[4]_i_1_n_0 ),
        .Q(sumXYA[4]));
  FDCE \sumXYA_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[5]_i_1_n_0 ),
        .Q(sumXYA[5]));
  FDCE \sumXYA_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[6]_i_1_n_0 ),
        .Q(sumXYA[6]));
  FDCE \sumXYA_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[7]_i_1_n_0 ),
        .Q(sumXYA[7]));
  CARRY8 \sumXYA_reg[7]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumXYA_reg[7]_i_2_n_0 ,\sumXYA_reg[7]_i_2_n_1 ,\sumXYA_reg[7]_i_2_n_2 ,\sumXYA_reg[7]_i_2_n_3 ,\sumXYA_reg[7]_i_2_n_4 ,\sumXYA_reg[7]_i_2_n_5 ,\sumXYA_reg[7]_i_2_n_6 ,\sumXYA_reg[7]_i_2_n_7 }),
        .DI({\colsumXY_reg_n_0_[28] ,\colsumXY_reg_n_0_[27] ,\colsumXY_reg_n_0_[26] ,\colsumXY_reg_n_0_[25] ,\colsumXY_reg_n_0_[24] ,\colsumXY_reg_n_0_[23] ,\colsumXY_reg_n_0_[22] ,\colsumXY_reg_n_0_[21] }),
        .O(sumXYA0[7:0]),
        .S({\sumXYA[7]_i_3_n_0 ,\sumXYA[7]_i_4_n_0 ,\sumXYA[7]_i_5_n_0 ,\sumXYA[7]_i_6_n_0 ,\sumXYA[7]_i_7_n_0 ,\sumXYA[7]_i_8_n_0 ,\sumXYA[7]_i_9_n_0 ,\sumXYA[7]_i_10_n_0 }));
  FDCE \sumXYA_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[8]_i_1_n_0 ),
        .Q(sumXYA[8]));
  FDCE \sumXYA_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYA[9]_i_1_n_0 ),
        .Q(sumXYA[9]));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[15]_i_10 
       (.I0(sumXYA[15]),
        .I1(sumXYA[37]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[15]_i_11 
       (.I0(sumXYA[14]),
        .I1(sumXYA[36]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[15]_i_12 
       (.I0(sumXYA[13]),
        .I1(sumXYA[35]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[15]_i_13 
       (.I0(sumXYA[12]),
        .I1(sumXYA[34]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[15]_i_14 
       (.I0(sumXYA[11]),
        .I1(sumXYA[33]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[15]_i_15 
       (.I0(sumXYA[10]),
        .I1(sumXYA[32]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[15]_i_16 
       (.I0(sumXYA[9]),
        .I1(sumXYA[31]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[15]_i_17 
       (.I0(sumXYA[8]),
        .I1(sumXYA[30]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[15]_i_2 
       (.I0(sumXYA[15]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[15]_i_3 
       (.I0(sumXYA[14]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[15]_i_4 
       (.I0(sumXYA[13]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[15]_i_5 
       (.I0(sumXYA[12]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[15]_i_6 
       (.I0(sumXYA[11]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[15]_i_7 
       (.I0(sumXYA[10]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[15]_i_8 
       (.I0(sumXYA[9]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[15]_i_9 
       (.I0(sumXYA[8]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[22]_i_10 
       (.I0(sumXYA[20]),
        .I1(sumXYA[42]),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[22]_i_11 
       (.I0(sumXYA[19]),
        .I1(sumXYA[41]),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[22]_i_12 
       (.I0(sumXYA[18]),
        .I1(sumXYA[40]),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[22]_i_13 
       (.I0(sumXYA[17]),
        .I1(sumXYA[39]),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[22]_i_14 
       (.I0(sumXYA[16]),
        .I1(sumXYA[38]),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[22]_i_2 
       (.I0(sumXYA[21]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[22]_i_3 
       (.I0(sumXYA[20]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[22]_i_4 
       (.I0(sumXYA[19]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[22]_i_5 
       (.I0(sumXYA[18]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[22]_i_6 
       (.I0(sumXYA[17]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[22]_i_7 
       (.I0(sumXYA[16]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[22]_i_8 
       (.I0(sumXYA[21]),
        .I1(sumXYA[43]),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[22]_i_9 
       (.I0(sumXYA[21]),
        .I1(sumXYA[43]),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXYB[22]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[7]_i_10 
       (.I0(sumXYA[7]),
        .I1(sumXYA[29]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[7]_i_11 
       (.I0(sumXYA[6]),
        .I1(sumXYA[28]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[7]_i_12 
       (.I0(sumXYA[5]),
        .I1(sumXYA[27]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[7]_i_13 
       (.I0(sumXYA[4]),
        .I1(sumXYA[26]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[7]_i_14 
       (.I0(sumXYA[3]),
        .I1(sumXYA[25]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[7]_i_15 
       (.I0(sumXYA[2]),
        .I1(sumXYA[24]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[7]_i_16 
       (.I0(sumXYA[1]),
        .I1(sumXYA[23]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXYB[7]_i_17 
       (.I0(sumXYA[0]),
        .I1(sumXYA[22]),
        .I2(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[7]_i_2 
       (.I0(sumXYA[7]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[7]_i_3 
       (.I0(sumXYA[6]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[7]_i_4 
       (.I0(sumXYA[5]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[7]_i_5 
       (.I0(sumXYA[4]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[7]_i_6 
       (.I0(sumXYA[3]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[7]_i_7 
       (.I0(sumXYA[2]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[7]_i_8 
       (.I0(sumXYA[1]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXYB[7]_i_9 
       (.I0(sumXYA[0]),
        .I1(stateScore_reg_rep_n_0),
        .O(\sumXYB[7]_i_9_n_0 ));
  FDCE \sumXYB_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[7]_i_1_n_15 ),
        .Q(\sumXYB_reg_n_0_[0] ));
  FDCE \sumXYB_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[15]_i_1_n_13 ),
        .Q(\sumXYB_reg_n_0_[10] ));
  FDCE \sumXYB_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[15]_i_1_n_12 ),
        .Q(\sumXYB_reg_n_0_[11] ));
  FDCE \sumXYB_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[15]_i_1_n_11 ),
        .Q(\sumXYB_reg_n_0_[12] ));
  FDCE \sumXYB_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[15]_i_1_n_10 ),
        .Q(\sumXYB_reg_n_0_[13] ));
  FDCE \sumXYB_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[15]_i_1_n_9 ),
        .Q(\sumXYB_reg_n_0_[14] ));
  FDCE \sumXYB_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[15]_i_1_n_8 ),
        .Q(\sumXYB_reg_n_0_[15] ));
  CARRY8 \sumXYB_reg[15]_i_1 
       (.CI(\sumXYB_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumXYB_reg[15]_i_1_n_0 ,\sumXYB_reg[15]_i_1_n_1 ,\sumXYB_reg[15]_i_1_n_2 ,\sumXYB_reg[15]_i_1_n_3 ,\sumXYB_reg[15]_i_1_n_4 ,\sumXYB_reg[15]_i_1_n_5 ,\sumXYB_reg[15]_i_1_n_6 ,\sumXYB_reg[15]_i_1_n_7 }),
        .DI({\sumXYB[15]_i_2_n_0 ,\sumXYB[15]_i_3_n_0 ,\sumXYB[15]_i_4_n_0 ,\sumXYB[15]_i_5_n_0 ,\sumXYB[15]_i_6_n_0 ,\sumXYB[15]_i_7_n_0 ,\sumXYB[15]_i_8_n_0 ,\sumXYB[15]_i_9_n_0 }),
        .O({\sumXYB_reg[15]_i_1_n_8 ,\sumXYB_reg[15]_i_1_n_9 ,\sumXYB_reg[15]_i_1_n_10 ,\sumXYB_reg[15]_i_1_n_11 ,\sumXYB_reg[15]_i_1_n_12 ,\sumXYB_reg[15]_i_1_n_13 ,\sumXYB_reg[15]_i_1_n_14 ,\sumXYB_reg[15]_i_1_n_15 }),
        .S({\sumXYB[15]_i_10_n_0 ,\sumXYB[15]_i_11_n_0 ,\sumXYB[15]_i_12_n_0 ,\sumXYB[15]_i_13_n_0 ,\sumXYB[15]_i_14_n_0 ,\sumXYB[15]_i_15_n_0 ,\sumXYB[15]_i_16_n_0 ,\sumXYB[15]_i_17_n_0 }));
  FDCE \sumXYB_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[22]_i_1_n_15 ),
        .Q(\sumXYB_reg_n_0_[16] ));
  FDCE \sumXYB_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[22]_i_1_n_14 ),
        .Q(\sumXYB_reg_n_0_[17] ));
  FDCE \sumXYB_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[22]_i_1_n_13 ),
        .Q(\sumXYB_reg_n_0_[18] ));
  FDCE \sumXYB_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[22]_i_1_n_12 ),
        .Q(\sumXYB_reg_n_0_[19] ));
  FDCE \sumXYB_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[7]_i_1_n_14 ),
        .Q(\sumXYB_reg_n_0_[1] ));
  FDCE \sumXYB_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[22]_i_1_n_11 ),
        .Q(\sumXYB_reg_n_0_[20] ));
  FDCE \sumXYB_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[22]_i_1_n_10 ),
        .Q(\sumXYB_reg_n_0_[21] ));
  FDCE \sumXYB_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[22]_i_1_n_9 ),
        .Q(\sumXYB_reg_n_0_[22] ));
  CARRY8 \sumXYB_reg[22]_i_1 
       (.CI(\sumXYB_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumXYB_reg[22]_i_1_CO_UNCONNECTED [7:6],\sumXYB_reg[22]_i_1_n_2 ,\sumXYB_reg[22]_i_1_n_3 ,\sumXYB_reg[22]_i_1_n_4 ,\sumXYB_reg[22]_i_1_n_5 ,\sumXYB_reg[22]_i_1_n_6 ,\sumXYB_reg[22]_i_1_n_7 }),
        .DI({1'b0,1'b0,\sumXYB[22]_i_2_n_0 ,\sumXYB[22]_i_3_n_0 ,\sumXYB[22]_i_4_n_0 ,\sumXYB[22]_i_5_n_0 ,\sumXYB[22]_i_6_n_0 ,\sumXYB[22]_i_7_n_0 }),
        .O({\NLW_sumXYB_reg[22]_i_1_O_UNCONNECTED [7],\sumXYB_reg[22]_i_1_n_9 ,\sumXYB_reg[22]_i_1_n_10 ,\sumXYB_reg[22]_i_1_n_11 ,\sumXYB_reg[22]_i_1_n_12 ,\sumXYB_reg[22]_i_1_n_13 ,\sumXYB_reg[22]_i_1_n_14 ,\sumXYB_reg[22]_i_1_n_15 }),
        .S({1'b0,\sumXYB[22]_i_8_n_0 ,\sumXYB[22]_i_9_n_0 ,\sumXYB[22]_i_10_n_0 ,\sumXYB[22]_i_11_n_0 ,\sumXYB[22]_i_12_n_0 ,\sumXYB[22]_i_13_n_0 ,\sumXYB[22]_i_14_n_0 }));
  FDCE \sumXYB_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[7]_i_1_n_13 ),
        .Q(\sumXYB_reg_n_0_[2] ));
  FDCE \sumXYB_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[7]_i_1_n_12 ),
        .Q(\sumXYB_reg_n_0_[3] ));
  FDCE \sumXYB_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[7]_i_1_n_11 ),
        .Q(\sumXYB_reg_n_0_[4] ));
  FDCE \sumXYB_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[7]_i_1_n_10 ),
        .Q(\sumXYB_reg_n_0_[5] ));
  FDCE \sumXYB_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[7]_i_1_n_9 ),
        .Q(\sumXYB_reg_n_0_[6] ));
  FDCE \sumXYB_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[7]_i_1_n_8 ),
        .Q(\sumXYB_reg_n_0_[7] ));
  CARRY8 \sumXYB_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumXYB_reg[7]_i_1_n_0 ,\sumXYB_reg[7]_i_1_n_1 ,\sumXYB_reg[7]_i_1_n_2 ,\sumXYB_reg[7]_i_1_n_3 ,\sumXYB_reg[7]_i_1_n_4 ,\sumXYB_reg[7]_i_1_n_5 ,\sumXYB_reg[7]_i_1_n_6 ,\sumXYB_reg[7]_i_1_n_7 }),
        .DI({\sumXYB[7]_i_2_n_0 ,\sumXYB[7]_i_3_n_0 ,\sumXYB[7]_i_4_n_0 ,\sumXYB[7]_i_5_n_0 ,\sumXYB[7]_i_6_n_0 ,\sumXYB[7]_i_7_n_0 ,\sumXYB[7]_i_8_n_0 ,\sumXYB[7]_i_9_n_0 }),
        .O({\sumXYB_reg[7]_i_1_n_8 ,\sumXYB_reg[7]_i_1_n_9 ,\sumXYB_reg[7]_i_1_n_10 ,\sumXYB_reg[7]_i_1_n_11 ,\sumXYB_reg[7]_i_1_n_12 ,\sumXYB_reg[7]_i_1_n_13 ,\sumXYB_reg[7]_i_1_n_14 ,\sumXYB_reg[7]_i_1_n_15 }),
        .S({\sumXYB[7]_i_10_n_0 ,\sumXYB[7]_i_11_n_0 ,\sumXYB[7]_i_12_n_0 ,\sumXYB[7]_i_13_n_0 ,\sumXYB[7]_i_14_n_0 ,\sumXYB[7]_i_15_n_0 ,\sumXYB[7]_i_16_n_0 ,\sumXYB[7]_i_17_n_0 }));
  FDCE \sumXYB_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[15]_i_1_n_15 ),
        .Q(\sumXYB_reg_n_0_[8] ));
  FDCE \sumXYB_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXYB_reg[15]_i_1_n_14 ),
        .Q(\sumXYB_reg_n_0_[9] ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[15]_i_10 
       (.I0(colsumXY4p2[15]),
        .I1(\sumXYB_reg_n_0_[15] ),
        .I2(stateScore),
        .O(\sumXY[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[15]_i_11 
       (.I0(colsumXY4p2[14]),
        .I1(\sumXYB_reg_n_0_[14] ),
        .I2(stateScore),
        .O(\sumXY[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[15]_i_12 
       (.I0(colsumXY4p2[13]),
        .I1(\sumXYB_reg_n_0_[13] ),
        .I2(stateScore),
        .O(\sumXY[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[15]_i_13 
       (.I0(colsumXY4p2[12]),
        .I1(\sumXYB_reg_n_0_[12] ),
        .I2(stateScore),
        .O(\sumXY[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[15]_i_14 
       (.I0(colsumXY4p2[11]),
        .I1(\sumXYB_reg_n_0_[11] ),
        .I2(stateScore),
        .O(\sumXY[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[15]_i_15 
       (.I0(colsumXY4p2[10]),
        .I1(\sumXYB_reg_n_0_[10] ),
        .I2(stateScore),
        .O(\sumXY[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[15]_i_16 
       (.I0(colsumXY4p2[9]),
        .I1(\sumXYB_reg_n_0_[9] ),
        .I2(stateScore),
        .O(\sumXY[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[15]_i_17 
       (.I0(colsumXY4p2[8]),
        .I1(\sumXYB_reg_n_0_[8] ),
        .I2(stateScore),
        .O(\sumXY[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[15]_i_2 
       (.I0(colsumXY4p2[15]),
        .I1(stateScore),
        .O(\sumXY[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[15]_i_3 
       (.I0(colsumXY4p2[14]),
        .I1(stateScore),
        .O(\sumXY[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[15]_i_4 
       (.I0(colsumXY4p2[13]),
        .I1(stateScore),
        .O(\sumXY[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[15]_i_5 
       (.I0(colsumXY4p2[12]),
        .I1(stateScore),
        .O(\sumXY[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[15]_i_6 
       (.I0(colsumXY4p2[11]),
        .I1(stateScore),
        .O(\sumXY[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[15]_i_7 
       (.I0(colsumXY4p2[10]),
        .I1(stateScore),
        .O(\sumXY[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[15]_i_8 
       (.I0(colsumXY4p2[9]),
        .I1(stateScore),
        .O(\sumXY[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[15]_i_9 
       (.I0(colsumXY4p2[8]),
        .I1(stateScore),
        .O(\sumXY[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[22]_i_10 
       (.I0(colsumXY4p2[20]),
        .I1(\sumXYB_reg_n_0_[20] ),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[22]_i_11 
       (.I0(colsumXY4p2[19]),
        .I1(\sumXYB_reg_n_0_[19] ),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[22]_i_12 
       (.I0(colsumXY4p2[18]),
        .I1(\sumXYB_reg_n_0_[18] ),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[22]_i_13 
       (.I0(colsumXY4p2[17]),
        .I1(\sumXYB_reg_n_0_[17] ),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[22]_i_14 
       (.I0(colsumXY4p2[16]),
        .I1(\sumXYB_reg_n_0_[16] ),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[22]_i_2 
       (.I0(colsumXY4p2[20]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[22]_i_3 
       (.I0(colsumXY4p2[20]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[22]_i_4 
       (.I0(colsumXY4p2[19]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[22]_i_5 
       (.I0(colsumXY4p2[18]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[22]_i_6 
       (.I0(colsumXY4p2[17]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[22]_i_7 
       (.I0(colsumXY4p2[16]),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[22]_i_8 
       (.I0(colsumXY4p2[20]),
        .I1(\sumXYB_reg_n_0_[22] ),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[22]_i_9 
       (.I0(colsumXY4p2[20]),
        .I1(\sumXYB_reg_n_0_[21] ),
        .I2(stateScore_reg_rep__0_n_0),
        .O(\sumXY[22]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[7]_i_10 
       (.I0(colsumXY4p2[7]),
        .I1(\sumXYB_reg_n_0_[7] ),
        .I2(stateScore),
        .O(\sumXY[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[7]_i_11 
       (.I0(colsumXY4p2[6]),
        .I1(\sumXYB_reg_n_0_[6] ),
        .I2(stateScore),
        .O(\sumXY[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[7]_i_12 
       (.I0(colsumXY4p2[5]),
        .I1(\sumXYB_reg_n_0_[5] ),
        .I2(stateScore),
        .O(\sumXY[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[7]_i_13 
       (.I0(colsumXY4p2[4]),
        .I1(\sumXYB_reg_n_0_[4] ),
        .I2(stateScore),
        .O(\sumXY[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[7]_i_14 
       (.I0(colsumXY4p2[3]),
        .I1(\sumXYB_reg_n_0_[3] ),
        .I2(stateScore),
        .O(\sumXY[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[7]_i_15 
       (.I0(colsumXY4p2[2]),
        .I1(\sumXYB_reg_n_0_[2] ),
        .I2(stateScore),
        .O(\sumXY[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[7]_i_16 
       (.I0(colsumXY4p2[1]),
        .I1(\sumXYB_reg_n_0_[1] ),
        .I2(stateScore),
        .O(\sumXY[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumXY[7]_i_17 
       (.I0(colsumXY4p2[0]),
        .I1(\sumXYB_reg_n_0_[0] ),
        .I2(stateScore),
        .O(\sumXY[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[7]_i_2 
       (.I0(colsumXY4p2[7]),
        .I1(stateScore),
        .O(\sumXY[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[7]_i_3 
       (.I0(colsumXY4p2[6]),
        .I1(stateScore),
        .O(\sumXY[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[7]_i_4 
       (.I0(colsumXY4p2[5]),
        .I1(stateScore),
        .O(\sumXY[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[7]_i_5 
       (.I0(colsumXY4p2[4]),
        .I1(stateScore),
        .O(\sumXY[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[7]_i_6 
       (.I0(colsumXY4p2[3]),
        .I1(stateScore),
        .O(\sumXY[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[7]_i_7 
       (.I0(colsumXY4p2[2]),
        .I1(stateScore),
        .O(\sumXY[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[7]_i_8 
       (.I0(colsumXY4p2[1]),
        .I1(stateScore),
        .O(\sumXY[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumXY[7]_i_9 
       (.I0(colsumXY4p2[0]),
        .I1(stateScore),
        .O(\sumXY[7]_i_9_n_0 ));
  FDCE \sumXY_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[7]_i_1_n_15 ),
        .Q(sumXY[0]));
  FDCE \sumXY_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[15]_i_1_n_13 ),
        .Q(sumXY[10]));
  FDCE \sumXY_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[15]_i_1_n_12 ),
        .Q(sumXY[11]));
  FDCE \sumXY_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[15]_i_1_n_11 ),
        .Q(sumXY[12]));
  FDCE \sumXY_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[15]_i_1_n_10 ),
        .Q(sumXY[13]));
  FDCE \sumXY_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[15]_i_1_n_9 ),
        .Q(sumXY[14]));
  FDCE \sumXY_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[15]_i_1_n_8 ),
        .Q(sumXY[15]));
  CARRY8 \sumXY_reg[15]_i_1 
       (.CI(\sumXY_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumXY_reg[15]_i_1_n_0 ,\sumXY_reg[15]_i_1_n_1 ,\sumXY_reg[15]_i_1_n_2 ,\sumXY_reg[15]_i_1_n_3 ,\sumXY_reg[15]_i_1_n_4 ,\sumXY_reg[15]_i_1_n_5 ,\sumXY_reg[15]_i_1_n_6 ,\sumXY_reg[15]_i_1_n_7 }),
        .DI({\sumXY[15]_i_2_n_0 ,\sumXY[15]_i_3_n_0 ,\sumXY[15]_i_4_n_0 ,\sumXY[15]_i_5_n_0 ,\sumXY[15]_i_6_n_0 ,\sumXY[15]_i_7_n_0 ,\sumXY[15]_i_8_n_0 ,\sumXY[15]_i_9_n_0 }),
        .O({\sumXY_reg[15]_i_1_n_8 ,\sumXY_reg[15]_i_1_n_9 ,\sumXY_reg[15]_i_1_n_10 ,\sumXY_reg[15]_i_1_n_11 ,\sumXY_reg[15]_i_1_n_12 ,\sumXY_reg[15]_i_1_n_13 ,\sumXY_reg[15]_i_1_n_14 ,\sumXY_reg[15]_i_1_n_15 }),
        .S({\sumXY[15]_i_10_n_0 ,\sumXY[15]_i_11_n_0 ,\sumXY[15]_i_12_n_0 ,\sumXY[15]_i_13_n_0 ,\sumXY[15]_i_14_n_0 ,\sumXY[15]_i_15_n_0 ,\sumXY[15]_i_16_n_0 ,\sumXY[15]_i_17_n_0 }));
  FDCE \sumXY_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[22]_i_1_n_15 ),
        .Q(sumXY[16]));
  FDCE \sumXY_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[22]_i_1_n_14 ),
        .Q(sumXY[17]));
  FDCE \sumXY_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[22]_i_1_n_13 ),
        .Q(sumXY[18]));
  FDCE \sumXY_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[22]_i_1_n_12 ),
        .Q(sumXY[19]));
  FDCE \sumXY_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[7]_i_1_n_14 ),
        .Q(sumXY[1]));
  FDCE \sumXY_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[22]_i_1_n_11 ),
        .Q(sumXY[20]));
  FDCE \sumXY_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[22]_i_1_n_10 ),
        .Q(sumXY[21]));
  FDCE \sumXY_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[22]_i_1_n_9 ),
        .Q(sumXY[22]));
  CARRY8 \sumXY_reg[22]_i_1 
       (.CI(\sumXY_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumXY_reg[22]_i_1_CO_UNCONNECTED [7:6],\sumXY_reg[22]_i_1_n_2 ,\sumXY_reg[22]_i_1_n_3 ,\sumXY_reg[22]_i_1_n_4 ,\sumXY_reg[22]_i_1_n_5 ,\sumXY_reg[22]_i_1_n_6 ,\sumXY_reg[22]_i_1_n_7 }),
        .DI({1'b0,1'b0,\sumXY[22]_i_2_n_0 ,\sumXY[22]_i_3_n_0 ,\sumXY[22]_i_4_n_0 ,\sumXY[22]_i_5_n_0 ,\sumXY[22]_i_6_n_0 ,\sumXY[22]_i_7_n_0 }),
        .O({\NLW_sumXY_reg[22]_i_1_O_UNCONNECTED [7],\sumXY_reg[22]_i_1_n_9 ,\sumXY_reg[22]_i_1_n_10 ,\sumXY_reg[22]_i_1_n_11 ,\sumXY_reg[22]_i_1_n_12 ,\sumXY_reg[22]_i_1_n_13 ,\sumXY_reg[22]_i_1_n_14 ,\sumXY_reg[22]_i_1_n_15 }),
        .S({1'b0,\sumXY[22]_i_8_n_0 ,\sumXY[22]_i_9_n_0 ,\sumXY[22]_i_10_n_0 ,\sumXY[22]_i_11_n_0 ,\sumXY[22]_i_12_n_0 ,\sumXY[22]_i_13_n_0 ,\sumXY[22]_i_14_n_0 }));
  FDCE \sumXY_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[7]_i_1_n_13 ),
        .Q(sumXY[2]));
  FDCE \sumXY_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[7]_i_1_n_12 ),
        .Q(sumXY[3]));
  FDCE \sumXY_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[7]_i_1_n_11 ),
        .Q(sumXY[4]));
  FDCE \sumXY_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[7]_i_1_n_10 ),
        .Q(sumXY[5]));
  FDCE \sumXY_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[7]_i_1_n_9 ),
        .Q(sumXY[6]));
  FDCE \sumXY_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[7]_i_1_n_8 ),
        .Q(sumXY[7]));
  CARRY8 \sumXY_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumXY_reg[7]_i_1_n_0 ,\sumXY_reg[7]_i_1_n_1 ,\sumXY_reg[7]_i_1_n_2 ,\sumXY_reg[7]_i_1_n_3 ,\sumXY_reg[7]_i_1_n_4 ,\sumXY_reg[7]_i_1_n_5 ,\sumXY_reg[7]_i_1_n_6 ,\sumXY_reg[7]_i_1_n_7 }),
        .DI({\sumXY[7]_i_2_n_0 ,\sumXY[7]_i_3_n_0 ,\sumXY[7]_i_4_n_0 ,\sumXY[7]_i_5_n_0 ,\sumXY[7]_i_6_n_0 ,\sumXY[7]_i_7_n_0 ,\sumXY[7]_i_8_n_0 ,\sumXY[7]_i_9_n_0 }),
        .O({\sumXY_reg[7]_i_1_n_8 ,\sumXY_reg[7]_i_1_n_9 ,\sumXY_reg[7]_i_1_n_10 ,\sumXY_reg[7]_i_1_n_11 ,\sumXY_reg[7]_i_1_n_12 ,\sumXY_reg[7]_i_1_n_13 ,\sumXY_reg[7]_i_1_n_14 ,\sumXY_reg[7]_i_1_n_15 }),
        .S({\sumXY[7]_i_10_n_0 ,\sumXY[7]_i_11_n_0 ,\sumXY[7]_i_12_n_0 ,\sumXY[7]_i_13_n_0 ,\sumXY[7]_i_14_n_0 ,\sumXY[7]_i_15_n_0 ,\sumXY[7]_i_16_n_0 ,\sumXY[7]_i_17_n_0 }));
  FDCE \sumXY_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[15]_i_1_n_15 ),
        .Q(sumXY[8]));
  FDCE \sumXY_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumXY_reg[15]_i_1_n_14 ),
        .Q(sumXY[9]));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[15]_i_10 
       (.I0(colsumX4p2[15]),
        .I1(\sumXB_reg_n_0_[15] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[15]_i_11 
       (.I0(colsumX4p2[14]),
        .I1(\sumXB_reg_n_0_[14] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[15]_i_12 
       (.I0(colsumX4p2[13]),
        .I1(\sumXB_reg_n_0_[13] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[15]_i_13 
       (.I0(colsumX4p2[12]),
        .I1(\sumXB_reg_n_0_[12] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[15]_i_14 
       (.I0(colsumX4p2[11]),
        .I1(\sumXB_reg_n_0_[11] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[15]_i_15 
       (.I0(colsumX4p2[10]),
        .I1(\sumXB_reg_n_0_[10] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[15]_i_16 
       (.I0(colsumX4p2[9]),
        .I1(\sumXB_reg_n_0_[9] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[15]_i_17 
       (.I0(colsumX4p2[8]),
        .I1(\sumXB_reg_n_0_[8] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[15]_i_2 
       (.I0(colsumX4p2[15]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[15]_i_3 
       (.I0(colsumX4p2[14]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[15]_i_4 
       (.I0(colsumX4p2[13]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[15]_i_5 
       (.I0(colsumX4p2[12]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[15]_i_6 
       (.I0(colsumX4p2[11]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[15]_i_7 
       (.I0(colsumX4p2[10]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[15]_i_8 
       (.I0(colsumX4p2[9]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[15]_i_9 
       (.I0(colsumX4p2[8]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[22]_i_10 
       (.I0(colsumX4p2[20]),
        .I1(\sumXB_reg_n_0_[20] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[22]_i_11 
       (.I0(colsumX4p2[19]),
        .I1(\sumXB_reg_n_0_[19] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[22]_i_12 
       (.I0(colsumX4p2[18]),
        .I1(\sumXB_reg_n_0_[18] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[22]_i_13 
       (.I0(colsumX4p2[17]),
        .I1(\sumXB_reg_n_0_[17] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[22]_i_14 
       (.I0(colsumX4p2[16]),
        .I1(\sumXB_reg_n_0_[16] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[22]_i_2 
       (.I0(colsumX4p2[20]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[22]_i_3 
       (.I0(colsumX4p2[20]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[22]_i_4 
       (.I0(colsumX4p2[19]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[22]_i_5 
       (.I0(colsumX4p2[18]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[22]_i_6 
       (.I0(colsumX4p2[17]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[22]_i_7 
       (.I0(colsumX4p2[16]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[22]_i_8 
       (.I0(colsumX4p2[20]),
        .I1(\sumXB_reg_n_0_[22] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[22]_i_9 
       (.I0(colsumX4p2[20]),
        .I1(\sumXB_reg_n_0_[21] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumX[22]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[7]_i_10 
       (.I0(colsumX4p2[7]),
        .I1(\sumXB_reg_n_0_[7] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[7]_i_11 
       (.I0(colsumX4p2[6]),
        .I1(\sumXB_reg_n_0_[6] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[7]_i_12 
       (.I0(colsumX4p2[5]),
        .I1(\sumXB_reg_n_0_[5] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[7]_i_13 
       (.I0(colsumX4p2[4]),
        .I1(\sumXB_reg_n_0_[4] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[7]_i_14 
       (.I0(colsumX4p2[3]),
        .I1(\sumXB_reg_n_0_[3] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[7]_i_15 
       (.I0(colsumX4p2[2]),
        .I1(\sumXB_reg_n_0_[2] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[7]_i_16 
       (.I0(colsumX4p2[1]),
        .I1(\sumXB_reg_n_0_[1] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumX[7]_i_17 
       (.I0(colsumX4p2[0]),
        .I1(\sumXB_reg_n_0_[0] ),
        .I2(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[7]_i_2 
       (.I0(colsumX4p2[7]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[7]_i_3 
       (.I0(colsumX4p2[6]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[7]_i_4 
       (.I0(colsumX4p2[5]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[7]_i_5 
       (.I0(colsumX4p2[4]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[7]_i_6 
       (.I0(colsumX4p2[3]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[7]_i_7 
       (.I0(colsumX4p2[2]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[7]_i_8 
       (.I0(colsumX4p2[1]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumX[7]_i_9 
       (.I0(colsumX4p2[0]),
        .I1(stateScore_reg_rep__9_n_0),
        .O(\sumX[7]_i_9_n_0 ));
  FDCE \sumX_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[7]_i_1_n_15 ),
        .Q(sumX[0]));
  FDCE \sumX_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[15]_i_1_n_13 ),
        .Q(sumX[10]));
  FDCE \sumX_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[15]_i_1_n_12 ),
        .Q(sumX[11]));
  FDCE \sumX_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[15]_i_1_n_11 ),
        .Q(sumX[12]));
  FDCE \sumX_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[15]_i_1_n_10 ),
        .Q(sumX[13]));
  FDCE \sumX_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[15]_i_1_n_9 ),
        .Q(sumX[14]));
  FDCE \sumX_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[15]_i_1_n_8 ),
        .Q(sumX[15]));
  CARRY8 \sumX_reg[15]_i_1 
       (.CI(\sumX_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumX_reg[15]_i_1_n_0 ,\sumX_reg[15]_i_1_n_1 ,\sumX_reg[15]_i_1_n_2 ,\sumX_reg[15]_i_1_n_3 ,\sumX_reg[15]_i_1_n_4 ,\sumX_reg[15]_i_1_n_5 ,\sumX_reg[15]_i_1_n_6 ,\sumX_reg[15]_i_1_n_7 }),
        .DI({\sumX[15]_i_2_n_0 ,\sumX[15]_i_3_n_0 ,\sumX[15]_i_4_n_0 ,\sumX[15]_i_5_n_0 ,\sumX[15]_i_6_n_0 ,\sumX[15]_i_7_n_0 ,\sumX[15]_i_8_n_0 ,\sumX[15]_i_9_n_0 }),
        .O({\sumX_reg[15]_i_1_n_8 ,\sumX_reg[15]_i_1_n_9 ,\sumX_reg[15]_i_1_n_10 ,\sumX_reg[15]_i_1_n_11 ,\sumX_reg[15]_i_1_n_12 ,\sumX_reg[15]_i_1_n_13 ,\sumX_reg[15]_i_1_n_14 ,\sumX_reg[15]_i_1_n_15 }),
        .S({\sumX[15]_i_10_n_0 ,\sumX[15]_i_11_n_0 ,\sumX[15]_i_12_n_0 ,\sumX[15]_i_13_n_0 ,\sumX[15]_i_14_n_0 ,\sumX[15]_i_15_n_0 ,\sumX[15]_i_16_n_0 ,\sumX[15]_i_17_n_0 }));
  FDCE \sumX_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[22]_i_1_n_15 ),
        .Q(sumX[16]));
  FDCE \sumX_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[22]_i_1_n_14 ),
        .Q(sumX[17]));
  FDCE \sumX_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[22]_i_1_n_13 ),
        .Q(sumX[18]));
  FDCE \sumX_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[22]_i_1_n_12 ),
        .Q(sumX[19]));
  FDCE \sumX_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[7]_i_1_n_14 ),
        .Q(sumX[1]));
  FDCE \sumX_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[22]_i_1_n_11 ),
        .Q(sumX[20]));
  FDCE \sumX_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[22]_i_1_n_10 ),
        .Q(sumX[21]));
  FDCE \sumX_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[22]_i_1_n_9 ),
        .Q(sumX[22]));
  CARRY8 \sumX_reg[22]_i_1 
       (.CI(\sumX_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumX_reg[22]_i_1_CO_UNCONNECTED [7:6],\sumX_reg[22]_i_1_n_2 ,\sumX_reg[22]_i_1_n_3 ,\sumX_reg[22]_i_1_n_4 ,\sumX_reg[22]_i_1_n_5 ,\sumX_reg[22]_i_1_n_6 ,\sumX_reg[22]_i_1_n_7 }),
        .DI({1'b0,1'b0,\sumX[22]_i_2_n_0 ,\sumX[22]_i_3_n_0 ,\sumX[22]_i_4_n_0 ,\sumX[22]_i_5_n_0 ,\sumX[22]_i_6_n_0 ,\sumX[22]_i_7_n_0 }),
        .O({\NLW_sumX_reg[22]_i_1_O_UNCONNECTED [7],\sumX_reg[22]_i_1_n_9 ,\sumX_reg[22]_i_1_n_10 ,\sumX_reg[22]_i_1_n_11 ,\sumX_reg[22]_i_1_n_12 ,\sumX_reg[22]_i_1_n_13 ,\sumX_reg[22]_i_1_n_14 ,\sumX_reg[22]_i_1_n_15 }),
        .S({1'b0,\sumX[22]_i_8_n_0 ,\sumX[22]_i_9_n_0 ,\sumX[22]_i_10_n_0 ,\sumX[22]_i_11_n_0 ,\sumX[22]_i_12_n_0 ,\sumX[22]_i_13_n_0 ,\sumX[22]_i_14_n_0 }));
  FDCE \sumX_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[7]_i_1_n_13 ),
        .Q(sumX[2]));
  FDCE \sumX_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[7]_i_1_n_12 ),
        .Q(sumX[3]));
  FDCE \sumX_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[7]_i_1_n_11 ),
        .Q(sumX[4]));
  FDCE \sumX_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[7]_i_1_n_10 ),
        .Q(sumX[5]));
  FDCE \sumX_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[7]_i_1_n_9 ),
        .Q(sumX[6]));
  FDCE \sumX_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[7]_i_1_n_8 ),
        .Q(sumX[7]));
  CARRY8 \sumX_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumX_reg[7]_i_1_n_0 ,\sumX_reg[7]_i_1_n_1 ,\sumX_reg[7]_i_1_n_2 ,\sumX_reg[7]_i_1_n_3 ,\sumX_reg[7]_i_1_n_4 ,\sumX_reg[7]_i_1_n_5 ,\sumX_reg[7]_i_1_n_6 ,\sumX_reg[7]_i_1_n_7 }),
        .DI({\sumX[7]_i_2_n_0 ,\sumX[7]_i_3_n_0 ,\sumX[7]_i_4_n_0 ,\sumX[7]_i_5_n_0 ,\sumX[7]_i_6_n_0 ,\sumX[7]_i_7_n_0 ,\sumX[7]_i_8_n_0 ,\sumX[7]_i_9_n_0 }),
        .O({\sumX_reg[7]_i_1_n_8 ,\sumX_reg[7]_i_1_n_9 ,\sumX_reg[7]_i_1_n_10 ,\sumX_reg[7]_i_1_n_11 ,\sumX_reg[7]_i_1_n_12 ,\sumX_reg[7]_i_1_n_13 ,\sumX_reg[7]_i_1_n_14 ,\sumX_reg[7]_i_1_n_15 }),
        .S({\sumX[7]_i_10_n_0 ,\sumX[7]_i_11_n_0 ,\sumX[7]_i_12_n_0 ,\sumX[7]_i_13_n_0 ,\sumX[7]_i_14_n_0 ,\sumX[7]_i_15_n_0 ,\sumX[7]_i_16_n_0 ,\sumX[7]_i_17_n_0 }));
  FDCE \sumX_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[15]_i_1_n_15 ),
        .Q(sumX[8]));
  FDCE \sumX_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumX_reg[15]_i_1_n_14 ),
        .Q(sumX[9]));
  (* SOFT_HLUTNM = "soft_lutpair1227" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[0]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[0]),
        .O(\sumYA[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1222" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[10]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[10]),
        .O(\sumYA[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1222" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[11]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[11]),
        .O(\sumYA[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1221" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[12]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[12]),
        .O(\sumYA[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1221" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[13]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[13]),
        .O(\sumYA[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1220" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[14]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[14]),
        .O(\sumYA[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1220" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[15]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[15]),
        .O(\sumYA[15]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[15]_i_10 
       (.I0(\colsumY_reg_n_0_[29] ),
        .I1(\colsumY_reg_n_0_[8] ),
        .O(\sumYA[15]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[15]_i_3 
       (.I0(\colsumY_reg_n_0_[36] ),
        .I1(\colsumY_reg_n_0_[15] ),
        .O(\sumYA[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[15]_i_4 
       (.I0(\colsumY_reg_n_0_[35] ),
        .I1(\colsumY_reg_n_0_[14] ),
        .O(\sumYA[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[15]_i_5 
       (.I0(\colsumY_reg_n_0_[34] ),
        .I1(\colsumY_reg_n_0_[13] ),
        .O(\sumYA[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[15]_i_6 
       (.I0(\colsumY_reg_n_0_[33] ),
        .I1(\colsumY_reg_n_0_[12] ),
        .O(\sumYA[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[15]_i_7 
       (.I0(\colsumY_reg_n_0_[32] ),
        .I1(\colsumY_reg_n_0_[11] ),
        .O(\sumYA[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[15]_i_8 
       (.I0(\colsumY_reg_n_0_[31] ),
        .I1(\colsumY_reg_n_0_[10] ),
        .O(\sumYA[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[15]_i_9 
       (.I0(\colsumY_reg_n_0_[30] ),
        .I1(\colsumY_reg_n_0_[9] ),
        .O(\sumYA[15]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1219" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[16]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumYA0[16]),
        .O(\sumYA[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1219" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[17]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumYA0[17]),
        .O(\sumYA[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1218" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[18]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumYA0[18]),
        .O(\sumYA[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1218" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[19]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumYA0[19]),
        .O(\sumYA[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1227" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[1]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[1]),
        .O(\sumYA[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1217" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[20]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumYA0[20]),
        .O(\sumYA[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1217" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \sumYA[21]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\sumYA_reg[21]_i_2_n_2 ),
        .O(\sumYA[21]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \sumYA[21]_i_3 
       (.I0(\colsumY_reg_n_0_[41] ),
        .O(\sumYA[21]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[21]_i_4 
       (.I0(\colsumY_reg_n_0_[41] ),
        .I1(\colsumY_reg_n_0_[20] ),
        .O(\sumYA[21]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[21]_i_5 
       (.I0(\colsumY_reg_n_0_[40] ),
        .I1(\colsumY_reg_n_0_[19] ),
        .O(\sumYA[21]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[21]_i_6 
       (.I0(\colsumY_reg_n_0_[39] ),
        .I1(\colsumY_reg_n_0_[18] ),
        .O(\sumYA[21]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[21]_i_7 
       (.I0(\colsumY_reg_n_0_[38] ),
        .I1(\colsumY_reg_n_0_[17] ),
        .O(\sumYA[21]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[21]_i_8 
       (.I0(\colsumY_reg_n_0_[37] ),
        .I1(\colsumY_reg_n_0_[16] ),
        .O(\sumYA[21]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1216" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[22]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[0]),
        .O(\sumYA[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1216" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[23]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[1]),
        .O(\sumYA[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1215" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[24]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[2]),
        .O(\sumYA[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1215" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[25]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[3]),
        .O(\sumYA[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1214" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[26]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[4]),
        .O(\sumYA[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1214" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[27]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[5]),
        .O(\sumYA[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1213" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[28]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[6]),
        .O(\sumYA[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1213" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[29]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[7]),
        .O(\sumYA[29]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[29]_i_10 
       (.I0(\colsumY_reg_n_0_[63] ),
        .I1(\colsumY_reg_n_0_[42] ),
        .O(\sumYA[29]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[29]_i_3 
       (.I0(\colsumY_reg_n_0_[70] ),
        .I1(\colsumY_reg_n_0_[49] ),
        .O(\sumYA[29]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[29]_i_4 
       (.I0(\colsumY_reg_n_0_[69] ),
        .I1(\colsumY_reg_n_0_[48] ),
        .O(\sumYA[29]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[29]_i_5 
       (.I0(\colsumY_reg_n_0_[68] ),
        .I1(\colsumY_reg_n_0_[47] ),
        .O(\sumYA[29]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[29]_i_6 
       (.I0(\colsumY_reg_n_0_[67] ),
        .I1(\colsumY_reg_n_0_[46] ),
        .O(\sumYA[29]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[29]_i_7 
       (.I0(\colsumY_reg_n_0_[66] ),
        .I1(\colsumY_reg_n_0_[45] ),
        .O(\sumYA[29]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[29]_i_8 
       (.I0(\colsumY_reg_n_0_[65] ),
        .I1(\colsumY_reg_n_0_[44] ),
        .O(\sumYA[29]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[29]_i_9 
       (.I0(\colsumY_reg_n_0_[64] ),
        .I1(\colsumY_reg_n_0_[43] ),
        .O(\sumYA[29]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1226" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[2]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[2]),
        .O(\sumYA[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1212" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[30]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[8]),
        .O(\sumYA[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1212" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[31]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[9]),
        .O(\sumYA[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1211" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[32]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[10]),
        .O(\sumYA[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1211" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[33]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[11]),
        .O(\sumYA[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1210" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[34]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[12]),
        .O(\sumYA[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1210" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[35]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[13]),
        .O(\sumYA[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1209" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[36]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[14]),
        .O(\sumYA[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1209" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[37]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA00_in[15]),
        .O(\sumYA[37]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[37]_i_10 
       (.I0(\colsumY_reg_n_0_[71] ),
        .I1(\colsumY_reg_n_0_[50] ),
        .O(\sumYA[37]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[37]_i_3 
       (.I0(\colsumY_reg_n_0_[78] ),
        .I1(\colsumY_reg_n_0_[57] ),
        .O(\sumYA[37]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[37]_i_4 
       (.I0(\colsumY_reg_n_0_[77] ),
        .I1(\colsumY_reg_n_0_[56] ),
        .O(\sumYA[37]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[37]_i_5 
       (.I0(\colsumY_reg_n_0_[76] ),
        .I1(\colsumY_reg_n_0_[55] ),
        .O(\sumYA[37]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[37]_i_6 
       (.I0(\colsumY_reg_n_0_[75] ),
        .I1(\colsumY_reg_n_0_[54] ),
        .O(\sumYA[37]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[37]_i_7 
       (.I0(\colsumY_reg_n_0_[74] ),
        .I1(\colsumY_reg_n_0_[53] ),
        .O(\sumYA[37]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[37]_i_8 
       (.I0(\colsumY_reg_n_0_[73] ),
        .I1(\colsumY_reg_n_0_[52] ),
        .O(\sumYA[37]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[37]_i_9 
       (.I0(\colsumY_reg_n_0_[72] ),
        .I1(\colsumY_reg_n_0_[51] ),
        .O(\sumYA[37]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1208" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[38]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumYA00_in[16]),
        .O(\sumYA[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1208" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[39]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumYA00_in[17]),
        .O(\sumYA[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1226" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[3]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[3]),
        .O(\sumYA[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1207" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[40]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumYA00_in[18]),
        .O(\sumYA[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1207" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[41]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumYA00_in[19]),
        .O(\sumYA[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1206" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[42]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(sumYA00_in[20]),
        .O(\sumYA[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1206" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \sumYA[43]_i_1 
       (.I0(stateScore_reg_rep__11_n_0),
        .I1(\sumYA_reg[43]_i_2_n_2 ),
        .O(\sumYA[43]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \sumYA[43]_i_3 
       (.I0(\colsumY_reg_n_0_[83] ),
        .O(\sumYA[43]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[43]_i_4 
       (.I0(\colsumY_reg_n_0_[83] ),
        .I1(\colsumY_reg_n_0_[62] ),
        .O(\sumYA[43]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[43]_i_5 
       (.I0(\colsumY_reg_n_0_[82] ),
        .I1(\colsumY_reg_n_0_[61] ),
        .O(\sumYA[43]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[43]_i_6 
       (.I0(\colsumY_reg_n_0_[81] ),
        .I1(\colsumY_reg_n_0_[60] ),
        .O(\sumYA[43]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[43]_i_7 
       (.I0(\colsumY_reg_n_0_[80] ),
        .I1(\colsumY_reg_n_0_[59] ),
        .O(\sumYA[43]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[43]_i_8 
       (.I0(\colsumY_reg_n_0_[79] ),
        .I1(\colsumY_reg_n_0_[58] ),
        .O(\sumYA[43]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1225" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[4]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[4]),
        .O(\sumYA[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1225" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[5]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[5]),
        .O(\sumYA[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1224" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[6]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[6]),
        .O(\sumYA[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1224" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[7]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[7]),
        .O(\sumYA[7]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[7]_i_10 
       (.I0(\colsumY_reg_n_0_[21] ),
        .I1(\colsumY_reg_n_0_[0] ),
        .O(\sumYA[7]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[7]_i_3 
       (.I0(\colsumY_reg_n_0_[28] ),
        .I1(\colsumY_reg_n_0_[7] ),
        .O(\sumYA[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[7]_i_4 
       (.I0(\colsumY_reg_n_0_[27] ),
        .I1(\colsumY_reg_n_0_[6] ),
        .O(\sumYA[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[7]_i_5 
       (.I0(\colsumY_reg_n_0_[26] ),
        .I1(\colsumY_reg_n_0_[5] ),
        .O(\sumYA[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[7]_i_6 
       (.I0(\colsumY_reg_n_0_[25] ),
        .I1(\colsumY_reg_n_0_[4] ),
        .O(\sumYA[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[7]_i_7 
       (.I0(\colsumY_reg_n_0_[24] ),
        .I1(\colsumY_reg_n_0_[3] ),
        .O(\sumYA[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[7]_i_8 
       (.I0(\colsumY_reg_n_0_[23] ),
        .I1(\colsumY_reg_n_0_[2] ),
        .O(\sumYA[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \sumYA[7]_i_9 
       (.I0(\colsumY_reg_n_0_[22] ),
        .I1(\colsumY_reg_n_0_[1] ),
        .O(\sumYA[7]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1223" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[8]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[8]),
        .O(\sumYA[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1223" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sumYA[9]_i_1 
       (.I0(stateScore_reg_rep__6_n_0),
        .I1(sumYA0[9]),
        .O(\sumYA[9]_i_1_n_0 ));
  FDCE \sumYA_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[0]_i_1_n_0 ),
        .Q(sumYA[0]));
  FDCE \sumYA_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[10]_i_1_n_0 ),
        .Q(sumYA[10]));
  FDCE \sumYA_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[11]_i_1_n_0 ),
        .Q(sumYA[11]));
  FDCE \sumYA_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[12]_i_1_n_0 ),
        .Q(sumYA[12]));
  FDCE \sumYA_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[13]_i_1_n_0 ),
        .Q(sumYA[13]));
  FDCE \sumYA_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[14]_i_1_n_0 ),
        .Q(sumYA[14]));
  FDCE \sumYA_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[15]_i_1_n_0 ),
        .Q(sumYA[15]));
  CARRY8 \sumYA_reg[15]_i_2 
       (.CI(\sumYA_reg[7]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumYA_reg[15]_i_2_n_0 ,\sumYA_reg[15]_i_2_n_1 ,\sumYA_reg[15]_i_2_n_2 ,\sumYA_reg[15]_i_2_n_3 ,\sumYA_reg[15]_i_2_n_4 ,\sumYA_reg[15]_i_2_n_5 ,\sumYA_reg[15]_i_2_n_6 ,\sumYA_reg[15]_i_2_n_7 }),
        .DI({\colsumY_reg_n_0_[36] ,\colsumY_reg_n_0_[35] ,\colsumY_reg_n_0_[34] ,\colsumY_reg_n_0_[33] ,\colsumY_reg_n_0_[32] ,\colsumY_reg_n_0_[31] ,\colsumY_reg_n_0_[30] ,\colsumY_reg_n_0_[29] }),
        .O(sumYA0[15:8]),
        .S({\sumYA[15]_i_3_n_0 ,\sumYA[15]_i_4_n_0 ,\sumYA[15]_i_5_n_0 ,\sumYA[15]_i_6_n_0 ,\sumYA[15]_i_7_n_0 ,\sumYA[15]_i_8_n_0 ,\sumYA[15]_i_9_n_0 ,\sumYA[15]_i_10_n_0 }));
  FDCE \sumYA_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[16]_i_1_n_0 ),
        .Q(sumYA[16]));
  FDCE \sumYA_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[17]_i_1_n_0 ),
        .Q(sumYA[17]));
  FDCE \sumYA_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[18]_i_1_n_0 ),
        .Q(sumYA[18]));
  FDCE \sumYA_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[19]_i_1_n_0 ),
        .Q(sumYA[19]));
  FDCE \sumYA_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[1]_i_1_n_0 ),
        .Q(sumYA[1]));
  FDCE \sumYA_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[20]_i_1_n_0 ),
        .Q(sumYA[20]));
  FDCE \sumYA_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[21]_i_1_n_0 ),
        .Q(sumYA[21]));
  CARRY8 \sumYA_reg[21]_i_2 
       (.CI(\sumYA_reg[15]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumYA_reg[21]_i_2_CO_UNCONNECTED [7:6],\sumYA_reg[21]_i_2_n_2 ,\NLW_sumYA_reg[21]_i_2_CO_UNCONNECTED [4],\sumYA_reg[21]_i_2_n_4 ,\sumYA_reg[21]_i_2_n_5 ,\sumYA_reg[21]_i_2_n_6 ,\sumYA_reg[21]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\sumYA[21]_i_3_n_0 ,\colsumY_reg_n_0_[40] ,\colsumY_reg_n_0_[39] ,\colsumY_reg_n_0_[38] ,\colsumY_reg_n_0_[37] }),
        .O({\NLW_sumYA_reg[21]_i_2_O_UNCONNECTED [7:5],sumYA0[20:16]}),
        .S({1'b0,1'b0,1'b1,\sumYA[21]_i_4_n_0 ,\sumYA[21]_i_5_n_0 ,\sumYA[21]_i_6_n_0 ,\sumYA[21]_i_7_n_0 ,\sumYA[21]_i_8_n_0 }));
  FDCE \sumYA_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[22]_i_1_n_0 ),
        .Q(sumYA[22]));
  FDCE \sumYA_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[23]_i_1_n_0 ),
        .Q(sumYA[23]));
  FDCE \sumYA_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[24]_i_1_n_0 ),
        .Q(sumYA[24]));
  FDCE \sumYA_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[25]_i_1_n_0 ),
        .Q(sumYA[25]));
  FDCE \sumYA_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[26]_i_1_n_0 ),
        .Q(sumYA[26]));
  FDCE \sumYA_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[27]_i_1_n_0 ),
        .Q(sumYA[27]));
  FDCE \sumYA_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[28]_i_1_n_0 ),
        .Q(sumYA[28]));
  FDCE \sumYA_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[29]_i_1_n_0 ),
        .Q(sumYA[29]));
  CARRY8 \sumYA_reg[29]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumYA_reg[29]_i_2_n_0 ,\sumYA_reg[29]_i_2_n_1 ,\sumYA_reg[29]_i_2_n_2 ,\sumYA_reg[29]_i_2_n_3 ,\sumYA_reg[29]_i_2_n_4 ,\sumYA_reg[29]_i_2_n_5 ,\sumYA_reg[29]_i_2_n_6 ,\sumYA_reg[29]_i_2_n_7 }),
        .DI({\colsumY_reg_n_0_[70] ,\colsumY_reg_n_0_[69] ,\colsumY_reg_n_0_[68] ,\colsumY_reg_n_0_[67] ,\colsumY_reg_n_0_[66] ,\colsumY_reg_n_0_[65] ,\colsumY_reg_n_0_[64] ,\colsumY_reg_n_0_[63] }),
        .O(sumYA00_in[7:0]),
        .S({\sumYA[29]_i_3_n_0 ,\sumYA[29]_i_4_n_0 ,\sumYA[29]_i_5_n_0 ,\sumYA[29]_i_6_n_0 ,\sumYA[29]_i_7_n_0 ,\sumYA[29]_i_8_n_0 ,\sumYA[29]_i_9_n_0 ,\sumYA[29]_i_10_n_0 }));
  FDCE \sumYA_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[2]_i_1_n_0 ),
        .Q(sumYA[2]));
  FDCE \sumYA_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[30]_i_1_n_0 ),
        .Q(sumYA[30]));
  FDCE \sumYA_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[31]_i_1_n_0 ),
        .Q(sumYA[31]));
  FDCE \sumYA_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[32]_i_1_n_0 ),
        .Q(sumYA[32]));
  FDCE \sumYA_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[33]_i_1_n_0 ),
        .Q(sumYA[33]));
  FDCE \sumYA_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[34]_i_1_n_0 ),
        .Q(sumYA[34]));
  FDCE \sumYA_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[35]_i_1_n_0 ),
        .Q(sumYA[35]));
  FDCE \sumYA_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[36]_i_1_n_0 ),
        .Q(sumYA[36]));
  FDCE \sumYA_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[37]_i_1_n_0 ),
        .Q(sumYA[37]));
  CARRY8 \sumYA_reg[37]_i_2 
       (.CI(\sumYA_reg[29]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumYA_reg[37]_i_2_n_0 ,\sumYA_reg[37]_i_2_n_1 ,\sumYA_reg[37]_i_2_n_2 ,\sumYA_reg[37]_i_2_n_3 ,\sumYA_reg[37]_i_2_n_4 ,\sumYA_reg[37]_i_2_n_5 ,\sumYA_reg[37]_i_2_n_6 ,\sumYA_reg[37]_i_2_n_7 }),
        .DI({\colsumY_reg_n_0_[78] ,\colsumY_reg_n_0_[77] ,\colsumY_reg_n_0_[76] ,\colsumY_reg_n_0_[75] ,\colsumY_reg_n_0_[74] ,\colsumY_reg_n_0_[73] ,\colsumY_reg_n_0_[72] ,\colsumY_reg_n_0_[71] }),
        .O(sumYA00_in[15:8]),
        .S({\sumYA[37]_i_3_n_0 ,\sumYA[37]_i_4_n_0 ,\sumYA[37]_i_5_n_0 ,\sumYA[37]_i_6_n_0 ,\sumYA[37]_i_7_n_0 ,\sumYA[37]_i_8_n_0 ,\sumYA[37]_i_9_n_0 ,\sumYA[37]_i_10_n_0 }));
  FDCE \sumYA_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[38]_i_1_n_0 ),
        .Q(sumYA[38]));
  FDCE \sumYA_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[39]_i_1_n_0 ),
        .Q(sumYA[39]));
  FDCE \sumYA_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[3]_i_1_n_0 ),
        .Q(sumYA[3]));
  FDCE \sumYA_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[40]_i_1_n_0 ),
        .Q(sumYA[40]));
  FDCE \sumYA_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[41]_i_1_n_0 ),
        .Q(sumYA[41]));
  FDCE \sumYA_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[42]_i_1_n_0 ),
        .Q(sumYA[42]));
  FDCE \sumYA_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[43]_i_1_n_0 ),
        .Q(sumYA[43]));
  CARRY8 \sumYA_reg[43]_i_2 
       (.CI(\sumYA_reg[37]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumYA_reg[43]_i_2_CO_UNCONNECTED [7:6],\sumYA_reg[43]_i_2_n_2 ,\NLW_sumYA_reg[43]_i_2_CO_UNCONNECTED [4],\sumYA_reg[43]_i_2_n_4 ,\sumYA_reg[43]_i_2_n_5 ,\sumYA_reg[43]_i_2_n_6 ,\sumYA_reg[43]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\sumYA[43]_i_3_n_0 ,\colsumY_reg_n_0_[82] ,\colsumY_reg_n_0_[81] ,\colsumY_reg_n_0_[80] ,\colsumY_reg_n_0_[79] }),
        .O({\NLW_sumYA_reg[43]_i_2_O_UNCONNECTED [7:5],sumYA00_in[20:16]}),
        .S({1'b0,1'b0,1'b1,\sumYA[43]_i_4_n_0 ,\sumYA[43]_i_5_n_0 ,\sumYA[43]_i_6_n_0 ,\sumYA[43]_i_7_n_0 ,\sumYA[43]_i_8_n_0 }));
  FDCE \sumYA_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[4]_i_1_n_0 ),
        .Q(sumYA[4]));
  FDCE \sumYA_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[5]_i_1_n_0 ),
        .Q(sumYA[5]));
  FDCE \sumYA_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[6]_i_1_n_0 ),
        .Q(sumYA[6]));
  FDCE \sumYA_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[7]_i_1_n_0 ),
        .Q(sumYA[7]));
  CARRY8 \sumYA_reg[7]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumYA_reg[7]_i_2_n_0 ,\sumYA_reg[7]_i_2_n_1 ,\sumYA_reg[7]_i_2_n_2 ,\sumYA_reg[7]_i_2_n_3 ,\sumYA_reg[7]_i_2_n_4 ,\sumYA_reg[7]_i_2_n_5 ,\sumYA_reg[7]_i_2_n_6 ,\sumYA_reg[7]_i_2_n_7 }),
        .DI({\colsumY_reg_n_0_[28] ,\colsumY_reg_n_0_[27] ,\colsumY_reg_n_0_[26] ,\colsumY_reg_n_0_[25] ,\colsumY_reg_n_0_[24] ,\colsumY_reg_n_0_[23] ,\colsumY_reg_n_0_[22] ,\colsumY_reg_n_0_[21] }),
        .O(sumYA0[7:0]),
        .S({\sumYA[7]_i_3_n_0 ,\sumYA[7]_i_4_n_0 ,\sumYA[7]_i_5_n_0 ,\sumYA[7]_i_6_n_0 ,\sumYA[7]_i_7_n_0 ,\sumYA[7]_i_8_n_0 ,\sumYA[7]_i_9_n_0 ,\sumYA[7]_i_10_n_0 }));
  FDCE \sumYA_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[8]_i_1_n_0 ),
        .Q(sumYA[8]));
  FDCE \sumYA_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYA[9]_i_1_n_0 ),
        .Q(sumYA[9]));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[15]_i_10 
       (.I0(sumYA[15]),
        .I1(sumYA[37]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[15]_i_11 
       (.I0(sumYA[14]),
        .I1(sumYA[36]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[15]_i_12 
       (.I0(sumYA[13]),
        .I1(sumYA[35]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[15]_i_13 
       (.I0(sumYA[12]),
        .I1(sumYA[34]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[15]_i_14 
       (.I0(sumYA[11]),
        .I1(sumYA[33]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[15]_i_15 
       (.I0(sumYA[10]),
        .I1(sumYA[32]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[15]_i_16 
       (.I0(sumYA[9]),
        .I1(sumYA[31]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[15]_i_17 
       (.I0(sumYA[8]),
        .I1(sumYA[30]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[15]_i_2 
       (.I0(sumYA[15]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[15]_i_3 
       (.I0(sumYA[14]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[15]_i_4 
       (.I0(sumYA[13]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[15]_i_5 
       (.I0(sumYA[12]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[15]_i_6 
       (.I0(sumYA[11]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[15]_i_7 
       (.I0(sumYA[10]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[15]_i_8 
       (.I0(sumYA[9]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[15]_i_9 
       (.I0(sumYA[8]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[22]_i_10 
       (.I0(sumYA[20]),
        .I1(sumYA[42]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[22]_i_11 
       (.I0(sumYA[19]),
        .I1(sumYA[41]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[22]_i_12 
       (.I0(sumYA[18]),
        .I1(sumYA[40]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[22]_i_13 
       (.I0(sumYA[17]),
        .I1(sumYA[39]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[22]_i_14 
       (.I0(sumYA[16]),
        .I1(sumYA[38]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[22]_i_2 
       (.I0(sumYA[21]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[22]_i_3 
       (.I0(sumYA[20]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[22]_i_4 
       (.I0(sumYA[19]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[22]_i_5 
       (.I0(sumYA[18]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[22]_i_6 
       (.I0(sumYA[17]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[22]_i_7 
       (.I0(sumYA[16]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[22]_i_8 
       (.I0(sumYA[21]),
        .I1(sumYA[43]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[22]_i_9 
       (.I0(sumYA[21]),
        .I1(sumYA[43]),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumYB[22]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[7]_i_10 
       (.I0(sumYA[7]),
        .I1(sumYA[29]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[7]_i_11 
       (.I0(sumYA[6]),
        .I1(sumYA[28]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[7]_i_12 
       (.I0(sumYA[5]),
        .I1(sumYA[27]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[7]_i_13 
       (.I0(sumYA[4]),
        .I1(sumYA[26]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[7]_i_14 
       (.I0(sumYA[3]),
        .I1(sumYA[25]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[7]_i_15 
       (.I0(sumYA[2]),
        .I1(sumYA[24]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[7]_i_16 
       (.I0(sumYA[1]),
        .I1(sumYA[23]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumYB[7]_i_17 
       (.I0(sumYA[0]),
        .I1(sumYA[22]),
        .I2(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[7]_i_2 
       (.I0(sumYA[7]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[7]_i_3 
       (.I0(sumYA[6]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[7]_i_4 
       (.I0(sumYA[5]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[7]_i_5 
       (.I0(sumYA[4]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[7]_i_6 
       (.I0(sumYA[3]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[7]_i_7 
       (.I0(sumYA[2]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[7]_i_8 
       (.I0(sumYA[1]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumYB[7]_i_9 
       (.I0(sumYA[0]),
        .I1(stateScore_reg_rep__6_n_0),
        .O(\sumYB[7]_i_9_n_0 ));
  FDCE \sumYB_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[7]_i_1_n_15 ),
        .Q(\sumYB_reg_n_0_[0] ));
  FDCE \sumYB_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[15]_i_1_n_13 ),
        .Q(\sumYB_reg_n_0_[10] ));
  FDCE \sumYB_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[15]_i_1_n_12 ),
        .Q(\sumYB_reg_n_0_[11] ));
  FDCE \sumYB_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[15]_i_1_n_11 ),
        .Q(\sumYB_reg_n_0_[12] ));
  FDCE \sumYB_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[15]_i_1_n_10 ),
        .Q(\sumYB_reg_n_0_[13] ));
  FDCE \sumYB_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[15]_i_1_n_9 ),
        .Q(\sumYB_reg_n_0_[14] ));
  FDCE \sumYB_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[15]_i_1_n_8 ),
        .Q(\sumYB_reg_n_0_[15] ));
  CARRY8 \sumYB_reg[15]_i_1 
       (.CI(\sumYB_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumYB_reg[15]_i_1_n_0 ,\sumYB_reg[15]_i_1_n_1 ,\sumYB_reg[15]_i_1_n_2 ,\sumYB_reg[15]_i_1_n_3 ,\sumYB_reg[15]_i_1_n_4 ,\sumYB_reg[15]_i_1_n_5 ,\sumYB_reg[15]_i_1_n_6 ,\sumYB_reg[15]_i_1_n_7 }),
        .DI({\sumYB[15]_i_2_n_0 ,\sumYB[15]_i_3_n_0 ,\sumYB[15]_i_4_n_0 ,\sumYB[15]_i_5_n_0 ,\sumYB[15]_i_6_n_0 ,\sumYB[15]_i_7_n_0 ,\sumYB[15]_i_8_n_0 ,\sumYB[15]_i_9_n_0 }),
        .O({\sumYB_reg[15]_i_1_n_8 ,\sumYB_reg[15]_i_1_n_9 ,\sumYB_reg[15]_i_1_n_10 ,\sumYB_reg[15]_i_1_n_11 ,\sumYB_reg[15]_i_1_n_12 ,\sumYB_reg[15]_i_1_n_13 ,\sumYB_reg[15]_i_1_n_14 ,\sumYB_reg[15]_i_1_n_15 }),
        .S({\sumYB[15]_i_10_n_0 ,\sumYB[15]_i_11_n_0 ,\sumYB[15]_i_12_n_0 ,\sumYB[15]_i_13_n_0 ,\sumYB[15]_i_14_n_0 ,\sumYB[15]_i_15_n_0 ,\sumYB[15]_i_16_n_0 ,\sumYB[15]_i_17_n_0 }));
  FDCE \sumYB_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[22]_i_1_n_15 ),
        .Q(\sumYB_reg_n_0_[16] ));
  FDCE \sumYB_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[22]_i_1_n_14 ),
        .Q(\sumYB_reg_n_0_[17] ));
  FDCE \sumYB_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[22]_i_1_n_13 ),
        .Q(\sumYB_reg_n_0_[18] ));
  FDCE \sumYB_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[22]_i_1_n_12 ),
        .Q(\sumYB_reg_n_0_[19] ));
  FDCE \sumYB_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[7]_i_1_n_14 ),
        .Q(\sumYB_reg_n_0_[1] ));
  FDCE \sumYB_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[22]_i_1_n_11 ),
        .Q(\sumYB_reg_n_0_[20] ));
  FDCE \sumYB_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[22]_i_1_n_10 ),
        .Q(\sumYB_reg_n_0_[21] ));
  FDCE \sumYB_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[22]_i_1_n_9 ),
        .Q(\sumYB_reg_n_0_[22] ));
  CARRY8 \sumYB_reg[22]_i_1 
       (.CI(\sumYB_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumYB_reg[22]_i_1_CO_UNCONNECTED [7:6],\sumYB_reg[22]_i_1_n_2 ,\sumYB_reg[22]_i_1_n_3 ,\sumYB_reg[22]_i_1_n_4 ,\sumYB_reg[22]_i_1_n_5 ,\sumYB_reg[22]_i_1_n_6 ,\sumYB_reg[22]_i_1_n_7 }),
        .DI({1'b0,1'b0,\sumYB[22]_i_2_n_0 ,\sumYB[22]_i_3_n_0 ,\sumYB[22]_i_4_n_0 ,\sumYB[22]_i_5_n_0 ,\sumYB[22]_i_6_n_0 ,\sumYB[22]_i_7_n_0 }),
        .O({\NLW_sumYB_reg[22]_i_1_O_UNCONNECTED [7],\sumYB_reg[22]_i_1_n_9 ,\sumYB_reg[22]_i_1_n_10 ,\sumYB_reg[22]_i_1_n_11 ,\sumYB_reg[22]_i_1_n_12 ,\sumYB_reg[22]_i_1_n_13 ,\sumYB_reg[22]_i_1_n_14 ,\sumYB_reg[22]_i_1_n_15 }),
        .S({1'b0,\sumYB[22]_i_8_n_0 ,\sumYB[22]_i_9_n_0 ,\sumYB[22]_i_10_n_0 ,\sumYB[22]_i_11_n_0 ,\sumYB[22]_i_12_n_0 ,\sumYB[22]_i_13_n_0 ,\sumYB[22]_i_14_n_0 }));
  FDCE \sumYB_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[7]_i_1_n_13 ),
        .Q(\sumYB_reg_n_0_[2] ));
  FDCE \sumYB_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[7]_i_1_n_12 ),
        .Q(\sumYB_reg_n_0_[3] ));
  FDCE \sumYB_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[7]_i_1_n_11 ),
        .Q(\sumYB_reg_n_0_[4] ));
  FDCE \sumYB_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[7]_i_1_n_10 ),
        .Q(\sumYB_reg_n_0_[5] ));
  FDCE \sumYB_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[7]_i_1_n_9 ),
        .Q(\sumYB_reg_n_0_[6] ));
  FDCE \sumYB_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[7]_i_1_n_8 ),
        .Q(\sumYB_reg_n_0_[7] ));
  CARRY8 \sumYB_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumYB_reg[7]_i_1_n_0 ,\sumYB_reg[7]_i_1_n_1 ,\sumYB_reg[7]_i_1_n_2 ,\sumYB_reg[7]_i_1_n_3 ,\sumYB_reg[7]_i_1_n_4 ,\sumYB_reg[7]_i_1_n_5 ,\sumYB_reg[7]_i_1_n_6 ,\sumYB_reg[7]_i_1_n_7 }),
        .DI({\sumYB[7]_i_2_n_0 ,\sumYB[7]_i_3_n_0 ,\sumYB[7]_i_4_n_0 ,\sumYB[7]_i_5_n_0 ,\sumYB[7]_i_6_n_0 ,\sumYB[7]_i_7_n_0 ,\sumYB[7]_i_8_n_0 ,\sumYB[7]_i_9_n_0 }),
        .O({\sumYB_reg[7]_i_1_n_8 ,\sumYB_reg[7]_i_1_n_9 ,\sumYB_reg[7]_i_1_n_10 ,\sumYB_reg[7]_i_1_n_11 ,\sumYB_reg[7]_i_1_n_12 ,\sumYB_reg[7]_i_1_n_13 ,\sumYB_reg[7]_i_1_n_14 ,\sumYB_reg[7]_i_1_n_15 }),
        .S({\sumYB[7]_i_10_n_0 ,\sumYB[7]_i_11_n_0 ,\sumYB[7]_i_12_n_0 ,\sumYB[7]_i_13_n_0 ,\sumYB[7]_i_14_n_0 ,\sumYB[7]_i_15_n_0 ,\sumYB[7]_i_16_n_0 ,\sumYB[7]_i_17_n_0 }));
  FDCE \sumYB_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[15]_i_1_n_15 ),
        .Q(\sumYB_reg_n_0_[8] ));
  FDCE \sumYB_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumYB_reg[15]_i_1_n_14 ),
        .Q(\sumYB_reg_n_0_[9] ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[15]_i_10 
       (.I0(colsumY4p2[15]),
        .I1(\sumYB_reg_n_0_[15] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[15]_i_11 
       (.I0(colsumY4p2[14]),
        .I1(\sumYB_reg_n_0_[14] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[15]_i_12 
       (.I0(colsumY4p2[13]),
        .I1(\sumYB_reg_n_0_[13] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[15]_i_13 
       (.I0(colsumY4p2[12]),
        .I1(\sumYB_reg_n_0_[12] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[15]_i_14 
       (.I0(colsumY4p2[11]),
        .I1(\sumYB_reg_n_0_[11] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[15]_i_15 
       (.I0(colsumY4p2[10]),
        .I1(\sumYB_reg_n_0_[10] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[15]_i_16 
       (.I0(colsumY4p2[9]),
        .I1(\sumYB_reg_n_0_[9] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[15]_i_17 
       (.I0(colsumY4p2[8]),
        .I1(\sumYB_reg_n_0_[8] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[15]_i_2 
       (.I0(colsumY4p2[15]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[15]_i_3 
       (.I0(colsumY4p2[14]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[15]_i_4 
       (.I0(colsumY4p2[13]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[15]_i_5 
       (.I0(colsumY4p2[12]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[15]_i_6 
       (.I0(colsumY4p2[11]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[15]_i_7 
       (.I0(colsumY4p2[10]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[15]_i_8 
       (.I0(colsumY4p2[9]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[15]_i_9 
       (.I0(colsumY4p2[8]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[15]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[22]_i_10 
       (.I0(colsumY4p2[20]),
        .I1(\sumYB_reg_n_0_[20] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[22]_i_11 
       (.I0(colsumY4p2[19]),
        .I1(\sumYB_reg_n_0_[19] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[22]_i_12 
       (.I0(colsumY4p2[18]),
        .I1(\sumYB_reg_n_0_[18] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[22]_i_13 
       (.I0(colsumY4p2[17]),
        .I1(\sumYB_reg_n_0_[17] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[22]_i_14 
       (.I0(colsumY4p2[16]),
        .I1(\sumYB_reg_n_0_[16] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[22]_i_2 
       (.I0(colsumY4p2[20]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[22]_i_3 
       (.I0(colsumY4p2[20]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[22]_i_4 
       (.I0(colsumY4p2[19]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[22]_i_5 
       (.I0(colsumY4p2[18]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[22]_i_6 
       (.I0(colsumY4p2[17]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[22]_i_7 
       (.I0(colsumY4p2[16]),
        .I1(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[22]_i_8 
       (.I0(colsumY4p2[20]),
        .I1(\sumYB_reg_n_0_[22] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_8_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[22]_i_9 
       (.I0(colsumY4p2[20]),
        .I1(\sumYB_reg_n_0_[21] ),
        .I2(stateScore_reg_rep__11_n_0),
        .O(\sumY[22]_i_9_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[7]_i_10 
       (.I0(colsumY4p2[7]),
        .I1(\sumYB_reg_n_0_[7] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_10_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[7]_i_11 
       (.I0(colsumY4p2[6]),
        .I1(\sumYB_reg_n_0_[6] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_11_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[7]_i_12 
       (.I0(colsumY4p2[5]),
        .I1(\sumYB_reg_n_0_[5] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[7]_i_13 
       (.I0(colsumY4p2[4]),
        .I1(\sumYB_reg_n_0_[4] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[7]_i_14 
       (.I0(colsumY4p2[3]),
        .I1(\sumYB_reg_n_0_[3] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[7]_i_15 
       (.I0(colsumY4p2[2]),
        .I1(\sumYB_reg_n_0_[2] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[7]_i_16 
       (.I0(colsumY4p2[1]),
        .I1(\sumYB_reg_n_0_[1] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \sumY[7]_i_17 
       (.I0(colsumY4p2[0]),
        .I1(\sumYB_reg_n_0_[0] ),
        .I2(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[7]_i_2 
       (.I0(colsumY4p2[7]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[7]_i_3 
       (.I0(colsumY4p2[6]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[7]_i_4 
       (.I0(colsumY4p2[5]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[7]_i_5 
       (.I0(colsumY4p2[4]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[7]_i_6 
       (.I0(colsumY4p2[3]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[7]_i_7 
       (.I0(colsumY4p2[2]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[7]_i_8 
       (.I0(colsumY4p2[1]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \sumY[7]_i_9 
       (.I0(colsumY4p2[0]),
        .I1(stateScore_reg_rep__5_n_0),
        .O(\sumY[7]_i_9_n_0 ));
  FDCE \sumY_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[7]_i_1_n_15 ),
        .Q(\sumY_reg_n_0_[0] ));
  FDCE \sumY_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[15]_i_1_n_13 ),
        .Q(\sumY_reg_n_0_[10] ));
  FDCE \sumY_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[15]_i_1_n_12 ),
        .Q(\sumY_reg_n_0_[11] ));
  FDCE \sumY_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[15]_i_1_n_11 ),
        .Q(\sumY_reg_n_0_[12] ));
  FDCE \sumY_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[15]_i_1_n_10 ),
        .Q(\sumY_reg_n_0_[13] ));
  FDCE \sumY_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[15]_i_1_n_9 ),
        .Q(\sumY_reg_n_0_[14] ));
  FDCE \sumY_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[15]_i_1_n_8 ),
        .Q(\sumY_reg_n_0_[15] ));
  CARRY8 \sumY_reg[15]_i_1 
       (.CI(\sumY_reg[7]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\sumY_reg[15]_i_1_n_0 ,\sumY_reg[15]_i_1_n_1 ,\sumY_reg[15]_i_1_n_2 ,\sumY_reg[15]_i_1_n_3 ,\sumY_reg[15]_i_1_n_4 ,\sumY_reg[15]_i_1_n_5 ,\sumY_reg[15]_i_1_n_6 ,\sumY_reg[15]_i_1_n_7 }),
        .DI({\sumY[15]_i_2_n_0 ,\sumY[15]_i_3_n_0 ,\sumY[15]_i_4_n_0 ,\sumY[15]_i_5_n_0 ,\sumY[15]_i_6_n_0 ,\sumY[15]_i_7_n_0 ,\sumY[15]_i_8_n_0 ,\sumY[15]_i_9_n_0 }),
        .O({\sumY_reg[15]_i_1_n_8 ,\sumY_reg[15]_i_1_n_9 ,\sumY_reg[15]_i_1_n_10 ,\sumY_reg[15]_i_1_n_11 ,\sumY_reg[15]_i_1_n_12 ,\sumY_reg[15]_i_1_n_13 ,\sumY_reg[15]_i_1_n_14 ,\sumY_reg[15]_i_1_n_15 }),
        .S({\sumY[15]_i_10_n_0 ,\sumY[15]_i_11_n_0 ,\sumY[15]_i_12_n_0 ,\sumY[15]_i_13_n_0 ,\sumY[15]_i_14_n_0 ,\sumY[15]_i_15_n_0 ,\sumY[15]_i_16_n_0 ,\sumY[15]_i_17_n_0 }));
  FDCE \sumY_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[22]_i_1_n_15 ),
        .Q(\sumY_reg_n_0_[16] ));
  FDCE \sumY_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[22]_i_1_n_14 ),
        .Q(\sumY_reg_n_0_[17] ));
  FDCE \sumY_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[22]_i_1_n_13 ),
        .Q(\sumY_reg_n_0_[18] ));
  FDCE \sumY_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[22]_i_1_n_12 ),
        .Q(\sumY_reg_n_0_[19] ));
  FDCE \sumY_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[7]_i_1_n_14 ),
        .Q(\sumY_reg_n_0_[1] ));
  FDCE \sumY_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[22]_i_1_n_11 ),
        .Q(\sumY_reg_n_0_[20] ));
  FDCE \sumY_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[22]_i_1_n_10 ),
        .Q(\sumY_reg_n_0_[21] ));
  FDCE \sumY_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[22]_i_1_n_9 ),
        .Q(\sumY_reg_n_0_[22] ));
  CARRY8 \sumY_reg[22]_i_1 
       (.CI(\sumY_reg[15]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_sumY_reg[22]_i_1_CO_UNCONNECTED [7:6],\sumY_reg[22]_i_1_n_2 ,\sumY_reg[22]_i_1_n_3 ,\sumY_reg[22]_i_1_n_4 ,\sumY_reg[22]_i_1_n_5 ,\sumY_reg[22]_i_1_n_6 ,\sumY_reg[22]_i_1_n_7 }),
        .DI({1'b0,1'b0,\sumY[22]_i_2_n_0 ,\sumY[22]_i_3_n_0 ,\sumY[22]_i_4_n_0 ,\sumY[22]_i_5_n_0 ,\sumY[22]_i_6_n_0 ,\sumY[22]_i_7_n_0 }),
        .O({\NLW_sumY_reg[22]_i_1_O_UNCONNECTED [7],\sumY_reg[22]_i_1_n_9 ,\sumY_reg[22]_i_1_n_10 ,\sumY_reg[22]_i_1_n_11 ,\sumY_reg[22]_i_1_n_12 ,\sumY_reg[22]_i_1_n_13 ,\sumY_reg[22]_i_1_n_14 ,\sumY_reg[22]_i_1_n_15 }),
        .S({1'b0,\sumY[22]_i_8_n_0 ,\sumY[22]_i_9_n_0 ,\sumY[22]_i_10_n_0 ,\sumY[22]_i_11_n_0 ,\sumY[22]_i_12_n_0 ,\sumY[22]_i_13_n_0 ,\sumY[22]_i_14_n_0 }));
  FDCE \sumY_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[7]_i_1_n_13 ),
        .Q(\sumY_reg_n_0_[2] ));
  FDCE \sumY_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[7]_i_1_n_12 ),
        .Q(\sumY_reg_n_0_[3] ));
  FDCE \sumY_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[7]_i_1_n_11 ),
        .Q(\sumY_reg_n_0_[4] ));
  FDCE \sumY_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[7]_i_1_n_10 ),
        .Q(\sumY_reg_n_0_[5] ));
  FDCE \sumY_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[7]_i_1_n_9 ),
        .Q(\sumY_reg_n_0_[6] ));
  FDCE \sumY_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[7]_i_1_n_8 ),
        .Q(\sumY_reg_n_0_[7] ));
  CARRY8 \sumY_reg[7]_i_1 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\sumY_reg[7]_i_1_n_0 ,\sumY_reg[7]_i_1_n_1 ,\sumY_reg[7]_i_1_n_2 ,\sumY_reg[7]_i_1_n_3 ,\sumY_reg[7]_i_1_n_4 ,\sumY_reg[7]_i_1_n_5 ,\sumY_reg[7]_i_1_n_6 ,\sumY_reg[7]_i_1_n_7 }),
        .DI({\sumY[7]_i_2_n_0 ,\sumY[7]_i_3_n_0 ,\sumY[7]_i_4_n_0 ,\sumY[7]_i_5_n_0 ,\sumY[7]_i_6_n_0 ,\sumY[7]_i_7_n_0 ,\sumY[7]_i_8_n_0 ,\sumY[7]_i_9_n_0 }),
        .O({\sumY_reg[7]_i_1_n_8 ,\sumY_reg[7]_i_1_n_9 ,\sumY_reg[7]_i_1_n_10 ,\sumY_reg[7]_i_1_n_11 ,\sumY_reg[7]_i_1_n_12 ,\sumY_reg[7]_i_1_n_13 ,\sumY_reg[7]_i_1_n_14 ,\sumY_reg[7]_i_1_n_15 }),
        .S({\sumY[7]_i_10_n_0 ,\sumY[7]_i_11_n_0 ,\sumY[7]_i_12_n_0 ,\sumY[7]_i_13_n_0 ,\sumY[7]_i_14_n_0 ,\sumY[7]_i_15_n_0 ,\sumY[7]_i_16_n_0 ,\sumY[7]_i_17_n_0 }));
  FDCE \sumY_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[15]_i_1_n_15 ),
        .Q(\sumY_reg_n_0_[8] ));
  FDCE \sumY_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\sumY_reg[15]_i_1_n_14 ),
        .Q(\sumY_reg_n_0_[9] ));
  (* KEEP_HIERARCHY = "yes" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-13 {cell *THIS*}}" *) 
  DSP48E2 #(
    .ACASCREG(0),
    .ADREG(1),
    .ALUMODEREG(0),
    .AMULTSEL("A"),
    .AREG(0),
    .AUTORESET_PATDET("NO_RESET"),
    .AUTORESET_PRIORITY("RESET"),
    .A_INPUT("DIRECT"),
    .BCASCREG(0),
    .BMULTSEL("B"),
    .BREG(0),
    .B_INPUT("DIRECT"),
    .CARRYINREG(0),
    .CARRYINSELREG(0),
    .CREG(1),
    .DREG(1),
    .INMODEREG(0),
    .MASK(48'h3FFFFFFFFFFF),
    .MREG(0),
    .OPMODEREG(0),
    .PATTERN(48'h000000000000),
    .PREADDINSEL("A"),
    .PREG(0),
    .RND(48'h000000000000),
    .SEL_MASK("MASK"),
    .SEL_PATTERN("PATTERN"),
    .USE_MULT("MULTIPLY"),
    .USE_PATTERN_DETECT("NO_PATDET"),
    .USE_SIMD("ONE48"),
    .USE_WIDEXOR("FALSE"),
    .XORSIMD("XOR24_48_96")) 
    termI0
       (.A({\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[21] ,\sumY_reg_n_0_[20] ,\sumY_reg_n_0_[19] ,\sumY_reg_n_0_[18] ,\sumY_reg_n_0_[17] ,\sumY_reg_n_0_[16] ,\sumY_reg_n_0_[15] ,\sumY_reg_n_0_[14] ,\sumY_reg_n_0_[13] ,\sumY_reg_n_0_[12] ,\sumY_reg_n_0_[11] ,\sumY_reg_n_0_[10] ,\sumY_reg_n_0_[9] ,\sumY_reg_n_0_[8] ,\sumY_reg_n_0_[7] ,\sumY_reg_n_0_[6] ,\sumY_reg_n_0_[5] ,\sumY_reg_n_0_[4] ,\sumY_reg_n_0_[3] ,\sumY_reg_n_0_[2] ,\sumY_reg_n_0_[1] ,\sumY_reg_n_0_[0] }),
        .ACIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ACOUT(NLW_termI0_ACOUT_UNCONNECTED[29:0]),
        .ALUMODE({1'b0,1'b0,1'b0,1'b0}),
        .B({1'b0,sumX[16:0]}),
        .BCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .BCOUT(NLW_termI0_BCOUT_UNCONNECTED[17:0]),
        .C({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CARRYCASCIN(1'b0),
        .CARRYCASCOUT(NLW_termI0_CARRYCASCOUT_UNCONNECTED),
        .CARRYIN(1'b0),
        .CARRYINSEL({1'b0,1'b0,1'b0}),
        .CARRYOUT(NLW_termI0_CARRYOUT_UNCONNECTED[3:0]),
        .CEA1(1'b0),
        .CEA2(1'b0),
        .CEAD(1'b0),
        .CEALUMODE(1'b0),
        .CEB1(1'b0),
        .CEB2(1'b0),
        .CEC(1'b0),
        .CECARRYIN(1'b0),
        .CECTRL(1'b0),
        .CED(1'b0),
        .CEINMODE(1'b0),
        .CEM(1'b0),
        .CEP(1'b0),
        .CLK(1'b0),
        .D({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .INMODE({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .MULTSIGNIN(1'b0),
        .MULTSIGNOUT(NLW_termI0_MULTSIGNOUT_UNCONNECTED),
        .OPMODE({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,1'b0,1'b1}),
        .OVERFLOW(NLW_termI0_OVERFLOW_UNCONNECTED),
        .P({termI0_n_58,termI0_n_59,termI0_n_60,termI0_n_61,termI0_n_62,termI0_n_63,termI0_n_64,termI0_n_65,termI0_n_66,termI0_n_67,termI0_n_68,termI0_n_69,termI0_n_70,termI0_n_71,termI0_n_72,termI0_n_73,termI0_n_74,termI0_n_75,termI0_n_76,termI0_n_77,termI0_n_78,termI0_n_79,termI0_n_80,termI0_n_81,termI0_n_82,termI0_n_83,termI0_n_84,termI0_n_85,termI0_n_86,termI0_n_87,termI0_n_88,termI0_n_89,termI0_n_90,termI0_n_91,termI0_n_92,termI0_n_93,termI0_n_94,termI0_n_95,termI0_n_96,termI0_n_97,termI0_n_98,termI0_n_99,termI0_n_100,termI0_n_101,termI0_n_102,termI0_n_103,termI0_n_104,termI0_n_105}),
        .PATTERNBDETECT(NLW_termI0_PATTERNBDETECT_UNCONNECTED),
        .PATTERNDETECT(NLW_termI0_PATTERNDETECT_UNCONNECTED),
        .PCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .PCOUT({termI0_n_106,termI0_n_107,termI0_n_108,termI0_n_109,termI0_n_110,termI0_n_111,termI0_n_112,termI0_n_113,termI0_n_114,termI0_n_115,termI0_n_116,termI0_n_117,termI0_n_118,termI0_n_119,termI0_n_120,termI0_n_121,termI0_n_122,termI0_n_123,termI0_n_124,termI0_n_125,termI0_n_126,termI0_n_127,termI0_n_128,termI0_n_129,termI0_n_130,termI0_n_131,termI0_n_132,termI0_n_133,termI0_n_134,termI0_n_135,termI0_n_136,termI0_n_137,termI0_n_138,termI0_n_139,termI0_n_140,termI0_n_141,termI0_n_142,termI0_n_143,termI0_n_144,termI0_n_145,termI0_n_146,termI0_n_147,termI0_n_148,termI0_n_149,termI0_n_150,termI0_n_151,termI0_n_152,termI0_n_153}),
        .RSTA(1'b0),
        .RSTALLCARRYIN(1'b0),
        .RSTALUMODE(1'b0),
        .RSTB(1'b0),
        .RSTC(1'b0),
        .RSTCTRL(1'b0),
        .RSTD(1'b0),
        .RSTINMODE(1'b0),
        .RSTM(1'b0),
        .RSTP(1'b0),
        .UNDERFLOW(NLW_termI0_UNDERFLOW_UNCONNECTED),
        .XOROUT(NLW_termI0_XOROUT_UNCONNECTED[7:0]));
  (* KEEP_HIERARCHY = "yes" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-13 {cell *THIS*}}" *) 
  DSP48E2 #(
    .ACASCREG(0),
    .ADREG(1),
    .ALUMODEREG(0),
    .AMULTSEL("A"),
    .AREG(0),
    .AUTORESET_PATDET("NO_RESET"),
    .AUTORESET_PRIORITY("RESET"),
    .A_INPUT("DIRECT"),
    .BCASCREG(0),
    .BMULTSEL("B"),
    .BREG(0),
    .B_INPUT("DIRECT"),
    .CARRYINREG(0),
    .CARRYINSELREG(0),
    .CREG(1),
    .DREG(1),
    .INMODEREG(0),
    .MASK(48'h3FFFFFFFFFFF),
    .MREG(0),
    .OPMODEREG(0),
    .PATTERN(48'h000000000000),
    .PREADDINSEL("A"),
    .PREG(0),
    .RND(48'h000000000000),
    .SEL_MASK("MASK"),
    .SEL_PATTERN("PATTERN"),
    .USE_MULT("MULTIPLY"),
    .USE_PATTERN_DETECT("NO_PATDET"),
    .USE_SIMD("ONE48"),
    .USE_WIDEXOR("FALSE"),
    .XORSIMD("XOR24_48_96")) 
    termI0__0
       (.A({\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[22] ,\sumY_reg_n_0_[21] ,\sumY_reg_n_0_[20] ,\sumY_reg_n_0_[19] ,\sumY_reg_n_0_[18] ,\sumY_reg_n_0_[17] ,\sumY_reg_n_0_[16] ,\sumY_reg_n_0_[15] ,\sumY_reg_n_0_[14] ,\sumY_reg_n_0_[13] ,\sumY_reg_n_0_[12] ,\sumY_reg_n_0_[11] ,\sumY_reg_n_0_[10] ,\sumY_reg_n_0_[9] ,\sumY_reg_n_0_[8] ,\sumY_reg_n_0_[7] ,\sumY_reg_n_0_[6] ,\sumY_reg_n_0_[5] ,\sumY_reg_n_0_[4] ,\sumY_reg_n_0_[3] ,\sumY_reg_n_0_[2] ,\sumY_reg_n_0_[1] ,\sumY_reg_n_0_[0] }),
        .ACIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ACOUT(NLW_termI0__0_ACOUT_UNCONNECTED[29:0]),
        .ALUMODE({1'b0,1'b0,1'b0,1'b0}),
        .B({sumX[22],sumX[22],sumX[22],sumX[22],sumX[22],sumX[22],sumX[22],sumX[22],sumX[22],sumX[22],sumX[22],sumX[22],sumX[22:17]}),
        .BCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .BCOUT(NLW_termI0__0_BCOUT_UNCONNECTED[17:0]),
        .C({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CARRYCASCIN(1'b0),
        .CARRYCASCOUT(NLW_termI0__0_CARRYCASCOUT_UNCONNECTED),
        .CARRYIN(1'b0),
        .CARRYINSEL({1'b0,1'b0,1'b0}),
        .CARRYOUT(NLW_termI0__0_CARRYOUT_UNCONNECTED[3:0]),
        .CEA1(1'b0),
        .CEA2(1'b0),
        .CEAD(1'b0),
        .CEALUMODE(1'b0),
        .CEB1(1'b0),
        .CEB2(1'b0),
        .CEC(1'b0),
        .CECARRYIN(1'b0),
        .CECTRL(1'b0),
        .CED(1'b0),
        .CEINMODE(1'b0),
        .CEM(1'b0),
        .CEP(1'b0),
        .CLK(1'b0),
        .D({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .INMODE({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .MULTSIGNIN(1'b0),
        .MULTSIGNOUT(NLW_termI0__0_MULTSIGNOUT_UNCONNECTED),
        .OPMODE({1'b0,1'b0,1'b1,1'b0,1'b1,1'b0,1'b1,1'b0,1'b1}),
        .OVERFLOW(NLW_termI0__0_OVERFLOW_UNCONNECTED),
        .P({NLW_termI0__0_P_UNCONNECTED[47:29],termI0__0_n_77,termI0__0_n_78,termI0__0_n_79,termI0__0_n_80,termI0__0_n_81,termI0__0_n_82,termI0__0_n_83,termI0__0_n_84,termI0__0_n_85,termI0__0_n_86,termI0__0_n_87,termI0__0_n_88,termI0__0_n_89,termI0__0_n_90,termI0__0_n_91,termI0__0_n_92,termI0__0_n_93,termI0__0_n_94,termI0__0_n_95,termI0__0_n_96,termI0__0_n_97,termI0__0_n_98,termI0__0_n_99,termI0__0_n_100,termI0__0_n_101,termI0__0_n_102,termI0__0_n_103,termI0__0_n_104,termI0__0_n_105}),
        .PATTERNBDETECT(NLW_termI0__0_PATTERNBDETECT_UNCONNECTED),
        .PATTERNDETECT(NLW_termI0__0_PATTERNDETECT_UNCONNECTED),
        .PCIN({termI0_n_106,termI0_n_107,termI0_n_108,termI0_n_109,termI0_n_110,termI0_n_111,termI0_n_112,termI0_n_113,termI0_n_114,termI0_n_115,termI0_n_116,termI0_n_117,termI0_n_118,termI0_n_119,termI0_n_120,termI0_n_121,termI0_n_122,termI0_n_123,termI0_n_124,termI0_n_125,termI0_n_126,termI0_n_127,termI0_n_128,termI0_n_129,termI0_n_130,termI0_n_131,termI0_n_132,termI0_n_133,termI0_n_134,termI0_n_135,termI0_n_136,termI0_n_137,termI0_n_138,termI0_n_139,termI0_n_140,termI0_n_141,termI0_n_142,termI0_n_143,termI0_n_144,termI0_n_145,termI0_n_146,termI0_n_147,termI0_n_148,termI0_n_149,termI0_n_150,termI0_n_151,termI0_n_152,termI0_n_153}),
        .PCOUT(NLW_termI0__0_PCOUT_UNCONNECTED[47:0]),
        .RSTA(1'b0),
        .RSTALLCARRYIN(1'b0),
        .RSTALUMODE(1'b0),
        .RSTB(1'b0),
        .RSTC(1'b0),
        .RSTCTRL(1'b0),
        .RSTD(1'b0),
        .RSTINMODE(1'b0),
        .RSTM(1'b0),
        .RSTP(1'b0),
        .UNDERFLOW(NLW_termI0__0_UNDERFLOW_UNCONNECTED),
        .XOROUT(NLW_termI0__0_XOROUT_UNCONNECTED[7:0]));
  (* KEEP_HIERARCHY = "yes" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-13 {cell *THIS*}}" *) 
  DSP48E2 #(
    .ACASCREG(0),
    .ADREG(1),
    .ALUMODEREG(0),
    .AMULTSEL("A"),
    .AREG(0),
    .AUTORESET_PATDET("NO_RESET"),
    .AUTORESET_PRIORITY("RESET"),
    .A_INPUT("DIRECT"),
    .BCASCREG(0),
    .BMULTSEL("B"),
    .BREG(0),
    .B_INPUT("DIRECT"),
    .CARRYINREG(0),
    .CARRYINSELREG(0),
    .CREG(1),
    .DREG(1),
    .INMODEREG(0),
    .MASK(48'h3FFFFFFFFFFF),
    .MREG(0),
    .OPMODEREG(0),
    .PATTERN(48'h000000000000),
    .PREADDINSEL("A"),
    .PREG(0),
    .RND(48'h000000000000),
    .SEL_MASK("MASK"),
    .SEL_PATTERN("PATTERN"),
    .USE_MULT("MULTIPLY"),
    .USE_PATTERN_DETECT("NO_PATDET"),
    .USE_SIMD("ONE48"),
    .USE_WIDEXOR("FALSE"),
    .XORSIMD("XOR24_48_96")) 
    termII0
       (.A({sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY}),
        .ACIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ACOUT(NLW_termII0_ACOUT_UNCONNECTED[29:0]),
        .ALUMODE({1'b0,1'b0,1'b0,1'b0}),
        .B({1'b0,sumXY[16:0]}),
        .BCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .BCOUT(NLW_termII0_BCOUT_UNCONNECTED[17:0]),
        .C({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CARRYCASCIN(1'b0),
        .CARRYCASCOUT(NLW_termII0_CARRYCASCOUT_UNCONNECTED),
        .CARRYIN(1'b0),
        .CARRYINSEL({1'b0,1'b0,1'b0}),
        .CARRYOUT(NLW_termII0_CARRYOUT_UNCONNECTED[3:0]),
        .CEA1(1'b0),
        .CEA2(1'b0),
        .CEAD(1'b0),
        .CEALUMODE(1'b0),
        .CEB1(1'b0),
        .CEB2(1'b0),
        .CEC(1'b0),
        .CECARRYIN(1'b0),
        .CECTRL(1'b0),
        .CED(1'b0),
        .CEINMODE(1'b0),
        .CEM(1'b0),
        .CEP(1'b0),
        .CLK(1'b0),
        .D({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .INMODE({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .MULTSIGNIN(1'b0),
        .MULTSIGNOUT(NLW_termII0_MULTSIGNOUT_UNCONNECTED),
        .OPMODE({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,1'b0,1'b1}),
        .OVERFLOW(NLW_termII0_OVERFLOW_UNCONNECTED),
        .P({termII0_n_58,termII0_n_59,termII0_n_60,termII0_n_61,termII0_n_62,termII0_n_63,termII0_n_64,termII0_n_65,termII0_n_66,termII0_n_67,termII0_n_68,termII0_n_69,termII0_n_70,termII0_n_71,termII0_n_72,termII0_n_73,termII0_n_74,termII0_n_75,termII0_n_76,termII0_n_77,termII0_n_78,termII0_n_79,termII0_n_80,termII0_n_81,termII0_n_82,termII0_n_83,termII0_n_84,termII0_n_85,termII0_n_86,termII0_n_87,termII0_n_88,termII0_n_89,termII0_n_90,termII0_n_91,termII0_n_92,termII0_n_93,termII0_n_94,termII0_n_95,termII0_n_96,termII0_n_97,termII0_n_98,termII0_n_99,termII0_n_100,termII0_n_101,termII0_n_102,termII0_n_103,termII0_n_104,termII0_n_105}),
        .PATTERNBDETECT(NLW_termII0_PATTERNBDETECT_UNCONNECTED),
        .PATTERNDETECT(NLW_termII0_PATTERNDETECT_UNCONNECTED),
        .PCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .PCOUT({termII0_n_106,termII0_n_107,termII0_n_108,termII0_n_109,termII0_n_110,termII0_n_111,termII0_n_112,termII0_n_113,termII0_n_114,termII0_n_115,termII0_n_116,termII0_n_117,termII0_n_118,termII0_n_119,termII0_n_120,termII0_n_121,termII0_n_122,termII0_n_123,termII0_n_124,termII0_n_125,termII0_n_126,termII0_n_127,termII0_n_128,termII0_n_129,termII0_n_130,termII0_n_131,termII0_n_132,termII0_n_133,termII0_n_134,termII0_n_135,termII0_n_136,termII0_n_137,termII0_n_138,termII0_n_139,termII0_n_140,termII0_n_141,termII0_n_142,termII0_n_143,termII0_n_144,termII0_n_145,termII0_n_146,termII0_n_147,termII0_n_148,termII0_n_149,termII0_n_150,termII0_n_151,termII0_n_152,termII0_n_153}),
        .RSTA(1'b0),
        .RSTALLCARRYIN(1'b0),
        .RSTALUMODE(1'b0),
        .RSTB(1'b0),
        .RSTC(1'b0),
        .RSTCTRL(1'b0),
        .RSTD(1'b0),
        .RSTINMODE(1'b0),
        .RSTM(1'b0),
        .RSTP(1'b0),
        .UNDERFLOW(NLW_termII0_UNDERFLOW_UNCONNECTED),
        .XOROUT(NLW_termII0_XOROUT_UNCONNECTED[7:0]));
  (* KEEP_HIERARCHY = "yes" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-13 {cell *THIS*}}" *) 
  DSP48E2 #(
    .ACASCREG(0),
    .ADREG(1),
    .ALUMODEREG(0),
    .AMULTSEL("A"),
    .AREG(0),
    .AUTORESET_PATDET("NO_RESET"),
    .AUTORESET_PRIORITY("RESET"),
    .A_INPUT("DIRECT"),
    .BCASCREG(0),
    .BMULTSEL("B"),
    .BREG(0),
    .B_INPUT("DIRECT"),
    .CARRYINREG(0),
    .CARRYINSELREG(0),
    .CREG(1),
    .DREG(1),
    .INMODEREG(0),
    .MASK(48'h3FFFFFFFFFFF),
    .MREG(0),
    .OPMODEREG(0),
    .PATTERN(48'h000000000000),
    .PREADDINSEL("A"),
    .PREG(0),
    .RND(48'h000000000000),
    .SEL_MASK("MASK"),
    .SEL_PATTERN("PATTERN"),
    .USE_MULT("MULTIPLY"),
    .USE_PATTERN_DETECT("NO_PATDET"),
    .USE_SIMD("ONE48"),
    .USE_WIDEXOR("FALSE"),
    .XORSIMD("XOR24_48_96")) 
    termII0__0
       (.A({sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY}),
        .ACIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ACOUT(NLW_termII0__0_ACOUT_UNCONNECTED[29:0]),
        .ALUMODE({1'b0,1'b0,1'b0,1'b0}),
        .B({sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22],sumXY[22:17]}),
        .BCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .BCOUT(NLW_termII0__0_BCOUT_UNCONNECTED[17:0]),
        .C({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CARRYCASCIN(1'b0),
        .CARRYCASCOUT(NLW_termII0__0_CARRYCASCOUT_UNCONNECTED),
        .CARRYIN(1'b0),
        .CARRYINSEL({1'b0,1'b0,1'b0}),
        .CARRYOUT(NLW_termII0__0_CARRYOUT_UNCONNECTED[3:0]),
        .CEA1(1'b0),
        .CEA2(1'b0),
        .CEAD(1'b0),
        .CEALUMODE(1'b0),
        .CEB1(1'b0),
        .CEB2(1'b0),
        .CEC(1'b0),
        .CECARRYIN(1'b0),
        .CECTRL(1'b0),
        .CED(1'b0),
        .CEINMODE(1'b0),
        .CEM(1'b0),
        .CEP(1'b0),
        .CLK(1'b0),
        .D({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .INMODE({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .MULTSIGNIN(1'b0),
        .MULTSIGNOUT(NLW_termII0__0_MULTSIGNOUT_UNCONNECTED),
        .OPMODE({1'b0,1'b0,1'b1,1'b0,1'b1,1'b0,1'b1,1'b0,1'b1}),
        .OVERFLOW(NLW_termII0__0_OVERFLOW_UNCONNECTED),
        .P({NLW_termII0__0_P_UNCONNECTED[47:29],termII0__0_n_77,termII0__0_n_78,termII0__0_n_79,termII0__0_n_80,termII0__0_n_81,termII0__0_n_82,termII0__0_n_83,termII0__0_n_84,termII0__0_n_85,termII0__0_n_86,termII0__0_n_87,termII0__0_n_88,termII0__0_n_89,termII0__0_n_90,termII0__0_n_91,termII0__0_n_92,termII0__0_n_93,termII0__0_n_94,termII0__0_n_95,termII0__0_n_96,termII0__0_n_97,termII0__0_n_98,termII0__0_n_99,termII0__0_n_100,termII0__0_n_101,termII0__0_n_102,termII0__0_n_103,termII0__0_n_104,termII0__0_n_105}),
        .PATTERNBDETECT(NLW_termII0__0_PATTERNBDETECT_UNCONNECTED),
        .PATTERNDETECT(NLW_termII0__0_PATTERNDETECT_UNCONNECTED),
        .PCIN({termII0_n_106,termII0_n_107,termII0_n_108,termII0_n_109,termII0_n_110,termII0_n_111,termII0_n_112,termII0_n_113,termII0_n_114,termII0_n_115,termII0_n_116,termII0_n_117,termII0_n_118,termII0_n_119,termII0_n_120,termII0_n_121,termII0_n_122,termII0_n_123,termII0_n_124,termII0_n_125,termII0_n_126,termII0_n_127,termII0_n_128,termII0_n_129,termII0_n_130,termII0_n_131,termII0_n_132,termII0_n_133,termII0_n_134,termII0_n_135,termII0_n_136,termII0_n_137,termII0_n_138,termII0_n_139,termII0_n_140,termII0_n_141,termII0_n_142,termII0_n_143,termII0_n_144,termII0_n_145,termII0_n_146,termII0_n_147,termII0_n_148,termII0_n_149,termII0_n_150,termII0_n_151,termII0_n_152,termII0_n_153}),
        .PCOUT(NLW_termII0__0_PCOUT_UNCONNECTED[47:0]),
        .RSTA(1'b0),
        .RSTALLCARRYIN(1'b0),
        .RSTALUMODE(1'b0),
        .RSTB(1'b0),
        .RSTC(1'b0),
        .RSTCTRL(1'b0),
        .RSTD(1'b0),
        .RSTINMODE(1'b0),
        .RSTM(1'b0),
        .RSTP(1'b0),
        .UNDERFLOW(NLW_termII0__0_UNDERFLOW_UNCONNECTED),
        .XOROUT(NLW_termII0__0_XOROUT_UNCONNECTED[7:0]));
  (* KEEP_HIERARCHY = "yes" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-13 {cell *THIS*}}" *) 
  DSP48E2 #(
    .ACASCREG(0),
    .ADREG(1),
    .ALUMODEREG(0),
    .AMULTSEL("A"),
    .AREG(0),
    .AUTORESET_PATDET("NO_RESET"),
    .AUTORESET_PRIORITY("RESET"),
    .A_INPUT("DIRECT"),
    .BCASCREG(0),
    .BMULTSEL("B"),
    .BREG(0),
    .B_INPUT("DIRECT"),
    .CARRYINREG(0),
    .CARRYINSELREG(0),
    .CREG(1),
    .DREG(1),
    .INMODEREG(0),
    .MASK(48'h3FFFFFFFFFFF),
    .MREG(0),
    .OPMODEREG(0),
    .PATTERN(48'h000000000000),
    .PREADDINSEL("A"),
    .PREG(0),
    .RND(48'h000000000000),
    .SEL_MASK("MASK"),
    .SEL_PATTERN("PATTERN"),
    .USE_MULT("MULTIPLY"),
    .USE_PATTERN_DETECT("NO_PATDET"),
    .USE_SIMD("ONE48"),
    .USE_WIDEXOR("FALSE"),
    .XORSIMD("XOR24_48_96")) 
    termIII0
       (.A({sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII}),
        .ACIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ACOUT(NLW_termIII0_ACOUT_UNCONNECTED[29:0]),
        .ALUMODE({1'b0,1'b0,1'b0,1'b0}),
        .B({1'b0,sumIII[16:0]}),
        .BCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .BCOUT(NLW_termIII0_BCOUT_UNCONNECTED[17:0]),
        .C({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CARRYCASCIN(1'b0),
        .CARRYCASCOUT(NLW_termIII0_CARRYCASCOUT_UNCONNECTED),
        .CARRYIN(1'b0),
        .CARRYINSEL({1'b0,1'b0,1'b0}),
        .CARRYOUT(NLW_termIII0_CARRYOUT_UNCONNECTED[3:0]),
        .CEA1(1'b0),
        .CEA2(1'b0),
        .CEAD(1'b0),
        .CEALUMODE(1'b0),
        .CEB1(1'b0),
        .CEB2(1'b0),
        .CEC(1'b0),
        .CECARRYIN(1'b0),
        .CECTRL(1'b0),
        .CED(1'b0),
        .CEINMODE(1'b0),
        .CEM(1'b0),
        .CEP(1'b0),
        .CLK(1'b0),
        .D({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .INMODE({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .MULTSIGNIN(1'b0),
        .MULTSIGNOUT(NLW_termIII0_MULTSIGNOUT_UNCONNECTED),
        .OPMODE({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,1'b0,1'b1}),
        .OVERFLOW(NLW_termIII0_OVERFLOW_UNCONNECTED),
        .P({termIII0_n_58,termIII0_n_59,termIII0_n_60,termIII0_n_61,termIII0_n_62,termIII0_n_63,termIII0_n_64,termIII0_n_65,termIII0_n_66,termIII0_n_67,termIII0_n_68,termIII0_n_69,termIII0_n_70,termIII0_n_71,termIII0_n_72,termIII0_n_73,termIII0_n_74,termIII0_n_75,termIII0_n_76,termIII0_n_77,termIII0_n_78,termIII0_n_79,termIII0_n_80,termIII0_n_81,termIII0_n_82,termIII0_n_83,termIII0_n_84,termIII0_n_85,termIII0_n_86,termIII0_n_87,termIII0_n_88,termIII0_n_89,termIII0_n_90,termIII0_n_91,termIII0_n_92,termIII0_n_93,termIII0_n_94,termIII0_n_95,termIII0_n_96,termIII0_n_97,termIII0_n_98,termIII0_n_99,termIII0_n_100,termIII0_n_101,termIII0_n_102,termIII0_n_103,termIII0_n_104,termIII0_n_105}),
        .PATTERNBDETECT(NLW_termIII0_PATTERNBDETECT_UNCONNECTED),
        .PATTERNDETECT(NLW_termIII0_PATTERNDETECT_UNCONNECTED),
        .PCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .PCOUT({termIII0_n_106,termIII0_n_107,termIII0_n_108,termIII0_n_109,termIII0_n_110,termIII0_n_111,termIII0_n_112,termIII0_n_113,termIII0_n_114,termIII0_n_115,termIII0_n_116,termIII0_n_117,termIII0_n_118,termIII0_n_119,termIII0_n_120,termIII0_n_121,termIII0_n_122,termIII0_n_123,termIII0_n_124,termIII0_n_125,termIII0_n_126,termIII0_n_127,termIII0_n_128,termIII0_n_129,termIII0_n_130,termIII0_n_131,termIII0_n_132,termIII0_n_133,termIII0_n_134,termIII0_n_135,termIII0_n_136,termIII0_n_137,termIII0_n_138,termIII0_n_139,termIII0_n_140,termIII0_n_141,termIII0_n_142,termIII0_n_143,termIII0_n_144,termIII0_n_145,termIII0_n_146,termIII0_n_147,termIII0_n_148,termIII0_n_149,termIII0_n_150,termIII0_n_151,termIII0_n_152,termIII0_n_153}),
        .RSTA(1'b0),
        .RSTALLCARRYIN(1'b0),
        .RSTALUMODE(1'b0),
        .RSTB(1'b0),
        .RSTC(1'b0),
        .RSTCTRL(1'b0),
        .RSTD(1'b0),
        .RSTINMODE(1'b0),
        .RSTM(1'b0),
        .RSTP(1'b0),
        .UNDERFLOW(NLW_termIII0_UNDERFLOW_UNCONNECTED),
        .XOROUT(NLW_termIII0_XOROUT_UNCONNECTED[7:0]));
  (* KEEP_HIERARCHY = "yes" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-13 {cell *THIS*}}" *) 
  DSP48E2 #(
    .ACASCREG(0),
    .ADREG(1),
    .ALUMODEREG(0),
    .AMULTSEL("A"),
    .AREG(0),
    .AUTORESET_PATDET("NO_RESET"),
    .AUTORESET_PRIORITY("RESET"),
    .A_INPUT("DIRECT"),
    .BCASCREG(0),
    .BMULTSEL("B"),
    .BREG(0),
    .B_INPUT("DIRECT"),
    .CARRYINREG(0),
    .CARRYINSELREG(0),
    .CREG(1),
    .DREG(1),
    .INMODEREG(0),
    .MASK(48'h3FFFFFFFFFFF),
    .MREG(0),
    .OPMODEREG(0),
    .PATTERN(48'h000000000000),
    .PREADDINSEL("A"),
    .PREG(0),
    .RND(48'h000000000000),
    .SEL_MASK("MASK"),
    .SEL_PATTERN("PATTERN"),
    .USE_MULT("MULTIPLY"),
    .USE_PATTERN_DETECT("NO_PATDET"),
    .USE_SIMD("ONE48"),
    .USE_WIDEXOR("FALSE"),
    .XORSIMD("XOR24_48_96")) 
    termIII0__0
       (.A({sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII}),
        .ACIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ACOUT(NLW_termIII0__0_ACOUT_UNCONNECTED[29:0]),
        .ALUMODE({1'b0,1'b0,1'b0,1'b0}),
        .B({sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23],sumIII[23:17]}),
        .BCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .BCOUT(NLW_termIII0__0_BCOUT_UNCONNECTED[17:0]),
        .C({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CARRYCASCIN(1'b0),
        .CARRYCASCOUT(NLW_termIII0__0_CARRYCASCOUT_UNCONNECTED),
        .CARRYIN(1'b0),
        .CARRYINSEL({1'b0,1'b0,1'b0}),
        .CARRYOUT(NLW_termIII0__0_CARRYOUT_UNCONNECTED[3:0]),
        .CEA1(1'b0),
        .CEA2(1'b0),
        .CEAD(1'b0),
        .CEALUMODE(1'b0),
        .CEB1(1'b0),
        .CEB2(1'b0),
        .CEC(1'b0),
        .CECARRYIN(1'b0),
        .CECTRL(1'b0),
        .CED(1'b0),
        .CEINMODE(1'b0),
        .CEM(1'b0),
        .CEP(1'b0),
        .CLK(1'b0),
        .D({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .INMODE({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .MULTSIGNIN(1'b0),
        .MULTSIGNOUT(NLW_termIII0__0_MULTSIGNOUT_UNCONNECTED),
        .OPMODE({1'b0,1'b0,1'b1,1'b0,1'b1,1'b0,1'b1,1'b0,1'b1}),
        .OVERFLOW(NLW_termIII0__0_OVERFLOW_UNCONNECTED),
        .P({NLW_termIII0__0_P_UNCONNECTED[47:31],termIII0__0_n_75,termIII0__0_n_76,termIII0__0_n_77,termIII0__0_n_78,termIII0__0_n_79,termIII0__0_n_80,termIII0__0_n_81,termIII0__0_n_82,termIII0__0_n_83,termIII0__0_n_84,termIII0__0_n_85,termIII0__0_n_86,termIII0__0_n_87,termIII0__0_n_88,termIII0__0_n_89,termIII0__0_n_90,termIII0__0_n_91,termIII0__0_n_92,termIII0__0_n_93,termIII0__0_n_94,termIII0__0_n_95,termIII0__0_n_96,termIII0__0_n_97,termIII0__0_n_98,termIII0__0_n_99,termIII0__0_n_100,termIII0__0_n_101,termIII0__0_n_102,termIII0__0_n_103,termIII0__0_n_104,termIII0__0_n_105}),
        .PATTERNBDETECT(NLW_termIII0__0_PATTERNBDETECT_UNCONNECTED),
        .PATTERNDETECT(NLW_termIII0__0_PATTERNDETECT_UNCONNECTED),
        .PCIN({termIII0_n_106,termIII0_n_107,termIII0_n_108,termIII0_n_109,termIII0_n_110,termIII0_n_111,termIII0_n_112,termIII0_n_113,termIII0_n_114,termIII0_n_115,termIII0_n_116,termIII0_n_117,termIII0_n_118,termIII0_n_119,termIII0_n_120,termIII0_n_121,termIII0_n_122,termIII0_n_123,termIII0_n_124,termIII0_n_125,termIII0_n_126,termIII0_n_127,termIII0_n_128,termIII0_n_129,termIII0_n_130,termIII0_n_131,termIII0_n_132,termIII0_n_133,termIII0_n_134,termIII0_n_135,termIII0_n_136,termIII0_n_137,termIII0_n_138,termIII0_n_139,termIII0_n_140,termIII0_n_141,termIII0_n_142,termIII0_n_143,termIII0_n_144,termIII0_n_145,termIII0_n_146,termIII0_n_147,termIII0_n_148,termIII0_n_149,termIII0_n_150,termIII0_n_151,termIII0_n_152,termIII0_n_153}),
        .PCOUT(NLW_termIII0__0_PCOUT_UNCONNECTED[47:0]),
        .RSTA(1'b0),
        .RSTALLCARRYIN(1'b0),
        .RSTALUMODE(1'b0),
        .RSTB(1'b0),
        .RSTC(1'b0),
        .RSTCTRL(1'b0),
        .RSTD(1'b0),
        .RSTINMODE(1'b0),
        .RSTM(1'b0),
        .RSTP(1'b0),
        .UNDERFLOW(NLW_termIII0__0_UNDERFLOW_UNCONNECTED),
        .XOROUT(NLW_termIII0__0_XOROUT_UNCONNECTED[7:0]));
  (* SOFT_HLUTNM = "soft_lutpair1464" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[0]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIII0_n_105),
        .O(\termIII[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1459" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[10]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0_n_95),
        .O(\termIII[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1459" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[11]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0_n_94),
        .O(\termIII[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1458" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[12]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0_n_93),
        .O(\termIII[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1458" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[13]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0_n_92),
        .O(\termIII[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1457" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[14]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0_n_91),
        .O(\termIII[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1457" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[15]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0_n_90),
        .O(\termIII[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1456" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[16]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0_n_89),
        .O(\termIII[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1456" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[17]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_105),
        .O(\termIII[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1455" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[18]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_104),
        .O(\termIII[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1455" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[19]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_103),
        .O(\termIII[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1464" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[1]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIII0_n_104),
        .O(\termIII[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1454" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[20]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_102),
        .O(\termIII[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1454" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[21]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_101),
        .O(\termIII[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1453" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[22]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_100),
        .O(\termIII[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1453" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[23]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_99),
        .O(\termIII[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1452" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[24]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_98),
        .O(\termIII[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1452" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[25]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_97),
        .O(\termIII[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1451" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[26]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_96),
        .O(\termIII[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1451" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[27]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_95),
        .O(\termIII[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1450" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[28]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_94),
        .O(\termIII[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1450" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[29]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_93),
        .O(\termIII[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1463" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[2]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIII0_n_103),
        .O(\termIII[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1449" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[30]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_92),
        .O(\termIII[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1449" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[31]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_91),
        .O(\termIII[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1448" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[32]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_90),
        .O(\termIII[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1448" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[33]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_89),
        .O(\termIII[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1447" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[34]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_88),
        .O(\termIII[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1447" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[35]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_87),
        .O(\termIII[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1446" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[36]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_86),
        .O(\termIII[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1446" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[37]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_85),
        .O(\termIII[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1445" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[38]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_84),
        .O(\termIII[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1445" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[39]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_83),
        .O(\termIII[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1463" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[3]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIII0_n_102),
        .O(\termIII[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1444" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[40]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_82),
        .O(\termIII[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1444" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[41]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_81),
        .O(\termIII[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1443" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[42]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_80),
        .O(\termIII[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1443" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[43]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_79),
        .O(\termIII[43]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1442" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[44]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_78),
        .O(\termIII[44]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1442" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[45]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_77),
        .O(\termIII[45]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1441" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[46]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_76),
        .O(\termIII[46]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1441" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[47]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0__0_n_75),
        .O(\termIII[47]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1462" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[4]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIII0_n_101),
        .O(\termIII[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1462" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[5]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIII0_n_100),
        .O(\termIII[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1461" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[6]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIII0_n_99),
        .O(\termIII[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1461" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[7]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIII0_n_98),
        .O(\termIII[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1460" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[8]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0_n_97),
        .O(\termIII[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1460" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIII[9]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termIII0_n_96),
        .O(\termIII[9]_i_1_n_0 ));
  FDCE \termIII_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[0]_i_1_n_0 ),
        .Q(termIII[0]));
  FDCE \termIII_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[10]_i_1_n_0 ),
        .Q(termIII[10]));
  FDCE \termIII_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[11]_i_1_n_0 ),
        .Q(termIII[11]));
  FDCE \termIII_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[12]_i_1_n_0 ),
        .Q(termIII[12]));
  FDCE \termIII_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[13]_i_1_n_0 ),
        .Q(termIII[13]));
  FDCE \termIII_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[14]_i_1_n_0 ),
        .Q(termIII[14]));
  FDCE \termIII_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[15]_i_1_n_0 ),
        .Q(termIII[15]));
  FDCE \termIII_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[16]_i_1_n_0 ),
        .Q(termIII[16]));
  FDCE \termIII_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[17]_i_1_n_0 ),
        .Q(termIII[17]));
  FDCE \termIII_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[18]_i_1_n_0 ),
        .Q(termIII[18]));
  FDCE \termIII_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[19]_i_1_n_0 ),
        .Q(termIII[19]));
  FDCE \termIII_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[1]_i_1_n_0 ),
        .Q(termIII[1]));
  FDCE \termIII_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[20]_i_1_n_0 ),
        .Q(termIII[20]));
  FDCE \termIII_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[21]_i_1_n_0 ),
        .Q(termIII[21]));
  FDCE \termIII_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[22]_i_1_n_0 ),
        .Q(termIII[22]));
  FDCE \termIII_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[23]_i_1_n_0 ),
        .Q(termIII[23]));
  FDCE \termIII_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[24]_i_1_n_0 ),
        .Q(termIII[24]));
  FDCE \termIII_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[25]_i_1_n_0 ),
        .Q(termIII[25]));
  FDCE \termIII_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[26]_i_1_n_0 ),
        .Q(termIII[26]));
  FDCE \termIII_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[27]_i_1_n_0 ),
        .Q(termIII[27]));
  FDCE \termIII_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[28]_i_1_n_0 ),
        .Q(termIII[28]));
  FDCE \termIII_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[29]_i_1_n_0 ),
        .Q(termIII[29]));
  FDCE \termIII_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[2]_i_1_n_0 ),
        .Q(termIII[2]));
  FDCE \termIII_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[30]_i_1_n_0 ),
        .Q(termIII[30]));
  FDCE \termIII_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[31]_i_1_n_0 ),
        .Q(termIII[31]));
  FDCE \termIII_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[32]_i_1_n_0 ),
        .Q(termIII[32]));
  FDCE \termIII_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[33]_i_1_n_0 ),
        .Q(termIII[33]));
  FDCE \termIII_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[34]_i_1_n_0 ),
        .Q(termIII[34]));
  FDCE \termIII_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[35]_i_1_n_0 ),
        .Q(termIII[35]));
  FDCE \termIII_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[36]_i_1_n_0 ),
        .Q(termIII[36]));
  FDCE \termIII_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[37]_i_1_n_0 ),
        .Q(termIII[37]));
  FDCE \termIII_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[38]_i_1_n_0 ),
        .Q(termIII[38]));
  FDCE \termIII_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[39]_i_1_n_0 ),
        .Q(termIII[39]));
  FDCE \termIII_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[3]_i_1_n_0 ),
        .Q(termIII[3]));
  FDCE \termIII_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[40]_i_1_n_0 ),
        .Q(termIII[40]));
  FDCE \termIII_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[41]_i_1_n_0 ),
        .Q(termIII[41]));
  FDCE \termIII_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[42]_i_1_n_0 ),
        .Q(termIII[42]));
  FDCE \termIII_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[43]_i_1_n_0 ),
        .Q(termIII[43]));
  FDCE \termIII_reg[44] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[44]_i_1_n_0 ),
        .Q(termIII[44]));
  FDCE \termIII_reg[45] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[45]_i_1_n_0 ),
        .Q(termIII[45]));
  FDCE \termIII_reg[46] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[46]_i_1_n_0 ),
        .Q(termIII[46]));
  FDCE \termIII_reg[47] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[47]_i_1_n_0 ),
        .Q(termIII[47]));
  FDCE \termIII_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[4]_i_1_n_0 ),
        .Q(termIII[4]));
  FDCE \termIII_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[5]_i_1_n_0 ),
        .Q(termIII[5]));
  FDCE \termIII_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[6]_i_1_n_0 ),
        .Q(termIII[6]));
  FDCE \termIII_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[7]_i_1_n_0 ),
        .Q(termIII[7]));
  FDCE \termIII_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[8]_i_1_n_0 ),
        .Q(termIII[8]));
  FDCE \termIII_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIII[9]_i_1_n_0 ),
        .Q(termIII[9]));
  (* SOFT_HLUTNM = "soft_lutpair1485" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[0]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[7]),
        .O(\termIIIk[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1480" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[10]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[17]),
        .O(\termIIIk[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1480" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[11]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[18]),
        .O(\termIIIk[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1479" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[12]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[19]),
        .O(\termIIIk[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1479" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[13]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[20]),
        .O(\termIIIk[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1478" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[14]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[21]),
        .O(\termIIIk[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1478" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[15]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[22]),
        .O(\termIIIk[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1477" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[16]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[23]),
        .O(\termIIIk[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1477" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[17]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[24]),
        .O(\termIIIk[17]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[17]_i_10 
       (.I0(termIII[15]),
        .I1(termIII[17]),
        .O(\termIIIk[17]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[17]_i_3 
       (.I0(termIII[22]),
        .I1(termIII[24]),
        .O(\termIIIk[17]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[17]_i_4 
       (.I0(termIII[21]),
        .I1(termIII[23]),
        .O(\termIIIk[17]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[17]_i_5 
       (.I0(termIII[20]),
        .I1(termIII[22]),
        .O(\termIIIk[17]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[17]_i_6 
       (.I0(termIII[19]),
        .I1(termIII[21]),
        .O(\termIIIk[17]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[17]_i_7 
       (.I0(termIII[18]),
        .I1(termIII[20]),
        .O(\termIIIk[17]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[17]_i_8 
       (.I0(termIII[17]),
        .I1(termIII[19]),
        .O(\termIIIk[17]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[17]_i_9 
       (.I0(termIII[16]),
        .I1(termIII[18]),
        .O(\termIIIk[17]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1476" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[18]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[25]),
        .O(\termIIIk[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1476" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[19]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[26]),
        .O(\termIIIk[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1485" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[1]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[8]),
        .O(\termIIIk[1]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[1]_i_3 
       (.I0(termIII[6]),
        .I1(termIII[8]),
        .O(\termIIIk[1]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[1]_i_4 
       (.I0(termIII[5]),
        .I1(termIII[7]),
        .O(\termIIIk[1]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[1]_i_5 
       (.I0(termIII[4]),
        .I1(termIII[6]),
        .O(\termIIIk[1]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[1]_i_6 
       (.I0(termIII[3]),
        .I1(termIII[5]),
        .O(\termIIIk[1]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[1]_i_7 
       (.I0(termIII[2]),
        .I1(termIII[4]),
        .O(\termIIIk[1]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[1]_i_8 
       (.I0(termIII[1]),
        .I1(termIII[3]),
        .O(\termIIIk[1]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[1]_i_9 
       (.I0(termIII[0]),
        .I1(termIII[2]),
        .O(\termIIIk[1]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1475" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[20]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[27]),
        .O(\termIIIk[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1475" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[21]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[28]),
        .O(\termIIIk[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1474" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[22]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[29]),
        .O(\termIIIk[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1474" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[23]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[30]),
        .O(\termIIIk[23]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[24]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[31]),
        .O(\termIIIk[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1473" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[25]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[32]),
        .O(\termIIIk[25]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[25]_i_10 
       (.I0(termIII[23]),
        .I1(termIII[25]),
        .O(\termIIIk[25]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[25]_i_3 
       (.I0(termIII[30]),
        .I1(termIII[32]),
        .O(\termIIIk[25]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[25]_i_4 
       (.I0(termIII[29]),
        .I1(termIII[31]),
        .O(\termIIIk[25]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[25]_i_5 
       (.I0(termIII[28]),
        .I1(termIII[30]),
        .O(\termIIIk[25]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[25]_i_6 
       (.I0(termIII[27]),
        .I1(termIII[29]),
        .O(\termIIIk[25]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[25]_i_7 
       (.I0(termIII[26]),
        .I1(termIII[28]),
        .O(\termIIIk[25]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[25]_i_8 
       (.I0(termIII[25]),
        .I1(termIII[27]),
        .O(\termIIIk[25]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[25]_i_9 
       (.I0(termIII[24]),
        .I1(termIII[26]),
        .O(\termIIIk[25]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1473" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[26]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[33]),
        .O(\termIIIk[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1472" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[27]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[34]),
        .O(\termIIIk[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1472" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[28]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[35]),
        .O(\termIIIk[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1471" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[29]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[36]),
        .O(\termIIIk[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1484" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[2]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[9]),
        .O(\termIIIk[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1471" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[30]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[37]),
        .O(\termIIIk[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1470" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[31]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[38]),
        .O(\termIIIk[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1470" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[32]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[39]),
        .O(\termIIIk[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1469" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[33]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[40]),
        .O(\termIIIk[33]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[33]_i_10 
       (.I0(termIII[31]),
        .I1(termIII[33]),
        .O(\termIIIk[33]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[33]_i_3 
       (.I0(termIII[38]),
        .I1(termIII[40]),
        .O(\termIIIk[33]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[33]_i_4 
       (.I0(termIII[37]),
        .I1(termIII[39]),
        .O(\termIIIk[33]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[33]_i_5 
       (.I0(termIII[36]),
        .I1(termIII[38]),
        .O(\termIIIk[33]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[33]_i_6 
       (.I0(termIII[35]),
        .I1(termIII[37]),
        .O(\termIIIk[33]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[33]_i_7 
       (.I0(termIII[34]),
        .I1(termIII[36]),
        .O(\termIIIk[33]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[33]_i_8 
       (.I0(termIII[33]),
        .I1(termIII[35]),
        .O(\termIIIk[33]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[33]_i_9 
       (.I0(termIII[32]),
        .I1(termIII[34]),
        .O(\termIIIk[33]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1469" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[34]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[41]),
        .O(\termIIIk[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1468" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[35]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[42]),
        .O(\termIIIk[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1468" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[36]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[43]),
        .O(\termIIIk[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1467" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[37]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[44]),
        .O(\termIIIk[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1467" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[38]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[45]),
        .O(\termIIIk[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1466" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[39]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[46]),
        .O(\termIIIk[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1484" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[3]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[10]),
        .O(\termIIIk[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1466" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[40]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[47]),
        .O(\termIIIk[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1465" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[41]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[48]),
        .O(\termIIIk[41]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[41]_i_3 
       (.I0(termIII[45]),
        .I1(termIII[47]),
        .O(\termIIIk[41]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[41]_i_4 
       (.I0(termIII[44]),
        .I1(termIII[46]),
        .O(\termIIIk[41]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[41]_i_5 
       (.I0(termIII[43]),
        .I1(termIII[45]),
        .O(\termIIIk[41]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[41]_i_6 
       (.I0(termIII[42]),
        .I1(termIII[44]),
        .O(\termIIIk[41]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[41]_i_7 
       (.I0(termIII[41]),
        .I1(termIII[43]),
        .O(\termIIIk[41]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[41]_i_8 
       (.I0(termIII[40]),
        .I1(termIII[42]),
        .O(\termIIIk[41]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[41]_i_9 
       (.I0(termIII[39]),
        .I1(termIII[41]),
        .O(\termIIIk[41]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1465" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[42]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[49]),
        .O(\termIIIk[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1428" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[43]_i_1 
       (.I0(stateScore_reg_rep__16_n_0),
        .I1(termIIIk0[50]),
        .O(\termIIIk[43]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1483" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[4]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[11]),
        .O(\termIIIk[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1483" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[5]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[12]),
        .O(\termIIIk[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1482" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[6]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[13]),
        .O(\termIIIk[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1482" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[7]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[14]),
        .O(\termIIIk[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1481" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[8]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[15]),
        .O(\termIIIk[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1481" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termIIIk[9]_i_1 
       (.I0(stateScore_reg_rep__15_n_0),
        .I1(termIIIk0[16]),
        .O(\termIIIk[9]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[9]_i_10 
       (.I0(termIII[7]),
        .I1(termIII[9]),
        .O(\termIIIk[9]_i_10_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[9]_i_3 
       (.I0(termIII[14]),
        .I1(termIII[16]),
        .O(\termIIIk[9]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[9]_i_4 
       (.I0(termIII[13]),
        .I1(termIII[15]),
        .O(\termIIIk[9]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[9]_i_5 
       (.I0(termIII[12]),
        .I1(termIII[14]),
        .O(\termIIIk[9]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[9]_i_6 
       (.I0(termIII[11]),
        .I1(termIII[13]),
        .O(\termIIIk[9]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[9]_i_7 
       (.I0(termIII[10]),
        .I1(termIII[12]),
        .O(\termIIIk[9]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[9]_i_8 
       (.I0(termIII[9]),
        .I1(termIII[11]),
        .O(\termIIIk[9]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \termIIIk[9]_i_9 
       (.I0(termIII[8]),
        .I1(termIII[10]),
        .O(\termIIIk[9]_i_9_n_0 ));
  FDCE \termIIIk_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[0]_i_1_n_0 ),
        .Q(termIIIk[0]));
  FDCE \termIIIk_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[10]_i_1_n_0 ),
        .Q(termIIIk[10]));
  FDCE \termIIIk_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[11]_i_1_n_0 ),
        .Q(termIIIk[11]));
  FDCE \termIIIk_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[12]_i_1_n_0 ),
        .Q(termIIIk[12]));
  FDCE \termIIIk_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[13]_i_1_n_0 ),
        .Q(termIIIk[13]));
  FDCE \termIIIk_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[14]_i_1_n_0 ),
        .Q(termIIIk[14]));
  FDCE \termIIIk_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[15]_i_1_n_0 ),
        .Q(termIIIk[15]));
  FDCE \termIIIk_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[16]_i_1_n_0 ),
        .Q(termIIIk[16]));
  FDCE \termIIIk_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[17]_i_1_n_0 ),
        .Q(termIIIk[17]));
  CARRY8 \termIIIk_reg[17]_i_2 
       (.CI(\termIIIk_reg[9]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\termIIIk_reg[17]_i_2_n_0 ,\termIIIk_reg[17]_i_2_n_1 ,\termIIIk_reg[17]_i_2_n_2 ,\termIIIk_reg[17]_i_2_n_3 ,\termIIIk_reg[17]_i_2_n_4 ,\termIIIk_reg[17]_i_2_n_5 ,\termIIIk_reg[17]_i_2_n_6 ,\termIIIk_reg[17]_i_2_n_7 }),
        .DI(termIII[22:15]),
        .O(termIIIk0[24:17]),
        .S({\termIIIk[17]_i_3_n_0 ,\termIIIk[17]_i_4_n_0 ,\termIIIk[17]_i_5_n_0 ,\termIIIk[17]_i_6_n_0 ,\termIIIk[17]_i_7_n_0 ,\termIIIk[17]_i_8_n_0 ,\termIIIk[17]_i_9_n_0 ,\termIIIk[17]_i_10_n_0 }));
  FDCE \termIIIk_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[18]_i_1_n_0 ),
        .Q(termIIIk[18]));
  FDCE \termIIIk_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[19]_i_1_n_0 ),
        .Q(termIIIk[19]));
  FDCE \termIIIk_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[1]_i_1_n_0 ),
        .Q(termIIIk[1]));
  CARRY8 \termIIIk_reg[1]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\termIIIk_reg[1]_i_2_n_0 ,\termIIIk_reg[1]_i_2_n_1 ,\termIIIk_reg[1]_i_2_n_2 ,\termIIIk_reg[1]_i_2_n_3 ,\termIIIk_reg[1]_i_2_n_4 ,\termIIIk_reg[1]_i_2_n_5 ,\termIIIk_reg[1]_i_2_n_6 ,\termIIIk_reg[1]_i_2_n_7 }),
        .DI({termIII[6:0],1'b0}),
        .O({termIIIk0[8:7],\NLW_termIIIk_reg[1]_i_2_O_UNCONNECTED [5:0]}),
        .S({\termIIIk[1]_i_3_n_0 ,\termIIIk[1]_i_4_n_0 ,\termIIIk[1]_i_5_n_0 ,\termIIIk[1]_i_6_n_0 ,\termIIIk[1]_i_7_n_0 ,\termIIIk[1]_i_8_n_0 ,\termIIIk[1]_i_9_n_0 ,termIII[1]}));
  FDCE \termIIIk_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[20]_i_1_n_0 ),
        .Q(termIIIk[20]));
  FDCE \termIIIk_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[21]_i_1_n_0 ),
        .Q(termIIIk[21]));
  FDCE \termIIIk_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[22]_i_1_n_0 ),
        .Q(termIIIk[22]));
  FDCE \termIIIk_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[23]_i_1_n_0 ),
        .Q(termIIIk[23]));
  FDCE \termIIIk_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[24]_i_1_n_0 ),
        .Q(termIIIk[24]));
  FDCE \termIIIk_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[25]_i_1_n_0 ),
        .Q(termIIIk[25]));
  CARRY8 \termIIIk_reg[25]_i_2 
       (.CI(\termIIIk_reg[17]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\termIIIk_reg[25]_i_2_n_0 ,\termIIIk_reg[25]_i_2_n_1 ,\termIIIk_reg[25]_i_2_n_2 ,\termIIIk_reg[25]_i_2_n_3 ,\termIIIk_reg[25]_i_2_n_4 ,\termIIIk_reg[25]_i_2_n_5 ,\termIIIk_reg[25]_i_2_n_6 ,\termIIIk_reg[25]_i_2_n_7 }),
        .DI(termIII[30:23]),
        .O(termIIIk0[32:25]),
        .S({\termIIIk[25]_i_3_n_0 ,\termIIIk[25]_i_4_n_0 ,\termIIIk[25]_i_5_n_0 ,\termIIIk[25]_i_6_n_0 ,\termIIIk[25]_i_7_n_0 ,\termIIIk[25]_i_8_n_0 ,\termIIIk[25]_i_9_n_0 ,\termIIIk[25]_i_10_n_0 }));
  FDCE \termIIIk_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[26]_i_1_n_0 ),
        .Q(termIIIk[26]));
  FDCE \termIIIk_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[27]_i_1_n_0 ),
        .Q(termIIIk[27]));
  FDCE \termIIIk_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[28]_i_1_n_0 ),
        .Q(termIIIk[28]));
  FDCE \termIIIk_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[29]_i_1_n_0 ),
        .Q(termIIIk[29]));
  FDCE \termIIIk_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[2]_i_1_n_0 ),
        .Q(termIIIk[2]));
  FDCE \termIIIk_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[30]_i_1_n_0 ),
        .Q(termIIIk[30]));
  FDCE \termIIIk_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[31]_i_1_n_0 ),
        .Q(termIIIk[31]));
  FDCE \termIIIk_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[32]_i_1_n_0 ),
        .Q(termIIIk[32]));
  FDCE \termIIIk_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[33]_i_1_n_0 ),
        .Q(termIIIk[33]));
  CARRY8 \termIIIk_reg[33]_i_2 
       (.CI(\termIIIk_reg[25]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\termIIIk_reg[33]_i_2_n_0 ,\termIIIk_reg[33]_i_2_n_1 ,\termIIIk_reg[33]_i_2_n_2 ,\termIIIk_reg[33]_i_2_n_3 ,\termIIIk_reg[33]_i_2_n_4 ,\termIIIk_reg[33]_i_2_n_5 ,\termIIIk_reg[33]_i_2_n_6 ,\termIIIk_reg[33]_i_2_n_7 }),
        .DI(termIII[38:31]),
        .O(termIIIk0[40:33]),
        .S({\termIIIk[33]_i_3_n_0 ,\termIIIk[33]_i_4_n_0 ,\termIIIk[33]_i_5_n_0 ,\termIIIk[33]_i_6_n_0 ,\termIIIk[33]_i_7_n_0 ,\termIIIk[33]_i_8_n_0 ,\termIIIk[33]_i_9_n_0 ,\termIIIk[33]_i_10_n_0 }));
  FDCE \termIIIk_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[34]_i_1_n_0 ),
        .Q(termIIIk[34]));
  FDCE \termIIIk_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[35]_i_1_n_0 ),
        .Q(termIIIk[35]));
  FDCE \termIIIk_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[36]_i_1_n_0 ),
        .Q(termIIIk[36]));
  FDCE \termIIIk_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[37]_i_1_n_0 ),
        .Q(termIIIk[37]));
  FDCE \termIIIk_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[38]_i_1_n_0 ),
        .Q(termIIIk[38]));
  FDCE \termIIIk_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[39]_i_1_n_0 ),
        .Q(termIIIk[39]));
  FDCE \termIIIk_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[3]_i_1_n_0 ),
        .Q(termIIIk[3]));
  FDCE \termIIIk_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[40]_i_1_n_0 ),
        .Q(termIIIk[40]));
  FDCE \termIIIk_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[41]_i_1_n_0 ),
        .Q(termIIIk[41]));
  CARRY8 \termIIIk_reg[41]_i_2 
       (.CI(\termIIIk_reg[33]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\termIIIk_reg[41]_i_2_n_0 ,\termIIIk_reg[41]_i_2_n_1 ,\termIIIk_reg[41]_i_2_n_2 ,\termIIIk_reg[41]_i_2_n_3 ,\termIIIk_reg[41]_i_2_n_4 ,\termIIIk_reg[41]_i_2_n_5 ,\termIIIk_reg[41]_i_2_n_6 ,\termIIIk_reg[41]_i_2_n_7 }),
        .DI({1'b0,termIII[45:39]}),
        .O(termIIIk0[48:41]),
        .S({termIII[46],\termIIIk[41]_i_3_n_0 ,\termIIIk[41]_i_4_n_0 ,\termIIIk[41]_i_5_n_0 ,\termIIIk[41]_i_6_n_0 ,\termIIIk[41]_i_7_n_0 ,\termIIIk[41]_i_8_n_0 ,\termIIIk[41]_i_9_n_0 }));
  FDCE \termIIIk_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[42]_i_1_n_0 ),
        .Q(termIIIk[42]));
  FDCE \termIIIk_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[43]_i_1_n_0 ),
        .Q(termIIIk[43]));
  CARRY8 \termIIIk_reg[43]_i_2 
       (.CI(\termIIIk_reg[41]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_termIIIk_reg[43]_i_2_CO_UNCONNECTED [7:2],termIIIk0[50],\NLW_termIIIk_reg[43]_i_2_CO_UNCONNECTED [0]}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_termIIIk_reg[43]_i_2_O_UNCONNECTED [7:1],termIIIk0[49]}),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,termIII[47]}));
  FDCE \termIIIk_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[4]_i_1_n_0 ),
        .Q(termIIIk[4]));
  FDCE \termIIIk_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[5]_i_1_n_0 ),
        .Q(termIIIk[5]));
  FDCE \termIIIk_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[6]_i_1_n_0 ),
        .Q(termIIIk[6]));
  FDCE \termIIIk_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[7]_i_1_n_0 ),
        .Q(termIIIk[7]));
  FDCE \termIIIk_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[8]_i_1_n_0 ),
        .Q(termIIIk[8]));
  FDCE \termIIIk_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termIIIk[9]_i_1_n_0 ),
        .Q(termIIIk[9]));
  CARRY8 \termIIIk_reg[9]_i_2 
       (.CI(\termIIIk_reg[1]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\termIIIk_reg[9]_i_2_n_0 ,\termIIIk_reg[9]_i_2_n_1 ,\termIIIk_reg[9]_i_2_n_2 ,\termIIIk_reg[9]_i_2_n_3 ,\termIIIk_reg[9]_i_2_n_4 ,\termIIIk_reg[9]_i_2_n_5 ,\termIIIk_reg[9]_i_2_n_6 ,\termIIIk_reg[9]_i_2_n_7 }),
        .DI(termIII[14:7]),
        .O(termIIIk0[16:9]),
        .S({\termIIIk[9]_i_3_n_0 ,\termIIIk[9]_i_4_n_0 ,\termIIIk[9]_i_5_n_0 ,\termIIIk[9]_i_6_n_0 ,\termIIIk[9]_i_7_n_0 ,\termIIIk[9]_i_8_n_0 ,\termIIIk[9]_i_9_n_0 ,\termIIIk[9]_i_10_n_0 }));
  (* SOFT_HLUTNM = "soft_lutpair1416" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[0]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_105),
        .O(\termII[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1411" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[10]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_95),
        .O(\termII[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1411" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[11]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_94),
        .O(\termII[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1410" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[12]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_93),
        .O(\termII[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1410" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[13]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_92),
        .O(\termII[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1409" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[14]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_91),
        .O(\termII[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1409" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[15]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_90),
        .O(\termII[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1408" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[16]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0_n_89),
        .O(\termII[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1408" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[17]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_105),
        .O(\termII[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1407" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[18]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_104),
        .O(\termII[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1407" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[19]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_103),
        .O(\termII[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1416" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[1]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_104),
        .O(\termII[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1406" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[20]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_102),
        .O(\termII[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1406" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[21]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_101),
        .O(\termII[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1405" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[22]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_100),
        .O(\termII[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1405" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[23]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_99),
        .O(\termII[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1404" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[24]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_98),
        .O(\termII[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1404" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[25]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_97),
        .O(\termII[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1403" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[26]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_96),
        .O(\termII[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1403" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[27]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_95),
        .O(\termII[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1402" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[28]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_94),
        .O(\termII[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1402" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[29]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_93),
        .O(\termII[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1415" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[2]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_103),
        .O(\termII[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1401" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[30]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_92),
        .O(\termII[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1401" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[31]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termII0__0_n_91),
        .O(\termII[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1400" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[32]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_90),
        .O(\termII[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1400" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[33]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_89),
        .O(\termII[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1399" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[34]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_88),
        .O(\termII[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1399" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[35]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_87),
        .O(\termII[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1398" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[36]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_86),
        .O(\termII[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1398" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[37]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_85),
        .O(\termII[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1397" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[38]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_84),
        .O(\termII[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1397" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[39]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_83),
        .O(\termII[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1415" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[3]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_102),
        .O(\termII[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1396" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[40]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_82),
        .O(\termII[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1396" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[41]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_81),
        .O(\termII[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1395" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[42]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_80),
        .O(\termII[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1395" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[43]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_79),
        .O(\termII[43]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1394" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[44]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_78),
        .O(\termII[44]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1394" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[45]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termII0__0_n_77),
        .O(\termII[45]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1414" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[4]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_101),
        .O(\termII[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1414" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[5]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_100),
        .O(\termII[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1413" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[6]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_99),
        .O(\termII[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1413" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[7]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_98),
        .O(\termII[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1412" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[8]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_97),
        .O(\termII[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1412" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termII[9]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termII0_n_96),
        .O(\termII[9]_i_1_n_0 ));
  FDCE \termII_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[0]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[0] ));
  FDCE \termII_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[10]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[10] ));
  FDCE \termII_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[11]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[11] ));
  FDCE \termII_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[12]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[12] ));
  FDCE \termII_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[13]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[13] ));
  FDCE \termII_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[14]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[14] ));
  FDCE \termII_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[15]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[15] ));
  FDCE \termII_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[16]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[16] ));
  FDCE \termII_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[17]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[17] ));
  FDCE \termII_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[18]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[18] ));
  FDCE \termII_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[19]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[19] ));
  FDCE \termII_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[1]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[1] ));
  FDCE \termII_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[20]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[20] ));
  FDCE \termII_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[21]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[21] ));
  FDCE \termII_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[22]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[22] ));
  FDCE \termII_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[23]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[23] ));
  FDCE \termII_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[24]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[24] ));
  FDCE \termII_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[25]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[25] ));
  FDCE \termII_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[26]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[26] ));
  FDCE \termII_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[27]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[27] ));
  FDCE \termII_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[28]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[28] ));
  FDCE \termII_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[29]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[29] ));
  FDCE \termII_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[2]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[2] ));
  FDCE \termII_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[30]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[30] ));
  FDCE \termII_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[31]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[31] ));
  FDCE \termII_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[32]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[32] ));
  FDCE \termII_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[33]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[33] ));
  FDCE \termII_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[34]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[34] ));
  FDCE \termII_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[35]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[35] ));
  FDCE \termII_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[36]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[36] ));
  FDCE \termII_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[37]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[37] ));
  FDCE \termII_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[38]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[38] ));
  FDCE \termII_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[39]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[39] ));
  FDCE \termII_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[3]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[3] ));
  FDCE \termII_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[40]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[40] ));
  FDCE \termII_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[41]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[41] ));
  FDCE \termII_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[42]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[42] ));
  FDCE \termII_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[43]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[43] ));
  FDCE \termII_reg[44] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[44]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[44] ));
  FDCE \termII_reg[45] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[45]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[45] ));
  FDCE \termII_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[4]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[4] ));
  FDCE \termII_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[5]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[5] ));
  FDCE \termII_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[6]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[6] ));
  FDCE \termII_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[7]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[7] ));
  FDCE \termII_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[8]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[8] ));
  FDCE \termII_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termII[9]_i_1_n_0 ),
        .Q(\termII_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1271" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[0]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_105),
        .O(\termI[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1266" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[10]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_95),
        .O(\termI[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1266" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[11]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_94),
        .O(\termI[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1265" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[12]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_93),
        .O(\termI[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1265" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[13]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_92),
        .O(\termI[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1264" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[14]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_91),
        .O(\termI[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1264" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[15]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_90),
        .O(\termI[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1263" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[16]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0_n_89),
        .O(\termI[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1263" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[17]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_105),
        .O(\termI[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1262" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[18]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_104),
        .O(\termI[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1262" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[19]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_103),
        .O(\termI[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1271" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[1]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_104),
        .O(\termI[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1261" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[20]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_102),
        .O(\termI[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1261" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[21]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_101),
        .O(\termI[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1260" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[22]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_100),
        .O(\termI[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1260" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[23]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_99),
        .O(\termI[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1259" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[24]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_98),
        .O(\termI[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1259" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[25]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_97),
        .O(\termI[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1258" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[26]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_96),
        .O(\termI[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1258" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[27]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_95),
        .O(\termI[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1257" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[28]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_94),
        .O(\termI[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1257" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[29]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_93),
        .O(\termI[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1270" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[2]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_103),
        .O(\termI[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1256" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[30]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_92),
        .O(\termI[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1256" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[31]_i_1 
       (.I0(stateScore_reg_rep__4_n_0),
        .I1(termI0__0_n_91),
        .O(\termI[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1255" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[32]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_90),
        .O(\termI[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1255" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[33]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_89),
        .O(\termI[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1254" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[34]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_88),
        .O(\termI[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1254" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[35]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_87),
        .O(\termI[35]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1253" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[36]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_86),
        .O(\termI[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1253" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[37]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_85),
        .O(\termI[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1252" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[38]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_84),
        .O(\termI[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1252" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[39]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_83),
        .O(\termI[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1270" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[3]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_102),
        .O(\termI[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1251" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[40]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_82),
        .O(\termI[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1251" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[41]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_81),
        .O(\termI[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1250" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[42]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_80),
        .O(\termI[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1250" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[43]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_79),
        .O(\termI[43]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1249" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[44]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_78),
        .O(\termI[44]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1249" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[45]_i_1 
       (.I0(stateScore_reg_rep__14_n_0),
        .I1(termI0__0_n_77),
        .O(\termI[45]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1269" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[4]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_101),
        .O(\termI[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1269" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[5]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_100),
        .O(\termI[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1268" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[6]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_99),
        .O(\termI[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1268" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[7]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_98),
        .O(\termI[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1267" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[8]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_97),
        .O(\termI[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1267" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \termI[9]_i_1 
       (.I0(stateScore_reg_rep__3_n_0),
        .I1(termI0_n_96),
        .O(\termI[9]_i_1_n_0 ));
  FDCE \termI_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[0]_i_1_n_0 ),
        .Q(termI[0]));
  FDCE \termI_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[10]_i_1_n_0 ),
        .Q(termI[10]));
  FDCE \termI_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[11]_i_1_n_0 ),
        .Q(termI[11]));
  FDCE \termI_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[12]_i_1_n_0 ),
        .Q(termI[12]));
  FDCE \termI_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[13]_i_1_n_0 ),
        .Q(termI[13]));
  FDCE \termI_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[14]_i_1_n_0 ),
        .Q(termI[14]));
  FDCE \termI_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[15]_i_1_n_0 ),
        .Q(termI[15]));
  FDCE \termI_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[16]_i_1_n_0 ),
        .Q(termI[16]));
  FDCE \termI_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[17]_i_1_n_0 ),
        .Q(termI[17]));
  FDCE \termI_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[18]_i_1_n_0 ),
        .Q(termI[18]));
  FDCE \termI_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[19]_i_1_n_0 ),
        .Q(termI[19]));
  FDCE \termI_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[1]_i_1_n_0 ),
        .Q(termI[1]));
  FDCE \termI_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[20]_i_1_n_0 ),
        .Q(termI[20]));
  FDCE \termI_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[21]_i_1_n_0 ),
        .Q(termI[21]));
  FDCE \termI_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[22]_i_1_n_0 ),
        .Q(termI[22]));
  FDCE \termI_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[23]_i_1_n_0 ),
        .Q(termI[23]));
  FDCE \termI_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[24]_i_1_n_0 ),
        .Q(termI[24]));
  FDCE \termI_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[25]_i_1_n_0 ),
        .Q(termI[25]));
  FDCE \termI_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[26]_i_1_n_0 ),
        .Q(termI[26]));
  FDCE \termI_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[27]_i_1_n_0 ),
        .Q(termI[27]));
  FDCE \termI_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[28]_i_1_n_0 ),
        .Q(termI[28]));
  FDCE \termI_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[29]_i_1_n_0 ),
        .Q(termI[29]));
  FDCE \termI_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[2]_i_1_n_0 ),
        .Q(termI[2]));
  FDCE \termI_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[30]_i_1_n_0 ),
        .Q(termI[30]));
  FDCE \termI_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[31]_i_1_n_0 ),
        .Q(termI[31]));
  FDCE \termI_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[32]_i_1_n_0 ),
        .Q(termI[32]));
  FDCE \termI_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[33]_i_1_n_0 ),
        .Q(termI[33]));
  FDCE \termI_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[34]_i_1_n_0 ),
        .Q(termI[34]));
  FDCE \termI_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[35]_i_1_n_0 ),
        .Q(termI[35]));
  FDCE \termI_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[36]_i_1_n_0 ),
        .Q(termI[36]));
  FDCE \termI_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[37]_i_1_n_0 ),
        .Q(termI[37]));
  FDCE \termI_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[38]_i_1_n_0 ),
        .Q(termI[38]));
  FDCE \termI_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[39]_i_1_n_0 ),
        .Q(termI[39]));
  FDCE \termI_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[3]_i_1_n_0 ),
        .Q(termI[3]));
  FDCE \termI_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[40]_i_1_n_0 ),
        .Q(termI[40]));
  FDCE \termI_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[41]_i_1_n_0 ),
        .Q(termI[41]));
  FDCE \termI_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[42]_i_1_n_0 ),
        .Q(termI[42]));
  FDCE \termI_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[43]_i_1_n_0 ),
        .Q(termI[43]));
  FDCE \termI_reg[44] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[44]_i_1_n_0 ),
        .Q(termI[44]));
  FDCE \termI_reg[45] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[45]_i_1_n_0 ),
        .Q(termI[45]));
  FDCE \termI_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[4]_i_1_n_0 ),
        .Q(termI[4]));
  FDCE \termI_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[5]_i_1_n_0 ),
        .Q(termI[5]));
  FDCE \termI_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[6]_i_1_n_0 ),
        .Q(termI[6]));
  FDCE \termI_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[7]_i_1_n_0 ),
        .Q(termI[7]));
  FDCE \termI_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[8]_i_1_n_0 ),
        .Q(termI[8]));
  FDCE \termI_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\termI[9]_i_1_n_0 ),
        .Q(termI[9]));
  FDCE #(
    .INIT(1'b0)) 
    \thd_reg[0] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [14]),
        .Q(\thd_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \thd_reg[1] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [15]),
        .Q(\thd_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \thd_reg[2] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [16]),
        .Q(\thd_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \thd_reg[3] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [17]),
        .Q(\thd_reg_n_0_[3] ));
  FDPE #(
    .INIT(1'b0)) 
    \thd_reg[4] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\thd_reg[7]_0 [18]),
        .PRE(linNotLog_reg_0),
        .Q(\thd_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \thd_reg[5] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [19]),
        .Q(\thd_reg_n_0_[5] ));
  FDPE #(
    .INIT(1'b0)) 
    \thd_reg[6] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(\thd_reg[7]_0 [20]),
        .PRE(linNotLog_reg_0),
        .Q(\thd_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \thd_reg[7] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(linNotLog_reg_0),
        .D(\thd_reg[7]_0 [21]),
        .Q(\thd_reg_n_0_[7] ));
  LUT6 #(
    .INIT(64'hFFFFFBFFAAAAAAAA)) 
    \tixVState[1]_i_3 
       (.I0(\tixVState_reg[1]_0 [1]),
        .I1(\tixVState_reg[1]_2 ),
        .I2(\stateOp_reg[1]_0 [0]),
        .I3(\tkst_reg[0]_0 ),
        .I4(vsync_last_reg_n_0),
        .I5(\tixVState_reg[1]_0 [0]),
        .O(\tixVState_reg[1]_1 ));
  FDCE \tixVState_reg[0] 
       (.C(aclk_sig),
        .CE(\tixVState_reg[1]_3 ),
        .CLR(linNotLog_reg_0),
        .D(ackInvAcquire_sig),
        .Q(\tixVState_reg[1]_0 [0]));
  FDCE \tixVState_reg[1] 
       (.C(aclk_sig),
        .CE(\tixVState_reg[1]_3 ),
        .CLR(linNotLog_reg_0),
        .D(\tixVState_reg[1]_4 ),
        .Q(\tixVState_reg[1]_0 [1]));
  LUT6 #(
    .INIT(64'h000000000000D000)) 
    \tkst[31]_i_1 
       (.I0(\tixVState_reg[1]_0 [1]),
        .I1(\tixVState_reg[1]_0 [0]),
        .I2(\tkst_reg[0]_0 ),
        .I3(rng_reg_0),
        .I4(\stateMaxsel_reg_n_0_[1] ),
        .I5(\stateMaxsel_reg_n_0_[0] ),
        .O(tkst));
  FDCE \tkst_reg[0] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [0]),
        .Q(\tkst_reg[31]_0 [0]));
  FDCE \tkst_reg[10] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [10]),
        .Q(\tkst_reg[31]_0 [10]));
  FDCE \tkst_reg[11] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [11]),
        .Q(\tkst_reg[31]_0 [11]));
  FDCE \tkst_reg[12] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [12]),
        .Q(\tkst_reg[31]_0 [12]));
  FDCE \tkst_reg[13] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [13]),
        .Q(\tkst_reg[31]_0 [13]));
  FDCE \tkst_reg[14] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [14]),
        .Q(\tkst_reg[31]_0 [14]));
  FDCE \tkst_reg[15] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [15]),
        .Q(\tkst_reg[31]_0 [15]));
  FDCE \tkst_reg[16] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [16]),
        .Q(\tkst_reg[31]_0 [16]));
  FDCE \tkst_reg[17] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [17]),
        .Q(\tkst_reg[31]_0 [17]));
  FDCE \tkst_reg[18] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [18]),
        .Q(\tkst_reg[31]_0 [18]));
  FDCE \tkst_reg[19] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [19]),
        .Q(\tkst_reg[31]_0 [19]));
  FDCE \tkst_reg[1] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [1]),
        .Q(\tkst_reg[31]_0 [1]));
  FDCE \tkst_reg[20] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [20]),
        .Q(\tkst_reg[31]_0 [20]));
  FDCE \tkst_reg[21] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [21]),
        .Q(\tkst_reg[31]_0 [21]));
  FDCE \tkst_reg[22] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [22]),
        .Q(\tkst_reg[31]_0 [22]));
  FDCE \tkst_reg[23] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [23]),
        .Q(\tkst_reg[31]_0 [23]));
  FDCE \tkst_reg[24] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [24]),
        .Q(\tkst_reg[31]_0 [24]));
  FDCE \tkst_reg[25] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [25]),
        .Q(\tkst_reg[31]_0 [25]));
  FDCE \tkst_reg[26] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [26]),
        .Q(\tkst_reg[31]_0 [26]));
  FDCE \tkst_reg[27] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [27]),
        .Q(\tkst_reg[31]_0 [27]));
  FDCE \tkst_reg[28] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [28]),
        .Q(\tkst_reg[31]_0 [28]));
  FDCE \tkst_reg[29] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [29]),
        .Q(\tkst_reg[31]_0 [29]));
  FDCE \tkst_reg[2] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [2]),
        .Q(\tkst_reg[31]_0 [2]));
  FDCE \tkst_reg[30] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [30]),
        .Q(\tkst_reg[31]_0 [30]));
  FDCE \tkst_reg[31] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [31]),
        .Q(\tkst_reg[31]_0 [31]));
  FDCE \tkst_reg[3] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [3]),
        .Q(\tkst_reg[31]_0 [3]));
  FDCE \tkst_reg[4] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [4]),
        .Q(\tkst_reg[31]_0 [4]));
  FDCE \tkst_reg[5] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [5]),
        .Q(\tkst_reg[31]_0 [5]));
  FDCE \tkst_reg[6] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [6]),
        .Q(\tkst_reg[31]_0 [6]));
  FDCE \tkst_reg[7] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [7]),
        .Q(\tkst_reg[31]_0 [7]));
  FDCE \tkst_reg[8] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [8]),
        .Q(\tkst_reg[31]_0 [8]));
  FDCE \tkst_reg[9] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(linNotLog_reg_0),
        .D(\tkst_reg[31]_1 [9]),
        .Q(\tkst_reg[31]_0 [9]));
  LUT4 #(
    .INIT(16'hFB08)) 
    vsync_last_i_1
       (.I0(\tkst_reg[0]_0 ),
        .I1(vsync_last_reg_0),
        .I2(\stateOp_reg[1]_0 [0]),
        .I3(vsync_last_reg_n_0),
        .O(vsync_last_i_1_n_0));
  FDCE vsync_last_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(linNotLog_reg_0),
        .D(vsync_last_i_1_n_0),
        .Q(vsync_last_reg_n_0));
  LUT3 #(
    .INIT(8'hFE)) 
    \wordcntLast[28]_i_17 
       (.I0(enCoobufB),
        .I1(\FSM_onehot_stateCoobufB_reg_n_0_[2] ),
        .I2(\FSM_onehot_stateCoobufB_reg[5]_0 [0]),
        .O(ackCoobufCornerToHostif));
  (* SOFT_HLUTNM = "soft_lutpair1081" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[0]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[72] ),
        .O(\xsqr4p1[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1076" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[10]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[82] ),
        .O(\xsqr4p1[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1076" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[11]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[83] ),
        .O(\xsqr4p1[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1075" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[12]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[84] ),
        .O(\xsqr4p1[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1075" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[13]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[85] ),
        .O(\xsqr4p1[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1074" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[14]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[86] ),
        .O(\xsqr4p1[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1074" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[15]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[87] ),
        .O(\xsqr4p1[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1073" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[16]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(\xsqr_reg_n_0_[88] ),
        .O(\xsqr4p1[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1073" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[17]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(\xsqr_reg_n_0_[89] ),
        .O(\xsqr4p1[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1080" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[2]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[74] ),
        .O(\xsqr4p1[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1080" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[3]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[75] ),
        .O(\xsqr4p1[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1079" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[4]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[76] ),
        .O(\xsqr4p1[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1079" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[5]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[77] ),
        .O(\xsqr4p1[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1078" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[6]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[78] ),
        .O(\xsqr4p1[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1078" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[7]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[79] ),
        .O(\xsqr4p1[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1077" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[8]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[80] ),
        .O(\xsqr4p1[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1077" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p1[9]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\xsqr_reg_n_0_[81] ),
        .O(\xsqr4p1[9]_i_1_n_0 ));
  FDCE \xsqr4p1_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[0]_i_1_n_0 ),
        .Q(xsqr4p1[0]));
  FDCE \xsqr4p1_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[10]_i_1_n_0 ),
        .Q(xsqr4p1[10]));
  FDCE \xsqr4p1_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[11]_i_1_n_0 ),
        .Q(xsqr4p1[11]));
  FDCE \xsqr4p1_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[12]_i_1_n_0 ),
        .Q(xsqr4p1[12]));
  FDCE \xsqr4p1_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[13]_i_1_n_0 ),
        .Q(xsqr4p1[13]));
  FDCE \xsqr4p1_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[14]_i_1_n_0 ),
        .Q(xsqr4p1[14]));
  FDCE \xsqr4p1_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[15]_i_1_n_0 ),
        .Q(xsqr4p1[15]));
  FDCE \xsqr4p1_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[16]_i_1_n_0 ),
        .Q(xsqr4p1[16]));
  FDCE \xsqr4p1_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[17]_i_1_n_0 ),
        .Q(xsqr4p1[17]));
  FDCE \xsqr4p1_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[2]_i_1_n_0 ),
        .Q(xsqr4p1[2]));
  FDCE \xsqr4p1_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[3]_i_1_n_0 ),
        .Q(xsqr4p1[3]));
  FDCE \xsqr4p1_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[4]_i_1_n_0 ),
        .Q(xsqr4p1[4]));
  FDCE \xsqr4p1_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[5]_i_1_n_0 ),
        .Q(xsqr4p1[5]));
  FDCE \xsqr4p1_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[6]_i_1_n_0 ),
        .Q(xsqr4p1[6]));
  FDCE \xsqr4p1_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[7]_i_1_n_0 ),
        .Q(xsqr4p1[7]));
  FDCE \xsqr4p1_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[8]_i_1_n_0 ),
        .Q(xsqr4p1[8]));
  FDCE \xsqr4p1_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p1[9]_i_1_n_0 ),
        .Q(xsqr4p1[9]));
  (* SOFT_HLUTNM = "soft_lutpair1089" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[0]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[0]),
        .O(\xsqr4p2[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1085" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[10]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[10]),
        .O(\xsqr4p2[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1084" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[11]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[11]),
        .O(\xsqr4p2[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1084" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[12]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[12]),
        .O(\xsqr4p2[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1083" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[13]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[13]),
        .O(\xsqr4p2[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1083" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[14]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[14]),
        .O(\xsqr4p2[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1081" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[15]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[15]),
        .O(\xsqr4p2[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1082" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[16]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xsqr4p1[16]),
        .O(\xsqr4p2[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1082" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[17]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xsqr4p1[17]),
        .O(\xsqr4p2[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1089" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[2]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[2]),
        .O(\xsqr4p2[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1088" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[3]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[3]),
        .O(\xsqr4p2[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1088" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[4]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[4]),
        .O(\xsqr4p2[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1087" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[5]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[5]),
        .O(\xsqr4p2[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1087" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[6]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[6]),
        .O(\xsqr4p2[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1086" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[7]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[7]),
        .O(\xsqr4p2[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1086" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[8]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[8]),
        .O(\xsqr4p2[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1085" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr4p2[9]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr4p1[9]),
        .O(\xsqr4p2[9]_i_1_n_0 ));
  FDCE \xsqr4p2_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[0]_i_1_n_0 ),
        .Q(xsqr4p2[0]));
  FDCE \xsqr4p2_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[10]_i_1_n_0 ),
        .Q(xsqr4p2[10]));
  FDCE \xsqr4p2_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[11]_i_1_n_0 ),
        .Q(xsqr4p2[11]));
  FDCE \xsqr4p2_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[12]_i_1_n_0 ),
        .Q(xsqr4p2[12]));
  FDCE \xsqr4p2_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[13]_i_1_n_0 ),
        .Q(xsqr4p2[13]));
  FDCE \xsqr4p2_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[14]_i_1_n_0 ),
        .Q(xsqr4p2[14]));
  FDCE \xsqr4p2_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[15]_i_1_n_0 ),
        .Q(xsqr4p2[15]));
  FDCE \xsqr4p2_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[16]_i_1_n_0 ),
        .Q(xsqr4p2[16]));
  FDCE \xsqr4p2_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[17]_i_1_n_0 ),
        .Q(xsqr4p2[17]));
  FDCE \xsqr4p2_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[2]_i_1_n_0 ),
        .Q(xsqr4p2[2]));
  FDCE \xsqr4p2_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[3]_i_1_n_0 ),
        .Q(xsqr4p2[3]));
  FDCE \xsqr4p2_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[4]_i_1_n_0 ),
        .Q(xsqr4p2[4]));
  FDCE \xsqr4p2_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[5]_i_1_n_0 ),
        .Q(xsqr4p2[5]));
  FDCE \xsqr4p2_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[6]_i_1_n_0 ),
        .Q(xsqr4p2[6]));
  FDCE \xsqr4p2_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[7]_i_1_n_0 ),
        .Q(xsqr4p2[7]));
  FDCE \xsqr4p2_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[8]_i_1_n_0 ),
        .Q(xsqr4p2[8]));
  FDCE \xsqr4p2_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr4p2[9]_i_1_n_0 ),
        .Q(xsqr4p2[9]));
  (* SOFT_HLUTNM = "soft_lutpair964" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[0]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(\dx_reg_n_0_[0] ),
        .O(\xsqr[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1052" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[10]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[10]),
        .O(\xsqr[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1051" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[11]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[11]),
        .O(\xsqr[11]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[11]_i_10 
       (.I0(\xsqr_reg[3]_i_3_n_15 ),
        .I1(\xsqr_reg[3]_i_2_n_13 ),
        .O(\xsqr[11]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \xsqr[11]_i_11 
       (.I0(\xsqr_reg[3]_i_3_n_9 ),
        .I1(\xsqr_reg[17]_i_13_n_12 ),
        .I2(\xsqr_reg[17]_i_18_n_14 ),
        .I3(\xsqr_reg[17]_i_13_n_11 ),
        .I4(\xsqr_reg[3]_i_3_n_8 ),
        .I5(\xsqr[11]_i_19_n_0 ),
        .O(\xsqr[11]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \xsqr[11]_i_12 
       (.I0(\xsqr_reg[17]_i_18_n_15 ),
        .I1(\xsqr_reg[3]_i_3_n_9 ),
        .I2(\xsqr_reg[17]_i_13_n_12 ),
        .I3(\xsqr_reg[3]_i_3_n_8 ),
        .I4(\xsqr_reg[17]_i_13_n_11 ),
        .I5(\xsqr_reg[17]_i_18_n_14 ),
        .O(\xsqr[11]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \xsqr[11]_i_13 
       (.I0(\xsqr_reg[17]_i_18_n_15 ),
        .I1(\xsqr_reg[17]_i_13_n_12 ),
        .I2(\xsqr_reg[3]_i_3_n_9 ),
        .I3(\xsqr_reg[3]_i_3_n_10 ),
        .I4(\xsqr_reg[3]_i_2_n_8 ),
        .I5(\xsqr_reg[17]_i_13_n_13 ),
        .O(\xsqr[11]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[11]_i_14 
       (.I0(\xsqr[11]_i_6_n_0 ),
        .I1(\xsqr_reg[17]_i_13_n_13 ),
        .I2(\xsqr_reg[3]_i_2_n_8 ),
        .I3(\xsqr_reg[3]_i_3_n_10 ),
        .O(\xsqr[11]_i_14_n_0 ));
  (* HLUTNM = "lutpair3" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[11]_i_15 
       (.I0(\xsqr_reg[17]_i_13_n_14 ),
        .I1(\xsqr_reg[3]_i_2_n_9 ),
        .I2(\xsqr_reg[3]_i_3_n_11 ),
        .I3(\xsqr[11]_i_7_n_0 ),
        .O(\xsqr[11]_i_15_n_0 ));
  (* HLUTNM = "lutpair2" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[11]_i_16 
       (.I0(\xsqr_reg[17]_i_13_n_15 ),
        .I1(\xsqr_reg[3]_i_2_n_10 ),
        .I2(\xsqr_reg[3]_i_3_n_12 ),
        .I3(\xsqr[11]_i_8_n_0 ),
        .O(\xsqr[11]_i_16_n_0 ));
  (* HLUTNM = "lutpair1" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \xsqr[11]_i_17 
       (.I0(\xsqr_reg[3]_i_3_n_13 ),
        .I1(\xsqr_reg[3]_i_2_n_11 ),
        .I2(\xsqr_reg[3]_i_2_n_12 ),
        .I3(\xsqr_reg[3]_i_3_n_14 ),
        .O(\xsqr[11]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \xsqr[11]_i_18 
       (.I0(\xsqr_reg[3]_i_2_n_13 ),
        .I1(\xsqr_reg[3]_i_3_n_15 ),
        .I2(\xsqr_reg[3]_i_2_n_12 ),
        .I3(\xsqr_reg[3]_i_3_n_14 ),
        .O(\xsqr[11]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xsqr[11]_i_19 
       (.I0(\xsqr_reg[17]_i_17_n_15 ),
        .I1(\xsqr_reg[17]_i_13_n_10 ),
        .I2(\xsqr_reg[17]_i_18_n_5 ),
        .O(\xsqr[11]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \xsqr[11]_i_3 
       (.I0(\xsqr_reg[3]_i_3_n_9 ),
        .I1(\xsqr_reg[17]_i_13_n_12 ),
        .I2(\xsqr_reg[17]_i_18_n_14 ),
        .I3(\xsqr_reg[17]_i_13_n_11 ),
        .I4(\xsqr_reg[3]_i_3_n_8 ),
        .O(\xsqr[11]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \xsqr[11]_i_4 
       (.I0(\xsqr_reg[17]_i_18_n_15 ),
        .I1(\xsqr_reg[3]_i_3_n_9 ),
        .I2(\xsqr_reg[17]_i_13_n_12 ),
        .O(\xsqr[11]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xsqr[11]_i_5 
       (.I0(\xsqr_reg[3]_i_3_n_9 ),
        .I1(\xsqr_reg[17]_i_13_n_12 ),
        .I2(\xsqr_reg[17]_i_18_n_15 ),
        .O(\xsqr[11]_i_5_n_0 ));
  (* HLUTNM = "lutpair3" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xsqr[11]_i_6 
       (.I0(\xsqr_reg[17]_i_13_n_14 ),
        .I1(\xsqr_reg[3]_i_2_n_9 ),
        .I2(\xsqr_reg[3]_i_3_n_11 ),
        .O(\xsqr[11]_i_6_n_0 ));
  (* HLUTNM = "lutpair2" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xsqr[11]_i_7 
       (.I0(\xsqr_reg[17]_i_13_n_15 ),
        .I1(\xsqr_reg[3]_i_2_n_10 ),
        .I2(\xsqr_reg[3]_i_3_n_12 ),
        .O(\xsqr[11]_i_7_n_0 ));
  (* HLUTNM = "lutpair1" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[11]_i_8 
       (.I0(\xsqr_reg[3]_i_3_n_13 ),
        .I1(\xsqr_reg[3]_i_2_n_11 ),
        .O(\xsqr[11]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[11]_i_9 
       (.I0(\xsqr_reg[3]_i_3_n_14 ),
        .I1(\xsqr_reg[3]_i_2_n_12 ),
        .O(\xsqr[11]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1051" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[12]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[12]),
        .O(\xsqr[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1050" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[13]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[13]),
        .O(\xsqr[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1050" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[14]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[14]),
        .O(\xsqr[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1049" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[15]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[15]),
        .O(\xsqr[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1049" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[16]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[16]),
        .O(\xsqr[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1048" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[17]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[17]),
        .O(\xsqr[17]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \xsqr[17]_i_10 
       (.I0(\xsqr[17]_i_5_n_0 ),
        .I1(\xsqr_reg[17]_i_3_n_15 ),
        .I2(\xsqr_reg[17]_i_17_n_4 ),
        .I3(\xsqr_reg[17]_i_13_n_8 ),
        .I4(\xsqr_reg[17]_i_17_n_13 ),
        .O(\xsqr[17]_i_10_n_0 ));
  (* HLUTNM = "lutpair4" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \xsqr[17]_i_11 
       (.I0(\xsqr_reg[17]_i_17_n_14 ),
        .I1(\xsqr_reg[17]_i_13_n_9 ),
        .I2(\xsqr_reg[17]_i_17_n_13 ),
        .I3(\xsqr_reg[17]_i_13_n_8 ),
        .I4(\xsqr[17]_i_6_n_0 ),
        .O(\xsqr[17]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \xsqr[17]_i_12 
       (.I0(\xsqr[17]_i_7_n_0 ),
        .I1(\xsqr_reg[17]_i_17_n_15 ),
        .I2(\xsqr_reg[17]_i_18_n_5 ),
        .I3(\xsqr_reg[17]_i_13_n_10 ),
        .I4(\xsqr_reg[17]_i_17_n_14 ),
        .I5(\xsqr_reg[17]_i_13_n_9 ),
        .O(\xsqr[17]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \xsqr[17]_i_14 
       (.I0(\dx_reg_n_0_[7] ),
        .I1(\dx_reg_n_0_[8] ),
        .O(\xsqr[17]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \xsqr[17]_i_15 
       (.I0(\dx_reg_n_0_[6] ),
        .I1(\dx_reg_n_0_[8] ),
        .O(\xsqr[17]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[17]_i_16 
       (.I0(\dx_reg_n_0_[7] ),
        .I1(\dx_reg_n_0_[6] ),
        .O(\xsqr[17]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hF7777000)) 
    \xsqr[17]_i_19 
       (.I0(\dx_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[4] ),
        .I2(\dx_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[5] ),
        .I4(\dx_reg_n_0_[6] ),
        .O(\xsqr[17]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[17]_i_20 
       (.I0(\dx_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[3] ),
        .I2(\dx_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[4] ),
        .I4(\dx_reg_n_0_[5] ),
        .I5(\dx_reg_n_0_[6] ),
        .O(\xsqr[17]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[17]_i_21 
       (.I0(\dx_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[3] ),
        .I4(\dx_reg_n_0_[4] ),
        .I5(\dx_reg_n_0_[6] ),
        .O(\xsqr[17]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[17]_i_22 
       (.I0(\dx_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dx_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[2] ),
        .I4(\dx_reg_n_0_[3] ),
        .I5(\dx_reg_n_0_[6] ),
        .O(\xsqr[17]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h7000)) 
    \xsqr[17]_i_23 
       (.I0(\dx_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[0] ),
        .I2(\dx_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[1] ),
        .O(\xsqr[17]_i_23_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[17]_i_24 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dx_reg_n_0_[6] ),
        .O(\xsqr[17]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'h8E11F555)) 
    \xsqr[17]_i_25 
       (.I0(\dx_reg_n_0_[6] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dx_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[8] ),
        .I4(\dx_reg_n_0_[5] ),
        .O(\xsqr[17]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hEB843C0C903FCF3F)) 
    \xsqr[17]_i_26 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[4] ),
        .I4(\dx_reg_n_0_[8] ),
        .I5(\dx_reg_n_0_[6] ),
        .O(\xsqr[17]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h7F07070780F8F8F8)) 
    \xsqr[17]_i_27 
       (.I0(\dx_reg_n_0_[6] ),
        .I1(\dx_reg_n_0_[4] ),
        .I2(\xsqr[17]_i_43_n_0 ),
        .I3(\dx_reg_n_0_[2] ),
        .I4(\dx_reg_n_0_[8] ),
        .I5(\xsqr[17]_i_44_n_0 ),
        .O(\xsqr[17]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A956A956A95)) 
    \xsqr[17]_i_28 
       (.I0(\xsqr[17]_i_22_n_0 ),
        .I1(\dx_reg_n_0_[8] ),
        .I2(\dx_reg_n_0_[2] ),
        .I3(\xsqr[17]_i_43_n_0 ),
        .I4(\dx_reg_n_0_[4] ),
        .I5(\dx_reg_n_0_[6] ),
        .O(\xsqr[17]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h69C399C369336933)) 
    \xsqr[17]_i_29 
       (.I0(\dx_reg_n_0_[2] ),
        .I1(\xsqr[17]_i_45_n_0 ),
        .I2(\dx_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[7] ),
        .I4(\dx_reg_n_0_[0] ),
        .I5(\dx_reg_n_0_[8] ),
        .O(\xsqr[17]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xsqr[17]_i_30 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dx_reg_n_0_[0] ),
        .I3(\dx_reg_n_0_[8] ),
        .I4(\dx_reg_n_0_[6] ),
        .I5(\dx_reg_n_0_[2] ),
        .O(\xsqr[17]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xsqr[17]_i_31 
       (.I0(\dx_reg_n_0_[6] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dx_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[0] ),
        .O(\xsqr[17]_i_31_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[17]_i_32 
       (.I0(\dx_reg_n_0_[0] ),
        .I1(\dx_reg_n_0_[6] ),
        .O(\xsqr[17]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xsqr[17]_i_33 
       (.I0(\dx_reg_n_0_[7] ),
        .I1(\dx_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[8] ),
        .I3(\dx_reg_n_0_[4] ),
        .O(\xsqr[17]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[17]_i_34 
       (.I0(\dx_reg_n_0_[5] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dx_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[8] ),
        .O(\xsqr[17]_i_34_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[17]_i_35 
       (.I0(\dx_reg_n_0_[4] ),
        .I1(\dx_reg_n_0_[5] ),
        .O(\xsqr[17]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \xsqr[17]_i_36 
       (.I0(\dx_reg_n_0_[4] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dx_reg_n_0_[8] ),
        .I3(\dx_reg_n_0_[5] ),
        .O(\xsqr[17]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \xsqr[17]_i_37 
       (.I0(\dx_reg_n_0_[6] ),
        .I1(\dx_reg_n_0_[3] ),
        .I2(\dx_reg_n_0_[8] ),
        .I3(\dx_reg_n_0_[4] ),
        .I4(\dx_reg_n_0_[7] ),
        .I5(\dx_reg_n_0_[5] ),
        .O(\xsqr[17]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'hD22287772DDD8777)) 
    \xsqr[17]_i_38 
       (.I0(\dx_reg_n_0_[4] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dx_reg_n_0_[3] ),
        .I3(\dx_reg_n_0_[8] ),
        .I4(\dx_reg_n_0_[5] ),
        .I5(\dx_reg_n_0_[6] ),
        .O(\xsqr[17]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xsqr[17]_i_39 
       (.I0(\dx_reg_n_0_[7] ),
        .I1(\dx_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[8] ),
        .I3(\dx_reg_n_0_[1] ),
        .O(\xsqr[17]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \xsqr[17]_i_4 
       (.I0(\xsqr_reg[17]_i_17_n_13 ),
        .I1(\xsqr_reg[17]_i_13_n_8 ),
        .I2(\xsqr_reg[17]_i_17_n_4 ),
        .I3(\xsqr_reg[17]_i_3_n_15 ),
        .O(\xsqr[17]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[17]_i_40 
       (.I0(\dx_reg_n_0_[2] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dx_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[8] ),
        .O(\xsqr[17]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \xsqr[17]_i_41 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dx_reg_n_0_[8] ),
        .I3(\dx_reg_n_0_[2] ),
        .O(\xsqr[17]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \xsqr[17]_i_42 
       (.I0(\dx_reg_n_0_[6] ),
        .I1(\dx_reg_n_0_[0] ),
        .I2(\dx_reg_n_0_[8] ),
        .I3(\dx_reg_n_0_[1] ),
        .I4(\dx_reg_n_0_[7] ),
        .I5(\dx_reg_n_0_[2] ),
        .O(\xsqr[17]_i_42_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair990" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[17]_i_43 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[7] ),
        .O(\xsqr[17]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xsqr[17]_i_44 
       (.I0(\dx_reg_n_0_[6] ),
        .I1(\dx_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[8] ),
        .I3(\dx_reg_n_0_[3] ),
        .I4(\dx_reg_n_0_[7] ),
        .I5(\dx_reg_n_0_[4] ),
        .O(\xsqr[17]_i_44_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[17]_i_45 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[6] ),
        .O(\xsqr[17]_i_45_n_0 ));
  (* HLUTNM = "lutpair4" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \xsqr[17]_i_5 
       (.I0(\xsqr_reg[17]_i_17_n_14 ),
        .I1(\xsqr_reg[17]_i_13_n_9 ),
        .I2(\xsqr_reg[17]_i_17_n_13 ),
        .I3(\xsqr_reg[17]_i_13_n_8 ),
        .O(\xsqr[17]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \xsqr[17]_i_6 
       (.I0(\xsqr_reg[17]_i_17_n_14 ),
        .I1(\xsqr_reg[17]_i_13_n_9 ),
        .I2(\xsqr_reg[17]_i_17_n_15 ),
        .I3(\xsqr_reg[17]_i_18_n_5 ),
        .I4(\xsqr_reg[17]_i_13_n_10 ),
        .O(\xsqr[17]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \xsqr[17]_i_7 
       (.I0(\xsqr_reg[3]_i_3_n_8 ),
        .I1(\xsqr_reg[17]_i_18_n_14 ),
        .I2(\xsqr_reg[17]_i_13_n_11 ),
        .I3(\xsqr_reg[17]_i_18_n_5 ),
        .I4(\xsqr_reg[17]_i_13_n_10 ),
        .I5(\xsqr_reg[17]_i_17_n_15 ),
        .O(\xsqr[17]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \xsqr[17]_i_8 
       (.I0(\xsqr_reg[17]_i_3_n_15 ),
        .I1(\xsqr_reg[17]_i_17_n_4 ),
        .I2(\xsqr_reg[17]_i_3_n_14 ),
        .I3(\xsqr_reg[17]_i_3_n_13 ),
        .O(\xsqr[17]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \xsqr[17]_i_9 
       (.I0(\xsqr_reg[17]_i_13_n_8 ),
        .I1(\xsqr_reg[17]_i_17_n_13 ),
        .I2(\xsqr_reg[17]_i_3_n_15 ),
        .I3(\xsqr_reg[17]_i_17_n_4 ),
        .I4(\xsqr_reg[17]_i_3_n_14 ),
        .O(\xsqr[17]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair966" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[18]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(A[0]),
        .O(\xsqr[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1048" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[20]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[2]),
        .O(\xsqr[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair866" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[21]_i_1 
       (.I0(\xsqr_reg[21]_i_2_n_13 ),
        .I1(\xsqr_reg[21]_i_3_n_15 ),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\xsqr[21]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9666)) 
    \xsqr[21]_i_10 
       (.I0(\xsqr[21]_i_4_n_0 ),
        .I1(\xsqr[21]_i_31_n_0 ),
        .I2(A[2]),
        .I3(A[6]),
        .O(\xsqr[21]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xsqr[21]_i_11 
       (.I0(\xsqr[21]_i_5_n_0 ),
        .I1(A[5]),
        .I2(A[2]),
        .I3(\xsqr[21]_i_32_n_0 ),
        .I4(A[0]),
        .I5(A[7]),
        .O(\xsqr[21]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \xsqr[21]_i_12 
       (.I0(\xsqr[21]_i_6_n_0 ),
        .I1(A[4]),
        .I2(A[2]),
        .I3(A[5]),
        .I4(A[1]),
        .I5(\xsqr[21]_i_33_n_0 ),
        .O(\xsqr[21]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xsqr[21]_i_13 
       (.I0(\xsqr[21]_i_7_n_0 ),
        .I1(A[4]),
        .I2(A[1]),
        .I3(\xsqr[21]_i_21_n_0 ),
        .I4(A[0]),
        .I5(A[5]),
        .O(\xsqr[21]_i_13_n_0 ));
  (* HLUTNM = "lutpair5" *) 
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \xsqr[21]_i_14 
       (.I0(A[1]),
        .I1(A[2]),
        .I2(A[3]),
        .I3(A[4]),
        .I4(A[0]),
        .O(\xsqr[21]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[21]_i_15 
       (.I0(A[3]),
        .I1(A[2]),
        .I2(A[0]),
        .O(\xsqr[21]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[21]_i_16 
       (.I0(A[1]),
        .I1(A[0]),
        .O(\xsqr[21]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[21]_i_17 
       (.I0(A[3]),
        .I1(A[7]),
        .O(\xsqr[21]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[21]_i_18 
       (.I0(A[3]),
        .I1(A[6]),
        .O(\xsqr[21]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[21]_i_19 
       (.I0(A[2]),
        .I1(A[5]),
        .O(\xsqr[21]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h956A6A6A)) 
    \xsqr[21]_i_20 
       (.I0(A[3]),
        .I1(A[1]),
        .I2(A[5]),
        .I3(A[2]),
        .I4(A[4]),
        .O(\xsqr[21]_i_20_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[21]_i_21 
       (.I0(A[2]),
        .I1(A[3]),
        .O(\xsqr[21]_i_21_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[21]_i_22 
       (.I0(A[1]),
        .I1(A[3]),
        .O(\xsqr[21]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \xsqr[21]_i_23 
       (.I0(A[4]),
        .I1(A[5]),
        .I2(A[6]),
        .I3(A[7]),
        .I4(A[3]),
        .O(\xsqr[21]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[21]_i_24 
       (.I0(A[6]),
        .I1(A[5]),
        .I2(A[3]),
        .O(\xsqr[21]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[21]_i_25 
       (.I0(A[4]),
        .I1(A[3]),
        .O(\xsqr[21]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h17A08800)) 
    \xsqr[21]_i_26 
       (.I0(A[3]),
        .I1(A[1]),
        .I2(A[4]),
        .I3(A[5]),
        .I4(A[2]),
        .O(\xsqr[21]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h663C963C66CC66CC)) 
    \xsqr[21]_i_27 
       (.I0(A[2]),
        .I1(A[3]),
        .I2(A[1]),
        .I3(A[4]),
        .I4(A[0]),
        .I5(A[5]),
        .O(\xsqr[21]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xsqr[21]_i_28 
       (.I0(A[0]),
        .I1(A[5]),
        .I2(A[1]),
        .I3(A[4]),
        .I4(A[3]),
        .I5(A[2]),
        .O(\xsqr[21]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xsqr[21]_i_29 
       (.I0(A[3]),
        .I1(A[1]),
        .I2(A[4]),
        .I3(A[0]),
        .O(\xsqr[21]_i_29_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[21]_i_30 
       (.I0(A[0]),
        .I1(A[3]),
        .O(\xsqr[21]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[21]_i_31 
       (.I0(A[8]),
        .I1(A[0]),
        .I2(A[7]),
        .I3(A[1]),
        .O(\xsqr[21]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair967" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[21]_i_32 
       (.I0(A[1]),
        .I1(A[6]),
        .O(\xsqr[21]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair966" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[21]_i_33 
       (.I0(A[0]),
        .I1(A[6]),
        .O(\xsqr[21]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[21]_i_4 
       (.I0(A[5]),
        .I1(A[2]),
        .I2(A[6]),
        .I3(A[1]),
        .I4(A[0]),
        .I5(A[7]),
        .O(\xsqr[21]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[21]_i_5 
       (.I0(A[4]),
        .I1(A[2]),
        .I2(A[5]),
        .I3(A[1]),
        .I4(A[0]),
        .I5(A[6]),
        .O(\xsqr[21]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[21]_i_6 
       (.I0(A[4]),
        .I1(A[1]),
        .I2(A[3]),
        .I3(A[2]),
        .I4(A[0]),
        .I5(A[5]),
        .O(\xsqr[21]_i_6_n_0 ));
  (* HLUTNM = "lutpair5" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[21]_i_7 
       (.I0(A[1]),
        .I1(A[2]),
        .O(\xsqr[21]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'hAC)) 
    \xsqr[21]_i_8 
       (.I0(A[3]),
        .I1(A[2]),
        .I2(A[1]),
        .O(\xsqr[21]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[21]_i_9 
       (.I0(A[0]),
        .I1(A[3]),
        .O(\xsqr[21]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1047" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[22]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[4]),
        .O(\xsqr[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1047" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[23]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[5]),
        .O(\xsqr[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1046" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[24]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[6]),
        .O(\xsqr[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1046" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[25]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[7]),
        .O(\xsqr[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1045" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[26]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[8]),
        .O(\xsqr[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1045" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[27]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[9]),
        .O(\xsqr[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1044" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[28]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[10]),
        .O(\xsqr[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1044" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[29]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[11]),
        .O(\xsqr[29]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[29]_i_10 
       (.I0(\xsqr_reg[21]_i_3_n_15 ),
        .I1(\xsqr_reg[21]_i_2_n_13 ),
        .O(\xsqr[29]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \xsqr[29]_i_11 
       (.I0(\xsqr_reg[21]_i_3_n_9 ),
        .I1(\xsqr_reg[35]_i_13_n_12 ),
        .I2(\xsqr_reg[35]_i_18_n_14 ),
        .I3(\xsqr_reg[35]_i_13_n_11 ),
        .I4(\xsqr_reg[21]_i_3_n_8 ),
        .I5(\xsqr[29]_i_19_n_0 ),
        .O(\xsqr[29]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \xsqr[29]_i_12 
       (.I0(\xsqr_reg[35]_i_18_n_15 ),
        .I1(\xsqr_reg[21]_i_3_n_9 ),
        .I2(\xsqr_reg[35]_i_13_n_12 ),
        .I3(\xsqr_reg[21]_i_3_n_8 ),
        .I4(\xsqr_reg[35]_i_13_n_11 ),
        .I5(\xsqr_reg[35]_i_18_n_14 ),
        .O(\xsqr[29]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \xsqr[29]_i_13 
       (.I0(\xsqr_reg[35]_i_18_n_15 ),
        .I1(\xsqr_reg[35]_i_13_n_12 ),
        .I2(\xsqr_reg[21]_i_3_n_9 ),
        .I3(\xsqr_reg[21]_i_3_n_10 ),
        .I4(\xsqr_reg[21]_i_2_n_8 ),
        .I5(\xsqr_reg[35]_i_13_n_13 ),
        .O(\xsqr[29]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[29]_i_14 
       (.I0(\xsqr[29]_i_6_n_0 ),
        .I1(\xsqr_reg[35]_i_13_n_13 ),
        .I2(\xsqr_reg[21]_i_2_n_8 ),
        .I3(\xsqr_reg[21]_i_3_n_10 ),
        .O(\xsqr[29]_i_14_n_0 ));
  (* HLUTNM = "lutpair8" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[29]_i_15 
       (.I0(\xsqr_reg[35]_i_13_n_14 ),
        .I1(\xsqr_reg[21]_i_2_n_9 ),
        .I2(\xsqr_reg[21]_i_3_n_11 ),
        .I3(\xsqr[29]_i_7_n_0 ),
        .O(\xsqr[29]_i_15_n_0 ));
  (* HLUTNM = "lutpair7" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[29]_i_16 
       (.I0(\xsqr_reg[35]_i_13_n_15 ),
        .I1(\xsqr_reg[21]_i_2_n_10 ),
        .I2(\xsqr_reg[21]_i_3_n_12 ),
        .I3(\xsqr[29]_i_8_n_0 ),
        .O(\xsqr[29]_i_16_n_0 ));
  (* HLUTNM = "lutpair6" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \xsqr[29]_i_17 
       (.I0(\xsqr_reg[21]_i_3_n_13 ),
        .I1(\xsqr_reg[21]_i_2_n_11 ),
        .I2(\xsqr_reg[21]_i_2_n_12 ),
        .I3(\xsqr_reg[21]_i_3_n_14 ),
        .O(\xsqr[29]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \xsqr[29]_i_18 
       (.I0(\xsqr_reg[21]_i_2_n_13 ),
        .I1(\xsqr_reg[21]_i_3_n_15 ),
        .I2(\xsqr_reg[21]_i_2_n_12 ),
        .I3(\xsqr_reg[21]_i_3_n_14 ),
        .O(\xsqr[29]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xsqr[29]_i_19 
       (.I0(\xsqr_reg[35]_i_17_n_15 ),
        .I1(\xsqr_reg[35]_i_13_n_10 ),
        .I2(\xsqr_reg[35]_i_18_n_5 ),
        .O(\xsqr[29]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \xsqr[29]_i_3 
       (.I0(\xsqr_reg[21]_i_3_n_9 ),
        .I1(\xsqr_reg[35]_i_13_n_12 ),
        .I2(\xsqr_reg[35]_i_18_n_14 ),
        .I3(\xsqr_reg[35]_i_13_n_11 ),
        .I4(\xsqr_reg[21]_i_3_n_8 ),
        .O(\xsqr[29]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \xsqr[29]_i_4 
       (.I0(\xsqr_reg[35]_i_18_n_15 ),
        .I1(\xsqr_reg[21]_i_3_n_9 ),
        .I2(\xsqr_reg[35]_i_13_n_12 ),
        .O(\xsqr[29]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xsqr[29]_i_5 
       (.I0(\xsqr_reg[21]_i_3_n_9 ),
        .I1(\xsqr_reg[35]_i_13_n_12 ),
        .I2(\xsqr_reg[35]_i_18_n_15 ),
        .O(\xsqr[29]_i_5_n_0 ));
  (* HLUTNM = "lutpair8" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xsqr[29]_i_6 
       (.I0(\xsqr_reg[35]_i_13_n_14 ),
        .I1(\xsqr_reg[21]_i_2_n_9 ),
        .I2(\xsqr_reg[21]_i_3_n_11 ),
        .O(\xsqr[29]_i_6_n_0 ));
  (* HLUTNM = "lutpair7" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xsqr[29]_i_7 
       (.I0(\xsqr_reg[35]_i_13_n_15 ),
        .I1(\xsqr_reg[21]_i_2_n_10 ),
        .I2(\xsqr_reg[21]_i_3_n_12 ),
        .O(\xsqr[29]_i_7_n_0 ));
  (* HLUTNM = "lutpair6" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[29]_i_8 
       (.I0(\xsqr_reg[21]_i_3_n_13 ),
        .I1(\xsqr_reg[21]_i_2_n_11 ),
        .O(\xsqr[29]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[29]_i_9 
       (.I0(\xsqr_reg[21]_i_3_n_14 ),
        .I1(\xsqr_reg[21]_i_2_n_12 ),
        .O(\xsqr[29]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1055" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[2]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[2]),
        .O(\xsqr[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1043" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[30]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[12]),
        .O(\xsqr[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1043" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[31]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[13]),
        .O(\xsqr[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1042" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[32]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[14]),
        .O(\xsqr[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1042" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[33]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[15]),
        .O(\xsqr[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1041" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[34]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[16]),
        .O(\xsqr[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1041" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[35]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr00_in[17]),
        .O(\xsqr[35]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \xsqr[35]_i_10 
       (.I0(\xsqr[35]_i_5_n_0 ),
        .I1(\xsqr_reg[35]_i_3_n_15 ),
        .I2(\xsqr_reg[35]_i_17_n_4 ),
        .I3(\xsqr_reg[35]_i_13_n_8 ),
        .I4(\xsqr_reg[35]_i_17_n_13 ),
        .O(\xsqr[35]_i_10_n_0 ));
  (* HLUTNM = "lutpair9" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \xsqr[35]_i_11 
       (.I0(\xsqr_reg[35]_i_17_n_14 ),
        .I1(\xsqr_reg[35]_i_13_n_9 ),
        .I2(\xsqr_reg[35]_i_17_n_13 ),
        .I3(\xsqr_reg[35]_i_13_n_8 ),
        .I4(\xsqr[35]_i_6_n_0 ),
        .O(\xsqr[35]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \xsqr[35]_i_12 
       (.I0(\xsqr[35]_i_7_n_0 ),
        .I1(\xsqr_reg[35]_i_17_n_15 ),
        .I2(\xsqr_reg[35]_i_18_n_5 ),
        .I3(\xsqr_reg[35]_i_13_n_10 ),
        .I4(\xsqr_reg[35]_i_17_n_14 ),
        .I5(\xsqr_reg[35]_i_13_n_9 ),
        .O(\xsqr[35]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \xsqr[35]_i_14 
       (.I0(A[7]),
        .I1(A[8]),
        .O(\xsqr[35]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \xsqr[35]_i_15 
       (.I0(A[6]),
        .I1(A[8]),
        .O(\xsqr[35]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[35]_i_16 
       (.I0(A[7]),
        .I1(A[6]),
        .O(\xsqr[35]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hF7777000)) 
    \xsqr[35]_i_19 
       (.I0(A[8]),
        .I1(A[4]),
        .I2(A[7]),
        .I3(A[5]),
        .I4(A[6]),
        .O(\xsqr[35]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[35]_i_20 
       (.I0(A[8]),
        .I1(A[3]),
        .I2(A[7]),
        .I3(A[4]),
        .I4(A[5]),
        .I5(A[6]),
        .O(\xsqr[35]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[35]_i_21 
       (.I0(A[8]),
        .I1(A[2]),
        .I2(A[7]),
        .I3(A[3]),
        .I4(A[4]),
        .I5(A[6]),
        .O(\xsqr[35]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[35]_i_22 
       (.I0(A[8]),
        .I1(A[1]),
        .I2(A[7]),
        .I3(A[2]),
        .I4(A[3]),
        .I5(A[6]),
        .O(\xsqr[35]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h7000)) 
    \xsqr[35]_i_23 
       (.I0(A[8]),
        .I1(A[0]),
        .I2(A[7]),
        .I3(A[1]),
        .O(\xsqr[35]_i_23_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[35]_i_24 
       (.I0(A[1]),
        .I1(A[6]),
        .O(\xsqr[35]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'h8E11F555)) 
    \xsqr[35]_i_25 
       (.I0(A[6]),
        .I1(A[7]),
        .I2(A[4]),
        .I3(A[8]),
        .I4(A[5]),
        .O(\xsqr[35]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hEB843C0C903FCF3F)) 
    \xsqr[35]_i_26 
       (.I0(A[3]),
        .I1(A[5]),
        .I2(A[7]),
        .I3(A[4]),
        .I4(A[8]),
        .I5(A[6]),
        .O(\xsqr[35]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h7F07070780F8F8F8)) 
    \xsqr[35]_i_27 
       (.I0(A[6]),
        .I1(A[4]),
        .I2(\xsqr[35]_i_43_n_0 ),
        .I3(A[2]),
        .I4(A[8]),
        .I5(\xsqr[35]_i_44_n_0 ),
        .O(\xsqr[35]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A956A956A95)) 
    \xsqr[35]_i_28 
       (.I0(\xsqr[35]_i_22_n_0 ),
        .I1(A[8]),
        .I2(A[2]),
        .I3(\xsqr[35]_i_43_n_0 ),
        .I4(A[4]),
        .I5(A[6]),
        .O(\xsqr[35]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h69C399C369336933)) 
    \xsqr[35]_i_29 
       (.I0(A[2]),
        .I1(\xsqr[35]_i_45_n_0 ),
        .I2(A[1]),
        .I3(A[7]),
        .I4(A[0]),
        .I5(A[8]),
        .O(\xsqr[35]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xsqr[35]_i_30 
       (.I0(A[1]),
        .I1(A[7]),
        .I2(A[0]),
        .I3(A[8]),
        .I4(A[6]),
        .I5(A[2]),
        .O(\xsqr[35]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xsqr[35]_i_31 
       (.I0(A[6]),
        .I1(A[1]),
        .I2(A[7]),
        .I3(A[0]),
        .O(\xsqr[35]_i_31_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[35]_i_32 
       (.I0(A[0]),
        .I1(A[6]),
        .O(\xsqr[35]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xsqr[35]_i_33 
       (.I0(A[7]),
        .I1(A[5]),
        .I2(A[8]),
        .I3(A[4]),
        .O(\xsqr[35]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[35]_i_34 
       (.I0(A[5]),
        .I1(A[7]),
        .I2(A[4]),
        .I3(A[8]),
        .O(\xsqr[35]_i_34_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[35]_i_35 
       (.I0(A[4]),
        .I1(A[5]),
        .O(\xsqr[35]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \xsqr[35]_i_36 
       (.I0(A[4]),
        .I1(A[7]),
        .I2(A[8]),
        .I3(A[5]),
        .O(\xsqr[35]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \xsqr[35]_i_37 
       (.I0(A[6]),
        .I1(A[3]),
        .I2(A[8]),
        .I3(A[4]),
        .I4(A[7]),
        .I5(A[5]),
        .O(\xsqr[35]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'hD22287772DDD8777)) 
    \xsqr[35]_i_38 
       (.I0(A[4]),
        .I1(A[7]),
        .I2(A[3]),
        .I3(A[8]),
        .I4(A[5]),
        .I5(A[6]),
        .O(\xsqr[35]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xsqr[35]_i_39 
       (.I0(A[7]),
        .I1(A[2]),
        .I2(A[8]),
        .I3(A[1]),
        .O(\xsqr[35]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \xsqr[35]_i_4 
       (.I0(\xsqr_reg[35]_i_17_n_13 ),
        .I1(\xsqr_reg[35]_i_13_n_8 ),
        .I2(\xsqr_reg[35]_i_17_n_4 ),
        .I3(\xsqr_reg[35]_i_3_n_15 ),
        .O(\xsqr[35]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[35]_i_40 
       (.I0(A[2]),
        .I1(A[7]),
        .I2(A[1]),
        .I3(A[8]),
        .O(\xsqr[35]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \xsqr[35]_i_41 
       (.I0(A[1]),
        .I1(A[7]),
        .I2(A[8]),
        .I3(A[2]),
        .O(\xsqr[35]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \xsqr[35]_i_42 
       (.I0(A[6]),
        .I1(A[0]),
        .I2(A[8]),
        .I3(A[1]),
        .I4(A[7]),
        .I5(A[2]),
        .O(\xsqr[35]_i_42_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair997" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[35]_i_43 
       (.I0(A[3]),
        .I1(A[7]),
        .O(\xsqr[35]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xsqr[35]_i_44 
       (.I0(A[6]),
        .I1(A[5]),
        .I2(A[8]),
        .I3(A[3]),
        .I4(A[7]),
        .I5(A[4]),
        .O(\xsqr[35]_i_44_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[35]_i_45 
       (.I0(A[3]),
        .I1(A[6]),
        .O(\xsqr[35]_i_45_n_0 ));
  (* HLUTNM = "lutpair9" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \xsqr[35]_i_5 
       (.I0(\xsqr_reg[35]_i_17_n_14 ),
        .I1(\xsqr_reg[35]_i_13_n_9 ),
        .I2(\xsqr_reg[35]_i_17_n_13 ),
        .I3(\xsqr_reg[35]_i_13_n_8 ),
        .O(\xsqr[35]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \xsqr[35]_i_6 
       (.I0(\xsqr_reg[35]_i_17_n_14 ),
        .I1(\xsqr_reg[35]_i_13_n_9 ),
        .I2(\xsqr_reg[35]_i_17_n_15 ),
        .I3(\xsqr_reg[35]_i_18_n_5 ),
        .I4(\xsqr_reg[35]_i_13_n_10 ),
        .O(\xsqr[35]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \xsqr[35]_i_7 
       (.I0(\xsqr_reg[21]_i_3_n_8 ),
        .I1(\xsqr_reg[35]_i_18_n_14 ),
        .I2(\xsqr_reg[35]_i_13_n_11 ),
        .I3(\xsqr_reg[35]_i_18_n_5 ),
        .I4(\xsqr_reg[35]_i_13_n_10 ),
        .I5(\xsqr_reg[35]_i_17_n_15 ),
        .O(\xsqr[35]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \xsqr[35]_i_8 
       (.I0(\xsqr_reg[35]_i_3_n_15 ),
        .I1(\xsqr_reg[35]_i_17_n_4 ),
        .I2(\xsqr_reg[35]_i_3_n_14 ),
        .I3(\xsqr_reg[35]_i_3_n_13 ),
        .O(\xsqr[35]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \xsqr[35]_i_9 
       (.I0(\xsqr_reg[35]_i_13_n_8 ),
        .I1(\xsqr_reg[35]_i_17_n_13 ),
        .I2(\xsqr_reg[35]_i_3_n_15 ),
        .I3(\xsqr_reg[35]_i_17_n_4 ),
        .I4(\xsqr_reg[35]_i_3_n_14 ),
        .O(\xsqr[35]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair968" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[36]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(\dx_reg_n_0_[18] ),
        .O(\xsqr[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1040" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[38]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[2]),
        .O(\xsqr[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair865" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[39]_i_1 
       (.I0(\xsqr_reg[39]_i_2_n_13 ),
        .I1(\xsqr_reg[39]_i_3_n_15 ),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\xsqr[39]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9666)) 
    \xsqr[39]_i_10 
       (.I0(\xsqr[39]_i_4_n_0 ),
        .I1(\xsqr[39]_i_31_n_0 ),
        .I2(\dx_reg_n_0_[20] ),
        .I3(\dx_reg_n_0_[24] ),
        .O(\xsqr[39]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xsqr[39]_i_11 
       (.I0(\xsqr[39]_i_5_n_0 ),
        .I1(\dx_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[20] ),
        .I3(\xsqr[39]_i_32_n_0 ),
        .I4(\dx_reg_n_0_[18] ),
        .I5(\dx_reg_n_0_[25] ),
        .O(\xsqr[39]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \xsqr[39]_i_12 
       (.I0(\xsqr[39]_i_6_n_0 ),
        .I1(\dx_reg_n_0_[22] ),
        .I2(\dx_reg_n_0_[20] ),
        .I3(\dx_reg_n_0_[23] ),
        .I4(\dx_reg_n_0_[19] ),
        .I5(\xsqr[39]_i_33_n_0 ),
        .O(\xsqr[39]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xsqr[39]_i_13 
       (.I0(\xsqr[39]_i_7_n_0 ),
        .I1(\dx_reg_n_0_[22] ),
        .I2(\dx_reg_n_0_[19] ),
        .I3(\xsqr[39]_i_21_n_0 ),
        .I4(\dx_reg_n_0_[18] ),
        .I5(\dx_reg_n_0_[23] ),
        .O(\xsqr[39]_i_13_n_0 ));
  (* HLUTNM = "lutpair10" *) 
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \xsqr[39]_i_14 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dx_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[21] ),
        .I3(\dx_reg_n_0_[22] ),
        .I4(\dx_reg_n_0_[18] ),
        .O(\xsqr[39]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[39]_i_15 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[18] ),
        .O(\xsqr[39]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[39]_i_16 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dx_reg_n_0_[18] ),
        .O(\xsqr[39]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[39]_i_17 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[25] ),
        .O(\xsqr[39]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[39]_i_18 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[24] ),
        .O(\xsqr[39]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[39]_i_19 
       (.I0(\dx_reg_n_0_[20] ),
        .I1(\dx_reg_n_0_[23] ),
        .O(\xsqr[39]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h956A6A6A)) 
    \xsqr[39]_i_20 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dx_reg_n_0_[23] ),
        .I3(\dx_reg_n_0_[20] ),
        .I4(\dx_reg_n_0_[22] ),
        .O(\xsqr[39]_i_20_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[39]_i_21 
       (.I0(\dx_reg_n_0_[20] ),
        .I1(\dx_reg_n_0_[21] ),
        .O(\xsqr[39]_i_21_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[39]_i_22 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dx_reg_n_0_[21] ),
        .O(\xsqr[39]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \xsqr[39]_i_23 
       (.I0(\dx_reg_n_0_[22] ),
        .I1(\dx_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[24] ),
        .I3(\dx_reg_n_0_[25] ),
        .I4(\dx_reg_n_0_[21] ),
        .O(\xsqr[39]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[39]_i_24 
       (.I0(\dx_reg_n_0_[24] ),
        .I1(\dx_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[21] ),
        .O(\xsqr[39]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[39]_i_25 
       (.I0(\dx_reg_n_0_[22] ),
        .I1(\dx_reg_n_0_[21] ),
        .O(\xsqr[39]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h17A08800)) 
    \xsqr[39]_i_26 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dx_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[23] ),
        .I4(\dx_reg_n_0_[20] ),
        .O(\xsqr[39]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h663C963C66CC66CC)) 
    \xsqr[39]_i_27 
       (.I0(\dx_reg_n_0_[20] ),
        .I1(\dx_reg_n_0_[21] ),
        .I2(\dx_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[22] ),
        .I4(\dx_reg_n_0_[18] ),
        .I5(\dx_reg_n_0_[23] ),
        .O(\xsqr[39]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xsqr[39]_i_28 
       (.I0(\dx_reg_n_0_[18] ),
        .I1(\dx_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[22] ),
        .I4(\dx_reg_n_0_[21] ),
        .I5(\dx_reg_n_0_[20] ),
        .O(\xsqr[39]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xsqr[39]_i_29 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dx_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[18] ),
        .O(\xsqr[39]_i_29_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[39]_i_30 
       (.I0(\dx_reg_n_0_[18] ),
        .I1(\dx_reg_n_0_[21] ),
        .O(\xsqr[39]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[39]_i_31 
       (.I0(\dx_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[18] ),
        .I2(\dx_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[19] ),
        .O(\xsqr[39]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair969" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[39]_i_32 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dx_reg_n_0_[24] ),
        .O(\xsqr[39]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair968" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[39]_i_33 
       (.I0(\dx_reg_n_0_[18] ),
        .I1(\dx_reg_n_0_[24] ),
        .O(\xsqr[39]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[39]_i_4 
       (.I0(\dx_reg_n_0_[23] ),
        .I1(\dx_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[24] ),
        .I3(\dx_reg_n_0_[19] ),
        .I4(\dx_reg_n_0_[18] ),
        .I5(\dx_reg_n_0_[25] ),
        .O(\xsqr[39]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[39]_i_5 
       (.I0(\dx_reg_n_0_[22] ),
        .I1(\dx_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[23] ),
        .I3(\dx_reg_n_0_[19] ),
        .I4(\dx_reg_n_0_[18] ),
        .I5(\dx_reg_n_0_[24] ),
        .O(\xsqr[39]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[39]_i_6 
       (.I0(\dx_reg_n_0_[22] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dx_reg_n_0_[21] ),
        .I3(\dx_reg_n_0_[20] ),
        .I4(\dx_reg_n_0_[18] ),
        .I5(\dx_reg_n_0_[23] ),
        .O(\xsqr[39]_i_6_n_0 ));
  (* HLUTNM = "lutpair10" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[39]_i_7 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dx_reg_n_0_[20] ),
        .O(\xsqr[39]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'hAC)) 
    \xsqr[39]_i_8 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[19] ),
        .O(\xsqr[39]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[39]_i_9 
       (.I0(\dx_reg_n_0_[18] ),
        .I1(\dx_reg_n_0_[21] ),
        .O(\xsqr[39]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair866" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[3]_i_1 
       (.I0(\xsqr_reg[3]_i_2_n_13 ),
        .I1(\xsqr_reg[3]_i_3_n_15 ),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\xsqr[3]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9666)) 
    \xsqr[3]_i_10 
       (.I0(\xsqr[3]_i_4_n_0 ),
        .I1(\xsqr[3]_i_31_n_0 ),
        .I2(\dx_reg_n_0_[2] ),
        .I3(\dx_reg_n_0_[6] ),
        .O(\xsqr[3]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xsqr[3]_i_11 
       (.I0(\xsqr[3]_i_5_n_0 ),
        .I1(\dx_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[2] ),
        .I3(\xsqr[3]_i_32_n_0 ),
        .I4(\dx_reg_n_0_[0] ),
        .I5(\dx_reg_n_0_[7] ),
        .O(\xsqr[3]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \xsqr[3]_i_12 
       (.I0(\xsqr[3]_i_6_n_0 ),
        .I1(\dx_reg_n_0_[4] ),
        .I2(\dx_reg_n_0_[2] ),
        .I3(\dx_reg_n_0_[5] ),
        .I4(\dx_reg_n_0_[1] ),
        .I5(\xsqr[3]_i_33_n_0 ),
        .O(\xsqr[3]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xsqr[3]_i_13 
       (.I0(\xsqr[3]_i_7_n_0 ),
        .I1(\dx_reg_n_0_[4] ),
        .I2(\dx_reg_n_0_[1] ),
        .I3(\xsqr[3]_i_21_n_0 ),
        .I4(\dx_reg_n_0_[0] ),
        .I5(\dx_reg_n_0_[5] ),
        .O(\xsqr[3]_i_13_n_0 ));
  (* HLUTNM = "lutpair0" *) 
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \xsqr[3]_i_14 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dx_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[3] ),
        .I3(\dx_reg_n_0_[4] ),
        .I4(\dx_reg_n_0_[0] ),
        .O(\xsqr[3]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[3]_i_15 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[0] ),
        .O(\xsqr[3]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[3]_i_16 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dx_reg_n_0_[0] ),
        .O(\xsqr[3]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[3]_i_17 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[7] ),
        .O(\xsqr[3]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[3]_i_18 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[6] ),
        .O(\xsqr[3]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[3]_i_19 
       (.I0(\dx_reg_n_0_[2] ),
        .I1(\dx_reg_n_0_[5] ),
        .O(\xsqr[3]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h956A6A6A)) 
    \xsqr[3]_i_20 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dx_reg_n_0_[5] ),
        .I3(\dx_reg_n_0_[2] ),
        .I4(\dx_reg_n_0_[4] ),
        .O(\xsqr[3]_i_20_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[3]_i_21 
       (.I0(\dx_reg_n_0_[2] ),
        .I1(\dx_reg_n_0_[3] ),
        .O(\xsqr[3]_i_21_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[3]_i_22 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dx_reg_n_0_[3] ),
        .O(\xsqr[3]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \xsqr[3]_i_23 
       (.I0(\dx_reg_n_0_[4] ),
        .I1(\dx_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[6] ),
        .I3(\dx_reg_n_0_[7] ),
        .I4(\dx_reg_n_0_[3] ),
        .O(\xsqr[3]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[3]_i_24 
       (.I0(\dx_reg_n_0_[6] ),
        .I1(\dx_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[3] ),
        .O(\xsqr[3]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[3]_i_25 
       (.I0(\dx_reg_n_0_[4] ),
        .I1(\dx_reg_n_0_[3] ),
        .O(\xsqr[3]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h17A08800)) 
    \xsqr[3]_i_26 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dx_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[5] ),
        .I4(\dx_reg_n_0_[2] ),
        .O(\xsqr[3]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h663C963C66CC66CC)) 
    \xsqr[3]_i_27 
       (.I0(\dx_reg_n_0_[2] ),
        .I1(\dx_reg_n_0_[3] ),
        .I2(\dx_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[4] ),
        .I4(\dx_reg_n_0_[0] ),
        .I5(\dx_reg_n_0_[5] ),
        .O(\xsqr[3]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xsqr[3]_i_28 
       (.I0(\dx_reg_n_0_[0] ),
        .I1(\dx_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[4] ),
        .I4(\dx_reg_n_0_[3] ),
        .I5(\dx_reg_n_0_[2] ),
        .O(\xsqr[3]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xsqr[3]_i_29 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dx_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[0] ),
        .O(\xsqr[3]_i_29_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[3]_i_30 
       (.I0(\dx_reg_n_0_[0] ),
        .I1(\dx_reg_n_0_[3] ),
        .O(\xsqr[3]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[3]_i_31 
       (.I0(\dx_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[0] ),
        .I2(\dx_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[1] ),
        .O(\xsqr[3]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair965" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[3]_i_32 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dx_reg_n_0_[6] ),
        .O(\xsqr[3]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair964" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[3]_i_33 
       (.I0(\dx_reg_n_0_[0] ),
        .I1(\dx_reg_n_0_[6] ),
        .O(\xsqr[3]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[3]_i_4 
       (.I0(\dx_reg_n_0_[5] ),
        .I1(\dx_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[6] ),
        .I3(\dx_reg_n_0_[1] ),
        .I4(\dx_reg_n_0_[0] ),
        .I5(\dx_reg_n_0_[7] ),
        .O(\xsqr[3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[3]_i_5 
       (.I0(\dx_reg_n_0_[4] ),
        .I1(\dx_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[5] ),
        .I3(\dx_reg_n_0_[1] ),
        .I4(\dx_reg_n_0_[0] ),
        .I5(\dx_reg_n_0_[6] ),
        .O(\xsqr[3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[3]_i_6 
       (.I0(\dx_reg_n_0_[4] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dx_reg_n_0_[3] ),
        .I3(\dx_reg_n_0_[2] ),
        .I4(\dx_reg_n_0_[0] ),
        .I5(\dx_reg_n_0_[5] ),
        .O(\xsqr[3]_i_6_n_0 ));
  (* HLUTNM = "lutpair0" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[3]_i_7 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dx_reg_n_0_[2] ),
        .O(\xsqr[3]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'hAC)) 
    \xsqr[3]_i_8 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[1] ),
        .O(\xsqr[3]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[3]_i_9 
       (.I0(\dx_reg_n_0_[0] ),
        .I1(\dx_reg_n_0_[3] ),
        .O(\xsqr[3]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1040" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[40]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[4]),
        .O(\xsqr[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1039" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[41]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[5]),
        .O(\xsqr[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1039" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[42]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[6]),
        .O(\xsqr[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1038" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[43]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[7]),
        .O(\xsqr[43]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1038" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[44]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[8]),
        .O(\xsqr[44]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1037" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[45]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[9]),
        .O(\xsqr[45]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1037" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[46]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[10]),
        .O(\xsqr[46]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1036" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[47]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[11]),
        .O(\xsqr[47]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[47]_i_10 
       (.I0(\xsqr_reg[39]_i_3_n_15 ),
        .I1(\xsqr_reg[39]_i_2_n_13 ),
        .O(\xsqr[47]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \xsqr[47]_i_11 
       (.I0(\xsqr_reg[39]_i_3_n_9 ),
        .I1(\xsqr_reg[53]_i_13_n_12 ),
        .I2(\xsqr_reg[53]_i_18_n_14 ),
        .I3(\xsqr_reg[53]_i_13_n_11 ),
        .I4(\xsqr_reg[39]_i_3_n_8 ),
        .I5(\xsqr[47]_i_19_n_0 ),
        .O(\xsqr[47]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \xsqr[47]_i_12 
       (.I0(\xsqr_reg[53]_i_18_n_15 ),
        .I1(\xsqr_reg[39]_i_3_n_9 ),
        .I2(\xsqr_reg[53]_i_13_n_12 ),
        .I3(\xsqr_reg[39]_i_3_n_8 ),
        .I4(\xsqr_reg[53]_i_13_n_11 ),
        .I5(\xsqr_reg[53]_i_18_n_14 ),
        .O(\xsqr[47]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \xsqr[47]_i_13 
       (.I0(\xsqr_reg[53]_i_18_n_15 ),
        .I1(\xsqr_reg[53]_i_13_n_12 ),
        .I2(\xsqr_reg[39]_i_3_n_9 ),
        .I3(\xsqr_reg[39]_i_3_n_10 ),
        .I4(\xsqr_reg[39]_i_2_n_8 ),
        .I5(\xsqr_reg[53]_i_13_n_13 ),
        .O(\xsqr[47]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[47]_i_14 
       (.I0(\xsqr[47]_i_6_n_0 ),
        .I1(\xsqr_reg[53]_i_13_n_13 ),
        .I2(\xsqr_reg[39]_i_2_n_8 ),
        .I3(\xsqr_reg[39]_i_3_n_10 ),
        .O(\xsqr[47]_i_14_n_0 ));
  (* HLUTNM = "lutpair13" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[47]_i_15 
       (.I0(\xsqr_reg[53]_i_13_n_14 ),
        .I1(\xsqr_reg[39]_i_2_n_9 ),
        .I2(\xsqr_reg[39]_i_3_n_11 ),
        .I3(\xsqr[47]_i_7_n_0 ),
        .O(\xsqr[47]_i_15_n_0 ));
  (* HLUTNM = "lutpair12" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[47]_i_16 
       (.I0(\xsqr_reg[53]_i_13_n_15 ),
        .I1(\xsqr_reg[39]_i_2_n_10 ),
        .I2(\xsqr_reg[39]_i_3_n_12 ),
        .I3(\xsqr[47]_i_8_n_0 ),
        .O(\xsqr[47]_i_16_n_0 ));
  (* HLUTNM = "lutpair11" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \xsqr[47]_i_17 
       (.I0(\xsqr_reg[39]_i_3_n_13 ),
        .I1(\xsqr_reg[39]_i_2_n_11 ),
        .I2(\xsqr_reg[39]_i_2_n_12 ),
        .I3(\xsqr_reg[39]_i_3_n_14 ),
        .O(\xsqr[47]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \xsqr[47]_i_18 
       (.I0(\xsqr_reg[39]_i_2_n_13 ),
        .I1(\xsqr_reg[39]_i_3_n_15 ),
        .I2(\xsqr_reg[39]_i_2_n_12 ),
        .I3(\xsqr_reg[39]_i_3_n_14 ),
        .O(\xsqr[47]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xsqr[47]_i_19 
       (.I0(\xsqr_reg[53]_i_17_n_15 ),
        .I1(\xsqr_reg[53]_i_13_n_10 ),
        .I2(\xsqr_reg[53]_i_18_n_5 ),
        .O(\xsqr[47]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \xsqr[47]_i_3 
       (.I0(\xsqr_reg[39]_i_3_n_9 ),
        .I1(\xsqr_reg[53]_i_13_n_12 ),
        .I2(\xsqr_reg[53]_i_18_n_14 ),
        .I3(\xsqr_reg[53]_i_13_n_11 ),
        .I4(\xsqr_reg[39]_i_3_n_8 ),
        .O(\xsqr[47]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \xsqr[47]_i_4 
       (.I0(\xsqr_reg[53]_i_18_n_15 ),
        .I1(\xsqr_reg[39]_i_3_n_9 ),
        .I2(\xsqr_reg[53]_i_13_n_12 ),
        .O(\xsqr[47]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xsqr[47]_i_5 
       (.I0(\xsqr_reg[39]_i_3_n_9 ),
        .I1(\xsqr_reg[53]_i_13_n_12 ),
        .I2(\xsqr_reg[53]_i_18_n_15 ),
        .O(\xsqr[47]_i_5_n_0 ));
  (* HLUTNM = "lutpair13" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xsqr[47]_i_6 
       (.I0(\xsqr_reg[53]_i_13_n_14 ),
        .I1(\xsqr_reg[39]_i_2_n_9 ),
        .I2(\xsqr_reg[39]_i_3_n_11 ),
        .O(\xsqr[47]_i_6_n_0 ));
  (* HLUTNM = "lutpair12" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xsqr[47]_i_7 
       (.I0(\xsqr_reg[53]_i_13_n_15 ),
        .I1(\xsqr_reg[39]_i_2_n_10 ),
        .I2(\xsqr_reg[39]_i_3_n_12 ),
        .O(\xsqr[47]_i_7_n_0 ));
  (* HLUTNM = "lutpair11" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[47]_i_8 
       (.I0(\xsqr_reg[39]_i_3_n_13 ),
        .I1(\xsqr_reg[39]_i_2_n_11 ),
        .O(\xsqr[47]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[47]_i_9 
       (.I0(\xsqr_reg[39]_i_3_n_14 ),
        .I1(\xsqr_reg[39]_i_2_n_12 ),
        .O(\xsqr[47]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1036" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[48]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[12]),
        .O(\xsqr[48]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1035" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[49]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[13]),
        .O(\xsqr[49]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1055" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[4]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[4]),
        .O(\xsqr[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1035" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[50]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[14]),
        .O(\xsqr[50]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1034" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[51]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[15]),
        .O(\xsqr[51]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1034" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[52]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[16]),
        .O(\xsqr[52]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1033" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[53]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr01_in[17]),
        .O(\xsqr[53]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \xsqr[53]_i_10 
       (.I0(\xsqr[53]_i_5_n_0 ),
        .I1(\xsqr_reg[53]_i_3_n_15 ),
        .I2(\xsqr_reg[53]_i_17_n_4 ),
        .I3(\xsqr_reg[53]_i_13_n_8 ),
        .I4(\xsqr_reg[53]_i_17_n_13 ),
        .O(\xsqr[53]_i_10_n_0 ));
  (* HLUTNM = "lutpair14" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \xsqr[53]_i_11 
       (.I0(\xsqr_reg[53]_i_17_n_14 ),
        .I1(\xsqr_reg[53]_i_13_n_9 ),
        .I2(\xsqr_reg[53]_i_17_n_13 ),
        .I3(\xsqr_reg[53]_i_13_n_8 ),
        .I4(\xsqr[53]_i_6_n_0 ),
        .O(\xsqr[53]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \xsqr[53]_i_12 
       (.I0(\xsqr[53]_i_7_n_0 ),
        .I1(\xsqr_reg[53]_i_17_n_15 ),
        .I2(\xsqr_reg[53]_i_18_n_5 ),
        .I3(\xsqr_reg[53]_i_13_n_10 ),
        .I4(\xsqr_reg[53]_i_17_n_14 ),
        .I5(\xsqr_reg[53]_i_13_n_9 ),
        .O(\xsqr[53]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \xsqr[53]_i_14 
       (.I0(\dx_reg_n_0_[25] ),
        .I1(\dx_reg_n_0_[26] ),
        .O(\xsqr[53]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \xsqr[53]_i_15 
       (.I0(\dx_reg_n_0_[24] ),
        .I1(\dx_reg_n_0_[26] ),
        .O(\xsqr[53]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[53]_i_16 
       (.I0(\dx_reg_n_0_[25] ),
        .I1(\dx_reg_n_0_[24] ),
        .O(\xsqr[53]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hF7777000)) 
    \xsqr[53]_i_19 
       (.I0(\dx_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[22] ),
        .I2(\dx_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[23] ),
        .I4(\dx_reg_n_0_[24] ),
        .O(\xsqr[53]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[53]_i_20 
       (.I0(\dx_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[21] ),
        .I2(\dx_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[22] ),
        .I4(\dx_reg_n_0_[23] ),
        .I5(\dx_reg_n_0_[24] ),
        .O(\xsqr[53]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[53]_i_21 
       (.I0(\dx_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[21] ),
        .I4(\dx_reg_n_0_[22] ),
        .I5(\dx_reg_n_0_[24] ),
        .O(\xsqr[53]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[53]_i_22 
       (.I0(\dx_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dx_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[20] ),
        .I4(\dx_reg_n_0_[21] ),
        .I5(\dx_reg_n_0_[24] ),
        .O(\xsqr[53]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h7000)) 
    \xsqr[53]_i_23 
       (.I0(\dx_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[18] ),
        .I2(\dx_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[19] ),
        .O(\xsqr[53]_i_23_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[53]_i_24 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dx_reg_n_0_[24] ),
        .O(\xsqr[53]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'h8E11F555)) 
    \xsqr[53]_i_25 
       (.I0(\dx_reg_n_0_[24] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dx_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[26] ),
        .I4(\dx_reg_n_0_[23] ),
        .O(\xsqr[53]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hEB843C0C903FCF3F)) 
    \xsqr[53]_i_26 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[22] ),
        .I4(\dx_reg_n_0_[26] ),
        .I5(\dx_reg_n_0_[24] ),
        .O(\xsqr[53]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h7F07070780F8F8F8)) 
    \xsqr[53]_i_27 
       (.I0(\dx_reg_n_0_[24] ),
        .I1(\dx_reg_n_0_[22] ),
        .I2(\xsqr[53]_i_43_n_0 ),
        .I3(\dx_reg_n_0_[20] ),
        .I4(\dx_reg_n_0_[26] ),
        .I5(\xsqr[53]_i_44_n_0 ),
        .O(\xsqr[53]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A956A956A95)) 
    \xsqr[53]_i_28 
       (.I0(\xsqr[53]_i_22_n_0 ),
        .I1(\dx_reg_n_0_[26] ),
        .I2(\dx_reg_n_0_[20] ),
        .I3(\xsqr[53]_i_43_n_0 ),
        .I4(\dx_reg_n_0_[22] ),
        .I5(\dx_reg_n_0_[24] ),
        .O(\xsqr[53]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h69C399C369336933)) 
    \xsqr[53]_i_29 
       (.I0(\dx_reg_n_0_[20] ),
        .I1(\xsqr[53]_i_45_n_0 ),
        .I2(\dx_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[25] ),
        .I4(\dx_reg_n_0_[18] ),
        .I5(\dx_reg_n_0_[26] ),
        .O(\xsqr[53]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xsqr[53]_i_30 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dx_reg_n_0_[18] ),
        .I3(\dx_reg_n_0_[26] ),
        .I4(\dx_reg_n_0_[24] ),
        .I5(\dx_reg_n_0_[20] ),
        .O(\xsqr[53]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xsqr[53]_i_31 
       (.I0(\dx_reg_n_0_[24] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dx_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[18] ),
        .O(\xsqr[53]_i_31_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[53]_i_32 
       (.I0(\dx_reg_n_0_[18] ),
        .I1(\dx_reg_n_0_[24] ),
        .O(\xsqr[53]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xsqr[53]_i_33 
       (.I0(\dx_reg_n_0_[25] ),
        .I1(\dx_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[26] ),
        .I3(\dx_reg_n_0_[22] ),
        .O(\xsqr[53]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[53]_i_34 
       (.I0(\dx_reg_n_0_[23] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dx_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[26] ),
        .O(\xsqr[53]_i_34_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[53]_i_35 
       (.I0(\dx_reg_n_0_[22] ),
        .I1(\dx_reg_n_0_[23] ),
        .O(\xsqr[53]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \xsqr[53]_i_36 
       (.I0(\dx_reg_n_0_[22] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dx_reg_n_0_[26] ),
        .I3(\dx_reg_n_0_[23] ),
        .O(\xsqr[53]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \xsqr[53]_i_37 
       (.I0(\dx_reg_n_0_[24] ),
        .I1(\dx_reg_n_0_[21] ),
        .I2(\dx_reg_n_0_[26] ),
        .I3(\dx_reg_n_0_[22] ),
        .I4(\dx_reg_n_0_[25] ),
        .I5(\dx_reg_n_0_[23] ),
        .O(\xsqr[53]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'hD22287772DDD8777)) 
    \xsqr[53]_i_38 
       (.I0(\dx_reg_n_0_[22] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dx_reg_n_0_[21] ),
        .I3(\dx_reg_n_0_[26] ),
        .I4(\dx_reg_n_0_[23] ),
        .I5(\dx_reg_n_0_[24] ),
        .O(\xsqr[53]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xsqr[53]_i_39 
       (.I0(\dx_reg_n_0_[25] ),
        .I1(\dx_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[26] ),
        .I3(\dx_reg_n_0_[19] ),
        .O(\xsqr[53]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \xsqr[53]_i_4 
       (.I0(\xsqr_reg[53]_i_17_n_13 ),
        .I1(\xsqr_reg[53]_i_13_n_8 ),
        .I2(\xsqr_reg[53]_i_17_n_4 ),
        .I3(\xsqr_reg[53]_i_3_n_15 ),
        .O(\xsqr[53]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[53]_i_40 
       (.I0(\dx_reg_n_0_[20] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dx_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[26] ),
        .O(\xsqr[53]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \xsqr[53]_i_41 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dx_reg_n_0_[26] ),
        .I3(\dx_reg_n_0_[20] ),
        .O(\xsqr[53]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \xsqr[53]_i_42 
       (.I0(\dx_reg_n_0_[24] ),
        .I1(\dx_reg_n_0_[18] ),
        .I2(\dx_reg_n_0_[26] ),
        .I3(\dx_reg_n_0_[19] ),
        .I4(\dx_reg_n_0_[25] ),
        .I5(\dx_reg_n_0_[20] ),
        .O(\xsqr[53]_i_42_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1004" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[53]_i_43 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[25] ),
        .O(\xsqr[53]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xsqr[53]_i_44 
       (.I0(\dx_reg_n_0_[24] ),
        .I1(\dx_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[26] ),
        .I3(\dx_reg_n_0_[21] ),
        .I4(\dx_reg_n_0_[25] ),
        .I5(\dx_reg_n_0_[22] ),
        .O(\xsqr[53]_i_44_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[53]_i_45 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[24] ),
        .O(\xsqr[53]_i_45_n_0 ));
  (* HLUTNM = "lutpair14" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \xsqr[53]_i_5 
       (.I0(\xsqr_reg[53]_i_17_n_14 ),
        .I1(\xsqr_reg[53]_i_13_n_9 ),
        .I2(\xsqr_reg[53]_i_17_n_13 ),
        .I3(\xsqr_reg[53]_i_13_n_8 ),
        .O(\xsqr[53]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \xsqr[53]_i_6 
       (.I0(\xsqr_reg[53]_i_17_n_14 ),
        .I1(\xsqr_reg[53]_i_13_n_9 ),
        .I2(\xsqr_reg[53]_i_17_n_15 ),
        .I3(\xsqr_reg[53]_i_18_n_5 ),
        .I4(\xsqr_reg[53]_i_13_n_10 ),
        .O(\xsqr[53]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \xsqr[53]_i_7 
       (.I0(\xsqr_reg[39]_i_3_n_8 ),
        .I1(\xsqr_reg[53]_i_18_n_14 ),
        .I2(\xsqr_reg[53]_i_13_n_11 ),
        .I3(\xsqr_reg[53]_i_18_n_5 ),
        .I4(\xsqr_reg[53]_i_13_n_10 ),
        .I5(\xsqr_reg[53]_i_17_n_15 ),
        .O(\xsqr[53]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \xsqr[53]_i_8 
       (.I0(\xsqr_reg[53]_i_3_n_15 ),
        .I1(\xsqr_reg[53]_i_17_n_4 ),
        .I2(\xsqr_reg[53]_i_3_n_14 ),
        .I3(\xsqr_reg[53]_i_3_n_13 ),
        .O(\xsqr[53]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \xsqr[53]_i_9 
       (.I0(\xsqr_reg[53]_i_13_n_8 ),
        .I1(\xsqr_reg[53]_i_17_n_13 ),
        .I2(\xsqr_reg[53]_i_3_n_15 ),
        .I3(\xsqr_reg[53]_i_17_n_4 ),
        .I4(\xsqr_reg[53]_i_3_n_14 ),
        .O(\xsqr[53]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair970" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[54]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(\dx_reg_n_0_[27] ),
        .O(\xsqr[54]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1033" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[56]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[2]),
        .O(\xsqr[56]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair865" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[57]_i_1 
       (.I0(\xsqr_reg[57]_i_2_n_13 ),
        .I1(\xsqr_reg[57]_i_3_n_15 ),
        .I2(stateScore_reg_rep__12_n_0),
        .O(\xsqr[57]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9666)) 
    \xsqr[57]_i_10 
       (.I0(\xsqr[57]_i_4_n_0 ),
        .I1(\xsqr[57]_i_31_n_0 ),
        .I2(\dx_reg_n_0_[29] ),
        .I3(\dx_reg_n_0_[33] ),
        .O(\xsqr[57]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xsqr[57]_i_11 
       (.I0(\xsqr[57]_i_5_n_0 ),
        .I1(\dx_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[29] ),
        .I3(\xsqr[57]_i_32_n_0 ),
        .I4(\dx_reg_n_0_[27] ),
        .I5(\dx_reg_n_0_[34] ),
        .O(\xsqr[57]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \xsqr[57]_i_12 
       (.I0(\xsqr[57]_i_6_n_0 ),
        .I1(\dx_reg_n_0_[31] ),
        .I2(\dx_reg_n_0_[29] ),
        .I3(\dx_reg_n_0_[32] ),
        .I4(\dx_reg_n_0_[28] ),
        .I5(\xsqr[57]_i_33_n_0 ),
        .O(\xsqr[57]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xsqr[57]_i_13 
       (.I0(\xsqr[57]_i_7_n_0 ),
        .I1(\dx_reg_n_0_[31] ),
        .I2(\dx_reg_n_0_[28] ),
        .I3(\xsqr[57]_i_21_n_0 ),
        .I4(\dx_reg_n_0_[27] ),
        .I5(\dx_reg_n_0_[32] ),
        .O(\xsqr[57]_i_13_n_0 ));
  (* HLUTNM = "lutpair15" *) 
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \xsqr[57]_i_14 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dx_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[30] ),
        .I3(\dx_reg_n_0_[31] ),
        .I4(\dx_reg_n_0_[27] ),
        .O(\xsqr[57]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[57]_i_15 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[27] ),
        .O(\xsqr[57]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[57]_i_16 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dx_reg_n_0_[27] ),
        .O(\xsqr[57]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[57]_i_17 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[34] ),
        .O(\xsqr[57]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[57]_i_18 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[33] ),
        .O(\xsqr[57]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[57]_i_19 
       (.I0(\dx_reg_n_0_[29] ),
        .I1(\dx_reg_n_0_[32] ),
        .O(\xsqr[57]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h956A6A6A)) 
    \xsqr[57]_i_20 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dx_reg_n_0_[32] ),
        .I3(\dx_reg_n_0_[29] ),
        .I4(\dx_reg_n_0_[31] ),
        .O(\xsqr[57]_i_20_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[57]_i_21 
       (.I0(\dx_reg_n_0_[29] ),
        .I1(\dx_reg_n_0_[30] ),
        .O(\xsqr[57]_i_21_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[57]_i_22 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dx_reg_n_0_[30] ),
        .O(\xsqr[57]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \xsqr[57]_i_23 
       (.I0(\dx_reg_n_0_[31] ),
        .I1(\dx_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[33] ),
        .I3(\dx_reg_n_0_[34] ),
        .I4(\dx_reg_n_0_[30] ),
        .O(\xsqr[57]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[57]_i_24 
       (.I0(\dx_reg_n_0_[33] ),
        .I1(\dx_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[30] ),
        .O(\xsqr[57]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[57]_i_25 
       (.I0(\dx_reg_n_0_[31] ),
        .I1(\dx_reg_n_0_[30] ),
        .O(\xsqr[57]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h17A08800)) 
    \xsqr[57]_i_26 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dx_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[32] ),
        .I4(\dx_reg_n_0_[29] ),
        .O(\xsqr[57]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h663C963C66CC66CC)) 
    \xsqr[57]_i_27 
       (.I0(\dx_reg_n_0_[29] ),
        .I1(\dx_reg_n_0_[30] ),
        .I2(\dx_reg_n_0_[28] ),
        .I3(\dx_reg_n_0_[31] ),
        .I4(\dx_reg_n_0_[27] ),
        .I5(\dx_reg_n_0_[32] ),
        .O(\xsqr[57]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xsqr[57]_i_28 
       (.I0(\dx_reg_n_0_[27] ),
        .I1(\dx_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[28] ),
        .I3(\dx_reg_n_0_[31] ),
        .I4(\dx_reg_n_0_[30] ),
        .I5(\dx_reg_n_0_[29] ),
        .O(\xsqr[57]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xsqr[57]_i_29 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dx_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[27] ),
        .O(\xsqr[57]_i_29_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[57]_i_30 
       (.I0(\dx_reg_n_0_[27] ),
        .I1(\dx_reg_n_0_[30] ),
        .O(\xsqr[57]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[57]_i_31 
       (.I0(\dx_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[27] ),
        .I2(\dx_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[28] ),
        .O(\xsqr[57]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair971" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[57]_i_32 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dx_reg_n_0_[33] ),
        .O(\xsqr[57]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair970" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[57]_i_33 
       (.I0(\dx_reg_n_0_[27] ),
        .I1(\dx_reg_n_0_[33] ),
        .O(\xsqr[57]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[57]_i_4 
       (.I0(\dx_reg_n_0_[32] ),
        .I1(\dx_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[33] ),
        .I3(\dx_reg_n_0_[28] ),
        .I4(\dx_reg_n_0_[27] ),
        .I5(\dx_reg_n_0_[34] ),
        .O(\xsqr[57]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[57]_i_5 
       (.I0(\dx_reg_n_0_[31] ),
        .I1(\dx_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[32] ),
        .I3(\dx_reg_n_0_[28] ),
        .I4(\dx_reg_n_0_[27] ),
        .I5(\dx_reg_n_0_[33] ),
        .O(\xsqr[57]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[57]_i_6 
       (.I0(\dx_reg_n_0_[31] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dx_reg_n_0_[30] ),
        .I3(\dx_reg_n_0_[29] ),
        .I4(\dx_reg_n_0_[27] ),
        .I5(\dx_reg_n_0_[32] ),
        .O(\xsqr[57]_i_6_n_0 ));
  (* HLUTNM = "lutpair15" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[57]_i_7 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dx_reg_n_0_[29] ),
        .O(\xsqr[57]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'hAC)) 
    \xsqr[57]_i_8 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[28] ),
        .O(\xsqr[57]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[57]_i_9 
       (.I0(\dx_reg_n_0_[27] ),
        .I1(\dx_reg_n_0_[30] ),
        .O(\xsqr[57]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1032" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[58]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[4]),
        .O(\xsqr[58]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1032" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[59]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[5]),
        .O(\xsqr[59]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1054" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[5]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[5]),
        .O(\xsqr[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1031" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[60]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[6]),
        .O(\xsqr[60]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1031" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[61]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[7]),
        .O(\xsqr[61]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1030" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[62]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[8]),
        .O(\xsqr[62]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1030" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[63]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[9]),
        .O(\xsqr[63]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1029" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[64]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[10]),
        .O(\xsqr[64]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1029" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[65]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[11]),
        .O(\xsqr[65]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[65]_i_10 
       (.I0(\xsqr_reg[57]_i_3_n_15 ),
        .I1(\xsqr_reg[57]_i_2_n_13 ),
        .O(\xsqr[65]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \xsqr[65]_i_11 
       (.I0(\xsqr_reg[57]_i_3_n_9 ),
        .I1(\xsqr_reg[71]_i_13_n_12 ),
        .I2(\xsqr_reg[71]_i_18_n_14 ),
        .I3(\xsqr_reg[71]_i_13_n_11 ),
        .I4(\xsqr_reg[57]_i_3_n_8 ),
        .I5(\xsqr[65]_i_19_n_0 ),
        .O(\xsqr[65]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \xsqr[65]_i_12 
       (.I0(\xsqr_reg[71]_i_18_n_15 ),
        .I1(\xsqr_reg[57]_i_3_n_9 ),
        .I2(\xsqr_reg[71]_i_13_n_12 ),
        .I3(\xsqr_reg[57]_i_3_n_8 ),
        .I4(\xsqr_reg[71]_i_13_n_11 ),
        .I5(\xsqr_reg[71]_i_18_n_14 ),
        .O(\xsqr[65]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \xsqr[65]_i_13 
       (.I0(\xsqr_reg[71]_i_18_n_15 ),
        .I1(\xsqr_reg[71]_i_13_n_12 ),
        .I2(\xsqr_reg[57]_i_3_n_9 ),
        .I3(\xsqr_reg[57]_i_3_n_10 ),
        .I4(\xsqr_reg[57]_i_2_n_8 ),
        .I5(\xsqr_reg[71]_i_13_n_13 ),
        .O(\xsqr[65]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[65]_i_14 
       (.I0(\xsqr[65]_i_6_n_0 ),
        .I1(\xsqr_reg[71]_i_13_n_13 ),
        .I2(\xsqr_reg[57]_i_2_n_8 ),
        .I3(\xsqr_reg[57]_i_3_n_10 ),
        .O(\xsqr[65]_i_14_n_0 ));
  (* HLUTNM = "lutpair18" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[65]_i_15 
       (.I0(\xsqr_reg[71]_i_13_n_14 ),
        .I1(\xsqr_reg[57]_i_2_n_9 ),
        .I2(\xsqr_reg[57]_i_3_n_11 ),
        .I3(\xsqr[65]_i_7_n_0 ),
        .O(\xsqr[65]_i_15_n_0 ));
  (* HLUTNM = "lutpair17" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[65]_i_16 
       (.I0(\xsqr_reg[71]_i_13_n_15 ),
        .I1(\xsqr_reg[57]_i_2_n_10 ),
        .I2(\xsqr_reg[57]_i_3_n_12 ),
        .I3(\xsqr[65]_i_8_n_0 ),
        .O(\xsqr[65]_i_16_n_0 ));
  (* HLUTNM = "lutpair16" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \xsqr[65]_i_17 
       (.I0(\xsqr_reg[57]_i_3_n_13 ),
        .I1(\xsqr_reg[57]_i_2_n_11 ),
        .I2(\xsqr_reg[57]_i_2_n_12 ),
        .I3(\xsqr_reg[57]_i_3_n_14 ),
        .O(\xsqr[65]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \xsqr[65]_i_18 
       (.I0(\xsqr_reg[57]_i_2_n_13 ),
        .I1(\xsqr_reg[57]_i_3_n_15 ),
        .I2(\xsqr_reg[57]_i_2_n_12 ),
        .I3(\xsqr_reg[57]_i_3_n_14 ),
        .O(\xsqr[65]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xsqr[65]_i_19 
       (.I0(\xsqr_reg[71]_i_17_n_15 ),
        .I1(\xsqr_reg[71]_i_13_n_10 ),
        .I2(\xsqr_reg[71]_i_18_n_5 ),
        .O(\xsqr[65]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \xsqr[65]_i_3 
       (.I0(\xsqr_reg[57]_i_3_n_9 ),
        .I1(\xsqr_reg[71]_i_13_n_12 ),
        .I2(\xsqr_reg[71]_i_18_n_14 ),
        .I3(\xsqr_reg[71]_i_13_n_11 ),
        .I4(\xsqr_reg[57]_i_3_n_8 ),
        .O(\xsqr[65]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \xsqr[65]_i_4 
       (.I0(\xsqr_reg[71]_i_18_n_15 ),
        .I1(\xsqr_reg[57]_i_3_n_9 ),
        .I2(\xsqr_reg[71]_i_13_n_12 ),
        .O(\xsqr[65]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xsqr[65]_i_5 
       (.I0(\xsqr_reg[57]_i_3_n_9 ),
        .I1(\xsqr_reg[71]_i_13_n_12 ),
        .I2(\xsqr_reg[71]_i_18_n_15 ),
        .O(\xsqr[65]_i_5_n_0 ));
  (* HLUTNM = "lutpair18" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xsqr[65]_i_6 
       (.I0(\xsqr_reg[71]_i_13_n_14 ),
        .I1(\xsqr_reg[57]_i_2_n_9 ),
        .I2(\xsqr_reg[57]_i_3_n_11 ),
        .O(\xsqr[65]_i_6_n_0 ));
  (* HLUTNM = "lutpair17" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xsqr[65]_i_7 
       (.I0(\xsqr_reg[71]_i_13_n_15 ),
        .I1(\xsqr_reg[57]_i_2_n_10 ),
        .I2(\xsqr_reg[57]_i_3_n_12 ),
        .O(\xsqr[65]_i_7_n_0 ));
  (* HLUTNM = "lutpair16" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[65]_i_8 
       (.I0(\xsqr_reg[57]_i_3_n_13 ),
        .I1(\xsqr_reg[57]_i_2_n_11 ),
        .O(\xsqr[65]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[65]_i_9 
       (.I0(\xsqr_reg[57]_i_3_n_14 ),
        .I1(\xsqr_reg[57]_i_2_n_12 ),
        .O(\xsqr[65]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1028" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[66]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[12]),
        .O(\xsqr[66]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1028" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[67]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[13]),
        .O(\xsqr[67]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1027" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[68]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[14]),
        .O(\xsqr[68]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1027" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[69]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[15]),
        .O(\xsqr[69]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1054" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[6]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[6]),
        .O(\xsqr[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1026" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[70]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[16]),
        .O(\xsqr[70]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1026" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[71]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr02_in[17]),
        .O(\xsqr[71]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \xsqr[71]_i_10 
       (.I0(\xsqr[71]_i_5_n_0 ),
        .I1(\xsqr_reg[71]_i_3_n_15 ),
        .I2(\xsqr_reg[71]_i_17_n_4 ),
        .I3(\xsqr_reg[71]_i_13_n_8 ),
        .I4(\xsqr_reg[71]_i_17_n_13 ),
        .O(\xsqr[71]_i_10_n_0 ));
  (* HLUTNM = "lutpair19" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \xsqr[71]_i_11 
       (.I0(\xsqr_reg[71]_i_17_n_14 ),
        .I1(\xsqr_reg[71]_i_13_n_9 ),
        .I2(\xsqr_reg[71]_i_17_n_13 ),
        .I3(\xsqr_reg[71]_i_13_n_8 ),
        .I4(\xsqr[71]_i_6_n_0 ),
        .O(\xsqr[71]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \xsqr[71]_i_12 
       (.I0(\xsqr[71]_i_7_n_0 ),
        .I1(\xsqr_reg[71]_i_17_n_15 ),
        .I2(\xsqr_reg[71]_i_18_n_5 ),
        .I3(\xsqr_reg[71]_i_13_n_10 ),
        .I4(\xsqr_reg[71]_i_17_n_14 ),
        .I5(\xsqr_reg[71]_i_13_n_9 ),
        .O(\xsqr[71]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \xsqr[71]_i_14 
       (.I0(\dx_reg_n_0_[34] ),
        .I1(\dx_reg_n_0_[35] ),
        .O(\xsqr[71]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \xsqr[71]_i_15 
       (.I0(\dx_reg_n_0_[33] ),
        .I1(\dx_reg_n_0_[35] ),
        .O(\xsqr[71]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[71]_i_16 
       (.I0(\dx_reg_n_0_[34] ),
        .I1(\dx_reg_n_0_[33] ),
        .O(\xsqr[71]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hF7777000)) 
    \xsqr[71]_i_19 
       (.I0(\dx_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[31] ),
        .I2(\dx_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[32] ),
        .I4(\dx_reg_n_0_[33] ),
        .O(\xsqr[71]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[71]_i_20 
       (.I0(\dx_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[30] ),
        .I2(\dx_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[31] ),
        .I4(\dx_reg_n_0_[32] ),
        .I5(\dx_reg_n_0_[33] ),
        .O(\xsqr[71]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[71]_i_21 
       (.I0(\dx_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[30] ),
        .I4(\dx_reg_n_0_[31] ),
        .I5(\dx_reg_n_0_[33] ),
        .O(\xsqr[71]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[71]_i_22 
       (.I0(\dx_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dx_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[29] ),
        .I4(\dx_reg_n_0_[30] ),
        .I5(\dx_reg_n_0_[33] ),
        .O(\xsqr[71]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h7000)) 
    \xsqr[71]_i_23 
       (.I0(\dx_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[27] ),
        .I2(\dx_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[28] ),
        .O(\xsqr[71]_i_23_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[71]_i_24 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dx_reg_n_0_[33] ),
        .O(\xsqr[71]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'h8E11F555)) 
    \xsqr[71]_i_25 
       (.I0(\dx_reg_n_0_[33] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dx_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[35] ),
        .I4(\dx_reg_n_0_[32] ),
        .O(\xsqr[71]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hEB843C0C903FCF3F)) 
    \xsqr[71]_i_26 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[31] ),
        .I4(\dx_reg_n_0_[35] ),
        .I5(\dx_reg_n_0_[33] ),
        .O(\xsqr[71]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h7F07070780F8F8F8)) 
    \xsqr[71]_i_27 
       (.I0(\dx_reg_n_0_[33] ),
        .I1(\dx_reg_n_0_[31] ),
        .I2(\xsqr[71]_i_43_n_0 ),
        .I3(\dx_reg_n_0_[29] ),
        .I4(\dx_reg_n_0_[35] ),
        .I5(\xsqr[71]_i_44_n_0 ),
        .O(\xsqr[71]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A956A956A95)) 
    \xsqr[71]_i_28 
       (.I0(\xsqr[71]_i_22_n_0 ),
        .I1(\dx_reg_n_0_[35] ),
        .I2(\dx_reg_n_0_[29] ),
        .I3(\xsqr[71]_i_43_n_0 ),
        .I4(\dx_reg_n_0_[31] ),
        .I5(\dx_reg_n_0_[33] ),
        .O(\xsqr[71]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h69C399C369336933)) 
    \xsqr[71]_i_29 
       (.I0(\dx_reg_n_0_[29] ),
        .I1(\xsqr[71]_i_45_n_0 ),
        .I2(\dx_reg_n_0_[28] ),
        .I3(\dx_reg_n_0_[34] ),
        .I4(\dx_reg_n_0_[27] ),
        .I5(\dx_reg_n_0_[35] ),
        .O(\xsqr[71]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xsqr[71]_i_30 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dx_reg_n_0_[27] ),
        .I3(\dx_reg_n_0_[35] ),
        .I4(\dx_reg_n_0_[33] ),
        .I5(\dx_reg_n_0_[29] ),
        .O(\xsqr[71]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xsqr[71]_i_31 
       (.I0(\dx_reg_n_0_[33] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dx_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[27] ),
        .O(\xsqr[71]_i_31_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[71]_i_32 
       (.I0(\dx_reg_n_0_[27] ),
        .I1(\dx_reg_n_0_[33] ),
        .O(\xsqr[71]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xsqr[71]_i_33 
       (.I0(\dx_reg_n_0_[34] ),
        .I1(\dx_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[35] ),
        .I3(\dx_reg_n_0_[31] ),
        .O(\xsqr[71]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[71]_i_34 
       (.I0(\dx_reg_n_0_[32] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dx_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[35] ),
        .O(\xsqr[71]_i_34_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[71]_i_35 
       (.I0(\dx_reg_n_0_[31] ),
        .I1(\dx_reg_n_0_[32] ),
        .O(\xsqr[71]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \xsqr[71]_i_36 
       (.I0(\dx_reg_n_0_[31] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dx_reg_n_0_[35] ),
        .I3(\dx_reg_n_0_[32] ),
        .O(\xsqr[71]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \xsqr[71]_i_37 
       (.I0(\dx_reg_n_0_[33] ),
        .I1(\dx_reg_n_0_[30] ),
        .I2(\dx_reg_n_0_[35] ),
        .I3(\dx_reg_n_0_[31] ),
        .I4(\dx_reg_n_0_[34] ),
        .I5(\dx_reg_n_0_[32] ),
        .O(\xsqr[71]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'hD22287772DDD8777)) 
    \xsqr[71]_i_38 
       (.I0(\dx_reg_n_0_[31] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dx_reg_n_0_[30] ),
        .I3(\dx_reg_n_0_[35] ),
        .I4(\dx_reg_n_0_[32] ),
        .I5(\dx_reg_n_0_[33] ),
        .O(\xsqr[71]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xsqr[71]_i_39 
       (.I0(\dx_reg_n_0_[34] ),
        .I1(\dx_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[35] ),
        .I3(\dx_reg_n_0_[28] ),
        .O(\xsqr[71]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \xsqr[71]_i_4 
       (.I0(\xsqr_reg[71]_i_17_n_13 ),
        .I1(\xsqr_reg[71]_i_13_n_8 ),
        .I2(\xsqr_reg[71]_i_17_n_4 ),
        .I3(\xsqr_reg[71]_i_3_n_15 ),
        .O(\xsqr[71]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[71]_i_40 
       (.I0(\dx_reg_n_0_[29] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dx_reg_n_0_[28] ),
        .I3(\dx_reg_n_0_[35] ),
        .O(\xsqr[71]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \xsqr[71]_i_41 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dx_reg_n_0_[35] ),
        .I3(\dx_reg_n_0_[29] ),
        .O(\xsqr[71]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \xsqr[71]_i_42 
       (.I0(\dx_reg_n_0_[33] ),
        .I1(\dx_reg_n_0_[27] ),
        .I2(\dx_reg_n_0_[35] ),
        .I3(\dx_reg_n_0_[28] ),
        .I4(\dx_reg_n_0_[34] ),
        .I5(\dx_reg_n_0_[29] ),
        .O(\xsqr[71]_i_42_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1011" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[71]_i_43 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[34] ),
        .O(\xsqr[71]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xsqr[71]_i_44 
       (.I0(\dx_reg_n_0_[33] ),
        .I1(\dx_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[35] ),
        .I3(\dx_reg_n_0_[30] ),
        .I4(\dx_reg_n_0_[34] ),
        .I5(\dx_reg_n_0_[31] ),
        .O(\xsqr[71]_i_44_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[71]_i_45 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[33] ),
        .O(\xsqr[71]_i_45_n_0 ));
  (* HLUTNM = "lutpair19" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \xsqr[71]_i_5 
       (.I0(\xsqr_reg[71]_i_17_n_14 ),
        .I1(\xsqr_reg[71]_i_13_n_9 ),
        .I2(\xsqr_reg[71]_i_17_n_13 ),
        .I3(\xsqr_reg[71]_i_13_n_8 ),
        .O(\xsqr[71]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \xsqr[71]_i_6 
       (.I0(\xsqr_reg[71]_i_17_n_14 ),
        .I1(\xsqr_reg[71]_i_13_n_9 ),
        .I2(\xsqr_reg[71]_i_17_n_15 ),
        .I3(\xsqr_reg[71]_i_18_n_5 ),
        .I4(\xsqr_reg[71]_i_13_n_10 ),
        .O(\xsqr[71]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \xsqr[71]_i_7 
       (.I0(\xsqr_reg[57]_i_3_n_8 ),
        .I1(\xsqr_reg[71]_i_18_n_14 ),
        .I2(\xsqr_reg[71]_i_13_n_11 ),
        .I3(\xsqr_reg[71]_i_18_n_5 ),
        .I4(\xsqr_reg[71]_i_13_n_10 ),
        .I5(\xsqr_reg[71]_i_17_n_15 ),
        .O(\xsqr[71]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \xsqr[71]_i_8 
       (.I0(\xsqr_reg[71]_i_3_n_15 ),
        .I1(\xsqr_reg[71]_i_17_n_4 ),
        .I2(\xsqr_reg[71]_i_3_n_14 ),
        .I3(\xsqr_reg[71]_i_3_n_13 ),
        .O(\xsqr[71]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \xsqr[71]_i_9 
       (.I0(\xsqr_reg[71]_i_13_n_8 ),
        .I1(\xsqr_reg[71]_i_17_n_13 ),
        .I2(\xsqr_reg[71]_i_3_n_15 ),
        .I3(\xsqr_reg[71]_i_17_n_4 ),
        .I4(\xsqr_reg[71]_i_3_n_14 ),
        .O(\xsqr[71]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair972" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[72]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(\dx_reg_n_0_[36] ),
        .O(\xsqr[72]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1025" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[74]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[2]),
        .O(\xsqr[74]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair864" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[75]_i_1 
       (.I0(\xsqr_reg[75]_i_2_n_13 ),
        .I1(\xsqr_reg[75]_i_3_n_15 ),
        .I2(stateScore_reg_rep__13_n_0),
        .O(\xsqr[75]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9666)) 
    \xsqr[75]_i_10 
       (.I0(\xsqr[75]_i_4_n_0 ),
        .I1(\xsqr[75]_i_31_n_0 ),
        .I2(\dx_reg_n_0_[38] ),
        .I3(\dx_reg_n_0_[42] ),
        .O(\xsqr[75]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xsqr[75]_i_11 
       (.I0(\xsqr[75]_i_5_n_0 ),
        .I1(\dx_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[38] ),
        .I3(\xsqr[75]_i_32_n_0 ),
        .I4(\dx_reg_n_0_[36] ),
        .I5(\dx_reg_n_0_[43] ),
        .O(\xsqr[75]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \xsqr[75]_i_12 
       (.I0(\xsqr[75]_i_6_n_0 ),
        .I1(\dx_reg_n_0_[40] ),
        .I2(\dx_reg_n_0_[38] ),
        .I3(\dx_reg_n_0_[41] ),
        .I4(\dx_reg_n_0_[37] ),
        .I5(\xsqr[75]_i_33_n_0 ),
        .O(\xsqr[75]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xsqr[75]_i_13 
       (.I0(\xsqr[75]_i_7_n_0 ),
        .I1(\dx_reg_n_0_[40] ),
        .I2(\dx_reg_n_0_[37] ),
        .I3(\xsqr[75]_i_21_n_0 ),
        .I4(\dx_reg_n_0_[36] ),
        .I5(\dx_reg_n_0_[41] ),
        .O(\xsqr[75]_i_13_n_0 ));
  (* HLUTNM = "lutpair20" *) 
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \xsqr[75]_i_14 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dx_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[39] ),
        .I3(\dx_reg_n_0_[40] ),
        .I4(\dx_reg_n_0_[36] ),
        .O(\xsqr[75]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[75]_i_15 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[36] ),
        .O(\xsqr[75]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[75]_i_16 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dx_reg_n_0_[36] ),
        .O(\xsqr[75]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[75]_i_17 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[43] ),
        .O(\xsqr[75]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[75]_i_18 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[42] ),
        .O(\xsqr[75]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[75]_i_19 
       (.I0(\dx_reg_n_0_[38] ),
        .I1(\dx_reg_n_0_[41] ),
        .O(\xsqr[75]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h956A6A6A)) 
    \xsqr[75]_i_20 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dx_reg_n_0_[41] ),
        .I3(\dx_reg_n_0_[38] ),
        .I4(\dx_reg_n_0_[40] ),
        .O(\xsqr[75]_i_20_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[75]_i_21 
       (.I0(\dx_reg_n_0_[38] ),
        .I1(\dx_reg_n_0_[39] ),
        .O(\xsqr[75]_i_21_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[75]_i_22 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dx_reg_n_0_[39] ),
        .O(\xsqr[75]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \xsqr[75]_i_23 
       (.I0(\dx_reg_n_0_[40] ),
        .I1(\dx_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[42] ),
        .I3(\dx_reg_n_0_[43] ),
        .I4(\dx_reg_n_0_[39] ),
        .O(\xsqr[75]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \xsqr[75]_i_24 
       (.I0(\dx_reg_n_0_[42] ),
        .I1(\dx_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[39] ),
        .O(\xsqr[75]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[75]_i_25 
       (.I0(\dx_reg_n_0_[40] ),
        .I1(\dx_reg_n_0_[39] ),
        .O(\xsqr[75]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h17A08800)) 
    \xsqr[75]_i_26 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dx_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[41] ),
        .I4(\dx_reg_n_0_[38] ),
        .O(\xsqr[75]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h663C963C66CC66CC)) 
    \xsqr[75]_i_27 
       (.I0(\dx_reg_n_0_[38] ),
        .I1(\dx_reg_n_0_[39] ),
        .I2(\dx_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[40] ),
        .I4(\dx_reg_n_0_[36] ),
        .I5(\dx_reg_n_0_[41] ),
        .O(\xsqr[75]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xsqr[75]_i_28 
       (.I0(\dx_reg_n_0_[36] ),
        .I1(\dx_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[40] ),
        .I4(\dx_reg_n_0_[39] ),
        .I5(\dx_reg_n_0_[38] ),
        .O(\xsqr[75]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xsqr[75]_i_29 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dx_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[36] ),
        .O(\xsqr[75]_i_29_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[75]_i_30 
       (.I0(\dx_reg_n_0_[36] ),
        .I1(\dx_reg_n_0_[39] ),
        .O(\xsqr[75]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[75]_i_31 
       (.I0(\dx_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[36] ),
        .I2(\dx_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[37] ),
        .O(\xsqr[75]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair973" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[75]_i_32 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dx_reg_n_0_[42] ),
        .O(\xsqr[75]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair972" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[75]_i_33 
       (.I0(\dx_reg_n_0_[36] ),
        .I1(\dx_reg_n_0_[42] ),
        .O(\xsqr[75]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[75]_i_4 
       (.I0(\dx_reg_n_0_[41] ),
        .I1(\dx_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[42] ),
        .I3(\dx_reg_n_0_[37] ),
        .I4(\dx_reg_n_0_[36] ),
        .I5(\dx_reg_n_0_[43] ),
        .O(\xsqr[75]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[75]_i_5 
       (.I0(\dx_reg_n_0_[40] ),
        .I1(\dx_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[41] ),
        .I3(\dx_reg_n_0_[37] ),
        .I4(\dx_reg_n_0_[36] ),
        .I5(\dx_reg_n_0_[42] ),
        .O(\xsqr[75]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xsqr[75]_i_6 
       (.I0(\dx_reg_n_0_[40] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dx_reg_n_0_[39] ),
        .I3(\dx_reg_n_0_[38] ),
        .I4(\dx_reg_n_0_[36] ),
        .I5(\dx_reg_n_0_[41] ),
        .O(\xsqr[75]_i_6_n_0 ));
  (* HLUTNM = "lutpair20" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[75]_i_7 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dx_reg_n_0_[38] ),
        .O(\xsqr[75]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'hAC)) 
    \xsqr[75]_i_8 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[37] ),
        .O(\xsqr[75]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[75]_i_9 
       (.I0(\dx_reg_n_0_[36] ),
        .I1(\dx_reg_n_0_[39] ),
        .O(\xsqr[75]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1025" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[76]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[4]),
        .O(\xsqr[76]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1024" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[77]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[5]),
        .O(\xsqr[77]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1024" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[78]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[6]),
        .O(\xsqr[78]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1023" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[79]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[7]),
        .O(\xsqr[79]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1053" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[7]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[7]),
        .O(\xsqr[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1023" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[80]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[8]),
        .O(\xsqr[80]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1022" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[81]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[9]),
        .O(\xsqr[81]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1022" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[82]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[10]),
        .O(\xsqr[82]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1021" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[83]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[11]),
        .O(\xsqr[83]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[83]_i_10 
       (.I0(\xsqr_reg[75]_i_3_n_15 ),
        .I1(\xsqr_reg[75]_i_2_n_13 ),
        .O(\xsqr[83]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \xsqr[83]_i_11 
       (.I0(\xsqr_reg[75]_i_3_n_9 ),
        .I1(\xsqr_reg[89]_i_14_n_12 ),
        .I2(\xsqr_reg[89]_i_19_n_14 ),
        .I3(\xsqr_reg[89]_i_14_n_11 ),
        .I4(\xsqr_reg[75]_i_3_n_8 ),
        .I5(\xsqr[83]_i_19_n_0 ),
        .O(\xsqr[83]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \xsqr[83]_i_12 
       (.I0(\xsqr_reg[89]_i_19_n_15 ),
        .I1(\xsqr_reg[75]_i_3_n_9 ),
        .I2(\xsqr_reg[89]_i_14_n_12 ),
        .I3(\xsqr_reg[75]_i_3_n_8 ),
        .I4(\xsqr_reg[89]_i_14_n_11 ),
        .I5(\xsqr_reg[89]_i_19_n_14 ),
        .O(\xsqr[83]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \xsqr[83]_i_13 
       (.I0(\xsqr_reg[89]_i_19_n_15 ),
        .I1(\xsqr_reg[89]_i_14_n_12 ),
        .I2(\xsqr_reg[75]_i_3_n_9 ),
        .I3(\xsqr_reg[75]_i_3_n_10 ),
        .I4(\xsqr_reg[75]_i_2_n_8 ),
        .I5(\xsqr_reg[89]_i_14_n_13 ),
        .O(\xsqr[83]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[83]_i_14 
       (.I0(\xsqr[83]_i_6_n_0 ),
        .I1(\xsqr_reg[89]_i_14_n_13 ),
        .I2(\xsqr_reg[75]_i_2_n_8 ),
        .I3(\xsqr_reg[75]_i_3_n_10 ),
        .O(\xsqr[83]_i_14_n_0 ));
  (* HLUTNM = "lutpair23" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[83]_i_15 
       (.I0(\xsqr_reg[89]_i_14_n_14 ),
        .I1(\xsqr_reg[75]_i_2_n_9 ),
        .I2(\xsqr_reg[75]_i_3_n_11 ),
        .I3(\xsqr[83]_i_7_n_0 ),
        .O(\xsqr[83]_i_15_n_0 ));
  (* HLUTNM = "lutpair22" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xsqr[83]_i_16 
       (.I0(\xsqr_reg[89]_i_14_n_15 ),
        .I1(\xsqr_reg[75]_i_2_n_10 ),
        .I2(\xsqr_reg[75]_i_3_n_12 ),
        .I3(\xsqr[83]_i_8_n_0 ),
        .O(\xsqr[83]_i_16_n_0 ));
  (* HLUTNM = "lutpair21" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \xsqr[83]_i_17 
       (.I0(\xsqr_reg[75]_i_3_n_13 ),
        .I1(\xsqr_reg[75]_i_2_n_11 ),
        .I2(\xsqr_reg[75]_i_2_n_12 ),
        .I3(\xsqr_reg[75]_i_3_n_14 ),
        .O(\xsqr[83]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \xsqr[83]_i_18 
       (.I0(\xsqr_reg[75]_i_2_n_13 ),
        .I1(\xsqr_reg[75]_i_3_n_15 ),
        .I2(\xsqr_reg[75]_i_2_n_12 ),
        .I3(\xsqr_reg[75]_i_3_n_14 ),
        .O(\xsqr[83]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xsqr[83]_i_19 
       (.I0(\xsqr_reg[89]_i_18_n_15 ),
        .I1(\xsqr_reg[89]_i_14_n_10 ),
        .I2(\xsqr_reg[89]_i_19_n_5 ),
        .O(\xsqr[83]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \xsqr[83]_i_3 
       (.I0(\xsqr_reg[75]_i_3_n_9 ),
        .I1(\xsqr_reg[89]_i_14_n_12 ),
        .I2(\xsqr_reg[89]_i_19_n_14 ),
        .I3(\xsqr_reg[89]_i_14_n_11 ),
        .I4(\xsqr_reg[75]_i_3_n_8 ),
        .O(\xsqr[83]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \xsqr[83]_i_4 
       (.I0(\xsqr_reg[89]_i_19_n_15 ),
        .I1(\xsqr_reg[75]_i_3_n_9 ),
        .I2(\xsqr_reg[89]_i_14_n_12 ),
        .O(\xsqr[83]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xsqr[83]_i_5 
       (.I0(\xsqr_reg[75]_i_3_n_9 ),
        .I1(\xsqr_reg[89]_i_14_n_12 ),
        .I2(\xsqr_reg[89]_i_19_n_15 ),
        .O(\xsqr[83]_i_5_n_0 ));
  (* HLUTNM = "lutpair23" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xsqr[83]_i_6 
       (.I0(\xsqr_reg[89]_i_14_n_14 ),
        .I1(\xsqr_reg[75]_i_2_n_9 ),
        .I2(\xsqr_reg[75]_i_3_n_11 ),
        .O(\xsqr[83]_i_6_n_0 ));
  (* HLUTNM = "lutpair22" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xsqr[83]_i_7 
       (.I0(\xsqr_reg[89]_i_14_n_15 ),
        .I1(\xsqr_reg[75]_i_2_n_10 ),
        .I2(\xsqr_reg[75]_i_3_n_12 ),
        .O(\xsqr[83]_i_7_n_0 ));
  (* HLUTNM = "lutpair21" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[83]_i_8 
       (.I0(\xsqr_reg[75]_i_3_n_13 ),
        .I1(\xsqr_reg[75]_i_2_n_11 ),
        .O(\xsqr[83]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[83]_i_9 
       (.I0(\xsqr_reg[75]_i_3_n_14 ),
        .I1(\xsqr_reg[75]_i_2_n_12 ),
        .O(\xsqr[83]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1021" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[84]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[12]),
        .O(\xsqr[84]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1020" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[85]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[13]),
        .O(\xsqr[85]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1020" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[86]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[14]),
        .O(\xsqr[86]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair864" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[87]_i_1 
       (.I0(stateScore_reg_rep__13_n_0),
        .I1(xsqr03_in[15]),
        .O(\xsqr[87]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1019" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[88]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xsqr03_in[16]),
        .O(\xsqr[88]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \xsqr[89]_i_1 
       (.I0(ceScore),
        .I1(stateScore_reg_rep__0_n_0),
        .O(\xsqr[89]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \xsqr[89]_i_10 
       (.I0(\xsqr_reg[89]_i_14_n_8 ),
        .I1(\xsqr_reg[89]_i_18_n_13 ),
        .I2(\xsqr_reg[89]_i_4_n_15 ),
        .I3(\xsqr_reg[89]_i_18_n_4 ),
        .I4(\xsqr_reg[89]_i_4_n_14 ),
        .O(\xsqr[89]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \xsqr[89]_i_11 
       (.I0(\xsqr[89]_i_6_n_0 ),
        .I1(\xsqr_reg[89]_i_4_n_15 ),
        .I2(\xsqr_reg[89]_i_18_n_4 ),
        .I3(\xsqr_reg[89]_i_14_n_8 ),
        .I4(\xsqr_reg[89]_i_18_n_13 ),
        .O(\xsqr[89]_i_11_n_0 ));
  (* HLUTNM = "lutpair24" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \xsqr[89]_i_12 
       (.I0(\xsqr_reg[89]_i_18_n_14 ),
        .I1(\xsqr_reg[89]_i_14_n_9 ),
        .I2(\xsqr_reg[89]_i_18_n_13 ),
        .I3(\xsqr_reg[89]_i_14_n_8 ),
        .I4(\xsqr[89]_i_7_n_0 ),
        .O(\xsqr[89]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \xsqr[89]_i_13 
       (.I0(\xsqr[89]_i_8_n_0 ),
        .I1(\xsqr_reg[89]_i_18_n_15 ),
        .I2(\xsqr_reg[89]_i_19_n_5 ),
        .I3(\xsqr_reg[89]_i_14_n_10 ),
        .I4(\xsqr_reg[89]_i_18_n_14 ),
        .I5(\xsqr_reg[89]_i_14_n_9 ),
        .O(\xsqr[89]_i_13_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \xsqr[89]_i_15 
       (.I0(\dx_reg_n_0_[43] ),
        .I1(\dx_reg_n_0_[44] ),
        .O(\xsqr[89]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \xsqr[89]_i_16 
       (.I0(\dx_reg_n_0_[42] ),
        .I1(\dx_reg_n_0_[44] ),
        .O(\xsqr[89]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \xsqr[89]_i_17 
       (.I0(\dx_reg_n_0_[43] ),
        .I1(\dx_reg_n_0_[42] ),
        .O(\xsqr[89]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1019" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[89]_i_2 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xsqr03_in[17]),
        .O(\xsqr[89]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hF7777000)) 
    \xsqr[89]_i_20 
       (.I0(\dx_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[40] ),
        .I2(\dx_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[41] ),
        .I4(\dx_reg_n_0_[42] ),
        .O(\xsqr[89]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[89]_i_21 
       (.I0(\dx_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[39] ),
        .I2(\dx_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[40] ),
        .I4(\dx_reg_n_0_[41] ),
        .I5(\dx_reg_n_0_[42] ),
        .O(\xsqr[89]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[89]_i_22 
       (.I0(\dx_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[39] ),
        .I4(\dx_reg_n_0_[40] ),
        .I5(\dx_reg_n_0_[42] ),
        .O(\xsqr[89]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xsqr[89]_i_23 
       (.I0(\dx_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dx_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[38] ),
        .I4(\dx_reg_n_0_[39] ),
        .I5(\dx_reg_n_0_[42] ),
        .O(\xsqr[89]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h7000)) 
    \xsqr[89]_i_24 
       (.I0(\dx_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[36] ),
        .I2(\dx_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[37] ),
        .O(\xsqr[89]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[89]_i_25 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dx_reg_n_0_[42] ),
        .O(\xsqr[89]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h8E11F555)) 
    \xsqr[89]_i_26 
       (.I0(\dx_reg_n_0_[42] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dx_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[44] ),
        .I4(\dx_reg_n_0_[41] ),
        .O(\xsqr[89]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'hEB843C0C903FCF3F)) 
    \xsqr[89]_i_27 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[40] ),
        .I4(\dx_reg_n_0_[44] ),
        .I5(\dx_reg_n_0_[42] ),
        .O(\xsqr[89]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h7F07070780F8F8F8)) 
    \xsqr[89]_i_28 
       (.I0(\dx_reg_n_0_[42] ),
        .I1(\dx_reg_n_0_[40] ),
        .I2(\xsqr[89]_i_44_n_0 ),
        .I3(\dx_reg_n_0_[38] ),
        .I4(\dx_reg_n_0_[44] ),
        .I5(\xsqr[89]_i_45_n_0 ),
        .O(\xsqr[89]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A956A956A95)) 
    \xsqr[89]_i_29 
       (.I0(\xsqr[89]_i_23_n_0 ),
        .I1(\dx_reg_n_0_[44] ),
        .I2(\dx_reg_n_0_[38] ),
        .I3(\xsqr[89]_i_44_n_0 ),
        .I4(\dx_reg_n_0_[40] ),
        .I5(\dx_reg_n_0_[42] ),
        .O(\xsqr[89]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h69C399C369336933)) 
    \xsqr[89]_i_30 
       (.I0(\dx_reg_n_0_[38] ),
        .I1(\xsqr[89]_i_46_n_0 ),
        .I2(\dx_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[43] ),
        .I4(\dx_reg_n_0_[36] ),
        .I5(\dx_reg_n_0_[44] ),
        .O(\xsqr[89]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xsqr[89]_i_31 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dx_reg_n_0_[36] ),
        .I3(\dx_reg_n_0_[44] ),
        .I4(\dx_reg_n_0_[42] ),
        .I5(\dx_reg_n_0_[38] ),
        .O(\xsqr[89]_i_31_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xsqr[89]_i_32 
       (.I0(\dx_reg_n_0_[42] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dx_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[36] ),
        .O(\xsqr[89]_i_32_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[89]_i_33 
       (.I0(\dx_reg_n_0_[36] ),
        .I1(\dx_reg_n_0_[42] ),
        .O(\xsqr[89]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xsqr[89]_i_34 
       (.I0(\dx_reg_n_0_[43] ),
        .I1(\dx_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[44] ),
        .I3(\dx_reg_n_0_[40] ),
        .O(\xsqr[89]_i_34_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[89]_i_35 
       (.I0(\dx_reg_n_0_[41] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dx_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[44] ),
        .O(\xsqr[89]_i_35_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[89]_i_36 
       (.I0(\dx_reg_n_0_[40] ),
        .I1(\dx_reg_n_0_[41] ),
        .O(\xsqr[89]_i_36_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \xsqr[89]_i_37 
       (.I0(\dx_reg_n_0_[40] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dx_reg_n_0_[44] ),
        .I3(\dx_reg_n_0_[41] ),
        .O(\xsqr[89]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \xsqr[89]_i_38 
       (.I0(\dx_reg_n_0_[42] ),
        .I1(\dx_reg_n_0_[39] ),
        .I2(\dx_reg_n_0_[44] ),
        .I3(\dx_reg_n_0_[40] ),
        .I4(\dx_reg_n_0_[43] ),
        .I5(\dx_reg_n_0_[41] ),
        .O(\xsqr[89]_i_38_n_0 ));
  LUT6 #(
    .INIT(64'hD22287772DDD8777)) 
    \xsqr[89]_i_39 
       (.I0(\dx_reg_n_0_[40] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dx_reg_n_0_[39] ),
        .I3(\dx_reg_n_0_[44] ),
        .I4(\dx_reg_n_0_[41] ),
        .I5(\dx_reg_n_0_[42] ),
        .O(\xsqr[89]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xsqr[89]_i_40 
       (.I0(\dx_reg_n_0_[43] ),
        .I1(\dx_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[44] ),
        .I3(\dx_reg_n_0_[37] ),
        .O(\xsqr[89]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xsqr[89]_i_41 
       (.I0(\dx_reg_n_0_[38] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dx_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[44] ),
        .O(\xsqr[89]_i_41_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \xsqr[89]_i_42 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dx_reg_n_0_[44] ),
        .I3(\dx_reg_n_0_[38] ),
        .O(\xsqr[89]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \xsqr[89]_i_43 
       (.I0(\dx_reg_n_0_[42] ),
        .I1(\dx_reg_n_0_[36] ),
        .I2(\dx_reg_n_0_[44] ),
        .I3(\dx_reg_n_0_[37] ),
        .I4(\dx_reg_n_0_[43] ),
        .I5(\dx_reg_n_0_[38] ),
        .O(\xsqr[89]_i_43_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1018" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[89]_i_44 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[43] ),
        .O(\xsqr[89]_i_44_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xsqr[89]_i_45 
       (.I0(\dx_reg_n_0_[42] ),
        .I1(\dx_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[44] ),
        .I3(\dx_reg_n_0_[39] ),
        .I4(\dx_reg_n_0_[43] ),
        .I5(\dx_reg_n_0_[40] ),
        .O(\xsqr[89]_i_45_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[89]_i_46 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[42] ),
        .O(\xsqr[89]_i_46_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \xsqr[89]_i_5 
       (.I0(\xsqr_reg[89]_i_18_n_13 ),
        .I1(\xsqr_reg[89]_i_14_n_8 ),
        .I2(\xsqr_reg[89]_i_18_n_4 ),
        .I3(\xsqr_reg[89]_i_4_n_15 ),
        .O(\xsqr[89]_i_5_n_0 ));
  (* HLUTNM = "lutpair24" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \xsqr[89]_i_6 
       (.I0(\xsqr_reg[89]_i_18_n_14 ),
        .I1(\xsqr_reg[89]_i_14_n_9 ),
        .I2(\xsqr_reg[89]_i_18_n_13 ),
        .I3(\xsqr_reg[89]_i_14_n_8 ),
        .O(\xsqr[89]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \xsqr[89]_i_7 
       (.I0(\xsqr_reg[89]_i_18_n_14 ),
        .I1(\xsqr_reg[89]_i_14_n_9 ),
        .I2(\xsqr_reg[89]_i_18_n_15 ),
        .I3(\xsqr_reg[89]_i_19_n_5 ),
        .I4(\xsqr_reg[89]_i_14_n_10 ),
        .O(\xsqr[89]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \xsqr[89]_i_8 
       (.I0(\xsqr_reg[75]_i_3_n_8 ),
        .I1(\xsqr_reg[89]_i_19_n_14 ),
        .I2(\xsqr_reg[89]_i_14_n_11 ),
        .I3(\xsqr_reg[89]_i_19_n_5 ),
        .I4(\xsqr_reg[89]_i_14_n_10 ),
        .I5(\xsqr_reg[89]_i_18_n_15 ),
        .O(\xsqr[89]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \xsqr[89]_i_9 
       (.I0(\xsqr_reg[89]_i_4_n_15 ),
        .I1(\xsqr_reg[89]_i_18_n_4 ),
        .I2(\xsqr_reg[89]_i_4_n_14 ),
        .I3(\xsqr_reg[89]_i_4_n_13 ),
        .O(\xsqr[89]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1053" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[8]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[8]),
        .O(\xsqr[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1052" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xsqr[9]_i_1 
       (.I0(stateScore_reg_rep__12_n_0),
        .I1(xsqr0[9]),
        .O(\xsqr[9]_i_1_n_0 ));
  FDCE \xsqr_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[0]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[0] ));
  FDCE \xsqr_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[10]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[10] ));
  FDCE \xsqr_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[11]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[11] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xsqr_reg[11]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[11]_i_2_n_0 ,\xsqr_reg[11]_i_2_n_1 ,\xsqr_reg[11]_i_2_n_2 ,\xsqr_reg[11]_i_2_n_3 ,\xsqr_reg[11]_i_2_n_4 ,\xsqr_reg[11]_i_2_n_5 ,\xsqr_reg[11]_i_2_n_6 ,\xsqr_reg[11]_i_2_n_7 }),
        .DI({\xsqr[11]_i_3_n_0 ,\xsqr[11]_i_4_n_0 ,\xsqr[11]_i_5_n_0 ,\xsqr[11]_i_6_n_0 ,\xsqr[11]_i_7_n_0 ,\xsqr[11]_i_8_n_0 ,\xsqr[11]_i_9_n_0 ,\xsqr[11]_i_10_n_0 }),
        .O(xsqr0[11:4]),
        .S({\xsqr[11]_i_11_n_0 ,\xsqr[11]_i_12_n_0 ,\xsqr[11]_i_13_n_0 ,\xsqr[11]_i_14_n_0 ,\xsqr[11]_i_15_n_0 ,\xsqr[11]_i_16_n_0 ,\xsqr[11]_i_17_n_0 ,\xsqr[11]_i_18_n_0 }));
  FDCE \xsqr_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[12]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[12] ));
  FDCE \xsqr_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[13]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[13] ));
  FDCE \xsqr_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[14]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[14] ));
  FDCE \xsqr_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[15]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[15] ));
  FDCE \xsqr_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[16]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[16] ));
  FDCE \xsqr_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[17]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[17] ));
  CARRY8 \xsqr_reg[17]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[17]_i_13_n_0 ,\xsqr_reg[17]_i_13_n_1 ,\xsqr_reg[17]_i_13_n_2 ,\xsqr_reg[17]_i_13_n_3 ,\xsqr_reg[17]_i_13_n_4 ,\xsqr_reg[17]_i_13_n_5 ,\xsqr_reg[17]_i_13_n_6 ,\xsqr_reg[17]_i_13_n_7 }),
        .DI({\xsqr[17]_i_19_n_0 ,\xsqr[17]_i_20_n_0 ,\xsqr[17]_i_21_n_0 ,\xsqr[17]_i_22_n_0 ,\xsqr[17]_i_23_n_0 ,\xsqr[3]_i_31_n_0 ,\xsqr[17]_i_24_n_0 ,1'b0}),
        .O({\xsqr_reg[17]_i_13_n_8 ,\xsqr_reg[17]_i_13_n_9 ,\xsqr_reg[17]_i_13_n_10 ,\xsqr_reg[17]_i_13_n_11 ,\xsqr_reg[17]_i_13_n_12 ,\xsqr_reg[17]_i_13_n_13 ,\xsqr_reg[17]_i_13_n_14 ,\xsqr_reg[17]_i_13_n_15 }),
        .S({\xsqr[17]_i_25_n_0 ,\xsqr[17]_i_26_n_0 ,\xsqr[17]_i_27_n_0 ,\xsqr[17]_i_28_n_0 ,\xsqr[17]_i_29_n_0 ,\xsqr[17]_i_30_n_0 ,\xsqr[17]_i_31_n_0 ,\xsqr[17]_i_32_n_0 }));
  CARRY8 \xsqr_reg[17]_i_17 
       (.CI(\xsqr_reg[3]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[17]_i_17_CO_UNCONNECTED [7:4],\xsqr_reg[17]_i_17_n_4 ,\NLW_xsqr_reg[17]_i_17_CO_UNCONNECTED [2],\xsqr_reg[17]_i_17_n_6 ,\xsqr_reg[17]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xsqr[17]_i_33_n_0 ,\xsqr[17]_i_34_n_0 ,\xsqr[17]_i_35_n_0 }),
        .O({\NLW_xsqr_reg[17]_i_17_O_UNCONNECTED [7:3],\xsqr_reg[17]_i_17_n_13 ,\xsqr_reg[17]_i_17_n_14 ,\xsqr_reg[17]_i_17_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[17]_i_36_n_0 ,\xsqr[17]_i_37_n_0 ,\xsqr[17]_i_38_n_0 }));
  CARRY8 \xsqr_reg[17]_i_18 
       (.CI(\xsqr_reg[3]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[17]_i_18_CO_UNCONNECTED [7:3],\xsqr_reg[17]_i_18_n_5 ,\NLW_xsqr_reg[17]_i_18_CO_UNCONNECTED [1],\xsqr_reg[17]_i_18_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\xsqr[17]_i_39_n_0 ,\xsqr[17]_i_40_n_0 }),
        .O({\NLW_xsqr_reg[17]_i_18_O_UNCONNECTED [7:2],\xsqr_reg[17]_i_18_n_14 ,\xsqr_reg[17]_i_18_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[17]_i_41_n_0 ,\xsqr[17]_i_42_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xsqr_reg[17]_i_2 
       (.CI(\xsqr_reg[11]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[17]_i_2_CO_UNCONNECTED [7:5],\xsqr_reg[17]_i_2_n_3 ,\xsqr_reg[17]_i_2_n_4 ,\xsqr_reg[17]_i_2_n_5 ,\xsqr_reg[17]_i_2_n_6 ,\xsqr_reg[17]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\xsqr_reg[17]_i_3_n_13 ,\xsqr[17]_i_4_n_0 ,\xsqr[17]_i_5_n_0 ,\xsqr[17]_i_6_n_0 ,\xsqr[17]_i_7_n_0 }),
        .O({\NLW_xsqr_reg[17]_i_2_O_UNCONNECTED [7:6],xsqr0[17:12]}),
        .S({1'b0,1'b0,\xsqr_reg[17]_i_3_n_12 ,\xsqr[17]_i_8_n_0 ,\xsqr[17]_i_9_n_0 ,\xsqr[17]_i_10_n_0 ,\xsqr[17]_i_11_n_0 ,\xsqr[17]_i_12_n_0 }));
  CARRY8 \xsqr_reg[17]_i_3 
       (.CI(\xsqr_reg[17]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[17]_i_3_CO_UNCONNECTED [7:3],\xsqr_reg[17]_i_3_n_5 ,\xsqr_reg[17]_i_3_n_6 ,\xsqr_reg[17]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\dx_reg_n_0_[8] ,1'b0,\dx_reg_n_0_[7] }),
        .O({\NLW_xsqr_reg[17]_i_3_O_UNCONNECTED [7:4],\xsqr_reg[17]_i_3_n_12 ,\xsqr_reg[17]_i_3_n_13 ,\xsqr_reg[17]_i_3_n_14 ,\xsqr_reg[17]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[17]_i_14_n_0 ,\xsqr[17]_i_15_n_0 ,\xsqr[17]_i_16_n_0 }));
  FDCE \xsqr_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[18]_i_1_n_0 ),
        .Q(RESIZE0_in[0]));
  FDCE \xsqr_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[20]_i_1_n_0 ),
        .Q(RESIZE0_in[2]));
  FDCE \xsqr_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[21]_i_1_n_0 ),
        .Q(RESIZE0_in[3]));
  CARRY8 \xsqr_reg[21]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[21]_i_2_n_0 ,\xsqr_reg[21]_i_2_n_1 ,\xsqr_reg[21]_i_2_n_2 ,\xsqr_reg[21]_i_2_n_3 ,\xsqr_reg[21]_i_2_n_4 ,\xsqr_reg[21]_i_2_n_5 ,\xsqr_reg[21]_i_2_n_6 ,\xsqr_reg[21]_i_2_n_7 }),
        .DI({\xsqr[21]_i_4_n_0 ,\xsqr[21]_i_5_n_0 ,\xsqr[21]_i_6_n_0 ,\xsqr[21]_i_7_n_0 ,\xsqr[21]_i_8_n_0 ,\xsqr[21]_i_9_n_0 ,A[1],1'b0}),
        .O({\xsqr_reg[21]_i_2_n_8 ,\xsqr_reg[21]_i_2_n_9 ,\xsqr_reg[21]_i_2_n_10 ,\xsqr_reg[21]_i_2_n_11 ,\xsqr_reg[21]_i_2_n_12 ,\xsqr_reg[21]_i_2_n_13 ,xsqr00_in[2],\NLW_xsqr_reg[21]_i_2_O_UNCONNECTED [0]}),
        .S({\xsqr[21]_i_10_n_0 ,\xsqr[21]_i_11_n_0 ,\xsqr[21]_i_12_n_0 ,\xsqr[21]_i_13_n_0 ,\xsqr[21]_i_14_n_0 ,\xsqr[21]_i_15_n_0 ,\xsqr[21]_i_16_n_0 ,1'b0}));
  CARRY8 \xsqr_reg[21]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[21]_i_3_n_0 ,\xsqr_reg[21]_i_3_n_1 ,\xsqr_reg[21]_i_3_n_2 ,\xsqr_reg[21]_i_3_n_3 ,\xsqr_reg[21]_i_3_n_4 ,\xsqr_reg[21]_i_3_n_5 ,\xsqr_reg[21]_i_3_n_6 ,\xsqr_reg[21]_i_3_n_7 }),
        .DI({\xsqr[21]_i_17_n_0 ,\xsqr[21]_i_18_n_0 ,A[4],\xsqr[21]_i_19_n_0 ,\xsqr[21]_i_20_n_0 ,\xsqr[21]_i_21_n_0 ,\xsqr[21]_i_22_n_0 ,1'b0}),
        .O({\xsqr_reg[21]_i_3_n_8 ,\xsqr_reg[21]_i_3_n_9 ,\xsqr_reg[21]_i_3_n_10 ,\xsqr_reg[21]_i_3_n_11 ,\xsqr_reg[21]_i_3_n_12 ,\xsqr_reg[21]_i_3_n_13 ,\xsqr_reg[21]_i_3_n_14 ,\xsqr_reg[21]_i_3_n_15 }),
        .S({\xsqr[21]_i_23_n_0 ,\xsqr[21]_i_24_n_0 ,\xsqr[21]_i_25_n_0 ,\xsqr[21]_i_26_n_0 ,\xsqr[21]_i_27_n_0 ,\xsqr[21]_i_28_n_0 ,\xsqr[21]_i_29_n_0 ,\xsqr[21]_i_30_n_0 }));
  FDCE \xsqr_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[22]_i_1_n_0 ),
        .Q(RESIZE0_in[4]));
  FDCE \xsqr_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[23]_i_1_n_0 ),
        .Q(RESIZE0_in[5]));
  FDCE \xsqr_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[24]_i_1_n_0 ),
        .Q(RESIZE0_in[6]));
  FDCE \xsqr_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[25]_i_1_n_0 ),
        .Q(RESIZE0_in[7]));
  FDCE \xsqr_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[26]_i_1_n_0 ),
        .Q(RESIZE0_in[8]));
  FDCE \xsqr_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[27]_i_1_n_0 ),
        .Q(RESIZE0_in[9]));
  FDCE \xsqr_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[28]_i_1_n_0 ),
        .Q(RESIZE0_in[10]));
  FDCE \xsqr_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[29]_i_1_n_0 ),
        .Q(RESIZE0_in[11]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xsqr_reg[29]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[29]_i_2_n_0 ,\xsqr_reg[29]_i_2_n_1 ,\xsqr_reg[29]_i_2_n_2 ,\xsqr_reg[29]_i_2_n_3 ,\xsqr_reg[29]_i_2_n_4 ,\xsqr_reg[29]_i_2_n_5 ,\xsqr_reg[29]_i_2_n_6 ,\xsqr_reg[29]_i_2_n_7 }),
        .DI({\xsqr[29]_i_3_n_0 ,\xsqr[29]_i_4_n_0 ,\xsqr[29]_i_5_n_0 ,\xsqr[29]_i_6_n_0 ,\xsqr[29]_i_7_n_0 ,\xsqr[29]_i_8_n_0 ,\xsqr[29]_i_9_n_0 ,\xsqr[29]_i_10_n_0 }),
        .O(xsqr00_in[11:4]),
        .S({\xsqr[29]_i_11_n_0 ,\xsqr[29]_i_12_n_0 ,\xsqr[29]_i_13_n_0 ,\xsqr[29]_i_14_n_0 ,\xsqr[29]_i_15_n_0 ,\xsqr[29]_i_16_n_0 ,\xsqr[29]_i_17_n_0 ,\xsqr[29]_i_18_n_0 }));
  FDCE \xsqr_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[2]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[2] ));
  FDCE \xsqr_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[30]_i_1_n_0 ),
        .Q(RESIZE0_in[12]));
  FDCE \xsqr_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[31]_i_1_n_0 ),
        .Q(RESIZE0_in[13]));
  FDCE \xsqr_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[32]_i_1_n_0 ),
        .Q(RESIZE0_in[14]));
  FDCE \xsqr_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[33]_i_1_n_0 ),
        .Q(RESIZE0_in[15]));
  FDCE \xsqr_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[34]_i_1_n_0 ),
        .Q(RESIZE0_in[16]));
  FDCE \xsqr_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[35]_i_1_n_0 ),
        .Q(RESIZE0_in[17]));
  CARRY8 \xsqr_reg[35]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[35]_i_13_n_0 ,\xsqr_reg[35]_i_13_n_1 ,\xsqr_reg[35]_i_13_n_2 ,\xsqr_reg[35]_i_13_n_3 ,\xsqr_reg[35]_i_13_n_4 ,\xsqr_reg[35]_i_13_n_5 ,\xsqr_reg[35]_i_13_n_6 ,\xsqr_reg[35]_i_13_n_7 }),
        .DI({\xsqr[35]_i_19_n_0 ,\xsqr[35]_i_20_n_0 ,\xsqr[35]_i_21_n_0 ,\xsqr[35]_i_22_n_0 ,\xsqr[35]_i_23_n_0 ,\xsqr[21]_i_31_n_0 ,\xsqr[35]_i_24_n_0 ,1'b0}),
        .O({\xsqr_reg[35]_i_13_n_8 ,\xsqr_reg[35]_i_13_n_9 ,\xsqr_reg[35]_i_13_n_10 ,\xsqr_reg[35]_i_13_n_11 ,\xsqr_reg[35]_i_13_n_12 ,\xsqr_reg[35]_i_13_n_13 ,\xsqr_reg[35]_i_13_n_14 ,\xsqr_reg[35]_i_13_n_15 }),
        .S({\xsqr[35]_i_25_n_0 ,\xsqr[35]_i_26_n_0 ,\xsqr[35]_i_27_n_0 ,\xsqr[35]_i_28_n_0 ,\xsqr[35]_i_29_n_0 ,\xsqr[35]_i_30_n_0 ,\xsqr[35]_i_31_n_0 ,\xsqr[35]_i_32_n_0 }));
  CARRY8 \xsqr_reg[35]_i_17 
       (.CI(\xsqr_reg[21]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[35]_i_17_CO_UNCONNECTED [7:4],\xsqr_reg[35]_i_17_n_4 ,\NLW_xsqr_reg[35]_i_17_CO_UNCONNECTED [2],\xsqr_reg[35]_i_17_n_6 ,\xsqr_reg[35]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xsqr[35]_i_33_n_0 ,\xsqr[35]_i_34_n_0 ,\xsqr[35]_i_35_n_0 }),
        .O({\NLW_xsqr_reg[35]_i_17_O_UNCONNECTED [7:3],\xsqr_reg[35]_i_17_n_13 ,\xsqr_reg[35]_i_17_n_14 ,\xsqr_reg[35]_i_17_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[35]_i_36_n_0 ,\xsqr[35]_i_37_n_0 ,\xsqr[35]_i_38_n_0 }));
  CARRY8 \xsqr_reg[35]_i_18 
       (.CI(\xsqr_reg[21]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[35]_i_18_CO_UNCONNECTED [7:3],\xsqr_reg[35]_i_18_n_5 ,\NLW_xsqr_reg[35]_i_18_CO_UNCONNECTED [1],\xsqr_reg[35]_i_18_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\xsqr[35]_i_39_n_0 ,\xsqr[35]_i_40_n_0 }),
        .O({\NLW_xsqr_reg[35]_i_18_O_UNCONNECTED [7:2],\xsqr_reg[35]_i_18_n_14 ,\xsqr_reg[35]_i_18_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[35]_i_41_n_0 ,\xsqr[35]_i_42_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xsqr_reg[35]_i_2 
       (.CI(\xsqr_reg[29]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[35]_i_2_CO_UNCONNECTED [7:5],\xsqr_reg[35]_i_2_n_3 ,\xsqr_reg[35]_i_2_n_4 ,\xsqr_reg[35]_i_2_n_5 ,\xsqr_reg[35]_i_2_n_6 ,\xsqr_reg[35]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\xsqr_reg[35]_i_3_n_13 ,\xsqr[35]_i_4_n_0 ,\xsqr[35]_i_5_n_0 ,\xsqr[35]_i_6_n_0 ,\xsqr[35]_i_7_n_0 }),
        .O({\NLW_xsqr_reg[35]_i_2_O_UNCONNECTED [7:6],xsqr00_in[17:12]}),
        .S({1'b0,1'b0,\xsqr_reg[35]_i_3_n_12 ,\xsqr[35]_i_8_n_0 ,\xsqr[35]_i_9_n_0 ,\xsqr[35]_i_10_n_0 ,\xsqr[35]_i_11_n_0 ,\xsqr[35]_i_12_n_0 }));
  CARRY8 \xsqr_reg[35]_i_3 
       (.CI(\xsqr_reg[35]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[35]_i_3_CO_UNCONNECTED [7:3],\xsqr_reg[35]_i_3_n_5 ,\xsqr_reg[35]_i_3_n_6 ,\xsqr_reg[35]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,A[8],1'b0,A[7]}),
        .O({\NLW_xsqr_reg[35]_i_3_O_UNCONNECTED [7:4],\xsqr_reg[35]_i_3_n_12 ,\xsqr_reg[35]_i_3_n_13 ,\xsqr_reg[35]_i_3_n_14 ,\xsqr_reg[35]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[35]_i_14_n_0 ,\xsqr[35]_i_15_n_0 ,\xsqr[35]_i_16_n_0 }));
  FDCE \xsqr_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[36]_i_1_n_0 ),
        .Q(RESIZE[0]));
  FDCE \xsqr_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[38]_i_1_n_0 ),
        .Q(RESIZE[2]));
  FDCE \xsqr_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[39]_i_1_n_0 ),
        .Q(RESIZE[3]));
  CARRY8 \xsqr_reg[39]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[39]_i_2_n_0 ,\xsqr_reg[39]_i_2_n_1 ,\xsqr_reg[39]_i_2_n_2 ,\xsqr_reg[39]_i_2_n_3 ,\xsqr_reg[39]_i_2_n_4 ,\xsqr_reg[39]_i_2_n_5 ,\xsqr_reg[39]_i_2_n_6 ,\xsqr_reg[39]_i_2_n_7 }),
        .DI({\xsqr[39]_i_4_n_0 ,\xsqr[39]_i_5_n_0 ,\xsqr[39]_i_6_n_0 ,\xsqr[39]_i_7_n_0 ,\xsqr[39]_i_8_n_0 ,\xsqr[39]_i_9_n_0 ,\dx_reg_n_0_[19] ,1'b0}),
        .O({\xsqr_reg[39]_i_2_n_8 ,\xsqr_reg[39]_i_2_n_9 ,\xsqr_reg[39]_i_2_n_10 ,\xsqr_reg[39]_i_2_n_11 ,\xsqr_reg[39]_i_2_n_12 ,\xsqr_reg[39]_i_2_n_13 ,xsqr01_in[2],\NLW_xsqr_reg[39]_i_2_O_UNCONNECTED [0]}),
        .S({\xsqr[39]_i_10_n_0 ,\xsqr[39]_i_11_n_0 ,\xsqr[39]_i_12_n_0 ,\xsqr[39]_i_13_n_0 ,\xsqr[39]_i_14_n_0 ,\xsqr[39]_i_15_n_0 ,\xsqr[39]_i_16_n_0 ,1'b0}));
  CARRY8 \xsqr_reg[39]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[39]_i_3_n_0 ,\xsqr_reg[39]_i_3_n_1 ,\xsqr_reg[39]_i_3_n_2 ,\xsqr_reg[39]_i_3_n_3 ,\xsqr_reg[39]_i_3_n_4 ,\xsqr_reg[39]_i_3_n_5 ,\xsqr_reg[39]_i_3_n_6 ,\xsqr_reg[39]_i_3_n_7 }),
        .DI({\xsqr[39]_i_17_n_0 ,\xsqr[39]_i_18_n_0 ,\dx_reg_n_0_[22] ,\xsqr[39]_i_19_n_0 ,\xsqr[39]_i_20_n_0 ,\xsqr[39]_i_21_n_0 ,\xsqr[39]_i_22_n_0 ,1'b0}),
        .O({\xsqr_reg[39]_i_3_n_8 ,\xsqr_reg[39]_i_3_n_9 ,\xsqr_reg[39]_i_3_n_10 ,\xsqr_reg[39]_i_3_n_11 ,\xsqr_reg[39]_i_3_n_12 ,\xsqr_reg[39]_i_3_n_13 ,\xsqr_reg[39]_i_3_n_14 ,\xsqr_reg[39]_i_3_n_15 }),
        .S({\xsqr[39]_i_23_n_0 ,\xsqr[39]_i_24_n_0 ,\xsqr[39]_i_25_n_0 ,\xsqr[39]_i_26_n_0 ,\xsqr[39]_i_27_n_0 ,\xsqr[39]_i_28_n_0 ,\xsqr[39]_i_29_n_0 ,\xsqr[39]_i_30_n_0 }));
  FDCE \xsqr_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[3]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[3] ));
  CARRY8 \xsqr_reg[3]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[3]_i_2_n_0 ,\xsqr_reg[3]_i_2_n_1 ,\xsqr_reg[3]_i_2_n_2 ,\xsqr_reg[3]_i_2_n_3 ,\xsqr_reg[3]_i_2_n_4 ,\xsqr_reg[3]_i_2_n_5 ,\xsqr_reg[3]_i_2_n_6 ,\xsqr_reg[3]_i_2_n_7 }),
        .DI({\xsqr[3]_i_4_n_0 ,\xsqr[3]_i_5_n_0 ,\xsqr[3]_i_6_n_0 ,\xsqr[3]_i_7_n_0 ,\xsqr[3]_i_8_n_0 ,\xsqr[3]_i_9_n_0 ,\dx_reg_n_0_[1] ,1'b0}),
        .O({\xsqr_reg[3]_i_2_n_8 ,\xsqr_reg[3]_i_2_n_9 ,\xsqr_reg[3]_i_2_n_10 ,\xsqr_reg[3]_i_2_n_11 ,\xsqr_reg[3]_i_2_n_12 ,\xsqr_reg[3]_i_2_n_13 ,xsqr0[2],\NLW_xsqr_reg[3]_i_2_O_UNCONNECTED [0]}),
        .S({\xsqr[3]_i_10_n_0 ,\xsqr[3]_i_11_n_0 ,\xsqr[3]_i_12_n_0 ,\xsqr[3]_i_13_n_0 ,\xsqr[3]_i_14_n_0 ,\xsqr[3]_i_15_n_0 ,\xsqr[3]_i_16_n_0 ,1'b0}));
  CARRY8 \xsqr_reg[3]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[3]_i_3_n_0 ,\xsqr_reg[3]_i_3_n_1 ,\xsqr_reg[3]_i_3_n_2 ,\xsqr_reg[3]_i_3_n_3 ,\xsqr_reg[3]_i_3_n_4 ,\xsqr_reg[3]_i_3_n_5 ,\xsqr_reg[3]_i_3_n_6 ,\xsqr_reg[3]_i_3_n_7 }),
        .DI({\xsqr[3]_i_17_n_0 ,\xsqr[3]_i_18_n_0 ,\dx_reg_n_0_[4] ,\xsqr[3]_i_19_n_0 ,\xsqr[3]_i_20_n_0 ,\xsqr[3]_i_21_n_0 ,\xsqr[3]_i_22_n_0 ,1'b0}),
        .O({\xsqr_reg[3]_i_3_n_8 ,\xsqr_reg[3]_i_3_n_9 ,\xsqr_reg[3]_i_3_n_10 ,\xsqr_reg[3]_i_3_n_11 ,\xsqr_reg[3]_i_3_n_12 ,\xsqr_reg[3]_i_3_n_13 ,\xsqr_reg[3]_i_3_n_14 ,\xsqr_reg[3]_i_3_n_15 }),
        .S({\xsqr[3]_i_23_n_0 ,\xsqr[3]_i_24_n_0 ,\xsqr[3]_i_25_n_0 ,\xsqr[3]_i_26_n_0 ,\xsqr[3]_i_27_n_0 ,\xsqr[3]_i_28_n_0 ,\xsqr[3]_i_29_n_0 ,\xsqr[3]_i_30_n_0 }));
  FDCE \xsqr_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[40]_i_1_n_0 ),
        .Q(RESIZE[4]));
  FDCE \xsqr_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[41]_i_1_n_0 ),
        .Q(RESIZE[5]));
  FDCE \xsqr_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[42]_i_1_n_0 ),
        .Q(RESIZE[6]));
  FDCE \xsqr_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[43]_i_1_n_0 ),
        .Q(RESIZE[7]));
  FDCE \xsqr_reg[44] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[44]_i_1_n_0 ),
        .Q(RESIZE[8]));
  FDCE \xsqr_reg[45] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[45]_i_1_n_0 ),
        .Q(RESIZE[9]));
  FDCE \xsqr_reg[46] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[46]_i_1_n_0 ),
        .Q(RESIZE[10]));
  FDCE \xsqr_reg[47] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[47]_i_1_n_0 ),
        .Q(RESIZE[11]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xsqr_reg[47]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[47]_i_2_n_0 ,\xsqr_reg[47]_i_2_n_1 ,\xsqr_reg[47]_i_2_n_2 ,\xsqr_reg[47]_i_2_n_3 ,\xsqr_reg[47]_i_2_n_4 ,\xsqr_reg[47]_i_2_n_5 ,\xsqr_reg[47]_i_2_n_6 ,\xsqr_reg[47]_i_2_n_7 }),
        .DI({\xsqr[47]_i_3_n_0 ,\xsqr[47]_i_4_n_0 ,\xsqr[47]_i_5_n_0 ,\xsqr[47]_i_6_n_0 ,\xsqr[47]_i_7_n_0 ,\xsqr[47]_i_8_n_0 ,\xsqr[47]_i_9_n_0 ,\xsqr[47]_i_10_n_0 }),
        .O(xsqr01_in[11:4]),
        .S({\xsqr[47]_i_11_n_0 ,\xsqr[47]_i_12_n_0 ,\xsqr[47]_i_13_n_0 ,\xsqr[47]_i_14_n_0 ,\xsqr[47]_i_15_n_0 ,\xsqr[47]_i_16_n_0 ,\xsqr[47]_i_17_n_0 ,\xsqr[47]_i_18_n_0 }));
  FDCE \xsqr_reg[48] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[48]_i_1_n_0 ),
        .Q(RESIZE[12]));
  FDCE \xsqr_reg[49] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[49]_i_1_n_0 ),
        .Q(RESIZE[13]));
  FDCE \xsqr_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[4]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[4] ));
  FDCE \xsqr_reg[50] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[50]_i_1_n_0 ),
        .Q(RESIZE[14]));
  FDCE \xsqr_reg[51] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[51]_i_1_n_0 ),
        .Q(RESIZE[15]));
  FDCE \xsqr_reg[52] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[52]_i_1_n_0 ),
        .Q(RESIZE[16]));
  FDCE \xsqr_reg[53] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[53]_i_1_n_0 ),
        .Q(RESIZE[17]));
  CARRY8 \xsqr_reg[53]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[53]_i_13_n_0 ,\xsqr_reg[53]_i_13_n_1 ,\xsqr_reg[53]_i_13_n_2 ,\xsqr_reg[53]_i_13_n_3 ,\xsqr_reg[53]_i_13_n_4 ,\xsqr_reg[53]_i_13_n_5 ,\xsqr_reg[53]_i_13_n_6 ,\xsqr_reg[53]_i_13_n_7 }),
        .DI({\xsqr[53]_i_19_n_0 ,\xsqr[53]_i_20_n_0 ,\xsqr[53]_i_21_n_0 ,\xsqr[53]_i_22_n_0 ,\xsqr[53]_i_23_n_0 ,\xsqr[39]_i_31_n_0 ,\xsqr[53]_i_24_n_0 ,1'b0}),
        .O({\xsqr_reg[53]_i_13_n_8 ,\xsqr_reg[53]_i_13_n_9 ,\xsqr_reg[53]_i_13_n_10 ,\xsqr_reg[53]_i_13_n_11 ,\xsqr_reg[53]_i_13_n_12 ,\xsqr_reg[53]_i_13_n_13 ,\xsqr_reg[53]_i_13_n_14 ,\xsqr_reg[53]_i_13_n_15 }),
        .S({\xsqr[53]_i_25_n_0 ,\xsqr[53]_i_26_n_0 ,\xsqr[53]_i_27_n_0 ,\xsqr[53]_i_28_n_0 ,\xsqr[53]_i_29_n_0 ,\xsqr[53]_i_30_n_0 ,\xsqr[53]_i_31_n_0 ,\xsqr[53]_i_32_n_0 }));
  CARRY8 \xsqr_reg[53]_i_17 
       (.CI(\xsqr_reg[39]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[53]_i_17_CO_UNCONNECTED [7:4],\xsqr_reg[53]_i_17_n_4 ,\NLW_xsqr_reg[53]_i_17_CO_UNCONNECTED [2],\xsqr_reg[53]_i_17_n_6 ,\xsqr_reg[53]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xsqr[53]_i_33_n_0 ,\xsqr[53]_i_34_n_0 ,\xsqr[53]_i_35_n_0 }),
        .O({\NLW_xsqr_reg[53]_i_17_O_UNCONNECTED [7:3],\xsqr_reg[53]_i_17_n_13 ,\xsqr_reg[53]_i_17_n_14 ,\xsqr_reg[53]_i_17_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[53]_i_36_n_0 ,\xsqr[53]_i_37_n_0 ,\xsqr[53]_i_38_n_0 }));
  CARRY8 \xsqr_reg[53]_i_18 
       (.CI(\xsqr_reg[39]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[53]_i_18_CO_UNCONNECTED [7:3],\xsqr_reg[53]_i_18_n_5 ,\NLW_xsqr_reg[53]_i_18_CO_UNCONNECTED [1],\xsqr_reg[53]_i_18_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\xsqr[53]_i_39_n_0 ,\xsqr[53]_i_40_n_0 }),
        .O({\NLW_xsqr_reg[53]_i_18_O_UNCONNECTED [7:2],\xsqr_reg[53]_i_18_n_14 ,\xsqr_reg[53]_i_18_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[53]_i_41_n_0 ,\xsqr[53]_i_42_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xsqr_reg[53]_i_2 
       (.CI(\xsqr_reg[47]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[53]_i_2_CO_UNCONNECTED [7:5],\xsqr_reg[53]_i_2_n_3 ,\xsqr_reg[53]_i_2_n_4 ,\xsqr_reg[53]_i_2_n_5 ,\xsqr_reg[53]_i_2_n_6 ,\xsqr_reg[53]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\xsqr_reg[53]_i_3_n_13 ,\xsqr[53]_i_4_n_0 ,\xsqr[53]_i_5_n_0 ,\xsqr[53]_i_6_n_0 ,\xsqr[53]_i_7_n_0 }),
        .O({\NLW_xsqr_reg[53]_i_2_O_UNCONNECTED [7:6],xsqr01_in[17:12]}),
        .S({1'b0,1'b0,\xsqr_reg[53]_i_3_n_12 ,\xsqr[53]_i_8_n_0 ,\xsqr[53]_i_9_n_0 ,\xsqr[53]_i_10_n_0 ,\xsqr[53]_i_11_n_0 ,\xsqr[53]_i_12_n_0 }));
  CARRY8 \xsqr_reg[53]_i_3 
       (.CI(\xsqr_reg[53]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[53]_i_3_CO_UNCONNECTED [7:3],\xsqr_reg[53]_i_3_n_5 ,\xsqr_reg[53]_i_3_n_6 ,\xsqr_reg[53]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\dx_reg_n_0_[26] ,1'b0,\dx_reg_n_0_[25] }),
        .O({\NLW_xsqr_reg[53]_i_3_O_UNCONNECTED [7:4],\xsqr_reg[53]_i_3_n_12 ,\xsqr_reg[53]_i_3_n_13 ,\xsqr_reg[53]_i_3_n_14 ,\xsqr_reg[53]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[53]_i_14_n_0 ,\xsqr[53]_i_15_n_0 ,\xsqr[53]_i_16_n_0 }));
  FDCE \xsqr_reg[54] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[54]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[54] ));
  FDCE \xsqr_reg[56] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[56]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[56] ));
  FDCE \xsqr_reg[57] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[57]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[57] ));
  CARRY8 \xsqr_reg[57]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[57]_i_2_n_0 ,\xsqr_reg[57]_i_2_n_1 ,\xsqr_reg[57]_i_2_n_2 ,\xsqr_reg[57]_i_2_n_3 ,\xsqr_reg[57]_i_2_n_4 ,\xsqr_reg[57]_i_2_n_5 ,\xsqr_reg[57]_i_2_n_6 ,\xsqr_reg[57]_i_2_n_7 }),
        .DI({\xsqr[57]_i_4_n_0 ,\xsqr[57]_i_5_n_0 ,\xsqr[57]_i_6_n_0 ,\xsqr[57]_i_7_n_0 ,\xsqr[57]_i_8_n_0 ,\xsqr[57]_i_9_n_0 ,\dx_reg_n_0_[28] ,1'b0}),
        .O({\xsqr_reg[57]_i_2_n_8 ,\xsqr_reg[57]_i_2_n_9 ,\xsqr_reg[57]_i_2_n_10 ,\xsqr_reg[57]_i_2_n_11 ,\xsqr_reg[57]_i_2_n_12 ,\xsqr_reg[57]_i_2_n_13 ,xsqr02_in[2],\NLW_xsqr_reg[57]_i_2_O_UNCONNECTED [0]}),
        .S({\xsqr[57]_i_10_n_0 ,\xsqr[57]_i_11_n_0 ,\xsqr[57]_i_12_n_0 ,\xsqr[57]_i_13_n_0 ,\xsqr[57]_i_14_n_0 ,\xsqr[57]_i_15_n_0 ,\xsqr[57]_i_16_n_0 ,1'b0}));
  CARRY8 \xsqr_reg[57]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[57]_i_3_n_0 ,\xsqr_reg[57]_i_3_n_1 ,\xsqr_reg[57]_i_3_n_2 ,\xsqr_reg[57]_i_3_n_3 ,\xsqr_reg[57]_i_3_n_4 ,\xsqr_reg[57]_i_3_n_5 ,\xsqr_reg[57]_i_3_n_6 ,\xsqr_reg[57]_i_3_n_7 }),
        .DI({\xsqr[57]_i_17_n_0 ,\xsqr[57]_i_18_n_0 ,\dx_reg_n_0_[31] ,\xsqr[57]_i_19_n_0 ,\xsqr[57]_i_20_n_0 ,\xsqr[57]_i_21_n_0 ,\xsqr[57]_i_22_n_0 ,1'b0}),
        .O({\xsqr_reg[57]_i_3_n_8 ,\xsqr_reg[57]_i_3_n_9 ,\xsqr_reg[57]_i_3_n_10 ,\xsqr_reg[57]_i_3_n_11 ,\xsqr_reg[57]_i_3_n_12 ,\xsqr_reg[57]_i_3_n_13 ,\xsqr_reg[57]_i_3_n_14 ,\xsqr_reg[57]_i_3_n_15 }),
        .S({\xsqr[57]_i_23_n_0 ,\xsqr[57]_i_24_n_0 ,\xsqr[57]_i_25_n_0 ,\xsqr[57]_i_26_n_0 ,\xsqr[57]_i_27_n_0 ,\xsqr[57]_i_28_n_0 ,\xsqr[57]_i_29_n_0 ,\xsqr[57]_i_30_n_0 }));
  FDCE \xsqr_reg[58] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[58]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[58] ));
  FDCE \xsqr_reg[59] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[59]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[59] ));
  FDCE \xsqr_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[5]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[5] ));
  FDCE \xsqr_reg[60] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[60]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[60] ));
  FDCE \xsqr_reg[61] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[61]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[61] ));
  FDCE \xsqr_reg[62] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[62]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[62] ));
  FDCE \xsqr_reg[63] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[63]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[63] ));
  FDCE \xsqr_reg[64] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[64]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[64] ));
  FDCE \xsqr_reg[65] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[65]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[65] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xsqr_reg[65]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[65]_i_2_n_0 ,\xsqr_reg[65]_i_2_n_1 ,\xsqr_reg[65]_i_2_n_2 ,\xsqr_reg[65]_i_2_n_3 ,\xsqr_reg[65]_i_2_n_4 ,\xsqr_reg[65]_i_2_n_5 ,\xsqr_reg[65]_i_2_n_6 ,\xsqr_reg[65]_i_2_n_7 }),
        .DI({\xsqr[65]_i_3_n_0 ,\xsqr[65]_i_4_n_0 ,\xsqr[65]_i_5_n_0 ,\xsqr[65]_i_6_n_0 ,\xsqr[65]_i_7_n_0 ,\xsqr[65]_i_8_n_0 ,\xsqr[65]_i_9_n_0 ,\xsqr[65]_i_10_n_0 }),
        .O(xsqr02_in[11:4]),
        .S({\xsqr[65]_i_11_n_0 ,\xsqr[65]_i_12_n_0 ,\xsqr[65]_i_13_n_0 ,\xsqr[65]_i_14_n_0 ,\xsqr[65]_i_15_n_0 ,\xsqr[65]_i_16_n_0 ,\xsqr[65]_i_17_n_0 ,\xsqr[65]_i_18_n_0 }));
  FDCE \xsqr_reg[66] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[66]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[66] ));
  FDCE \xsqr_reg[67] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[67]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[67] ));
  FDCE \xsqr_reg[68] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[68]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[68] ));
  FDCE \xsqr_reg[69] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[69]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[69] ));
  FDCE \xsqr_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[6]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[6] ));
  FDCE \xsqr_reg[70] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[70]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[70] ));
  FDCE \xsqr_reg[71] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[71]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[71] ));
  CARRY8 \xsqr_reg[71]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[71]_i_13_n_0 ,\xsqr_reg[71]_i_13_n_1 ,\xsqr_reg[71]_i_13_n_2 ,\xsqr_reg[71]_i_13_n_3 ,\xsqr_reg[71]_i_13_n_4 ,\xsqr_reg[71]_i_13_n_5 ,\xsqr_reg[71]_i_13_n_6 ,\xsqr_reg[71]_i_13_n_7 }),
        .DI({\xsqr[71]_i_19_n_0 ,\xsqr[71]_i_20_n_0 ,\xsqr[71]_i_21_n_0 ,\xsqr[71]_i_22_n_0 ,\xsqr[71]_i_23_n_0 ,\xsqr[57]_i_31_n_0 ,\xsqr[71]_i_24_n_0 ,1'b0}),
        .O({\xsqr_reg[71]_i_13_n_8 ,\xsqr_reg[71]_i_13_n_9 ,\xsqr_reg[71]_i_13_n_10 ,\xsqr_reg[71]_i_13_n_11 ,\xsqr_reg[71]_i_13_n_12 ,\xsqr_reg[71]_i_13_n_13 ,\xsqr_reg[71]_i_13_n_14 ,\xsqr_reg[71]_i_13_n_15 }),
        .S({\xsqr[71]_i_25_n_0 ,\xsqr[71]_i_26_n_0 ,\xsqr[71]_i_27_n_0 ,\xsqr[71]_i_28_n_0 ,\xsqr[71]_i_29_n_0 ,\xsqr[71]_i_30_n_0 ,\xsqr[71]_i_31_n_0 ,\xsqr[71]_i_32_n_0 }));
  CARRY8 \xsqr_reg[71]_i_17 
       (.CI(\xsqr_reg[57]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[71]_i_17_CO_UNCONNECTED [7:4],\xsqr_reg[71]_i_17_n_4 ,\NLW_xsqr_reg[71]_i_17_CO_UNCONNECTED [2],\xsqr_reg[71]_i_17_n_6 ,\xsqr_reg[71]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xsqr[71]_i_33_n_0 ,\xsqr[71]_i_34_n_0 ,\xsqr[71]_i_35_n_0 }),
        .O({\NLW_xsqr_reg[71]_i_17_O_UNCONNECTED [7:3],\xsqr_reg[71]_i_17_n_13 ,\xsqr_reg[71]_i_17_n_14 ,\xsqr_reg[71]_i_17_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[71]_i_36_n_0 ,\xsqr[71]_i_37_n_0 ,\xsqr[71]_i_38_n_0 }));
  CARRY8 \xsqr_reg[71]_i_18 
       (.CI(\xsqr_reg[57]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[71]_i_18_CO_UNCONNECTED [7:3],\xsqr_reg[71]_i_18_n_5 ,\NLW_xsqr_reg[71]_i_18_CO_UNCONNECTED [1],\xsqr_reg[71]_i_18_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\xsqr[71]_i_39_n_0 ,\xsqr[71]_i_40_n_0 }),
        .O({\NLW_xsqr_reg[71]_i_18_O_UNCONNECTED [7:2],\xsqr_reg[71]_i_18_n_14 ,\xsqr_reg[71]_i_18_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[71]_i_41_n_0 ,\xsqr[71]_i_42_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xsqr_reg[71]_i_2 
       (.CI(\xsqr_reg[65]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[71]_i_2_CO_UNCONNECTED [7:5],\xsqr_reg[71]_i_2_n_3 ,\xsqr_reg[71]_i_2_n_4 ,\xsqr_reg[71]_i_2_n_5 ,\xsqr_reg[71]_i_2_n_6 ,\xsqr_reg[71]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\xsqr_reg[71]_i_3_n_13 ,\xsqr[71]_i_4_n_0 ,\xsqr[71]_i_5_n_0 ,\xsqr[71]_i_6_n_0 ,\xsqr[71]_i_7_n_0 }),
        .O({\NLW_xsqr_reg[71]_i_2_O_UNCONNECTED [7:6],xsqr02_in[17:12]}),
        .S({1'b0,1'b0,\xsqr_reg[71]_i_3_n_12 ,\xsqr[71]_i_8_n_0 ,\xsqr[71]_i_9_n_0 ,\xsqr[71]_i_10_n_0 ,\xsqr[71]_i_11_n_0 ,\xsqr[71]_i_12_n_0 }));
  CARRY8 \xsqr_reg[71]_i_3 
       (.CI(\xsqr_reg[71]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[71]_i_3_CO_UNCONNECTED [7:3],\xsqr_reg[71]_i_3_n_5 ,\xsqr_reg[71]_i_3_n_6 ,\xsqr_reg[71]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\dx_reg_n_0_[35] ,1'b0,\dx_reg_n_0_[34] }),
        .O({\NLW_xsqr_reg[71]_i_3_O_UNCONNECTED [7:4],\xsqr_reg[71]_i_3_n_12 ,\xsqr_reg[71]_i_3_n_13 ,\xsqr_reg[71]_i_3_n_14 ,\xsqr_reg[71]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[71]_i_14_n_0 ,\xsqr[71]_i_15_n_0 ,\xsqr[71]_i_16_n_0 }));
  FDCE \xsqr_reg[72] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[72]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[72] ));
  FDCE \xsqr_reg[74] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[74]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[74] ));
  FDCE \xsqr_reg[75] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[75]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[75] ));
  CARRY8 \xsqr_reg[75]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[75]_i_2_n_0 ,\xsqr_reg[75]_i_2_n_1 ,\xsqr_reg[75]_i_2_n_2 ,\xsqr_reg[75]_i_2_n_3 ,\xsqr_reg[75]_i_2_n_4 ,\xsqr_reg[75]_i_2_n_5 ,\xsqr_reg[75]_i_2_n_6 ,\xsqr_reg[75]_i_2_n_7 }),
        .DI({\xsqr[75]_i_4_n_0 ,\xsqr[75]_i_5_n_0 ,\xsqr[75]_i_6_n_0 ,\xsqr[75]_i_7_n_0 ,\xsqr[75]_i_8_n_0 ,\xsqr[75]_i_9_n_0 ,\dx_reg_n_0_[37] ,1'b0}),
        .O({\xsqr_reg[75]_i_2_n_8 ,\xsqr_reg[75]_i_2_n_9 ,\xsqr_reg[75]_i_2_n_10 ,\xsqr_reg[75]_i_2_n_11 ,\xsqr_reg[75]_i_2_n_12 ,\xsqr_reg[75]_i_2_n_13 ,xsqr03_in[2],\NLW_xsqr_reg[75]_i_2_O_UNCONNECTED [0]}),
        .S({\xsqr[75]_i_10_n_0 ,\xsqr[75]_i_11_n_0 ,\xsqr[75]_i_12_n_0 ,\xsqr[75]_i_13_n_0 ,\xsqr[75]_i_14_n_0 ,\xsqr[75]_i_15_n_0 ,\xsqr[75]_i_16_n_0 ,1'b0}));
  CARRY8 \xsqr_reg[75]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[75]_i_3_n_0 ,\xsqr_reg[75]_i_3_n_1 ,\xsqr_reg[75]_i_3_n_2 ,\xsqr_reg[75]_i_3_n_3 ,\xsqr_reg[75]_i_3_n_4 ,\xsqr_reg[75]_i_3_n_5 ,\xsqr_reg[75]_i_3_n_6 ,\xsqr_reg[75]_i_3_n_7 }),
        .DI({\xsqr[75]_i_17_n_0 ,\xsqr[75]_i_18_n_0 ,\dx_reg_n_0_[40] ,\xsqr[75]_i_19_n_0 ,\xsqr[75]_i_20_n_0 ,\xsqr[75]_i_21_n_0 ,\xsqr[75]_i_22_n_0 ,1'b0}),
        .O({\xsqr_reg[75]_i_3_n_8 ,\xsqr_reg[75]_i_3_n_9 ,\xsqr_reg[75]_i_3_n_10 ,\xsqr_reg[75]_i_3_n_11 ,\xsqr_reg[75]_i_3_n_12 ,\xsqr_reg[75]_i_3_n_13 ,\xsqr_reg[75]_i_3_n_14 ,\xsqr_reg[75]_i_3_n_15 }),
        .S({\xsqr[75]_i_23_n_0 ,\xsqr[75]_i_24_n_0 ,\xsqr[75]_i_25_n_0 ,\xsqr[75]_i_26_n_0 ,\xsqr[75]_i_27_n_0 ,\xsqr[75]_i_28_n_0 ,\xsqr[75]_i_29_n_0 ,\xsqr[75]_i_30_n_0 }));
  FDCE \xsqr_reg[76] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[76]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[76] ));
  FDCE \xsqr_reg[77] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[77]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[77] ));
  FDCE \xsqr_reg[78] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[78]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[78] ));
  FDCE \xsqr_reg[79] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[79]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[79] ));
  FDCE \xsqr_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[7]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[7] ));
  FDCE \xsqr_reg[80] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[80]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[80] ));
  FDCE \xsqr_reg[81] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[81]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[81] ));
  FDCE \xsqr_reg[82] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[82]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[82] ));
  FDCE \xsqr_reg[83] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[83]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[83] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xsqr_reg[83]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[83]_i_2_n_0 ,\xsqr_reg[83]_i_2_n_1 ,\xsqr_reg[83]_i_2_n_2 ,\xsqr_reg[83]_i_2_n_3 ,\xsqr_reg[83]_i_2_n_4 ,\xsqr_reg[83]_i_2_n_5 ,\xsqr_reg[83]_i_2_n_6 ,\xsqr_reg[83]_i_2_n_7 }),
        .DI({\xsqr[83]_i_3_n_0 ,\xsqr[83]_i_4_n_0 ,\xsqr[83]_i_5_n_0 ,\xsqr[83]_i_6_n_0 ,\xsqr[83]_i_7_n_0 ,\xsqr[83]_i_8_n_0 ,\xsqr[83]_i_9_n_0 ,\xsqr[83]_i_10_n_0 }),
        .O(xsqr03_in[11:4]),
        .S({\xsqr[83]_i_11_n_0 ,\xsqr[83]_i_12_n_0 ,\xsqr[83]_i_13_n_0 ,\xsqr[83]_i_14_n_0 ,\xsqr[83]_i_15_n_0 ,\xsqr[83]_i_16_n_0 ,\xsqr[83]_i_17_n_0 ,\xsqr[83]_i_18_n_0 }));
  FDCE \xsqr_reg[84] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[84]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[84] ));
  FDCE \xsqr_reg[85] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[85]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[85] ));
  FDCE \xsqr_reg[86] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[86]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[86] ));
  FDCE \xsqr_reg[87] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[87]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[87] ));
  FDCE \xsqr_reg[88] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[88]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[88] ));
  FDCE \xsqr_reg[89] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[89]_i_2_n_0 ),
        .Q(\xsqr_reg_n_0_[89] ));
  CARRY8 \xsqr_reg[89]_i_14 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xsqr_reg[89]_i_14_n_0 ,\xsqr_reg[89]_i_14_n_1 ,\xsqr_reg[89]_i_14_n_2 ,\xsqr_reg[89]_i_14_n_3 ,\xsqr_reg[89]_i_14_n_4 ,\xsqr_reg[89]_i_14_n_5 ,\xsqr_reg[89]_i_14_n_6 ,\xsqr_reg[89]_i_14_n_7 }),
        .DI({\xsqr[89]_i_20_n_0 ,\xsqr[89]_i_21_n_0 ,\xsqr[89]_i_22_n_0 ,\xsqr[89]_i_23_n_0 ,\xsqr[89]_i_24_n_0 ,\xsqr[75]_i_31_n_0 ,\xsqr[89]_i_25_n_0 ,1'b0}),
        .O({\xsqr_reg[89]_i_14_n_8 ,\xsqr_reg[89]_i_14_n_9 ,\xsqr_reg[89]_i_14_n_10 ,\xsqr_reg[89]_i_14_n_11 ,\xsqr_reg[89]_i_14_n_12 ,\xsqr_reg[89]_i_14_n_13 ,\xsqr_reg[89]_i_14_n_14 ,\xsqr_reg[89]_i_14_n_15 }),
        .S({\xsqr[89]_i_26_n_0 ,\xsqr[89]_i_27_n_0 ,\xsqr[89]_i_28_n_0 ,\xsqr[89]_i_29_n_0 ,\xsqr[89]_i_30_n_0 ,\xsqr[89]_i_31_n_0 ,\xsqr[89]_i_32_n_0 ,\xsqr[89]_i_33_n_0 }));
  CARRY8 \xsqr_reg[89]_i_18 
       (.CI(\xsqr_reg[75]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[89]_i_18_CO_UNCONNECTED [7:4],\xsqr_reg[89]_i_18_n_4 ,\NLW_xsqr_reg[89]_i_18_CO_UNCONNECTED [2],\xsqr_reg[89]_i_18_n_6 ,\xsqr_reg[89]_i_18_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xsqr[89]_i_34_n_0 ,\xsqr[89]_i_35_n_0 ,\xsqr[89]_i_36_n_0 }),
        .O({\NLW_xsqr_reg[89]_i_18_O_UNCONNECTED [7:3],\xsqr_reg[89]_i_18_n_13 ,\xsqr_reg[89]_i_18_n_14 ,\xsqr_reg[89]_i_18_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[89]_i_37_n_0 ,\xsqr[89]_i_38_n_0 ,\xsqr[89]_i_39_n_0 }));
  CARRY8 \xsqr_reg[89]_i_19 
       (.CI(\xsqr_reg[75]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[89]_i_19_CO_UNCONNECTED [7:3],\xsqr_reg[89]_i_19_n_5 ,\NLW_xsqr_reg[89]_i_19_CO_UNCONNECTED [1],\xsqr_reg[89]_i_19_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\xsqr[89]_i_40_n_0 ,\xsqr[89]_i_41_n_0 }),
        .O({\NLW_xsqr_reg[89]_i_19_O_UNCONNECTED [7:2],\xsqr_reg[89]_i_19_n_14 ,\xsqr_reg[89]_i_19_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[89]_i_42_n_0 ,\xsqr[89]_i_43_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xsqr_reg[89]_i_3 
       (.CI(\xsqr_reg[83]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[89]_i_3_CO_UNCONNECTED [7:5],\xsqr_reg[89]_i_3_n_3 ,\xsqr_reg[89]_i_3_n_4 ,\xsqr_reg[89]_i_3_n_5 ,\xsqr_reg[89]_i_3_n_6 ,\xsqr_reg[89]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,\xsqr_reg[89]_i_4_n_13 ,\xsqr[89]_i_5_n_0 ,\xsqr[89]_i_6_n_0 ,\xsqr[89]_i_7_n_0 ,\xsqr[89]_i_8_n_0 }),
        .O({\NLW_xsqr_reg[89]_i_3_O_UNCONNECTED [7:6],xsqr03_in[17:12]}),
        .S({1'b0,1'b0,\xsqr_reg[89]_i_4_n_12 ,\xsqr[89]_i_9_n_0 ,\xsqr[89]_i_10_n_0 ,\xsqr[89]_i_11_n_0 ,\xsqr[89]_i_12_n_0 ,\xsqr[89]_i_13_n_0 }));
  CARRY8 \xsqr_reg[89]_i_4 
       (.CI(\xsqr_reg[89]_i_14_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xsqr_reg[89]_i_4_CO_UNCONNECTED [7:3],\xsqr_reg[89]_i_4_n_5 ,\xsqr_reg[89]_i_4_n_6 ,\xsqr_reg[89]_i_4_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\dx_reg_n_0_[44] ,1'b0,\dx_reg_n_0_[43] }),
        .O({\NLW_xsqr_reg[89]_i_4_O_UNCONNECTED [7:4],\xsqr_reg[89]_i_4_n_12 ,\xsqr_reg[89]_i_4_n_13 ,\xsqr_reg[89]_i_4_n_14 ,\xsqr_reg[89]_i_4_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xsqr[89]_i_15_n_0 ,\xsqr[89]_i_16_n_0 ,\xsqr[89]_i_17_n_0 }));
  FDCE \xsqr_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[8]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[8] ));
  FDCE \xsqr_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xsqr[9]_i_1_n_0 ),
        .Q(\xsqr_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1341" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[0]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[72]),
        .O(\xy4p1[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1336" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[10]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[82]),
        .O(\xy4p1[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1336" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[11]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[83]),
        .O(\xy4p1[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1335" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[12]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[84]),
        .O(\xy4p1[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1335" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[13]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[85]),
        .O(\xy4p1[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1334" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[14]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[86]),
        .O(\xy4p1[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1334" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[15]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[87]),
        .O(\xy4p1[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1333" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[16]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy[88]),
        .O(\xy4p1[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1333" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[17]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy[89]),
        .O(\xy4p1[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1341" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[1]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[73]),
        .O(\xy4p1[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1340" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[2]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[74]),
        .O(\xy4p1[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1340" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[3]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[75]),
        .O(\xy4p1[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1339" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[4]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[76]),
        .O(\xy4p1[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1339" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[5]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[77]),
        .O(\xy4p1[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1338" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[6]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[78]),
        .O(\xy4p1[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1338" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[7]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[79]),
        .O(\xy4p1[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1337" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[8]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[80]),
        .O(\xy4p1[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1337" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p1[9]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy[81]),
        .O(\xy4p1[9]_i_1_n_0 ));
  FDCE \xy4p1_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[0]_i_1_n_0 ),
        .Q(xy4p1[0]));
  FDCE \xy4p1_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[10]_i_1_n_0 ),
        .Q(xy4p1[10]));
  FDCE \xy4p1_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[11]_i_1_n_0 ),
        .Q(xy4p1[11]));
  FDCE \xy4p1_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[12]_i_1_n_0 ),
        .Q(xy4p1[12]));
  FDCE \xy4p1_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[13]_i_1_n_0 ),
        .Q(xy4p1[13]));
  FDCE \xy4p1_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[14]_i_1_n_0 ),
        .Q(xy4p1[14]));
  FDCE \xy4p1_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[15]_i_1_n_0 ),
        .Q(xy4p1[15]));
  FDCE \xy4p1_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[16]_i_1_n_0 ),
        .Q(xy4p1[16]));
  FDCE \xy4p1_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[17]_i_1_n_0 ),
        .Q(xy4p1[17]));
  FDCE \xy4p1_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[1]_i_1_n_0 ),
        .Q(xy4p1[1]));
  FDCE \xy4p1_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[2]_i_1_n_0 ),
        .Q(xy4p1[2]));
  FDCE \xy4p1_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[3]_i_1_n_0 ),
        .Q(xy4p1[3]));
  FDCE \xy4p1_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[4]_i_1_n_0 ),
        .Q(xy4p1[4]));
  FDCE \xy4p1_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[5]_i_1_n_0 ),
        .Q(xy4p1[5]));
  FDCE \xy4p1_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[6]_i_1_n_0 ),
        .Q(xy4p1[6]));
  FDCE \xy4p1_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[7]_i_1_n_0 ),
        .Q(xy4p1[7]));
  FDCE \xy4p1_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[8]_i_1_n_0 ),
        .Q(xy4p1[8]));
  FDCE \xy4p1_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p1[9]_i_1_n_0 ),
        .Q(xy4p1[9]));
  (* SOFT_HLUTNM = "soft_lutpair1350" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[0]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[0]),
        .O(\xy4p2[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1345" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[10]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[10]),
        .O(\xy4p2[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1345" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[11]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[11]),
        .O(\xy4p2[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1344" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[12]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[12]),
        .O(\xy4p2[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1344" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[13]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[13]),
        .O(\xy4p2[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1343" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[14]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[14]),
        .O(\xy4p2[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1343" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[15]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[15]),
        .O(\xy4p2[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1342" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[16]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy4p1[16]),
        .O(\xy4p2[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1342" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[17]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy4p1[17]),
        .O(\xy4p2[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1350" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[1]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[1]),
        .O(\xy4p2[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1349" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[2]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[2]),
        .O(\xy4p2[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1349" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[3]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[3]),
        .O(\xy4p2[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1348" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[4]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[4]),
        .O(\xy4p2[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1348" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[5]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[5]),
        .O(\xy4p2[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1347" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[6]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[6]),
        .O(\xy4p2[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1347" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[7]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[7]),
        .O(\xy4p2[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1346" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[8]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[8]),
        .O(\xy4p2[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1346" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy4p2[9]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy4p1[9]),
        .O(\xy4p2[9]_i_1_n_0 ));
  FDCE \xy4p2_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[0]_i_1_n_0 ),
        .Q(xy4p2[0]));
  FDCE \xy4p2_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[10]_i_1_n_0 ),
        .Q(xy4p2[10]));
  FDCE \xy4p2_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[11]_i_1_n_0 ),
        .Q(xy4p2[11]));
  FDCE \xy4p2_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[12]_i_1_n_0 ),
        .Q(xy4p2[12]));
  FDCE \xy4p2_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[13]_i_1_n_0 ),
        .Q(xy4p2[13]));
  FDCE \xy4p2_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[14]_i_1_n_0 ),
        .Q(xy4p2[14]));
  FDCE \xy4p2_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[15]_i_1_n_0 ),
        .Q(xy4p2[15]));
  FDCE \xy4p2_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[16]_i_1_n_0 ),
        .Q(xy4p2[16]));
  FDCE \xy4p2_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[17]_i_1_n_0 ),
        .Q(xy4p2[17]));
  FDCE \xy4p2_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[1]_i_1_n_0 ),
        .Q(xy4p2[1]));
  FDCE \xy4p2_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[2]_i_1_n_0 ),
        .Q(xy4p2[2]));
  FDCE \xy4p2_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[3]_i_1_n_0 ),
        .Q(xy4p2[3]));
  FDCE \xy4p2_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[4]_i_1_n_0 ),
        .Q(xy4p2[4]));
  FDCE \xy4p2_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[5]_i_1_n_0 ),
        .Q(xy4p2[5]));
  FDCE \xy4p2_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[6]_i_1_n_0 ),
        .Q(xy4p2[6]));
  FDCE \xy4p2_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[7]_i_1_n_0 ),
        .Q(xy4p2[7]));
  FDCE \xy4p2_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[8]_i_1_n_0 ),
        .Q(xy4p2[8]));
  FDCE \xy4p2_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy4p2[9]_i_1_n_0 ),
        .Q(xy4p2[9]));
  (* SOFT_HLUTNM = "soft_lutpair1313" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[0]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[0]),
        .O(\xy[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1309" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[10]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[10]),
        .O(\xy[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1308" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[11]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[11]),
        .O(\xy[11]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[11]_i_10 
       (.I0(\xy_reg[3]_i_3_n_15 ),
        .I1(\xy_reg[3]_i_2_n_12 ),
        .O(\xy[11]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \xy[11]_i_11 
       (.I0(\xy_reg[3]_i_3_n_9 ),
        .I1(\xy_reg[17]_i_13_n_12 ),
        .I2(\xy_reg[17]_i_21_n_13 ),
        .I3(\xy_reg[17]_i_13_n_11 ),
        .I4(\xy_reg[3]_i_3_n_8 ),
        .I5(\xy[11]_i_19_n_0 ),
        .O(\xy[11]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \xy[11]_i_12 
       (.I0(\xy_reg[17]_i_21_n_14 ),
        .I1(\xy_reg[3]_i_3_n_9 ),
        .I2(\xy_reg[17]_i_13_n_12 ),
        .I3(\xy_reg[3]_i_3_n_8 ),
        .I4(\xy_reg[17]_i_13_n_11 ),
        .I5(\xy_reg[17]_i_21_n_13 ),
        .O(\xy[11]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \xy[11]_i_13 
       (.I0(\xy_reg[17]_i_21_n_14 ),
        .I1(\xy_reg[17]_i_13_n_12 ),
        .I2(\xy_reg[3]_i_3_n_9 ),
        .I3(\xy_reg[3]_i_3_n_10 ),
        .I4(\xy_reg[17]_i_21_n_15 ),
        .I5(\xy_reg[17]_i_13_n_13 ),
        .O(\xy[11]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[11]_i_14 
       (.I0(\xy[11]_i_6_n_0 ),
        .I1(\xy_reg[17]_i_13_n_13 ),
        .I2(\xy_reg[17]_i_21_n_15 ),
        .I3(\xy_reg[3]_i_3_n_10 ),
        .O(\xy[11]_i_14_n_0 ));
  (* HLUTNM = "lutpair52" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[11]_i_15 
       (.I0(\xy_reg[17]_i_13_n_14 ),
        .I1(\xy_reg[3]_i_2_n_8 ),
        .I2(\xy_reg[3]_i_3_n_11 ),
        .I3(\xy[11]_i_7_n_0 ),
        .O(\xy[11]_i_15_n_0 ));
  (* HLUTNM = "lutpair51" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[11]_i_16 
       (.I0(\xy_reg[17]_i_13_n_15 ),
        .I1(\xy_reg[3]_i_2_n_9 ),
        .I2(\xy_reg[3]_i_3_n_12 ),
        .I3(\xy[11]_i_8_n_0 ),
        .O(\xy[11]_i_16_n_0 ));
  (* HLUTNM = "lutpair50" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \xy[11]_i_17 
       (.I0(\xy_reg[3]_i_3_n_13 ),
        .I1(\xy_reg[3]_i_2_n_10 ),
        .I2(\xy_reg[3]_i_2_n_11 ),
        .I3(\xy_reg[3]_i_3_n_14 ),
        .O(\xy[11]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \xy[11]_i_18 
       (.I0(\xy_reg[3]_i_2_n_12 ),
        .I1(\xy_reg[3]_i_3_n_15 ),
        .I2(\xy_reg[3]_i_2_n_11 ),
        .I3(\xy_reg[3]_i_3_n_14 ),
        .O(\xy[11]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xy[11]_i_19 
       (.I0(\xy_reg[17]_i_20_n_15 ),
        .I1(\xy_reg[17]_i_13_n_10 ),
        .I2(\xy_reg[17]_i_21_n_4 ),
        .O(\xy[11]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \xy[11]_i_3 
       (.I0(\xy_reg[3]_i_3_n_9 ),
        .I1(\xy_reg[17]_i_13_n_12 ),
        .I2(\xy_reg[17]_i_21_n_13 ),
        .I3(\xy_reg[17]_i_13_n_11 ),
        .I4(\xy_reg[3]_i_3_n_8 ),
        .O(\xy[11]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \xy[11]_i_4 
       (.I0(\xy_reg[17]_i_21_n_14 ),
        .I1(\xy_reg[3]_i_3_n_9 ),
        .I2(\xy_reg[17]_i_13_n_12 ),
        .O(\xy[11]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xy[11]_i_5 
       (.I0(\xy_reg[3]_i_3_n_9 ),
        .I1(\xy_reg[17]_i_13_n_12 ),
        .I2(\xy_reg[17]_i_21_n_14 ),
        .O(\xy[11]_i_5_n_0 ));
  (* HLUTNM = "lutpair52" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xy[11]_i_6 
       (.I0(\xy_reg[17]_i_13_n_14 ),
        .I1(\xy_reg[3]_i_2_n_8 ),
        .I2(\xy_reg[3]_i_3_n_11 ),
        .O(\xy[11]_i_6_n_0 ));
  (* HLUTNM = "lutpair51" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xy[11]_i_7 
       (.I0(\xy_reg[17]_i_13_n_15 ),
        .I1(\xy_reg[3]_i_2_n_9 ),
        .I2(\xy_reg[3]_i_3_n_12 ),
        .O(\xy[11]_i_7_n_0 ));
  (* HLUTNM = "lutpair50" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[11]_i_8 
       (.I0(\xy_reg[3]_i_3_n_13 ),
        .I1(\xy_reg[3]_i_2_n_10 ),
        .O(\xy[11]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[11]_i_9 
       (.I0(\xy_reg[3]_i_3_n_14 ),
        .I1(\xy_reg[3]_i_2_n_11 ),
        .O(\xy[11]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1308" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[12]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[12]),
        .O(\xy[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1307" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[13]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[13]),
        .O(\xy[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1307" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[14]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[14]),
        .O(\xy[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1305" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[15]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[15]),
        .O(\xy[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1306" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[16]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy0[16]),
        .O(\xy[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1306" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[17]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy0[17]),
        .O(\xy[17]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \xy[17]_i_10 
       (.I0(\xy[17]_i_5_n_0 ),
        .I1(\xy_reg[17]_i_3_n_15 ),
        .I2(\xy_reg[17]_i_20_n_4 ),
        .I3(\xy_reg[17]_i_13_n_8 ),
        .I4(\xy_reg[17]_i_20_n_13 ),
        .O(\xy[17]_i_10_n_0 ));
  (* HLUTNM = "lutpair53" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \xy[17]_i_11 
       (.I0(\xy_reg[17]_i_20_n_14 ),
        .I1(\xy_reg[17]_i_13_n_9 ),
        .I2(\xy_reg[17]_i_20_n_13 ),
        .I3(\xy_reg[17]_i_13_n_8 ),
        .I4(\xy[17]_i_6_n_0 ),
        .O(\xy[17]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \xy[17]_i_12 
       (.I0(\xy[17]_i_7_n_0 ),
        .I1(\xy_reg[17]_i_20_n_15 ),
        .I2(\xy_reg[17]_i_21_n_4 ),
        .I3(\xy_reg[17]_i_13_n_10 ),
        .I4(\xy_reg[17]_i_20_n_14 ),
        .I5(\xy_reg[17]_i_13_n_9 ),
        .O(\xy[17]_i_12_n_0 ));
  LUT4 #(
    .INIT(16'h0777)) 
    \xy[17]_i_14 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[8] ),
        .O(\xy[17]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h08888FFF8FFF8FFF)) 
    \xy[17]_i_15 
       (.I0(\dy_reg_n_0_[7] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[8] ),
        .I3(\dx_reg_n_0_[6] ),
        .I4(\dx_reg_n_0_[8] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\xy[17]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[17]_i_16 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[5] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[6] ),
        .I4(\dx_reg_n_0_[7] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\xy[17]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'hE53F)) 
    \xy[17]_i_17 
       (.I0(\dy_reg_n_0_[7] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[8] ),
        .I3(\dx_reg_n_0_[8] ),
        .O(\xy[17]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h70ECE3130F5FAF5F)) 
    \xy[17]_i_18 
       (.I0(\dy_reg_n_0_[6] ),
        .I1(\dx_reg_n_0_[6] ),
        .I2(\dx_reg_n_0_[8] ),
        .I3(\dy_reg_n_0_[7] ),
        .I4(\dx_reg_n_0_[7] ),
        .I5(\dy_reg_n_0_[8] ),
        .O(\xy[17]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \xy[17]_i_19 
       (.I0(\xy[17]_i_16_n_0 ),
        .I1(\dx_reg_n_0_[8] ),
        .I2(\dy_reg_n_0_[6] ),
        .I3(\dy_reg_n_0_[8] ),
        .I4(\dx_reg_n_0_[6] ),
        .I5(\xy[17]_i_37_n_0 ),
        .O(\xy[17]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[17]_i_22 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[4] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[5] ),
        .I4(\dx_reg_n_0_[6] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\xy[17]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[17]_i_23 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[3] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[4] ),
        .I4(\dx_reg_n_0_[5] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\xy[17]_i_23_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[17]_i_24 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[2] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[3] ),
        .I4(\dx_reg_n_0_[4] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\xy[17]_i_24_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[17]_i_25 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[2] ),
        .I4(\dx_reg_n_0_[3] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\xy[17]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xy[17]_i_26 
       (.I0(\dy_reg_n_0_[6] ),
        .I1(\dx_reg_n_0_[3] ),
        .I2(\dx_reg_n_0_[2] ),
        .I3(\dy_reg_n_0_[7] ),
        .I4(\dx_reg_n_0_[1] ),
        .I5(\dy_reg_n_0_[8] ),
        .O(\xy[17]_i_26_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xy[17]_i_27 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dx_reg_n_0_[0] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[1] ),
        .O(\xy[17]_i_27_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[17]_i_28 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[6] ),
        .O(\xy[17]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[17]_i_29 
       (.I0(\xy[17]_i_22_n_0 ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[6] ),
        .I3(\dy_reg_n_0_[8] ),
        .I4(\dx_reg_n_0_[5] ),
        .I5(\xy[17]_i_50_n_0 ),
        .O(\xy[17]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[17]_i_30 
       (.I0(\xy[17]_i_23_n_0 ),
        .I1(\dx_reg_n_0_[6] ),
        .I2(\dy_reg_n_0_[6] ),
        .I3(\dy_reg_n_0_[8] ),
        .I4(\dx_reg_n_0_[4] ),
        .I5(\xy[17]_i_51_n_0 ),
        .O(\xy[17]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[17]_i_31 
       (.I0(\xy[17]_i_24_n_0 ),
        .I1(\dx_reg_n_0_[5] ),
        .I2(\dy_reg_n_0_[6] ),
        .I3(\dy_reg_n_0_[8] ),
        .I4(\dx_reg_n_0_[3] ),
        .I5(\xy[17]_i_52_n_0 ),
        .O(\xy[17]_i_31_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[17]_i_32 
       (.I0(\xy[17]_i_25_n_0 ),
        .I1(\dx_reg_n_0_[4] ),
        .I2(\dy_reg_n_0_[6] ),
        .I3(\dy_reg_n_0_[8] ),
        .I4(\dx_reg_n_0_[2] ),
        .I5(\xy[17]_i_53_n_0 ),
        .O(\xy[17]_i_32_n_0 ));
  LUT5 #(
    .INIT(32'hAA6A6A6A)) 
    \xy[17]_i_33 
       (.I0(\xy[17]_i_26_n_0 ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[0] ),
        .I4(\dy_reg_n_0_[8] ),
        .O(\xy[17]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xy[17]_i_34 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[7] ),
        .I2(\dx_reg_n_0_[0] ),
        .I3(\dy_reg_n_0_[8] ),
        .I4(\dy_reg_n_0_[6] ),
        .I5(\dx_reg_n_0_[2] ),
        .O(\xy[17]_i_34_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[17]_i_35 
       (.I0(\dy_reg_n_0_[6] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dx_reg_n_0_[0] ),
        .O(\xy[17]_i_35_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[17]_i_36 
       (.I0(\dx_reg_n_0_[0] ),
        .I1(\dy_reg_n_0_[6] ),
        .O(\xy[17]_i_36_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair990" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[17]_i_37 
       (.I0(\dx_reg_n_0_[7] ),
        .I1(\dy_reg_n_0_[7] ),
        .O(\xy[17]_i_37_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xy[17]_i_38 
       (.I0(\dy_reg_n_0_[5] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[8] ),
        .O(\xy[17]_i_38_n_0 ));
  LUT6 #(
    .INIT(64'h8000EAC0EAC0EAC0)) 
    \xy[17]_i_39 
       (.I0(\dx_reg_n_0_[7] ),
        .I1(\dx_reg_n_0_[6] ),
        .I2(\dy_reg_n_0_[5] ),
        .I3(\dy_reg_n_0_[4] ),
        .I4(\dx_reg_n_0_[8] ),
        .I5(\dy_reg_n_0_[3] ),
        .O(\xy[17]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \xy[17]_i_4 
       (.I0(\xy_reg[17]_i_20_n_13 ),
        .I1(\xy_reg[17]_i_13_n_8 ),
        .I2(\xy_reg[17]_i_20_n_4 ),
        .I3(\xy_reg[17]_i_3_n_15 ),
        .O(\xy[17]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[17]_i_40 
       (.I0(\dy_reg_n_0_[5] ),
        .I1(\dx_reg_n_0_[5] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[6] ),
        .I4(\dx_reg_n_0_[7] ),
        .I5(\dy_reg_n_0_[3] ),
        .O(\xy[17]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h4F3F)) 
    \xy[17]_i_41 
       (.I0(\dy_reg_n_0_[4] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[5] ),
        .I3(\dx_reg_n_0_[8] ),
        .O(\xy[17]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h25404FBFF03FCF3F)) 
    \xy[17]_i_42 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[6] ),
        .I2(\dy_reg_n_0_[5] ),
        .I3(\dx_reg_n_0_[7] ),
        .I4(\dy_reg_n_0_[4] ),
        .I5(\dx_reg_n_0_[8] ),
        .O(\xy[17]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[17]_i_43 
       (.I0(\xy[17]_i_40_n_0 ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[6] ),
        .I4(\dy_reg_n_0_[5] ),
        .I5(\xy[17]_i_54_n_0 ),
        .O(\xy[17]_i_43_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xy[17]_i_44 
       (.I0(\dy_reg_n_0_[2] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[8] ),
        .O(\xy[17]_i_44_n_0 ));
  LUT6 #(
    .INIT(64'h8000EAC0EAC0EAC0)) 
    \xy[17]_i_45 
       (.I0(\dx_reg_n_0_[7] ),
        .I1(\dx_reg_n_0_[6] ),
        .I2(\dy_reg_n_0_[2] ),
        .I3(\dy_reg_n_0_[1] ),
        .I4(\dx_reg_n_0_[8] ),
        .I5(\dy_reg_n_0_[0] ),
        .O(\xy[17]_i_45_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[17]_i_46 
       (.I0(\dy_reg_n_0_[2] ),
        .I1(\dx_reg_n_0_[5] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[6] ),
        .I4(\dx_reg_n_0_[7] ),
        .I5(\dy_reg_n_0_[0] ),
        .O(\xy[17]_i_46_n_0 ));
  LUT4 #(
    .INIT(16'h4F3F)) 
    \xy[17]_i_47 
       (.I0(\dy_reg_n_0_[1] ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[2] ),
        .I3(\dx_reg_n_0_[8] ),
        .O(\xy[17]_i_47_n_0 ));
  LUT6 #(
    .INIT(64'h25404FBFF03FCF3F)) 
    \xy[17]_i_48 
       (.I0(\dy_reg_n_0_[0] ),
        .I1(\dx_reg_n_0_[6] ),
        .I2(\dy_reg_n_0_[2] ),
        .I3(\dx_reg_n_0_[7] ),
        .I4(\dy_reg_n_0_[1] ),
        .I5(\dx_reg_n_0_[8] ),
        .O(\xy[17]_i_48_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[17]_i_49 
       (.I0(\xy[17]_i_46_n_0 ),
        .I1(\dx_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[6] ),
        .I4(\dy_reg_n_0_[2] ),
        .I5(\xy[17]_i_55_n_0 ),
        .O(\xy[17]_i_49_n_0 ));
  (* HLUTNM = "lutpair53" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \xy[17]_i_5 
       (.I0(\xy_reg[17]_i_20_n_14 ),
        .I1(\xy_reg[17]_i_13_n_9 ),
        .I2(\xy_reg[17]_i_20_n_13 ),
        .I3(\xy_reg[17]_i_13_n_8 ),
        .O(\xy[17]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair987" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[17]_i_50 
       (.I0(\dx_reg_n_0_[6] ),
        .I1(\dy_reg_n_0_[7] ),
        .O(\xy[17]_i_50_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair989" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[17]_i_51 
       (.I0(\dx_reg_n_0_[5] ),
        .I1(\dy_reg_n_0_[7] ),
        .O(\xy[17]_i_51_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair989" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[17]_i_52 
       (.I0(\dx_reg_n_0_[4] ),
        .I1(\dy_reg_n_0_[7] ),
        .O(\xy[17]_i_52_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair986" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[17]_i_53 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[7] ),
        .O(\xy[17]_i_53_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair988" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[17]_i_54 
       (.I0(\dx_reg_n_0_[8] ),
        .I1(\dy_reg_n_0_[3] ),
        .O(\xy[17]_i_54_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair974" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[17]_i_55 
       (.I0(\dx_reg_n_0_[8] ),
        .I1(\dy_reg_n_0_[0] ),
        .O(\xy[17]_i_55_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \xy[17]_i_6 
       (.I0(\xy_reg[17]_i_20_n_14 ),
        .I1(\xy_reg[17]_i_13_n_9 ),
        .I2(\xy_reg[17]_i_20_n_15 ),
        .I3(\xy_reg[17]_i_21_n_4 ),
        .I4(\xy_reg[17]_i_13_n_10 ),
        .O(\xy[17]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \xy[17]_i_7 
       (.I0(\xy_reg[3]_i_3_n_8 ),
        .I1(\xy_reg[17]_i_21_n_13 ),
        .I2(\xy_reg[17]_i_13_n_11 ),
        .I3(\xy_reg[17]_i_21_n_4 ),
        .I4(\xy_reg[17]_i_13_n_10 ),
        .I5(\xy_reg[17]_i_20_n_15 ),
        .O(\xy[17]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \xy[17]_i_8 
       (.I0(\xy_reg[17]_i_3_n_15 ),
        .I1(\xy_reg[17]_i_20_n_4 ),
        .I2(\xy_reg[17]_i_3_n_14 ),
        .I3(\xy_reg[17]_i_3_n_13 ),
        .O(\xy[17]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \xy[17]_i_9 
       (.I0(\xy_reg[17]_i_13_n_8 ),
        .I1(\xy_reg[17]_i_20_n_13 ),
        .I2(\xy_reg[17]_i_3_n_15 ),
        .I3(\xy_reg[17]_i_20_n_4 ),
        .I4(\xy_reg[17]_i_3_n_14 ),
        .O(\xy[17]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1305" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[18]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[0]),
        .O(\xy[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1304" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[19]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[1]),
        .O(\xy[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1313" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[1]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[1]),
        .O(\xy[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1304" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[20]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[2]),
        .O(\xy[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair914" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \xy[21]_i_1 
       (.I0(\xy_reg[21]_i_2_n_12 ),
        .I1(\xy_reg[21]_i_3_n_15 ),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\xy[21]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_10 
       (.I0(A[1]),
        .I1(B[0]),
        .O(\xy[21]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[21]_i_11 
       (.I0(\xy[21]_i_4_n_0 ),
        .I1(B[2]),
        .I2(A[5]),
        .I3(\xy[21]_i_34_n_0 ),
        .I4(A[7]),
        .I5(B[0]),
        .O(\xy[21]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[21]_i_12 
       (.I0(\xy[21]_i_5_n_0 ),
        .I1(B[2]),
        .I2(A[4]),
        .I3(\xy[21]_i_35_n_0 ),
        .I4(A[6]),
        .I5(B[0]),
        .O(\xy[21]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[21]_i_13 
       (.I0(\xy[21]_i_6_n_0 ),
        .I1(B[2]),
        .I2(A[3]),
        .I3(\xy[21]_i_36_n_0 ),
        .I4(A[5]),
        .I5(B[0]),
        .O(\xy[21]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[21]_i_14 
       (.I0(\xy[21]_i_7_n_0 ),
        .I1(B[2]),
        .I2(A[2]),
        .I3(\xy[21]_i_37_n_0 ),
        .I4(A[4]),
        .I5(B[0]),
        .O(\xy[21]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \xy[21]_i_15 
       (.I0(\xy[21]_i_8_n_0 ),
        .I1(B[1]),
        .I2(B[2]),
        .I3(A[0]),
        .I4(A[1]),
        .O(\xy[21]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[21]_i_16 
       (.I0(A[0]),
        .I1(B[2]),
        .I2(A[1]),
        .I3(B[1]),
        .I4(B[0]),
        .I5(A[2]),
        .O(\xy[21]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[21]_i_17 
       (.I0(B[0]),
        .I1(A[1]),
        .I2(B[1]),
        .I3(A[0]),
        .O(\xy[21]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_18 
       (.I0(A[0]),
        .I1(B[0]),
        .O(\xy[21]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[21]_i_19 
       (.I0(B[5]),
        .I1(A[4]),
        .I2(B[4]),
        .I3(A[5]),
        .I4(A[6]),
        .I5(B[3]),
        .O(\xy[21]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[21]_i_20 
       (.I0(B[5]),
        .I1(A[3]),
        .I2(B[4]),
        .I3(A[4]),
        .I4(A[5]),
        .I5(B[3]),
        .O(\xy[21]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[21]_i_21 
       (.I0(B[5]),
        .I1(A[2]),
        .I2(B[4]),
        .I3(A[3]),
        .I4(A[4]),
        .I5(B[3]),
        .O(\xy[21]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[21]_i_22 
       (.I0(B[5]),
        .I1(A[1]),
        .I2(B[4]),
        .I3(A[2]),
        .I4(A[3]),
        .I5(B[3]),
        .O(\xy[21]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[21]_i_23 
       (.I0(B[3]),
        .I1(A[3]),
        .I2(A[2]),
        .I3(B[4]),
        .I4(A[1]),
        .I5(B[5]),
        .O(\xy[21]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[21]_i_24 
       (.I0(B[4]),
        .I1(A[1]),
        .I2(B[5]),
        .I3(A[0]),
        .O(\xy[21]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_25 
       (.I0(A[1]),
        .I1(B[3]),
        .O(\xy[21]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[21]_i_26 
       (.I0(\xy[21]_i_19_n_0 ),
        .I1(B[5]),
        .I2(A[5]),
        .I3(\xy[21]_i_38_n_0 ),
        .I4(A[7]),
        .I5(B[3]),
        .O(\xy[21]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[21]_i_27 
       (.I0(\xy[21]_i_20_n_0 ),
        .I1(B[5]),
        .I2(A[4]),
        .I3(\xy[21]_i_39_n_0 ),
        .I4(A[6]),
        .I5(B[3]),
        .O(\xy[21]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[21]_i_28 
       (.I0(\xy[21]_i_21_n_0 ),
        .I1(B[5]),
        .I2(A[3]),
        .I3(\xy[21]_i_40_n_0 ),
        .I4(A[5]),
        .I5(B[3]),
        .O(\xy[21]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[21]_i_29 
       (.I0(\xy[21]_i_22_n_0 ),
        .I1(B[5]),
        .I2(A[2]),
        .I3(\xy[21]_i_41_n_0 ),
        .I4(A[4]),
        .I5(B[3]),
        .O(\xy[21]_i_29_n_0 ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \xy[21]_i_30 
       (.I0(\xy[21]_i_23_n_0 ),
        .I1(B[4]),
        .I2(B[5]),
        .I3(A[0]),
        .I4(A[1]),
        .O(\xy[21]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[21]_i_31 
       (.I0(A[0]),
        .I1(B[5]),
        .I2(A[1]),
        .I3(B[4]),
        .I4(B[3]),
        .I5(A[2]),
        .O(\xy[21]_i_31_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[21]_i_32 
       (.I0(B[3]),
        .I1(A[1]),
        .I2(B[4]),
        .I3(A[0]),
        .O(\xy[21]_i_32_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_33 
       (.I0(A[0]),
        .I1(B[3]),
        .O(\xy[21]_i_33_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair967" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_34 
       (.I0(A[6]),
        .I1(B[1]),
        .O(\xy[21]_i_34_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair992" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_35 
       (.I0(A[5]),
        .I1(B[1]),
        .O(\xy[21]_i_35_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair991" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_36 
       (.I0(A[4]),
        .I1(B[1]),
        .O(\xy[21]_i_36_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair977" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_37 
       (.I0(A[3]),
        .I1(B[1]),
        .O(\xy[21]_i_37_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair994" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_38 
       (.I0(A[6]),
        .I1(B[4]),
        .O(\xy[21]_i_38_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair992" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_39 
       (.I0(A[5]),
        .I1(B[4]),
        .O(\xy[21]_i_39_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[21]_i_4 
       (.I0(B[2]),
        .I1(A[4]),
        .I2(B[1]),
        .I3(A[5]),
        .I4(A[6]),
        .I5(B[0]),
        .O(\xy[21]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair991" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_40 
       (.I0(A[4]),
        .I1(B[4]),
        .O(\xy[21]_i_40_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair993" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[21]_i_41 
       (.I0(A[3]),
        .I1(B[4]),
        .O(\xy[21]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[21]_i_5 
       (.I0(B[2]),
        .I1(A[3]),
        .I2(B[1]),
        .I3(A[4]),
        .I4(A[5]),
        .I5(B[0]),
        .O(\xy[21]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[21]_i_6 
       (.I0(B[2]),
        .I1(A[2]),
        .I2(B[1]),
        .I3(A[3]),
        .I4(A[4]),
        .I5(B[0]),
        .O(\xy[21]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[21]_i_7 
       (.I0(B[2]),
        .I1(A[1]),
        .I2(B[1]),
        .I3(A[2]),
        .I4(A[3]),
        .I5(B[0]),
        .O(\xy[21]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[21]_i_8 
       (.I0(B[0]),
        .I1(A[3]),
        .I2(A[2]),
        .I3(B[1]),
        .I4(A[1]),
        .I5(B[2]),
        .O(\xy[21]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[21]_i_9 
       (.I0(B[1]),
        .I1(A[1]),
        .I2(B[2]),
        .I3(A[0]),
        .O(\xy[21]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1303" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[22]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[4]),
        .O(\xy[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1303" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[23]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[5]),
        .O(\xy[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1302" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[24]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[6]),
        .O(\xy[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1302" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[25]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[7]),
        .O(\xy[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1301" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[26]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[8]),
        .O(\xy[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1301" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[27]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[9]),
        .O(\xy[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1300" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[28]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[10]),
        .O(\xy[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1300" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[29]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[11]),
        .O(\xy[29]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[29]_i_10 
       (.I0(\xy_reg[21]_i_3_n_15 ),
        .I1(\xy_reg[21]_i_2_n_12 ),
        .O(\xy[29]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \xy[29]_i_11 
       (.I0(\xy_reg[21]_i_3_n_9 ),
        .I1(\xy_reg[35]_i_13_n_12 ),
        .I2(\xy_reg[35]_i_21_n_13 ),
        .I3(\xy_reg[35]_i_13_n_11 ),
        .I4(\xy_reg[21]_i_3_n_8 ),
        .I5(\xy[29]_i_19_n_0 ),
        .O(\xy[29]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \xy[29]_i_12 
       (.I0(\xy_reg[35]_i_21_n_14 ),
        .I1(\xy_reg[21]_i_3_n_9 ),
        .I2(\xy_reg[35]_i_13_n_12 ),
        .I3(\xy_reg[21]_i_3_n_8 ),
        .I4(\xy_reg[35]_i_13_n_11 ),
        .I5(\xy_reg[35]_i_21_n_13 ),
        .O(\xy[29]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \xy[29]_i_13 
       (.I0(\xy_reg[35]_i_21_n_14 ),
        .I1(\xy_reg[35]_i_13_n_12 ),
        .I2(\xy_reg[21]_i_3_n_9 ),
        .I3(\xy_reg[21]_i_3_n_10 ),
        .I4(\xy_reg[35]_i_21_n_15 ),
        .I5(\xy_reg[35]_i_13_n_13 ),
        .O(\xy[29]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[29]_i_14 
       (.I0(\xy[29]_i_6_n_0 ),
        .I1(\xy_reg[35]_i_13_n_13 ),
        .I2(\xy_reg[35]_i_21_n_15 ),
        .I3(\xy_reg[21]_i_3_n_10 ),
        .O(\xy[29]_i_14_n_0 ));
  (* HLUTNM = "lutpair56" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[29]_i_15 
       (.I0(\xy_reg[35]_i_13_n_14 ),
        .I1(\xy_reg[21]_i_2_n_8 ),
        .I2(\xy_reg[21]_i_3_n_11 ),
        .I3(\xy[29]_i_7_n_0 ),
        .O(\xy[29]_i_15_n_0 ));
  (* HLUTNM = "lutpair55" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[29]_i_16 
       (.I0(\xy_reg[35]_i_13_n_15 ),
        .I1(\xy_reg[21]_i_2_n_9 ),
        .I2(\xy_reg[21]_i_3_n_12 ),
        .I3(\xy[29]_i_8_n_0 ),
        .O(\xy[29]_i_16_n_0 ));
  (* HLUTNM = "lutpair54" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \xy[29]_i_17 
       (.I0(\xy_reg[21]_i_3_n_13 ),
        .I1(\xy_reg[21]_i_2_n_10 ),
        .I2(\xy_reg[21]_i_2_n_11 ),
        .I3(\xy_reg[21]_i_3_n_14 ),
        .O(\xy[29]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \xy[29]_i_18 
       (.I0(\xy_reg[21]_i_2_n_12 ),
        .I1(\xy_reg[21]_i_3_n_15 ),
        .I2(\xy_reg[21]_i_2_n_11 ),
        .I3(\xy_reg[21]_i_3_n_14 ),
        .O(\xy[29]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xy[29]_i_19 
       (.I0(\xy_reg[35]_i_20_n_15 ),
        .I1(\xy_reg[35]_i_13_n_10 ),
        .I2(\xy_reg[35]_i_21_n_4 ),
        .O(\xy[29]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \xy[29]_i_3 
       (.I0(\xy_reg[21]_i_3_n_9 ),
        .I1(\xy_reg[35]_i_13_n_12 ),
        .I2(\xy_reg[35]_i_21_n_13 ),
        .I3(\xy_reg[35]_i_13_n_11 ),
        .I4(\xy_reg[21]_i_3_n_8 ),
        .O(\xy[29]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \xy[29]_i_4 
       (.I0(\xy_reg[35]_i_21_n_14 ),
        .I1(\xy_reg[21]_i_3_n_9 ),
        .I2(\xy_reg[35]_i_13_n_12 ),
        .O(\xy[29]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xy[29]_i_5 
       (.I0(\xy_reg[21]_i_3_n_9 ),
        .I1(\xy_reg[35]_i_13_n_12 ),
        .I2(\xy_reg[35]_i_21_n_14 ),
        .O(\xy[29]_i_5_n_0 ));
  (* HLUTNM = "lutpair56" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xy[29]_i_6 
       (.I0(\xy_reg[35]_i_13_n_14 ),
        .I1(\xy_reg[21]_i_2_n_8 ),
        .I2(\xy_reg[21]_i_3_n_11 ),
        .O(\xy[29]_i_6_n_0 ));
  (* HLUTNM = "lutpair55" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xy[29]_i_7 
       (.I0(\xy_reg[35]_i_13_n_15 ),
        .I1(\xy_reg[21]_i_2_n_9 ),
        .I2(\xy_reg[21]_i_3_n_12 ),
        .O(\xy[29]_i_7_n_0 ));
  (* HLUTNM = "lutpair54" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[29]_i_8 
       (.I0(\xy_reg[21]_i_3_n_13 ),
        .I1(\xy_reg[21]_i_2_n_10 ),
        .O(\xy[29]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[29]_i_9 
       (.I0(\xy_reg[21]_i_3_n_14 ),
        .I1(\xy_reg[21]_i_2_n_11 ),
        .O(\xy[29]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1312" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[2]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[2]),
        .O(\xy[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1299" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[30]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[12]),
        .O(\xy[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1299" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[31]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[13]),
        .O(\xy[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1298" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[32]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[14]),
        .O(\xy[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1298" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[33]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy00_in[15]),
        .O(\xy[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1297" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[34]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy00_in[16]),
        .O(\xy[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1297" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[35]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy00_in[17]),
        .O(\xy[35]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \xy[35]_i_10 
       (.I0(\xy[35]_i_5_n_0 ),
        .I1(\xy_reg[35]_i_3_n_15 ),
        .I2(\xy_reg[35]_i_20_n_4 ),
        .I3(\xy_reg[35]_i_13_n_8 ),
        .I4(\xy_reg[35]_i_20_n_13 ),
        .O(\xy[35]_i_10_n_0 ));
  (* HLUTNM = "lutpair57" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \xy[35]_i_11 
       (.I0(\xy_reg[35]_i_20_n_14 ),
        .I1(\xy_reg[35]_i_13_n_9 ),
        .I2(\xy_reg[35]_i_20_n_13 ),
        .I3(\xy_reg[35]_i_13_n_8 ),
        .I4(\xy[35]_i_6_n_0 ),
        .O(\xy[35]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \xy[35]_i_12 
       (.I0(\xy[35]_i_7_n_0 ),
        .I1(\xy_reg[35]_i_20_n_15 ),
        .I2(\xy_reg[35]_i_21_n_4 ),
        .I3(\xy_reg[35]_i_13_n_10 ),
        .I4(\xy_reg[35]_i_20_n_14 ),
        .I5(\xy_reg[35]_i_13_n_9 ),
        .O(\xy[35]_i_12_n_0 ));
  LUT4 #(
    .INIT(16'h0777)) 
    \xy[35]_i_14 
       (.I0(B[8]),
        .I1(A[7]),
        .I2(B[7]),
        .I3(A[8]),
        .O(\xy[35]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h08888FFF8FFF8FFF)) 
    \xy[35]_i_15 
       (.I0(B[7]),
        .I1(A[7]),
        .I2(B[8]),
        .I3(A[6]),
        .I4(A[8]),
        .I5(B[6]),
        .O(\xy[35]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[35]_i_16 
       (.I0(B[8]),
        .I1(A[5]),
        .I2(B[7]),
        .I3(A[6]),
        .I4(A[7]),
        .I5(B[6]),
        .O(\xy[35]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'hE53F)) 
    \xy[35]_i_17 
       (.I0(B[7]),
        .I1(A[7]),
        .I2(B[8]),
        .I3(A[8]),
        .O(\xy[35]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h70ECE3130F5FAF5F)) 
    \xy[35]_i_18 
       (.I0(B[6]),
        .I1(A[6]),
        .I2(A[8]),
        .I3(B[7]),
        .I4(A[7]),
        .I5(B[8]),
        .O(\xy[35]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \xy[35]_i_19 
       (.I0(\xy[35]_i_16_n_0 ),
        .I1(A[8]),
        .I2(B[6]),
        .I3(B[8]),
        .I4(A[6]),
        .I5(\xy[35]_i_37_n_0 ),
        .O(\xy[35]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[35]_i_22 
       (.I0(B[8]),
        .I1(A[4]),
        .I2(B[7]),
        .I3(A[5]),
        .I4(A[6]),
        .I5(B[6]),
        .O(\xy[35]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[35]_i_23 
       (.I0(B[8]),
        .I1(A[3]),
        .I2(B[7]),
        .I3(A[4]),
        .I4(A[5]),
        .I5(B[6]),
        .O(\xy[35]_i_23_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[35]_i_24 
       (.I0(B[8]),
        .I1(A[2]),
        .I2(B[7]),
        .I3(A[3]),
        .I4(A[4]),
        .I5(B[6]),
        .O(\xy[35]_i_24_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[35]_i_25 
       (.I0(B[8]),
        .I1(A[1]),
        .I2(B[7]),
        .I3(A[2]),
        .I4(A[3]),
        .I5(B[6]),
        .O(\xy[35]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xy[35]_i_26 
       (.I0(B[6]),
        .I1(A[3]),
        .I2(A[2]),
        .I3(B[7]),
        .I4(A[1]),
        .I5(B[8]),
        .O(\xy[35]_i_26_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xy[35]_i_27 
       (.I0(B[8]),
        .I1(A[0]),
        .I2(B[7]),
        .I3(A[1]),
        .O(\xy[35]_i_27_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[35]_i_28 
       (.I0(A[1]),
        .I1(B[6]),
        .O(\xy[35]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[35]_i_29 
       (.I0(\xy[35]_i_22_n_0 ),
        .I1(A[7]),
        .I2(B[6]),
        .I3(B[8]),
        .I4(A[5]),
        .I5(\xy[35]_i_50_n_0 ),
        .O(\xy[35]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[35]_i_30 
       (.I0(\xy[35]_i_23_n_0 ),
        .I1(A[6]),
        .I2(B[6]),
        .I3(B[8]),
        .I4(A[4]),
        .I5(\xy[35]_i_51_n_0 ),
        .O(\xy[35]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[35]_i_31 
       (.I0(\xy[35]_i_24_n_0 ),
        .I1(A[5]),
        .I2(B[6]),
        .I3(B[8]),
        .I4(A[3]),
        .I5(\xy[35]_i_52_n_0 ),
        .O(\xy[35]_i_31_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[35]_i_32 
       (.I0(\xy[35]_i_25_n_0 ),
        .I1(A[4]),
        .I2(B[6]),
        .I3(B[8]),
        .I4(A[2]),
        .I5(\xy[35]_i_53_n_0 ),
        .O(\xy[35]_i_32_n_0 ));
  LUT5 #(
    .INIT(32'hAA6A6A6A)) 
    \xy[35]_i_33 
       (.I0(\xy[35]_i_26_n_0 ),
        .I1(A[1]),
        .I2(B[7]),
        .I3(A[0]),
        .I4(B[8]),
        .O(\xy[35]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xy[35]_i_34 
       (.I0(A[1]),
        .I1(B[7]),
        .I2(A[0]),
        .I3(B[8]),
        .I4(B[6]),
        .I5(A[2]),
        .O(\xy[35]_i_34_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[35]_i_35 
       (.I0(B[6]),
        .I1(A[1]),
        .I2(B[7]),
        .I3(A[0]),
        .O(\xy[35]_i_35_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[35]_i_36 
       (.I0(A[0]),
        .I1(B[6]),
        .O(\xy[35]_i_36_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair997" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[35]_i_37 
       (.I0(A[7]),
        .I1(B[7]),
        .O(\xy[35]_i_37_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xy[35]_i_38 
       (.I0(B[5]),
        .I1(A[7]),
        .I2(B[4]),
        .I3(A[8]),
        .O(\xy[35]_i_38_n_0 ));
  LUT6 #(
    .INIT(64'h8000EAC0EAC0EAC0)) 
    \xy[35]_i_39 
       (.I0(A[7]),
        .I1(A[6]),
        .I2(B[5]),
        .I3(B[4]),
        .I4(A[8]),
        .I5(B[3]),
        .O(\xy[35]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \xy[35]_i_4 
       (.I0(\xy_reg[35]_i_20_n_13 ),
        .I1(\xy_reg[35]_i_13_n_8 ),
        .I2(\xy_reg[35]_i_20_n_4 ),
        .I3(\xy_reg[35]_i_3_n_15 ),
        .O(\xy[35]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[35]_i_40 
       (.I0(B[5]),
        .I1(A[5]),
        .I2(B[4]),
        .I3(A[6]),
        .I4(A[7]),
        .I5(B[3]),
        .O(\xy[35]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h4F3F)) 
    \xy[35]_i_41 
       (.I0(B[4]),
        .I1(A[7]),
        .I2(B[5]),
        .I3(A[8]),
        .O(\xy[35]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h25404FBFF03FCF3F)) 
    \xy[35]_i_42 
       (.I0(B[3]),
        .I1(A[6]),
        .I2(B[5]),
        .I3(A[7]),
        .I4(B[4]),
        .I5(A[8]),
        .O(\xy[35]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[35]_i_43 
       (.I0(\xy[35]_i_40_n_0 ),
        .I1(A[7]),
        .I2(B[4]),
        .I3(A[6]),
        .I4(B[5]),
        .I5(\xy[35]_i_54_n_0 ),
        .O(\xy[35]_i_43_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xy[35]_i_44 
       (.I0(B[2]),
        .I1(A[7]),
        .I2(B[1]),
        .I3(A[8]),
        .O(\xy[35]_i_44_n_0 ));
  LUT6 #(
    .INIT(64'h8000EAC0EAC0EAC0)) 
    \xy[35]_i_45 
       (.I0(A[7]),
        .I1(A[6]),
        .I2(B[2]),
        .I3(B[1]),
        .I4(A[8]),
        .I5(B[0]),
        .O(\xy[35]_i_45_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[35]_i_46 
       (.I0(B[2]),
        .I1(A[5]),
        .I2(B[1]),
        .I3(A[6]),
        .I4(A[7]),
        .I5(B[0]),
        .O(\xy[35]_i_46_n_0 ));
  LUT4 #(
    .INIT(16'h4F3F)) 
    \xy[35]_i_47 
       (.I0(B[1]),
        .I1(A[7]),
        .I2(B[2]),
        .I3(A[8]),
        .O(\xy[35]_i_47_n_0 ));
  LUT6 #(
    .INIT(64'h25404FBFF03FCF3F)) 
    \xy[35]_i_48 
       (.I0(B[0]),
        .I1(A[6]),
        .I2(B[2]),
        .I3(A[7]),
        .I4(B[1]),
        .I5(A[8]),
        .O(\xy[35]_i_48_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[35]_i_49 
       (.I0(\xy[35]_i_46_n_0 ),
        .I1(A[7]),
        .I2(B[1]),
        .I3(A[6]),
        .I4(B[2]),
        .I5(\xy[35]_i_55_n_0 ),
        .O(\xy[35]_i_49_n_0 ));
  (* HLUTNM = "lutpair57" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \xy[35]_i_5 
       (.I0(\xy_reg[35]_i_20_n_14 ),
        .I1(\xy_reg[35]_i_13_n_9 ),
        .I2(\xy_reg[35]_i_20_n_13 ),
        .I3(\xy_reg[35]_i_13_n_8 ),
        .O(\xy[35]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair994" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[35]_i_50 
       (.I0(A[6]),
        .I1(B[7]),
        .O(\xy[35]_i_50_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair996" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[35]_i_51 
       (.I0(A[5]),
        .I1(B[7]),
        .O(\xy[35]_i_51_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair996" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[35]_i_52 
       (.I0(A[4]),
        .I1(B[7]),
        .O(\xy[35]_i_52_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair993" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[35]_i_53 
       (.I0(A[3]),
        .I1(B[7]),
        .O(\xy[35]_i_53_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair995" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[35]_i_54 
       (.I0(A[8]),
        .I1(B[3]),
        .O(\xy[35]_i_54_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair976" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[35]_i_55 
       (.I0(A[8]),
        .I1(B[0]),
        .O(\xy[35]_i_55_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \xy[35]_i_6 
       (.I0(\xy_reg[35]_i_20_n_14 ),
        .I1(\xy_reg[35]_i_13_n_9 ),
        .I2(\xy_reg[35]_i_20_n_15 ),
        .I3(\xy_reg[35]_i_21_n_4 ),
        .I4(\xy_reg[35]_i_13_n_10 ),
        .O(\xy[35]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \xy[35]_i_7 
       (.I0(\xy_reg[21]_i_3_n_8 ),
        .I1(\xy_reg[35]_i_21_n_13 ),
        .I2(\xy_reg[35]_i_13_n_11 ),
        .I3(\xy_reg[35]_i_21_n_4 ),
        .I4(\xy_reg[35]_i_13_n_10 ),
        .I5(\xy_reg[35]_i_20_n_15 ),
        .O(\xy[35]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \xy[35]_i_8 
       (.I0(\xy_reg[35]_i_3_n_15 ),
        .I1(\xy_reg[35]_i_20_n_4 ),
        .I2(\xy_reg[35]_i_3_n_14 ),
        .I3(\xy_reg[35]_i_3_n_13 ),
        .O(\xy[35]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \xy[35]_i_9 
       (.I0(\xy_reg[35]_i_13_n_8 ),
        .I1(\xy_reg[35]_i_20_n_13 ),
        .I2(\xy_reg[35]_i_3_n_15 ),
        .I3(\xy_reg[35]_i_20_n_4 ),
        .I4(\xy_reg[35]_i_3_n_14 ),
        .O(\xy[35]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1296" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[36]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[0]),
        .O(\xy[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1296" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[37]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[1]),
        .O(\xy[37]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1295" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[38]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[2]),
        .O(\xy[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair913" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \xy[39]_i_1 
       (.I0(\xy_reg[39]_i_2_n_12 ),
        .I1(\xy_reg[39]_i_3_n_15 ),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\xy[39]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_10 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[18] ),
        .O(\xy[39]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[39]_i_11 
       (.I0(\xy[39]_i_4_n_0 ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[23] ),
        .I3(\xy[39]_i_34_n_0 ),
        .I4(\dx_reg_n_0_[25] ),
        .I5(\dy_reg_n_0_[18] ),
        .O(\xy[39]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[39]_i_12 
       (.I0(\xy[39]_i_5_n_0 ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[22] ),
        .I3(\xy[39]_i_35_n_0 ),
        .I4(\dx_reg_n_0_[24] ),
        .I5(\dy_reg_n_0_[18] ),
        .O(\xy[39]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[39]_i_13 
       (.I0(\xy[39]_i_6_n_0 ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[21] ),
        .I3(\xy[39]_i_36_n_0 ),
        .I4(\dx_reg_n_0_[23] ),
        .I5(\dy_reg_n_0_[18] ),
        .O(\xy[39]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[39]_i_14 
       (.I0(\xy[39]_i_7_n_0 ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[20] ),
        .I3(\xy[39]_i_37_n_0 ),
        .I4(\dx_reg_n_0_[22] ),
        .I5(\dy_reg_n_0_[18] ),
        .O(\xy[39]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \xy[39]_i_15 
       (.I0(\xy[39]_i_8_n_0 ),
        .I1(\dy_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[20] ),
        .I3(\dx_reg_n_0_[18] ),
        .I4(\dx_reg_n_0_[19] ),
        .O(\xy[39]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[39]_i_16 
       (.I0(\dx_reg_n_0_[18] ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dx_reg_n_0_[19] ),
        .I3(\dy_reg_n_0_[19] ),
        .I4(\dy_reg_n_0_[18] ),
        .I5(\dx_reg_n_0_[20] ),
        .O(\xy[39]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[39]_i_17 
       (.I0(\dy_reg_n_0_[18] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[18] ),
        .O(\xy[39]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_18 
       (.I0(\dx_reg_n_0_[18] ),
        .I1(\dy_reg_n_0_[18] ),
        .O(\xy[39]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[39]_i_19 
       (.I0(\dy_reg_n_0_[23] ),
        .I1(\dx_reg_n_0_[22] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[23] ),
        .I4(\dx_reg_n_0_[24] ),
        .I5(\dy_reg_n_0_[21] ),
        .O(\xy[39]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[39]_i_20 
       (.I0(\dy_reg_n_0_[23] ),
        .I1(\dx_reg_n_0_[21] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[22] ),
        .I4(\dx_reg_n_0_[23] ),
        .I5(\dy_reg_n_0_[21] ),
        .O(\xy[39]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[39]_i_21 
       (.I0(\dy_reg_n_0_[23] ),
        .I1(\dx_reg_n_0_[20] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[21] ),
        .I4(\dx_reg_n_0_[22] ),
        .I5(\dy_reg_n_0_[21] ),
        .O(\xy[39]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[39]_i_22 
       (.I0(\dy_reg_n_0_[23] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[20] ),
        .I4(\dx_reg_n_0_[21] ),
        .I5(\dy_reg_n_0_[21] ),
        .O(\xy[39]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[39]_i_23 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[21] ),
        .I2(\dx_reg_n_0_[20] ),
        .I3(\dy_reg_n_0_[22] ),
        .I4(\dx_reg_n_0_[19] ),
        .I5(\dy_reg_n_0_[23] ),
        .O(\xy[39]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[39]_i_24 
       (.I0(\dy_reg_n_0_[22] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[23] ),
        .I3(\dx_reg_n_0_[18] ),
        .O(\xy[39]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_25 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[21] ),
        .O(\xy[39]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[39]_i_26 
       (.I0(\xy[39]_i_19_n_0 ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[23] ),
        .I3(\xy[39]_i_38_n_0 ),
        .I4(\dx_reg_n_0_[25] ),
        .I5(\dy_reg_n_0_[21] ),
        .O(\xy[39]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[39]_i_27 
       (.I0(\xy[39]_i_20_n_0 ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[22] ),
        .I3(\xy[39]_i_39_n_0 ),
        .I4(\dx_reg_n_0_[24] ),
        .I5(\dy_reg_n_0_[21] ),
        .O(\xy[39]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[39]_i_28 
       (.I0(\xy[39]_i_21_n_0 ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[21] ),
        .I3(\xy[39]_i_40_n_0 ),
        .I4(\dx_reg_n_0_[23] ),
        .I5(\dy_reg_n_0_[21] ),
        .O(\xy[39]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[39]_i_29 
       (.I0(\xy[39]_i_22_n_0 ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[20] ),
        .I3(\xy[39]_i_41_n_0 ),
        .I4(\dx_reg_n_0_[22] ),
        .I5(\dy_reg_n_0_[21] ),
        .O(\xy[39]_i_29_n_0 ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \xy[39]_i_30 
       (.I0(\xy[39]_i_23_n_0 ),
        .I1(\dy_reg_n_0_[22] ),
        .I2(\dy_reg_n_0_[23] ),
        .I3(\dx_reg_n_0_[18] ),
        .I4(\dx_reg_n_0_[19] ),
        .O(\xy[39]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[39]_i_31 
       (.I0(\dx_reg_n_0_[18] ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dx_reg_n_0_[19] ),
        .I3(\dy_reg_n_0_[22] ),
        .I4(\dy_reg_n_0_[21] ),
        .I5(\dx_reg_n_0_[20] ),
        .O(\xy[39]_i_31_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[39]_i_32 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[18] ),
        .O(\xy[39]_i_32_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_33 
       (.I0(\dx_reg_n_0_[18] ),
        .I1(\dy_reg_n_0_[21] ),
        .O(\xy[39]_i_33_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair969" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_34 
       (.I0(\dx_reg_n_0_[24] ),
        .I1(\dy_reg_n_0_[19] ),
        .O(\xy[39]_i_34_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair999" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_35 
       (.I0(\dx_reg_n_0_[23] ),
        .I1(\dy_reg_n_0_[19] ),
        .O(\xy[39]_i_35_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair998" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_36 
       (.I0(\dx_reg_n_0_[22] ),
        .I1(\dy_reg_n_0_[19] ),
        .O(\xy[39]_i_36_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair979" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_37 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[19] ),
        .O(\xy[39]_i_37_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1001" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_38 
       (.I0(\dx_reg_n_0_[24] ),
        .I1(\dy_reg_n_0_[22] ),
        .O(\xy[39]_i_38_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair999" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_39 
       (.I0(\dx_reg_n_0_[23] ),
        .I1(\dy_reg_n_0_[22] ),
        .O(\xy[39]_i_39_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[39]_i_4 
       (.I0(\dy_reg_n_0_[20] ),
        .I1(\dx_reg_n_0_[22] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[23] ),
        .I4(\dx_reg_n_0_[24] ),
        .I5(\dy_reg_n_0_[18] ),
        .O(\xy[39]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair998" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_40 
       (.I0(\dx_reg_n_0_[22] ),
        .I1(\dy_reg_n_0_[22] ),
        .O(\xy[39]_i_40_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1000" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[39]_i_41 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[22] ),
        .O(\xy[39]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[39]_i_5 
       (.I0(\dy_reg_n_0_[20] ),
        .I1(\dx_reg_n_0_[21] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[22] ),
        .I4(\dx_reg_n_0_[23] ),
        .I5(\dy_reg_n_0_[18] ),
        .O(\xy[39]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[39]_i_6 
       (.I0(\dy_reg_n_0_[20] ),
        .I1(\dx_reg_n_0_[20] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[21] ),
        .I4(\dx_reg_n_0_[22] ),
        .I5(\dy_reg_n_0_[18] ),
        .O(\xy[39]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[39]_i_7 
       (.I0(\dy_reg_n_0_[20] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[20] ),
        .I4(\dx_reg_n_0_[21] ),
        .I5(\dy_reg_n_0_[18] ),
        .O(\xy[39]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[39]_i_8 
       (.I0(\dy_reg_n_0_[18] ),
        .I1(\dx_reg_n_0_[21] ),
        .I2(\dx_reg_n_0_[20] ),
        .I3(\dy_reg_n_0_[19] ),
        .I4(\dx_reg_n_0_[19] ),
        .I5(\dy_reg_n_0_[20] ),
        .O(\xy[39]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[39]_i_9 
       (.I0(\dy_reg_n_0_[19] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[20] ),
        .I3(\dx_reg_n_0_[18] ),
        .O(\xy[39]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair914" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \xy[3]_i_1 
       (.I0(\xy_reg[3]_i_2_n_12 ),
        .I1(\xy_reg[3]_i_3_n_15 ),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\xy[3]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_10 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[0] ),
        .O(\xy[3]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[3]_i_11 
       (.I0(\xy[3]_i_4_n_0 ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[5] ),
        .I3(\xy[3]_i_34_n_0 ),
        .I4(\dx_reg_n_0_[7] ),
        .I5(\dy_reg_n_0_[0] ),
        .O(\xy[3]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[3]_i_12 
       (.I0(\xy[3]_i_5_n_0 ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[4] ),
        .I3(\xy[3]_i_35_n_0 ),
        .I4(\dx_reg_n_0_[6] ),
        .I5(\dy_reg_n_0_[0] ),
        .O(\xy[3]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[3]_i_13 
       (.I0(\xy[3]_i_6_n_0 ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[3] ),
        .I3(\xy[3]_i_36_n_0 ),
        .I4(\dx_reg_n_0_[5] ),
        .I5(\dy_reg_n_0_[0] ),
        .O(\xy[3]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[3]_i_14 
       (.I0(\xy[3]_i_7_n_0 ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[2] ),
        .I3(\xy[3]_i_37_n_0 ),
        .I4(\dx_reg_n_0_[4] ),
        .I5(\dy_reg_n_0_[0] ),
        .O(\xy[3]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \xy[3]_i_15 
       (.I0(\xy[3]_i_8_n_0 ),
        .I1(\dy_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[2] ),
        .I3(\dx_reg_n_0_[0] ),
        .I4(\dx_reg_n_0_[1] ),
        .O(\xy[3]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[3]_i_16 
       (.I0(\dx_reg_n_0_[0] ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dx_reg_n_0_[1] ),
        .I3(\dy_reg_n_0_[1] ),
        .I4(\dy_reg_n_0_[0] ),
        .I5(\dx_reg_n_0_[2] ),
        .O(\xy[3]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[3]_i_17 
       (.I0(\dy_reg_n_0_[0] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[0] ),
        .O(\xy[3]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_18 
       (.I0(\dx_reg_n_0_[0] ),
        .I1(\dy_reg_n_0_[0] ),
        .O(\xy[3]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[3]_i_19 
       (.I0(\dy_reg_n_0_[5] ),
        .I1(\dx_reg_n_0_[4] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[5] ),
        .I4(\dx_reg_n_0_[6] ),
        .I5(\dy_reg_n_0_[3] ),
        .O(\xy[3]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[3]_i_20 
       (.I0(\dy_reg_n_0_[5] ),
        .I1(\dx_reg_n_0_[3] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[4] ),
        .I4(\dx_reg_n_0_[5] ),
        .I5(\dy_reg_n_0_[3] ),
        .O(\xy[3]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[3]_i_21 
       (.I0(\dy_reg_n_0_[5] ),
        .I1(\dx_reg_n_0_[2] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[3] ),
        .I4(\dx_reg_n_0_[4] ),
        .I5(\dy_reg_n_0_[3] ),
        .O(\xy[3]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[3]_i_22 
       (.I0(\dy_reg_n_0_[5] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[2] ),
        .I4(\dx_reg_n_0_[3] ),
        .I5(\dy_reg_n_0_[3] ),
        .O(\xy[3]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[3]_i_23 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[3] ),
        .I2(\dx_reg_n_0_[2] ),
        .I3(\dy_reg_n_0_[4] ),
        .I4(\dx_reg_n_0_[1] ),
        .I5(\dy_reg_n_0_[5] ),
        .O(\xy[3]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[3]_i_24 
       (.I0(\dy_reg_n_0_[4] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[5] ),
        .I3(\dx_reg_n_0_[0] ),
        .O(\xy[3]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_25 
       (.I0(\dx_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[3] ),
        .O(\xy[3]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[3]_i_26 
       (.I0(\xy[3]_i_19_n_0 ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[5] ),
        .I3(\xy[3]_i_38_n_0 ),
        .I4(\dx_reg_n_0_[7] ),
        .I5(\dy_reg_n_0_[3] ),
        .O(\xy[3]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[3]_i_27 
       (.I0(\xy[3]_i_20_n_0 ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[4] ),
        .I3(\xy[3]_i_39_n_0 ),
        .I4(\dx_reg_n_0_[6] ),
        .I5(\dy_reg_n_0_[3] ),
        .O(\xy[3]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[3]_i_28 
       (.I0(\xy[3]_i_21_n_0 ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[3] ),
        .I3(\xy[3]_i_40_n_0 ),
        .I4(\dx_reg_n_0_[5] ),
        .I5(\dy_reg_n_0_[3] ),
        .O(\xy[3]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[3]_i_29 
       (.I0(\xy[3]_i_22_n_0 ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[2] ),
        .I3(\xy[3]_i_41_n_0 ),
        .I4(\dx_reg_n_0_[4] ),
        .I5(\dy_reg_n_0_[3] ),
        .O(\xy[3]_i_29_n_0 ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \xy[3]_i_30 
       (.I0(\xy[3]_i_23_n_0 ),
        .I1(\dy_reg_n_0_[4] ),
        .I2(\dy_reg_n_0_[5] ),
        .I3(\dx_reg_n_0_[0] ),
        .I4(\dx_reg_n_0_[1] ),
        .O(\xy[3]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[3]_i_31 
       (.I0(\dx_reg_n_0_[0] ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dx_reg_n_0_[1] ),
        .I3(\dy_reg_n_0_[4] ),
        .I4(\dy_reg_n_0_[3] ),
        .I5(\dx_reg_n_0_[2] ),
        .O(\xy[3]_i_31_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[3]_i_32 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dx_reg_n_0_[0] ),
        .O(\xy[3]_i_32_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_33 
       (.I0(\dx_reg_n_0_[0] ),
        .I1(\dy_reg_n_0_[3] ),
        .O(\xy[3]_i_33_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair965" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_34 
       (.I0(\dx_reg_n_0_[6] ),
        .I1(\dy_reg_n_0_[1] ),
        .O(\xy[3]_i_34_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair985" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_35 
       (.I0(\dx_reg_n_0_[5] ),
        .I1(\dy_reg_n_0_[1] ),
        .O(\xy[3]_i_35_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair984" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_36 
       (.I0(\dx_reg_n_0_[4] ),
        .I1(\dy_reg_n_0_[1] ),
        .O(\xy[3]_i_36_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair975" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_37 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[1] ),
        .O(\xy[3]_i_37_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair987" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_38 
       (.I0(\dx_reg_n_0_[6] ),
        .I1(\dy_reg_n_0_[4] ),
        .O(\xy[3]_i_38_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair985" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_39 
       (.I0(\dx_reg_n_0_[5] ),
        .I1(\dy_reg_n_0_[4] ),
        .O(\xy[3]_i_39_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[3]_i_4 
       (.I0(\dy_reg_n_0_[2] ),
        .I1(\dx_reg_n_0_[4] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[5] ),
        .I4(\dx_reg_n_0_[6] ),
        .I5(\dy_reg_n_0_[0] ),
        .O(\xy[3]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair984" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_40 
       (.I0(\dx_reg_n_0_[4] ),
        .I1(\dy_reg_n_0_[4] ),
        .O(\xy[3]_i_40_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair986" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[3]_i_41 
       (.I0(\dx_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[4] ),
        .O(\xy[3]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[3]_i_5 
       (.I0(\dy_reg_n_0_[2] ),
        .I1(\dx_reg_n_0_[3] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[4] ),
        .I4(\dx_reg_n_0_[5] ),
        .I5(\dy_reg_n_0_[0] ),
        .O(\xy[3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[3]_i_6 
       (.I0(\dy_reg_n_0_[2] ),
        .I1(\dx_reg_n_0_[2] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[3] ),
        .I4(\dx_reg_n_0_[4] ),
        .I5(\dy_reg_n_0_[0] ),
        .O(\xy[3]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[3]_i_7 
       (.I0(\dy_reg_n_0_[2] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dx_reg_n_0_[2] ),
        .I4(\dx_reg_n_0_[3] ),
        .I5(\dy_reg_n_0_[0] ),
        .O(\xy[3]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[3]_i_8 
       (.I0(\dy_reg_n_0_[0] ),
        .I1(\dx_reg_n_0_[3] ),
        .I2(\dx_reg_n_0_[2] ),
        .I3(\dy_reg_n_0_[1] ),
        .I4(\dx_reg_n_0_[1] ),
        .I5(\dy_reg_n_0_[2] ),
        .O(\xy[3]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[3]_i_9 
       (.I0(\dy_reg_n_0_[1] ),
        .I1(\dx_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[2] ),
        .I3(\dx_reg_n_0_[0] ),
        .O(\xy[3]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1295" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[40]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[4]),
        .O(\xy[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1294" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[41]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[5]),
        .O(\xy[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1294" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[42]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[6]),
        .O(\xy[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1293" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[43]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[7]),
        .O(\xy[43]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1293" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[44]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[8]),
        .O(\xy[44]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1292" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[45]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[9]),
        .O(\xy[45]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1292" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[46]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[10]),
        .O(\xy[46]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1291" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[47]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[11]),
        .O(\xy[47]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[47]_i_10 
       (.I0(\xy_reg[39]_i_3_n_15 ),
        .I1(\xy_reg[39]_i_2_n_12 ),
        .O(\xy[47]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \xy[47]_i_11 
       (.I0(\xy_reg[39]_i_3_n_9 ),
        .I1(\xy_reg[53]_i_13_n_12 ),
        .I2(\xy_reg[53]_i_21_n_13 ),
        .I3(\xy_reg[53]_i_13_n_11 ),
        .I4(\xy_reg[39]_i_3_n_8 ),
        .I5(\xy[47]_i_19_n_0 ),
        .O(\xy[47]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \xy[47]_i_12 
       (.I0(\xy_reg[53]_i_21_n_14 ),
        .I1(\xy_reg[39]_i_3_n_9 ),
        .I2(\xy_reg[53]_i_13_n_12 ),
        .I3(\xy_reg[39]_i_3_n_8 ),
        .I4(\xy_reg[53]_i_13_n_11 ),
        .I5(\xy_reg[53]_i_21_n_13 ),
        .O(\xy[47]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \xy[47]_i_13 
       (.I0(\xy_reg[53]_i_21_n_14 ),
        .I1(\xy_reg[53]_i_13_n_12 ),
        .I2(\xy_reg[39]_i_3_n_9 ),
        .I3(\xy_reg[39]_i_3_n_10 ),
        .I4(\xy_reg[53]_i_21_n_15 ),
        .I5(\xy_reg[53]_i_13_n_13 ),
        .O(\xy[47]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[47]_i_14 
       (.I0(\xy[47]_i_6_n_0 ),
        .I1(\xy_reg[53]_i_13_n_13 ),
        .I2(\xy_reg[53]_i_21_n_15 ),
        .I3(\xy_reg[39]_i_3_n_10 ),
        .O(\xy[47]_i_14_n_0 ));
  (* HLUTNM = "lutpair60" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[47]_i_15 
       (.I0(\xy_reg[53]_i_13_n_14 ),
        .I1(\xy_reg[39]_i_2_n_8 ),
        .I2(\xy_reg[39]_i_3_n_11 ),
        .I3(\xy[47]_i_7_n_0 ),
        .O(\xy[47]_i_15_n_0 ));
  (* HLUTNM = "lutpair59" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[47]_i_16 
       (.I0(\xy_reg[53]_i_13_n_15 ),
        .I1(\xy_reg[39]_i_2_n_9 ),
        .I2(\xy_reg[39]_i_3_n_12 ),
        .I3(\xy[47]_i_8_n_0 ),
        .O(\xy[47]_i_16_n_0 ));
  (* HLUTNM = "lutpair58" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \xy[47]_i_17 
       (.I0(\xy_reg[39]_i_3_n_13 ),
        .I1(\xy_reg[39]_i_2_n_10 ),
        .I2(\xy_reg[39]_i_2_n_11 ),
        .I3(\xy_reg[39]_i_3_n_14 ),
        .O(\xy[47]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \xy[47]_i_18 
       (.I0(\xy_reg[39]_i_2_n_12 ),
        .I1(\xy_reg[39]_i_3_n_15 ),
        .I2(\xy_reg[39]_i_2_n_11 ),
        .I3(\xy_reg[39]_i_3_n_14 ),
        .O(\xy[47]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xy[47]_i_19 
       (.I0(\xy_reg[53]_i_20_n_15 ),
        .I1(\xy_reg[53]_i_13_n_10 ),
        .I2(\xy_reg[53]_i_21_n_4 ),
        .O(\xy[47]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \xy[47]_i_3 
       (.I0(\xy_reg[39]_i_3_n_9 ),
        .I1(\xy_reg[53]_i_13_n_12 ),
        .I2(\xy_reg[53]_i_21_n_13 ),
        .I3(\xy_reg[53]_i_13_n_11 ),
        .I4(\xy_reg[39]_i_3_n_8 ),
        .O(\xy[47]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \xy[47]_i_4 
       (.I0(\xy_reg[53]_i_21_n_14 ),
        .I1(\xy_reg[39]_i_3_n_9 ),
        .I2(\xy_reg[53]_i_13_n_12 ),
        .O(\xy[47]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xy[47]_i_5 
       (.I0(\xy_reg[39]_i_3_n_9 ),
        .I1(\xy_reg[53]_i_13_n_12 ),
        .I2(\xy_reg[53]_i_21_n_14 ),
        .O(\xy[47]_i_5_n_0 ));
  (* HLUTNM = "lutpair60" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xy[47]_i_6 
       (.I0(\xy_reg[53]_i_13_n_14 ),
        .I1(\xy_reg[39]_i_2_n_8 ),
        .I2(\xy_reg[39]_i_3_n_11 ),
        .O(\xy[47]_i_6_n_0 ));
  (* HLUTNM = "lutpair59" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xy[47]_i_7 
       (.I0(\xy_reg[53]_i_13_n_15 ),
        .I1(\xy_reg[39]_i_2_n_9 ),
        .I2(\xy_reg[39]_i_3_n_12 ),
        .O(\xy[47]_i_7_n_0 ));
  (* HLUTNM = "lutpair58" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[47]_i_8 
       (.I0(\xy_reg[39]_i_3_n_13 ),
        .I1(\xy_reg[39]_i_2_n_10 ),
        .O(\xy[47]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[47]_i_9 
       (.I0(\xy_reg[39]_i_3_n_14 ),
        .I1(\xy_reg[39]_i_2_n_11 ),
        .O(\xy[47]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1291" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[48]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[12]),
        .O(\xy[48]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1290" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[49]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[13]),
        .O(\xy[49]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1312" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[4]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[4]),
        .O(\xy[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1290" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[50]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[14]),
        .O(\xy[50]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1288" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[51]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy01_in[15]),
        .O(\xy[51]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1289" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[52]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy01_in[16]),
        .O(\xy[52]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1289" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[53]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy01_in[17]),
        .O(\xy[53]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \xy[53]_i_10 
       (.I0(\xy[53]_i_5_n_0 ),
        .I1(\xy_reg[53]_i_3_n_15 ),
        .I2(\xy_reg[53]_i_20_n_4 ),
        .I3(\xy_reg[53]_i_13_n_8 ),
        .I4(\xy_reg[53]_i_20_n_13 ),
        .O(\xy[53]_i_10_n_0 ));
  (* HLUTNM = "lutpair61" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \xy[53]_i_11 
       (.I0(\xy_reg[53]_i_20_n_14 ),
        .I1(\xy_reg[53]_i_13_n_9 ),
        .I2(\xy_reg[53]_i_20_n_13 ),
        .I3(\xy_reg[53]_i_13_n_8 ),
        .I4(\xy[53]_i_6_n_0 ),
        .O(\xy[53]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \xy[53]_i_12 
       (.I0(\xy[53]_i_7_n_0 ),
        .I1(\xy_reg[53]_i_20_n_15 ),
        .I2(\xy_reg[53]_i_21_n_4 ),
        .I3(\xy_reg[53]_i_13_n_10 ),
        .I4(\xy_reg[53]_i_20_n_14 ),
        .I5(\xy_reg[53]_i_13_n_9 ),
        .O(\xy[53]_i_12_n_0 ));
  LUT4 #(
    .INIT(16'h0777)) 
    \xy[53]_i_14 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[26] ),
        .O(\xy[53]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h08888FFF8FFF8FFF)) 
    \xy[53]_i_15 
       (.I0(\dy_reg_n_0_[25] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[26] ),
        .I3(\dx_reg_n_0_[24] ),
        .I4(\dx_reg_n_0_[26] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\xy[53]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[53]_i_16 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[23] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[24] ),
        .I4(\dx_reg_n_0_[25] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\xy[53]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'hE53F)) 
    \xy[53]_i_17 
       (.I0(\dy_reg_n_0_[25] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[26] ),
        .I3(\dx_reg_n_0_[26] ),
        .O(\xy[53]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h70ECE3130F5FAF5F)) 
    \xy[53]_i_18 
       (.I0(\dy_reg_n_0_[24] ),
        .I1(\dx_reg_n_0_[24] ),
        .I2(\dx_reg_n_0_[26] ),
        .I3(\dy_reg_n_0_[25] ),
        .I4(\dx_reg_n_0_[25] ),
        .I5(\dy_reg_n_0_[26] ),
        .O(\xy[53]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \xy[53]_i_19 
       (.I0(\xy[53]_i_16_n_0 ),
        .I1(\dx_reg_n_0_[26] ),
        .I2(\dy_reg_n_0_[24] ),
        .I3(\dy_reg_n_0_[26] ),
        .I4(\dx_reg_n_0_[24] ),
        .I5(\xy[53]_i_37_n_0 ),
        .O(\xy[53]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[53]_i_22 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[22] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[23] ),
        .I4(\dx_reg_n_0_[24] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\xy[53]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[53]_i_23 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[21] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[22] ),
        .I4(\dx_reg_n_0_[23] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\xy[53]_i_23_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[53]_i_24 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[20] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[21] ),
        .I4(\dx_reg_n_0_[22] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\xy[53]_i_24_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[53]_i_25 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[20] ),
        .I4(\dx_reg_n_0_[21] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\xy[53]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xy[53]_i_26 
       (.I0(\dy_reg_n_0_[24] ),
        .I1(\dx_reg_n_0_[21] ),
        .I2(\dx_reg_n_0_[20] ),
        .I3(\dy_reg_n_0_[25] ),
        .I4(\dx_reg_n_0_[19] ),
        .I5(\dy_reg_n_0_[26] ),
        .O(\xy[53]_i_26_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xy[53]_i_27 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dx_reg_n_0_[18] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[19] ),
        .O(\xy[53]_i_27_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[53]_i_28 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[24] ),
        .O(\xy[53]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[53]_i_29 
       (.I0(\xy[53]_i_22_n_0 ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[24] ),
        .I3(\dy_reg_n_0_[26] ),
        .I4(\dx_reg_n_0_[23] ),
        .I5(\xy[53]_i_50_n_0 ),
        .O(\xy[53]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[53]_i_30 
       (.I0(\xy[53]_i_23_n_0 ),
        .I1(\dx_reg_n_0_[24] ),
        .I2(\dy_reg_n_0_[24] ),
        .I3(\dy_reg_n_0_[26] ),
        .I4(\dx_reg_n_0_[22] ),
        .I5(\xy[53]_i_51_n_0 ),
        .O(\xy[53]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[53]_i_31 
       (.I0(\xy[53]_i_24_n_0 ),
        .I1(\dx_reg_n_0_[23] ),
        .I2(\dy_reg_n_0_[24] ),
        .I3(\dy_reg_n_0_[26] ),
        .I4(\dx_reg_n_0_[21] ),
        .I5(\xy[53]_i_52_n_0 ),
        .O(\xy[53]_i_31_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[53]_i_32 
       (.I0(\xy[53]_i_25_n_0 ),
        .I1(\dx_reg_n_0_[22] ),
        .I2(\dy_reg_n_0_[24] ),
        .I3(\dy_reg_n_0_[26] ),
        .I4(\dx_reg_n_0_[20] ),
        .I5(\xy[53]_i_53_n_0 ),
        .O(\xy[53]_i_32_n_0 ));
  LUT5 #(
    .INIT(32'hAA6A6A6A)) 
    \xy[53]_i_33 
       (.I0(\xy[53]_i_26_n_0 ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[18] ),
        .I4(\dy_reg_n_0_[26] ),
        .O(\xy[53]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xy[53]_i_34 
       (.I0(\dx_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[25] ),
        .I2(\dx_reg_n_0_[18] ),
        .I3(\dy_reg_n_0_[26] ),
        .I4(\dy_reg_n_0_[24] ),
        .I5(\dx_reg_n_0_[20] ),
        .O(\xy[53]_i_34_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[53]_i_35 
       (.I0(\dy_reg_n_0_[24] ),
        .I1(\dx_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dx_reg_n_0_[18] ),
        .O(\xy[53]_i_35_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[53]_i_36 
       (.I0(\dx_reg_n_0_[18] ),
        .I1(\dy_reg_n_0_[24] ),
        .O(\xy[53]_i_36_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1004" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[53]_i_37 
       (.I0(\dx_reg_n_0_[25] ),
        .I1(\dy_reg_n_0_[25] ),
        .O(\xy[53]_i_37_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xy[53]_i_38 
       (.I0(\dy_reg_n_0_[23] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[26] ),
        .O(\xy[53]_i_38_n_0 ));
  LUT6 #(
    .INIT(64'h8000EAC0EAC0EAC0)) 
    \xy[53]_i_39 
       (.I0(\dx_reg_n_0_[25] ),
        .I1(\dx_reg_n_0_[24] ),
        .I2(\dy_reg_n_0_[23] ),
        .I3(\dy_reg_n_0_[22] ),
        .I4(\dx_reg_n_0_[26] ),
        .I5(\dy_reg_n_0_[21] ),
        .O(\xy[53]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \xy[53]_i_4 
       (.I0(\xy_reg[53]_i_20_n_13 ),
        .I1(\xy_reg[53]_i_13_n_8 ),
        .I2(\xy_reg[53]_i_20_n_4 ),
        .I3(\xy_reg[53]_i_3_n_15 ),
        .O(\xy[53]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[53]_i_40 
       (.I0(\dy_reg_n_0_[23] ),
        .I1(\dx_reg_n_0_[23] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[24] ),
        .I4(\dx_reg_n_0_[25] ),
        .I5(\dy_reg_n_0_[21] ),
        .O(\xy[53]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h4F3F)) 
    \xy[53]_i_41 
       (.I0(\dy_reg_n_0_[22] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[23] ),
        .I3(\dx_reg_n_0_[26] ),
        .O(\xy[53]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h25404FBFF03FCF3F)) 
    \xy[53]_i_42 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dx_reg_n_0_[24] ),
        .I2(\dy_reg_n_0_[23] ),
        .I3(\dx_reg_n_0_[25] ),
        .I4(\dy_reg_n_0_[22] ),
        .I5(\dx_reg_n_0_[26] ),
        .O(\xy[53]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[53]_i_43 
       (.I0(\xy[53]_i_40_n_0 ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dx_reg_n_0_[24] ),
        .I4(\dy_reg_n_0_[23] ),
        .I5(\xy[53]_i_54_n_0 ),
        .O(\xy[53]_i_43_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xy[53]_i_44 
       (.I0(\dy_reg_n_0_[20] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[26] ),
        .O(\xy[53]_i_44_n_0 ));
  LUT6 #(
    .INIT(64'h8000EAC0EAC0EAC0)) 
    \xy[53]_i_45 
       (.I0(\dx_reg_n_0_[25] ),
        .I1(\dx_reg_n_0_[24] ),
        .I2(\dy_reg_n_0_[20] ),
        .I3(\dy_reg_n_0_[19] ),
        .I4(\dx_reg_n_0_[26] ),
        .I5(\dy_reg_n_0_[18] ),
        .O(\xy[53]_i_45_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[53]_i_46 
       (.I0(\dy_reg_n_0_[20] ),
        .I1(\dx_reg_n_0_[23] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[24] ),
        .I4(\dx_reg_n_0_[25] ),
        .I5(\dy_reg_n_0_[18] ),
        .O(\xy[53]_i_46_n_0 ));
  LUT4 #(
    .INIT(16'h4F3F)) 
    \xy[53]_i_47 
       (.I0(\dy_reg_n_0_[19] ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[20] ),
        .I3(\dx_reg_n_0_[26] ),
        .O(\xy[53]_i_47_n_0 ));
  LUT6 #(
    .INIT(64'h25404FBFF03FCF3F)) 
    \xy[53]_i_48 
       (.I0(\dy_reg_n_0_[18] ),
        .I1(\dx_reg_n_0_[24] ),
        .I2(\dy_reg_n_0_[20] ),
        .I3(\dx_reg_n_0_[25] ),
        .I4(\dy_reg_n_0_[19] ),
        .I5(\dx_reg_n_0_[26] ),
        .O(\xy[53]_i_48_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[53]_i_49 
       (.I0(\xy[53]_i_46_n_0 ),
        .I1(\dx_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dx_reg_n_0_[24] ),
        .I4(\dy_reg_n_0_[20] ),
        .I5(\xy[53]_i_55_n_0 ),
        .O(\xy[53]_i_49_n_0 ));
  (* HLUTNM = "lutpair61" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \xy[53]_i_5 
       (.I0(\xy_reg[53]_i_20_n_14 ),
        .I1(\xy_reg[53]_i_13_n_9 ),
        .I2(\xy_reg[53]_i_20_n_13 ),
        .I3(\xy_reg[53]_i_13_n_8 ),
        .O(\xy[53]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1001" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[53]_i_50 
       (.I0(\dx_reg_n_0_[24] ),
        .I1(\dy_reg_n_0_[25] ),
        .O(\xy[53]_i_50_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1003" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[53]_i_51 
       (.I0(\dx_reg_n_0_[23] ),
        .I1(\dy_reg_n_0_[25] ),
        .O(\xy[53]_i_51_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1003" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[53]_i_52 
       (.I0(\dx_reg_n_0_[22] ),
        .I1(\dy_reg_n_0_[25] ),
        .O(\xy[53]_i_52_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1000" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[53]_i_53 
       (.I0(\dx_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[25] ),
        .O(\xy[53]_i_53_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1002" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[53]_i_54 
       (.I0(\dx_reg_n_0_[26] ),
        .I1(\dy_reg_n_0_[21] ),
        .O(\xy[53]_i_54_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair978" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[53]_i_55 
       (.I0(\dx_reg_n_0_[26] ),
        .I1(\dy_reg_n_0_[18] ),
        .O(\xy[53]_i_55_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \xy[53]_i_6 
       (.I0(\xy_reg[53]_i_20_n_14 ),
        .I1(\xy_reg[53]_i_13_n_9 ),
        .I2(\xy_reg[53]_i_20_n_15 ),
        .I3(\xy_reg[53]_i_21_n_4 ),
        .I4(\xy_reg[53]_i_13_n_10 ),
        .O(\xy[53]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \xy[53]_i_7 
       (.I0(\xy_reg[39]_i_3_n_8 ),
        .I1(\xy_reg[53]_i_21_n_13 ),
        .I2(\xy_reg[53]_i_13_n_11 ),
        .I3(\xy_reg[53]_i_21_n_4 ),
        .I4(\xy_reg[53]_i_13_n_10 ),
        .I5(\xy_reg[53]_i_20_n_15 ),
        .O(\xy[53]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \xy[53]_i_8 
       (.I0(\xy_reg[53]_i_3_n_15 ),
        .I1(\xy_reg[53]_i_20_n_4 ),
        .I2(\xy_reg[53]_i_3_n_14 ),
        .I3(\xy_reg[53]_i_3_n_13 ),
        .O(\xy[53]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \xy[53]_i_9 
       (.I0(\xy_reg[53]_i_13_n_8 ),
        .I1(\xy_reg[53]_i_20_n_13 ),
        .I2(\xy_reg[53]_i_3_n_15 ),
        .I3(\xy_reg[53]_i_20_n_4 ),
        .I4(\xy_reg[53]_i_3_n_14 ),
        .O(\xy[53]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1288" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[54]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[0]),
        .O(\xy[54]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1287" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[55]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[1]),
        .O(\xy[55]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1287" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[56]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[2]),
        .O(\xy[56]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair913" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \xy[57]_i_1 
       (.I0(\xy_reg[57]_i_2_n_12 ),
        .I1(\xy_reg[57]_i_3_n_15 ),
        .I2(stateScore_reg_rep__1_n_0),
        .O(\xy[57]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_10 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[27] ),
        .O(\xy[57]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[57]_i_11 
       (.I0(\xy[57]_i_4_n_0 ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[32] ),
        .I3(\xy[57]_i_34_n_0 ),
        .I4(\dx_reg_n_0_[34] ),
        .I5(\dy_reg_n_0_[27] ),
        .O(\xy[57]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[57]_i_12 
       (.I0(\xy[57]_i_5_n_0 ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[31] ),
        .I3(\xy[57]_i_35_n_0 ),
        .I4(\dx_reg_n_0_[33] ),
        .I5(\dy_reg_n_0_[27] ),
        .O(\xy[57]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[57]_i_13 
       (.I0(\xy[57]_i_6_n_0 ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[30] ),
        .I3(\xy[57]_i_36_n_0 ),
        .I4(\dx_reg_n_0_[32] ),
        .I5(\dy_reg_n_0_[27] ),
        .O(\xy[57]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[57]_i_14 
       (.I0(\xy[57]_i_7_n_0 ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[29] ),
        .I3(\xy[57]_i_37_n_0 ),
        .I4(\dx_reg_n_0_[31] ),
        .I5(\dy_reg_n_0_[27] ),
        .O(\xy[57]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \xy[57]_i_15 
       (.I0(\xy[57]_i_8_n_0 ),
        .I1(\dy_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[29] ),
        .I3(\dx_reg_n_0_[27] ),
        .I4(\dx_reg_n_0_[28] ),
        .O(\xy[57]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[57]_i_16 
       (.I0(\dx_reg_n_0_[27] ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dx_reg_n_0_[28] ),
        .I3(\dy_reg_n_0_[28] ),
        .I4(\dy_reg_n_0_[27] ),
        .I5(\dx_reg_n_0_[29] ),
        .O(\xy[57]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[57]_i_17 
       (.I0(\dy_reg_n_0_[27] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\dx_reg_n_0_[27] ),
        .O(\xy[57]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_18 
       (.I0(\dx_reg_n_0_[27] ),
        .I1(\dy_reg_n_0_[27] ),
        .O(\xy[57]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[57]_i_19 
       (.I0(\dy_reg_n_0_[32] ),
        .I1(\dx_reg_n_0_[31] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[32] ),
        .I4(\dx_reg_n_0_[33] ),
        .I5(\dy_reg_n_0_[30] ),
        .O(\xy[57]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[57]_i_20 
       (.I0(\dy_reg_n_0_[32] ),
        .I1(\dx_reg_n_0_[30] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[31] ),
        .I4(\dx_reg_n_0_[32] ),
        .I5(\dy_reg_n_0_[30] ),
        .O(\xy[57]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[57]_i_21 
       (.I0(\dy_reg_n_0_[32] ),
        .I1(\dx_reg_n_0_[29] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[30] ),
        .I4(\dx_reg_n_0_[31] ),
        .I5(\dy_reg_n_0_[30] ),
        .O(\xy[57]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[57]_i_22 
       (.I0(\dy_reg_n_0_[32] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[29] ),
        .I4(\dx_reg_n_0_[30] ),
        .I5(\dy_reg_n_0_[30] ),
        .O(\xy[57]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[57]_i_23 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[30] ),
        .I2(\dx_reg_n_0_[29] ),
        .I3(\dy_reg_n_0_[31] ),
        .I4(\dx_reg_n_0_[28] ),
        .I5(\dy_reg_n_0_[32] ),
        .O(\xy[57]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[57]_i_24 
       (.I0(\dy_reg_n_0_[31] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[32] ),
        .I3(\dx_reg_n_0_[27] ),
        .O(\xy[57]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_25 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[30] ),
        .O(\xy[57]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[57]_i_26 
       (.I0(\xy[57]_i_19_n_0 ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[32] ),
        .I3(\xy[57]_i_38_n_0 ),
        .I4(\dx_reg_n_0_[34] ),
        .I5(\dy_reg_n_0_[30] ),
        .O(\xy[57]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[57]_i_27 
       (.I0(\xy[57]_i_20_n_0 ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[31] ),
        .I3(\xy[57]_i_39_n_0 ),
        .I4(\dx_reg_n_0_[33] ),
        .I5(\dy_reg_n_0_[30] ),
        .O(\xy[57]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[57]_i_28 
       (.I0(\xy[57]_i_21_n_0 ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[30] ),
        .I3(\xy[57]_i_40_n_0 ),
        .I4(\dx_reg_n_0_[32] ),
        .I5(\dy_reg_n_0_[30] ),
        .O(\xy[57]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[57]_i_29 
       (.I0(\xy[57]_i_22_n_0 ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[29] ),
        .I3(\xy[57]_i_41_n_0 ),
        .I4(\dx_reg_n_0_[31] ),
        .I5(\dy_reg_n_0_[30] ),
        .O(\xy[57]_i_29_n_0 ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \xy[57]_i_30 
       (.I0(\xy[57]_i_23_n_0 ),
        .I1(\dy_reg_n_0_[31] ),
        .I2(\dy_reg_n_0_[32] ),
        .I3(\dx_reg_n_0_[27] ),
        .I4(\dx_reg_n_0_[28] ),
        .O(\xy[57]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[57]_i_31 
       (.I0(\dx_reg_n_0_[27] ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dx_reg_n_0_[28] ),
        .I3(\dy_reg_n_0_[31] ),
        .I4(\dy_reg_n_0_[30] ),
        .I5(\dx_reg_n_0_[29] ),
        .O(\xy[57]_i_31_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[57]_i_32 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[27] ),
        .O(\xy[57]_i_32_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_33 
       (.I0(\dx_reg_n_0_[27] ),
        .I1(\dy_reg_n_0_[30] ),
        .O(\xy[57]_i_33_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair971" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_34 
       (.I0(\dx_reg_n_0_[33] ),
        .I1(\dy_reg_n_0_[28] ),
        .O(\xy[57]_i_34_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1006" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_35 
       (.I0(\dx_reg_n_0_[32] ),
        .I1(\dy_reg_n_0_[28] ),
        .O(\xy[57]_i_35_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1005" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_36 
       (.I0(\dx_reg_n_0_[31] ),
        .I1(\dy_reg_n_0_[28] ),
        .O(\xy[57]_i_36_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair981" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_37 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[28] ),
        .O(\xy[57]_i_37_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1008" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_38 
       (.I0(\dx_reg_n_0_[33] ),
        .I1(\dy_reg_n_0_[31] ),
        .O(\xy[57]_i_38_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1006" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_39 
       (.I0(\dx_reg_n_0_[32] ),
        .I1(\dy_reg_n_0_[31] ),
        .O(\xy[57]_i_39_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[57]_i_4 
       (.I0(\dy_reg_n_0_[29] ),
        .I1(\dx_reg_n_0_[31] ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\dx_reg_n_0_[32] ),
        .I4(\dx_reg_n_0_[33] ),
        .I5(\dy_reg_n_0_[27] ),
        .O(\xy[57]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1005" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_40 
       (.I0(\dx_reg_n_0_[31] ),
        .I1(\dy_reg_n_0_[31] ),
        .O(\xy[57]_i_40_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1007" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[57]_i_41 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[31] ),
        .O(\xy[57]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[57]_i_5 
       (.I0(\dy_reg_n_0_[29] ),
        .I1(\dx_reg_n_0_[30] ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\dx_reg_n_0_[31] ),
        .I4(\dx_reg_n_0_[32] ),
        .I5(\dy_reg_n_0_[27] ),
        .O(\xy[57]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[57]_i_6 
       (.I0(\dy_reg_n_0_[29] ),
        .I1(\dx_reg_n_0_[29] ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\dx_reg_n_0_[30] ),
        .I4(\dx_reg_n_0_[31] ),
        .I5(\dy_reg_n_0_[27] ),
        .O(\xy[57]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[57]_i_7 
       (.I0(\dy_reg_n_0_[29] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\dx_reg_n_0_[29] ),
        .I4(\dx_reg_n_0_[30] ),
        .I5(\dy_reg_n_0_[27] ),
        .O(\xy[57]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[57]_i_8 
       (.I0(\dy_reg_n_0_[27] ),
        .I1(\dx_reg_n_0_[30] ),
        .I2(\dx_reg_n_0_[29] ),
        .I3(\dy_reg_n_0_[28] ),
        .I4(\dx_reg_n_0_[28] ),
        .I5(\dy_reg_n_0_[29] ),
        .O(\xy[57]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[57]_i_9 
       (.I0(\dy_reg_n_0_[28] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[29] ),
        .I3(\dx_reg_n_0_[27] ),
        .O(\xy[57]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1286" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[58]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[4]),
        .O(\xy[58]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1286" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[59]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[5]),
        .O(\xy[59]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1311" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[5]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[5]),
        .O(\xy[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1285" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[60]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[6]),
        .O(\xy[60]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1285" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[61]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[7]),
        .O(\xy[61]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1284" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[62]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[8]),
        .O(\xy[62]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1284" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[63]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[9]),
        .O(\xy[63]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1283" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[64]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[10]),
        .O(\xy[64]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1283" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[65]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[11]),
        .O(\xy[65]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[65]_i_10 
       (.I0(\xy_reg[57]_i_3_n_15 ),
        .I1(\xy_reg[57]_i_2_n_12 ),
        .O(\xy[65]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \xy[65]_i_11 
       (.I0(\xy_reg[57]_i_3_n_9 ),
        .I1(\xy_reg[71]_i_13_n_12 ),
        .I2(\xy_reg[71]_i_21_n_13 ),
        .I3(\xy_reg[71]_i_13_n_11 ),
        .I4(\xy_reg[57]_i_3_n_8 ),
        .I5(\xy[65]_i_19_n_0 ),
        .O(\xy[65]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \xy[65]_i_12 
       (.I0(\xy_reg[71]_i_21_n_14 ),
        .I1(\xy_reg[57]_i_3_n_9 ),
        .I2(\xy_reg[71]_i_13_n_12 ),
        .I3(\xy_reg[57]_i_3_n_8 ),
        .I4(\xy_reg[71]_i_13_n_11 ),
        .I5(\xy_reg[71]_i_21_n_13 ),
        .O(\xy[65]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \xy[65]_i_13 
       (.I0(\xy_reg[71]_i_21_n_14 ),
        .I1(\xy_reg[71]_i_13_n_12 ),
        .I2(\xy_reg[57]_i_3_n_9 ),
        .I3(\xy_reg[57]_i_3_n_10 ),
        .I4(\xy_reg[71]_i_21_n_15 ),
        .I5(\xy_reg[71]_i_13_n_13 ),
        .O(\xy[65]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[65]_i_14 
       (.I0(\xy[65]_i_6_n_0 ),
        .I1(\xy_reg[71]_i_13_n_13 ),
        .I2(\xy_reg[71]_i_21_n_15 ),
        .I3(\xy_reg[57]_i_3_n_10 ),
        .O(\xy[65]_i_14_n_0 ));
  (* HLUTNM = "lutpair64" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[65]_i_15 
       (.I0(\xy_reg[71]_i_13_n_14 ),
        .I1(\xy_reg[57]_i_2_n_8 ),
        .I2(\xy_reg[57]_i_3_n_11 ),
        .I3(\xy[65]_i_7_n_0 ),
        .O(\xy[65]_i_15_n_0 ));
  (* HLUTNM = "lutpair63" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[65]_i_16 
       (.I0(\xy_reg[71]_i_13_n_15 ),
        .I1(\xy_reg[57]_i_2_n_9 ),
        .I2(\xy_reg[57]_i_3_n_12 ),
        .I3(\xy[65]_i_8_n_0 ),
        .O(\xy[65]_i_16_n_0 ));
  (* HLUTNM = "lutpair62" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \xy[65]_i_17 
       (.I0(\xy_reg[57]_i_3_n_13 ),
        .I1(\xy_reg[57]_i_2_n_10 ),
        .I2(\xy_reg[57]_i_2_n_11 ),
        .I3(\xy_reg[57]_i_3_n_14 ),
        .O(\xy[65]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \xy[65]_i_18 
       (.I0(\xy_reg[57]_i_2_n_12 ),
        .I1(\xy_reg[57]_i_3_n_15 ),
        .I2(\xy_reg[57]_i_2_n_11 ),
        .I3(\xy_reg[57]_i_3_n_14 ),
        .O(\xy[65]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xy[65]_i_19 
       (.I0(\xy_reg[71]_i_20_n_15 ),
        .I1(\xy_reg[71]_i_13_n_10 ),
        .I2(\xy_reg[71]_i_21_n_4 ),
        .O(\xy[65]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \xy[65]_i_3 
       (.I0(\xy_reg[57]_i_3_n_9 ),
        .I1(\xy_reg[71]_i_13_n_12 ),
        .I2(\xy_reg[71]_i_21_n_13 ),
        .I3(\xy_reg[71]_i_13_n_11 ),
        .I4(\xy_reg[57]_i_3_n_8 ),
        .O(\xy[65]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \xy[65]_i_4 
       (.I0(\xy_reg[71]_i_21_n_14 ),
        .I1(\xy_reg[57]_i_3_n_9 ),
        .I2(\xy_reg[71]_i_13_n_12 ),
        .O(\xy[65]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xy[65]_i_5 
       (.I0(\xy_reg[57]_i_3_n_9 ),
        .I1(\xy_reg[71]_i_13_n_12 ),
        .I2(\xy_reg[71]_i_21_n_14 ),
        .O(\xy[65]_i_5_n_0 ));
  (* HLUTNM = "lutpair64" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xy[65]_i_6 
       (.I0(\xy_reg[71]_i_13_n_14 ),
        .I1(\xy_reg[57]_i_2_n_8 ),
        .I2(\xy_reg[57]_i_3_n_11 ),
        .O(\xy[65]_i_6_n_0 ));
  (* HLUTNM = "lutpair63" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xy[65]_i_7 
       (.I0(\xy_reg[71]_i_13_n_15 ),
        .I1(\xy_reg[57]_i_2_n_9 ),
        .I2(\xy_reg[57]_i_3_n_12 ),
        .O(\xy[65]_i_7_n_0 ));
  (* HLUTNM = "lutpair62" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[65]_i_8 
       (.I0(\xy_reg[57]_i_3_n_13 ),
        .I1(\xy_reg[57]_i_2_n_10 ),
        .O(\xy[65]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[65]_i_9 
       (.I0(\xy_reg[57]_i_3_n_14 ),
        .I1(\xy_reg[57]_i_2_n_11 ),
        .O(\xy[65]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1282" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[66]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[12]),
        .O(\xy[66]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1282" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[67]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[13]),
        .O(\xy[67]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1281" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[68]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[14]),
        .O(\xy[68]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1281" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[69]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy02_in[15]),
        .O(\xy[69]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1311" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[6]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[6]),
        .O(\xy[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1280" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[70]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy02_in[16]),
        .O(\xy[70]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1280" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[71]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy02_in[17]),
        .O(\xy[71]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \xy[71]_i_10 
       (.I0(\xy[71]_i_5_n_0 ),
        .I1(\xy_reg[71]_i_3_n_15 ),
        .I2(\xy_reg[71]_i_20_n_4 ),
        .I3(\xy_reg[71]_i_13_n_8 ),
        .I4(\xy_reg[71]_i_20_n_13 ),
        .O(\xy[71]_i_10_n_0 ));
  (* HLUTNM = "lutpair65" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \xy[71]_i_11 
       (.I0(\xy_reg[71]_i_20_n_14 ),
        .I1(\xy_reg[71]_i_13_n_9 ),
        .I2(\xy_reg[71]_i_20_n_13 ),
        .I3(\xy_reg[71]_i_13_n_8 ),
        .I4(\xy[71]_i_6_n_0 ),
        .O(\xy[71]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \xy[71]_i_12 
       (.I0(\xy[71]_i_7_n_0 ),
        .I1(\xy_reg[71]_i_20_n_15 ),
        .I2(\xy_reg[71]_i_21_n_4 ),
        .I3(\xy_reg[71]_i_13_n_10 ),
        .I4(\xy_reg[71]_i_20_n_14 ),
        .I5(\xy_reg[71]_i_13_n_9 ),
        .O(\xy[71]_i_12_n_0 ));
  LUT4 #(
    .INIT(16'h0777)) 
    \xy[71]_i_14 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[35] ),
        .O(\xy[71]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h08888FFF8FFF8FFF)) 
    \xy[71]_i_15 
       (.I0(\dy_reg_n_0_[34] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[35] ),
        .I3(\dx_reg_n_0_[33] ),
        .I4(\dx_reg_n_0_[35] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\xy[71]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[71]_i_16 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[32] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[33] ),
        .I4(\dx_reg_n_0_[34] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\xy[71]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'hE53F)) 
    \xy[71]_i_17 
       (.I0(\dy_reg_n_0_[34] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[35] ),
        .I3(\dx_reg_n_0_[35] ),
        .O(\xy[71]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h70ECE3130F5FAF5F)) 
    \xy[71]_i_18 
       (.I0(\dy_reg_n_0_[33] ),
        .I1(\dx_reg_n_0_[33] ),
        .I2(\dx_reg_n_0_[35] ),
        .I3(\dy_reg_n_0_[34] ),
        .I4(\dx_reg_n_0_[34] ),
        .I5(\dy_reg_n_0_[35] ),
        .O(\xy[71]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \xy[71]_i_19 
       (.I0(\xy[71]_i_16_n_0 ),
        .I1(\dx_reg_n_0_[35] ),
        .I2(\dy_reg_n_0_[33] ),
        .I3(\dy_reg_n_0_[35] ),
        .I4(\dx_reg_n_0_[33] ),
        .I5(\xy[71]_i_37_n_0 ),
        .O(\xy[71]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[71]_i_22 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[31] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[32] ),
        .I4(\dx_reg_n_0_[33] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\xy[71]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[71]_i_23 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[30] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[31] ),
        .I4(\dx_reg_n_0_[32] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\xy[71]_i_23_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[71]_i_24 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[29] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[30] ),
        .I4(\dx_reg_n_0_[31] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\xy[71]_i_24_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[71]_i_25 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[29] ),
        .I4(\dx_reg_n_0_[30] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\xy[71]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xy[71]_i_26 
       (.I0(\dy_reg_n_0_[33] ),
        .I1(\dx_reg_n_0_[30] ),
        .I2(\dx_reg_n_0_[29] ),
        .I3(\dy_reg_n_0_[34] ),
        .I4(\dx_reg_n_0_[28] ),
        .I5(\dy_reg_n_0_[35] ),
        .O(\xy[71]_i_26_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xy[71]_i_27 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dx_reg_n_0_[27] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[28] ),
        .O(\xy[71]_i_27_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[71]_i_28 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[33] ),
        .O(\xy[71]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[71]_i_29 
       (.I0(\xy[71]_i_22_n_0 ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[33] ),
        .I3(\dy_reg_n_0_[35] ),
        .I4(\dx_reg_n_0_[32] ),
        .I5(\xy[71]_i_50_n_0 ),
        .O(\xy[71]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[71]_i_30 
       (.I0(\xy[71]_i_23_n_0 ),
        .I1(\dx_reg_n_0_[33] ),
        .I2(\dy_reg_n_0_[33] ),
        .I3(\dy_reg_n_0_[35] ),
        .I4(\dx_reg_n_0_[31] ),
        .I5(\xy[71]_i_51_n_0 ),
        .O(\xy[71]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[71]_i_31 
       (.I0(\xy[71]_i_24_n_0 ),
        .I1(\dx_reg_n_0_[32] ),
        .I2(\dy_reg_n_0_[33] ),
        .I3(\dy_reg_n_0_[35] ),
        .I4(\dx_reg_n_0_[30] ),
        .I5(\xy[71]_i_52_n_0 ),
        .O(\xy[71]_i_31_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[71]_i_32 
       (.I0(\xy[71]_i_25_n_0 ),
        .I1(\dx_reg_n_0_[31] ),
        .I2(\dy_reg_n_0_[33] ),
        .I3(\dy_reg_n_0_[35] ),
        .I4(\dx_reg_n_0_[29] ),
        .I5(\xy[71]_i_53_n_0 ),
        .O(\xy[71]_i_32_n_0 ));
  LUT5 #(
    .INIT(32'hAA6A6A6A)) 
    \xy[71]_i_33 
       (.I0(\xy[71]_i_26_n_0 ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[27] ),
        .I4(\dy_reg_n_0_[35] ),
        .O(\xy[71]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xy[71]_i_34 
       (.I0(\dx_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[34] ),
        .I2(\dx_reg_n_0_[27] ),
        .I3(\dy_reg_n_0_[35] ),
        .I4(\dy_reg_n_0_[33] ),
        .I5(\dx_reg_n_0_[29] ),
        .O(\xy[71]_i_34_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[71]_i_35 
       (.I0(\dy_reg_n_0_[33] ),
        .I1(\dx_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dx_reg_n_0_[27] ),
        .O(\xy[71]_i_35_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[71]_i_36 
       (.I0(\dx_reg_n_0_[27] ),
        .I1(\dy_reg_n_0_[33] ),
        .O(\xy[71]_i_36_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1011" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[71]_i_37 
       (.I0(\dx_reg_n_0_[34] ),
        .I1(\dy_reg_n_0_[34] ),
        .O(\xy[71]_i_37_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xy[71]_i_38 
       (.I0(\dy_reg_n_0_[32] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[35] ),
        .O(\xy[71]_i_38_n_0 ));
  LUT6 #(
    .INIT(64'h8000EAC0EAC0EAC0)) 
    \xy[71]_i_39 
       (.I0(\dx_reg_n_0_[34] ),
        .I1(\dx_reg_n_0_[33] ),
        .I2(\dy_reg_n_0_[32] ),
        .I3(\dy_reg_n_0_[31] ),
        .I4(\dx_reg_n_0_[35] ),
        .I5(\dy_reg_n_0_[30] ),
        .O(\xy[71]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \xy[71]_i_4 
       (.I0(\xy_reg[71]_i_20_n_13 ),
        .I1(\xy_reg[71]_i_13_n_8 ),
        .I2(\xy_reg[71]_i_20_n_4 ),
        .I3(\xy_reg[71]_i_3_n_15 ),
        .O(\xy[71]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[71]_i_40 
       (.I0(\dy_reg_n_0_[32] ),
        .I1(\dx_reg_n_0_[32] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[33] ),
        .I4(\dx_reg_n_0_[34] ),
        .I5(\dy_reg_n_0_[30] ),
        .O(\xy[71]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h4F3F)) 
    \xy[71]_i_41 
       (.I0(\dy_reg_n_0_[31] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[32] ),
        .I3(\dx_reg_n_0_[35] ),
        .O(\xy[71]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h25404FBFF03FCF3F)) 
    \xy[71]_i_42 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dx_reg_n_0_[33] ),
        .I2(\dy_reg_n_0_[32] ),
        .I3(\dx_reg_n_0_[34] ),
        .I4(\dy_reg_n_0_[31] ),
        .I5(\dx_reg_n_0_[35] ),
        .O(\xy[71]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[71]_i_43 
       (.I0(\xy[71]_i_40_n_0 ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dx_reg_n_0_[33] ),
        .I4(\dy_reg_n_0_[32] ),
        .I5(\xy[71]_i_54_n_0 ),
        .O(\xy[71]_i_43_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xy[71]_i_44 
       (.I0(\dy_reg_n_0_[29] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\dx_reg_n_0_[35] ),
        .O(\xy[71]_i_44_n_0 ));
  LUT6 #(
    .INIT(64'h8000EAC0EAC0EAC0)) 
    \xy[71]_i_45 
       (.I0(\dx_reg_n_0_[34] ),
        .I1(\dx_reg_n_0_[33] ),
        .I2(\dy_reg_n_0_[29] ),
        .I3(\dy_reg_n_0_[28] ),
        .I4(\dx_reg_n_0_[35] ),
        .I5(\dy_reg_n_0_[27] ),
        .O(\xy[71]_i_45_n_0 ));
  LUT6 #(
    .INIT(64'hF880808088000000)) 
    \xy[71]_i_46 
       (.I0(\dx_reg_n_0_[34] ),
        .I1(\dy_reg_n_0_[27] ),
        .I2(\dx_reg_n_0_[33] ),
        .I3(\dx_reg_n_0_[32] ),
        .I4(\dy_reg_n_0_[29] ),
        .I5(\dy_reg_n_0_[28] ),
        .O(\xy[71]_i_46_n_0 ));
  LUT4 #(
    .INIT(16'h4F3F)) 
    \xy[71]_i_47 
       (.I0(\dy_reg_n_0_[28] ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[29] ),
        .I3(\dx_reg_n_0_[35] ),
        .O(\xy[71]_i_47_n_0 ));
  LUT6 #(
    .INIT(64'h25404FBFF03FCF3F)) 
    \xy[71]_i_48 
       (.I0(\dy_reg_n_0_[27] ),
        .I1(\dx_reg_n_0_[33] ),
        .I2(\dy_reg_n_0_[29] ),
        .I3(\dx_reg_n_0_[34] ),
        .I4(\dy_reg_n_0_[28] ),
        .I5(\dx_reg_n_0_[35] ),
        .O(\xy[71]_i_48_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[71]_i_49 
       (.I0(\xy[71]_i_46_n_0 ),
        .I1(\dx_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\dx_reg_n_0_[33] ),
        .I4(\dy_reg_n_0_[29] ),
        .I5(\xy[71]_i_55_n_0 ),
        .O(\xy[71]_i_49_n_0 ));
  (* HLUTNM = "lutpair65" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \xy[71]_i_5 
       (.I0(\xy_reg[71]_i_20_n_14 ),
        .I1(\xy_reg[71]_i_13_n_9 ),
        .I2(\xy_reg[71]_i_20_n_13 ),
        .I3(\xy_reg[71]_i_13_n_8 ),
        .O(\xy[71]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1008" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[71]_i_50 
       (.I0(\dx_reg_n_0_[33] ),
        .I1(\dy_reg_n_0_[34] ),
        .O(\xy[71]_i_50_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1010" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[71]_i_51 
       (.I0(\dx_reg_n_0_[32] ),
        .I1(\dy_reg_n_0_[34] ),
        .O(\xy[71]_i_51_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1010" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[71]_i_52 
       (.I0(\dx_reg_n_0_[31] ),
        .I1(\dy_reg_n_0_[34] ),
        .O(\xy[71]_i_52_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1007" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[71]_i_53 
       (.I0(\dx_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[34] ),
        .O(\xy[71]_i_53_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1009" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[71]_i_54 
       (.I0(\dx_reg_n_0_[35] ),
        .I1(\dy_reg_n_0_[30] ),
        .O(\xy[71]_i_54_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair980" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[71]_i_55 
       (.I0(\dx_reg_n_0_[35] ),
        .I1(\dy_reg_n_0_[27] ),
        .O(\xy[71]_i_55_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \xy[71]_i_6 
       (.I0(\xy_reg[71]_i_20_n_14 ),
        .I1(\xy_reg[71]_i_13_n_9 ),
        .I2(\xy_reg[71]_i_20_n_15 ),
        .I3(\xy_reg[71]_i_21_n_4 ),
        .I4(\xy_reg[71]_i_13_n_10 ),
        .O(\xy[71]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \xy[71]_i_7 
       (.I0(\xy_reg[57]_i_3_n_8 ),
        .I1(\xy_reg[71]_i_21_n_13 ),
        .I2(\xy_reg[71]_i_13_n_11 ),
        .I3(\xy_reg[71]_i_21_n_4 ),
        .I4(\xy_reg[71]_i_13_n_10 ),
        .I5(\xy_reg[71]_i_20_n_15 ),
        .O(\xy[71]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \xy[71]_i_8 
       (.I0(\xy_reg[71]_i_3_n_15 ),
        .I1(\xy_reg[71]_i_20_n_4 ),
        .I2(\xy_reg[71]_i_3_n_14 ),
        .I3(\xy_reg[71]_i_3_n_13 ),
        .O(\xy[71]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \xy[71]_i_9 
       (.I0(\xy_reg[71]_i_13_n_8 ),
        .I1(\xy_reg[71]_i_20_n_13 ),
        .I2(\xy_reg[71]_i_3_n_15 ),
        .I3(\xy_reg[71]_i_20_n_4 ),
        .I4(\xy_reg[71]_i_3_n_14 ),
        .O(\xy[71]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1279" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[72]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[0]),
        .O(\xy[72]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1279" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[73]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[1]),
        .O(\xy[73]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1278" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[74]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[2]),
        .O(\xy[74]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair912" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \xy[75]_i_1 
       (.I0(\xy_reg[75]_i_2_n_12 ),
        .I1(\xy_reg[75]_i_3_n_15 ),
        .I2(stateScore_reg_rep__2_n_0),
        .O(\xy[75]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_10 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[36] ),
        .O(\xy[75]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[75]_i_11 
       (.I0(\xy[75]_i_4_n_0 ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[41] ),
        .I3(\xy[75]_i_34_n_0 ),
        .I4(\dx_reg_n_0_[43] ),
        .I5(\dy_reg_n_0_[36] ),
        .O(\xy[75]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[75]_i_12 
       (.I0(\xy[75]_i_5_n_0 ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[40] ),
        .I3(\xy[75]_i_35_n_0 ),
        .I4(\dx_reg_n_0_[42] ),
        .I5(\dy_reg_n_0_[36] ),
        .O(\xy[75]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[75]_i_13 
       (.I0(\xy[75]_i_6_n_0 ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[39] ),
        .I3(\xy[75]_i_36_n_0 ),
        .I4(\dx_reg_n_0_[41] ),
        .I5(\dy_reg_n_0_[36] ),
        .O(\xy[75]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[75]_i_14 
       (.I0(\xy[75]_i_7_n_0 ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[38] ),
        .I3(\xy[75]_i_37_n_0 ),
        .I4(\dx_reg_n_0_[40] ),
        .I5(\dy_reg_n_0_[36] ),
        .O(\xy[75]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \xy[75]_i_15 
       (.I0(\xy[75]_i_8_n_0 ),
        .I1(\dy_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[38] ),
        .I3(\dx_reg_n_0_[36] ),
        .I4(\dx_reg_n_0_[37] ),
        .O(\xy[75]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[75]_i_16 
       (.I0(\dx_reg_n_0_[36] ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dx_reg_n_0_[37] ),
        .I3(\dy_reg_n_0_[37] ),
        .I4(\dy_reg_n_0_[36] ),
        .I5(\dx_reg_n_0_[38] ),
        .O(\xy[75]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[75]_i_17 
       (.I0(\dy_reg_n_0_[36] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[36] ),
        .O(\xy[75]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_18 
       (.I0(\dx_reg_n_0_[36] ),
        .I1(\dy_reg_n_0_[36] ),
        .O(\xy[75]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[75]_i_19 
       (.I0(\dy_reg_n_0_[41] ),
        .I1(\dx_reg_n_0_[40] ),
        .I2(\dy_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[41] ),
        .I4(\dx_reg_n_0_[42] ),
        .I5(\dy_reg_n_0_[39] ),
        .O(\xy[75]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[75]_i_20 
       (.I0(\dy_reg_n_0_[41] ),
        .I1(\dx_reg_n_0_[39] ),
        .I2(\dy_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[40] ),
        .I4(\dx_reg_n_0_[41] ),
        .I5(\dy_reg_n_0_[39] ),
        .O(\xy[75]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[75]_i_21 
       (.I0(\dy_reg_n_0_[41] ),
        .I1(\dx_reg_n_0_[38] ),
        .I2(\dy_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[39] ),
        .I4(\dx_reg_n_0_[40] ),
        .I5(\dy_reg_n_0_[39] ),
        .O(\xy[75]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[75]_i_22 
       (.I0(\dy_reg_n_0_[41] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[38] ),
        .I4(\dx_reg_n_0_[39] ),
        .I5(\dy_reg_n_0_[39] ),
        .O(\xy[75]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[75]_i_23 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[39] ),
        .I2(\dx_reg_n_0_[38] ),
        .I3(\dy_reg_n_0_[40] ),
        .I4(\dx_reg_n_0_[37] ),
        .I5(\dy_reg_n_0_[41] ),
        .O(\xy[75]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[75]_i_24 
       (.I0(\dy_reg_n_0_[40] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[41] ),
        .I3(\dx_reg_n_0_[36] ),
        .O(\xy[75]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_25 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[39] ),
        .O(\xy[75]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[75]_i_26 
       (.I0(\xy[75]_i_19_n_0 ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[41] ),
        .I3(\xy[75]_i_38_n_0 ),
        .I4(\dx_reg_n_0_[43] ),
        .I5(\dy_reg_n_0_[39] ),
        .O(\xy[75]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[75]_i_27 
       (.I0(\xy[75]_i_20_n_0 ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[40] ),
        .I3(\xy[75]_i_39_n_0 ),
        .I4(\dx_reg_n_0_[42] ),
        .I5(\dy_reg_n_0_[39] ),
        .O(\xy[75]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[75]_i_28 
       (.I0(\xy[75]_i_21_n_0 ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[39] ),
        .I3(\xy[75]_i_40_n_0 ),
        .I4(\dx_reg_n_0_[41] ),
        .I5(\dy_reg_n_0_[39] ),
        .O(\xy[75]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \xy[75]_i_29 
       (.I0(\xy[75]_i_22_n_0 ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[38] ),
        .I3(\xy[75]_i_41_n_0 ),
        .I4(\dx_reg_n_0_[40] ),
        .I5(\dy_reg_n_0_[39] ),
        .O(\xy[75]_i_29_n_0 ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \xy[75]_i_30 
       (.I0(\xy[75]_i_23_n_0 ),
        .I1(\dy_reg_n_0_[40] ),
        .I2(\dy_reg_n_0_[41] ),
        .I3(\dx_reg_n_0_[36] ),
        .I4(\dx_reg_n_0_[37] ),
        .O(\xy[75]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[75]_i_31 
       (.I0(\dx_reg_n_0_[36] ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dx_reg_n_0_[37] ),
        .I3(\dy_reg_n_0_[40] ),
        .I4(\dy_reg_n_0_[39] ),
        .I5(\dx_reg_n_0_[38] ),
        .O(\xy[75]_i_31_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[75]_i_32 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[36] ),
        .O(\xy[75]_i_32_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_33 
       (.I0(\dx_reg_n_0_[36] ),
        .I1(\dy_reg_n_0_[39] ),
        .O(\xy[75]_i_33_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair973" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_34 
       (.I0(\dx_reg_n_0_[42] ),
        .I1(\dy_reg_n_0_[37] ),
        .O(\xy[75]_i_34_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1013" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_35 
       (.I0(\dx_reg_n_0_[41] ),
        .I1(\dy_reg_n_0_[37] ),
        .O(\xy[75]_i_35_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1012" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_36 
       (.I0(\dx_reg_n_0_[40] ),
        .I1(\dy_reg_n_0_[37] ),
        .O(\xy[75]_i_36_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair983" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_37 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[37] ),
        .O(\xy[75]_i_37_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1015" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_38 
       (.I0(\dx_reg_n_0_[42] ),
        .I1(\dy_reg_n_0_[40] ),
        .O(\xy[75]_i_38_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1013" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_39 
       (.I0(\dx_reg_n_0_[41] ),
        .I1(\dy_reg_n_0_[40] ),
        .O(\xy[75]_i_39_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[75]_i_4 
       (.I0(\dy_reg_n_0_[38] ),
        .I1(\dx_reg_n_0_[40] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[41] ),
        .I4(\dx_reg_n_0_[42] ),
        .I5(\dy_reg_n_0_[36] ),
        .O(\xy[75]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1012" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_40 
       (.I0(\dx_reg_n_0_[40] ),
        .I1(\dy_reg_n_0_[40] ),
        .O(\xy[75]_i_40_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1014" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[75]_i_41 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[40] ),
        .O(\xy[75]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[75]_i_5 
       (.I0(\dy_reg_n_0_[38] ),
        .I1(\dx_reg_n_0_[39] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[40] ),
        .I4(\dx_reg_n_0_[41] ),
        .I5(\dy_reg_n_0_[36] ),
        .O(\xy[75]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[75]_i_6 
       (.I0(\dy_reg_n_0_[38] ),
        .I1(\dx_reg_n_0_[38] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[39] ),
        .I4(\dx_reg_n_0_[40] ),
        .I5(\dy_reg_n_0_[36] ),
        .O(\xy[75]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[75]_i_7 
       (.I0(\dy_reg_n_0_[38] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[38] ),
        .I4(\dx_reg_n_0_[39] ),
        .I5(\dy_reg_n_0_[36] ),
        .O(\xy[75]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \xy[75]_i_8 
       (.I0(\dy_reg_n_0_[36] ),
        .I1(\dx_reg_n_0_[39] ),
        .I2(\dx_reg_n_0_[38] ),
        .I3(\dy_reg_n_0_[37] ),
        .I4(\dx_reg_n_0_[37] ),
        .I5(\dy_reg_n_0_[38] ),
        .O(\xy[75]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[75]_i_9 
       (.I0(\dy_reg_n_0_[37] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[38] ),
        .I3(\dx_reg_n_0_[36] ),
        .O(\xy[75]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1278" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[76]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[4]),
        .O(\xy[76]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1277" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[77]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[5]),
        .O(\xy[77]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1277" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[78]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[6]),
        .O(\xy[78]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1276" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[79]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[7]),
        .O(\xy[79]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1310" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[7]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[7]),
        .O(\xy[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1276" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[80]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[8]),
        .O(\xy[80]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1275" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[81]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[9]),
        .O(\xy[81]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1275" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[82]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[10]),
        .O(\xy[82]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1274" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[83]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[11]),
        .O(\xy[83]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[83]_i_10 
       (.I0(\xy_reg[75]_i_3_n_15 ),
        .I1(\xy_reg[75]_i_2_n_12 ),
        .O(\xy[83]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \xy[83]_i_11 
       (.I0(\xy_reg[75]_i_3_n_9 ),
        .I1(\xy_reg[89]_i_13_n_12 ),
        .I2(\xy_reg[89]_i_21_n_13 ),
        .I3(\xy_reg[89]_i_13_n_11 ),
        .I4(\xy_reg[75]_i_3_n_8 ),
        .I5(\xy[83]_i_19_n_0 ),
        .O(\xy[83]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \xy[83]_i_12 
       (.I0(\xy_reg[89]_i_21_n_14 ),
        .I1(\xy_reg[75]_i_3_n_9 ),
        .I2(\xy_reg[89]_i_13_n_12 ),
        .I3(\xy_reg[75]_i_3_n_8 ),
        .I4(\xy_reg[89]_i_13_n_11 ),
        .I5(\xy_reg[89]_i_21_n_13 ),
        .O(\xy[83]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \xy[83]_i_13 
       (.I0(\xy_reg[89]_i_21_n_14 ),
        .I1(\xy_reg[89]_i_13_n_12 ),
        .I2(\xy_reg[75]_i_3_n_9 ),
        .I3(\xy_reg[75]_i_3_n_10 ),
        .I4(\xy_reg[89]_i_21_n_15 ),
        .I5(\xy_reg[89]_i_13_n_13 ),
        .O(\xy[83]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[83]_i_14 
       (.I0(\xy[83]_i_6_n_0 ),
        .I1(\xy_reg[89]_i_13_n_13 ),
        .I2(\xy_reg[89]_i_21_n_15 ),
        .I3(\xy_reg[75]_i_3_n_10 ),
        .O(\xy[83]_i_14_n_0 ));
  (* HLUTNM = "lutpair68" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[83]_i_15 
       (.I0(\xy_reg[89]_i_13_n_14 ),
        .I1(\xy_reg[75]_i_2_n_8 ),
        .I2(\xy_reg[75]_i_3_n_11 ),
        .I3(\xy[83]_i_7_n_0 ),
        .O(\xy[83]_i_15_n_0 ));
  (* HLUTNM = "lutpair67" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \xy[83]_i_16 
       (.I0(\xy_reg[89]_i_13_n_15 ),
        .I1(\xy_reg[75]_i_2_n_9 ),
        .I2(\xy_reg[75]_i_3_n_12 ),
        .I3(\xy[83]_i_8_n_0 ),
        .O(\xy[83]_i_16_n_0 ));
  (* HLUTNM = "lutpair66" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \xy[83]_i_17 
       (.I0(\xy_reg[75]_i_3_n_13 ),
        .I1(\xy_reg[75]_i_2_n_10 ),
        .I2(\xy_reg[75]_i_2_n_11 ),
        .I3(\xy_reg[75]_i_3_n_14 ),
        .O(\xy[83]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \xy[83]_i_18 
       (.I0(\xy_reg[75]_i_2_n_12 ),
        .I1(\xy_reg[75]_i_3_n_15 ),
        .I2(\xy_reg[75]_i_2_n_11 ),
        .I3(\xy_reg[75]_i_3_n_14 ),
        .O(\xy[83]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xy[83]_i_19 
       (.I0(\xy_reg[89]_i_20_n_15 ),
        .I1(\xy_reg[89]_i_13_n_10 ),
        .I2(\xy_reg[89]_i_21_n_4 ),
        .O(\xy[83]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \xy[83]_i_3 
       (.I0(\xy_reg[75]_i_3_n_9 ),
        .I1(\xy_reg[89]_i_13_n_12 ),
        .I2(\xy_reg[89]_i_21_n_13 ),
        .I3(\xy_reg[89]_i_13_n_11 ),
        .I4(\xy_reg[75]_i_3_n_8 ),
        .O(\xy[83]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \xy[83]_i_4 
       (.I0(\xy_reg[89]_i_21_n_14 ),
        .I1(\xy_reg[75]_i_3_n_9 ),
        .I2(\xy_reg[89]_i_13_n_12 ),
        .O(\xy[83]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \xy[83]_i_5 
       (.I0(\xy_reg[75]_i_3_n_9 ),
        .I1(\xy_reg[89]_i_13_n_12 ),
        .I2(\xy_reg[89]_i_21_n_14 ),
        .O(\xy[83]_i_5_n_0 ));
  (* HLUTNM = "lutpair68" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xy[83]_i_6 
       (.I0(\xy_reg[89]_i_13_n_14 ),
        .I1(\xy_reg[75]_i_2_n_8 ),
        .I2(\xy_reg[75]_i_3_n_11 ),
        .O(\xy[83]_i_6_n_0 ));
  (* HLUTNM = "lutpair67" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \xy[83]_i_7 
       (.I0(\xy_reg[89]_i_13_n_15 ),
        .I1(\xy_reg[75]_i_2_n_9 ),
        .I2(\xy_reg[75]_i_3_n_12 ),
        .O(\xy[83]_i_7_n_0 ));
  (* HLUTNM = "lutpair66" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[83]_i_8 
       (.I0(\xy_reg[75]_i_3_n_13 ),
        .I1(\xy_reg[75]_i_2_n_10 ),
        .O(\xy[83]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[83]_i_9 
       (.I0(\xy_reg[75]_i_3_n_14 ),
        .I1(\xy_reg[75]_i_2_n_11 ),
        .O(\xy[83]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1274" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[84]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[12]),
        .O(\xy[84]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1273" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[85]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[13]),
        .O(\xy[85]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1273" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[86]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[14]),
        .O(\xy[86]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair912" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[87]_i_1 
       (.I0(stateScore_reg_rep__2_n_0),
        .I1(xy03_in[15]),
        .O(\xy[87]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1272" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[88]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy03_in[16]),
        .O(\xy[88]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1272" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[89]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(xy03_in[17]),
        .O(\xy[89]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \xy[89]_i_10 
       (.I0(\xy[89]_i_5_n_0 ),
        .I1(\xy_reg[89]_i_3_n_15 ),
        .I2(\xy_reg[89]_i_20_n_4 ),
        .I3(\xy_reg[89]_i_13_n_8 ),
        .I4(\xy_reg[89]_i_20_n_13 ),
        .O(\xy[89]_i_10_n_0 ));
  (* HLUTNM = "lutpair69" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \xy[89]_i_11 
       (.I0(\xy_reg[89]_i_20_n_14 ),
        .I1(\xy_reg[89]_i_13_n_9 ),
        .I2(\xy_reg[89]_i_20_n_13 ),
        .I3(\xy_reg[89]_i_13_n_8 ),
        .I4(\xy[89]_i_6_n_0 ),
        .O(\xy[89]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \xy[89]_i_12 
       (.I0(\xy[89]_i_7_n_0 ),
        .I1(\xy_reg[89]_i_20_n_15 ),
        .I2(\xy_reg[89]_i_21_n_4 ),
        .I3(\xy_reg[89]_i_13_n_10 ),
        .I4(\xy_reg[89]_i_20_n_14 ),
        .I5(\xy_reg[89]_i_13_n_9 ),
        .O(\xy[89]_i_12_n_0 ));
  LUT4 #(
    .INIT(16'h0777)) 
    \xy[89]_i_14 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[44] ),
        .O(\xy[89]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h08888FFF8FFF8FFF)) 
    \xy[89]_i_15 
       (.I0(\dy_reg_n_0_[43] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[44] ),
        .I3(\dx_reg_n_0_[42] ),
        .I4(\dx_reg_n_0_[44] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\xy[89]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[89]_i_16 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[41] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[42] ),
        .I4(\dx_reg_n_0_[43] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\xy[89]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'hE53F)) 
    \xy[89]_i_17 
       (.I0(\dy_reg_n_0_[43] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[44] ),
        .I3(\dx_reg_n_0_[44] ),
        .O(\xy[89]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h70ECE3130F5FAF5F)) 
    \xy[89]_i_18 
       (.I0(\dy_reg_n_0_[42] ),
        .I1(\dx_reg_n_0_[42] ),
        .I2(\dx_reg_n_0_[44] ),
        .I3(\dy_reg_n_0_[43] ),
        .I4(\dx_reg_n_0_[43] ),
        .I5(\dy_reg_n_0_[44] ),
        .O(\xy[89]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \xy[89]_i_19 
       (.I0(\xy[89]_i_16_n_0 ),
        .I1(\dx_reg_n_0_[44] ),
        .I2(\dy_reg_n_0_[42] ),
        .I3(\dy_reg_n_0_[44] ),
        .I4(\dx_reg_n_0_[42] ),
        .I5(\xy[89]_i_37_n_0 ),
        .O(\xy[89]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[89]_i_22 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[40] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[41] ),
        .I4(\dx_reg_n_0_[42] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\xy[89]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[89]_i_23 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[39] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[40] ),
        .I4(\dx_reg_n_0_[41] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\xy[89]_i_23_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[89]_i_24 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[38] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[39] ),
        .I4(\dx_reg_n_0_[40] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\xy[89]_i_24_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \xy[89]_i_25 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[38] ),
        .I4(\dx_reg_n_0_[39] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\xy[89]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xy[89]_i_26 
       (.I0(\dy_reg_n_0_[42] ),
        .I1(\dx_reg_n_0_[39] ),
        .I2(\dx_reg_n_0_[38] ),
        .I3(\dy_reg_n_0_[43] ),
        .I4(\dx_reg_n_0_[37] ),
        .I5(\dy_reg_n_0_[44] ),
        .O(\xy[89]_i_26_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \xy[89]_i_27 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dx_reg_n_0_[36] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[37] ),
        .O(\xy[89]_i_27_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[89]_i_28 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[42] ),
        .O(\xy[89]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[89]_i_29 
       (.I0(\xy[89]_i_22_n_0 ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[42] ),
        .I3(\dy_reg_n_0_[44] ),
        .I4(\dx_reg_n_0_[41] ),
        .I5(\xy[89]_i_50_n_0 ),
        .O(\xy[89]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[89]_i_30 
       (.I0(\xy[89]_i_23_n_0 ),
        .I1(\dx_reg_n_0_[42] ),
        .I2(\dy_reg_n_0_[42] ),
        .I3(\dy_reg_n_0_[44] ),
        .I4(\dx_reg_n_0_[40] ),
        .I5(\xy[89]_i_51_n_0 ),
        .O(\xy[89]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[89]_i_31 
       (.I0(\xy[89]_i_24_n_0 ),
        .I1(\dx_reg_n_0_[41] ),
        .I2(\dy_reg_n_0_[42] ),
        .I3(\dy_reg_n_0_[44] ),
        .I4(\dx_reg_n_0_[39] ),
        .I5(\xy[89]_i_52_n_0 ),
        .O(\xy[89]_i_31_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[89]_i_32 
       (.I0(\xy[89]_i_25_n_0 ),
        .I1(\dx_reg_n_0_[40] ),
        .I2(\dy_reg_n_0_[42] ),
        .I3(\dy_reg_n_0_[44] ),
        .I4(\dx_reg_n_0_[38] ),
        .I5(\xy[89]_i_53_n_0 ),
        .O(\xy[89]_i_32_n_0 ));
  LUT5 #(
    .INIT(32'hAA6A6A6A)) 
    \xy[89]_i_33 
       (.I0(\xy[89]_i_26_n_0 ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[36] ),
        .I4(\dy_reg_n_0_[44] ),
        .O(\xy[89]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \xy[89]_i_34 
       (.I0(\dx_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[43] ),
        .I2(\dx_reg_n_0_[36] ),
        .I3(\dy_reg_n_0_[44] ),
        .I4(\dy_reg_n_0_[42] ),
        .I5(\dx_reg_n_0_[38] ),
        .O(\xy[89]_i_34_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \xy[89]_i_35 
       (.I0(\dy_reg_n_0_[42] ),
        .I1(\dx_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dx_reg_n_0_[36] ),
        .O(\xy[89]_i_35_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \xy[89]_i_36 
       (.I0(\dx_reg_n_0_[36] ),
        .I1(\dy_reg_n_0_[42] ),
        .O(\xy[89]_i_36_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1018" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[89]_i_37 
       (.I0(\dx_reg_n_0_[43] ),
        .I1(\dy_reg_n_0_[43] ),
        .O(\xy[89]_i_37_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xy[89]_i_38 
       (.I0(\dy_reg_n_0_[41] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[44] ),
        .O(\xy[89]_i_38_n_0 ));
  LUT6 #(
    .INIT(64'h8000EAC0EAC0EAC0)) 
    \xy[89]_i_39 
       (.I0(\dx_reg_n_0_[43] ),
        .I1(\dx_reg_n_0_[42] ),
        .I2(\dy_reg_n_0_[41] ),
        .I3(\dy_reg_n_0_[40] ),
        .I4(\dx_reg_n_0_[44] ),
        .I5(\dy_reg_n_0_[39] ),
        .O(\xy[89]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \xy[89]_i_4 
       (.I0(\xy_reg[89]_i_20_n_13 ),
        .I1(\xy_reg[89]_i_13_n_8 ),
        .I2(\xy_reg[89]_i_20_n_4 ),
        .I3(\xy_reg[89]_i_3_n_15 ),
        .O(\xy[89]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[89]_i_40 
       (.I0(\dy_reg_n_0_[41] ),
        .I1(\dx_reg_n_0_[41] ),
        .I2(\dy_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[42] ),
        .I4(\dx_reg_n_0_[43] ),
        .I5(\dy_reg_n_0_[39] ),
        .O(\xy[89]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h4F3F)) 
    \xy[89]_i_41 
       (.I0(\dy_reg_n_0_[40] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[41] ),
        .I3(\dx_reg_n_0_[44] ),
        .O(\xy[89]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h25404FBFF03FCF3F)) 
    \xy[89]_i_42 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dx_reg_n_0_[42] ),
        .I2(\dy_reg_n_0_[41] ),
        .I3(\dx_reg_n_0_[43] ),
        .I4(\dy_reg_n_0_[40] ),
        .I5(\dx_reg_n_0_[44] ),
        .O(\xy[89]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[89]_i_43 
       (.I0(\xy[89]_i_40_n_0 ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[40] ),
        .I3(\dx_reg_n_0_[42] ),
        .I4(\dy_reg_n_0_[41] ),
        .I5(\xy[89]_i_54_n_0 ),
        .O(\xy[89]_i_43_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \xy[89]_i_44 
       (.I0(\dy_reg_n_0_[38] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[44] ),
        .O(\xy[89]_i_44_n_0 ));
  LUT6 #(
    .INIT(64'h8000EAC0EAC0EAC0)) 
    \xy[89]_i_45 
       (.I0(\dx_reg_n_0_[43] ),
        .I1(\dx_reg_n_0_[42] ),
        .I2(\dy_reg_n_0_[38] ),
        .I3(\dy_reg_n_0_[37] ),
        .I4(\dx_reg_n_0_[44] ),
        .I5(\dy_reg_n_0_[36] ),
        .O(\xy[89]_i_45_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \xy[89]_i_46 
       (.I0(\dy_reg_n_0_[38] ),
        .I1(\dx_reg_n_0_[41] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[42] ),
        .I4(\dx_reg_n_0_[43] ),
        .I5(\dy_reg_n_0_[36] ),
        .O(\xy[89]_i_46_n_0 ));
  LUT4 #(
    .INIT(16'h4F3F)) 
    \xy[89]_i_47 
       (.I0(\dy_reg_n_0_[37] ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[38] ),
        .I3(\dx_reg_n_0_[44] ),
        .O(\xy[89]_i_47_n_0 ));
  LUT6 #(
    .INIT(64'h25404FBFF03FCF3F)) 
    \xy[89]_i_48 
       (.I0(\dy_reg_n_0_[36] ),
        .I1(\dx_reg_n_0_[42] ),
        .I2(\dy_reg_n_0_[38] ),
        .I3(\dx_reg_n_0_[43] ),
        .I4(\dy_reg_n_0_[37] ),
        .I5(\dx_reg_n_0_[44] ),
        .O(\xy[89]_i_48_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A6A6A959595)) 
    \xy[89]_i_49 
       (.I0(\xy[89]_i_46_n_0 ),
        .I1(\dx_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dx_reg_n_0_[42] ),
        .I4(\dy_reg_n_0_[38] ),
        .I5(\xy[89]_i_55_n_0 ),
        .O(\xy[89]_i_49_n_0 ));
  (* HLUTNM = "lutpair69" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \xy[89]_i_5 
       (.I0(\xy_reg[89]_i_20_n_14 ),
        .I1(\xy_reg[89]_i_13_n_9 ),
        .I2(\xy_reg[89]_i_20_n_13 ),
        .I3(\xy_reg[89]_i_13_n_8 ),
        .O(\xy[89]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1015" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[89]_i_50 
       (.I0(\dx_reg_n_0_[42] ),
        .I1(\dy_reg_n_0_[43] ),
        .O(\xy[89]_i_50_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1017" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[89]_i_51 
       (.I0(\dx_reg_n_0_[41] ),
        .I1(\dy_reg_n_0_[43] ),
        .O(\xy[89]_i_51_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1017" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[89]_i_52 
       (.I0(\dx_reg_n_0_[40] ),
        .I1(\dy_reg_n_0_[43] ),
        .O(\xy[89]_i_52_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1014" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[89]_i_53 
       (.I0(\dx_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[43] ),
        .O(\xy[89]_i_53_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1016" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[89]_i_54 
       (.I0(\dx_reg_n_0_[44] ),
        .I1(\dy_reg_n_0_[39] ),
        .O(\xy[89]_i_54_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair982" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[89]_i_55 
       (.I0(\dx_reg_n_0_[44] ),
        .I1(\dy_reg_n_0_[36] ),
        .O(\xy[89]_i_55_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \xy[89]_i_6 
       (.I0(\xy_reg[89]_i_20_n_14 ),
        .I1(\xy_reg[89]_i_13_n_9 ),
        .I2(\xy_reg[89]_i_20_n_15 ),
        .I3(\xy_reg[89]_i_21_n_4 ),
        .I4(\xy_reg[89]_i_13_n_10 ),
        .O(\xy[89]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \xy[89]_i_7 
       (.I0(\xy_reg[75]_i_3_n_8 ),
        .I1(\xy_reg[89]_i_21_n_13 ),
        .I2(\xy_reg[89]_i_13_n_11 ),
        .I3(\xy_reg[89]_i_21_n_4 ),
        .I4(\xy_reg[89]_i_13_n_10 ),
        .I5(\xy_reg[89]_i_20_n_15 ),
        .O(\xy[89]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \xy[89]_i_8 
       (.I0(\xy_reg[89]_i_3_n_15 ),
        .I1(\xy_reg[89]_i_20_n_4 ),
        .I2(\xy_reg[89]_i_3_n_14 ),
        .I3(\xy_reg[89]_i_3_n_13 ),
        .O(\xy[89]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \xy[89]_i_9 
       (.I0(\xy_reg[89]_i_13_n_8 ),
        .I1(\xy_reg[89]_i_20_n_13 ),
        .I2(\xy_reg[89]_i_3_n_15 ),
        .I3(\xy_reg[89]_i_20_n_4 ),
        .I4(\xy_reg[89]_i_3_n_14 ),
        .O(\xy[89]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1310" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[8]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[8]),
        .O(\xy[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1309" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \xy[9]_i_1 
       (.I0(stateScore_reg_rep__1_n_0),
        .I1(xy0[9]),
        .O(\xy[9]_i_1_n_0 ));
  FDCE \xy_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[0]_i_1_n_0 ),
        .Q(xy[0]));
  FDCE \xy_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[10]_i_1_n_0 ),
        .Q(xy[10]));
  FDCE \xy_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[11]_i_1_n_0 ),
        .Q(xy[11]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xy_reg[11]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[11]_i_2_n_0 ,\xy_reg[11]_i_2_n_1 ,\xy_reg[11]_i_2_n_2 ,\xy_reg[11]_i_2_n_3 ,\xy_reg[11]_i_2_n_4 ,\xy_reg[11]_i_2_n_5 ,\xy_reg[11]_i_2_n_6 ,\xy_reg[11]_i_2_n_7 }),
        .DI({\xy[11]_i_3_n_0 ,\xy[11]_i_4_n_0 ,\xy[11]_i_5_n_0 ,\xy[11]_i_6_n_0 ,\xy[11]_i_7_n_0 ,\xy[11]_i_8_n_0 ,\xy[11]_i_9_n_0 ,\xy[11]_i_10_n_0 }),
        .O(xy0[11:4]),
        .S({\xy[11]_i_11_n_0 ,\xy[11]_i_12_n_0 ,\xy[11]_i_13_n_0 ,\xy[11]_i_14_n_0 ,\xy[11]_i_15_n_0 ,\xy[11]_i_16_n_0 ,\xy[11]_i_17_n_0 ,\xy[11]_i_18_n_0 }));
  FDCE \xy_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[12]_i_1_n_0 ),
        .Q(xy[12]));
  FDCE \xy_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[13]_i_1_n_0 ),
        .Q(xy[13]));
  FDCE \xy_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[14]_i_1_n_0 ),
        .Q(xy[14]));
  FDCE \xy_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[15]_i_1_n_0 ),
        .Q(xy[15]));
  FDCE \xy_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[16]_i_1_n_0 ),
        .Q(xy[16]));
  FDCE \xy_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[17]_i_1_n_0 ),
        .Q(xy[17]));
  CARRY8 \xy_reg[17]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[17]_i_13_n_0 ,\xy_reg[17]_i_13_n_1 ,\xy_reg[17]_i_13_n_2 ,\xy_reg[17]_i_13_n_3 ,\xy_reg[17]_i_13_n_4 ,\xy_reg[17]_i_13_n_5 ,\xy_reg[17]_i_13_n_6 ,\xy_reg[17]_i_13_n_7 }),
        .DI({\xy[17]_i_22_n_0 ,\xy[17]_i_23_n_0 ,\xy[17]_i_24_n_0 ,\xy[17]_i_25_n_0 ,\xy[17]_i_26_n_0 ,\xy[17]_i_27_n_0 ,\xy[17]_i_28_n_0 ,1'b0}),
        .O({\xy_reg[17]_i_13_n_8 ,\xy_reg[17]_i_13_n_9 ,\xy_reg[17]_i_13_n_10 ,\xy_reg[17]_i_13_n_11 ,\xy_reg[17]_i_13_n_12 ,\xy_reg[17]_i_13_n_13 ,\xy_reg[17]_i_13_n_14 ,\xy_reg[17]_i_13_n_15 }),
        .S({\xy[17]_i_29_n_0 ,\xy[17]_i_30_n_0 ,\xy[17]_i_31_n_0 ,\xy[17]_i_32_n_0 ,\xy[17]_i_33_n_0 ,\xy[17]_i_34_n_0 ,\xy[17]_i_35_n_0 ,\xy[17]_i_36_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xy_reg[17]_i_2 
       (.CI(\xy_reg[11]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[17]_i_2_CO_UNCONNECTED [7:5],\xy_reg[17]_i_2_n_3 ,\xy_reg[17]_i_2_n_4 ,\xy_reg[17]_i_2_n_5 ,\xy_reg[17]_i_2_n_6 ,\xy_reg[17]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\xy_reg[17]_i_3_n_13 ,\xy[17]_i_4_n_0 ,\xy[17]_i_5_n_0 ,\xy[17]_i_6_n_0 ,\xy[17]_i_7_n_0 }),
        .O({\NLW_xy_reg[17]_i_2_O_UNCONNECTED [7:6],xy0[17:12]}),
        .S({1'b0,1'b0,\xy_reg[17]_i_3_n_12 ,\xy[17]_i_8_n_0 ,\xy[17]_i_9_n_0 ,\xy[17]_i_10_n_0 ,\xy[17]_i_11_n_0 ,\xy[17]_i_12_n_0 }));
  CARRY8 \xy_reg[17]_i_20 
       (.CI(\xy_reg[3]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[17]_i_20_CO_UNCONNECTED [7:4],\xy_reg[17]_i_20_n_4 ,\NLW_xy_reg[17]_i_20_CO_UNCONNECTED [2],\xy_reg[17]_i_20_n_6 ,\xy_reg[17]_i_20_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[17]_i_38_n_0 ,\xy[17]_i_39_n_0 ,\xy[17]_i_40_n_0 }),
        .O({\NLW_xy_reg[17]_i_20_O_UNCONNECTED [7:3],\xy_reg[17]_i_20_n_13 ,\xy_reg[17]_i_20_n_14 ,\xy_reg[17]_i_20_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[17]_i_41_n_0 ,\xy[17]_i_42_n_0 ,\xy[17]_i_43_n_0 }));
  CARRY8 \xy_reg[17]_i_21 
       (.CI(\xy_reg[3]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[17]_i_21_CO_UNCONNECTED [7:4],\xy_reg[17]_i_21_n_4 ,\NLW_xy_reg[17]_i_21_CO_UNCONNECTED [2],\xy_reg[17]_i_21_n_6 ,\xy_reg[17]_i_21_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[17]_i_44_n_0 ,\xy[17]_i_45_n_0 ,\xy[17]_i_46_n_0 }),
        .O({\NLW_xy_reg[17]_i_21_O_UNCONNECTED [7:3],\xy_reg[17]_i_21_n_13 ,\xy_reg[17]_i_21_n_14 ,\xy_reg[17]_i_21_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[17]_i_47_n_0 ,\xy[17]_i_48_n_0 ,\xy[17]_i_49_n_0 }));
  CARRY8 \xy_reg[17]_i_3 
       (.CI(\xy_reg[17]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[17]_i_3_CO_UNCONNECTED [7:3],\xy_reg[17]_i_3_n_5 ,\xy_reg[17]_i_3_n_6 ,\xy_reg[17]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[17]_i_14_n_0 ,\xy[17]_i_15_n_0 ,\xy[17]_i_16_n_0 }),
        .O({\NLW_xy_reg[17]_i_3_O_UNCONNECTED [7:4],\xy_reg[17]_i_3_n_12 ,\xy_reg[17]_i_3_n_13 ,\xy_reg[17]_i_3_n_14 ,\xy_reg[17]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[17]_i_17_n_0 ,\xy[17]_i_18_n_0 ,\xy[17]_i_19_n_0 }));
  FDCE \xy_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[18]_i_1_n_0 ),
        .Q(xy[18]));
  FDCE \xy_reg[19] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[19]_i_1_n_0 ),
        .Q(xy[19]));
  FDCE \xy_reg[1] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[1]_i_1_n_0 ),
        .Q(xy[1]));
  FDCE \xy_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[20]_i_1_n_0 ),
        .Q(xy[20]));
  FDCE \xy_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[21]_i_1_n_0 ),
        .Q(xy[21]));
  CARRY8 \xy_reg[21]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[21]_i_2_n_0 ,\xy_reg[21]_i_2_n_1 ,\xy_reg[21]_i_2_n_2 ,\xy_reg[21]_i_2_n_3 ,\xy_reg[21]_i_2_n_4 ,\xy_reg[21]_i_2_n_5 ,\xy_reg[21]_i_2_n_6 ,\xy_reg[21]_i_2_n_7 }),
        .DI({\xy[21]_i_4_n_0 ,\xy[21]_i_5_n_0 ,\xy[21]_i_6_n_0 ,\xy[21]_i_7_n_0 ,\xy[21]_i_8_n_0 ,\xy[21]_i_9_n_0 ,\xy[21]_i_10_n_0 ,1'b0}),
        .O({\xy_reg[21]_i_2_n_8 ,\xy_reg[21]_i_2_n_9 ,\xy_reg[21]_i_2_n_10 ,\xy_reg[21]_i_2_n_11 ,\xy_reg[21]_i_2_n_12 ,xy00_in[2:0]}),
        .S({\xy[21]_i_11_n_0 ,\xy[21]_i_12_n_0 ,\xy[21]_i_13_n_0 ,\xy[21]_i_14_n_0 ,\xy[21]_i_15_n_0 ,\xy[21]_i_16_n_0 ,\xy[21]_i_17_n_0 ,\xy[21]_i_18_n_0 }));
  CARRY8 \xy_reg[21]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[21]_i_3_n_0 ,\xy_reg[21]_i_3_n_1 ,\xy_reg[21]_i_3_n_2 ,\xy_reg[21]_i_3_n_3 ,\xy_reg[21]_i_3_n_4 ,\xy_reg[21]_i_3_n_5 ,\xy_reg[21]_i_3_n_6 ,\xy_reg[21]_i_3_n_7 }),
        .DI({\xy[21]_i_19_n_0 ,\xy[21]_i_20_n_0 ,\xy[21]_i_21_n_0 ,\xy[21]_i_22_n_0 ,\xy[21]_i_23_n_0 ,\xy[21]_i_24_n_0 ,\xy[21]_i_25_n_0 ,1'b0}),
        .O({\xy_reg[21]_i_3_n_8 ,\xy_reg[21]_i_3_n_9 ,\xy_reg[21]_i_3_n_10 ,\xy_reg[21]_i_3_n_11 ,\xy_reg[21]_i_3_n_12 ,\xy_reg[21]_i_3_n_13 ,\xy_reg[21]_i_3_n_14 ,\xy_reg[21]_i_3_n_15 }),
        .S({\xy[21]_i_26_n_0 ,\xy[21]_i_27_n_0 ,\xy[21]_i_28_n_0 ,\xy[21]_i_29_n_0 ,\xy[21]_i_30_n_0 ,\xy[21]_i_31_n_0 ,\xy[21]_i_32_n_0 ,\xy[21]_i_33_n_0 }));
  FDCE \xy_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[22]_i_1_n_0 ),
        .Q(xy[22]));
  FDCE \xy_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[23]_i_1_n_0 ),
        .Q(xy[23]));
  FDCE \xy_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[24]_i_1_n_0 ),
        .Q(xy[24]));
  FDCE \xy_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[25]_i_1_n_0 ),
        .Q(xy[25]));
  FDCE \xy_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[26]_i_1_n_0 ),
        .Q(xy[26]));
  FDCE \xy_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[27]_i_1_n_0 ),
        .Q(xy[27]));
  FDCE \xy_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[28]_i_1_n_0 ),
        .Q(xy[28]));
  FDCE \xy_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[29]_i_1_n_0 ),
        .Q(xy[29]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xy_reg[29]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[29]_i_2_n_0 ,\xy_reg[29]_i_2_n_1 ,\xy_reg[29]_i_2_n_2 ,\xy_reg[29]_i_2_n_3 ,\xy_reg[29]_i_2_n_4 ,\xy_reg[29]_i_2_n_5 ,\xy_reg[29]_i_2_n_6 ,\xy_reg[29]_i_2_n_7 }),
        .DI({\xy[29]_i_3_n_0 ,\xy[29]_i_4_n_0 ,\xy[29]_i_5_n_0 ,\xy[29]_i_6_n_0 ,\xy[29]_i_7_n_0 ,\xy[29]_i_8_n_0 ,\xy[29]_i_9_n_0 ,\xy[29]_i_10_n_0 }),
        .O(xy00_in[11:4]),
        .S({\xy[29]_i_11_n_0 ,\xy[29]_i_12_n_0 ,\xy[29]_i_13_n_0 ,\xy[29]_i_14_n_0 ,\xy[29]_i_15_n_0 ,\xy[29]_i_16_n_0 ,\xy[29]_i_17_n_0 ,\xy[29]_i_18_n_0 }));
  FDCE \xy_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[2]_i_1_n_0 ),
        .Q(xy[2]));
  FDCE \xy_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[30]_i_1_n_0 ),
        .Q(xy[30]));
  FDCE \xy_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[31]_i_1_n_0 ),
        .Q(xy[31]));
  FDCE \xy_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[32]_i_1_n_0 ),
        .Q(xy[32]));
  FDCE \xy_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[33]_i_1_n_0 ),
        .Q(xy[33]));
  FDCE \xy_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[34]_i_1_n_0 ),
        .Q(xy[34]));
  FDCE \xy_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[35]_i_1_n_0 ),
        .Q(xy[35]));
  CARRY8 \xy_reg[35]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[35]_i_13_n_0 ,\xy_reg[35]_i_13_n_1 ,\xy_reg[35]_i_13_n_2 ,\xy_reg[35]_i_13_n_3 ,\xy_reg[35]_i_13_n_4 ,\xy_reg[35]_i_13_n_5 ,\xy_reg[35]_i_13_n_6 ,\xy_reg[35]_i_13_n_7 }),
        .DI({\xy[35]_i_22_n_0 ,\xy[35]_i_23_n_0 ,\xy[35]_i_24_n_0 ,\xy[35]_i_25_n_0 ,\xy[35]_i_26_n_0 ,\xy[35]_i_27_n_0 ,\xy[35]_i_28_n_0 ,1'b0}),
        .O({\xy_reg[35]_i_13_n_8 ,\xy_reg[35]_i_13_n_9 ,\xy_reg[35]_i_13_n_10 ,\xy_reg[35]_i_13_n_11 ,\xy_reg[35]_i_13_n_12 ,\xy_reg[35]_i_13_n_13 ,\xy_reg[35]_i_13_n_14 ,\xy_reg[35]_i_13_n_15 }),
        .S({\xy[35]_i_29_n_0 ,\xy[35]_i_30_n_0 ,\xy[35]_i_31_n_0 ,\xy[35]_i_32_n_0 ,\xy[35]_i_33_n_0 ,\xy[35]_i_34_n_0 ,\xy[35]_i_35_n_0 ,\xy[35]_i_36_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xy_reg[35]_i_2 
       (.CI(\xy_reg[29]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[35]_i_2_CO_UNCONNECTED [7:5],\xy_reg[35]_i_2_n_3 ,\xy_reg[35]_i_2_n_4 ,\xy_reg[35]_i_2_n_5 ,\xy_reg[35]_i_2_n_6 ,\xy_reg[35]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\xy_reg[35]_i_3_n_13 ,\xy[35]_i_4_n_0 ,\xy[35]_i_5_n_0 ,\xy[35]_i_6_n_0 ,\xy[35]_i_7_n_0 }),
        .O({\NLW_xy_reg[35]_i_2_O_UNCONNECTED [7:6],xy00_in[17:12]}),
        .S({1'b0,1'b0,\xy_reg[35]_i_3_n_12 ,\xy[35]_i_8_n_0 ,\xy[35]_i_9_n_0 ,\xy[35]_i_10_n_0 ,\xy[35]_i_11_n_0 ,\xy[35]_i_12_n_0 }));
  CARRY8 \xy_reg[35]_i_20 
       (.CI(\xy_reg[21]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[35]_i_20_CO_UNCONNECTED [7:4],\xy_reg[35]_i_20_n_4 ,\NLW_xy_reg[35]_i_20_CO_UNCONNECTED [2],\xy_reg[35]_i_20_n_6 ,\xy_reg[35]_i_20_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[35]_i_38_n_0 ,\xy[35]_i_39_n_0 ,\xy[35]_i_40_n_0 }),
        .O({\NLW_xy_reg[35]_i_20_O_UNCONNECTED [7:3],\xy_reg[35]_i_20_n_13 ,\xy_reg[35]_i_20_n_14 ,\xy_reg[35]_i_20_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[35]_i_41_n_0 ,\xy[35]_i_42_n_0 ,\xy[35]_i_43_n_0 }));
  CARRY8 \xy_reg[35]_i_21 
       (.CI(\xy_reg[21]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[35]_i_21_CO_UNCONNECTED [7:4],\xy_reg[35]_i_21_n_4 ,\NLW_xy_reg[35]_i_21_CO_UNCONNECTED [2],\xy_reg[35]_i_21_n_6 ,\xy_reg[35]_i_21_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[35]_i_44_n_0 ,\xy[35]_i_45_n_0 ,\xy[35]_i_46_n_0 }),
        .O({\NLW_xy_reg[35]_i_21_O_UNCONNECTED [7:3],\xy_reg[35]_i_21_n_13 ,\xy_reg[35]_i_21_n_14 ,\xy_reg[35]_i_21_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[35]_i_47_n_0 ,\xy[35]_i_48_n_0 ,\xy[35]_i_49_n_0 }));
  CARRY8 \xy_reg[35]_i_3 
       (.CI(\xy_reg[35]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[35]_i_3_CO_UNCONNECTED [7:3],\xy_reg[35]_i_3_n_5 ,\xy_reg[35]_i_3_n_6 ,\xy_reg[35]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[35]_i_14_n_0 ,\xy[35]_i_15_n_0 ,\xy[35]_i_16_n_0 }),
        .O({\NLW_xy_reg[35]_i_3_O_UNCONNECTED [7:4],\xy_reg[35]_i_3_n_12 ,\xy_reg[35]_i_3_n_13 ,\xy_reg[35]_i_3_n_14 ,\xy_reg[35]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[35]_i_17_n_0 ,\xy[35]_i_18_n_0 ,\xy[35]_i_19_n_0 }));
  FDCE \xy_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[36]_i_1_n_0 ),
        .Q(xy[36]));
  FDCE \xy_reg[37] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[37]_i_1_n_0 ),
        .Q(xy[37]));
  FDCE \xy_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[38]_i_1_n_0 ),
        .Q(xy[38]));
  FDCE \xy_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[39]_i_1_n_0 ),
        .Q(xy[39]));
  CARRY8 \xy_reg[39]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[39]_i_2_n_0 ,\xy_reg[39]_i_2_n_1 ,\xy_reg[39]_i_2_n_2 ,\xy_reg[39]_i_2_n_3 ,\xy_reg[39]_i_2_n_4 ,\xy_reg[39]_i_2_n_5 ,\xy_reg[39]_i_2_n_6 ,\xy_reg[39]_i_2_n_7 }),
        .DI({\xy[39]_i_4_n_0 ,\xy[39]_i_5_n_0 ,\xy[39]_i_6_n_0 ,\xy[39]_i_7_n_0 ,\xy[39]_i_8_n_0 ,\xy[39]_i_9_n_0 ,\xy[39]_i_10_n_0 ,1'b0}),
        .O({\xy_reg[39]_i_2_n_8 ,\xy_reg[39]_i_2_n_9 ,\xy_reg[39]_i_2_n_10 ,\xy_reg[39]_i_2_n_11 ,\xy_reg[39]_i_2_n_12 ,xy01_in[2:0]}),
        .S({\xy[39]_i_11_n_0 ,\xy[39]_i_12_n_0 ,\xy[39]_i_13_n_0 ,\xy[39]_i_14_n_0 ,\xy[39]_i_15_n_0 ,\xy[39]_i_16_n_0 ,\xy[39]_i_17_n_0 ,\xy[39]_i_18_n_0 }));
  CARRY8 \xy_reg[39]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[39]_i_3_n_0 ,\xy_reg[39]_i_3_n_1 ,\xy_reg[39]_i_3_n_2 ,\xy_reg[39]_i_3_n_3 ,\xy_reg[39]_i_3_n_4 ,\xy_reg[39]_i_3_n_5 ,\xy_reg[39]_i_3_n_6 ,\xy_reg[39]_i_3_n_7 }),
        .DI({\xy[39]_i_19_n_0 ,\xy[39]_i_20_n_0 ,\xy[39]_i_21_n_0 ,\xy[39]_i_22_n_0 ,\xy[39]_i_23_n_0 ,\xy[39]_i_24_n_0 ,\xy[39]_i_25_n_0 ,1'b0}),
        .O({\xy_reg[39]_i_3_n_8 ,\xy_reg[39]_i_3_n_9 ,\xy_reg[39]_i_3_n_10 ,\xy_reg[39]_i_3_n_11 ,\xy_reg[39]_i_3_n_12 ,\xy_reg[39]_i_3_n_13 ,\xy_reg[39]_i_3_n_14 ,\xy_reg[39]_i_3_n_15 }),
        .S({\xy[39]_i_26_n_0 ,\xy[39]_i_27_n_0 ,\xy[39]_i_28_n_0 ,\xy[39]_i_29_n_0 ,\xy[39]_i_30_n_0 ,\xy[39]_i_31_n_0 ,\xy[39]_i_32_n_0 ,\xy[39]_i_33_n_0 }));
  FDCE \xy_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[3]_i_1_n_0 ),
        .Q(xy[3]));
  CARRY8 \xy_reg[3]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[3]_i_2_n_0 ,\xy_reg[3]_i_2_n_1 ,\xy_reg[3]_i_2_n_2 ,\xy_reg[3]_i_2_n_3 ,\xy_reg[3]_i_2_n_4 ,\xy_reg[3]_i_2_n_5 ,\xy_reg[3]_i_2_n_6 ,\xy_reg[3]_i_2_n_7 }),
        .DI({\xy[3]_i_4_n_0 ,\xy[3]_i_5_n_0 ,\xy[3]_i_6_n_0 ,\xy[3]_i_7_n_0 ,\xy[3]_i_8_n_0 ,\xy[3]_i_9_n_0 ,\xy[3]_i_10_n_0 ,1'b0}),
        .O({\xy_reg[3]_i_2_n_8 ,\xy_reg[3]_i_2_n_9 ,\xy_reg[3]_i_2_n_10 ,\xy_reg[3]_i_2_n_11 ,\xy_reg[3]_i_2_n_12 ,xy0[2:0]}),
        .S({\xy[3]_i_11_n_0 ,\xy[3]_i_12_n_0 ,\xy[3]_i_13_n_0 ,\xy[3]_i_14_n_0 ,\xy[3]_i_15_n_0 ,\xy[3]_i_16_n_0 ,\xy[3]_i_17_n_0 ,\xy[3]_i_18_n_0 }));
  CARRY8 \xy_reg[3]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[3]_i_3_n_0 ,\xy_reg[3]_i_3_n_1 ,\xy_reg[3]_i_3_n_2 ,\xy_reg[3]_i_3_n_3 ,\xy_reg[3]_i_3_n_4 ,\xy_reg[3]_i_3_n_5 ,\xy_reg[3]_i_3_n_6 ,\xy_reg[3]_i_3_n_7 }),
        .DI({\xy[3]_i_19_n_0 ,\xy[3]_i_20_n_0 ,\xy[3]_i_21_n_0 ,\xy[3]_i_22_n_0 ,\xy[3]_i_23_n_0 ,\xy[3]_i_24_n_0 ,\xy[3]_i_25_n_0 ,1'b0}),
        .O({\xy_reg[3]_i_3_n_8 ,\xy_reg[3]_i_3_n_9 ,\xy_reg[3]_i_3_n_10 ,\xy_reg[3]_i_3_n_11 ,\xy_reg[3]_i_3_n_12 ,\xy_reg[3]_i_3_n_13 ,\xy_reg[3]_i_3_n_14 ,\xy_reg[3]_i_3_n_15 }),
        .S({\xy[3]_i_26_n_0 ,\xy[3]_i_27_n_0 ,\xy[3]_i_28_n_0 ,\xy[3]_i_29_n_0 ,\xy[3]_i_30_n_0 ,\xy[3]_i_31_n_0 ,\xy[3]_i_32_n_0 ,\xy[3]_i_33_n_0 }));
  FDCE \xy_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[40]_i_1_n_0 ),
        .Q(xy[40]));
  FDCE \xy_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[41]_i_1_n_0 ),
        .Q(xy[41]));
  FDCE \xy_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[42]_i_1_n_0 ),
        .Q(xy[42]));
  FDCE \xy_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[43]_i_1_n_0 ),
        .Q(xy[43]));
  FDCE \xy_reg[44] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[44]_i_1_n_0 ),
        .Q(xy[44]));
  FDCE \xy_reg[45] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[45]_i_1_n_0 ),
        .Q(xy[45]));
  FDCE \xy_reg[46] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[46]_i_1_n_0 ),
        .Q(xy[46]));
  FDCE \xy_reg[47] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[47]_i_1_n_0 ),
        .Q(xy[47]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xy_reg[47]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[47]_i_2_n_0 ,\xy_reg[47]_i_2_n_1 ,\xy_reg[47]_i_2_n_2 ,\xy_reg[47]_i_2_n_3 ,\xy_reg[47]_i_2_n_4 ,\xy_reg[47]_i_2_n_5 ,\xy_reg[47]_i_2_n_6 ,\xy_reg[47]_i_2_n_7 }),
        .DI({\xy[47]_i_3_n_0 ,\xy[47]_i_4_n_0 ,\xy[47]_i_5_n_0 ,\xy[47]_i_6_n_0 ,\xy[47]_i_7_n_0 ,\xy[47]_i_8_n_0 ,\xy[47]_i_9_n_0 ,\xy[47]_i_10_n_0 }),
        .O(xy01_in[11:4]),
        .S({\xy[47]_i_11_n_0 ,\xy[47]_i_12_n_0 ,\xy[47]_i_13_n_0 ,\xy[47]_i_14_n_0 ,\xy[47]_i_15_n_0 ,\xy[47]_i_16_n_0 ,\xy[47]_i_17_n_0 ,\xy[47]_i_18_n_0 }));
  FDCE \xy_reg[48] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[48]_i_1_n_0 ),
        .Q(xy[48]));
  FDCE \xy_reg[49] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[49]_i_1_n_0 ),
        .Q(xy[49]));
  FDCE \xy_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[4]_i_1_n_0 ),
        .Q(xy[4]));
  FDCE \xy_reg[50] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[50]_i_1_n_0 ),
        .Q(xy[50]));
  FDCE \xy_reg[51] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[51]_i_1_n_0 ),
        .Q(xy[51]));
  FDCE \xy_reg[52] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[52]_i_1_n_0 ),
        .Q(xy[52]));
  FDCE \xy_reg[53] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[53]_i_1_n_0 ),
        .Q(xy[53]));
  CARRY8 \xy_reg[53]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[53]_i_13_n_0 ,\xy_reg[53]_i_13_n_1 ,\xy_reg[53]_i_13_n_2 ,\xy_reg[53]_i_13_n_3 ,\xy_reg[53]_i_13_n_4 ,\xy_reg[53]_i_13_n_5 ,\xy_reg[53]_i_13_n_6 ,\xy_reg[53]_i_13_n_7 }),
        .DI({\xy[53]_i_22_n_0 ,\xy[53]_i_23_n_0 ,\xy[53]_i_24_n_0 ,\xy[53]_i_25_n_0 ,\xy[53]_i_26_n_0 ,\xy[53]_i_27_n_0 ,\xy[53]_i_28_n_0 ,1'b0}),
        .O({\xy_reg[53]_i_13_n_8 ,\xy_reg[53]_i_13_n_9 ,\xy_reg[53]_i_13_n_10 ,\xy_reg[53]_i_13_n_11 ,\xy_reg[53]_i_13_n_12 ,\xy_reg[53]_i_13_n_13 ,\xy_reg[53]_i_13_n_14 ,\xy_reg[53]_i_13_n_15 }),
        .S({\xy[53]_i_29_n_0 ,\xy[53]_i_30_n_0 ,\xy[53]_i_31_n_0 ,\xy[53]_i_32_n_0 ,\xy[53]_i_33_n_0 ,\xy[53]_i_34_n_0 ,\xy[53]_i_35_n_0 ,\xy[53]_i_36_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xy_reg[53]_i_2 
       (.CI(\xy_reg[47]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[53]_i_2_CO_UNCONNECTED [7:5],\xy_reg[53]_i_2_n_3 ,\xy_reg[53]_i_2_n_4 ,\xy_reg[53]_i_2_n_5 ,\xy_reg[53]_i_2_n_6 ,\xy_reg[53]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\xy_reg[53]_i_3_n_13 ,\xy[53]_i_4_n_0 ,\xy[53]_i_5_n_0 ,\xy[53]_i_6_n_0 ,\xy[53]_i_7_n_0 }),
        .O({\NLW_xy_reg[53]_i_2_O_UNCONNECTED [7:6],xy01_in[17:12]}),
        .S({1'b0,1'b0,\xy_reg[53]_i_3_n_12 ,\xy[53]_i_8_n_0 ,\xy[53]_i_9_n_0 ,\xy[53]_i_10_n_0 ,\xy[53]_i_11_n_0 ,\xy[53]_i_12_n_0 }));
  CARRY8 \xy_reg[53]_i_20 
       (.CI(\xy_reg[39]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[53]_i_20_CO_UNCONNECTED [7:4],\xy_reg[53]_i_20_n_4 ,\NLW_xy_reg[53]_i_20_CO_UNCONNECTED [2],\xy_reg[53]_i_20_n_6 ,\xy_reg[53]_i_20_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[53]_i_38_n_0 ,\xy[53]_i_39_n_0 ,\xy[53]_i_40_n_0 }),
        .O({\NLW_xy_reg[53]_i_20_O_UNCONNECTED [7:3],\xy_reg[53]_i_20_n_13 ,\xy_reg[53]_i_20_n_14 ,\xy_reg[53]_i_20_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[53]_i_41_n_0 ,\xy[53]_i_42_n_0 ,\xy[53]_i_43_n_0 }));
  CARRY8 \xy_reg[53]_i_21 
       (.CI(\xy_reg[39]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[53]_i_21_CO_UNCONNECTED [7:4],\xy_reg[53]_i_21_n_4 ,\NLW_xy_reg[53]_i_21_CO_UNCONNECTED [2],\xy_reg[53]_i_21_n_6 ,\xy_reg[53]_i_21_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[53]_i_44_n_0 ,\xy[53]_i_45_n_0 ,\xy[53]_i_46_n_0 }),
        .O({\NLW_xy_reg[53]_i_21_O_UNCONNECTED [7:3],\xy_reg[53]_i_21_n_13 ,\xy_reg[53]_i_21_n_14 ,\xy_reg[53]_i_21_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[53]_i_47_n_0 ,\xy[53]_i_48_n_0 ,\xy[53]_i_49_n_0 }));
  CARRY8 \xy_reg[53]_i_3 
       (.CI(\xy_reg[53]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[53]_i_3_CO_UNCONNECTED [7:3],\xy_reg[53]_i_3_n_5 ,\xy_reg[53]_i_3_n_6 ,\xy_reg[53]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[53]_i_14_n_0 ,\xy[53]_i_15_n_0 ,\xy[53]_i_16_n_0 }),
        .O({\NLW_xy_reg[53]_i_3_O_UNCONNECTED [7:4],\xy_reg[53]_i_3_n_12 ,\xy_reg[53]_i_3_n_13 ,\xy_reg[53]_i_3_n_14 ,\xy_reg[53]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[53]_i_17_n_0 ,\xy[53]_i_18_n_0 ,\xy[53]_i_19_n_0 }));
  FDCE \xy_reg[54] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[54]_i_1_n_0 ),
        .Q(xy[54]));
  FDCE \xy_reg[55] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[55]_i_1_n_0 ),
        .Q(xy[55]));
  FDCE \xy_reg[56] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[56]_i_1_n_0 ),
        .Q(xy[56]));
  FDCE \xy_reg[57] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[57]_i_1_n_0 ),
        .Q(xy[57]));
  CARRY8 \xy_reg[57]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[57]_i_2_n_0 ,\xy_reg[57]_i_2_n_1 ,\xy_reg[57]_i_2_n_2 ,\xy_reg[57]_i_2_n_3 ,\xy_reg[57]_i_2_n_4 ,\xy_reg[57]_i_2_n_5 ,\xy_reg[57]_i_2_n_6 ,\xy_reg[57]_i_2_n_7 }),
        .DI({\xy[57]_i_4_n_0 ,\xy[57]_i_5_n_0 ,\xy[57]_i_6_n_0 ,\xy[57]_i_7_n_0 ,\xy[57]_i_8_n_0 ,\xy[57]_i_9_n_0 ,\xy[57]_i_10_n_0 ,1'b0}),
        .O({\xy_reg[57]_i_2_n_8 ,\xy_reg[57]_i_2_n_9 ,\xy_reg[57]_i_2_n_10 ,\xy_reg[57]_i_2_n_11 ,\xy_reg[57]_i_2_n_12 ,xy02_in[2:0]}),
        .S({\xy[57]_i_11_n_0 ,\xy[57]_i_12_n_0 ,\xy[57]_i_13_n_0 ,\xy[57]_i_14_n_0 ,\xy[57]_i_15_n_0 ,\xy[57]_i_16_n_0 ,\xy[57]_i_17_n_0 ,\xy[57]_i_18_n_0 }));
  CARRY8 \xy_reg[57]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[57]_i_3_n_0 ,\xy_reg[57]_i_3_n_1 ,\xy_reg[57]_i_3_n_2 ,\xy_reg[57]_i_3_n_3 ,\xy_reg[57]_i_3_n_4 ,\xy_reg[57]_i_3_n_5 ,\xy_reg[57]_i_3_n_6 ,\xy_reg[57]_i_3_n_7 }),
        .DI({\xy[57]_i_19_n_0 ,\xy[57]_i_20_n_0 ,\xy[57]_i_21_n_0 ,\xy[57]_i_22_n_0 ,\xy[57]_i_23_n_0 ,\xy[57]_i_24_n_0 ,\xy[57]_i_25_n_0 ,1'b0}),
        .O({\xy_reg[57]_i_3_n_8 ,\xy_reg[57]_i_3_n_9 ,\xy_reg[57]_i_3_n_10 ,\xy_reg[57]_i_3_n_11 ,\xy_reg[57]_i_3_n_12 ,\xy_reg[57]_i_3_n_13 ,\xy_reg[57]_i_3_n_14 ,\xy_reg[57]_i_3_n_15 }),
        .S({\xy[57]_i_26_n_0 ,\xy[57]_i_27_n_0 ,\xy[57]_i_28_n_0 ,\xy[57]_i_29_n_0 ,\xy[57]_i_30_n_0 ,\xy[57]_i_31_n_0 ,\xy[57]_i_32_n_0 ,\xy[57]_i_33_n_0 }));
  FDCE \xy_reg[58] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[58]_i_1_n_0 ),
        .Q(xy[58]));
  FDCE \xy_reg[59] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[59]_i_1_n_0 ),
        .Q(xy[59]));
  FDCE \xy_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[5]_i_1_n_0 ),
        .Q(xy[5]));
  FDCE \xy_reg[60] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[60]_i_1_n_0 ),
        .Q(xy[60]));
  FDCE \xy_reg[61] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[61]_i_1_n_0 ),
        .Q(xy[61]));
  FDCE \xy_reg[62] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[62]_i_1_n_0 ),
        .Q(xy[62]));
  FDCE \xy_reg[63] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[63]_i_1_n_0 ),
        .Q(xy[63]));
  FDCE \xy_reg[64] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[64]_i_1_n_0 ),
        .Q(xy[64]));
  FDCE \xy_reg[65] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[65]_i_1_n_0 ),
        .Q(xy[65]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xy_reg[65]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[65]_i_2_n_0 ,\xy_reg[65]_i_2_n_1 ,\xy_reg[65]_i_2_n_2 ,\xy_reg[65]_i_2_n_3 ,\xy_reg[65]_i_2_n_4 ,\xy_reg[65]_i_2_n_5 ,\xy_reg[65]_i_2_n_6 ,\xy_reg[65]_i_2_n_7 }),
        .DI({\xy[65]_i_3_n_0 ,\xy[65]_i_4_n_0 ,\xy[65]_i_5_n_0 ,\xy[65]_i_6_n_0 ,\xy[65]_i_7_n_0 ,\xy[65]_i_8_n_0 ,\xy[65]_i_9_n_0 ,\xy[65]_i_10_n_0 }),
        .O(xy02_in[11:4]),
        .S({\xy[65]_i_11_n_0 ,\xy[65]_i_12_n_0 ,\xy[65]_i_13_n_0 ,\xy[65]_i_14_n_0 ,\xy[65]_i_15_n_0 ,\xy[65]_i_16_n_0 ,\xy[65]_i_17_n_0 ,\xy[65]_i_18_n_0 }));
  FDCE \xy_reg[66] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[66]_i_1_n_0 ),
        .Q(xy[66]));
  FDCE \xy_reg[67] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[67]_i_1_n_0 ),
        .Q(xy[67]));
  FDCE \xy_reg[68] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[68]_i_1_n_0 ),
        .Q(xy[68]));
  FDCE \xy_reg[69] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[69]_i_1_n_0 ),
        .Q(xy[69]));
  FDCE \xy_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[6]_i_1_n_0 ),
        .Q(xy[6]));
  FDCE \xy_reg[70] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[70]_i_1_n_0 ),
        .Q(xy[70]));
  FDCE \xy_reg[71] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[71]_i_1_n_0 ),
        .Q(xy[71]));
  CARRY8 \xy_reg[71]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[71]_i_13_n_0 ,\xy_reg[71]_i_13_n_1 ,\xy_reg[71]_i_13_n_2 ,\xy_reg[71]_i_13_n_3 ,\xy_reg[71]_i_13_n_4 ,\xy_reg[71]_i_13_n_5 ,\xy_reg[71]_i_13_n_6 ,\xy_reg[71]_i_13_n_7 }),
        .DI({\xy[71]_i_22_n_0 ,\xy[71]_i_23_n_0 ,\xy[71]_i_24_n_0 ,\xy[71]_i_25_n_0 ,\xy[71]_i_26_n_0 ,\xy[71]_i_27_n_0 ,\xy[71]_i_28_n_0 ,1'b0}),
        .O({\xy_reg[71]_i_13_n_8 ,\xy_reg[71]_i_13_n_9 ,\xy_reg[71]_i_13_n_10 ,\xy_reg[71]_i_13_n_11 ,\xy_reg[71]_i_13_n_12 ,\xy_reg[71]_i_13_n_13 ,\xy_reg[71]_i_13_n_14 ,\xy_reg[71]_i_13_n_15 }),
        .S({\xy[71]_i_29_n_0 ,\xy[71]_i_30_n_0 ,\xy[71]_i_31_n_0 ,\xy[71]_i_32_n_0 ,\xy[71]_i_33_n_0 ,\xy[71]_i_34_n_0 ,\xy[71]_i_35_n_0 ,\xy[71]_i_36_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xy_reg[71]_i_2 
       (.CI(\xy_reg[65]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[71]_i_2_CO_UNCONNECTED [7:5],\xy_reg[71]_i_2_n_3 ,\xy_reg[71]_i_2_n_4 ,\xy_reg[71]_i_2_n_5 ,\xy_reg[71]_i_2_n_6 ,\xy_reg[71]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\xy_reg[71]_i_3_n_13 ,\xy[71]_i_4_n_0 ,\xy[71]_i_5_n_0 ,\xy[71]_i_6_n_0 ,\xy[71]_i_7_n_0 }),
        .O({\NLW_xy_reg[71]_i_2_O_UNCONNECTED [7:6],xy02_in[17:12]}),
        .S({1'b0,1'b0,\xy_reg[71]_i_3_n_12 ,\xy[71]_i_8_n_0 ,\xy[71]_i_9_n_0 ,\xy[71]_i_10_n_0 ,\xy[71]_i_11_n_0 ,\xy[71]_i_12_n_0 }));
  CARRY8 \xy_reg[71]_i_20 
       (.CI(\xy_reg[57]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[71]_i_20_CO_UNCONNECTED [7:4],\xy_reg[71]_i_20_n_4 ,\NLW_xy_reg[71]_i_20_CO_UNCONNECTED [2],\xy_reg[71]_i_20_n_6 ,\xy_reg[71]_i_20_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[71]_i_38_n_0 ,\xy[71]_i_39_n_0 ,\xy[71]_i_40_n_0 }),
        .O({\NLW_xy_reg[71]_i_20_O_UNCONNECTED [7:3],\xy_reg[71]_i_20_n_13 ,\xy_reg[71]_i_20_n_14 ,\xy_reg[71]_i_20_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[71]_i_41_n_0 ,\xy[71]_i_42_n_0 ,\xy[71]_i_43_n_0 }));
  CARRY8 \xy_reg[71]_i_21 
       (.CI(\xy_reg[57]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[71]_i_21_CO_UNCONNECTED [7:4],\xy_reg[71]_i_21_n_4 ,\NLW_xy_reg[71]_i_21_CO_UNCONNECTED [2],\xy_reg[71]_i_21_n_6 ,\xy_reg[71]_i_21_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[71]_i_44_n_0 ,\xy[71]_i_45_n_0 ,\xy[71]_i_46_n_0 }),
        .O({\NLW_xy_reg[71]_i_21_O_UNCONNECTED [7:3],\xy_reg[71]_i_21_n_13 ,\xy_reg[71]_i_21_n_14 ,\xy_reg[71]_i_21_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[71]_i_47_n_0 ,\xy[71]_i_48_n_0 ,\xy[71]_i_49_n_0 }));
  CARRY8 \xy_reg[71]_i_3 
       (.CI(\xy_reg[71]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[71]_i_3_CO_UNCONNECTED [7:3],\xy_reg[71]_i_3_n_5 ,\xy_reg[71]_i_3_n_6 ,\xy_reg[71]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[71]_i_14_n_0 ,\xy[71]_i_15_n_0 ,\xy[71]_i_16_n_0 }),
        .O({\NLW_xy_reg[71]_i_3_O_UNCONNECTED [7:4],\xy_reg[71]_i_3_n_12 ,\xy_reg[71]_i_3_n_13 ,\xy_reg[71]_i_3_n_14 ,\xy_reg[71]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[71]_i_17_n_0 ,\xy[71]_i_18_n_0 ,\xy[71]_i_19_n_0 }));
  FDCE \xy_reg[72] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[72]_i_1_n_0 ),
        .Q(xy[72]));
  FDCE \xy_reg[73] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[73]_i_1_n_0 ),
        .Q(xy[73]));
  FDCE \xy_reg[74] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[74]_i_1_n_0 ),
        .Q(xy[74]));
  FDCE \xy_reg[75] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[75]_i_1_n_0 ),
        .Q(xy[75]));
  CARRY8 \xy_reg[75]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[75]_i_2_n_0 ,\xy_reg[75]_i_2_n_1 ,\xy_reg[75]_i_2_n_2 ,\xy_reg[75]_i_2_n_3 ,\xy_reg[75]_i_2_n_4 ,\xy_reg[75]_i_2_n_5 ,\xy_reg[75]_i_2_n_6 ,\xy_reg[75]_i_2_n_7 }),
        .DI({\xy[75]_i_4_n_0 ,\xy[75]_i_5_n_0 ,\xy[75]_i_6_n_0 ,\xy[75]_i_7_n_0 ,\xy[75]_i_8_n_0 ,\xy[75]_i_9_n_0 ,\xy[75]_i_10_n_0 ,1'b0}),
        .O({\xy_reg[75]_i_2_n_8 ,\xy_reg[75]_i_2_n_9 ,\xy_reg[75]_i_2_n_10 ,\xy_reg[75]_i_2_n_11 ,\xy_reg[75]_i_2_n_12 ,xy03_in[2:0]}),
        .S({\xy[75]_i_11_n_0 ,\xy[75]_i_12_n_0 ,\xy[75]_i_13_n_0 ,\xy[75]_i_14_n_0 ,\xy[75]_i_15_n_0 ,\xy[75]_i_16_n_0 ,\xy[75]_i_17_n_0 ,\xy[75]_i_18_n_0 }));
  CARRY8 \xy_reg[75]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[75]_i_3_n_0 ,\xy_reg[75]_i_3_n_1 ,\xy_reg[75]_i_3_n_2 ,\xy_reg[75]_i_3_n_3 ,\xy_reg[75]_i_3_n_4 ,\xy_reg[75]_i_3_n_5 ,\xy_reg[75]_i_3_n_6 ,\xy_reg[75]_i_3_n_7 }),
        .DI({\xy[75]_i_19_n_0 ,\xy[75]_i_20_n_0 ,\xy[75]_i_21_n_0 ,\xy[75]_i_22_n_0 ,\xy[75]_i_23_n_0 ,\xy[75]_i_24_n_0 ,\xy[75]_i_25_n_0 ,1'b0}),
        .O({\xy_reg[75]_i_3_n_8 ,\xy_reg[75]_i_3_n_9 ,\xy_reg[75]_i_3_n_10 ,\xy_reg[75]_i_3_n_11 ,\xy_reg[75]_i_3_n_12 ,\xy_reg[75]_i_3_n_13 ,\xy_reg[75]_i_3_n_14 ,\xy_reg[75]_i_3_n_15 }),
        .S({\xy[75]_i_26_n_0 ,\xy[75]_i_27_n_0 ,\xy[75]_i_28_n_0 ,\xy[75]_i_29_n_0 ,\xy[75]_i_30_n_0 ,\xy[75]_i_31_n_0 ,\xy[75]_i_32_n_0 ,\xy[75]_i_33_n_0 }));
  FDCE \xy_reg[76] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[76]_i_1_n_0 ),
        .Q(xy[76]));
  FDCE \xy_reg[77] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[77]_i_1_n_0 ),
        .Q(xy[77]));
  FDCE \xy_reg[78] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[78]_i_1_n_0 ),
        .Q(xy[78]));
  FDCE \xy_reg[79] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[79]_i_1_n_0 ),
        .Q(xy[79]));
  FDCE \xy_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[7]_i_1_n_0 ),
        .Q(xy[7]));
  FDCE \xy_reg[80] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[80]_i_1_n_0 ),
        .Q(xy[80]));
  FDCE \xy_reg[81] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[81]_i_1_n_0 ),
        .Q(xy[81]));
  FDCE \xy_reg[82] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[82]_i_1_n_0 ),
        .Q(xy[82]));
  FDCE \xy_reg[83] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[83]_i_1_n_0 ),
        .Q(xy[83]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xy_reg[83]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[83]_i_2_n_0 ,\xy_reg[83]_i_2_n_1 ,\xy_reg[83]_i_2_n_2 ,\xy_reg[83]_i_2_n_3 ,\xy_reg[83]_i_2_n_4 ,\xy_reg[83]_i_2_n_5 ,\xy_reg[83]_i_2_n_6 ,\xy_reg[83]_i_2_n_7 }),
        .DI({\xy[83]_i_3_n_0 ,\xy[83]_i_4_n_0 ,\xy[83]_i_5_n_0 ,\xy[83]_i_6_n_0 ,\xy[83]_i_7_n_0 ,\xy[83]_i_8_n_0 ,\xy[83]_i_9_n_0 ,\xy[83]_i_10_n_0 }),
        .O(xy03_in[11:4]),
        .S({\xy[83]_i_11_n_0 ,\xy[83]_i_12_n_0 ,\xy[83]_i_13_n_0 ,\xy[83]_i_14_n_0 ,\xy[83]_i_15_n_0 ,\xy[83]_i_16_n_0 ,\xy[83]_i_17_n_0 ,\xy[83]_i_18_n_0 }));
  FDCE \xy_reg[84] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[84]_i_1_n_0 ),
        .Q(xy[84]));
  FDCE \xy_reg[85] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[85]_i_1_n_0 ),
        .Q(xy[85]));
  FDCE \xy_reg[86] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[86]_i_1_n_0 ),
        .Q(xy[86]));
  FDCE \xy_reg[87] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[87]_i_1_n_0 ),
        .Q(xy[87]));
  FDCE \xy_reg[88] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[88]_i_1_n_0 ),
        .Q(xy[88]));
  FDCE \xy_reg[89] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[89]_i_1_n_0 ),
        .Q(xy[89]));
  CARRY8 \xy_reg[89]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\xy_reg[89]_i_13_n_0 ,\xy_reg[89]_i_13_n_1 ,\xy_reg[89]_i_13_n_2 ,\xy_reg[89]_i_13_n_3 ,\xy_reg[89]_i_13_n_4 ,\xy_reg[89]_i_13_n_5 ,\xy_reg[89]_i_13_n_6 ,\xy_reg[89]_i_13_n_7 }),
        .DI({\xy[89]_i_22_n_0 ,\xy[89]_i_23_n_0 ,\xy[89]_i_24_n_0 ,\xy[89]_i_25_n_0 ,\xy[89]_i_26_n_0 ,\xy[89]_i_27_n_0 ,\xy[89]_i_28_n_0 ,1'b0}),
        .O({\xy_reg[89]_i_13_n_8 ,\xy_reg[89]_i_13_n_9 ,\xy_reg[89]_i_13_n_10 ,\xy_reg[89]_i_13_n_11 ,\xy_reg[89]_i_13_n_12 ,\xy_reg[89]_i_13_n_13 ,\xy_reg[89]_i_13_n_14 ,\xy_reg[89]_i_13_n_15 }),
        .S({\xy[89]_i_29_n_0 ,\xy[89]_i_30_n_0 ,\xy[89]_i_31_n_0 ,\xy[89]_i_32_n_0 ,\xy[89]_i_33_n_0 ,\xy[89]_i_34_n_0 ,\xy[89]_i_35_n_0 ,\xy[89]_i_36_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \xy_reg[89]_i_2 
       (.CI(\xy_reg[83]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[89]_i_2_CO_UNCONNECTED [7:5],\xy_reg[89]_i_2_n_3 ,\xy_reg[89]_i_2_n_4 ,\xy_reg[89]_i_2_n_5 ,\xy_reg[89]_i_2_n_6 ,\xy_reg[89]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\xy_reg[89]_i_3_n_13 ,\xy[89]_i_4_n_0 ,\xy[89]_i_5_n_0 ,\xy[89]_i_6_n_0 ,\xy[89]_i_7_n_0 }),
        .O({\NLW_xy_reg[89]_i_2_O_UNCONNECTED [7:6],xy03_in[17:12]}),
        .S({1'b0,1'b0,\xy_reg[89]_i_3_n_12 ,\xy[89]_i_8_n_0 ,\xy[89]_i_9_n_0 ,\xy[89]_i_10_n_0 ,\xy[89]_i_11_n_0 ,\xy[89]_i_12_n_0 }));
  CARRY8 \xy_reg[89]_i_20 
       (.CI(\xy_reg[75]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[89]_i_20_CO_UNCONNECTED [7:4],\xy_reg[89]_i_20_n_4 ,\NLW_xy_reg[89]_i_20_CO_UNCONNECTED [2],\xy_reg[89]_i_20_n_6 ,\xy_reg[89]_i_20_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[89]_i_38_n_0 ,\xy[89]_i_39_n_0 ,\xy[89]_i_40_n_0 }),
        .O({\NLW_xy_reg[89]_i_20_O_UNCONNECTED [7:3],\xy_reg[89]_i_20_n_13 ,\xy_reg[89]_i_20_n_14 ,\xy_reg[89]_i_20_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[89]_i_41_n_0 ,\xy[89]_i_42_n_0 ,\xy[89]_i_43_n_0 }));
  CARRY8 \xy_reg[89]_i_21 
       (.CI(\xy_reg[75]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[89]_i_21_CO_UNCONNECTED [7:4],\xy_reg[89]_i_21_n_4 ,\NLW_xy_reg[89]_i_21_CO_UNCONNECTED [2],\xy_reg[89]_i_21_n_6 ,\xy_reg[89]_i_21_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[89]_i_44_n_0 ,\xy[89]_i_45_n_0 ,\xy[89]_i_46_n_0 }),
        .O({\NLW_xy_reg[89]_i_21_O_UNCONNECTED [7:3],\xy_reg[89]_i_21_n_13 ,\xy_reg[89]_i_21_n_14 ,\xy_reg[89]_i_21_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[89]_i_47_n_0 ,\xy[89]_i_48_n_0 ,\xy[89]_i_49_n_0 }));
  CARRY8 \xy_reg[89]_i_3 
       (.CI(\xy_reg[89]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_xy_reg[89]_i_3_CO_UNCONNECTED [7:3],\xy_reg[89]_i_3_n_5 ,\xy_reg[89]_i_3_n_6 ,\xy_reg[89]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\xy[89]_i_14_n_0 ,\xy[89]_i_15_n_0 ,\xy[89]_i_16_n_0 }),
        .O({\NLW_xy_reg[89]_i_3_O_UNCONNECTED [7:4],\xy_reg[89]_i_3_n_12 ,\xy_reg[89]_i_3_n_13 ,\xy_reg[89]_i_3_n_14 ,\xy_reg[89]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\xy[89]_i_17_n_0 ,\xy[89]_i_18_n_0 ,\xy[89]_i_19_n_0 }));
  FDCE \xy_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[8]_i_1_n_0 ),
        .Q(xy[8]));
  FDCE \xy_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\xy[9]_i_1_n_0 ),
        .Q(xy[9]));
  (* SOFT_HLUTNM = "soft_lutpair1197" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[0]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[72]),
        .O(\ysqr4p1[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1193" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[10]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[82]),
        .O(\ysqr4p1[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1192" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[11]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[83]),
        .O(\ysqr4p1[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1192" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[12]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[84]),
        .O(\ysqr4p1[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1191" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[13]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[85]),
        .O(\ysqr4p1[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1191" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[14]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[86]),
        .O(\ysqr4p1[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1140" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[15]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[87]),
        .O(\ysqr4p1[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1190" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[16]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(ysqr[88]),
        .O(\ysqr4p1[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1190" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[17]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(ysqr[89]),
        .O(\ysqr4p1[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1197" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[2]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[74]),
        .O(\ysqr4p1[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1196" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[3]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[75]),
        .O(\ysqr4p1[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1196" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[4]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[76]),
        .O(\ysqr4p1[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1195" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[5]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[77]),
        .O(\ysqr4p1[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1195" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[6]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[78]),
        .O(\ysqr4p1[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1194" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[7]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[79]),
        .O(\ysqr4p1[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1194" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[8]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[80]),
        .O(\ysqr4p1[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1193" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p1[9]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr[81]),
        .O(\ysqr4p1[9]_i_1_n_0 ));
  FDCE \ysqr4p1_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[0]_i_1_n_0 ),
        .Q(ysqr4p1[0]));
  FDCE \ysqr4p1_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[10]_i_1_n_0 ),
        .Q(ysqr4p1[10]));
  FDCE \ysqr4p1_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[11]_i_1_n_0 ),
        .Q(ysqr4p1[11]));
  FDCE \ysqr4p1_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[12]_i_1_n_0 ),
        .Q(ysqr4p1[12]));
  FDCE \ysqr4p1_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[13]_i_1_n_0 ),
        .Q(ysqr4p1[13]));
  FDCE \ysqr4p1_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[14]_i_1_n_0 ),
        .Q(ysqr4p1[14]));
  FDCE \ysqr4p1_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[15]_i_1_n_0 ),
        .Q(ysqr4p1[15]));
  FDCE \ysqr4p1_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[16]_i_1_n_0 ),
        .Q(ysqr4p1[16]));
  FDCE \ysqr4p1_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[17]_i_1_n_0 ),
        .Q(ysqr4p1[17]));
  FDCE \ysqr4p1_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[2]_i_1_n_0 ),
        .Q(ysqr4p1[2]));
  FDCE \ysqr4p1_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[3]_i_1_n_0 ),
        .Q(ysqr4p1[3]));
  FDCE \ysqr4p1_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[4]_i_1_n_0 ),
        .Q(ysqr4p1[4]));
  FDCE \ysqr4p1_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[5]_i_1_n_0 ),
        .Q(ysqr4p1[5]));
  FDCE \ysqr4p1_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[6]_i_1_n_0 ),
        .Q(ysqr4p1[6]));
  FDCE \ysqr4p1_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[7]_i_1_n_0 ),
        .Q(ysqr4p1[7]));
  FDCE \ysqr4p1_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[8]_i_1_n_0 ),
        .Q(ysqr4p1[8]));
  FDCE \ysqr4p1_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p1[9]_i_1_n_0 ),
        .Q(ysqr4p1[9]));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[0]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[0]),
        .O(\ysqr4p2[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1201" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[10]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[10]),
        .O(\ysqr4p2[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1201" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[11]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[11]),
        .O(\ysqr4p2[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1200" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[12]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[12]),
        .O(\ysqr4p2[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1200" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[13]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[13]),
        .O(\ysqr4p2[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1199" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[14]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[14]),
        .O(\ysqr4p2[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1199" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[15]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[15]),
        .O(\ysqr4p2[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1198" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[16]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(ysqr4p1[16]),
        .O(\ysqr4p2[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1198" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[17]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(ysqr4p1[17]),
        .O(\ysqr4p2[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1205" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[2]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[2]),
        .O(\ysqr4p2[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1205" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[3]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[3]),
        .O(\ysqr4p2[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1204" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[4]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[4]),
        .O(\ysqr4p2[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1204" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[5]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[5]),
        .O(\ysqr4p2[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1203" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[6]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[6]),
        .O(\ysqr4p2[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1203" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[7]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[7]),
        .O(\ysqr4p2[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1202" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[8]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[8]),
        .O(\ysqr4p2[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1202" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr4p2[9]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr4p1[9]),
        .O(\ysqr4p2[9]_i_1_n_0 ));
  FDCE \ysqr4p2_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[0]_i_1_n_0 ),
        .Q(ysqr4p2[0]));
  FDCE \ysqr4p2_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[10]_i_1_n_0 ),
        .Q(ysqr4p2[10]));
  FDCE \ysqr4p2_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[11]_i_1_n_0 ),
        .Q(ysqr4p2[11]));
  FDCE \ysqr4p2_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[12]_i_1_n_0 ),
        .Q(ysqr4p2[12]));
  FDCE \ysqr4p2_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[13]_i_1_n_0 ),
        .Q(ysqr4p2[13]));
  FDCE \ysqr4p2_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[14]_i_1_n_0 ),
        .Q(ysqr4p2[14]));
  FDCE \ysqr4p2_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[15]_i_1_n_0 ),
        .Q(ysqr4p2[15]));
  FDCE \ysqr4p2_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[16]_i_1_n_0 ),
        .Q(ysqr4p2[16]));
  FDCE \ysqr4p2_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[17]_i_1_n_0 ),
        .Q(ysqr4p2[17]));
  FDCE \ysqr4p2_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[2]_i_1_n_0 ),
        .Q(ysqr4p2[2]));
  FDCE \ysqr4p2_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[3]_i_1_n_0 ),
        .Q(ysqr4p2[3]));
  FDCE \ysqr4p2_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[4]_i_1_n_0 ),
        .Q(ysqr4p2[4]));
  FDCE \ysqr4p2_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[5]_i_1_n_0 ),
        .Q(ysqr4p2[5]));
  FDCE \ysqr4p2_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[6]_i_1_n_0 ),
        .Q(ysqr4p2[6]));
  FDCE \ysqr4p2_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[7]_i_1_n_0 ),
        .Q(ysqr4p2[7]));
  FDCE \ysqr4p2_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[8]_i_1_n_0 ),
        .Q(ysqr4p2[8]));
  FDCE \ysqr4p2_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr4p2[9]_i_1_n_0 ),
        .Q(ysqr4p2[9]));
  (* SOFT_HLUTNM = "soft_lutpair1172" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[0]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(\dy_reg_n_0_[0] ),
        .O(\ysqr[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1168" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[10]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[10]),
        .O(\ysqr[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1168" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[11]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[11]),
        .O(\ysqr[11]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[11]_i_10 
       (.I0(\ysqr_reg[3]_i_3_n_15 ),
        .I1(\ysqr_reg[3]_i_2_n_13 ),
        .O(\ysqr[11]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \ysqr[11]_i_11 
       (.I0(\ysqr_reg[3]_i_3_n_9 ),
        .I1(\ysqr_reg[17]_i_13_n_12 ),
        .I2(\ysqr_reg[17]_i_18_n_14 ),
        .I3(\ysqr_reg[17]_i_13_n_11 ),
        .I4(\ysqr_reg[3]_i_3_n_8 ),
        .I5(\ysqr[11]_i_19_n_0 ),
        .O(\ysqr[11]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \ysqr[11]_i_12 
       (.I0(\ysqr_reg[17]_i_18_n_15 ),
        .I1(\ysqr_reg[3]_i_3_n_9 ),
        .I2(\ysqr_reg[17]_i_13_n_12 ),
        .I3(\ysqr_reg[3]_i_3_n_8 ),
        .I4(\ysqr_reg[17]_i_13_n_11 ),
        .I5(\ysqr_reg[17]_i_18_n_14 ),
        .O(\ysqr[11]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \ysqr[11]_i_13 
       (.I0(\ysqr_reg[17]_i_18_n_15 ),
        .I1(\ysqr_reg[17]_i_13_n_12 ),
        .I2(\ysqr_reg[3]_i_3_n_9 ),
        .I3(\ysqr_reg[3]_i_3_n_10 ),
        .I4(\ysqr_reg[3]_i_2_n_8 ),
        .I5(\ysqr_reg[17]_i_13_n_13 ),
        .O(\ysqr[11]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[11]_i_14 
       (.I0(\ysqr[11]_i_6_n_0 ),
        .I1(\ysqr_reg[17]_i_13_n_13 ),
        .I2(\ysqr_reg[3]_i_2_n_8 ),
        .I3(\ysqr_reg[3]_i_3_n_10 ),
        .O(\ysqr[11]_i_14_n_0 ));
  (* HLUTNM = "lutpair28" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[11]_i_15 
       (.I0(\ysqr_reg[17]_i_13_n_14 ),
        .I1(\ysqr_reg[3]_i_2_n_9 ),
        .I2(\ysqr_reg[3]_i_3_n_11 ),
        .I3(\ysqr[11]_i_7_n_0 ),
        .O(\ysqr[11]_i_15_n_0 ));
  (* HLUTNM = "lutpair27" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[11]_i_16 
       (.I0(\ysqr_reg[17]_i_13_n_15 ),
        .I1(\ysqr_reg[3]_i_2_n_10 ),
        .I2(\ysqr_reg[3]_i_3_n_12 ),
        .I3(\ysqr[11]_i_8_n_0 ),
        .O(\ysqr[11]_i_16_n_0 ));
  (* HLUTNM = "lutpair26" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \ysqr[11]_i_17 
       (.I0(\ysqr_reg[3]_i_3_n_13 ),
        .I1(\ysqr_reg[3]_i_2_n_11 ),
        .I2(\ysqr_reg[3]_i_2_n_12 ),
        .I3(\ysqr_reg[3]_i_3_n_14 ),
        .O(\ysqr[11]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \ysqr[11]_i_18 
       (.I0(\ysqr_reg[3]_i_2_n_13 ),
        .I1(\ysqr_reg[3]_i_3_n_15 ),
        .I2(\ysqr_reg[3]_i_2_n_12 ),
        .I3(\ysqr_reg[3]_i_3_n_14 ),
        .O(\ysqr[11]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \ysqr[11]_i_19 
       (.I0(\ysqr_reg[17]_i_17_n_15 ),
        .I1(\ysqr_reg[17]_i_13_n_10 ),
        .I2(\ysqr_reg[17]_i_18_n_5 ),
        .O(\ysqr[11]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \ysqr[11]_i_3 
       (.I0(\ysqr_reg[3]_i_3_n_9 ),
        .I1(\ysqr_reg[17]_i_13_n_12 ),
        .I2(\ysqr_reg[17]_i_18_n_14 ),
        .I3(\ysqr_reg[17]_i_13_n_11 ),
        .I4(\ysqr_reg[3]_i_3_n_8 ),
        .O(\ysqr[11]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \ysqr[11]_i_4 
       (.I0(\ysqr_reg[17]_i_18_n_15 ),
        .I1(\ysqr_reg[3]_i_3_n_9 ),
        .I2(\ysqr_reg[17]_i_13_n_12 ),
        .O(\ysqr[11]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \ysqr[11]_i_5 
       (.I0(\ysqr_reg[3]_i_3_n_9 ),
        .I1(\ysqr_reg[17]_i_13_n_12 ),
        .I2(\ysqr_reg[17]_i_18_n_15 ),
        .O(\ysqr[11]_i_5_n_0 ));
  (* HLUTNM = "lutpair28" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \ysqr[11]_i_6 
       (.I0(\ysqr_reg[17]_i_13_n_14 ),
        .I1(\ysqr_reg[3]_i_2_n_9 ),
        .I2(\ysqr_reg[3]_i_3_n_11 ),
        .O(\ysqr[11]_i_6_n_0 ));
  (* HLUTNM = "lutpair27" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \ysqr[11]_i_7 
       (.I0(\ysqr_reg[17]_i_13_n_15 ),
        .I1(\ysqr_reg[3]_i_2_n_10 ),
        .I2(\ysqr_reg[3]_i_3_n_12 ),
        .O(\ysqr[11]_i_7_n_0 ));
  (* HLUTNM = "lutpair26" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[11]_i_8 
       (.I0(\ysqr_reg[3]_i_3_n_13 ),
        .I1(\ysqr_reg[3]_i_2_n_11 ),
        .O(\ysqr[11]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[11]_i_9 
       (.I0(\ysqr_reg[3]_i_3_n_14 ),
        .I1(\ysqr_reg[3]_i_2_n_12 ),
        .O(\ysqr[11]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1167" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[12]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[12]),
        .O(\ysqr[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1167" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[13]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[13]),
        .O(\ysqr[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1166" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[14]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[14]),
        .O(\ysqr[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1166" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[15]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[15]),
        .O(\ysqr[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1165" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[16]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[16]),
        .O(\ysqr[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1165" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[17]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[17]),
        .O(\ysqr[17]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \ysqr[17]_i_10 
       (.I0(\ysqr[17]_i_5_n_0 ),
        .I1(\ysqr_reg[17]_i_3_n_15 ),
        .I2(\ysqr_reg[17]_i_17_n_4 ),
        .I3(\ysqr_reg[17]_i_13_n_8 ),
        .I4(\ysqr_reg[17]_i_17_n_13 ),
        .O(\ysqr[17]_i_10_n_0 ));
  (* HLUTNM = "lutpair29" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \ysqr[17]_i_11 
       (.I0(\ysqr_reg[17]_i_17_n_14 ),
        .I1(\ysqr_reg[17]_i_13_n_9 ),
        .I2(\ysqr_reg[17]_i_17_n_13 ),
        .I3(\ysqr_reg[17]_i_13_n_8 ),
        .I4(\ysqr[17]_i_6_n_0 ),
        .O(\ysqr[17]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \ysqr[17]_i_12 
       (.I0(\ysqr[17]_i_7_n_0 ),
        .I1(\ysqr_reg[17]_i_17_n_15 ),
        .I2(\ysqr_reg[17]_i_18_n_5 ),
        .I3(\ysqr_reg[17]_i_13_n_10 ),
        .I4(\ysqr_reg[17]_i_17_n_14 ),
        .I5(\ysqr_reg[17]_i_13_n_9 ),
        .O(\ysqr[17]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \ysqr[17]_i_14 
       (.I0(\dy_reg_n_0_[7] ),
        .I1(\dy_reg_n_0_[8] ),
        .O(\ysqr[17]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \ysqr[17]_i_15 
       (.I0(\dy_reg_n_0_[6] ),
        .I1(\dy_reg_n_0_[8] ),
        .O(\ysqr[17]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[17]_i_16 
       (.I0(\dy_reg_n_0_[7] ),
        .I1(\dy_reg_n_0_[6] ),
        .O(\ysqr[17]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hF7777000)) 
    \ysqr[17]_i_19 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dy_reg_n_0_[4] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dy_reg_n_0_[5] ),
        .I4(\dy_reg_n_0_[6] ),
        .O(\ysqr[17]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[17]_i_20 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dy_reg_n_0_[3] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dy_reg_n_0_[4] ),
        .I4(\dy_reg_n_0_[5] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\ysqr[17]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[17]_i_21 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dy_reg_n_0_[3] ),
        .I4(\dy_reg_n_0_[4] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\ysqr[17]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[17]_i_22 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dy_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dy_reg_n_0_[2] ),
        .I4(\dy_reg_n_0_[3] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\ysqr[17]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h7000)) 
    \ysqr[17]_i_23 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dy_reg_n_0_[0] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dy_reg_n_0_[1] ),
        .O(\ysqr[17]_i_23_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[17]_i_24 
       (.I0(\dy_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[6] ),
        .O(\ysqr[17]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'h8E11F555)) 
    \ysqr[17]_i_25 
       (.I0(\dy_reg_n_0_[6] ),
        .I1(\dy_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dy_reg_n_0_[8] ),
        .I4(\dy_reg_n_0_[5] ),
        .O(\ysqr[17]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hEB843C0C903FCF3F)) 
    \ysqr[17]_i_26 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dy_reg_n_0_[4] ),
        .I4(\dy_reg_n_0_[8] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\ysqr[17]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h7F07070780F8F8F8)) 
    \ysqr[17]_i_27 
       (.I0(\dy_reg_n_0_[6] ),
        .I1(\dy_reg_n_0_[4] ),
        .I2(\ysqr[17]_i_43_n_0 ),
        .I3(\dy_reg_n_0_[2] ),
        .I4(\dy_reg_n_0_[8] ),
        .I5(\ysqr[17]_i_44_n_0 ),
        .O(\ysqr[17]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A956A956A95)) 
    \ysqr[17]_i_28 
       (.I0(\ysqr[17]_i_22_n_0 ),
        .I1(\dy_reg_n_0_[8] ),
        .I2(\dy_reg_n_0_[2] ),
        .I3(\ysqr[17]_i_43_n_0 ),
        .I4(\dy_reg_n_0_[4] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\ysqr[17]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h69C399C369336933)) 
    \ysqr[17]_i_29 
       (.I0(\dy_reg_n_0_[2] ),
        .I1(\ysqr[17]_i_45_n_0 ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dy_reg_n_0_[7] ),
        .I4(\dy_reg_n_0_[0] ),
        .I5(\dy_reg_n_0_[8] ),
        .O(\ysqr[17]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \ysqr[17]_i_30 
       (.I0(\dy_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[0] ),
        .I3(\dy_reg_n_0_[8] ),
        .I4(\dy_reg_n_0_[6] ),
        .I5(\dy_reg_n_0_[2] ),
        .O(\ysqr[17]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \ysqr[17]_i_31 
       (.I0(\dy_reg_n_0_[6] ),
        .I1(\dy_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dy_reg_n_0_[0] ),
        .O(\ysqr[17]_i_31_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[17]_i_32 
       (.I0(\dy_reg_n_0_[0] ),
        .I1(\dy_reg_n_0_[6] ),
        .O(\ysqr[17]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \ysqr[17]_i_33 
       (.I0(\dy_reg_n_0_[7] ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dy_reg_n_0_[8] ),
        .I3(\dy_reg_n_0_[4] ),
        .O(\ysqr[17]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[17]_i_34 
       (.I0(\dy_reg_n_0_[5] ),
        .I1(\dy_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dy_reg_n_0_[8] ),
        .O(\ysqr[17]_i_34_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[17]_i_35 
       (.I0(\dy_reg_n_0_[4] ),
        .I1(\dy_reg_n_0_[5] ),
        .O(\ysqr[17]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \ysqr[17]_i_36 
       (.I0(\dy_reg_n_0_[4] ),
        .I1(\dy_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[8] ),
        .I3(\dy_reg_n_0_[5] ),
        .O(\ysqr[17]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \ysqr[17]_i_37 
       (.I0(\dy_reg_n_0_[6] ),
        .I1(\dy_reg_n_0_[3] ),
        .I2(\dy_reg_n_0_[8] ),
        .I3(\dy_reg_n_0_[4] ),
        .I4(\dy_reg_n_0_[7] ),
        .I5(\dy_reg_n_0_[5] ),
        .O(\ysqr[17]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'hD22287772DDD8777)) 
    \ysqr[17]_i_38 
       (.I0(\dy_reg_n_0_[4] ),
        .I1(\dy_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[3] ),
        .I3(\dy_reg_n_0_[8] ),
        .I4(\dy_reg_n_0_[5] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\ysqr[17]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \ysqr[17]_i_39 
       (.I0(\dy_reg_n_0_[7] ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dy_reg_n_0_[8] ),
        .I3(\dy_reg_n_0_[1] ),
        .O(\ysqr[17]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \ysqr[17]_i_4 
       (.I0(\ysqr_reg[17]_i_17_n_13 ),
        .I1(\ysqr_reg[17]_i_13_n_8 ),
        .I2(\ysqr_reg[17]_i_17_n_4 ),
        .I3(\ysqr_reg[17]_i_3_n_15 ),
        .O(\ysqr[17]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[17]_i_40 
       (.I0(\dy_reg_n_0_[2] ),
        .I1(\dy_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dy_reg_n_0_[8] ),
        .O(\ysqr[17]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \ysqr[17]_i_41 
       (.I0(\dy_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[7] ),
        .I2(\dy_reg_n_0_[8] ),
        .I3(\dy_reg_n_0_[2] ),
        .O(\ysqr[17]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \ysqr[17]_i_42 
       (.I0(\dy_reg_n_0_[6] ),
        .I1(\dy_reg_n_0_[0] ),
        .I2(\dy_reg_n_0_[8] ),
        .I3(\dy_reg_n_0_[1] ),
        .I4(\dy_reg_n_0_[7] ),
        .I5(\dy_reg_n_0_[2] ),
        .O(\ysqr[17]_i_42_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[17]_i_43 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[7] ),
        .O(\ysqr[17]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \ysqr[17]_i_44 
       (.I0(\dy_reg_n_0_[6] ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dy_reg_n_0_[8] ),
        .I3(\dy_reg_n_0_[3] ),
        .I4(\dy_reg_n_0_[7] ),
        .I5(\dy_reg_n_0_[4] ),
        .O(\ysqr[17]_i_44_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair988" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[17]_i_45 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[6] ),
        .O(\ysqr[17]_i_45_n_0 ));
  (* HLUTNM = "lutpair29" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \ysqr[17]_i_5 
       (.I0(\ysqr_reg[17]_i_17_n_14 ),
        .I1(\ysqr_reg[17]_i_13_n_9 ),
        .I2(\ysqr_reg[17]_i_17_n_13 ),
        .I3(\ysqr_reg[17]_i_13_n_8 ),
        .O(\ysqr[17]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \ysqr[17]_i_6 
       (.I0(\ysqr_reg[17]_i_17_n_14 ),
        .I1(\ysqr_reg[17]_i_13_n_9 ),
        .I2(\ysqr_reg[17]_i_17_n_15 ),
        .I3(\ysqr_reg[17]_i_18_n_5 ),
        .I4(\ysqr_reg[17]_i_13_n_10 ),
        .O(\ysqr[17]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \ysqr[17]_i_7 
       (.I0(\ysqr_reg[3]_i_3_n_8 ),
        .I1(\ysqr_reg[17]_i_18_n_14 ),
        .I2(\ysqr_reg[17]_i_13_n_11 ),
        .I3(\ysqr_reg[17]_i_18_n_5 ),
        .I4(\ysqr_reg[17]_i_13_n_10 ),
        .I5(\ysqr_reg[17]_i_17_n_15 ),
        .O(\ysqr[17]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \ysqr[17]_i_8 
       (.I0(\ysqr_reg[17]_i_3_n_15 ),
        .I1(\ysqr_reg[17]_i_17_n_4 ),
        .I2(\ysqr_reg[17]_i_3_n_14 ),
        .I3(\ysqr_reg[17]_i_3_n_13 ),
        .O(\ysqr[17]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \ysqr[17]_i_9 
       (.I0(\ysqr_reg[17]_i_13_n_8 ),
        .I1(\ysqr_reg[17]_i_17_n_13 ),
        .I2(\ysqr_reg[17]_i_3_n_15 ),
        .I3(\ysqr_reg[17]_i_17_n_4 ),
        .I4(\ysqr_reg[17]_i_3_n_14 ),
        .O(\ysqr[17]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1164" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[18]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(B[0]),
        .O(\ysqr[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1164" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[20]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[2]),
        .O(\ysqr[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair890" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[21]_i_1 
       (.I0(\ysqr_reg[21]_i_2_n_13 ),
        .I1(\ysqr_reg[21]_i_3_n_15 ),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\ysqr[21]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9666)) 
    \ysqr[21]_i_10 
       (.I0(\ysqr[21]_i_4_n_0 ),
        .I1(\ysqr[21]_i_31_n_0 ),
        .I2(B[2]),
        .I3(B[6]),
        .O(\ysqr[21]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \ysqr[21]_i_11 
       (.I0(\ysqr[21]_i_5_n_0 ),
        .I1(B[5]),
        .I2(B[2]),
        .I3(\ysqr[21]_i_32_n_0 ),
        .I4(B[0]),
        .I5(B[7]),
        .O(\ysqr[21]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \ysqr[21]_i_12 
       (.I0(\ysqr[21]_i_6_n_0 ),
        .I1(B[4]),
        .I2(B[2]),
        .I3(B[5]),
        .I4(B[1]),
        .I5(\ysqr[21]_i_33_n_0 ),
        .O(\ysqr[21]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \ysqr[21]_i_13 
       (.I0(\ysqr[21]_i_7_n_0 ),
        .I1(B[4]),
        .I2(B[1]),
        .I3(\ysqr[21]_i_21_n_0 ),
        .I4(B[0]),
        .I5(B[5]),
        .O(\ysqr[21]_i_13_n_0 ));
  (* HLUTNM = "lutpair30" *) 
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \ysqr[21]_i_14 
       (.I0(B[1]),
        .I1(B[2]),
        .I2(B[3]),
        .I3(B[4]),
        .I4(B[0]),
        .O(\ysqr[21]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[21]_i_15 
       (.I0(B[3]),
        .I1(B[2]),
        .I2(B[0]),
        .O(\ysqr[21]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[21]_i_16 
       (.I0(B[1]),
        .I1(B[0]),
        .O(\ysqr[21]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[21]_i_17 
       (.I0(B[3]),
        .I1(B[7]),
        .O(\ysqr[21]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[21]_i_18 
       (.I0(B[3]),
        .I1(B[6]),
        .O(\ysqr[21]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[21]_i_19 
       (.I0(B[2]),
        .I1(B[5]),
        .O(\ysqr[21]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h956A6A6A)) 
    \ysqr[21]_i_20 
       (.I0(B[3]),
        .I1(B[1]),
        .I2(B[5]),
        .I3(B[2]),
        .I4(B[4]),
        .O(\ysqr[21]_i_20_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[21]_i_21 
       (.I0(B[2]),
        .I1(B[3]),
        .O(\ysqr[21]_i_21_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[21]_i_22 
       (.I0(B[1]),
        .I1(B[3]),
        .O(\ysqr[21]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \ysqr[21]_i_23 
       (.I0(B[4]),
        .I1(B[5]),
        .I2(B[6]),
        .I3(B[7]),
        .I4(B[3]),
        .O(\ysqr[21]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[21]_i_24 
       (.I0(B[6]),
        .I1(B[5]),
        .I2(B[3]),
        .O(\ysqr[21]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[21]_i_25 
       (.I0(B[4]),
        .I1(B[3]),
        .O(\ysqr[21]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h17A08800)) 
    \ysqr[21]_i_26 
       (.I0(B[3]),
        .I1(B[1]),
        .I2(B[4]),
        .I3(B[5]),
        .I4(B[2]),
        .O(\ysqr[21]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h663C963C66CC66CC)) 
    \ysqr[21]_i_27 
       (.I0(B[2]),
        .I1(B[3]),
        .I2(B[1]),
        .I3(B[4]),
        .I4(B[0]),
        .I5(B[5]),
        .O(\ysqr[21]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \ysqr[21]_i_28 
       (.I0(B[0]),
        .I1(B[5]),
        .I2(B[1]),
        .I3(B[4]),
        .I4(B[3]),
        .I5(B[2]),
        .O(\ysqr[21]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \ysqr[21]_i_29 
       (.I0(B[3]),
        .I1(B[1]),
        .I2(B[4]),
        .I3(B[0]),
        .O(\ysqr[21]_i_29_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[21]_i_30 
       (.I0(B[0]),
        .I1(B[3]),
        .O(\ysqr[21]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[21]_i_31 
       (.I0(B[8]),
        .I1(B[0]),
        .I2(B[7]),
        .I3(B[1]),
        .O(\ysqr[21]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair977" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[21]_i_32 
       (.I0(B[1]),
        .I1(B[6]),
        .O(\ysqr[21]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair976" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[21]_i_33 
       (.I0(B[0]),
        .I1(B[6]),
        .O(\ysqr[21]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[21]_i_4 
       (.I0(B[5]),
        .I1(B[2]),
        .I2(B[6]),
        .I3(B[1]),
        .I4(B[0]),
        .I5(B[7]),
        .O(\ysqr[21]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[21]_i_5 
       (.I0(B[4]),
        .I1(B[2]),
        .I2(B[5]),
        .I3(B[1]),
        .I4(B[0]),
        .I5(B[6]),
        .O(\ysqr[21]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[21]_i_6 
       (.I0(B[4]),
        .I1(B[1]),
        .I2(B[3]),
        .I3(B[2]),
        .I4(B[0]),
        .I5(B[5]),
        .O(\ysqr[21]_i_6_n_0 ));
  (* HLUTNM = "lutpair30" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[21]_i_7 
       (.I0(B[1]),
        .I1(B[2]),
        .O(\ysqr[21]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'hAC)) 
    \ysqr[21]_i_8 
       (.I0(B[3]),
        .I1(B[2]),
        .I2(B[1]),
        .O(\ysqr[21]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[21]_i_9 
       (.I0(B[0]),
        .I1(B[3]),
        .O(\ysqr[21]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1163" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[22]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[4]),
        .O(\ysqr[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1163" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[23]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[5]),
        .O(\ysqr[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1162" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[24]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[6]),
        .O(\ysqr[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1162" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[25]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[7]),
        .O(\ysqr[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1161" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[26]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[8]),
        .O(\ysqr[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1161" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[27]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[9]),
        .O(\ysqr[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1160" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[28]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[10]),
        .O(\ysqr[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1160" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[29]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[11]),
        .O(\ysqr[29]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[29]_i_10 
       (.I0(\ysqr_reg[21]_i_3_n_15 ),
        .I1(\ysqr_reg[21]_i_2_n_13 ),
        .O(\ysqr[29]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \ysqr[29]_i_11 
       (.I0(\ysqr_reg[21]_i_3_n_9 ),
        .I1(\ysqr_reg[35]_i_13_n_12 ),
        .I2(\ysqr_reg[35]_i_18_n_14 ),
        .I3(\ysqr_reg[35]_i_13_n_11 ),
        .I4(\ysqr_reg[21]_i_3_n_8 ),
        .I5(\ysqr[29]_i_19_n_0 ),
        .O(\ysqr[29]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \ysqr[29]_i_12 
       (.I0(\ysqr_reg[35]_i_18_n_15 ),
        .I1(\ysqr_reg[21]_i_3_n_9 ),
        .I2(\ysqr_reg[35]_i_13_n_12 ),
        .I3(\ysqr_reg[21]_i_3_n_8 ),
        .I4(\ysqr_reg[35]_i_13_n_11 ),
        .I5(\ysqr_reg[35]_i_18_n_14 ),
        .O(\ysqr[29]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \ysqr[29]_i_13 
       (.I0(\ysqr_reg[35]_i_18_n_15 ),
        .I1(\ysqr_reg[35]_i_13_n_12 ),
        .I2(\ysqr_reg[21]_i_3_n_9 ),
        .I3(\ysqr_reg[21]_i_3_n_10 ),
        .I4(\ysqr_reg[21]_i_2_n_8 ),
        .I5(\ysqr_reg[35]_i_13_n_13 ),
        .O(\ysqr[29]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[29]_i_14 
       (.I0(\ysqr[29]_i_6_n_0 ),
        .I1(\ysqr_reg[35]_i_13_n_13 ),
        .I2(\ysqr_reg[21]_i_2_n_8 ),
        .I3(\ysqr_reg[21]_i_3_n_10 ),
        .O(\ysqr[29]_i_14_n_0 ));
  (* HLUTNM = "lutpair33" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[29]_i_15 
       (.I0(\ysqr_reg[35]_i_13_n_14 ),
        .I1(\ysqr_reg[21]_i_2_n_9 ),
        .I2(\ysqr_reg[21]_i_3_n_11 ),
        .I3(\ysqr[29]_i_7_n_0 ),
        .O(\ysqr[29]_i_15_n_0 ));
  (* HLUTNM = "lutpair32" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[29]_i_16 
       (.I0(\ysqr_reg[35]_i_13_n_15 ),
        .I1(\ysqr_reg[21]_i_2_n_10 ),
        .I2(\ysqr_reg[21]_i_3_n_12 ),
        .I3(\ysqr[29]_i_8_n_0 ),
        .O(\ysqr[29]_i_16_n_0 ));
  (* HLUTNM = "lutpair31" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \ysqr[29]_i_17 
       (.I0(\ysqr_reg[21]_i_3_n_13 ),
        .I1(\ysqr_reg[21]_i_2_n_11 ),
        .I2(\ysqr_reg[21]_i_2_n_12 ),
        .I3(\ysqr_reg[21]_i_3_n_14 ),
        .O(\ysqr[29]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \ysqr[29]_i_18 
       (.I0(\ysqr_reg[21]_i_2_n_13 ),
        .I1(\ysqr_reg[21]_i_3_n_15 ),
        .I2(\ysqr_reg[21]_i_2_n_12 ),
        .I3(\ysqr_reg[21]_i_3_n_14 ),
        .O(\ysqr[29]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \ysqr[29]_i_19 
       (.I0(\ysqr_reg[35]_i_17_n_15 ),
        .I1(\ysqr_reg[35]_i_13_n_10 ),
        .I2(\ysqr_reg[35]_i_18_n_5 ),
        .O(\ysqr[29]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \ysqr[29]_i_3 
       (.I0(\ysqr_reg[21]_i_3_n_9 ),
        .I1(\ysqr_reg[35]_i_13_n_12 ),
        .I2(\ysqr_reg[35]_i_18_n_14 ),
        .I3(\ysqr_reg[35]_i_13_n_11 ),
        .I4(\ysqr_reg[21]_i_3_n_8 ),
        .O(\ysqr[29]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \ysqr[29]_i_4 
       (.I0(\ysqr_reg[35]_i_18_n_15 ),
        .I1(\ysqr_reg[21]_i_3_n_9 ),
        .I2(\ysqr_reg[35]_i_13_n_12 ),
        .O(\ysqr[29]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \ysqr[29]_i_5 
       (.I0(\ysqr_reg[21]_i_3_n_9 ),
        .I1(\ysqr_reg[35]_i_13_n_12 ),
        .I2(\ysqr_reg[35]_i_18_n_15 ),
        .O(\ysqr[29]_i_5_n_0 ));
  (* HLUTNM = "lutpair33" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \ysqr[29]_i_6 
       (.I0(\ysqr_reg[35]_i_13_n_14 ),
        .I1(\ysqr_reg[21]_i_2_n_9 ),
        .I2(\ysqr_reg[21]_i_3_n_11 ),
        .O(\ysqr[29]_i_6_n_0 ));
  (* HLUTNM = "lutpair32" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \ysqr[29]_i_7 
       (.I0(\ysqr_reg[35]_i_13_n_15 ),
        .I1(\ysqr_reg[21]_i_2_n_10 ),
        .I2(\ysqr_reg[21]_i_3_n_12 ),
        .O(\ysqr[29]_i_7_n_0 ));
  (* HLUTNM = "lutpair31" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[29]_i_8 
       (.I0(\ysqr_reg[21]_i_3_n_13 ),
        .I1(\ysqr_reg[21]_i_2_n_11 ),
        .O(\ysqr[29]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[29]_i_9 
       (.I0(\ysqr_reg[21]_i_3_n_14 ),
        .I1(\ysqr_reg[21]_i_2_n_12 ),
        .O(\ysqr[29]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1172" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[2]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[2]),
        .O(\ysqr[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1159" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[30]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[12]),
        .O(\ysqr[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1159" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[31]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[13]),
        .O(\ysqr[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1158" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[32]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[14]),
        .O(\ysqr[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1158" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[33]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[15]),
        .O(\ysqr[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1157" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[34]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[16]),
        .O(\ysqr[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1157" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[35]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr00_in[17]),
        .O(\ysqr[35]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \ysqr[35]_i_10 
       (.I0(\ysqr[35]_i_5_n_0 ),
        .I1(\ysqr_reg[35]_i_3_n_15 ),
        .I2(\ysqr_reg[35]_i_17_n_4 ),
        .I3(\ysqr_reg[35]_i_13_n_8 ),
        .I4(\ysqr_reg[35]_i_17_n_13 ),
        .O(\ysqr[35]_i_10_n_0 ));
  (* HLUTNM = "lutpair34" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \ysqr[35]_i_11 
       (.I0(\ysqr_reg[35]_i_17_n_14 ),
        .I1(\ysqr_reg[35]_i_13_n_9 ),
        .I2(\ysqr_reg[35]_i_17_n_13 ),
        .I3(\ysqr_reg[35]_i_13_n_8 ),
        .I4(\ysqr[35]_i_6_n_0 ),
        .O(\ysqr[35]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \ysqr[35]_i_12 
       (.I0(\ysqr[35]_i_7_n_0 ),
        .I1(\ysqr_reg[35]_i_17_n_15 ),
        .I2(\ysqr_reg[35]_i_18_n_5 ),
        .I3(\ysqr_reg[35]_i_13_n_10 ),
        .I4(\ysqr_reg[35]_i_17_n_14 ),
        .I5(\ysqr_reg[35]_i_13_n_9 ),
        .O(\ysqr[35]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \ysqr[35]_i_14 
       (.I0(B[7]),
        .I1(B[8]),
        .O(\ysqr[35]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \ysqr[35]_i_15 
       (.I0(B[6]),
        .I1(B[8]),
        .O(\ysqr[35]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[35]_i_16 
       (.I0(B[7]),
        .I1(B[6]),
        .O(\ysqr[35]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hF7777000)) 
    \ysqr[35]_i_19 
       (.I0(B[8]),
        .I1(B[4]),
        .I2(B[7]),
        .I3(B[5]),
        .I4(B[6]),
        .O(\ysqr[35]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[35]_i_20 
       (.I0(B[8]),
        .I1(B[3]),
        .I2(B[7]),
        .I3(B[4]),
        .I4(B[5]),
        .I5(B[6]),
        .O(\ysqr[35]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[35]_i_21 
       (.I0(B[8]),
        .I1(B[2]),
        .I2(B[7]),
        .I3(B[3]),
        .I4(B[4]),
        .I5(B[6]),
        .O(\ysqr[35]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[35]_i_22 
       (.I0(B[8]),
        .I1(B[1]),
        .I2(B[7]),
        .I3(B[2]),
        .I4(B[3]),
        .I5(B[6]),
        .O(\ysqr[35]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h7000)) 
    \ysqr[35]_i_23 
       (.I0(B[8]),
        .I1(B[0]),
        .I2(B[7]),
        .I3(B[1]),
        .O(\ysqr[35]_i_23_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[35]_i_24 
       (.I0(B[1]),
        .I1(B[6]),
        .O(\ysqr[35]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'h8E11F555)) 
    \ysqr[35]_i_25 
       (.I0(B[6]),
        .I1(B[7]),
        .I2(B[4]),
        .I3(B[8]),
        .I4(B[5]),
        .O(\ysqr[35]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hEB843C0C903FCF3F)) 
    \ysqr[35]_i_26 
       (.I0(B[3]),
        .I1(B[5]),
        .I2(B[7]),
        .I3(B[4]),
        .I4(B[8]),
        .I5(B[6]),
        .O(\ysqr[35]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h7F07070780F8F8F8)) 
    \ysqr[35]_i_27 
       (.I0(B[6]),
        .I1(B[4]),
        .I2(\ysqr[35]_i_43_n_0 ),
        .I3(B[2]),
        .I4(B[8]),
        .I5(\ysqr[35]_i_44_n_0 ),
        .O(\ysqr[35]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A956A956A95)) 
    \ysqr[35]_i_28 
       (.I0(\ysqr[35]_i_22_n_0 ),
        .I1(B[8]),
        .I2(B[2]),
        .I3(\ysqr[35]_i_43_n_0 ),
        .I4(B[4]),
        .I5(B[6]),
        .O(\ysqr[35]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h69C399C369336933)) 
    \ysqr[35]_i_29 
       (.I0(B[2]),
        .I1(\ysqr[35]_i_45_n_0 ),
        .I2(B[1]),
        .I3(B[7]),
        .I4(B[0]),
        .I5(B[8]),
        .O(\ysqr[35]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \ysqr[35]_i_30 
       (.I0(B[1]),
        .I1(B[7]),
        .I2(B[0]),
        .I3(B[8]),
        .I4(B[6]),
        .I5(B[2]),
        .O(\ysqr[35]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \ysqr[35]_i_31 
       (.I0(B[6]),
        .I1(B[1]),
        .I2(B[7]),
        .I3(B[0]),
        .O(\ysqr[35]_i_31_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[35]_i_32 
       (.I0(B[0]),
        .I1(B[6]),
        .O(\ysqr[35]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \ysqr[35]_i_33 
       (.I0(B[7]),
        .I1(B[5]),
        .I2(B[8]),
        .I3(B[4]),
        .O(\ysqr[35]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[35]_i_34 
       (.I0(B[5]),
        .I1(B[7]),
        .I2(B[4]),
        .I3(B[8]),
        .O(\ysqr[35]_i_34_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[35]_i_35 
       (.I0(B[4]),
        .I1(B[5]),
        .O(\ysqr[35]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \ysqr[35]_i_36 
       (.I0(B[4]),
        .I1(B[7]),
        .I2(B[8]),
        .I3(B[5]),
        .O(\ysqr[35]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \ysqr[35]_i_37 
       (.I0(B[6]),
        .I1(B[3]),
        .I2(B[8]),
        .I3(B[4]),
        .I4(B[7]),
        .I5(B[5]),
        .O(\ysqr[35]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'hD22287772DDD8777)) 
    \ysqr[35]_i_38 
       (.I0(B[4]),
        .I1(B[7]),
        .I2(B[3]),
        .I3(B[8]),
        .I4(B[5]),
        .I5(B[6]),
        .O(\ysqr[35]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \ysqr[35]_i_39 
       (.I0(B[7]),
        .I1(B[2]),
        .I2(B[8]),
        .I3(B[1]),
        .O(\ysqr[35]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \ysqr[35]_i_4 
       (.I0(\ysqr_reg[35]_i_17_n_13 ),
        .I1(\ysqr_reg[35]_i_13_n_8 ),
        .I2(\ysqr_reg[35]_i_17_n_4 ),
        .I3(\ysqr_reg[35]_i_3_n_15 ),
        .O(\ysqr[35]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[35]_i_40 
       (.I0(B[2]),
        .I1(B[7]),
        .I2(B[1]),
        .I3(B[8]),
        .O(\ysqr[35]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \ysqr[35]_i_41 
       (.I0(B[1]),
        .I1(B[7]),
        .I2(B[8]),
        .I3(B[2]),
        .O(\ysqr[35]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \ysqr[35]_i_42 
       (.I0(B[6]),
        .I1(B[0]),
        .I2(B[8]),
        .I3(B[1]),
        .I4(B[7]),
        .I5(B[2]),
        .O(\ysqr[35]_i_42_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[35]_i_43 
       (.I0(B[3]),
        .I1(B[7]),
        .O(\ysqr[35]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \ysqr[35]_i_44 
       (.I0(B[6]),
        .I1(B[5]),
        .I2(B[8]),
        .I3(B[3]),
        .I4(B[7]),
        .I5(B[4]),
        .O(\ysqr[35]_i_44_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair995" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[35]_i_45 
       (.I0(B[3]),
        .I1(B[6]),
        .O(\ysqr[35]_i_45_n_0 ));
  (* HLUTNM = "lutpair34" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \ysqr[35]_i_5 
       (.I0(\ysqr_reg[35]_i_17_n_14 ),
        .I1(\ysqr_reg[35]_i_13_n_9 ),
        .I2(\ysqr_reg[35]_i_17_n_13 ),
        .I3(\ysqr_reg[35]_i_13_n_8 ),
        .O(\ysqr[35]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \ysqr[35]_i_6 
       (.I0(\ysqr_reg[35]_i_17_n_14 ),
        .I1(\ysqr_reg[35]_i_13_n_9 ),
        .I2(\ysqr_reg[35]_i_17_n_15 ),
        .I3(\ysqr_reg[35]_i_18_n_5 ),
        .I4(\ysqr_reg[35]_i_13_n_10 ),
        .O(\ysqr[35]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \ysqr[35]_i_7 
       (.I0(\ysqr_reg[21]_i_3_n_8 ),
        .I1(\ysqr_reg[35]_i_18_n_14 ),
        .I2(\ysqr_reg[35]_i_13_n_11 ),
        .I3(\ysqr_reg[35]_i_18_n_5 ),
        .I4(\ysqr_reg[35]_i_13_n_10 ),
        .I5(\ysqr_reg[35]_i_17_n_15 ),
        .O(\ysqr[35]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \ysqr[35]_i_8 
       (.I0(\ysqr_reg[35]_i_3_n_15 ),
        .I1(\ysqr_reg[35]_i_17_n_4 ),
        .I2(\ysqr_reg[35]_i_3_n_14 ),
        .I3(\ysqr_reg[35]_i_3_n_13 ),
        .O(\ysqr[35]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \ysqr[35]_i_9 
       (.I0(\ysqr_reg[35]_i_13_n_8 ),
        .I1(\ysqr_reg[35]_i_17_n_13 ),
        .I2(\ysqr_reg[35]_i_3_n_15 ),
        .I3(\ysqr_reg[35]_i_17_n_4 ),
        .I4(\ysqr_reg[35]_i_3_n_14 ),
        .O(\ysqr[35]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1156" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[36]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(\dy_reg_n_0_[18] ),
        .O(\ysqr[36]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1156" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[38]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[2]),
        .O(\ysqr[38]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair889" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[39]_i_1 
       (.I0(\ysqr_reg[39]_i_2_n_13 ),
        .I1(\ysqr_reg[39]_i_3_n_15 ),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\ysqr[39]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9666)) 
    \ysqr[39]_i_10 
       (.I0(\ysqr[39]_i_4_n_0 ),
        .I1(\ysqr[39]_i_31_n_0 ),
        .I2(\dy_reg_n_0_[20] ),
        .I3(\dy_reg_n_0_[24] ),
        .O(\ysqr[39]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \ysqr[39]_i_11 
       (.I0(\ysqr[39]_i_5_n_0 ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dy_reg_n_0_[20] ),
        .I3(\ysqr[39]_i_32_n_0 ),
        .I4(\dy_reg_n_0_[18] ),
        .I5(\dy_reg_n_0_[25] ),
        .O(\ysqr[39]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \ysqr[39]_i_12 
       (.I0(\ysqr[39]_i_6_n_0 ),
        .I1(\dy_reg_n_0_[22] ),
        .I2(\dy_reg_n_0_[20] ),
        .I3(\dy_reg_n_0_[23] ),
        .I4(\dy_reg_n_0_[19] ),
        .I5(\ysqr[39]_i_33_n_0 ),
        .O(\ysqr[39]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \ysqr[39]_i_13 
       (.I0(\ysqr[39]_i_7_n_0 ),
        .I1(\dy_reg_n_0_[22] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\ysqr[39]_i_21_n_0 ),
        .I4(\dy_reg_n_0_[18] ),
        .I5(\dy_reg_n_0_[23] ),
        .O(\ysqr[39]_i_13_n_0 ));
  (* HLUTNM = "lutpair35" *) 
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \ysqr[39]_i_14 
       (.I0(\dy_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dy_reg_n_0_[21] ),
        .I3(\dy_reg_n_0_[22] ),
        .I4(\dy_reg_n_0_[18] ),
        .O(\ysqr[39]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[39]_i_15 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dy_reg_n_0_[18] ),
        .O(\ysqr[39]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[39]_i_16 
       (.I0(\dy_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[18] ),
        .O(\ysqr[39]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[39]_i_17 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[25] ),
        .O(\ysqr[39]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[39]_i_18 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[24] ),
        .O(\ysqr[39]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[39]_i_19 
       (.I0(\dy_reg_n_0_[20] ),
        .I1(\dy_reg_n_0_[23] ),
        .O(\ysqr[39]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h956A6A6A)) 
    \ysqr[39]_i_20 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[23] ),
        .I3(\dy_reg_n_0_[20] ),
        .I4(\dy_reg_n_0_[22] ),
        .O(\ysqr[39]_i_20_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[39]_i_21 
       (.I0(\dy_reg_n_0_[20] ),
        .I1(\dy_reg_n_0_[21] ),
        .O(\ysqr[39]_i_21_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[39]_i_22 
       (.I0(\dy_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[21] ),
        .O(\ysqr[39]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \ysqr[39]_i_23 
       (.I0(\dy_reg_n_0_[22] ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dy_reg_n_0_[24] ),
        .I3(\dy_reg_n_0_[25] ),
        .I4(\dy_reg_n_0_[21] ),
        .O(\ysqr[39]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[39]_i_24 
       (.I0(\dy_reg_n_0_[24] ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dy_reg_n_0_[21] ),
        .O(\ysqr[39]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[39]_i_25 
       (.I0(\dy_reg_n_0_[22] ),
        .I1(\dy_reg_n_0_[21] ),
        .O(\ysqr[39]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h17A08800)) 
    \ysqr[39]_i_26 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dy_reg_n_0_[23] ),
        .I4(\dy_reg_n_0_[20] ),
        .O(\ysqr[39]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h663C963C66CC66CC)) 
    \ysqr[39]_i_27 
       (.I0(\dy_reg_n_0_[20] ),
        .I1(\dy_reg_n_0_[21] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dy_reg_n_0_[22] ),
        .I4(\dy_reg_n_0_[18] ),
        .I5(\dy_reg_n_0_[23] ),
        .O(\ysqr[39]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \ysqr[39]_i_28 
       (.I0(\dy_reg_n_0_[18] ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dy_reg_n_0_[22] ),
        .I4(\dy_reg_n_0_[21] ),
        .I5(\dy_reg_n_0_[20] ),
        .O(\ysqr[39]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \ysqr[39]_i_29 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dy_reg_n_0_[18] ),
        .O(\ysqr[39]_i_29_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[39]_i_30 
       (.I0(\dy_reg_n_0_[18] ),
        .I1(\dy_reg_n_0_[21] ),
        .O(\ysqr[39]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[39]_i_31 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dy_reg_n_0_[18] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dy_reg_n_0_[19] ),
        .O(\ysqr[39]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair979" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[39]_i_32 
       (.I0(\dy_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[24] ),
        .O(\ysqr[39]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair978" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[39]_i_33 
       (.I0(\dy_reg_n_0_[18] ),
        .I1(\dy_reg_n_0_[24] ),
        .O(\ysqr[39]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[39]_i_4 
       (.I0(\dy_reg_n_0_[23] ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dy_reg_n_0_[24] ),
        .I3(\dy_reg_n_0_[19] ),
        .I4(\dy_reg_n_0_[18] ),
        .I5(\dy_reg_n_0_[25] ),
        .O(\ysqr[39]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[39]_i_5 
       (.I0(\dy_reg_n_0_[22] ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dy_reg_n_0_[23] ),
        .I3(\dy_reg_n_0_[19] ),
        .I4(\dy_reg_n_0_[18] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\ysqr[39]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[39]_i_6 
       (.I0(\dy_reg_n_0_[22] ),
        .I1(\dy_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[21] ),
        .I3(\dy_reg_n_0_[20] ),
        .I4(\dy_reg_n_0_[18] ),
        .I5(\dy_reg_n_0_[23] ),
        .O(\ysqr[39]_i_6_n_0 ));
  (* HLUTNM = "lutpair35" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[39]_i_7 
       (.I0(\dy_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[20] ),
        .O(\ysqr[39]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'hAC)) 
    \ysqr[39]_i_8 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dy_reg_n_0_[19] ),
        .O(\ysqr[39]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[39]_i_9 
       (.I0(\dy_reg_n_0_[18] ),
        .I1(\dy_reg_n_0_[21] ),
        .O(\ysqr[39]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair890" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[3]_i_1 
       (.I0(\ysqr_reg[3]_i_2_n_13 ),
        .I1(\ysqr_reg[3]_i_3_n_15 ),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\ysqr[3]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9666)) 
    \ysqr[3]_i_10 
       (.I0(\ysqr[3]_i_4_n_0 ),
        .I1(\ysqr[3]_i_31_n_0 ),
        .I2(\dy_reg_n_0_[2] ),
        .I3(\dy_reg_n_0_[6] ),
        .O(\ysqr[3]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \ysqr[3]_i_11 
       (.I0(\ysqr[3]_i_5_n_0 ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dy_reg_n_0_[2] ),
        .I3(\ysqr[3]_i_32_n_0 ),
        .I4(\dy_reg_n_0_[0] ),
        .I5(\dy_reg_n_0_[7] ),
        .O(\ysqr[3]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \ysqr[3]_i_12 
       (.I0(\ysqr[3]_i_6_n_0 ),
        .I1(\dy_reg_n_0_[4] ),
        .I2(\dy_reg_n_0_[2] ),
        .I3(\dy_reg_n_0_[5] ),
        .I4(\dy_reg_n_0_[1] ),
        .I5(\ysqr[3]_i_33_n_0 ),
        .O(\ysqr[3]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \ysqr[3]_i_13 
       (.I0(\ysqr[3]_i_7_n_0 ),
        .I1(\dy_reg_n_0_[4] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\ysqr[3]_i_21_n_0 ),
        .I4(\dy_reg_n_0_[0] ),
        .I5(\dy_reg_n_0_[5] ),
        .O(\ysqr[3]_i_13_n_0 ));
  (* HLUTNM = "lutpair25" *) 
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \ysqr[3]_i_14 
       (.I0(\dy_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dy_reg_n_0_[3] ),
        .I3(\dy_reg_n_0_[4] ),
        .I4(\dy_reg_n_0_[0] ),
        .O(\ysqr[3]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[3]_i_15 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dy_reg_n_0_[0] ),
        .O(\ysqr[3]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[3]_i_16 
       (.I0(\dy_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[0] ),
        .O(\ysqr[3]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[3]_i_17 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[7] ),
        .O(\ysqr[3]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[3]_i_18 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[6] ),
        .O(\ysqr[3]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[3]_i_19 
       (.I0(\dy_reg_n_0_[2] ),
        .I1(\dy_reg_n_0_[5] ),
        .O(\ysqr[3]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h956A6A6A)) 
    \ysqr[3]_i_20 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[5] ),
        .I3(\dy_reg_n_0_[2] ),
        .I4(\dy_reg_n_0_[4] ),
        .O(\ysqr[3]_i_20_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[3]_i_21 
       (.I0(\dy_reg_n_0_[2] ),
        .I1(\dy_reg_n_0_[3] ),
        .O(\ysqr[3]_i_21_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[3]_i_22 
       (.I0(\dy_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[3] ),
        .O(\ysqr[3]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \ysqr[3]_i_23 
       (.I0(\dy_reg_n_0_[4] ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dy_reg_n_0_[6] ),
        .I3(\dy_reg_n_0_[7] ),
        .I4(\dy_reg_n_0_[3] ),
        .O(\ysqr[3]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[3]_i_24 
       (.I0(\dy_reg_n_0_[6] ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dy_reg_n_0_[3] ),
        .O(\ysqr[3]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[3]_i_25 
       (.I0(\dy_reg_n_0_[4] ),
        .I1(\dy_reg_n_0_[3] ),
        .O(\ysqr[3]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h17A08800)) 
    \ysqr[3]_i_26 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dy_reg_n_0_[5] ),
        .I4(\dy_reg_n_0_[2] ),
        .O(\ysqr[3]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h663C963C66CC66CC)) 
    \ysqr[3]_i_27 
       (.I0(\dy_reg_n_0_[2] ),
        .I1(\dy_reg_n_0_[3] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dy_reg_n_0_[4] ),
        .I4(\dy_reg_n_0_[0] ),
        .I5(\dy_reg_n_0_[5] ),
        .O(\ysqr[3]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \ysqr[3]_i_28 
       (.I0(\dy_reg_n_0_[0] ),
        .I1(\dy_reg_n_0_[5] ),
        .I2(\dy_reg_n_0_[1] ),
        .I3(\dy_reg_n_0_[4] ),
        .I4(\dy_reg_n_0_[3] ),
        .I5(\dy_reg_n_0_[2] ),
        .O(\ysqr[3]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \ysqr[3]_i_29 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[4] ),
        .I3(\dy_reg_n_0_[0] ),
        .O(\ysqr[3]_i_29_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[3]_i_30 
       (.I0(\dy_reg_n_0_[0] ),
        .I1(\dy_reg_n_0_[3] ),
        .O(\ysqr[3]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[3]_i_31 
       (.I0(\dy_reg_n_0_[8] ),
        .I1(\dy_reg_n_0_[0] ),
        .I2(\dy_reg_n_0_[7] ),
        .I3(\dy_reg_n_0_[1] ),
        .O(\ysqr[3]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair975" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[3]_i_32 
       (.I0(\dy_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[6] ),
        .O(\ysqr[3]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair974" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[3]_i_33 
       (.I0(\dy_reg_n_0_[0] ),
        .I1(\dy_reg_n_0_[6] ),
        .O(\ysqr[3]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[3]_i_4 
       (.I0(\dy_reg_n_0_[5] ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dy_reg_n_0_[6] ),
        .I3(\dy_reg_n_0_[1] ),
        .I4(\dy_reg_n_0_[0] ),
        .I5(\dy_reg_n_0_[7] ),
        .O(\ysqr[3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[3]_i_5 
       (.I0(\dy_reg_n_0_[4] ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dy_reg_n_0_[5] ),
        .I3(\dy_reg_n_0_[1] ),
        .I4(\dy_reg_n_0_[0] ),
        .I5(\dy_reg_n_0_[6] ),
        .O(\ysqr[3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[3]_i_6 
       (.I0(\dy_reg_n_0_[4] ),
        .I1(\dy_reg_n_0_[1] ),
        .I2(\dy_reg_n_0_[3] ),
        .I3(\dy_reg_n_0_[2] ),
        .I4(\dy_reg_n_0_[0] ),
        .I5(\dy_reg_n_0_[5] ),
        .O(\ysqr[3]_i_6_n_0 ));
  (* HLUTNM = "lutpair25" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[3]_i_7 
       (.I0(\dy_reg_n_0_[1] ),
        .I1(\dy_reg_n_0_[2] ),
        .O(\ysqr[3]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'hAC)) 
    \ysqr[3]_i_8 
       (.I0(\dy_reg_n_0_[3] ),
        .I1(\dy_reg_n_0_[2] ),
        .I2(\dy_reg_n_0_[1] ),
        .O(\ysqr[3]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[3]_i_9 
       (.I0(\dy_reg_n_0_[0] ),
        .I1(\dy_reg_n_0_[3] ),
        .O(\ysqr[3]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1155" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[40]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[4]),
        .O(\ysqr[40]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1155" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[41]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[5]),
        .O(\ysqr[41]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1154" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[42]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[6]),
        .O(\ysqr[42]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1154" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[43]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[7]),
        .O(\ysqr[43]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1153" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[44]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[8]),
        .O(\ysqr[44]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1153" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[45]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[9]),
        .O(\ysqr[45]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1152" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[46]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[10]),
        .O(\ysqr[46]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1152" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[47]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[11]),
        .O(\ysqr[47]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[47]_i_10 
       (.I0(\ysqr_reg[39]_i_3_n_15 ),
        .I1(\ysqr_reg[39]_i_2_n_13 ),
        .O(\ysqr[47]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \ysqr[47]_i_11 
       (.I0(\ysqr_reg[39]_i_3_n_9 ),
        .I1(\ysqr_reg[53]_i_13_n_12 ),
        .I2(\ysqr_reg[53]_i_18_n_14 ),
        .I3(\ysqr_reg[53]_i_13_n_11 ),
        .I4(\ysqr_reg[39]_i_3_n_8 ),
        .I5(\ysqr[47]_i_19_n_0 ),
        .O(\ysqr[47]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \ysqr[47]_i_12 
       (.I0(\ysqr_reg[53]_i_18_n_15 ),
        .I1(\ysqr_reg[39]_i_3_n_9 ),
        .I2(\ysqr_reg[53]_i_13_n_12 ),
        .I3(\ysqr_reg[39]_i_3_n_8 ),
        .I4(\ysqr_reg[53]_i_13_n_11 ),
        .I5(\ysqr_reg[53]_i_18_n_14 ),
        .O(\ysqr[47]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \ysqr[47]_i_13 
       (.I0(\ysqr_reg[53]_i_18_n_15 ),
        .I1(\ysqr_reg[53]_i_13_n_12 ),
        .I2(\ysqr_reg[39]_i_3_n_9 ),
        .I3(\ysqr_reg[39]_i_3_n_10 ),
        .I4(\ysqr_reg[39]_i_2_n_8 ),
        .I5(\ysqr_reg[53]_i_13_n_13 ),
        .O(\ysqr[47]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[47]_i_14 
       (.I0(\ysqr[47]_i_6_n_0 ),
        .I1(\ysqr_reg[53]_i_13_n_13 ),
        .I2(\ysqr_reg[39]_i_2_n_8 ),
        .I3(\ysqr_reg[39]_i_3_n_10 ),
        .O(\ysqr[47]_i_14_n_0 ));
  (* HLUTNM = "lutpair38" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[47]_i_15 
       (.I0(\ysqr_reg[53]_i_13_n_14 ),
        .I1(\ysqr_reg[39]_i_2_n_9 ),
        .I2(\ysqr_reg[39]_i_3_n_11 ),
        .I3(\ysqr[47]_i_7_n_0 ),
        .O(\ysqr[47]_i_15_n_0 ));
  (* HLUTNM = "lutpair37" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[47]_i_16 
       (.I0(\ysqr_reg[53]_i_13_n_15 ),
        .I1(\ysqr_reg[39]_i_2_n_10 ),
        .I2(\ysqr_reg[39]_i_3_n_12 ),
        .I3(\ysqr[47]_i_8_n_0 ),
        .O(\ysqr[47]_i_16_n_0 ));
  (* HLUTNM = "lutpair36" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \ysqr[47]_i_17 
       (.I0(\ysqr_reg[39]_i_3_n_13 ),
        .I1(\ysqr_reg[39]_i_2_n_11 ),
        .I2(\ysqr_reg[39]_i_2_n_12 ),
        .I3(\ysqr_reg[39]_i_3_n_14 ),
        .O(\ysqr[47]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \ysqr[47]_i_18 
       (.I0(\ysqr_reg[39]_i_2_n_13 ),
        .I1(\ysqr_reg[39]_i_3_n_15 ),
        .I2(\ysqr_reg[39]_i_2_n_12 ),
        .I3(\ysqr_reg[39]_i_3_n_14 ),
        .O(\ysqr[47]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \ysqr[47]_i_19 
       (.I0(\ysqr_reg[53]_i_17_n_15 ),
        .I1(\ysqr_reg[53]_i_13_n_10 ),
        .I2(\ysqr_reg[53]_i_18_n_5 ),
        .O(\ysqr[47]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \ysqr[47]_i_3 
       (.I0(\ysqr_reg[39]_i_3_n_9 ),
        .I1(\ysqr_reg[53]_i_13_n_12 ),
        .I2(\ysqr_reg[53]_i_18_n_14 ),
        .I3(\ysqr_reg[53]_i_13_n_11 ),
        .I4(\ysqr_reg[39]_i_3_n_8 ),
        .O(\ysqr[47]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \ysqr[47]_i_4 
       (.I0(\ysqr_reg[53]_i_18_n_15 ),
        .I1(\ysqr_reg[39]_i_3_n_9 ),
        .I2(\ysqr_reg[53]_i_13_n_12 ),
        .O(\ysqr[47]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \ysqr[47]_i_5 
       (.I0(\ysqr_reg[39]_i_3_n_9 ),
        .I1(\ysqr_reg[53]_i_13_n_12 ),
        .I2(\ysqr_reg[53]_i_18_n_15 ),
        .O(\ysqr[47]_i_5_n_0 ));
  (* HLUTNM = "lutpair38" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \ysqr[47]_i_6 
       (.I0(\ysqr_reg[53]_i_13_n_14 ),
        .I1(\ysqr_reg[39]_i_2_n_9 ),
        .I2(\ysqr_reg[39]_i_3_n_11 ),
        .O(\ysqr[47]_i_6_n_0 ));
  (* HLUTNM = "lutpair37" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \ysqr[47]_i_7 
       (.I0(\ysqr_reg[53]_i_13_n_15 ),
        .I1(\ysqr_reg[39]_i_2_n_10 ),
        .I2(\ysqr_reg[39]_i_3_n_12 ),
        .O(\ysqr[47]_i_7_n_0 ));
  (* HLUTNM = "lutpair36" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[47]_i_8 
       (.I0(\ysqr_reg[39]_i_3_n_13 ),
        .I1(\ysqr_reg[39]_i_2_n_11 ),
        .O(\ysqr[47]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[47]_i_9 
       (.I0(\ysqr_reg[39]_i_3_n_14 ),
        .I1(\ysqr_reg[39]_i_2_n_12 ),
        .O(\ysqr[47]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1151" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[48]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[12]),
        .O(\ysqr[48]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1151" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[49]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[13]),
        .O(\ysqr[49]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1171" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[4]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[4]),
        .O(\ysqr[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1150" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[50]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[14]),
        .O(\ysqr[50]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1150" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[51]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[15]),
        .O(\ysqr[51]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1149" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[52]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[16]),
        .O(\ysqr[52]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1149" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[53]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr01_in[17]),
        .O(\ysqr[53]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \ysqr[53]_i_10 
       (.I0(\ysqr[53]_i_5_n_0 ),
        .I1(\ysqr_reg[53]_i_3_n_15 ),
        .I2(\ysqr_reg[53]_i_17_n_4 ),
        .I3(\ysqr_reg[53]_i_13_n_8 ),
        .I4(\ysqr_reg[53]_i_17_n_13 ),
        .O(\ysqr[53]_i_10_n_0 ));
  (* HLUTNM = "lutpair39" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \ysqr[53]_i_11 
       (.I0(\ysqr_reg[53]_i_17_n_14 ),
        .I1(\ysqr_reg[53]_i_13_n_9 ),
        .I2(\ysqr_reg[53]_i_17_n_13 ),
        .I3(\ysqr_reg[53]_i_13_n_8 ),
        .I4(\ysqr[53]_i_6_n_0 ),
        .O(\ysqr[53]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \ysqr[53]_i_12 
       (.I0(\ysqr[53]_i_7_n_0 ),
        .I1(\ysqr_reg[53]_i_17_n_15 ),
        .I2(\ysqr_reg[53]_i_18_n_5 ),
        .I3(\ysqr_reg[53]_i_13_n_10 ),
        .I4(\ysqr_reg[53]_i_17_n_14 ),
        .I5(\ysqr_reg[53]_i_13_n_9 ),
        .O(\ysqr[53]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \ysqr[53]_i_14 
       (.I0(\dy_reg_n_0_[25] ),
        .I1(\dy_reg_n_0_[26] ),
        .O(\ysqr[53]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \ysqr[53]_i_15 
       (.I0(\dy_reg_n_0_[24] ),
        .I1(\dy_reg_n_0_[26] ),
        .O(\ysqr[53]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[53]_i_16 
       (.I0(\dy_reg_n_0_[25] ),
        .I1(\dy_reg_n_0_[24] ),
        .O(\ysqr[53]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hF7777000)) 
    \ysqr[53]_i_19 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dy_reg_n_0_[22] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dy_reg_n_0_[23] ),
        .I4(\dy_reg_n_0_[24] ),
        .O(\ysqr[53]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[53]_i_20 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dy_reg_n_0_[21] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dy_reg_n_0_[22] ),
        .I4(\dy_reg_n_0_[23] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\ysqr[53]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[53]_i_21 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dy_reg_n_0_[21] ),
        .I4(\dy_reg_n_0_[22] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\ysqr[53]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[53]_i_22 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dy_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dy_reg_n_0_[20] ),
        .I4(\dy_reg_n_0_[21] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\ysqr[53]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h7000)) 
    \ysqr[53]_i_23 
       (.I0(\dy_reg_n_0_[26] ),
        .I1(\dy_reg_n_0_[18] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dy_reg_n_0_[19] ),
        .O(\ysqr[53]_i_23_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[53]_i_24 
       (.I0(\dy_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[24] ),
        .O(\ysqr[53]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'h8E11F555)) 
    \ysqr[53]_i_25 
       (.I0(\dy_reg_n_0_[24] ),
        .I1(\dy_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dy_reg_n_0_[26] ),
        .I4(\dy_reg_n_0_[23] ),
        .O(\ysqr[53]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hEB843C0C903FCF3F)) 
    \ysqr[53]_i_26 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dy_reg_n_0_[22] ),
        .I4(\dy_reg_n_0_[26] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\ysqr[53]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h7F07070780F8F8F8)) 
    \ysqr[53]_i_27 
       (.I0(\dy_reg_n_0_[24] ),
        .I1(\dy_reg_n_0_[22] ),
        .I2(\ysqr[53]_i_43_n_0 ),
        .I3(\dy_reg_n_0_[20] ),
        .I4(\dy_reg_n_0_[26] ),
        .I5(\ysqr[53]_i_44_n_0 ),
        .O(\ysqr[53]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A956A956A95)) 
    \ysqr[53]_i_28 
       (.I0(\ysqr[53]_i_22_n_0 ),
        .I1(\dy_reg_n_0_[26] ),
        .I2(\dy_reg_n_0_[20] ),
        .I3(\ysqr[53]_i_43_n_0 ),
        .I4(\dy_reg_n_0_[22] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\ysqr[53]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h69C399C369336933)) 
    \ysqr[53]_i_29 
       (.I0(\dy_reg_n_0_[20] ),
        .I1(\ysqr[53]_i_45_n_0 ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dy_reg_n_0_[25] ),
        .I4(\dy_reg_n_0_[18] ),
        .I5(\dy_reg_n_0_[26] ),
        .O(\ysqr[53]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \ysqr[53]_i_30 
       (.I0(\dy_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[18] ),
        .I3(\dy_reg_n_0_[26] ),
        .I4(\dy_reg_n_0_[24] ),
        .I5(\dy_reg_n_0_[20] ),
        .O(\ysqr[53]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \ysqr[53]_i_31 
       (.I0(\dy_reg_n_0_[24] ),
        .I1(\dy_reg_n_0_[19] ),
        .I2(\dy_reg_n_0_[25] ),
        .I3(\dy_reg_n_0_[18] ),
        .O(\ysqr[53]_i_31_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[53]_i_32 
       (.I0(\dy_reg_n_0_[18] ),
        .I1(\dy_reg_n_0_[24] ),
        .O(\ysqr[53]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \ysqr[53]_i_33 
       (.I0(\dy_reg_n_0_[25] ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dy_reg_n_0_[26] ),
        .I3(\dy_reg_n_0_[22] ),
        .O(\ysqr[53]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[53]_i_34 
       (.I0(\dy_reg_n_0_[23] ),
        .I1(\dy_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[22] ),
        .I3(\dy_reg_n_0_[26] ),
        .O(\ysqr[53]_i_34_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[53]_i_35 
       (.I0(\dy_reg_n_0_[22] ),
        .I1(\dy_reg_n_0_[23] ),
        .O(\ysqr[53]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \ysqr[53]_i_36 
       (.I0(\dy_reg_n_0_[22] ),
        .I1(\dy_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[26] ),
        .I3(\dy_reg_n_0_[23] ),
        .O(\ysqr[53]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \ysqr[53]_i_37 
       (.I0(\dy_reg_n_0_[24] ),
        .I1(\dy_reg_n_0_[21] ),
        .I2(\dy_reg_n_0_[26] ),
        .I3(\dy_reg_n_0_[22] ),
        .I4(\dy_reg_n_0_[25] ),
        .I5(\dy_reg_n_0_[23] ),
        .O(\ysqr[53]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'hD22287772DDD8777)) 
    \ysqr[53]_i_38 
       (.I0(\dy_reg_n_0_[22] ),
        .I1(\dy_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[21] ),
        .I3(\dy_reg_n_0_[26] ),
        .I4(\dy_reg_n_0_[23] ),
        .I5(\dy_reg_n_0_[24] ),
        .O(\ysqr[53]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \ysqr[53]_i_39 
       (.I0(\dy_reg_n_0_[25] ),
        .I1(\dy_reg_n_0_[20] ),
        .I2(\dy_reg_n_0_[26] ),
        .I3(\dy_reg_n_0_[19] ),
        .O(\ysqr[53]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \ysqr[53]_i_4 
       (.I0(\ysqr_reg[53]_i_17_n_13 ),
        .I1(\ysqr_reg[53]_i_13_n_8 ),
        .I2(\ysqr_reg[53]_i_17_n_4 ),
        .I3(\ysqr_reg[53]_i_3_n_15 ),
        .O(\ysqr[53]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[53]_i_40 
       (.I0(\dy_reg_n_0_[20] ),
        .I1(\dy_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[19] ),
        .I3(\dy_reg_n_0_[26] ),
        .O(\ysqr[53]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \ysqr[53]_i_41 
       (.I0(\dy_reg_n_0_[19] ),
        .I1(\dy_reg_n_0_[25] ),
        .I2(\dy_reg_n_0_[26] ),
        .I3(\dy_reg_n_0_[20] ),
        .O(\ysqr[53]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \ysqr[53]_i_42 
       (.I0(\dy_reg_n_0_[24] ),
        .I1(\dy_reg_n_0_[18] ),
        .I2(\dy_reg_n_0_[26] ),
        .I3(\dy_reg_n_0_[19] ),
        .I4(\dy_reg_n_0_[25] ),
        .I5(\dy_reg_n_0_[20] ),
        .O(\ysqr[53]_i_42_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[53]_i_43 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[25] ),
        .O(\ysqr[53]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \ysqr[53]_i_44 
       (.I0(\dy_reg_n_0_[24] ),
        .I1(\dy_reg_n_0_[23] ),
        .I2(\dy_reg_n_0_[26] ),
        .I3(\dy_reg_n_0_[21] ),
        .I4(\dy_reg_n_0_[25] ),
        .I5(\dy_reg_n_0_[22] ),
        .O(\ysqr[53]_i_44_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1002" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[53]_i_45 
       (.I0(\dy_reg_n_0_[21] ),
        .I1(\dy_reg_n_0_[24] ),
        .O(\ysqr[53]_i_45_n_0 ));
  (* HLUTNM = "lutpair39" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \ysqr[53]_i_5 
       (.I0(\ysqr_reg[53]_i_17_n_14 ),
        .I1(\ysqr_reg[53]_i_13_n_9 ),
        .I2(\ysqr_reg[53]_i_17_n_13 ),
        .I3(\ysqr_reg[53]_i_13_n_8 ),
        .O(\ysqr[53]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \ysqr[53]_i_6 
       (.I0(\ysqr_reg[53]_i_17_n_14 ),
        .I1(\ysqr_reg[53]_i_13_n_9 ),
        .I2(\ysqr_reg[53]_i_17_n_15 ),
        .I3(\ysqr_reg[53]_i_18_n_5 ),
        .I4(\ysqr_reg[53]_i_13_n_10 ),
        .O(\ysqr[53]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \ysqr[53]_i_7 
       (.I0(\ysqr_reg[39]_i_3_n_8 ),
        .I1(\ysqr_reg[53]_i_18_n_14 ),
        .I2(\ysqr_reg[53]_i_13_n_11 ),
        .I3(\ysqr_reg[53]_i_18_n_5 ),
        .I4(\ysqr_reg[53]_i_13_n_10 ),
        .I5(\ysqr_reg[53]_i_17_n_15 ),
        .O(\ysqr[53]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \ysqr[53]_i_8 
       (.I0(\ysqr_reg[53]_i_3_n_15 ),
        .I1(\ysqr_reg[53]_i_17_n_4 ),
        .I2(\ysqr_reg[53]_i_3_n_14 ),
        .I3(\ysqr_reg[53]_i_3_n_13 ),
        .O(\ysqr[53]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \ysqr[53]_i_9 
       (.I0(\ysqr_reg[53]_i_13_n_8 ),
        .I1(\ysqr_reg[53]_i_17_n_13 ),
        .I2(\ysqr_reg[53]_i_3_n_15 ),
        .I3(\ysqr_reg[53]_i_17_n_4 ),
        .I4(\ysqr_reg[53]_i_3_n_14 ),
        .O(\ysqr[53]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1148" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[54]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(\dy_reg_n_0_[27] ),
        .O(\ysqr[54]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1148" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[56]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[2]),
        .O(\ysqr[56]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair889" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[57]_i_1 
       (.I0(\ysqr_reg[57]_i_2_n_13 ),
        .I1(\ysqr_reg[57]_i_3_n_15 ),
        .I2(stateScore_reg_rep__7_n_0),
        .O(\ysqr[57]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9666)) 
    \ysqr[57]_i_10 
       (.I0(\ysqr[57]_i_4_n_0 ),
        .I1(\ysqr[57]_i_31_n_0 ),
        .I2(\dy_reg_n_0_[29] ),
        .I3(\dy_reg_n_0_[33] ),
        .O(\ysqr[57]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \ysqr[57]_i_11 
       (.I0(\ysqr[57]_i_5_n_0 ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dy_reg_n_0_[29] ),
        .I3(\ysqr[57]_i_32_n_0 ),
        .I4(\dy_reg_n_0_[27] ),
        .I5(\dy_reg_n_0_[34] ),
        .O(\ysqr[57]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \ysqr[57]_i_12 
       (.I0(\ysqr[57]_i_6_n_0 ),
        .I1(\dy_reg_n_0_[31] ),
        .I2(\dy_reg_n_0_[29] ),
        .I3(\dy_reg_n_0_[32] ),
        .I4(\dy_reg_n_0_[28] ),
        .I5(\ysqr[57]_i_33_n_0 ),
        .O(\ysqr[57]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \ysqr[57]_i_13 
       (.I0(\ysqr[57]_i_7_n_0 ),
        .I1(\dy_reg_n_0_[31] ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\ysqr[57]_i_21_n_0 ),
        .I4(\dy_reg_n_0_[27] ),
        .I5(\dy_reg_n_0_[32] ),
        .O(\ysqr[57]_i_13_n_0 ));
  (* HLUTNM = "lutpair40" *) 
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \ysqr[57]_i_14 
       (.I0(\dy_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dy_reg_n_0_[30] ),
        .I3(\dy_reg_n_0_[31] ),
        .I4(\dy_reg_n_0_[27] ),
        .O(\ysqr[57]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[57]_i_15 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dy_reg_n_0_[27] ),
        .O(\ysqr[57]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[57]_i_16 
       (.I0(\dy_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[27] ),
        .O(\ysqr[57]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[57]_i_17 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[34] ),
        .O(\ysqr[57]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[57]_i_18 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[33] ),
        .O(\ysqr[57]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[57]_i_19 
       (.I0(\dy_reg_n_0_[29] ),
        .I1(\dy_reg_n_0_[32] ),
        .O(\ysqr[57]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h956A6A6A)) 
    \ysqr[57]_i_20 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[32] ),
        .I3(\dy_reg_n_0_[29] ),
        .I4(\dy_reg_n_0_[31] ),
        .O(\ysqr[57]_i_20_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[57]_i_21 
       (.I0(\dy_reg_n_0_[29] ),
        .I1(\dy_reg_n_0_[30] ),
        .O(\ysqr[57]_i_21_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[57]_i_22 
       (.I0(\dy_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[30] ),
        .O(\ysqr[57]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \ysqr[57]_i_23 
       (.I0(\dy_reg_n_0_[31] ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dy_reg_n_0_[33] ),
        .I3(\dy_reg_n_0_[34] ),
        .I4(\dy_reg_n_0_[30] ),
        .O(\ysqr[57]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[57]_i_24 
       (.I0(\dy_reg_n_0_[33] ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dy_reg_n_0_[30] ),
        .O(\ysqr[57]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[57]_i_25 
       (.I0(\dy_reg_n_0_[31] ),
        .I1(\dy_reg_n_0_[30] ),
        .O(\ysqr[57]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h17A08800)) 
    \ysqr[57]_i_26 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dy_reg_n_0_[32] ),
        .I4(\dy_reg_n_0_[29] ),
        .O(\ysqr[57]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h663C963C66CC66CC)) 
    \ysqr[57]_i_27 
       (.I0(\dy_reg_n_0_[29] ),
        .I1(\dy_reg_n_0_[30] ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\dy_reg_n_0_[31] ),
        .I4(\dy_reg_n_0_[27] ),
        .I5(\dy_reg_n_0_[32] ),
        .O(\ysqr[57]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \ysqr[57]_i_28 
       (.I0(\dy_reg_n_0_[27] ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\dy_reg_n_0_[31] ),
        .I4(\dy_reg_n_0_[30] ),
        .I5(\dy_reg_n_0_[29] ),
        .O(\ysqr[57]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \ysqr[57]_i_29 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dy_reg_n_0_[27] ),
        .O(\ysqr[57]_i_29_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[57]_i_30 
       (.I0(\dy_reg_n_0_[27] ),
        .I1(\dy_reg_n_0_[30] ),
        .O(\ysqr[57]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[57]_i_31 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dy_reg_n_0_[27] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dy_reg_n_0_[28] ),
        .O(\ysqr[57]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair981" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[57]_i_32 
       (.I0(\dy_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[33] ),
        .O(\ysqr[57]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair980" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[57]_i_33 
       (.I0(\dy_reg_n_0_[27] ),
        .I1(\dy_reg_n_0_[33] ),
        .O(\ysqr[57]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[57]_i_4 
       (.I0(\dy_reg_n_0_[32] ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dy_reg_n_0_[33] ),
        .I3(\dy_reg_n_0_[28] ),
        .I4(\dy_reg_n_0_[27] ),
        .I5(\dy_reg_n_0_[34] ),
        .O(\ysqr[57]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[57]_i_5 
       (.I0(\dy_reg_n_0_[31] ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dy_reg_n_0_[32] ),
        .I3(\dy_reg_n_0_[28] ),
        .I4(\dy_reg_n_0_[27] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\ysqr[57]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[57]_i_6 
       (.I0(\dy_reg_n_0_[31] ),
        .I1(\dy_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[30] ),
        .I3(\dy_reg_n_0_[29] ),
        .I4(\dy_reg_n_0_[27] ),
        .I5(\dy_reg_n_0_[32] ),
        .O(\ysqr[57]_i_6_n_0 ));
  (* HLUTNM = "lutpair40" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[57]_i_7 
       (.I0(\dy_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[29] ),
        .O(\ysqr[57]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'hAC)) 
    \ysqr[57]_i_8 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dy_reg_n_0_[28] ),
        .O(\ysqr[57]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[57]_i_9 
       (.I0(\dy_reg_n_0_[27] ),
        .I1(\dy_reg_n_0_[30] ),
        .O(\ysqr[57]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1147" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[58]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[4]),
        .O(\ysqr[58]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1147" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[59]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[5]),
        .O(\ysqr[59]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1171" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[5]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[5]),
        .O(\ysqr[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1146" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[60]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[6]),
        .O(\ysqr[60]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1146" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[61]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[7]),
        .O(\ysqr[61]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1145" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[62]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[8]),
        .O(\ysqr[62]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1145" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[63]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[9]),
        .O(\ysqr[63]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1144" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[64]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[10]),
        .O(\ysqr[64]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1144" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[65]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[11]),
        .O(\ysqr[65]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[65]_i_10 
       (.I0(\ysqr_reg[57]_i_3_n_15 ),
        .I1(\ysqr_reg[57]_i_2_n_13 ),
        .O(\ysqr[65]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \ysqr[65]_i_11 
       (.I0(\ysqr_reg[57]_i_3_n_9 ),
        .I1(\ysqr_reg[71]_i_13_n_12 ),
        .I2(\ysqr_reg[71]_i_18_n_14 ),
        .I3(\ysqr_reg[71]_i_13_n_11 ),
        .I4(\ysqr_reg[57]_i_3_n_8 ),
        .I5(\ysqr[65]_i_19_n_0 ),
        .O(\ysqr[65]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \ysqr[65]_i_12 
       (.I0(\ysqr_reg[71]_i_18_n_15 ),
        .I1(\ysqr_reg[57]_i_3_n_9 ),
        .I2(\ysqr_reg[71]_i_13_n_12 ),
        .I3(\ysqr_reg[57]_i_3_n_8 ),
        .I4(\ysqr_reg[71]_i_13_n_11 ),
        .I5(\ysqr_reg[71]_i_18_n_14 ),
        .O(\ysqr[65]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \ysqr[65]_i_13 
       (.I0(\ysqr_reg[71]_i_18_n_15 ),
        .I1(\ysqr_reg[71]_i_13_n_12 ),
        .I2(\ysqr_reg[57]_i_3_n_9 ),
        .I3(\ysqr_reg[57]_i_3_n_10 ),
        .I4(\ysqr_reg[57]_i_2_n_8 ),
        .I5(\ysqr_reg[71]_i_13_n_13 ),
        .O(\ysqr[65]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[65]_i_14 
       (.I0(\ysqr[65]_i_6_n_0 ),
        .I1(\ysqr_reg[71]_i_13_n_13 ),
        .I2(\ysqr_reg[57]_i_2_n_8 ),
        .I3(\ysqr_reg[57]_i_3_n_10 ),
        .O(\ysqr[65]_i_14_n_0 ));
  (* HLUTNM = "lutpair43" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[65]_i_15 
       (.I0(\ysqr_reg[71]_i_13_n_14 ),
        .I1(\ysqr_reg[57]_i_2_n_9 ),
        .I2(\ysqr_reg[57]_i_3_n_11 ),
        .I3(\ysqr[65]_i_7_n_0 ),
        .O(\ysqr[65]_i_15_n_0 ));
  (* HLUTNM = "lutpair42" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[65]_i_16 
       (.I0(\ysqr_reg[71]_i_13_n_15 ),
        .I1(\ysqr_reg[57]_i_2_n_10 ),
        .I2(\ysqr_reg[57]_i_3_n_12 ),
        .I3(\ysqr[65]_i_8_n_0 ),
        .O(\ysqr[65]_i_16_n_0 ));
  (* HLUTNM = "lutpair41" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \ysqr[65]_i_17 
       (.I0(\ysqr_reg[57]_i_3_n_13 ),
        .I1(\ysqr_reg[57]_i_2_n_11 ),
        .I2(\ysqr_reg[57]_i_2_n_12 ),
        .I3(\ysqr_reg[57]_i_3_n_14 ),
        .O(\ysqr[65]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \ysqr[65]_i_18 
       (.I0(\ysqr_reg[57]_i_2_n_13 ),
        .I1(\ysqr_reg[57]_i_3_n_15 ),
        .I2(\ysqr_reg[57]_i_2_n_12 ),
        .I3(\ysqr_reg[57]_i_3_n_14 ),
        .O(\ysqr[65]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \ysqr[65]_i_19 
       (.I0(\ysqr_reg[71]_i_17_n_15 ),
        .I1(\ysqr_reg[71]_i_13_n_10 ),
        .I2(\ysqr_reg[71]_i_18_n_5 ),
        .O(\ysqr[65]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \ysqr[65]_i_3 
       (.I0(\ysqr_reg[57]_i_3_n_9 ),
        .I1(\ysqr_reg[71]_i_13_n_12 ),
        .I2(\ysqr_reg[71]_i_18_n_14 ),
        .I3(\ysqr_reg[71]_i_13_n_11 ),
        .I4(\ysqr_reg[57]_i_3_n_8 ),
        .O(\ysqr[65]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \ysqr[65]_i_4 
       (.I0(\ysqr_reg[71]_i_18_n_15 ),
        .I1(\ysqr_reg[57]_i_3_n_9 ),
        .I2(\ysqr_reg[71]_i_13_n_12 ),
        .O(\ysqr[65]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \ysqr[65]_i_5 
       (.I0(\ysqr_reg[57]_i_3_n_9 ),
        .I1(\ysqr_reg[71]_i_13_n_12 ),
        .I2(\ysqr_reg[71]_i_18_n_15 ),
        .O(\ysqr[65]_i_5_n_0 ));
  (* HLUTNM = "lutpair43" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \ysqr[65]_i_6 
       (.I0(\ysqr_reg[71]_i_13_n_14 ),
        .I1(\ysqr_reg[57]_i_2_n_9 ),
        .I2(\ysqr_reg[57]_i_3_n_11 ),
        .O(\ysqr[65]_i_6_n_0 ));
  (* HLUTNM = "lutpair42" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \ysqr[65]_i_7 
       (.I0(\ysqr_reg[71]_i_13_n_15 ),
        .I1(\ysqr_reg[57]_i_2_n_10 ),
        .I2(\ysqr_reg[57]_i_3_n_12 ),
        .O(\ysqr[65]_i_7_n_0 ));
  (* HLUTNM = "lutpair41" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[65]_i_8 
       (.I0(\ysqr_reg[57]_i_3_n_13 ),
        .I1(\ysqr_reg[57]_i_2_n_11 ),
        .O(\ysqr[65]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[65]_i_9 
       (.I0(\ysqr_reg[57]_i_3_n_14 ),
        .I1(\ysqr_reg[57]_i_2_n_12 ),
        .O(\ysqr[65]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1143" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[66]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[12]),
        .O(\ysqr[66]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1143" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[67]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[13]),
        .O(\ysqr[67]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1142" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[68]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[14]),
        .O(\ysqr[68]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1142" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[69]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[15]),
        .O(\ysqr[69]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1170" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[6]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[6]),
        .O(\ysqr[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1141" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[70]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[16]),
        .O(\ysqr[70]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1141" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[71]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr02_in[17]),
        .O(\ysqr[71]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \ysqr[71]_i_10 
       (.I0(\ysqr[71]_i_5_n_0 ),
        .I1(\ysqr_reg[71]_i_3_n_15 ),
        .I2(\ysqr_reg[71]_i_17_n_4 ),
        .I3(\ysqr_reg[71]_i_13_n_8 ),
        .I4(\ysqr_reg[71]_i_17_n_13 ),
        .O(\ysqr[71]_i_10_n_0 ));
  (* HLUTNM = "lutpair44" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \ysqr[71]_i_11 
       (.I0(\ysqr_reg[71]_i_17_n_14 ),
        .I1(\ysqr_reg[71]_i_13_n_9 ),
        .I2(\ysqr_reg[71]_i_17_n_13 ),
        .I3(\ysqr_reg[71]_i_13_n_8 ),
        .I4(\ysqr[71]_i_6_n_0 ),
        .O(\ysqr[71]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \ysqr[71]_i_12 
       (.I0(\ysqr[71]_i_7_n_0 ),
        .I1(\ysqr_reg[71]_i_17_n_15 ),
        .I2(\ysqr_reg[71]_i_18_n_5 ),
        .I3(\ysqr_reg[71]_i_13_n_10 ),
        .I4(\ysqr_reg[71]_i_17_n_14 ),
        .I5(\ysqr_reg[71]_i_13_n_9 ),
        .O(\ysqr[71]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \ysqr[71]_i_14 
       (.I0(\dy_reg_n_0_[34] ),
        .I1(\dy_reg_n_0_[35] ),
        .O(\ysqr[71]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \ysqr[71]_i_15 
       (.I0(\dy_reg_n_0_[33] ),
        .I1(\dy_reg_n_0_[35] ),
        .O(\ysqr[71]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[71]_i_16 
       (.I0(\dy_reg_n_0_[34] ),
        .I1(\dy_reg_n_0_[33] ),
        .O(\ysqr[71]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hF7777000)) 
    \ysqr[71]_i_19 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dy_reg_n_0_[31] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dy_reg_n_0_[32] ),
        .I4(\dy_reg_n_0_[33] ),
        .O(\ysqr[71]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[71]_i_20 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dy_reg_n_0_[30] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dy_reg_n_0_[31] ),
        .I4(\dy_reg_n_0_[32] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\ysqr[71]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[71]_i_21 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dy_reg_n_0_[30] ),
        .I4(\dy_reg_n_0_[31] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\ysqr[71]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[71]_i_22 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dy_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dy_reg_n_0_[29] ),
        .I4(\dy_reg_n_0_[30] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\ysqr[71]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h7000)) 
    \ysqr[71]_i_23 
       (.I0(\dy_reg_n_0_[35] ),
        .I1(\dy_reg_n_0_[27] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dy_reg_n_0_[28] ),
        .O(\ysqr[71]_i_23_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[71]_i_24 
       (.I0(\dy_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[33] ),
        .O(\ysqr[71]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'h8E11F555)) 
    \ysqr[71]_i_25 
       (.I0(\dy_reg_n_0_[33] ),
        .I1(\dy_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dy_reg_n_0_[35] ),
        .I4(\dy_reg_n_0_[32] ),
        .O(\ysqr[71]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hEB843C0C903FCF3F)) 
    \ysqr[71]_i_26 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dy_reg_n_0_[31] ),
        .I4(\dy_reg_n_0_[35] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\ysqr[71]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h7F07070780F8F8F8)) 
    \ysqr[71]_i_27 
       (.I0(\dy_reg_n_0_[33] ),
        .I1(\dy_reg_n_0_[31] ),
        .I2(\ysqr[71]_i_43_n_0 ),
        .I3(\dy_reg_n_0_[29] ),
        .I4(\dy_reg_n_0_[35] ),
        .I5(\ysqr[71]_i_44_n_0 ),
        .O(\ysqr[71]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A956A956A95)) 
    \ysqr[71]_i_28 
       (.I0(\ysqr[71]_i_22_n_0 ),
        .I1(\dy_reg_n_0_[35] ),
        .I2(\dy_reg_n_0_[29] ),
        .I3(\ysqr[71]_i_43_n_0 ),
        .I4(\dy_reg_n_0_[31] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\ysqr[71]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h69C399C369336933)) 
    \ysqr[71]_i_29 
       (.I0(\dy_reg_n_0_[29] ),
        .I1(\ysqr[71]_i_45_n_0 ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\dy_reg_n_0_[34] ),
        .I4(\dy_reg_n_0_[27] ),
        .I5(\dy_reg_n_0_[35] ),
        .O(\ysqr[71]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \ysqr[71]_i_30 
       (.I0(\dy_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[27] ),
        .I3(\dy_reg_n_0_[35] ),
        .I4(\dy_reg_n_0_[33] ),
        .I5(\dy_reg_n_0_[29] ),
        .O(\ysqr[71]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \ysqr[71]_i_31 
       (.I0(\dy_reg_n_0_[33] ),
        .I1(\dy_reg_n_0_[28] ),
        .I2(\dy_reg_n_0_[34] ),
        .I3(\dy_reg_n_0_[27] ),
        .O(\ysqr[71]_i_31_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[71]_i_32 
       (.I0(\dy_reg_n_0_[27] ),
        .I1(\dy_reg_n_0_[33] ),
        .O(\ysqr[71]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \ysqr[71]_i_33 
       (.I0(\dy_reg_n_0_[34] ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dy_reg_n_0_[35] ),
        .I3(\dy_reg_n_0_[31] ),
        .O(\ysqr[71]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[71]_i_34 
       (.I0(\dy_reg_n_0_[32] ),
        .I1(\dy_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[31] ),
        .I3(\dy_reg_n_0_[35] ),
        .O(\ysqr[71]_i_34_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[71]_i_35 
       (.I0(\dy_reg_n_0_[31] ),
        .I1(\dy_reg_n_0_[32] ),
        .O(\ysqr[71]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \ysqr[71]_i_36 
       (.I0(\dy_reg_n_0_[31] ),
        .I1(\dy_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[35] ),
        .I3(\dy_reg_n_0_[32] ),
        .O(\ysqr[71]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \ysqr[71]_i_37 
       (.I0(\dy_reg_n_0_[33] ),
        .I1(\dy_reg_n_0_[30] ),
        .I2(\dy_reg_n_0_[35] ),
        .I3(\dy_reg_n_0_[31] ),
        .I4(\dy_reg_n_0_[34] ),
        .I5(\dy_reg_n_0_[32] ),
        .O(\ysqr[71]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'hD22287772DDD8777)) 
    \ysqr[71]_i_38 
       (.I0(\dy_reg_n_0_[31] ),
        .I1(\dy_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[30] ),
        .I3(\dy_reg_n_0_[35] ),
        .I4(\dy_reg_n_0_[32] ),
        .I5(\dy_reg_n_0_[33] ),
        .O(\ysqr[71]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \ysqr[71]_i_39 
       (.I0(\dy_reg_n_0_[34] ),
        .I1(\dy_reg_n_0_[29] ),
        .I2(\dy_reg_n_0_[35] ),
        .I3(\dy_reg_n_0_[28] ),
        .O(\ysqr[71]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \ysqr[71]_i_4 
       (.I0(\ysqr_reg[71]_i_17_n_13 ),
        .I1(\ysqr_reg[71]_i_13_n_8 ),
        .I2(\ysqr_reg[71]_i_17_n_4 ),
        .I3(\ysqr_reg[71]_i_3_n_15 ),
        .O(\ysqr[71]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[71]_i_40 
       (.I0(\dy_reg_n_0_[29] ),
        .I1(\dy_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[28] ),
        .I3(\dy_reg_n_0_[35] ),
        .O(\ysqr[71]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \ysqr[71]_i_41 
       (.I0(\dy_reg_n_0_[28] ),
        .I1(\dy_reg_n_0_[34] ),
        .I2(\dy_reg_n_0_[35] ),
        .I3(\dy_reg_n_0_[29] ),
        .O(\ysqr[71]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \ysqr[71]_i_42 
       (.I0(\dy_reg_n_0_[33] ),
        .I1(\dy_reg_n_0_[27] ),
        .I2(\dy_reg_n_0_[35] ),
        .I3(\dy_reg_n_0_[28] ),
        .I4(\dy_reg_n_0_[34] ),
        .I5(\dy_reg_n_0_[29] ),
        .O(\ysqr[71]_i_42_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[71]_i_43 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[34] ),
        .O(\ysqr[71]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \ysqr[71]_i_44 
       (.I0(\dy_reg_n_0_[33] ),
        .I1(\dy_reg_n_0_[32] ),
        .I2(\dy_reg_n_0_[35] ),
        .I3(\dy_reg_n_0_[30] ),
        .I4(\dy_reg_n_0_[34] ),
        .I5(\dy_reg_n_0_[31] ),
        .O(\ysqr[71]_i_44_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1009" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[71]_i_45 
       (.I0(\dy_reg_n_0_[30] ),
        .I1(\dy_reg_n_0_[33] ),
        .O(\ysqr[71]_i_45_n_0 ));
  (* HLUTNM = "lutpair44" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \ysqr[71]_i_5 
       (.I0(\ysqr_reg[71]_i_17_n_14 ),
        .I1(\ysqr_reg[71]_i_13_n_9 ),
        .I2(\ysqr_reg[71]_i_17_n_13 ),
        .I3(\ysqr_reg[71]_i_13_n_8 ),
        .O(\ysqr[71]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \ysqr[71]_i_6 
       (.I0(\ysqr_reg[71]_i_17_n_14 ),
        .I1(\ysqr_reg[71]_i_13_n_9 ),
        .I2(\ysqr_reg[71]_i_17_n_15 ),
        .I3(\ysqr_reg[71]_i_18_n_5 ),
        .I4(\ysqr_reg[71]_i_13_n_10 ),
        .O(\ysqr[71]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \ysqr[71]_i_7 
       (.I0(\ysqr_reg[57]_i_3_n_8 ),
        .I1(\ysqr_reg[71]_i_18_n_14 ),
        .I2(\ysqr_reg[71]_i_13_n_11 ),
        .I3(\ysqr_reg[71]_i_18_n_5 ),
        .I4(\ysqr_reg[71]_i_13_n_10 ),
        .I5(\ysqr_reg[71]_i_17_n_15 ),
        .O(\ysqr[71]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \ysqr[71]_i_8 
       (.I0(\ysqr_reg[71]_i_3_n_15 ),
        .I1(\ysqr_reg[71]_i_17_n_4 ),
        .I2(\ysqr_reg[71]_i_3_n_14 ),
        .I3(\ysqr_reg[71]_i_3_n_13 ),
        .O(\ysqr[71]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \ysqr[71]_i_9 
       (.I0(\ysqr_reg[71]_i_13_n_8 ),
        .I1(\ysqr_reg[71]_i_17_n_13 ),
        .I2(\ysqr_reg[71]_i_3_n_15 ),
        .I3(\ysqr_reg[71]_i_17_n_4 ),
        .I4(\ysqr_reg[71]_i_3_n_14 ),
        .O(\ysqr[71]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1140" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[72]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(\dy_reg_n_0_[36] ),
        .O(\ysqr[72]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1139" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[74]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[2]),
        .O(\ysqr[74]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair888" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[75]_i_1 
       (.I0(\ysqr_reg[75]_i_2_n_13 ),
        .I1(\ysqr_reg[75]_i_3_n_15 ),
        .I2(stateScore_reg_rep__8_n_0),
        .O(\ysqr[75]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h9666)) 
    \ysqr[75]_i_10 
       (.I0(\ysqr[75]_i_4_n_0 ),
        .I1(\ysqr[75]_i_31_n_0 ),
        .I2(\dy_reg_n_0_[38] ),
        .I3(\dy_reg_n_0_[42] ),
        .O(\ysqr[75]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \ysqr[75]_i_11 
       (.I0(\ysqr[75]_i_5_n_0 ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dy_reg_n_0_[38] ),
        .I3(\ysqr[75]_i_32_n_0 ),
        .I4(\dy_reg_n_0_[36] ),
        .I5(\dy_reg_n_0_[43] ),
        .O(\ysqr[75]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6A959595956A6A6A)) 
    \ysqr[75]_i_12 
       (.I0(\ysqr[75]_i_6_n_0 ),
        .I1(\dy_reg_n_0_[40] ),
        .I2(\dy_reg_n_0_[38] ),
        .I3(\dy_reg_n_0_[41] ),
        .I4(\dy_reg_n_0_[37] ),
        .I5(\ysqr[75]_i_33_n_0 ),
        .O(\ysqr[75]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6A95956A956A956A)) 
    \ysqr[75]_i_13 
       (.I0(\ysqr[75]_i_7_n_0 ),
        .I1(\dy_reg_n_0_[40] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\ysqr[75]_i_21_n_0 ),
        .I4(\dy_reg_n_0_[36] ),
        .I5(\dy_reg_n_0_[41] ),
        .O(\ysqr[75]_i_13_n_0 ));
  (* HLUTNM = "lutpair45" *) 
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \ysqr[75]_i_14 
       (.I0(\dy_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dy_reg_n_0_[39] ),
        .I3(\dy_reg_n_0_[40] ),
        .I4(\dy_reg_n_0_[36] ),
        .O(\ysqr[75]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[75]_i_15 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dy_reg_n_0_[36] ),
        .O(\ysqr[75]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[75]_i_16 
       (.I0(\dy_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[36] ),
        .O(\ysqr[75]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[75]_i_17 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[43] ),
        .O(\ysqr[75]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[75]_i_18 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[42] ),
        .O(\ysqr[75]_i_18_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[75]_i_19 
       (.I0(\dy_reg_n_0_[38] ),
        .I1(\dy_reg_n_0_[41] ),
        .O(\ysqr[75]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h956A6A6A)) 
    \ysqr[75]_i_20 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[41] ),
        .I3(\dy_reg_n_0_[38] ),
        .I4(\dy_reg_n_0_[40] ),
        .O(\ysqr[75]_i_20_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[75]_i_21 
       (.I0(\dy_reg_n_0_[38] ),
        .I1(\dy_reg_n_0_[39] ),
        .O(\ysqr[75]_i_21_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[75]_i_22 
       (.I0(\dy_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[39] ),
        .O(\ysqr[75]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'h1BE4E4E4)) 
    \ysqr[75]_i_23 
       (.I0(\dy_reg_n_0_[40] ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dy_reg_n_0_[42] ),
        .I3(\dy_reg_n_0_[43] ),
        .I4(\dy_reg_n_0_[39] ),
        .O(\ysqr[75]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \ysqr[75]_i_24 
       (.I0(\dy_reg_n_0_[42] ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dy_reg_n_0_[39] ),
        .O(\ysqr[75]_i_24_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[75]_i_25 
       (.I0(\dy_reg_n_0_[40] ),
        .I1(\dy_reg_n_0_[39] ),
        .O(\ysqr[75]_i_25_n_0 ));
  LUT5 #(
    .INIT(32'h17A0C000)) 
    \ysqr[75]_i_26 
       (.I0(\dy_reg_n_0_[40] ),
        .I1(\dy_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[39] ),
        .I3(\dy_reg_n_0_[41] ),
        .I4(\dy_reg_n_0_[38] ),
        .O(\ysqr[75]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h663C963C66CC66CC)) 
    \ysqr[75]_i_27 
       (.I0(\dy_reg_n_0_[38] ),
        .I1(\dy_reg_n_0_[39] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dy_reg_n_0_[40] ),
        .I4(\dy_reg_n_0_[36] ),
        .I5(\dy_reg_n_0_[41] ),
        .O(\ysqr[75]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h8777788878887888)) 
    \ysqr[75]_i_28 
       (.I0(\dy_reg_n_0_[36] ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dy_reg_n_0_[40] ),
        .I4(\dy_reg_n_0_[39] ),
        .I5(\dy_reg_n_0_[38] ),
        .O(\ysqr[75]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \ysqr[75]_i_29 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[40] ),
        .I3(\dy_reg_n_0_[36] ),
        .O(\ysqr[75]_i_29_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[75]_i_30 
       (.I0(\dy_reg_n_0_[36] ),
        .I1(\dy_reg_n_0_[39] ),
        .O(\ysqr[75]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[75]_i_31 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dy_reg_n_0_[36] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dy_reg_n_0_[37] ),
        .O(\ysqr[75]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair983" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[75]_i_32 
       (.I0(\dy_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[42] ),
        .O(\ysqr[75]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair982" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[75]_i_33 
       (.I0(\dy_reg_n_0_[36] ),
        .I1(\dy_reg_n_0_[42] ),
        .O(\ysqr[75]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[75]_i_4 
       (.I0(\dy_reg_n_0_[41] ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dy_reg_n_0_[42] ),
        .I3(\dy_reg_n_0_[37] ),
        .I4(\dy_reg_n_0_[36] ),
        .I5(\dy_reg_n_0_[43] ),
        .O(\ysqr[75]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[75]_i_5 
       (.I0(\dy_reg_n_0_[40] ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dy_reg_n_0_[41] ),
        .I3(\dy_reg_n_0_[37] ),
        .I4(\dy_reg_n_0_[36] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\ysqr[75]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF888800080008000)) 
    \ysqr[75]_i_6 
       (.I0(\dy_reg_n_0_[40] ),
        .I1(\dy_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[39] ),
        .I3(\dy_reg_n_0_[38] ),
        .I4(\dy_reg_n_0_[36] ),
        .I5(\dy_reg_n_0_[41] ),
        .O(\ysqr[75]_i_6_n_0 ));
  (* HLUTNM = "lutpair45" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[75]_i_7 
       (.I0(\dy_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[38] ),
        .O(\ysqr[75]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'hAC)) 
    \ysqr[75]_i_8 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dy_reg_n_0_[37] ),
        .O(\ysqr[75]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[75]_i_9 
       (.I0(\dy_reg_n_0_[36] ),
        .I1(\dy_reg_n_0_[39] ),
        .O(\ysqr[75]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1139" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[76]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[4]),
        .O(\ysqr[76]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1138" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[77]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[5]),
        .O(\ysqr[77]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1138" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[78]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[6]),
        .O(\ysqr[78]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1137" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[79]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[7]),
        .O(\ysqr[79]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1170" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[7]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[7]),
        .O(\ysqr[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1137" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[80]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[8]),
        .O(\ysqr[80]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1136" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[81]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[9]),
        .O(\ysqr[81]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1136" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[82]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[10]),
        .O(\ysqr[82]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1135" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[83]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[11]),
        .O(\ysqr[83]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[83]_i_10 
       (.I0(\ysqr_reg[75]_i_3_n_15 ),
        .I1(\ysqr_reg[75]_i_2_n_13 ),
        .O(\ysqr[83]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1FFEFEE0E001011F)) 
    \ysqr[83]_i_11 
       (.I0(\ysqr_reg[75]_i_3_n_9 ),
        .I1(\ysqr_reg[89]_i_13_n_12 ),
        .I2(\ysqr_reg[89]_i_18_n_14 ),
        .I3(\ysqr_reg[89]_i_13_n_11 ),
        .I4(\ysqr_reg[75]_i_3_n_8 ),
        .I5(\ysqr[83]_i_19_n_0 ),
        .O(\ysqr[83]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h817E7E817E81817E)) 
    \ysqr[83]_i_12 
       (.I0(\ysqr_reg[89]_i_18_n_15 ),
        .I1(\ysqr_reg[75]_i_3_n_9 ),
        .I2(\ysqr_reg[89]_i_13_n_12 ),
        .I3(\ysqr_reg[75]_i_3_n_8 ),
        .I4(\ysqr_reg[89]_i_13_n_11 ),
        .I5(\ysqr_reg[89]_i_18_n_14 ),
        .O(\ysqr[83]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9696966996696969)) 
    \ysqr[83]_i_13 
       (.I0(\ysqr_reg[89]_i_18_n_15 ),
        .I1(\ysqr_reg[89]_i_13_n_12 ),
        .I2(\ysqr_reg[75]_i_3_n_9 ),
        .I3(\ysqr_reg[75]_i_3_n_10 ),
        .I4(\ysqr_reg[75]_i_2_n_8 ),
        .I5(\ysqr_reg[89]_i_13_n_13 ),
        .O(\ysqr[83]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[83]_i_14 
       (.I0(\ysqr[83]_i_6_n_0 ),
        .I1(\ysqr_reg[89]_i_13_n_13 ),
        .I2(\ysqr_reg[75]_i_2_n_8 ),
        .I3(\ysqr_reg[75]_i_3_n_10 ),
        .O(\ysqr[83]_i_14_n_0 ));
  (* HLUTNM = "lutpair48" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[83]_i_15 
       (.I0(\ysqr_reg[89]_i_13_n_14 ),
        .I1(\ysqr_reg[75]_i_2_n_9 ),
        .I2(\ysqr_reg[75]_i_3_n_11 ),
        .I3(\ysqr[83]_i_7_n_0 ),
        .O(\ysqr[83]_i_15_n_0 ));
  (* HLUTNM = "lutpair47" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \ysqr[83]_i_16 
       (.I0(\ysqr_reg[89]_i_13_n_15 ),
        .I1(\ysqr_reg[75]_i_2_n_10 ),
        .I2(\ysqr_reg[75]_i_3_n_12 ),
        .I3(\ysqr[83]_i_8_n_0 ),
        .O(\ysqr[83]_i_16_n_0 ));
  (* HLUTNM = "lutpair46" *) 
  LUT4 #(
    .INIT(16'h9666)) 
    \ysqr[83]_i_17 
       (.I0(\ysqr_reg[75]_i_3_n_13 ),
        .I1(\ysqr_reg[75]_i_2_n_11 ),
        .I2(\ysqr_reg[75]_i_2_n_12 ),
        .I3(\ysqr_reg[75]_i_3_n_14 ),
        .O(\ysqr[83]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h8778)) 
    \ysqr[83]_i_18 
       (.I0(\ysqr_reg[75]_i_2_n_13 ),
        .I1(\ysqr_reg[75]_i_3_n_15 ),
        .I2(\ysqr_reg[75]_i_2_n_12 ),
        .I3(\ysqr_reg[75]_i_3_n_14 ),
        .O(\ysqr[83]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \ysqr[83]_i_19 
       (.I0(\ysqr_reg[89]_i_17_n_15 ),
        .I1(\ysqr_reg[89]_i_13_n_10 ),
        .I2(\ysqr_reg[89]_i_18_n_5 ),
        .O(\ysqr[83]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hE00E0EE0)) 
    \ysqr[83]_i_3 
       (.I0(\ysqr_reg[75]_i_3_n_9 ),
        .I1(\ysqr_reg[89]_i_13_n_12 ),
        .I2(\ysqr_reg[89]_i_18_n_14 ),
        .I3(\ysqr_reg[89]_i_13_n_11 ),
        .I4(\ysqr_reg[75]_i_3_n_8 ),
        .O(\ysqr[83]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h82)) 
    \ysqr[83]_i_4 
       (.I0(\ysqr_reg[89]_i_18_n_15 ),
        .I1(\ysqr_reg[75]_i_3_n_9 ),
        .I2(\ysqr_reg[89]_i_13_n_12 ),
        .O(\ysqr[83]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h69)) 
    \ysqr[83]_i_5 
       (.I0(\ysqr_reg[75]_i_3_n_9 ),
        .I1(\ysqr_reg[89]_i_13_n_12 ),
        .I2(\ysqr_reg[89]_i_18_n_15 ),
        .O(\ysqr[83]_i_5_n_0 ));
  (* HLUTNM = "lutpair48" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \ysqr[83]_i_6 
       (.I0(\ysqr_reg[89]_i_13_n_14 ),
        .I1(\ysqr_reg[75]_i_2_n_9 ),
        .I2(\ysqr_reg[75]_i_3_n_11 ),
        .O(\ysqr[83]_i_6_n_0 ));
  (* HLUTNM = "lutpair47" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \ysqr[83]_i_7 
       (.I0(\ysqr_reg[89]_i_13_n_15 ),
        .I1(\ysqr_reg[75]_i_2_n_10 ),
        .I2(\ysqr_reg[75]_i_3_n_12 ),
        .O(\ysqr[83]_i_7_n_0 ));
  (* HLUTNM = "lutpair46" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[83]_i_8 
       (.I0(\ysqr_reg[75]_i_3_n_13 ),
        .I1(\ysqr_reg[75]_i_2_n_11 ),
        .O(\ysqr[83]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[83]_i_9 
       (.I0(\ysqr_reg[75]_i_3_n_14 ),
        .I1(\ysqr_reg[75]_i_2_n_12 ),
        .O(\ysqr[83]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1135" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[84]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[12]),
        .O(\ysqr[84]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1134" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[85]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[13]),
        .O(\ysqr[85]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1134" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[86]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[14]),
        .O(\ysqr[86]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair888" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[87]_i_1 
       (.I0(stateScore_reg_rep__8_n_0),
        .I1(ysqr03_in[15]),
        .O(\ysqr[87]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1133" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[88]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(ysqr03_in[16]),
        .O(\ysqr[88]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1133" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[89]_i_1 
       (.I0(stateScore_reg_rep__17_n_0),
        .I1(ysqr03_in[17]),
        .O(\ysqr[89]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h69969696)) 
    \ysqr[89]_i_10 
       (.I0(\ysqr[89]_i_5_n_0 ),
        .I1(\ysqr_reg[89]_i_3_n_15 ),
        .I2(\ysqr_reg[89]_i_17_n_4 ),
        .I3(\ysqr_reg[89]_i_13_n_8 ),
        .I4(\ysqr_reg[89]_i_17_n_13 ),
        .O(\ysqr[89]_i_10_n_0 ));
  (* HLUTNM = "lutpair49" *) 
  LUT5 #(
    .INIT(32'h78878778)) 
    \ysqr[89]_i_11 
       (.I0(\ysqr_reg[89]_i_17_n_14 ),
        .I1(\ysqr_reg[89]_i_13_n_9 ),
        .I2(\ysqr_reg[89]_i_17_n_13 ),
        .I3(\ysqr_reg[89]_i_13_n_8 ),
        .I4(\ysqr[89]_i_6_n_0 ),
        .O(\ysqr[89]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h566AA995A995566A)) 
    \ysqr[89]_i_12 
       (.I0(\ysqr[89]_i_7_n_0 ),
        .I1(\ysqr_reg[89]_i_17_n_15 ),
        .I2(\ysqr_reg[89]_i_18_n_5 ),
        .I3(\ysqr_reg[89]_i_13_n_10 ),
        .I4(\ysqr_reg[89]_i_17_n_14 ),
        .I5(\ysqr_reg[89]_i_13_n_9 ),
        .O(\ysqr[89]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \ysqr[89]_i_14 
       (.I0(\dy_reg_n_0_[43] ),
        .I1(\dy_reg_n_0_[44] ),
        .O(\ysqr[89]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \ysqr[89]_i_15 
       (.I0(\dy_reg_n_0_[42] ),
        .I1(\dy_reg_n_0_[44] ),
        .O(\ysqr[89]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \ysqr[89]_i_16 
       (.I0(\dy_reg_n_0_[43] ),
        .I1(\dy_reg_n_0_[42] ),
        .O(\ysqr[89]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hF7777000)) 
    \ysqr[89]_i_19 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dy_reg_n_0_[40] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dy_reg_n_0_[41] ),
        .I4(\dy_reg_n_0_[42] ),
        .O(\ysqr[89]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[89]_i_20 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dy_reg_n_0_[39] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dy_reg_n_0_[40] ),
        .I4(\dy_reg_n_0_[41] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\ysqr[89]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[89]_i_21 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dy_reg_n_0_[39] ),
        .I4(\dy_reg_n_0_[40] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\ysqr[89]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hF777700070007000)) 
    \ysqr[89]_i_22 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dy_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dy_reg_n_0_[38] ),
        .I4(\dy_reg_n_0_[39] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\ysqr[89]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h7000)) 
    \ysqr[89]_i_23 
       (.I0(\dy_reg_n_0_[44] ),
        .I1(\dy_reg_n_0_[36] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dy_reg_n_0_[37] ),
        .O(\ysqr[89]_i_23_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[89]_i_24 
       (.I0(\dy_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[42] ),
        .O(\ysqr[89]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'h8E11F555)) 
    \ysqr[89]_i_25 
       (.I0(\dy_reg_n_0_[42] ),
        .I1(\dy_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[40] ),
        .I3(\dy_reg_n_0_[44] ),
        .I4(\dy_reg_n_0_[41] ),
        .O(\ysqr[89]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hEB843C0C903FCF3F)) 
    \ysqr[89]_i_26 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dy_reg_n_0_[40] ),
        .I4(\dy_reg_n_0_[44] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\ysqr[89]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h7F07070780F8F8F8)) 
    \ysqr[89]_i_27 
       (.I0(\dy_reg_n_0_[42] ),
        .I1(\dy_reg_n_0_[40] ),
        .I2(\ysqr[89]_i_43_n_0 ),
        .I3(\dy_reg_n_0_[38] ),
        .I4(\dy_reg_n_0_[44] ),
        .I5(\ysqr[89]_i_44_n_0 ),
        .O(\ysqr[89]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h956A6A956A956A95)) 
    \ysqr[89]_i_28 
       (.I0(\ysqr[89]_i_22_n_0 ),
        .I1(\dy_reg_n_0_[44] ),
        .I2(\dy_reg_n_0_[38] ),
        .I3(\ysqr[89]_i_43_n_0 ),
        .I4(\dy_reg_n_0_[40] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\ysqr[89]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h69C399C369336933)) 
    \ysqr[89]_i_29 
       (.I0(\dy_reg_n_0_[38] ),
        .I1(\ysqr[89]_i_45_n_0 ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dy_reg_n_0_[43] ),
        .I4(\dy_reg_n_0_[36] ),
        .I5(\dy_reg_n_0_[44] ),
        .O(\ysqr[89]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \ysqr[89]_i_30 
       (.I0(\dy_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[36] ),
        .I3(\dy_reg_n_0_[44] ),
        .I4(\dy_reg_n_0_[42] ),
        .I5(\dy_reg_n_0_[38] ),
        .O(\ysqr[89]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h7888)) 
    \ysqr[89]_i_31 
       (.I0(\dy_reg_n_0_[42] ),
        .I1(\dy_reg_n_0_[37] ),
        .I2(\dy_reg_n_0_[43] ),
        .I3(\dy_reg_n_0_[36] ),
        .O(\ysqr[89]_i_31_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[89]_i_32 
       (.I0(\dy_reg_n_0_[36] ),
        .I1(\dy_reg_n_0_[42] ),
        .O(\ysqr[89]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \ysqr[89]_i_33 
       (.I0(\dy_reg_n_0_[43] ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dy_reg_n_0_[44] ),
        .I3(\dy_reg_n_0_[40] ),
        .O(\ysqr[89]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[89]_i_34 
       (.I0(\dy_reg_n_0_[41] ),
        .I1(\dy_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[40] ),
        .I3(\dy_reg_n_0_[44] ),
        .O(\ysqr[89]_i_34_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[89]_i_35 
       (.I0(\dy_reg_n_0_[40] ),
        .I1(\dy_reg_n_0_[41] ),
        .O(\ysqr[89]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \ysqr[89]_i_36 
       (.I0(\dy_reg_n_0_[40] ),
        .I1(\dy_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[44] ),
        .I3(\dy_reg_n_0_[41] ),
        .O(\ysqr[89]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \ysqr[89]_i_37 
       (.I0(\dy_reg_n_0_[42] ),
        .I1(\dy_reg_n_0_[39] ),
        .I2(\dy_reg_n_0_[44] ),
        .I3(\dy_reg_n_0_[40] ),
        .I4(\dy_reg_n_0_[43] ),
        .I5(\dy_reg_n_0_[41] ),
        .O(\ysqr[89]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'hD22287772DDD8777)) 
    \ysqr[89]_i_38 
       (.I0(\dy_reg_n_0_[40] ),
        .I1(\dy_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[39] ),
        .I3(\dy_reg_n_0_[44] ),
        .I4(\dy_reg_n_0_[41] ),
        .I5(\dy_reg_n_0_[42] ),
        .O(\ysqr[89]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h0888)) 
    \ysqr[89]_i_39 
       (.I0(\dy_reg_n_0_[43] ),
        .I1(\dy_reg_n_0_[38] ),
        .I2(\dy_reg_n_0_[44] ),
        .I3(\dy_reg_n_0_[37] ),
        .O(\ysqr[89]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h0880)) 
    \ysqr[89]_i_4 
       (.I0(\ysqr_reg[89]_i_17_n_13 ),
        .I1(\ysqr_reg[89]_i_13_n_8 ),
        .I2(\ysqr_reg[89]_i_17_n_4 ),
        .I3(\ysqr_reg[89]_i_3_n_15 ),
        .O(\ysqr[89]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8777)) 
    \ysqr[89]_i_40 
       (.I0(\dy_reg_n_0_[38] ),
        .I1(\dy_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[37] ),
        .I3(\dy_reg_n_0_[44] ),
        .O(\ysqr[89]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h43FF)) 
    \ysqr[89]_i_41 
       (.I0(\dy_reg_n_0_[37] ),
        .I1(\dy_reg_n_0_[43] ),
        .I2(\dy_reg_n_0_[44] ),
        .I3(\dy_reg_n_0_[38] ),
        .O(\ysqr[89]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h4F2A25D530FF0FFF)) 
    \ysqr[89]_i_42 
       (.I0(\dy_reg_n_0_[42] ),
        .I1(\dy_reg_n_0_[36] ),
        .I2(\dy_reg_n_0_[44] ),
        .I3(\dy_reg_n_0_[37] ),
        .I4(\dy_reg_n_0_[43] ),
        .I5(\dy_reg_n_0_[38] ),
        .O(\ysqr[89]_i_42_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[89]_i_43 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[43] ),
        .O(\ysqr[89]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h7888877787778777)) 
    \ysqr[89]_i_44 
       (.I0(\dy_reg_n_0_[42] ),
        .I1(\dy_reg_n_0_[41] ),
        .I2(\dy_reg_n_0_[44] ),
        .I3(\dy_reg_n_0_[39] ),
        .I4(\dy_reg_n_0_[43] ),
        .I5(\dy_reg_n_0_[40] ),
        .O(\ysqr[89]_i_44_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1016" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[89]_i_45 
       (.I0(\dy_reg_n_0_[39] ),
        .I1(\dy_reg_n_0_[42] ),
        .O(\ysqr[89]_i_45_n_0 ));
  (* HLUTNM = "lutpair49" *) 
  LUT4 #(
    .INIT(16'h0880)) 
    \ysqr[89]_i_5 
       (.I0(\ysqr_reg[89]_i_17_n_14 ),
        .I1(\ysqr_reg[89]_i_13_n_9 ),
        .I2(\ysqr_reg[89]_i_17_n_13 ),
        .I3(\ysqr_reg[89]_i_13_n_8 ),
        .O(\ysqr[89]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h66606000)) 
    \ysqr[89]_i_6 
       (.I0(\ysqr_reg[89]_i_17_n_14 ),
        .I1(\ysqr_reg[89]_i_13_n_9 ),
        .I2(\ysqr_reg[89]_i_17_n_15 ),
        .I3(\ysqr_reg[89]_i_18_n_5 ),
        .I4(\ysqr_reg[89]_i_13_n_10 ),
        .O(\ysqr[89]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hE80000E800E8E800)) 
    \ysqr[89]_i_7 
       (.I0(\ysqr_reg[75]_i_3_n_8 ),
        .I1(\ysqr_reg[89]_i_18_n_14 ),
        .I2(\ysqr_reg[89]_i_13_n_11 ),
        .I3(\ysqr_reg[89]_i_18_n_5 ),
        .I4(\ysqr_reg[89]_i_13_n_10 ),
        .I5(\ysqr_reg[89]_i_17_n_15 ),
        .O(\ysqr[89]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h7F80)) 
    \ysqr[89]_i_8 
       (.I0(\ysqr_reg[89]_i_3_n_15 ),
        .I1(\ysqr_reg[89]_i_17_n_4 ),
        .I2(\ysqr_reg[89]_i_3_n_14 ),
        .I3(\ysqr_reg[89]_i_3_n_13 ),
        .O(\ysqr[89]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h077FF880)) 
    \ysqr[89]_i_9 
       (.I0(\ysqr_reg[89]_i_13_n_8 ),
        .I1(\ysqr_reg[89]_i_17_n_13 ),
        .I2(\ysqr_reg[89]_i_3_n_15 ),
        .I3(\ysqr_reg[89]_i_17_n_4 ),
        .I4(\ysqr_reg[89]_i_3_n_14 ),
        .O(\ysqr[89]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1169" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[8]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[8]),
        .O(\ysqr[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1169" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ysqr[9]_i_1 
       (.I0(stateScore_reg_rep__7_n_0),
        .I1(ysqr0[9]),
        .O(\ysqr[9]_i_1_n_0 ));
  FDCE \ysqr_reg[0] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[0]_i_1_n_0 ),
        .Q(ysqr[0]));
  FDCE \ysqr_reg[10] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[10]_i_1_n_0 ),
        .Q(ysqr[10]));
  FDCE \ysqr_reg[11] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[11]_i_1_n_0 ),
        .Q(ysqr[11]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \ysqr_reg[11]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[11]_i_2_n_0 ,\ysqr_reg[11]_i_2_n_1 ,\ysqr_reg[11]_i_2_n_2 ,\ysqr_reg[11]_i_2_n_3 ,\ysqr_reg[11]_i_2_n_4 ,\ysqr_reg[11]_i_2_n_5 ,\ysqr_reg[11]_i_2_n_6 ,\ysqr_reg[11]_i_2_n_7 }),
        .DI({\ysqr[11]_i_3_n_0 ,\ysqr[11]_i_4_n_0 ,\ysqr[11]_i_5_n_0 ,\ysqr[11]_i_6_n_0 ,\ysqr[11]_i_7_n_0 ,\ysqr[11]_i_8_n_0 ,\ysqr[11]_i_9_n_0 ,\ysqr[11]_i_10_n_0 }),
        .O(ysqr0[11:4]),
        .S({\ysqr[11]_i_11_n_0 ,\ysqr[11]_i_12_n_0 ,\ysqr[11]_i_13_n_0 ,\ysqr[11]_i_14_n_0 ,\ysqr[11]_i_15_n_0 ,\ysqr[11]_i_16_n_0 ,\ysqr[11]_i_17_n_0 ,\ysqr[11]_i_18_n_0 }));
  FDCE \ysqr_reg[12] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[12]_i_1_n_0 ),
        .Q(ysqr[12]));
  FDCE \ysqr_reg[13] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[13]_i_1_n_0 ),
        .Q(ysqr[13]));
  FDCE \ysqr_reg[14] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[14]_i_1_n_0 ),
        .Q(ysqr[14]));
  FDCE \ysqr_reg[15] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[15]_i_1_n_0 ),
        .Q(ysqr[15]));
  FDCE \ysqr_reg[16] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[16]_i_1_n_0 ),
        .Q(ysqr[16]));
  FDCE \ysqr_reg[17] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[17]_i_1_n_0 ),
        .Q(ysqr[17]));
  CARRY8 \ysqr_reg[17]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[17]_i_13_n_0 ,\ysqr_reg[17]_i_13_n_1 ,\ysqr_reg[17]_i_13_n_2 ,\ysqr_reg[17]_i_13_n_3 ,\ysqr_reg[17]_i_13_n_4 ,\ysqr_reg[17]_i_13_n_5 ,\ysqr_reg[17]_i_13_n_6 ,\ysqr_reg[17]_i_13_n_7 }),
        .DI({\ysqr[17]_i_19_n_0 ,\ysqr[17]_i_20_n_0 ,\ysqr[17]_i_21_n_0 ,\ysqr[17]_i_22_n_0 ,\ysqr[17]_i_23_n_0 ,\ysqr[3]_i_31_n_0 ,\ysqr[17]_i_24_n_0 ,1'b0}),
        .O({\ysqr_reg[17]_i_13_n_8 ,\ysqr_reg[17]_i_13_n_9 ,\ysqr_reg[17]_i_13_n_10 ,\ysqr_reg[17]_i_13_n_11 ,\ysqr_reg[17]_i_13_n_12 ,\ysqr_reg[17]_i_13_n_13 ,\ysqr_reg[17]_i_13_n_14 ,\ysqr_reg[17]_i_13_n_15 }),
        .S({\ysqr[17]_i_25_n_0 ,\ysqr[17]_i_26_n_0 ,\ysqr[17]_i_27_n_0 ,\ysqr[17]_i_28_n_0 ,\ysqr[17]_i_29_n_0 ,\ysqr[17]_i_30_n_0 ,\ysqr[17]_i_31_n_0 ,\ysqr[17]_i_32_n_0 }));
  CARRY8 \ysqr_reg[17]_i_17 
       (.CI(\ysqr_reg[3]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[17]_i_17_CO_UNCONNECTED [7:4],\ysqr_reg[17]_i_17_n_4 ,\NLW_ysqr_reg[17]_i_17_CO_UNCONNECTED [2],\ysqr_reg[17]_i_17_n_6 ,\ysqr_reg[17]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\ysqr[17]_i_33_n_0 ,\ysqr[17]_i_34_n_0 ,\ysqr[17]_i_35_n_0 }),
        .O({\NLW_ysqr_reg[17]_i_17_O_UNCONNECTED [7:3],\ysqr_reg[17]_i_17_n_13 ,\ysqr_reg[17]_i_17_n_14 ,\ysqr_reg[17]_i_17_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[17]_i_36_n_0 ,\ysqr[17]_i_37_n_0 ,\ysqr[17]_i_38_n_0 }));
  CARRY8 \ysqr_reg[17]_i_18 
       (.CI(\ysqr_reg[3]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[17]_i_18_CO_UNCONNECTED [7:3],\ysqr_reg[17]_i_18_n_5 ,\NLW_ysqr_reg[17]_i_18_CO_UNCONNECTED [1],\ysqr_reg[17]_i_18_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\ysqr[17]_i_39_n_0 ,\ysqr[17]_i_40_n_0 }),
        .O({\NLW_ysqr_reg[17]_i_18_O_UNCONNECTED [7:2],\ysqr_reg[17]_i_18_n_14 ,\ysqr_reg[17]_i_18_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[17]_i_41_n_0 ,\ysqr[17]_i_42_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \ysqr_reg[17]_i_2 
       (.CI(\ysqr_reg[11]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[17]_i_2_CO_UNCONNECTED [7:5],\ysqr_reg[17]_i_2_n_3 ,\ysqr_reg[17]_i_2_n_4 ,\ysqr_reg[17]_i_2_n_5 ,\ysqr_reg[17]_i_2_n_6 ,\ysqr_reg[17]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\ysqr_reg[17]_i_3_n_13 ,\ysqr[17]_i_4_n_0 ,\ysqr[17]_i_5_n_0 ,\ysqr[17]_i_6_n_0 ,\ysqr[17]_i_7_n_0 }),
        .O({\NLW_ysqr_reg[17]_i_2_O_UNCONNECTED [7:6],ysqr0[17:12]}),
        .S({1'b0,1'b0,\ysqr_reg[17]_i_3_n_12 ,\ysqr[17]_i_8_n_0 ,\ysqr[17]_i_9_n_0 ,\ysqr[17]_i_10_n_0 ,\ysqr[17]_i_11_n_0 ,\ysqr[17]_i_12_n_0 }));
  CARRY8 \ysqr_reg[17]_i_3 
       (.CI(\ysqr_reg[17]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[17]_i_3_CO_UNCONNECTED [7:3],\ysqr_reg[17]_i_3_n_5 ,\ysqr_reg[17]_i_3_n_6 ,\ysqr_reg[17]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\dy_reg_n_0_[8] ,1'b0,\dy_reg_n_0_[7] }),
        .O({\NLW_ysqr_reg[17]_i_3_O_UNCONNECTED [7:4],\ysqr_reg[17]_i_3_n_12 ,\ysqr_reg[17]_i_3_n_13 ,\ysqr_reg[17]_i_3_n_14 ,\ysqr_reg[17]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[17]_i_14_n_0 ,\ysqr[17]_i_15_n_0 ,\ysqr[17]_i_16_n_0 }));
  FDCE \ysqr_reg[18] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[18]_i_1_n_0 ),
        .Q(ysqr[18]));
  FDCE \ysqr_reg[20] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[20]_i_1_n_0 ),
        .Q(ysqr[20]));
  FDCE \ysqr_reg[21] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[21]_i_1_n_0 ),
        .Q(ysqr[21]));
  CARRY8 \ysqr_reg[21]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[21]_i_2_n_0 ,\ysqr_reg[21]_i_2_n_1 ,\ysqr_reg[21]_i_2_n_2 ,\ysqr_reg[21]_i_2_n_3 ,\ysqr_reg[21]_i_2_n_4 ,\ysqr_reg[21]_i_2_n_5 ,\ysqr_reg[21]_i_2_n_6 ,\ysqr_reg[21]_i_2_n_7 }),
        .DI({\ysqr[21]_i_4_n_0 ,\ysqr[21]_i_5_n_0 ,\ysqr[21]_i_6_n_0 ,\ysqr[21]_i_7_n_0 ,\ysqr[21]_i_8_n_0 ,\ysqr[21]_i_9_n_0 ,B[1],1'b0}),
        .O({\ysqr_reg[21]_i_2_n_8 ,\ysqr_reg[21]_i_2_n_9 ,\ysqr_reg[21]_i_2_n_10 ,\ysqr_reg[21]_i_2_n_11 ,\ysqr_reg[21]_i_2_n_12 ,\ysqr_reg[21]_i_2_n_13 ,ysqr00_in[2],\NLW_ysqr_reg[21]_i_2_O_UNCONNECTED [0]}),
        .S({\ysqr[21]_i_10_n_0 ,\ysqr[21]_i_11_n_0 ,\ysqr[21]_i_12_n_0 ,\ysqr[21]_i_13_n_0 ,\ysqr[21]_i_14_n_0 ,\ysqr[21]_i_15_n_0 ,\ysqr[21]_i_16_n_0 ,1'b0}));
  CARRY8 \ysqr_reg[21]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[21]_i_3_n_0 ,\ysqr_reg[21]_i_3_n_1 ,\ysqr_reg[21]_i_3_n_2 ,\ysqr_reg[21]_i_3_n_3 ,\ysqr_reg[21]_i_3_n_4 ,\ysqr_reg[21]_i_3_n_5 ,\ysqr_reg[21]_i_3_n_6 ,\ysqr_reg[21]_i_3_n_7 }),
        .DI({\ysqr[21]_i_17_n_0 ,\ysqr[21]_i_18_n_0 ,B[4],\ysqr[21]_i_19_n_0 ,\ysqr[21]_i_20_n_0 ,\ysqr[21]_i_21_n_0 ,\ysqr[21]_i_22_n_0 ,1'b0}),
        .O({\ysqr_reg[21]_i_3_n_8 ,\ysqr_reg[21]_i_3_n_9 ,\ysqr_reg[21]_i_3_n_10 ,\ysqr_reg[21]_i_3_n_11 ,\ysqr_reg[21]_i_3_n_12 ,\ysqr_reg[21]_i_3_n_13 ,\ysqr_reg[21]_i_3_n_14 ,\ysqr_reg[21]_i_3_n_15 }),
        .S({\ysqr[21]_i_23_n_0 ,\ysqr[21]_i_24_n_0 ,\ysqr[21]_i_25_n_0 ,\ysqr[21]_i_26_n_0 ,\ysqr[21]_i_27_n_0 ,\ysqr[21]_i_28_n_0 ,\ysqr[21]_i_29_n_0 ,\ysqr[21]_i_30_n_0 }));
  FDCE \ysqr_reg[22] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[22]_i_1_n_0 ),
        .Q(ysqr[22]));
  FDCE \ysqr_reg[23] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[23]_i_1_n_0 ),
        .Q(ysqr[23]));
  FDCE \ysqr_reg[24] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[24]_i_1_n_0 ),
        .Q(ysqr[24]));
  FDCE \ysqr_reg[25] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[25]_i_1_n_0 ),
        .Q(ysqr[25]));
  FDCE \ysqr_reg[26] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[26]_i_1_n_0 ),
        .Q(ysqr[26]));
  FDCE \ysqr_reg[27] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[27]_i_1_n_0 ),
        .Q(ysqr[27]));
  FDCE \ysqr_reg[28] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[28]_i_1_n_0 ),
        .Q(ysqr[28]));
  FDCE \ysqr_reg[29] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[29]_i_1_n_0 ),
        .Q(ysqr[29]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \ysqr_reg[29]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[29]_i_2_n_0 ,\ysqr_reg[29]_i_2_n_1 ,\ysqr_reg[29]_i_2_n_2 ,\ysqr_reg[29]_i_2_n_3 ,\ysqr_reg[29]_i_2_n_4 ,\ysqr_reg[29]_i_2_n_5 ,\ysqr_reg[29]_i_2_n_6 ,\ysqr_reg[29]_i_2_n_7 }),
        .DI({\ysqr[29]_i_3_n_0 ,\ysqr[29]_i_4_n_0 ,\ysqr[29]_i_5_n_0 ,\ysqr[29]_i_6_n_0 ,\ysqr[29]_i_7_n_0 ,\ysqr[29]_i_8_n_0 ,\ysqr[29]_i_9_n_0 ,\ysqr[29]_i_10_n_0 }),
        .O(ysqr00_in[11:4]),
        .S({\ysqr[29]_i_11_n_0 ,\ysqr[29]_i_12_n_0 ,\ysqr[29]_i_13_n_0 ,\ysqr[29]_i_14_n_0 ,\ysqr[29]_i_15_n_0 ,\ysqr[29]_i_16_n_0 ,\ysqr[29]_i_17_n_0 ,\ysqr[29]_i_18_n_0 }));
  FDCE \ysqr_reg[2] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[2]_i_1_n_0 ),
        .Q(ysqr[2]));
  FDCE \ysqr_reg[30] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[30]_i_1_n_0 ),
        .Q(ysqr[30]));
  FDCE \ysqr_reg[31] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[31]_i_1_n_0 ),
        .Q(ysqr[31]));
  FDCE \ysqr_reg[32] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[32]_i_1_n_0 ),
        .Q(ysqr[32]));
  FDCE \ysqr_reg[33] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[33]_i_1_n_0 ),
        .Q(ysqr[33]));
  FDCE \ysqr_reg[34] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[34]_i_1_n_0 ),
        .Q(ysqr[34]));
  FDCE \ysqr_reg[35] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[35]_i_1_n_0 ),
        .Q(ysqr[35]));
  CARRY8 \ysqr_reg[35]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[35]_i_13_n_0 ,\ysqr_reg[35]_i_13_n_1 ,\ysqr_reg[35]_i_13_n_2 ,\ysqr_reg[35]_i_13_n_3 ,\ysqr_reg[35]_i_13_n_4 ,\ysqr_reg[35]_i_13_n_5 ,\ysqr_reg[35]_i_13_n_6 ,\ysqr_reg[35]_i_13_n_7 }),
        .DI({\ysqr[35]_i_19_n_0 ,\ysqr[35]_i_20_n_0 ,\ysqr[35]_i_21_n_0 ,\ysqr[35]_i_22_n_0 ,\ysqr[35]_i_23_n_0 ,\ysqr[21]_i_31_n_0 ,\ysqr[35]_i_24_n_0 ,1'b0}),
        .O({\ysqr_reg[35]_i_13_n_8 ,\ysqr_reg[35]_i_13_n_9 ,\ysqr_reg[35]_i_13_n_10 ,\ysqr_reg[35]_i_13_n_11 ,\ysqr_reg[35]_i_13_n_12 ,\ysqr_reg[35]_i_13_n_13 ,\ysqr_reg[35]_i_13_n_14 ,\ysqr_reg[35]_i_13_n_15 }),
        .S({\ysqr[35]_i_25_n_0 ,\ysqr[35]_i_26_n_0 ,\ysqr[35]_i_27_n_0 ,\ysqr[35]_i_28_n_0 ,\ysqr[35]_i_29_n_0 ,\ysqr[35]_i_30_n_0 ,\ysqr[35]_i_31_n_0 ,\ysqr[35]_i_32_n_0 }));
  CARRY8 \ysqr_reg[35]_i_17 
       (.CI(\ysqr_reg[21]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[35]_i_17_CO_UNCONNECTED [7:4],\ysqr_reg[35]_i_17_n_4 ,\NLW_ysqr_reg[35]_i_17_CO_UNCONNECTED [2],\ysqr_reg[35]_i_17_n_6 ,\ysqr_reg[35]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\ysqr[35]_i_33_n_0 ,\ysqr[35]_i_34_n_0 ,\ysqr[35]_i_35_n_0 }),
        .O({\NLW_ysqr_reg[35]_i_17_O_UNCONNECTED [7:3],\ysqr_reg[35]_i_17_n_13 ,\ysqr_reg[35]_i_17_n_14 ,\ysqr_reg[35]_i_17_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[35]_i_36_n_0 ,\ysqr[35]_i_37_n_0 ,\ysqr[35]_i_38_n_0 }));
  CARRY8 \ysqr_reg[35]_i_18 
       (.CI(\ysqr_reg[21]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[35]_i_18_CO_UNCONNECTED [7:3],\ysqr_reg[35]_i_18_n_5 ,\NLW_ysqr_reg[35]_i_18_CO_UNCONNECTED [1],\ysqr_reg[35]_i_18_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\ysqr[35]_i_39_n_0 ,\ysqr[35]_i_40_n_0 }),
        .O({\NLW_ysqr_reg[35]_i_18_O_UNCONNECTED [7:2],\ysqr_reg[35]_i_18_n_14 ,\ysqr_reg[35]_i_18_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[35]_i_41_n_0 ,\ysqr[35]_i_42_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \ysqr_reg[35]_i_2 
       (.CI(\ysqr_reg[29]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[35]_i_2_CO_UNCONNECTED [7:5],\ysqr_reg[35]_i_2_n_3 ,\ysqr_reg[35]_i_2_n_4 ,\ysqr_reg[35]_i_2_n_5 ,\ysqr_reg[35]_i_2_n_6 ,\ysqr_reg[35]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\ysqr_reg[35]_i_3_n_13 ,\ysqr[35]_i_4_n_0 ,\ysqr[35]_i_5_n_0 ,\ysqr[35]_i_6_n_0 ,\ysqr[35]_i_7_n_0 }),
        .O({\NLW_ysqr_reg[35]_i_2_O_UNCONNECTED [7:6],ysqr00_in[17:12]}),
        .S({1'b0,1'b0,\ysqr_reg[35]_i_3_n_12 ,\ysqr[35]_i_8_n_0 ,\ysqr[35]_i_9_n_0 ,\ysqr[35]_i_10_n_0 ,\ysqr[35]_i_11_n_0 ,\ysqr[35]_i_12_n_0 }));
  CARRY8 \ysqr_reg[35]_i_3 
       (.CI(\ysqr_reg[35]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[35]_i_3_CO_UNCONNECTED [7:3],\ysqr_reg[35]_i_3_n_5 ,\ysqr_reg[35]_i_3_n_6 ,\ysqr_reg[35]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,B[8],1'b0,B[7]}),
        .O({\NLW_ysqr_reg[35]_i_3_O_UNCONNECTED [7:4],\ysqr_reg[35]_i_3_n_12 ,\ysqr_reg[35]_i_3_n_13 ,\ysqr_reg[35]_i_3_n_14 ,\ysqr_reg[35]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[35]_i_14_n_0 ,\ysqr[35]_i_15_n_0 ,\ysqr[35]_i_16_n_0 }));
  FDCE \ysqr_reg[36] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[36]_i_1_n_0 ),
        .Q(ysqr[36]));
  FDCE \ysqr_reg[38] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[38]_i_1_n_0 ),
        .Q(ysqr[38]));
  FDCE \ysqr_reg[39] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[39]_i_1_n_0 ),
        .Q(ysqr[39]));
  CARRY8 \ysqr_reg[39]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[39]_i_2_n_0 ,\ysqr_reg[39]_i_2_n_1 ,\ysqr_reg[39]_i_2_n_2 ,\ysqr_reg[39]_i_2_n_3 ,\ysqr_reg[39]_i_2_n_4 ,\ysqr_reg[39]_i_2_n_5 ,\ysqr_reg[39]_i_2_n_6 ,\ysqr_reg[39]_i_2_n_7 }),
        .DI({\ysqr[39]_i_4_n_0 ,\ysqr[39]_i_5_n_0 ,\ysqr[39]_i_6_n_0 ,\ysqr[39]_i_7_n_0 ,\ysqr[39]_i_8_n_0 ,\ysqr[39]_i_9_n_0 ,\dy_reg_n_0_[19] ,1'b0}),
        .O({\ysqr_reg[39]_i_2_n_8 ,\ysqr_reg[39]_i_2_n_9 ,\ysqr_reg[39]_i_2_n_10 ,\ysqr_reg[39]_i_2_n_11 ,\ysqr_reg[39]_i_2_n_12 ,\ysqr_reg[39]_i_2_n_13 ,ysqr01_in[2],\NLW_ysqr_reg[39]_i_2_O_UNCONNECTED [0]}),
        .S({\ysqr[39]_i_10_n_0 ,\ysqr[39]_i_11_n_0 ,\ysqr[39]_i_12_n_0 ,\ysqr[39]_i_13_n_0 ,\ysqr[39]_i_14_n_0 ,\ysqr[39]_i_15_n_0 ,\ysqr[39]_i_16_n_0 ,1'b0}));
  CARRY8 \ysqr_reg[39]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[39]_i_3_n_0 ,\ysqr_reg[39]_i_3_n_1 ,\ysqr_reg[39]_i_3_n_2 ,\ysqr_reg[39]_i_3_n_3 ,\ysqr_reg[39]_i_3_n_4 ,\ysqr_reg[39]_i_3_n_5 ,\ysqr_reg[39]_i_3_n_6 ,\ysqr_reg[39]_i_3_n_7 }),
        .DI({\ysqr[39]_i_17_n_0 ,\ysqr[39]_i_18_n_0 ,\dy_reg_n_0_[22] ,\ysqr[39]_i_19_n_0 ,\ysqr[39]_i_20_n_0 ,\ysqr[39]_i_21_n_0 ,\ysqr[39]_i_22_n_0 ,1'b0}),
        .O({\ysqr_reg[39]_i_3_n_8 ,\ysqr_reg[39]_i_3_n_9 ,\ysqr_reg[39]_i_3_n_10 ,\ysqr_reg[39]_i_3_n_11 ,\ysqr_reg[39]_i_3_n_12 ,\ysqr_reg[39]_i_3_n_13 ,\ysqr_reg[39]_i_3_n_14 ,\ysqr_reg[39]_i_3_n_15 }),
        .S({\ysqr[39]_i_23_n_0 ,\ysqr[39]_i_24_n_0 ,\ysqr[39]_i_25_n_0 ,\ysqr[39]_i_26_n_0 ,\ysqr[39]_i_27_n_0 ,\ysqr[39]_i_28_n_0 ,\ysqr[39]_i_29_n_0 ,\ysqr[39]_i_30_n_0 }));
  FDCE \ysqr_reg[3] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[3]_i_1_n_0 ),
        .Q(ysqr[3]));
  CARRY8 \ysqr_reg[3]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[3]_i_2_n_0 ,\ysqr_reg[3]_i_2_n_1 ,\ysqr_reg[3]_i_2_n_2 ,\ysqr_reg[3]_i_2_n_3 ,\ysqr_reg[3]_i_2_n_4 ,\ysqr_reg[3]_i_2_n_5 ,\ysqr_reg[3]_i_2_n_6 ,\ysqr_reg[3]_i_2_n_7 }),
        .DI({\ysqr[3]_i_4_n_0 ,\ysqr[3]_i_5_n_0 ,\ysqr[3]_i_6_n_0 ,\ysqr[3]_i_7_n_0 ,\ysqr[3]_i_8_n_0 ,\ysqr[3]_i_9_n_0 ,\dy_reg_n_0_[1] ,1'b0}),
        .O({\ysqr_reg[3]_i_2_n_8 ,\ysqr_reg[3]_i_2_n_9 ,\ysqr_reg[3]_i_2_n_10 ,\ysqr_reg[3]_i_2_n_11 ,\ysqr_reg[3]_i_2_n_12 ,\ysqr_reg[3]_i_2_n_13 ,ysqr0[2],\NLW_ysqr_reg[3]_i_2_O_UNCONNECTED [0]}),
        .S({\ysqr[3]_i_10_n_0 ,\ysqr[3]_i_11_n_0 ,\ysqr[3]_i_12_n_0 ,\ysqr[3]_i_13_n_0 ,\ysqr[3]_i_14_n_0 ,\ysqr[3]_i_15_n_0 ,\ysqr[3]_i_16_n_0 ,1'b0}));
  CARRY8 \ysqr_reg[3]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[3]_i_3_n_0 ,\ysqr_reg[3]_i_3_n_1 ,\ysqr_reg[3]_i_3_n_2 ,\ysqr_reg[3]_i_3_n_3 ,\ysqr_reg[3]_i_3_n_4 ,\ysqr_reg[3]_i_3_n_5 ,\ysqr_reg[3]_i_3_n_6 ,\ysqr_reg[3]_i_3_n_7 }),
        .DI({\ysqr[3]_i_17_n_0 ,\ysqr[3]_i_18_n_0 ,\dy_reg_n_0_[4] ,\ysqr[3]_i_19_n_0 ,\ysqr[3]_i_20_n_0 ,\ysqr[3]_i_21_n_0 ,\ysqr[3]_i_22_n_0 ,1'b0}),
        .O({\ysqr_reg[3]_i_3_n_8 ,\ysqr_reg[3]_i_3_n_9 ,\ysqr_reg[3]_i_3_n_10 ,\ysqr_reg[3]_i_3_n_11 ,\ysqr_reg[3]_i_3_n_12 ,\ysqr_reg[3]_i_3_n_13 ,\ysqr_reg[3]_i_3_n_14 ,\ysqr_reg[3]_i_3_n_15 }),
        .S({\ysqr[3]_i_23_n_0 ,\ysqr[3]_i_24_n_0 ,\ysqr[3]_i_25_n_0 ,\ysqr[3]_i_26_n_0 ,\ysqr[3]_i_27_n_0 ,\ysqr[3]_i_28_n_0 ,\ysqr[3]_i_29_n_0 ,\ysqr[3]_i_30_n_0 }));
  FDCE \ysqr_reg[40] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[40]_i_1_n_0 ),
        .Q(ysqr[40]));
  FDCE \ysqr_reg[41] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[41]_i_1_n_0 ),
        .Q(ysqr[41]));
  FDCE \ysqr_reg[42] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[42]_i_1_n_0 ),
        .Q(ysqr[42]));
  FDCE \ysqr_reg[43] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[43]_i_1_n_0 ),
        .Q(ysqr[43]));
  FDCE \ysqr_reg[44] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[44]_i_1_n_0 ),
        .Q(ysqr[44]));
  FDCE \ysqr_reg[45] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[45]_i_1_n_0 ),
        .Q(ysqr[45]));
  FDCE \ysqr_reg[46] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[46]_i_1_n_0 ),
        .Q(ysqr[46]));
  FDCE \ysqr_reg[47] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[47]_i_1_n_0 ),
        .Q(ysqr[47]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \ysqr_reg[47]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[47]_i_2_n_0 ,\ysqr_reg[47]_i_2_n_1 ,\ysqr_reg[47]_i_2_n_2 ,\ysqr_reg[47]_i_2_n_3 ,\ysqr_reg[47]_i_2_n_4 ,\ysqr_reg[47]_i_2_n_5 ,\ysqr_reg[47]_i_2_n_6 ,\ysqr_reg[47]_i_2_n_7 }),
        .DI({\ysqr[47]_i_3_n_0 ,\ysqr[47]_i_4_n_0 ,\ysqr[47]_i_5_n_0 ,\ysqr[47]_i_6_n_0 ,\ysqr[47]_i_7_n_0 ,\ysqr[47]_i_8_n_0 ,\ysqr[47]_i_9_n_0 ,\ysqr[47]_i_10_n_0 }),
        .O(ysqr01_in[11:4]),
        .S({\ysqr[47]_i_11_n_0 ,\ysqr[47]_i_12_n_0 ,\ysqr[47]_i_13_n_0 ,\ysqr[47]_i_14_n_0 ,\ysqr[47]_i_15_n_0 ,\ysqr[47]_i_16_n_0 ,\ysqr[47]_i_17_n_0 ,\ysqr[47]_i_18_n_0 }));
  FDCE \ysqr_reg[48] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[48]_i_1_n_0 ),
        .Q(ysqr[48]));
  FDCE \ysqr_reg[49] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[49]_i_1_n_0 ),
        .Q(ysqr[49]));
  FDCE \ysqr_reg[4] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[4]_i_1_n_0 ),
        .Q(ysqr[4]));
  FDCE \ysqr_reg[50] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[50]_i_1_n_0 ),
        .Q(ysqr[50]));
  FDCE \ysqr_reg[51] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[51]_i_1_n_0 ),
        .Q(ysqr[51]));
  FDCE \ysqr_reg[52] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[52]_i_1_n_0 ),
        .Q(ysqr[52]));
  FDCE \ysqr_reg[53] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[53]_i_1_n_0 ),
        .Q(ysqr[53]));
  CARRY8 \ysqr_reg[53]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[53]_i_13_n_0 ,\ysqr_reg[53]_i_13_n_1 ,\ysqr_reg[53]_i_13_n_2 ,\ysqr_reg[53]_i_13_n_3 ,\ysqr_reg[53]_i_13_n_4 ,\ysqr_reg[53]_i_13_n_5 ,\ysqr_reg[53]_i_13_n_6 ,\ysqr_reg[53]_i_13_n_7 }),
        .DI({\ysqr[53]_i_19_n_0 ,\ysqr[53]_i_20_n_0 ,\ysqr[53]_i_21_n_0 ,\ysqr[53]_i_22_n_0 ,\ysqr[53]_i_23_n_0 ,\ysqr[39]_i_31_n_0 ,\ysqr[53]_i_24_n_0 ,1'b0}),
        .O({\ysqr_reg[53]_i_13_n_8 ,\ysqr_reg[53]_i_13_n_9 ,\ysqr_reg[53]_i_13_n_10 ,\ysqr_reg[53]_i_13_n_11 ,\ysqr_reg[53]_i_13_n_12 ,\ysqr_reg[53]_i_13_n_13 ,\ysqr_reg[53]_i_13_n_14 ,\ysqr_reg[53]_i_13_n_15 }),
        .S({\ysqr[53]_i_25_n_0 ,\ysqr[53]_i_26_n_0 ,\ysqr[53]_i_27_n_0 ,\ysqr[53]_i_28_n_0 ,\ysqr[53]_i_29_n_0 ,\ysqr[53]_i_30_n_0 ,\ysqr[53]_i_31_n_0 ,\ysqr[53]_i_32_n_0 }));
  CARRY8 \ysqr_reg[53]_i_17 
       (.CI(\ysqr_reg[39]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[53]_i_17_CO_UNCONNECTED [7:4],\ysqr_reg[53]_i_17_n_4 ,\NLW_ysqr_reg[53]_i_17_CO_UNCONNECTED [2],\ysqr_reg[53]_i_17_n_6 ,\ysqr_reg[53]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\ysqr[53]_i_33_n_0 ,\ysqr[53]_i_34_n_0 ,\ysqr[53]_i_35_n_0 }),
        .O({\NLW_ysqr_reg[53]_i_17_O_UNCONNECTED [7:3],\ysqr_reg[53]_i_17_n_13 ,\ysqr_reg[53]_i_17_n_14 ,\ysqr_reg[53]_i_17_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[53]_i_36_n_0 ,\ysqr[53]_i_37_n_0 ,\ysqr[53]_i_38_n_0 }));
  CARRY8 \ysqr_reg[53]_i_18 
       (.CI(\ysqr_reg[39]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[53]_i_18_CO_UNCONNECTED [7:3],\ysqr_reg[53]_i_18_n_5 ,\NLW_ysqr_reg[53]_i_18_CO_UNCONNECTED [1],\ysqr_reg[53]_i_18_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\ysqr[53]_i_39_n_0 ,\ysqr[53]_i_40_n_0 }),
        .O({\NLW_ysqr_reg[53]_i_18_O_UNCONNECTED [7:2],\ysqr_reg[53]_i_18_n_14 ,\ysqr_reg[53]_i_18_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[53]_i_41_n_0 ,\ysqr[53]_i_42_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \ysqr_reg[53]_i_2 
       (.CI(\ysqr_reg[47]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[53]_i_2_CO_UNCONNECTED [7:5],\ysqr_reg[53]_i_2_n_3 ,\ysqr_reg[53]_i_2_n_4 ,\ysqr_reg[53]_i_2_n_5 ,\ysqr_reg[53]_i_2_n_6 ,\ysqr_reg[53]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\ysqr_reg[53]_i_3_n_13 ,\ysqr[53]_i_4_n_0 ,\ysqr[53]_i_5_n_0 ,\ysqr[53]_i_6_n_0 ,\ysqr[53]_i_7_n_0 }),
        .O({\NLW_ysqr_reg[53]_i_2_O_UNCONNECTED [7:6],ysqr01_in[17:12]}),
        .S({1'b0,1'b0,\ysqr_reg[53]_i_3_n_12 ,\ysqr[53]_i_8_n_0 ,\ysqr[53]_i_9_n_0 ,\ysqr[53]_i_10_n_0 ,\ysqr[53]_i_11_n_0 ,\ysqr[53]_i_12_n_0 }));
  CARRY8 \ysqr_reg[53]_i_3 
       (.CI(\ysqr_reg[53]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[53]_i_3_CO_UNCONNECTED [7:3],\ysqr_reg[53]_i_3_n_5 ,\ysqr_reg[53]_i_3_n_6 ,\ysqr_reg[53]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\dy_reg_n_0_[26] ,1'b0,\dy_reg_n_0_[25] }),
        .O({\NLW_ysqr_reg[53]_i_3_O_UNCONNECTED [7:4],\ysqr_reg[53]_i_3_n_12 ,\ysqr_reg[53]_i_3_n_13 ,\ysqr_reg[53]_i_3_n_14 ,\ysqr_reg[53]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[53]_i_14_n_0 ,\ysqr[53]_i_15_n_0 ,\ysqr[53]_i_16_n_0 }));
  FDCE \ysqr_reg[54] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[54]_i_1_n_0 ),
        .Q(ysqr[54]));
  FDCE \ysqr_reg[56] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[56]_i_1_n_0 ),
        .Q(ysqr[56]));
  FDCE \ysqr_reg[57] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[57]_i_1_n_0 ),
        .Q(ysqr[57]));
  CARRY8 \ysqr_reg[57]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[57]_i_2_n_0 ,\ysqr_reg[57]_i_2_n_1 ,\ysqr_reg[57]_i_2_n_2 ,\ysqr_reg[57]_i_2_n_3 ,\ysqr_reg[57]_i_2_n_4 ,\ysqr_reg[57]_i_2_n_5 ,\ysqr_reg[57]_i_2_n_6 ,\ysqr_reg[57]_i_2_n_7 }),
        .DI({\ysqr[57]_i_4_n_0 ,\ysqr[57]_i_5_n_0 ,\ysqr[57]_i_6_n_0 ,\ysqr[57]_i_7_n_0 ,\ysqr[57]_i_8_n_0 ,\ysqr[57]_i_9_n_0 ,\dy_reg_n_0_[28] ,1'b0}),
        .O({\ysqr_reg[57]_i_2_n_8 ,\ysqr_reg[57]_i_2_n_9 ,\ysqr_reg[57]_i_2_n_10 ,\ysqr_reg[57]_i_2_n_11 ,\ysqr_reg[57]_i_2_n_12 ,\ysqr_reg[57]_i_2_n_13 ,ysqr02_in[2],\NLW_ysqr_reg[57]_i_2_O_UNCONNECTED [0]}),
        .S({\ysqr[57]_i_10_n_0 ,\ysqr[57]_i_11_n_0 ,\ysqr[57]_i_12_n_0 ,\ysqr[57]_i_13_n_0 ,\ysqr[57]_i_14_n_0 ,\ysqr[57]_i_15_n_0 ,\ysqr[57]_i_16_n_0 ,1'b0}));
  CARRY8 \ysqr_reg[57]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[57]_i_3_n_0 ,\ysqr_reg[57]_i_3_n_1 ,\ysqr_reg[57]_i_3_n_2 ,\ysqr_reg[57]_i_3_n_3 ,\ysqr_reg[57]_i_3_n_4 ,\ysqr_reg[57]_i_3_n_5 ,\ysqr_reg[57]_i_3_n_6 ,\ysqr_reg[57]_i_3_n_7 }),
        .DI({\ysqr[57]_i_17_n_0 ,\ysqr[57]_i_18_n_0 ,\dy_reg_n_0_[31] ,\ysqr[57]_i_19_n_0 ,\ysqr[57]_i_20_n_0 ,\ysqr[57]_i_21_n_0 ,\ysqr[57]_i_22_n_0 ,1'b0}),
        .O({\ysqr_reg[57]_i_3_n_8 ,\ysqr_reg[57]_i_3_n_9 ,\ysqr_reg[57]_i_3_n_10 ,\ysqr_reg[57]_i_3_n_11 ,\ysqr_reg[57]_i_3_n_12 ,\ysqr_reg[57]_i_3_n_13 ,\ysqr_reg[57]_i_3_n_14 ,\ysqr_reg[57]_i_3_n_15 }),
        .S({\ysqr[57]_i_23_n_0 ,\ysqr[57]_i_24_n_0 ,\ysqr[57]_i_25_n_0 ,\ysqr[57]_i_26_n_0 ,\ysqr[57]_i_27_n_0 ,\ysqr[57]_i_28_n_0 ,\ysqr[57]_i_29_n_0 ,\ysqr[57]_i_30_n_0 }));
  FDCE \ysqr_reg[58] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[58]_i_1_n_0 ),
        .Q(ysqr[58]));
  FDCE \ysqr_reg[59] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[59]_i_1_n_0 ),
        .Q(ysqr[59]));
  FDCE \ysqr_reg[5] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[5]_i_1_n_0 ),
        .Q(ysqr[5]));
  FDCE \ysqr_reg[60] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[60]_i_1_n_0 ),
        .Q(ysqr[60]));
  FDCE \ysqr_reg[61] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[61]_i_1_n_0 ),
        .Q(ysqr[61]));
  FDCE \ysqr_reg[62] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[62]_i_1_n_0 ),
        .Q(ysqr[62]));
  FDCE \ysqr_reg[63] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[63]_i_1_n_0 ),
        .Q(ysqr[63]));
  FDCE \ysqr_reg[64] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[64]_i_1_n_0 ),
        .Q(ysqr[64]));
  FDCE \ysqr_reg[65] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[65]_i_1_n_0 ),
        .Q(ysqr[65]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \ysqr_reg[65]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[65]_i_2_n_0 ,\ysqr_reg[65]_i_2_n_1 ,\ysqr_reg[65]_i_2_n_2 ,\ysqr_reg[65]_i_2_n_3 ,\ysqr_reg[65]_i_2_n_4 ,\ysqr_reg[65]_i_2_n_5 ,\ysqr_reg[65]_i_2_n_6 ,\ysqr_reg[65]_i_2_n_7 }),
        .DI({\ysqr[65]_i_3_n_0 ,\ysqr[65]_i_4_n_0 ,\ysqr[65]_i_5_n_0 ,\ysqr[65]_i_6_n_0 ,\ysqr[65]_i_7_n_0 ,\ysqr[65]_i_8_n_0 ,\ysqr[65]_i_9_n_0 ,\ysqr[65]_i_10_n_0 }),
        .O(ysqr02_in[11:4]),
        .S({\ysqr[65]_i_11_n_0 ,\ysqr[65]_i_12_n_0 ,\ysqr[65]_i_13_n_0 ,\ysqr[65]_i_14_n_0 ,\ysqr[65]_i_15_n_0 ,\ysqr[65]_i_16_n_0 ,\ysqr[65]_i_17_n_0 ,\ysqr[65]_i_18_n_0 }));
  FDCE \ysqr_reg[66] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[66]_i_1_n_0 ),
        .Q(ysqr[66]));
  FDCE \ysqr_reg[67] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[67]_i_1_n_0 ),
        .Q(ysqr[67]));
  FDCE \ysqr_reg[68] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[68]_i_1_n_0 ),
        .Q(ysqr[68]));
  FDCE \ysqr_reg[69] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[69]_i_1_n_0 ),
        .Q(ysqr[69]));
  FDCE \ysqr_reg[6] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[6]_i_1_n_0 ),
        .Q(ysqr[6]));
  FDCE \ysqr_reg[70] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[70]_i_1_n_0 ),
        .Q(ysqr[70]));
  FDCE \ysqr_reg[71] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[71]_i_1_n_0 ),
        .Q(ysqr[71]));
  CARRY8 \ysqr_reg[71]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[71]_i_13_n_0 ,\ysqr_reg[71]_i_13_n_1 ,\ysqr_reg[71]_i_13_n_2 ,\ysqr_reg[71]_i_13_n_3 ,\ysqr_reg[71]_i_13_n_4 ,\ysqr_reg[71]_i_13_n_5 ,\ysqr_reg[71]_i_13_n_6 ,\ysqr_reg[71]_i_13_n_7 }),
        .DI({\ysqr[71]_i_19_n_0 ,\ysqr[71]_i_20_n_0 ,\ysqr[71]_i_21_n_0 ,\ysqr[71]_i_22_n_0 ,\ysqr[71]_i_23_n_0 ,\ysqr[57]_i_31_n_0 ,\ysqr[71]_i_24_n_0 ,1'b0}),
        .O({\ysqr_reg[71]_i_13_n_8 ,\ysqr_reg[71]_i_13_n_9 ,\ysqr_reg[71]_i_13_n_10 ,\ysqr_reg[71]_i_13_n_11 ,\ysqr_reg[71]_i_13_n_12 ,\ysqr_reg[71]_i_13_n_13 ,\ysqr_reg[71]_i_13_n_14 ,\ysqr_reg[71]_i_13_n_15 }),
        .S({\ysqr[71]_i_25_n_0 ,\ysqr[71]_i_26_n_0 ,\ysqr[71]_i_27_n_0 ,\ysqr[71]_i_28_n_0 ,\ysqr[71]_i_29_n_0 ,\ysqr[71]_i_30_n_0 ,\ysqr[71]_i_31_n_0 ,\ysqr[71]_i_32_n_0 }));
  CARRY8 \ysqr_reg[71]_i_17 
       (.CI(\ysqr_reg[57]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[71]_i_17_CO_UNCONNECTED [7:4],\ysqr_reg[71]_i_17_n_4 ,\NLW_ysqr_reg[71]_i_17_CO_UNCONNECTED [2],\ysqr_reg[71]_i_17_n_6 ,\ysqr_reg[71]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\ysqr[71]_i_33_n_0 ,\ysqr[71]_i_34_n_0 ,\ysqr[71]_i_35_n_0 }),
        .O({\NLW_ysqr_reg[71]_i_17_O_UNCONNECTED [7:3],\ysqr_reg[71]_i_17_n_13 ,\ysqr_reg[71]_i_17_n_14 ,\ysqr_reg[71]_i_17_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[71]_i_36_n_0 ,\ysqr[71]_i_37_n_0 ,\ysqr[71]_i_38_n_0 }));
  CARRY8 \ysqr_reg[71]_i_18 
       (.CI(\ysqr_reg[57]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[71]_i_18_CO_UNCONNECTED [7:3],\ysqr_reg[71]_i_18_n_5 ,\NLW_ysqr_reg[71]_i_18_CO_UNCONNECTED [1],\ysqr_reg[71]_i_18_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\ysqr[71]_i_39_n_0 ,\ysqr[71]_i_40_n_0 }),
        .O({\NLW_ysqr_reg[71]_i_18_O_UNCONNECTED [7:2],\ysqr_reg[71]_i_18_n_14 ,\ysqr_reg[71]_i_18_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[71]_i_41_n_0 ,\ysqr[71]_i_42_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \ysqr_reg[71]_i_2 
       (.CI(\ysqr_reg[65]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[71]_i_2_CO_UNCONNECTED [7:5],\ysqr_reg[71]_i_2_n_3 ,\ysqr_reg[71]_i_2_n_4 ,\ysqr_reg[71]_i_2_n_5 ,\ysqr_reg[71]_i_2_n_6 ,\ysqr_reg[71]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\ysqr_reg[71]_i_3_n_13 ,\ysqr[71]_i_4_n_0 ,\ysqr[71]_i_5_n_0 ,\ysqr[71]_i_6_n_0 ,\ysqr[71]_i_7_n_0 }),
        .O({\NLW_ysqr_reg[71]_i_2_O_UNCONNECTED [7:6],ysqr02_in[17:12]}),
        .S({1'b0,1'b0,\ysqr_reg[71]_i_3_n_12 ,\ysqr[71]_i_8_n_0 ,\ysqr[71]_i_9_n_0 ,\ysqr[71]_i_10_n_0 ,\ysqr[71]_i_11_n_0 ,\ysqr[71]_i_12_n_0 }));
  CARRY8 \ysqr_reg[71]_i_3 
       (.CI(\ysqr_reg[71]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[71]_i_3_CO_UNCONNECTED [7:3],\ysqr_reg[71]_i_3_n_5 ,\ysqr_reg[71]_i_3_n_6 ,\ysqr_reg[71]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\dy_reg_n_0_[35] ,1'b0,\dy_reg_n_0_[34] }),
        .O({\NLW_ysqr_reg[71]_i_3_O_UNCONNECTED [7:4],\ysqr_reg[71]_i_3_n_12 ,\ysqr_reg[71]_i_3_n_13 ,\ysqr_reg[71]_i_3_n_14 ,\ysqr_reg[71]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[71]_i_14_n_0 ,\ysqr[71]_i_15_n_0 ,\ysqr[71]_i_16_n_0 }));
  FDCE \ysqr_reg[72] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[72]_i_1_n_0 ),
        .Q(ysqr[72]));
  FDCE \ysqr_reg[74] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[74]_i_1_n_0 ),
        .Q(ysqr[74]));
  FDCE \ysqr_reg[75] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[75]_i_1_n_0 ),
        .Q(ysqr[75]));
  CARRY8 \ysqr_reg[75]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[75]_i_2_n_0 ,\ysqr_reg[75]_i_2_n_1 ,\ysqr_reg[75]_i_2_n_2 ,\ysqr_reg[75]_i_2_n_3 ,\ysqr_reg[75]_i_2_n_4 ,\ysqr_reg[75]_i_2_n_5 ,\ysqr_reg[75]_i_2_n_6 ,\ysqr_reg[75]_i_2_n_7 }),
        .DI({\ysqr[75]_i_4_n_0 ,\ysqr[75]_i_5_n_0 ,\ysqr[75]_i_6_n_0 ,\ysqr[75]_i_7_n_0 ,\ysqr[75]_i_8_n_0 ,\ysqr[75]_i_9_n_0 ,\dy_reg_n_0_[37] ,1'b0}),
        .O({\ysqr_reg[75]_i_2_n_8 ,\ysqr_reg[75]_i_2_n_9 ,\ysqr_reg[75]_i_2_n_10 ,\ysqr_reg[75]_i_2_n_11 ,\ysqr_reg[75]_i_2_n_12 ,\ysqr_reg[75]_i_2_n_13 ,ysqr03_in[2],\NLW_ysqr_reg[75]_i_2_O_UNCONNECTED [0]}),
        .S({\ysqr[75]_i_10_n_0 ,\ysqr[75]_i_11_n_0 ,\ysqr[75]_i_12_n_0 ,\ysqr[75]_i_13_n_0 ,\ysqr[75]_i_14_n_0 ,\ysqr[75]_i_15_n_0 ,\ysqr[75]_i_16_n_0 ,1'b0}));
  CARRY8 \ysqr_reg[75]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[75]_i_3_n_0 ,\ysqr_reg[75]_i_3_n_1 ,\ysqr_reg[75]_i_3_n_2 ,\ysqr_reg[75]_i_3_n_3 ,\ysqr_reg[75]_i_3_n_4 ,\ysqr_reg[75]_i_3_n_5 ,\ysqr_reg[75]_i_3_n_6 ,\ysqr_reg[75]_i_3_n_7 }),
        .DI({\ysqr[75]_i_17_n_0 ,\ysqr[75]_i_18_n_0 ,\dy_reg_n_0_[40] ,\ysqr[75]_i_19_n_0 ,\ysqr[75]_i_20_n_0 ,\ysqr[75]_i_21_n_0 ,\ysqr[75]_i_22_n_0 ,1'b0}),
        .O({\ysqr_reg[75]_i_3_n_8 ,\ysqr_reg[75]_i_3_n_9 ,\ysqr_reg[75]_i_3_n_10 ,\ysqr_reg[75]_i_3_n_11 ,\ysqr_reg[75]_i_3_n_12 ,\ysqr_reg[75]_i_3_n_13 ,\ysqr_reg[75]_i_3_n_14 ,\ysqr_reg[75]_i_3_n_15 }),
        .S({\ysqr[75]_i_23_n_0 ,\ysqr[75]_i_24_n_0 ,\ysqr[75]_i_25_n_0 ,\ysqr[75]_i_26_n_0 ,\ysqr[75]_i_27_n_0 ,\ysqr[75]_i_28_n_0 ,\ysqr[75]_i_29_n_0 ,\ysqr[75]_i_30_n_0 }));
  FDCE \ysqr_reg[76] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[76]_i_1_n_0 ),
        .Q(ysqr[76]));
  FDCE \ysqr_reg[77] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[77]_i_1_n_0 ),
        .Q(ysqr[77]));
  FDCE \ysqr_reg[78] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[78]_i_1_n_0 ),
        .Q(ysqr[78]));
  FDCE \ysqr_reg[79] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[79]_i_1_n_0 ),
        .Q(ysqr[79]));
  FDCE \ysqr_reg[7] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[7]_i_1_n_0 ),
        .Q(ysqr[7]));
  FDCE \ysqr_reg[80] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[80]_i_1_n_0 ),
        .Q(ysqr[80]));
  FDCE \ysqr_reg[81] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[81]_i_1_n_0 ),
        .Q(ysqr[81]));
  FDCE \ysqr_reg[82] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[82]_i_1_n_0 ),
        .Q(ysqr[82]));
  FDCE \ysqr_reg[83] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[83]_i_1_n_0 ),
        .Q(ysqr[83]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \ysqr_reg[83]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[83]_i_2_n_0 ,\ysqr_reg[83]_i_2_n_1 ,\ysqr_reg[83]_i_2_n_2 ,\ysqr_reg[83]_i_2_n_3 ,\ysqr_reg[83]_i_2_n_4 ,\ysqr_reg[83]_i_2_n_5 ,\ysqr_reg[83]_i_2_n_6 ,\ysqr_reg[83]_i_2_n_7 }),
        .DI({\ysqr[83]_i_3_n_0 ,\ysqr[83]_i_4_n_0 ,\ysqr[83]_i_5_n_0 ,\ysqr[83]_i_6_n_0 ,\ysqr[83]_i_7_n_0 ,\ysqr[83]_i_8_n_0 ,\ysqr[83]_i_9_n_0 ,\ysqr[83]_i_10_n_0 }),
        .O(ysqr03_in[11:4]),
        .S({\ysqr[83]_i_11_n_0 ,\ysqr[83]_i_12_n_0 ,\ysqr[83]_i_13_n_0 ,\ysqr[83]_i_14_n_0 ,\ysqr[83]_i_15_n_0 ,\ysqr[83]_i_16_n_0 ,\ysqr[83]_i_17_n_0 ,\ysqr[83]_i_18_n_0 }));
  FDCE \ysqr_reg[84] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[84]_i_1_n_0 ),
        .Q(ysqr[84]));
  FDCE \ysqr_reg[85] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[85]_i_1_n_0 ),
        .Q(ysqr[85]));
  FDCE \ysqr_reg[86] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[86]_i_1_n_0 ),
        .Q(ysqr[86]));
  FDCE \ysqr_reg[87] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[87]_i_1_n_0 ),
        .Q(ysqr[87]));
  FDCE \ysqr_reg[88] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[88]_i_1_n_0 ),
        .Q(ysqr[88]));
  FDCE \ysqr_reg[89] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[89]_i_1_n_0 ),
        .Q(ysqr[89]));
  CARRY8 \ysqr_reg[89]_i_13 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\ysqr_reg[89]_i_13_n_0 ,\ysqr_reg[89]_i_13_n_1 ,\ysqr_reg[89]_i_13_n_2 ,\ysqr_reg[89]_i_13_n_3 ,\ysqr_reg[89]_i_13_n_4 ,\ysqr_reg[89]_i_13_n_5 ,\ysqr_reg[89]_i_13_n_6 ,\ysqr_reg[89]_i_13_n_7 }),
        .DI({\ysqr[89]_i_19_n_0 ,\ysqr[89]_i_20_n_0 ,\ysqr[89]_i_21_n_0 ,\ysqr[89]_i_22_n_0 ,\ysqr[89]_i_23_n_0 ,\ysqr[75]_i_31_n_0 ,\ysqr[89]_i_24_n_0 ,1'b0}),
        .O({\ysqr_reg[89]_i_13_n_8 ,\ysqr_reg[89]_i_13_n_9 ,\ysqr_reg[89]_i_13_n_10 ,\ysqr_reg[89]_i_13_n_11 ,\ysqr_reg[89]_i_13_n_12 ,\ysqr_reg[89]_i_13_n_13 ,\ysqr_reg[89]_i_13_n_14 ,\ysqr_reg[89]_i_13_n_15 }),
        .S({\ysqr[89]_i_25_n_0 ,\ysqr[89]_i_26_n_0 ,\ysqr[89]_i_27_n_0 ,\ysqr[89]_i_28_n_0 ,\ysqr[89]_i_29_n_0 ,\ysqr[89]_i_30_n_0 ,\ysqr[89]_i_31_n_0 ,\ysqr[89]_i_32_n_0 }));
  CARRY8 \ysqr_reg[89]_i_17 
       (.CI(\ysqr_reg[75]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[89]_i_17_CO_UNCONNECTED [7:4],\ysqr_reg[89]_i_17_n_4 ,\NLW_ysqr_reg[89]_i_17_CO_UNCONNECTED [2],\ysqr_reg[89]_i_17_n_6 ,\ysqr_reg[89]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\ysqr[89]_i_33_n_0 ,\ysqr[89]_i_34_n_0 ,\ysqr[89]_i_35_n_0 }),
        .O({\NLW_ysqr_reg[89]_i_17_O_UNCONNECTED [7:3],\ysqr_reg[89]_i_17_n_13 ,\ysqr_reg[89]_i_17_n_14 ,\ysqr_reg[89]_i_17_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[89]_i_36_n_0 ,\ysqr[89]_i_37_n_0 ,\ysqr[89]_i_38_n_0 }));
  CARRY8 \ysqr_reg[89]_i_18 
       (.CI(\ysqr_reg[75]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[89]_i_18_CO_UNCONNECTED [7:3],\ysqr_reg[89]_i_18_n_5 ,\NLW_ysqr_reg[89]_i_18_CO_UNCONNECTED [1],\ysqr_reg[89]_i_18_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\ysqr[89]_i_39_n_0 ,\ysqr[89]_i_40_n_0 }),
        .O({\NLW_ysqr_reg[89]_i_18_O_UNCONNECTED [7:2],\ysqr_reg[89]_i_18_n_14 ,\ysqr_reg[89]_i_18_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[89]_i_41_n_0 ,\ysqr[89]_i_42_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \ysqr_reg[89]_i_2 
       (.CI(\ysqr_reg[83]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[89]_i_2_CO_UNCONNECTED [7:5],\ysqr_reg[89]_i_2_n_3 ,\ysqr_reg[89]_i_2_n_4 ,\ysqr_reg[89]_i_2_n_5 ,\ysqr_reg[89]_i_2_n_6 ,\ysqr_reg[89]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,\ysqr_reg[89]_i_3_n_13 ,\ysqr[89]_i_4_n_0 ,\ysqr[89]_i_5_n_0 ,\ysqr[89]_i_6_n_0 ,\ysqr[89]_i_7_n_0 }),
        .O({\NLW_ysqr_reg[89]_i_2_O_UNCONNECTED [7:6],ysqr03_in[17:12]}),
        .S({1'b0,1'b0,\ysqr_reg[89]_i_3_n_12 ,\ysqr[89]_i_8_n_0 ,\ysqr[89]_i_9_n_0 ,\ysqr[89]_i_10_n_0 ,\ysqr[89]_i_11_n_0 ,\ysqr[89]_i_12_n_0 }));
  CARRY8 \ysqr_reg[89]_i_3 
       (.CI(\ysqr_reg[89]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_ysqr_reg[89]_i_3_CO_UNCONNECTED [7:3],\ysqr_reg[89]_i_3_n_5 ,\ysqr_reg[89]_i_3_n_6 ,\ysqr_reg[89]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,\dy_reg_n_0_[44] ,1'b0,\dy_reg_n_0_[43] }),
        .O({\NLW_ysqr_reg[89]_i_3_O_UNCONNECTED [7:4],\ysqr_reg[89]_i_3_n_12 ,\ysqr_reg[89]_i_3_n_13 ,\ysqr_reg[89]_i_3_n_14 ,\ysqr_reg[89]_i_3_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\ysqr[89]_i_14_n_0 ,\ysqr[89]_i_15_n_0 ,\ysqr[89]_i_16_n_0 }));
  FDCE \ysqr_reg[8] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[8]_i_1_n_0 ),
        .Q(ysqr[8]));
  FDCE \ysqr_reg[9] 
       (.C(aclk_sig),
        .CE(\xsqr[89]_i_1_n_0 ),
        .CLR(linNotLog_reg_0),
        .D(\ysqr[9]_i_1_n_0 ),
        .Q(ysqr[9]));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Cputrack
   (doutb,
    ackInvCputrackSelect,
    ackInvCputrackSet,
    Q,
    \FSM_onehot_stateSeq_reg[3]_0 ,
    seqbufCputrackToHostifAXIS_tvalid,
    cputrackGetInfoTixVState,
    ackSeqbufCputrackToHostif,
    cputrackGetInfoPtr0Seqbuf,
    aclk_sig,
    AR,
    hdrNotFix,
    reqInvSelect,
    ackInvSelect_sig_reg_0,
    reqInvCputrackSet,
    restart_reg_0,
    dneSeqbufCputrackToHostif,
    seqbufCputrackToHostifAXIS_tready,
    reqSeqbufCputrackToHostif,
    D,
    \tixVCapture_reg[7]_0 ,
    \TCaptMax_reg[7]_0 ,
    stateOp_dbg,
    hostifStateOp_dbg);
  output [63:0]doutb;
  output ackInvCputrackSelect;
  output ackInvCputrackSet;
  output [31:0]Q;
  output [0:0]\FSM_onehot_stateSeq_reg[3]_0 ;
  output seqbufCputrackToHostifAXIS_tvalid;
  output [1:0]cputrackGetInfoTixVState;
  output ackSeqbufCputrackToHostif;
  output [9:0]cputrackGetInfoPtr0Seqbuf;
  input aclk_sig;
  input [0:0]AR;
  input hdrNotFix;
  input reqInvSelect;
  input ackInvSelect_sig_reg_0;
  input reqInvCputrackSet;
  input restart_reg_0;
  input dneSeqbufCputrackToHostif;
  input seqbufCputrackToHostifAXIS_tready;
  input reqSeqbufCputrackToHostif;
  input [23:0]D;
  input [7:0]\tixVCapture_reg[7]_0 ;
  input [7:0]\TCaptMax_reg[7]_0 ;
  input [6:0]stateOp_dbg;
  input [7:0]hostifStateOp_dbg;

  wire [0:0]AR;
  wire [23:0]D;
  wire \FSM_onehot_stateSeq[0]_i_1__2_n_0 ;
  wire \FSM_onehot_stateSeq[2]_i_1__2_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_1__2_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_2__1_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_3__1_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_4__1_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_1__2_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_2__2_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_3__1_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_4__2_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_5__2_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_6__2_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_7__2_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_8__0_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_9_n_0 ;
  wire [0:0]\FSM_onehot_stateSeq_reg[3]_0 ;
  wire \FSM_onehot_stateSeq_reg_n_0_[4] ;
  wire [31:0]Q;
  wire TCapt;
  wire TCaptMax;
  wire [7:0]\TCaptMax_reg[7]_0 ;
  wire \TCaptMax_reg_n_0_[0] ;
  wire \TCaptMax_reg_n_0_[10] ;
  wire \TCaptMax_reg_n_0_[11] ;
  wire \TCaptMax_reg_n_0_[12] ;
  wire \TCaptMax_reg_n_0_[13] ;
  wire \TCaptMax_reg_n_0_[14] ;
  wire \TCaptMax_reg_n_0_[15] ;
  wire \TCaptMax_reg_n_0_[16] ;
  wire \TCaptMax_reg_n_0_[17] ;
  wire \TCaptMax_reg_n_0_[18] ;
  wire \TCaptMax_reg_n_0_[19] ;
  wire \TCaptMax_reg_n_0_[1] ;
  wire \TCaptMax_reg_n_0_[20] ;
  wire \TCaptMax_reg_n_0_[21] ;
  wire \TCaptMax_reg_n_0_[22] ;
  wire \TCaptMax_reg_n_0_[23] ;
  wire \TCaptMax_reg_n_0_[24] ;
  wire \TCaptMax_reg_n_0_[25] ;
  wire \TCaptMax_reg_n_0_[26] ;
  wire \TCaptMax_reg_n_0_[27] ;
  wire \TCaptMax_reg_n_0_[28] ;
  wire \TCaptMax_reg_n_0_[29] ;
  wire \TCaptMax_reg_n_0_[2] ;
  wire \TCaptMax_reg_n_0_[30] ;
  wire \TCaptMax_reg_n_0_[31] ;
  wire \TCaptMax_reg_n_0_[3] ;
  wire \TCaptMax_reg_n_0_[4] ;
  wire \TCaptMax_reg_n_0_[5] ;
  wire \TCaptMax_reg_n_0_[6] ;
  wire \TCaptMax_reg_n_0_[7] ;
  wire \TCaptMax_reg_n_0_[8] ;
  wire \TCaptMax_reg_n_0_[9] ;
  wire [31:0]TCapt__0;
  wire \aSeqbufB[0]_i_1__2_n_0 ;
  wire \aSeqbufB[1]_i_1__2_n_0 ;
  wire \aSeqbufB[2]_i_1__2_n_0 ;
  wire \aSeqbufB[3]_i_1__2_n_0 ;
  wire \aSeqbufB[4]_i_1__2_n_0 ;
  wire \aSeqbufB[5]_i_1__2_n_0 ;
  wire \aSeqbufB[5]_i_2__2_n_0 ;
  wire \aSeqbufB[6]_i_1__2_n_0 ;
  wire \aSeqbufB[7]_i_1__2_n_0 ;
  wire \aSeqbufB[8]_i_1__2_n_0 ;
  wire \aSeqbufB[8]_i_2__2_n_0 ;
  wire \aSeqbufB[8]_i_3__2_n_0 ;
  wire \aSeqbufB[8]_i_4__2_n_0 ;
  wire \aSeqbufB_reg_n_0_[0] ;
  wire \aSeqbufB_reg_n_0_[1] ;
  wire \aSeqbufB_reg_n_0_[2] ;
  wire \aSeqbufB_reg_n_0_[3] ;
  wire \aSeqbufB_reg_n_0_[4] ;
  wire \aSeqbufB_reg_n_0_[5] ;
  wire \aSeqbufB_reg_n_0_[6] ;
  wire \aSeqbufB_reg_n_0_[7] ;
  wire \aSeqbufB_reg_n_0_[8] ;
  wire \aSeqbuf[0]_i_1__2_n_0 ;
  wire \aSeqbuf[1]_i_1__2_n_0 ;
  wire \aSeqbuf[2]_i_1__2_n_0 ;
  wire \aSeqbuf[3]_i_1__2_n_0 ;
  wire \aSeqbuf[4]_i_1__2_n_0 ;
  wire \aSeqbuf[5]_i_1__2_n_0 ;
  wire \aSeqbuf[6]_i_1__2_n_0 ;
  wire \aSeqbuf[6]_i_2_n_0 ;
  wire \aSeqbuf[7]_i_1__2_n_0 ;
  wire \aSeqbuf[7]_i_2_n_0 ;
  wire \aSeqbuf[7]_i_3_n_0 ;
  wire \aSeqbuf[8]_i_1__2_n_0 ;
  wire \aSeqbuf[8]_i_2__2_n_0 ;
  wire \aSeqbuf[8]_i_3__1_n_0 ;
  wire \aSeqbuf[8]_i_4__1_n_0 ;
  wire \aSeqbuf[8]_i_5__0_n_0 ;
  wire \aSeqbuf[8]_i_6_n_0 ;
  wire \aSeqbuf[9]_i_10_n_0 ;
  wire \aSeqbuf[9]_i_1__2_n_0 ;
  wire \aSeqbuf[9]_i_2__2_n_0 ;
  wire \aSeqbuf[9]_i_3__2_n_0 ;
  wire \aSeqbuf[9]_i_4__1_n_0 ;
  wire \aSeqbuf[9]_i_5__2_n_0 ;
  wire \aSeqbuf[9]_i_6__2_n_0 ;
  wire \aSeqbuf[9]_i_7__1_n_0 ;
  wire \aSeqbuf[9]_i_8_n_0 ;
  wire \aSeqbuf[9]_i_9_n_0 ;
  wire \aSeqbuf_reg_n_0_[0] ;
  wire \aSeqbuf_reg_n_0_[1] ;
  wire \aSeqbuf_reg_n_0_[2] ;
  wire \aSeqbuf_reg_n_0_[3] ;
  wire \aSeqbuf_reg_n_0_[4] ;
  wire \aSeqbuf_reg_n_0_[5] ;
  wire \aSeqbuf_reg_n_0_[6] ;
  wire \aSeqbuf_reg_n_0_[7] ;
  wire \aSeqbuf_reg_n_0_[8] ;
  wire \aSeqbuf_reg_n_0_[9] ;
  wire ackInvCputrackSelect;
  wire ackInvCputrackSet;
  wire ackInvSelect_sig_i_1__2_n_0;
  wire ackInvSelect_sig_reg_0;
  wire ackInvSet_sig_i_1__7_n_0;
  wire ackInvSet_sig_i_2__4_n_0;
  wire ackSeqbufBToSeqClear;
  wire ackSeqbufCputrackToHostif;
  wire aclk_sig;
  wire \burstCnt[0]_i_1__2_n_0 ;
  wire \burstCnt[10]_i_1__2_n_0 ;
  wire \burstCnt[10]_i_2__1_n_0 ;
  wire \burstCnt[11]_i_1__2_n_0 ;
  wire \burstCnt[11]_i_2__2_n_0 ;
  wire \burstCnt[12]_i_1__2_n_0 ;
  wire \burstCnt[12]_i_2__1_n_0 ;
  wire \burstCnt[13]_i_1__2_n_0 ;
  wire \burstCnt[13]_i_2__0_n_0 ;
  wire \burstCnt[13]_i_3_n_0 ;
  wire \burstCnt[13]_i_4_n_0 ;
  wire \burstCnt[13]_i_5_n_0 ;
  wire \burstCnt[14]_i_1__2_n_0 ;
  wire \burstCnt[15]_i_10__2_n_0 ;
  wire \burstCnt[15]_i_11__2_n_0 ;
  wire \burstCnt[15]_i_12__2_n_0 ;
  wire \burstCnt[15]_i_13__1_n_0 ;
  wire \burstCnt[15]_i_14__0_n_0 ;
  wire \burstCnt[15]_i_15__0_n_0 ;
  wire \burstCnt[15]_i_16__0_n_0 ;
  wire \burstCnt[15]_i_17__0_n_0 ;
  wire \burstCnt[15]_i_18__0_n_0 ;
  wire \burstCnt[15]_i_19__0_n_0 ;
  wire \burstCnt[15]_i_1__2_n_0 ;
  wire \burstCnt[15]_i_20__0_n_0 ;
  wire \burstCnt[15]_i_21__0_n_0 ;
  wire \burstCnt[15]_i_22__0_n_0 ;
  wire \burstCnt[15]_i_23__0_n_0 ;
  wire \burstCnt[15]_i_24__0_n_0 ;
  wire \burstCnt[15]_i_25__0_n_0 ;
  wire \burstCnt[15]_i_2__2_n_0 ;
  wire \burstCnt[15]_i_3__1_n_0 ;
  wire \burstCnt[15]_i_4__2_n_0 ;
  wire \burstCnt[15]_i_5__2_n_0 ;
  wire \burstCnt[15]_i_6__2_n_0 ;
  wire \burstCnt[15]_i_7__2_n_0 ;
  wire \burstCnt[15]_i_8__2_n_0 ;
  wire \burstCnt[15]_i_9__2_n_0 ;
  wire \burstCnt[1]_i_1__2_n_0 ;
  wire \burstCnt[2]_i_1__2_n_0 ;
  wire \burstCnt[3]_i_1__2_n_0 ;
  wire \burstCnt[3]_i_2_n_0 ;
  wire \burstCnt[4]_i_1__2_n_0 ;
  wire \burstCnt[4]_i_2__2_n_0 ;
  wire \burstCnt[5]_i_1__2_n_0 ;
  wire \burstCnt[5]_i_2__2_n_0 ;
  wire \burstCnt[6]_i_1__2_n_0 ;
  wire \burstCnt[6]_i_2__1_n_0 ;
  wire \burstCnt[7]_i_1__2_n_0 ;
  wire \burstCnt[7]_i_2__1_n_0 ;
  wire \burstCnt[8]_i_1__2_n_0 ;
  wire \burstCnt[8]_i_2__1_n_0 ;
  wire \burstCnt[9]_i_1__2_n_0 ;
  wire \burstCnt[9]_i_2__2_n_0 ;
  wire \burstCnt[9]_i_3__0_n_0 ;
  wire \burstCnt[9]_i_4_n_0 ;
  wire \burstCnt[9]_i_5_n_0 ;
  wire \burstCnt_reg_n_0_[0] ;
  wire \burstCnt_reg_n_0_[10] ;
  wire \burstCnt_reg_n_0_[11] ;
  wire \burstCnt_reg_n_0_[12] ;
  wire \burstCnt_reg_n_0_[13] ;
  wire \burstCnt_reg_n_0_[14] ;
  wire \burstCnt_reg_n_0_[15] ;
  wire \burstCnt_reg_n_0_[1] ;
  wire \burstCnt_reg_n_0_[2] ;
  wire \burstCnt_reg_n_0_[3] ;
  wire \burstCnt_reg_n_0_[4] ;
  wire \burstCnt_reg_n_0_[5] ;
  wire \burstCnt_reg_n_0_[6] ;
  wire \burstCnt_reg_n_0_[7] ;
  wire \burstCnt_reg_n_0_[8] ;
  wire \burstCnt_reg_n_0_[9] ;
  wire \burstState[0]_i_1__0_n_0 ;
  wire \burstState[1]_i_1__0_n_0 ;
  wire \burstState[2]_i_1_n_0 ;
  wire \burstState[3]_i_1_n_0 ;
  wire \burstState[4]_i_1__0_n_0 ;
  wire \burstState[5]_i_1__0_n_0 ;
  wire \burstState[6]_i_1__0_n_0 ;
  wire \burstState[7]_i_1_n_0 ;
  wire \burstState_reg_n_0_[0] ;
  wire \burstState_reg_n_0_[1] ;
  wire \burstState_reg_n_0_[2] ;
  wire \burstState_reg_n_0_[3] ;
  wire \burstState_reg_n_0_[4] ;
  wire \burstState_reg_n_0_[5] ;
  wire \burstState_reg_n_0_[6] ;
  wire \burstState_reg_n_0_[7] ;
  wire [9:0]cputrackGetInfoPtr0Seqbuf;
  wire [1:0]cputrackGetInfoTixVState;
  wire dneSeqbufCputrackToHostif;
  wire [63:0]doutb;
  wire [31:0]dwrSeqbuf;
  wire \dwrSeqbuf[0]_i_1__2_n_0 ;
  wire \dwrSeqbuf[0]_i_2__2_n_0 ;
  wire \dwrSeqbuf[10]_i_1__2_n_0 ;
  wire \dwrSeqbuf[10]_i_2__0_n_0 ;
  wire \dwrSeqbuf[11]_i_1__2_n_0 ;
  wire \dwrSeqbuf[11]_i_2__0_n_0 ;
  wire \dwrSeqbuf[12]_i_1__2_n_0 ;
  wire \dwrSeqbuf[12]_i_2__0_n_0 ;
  wire \dwrSeqbuf[13]_i_1__2_n_0 ;
  wire \dwrSeqbuf[13]_i_2__0_n_0 ;
  wire \dwrSeqbuf[14]_i_1__2_n_0 ;
  wire \dwrSeqbuf[14]_i_2__0_n_0 ;
  wire \dwrSeqbuf[14]_i_3_n_0 ;
  wire \dwrSeqbuf[15]_i_1__2_n_0 ;
  wire \dwrSeqbuf[15]_i_2__1_n_0 ;
  wire \dwrSeqbuf[15]_i_3__1_n_0 ;
  wire \dwrSeqbuf[15]_i_4_n_0 ;
  wire \dwrSeqbuf[15]_i_5_n_0 ;
  wire \dwrSeqbuf[15]_i_6_n_0 ;
  wire \dwrSeqbuf[15]_i_7_n_0 ;
  wire \dwrSeqbuf[16]_i_1__2_n_0 ;
  wire \dwrSeqbuf[17]_i_1__2_n_0 ;
  wire \dwrSeqbuf[18]_i_1__2_n_0 ;
  wire \dwrSeqbuf[19]_i_1__2_n_0 ;
  wire \dwrSeqbuf[1]_i_1__2_n_0 ;
  wire \dwrSeqbuf[1]_i_2__2_n_0 ;
  wire \dwrSeqbuf[1]_i_3__2_n_0 ;
  wire \dwrSeqbuf[20]_i_1__2_n_0 ;
  wire \dwrSeqbuf[21]_i_1__2_n_0 ;
  wire \dwrSeqbuf[22]_i_1__1_n_0 ;
  wire \dwrSeqbuf[23]_i_1__1_n_0 ;
  wire \dwrSeqbuf[23]_i_2__0_n_0 ;
  wire \dwrSeqbuf[24]_i_1__1_n_0 ;
  wire \dwrSeqbuf[25]_i_1__0_n_0 ;
  wire \dwrSeqbuf[26]_i_1__0_n_0 ;
  wire \dwrSeqbuf[27]_i_1__0_n_0 ;
  wire \dwrSeqbuf[28]_i_1__0_n_0 ;
  wire \dwrSeqbuf[29]_i_1__0_n_0 ;
  wire \dwrSeqbuf[2]_i_1__2_n_0 ;
  wire \dwrSeqbuf[2]_i_2__2_n_0 ;
  wire \dwrSeqbuf[2]_i_3__2_n_0 ;
  wire \dwrSeqbuf[30]_i_1__2_n_0 ;
  wire \dwrSeqbuf[31]_i_1__2_n_0 ;
  wire \dwrSeqbuf[31]_i_2__2_n_0 ;
  wire \dwrSeqbuf[31]_i_3__2_n_0 ;
  wire \dwrSeqbuf[31]_i_4__2_n_0 ;
  wire \dwrSeqbuf[31]_i_5__0_n_0 ;
  wire \dwrSeqbuf[3]_i_1__2_n_0 ;
  wire \dwrSeqbuf[3]_i_2__2_n_0 ;
  wire \dwrSeqbuf[3]_i_3__2_n_0 ;
  wire \dwrSeqbuf[4]_i_1__2_n_0 ;
  wire \dwrSeqbuf[4]_i_2__2_n_0 ;
  wire \dwrSeqbuf[5]_i_1__2_n_0 ;
  wire \dwrSeqbuf[5]_i_2__2_n_0 ;
  wire \dwrSeqbuf[6]_i_1__2_n_0 ;
  wire \dwrSeqbuf[6]_i_2__1_n_0 ;
  wire \dwrSeqbuf[7]_i_1__2_n_0 ;
  wire \dwrSeqbuf[7]_i_2__2_n_0 ;
  wire \dwrSeqbuf[8]_i_1__2_n_0 ;
  wire \dwrSeqbuf[8]_i_2__1_n_0 ;
  wire \dwrSeqbuf[9]_i_1__2_n_0 ;
  wire \dwrSeqbuf[9]_i_2__0_n_0 ;
  wire enSeqbuf;
  wire enSeqbuf_reg_n_0;
  wire first;
  wire first__0;
  wire hdrNotFix;
  wire [7:0]hostifStateOp_dbg;
  wire [1:0]i;
  wire \i[1]_i_1__19_n_0 ;
  wire i__carry__0_i_10__0_n_0;
  wire i__carry__0_i_11__0_n_0;
  wire i__carry__0_i_12__0_n_0;
  wire i__carry__0_i_13__0_n_0;
  wire i__carry__0_i_14__0_n_0;
  wire i__carry__0_i_15__0_n_0;
  wire i__carry__0_i_16__0_n_0;
  wire i__carry__0_i_1__0_n_0;
  wire i__carry__0_i_2__0_n_0;
  wire i__carry__0_i_3__0_n_0;
  wire i__carry__0_i_4__0_n_0;
  wire i__carry__0_i_5__0_n_0;
  wire i__carry__0_i_6__0_n_0;
  wire i__carry__0_i_7__0_n_0;
  wire i__carry__0_i_8__0_n_0;
  wire i__carry__0_i_9__0_n_0;
  wire i__carry_i_10__5_n_0;
  wire i__carry_i_11__4_n_0;
  wire i__carry_i_12__2_n_0;
  wire i__carry_i_13__1_n_0;
  wire i__carry_i_14__0_n_0;
  wire i__carry_i_15__0_n_0;
  wire i__carry_i_16__0_n_0;
  wire i__carry_i_1__6_n_0;
  wire i__carry_i_2__6_n_0;
  wire i__carry_i_3__6_n_0;
  wire i__carry_i_4__6_n_0;
  wire i__carry_i_5__6_n_0;
  wire i__carry_i_6__6_n_0;
  wire i__carry_i_7__5_n_0;
  wire i__carry_i_8__5_n_0;
  wire i__carry_i_9__5_n_0;
  wire \i_reg_n_0_[0] ;
  wire \i_reg_n_0_[1] ;
  wire [31:1]in12;
  wire [2:0]p_0_in__0;
  wire plusOp_carry__0_n_0;
  wire plusOp_carry__0_n_1;
  wire plusOp_carry__0_n_2;
  wire plusOp_carry__0_n_3;
  wire plusOp_carry__0_n_4;
  wire plusOp_carry__0_n_5;
  wire plusOp_carry__0_n_6;
  wire plusOp_carry__0_n_7;
  wire plusOp_carry__1_n_0;
  wire plusOp_carry__1_n_1;
  wire plusOp_carry__1_n_2;
  wire plusOp_carry__1_n_3;
  wire plusOp_carry__1_n_4;
  wire plusOp_carry__1_n_5;
  wire plusOp_carry__1_n_6;
  wire plusOp_carry__1_n_7;
  wire plusOp_carry__2_n_2;
  wire plusOp_carry__2_n_3;
  wire plusOp_carry__2_n_4;
  wire plusOp_carry__2_n_5;
  wire plusOp_carry__2_n_6;
  wire plusOp_carry__2_n_7;
  wire plusOp_carry_n_0;
  wire plusOp_carry_n_1;
  wire plusOp_carry_n_2;
  wire plusOp_carry_n_3;
  wire plusOp_carry_n_4;
  wire plusOp_carry_n_5;
  wire plusOp_carry_n_6;
  wire plusOp_carry_n_7;
  wire ptr0SeqbufTrackNotFixed_i_1__2_n_0;
  wire ptr0SeqbufTrackNotFixed_reg_n_0;
  wire [31:0]quad;
  wire \quad[15]_i_1__0_n_0 ;
  wire \quad[23]_i_1__0_n_0 ;
  wire \quad[23]_i_3_n_0 ;
  wire \quad[7]_i_1__1_n_0 ;
  wire \quad[7]_i_3_n_0 ;
  wire \quad_reg_n_0_[0] ;
  wire \quad_reg_n_0_[10] ;
  wire \quad_reg_n_0_[11] ;
  wire \quad_reg_n_0_[12] ;
  wire \quad_reg_n_0_[13] ;
  wire \quad_reg_n_0_[14] ;
  wire \quad_reg_n_0_[15] ;
  wire \quad_reg_n_0_[16] ;
  wire \quad_reg_n_0_[17] ;
  wire \quad_reg_n_0_[18] ;
  wire \quad_reg_n_0_[19] ;
  wire \quad_reg_n_0_[1] ;
  wire \quad_reg_n_0_[20] ;
  wire \quad_reg_n_0_[21] ;
  wire \quad_reg_n_0_[22] ;
  wire \quad_reg_n_0_[23] ;
  wire \quad_reg_n_0_[24] ;
  wire \quad_reg_n_0_[25] ;
  wire \quad_reg_n_0_[26] ;
  wire \quad_reg_n_0_[27] ;
  wire \quad_reg_n_0_[28] ;
  wire \quad_reg_n_0_[29] ;
  wire \quad_reg_n_0_[2] ;
  wire \quad_reg_n_0_[30] ;
  wire \quad_reg_n_0_[31] ;
  wire \quad_reg_n_0_[3] ;
  wire \quad_reg_n_0_[4] ;
  wire \quad_reg_n_0_[5] ;
  wire \quad_reg_n_0_[6] ;
  wire \quad_reg_n_0_[7] ;
  wire \quad_reg_n_0_[8] ;
  wire \quad_reg_n_0_[9] ;
  wire rdySeq;
  wire reqInvCputrackSet;
  wire reqInvSelect;
  wire reqSeqbufCputrackToHostif;
  wire restart_i_1__2_n_0;
  wire restart_reg_0;
  wire restart_reg_n_0;
  wire rng_reg_n_0;
  wire seqbufCputrackToHostifAXIS_tready;
  wire seqbufCputrackToHostifAXIS_tvalid;
  wire staFallingNotRising;
  wire [7:0]staTixVTrigger;
  wire [7:0]state;
  wire [2:0]stateOp;
  wire \stateOp[0]_i_1__12_n_0 ;
  wire \stateOp[1]_i_1__12_n_0 ;
  wire \stateOp[2]_i_10__3_n_0 ;
  wire \stateOp[2]_i_11__2_n_0 ;
  wire \stateOp[2]_i_12__2_n_0 ;
  wire \stateOp[2]_i_13__3_n_0 ;
  wire \stateOp[2]_i_14__2_n_0 ;
  wire \stateOp[2]_i_15__3_n_0 ;
  wire \stateOp[2]_i_16__3_n_0 ;
  wire \stateOp[2]_i_17__3_n_0 ;
  wire \stateOp[2]_i_18__3_n_0 ;
  wire \stateOp[2]_i_19__3_n_0 ;
  wire \stateOp[2]_i_1__3_n_0 ;
  wire \stateOp[2]_i_20__3_n_0 ;
  wire \stateOp[2]_i_21__2_n_0 ;
  wire \stateOp[2]_i_22__2_n_0 ;
  wire \stateOp[2]_i_2__4_n_0 ;
  wire \stateOp[2]_i_3__4_n_0 ;
  wire \stateOp[2]_i_5__4_n_0 ;
  wire \stateOp[2]_i_6__2_n_0 ;
  wire \stateOp[2]_i_7__3_n_0 ;
  wire \stateOp[2]_i_8__3_n_0 ;
  wire \stateOp[2]_i_9__1_n_0 ;
  wire [6:0]stateOp_dbg;
  wire \stateSeqbufB[1]_i_2__2_n_0 ;
  wire \stateSeqbufB[2]_i_1__2_n_0 ;
  wire \stateSeqbufB[2]_i_3__2_n_0 ;
  wire \stateSeqbufB[2]_i_7__2_n_0 ;
  wire [2:0]stateSeqbufB_reg;
  wire \state[0]_i_1__0_n_0 ;
  wire \state[1]_i_1_n_0 ;
  wire \state[2]_i_1_n_0 ;
  wire \state[3]_i_1_n_0 ;
  wire \state[4]_i_1__0_n_0 ;
  wire \state[5]_i_1__0_n_0 ;
  wire \state[6]_i_1__0_n_0 ;
  wire \state[7]_i_1__0_n_0 ;
  wire \state[7]_i_2__0_n_0 ;
  wire [7:0]stoTixVTrigger;
  wire stop_lcl_i_1__2_n_0;
  wire stop_lcl_i_2__1_n_0;
  wire stop_lcl_reg_n_0;
  wire \strbStop5_inferred__0/i__carry__0_n_0 ;
  wire \strbStop5_inferred__0/i__carry__0_n_1 ;
  wire \strbStop5_inferred__0/i__carry__0_n_2 ;
  wire \strbStop5_inferred__0/i__carry__0_n_3 ;
  wire \strbStop5_inferred__0/i__carry__0_n_4 ;
  wire \strbStop5_inferred__0/i__carry__0_n_5 ;
  wire \strbStop5_inferred__0/i__carry__0_n_6 ;
  wire \strbStop5_inferred__0/i__carry__0_n_7 ;
  wire \strbStop5_inferred__0/i__carry_n_0 ;
  wire \strbStop5_inferred__0/i__carry_n_1 ;
  wire \strbStop5_inferred__0/i__carry_n_2 ;
  wire \strbStop5_inferred__0/i__carry_n_3 ;
  wire \strbStop5_inferred__0/i__carry_n_4 ;
  wire \strbStop5_inferred__0/i__carry_n_5 ;
  wire \strbStop5_inferred__0/i__carry_n_6 ;
  wire \strbStop5_inferred__0/i__carry_n_7 ;
  wire strbStop_i_1__2_n_0;
  wire strbStop_i_2__2_n_0;
  wire strbStop_i_3__1_n_0;
  wire strbStop_reg_n_0;
  wire [7:0]\tixVCapture_reg[7]_0 ;
  wire \tixVCapture_reg_n_0_[0] ;
  wire \tixVCapture_reg_n_0_[1] ;
  wire \tixVCapture_reg_n_0_[2] ;
  wire \tixVCapture_reg_n_0_[3] ;
  wire \tixVCapture_reg_n_0_[4] ;
  wire \tixVCapture_reg_n_0_[5] ;
  wire \tixVCapture_reg_n_0_[6] ;
  wire \tixVCapture_reg_n_0_[7] ;
  wire [7:6]NLW_plusOp_carry__2_CO_UNCONNECTED;
  wire [7:7]NLW_plusOp_carry__2_O_UNCONNECTED;
  wire [7:0]\NLW_strbStop5_inferred__0/i__carry_O_UNCONNECTED ;
  wire [7:0]\NLW_strbStop5_inferred__0/i__carry__0_O_UNCONNECTED ;

  LUT6 #(
    .INIT(64'h0000FFFF00010001)) 
    \FSM_onehot_stateSeq[0]_i_1__2 
       (.I0(TCapt),
        .I1(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I2(first),
        .I3(rdySeq),
        .I4(\FSM_onehot_stateSeq[5]_i_8__0_n_0 ),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\FSM_onehot_stateSeq[0]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1491" *) 
  LUT5 #(
    .INIT(32'hFFF8FF00)) 
    \FSM_onehot_stateSeq[2]_i_1__2 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\FSM_onehot_stateSeq[3]_i_2__1_n_0 ),
        .I3(rdySeq),
        .I4(TCapt),
        .O(\FSM_onehot_stateSeq[2]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1491" *) 
  LUT4 #(
    .INIT(16'h0700)) 
    \FSM_onehot_stateSeq[3]_i_1__2 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\FSM_onehot_stateSeq[3]_i_2__1_n_0 ),
        .I3(TCapt),
        .O(\FSM_onehot_stateSeq[3]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h000000000000FEFF)) 
    \FSM_onehot_stateSeq[3]_i_2__1 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\FSM_onehot_stateSeq[3]_i_3__1_n_0 ),
        .I3(\FSM_onehot_stateSeq[5]_i_5__2_n_0 ),
        .I4(strbStop_reg_n_0),
        .I5(stop_lcl_reg_n_0),
        .O(\FSM_onehot_stateSeq[3]_i_2__1_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \FSM_onehot_stateSeq[3]_i_3__1 
       (.I0(stoTixVTrigger[3]),
        .I1(stoTixVTrigger[1]),
        .I2(stoTixVTrigger[4]),
        .I3(stoTixVTrigger[7]),
        .I4(\FSM_onehot_stateSeq[3]_i_4__1_n_0 ),
        .O(\FSM_onehot_stateSeq[3]_i_3__1_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \FSM_onehot_stateSeq[3]_i_4__1 
       (.I0(stoTixVTrigger[0]),
        .I1(stoTixVTrigger[2]),
        .I2(stoTixVTrigger[6]),
        .I3(stoTixVTrigger[5]),
        .O(\FSM_onehot_stateSeq[3]_i_4__1_n_0 ));
  LUT6 #(
    .INIT(64'h55C0550055F35500)) 
    \FSM_onehot_stateSeq[5]_i_1__2 
       (.I0(\FSM_onehot_stateSeq[5]_i_3__1_n_0 ),
        .I1(\FSM_onehot_stateSeq[5]_i_4__2_n_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_5__2_n_0 ),
        .I3(\FSM_onehot_stateSeq[5]_i_6__2_n_0 ),
        .I4(\FSM_onehot_stateSeq[5]_i_7__2_n_0 ),
        .I5(\FSM_onehot_stateSeq[5]_i_8__0_n_0 ),
        .O(\FSM_onehot_stateSeq[5]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1533" *) 
  LUT4 #(
    .INIT(16'h0080)) 
    \FSM_onehot_stateSeq[5]_i_2__2 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[0]),
        .I3(stateSeqbufB_reg[1]),
        .O(\FSM_onehot_stateSeq[5]_i_2__2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000CF55FF15)) 
    \FSM_onehot_stateSeq[5]_i_3__1 
       (.I0(\FSM_onehot_stateSeq[5]_i_8__0_n_0 ),
        .I1(stateOp[2]),
        .I2(stateOp[1]),
        .I3(\FSM_onehot_stateSeq[5]_i_7__2_n_0 ),
        .I4(stateOp[0]),
        .I5(\FSM_onehot_stateSeq[5]_i_9_n_0 ),
        .O(\FSM_onehot_stateSeq[5]_i_3__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1544" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \FSM_onehot_stateSeq[5]_i_4__2 
       (.I0(ackSeqbufBToSeqClear),
        .I1(rdySeq),
        .O(\FSM_onehot_stateSeq[5]_i_4__2_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \FSM_onehot_stateSeq[5]_i_5__2 
       (.I0(\aSeqbuf_reg_n_0_[6] ),
        .I1(\aSeqbuf[8]_i_2__2_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[9] ),
        .I3(\aSeqbuf_reg_n_0_[7] ),
        .I4(\aSeqbuf_reg_n_0_[8] ),
        .O(\FSM_onehot_stateSeq[5]_i_5__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1544" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \FSM_onehot_stateSeq[5]_i_6__2 
       (.I0(ackSeqbufBToSeqClear),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\FSM_onehot_stateSeq[5]_i_6__2_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \FSM_onehot_stateSeq[5]_i_7__2 
       (.I0(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I1(TCapt),
        .O(\FSM_onehot_stateSeq[5]_i_7__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1530" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \FSM_onehot_stateSeq[5]_i_8__0 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(stateSeqbufB_reg[2]),
        .O(\FSM_onehot_stateSeq[5]_i_8__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1529" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \FSM_onehot_stateSeq[5]_i_9 
       (.I0(rdySeq),
        .I1(ackSeqbufBToSeqClear),
        .I2(\FSM_onehot_stateSeq_reg[3]_0 ),
        .O(\FSM_onehot_stateSeq[5]_i_9_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDPE #(
    .INIT(1'b1)) 
    \FSM_onehot_stateSeq_reg[0] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__2_n_0 ),
        .D(\FSM_onehot_stateSeq[0]_i_1__2_n_0 ),
        .PRE(AR),
        .Q(first));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[1] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__2_n_0 ),
        .CLR(AR),
        .D(first),
        .Q(rdySeq));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[2] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\FSM_onehot_stateSeq[2]_i_1__2_n_0 ),
        .Q(TCapt));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[3] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\FSM_onehot_stateSeq[3]_i_1__2_n_0 ),
        .Q(\FSM_onehot_stateSeq_reg[3]_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[4] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\FSM_onehot_stateSeq_reg[3]_0 ),
        .Q(\FSM_onehot_stateSeq_reg_n_0_[4] ));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[5] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\FSM_onehot_stateSeq[5]_i_2__2_n_0 ),
        .Q(ackSeqbufBToSeqClear));
  LUT5 #(
    .INIT(32'h0000FB00)) 
    \TCaptMax[31]_i_1__2 
       (.I0(stateOp[1]),
        .I1(stateOp[0]),
        .I2(stateOp[2]),
        .I3(reqInvCputrackSet),
        .I4(reqInvSelect),
        .O(TCaptMax));
  FDCE \TCaptMax_reg[0] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(\TCaptMax_reg[7]_0 [0]),
        .Q(\TCaptMax_reg_n_0_[0] ));
  FDCE \TCaptMax_reg[10] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[2]),
        .Q(\TCaptMax_reg_n_0_[10] ));
  FDCE \TCaptMax_reg[11] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[3]),
        .Q(\TCaptMax_reg_n_0_[11] ));
  FDCE \TCaptMax_reg[12] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[4]),
        .Q(\TCaptMax_reg_n_0_[12] ));
  FDCE \TCaptMax_reg[13] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[5]),
        .Q(\TCaptMax_reg_n_0_[13] ));
  FDCE \TCaptMax_reg[14] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[6]),
        .Q(\TCaptMax_reg_n_0_[14] ));
  FDCE \TCaptMax_reg[15] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[7]),
        .Q(\TCaptMax_reg_n_0_[15] ));
  FDCE \TCaptMax_reg[16] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[8]),
        .Q(\TCaptMax_reg_n_0_[16] ));
  FDCE \TCaptMax_reg[17] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[9]),
        .Q(\TCaptMax_reg_n_0_[17] ));
  FDCE \TCaptMax_reg[18] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[10]),
        .Q(\TCaptMax_reg_n_0_[18] ));
  FDCE \TCaptMax_reg[19] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[11]),
        .Q(\TCaptMax_reg_n_0_[19] ));
  FDCE \TCaptMax_reg[1] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(\TCaptMax_reg[7]_0 [1]),
        .Q(\TCaptMax_reg_n_0_[1] ));
  FDCE \TCaptMax_reg[20] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[12]),
        .Q(\TCaptMax_reg_n_0_[20] ));
  FDCE \TCaptMax_reg[21] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[13]),
        .Q(\TCaptMax_reg_n_0_[21] ));
  FDCE \TCaptMax_reg[22] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[14]),
        .Q(\TCaptMax_reg_n_0_[22] ));
  FDCE \TCaptMax_reg[23] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[15]),
        .Q(\TCaptMax_reg_n_0_[23] ));
  FDCE \TCaptMax_reg[24] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[16]),
        .Q(\TCaptMax_reg_n_0_[24] ));
  FDCE \TCaptMax_reg[25] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[17]),
        .Q(\TCaptMax_reg_n_0_[25] ));
  FDCE \TCaptMax_reg[26] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[18]),
        .Q(\TCaptMax_reg_n_0_[26] ));
  FDCE \TCaptMax_reg[27] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[19]),
        .Q(\TCaptMax_reg_n_0_[27] ));
  FDCE \TCaptMax_reg[28] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[20]),
        .Q(\TCaptMax_reg_n_0_[28] ));
  FDCE \TCaptMax_reg[29] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[21]),
        .Q(\TCaptMax_reg_n_0_[29] ));
  FDCE \TCaptMax_reg[2] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(\TCaptMax_reg[7]_0 [2]),
        .Q(\TCaptMax_reg_n_0_[2] ));
  FDCE \TCaptMax_reg[30] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[22]),
        .Q(\TCaptMax_reg_n_0_[30] ));
  FDCE \TCaptMax_reg[31] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[23]),
        .Q(\TCaptMax_reg_n_0_[31] ));
  FDCE \TCaptMax_reg[3] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(\TCaptMax_reg[7]_0 [3]),
        .Q(\TCaptMax_reg_n_0_[3] ));
  FDCE \TCaptMax_reg[4] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(\TCaptMax_reg[7]_0 [4]),
        .Q(\TCaptMax_reg_n_0_[4] ));
  FDCE \TCaptMax_reg[5] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(\TCaptMax_reg[7]_0 [5]),
        .Q(\TCaptMax_reg_n_0_[5] ));
  FDCE \TCaptMax_reg[6] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(\TCaptMax_reg[7]_0 [6]),
        .Q(\TCaptMax_reg_n_0_[6] ));
  FDCE \TCaptMax_reg[7] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(\TCaptMax_reg[7]_0 [7]),
        .Q(\TCaptMax_reg_n_0_[7] ));
  FDCE \TCaptMax_reg[8] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[0]),
        .Q(\TCaptMax_reg_n_0_[8] ));
  FDCE \TCaptMax_reg[9] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(D[1]),
        .Q(\TCaptMax_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1560" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \TCapt[0]_i_1__2 
       (.I0(Q[0]),
        .I1(first),
        .O(TCapt__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair1555" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[10]_i_1__2 
       (.I0(in12[10]),
        .I1(first),
        .O(TCapt__0[10]));
  (* SOFT_HLUTNM = "soft_lutpair1555" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[11]_i_1__2 
       (.I0(in12[11]),
        .I1(first),
        .O(TCapt__0[11]));
  (* SOFT_HLUTNM = "soft_lutpair1554" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[12]_i_1__2 
       (.I0(in12[12]),
        .I1(first),
        .O(TCapt__0[12]));
  (* SOFT_HLUTNM = "soft_lutpair1554" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[13]_i_1__2 
       (.I0(in12[13]),
        .I1(first),
        .O(TCapt__0[13]));
  (* SOFT_HLUTNM = "soft_lutpair1553" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[14]_i_1__2 
       (.I0(in12[14]),
        .I1(first),
        .O(TCapt__0[14]));
  (* SOFT_HLUTNM = "soft_lutpair1553" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[15]_i_1__2 
       (.I0(in12[15]),
        .I1(first),
        .O(TCapt__0[15]));
  (* SOFT_HLUTNM = "soft_lutpair1552" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[16]_i_1__2 
       (.I0(in12[16]),
        .I1(first),
        .O(TCapt__0[16]));
  (* SOFT_HLUTNM = "soft_lutpair1552" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[17]_i_1__2 
       (.I0(in12[17]),
        .I1(first),
        .O(TCapt__0[17]));
  (* SOFT_HLUTNM = "soft_lutpair1551" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[18]_i_1__2 
       (.I0(in12[18]),
        .I1(first),
        .O(TCapt__0[18]));
  (* SOFT_HLUTNM = "soft_lutpair1551" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[19]_i_1__2 
       (.I0(in12[19]),
        .I1(first),
        .O(TCapt__0[19]));
  (* SOFT_HLUTNM = "soft_lutpair1560" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[1]_i_1__2 
       (.I0(in12[1]),
        .I1(first),
        .O(TCapt__0[1]));
  (* SOFT_HLUTNM = "soft_lutpair1550" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[20]_i_1__2 
       (.I0(in12[20]),
        .I1(first),
        .O(TCapt__0[20]));
  (* SOFT_HLUTNM = "soft_lutpair1550" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[21]_i_1__2 
       (.I0(in12[21]),
        .I1(first),
        .O(TCapt__0[21]));
  (* SOFT_HLUTNM = "soft_lutpair1549" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[22]_i_1__2 
       (.I0(in12[22]),
        .I1(first),
        .O(TCapt__0[22]));
  (* SOFT_HLUTNM = "soft_lutpair1549" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[23]_i_1__2 
       (.I0(in12[23]),
        .I1(first),
        .O(TCapt__0[23]));
  (* SOFT_HLUTNM = "soft_lutpair1548" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[24]_i_1__2 
       (.I0(in12[24]),
        .I1(first),
        .O(TCapt__0[24]));
  (* SOFT_HLUTNM = "soft_lutpair1548" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[25]_i_1__2 
       (.I0(in12[25]),
        .I1(first),
        .O(TCapt__0[25]));
  (* SOFT_HLUTNM = "soft_lutpair1547" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[26]_i_1__2 
       (.I0(in12[26]),
        .I1(first),
        .O(TCapt__0[26]));
  (* SOFT_HLUTNM = "soft_lutpair1547" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[27]_i_1__2 
       (.I0(in12[27]),
        .I1(first),
        .O(TCapt__0[27]));
  (* SOFT_HLUTNM = "soft_lutpair1546" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[28]_i_1__2 
       (.I0(in12[28]),
        .I1(first),
        .O(TCapt__0[28]));
  (* SOFT_HLUTNM = "soft_lutpair1546" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[29]_i_1__2 
       (.I0(in12[29]),
        .I1(first),
        .O(TCapt__0[29]));
  (* SOFT_HLUTNM = "soft_lutpair1559" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[2]_i_1__2 
       (.I0(in12[2]),
        .I1(first),
        .O(TCapt__0[2]));
  (* SOFT_HLUTNM = "soft_lutpair1545" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[30]_i_1__2 
       (.I0(in12[30]),
        .I1(first),
        .O(TCapt__0[30]));
  (* SOFT_HLUTNM = "soft_lutpair1545" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[31]_i_1__2 
       (.I0(in12[31]),
        .I1(first),
        .O(TCapt__0[31]));
  (* SOFT_HLUTNM = "soft_lutpair1559" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[3]_i_1__2 
       (.I0(in12[3]),
        .I1(first),
        .O(TCapt__0[3]));
  (* SOFT_HLUTNM = "soft_lutpair1558" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[4]_i_1__2 
       (.I0(in12[4]),
        .I1(first),
        .O(TCapt__0[4]));
  (* SOFT_HLUTNM = "soft_lutpair1558" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[5]_i_1__2 
       (.I0(in12[5]),
        .I1(first),
        .O(TCapt__0[5]));
  (* SOFT_HLUTNM = "soft_lutpair1557" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[6]_i_1__2 
       (.I0(in12[6]),
        .I1(first),
        .O(TCapt__0[6]));
  (* SOFT_HLUTNM = "soft_lutpair1557" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[7]_i_1__2 
       (.I0(in12[7]),
        .I1(first),
        .O(TCapt__0[7]));
  (* SOFT_HLUTNM = "soft_lutpair1556" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[8]_i_1__2 
       (.I0(in12[8]),
        .I1(first),
        .O(TCapt__0[8]));
  (* SOFT_HLUTNM = "soft_lutpair1556" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[9]_i_1__2 
       (.I0(in12[9]),
        .I1(first),
        .O(TCapt__0[9]));
  FDCE \TCapt_reg[0] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[0]),
        .Q(Q[0]));
  FDCE \TCapt_reg[10] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[10]),
        .Q(Q[10]));
  FDCE \TCapt_reg[11] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[11]),
        .Q(Q[11]));
  FDCE \TCapt_reg[12] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[12]),
        .Q(Q[12]));
  FDCE \TCapt_reg[13] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[13]),
        .Q(Q[13]));
  FDCE \TCapt_reg[14] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[14]),
        .Q(Q[14]));
  FDCE \TCapt_reg[15] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[15]),
        .Q(Q[15]));
  FDCE \TCapt_reg[16] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[16]),
        .Q(Q[16]));
  FDCE \TCapt_reg[17] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[17]),
        .Q(Q[17]));
  FDCE \TCapt_reg[18] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[18]),
        .Q(Q[18]));
  FDCE \TCapt_reg[19] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[19]),
        .Q(Q[19]));
  FDCE \TCapt_reg[1] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[1]),
        .Q(Q[1]));
  FDCE \TCapt_reg[20] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[20]),
        .Q(Q[20]));
  FDCE \TCapt_reg[21] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[21]),
        .Q(Q[21]));
  FDCE \TCapt_reg[22] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[22]),
        .Q(Q[22]));
  FDCE \TCapt_reg[23] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[23]),
        .Q(Q[23]));
  FDCE \TCapt_reg[24] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[24]),
        .Q(Q[24]));
  FDCE \TCapt_reg[25] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[25]),
        .Q(Q[25]));
  FDCE \TCapt_reg[26] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[26]),
        .Q(Q[26]));
  FDCE \TCapt_reg[27] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[27]),
        .Q(Q[27]));
  FDCE \TCapt_reg[28] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[28]),
        .Q(Q[28]));
  FDCE \TCapt_reg[29] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[29]),
        .Q(Q[29]));
  FDCE \TCapt_reg[2] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[2]),
        .Q(Q[2]));
  FDCE \TCapt_reg[30] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[30]),
        .Q(Q[30]));
  FDCE \TCapt_reg[31] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[31]),
        .Q(Q[31]));
  FDCE \TCapt_reg[3] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[3]),
        .Q(Q[3]));
  FDCE \TCapt_reg[4] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[4]),
        .Q(Q[4]));
  FDCE \TCapt_reg[5] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[5]),
        .Q(Q[5]));
  FDCE \TCapt_reg[6] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[6]),
        .Q(Q[6]));
  FDCE \TCapt_reg[7] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[7]),
        .Q(Q[7]));
  FDCE \TCapt_reg[8] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[8]),
        .Q(Q[8]));
  FDCE \TCapt_reg[9] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(TCapt__0[9]),
        .Q(Q[9]));
  LUT3 #(
    .INIT(8'h54)) 
    \aSeqbufB[0]_i_1__2 
       (.I0(\aSeqbufB_reg_n_0_[0] ),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[0]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1523" *) 
  LUT4 #(
    .INIT(16'h6660)) 
    \aSeqbufB[1]_i_1__2 
       (.I0(\aSeqbufB_reg_n_0_[1] ),
        .I1(\aSeqbufB_reg_n_0_[0] ),
        .I2(stateSeqbufB_reg[1]),
        .I3(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[1]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1523" *) 
  LUT5 #(
    .INIT(32'h78787800)) 
    \aSeqbufB[2]_i_1__2 
       (.I0(\aSeqbufB_reg_n_0_[0] ),
        .I1(\aSeqbufB_reg_n_0_[1] ),
        .I2(\aSeqbufB_reg_n_0_[2] ),
        .I3(stateSeqbufB_reg[1]),
        .I4(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[2]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'h00007F80)) 
    \aSeqbufB[3]_i_1__2 
       (.I0(\aSeqbufB_reg_n_0_[2] ),
        .I1(\aSeqbufB_reg_n_0_[1] ),
        .I2(\aSeqbufB_reg_n_0_[0] ),
        .I3(\aSeqbufB_reg_n_0_[3] ),
        .I4(\aSeqbufB[8]_i_3__2_n_0 ),
        .O(\aSeqbufB[3]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \aSeqbufB[4]_i_1__2 
       (.I0(\aSeqbufB[8]_i_3__2_n_0 ),
        .I1(\aSeqbufB_reg_n_0_[3] ),
        .I2(\aSeqbufB_reg_n_0_[0] ),
        .I3(\aSeqbufB_reg_n_0_[1] ),
        .I4(\aSeqbufB_reg_n_0_[2] ),
        .I5(\aSeqbufB_reg_n_0_[4] ),
        .O(\aSeqbufB[4]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1524" *) 
  LUT4 #(
    .INIT(16'h0EE0)) 
    \aSeqbufB[5]_i_1__2 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(\aSeqbufB[5]_i_2__2_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[5] ),
        .O(\aSeqbufB[5]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aSeqbufB[5]_i_2__2 
       (.I0(\aSeqbufB_reg_n_0_[4] ),
        .I1(\aSeqbufB_reg_n_0_[2] ),
        .I2(\aSeqbufB_reg_n_0_[1] ),
        .I3(\aSeqbufB_reg_n_0_[0] ),
        .I4(\aSeqbufB_reg_n_0_[3] ),
        .O(\aSeqbufB[5]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1490" *) 
  LUT4 #(
    .INIT(16'h0EE0)) 
    \aSeqbufB[6]_i_1__2 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(\aSeqbufB[8]_i_4__2_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[6] ),
        .O(\aSeqbufB[6]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1490" *) 
  LUT5 #(
    .INIT(32'h0EEEE000)) 
    \aSeqbufB[7]_i_1__2 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(\aSeqbufB[8]_i_4__2_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[6] ),
        .I4(\aSeqbufB_reg_n_0_[7] ),
        .O(\aSeqbufB[7]_i_1__2_n_0 ));
  LUT4 #(
    .INIT(16'h4101)) 
    \aSeqbufB[8]_i_1__2 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(\stateSeqbufB[1]_i_2__2_n_0 ),
        .O(\aSeqbufB[8]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1486" *) 
  LUT5 #(
    .INIT(32'h15554000)) 
    \aSeqbufB[8]_i_2__2 
       (.I0(\aSeqbufB[8]_i_3__2_n_0 ),
        .I1(\aSeqbufB_reg_n_0_[6] ),
        .I2(\aSeqbufB[8]_i_4__2_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[7] ),
        .I4(\aSeqbufB_reg_n_0_[8] ),
        .O(\aSeqbufB[8]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1533" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \aSeqbufB[8]_i_3__2 
       (.I0(stateSeqbufB_reg[0]),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[1]),
        .O(\aSeqbufB[8]_i_3__2_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aSeqbufB[8]_i_4__2 
       (.I0(\aSeqbufB_reg_n_0_[3] ),
        .I1(\aSeqbufB_reg_n_0_[0] ),
        .I2(\aSeqbufB_reg_n_0_[1] ),
        .I3(\aSeqbufB_reg_n_0_[2] ),
        .I4(\aSeqbufB_reg_n_0_[4] ),
        .I5(\aSeqbufB_reg_n_0_[5] ),
        .O(\aSeqbufB[8]_i_4__2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbufB[0]_i_1__2_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbufB[1]_i_1__2_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbufB[2]_i_1__2_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[3] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbufB[3]_i_1__2_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[4] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbufB[4]_i_1__2_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[5] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbufB[5]_i_1__2_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[6] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbufB[6]_i_1__2_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[7] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbufB[7]_i_1__2_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[8] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbufB[8]_i_2__2_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[8] ));
  LUT6 #(
    .INIT(64'h5555555550515150)) 
    \aSeqbuf[0]_i_1__2 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I2(ackSeqbufBToSeqClear),
        .I3(rdySeq),
        .I4(TCapt),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\aSeqbuf[0]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1538" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \aSeqbuf[1]_i_1__2 
       (.I0(\aSeqbuf_reg_n_0_[1] ),
        .I1(\aSeqbuf_reg_n_0_[0] ),
        .I2(\aSeqbuf[9]_i_6__2_n_0 ),
        .O(\aSeqbuf[1]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1494" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \aSeqbuf[2]_i_1__2 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(\aSeqbuf_reg_n_0_[1] ),
        .I2(\aSeqbuf_reg_n_0_[2] ),
        .I3(\aSeqbuf[9]_i_6__2_n_0 ),
        .O(\aSeqbuf[2]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1494" *) 
  LUT5 #(
    .INIT(32'h00007F80)) 
    \aSeqbuf[3]_i_1__2 
       (.I0(\aSeqbuf_reg_n_0_[2] ),
        .I1(\aSeqbuf_reg_n_0_[1] ),
        .I2(\aSeqbuf_reg_n_0_[0] ),
        .I3(\aSeqbuf_reg_n_0_[3] ),
        .I4(\aSeqbuf[9]_i_6__2_n_0 ),
        .O(\aSeqbuf[3]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h000000007FFF8000)) 
    \aSeqbuf[4]_i_1__2 
       (.I0(\aSeqbuf_reg_n_0_[3] ),
        .I1(\aSeqbuf_reg_n_0_[0] ),
        .I2(\aSeqbuf_reg_n_0_[1] ),
        .I3(\aSeqbuf_reg_n_0_[2] ),
        .I4(\aSeqbuf_reg_n_0_[4] ),
        .I5(\aSeqbuf[9]_i_6__2_n_0 ),
        .O(\aSeqbuf[4]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'h00007F80)) 
    \aSeqbuf[5]_i_1__2 
       (.I0(\aSeqbuf[6]_i_2_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[3] ),
        .I2(\aSeqbuf_reg_n_0_[4] ),
        .I3(\aSeqbuf_reg_n_0_[5] ),
        .I4(\aSeqbuf[9]_i_6__2_n_0 ),
        .O(\aSeqbuf[5]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \aSeqbuf[6]_i_1__2 
       (.I0(\aSeqbuf[7]_i_2_n_0 ),
        .I1(\aSeqbuf[6]_i_2_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[3] ),
        .I3(\aSeqbuf_reg_n_0_[5] ),
        .I4(\aSeqbuf_reg_n_0_[4] ),
        .I5(\aSeqbuf_reg_n_0_[6] ),
        .O(\aSeqbuf[6]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1538" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \aSeqbuf[6]_i_2 
       (.I0(\aSeqbuf_reg_n_0_[2] ),
        .I1(\aSeqbuf_reg_n_0_[1] ),
        .I2(\aSeqbuf_reg_n_0_[0] ),
        .O(\aSeqbuf[6]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1528" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \aSeqbuf[7]_i_1__2 
       (.I0(\aSeqbuf[7]_i_2_n_0 ),
        .I1(\aSeqbuf[8]_i_2__2_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[6] ),
        .I3(\aSeqbuf_reg_n_0_[7] ),
        .O(\aSeqbuf[7]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h000000007F55FFFF)) 
    \aSeqbuf[7]_i_2 
       (.I0(\aSeqbuf[8]_i_5__0_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[7] ),
        .I2(\aSeqbuf_reg_n_0_[6] ),
        .I3(\aSeqbuf_reg_n_0_[8] ),
        .I4(\aSeqbuf[7]_i_3_n_0 ),
        .I5(\aSeqbuf[9]_i_6__2_n_0 ),
        .O(\aSeqbuf[7]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1495" *) 
  LUT5 #(
    .INIT(32'h11111101)) 
    \aSeqbuf[7]_i_3 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(ackSeqbufBToSeqClear),
        .I2(rdySeq),
        .I3(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I4(TCapt),
        .O(\aSeqbuf[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00006CCC)) 
    \aSeqbuf[8]_i_1__2 
       (.I0(\aSeqbuf_reg_n_0_[7] ),
        .I1(\aSeqbuf_reg_n_0_[8] ),
        .I2(\aSeqbuf[8]_i_2__2_n_0 ),
        .I3(\aSeqbuf_reg_n_0_[6] ),
        .I4(\aSeqbuf[8]_i_3__1_n_0 ),
        .I5(\aSeqbuf[8]_i_4__1_n_0 ),
        .O(\aSeqbuf[8]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aSeqbuf[8]_i_2__2 
       (.I0(\aSeqbuf_reg_n_0_[2] ),
        .I1(\aSeqbuf_reg_n_0_[1] ),
        .I2(\aSeqbuf_reg_n_0_[0] ),
        .I3(\aSeqbuf_reg_n_0_[3] ),
        .I4(\aSeqbuf_reg_n_0_[5] ),
        .I5(\aSeqbuf_reg_n_0_[4] ),
        .O(\aSeqbuf[8]_i_2__2_n_0 ));
  LUT6 #(
    .INIT(64'h0033003200330003)) 
    \aSeqbuf[8]_i_3__1 
       (.I0(\aSeqbuf[8]_i_5__0_n_0 ),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I2(rdySeq),
        .I3(ackSeqbufBToSeqClear),
        .I4(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I5(TCapt),
        .O(\aSeqbuf[8]_i_3__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1496" *) 
  LUT5 #(
    .INIT(32'h00008000)) 
    \aSeqbuf[8]_i_4__1 
       (.I0(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[8] ),
        .I2(\aSeqbuf_reg_n_0_[7] ),
        .I3(\aSeqbuf_reg_n_0_[9] ),
        .I4(\aSeqbuf_reg_n_0_[6] ),
        .O(\aSeqbuf[8]_i_4__1_n_0 ));
  LUT5 #(
    .INIT(32'h08000000)) 
    \aSeqbuf[8]_i_5__0 
       (.I0(\aSeqbuf_reg_n_0_[3] ),
        .I1(\aSeqbuf[6]_i_2_n_0 ),
        .I2(\aSeqbuf[8]_i_6_n_0 ),
        .I3(\aSeqbuf_reg_n_0_[4] ),
        .I4(\aSeqbuf_reg_n_0_[5] ),
        .O(\aSeqbuf[8]_i_5__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1496" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    \aSeqbuf[8]_i_6 
       (.I0(\aSeqbuf_reg_n_0_[8] ),
        .I1(\aSeqbuf_reg_n_0_[7] ),
        .I2(\aSeqbuf_reg_n_0_[9] ),
        .O(\aSeqbuf[8]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \aSeqbuf[9]_i_10 
       (.I0(\aSeqbuf[7]_i_3_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[8] ),
        .I2(\aSeqbuf_reg_n_0_[7] ),
        .I3(\aSeqbuf_reg_n_0_[1] ),
        .I4(\aSeqbuf_reg_n_0_[4] ),
        .I5(\aSeqbuf_reg_n_0_[5] ),
        .O(\aSeqbuf[9]_i_10_n_0 ));
  LUT4 #(
    .INIT(16'hFFAE)) 
    \aSeqbuf[9]_i_1__2 
       (.I0(\aSeqbuf[9]_i_3__2_n_0 ),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I2(\FSM_onehot_stateSeq[5]_i_5__2_n_0 ),
        .I3(\aSeqbuf[9]_i_4__1_n_0 ),
        .O(\aSeqbuf[9]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h0130110011001100)) 
    \aSeqbuf[9]_i_2__2 
       (.I0(\aSeqbuf[9]_i_5__2_n_0 ),
        .I1(\aSeqbuf[9]_i_6__2_n_0 ),
        .I2(\aSeqbuf[9]_i_7__1_n_0 ),
        .I3(\aSeqbuf_reg_n_0_[9] ),
        .I4(\aSeqbuf_reg_n_0_[7] ),
        .I5(\aSeqbuf_reg_n_0_[8] ),
        .O(\aSeqbuf[9]_i_2__2_n_0 ));
  LUT6 #(
    .INIT(64'h008000800080AAAA)) 
    \aSeqbuf[9]_i_3__2 
       (.I0(\quad[23]_i_3_n_0 ),
        .I1(\burstCnt[3]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_3__1_n_0 ),
        .I3(first__0),
        .I4(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I5(TCapt),
        .O(\aSeqbuf[9]_i_3__2_n_0 ));
  LUT6 #(
    .INIT(64'h0300020003000000)) 
    \aSeqbuf[9]_i_4__1 
       (.I0(rdySeq),
        .I1(ackSeqbufBToSeqClear),
        .I2(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I3(\aSeqbuf[9]_i_8_n_0 ),
        .I4(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I5(TCapt),
        .O(\aSeqbuf[9]_i_4__1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000008F0000)) 
    \aSeqbuf[9]_i_5__2 
       (.I0(\aSeqbuf_reg_n_0_[7] ),
        .I1(\aSeqbuf_reg_n_0_[6] ),
        .I2(\aSeqbuf_reg_n_0_[8] ),
        .I3(\aSeqbuf[9]_i_9_n_0 ),
        .I4(\aSeqbuf[6]_i_2_n_0 ),
        .I5(\aSeqbuf[9]_i_10_n_0 ),
        .O(\aSeqbuf[9]_i_5__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1495" *) 
  LUT5 #(
    .INIT(32'h00550041)) 
    \aSeqbuf[9]_i_6__2 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(TCapt),
        .I2(rdySeq),
        .I3(ackSeqbufBToSeqClear),
        .I4(\FSM_onehot_stateSeq_reg[3]_0 ),
        .O(\aSeqbuf[9]_i_6__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1489" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \aSeqbuf[9]_i_7__1 
       (.I0(\aSeqbuf_reg_n_0_[4] ),
        .I1(\aSeqbuf_reg_n_0_[5] ),
        .I2(\aSeqbuf_reg_n_0_[3] ),
        .I3(\aSeqbuf[6]_i_2_n_0 ),
        .I4(\aSeqbuf_reg_n_0_[6] ),
        .O(\aSeqbuf[9]_i_7__1_n_0 ));
  LUT6 #(
    .INIT(64'h08080808FF080808)) 
    \aSeqbuf[9]_i_8 
       (.I0(stateOp[1]),
        .I1(stateOp[2]),
        .I2(stateOp[0]),
        .I3(stateSeqbufB_reg[2]),
        .I4(stateSeqbufB_reg[0]),
        .I5(stateSeqbufB_reg[1]),
        .O(\aSeqbuf[9]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1489" *) 
  LUT3 #(
    .INIT(8'h2A)) 
    \aSeqbuf[9]_i_9 
       (.I0(\aSeqbuf_reg_n_0_[5] ),
        .I1(\aSeqbuf_reg_n_0_[3] ),
        .I2(\aSeqbuf_reg_n_0_[4] ),
        .O(\aSeqbuf[9]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[0]_i_1__2_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[1]_i_1__2_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[2]_i_1__2_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[3]_i_1__2_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[4]_i_1__2_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[5]_i_1__2_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[6]_i_1__2_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[7]_i_1__2_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[8] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[8]_i_1__2_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[9] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[9]_i_2__2_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'hFFFFFFF3AAAAA2A2)) 
    ackInvSelect_sig_i_1__2
       (.I0(reqInvSelect),
        .I1(stateOp[0]),
        .I2(stateOp[2]),
        .I3(ackInvSelect_sig_reg_0),
        .I4(stateOp[1]),
        .I5(ackInvCputrackSelect),
        .O(ackInvSelect_sig_i_1__2_n_0));
  FDCE ackInvSelect_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(ackInvSelect_sig_i_1__2_n_0),
        .Q(ackInvCputrackSelect));
  LUT6 #(
    .INIT(64'hAFAAAFAAAFAAA200)) 
    ackInvSet_sig_i_1__7
       (.I0(ackInvCputrackSet),
        .I1(ackInvCputrackSelect),
        .I2(reqInvSelect),
        .I3(reqInvCputrackSet),
        .I4(ackInvSet_sig_i_2__4_n_0),
        .I5(stateOp[1]),
        .O(ackInvSet_sig_i_1__7_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1543" *) 
  LUT2 #(
    .INIT(4'hB)) 
    ackInvSet_sig_i_2__4
       (.I0(stateOp[2]),
        .I1(stateOp[0]),
        .O(ackInvSet_sig_i_2__4_n_0));
  FDCE ackInvSet_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(ackInvSet_sig_i_1__7_n_0),
        .Q(ackInvCputrackSet));
  (* SOFT_HLUTNM = "soft_lutpair1526" *) 
  LUT4 #(
    .INIT(16'h0D00)) 
    \burstCnt[0]_i_1__2 
       (.I0(\burstCnt_reg_n_0_[0] ),
        .I1(\burstCnt[15]_i_5__2_n_0 ),
        .I2(first),
        .I3(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstCnt[0]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1540" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[10]_i_1__2 
       (.I0(first),
        .I1(\burstCnt[10]_i_2__1_n_0 ),
        .O(\burstCnt[10]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1504" *) 
  LUT4 #(
    .INIT(16'hDF75)) 
    \burstCnt[10]_i_2__1 
       (.I0(\burstCnt[15]_i_4__2_n_0 ),
        .I1(\burstCnt[15]_i_5__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[10] ),
        .I3(\burstCnt[9]_i_2__2_n_0 ),
        .O(\burstCnt[10]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1539" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[11]_i_1__2 
       (.I0(first),
        .I1(\burstCnt[11]_i_2__2_n_0 ),
        .O(\burstCnt[11]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1504" *) 
  LUT5 #(
    .INIT(32'hFF5DFFF7)) 
    \burstCnt[11]_i_2__2 
       (.I0(\burstCnt[15]_i_4__2_n_0 ),
        .I1(\burstCnt_reg_n_0_[10] ),
        .I2(\burstCnt[9]_i_2__2_n_0 ),
        .I3(\burstCnt[15]_i_5__2_n_0 ),
        .I4(\burstCnt_reg_n_0_[11] ),
        .O(\burstCnt[11]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1539" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[12]_i_1__2 
       (.I0(first),
        .I1(\burstCnt[12]_i_2__1_n_0 ),
        .O(\burstCnt[12]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hF7F7F7F7FDF7F7F7)) 
    \burstCnt[12]_i_2__1 
       (.I0(\burstCnt[15]_i_4__2_n_0 ),
        .I1(\burstCnt_reg_n_0_[12] ),
        .I2(\burstCnt[15]_i_5__2_n_0 ),
        .I3(\burstCnt_reg_n_0_[11] ),
        .I4(\burstCnt_reg_n_0_[10] ),
        .I5(\burstCnt[9]_i_2__2_n_0 ),
        .O(\burstCnt[12]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1526" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[13]_i_1__2 
       (.I0(first),
        .I1(\burstCnt[13]_i_2__0_n_0 ),
        .O(\burstCnt[13]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'hFFD5FF7F)) 
    \burstCnt[13]_i_2__0 
       (.I0(\burstCnt[15]_i_4__2_n_0 ),
        .I1(\burstCnt_reg_n_0_[12] ),
        .I2(\burstCnt[13]_i_3_n_0 ),
        .I3(\burstCnt[15]_i_5__2_n_0 ),
        .I4(\burstCnt_reg_n_0_[13] ),
        .O(\burstCnt[13]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000200000000000)) 
    \burstCnt[13]_i_3 
       (.I0(\burstCnt_reg_n_0_[11] ),
        .I1(\burstCnt[15]_i_5__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[10] ),
        .I3(\burstCnt_reg_n_0_[8] ),
        .I4(\burstCnt[13]_i_4_n_0 ),
        .I5(\burstCnt_reg_n_0_[9] ),
        .O(\burstCnt[13]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFBFFFFFFFFFFFFF)) 
    \burstCnt[13]_i_4 
       (.I0(\burstCnt[9]_i_4_n_0 ),
        .I1(\burstCnt[13]_i_5_n_0 ),
        .I2(\burstCnt[15]_i_14__0_n_0 ),
        .I3(\burstCnt[15]_i_13__1_n_0 ),
        .I4(\burstCnt_reg_n_0_[5] ),
        .I5(\burstCnt_reg_n_0_[4] ),
        .O(\burstCnt[13]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1506" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \burstCnt[13]_i_5 
       (.I0(\burstCnt_reg_n_0_[3] ),
        .I1(\burstCnt_reg_n_0_[0] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[2] ),
        .O(\burstCnt[13]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1487" *) 
  LUT5 #(
    .INIT(32'h44140000)) 
    \burstCnt[14]_i_1__2 
       (.I0(first),
        .I1(\burstCnt[15]_i_6__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[14] ),
        .I3(\burstCnt[15]_i_5__2_n_0 ),
        .I4(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstCnt[14]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF12333312)) 
    \burstCnt[15]_i_10__2 
       (.I0(\quad_reg_n_0_[7] ),
        .I1(\quad[7]_i_3_n_0 ),
        .I2(state[7]),
        .I3(\quad_reg_n_0_[0] ),
        .I4(state[0]),
        .I5(\burstCnt[15]_i_19__0_n_0 ),
        .O(\burstCnt[15]_i_10__2_n_0 ));
  LUT6 #(
    .INIT(64'hABAEAFAFAFAFABAE)) 
    \burstCnt[15]_i_11__2 
       (.I0(\burstCnt[15]_i_20__0_n_0 ),
        .I1(\quad_reg_n_0_[8] ),
        .I2(\burstCnt[15]_i_15__0_n_0 ),
        .I3(state[0]),
        .I4(\quad_reg_n_0_[10] ),
        .I5(state[2]),
        .O(\burstCnt[15]_i_11__2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF666F66F6)) 
    \burstCnt[15]_i_12__2 
       (.I0(state[5]),
        .I1(\dwrSeqbuf[13]_i_2__0_n_0 ),
        .I2(\quad_reg_n_0_[1] ),
        .I3(\quad[7]_i_3_n_0 ),
        .I4(state[1]),
        .I5(\burstCnt[15]_i_21__0_n_0 ),
        .O(\burstCnt[15]_i_12__2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF6FF6)) 
    \burstCnt[15]_i_13__1 
       (.I0(state[6]),
        .I1(\burstState_reg_n_0_[6] ),
        .I2(state[7]),
        .I3(\burstState_reg_n_0_[7] ),
        .I4(\burstCnt[15]_i_22__0_n_0 ),
        .I5(\burstCnt[15]_i_23__0_n_0 ),
        .O(\burstCnt[15]_i_13__1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF7FFF)) 
    \burstCnt[15]_i_14__0 
       (.I0(\burstCnt_reg_n_0_[4] ),
        .I1(\burstCnt_reg_n_0_[5] ),
        .I2(\burstCnt_reg_n_0_[9] ),
        .I3(\burstCnt_reg_n_0_[10] ),
        .I4(\burstCnt[15]_i_24__0_n_0 ),
        .I5(\burstCnt[15]_i_25__0_n_0 ),
        .O(\burstCnt[15]_i_14__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1502" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \burstCnt[15]_i_15__0 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .O(\burstCnt[15]_i_15__0_n_0 ));
  LUT6 #(
    .INIT(64'h6F0F6F66F6F0F666)) 
    \burstCnt[15]_i_16__0 
       (.I0(state[4]),
        .I1(\quad_reg_n_0_[20] ),
        .I2(state[5]),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[1] ),
        .I5(\quad_reg_n_0_[5] ),
        .O(\burstCnt[15]_i_16__0_n_0 ));
  LUT6 #(
    .INIT(64'h6F6F660FF6F666F0)) 
    \burstCnt[15]_i_17__0 
       (.I0(state[6]),
        .I1(\quad_reg_n_0_[6] ),
        .I2(state[5]),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[0] ),
        .I5(\quad_reg_n_0_[21] ),
        .O(\burstCnt[15]_i_17__0_n_0 ));
  LUT6 #(
    .INIT(64'h6F6F660FF6F666F0)) 
    \burstCnt[15]_i_18__0 
       (.I0(state[3]),
        .I1(\quad_reg_n_0_[3] ),
        .I2(state[7]),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[1] ),
        .I5(\quad_reg_n_0_[15] ),
        .O(\burstCnt[15]_i_18__0_n_0 ));
  LUT6 #(
    .INIT(64'h6F6F660FF6F666F0)) 
    \burstCnt[15]_i_19__0 
       (.I0(state[4]),
        .I1(\quad_reg_n_0_[4] ),
        .I2(state[0]),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[0] ),
        .I5(\quad_reg_n_0_[16] ),
        .O(\burstCnt[15]_i_19__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000010000000101)) 
    \burstCnt[15]_i_1__2 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(rdySeq),
        .I2(ackSeqbufBToSeqClear),
        .I3(\burstCnt[15]_i_3__1_n_0 ),
        .I4(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I5(TCapt),
        .O(\burstCnt[15]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h6F0F666FF6F066F6)) 
    \burstCnt[15]_i_20__0 
       (.I0(state[6]),
        .I1(\quad_reg_n_0_[22] ),
        .I2(state[3]),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[1] ),
        .I5(\quad_reg_n_0_[11] ),
        .O(\burstCnt[15]_i_20__0_n_0 ));
  LUT6 #(
    .INIT(64'h6F0F666FF6F066F6)) 
    \burstCnt[15]_i_21__0 
       (.I0(state[7]),
        .I1(\quad_reg_n_0_[23] ),
        .I2(state[4]),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[1] ),
        .I5(\quad_reg_n_0_[12] ),
        .O(\burstCnt[15]_i_21__0_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \burstCnt[15]_i_22__0 
       (.I0(\burstState_reg_n_0_[0] ),
        .I1(state[0]),
        .I2(state[1]),
        .I3(\burstState_reg_n_0_[1] ),
        .I4(state[2]),
        .I5(\burstState_reg_n_0_[2] ),
        .O(\burstCnt[15]_i_22__0_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \burstCnt[15]_i_23__0 
       (.I0(\burstState_reg_n_0_[3] ),
        .I1(state[3]),
        .I2(state[4]),
        .I3(\burstState_reg_n_0_[4] ),
        .I4(state[5]),
        .I5(\burstState_reg_n_0_[5] ),
        .O(\burstCnt[15]_i_23__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1532" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    \burstCnt[15]_i_24__0 
       (.I0(\burstCnt_reg_n_0_[7] ),
        .I1(\burstCnt_reg_n_0_[6] ),
        .I2(\burstCnt_reg_n_0_[13] ),
        .I3(\burstCnt_reg_n_0_[12] ),
        .O(\burstCnt[15]_i_24__0_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \burstCnt[15]_i_25__0 
       (.I0(\burstCnt_reg_n_0_[15] ),
        .I1(\burstCnt_reg_n_0_[11] ),
        .I2(\burstCnt_reg_n_0_[14] ),
        .I3(\burstCnt_reg_n_0_[8] ),
        .O(\burstCnt[15]_i_25__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000444000004040)) 
    \burstCnt[15]_i_2__2 
       (.I0(first),
        .I1(\burstCnt[15]_i_4__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[15] ),
        .I3(\burstCnt_reg_n_0_[14] ),
        .I4(\burstCnt[15]_i_5__2_n_0 ),
        .I5(\burstCnt[15]_i_6__2_n_0 ),
        .O(\burstCnt[15]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1499" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCnt[15]_i_3__1 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .O(\burstCnt[15]_i_3__1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000004)) 
    \burstCnt[15]_i_4__2 
       (.I0(\burstCnt[15]_i_7__2_n_0 ),
        .I1(\burstCnt[15]_i_8__2_n_0 ),
        .I2(\burstCnt[15]_i_9__2_n_0 ),
        .I3(\burstCnt[15]_i_10__2_n_0 ),
        .I4(\burstCnt[15]_i_11__2_n_0 ),
        .I5(\burstCnt[15]_i_12__2_n_0 ),
        .O(\burstCnt[15]_i_4__2_n_0 ));
  LUT6 #(
    .INIT(64'hBAAAAAAAAAAAAAAA)) 
    \burstCnt[15]_i_5__2 
       (.I0(\burstCnt[15]_i_13__1_n_0 ),
        .I1(\burstCnt[15]_i_14__0_n_0 ),
        .I2(\burstCnt_reg_n_0_[3] ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt_reg_n_0_[1] ),
        .I5(\burstCnt_reg_n_0_[2] ),
        .O(\burstCnt[15]_i_5__2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000008000000)) 
    \burstCnt[15]_i_6__2 
       (.I0(\burstCnt_reg_n_0_[13] ),
        .I1(\burstCnt_reg_n_0_[12] ),
        .I2(\burstCnt[15]_i_5__2_n_0 ),
        .I3(\burstCnt_reg_n_0_[11] ),
        .I4(\burstCnt_reg_n_0_[10] ),
        .I5(\burstCnt[9]_i_2__2_n_0 ),
        .O(\burstCnt[15]_i_6__2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF12333312)) 
    \burstCnt[15]_i_7__2 
       (.I0(\quad_reg_n_0_[14] ),
        .I1(\burstCnt[15]_i_15__0_n_0 ),
        .I2(state[6]),
        .I3(\quad_reg_n_0_[9] ),
        .I4(state[1]),
        .I5(\burstCnt[15]_i_16__0_n_0 ),
        .O(\burstCnt[15]_i_7__2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000AB040857)) 
    \burstCnt[15]_i_8__2 
       (.I0(\quad_reg_n_0_[2] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[2]),
        .I4(\quad_reg_n_0_[18] ),
        .I5(\burstCnt[15]_i_17__0_n_0 ),
        .O(\burstCnt[15]_i_8__2_n_0 ));
  LUT6 #(
    .INIT(64'hABAEAFAFAFAFABAE)) 
    \burstCnt[15]_i_9__2 
       (.I0(\burstCnt[15]_i_18__0_n_0 ),
        .I1(\quad_reg_n_0_[17] ),
        .I2(\dwrSeqbuf[23]_i_2__0_n_0 ),
        .I3(state[1]),
        .I4(\quad_reg_n_0_[19] ),
        .I5(state[3]),
        .O(\burstCnt[15]_i_9__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1492" *) 
  LUT5 #(
    .INIT(32'h00000D0A)) 
    \burstCnt[1]_i_1__2 
       (.I0(\burstCnt_reg_n_0_[0] ),
        .I1(\burstCnt[15]_i_5__2_n_0 ),
        .I2(first),
        .I3(\burstCnt_reg_n_0_[1] ),
        .I4(\burstCnt[3]_i_2_n_0 ),
        .O(\burstCnt[1]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h0004040404000000)) 
    \burstCnt[2]_i_1__2 
       (.I0(first),
        .I1(\burstCnt[15]_i_4__2_n_0 ),
        .I2(\burstCnt[15]_i_5__2_n_0 ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt_reg_n_0_[1] ),
        .I5(\burstCnt_reg_n_0_[2] ),
        .O(\burstCnt[2]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000014444444)) 
    \burstCnt[3]_i_1__2 
       (.I0(first),
        .I1(\burstCnt_reg_n_0_[3] ),
        .I2(\burstCnt_reg_n_0_[0] ),
        .I3(\burstCnt_reg_n_0_[1] ),
        .I4(\burstCnt_reg_n_0_[2] ),
        .I5(\burstCnt[3]_i_2_n_0 ),
        .O(\burstCnt[3]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1488" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \burstCnt[3]_i_2 
       (.I0(\burstCnt[15]_i_5__2_n_0 ),
        .I1(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstCnt[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1542" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[4]_i_1__2 
       (.I0(first),
        .I1(\burstCnt[4]_i_2__2_n_0 ),
        .O(\burstCnt[4]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hEAAAAAAABFFFFFFF)) 
    \burstCnt[4]_i_2__2 
       (.I0(\burstCnt[3]_i_2_n_0 ),
        .I1(\burstCnt_reg_n_0_[3] ),
        .I2(\burstCnt_reg_n_0_[0] ),
        .I3(\burstCnt_reg_n_0_[1] ),
        .I4(\burstCnt_reg_n_0_[2] ),
        .I5(\burstCnt_reg_n_0_[4] ),
        .O(\burstCnt[4]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1541" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[5]_i_1__2 
       (.I0(first),
        .I1(\burstCnt[5]_i_2__2_n_0 ),
        .O(\burstCnt[5]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1505" *) 
  LUT4 #(
    .INIT(16'hFF7D)) 
    \burstCnt[5]_i_2__2 
       (.I0(\burstCnt[15]_i_4__2_n_0 ),
        .I1(\burstCnt[9]_i_5_n_0 ),
        .I2(\burstCnt_reg_n_0_[5] ),
        .I3(\burstCnt[15]_i_5__2_n_0 ),
        .O(\burstCnt[5]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1541" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[6]_i_1__2 
       (.I0(first),
        .I1(\burstCnt[6]_i_2__1_n_0 ),
        .O(\burstCnt[6]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1505" *) 
  LUT5 #(
    .INIT(32'hDDEDFFFF)) 
    \burstCnt[6]_i_2__1 
       (.I0(\burstCnt_reg_n_0_[6] ),
        .I1(\burstCnt[15]_i_5__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[5] ),
        .I3(\burstCnt[9]_i_5_n_0 ),
        .I4(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstCnt[6]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1542" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[7]_i_1__2 
       (.I0(first),
        .I1(\burstCnt[7]_i_2__1_n_0 ),
        .O(\burstCnt[7]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hF5F5F9F5FFFFFFFF)) 
    \burstCnt[7]_i_2__1 
       (.I0(\burstCnt_reg_n_0_[7] ),
        .I1(\burstCnt_reg_n_0_[6] ),
        .I2(\burstCnt[15]_i_5__2_n_0 ),
        .I3(\burstCnt_reg_n_0_[5] ),
        .I4(\burstCnt[9]_i_5_n_0 ),
        .I5(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstCnt[7]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1540" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[8]_i_1__2 
       (.I0(first),
        .I1(\burstCnt[8]_i_2__1_n_0 ),
        .O(\burstCnt[8]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hDFDFDFDFDFFDDFDF)) 
    \burstCnt[8]_i_2__1 
       (.I0(\burstCnt[15]_i_4__2_n_0 ),
        .I1(\burstCnt[15]_i_5__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[8] ),
        .I3(\burstCnt[9]_i_4_n_0 ),
        .I4(\burstCnt_reg_n_0_[5] ),
        .I5(\burstCnt[9]_i_5_n_0 ),
        .O(\burstCnt[8]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1525" *) 
  LUT4 #(
    .INIT(16'h0020)) 
    \burstCnt[9]_i_1__2 
       (.I0(\burstCnt[9]_i_2__2_n_0 ),
        .I1(\burstCnt[9]_i_3__0_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(first),
        .O(\burstCnt[9]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFBFFFFFFFFFF)) 
    \burstCnt[9]_i_2__2 
       (.I0(\burstCnt[15]_i_5__2_n_0 ),
        .I1(\burstCnt_reg_n_0_[8] ),
        .I2(\burstCnt[9]_i_4_n_0 ),
        .I3(\burstCnt_reg_n_0_[5] ),
        .I4(\burstCnt[9]_i_5_n_0 ),
        .I5(\burstCnt_reg_n_0_[9] ),
        .O(\burstCnt[9]_i_2__2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF0000FFFFFFDF)) 
    \burstCnt[9]_i_3__0 
       (.I0(\burstCnt_reg_n_0_[8] ),
        .I1(\burstCnt[9]_i_4_n_0 ),
        .I2(\burstCnt_reg_n_0_[5] ),
        .I3(\burstCnt[9]_i_5_n_0 ),
        .I4(\burstCnt[15]_i_5__2_n_0 ),
        .I5(\burstCnt_reg_n_0_[9] ),
        .O(\burstCnt[9]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1532" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \burstCnt[9]_i_4 
       (.I0(\burstCnt_reg_n_0_[6] ),
        .I1(\burstCnt_reg_n_0_[7] ),
        .O(\burstCnt[9]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \burstCnt[9]_i_5 
       (.I0(\burstCnt_reg_n_0_[4] ),
        .I1(\burstCnt_reg_n_0_[2] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt_reg_n_0_[3] ),
        .O(\burstCnt[9]_i_5_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[0] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[0]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[10] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[10]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[11] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[11]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[12] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[12]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[12] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[13] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[13]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[13] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[14] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[14]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[14] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[15] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[15]_i_2__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[15] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[1] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[1]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[2] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[2]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[3] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[3]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[4] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[4]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[5] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[5]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[6] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[6]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[7] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[7]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[8] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[8]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[9] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\burstCnt[9]_i_1__2_n_0 ),
        .Q(\burstCnt_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1534" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[0]_i_1__0 
       (.I0(first),
        .I1(state[0]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstState[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1534" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[1]_i_1__0 
       (.I0(first),
        .I1(state[1]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstState[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1535" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[2]_i_1 
       (.I0(first),
        .I1(state[2]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstState[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1535" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[3]_i_1 
       (.I0(first),
        .I1(state[3]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstState[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1536" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[4]_i_1__0 
       (.I0(first),
        .I1(state[4]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstState[4]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1536" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[5]_i_1__0 
       (.I0(first),
        .I1(state[5]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstState[5]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1537" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[6]_i_1__0 
       (.I0(first),
        .I1(state[6]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstState[6]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1537" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[7]_i_1 
       (.I0(first),
        .I1(state[7]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .O(\burstState[7]_i_1_n_0 ));
  FDPE \burstState_reg[0] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .D(\burstState[0]_i_1__0_n_0 ),
        .PRE(AR),
        .Q(\burstState_reg_n_0_[0] ));
  FDPE \burstState_reg[1] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .D(\burstState[1]_i_1__0_n_0 ),
        .PRE(AR),
        .Q(\burstState_reg_n_0_[1] ));
  FDPE \burstState_reg[2] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .D(\burstState[2]_i_1_n_0 ),
        .PRE(AR),
        .Q(\burstState_reg_n_0_[2] ));
  FDPE \burstState_reg[3] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .D(\burstState[3]_i_1_n_0 ),
        .PRE(AR),
        .Q(\burstState_reg_n_0_[3] ));
  FDPE \burstState_reg[4] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .D(\burstState[4]_i_1__0_n_0 ),
        .PRE(AR),
        .Q(\burstState_reg_n_0_[4] ));
  FDPE \burstState_reg[5] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .D(\burstState[5]_i_1__0_n_0 ),
        .PRE(AR),
        .Q(\burstState_reg_n_0_[5] ));
  FDPE \burstState_reg[6] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .D(\burstState[6]_i_1__0_n_0 ),
        .PRE(AR),
        .Q(\burstState_reg_n_0_[6] ));
  FDPE \burstState_reg[7] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .D(\burstState[7]_i_1_n_0 ),
        .PRE(AR),
        .Q(\burstState_reg_n_0_[7] ));
  LUT6 #(
    .INIT(64'hFDFFFDF0F0F0F0F0)) 
    \dwrSeqbuf[0]_i_1__2 
       (.I0(\burstCnt_reg_n_0_[0] ),
        .I1(\burstCnt[15]_i_5__2_n_0 ),
        .I2(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I3(\burstCnt[15]_i_4__2_n_0 ),
        .I4(\dwrSeqbuf[0]_i_2__2_n_0 ),
        .I5(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[0]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1512" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[0]_i_2__2 
       (.I0(state[0]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[0] ),
        .O(\dwrSeqbuf[0]_i_2__2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[10]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[10]_i_2__1_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[10]_i_2__0_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[10]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1518" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[10]_i_2__0 
       (.I0(state[2]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[10] ),
        .O(\dwrSeqbuf[10]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[11]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[11]_i_2__2_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[11]_i_2__0_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[11]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1517" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[11]_i_2__0 
       (.I0(state[3]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[11] ),
        .O(\dwrSeqbuf[11]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[12]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[12]_i_2__1_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[12]_i_2__0_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[12]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1521" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[12]_i_2__0 
       (.I0(state[4]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[12] ),
        .O(\dwrSeqbuf[12]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[13]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[13]_i_2__0_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[13]_i_2__0_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[13]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1520" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[13]_i_2__0 
       (.I0(state[5]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[13] ),
        .O(\dwrSeqbuf[13]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'hBEFFBEAAAAAAAAAA)) 
    \dwrSeqbuf[14]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[15]_i_6__2_n_0 ),
        .I2(\dwrSeqbuf[14]_i_2__0_n_0 ),
        .I3(\burstCnt[15]_i_4__2_n_0 ),
        .I4(\dwrSeqbuf[14]_i_3_n_0 ),
        .I5(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[14]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1487" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrSeqbuf[14]_i_2__0 
       (.I0(\burstCnt_reg_n_0_[14] ),
        .I1(\burstCnt[15]_i_5__2_n_0 ),
        .O(\dwrSeqbuf[14]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1516" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[14]_i_3 
       (.I0(state[6]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[14] ),
        .O(\dwrSeqbuf[14]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[15]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\dwrSeqbuf[15]_i_2__1_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[15]_i_3__1_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[15]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0FBFFFFFFFFFF)) 
    \dwrSeqbuf[15]_i_2__1 
       (.I0(\dwrSeqbuf[15]_i_4_n_0 ),
        .I1(\burstCnt_reg_n_0_[13] ),
        .I2(\burstCnt[15]_i_5__2_n_0 ),
        .I3(\burstCnt_reg_n_0_[14] ),
        .I4(\burstCnt_reg_n_0_[15] ),
        .I5(\burstCnt[15]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[15]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1522" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[15]_i_3__1 
       (.I0(state[7]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[15] ),
        .O(\dwrSeqbuf[15]_i_3__1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFDFFFFFFFFFFF)) 
    \dwrSeqbuf[15]_i_4 
       (.I0(\burstCnt_reg_n_0_[9] ),
        .I1(\dwrSeqbuf[15]_i_5_n_0 ),
        .I2(\burstCnt_reg_n_0_[10] ),
        .I3(\burstCnt_reg_n_0_[11] ),
        .I4(\burstCnt[15]_i_5__2_n_0 ),
        .I5(\burstCnt_reg_n_0_[12] ),
        .O(\dwrSeqbuf[15]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFBFF)) 
    \dwrSeqbuf[15]_i_5 
       (.I0(\burstCnt[9]_i_5_n_0 ),
        .I1(\burstCnt_reg_n_0_[5] ),
        .I2(\burstCnt[9]_i_4_n_0 ),
        .I3(\burstCnt_reg_n_0_[8] ),
        .I4(\burstCnt[15]_i_13__1_n_0 ),
        .I5(\dwrSeqbuf[15]_i_6_n_0 ),
        .O(\dwrSeqbuf[15]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000002000)) 
    \dwrSeqbuf[15]_i_6 
       (.I0(\burstCnt[13]_i_5_n_0 ),
        .I1(\burstCnt[15]_i_25__0_n_0 ),
        .I2(\burstCnt_reg_n_0_[12] ),
        .I3(\burstCnt_reg_n_0_[13] ),
        .I4(\burstCnt[9]_i_4_n_0 ),
        .I5(\dwrSeqbuf[15]_i_7_n_0 ),
        .O(\dwrSeqbuf[15]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \dwrSeqbuf[15]_i_7 
       (.I0(\burstCnt_reg_n_0_[10] ),
        .I1(\burstCnt_reg_n_0_[9] ),
        .I2(\burstCnt_reg_n_0_[5] ),
        .I3(\burstCnt_reg_n_0_[4] ),
        .O(\dwrSeqbuf[15]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[16]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(state[0]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .I4(\quad_reg_n_0_[16] ),
        .I5(\dwrSeqbuf[23]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[16]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[17]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(state[1]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .I4(\quad_reg_n_0_[17] ),
        .I5(\dwrSeqbuf[23]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[17]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[18]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(state[2]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .I4(\quad_reg_n_0_[18] ),
        .I5(\dwrSeqbuf[23]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[18]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[19]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(state[3]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .I4(\quad_reg_n_0_[19] ),
        .I5(\dwrSeqbuf[23]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[19]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[1]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\dwrSeqbuf[1]_i_2__2_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[1]_i_3__2_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[1]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1492" *) 
  LUT4 #(
    .INIT(16'hF2F5)) 
    \dwrSeqbuf[1]_i_2__2 
       (.I0(\burstCnt_reg_n_0_[0] ),
        .I1(\burstCnt[15]_i_5__2_n_0 ),
        .I2(\burstCnt[3]_i_2_n_0 ),
        .I3(\burstCnt_reg_n_0_[1] ),
        .O(\dwrSeqbuf[1]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1510" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[1]_i_3__2 
       (.I0(state[1]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[1] ),
        .O(\dwrSeqbuf[1]_i_3__2_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[20]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(state[4]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .I4(\quad_reg_n_0_[20] ),
        .I5(\dwrSeqbuf[23]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[20]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[21]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(state[5]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .I4(\quad_reg_n_0_[21] ),
        .I5(\dwrSeqbuf[23]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[21]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[22]_i_1__1 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(state[6]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .I4(\quad_reg_n_0_[22] ),
        .I5(\dwrSeqbuf[23]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[22]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[23]_i_1__1 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(state[7]),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .I4(\quad_reg_n_0_[23] ),
        .I5(\dwrSeqbuf[23]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[23]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1500" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrSeqbuf[23]_i_2__0 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .O(\dwrSeqbuf[23]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[24]_i_1__1 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[15]_i_4__2_n_0 ),
        .I2(\quad_reg_n_0_[24] ),
        .I3(\burstCnt[15]_i_3__1_n_0 ),
        .I4(state[0]),
        .I5(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[24]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[25]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[15]_i_4__2_n_0 ),
        .I2(\quad_reg_n_0_[25] ),
        .I3(\burstCnt[15]_i_3__1_n_0 ),
        .I4(state[1]),
        .I5(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[25]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[26]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[15]_i_4__2_n_0 ),
        .I2(\quad_reg_n_0_[26] ),
        .I3(\burstCnt[15]_i_3__1_n_0 ),
        .I4(state[2]),
        .I5(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[26]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[27]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[15]_i_4__2_n_0 ),
        .I2(\quad_reg_n_0_[27] ),
        .I3(\burstCnt[15]_i_3__1_n_0 ),
        .I4(state[3]),
        .I5(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[27]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[28]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[15]_i_4__2_n_0 ),
        .I2(\quad_reg_n_0_[28] ),
        .I3(\burstCnt[15]_i_3__1_n_0 ),
        .I4(state[4]),
        .I5(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[28]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[29]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[15]_i_4__2_n_0 ),
        .I2(\quad_reg_n_0_[29] ),
        .I3(\burstCnt[15]_i_3__1_n_0 ),
        .I4(state[5]),
        .I5(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[29]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[2]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\dwrSeqbuf[2]_i_2__2_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[2]_i_3__2_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[2]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1488" *) 
  LUT5 #(
    .INIT(32'hFF95FFFF)) 
    \dwrSeqbuf[2]_i_2__2 
       (.I0(\burstCnt_reg_n_0_[2] ),
        .I1(\burstCnt_reg_n_0_[1] ),
        .I2(\burstCnt_reg_n_0_[0] ),
        .I3(\burstCnt[15]_i_5__2_n_0 ),
        .I4(\burstCnt[15]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[2]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1507" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[2]_i_3__2 
       (.I0(state[2]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[2] ),
        .O(\dwrSeqbuf[2]_i_3__2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[30]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[15]_i_4__2_n_0 ),
        .I2(\quad_reg_n_0_[30] ),
        .I3(\burstCnt[15]_i_3__1_n_0 ),
        .I4(state[6]),
        .I5(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[30]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAABABAAAAABAA)) 
    \dwrSeqbuf[31]_i_1__2 
       (.I0(\burstCnt[15]_i_1__2_n_0 ),
        .I1(\dwrSeqbuf[31]_i_3__2_n_0 ),
        .I2(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I3(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I4(ackSeqbufBToSeqClear),
        .I5(rdySeq),
        .O(\dwrSeqbuf[31]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFEAE0000)) 
    \dwrSeqbuf[31]_i_2__2 
       (.I0(\burstCnt[15]_i_4__2_n_0 ),
        .I1(\quad_reg_n_0_[31] ),
        .I2(\burstCnt[15]_i_3__1_n_0 ),
        .I3(state[7]),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .I5(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .O(\dwrSeqbuf[31]_i_2__2_n_0 ));
  LUT6 #(
    .INIT(64'h1F111F1F1F1F1F1F)) 
    \dwrSeqbuf[31]_i_3__2 
       (.I0(TCapt),
        .I1(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_8__0_n_0 ),
        .I3(stateOp[0]),
        .I4(stateOp[2]),
        .I5(stateOp[1]),
        .O(\dwrSeqbuf[31]_i_3__2_n_0 ));
  LUT5 #(
    .INIT(32'h00010000)) 
    \dwrSeqbuf[31]_i_4__2 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(rdySeq),
        .I2(ackSeqbufBToSeqClear),
        .I3(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I4(TCapt),
        .O(\dwrSeqbuf[31]_i_4__2_n_0 ));
  LUT5 #(
    .INIT(32'h0000BAAA)) 
    \dwrSeqbuf[31]_i_5__0 
       (.I0(\FSM_onehot_stateSeq[5]_i_8__0_n_0 ),
        .I1(stateOp[0]),
        .I2(stateOp[2]),
        .I3(stateOp[1]),
        .I4(\quad[23]_i_3_n_0 ),
        .O(\dwrSeqbuf[31]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[3]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\dwrSeqbuf[3]_i_2__2_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[3]_i_3__2_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[3]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1506" *) 
  LUT5 #(
    .INIT(32'hEAAABFFF)) 
    \dwrSeqbuf[3]_i_2__2 
       (.I0(\burstCnt[3]_i_2_n_0 ),
        .I1(\burstCnt_reg_n_0_[2] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt_reg_n_0_[3] ),
        .O(\dwrSeqbuf[3]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1511" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[3]_i_3__2 
       (.I0(state[3]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[3] ),
        .O(\dwrSeqbuf[3]_i_3__2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[4]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[4]_i_2__2_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[4]_i_2__2_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[4]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1514" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[4]_i_2__2 
       (.I0(state[4]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[4] ),
        .O(\dwrSeqbuf[4]_i_2__2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[5]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[5]_i_2__2_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[5]_i_2__2_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[5]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1509" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[5]_i_2__2 
       (.I0(state[5]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[5] ),
        .O(\dwrSeqbuf[5]_i_2__2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[6]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[6]_i_2__1_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[6]_i_2__1_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[6]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1508" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[6]_i_2__1 
       (.I0(state[6]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[6] ),
        .O(\dwrSeqbuf[6]_i_2__1_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[7]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[7]_i_2__1_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[7]_i_2__2_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[7]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1513" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[7]_i_2__2 
       (.I0(state[7]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[7] ),
        .O(\dwrSeqbuf[7]_i_2__2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[8]_i_1__2 
       (.I0(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I1(\burstCnt[8]_i_2__1_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[8]_i_2__1_n_0 ),
        .I4(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[8]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1519" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[8]_i_2__1 
       (.I0(state[0]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[8] ),
        .O(\dwrSeqbuf[8]_i_2__1_n_0 ));
  LUT6 #(
    .INIT(64'hFF2FFF20FF00FF00)) 
    \dwrSeqbuf[9]_i_1__2 
       (.I0(\burstCnt[9]_i_2__2_n_0 ),
        .I1(\burstCnt[9]_i_3__0_n_0 ),
        .I2(\burstCnt[15]_i_4__2_n_0 ),
        .I3(\dwrSeqbuf[31]_i_5__0_n_0 ),
        .I4(\dwrSeqbuf[9]_i_2__0_n_0 ),
        .I5(\dwrSeqbuf[31]_i_4__2_n_0 ),
        .O(\dwrSeqbuf[9]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1515" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[9]_i_2__0 
       (.I0(state[1]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[9] ),
        .O(\dwrSeqbuf[9]_i_2__0_n_0 ));
  FDCE \dwrSeqbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[0]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[0]));
  FDCE \dwrSeqbuf_reg[10] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[10]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[10]));
  FDCE \dwrSeqbuf_reg[11] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[11]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[11]));
  FDCE \dwrSeqbuf_reg[12] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[12]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[12]));
  FDCE \dwrSeqbuf_reg[13] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[13]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[13]));
  FDCE \dwrSeqbuf_reg[14] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[14]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[14]));
  FDCE \dwrSeqbuf_reg[15] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[15]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[15]));
  FDCE \dwrSeqbuf_reg[16] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[16]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[16]));
  FDCE \dwrSeqbuf_reg[17] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[17]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[17]));
  FDCE \dwrSeqbuf_reg[18] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[18]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[18]));
  FDCE \dwrSeqbuf_reg[19] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[19]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[19]));
  FDCE \dwrSeqbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[1]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[1]));
  FDCE \dwrSeqbuf_reg[20] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[20]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[20]));
  FDCE \dwrSeqbuf_reg[21] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[21]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[21]));
  FDCE \dwrSeqbuf_reg[22] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[22]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[22]));
  FDCE \dwrSeqbuf_reg[23] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[23]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[23]));
  FDCE \dwrSeqbuf_reg[24] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[24]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[24]));
  FDCE \dwrSeqbuf_reg[25] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[25]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[25]));
  FDCE \dwrSeqbuf_reg[26] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[26]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[26]));
  FDCE \dwrSeqbuf_reg[27] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[27]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[27]));
  FDCE \dwrSeqbuf_reg[28] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[28]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[28]));
  FDCE \dwrSeqbuf_reg[29] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[29]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[29]));
  FDCE \dwrSeqbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[2]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[2]));
  FDCE \dwrSeqbuf_reg[30] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[30]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[30]));
  FDCE \dwrSeqbuf_reg[31] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[31]_i_2__2_n_0 ),
        .Q(dwrSeqbuf[31]));
  FDCE \dwrSeqbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[3]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[3]));
  FDCE \dwrSeqbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[4]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[4]));
  FDCE \dwrSeqbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[5]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[5]));
  FDCE \dwrSeqbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[6]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[6]));
  FDCE \dwrSeqbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[7]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[7]));
  FDCE \dwrSeqbuf_reg[8] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[8]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[8]));
  FDCE \dwrSeqbuf_reg[9] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[9]_i_1__2_n_0 ),
        .Q(dwrSeqbuf[9]));
  (* SOFT_HLUTNM = "soft_lutpair1497" *) 
  LUT3 #(
    .INIT(8'h08)) 
    enSeqbuf_i_1__1
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(first),
        .O(enSeqbuf));
  FDCE enSeqbuf_reg
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(enSeqbuf),
        .Q(enSeqbuf_reg_n_0));
  FDPE first_reg
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .D(first),
        .PRE(AR),
        .Q(first__0));
  (* SOFT_HLUTNM = "soft_lutpair1503" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \i[0]_i_1__19 
       (.I0(first),
        .I1(\i_reg_n_0_[0] ),
        .O(i[0]));
  LUT5 #(
    .INIT(32'h00000001)) 
    \i[1]_i_1__19 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(rdySeq),
        .I2(ackSeqbufBToSeqClear),
        .I3(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I4(\FSM_onehot_stateSeq[3]_i_1__2_n_0 ),
        .O(\i[1]_i_1__19_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1498" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \i[1]_i_2__3 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(first),
        .O(i[1]));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_10__0
       (.I0(\TCaptMax_reg_n_0_[29] ),
        .I1(Q[29]),
        .I2(\TCaptMax_reg_n_0_[28] ),
        .I3(Q[28]),
        .O(i__carry__0_i_10__0_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_11__0
       (.I0(\TCaptMax_reg_n_0_[27] ),
        .I1(Q[27]),
        .I2(\TCaptMax_reg_n_0_[26] ),
        .I3(Q[26]),
        .O(i__carry__0_i_11__0_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_12__0
       (.I0(\TCaptMax_reg_n_0_[25] ),
        .I1(Q[25]),
        .I2(\TCaptMax_reg_n_0_[24] ),
        .I3(Q[24]),
        .O(i__carry__0_i_12__0_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_13__0
       (.I0(\TCaptMax_reg_n_0_[23] ),
        .I1(Q[23]),
        .I2(\TCaptMax_reg_n_0_[22] ),
        .I3(Q[22]),
        .O(i__carry__0_i_13__0_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_14__0
       (.I0(\TCaptMax_reg_n_0_[21] ),
        .I1(Q[21]),
        .I2(\TCaptMax_reg_n_0_[20] ),
        .I3(Q[20]),
        .O(i__carry__0_i_14__0_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_15__0
       (.I0(\TCaptMax_reg_n_0_[19] ),
        .I1(Q[19]),
        .I2(\TCaptMax_reg_n_0_[18] ),
        .I3(Q[18]),
        .O(i__carry__0_i_15__0_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_16__0
       (.I0(\TCaptMax_reg_n_0_[17] ),
        .I1(Q[17]),
        .I2(\TCaptMax_reg_n_0_[16] ),
        .I3(Q[16]),
        .O(i__carry__0_i_16__0_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_1__0
       (.I0(Q[31]),
        .I1(\TCaptMax_reg_n_0_[31] ),
        .I2(Q[30]),
        .I3(\TCaptMax_reg_n_0_[30] ),
        .O(i__carry__0_i_1__0_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_2__0
       (.I0(Q[29]),
        .I1(\TCaptMax_reg_n_0_[29] ),
        .I2(Q[28]),
        .I3(\TCaptMax_reg_n_0_[28] ),
        .O(i__carry__0_i_2__0_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_3__0
       (.I0(Q[27]),
        .I1(\TCaptMax_reg_n_0_[27] ),
        .I2(Q[26]),
        .I3(\TCaptMax_reg_n_0_[26] ),
        .O(i__carry__0_i_3__0_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_4__0
       (.I0(Q[25]),
        .I1(\TCaptMax_reg_n_0_[25] ),
        .I2(Q[24]),
        .I3(\TCaptMax_reg_n_0_[24] ),
        .O(i__carry__0_i_4__0_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_5__0
       (.I0(Q[23]),
        .I1(\TCaptMax_reg_n_0_[23] ),
        .I2(Q[22]),
        .I3(\TCaptMax_reg_n_0_[22] ),
        .O(i__carry__0_i_5__0_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_6__0
       (.I0(Q[21]),
        .I1(\TCaptMax_reg_n_0_[21] ),
        .I2(Q[20]),
        .I3(\TCaptMax_reg_n_0_[20] ),
        .O(i__carry__0_i_6__0_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_7__0
       (.I0(Q[19]),
        .I1(\TCaptMax_reg_n_0_[19] ),
        .I2(Q[18]),
        .I3(\TCaptMax_reg_n_0_[18] ),
        .O(i__carry__0_i_7__0_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_8__0
       (.I0(Q[17]),
        .I1(\TCaptMax_reg_n_0_[17] ),
        .I2(Q[16]),
        .I3(\TCaptMax_reg_n_0_[16] ),
        .O(i__carry__0_i_8__0_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_9__0
       (.I0(\TCaptMax_reg_n_0_[31] ),
        .I1(Q[31]),
        .I2(\TCaptMax_reg_n_0_[30] ),
        .I3(Q[30]),
        .O(i__carry__0_i_9__0_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_10__5
       (.I0(\TCaptMax_reg_n_0_[13] ),
        .I1(Q[13]),
        .I2(\TCaptMax_reg_n_0_[12] ),
        .I3(Q[12]),
        .O(i__carry_i_10__5_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_11__4
       (.I0(\TCaptMax_reg_n_0_[11] ),
        .I1(Q[11]),
        .I2(\TCaptMax_reg_n_0_[10] ),
        .I3(Q[10]),
        .O(i__carry_i_11__4_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_12__2
       (.I0(\TCaptMax_reg_n_0_[9] ),
        .I1(Q[9]),
        .I2(\TCaptMax_reg_n_0_[8] ),
        .I3(Q[8]),
        .O(i__carry_i_12__2_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_13__1
       (.I0(\TCaptMax_reg_n_0_[7] ),
        .I1(Q[7]),
        .I2(\TCaptMax_reg_n_0_[6] ),
        .I3(Q[6]),
        .O(i__carry_i_13__1_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_14__0
       (.I0(\TCaptMax_reg_n_0_[5] ),
        .I1(Q[5]),
        .I2(\TCaptMax_reg_n_0_[4] ),
        .I3(Q[4]),
        .O(i__carry_i_14__0_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_15__0
       (.I0(\TCaptMax_reg_n_0_[3] ),
        .I1(Q[3]),
        .I2(\TCaptMax_reg_n_0_[2] ),
        .I3(Q[2]),
        .O(i__carry_i_15__0_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_16__0
       (.I0(\TCaptMax_reg_n_0_[1] ),
        .I1(Q[1]),
        .I2(\TCaptMax_reg_n_0_[0] ),
        .I3(Q[0]),
        .O(i__carry_i_16__0_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_1__6
       (.I0(Q[15]),
        .I1(\TCaptMax_reg_n_0_[15] ),
        .I2(Q[14]),
        .I3(\TCaptMax_reg_n_0_[14] ),
        .O(i__carry_i_1__6_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_2__6
       (.I0(Q[13]),
        .I1(\TCaptMax_reg_n_0_[13] ),
        .I2(Q[12]),
        .I3(\TCaptMax_reg_n_0_[12] ),
        .O(i__carry_i_2__6_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_3__6
       (.I0(Q[11]),
        .I1(\TCaptMax_reg_n_0_[11] ),
        .I2(Q[10]),
        .I3(\TCaptMax_reg_n_0_[10] ),
        .O(i__carry_i_3__6_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_4__6
       (.I0(Q[9]),
        .I1(\TCaptMax_reg_n_0_[9] ),
        .I2(Q[8]),
        .I3(\TCaptMax_reg_n_0_[8] ),
        .O(i__carry_i_4__6_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_5__6
       (.I0(Q[7]),
        .I1(\TCaptMax_reg_n_0_[7] ),
        .I2(Q[6]),
        .I3(\TCaptMax_reg_n_0_[6] ),
        .O(i__carry_i_5__6_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_6__6
       (.I0(Q[5]),
        .I1(\TCaptMax_reg_n_0_[5] ),
        .I2(Q[4]),
        .I3(\TCaptMax_reg_n_0_[4] ),
        .O(i__carry_i_6__6_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_7__5
       (.I0(Q[3]),
        .I1(\TCaptMax_reg_n_0_[3] ),
        .I2(Q[2]),
        .I3(\TCaptMax_reg_n_0_[2] ),
        .O(i__carry_i_7__5_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_8__5
       (.I0(Q[1]),
        .I1(\TCaptMax_reg_n_0_[1] ),
        .I2(Q[0]),
        .I3(\TCaptMax_reg_n_0_[0] ),
        .O(i__carry_i_8__5_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_9__5
       (.I0(\TCaptMax_reg_n_0_[15] ),
        .I1(Q[15]),
        .I2(\TCaptMax_reg_n_0_[14] ),
        .I3(Q[14]),
        .O(i__carry_i_9__5_n_0));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__19_n_0 ),
        .CLR(AR),
        .D(i[0]),
        .Q(\i_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__19_n_0 ),
        .CLR(AR),
        .D(i[1]),
        .Q(\i_reg_n_0_[1] ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a32b64__xdcDup__1 mySeqbuf
       (.\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (dwrSeqbuf),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\aSeqbufB_reg_n_0_[8] ,\aSeqbufB_reg_n_0_[7] ,\aSeqbufB_reg_n_0_[6] ,\aSeqbufB_reg_n_0_[5] ,\aSeqbufB_reg_n_0_[4] ,\aSeqbufB_reg_n_0_[3] ,\aSeqbufB_reg_n_0_[2] ,\aSeqbufB_reg_n_0_[1] ,\aSeqbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 (stateSeqbufB_reg),
        .Q({\aSeqbuf_reg_n_0_[9] ,\aSeqbuf_reg_n_0_[8] ,\aSeqbuf_reg_n_0_[7] ,\aSeqbuf_reg_n_0_[6] ,\aSeqbuf_reg_n_0_[5] ,\aSeqbuf_reg_n_0_[4] ,\aSeqbuf_reg_n_0_[3] ,\aSeqbuf_reg_n_0_[2] ,\aSeqbuf_reg_n_0_[1] ,\aSeqbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .doutb(doutb),
        .ena(enSeqbuf_reg_n_0));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry
       (.CI(Q[0]),
        .CI_TOP(1'b0),
        .CO({plusOp_carry_n_0,plusOp_carry_n_1,plusOp_carry_n_2,plusOp_carry_n_3,plusOp_carry_n_4,plusOp_carry_n_5,plusOp_carry_n_6,plusOp_carry_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in12[8:1]),
        .S(Q[8:1]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry__0
       (.CI(plusOp_carry_n_0),
        .CI_TOP(1'b0),
        .CO({plusOp_carry__0_n_0,plusOp_carry__0_n_1,plusOp_carry__0_n_2,plusOp_carry__0_n_3,plusOp_carry__0_n_4,plusOp_carry__0_n_5,plusOp_carry__0_n_6,plusOp_carry__0_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in12[16:9]),
        .S(Q[16:9]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry__1
       (.CI(plusOp_carry__0_n_0),
        .CI_TOP(1'b0),
        .CO({plusOp_carry__1_n_0,plusOp_carry__1_n_1,plusOp_carry__1_n_2,plusOp_carry__1_n_3,plusOp_carry__1_n_4,plusOp_carry__1_n_5,plusOp_carry__1_n_6,plusOp_carry__1_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in12[24:17]),
        .S(Q[24:17]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry__2
       (.CI(plusOp_carry__1_n_0),
        .CI_TOP(1'b0),
        .CO({NLW_plusOp_carry__2_CO_UNCONNECTED[7:6],plusOp_carry__2_n_2,plusOp_carry__2_n_3,plusOp_carry__2_n_4,plusOp_carry__2_n_5,plusOp_carry__2_n_6,plusOp_carry__2_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({NLW_plusOp_carry__2_O_UNCONNECTED[7],in12[31:25]}),
        .S({1'b0,Q[31:25]}));
  LUT6 #(
    .INIT(64'h2F2F2FFF20202000)) 
    ptr0SeqbufTrackNotFixed_i_1__2
       (.I0(\burstCnt[3]_i_2_n_0 ),
        .I1(first),
        .I2(\aSeqbuf[9]_i_3__2_n_0 ),
        .I3(\FSM_onehot_stateSeq[5]_i_5__2_n_0 ),
        .I4(\FSM_onehot_stateSeq[5]_i_7__2_n_0 ),
        .I5(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0SeqbufTrackNotFixed_i_1__2_n_0));
  FDCE ptr0SeqbufTrackNotFixed_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(ptr0SeqbufTrackNotFixed_i_1__2_n_0),
        .Q(ptr0SeqbufTrackNotFixed_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1512" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[0]_i_1__2 
       (.I0(\quad_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[0]),
        .I4(first),
        .O(quad[0]));
  (* SOFT_HLUTNM = "soft_lutpair1518" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[10]_i_1__0 
       (.I0(\quad_reg_n_0_[10] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[2]),
        .I4(first),
        .O(quad[10]));
  (* SOFT_HLUTNM = "soft_lutpair1517" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[11]_i_1__0 
       (.I0(\quad_reg_n_0_[11] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[3]),
        .I4(first),
        .O(quad[11]));
  (* SOFT_HLUTNM = "soft_lutpair1521" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[12]_i_1__0 
       (.I0(\quad_reg_n_0_[12] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[4]),
        .I4(first),
        .O(quad[12]));
  (* SOFT_HLUTNM = "soft_lutpair1520" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[13]_i_1__0 
       (.I0(\quad_reg_n_0_[13] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[5]),
        .I4(first),
        .O(quad[13]));
  (* SOFT_HLUTNM = "soft_lutpair1516" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[14]_i_1__0 
       (.I0(\quad_reg_n_0_[14] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[6]),
        .I4(first),
        .O(quad[14]));
  LUT5 #(
    .INIT(32'h080808AA)) 
    \quad[15]_i_1__0 
       (.I0(\quad[23]_i_3_n_0 ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I4(TCapt),
        .O(\quad[15]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1522" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[15]_i_2__0 
       (.I0(\quad_reg_n_0_[15] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[15]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[16]_i_1__0 
       (.I0(\quad_reg_n_0_[16] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[0]),
        .I4(first),
        .O(quad[16]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[17]_i_1__0 
       (.I0(\quad_reg_n_0_[17] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[1]),
        .I4(first),
        .O(quad[17]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[18]_i_1__0 
       (.I0(\quad_reg_n_0_[18] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[2]),
        .I4(first),
        .O(quad[18]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[19]_i_1__0 
       (.I0(\quad_reg_n_0_[19] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[3]),
        .I4(first),
        .O(quad[19]));
  (* SOFT_HLUTNM = "soft_lutpair1510" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[1]_i_1__2 
       (.I0(\quad_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[1]),
        .I4(first),
        .O(quad[1]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[20]_i_1__1 
       (.I0(\quad_reg_n_0_[20] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[4]),
        .I4(first),
        .O(quad[20]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[21]_i_1__0 
       (.I0(\quad_reg_n_0_[21] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[5]),
        .I4(first),
        .O(quad[21]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[22]_i_1__0 
       (.I0(\quad_reg_n_0_[22] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[6]),
        .I4(first),
        .O(quad[22]));
  LUT5 #(
    .INIT(32'h080808AA)) 
    \quad[23]_i_1__0 
       (.I0(\quad[23]_i_3_n_0 ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I4(TCapt),
        .O(\quad[23]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[23]_i_2__0 
       (.I0(\quad_reg_n_0_[23] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[23]));
  (* SOFT_HLUTNM = "soft_lutpair1529" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \quad[23]_i_3 
       (.I0(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I1(ackSeqbufBToSeqClear),
        .I2(rdySeq),
        .I3(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\quad[23]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1497" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[24]_i_1__0 
       (.I0(\quad_reg_n_0_[24] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[0]),
        .I4(first),
        .O(quad[24]));
  (* SOFT_HLUTNM = "soft_lutpair1498" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[25]_i_1__0 
       (.I0(\quad_reg_n_0_[25] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[1]),
        .I4(first),
        .O(quad[25]));
  (* SOFT_HLUTNM = "soft_lutpair1499" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[26]_i_1__0 
       (.I0(\quad_reg_n_0_[26] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[2]),
        .I4(first),
        .O(quad[26]));
  (* SOFT_HLUTNM = "soft_lutpair1500" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[27]_i_1__0 
       (.I0(\quad_reg_n_0_[27] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[3]),
        .I4(first),
        .O(quad[27]));
  (* SOFT_HLUTNM = "soft_lutpair1501" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[28]_i_1__0 
       (.I0(\quad_reg_n_0_[28] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[4]),
        .I4(first),
        .O(quad[28]));
  (* SOFT_HLUTNM = "soft_lutpair1502" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[29]_i_1__0 
       (.I0(\quad_reg_n_0_[29] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[5]),
        .I4(first),
        .O(quad[29]));
  (* SOFT_HLUTNM = "soft_lutpair1507" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[2]_i_1__2 
       (.I0(\quad_reg_n_0_[2] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[2]),
        .I4(first),
        .O(quad[2]));
  (* SOFT_HLUTNM = "soft_lutpair1503" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[30]_i_1__0 
       (.I0(\quad_reg_n_0_[30] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[6]),
        .I4(first),
        .O(quad[30]));
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[31]_i_1__0 
       (.I0(\quad_reg_n_0_[31] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[31]));
  (* SOFT_HLUTNM = "soft_lutpair1511" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[3]_i_1__2 
       (.I0(\quad_reg_n_0_[3] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[3]),
        .I4(first),
        .O(quad[3]));
  (* SOFT_HLUTNM = "soft_lutpair1514" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[4]_i_1__2 
       (.I0(\quad_reg_n_0_[4] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[4]),
        .I4(first),
        .O(quad[4]));
  (* SOFT_HLUTNM = "soft_lutpair1509" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[5]_i_1__2 
       (.I0(\quad_reg_n_0_[5] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[5]),
        .I4(first),
        .O(quad[5]));
  (* SOFT_HLUTNM = "soft_lutpair1508" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[6]_i_1__1 
       (.I0(\quad_reg_n_0_[6] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[6]),
        .I4(first),
        .O(quad[6]));
  LUT6 #(
    .INIT(64'h0000010000000101)) 
    \quad[7]_i_1__1 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(rdySeq),
        .I2(ackSeqbufBToSeqClear),
        .I3(\quad[7]_i_3_n_0 ),
        .I4(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I5(TCapt),
        .O(\quad[7]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1513" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[7]_i_2__0 
       (.I0(\quad_reg_n_0_[7] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[7]));
  (* SOFT_HLUTNM = "soft_lutpair1501" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \quad[7]_i_3 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .O(\quad[7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1519" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[8]_i_1__1 
       (.I0(\quad_reg_n_0_[8] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[0]),
        .I4(first),
        .O(quad[8]));
  (* SOFT_HLUTNM = "soft_lutpair1515" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[9]_i_1__0 
       (.I0(\quad_reg_n_0_[9] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[1]),
        .I4(first),
        .O(quad[9]));
  FDCE \quad_reg[0] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1__1_n_0 ),
        .CLR(AR),
        .D(quad[0]),
        .Q(\quad_reg_n_0_[0] ));
  FDCE \quad_reg[10] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[10]),
        .Q(\quad_reg_n_0_[10] ));
  FDCE \quad_reg[11] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[11]),
        .Q(\quad_reg_n_0_[11] ));
  FDCE \quad_reg[12] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[12]),
        .Q(\quad_reg_n_0_[12] ));
  FDCE \quad_reg[13] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[13]),
        .Q(\quad_reg_n_0_[13] ));
  FDCE \quad_reg[14] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[14]),
        .Q(\quad_reg_n_0_[14] ));
  FDCE \quad_reg[15] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[15]),
        .Q(\quad_reg_n_0_[15] ));
  FDCE \quad_reg[16] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[16]),
        .Q(\quad_reg_n_0_[16] ));
  FDCE \quad_reg[17] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[17]),
        .Q(\quad_reg_n_0_[17] ));
  FDCE \quad_reg[18] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[18]),
        .Q(\quad_reg_n_0_[18] ));
  FDCE \quad_reg[19] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[19]),
        .Q(\quad_reg_n_0_[19] ));
  FDCE \quad_reg[1] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1__1_n_0 ),
        .CLR(AR),
        .D(quad[1]),
        .Q(\quad_reg_n_0_[1] ));
  FDCE \quad_reg[20] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[20]),
        .Q(\quad_reg_n_0_[20] ));
  FDCE \quad_reg[21] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[21]),
        .Q(\quad_reg_n_0_[21] ));
  FDCE \quad_reg[22] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[22]),
        .Q(\quad_reg_n_0_[22] ));
  FDCE \quad_reg[23] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[23]),
        .Q(\quad_reg_n_0_[23] ));
  FDCE \quad_reg[24] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(quad[24]),
        .Q(\quad_reg_n_0_[24] ));
  FDCE \quad_reg[25] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(quad[25]),
        .Q(\quad_reg_n_0_[25] ));
  FDCE \quad_reg[26] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(quad[26]),
        .Q(\quad_reg_n_0_[26] ));
  FDCE \quad_reg[27] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(quad[27]),
        .Q(\quad_reg_n_0_[27] ));
  FDCE \quad_reg[28] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(quad[28]),
        .Q(\quad_reg_n_0_[28] ));
  FDCE \quad_reg[29] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(quad[29]),
        .Q(\quad_reg_n_0_[29] ));
  FDCE \quad_reg[2] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1__1_n_0 ),
        .CLR(AR),
        .D(quad[2]),
        .Q(\quad_reg_n_0_[2] ));
  FDCE \quad_reg[30] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(quad[30]),
        .Q(\quad_reg_n_0_[30] ));
  FDCE \quad_reg[31] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__2_n_0 ),
        .CLR(AR),
        .D(quad[31]),
        .Q(\quad_reg_n_0_[31] ));
  FDCE \quad_reg[3] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1__1_n_0 ),
        .CLR(AR),
        .D(quad[3]),
        .Q(\quad_reg_n_0_[3] ));
  FDCE \quad_reg[4] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1__1_n_0 ),
        .CLR(AR),
        .D(quad[4]),
        .Q(\quad_reg_n_0_[4] ));
  FDCE \quad_reg[5] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1__1_n_0 ),
        .CLR(AR),
        .D(quad[5]),
        .Q(\quad_reg_n_0_[5] ));
  FDCE \quad_reg[6] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1__1_n_0 ),
        .CLR(AR),
        .D(quad[6]),
        .Q(\quad_reg_n_0_[6] ));
  FDCE \quad_reg[7] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1__1_n_0 ),
        .CLR(AR),
        .D(quad[7]),
        .Q(\quad_reg_n_0_[7] ));
  FDCE \quad_reg[8] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[8]),
        .Q(\quad_reg_n_0_[8] ));
  FDCE \quad_reg[9] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[9]),
        .Q(\quad_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'hFFFCFFFF00100010)) 
    restart_i_1__2
       (.I0(ackInvSelect_sig_reg_0),
        .I1(stateOp[2]),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .I4(restart_reg_0),
        .I5(restart_reg_n_0),
        .O(restart_i_1__2_n_0));
  FDCE restart_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(restart_i_1__2_n_0),
        .Q(restart_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1527" *) 
  LUT3 #(
    .INIT(8'h24)) 
    \retbuf[0][0]_i_12 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .O(cputrackGetInfoTixVState[0]));
  (* SOFT_HLUTNM = "soft_lutpair1561" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[5][0]_i_6 
       (.I0(\aSeqbuf_reg_n_0_[8] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(cputrackGetInfoPtr0Seqbuf[8]));
  (* SOFT_HLUTNM = "soft_lutpair1561" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[5][1]_i_6 
       (.I0(\aSeqbuf_reg_n_0_[9] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(cputrackGetInfoPtr0Seqbuf[9]));
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][0]_i_6 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(cputrackGetInfoPtr0Seqbuf[0]));
  (* SOFT_HLUTNM = "soft_lutpair1564" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][1]_i_6 
       (.I0(\aSeqbuf_reg_n_0_[1] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(cputrackGetInfoPtr0Seqbuf[1]));
  (* SOFT_HLUTNM = "soft_lutpair1564" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][2]_i_6 
       (.I0(\aSeqbuf_reg_n_0_[2] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(cputrackGetInfoPtr0Seqbuf[2]));
  (* SOFT_HLUTNM = "soft_lutpair1563" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][3]_i_6 
       (.I0(\aSeqbuf_reg_n_0_[3] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(cputrackGetInfoPtr0Seqbuf[3]));
  (* SOFT_HLUTNM = "soft_lutpair1563" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][4]_i_6 
       (.I0(\aSeqbuf_reg_n_0_[4] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(cputrackGetInfoPtr0Seqbuf[4]));
  (* SOFT_HLUTNM = "soft_lutpair1562" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][5]_i_7 
       (.I0(\aSeqbuf_reg_n_0_[5] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(cputrackGetInfoPtr0Seqbuf[5]));
  (* SOFT_HLUTNM = "soft_lutpair1528" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][6]_i_6 
       (.I0(\aSeqbuf_reg_n_0_[6] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(cputrackGetInfoPtr0Seqbuf[6]));
  (* SOFT_HLUTNM = "soft_lutpair1562" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][7]_i_10 
       (.I0(\aSeqbuf_reg_n_0_[7] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(cputrackGetInfoPtr0Seqbuf[7]));
  FDCE rng_reg
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(AR),
        .D(hdrNotFix),
        .Q(rng_reg_n_0));
  LUT4 #(
    .INIT(16'hAA8A)) 
    \staTixVTrigger[7]_i_1__2 
       (.I0(reqInvSelect),
        .I1(stateOp[2]),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .O(staFallingNotRising));
  FDCE \staTixVTrigger_reg[0] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[16]),
        .Q(staTixVTrigger[0]));
  FDCE \staTixVTrigger_reg[1] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[17]),
        .Q(staTixVTrigger[1]));
  FDCE \staTixVTrigger_reg[2] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[18]),
        .Q(staTixVTrigger[2]));
  FDCE \staTixVTrigger_reg[3] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[19]),
        .Q(staTixVTrigger[3]));
  FDCE \staTixVTrigger_reg[4] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[20]),
        .Q(staTixVTrigger[4]));
  FDCE \staTixVTrigger_reg[5] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[21]),
        .Q(staTixVTrigger[5]));
  FDCE \staTixVTrigger_reg[6] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[22]),
        .Q(staTixVTrigger[6]));
  FDCE \staTixVTrigger_reg[7] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[23]),
        .Q(staTixVTrigger[7]));
  (* SOFT_HLUTNM = "soft_lutpair1493" *) 
  LUT5 #(
    .INIT(32'hEEEFEFFE)) 
    \stateOp[0]_i_1__12 
       (.I0(reqInvSelect),
        .I1(reqInvCputrackSet),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .I4(stateOp[2]),
        .O(\stateOp[0]_i_1__12_n_0 ));
  LUT6 #(
    .INIT(64'h000CC008000C0008)) 
    \stateOp[1]_i_1__12 
       (.I0(rng_reg_n_0),
        .I1(restart_reg_0),
        .I2(stateOp[2]),
        .I3(stateOp[0]),
        .I4(stateOp[1]),
        .I5(restart_reg_n_0),
        .O(\stateOp[1]_i_1__12_n_0 ));
  LUT6 #(
    .INIT(64'hEFEEEE0FEEEEEE0F)) 
    \stateOp[2]_i_10__3 
       (.I0(reqInvCputrackSet),
        .I1(reqInvSelect),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .I4(stateOp[1]),
        .I5(rdySeq),
        .O(\stateOp[2]_i_10__3_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_11__2 
       (.I0(\TCaptMax_reg_n_0_[5] ),
        .I1(\TCaptMax_reg_n_0_[4] ),
        .I2(\TCaptMax_reg_n_0_[7] ),
        .I3(\TCaptMax_reg_n_0_[6] ),
        .O(\stateOp[2]_i_11__2_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[2]_i_12__2 
       (.I0(\TCaptMax_reg_n_0_[8] ),
        .I1(\TCaptMax_reg_n_0_[9] ),
        .I2(\TCaptMax_reg_n_0_[10] ),
        .I3(\TCaptMax_reg_n_0_[11] ),
        .I4(\stateOp[2]_i_18__3_n_0 ),
        .O(\stateOp[2]_i_12__2_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_13__3 
       (.I0(\TCaptMax_reg_n_0_[21] ),
        .I1(\TCaptMax_reg_n_0_[20] ),
        .I2(\TCaptMax_reg_n_0_[23] ),
        .I3(\TCaptMax_reg_n_0_[22] ),
        .O(\stateOp[2]_i_13__3_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[2]_i_14__2 
       (.I0(\TCaptMax_reg_n_0_[24] ),
        .I1(\TCaptMax_reg_n_0_[27] ),
        .I2(\TCaptMax_reg_n_0_[25] ),
        .I3(\TCaptMax_reg_n_0_[26] ),
        .I4(\stateOp[2]_i_19__3_n_0 ),
        .O(\stateOp[2]_i_14__2_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateOp[2]_i_15__3 
       (.I0(Q[15]),
        .I1(Q[14]),
        .I2(Q[23]),
        .I3(Q[12]),
        .O(\stateOp[2]_i_15__3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFBFFFFFFF)) 
    \stateOp[2]_i_16__3 
       (.I0(\stateOp[2]_i_20__3_n_0 ),
        .I1(Q[11]),
        .I2(Q[10]),
        .I3(Q[21]),
        .I4(Q[16]),
        .I5(\stateOp[2]_i_21__2_n_0 ),
        .O(\stateOp[2]_i_16__3_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_17__3 
       (.I0(staTixVTrigger[6]),
        .I1(staTixVTrigger[5]),
        .I2(staTixVTrigger[2]),
        .I3(staTixVTrigger[0]),
        .O(\stateOp[2]_i_17__3_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_18__3 
       (.I0(\TCaptMax_reg_n_0_[13] ),
        .I1(\TCaptMax_reg_n_0_[12] ),
        .I2(\TCaptMax_reg_n_0_[15] ),
        .I3(\TCaptMax_reg_n_0_[14] ),
        .O(\stateOp[2]_i_18__3_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_19__3 
       (.I0(\TCaptMax_reg_n_0_[29] ),
        .I1(\TCaptMax_reg_n_0_[28] ),
        .I2(\TCaptMax_reg_n_0_[31] ),
        .I3(\TCaptMax_reg_n_0_[30] ),
        .O(\stateOp[2]_i_19__3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFE0E0E040)) 
    \stateOp[2]_i_1__3 
       (.I0(stateOp[0]),
        .I1(\stateOp[2]_i_3__4_n_0 ),
        .I2(cputrackGetInfoTixVState[1]),
        .I3(rdySeq),
        .I4(restart_reg_n_0),
        .I5(\stateOp[2]_i_5__4_n_0 ),
        .O(\stateOp[2]_i_1__3_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateOp[2]_i_20__3 
       (.I0(Q[31]),
        .I1(Q[24]),
        .I2(Q[27]),
        .I3(Q[18]),
        .O(\stateOp[2]_i_20__3_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF7FFF)) 
    \stateOp[2]_i_21__2 
       (.I0(Q[8]),
        .I1(Q[25]),
        .I2(Q[9]),
        .I3(Q[19]),
        .I4(\stateOp[2]_i_22__2_n_0 ),
        .O(\stateOp[2]_i_21__2_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateOp[2]_i_22__2 
       (.I0(Q[30]),
        .I1(Q[17]),
        .I2(Q[26]),
        .I3(Q[20]),
        .O(\stateOp[2]_i_22__2_n_0 ));
  LUT6 #(
    .INIT(64'h00300030003023F0)) 
    \stateOp[2]_i_2__4 
       (.I0(restart_reg_n_0),
        .I1(stateOp[1]),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .I4(reqInvCputrackSet),
        .I5(reqInvSelect),
        .O(\stateOp[2]_i_2__4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF54545400)) 
    \stateOp[2]_i_3__4 
       (.I0(\FSM_onehot_stateSeq[3]_i_3__1_n_0 ),
        .I1(\strbStop5_inferred__0/i__carry__0_n_0 ),
        .I2(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I3(\stateOp[2]_i_6__2_n_0 ),
        .I4(\stateOp[2]_i_7__3_n_0 ),
        .I5(\stateOp[2]_i_8__3_n_0 ),
        .O(\stateOp[2]_i_3__4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1543" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp[2]_i_4__3 
       (.I0(stateOp[2]),
        .I1(stateOp[1]),
        .O(cputrackGetInfoTixVState[1]));
  LUT6 #(
    .INIT(64'hFFFFFFFF0F040000)) 
    \stateOp[2]_i_5__4 
       (.I0(ackInvSelect_sig_reg_0),
        .I1(stateOp[0]),
        .I2(stateOp[2]),
        .I3(stateOp[1]),
        .I4(\stateOp[2]_i_9__1_n_0 ),
        .I5(\stateOp[2]_i_10__3_n_0 ),
        .O(\stateOp[2]_i_5__4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp[2]_i_6__2 
       (.I0(\stateOp[2]_i_11__2_n_0 ),
        .I1(\TCaptMax_reg_n_0_[2] ),
        .I2(\TCaptMax_reg_n_0_[1] ),
        .I3(\TCaptMax_reg_n_0_[3] ),
        .I4(\TCaptMax_reg_n_0_[0] ),
        .I5(\stateOp[2]_i_12__2_n_0 ),
        .O(\stateOp[2]_i_6__2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp[2]_i_7__3 
       (.I0(\stateOp[2]_i_13__3_n_0 ),
        .I1(\TCaptMax_reg_n_0_[19] ),
        .I2(\TCaptMax_reg_n_0_[18] ),
        .I3(\TCaptMax_reg_n_0_[17] ),
        .I4(\TCaptMax_reg_n_0_[16] ),
        .I5(\stateOp[2]_i_14__2_n_0 ),
        .O(\stateOp[2]_i_7__3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000040000000)) 
    \stateOp[2]_i_8__3 
       (.I0(\stateOp[2]_i_15__3_n_0 ),
        .I1(Q[29]),
        .I2(Q[28]),
        .I3(Q[22]),
        .I4(Q[13]),
        .I5(\stateOp[2]_i_16__3_n_0 ),
        .O(\stateOp[2]_i_8__3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAAB)) 
    \stateOp[2]_i_9__1 
       (.I0(stateOp[0]),
        .I1(\stateOp[2]_i_17__3_n_0 ),
        .I2(staTixVTrigger[3]),
        .I3(staTixVTrigger[1]),
        .I4(staTixVTrigger[7]),
        .I5(staTixVTrigger[4]),
        .O(\stateOp[2]_i_9__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1__3_n_0 ),
        .CLR(AR),
        .D(\stateOp[0]_i_1__12_n_0 ),
        .Q(stateOp[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1__3_n_0 ),
        .CLR(AR),
        .D(\stateOp[1]_i_1__12_n_0 ),
        .Q(stateOp[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[2] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1__3_n_0 ),
        .CLR(AR),
        .D(\stateOp[2]_i_2__4_n_0 ),
        .Q(stateOp[2]));
  (* SOFT_HLUTNM = "soft_lutpair1530" *) 
  LUT4 #(
    .INIT(16'h0705)) 
    \stateSeqbufB[0]_i_1__2 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(dneSeqbufCputrackToHostif),
        .O(p_0_in__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair1531" *) 
  LUT4 #(
    .INIT(16'h00BC)) 
    \stateSeqbufB[1]_i_1__2 
       (.I0(\stateSeqbufB[1]_i_2__2_n_0 ),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(stateSeqbufB_reg[2]),
        .O(p_0_in__0[1]));
  LUT5 #(
    .INIT(32'h2AAAAAAA)) 
    \stateSeqbufB[1]_i_2__2 
       (.I0(seqbufCputrackToHostifAXIS_tready),
        .I1(\aSeqbufB_reg_n_0_[8] ),
        .I2(\aSeqbufB_reg_n_0_[6] ),
        .I3(\aSeqbufB[8]_i_4__2_n_0 ),
        .I4(\aSeqbufB_reg_n_0_[7] ),
        .O(\stateSeqbufB[1]_i_2__2_n_0 ));
  LUT6 #(
    .INIT(64'hBBBBBABBABBBBABB)) 
    \stateSeqbufB[2]_i_1__2 
       (.I0(\stateSeqbufB[2]_i_3__2_n_0 ),
        .I1(stateSeqbufB_reg[2]),
        .I2(reqSeqbufCputrackToHostif),
        .I3(stateSeqbufB_reg[0]),
        .I4(stateSeqbufB_reg[1]),
        .I5(seqbufCputrackToHostifAXIS_tready),
        .O(\stateSeqbufB[2]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h000AC000000A0000)) 
    \stateSeqbufB[2]_i_2__2 
       (.I0(dneSeqbufCputrackToHostif),
        .I1(\stateSeqbufB[2]_i_7__2_n_0 ),
        .I2(stateSeqbufB_reg[1]),
        .I3(stateSeqbufB_reg[0]),
        .I4(stateSeqbufB_reg[2]),
        .I5(seqbufCputrackToHostifAXIS_tready),
        .O(p_0_in__0[2]));
  LUT6 #(
    .INIT(64'h0000000000C088CC)) 
    \stateSeqbufB[2]_i_3__2 
       (.I0(dneSeqbufCputrackToHostif),
        .I1(stateSeqbufB_reg[2]),
        .I2(ackSeqbufBToSeqClear),
        .I3(reqSeqbufCputrackToHostif),
        .I4(stateSeqbufB_reg[0]),
        .I5(stateSeqbufB_reg[1]),
        .O(\stateSeqbufB[2]_i_3__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1486" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \stateSeqbufB[2]_i_7__2 
       (.I0(\aSeqbufB_reg_n_0_[7] ),
        .I1(\aSeqbufB[8]_i_4__2_n_0 ),
        .I2(\aSeqbufB_reg_n_0_[6] ),
        .I3(\aSeqbufB_reg_n_0_[8] ),
        .O(\stateSeqbufB[2]_i_7__2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1__2_n_0 ),
        .CLR(AR),
        .D(p_0_in__0[0]),
        .Q(stateSeqbufB_reg[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1__2_n_0 ),
        .CLR(AR),
        .D(p_0_in__0[1]),
        .Q(stateSeqbufB_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1__2_n_0 ),
        .CLR(AR),
        .D(p_0_in__0[2]),
        .Q(stateSeqbufB_reg[2]));
  LUT5 #(
    .INIT(32'hFFEFFBEB)) 
    \state[0]_i_1__0 
       (.I0(\state[7]_i_2__0_n_0 ),
        .I1(\tixVCapture_reg_n_0_[0] ),
        .I2(\tixVCapture_reg_n_0_[1] ),
        .I3(stateOp_dbg[0]),
        .I4(hostifStateOp_dbg[0]),
        .O(\state[0]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFEFFBEB)) 
    \state[1]_i_1 
       (.I0(\state[7]_i_2__0_n_0 ),
        .I1(\tixVCapture_reg_n_0_[0] ),
        .I2(\tixVCapture_reg_n_0_[1] ),
        .I3(stateOp_dbg[1]),
        .I4(hostifStateOp_dbg[1]),
        .O(\state[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFEFFBEB)) 
    \state[2]_i_1 
       (.I0(\state[7]_i_2__0_n_0 ),
        .I1(\tixVCapture_reg_n_0_[0] ),
        .I2(\tixVCapture_reg_n_0_[1] ),
        .I3(stateOp_dbg[2]),
        .I4(hostifStateOp_dbg[2]),
        .O(\state[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFEFFBEB)) 
    \state[3]_i_1 
       (.I0(\state[7]_i_2__0_n_0 ),
        .I1(\tixVCapture_reg_n_0_[0] ),
        .I2(\tixVCapture_reg_n_0_[1] ),
        .I3(stateOp_dbg[6]),
        .I4(hostifStateOp_dbg[3]),
        .O(\state[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFEFFBEB)) 
    \state[4]_i_1__0 
       (.I0(\state[7]_i_2__0_n_0 ),
        .I1(\tixVCapture_reg_n_0_[0] ),
        .I2(\tixVCapture_reg_n_0_[1] ),
        .I3(stateOp_dbg[3]),
        .I4(hostifStateOp_dbg[4]),
        .O(\state[4]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFEFFBEB)) 
    \state[5]_i_1__0 
       (.I0(\state[7]_i_2__0_n_0 ),
        .I1(\tixVCapture_reg_n_0_[0] ),
        .I2(\tixVCapture_reg_n_0_[1] ),
        .I3(stateOp_dbg[4]),
        .I4(hostifStateOp_dbg[5]),
        .O(\state[5]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFEFFBEB)) 
    \state[6]_i_1__0 
       (.I0(\state[7]_i_2__0_n_0 ),
        .I1(\tixVCapture_reg_n_0_[0] ),
        .I2(\tixVCapture_reg_n_0_[1] ),
        .I3(stateOp_dbg[5]),
        .I4(hostifStateOp_dbg[6]),
        .O(\state[6]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFEFFBEB)) 
    \state[7]_i_1__0 
       (.I0(\state[7]_i_2__0_n_0 ),
        .I1(\tixVCapture_reg_n_0_[0] ),
        .I2(\tixVCapture_reg_n_0_[1] ),
        .I3(stateOp_dbg[6]),
        .I4(hostifStateOp_dbg[7]),
        .O(\state[7]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \state[7]_i_2__0 
       (.I0(\tixVCapture_reg_n_0_[6] ),
        .I1(\tixVCapture_reg_n_0_[7] ),
        .I2(\tixVCapture_reg_n_0_[3] ),
        .I3(\tixVCapture_reg_n_0_[2] ),
        .I4(\tixVCapture_reg_n_0_[5] ),
        .I5(\tixVCapture_reg_n_0_[4] ),
        .O(\state[7]_i_2__0_n_0 ));
  FDPE \state_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[0]_i_1__0_n_0 ),
        .PRE(AR),
        .Q(state[0]));
  FDPE \state_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[1]_i_1_n_0 ),
        .PRE(AR),
        .Q(state[1]));
  FDPE \state_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[2]_i_1_n_0 ),
        .PRE(AR),
        .Q(state[2]));
  FDPE \state_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[3]_i_1_n_0 ),
        .PRE(AR),
        .Q(state[3]));
  FDPE \state_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[4]_i_1__0_n_0 ),
        .PRE(AR),
        .Q(state[4]));
  FDPE \state_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[5]_i_1__0_n_0 ),
        .PRE(AR),
        .Q(state[5]));
  FDPE \state_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[6]_i_1__0_n_0 ),
        .PRE(AR),
        .Q(state[6]));
  FDPE \state_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[7]_i_1__0_n_0 ),
        .PRE(AR),
        .Q(state[7]));
  FDCE \stoTixVTrigger_reg[0] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[0]),
        .Q(stoTixVTrigger[0]));
  FDCE \stoTixVTrigger_reg[1] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[1]),
        .Q(stoTixVTrigger[1]));
  FDCE \stoTixVTrigger_reg[2] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[2]),
        .Q(stoTixVTrigger[2]));
  FDCE \stoTixVTrigger_reg[3] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[3]),
        .Q(stoTixVTrigger[3]));
  FDCE \stoTixVTrigger_reg[4] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[4]),
        .Q(stoTixVTrigger[4]));
  FDCE \stoTixVTrigger_reg[5] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[5]),
        .Q(stoTixVTrigger[5]));
  FDCE \stoTixVTrigger_reg[6] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[6]),
        .Q(stoTixVTrigger[6]));
  FDCE \stoTixVTrigger_reg[7] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(D[7]),
        .Q(stoTixVTrigger[7]));
  LUT5 #(
    .INIT(32'hAAAAAAAB)) 
    stop_lcl_i_1__2
       (.I0(TCapt),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I2(rdySeq),
        .I3(ackSeqbufBToSeqClear),
        .I4(\FSM_onehot_stateSeq_reg[3]_0 ),
        .O(stop_lcl_i_1__2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1525" *) 
  LUT2 #(
    .INIT(4'h1)) 
    stop_lcl_i_2__1
       (.I0(first),
        .I1(\FSM_onehot_stateSeq[3]_i_2__1_n_0 ),
        .O(stop_lcl_i_2__1_n_0));
  FDCE stop_lcl_reg
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__2_n_0),
        .CLR(AR),
        .D(stop_lcl_i_2__1_n_0),
        .Q(stop_lcl_reg_n_0));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \strbStop5_inferred__0/i__carry 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\strbStop5_inferred__0/i__carry_n_0 ,\strbStop5_inferred__0/i__carry_n_1 ,\strbStop5_inferred__0/i__carry_n_2 ,\strbStop5_inferred__0/i__carry_n_3 ,\strbStop5_inferred__0/i__carry_n_4 ,\strbStop5_inferred__0/i__carry_n_5 ,\strbStop5_inferred__0/i__carry_n_6 ,\strbStop5_inferred__0/i__carry_n_7 }),
        .DI({i__carry_i_1__6_n_0,i__carry_i_2__6_n_0,i__carry_i_3__6_n_0,i__carry_i_4__6_n_0,i__carry_i_5__6_n_0,i__carry_i_6__6_n_0,i__carry_i_7__5_n_0,i__carry_i_8__5_n_0}),
        .O(\NLW_strbStop5_inferred__0/i__carry_O_UNCONNECTED [7:0]),
        .S({i__carry_i_9__5_n_0,i__carry_i_10__5_n_0,i__carry_i_11__4_n_0,i__carry_i_12__2_n_0,i__carry_i_13__1_n_0,i__carry_i_14__0_n_0,i__carry_i_15__0_n_0,i__carry_i_16__0_n_0}));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \strbStop5_inferred__0/i__carry__0 
       (.CI(\strbStop5_inferred__0/i__carry_n_0 ),
        .CI_TOP(1'b0),
        .CO({\strbStop5_inferred__0/i__carry__0_n_0 ,\strbStop5_inferred__0/i__carry__0_n_1 ,\strbStop5_inferred__0/i__carry__0_n_2 ,\strbStop5_inferred__0/i__carry__0_n_3 ,\strbStop5_inferred__0/i__carry__0_n_4 ,\strbStop5_inferred__0/i__carry__0_n_5 ,\strbStop5_inferred__0/i__carry__0_n_6 ,\strbStop5_inferred__0/i__carry__0_n_7 }),
        .DI({i__carry__0_i_1__0_n_0,i__carry__0_i_2__0_n_0,i__carry__0_i_3__0_n_0,i__carry__0_i_4__0_n_0,i__carry__0_i_5__0_n_0,i__carry__0_i_6__0_n_0,i__carry__0_i_7__0_n_0,i__carry__0_i_8__0_n_0}),
        .O(\NLW_strbStop5_inferred__0/i__carry__0_O_UNCONNECTED [7:0]),
        .S({i__carry__0_i_9__0_n_0,i__carry__0_i_10__0_n_0,i__carry__0_i_11__0_n_0,i__carry__0_i_12__0_n_0,i__carry__0_i_13__0_n_0,i__carry__0_i_14__0_n_0,i__carry__0_i_15__0_n_0,i__carry__0_i_16__0_n_0}));
  LUT6 #(
    .INIT(64'h3333131300001310)) 
    strbStop_i_1__2
       (.I0(stateOp[2]),
        .I1(strbStop_i_2__2_n_0),
        .I2(stateOp[0]),
        .I3(\stateOp[2]_i_3__4_n_0 ),
        .I4(strbStop_i_3__1_n_0),
        .I5(strbStop_reg_n_0),
        .O(strbStop_i_1__2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1493" *) 
  LUT5 #(
    .INIT(32'hEEEEE0EF)) 
    strbStop_i_2__2
       (.I0(reqInvSelect),
        .I1(reqInvCputrackSet),
        .I2(stateOp[2]),
        .I3(stateOp[0]),
        .I4(stateOp[1]),
        .O(strbStop_i_2__2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1527" *) 
  LUT4 #(
    .INIT(16'hF0FD)) 
    strbStop_i_3__1
       (.I0(stateOp[0]),
        .I1(ackInvSelect_sig_reg_0),
        .I2(stateOp[1]),
        .I3(stateOp[2]),
        .O(strbStop_i_3__1_n_0));
  FDCE strbStop_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(strbStop_i_1__2_n_0),
        .Q(strbStop_reg_n_0));
  FDPE \tixVCapture_reg[0] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .D(\tixVCapture_reg[7]_0 [0]),
        .PRE(AR),
        .Q(\tixVCapture_reg_n_0_[0] ));
  FDCE \tixVCapture_reg[1] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(\tixVCapture_reg[7]_0 [1]),
        .Q(\tixVCapture_reg_n_0_[1] ));
  FDCE \tixVCapture_reg[2] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(\tixVCapture_reg[7]_0 [2]),
        .Q(\tixVCapture_reg_n_0_[2] ));
  FDCE \tixVCapture_reg[3] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(\tixVCapture_reg[7]_0 [3]),
        .Q(\tixVCapture_reg_n_0_[3] ));
  FDCE \tixVCapture_reg[4] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(\tixVCapture_reg[7]_0 [4]),
        .Q(\tixVCapture_reg_n_0_[4] ));
  FDCE \tixVCapture_reg[5] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(\tixVCapture_reg[7]_0 [5]),
        .Q(\tixVCapture_reg_n_0_[5] ));
  FDCE \tixVCapture_reg[6] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(\tixVCapture_reg[7]_0 [6]),
        .Q(\tixVCapture_reg_n_0_[6] ));
  FDCE \tixVCapture_reg[7] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(AR),
        .D(\tixVCapture_reg[7]_0 [7]),
        .Q(\tixVCapture_reg_n_0_[7] ));
  (* SOFT_HLUTNM = "soft_lutpair1524" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \txAXIS_tdata[15]_i_19 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[0]),
        .I2(stateSeqbufB_reg[1]),
        .O(seqbufCputrackToHostifAXIS_tvalid));
  (* SOFT_HLUTNM = "soft_lutpair1531" *) 
  LUT3 #(
    .INIT(8'h34)) 
    \wordcntLast[28]_i_14 
       (.I0(stateSeqbufB_reg[0]),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[1]),
        .O(ackSeqbufCputrackToHostif));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Crc8005_32
   (stateOp_reg_0,
    E,
    \stateOp_reg[3] ,
    D,
    \crc_imd_reg[15]_0 ,
    \crc_imd_reg[3]_0 ,
    \resid_reg[1] ,
    \resid_reg[1]_0 ,
    \resid_reg[1]_1 ,
    \stateOp_reg[3]_0 ,
    \crcAXIS_tkeep_reg[2] ,
    p_10_out,
    stateOp_reg_1,
    \crc_imd_reg[6]_0 ,
    \recvAXIS_tdata_sig_reg[13] ,
    \crcAXIS_tkeep_reg[2]_0 ,
    crc_imd013_out,
    crc_imd019_out,
    crc_imd020_out,
    stateOp_reg_2,
    \crc_imd_reg[12]_0 ,
    \crcAXIS_tkeep_reg[1] ,
    \crc_imd_reg[7]_0 ,
    \stateOp_reg[3]_1 ,
    \crc_imd_reg[3]_1 ,
    \crc_imd_reg[2]_0 ,
    \crc_imd_reg[13]_0 ,
    \crc_imd_reg[14]_0 ,
    \stateOp_reg[2] ,
    \crc_imd_reg[8]_0 ,
    crc_imd015_out,
    \crc_imd_reg[9]_0 ,
    \txAXIS_tdata_reg[8] ,
    \crc_imd_reg[0]_0 ,
    crc_imd033_out,
    \tkst_reg[23] ,
    \tkst_reg[15] ,
    \scoreMax_reg[7] ,
    \crc_imd_reg[2]_1 ,
    \crc_imd_reg[15]_1 ,
    \crc_imd_reg[15]_2 ,
    \crc_imd_reg[15]_3 ,
    \crc_imd_reg[15]_4 ,
    \crc_imd_reg[0]_1 ,
    \crc_imd_reg[15]_5 ,
    \crc_imd_reg[1]_0 ,
    \crc_imd_reg[2]_2 ,
    \crc_imd_reg[6]_1 ,
    \crc_imd_reg[3]_2 ,
    \crc_imd_reg[14]_1 ,
    \stateOp_next_reg[2] ,
    \crc_imd_reg[3]_3 ,
    \stateOp_reg[1] ,
    \stateOp_next_reg[0] ,
    \crc_imd_reg[15]_6 ,
    \crc_imd_reg[13]_1 ,
    \crc_imd_reg[11]_0 ,
    \crc_imd_reg[9]_1 ,
    \stateOp_reg[4] ,
    \stateOp_reg[4]_0 ,
    \crc_imd_reg[0]_2 ,
    \crc_imd_reg[2]_3 ,
    \crc_imd_reg[4]_0 ,
    \crc_imd_reg[5]_0 ,
    \crc_imd_reg[6]_2 ,
    \crc_imd_reg[5]_1 ,
    \crc_imd_reg[4]_1 ,
    \crc_imd_reg[5]_2 ,
    \crc_imd_reg[6]_3 ,
    \stateOp_reg[3]_2 ,
    \stateOp_reg[3]_3 ,
    \stateOp_reg[3]_4 ,
    \stateOp_reg[3]_5 ,
    \crc_imd_reg[0]_3 ,
    \crc_imd_reg[1]_1 ,
    \crc_imd_reg[15]_7 ,
    \crc_imd_reg[13]_2 ,
    \resid_reg[1]_2 ,
    \crc_imd_reg[9]_2 ,
    \stateOp_reg[1]_0 ,
    \stateOp_reg[1]_1 ,
    \stateOp_reg[1]_2 ,
    \stateOp_reg[1]_3 ,
    \crc_imd_reg[7]_1 ,
    \crc_imd_reg[12]_1 ,
    \stateOp_reg[1]_4 ,
    \crc_imd_reg[14]_2 ,
    \stateOp_reg[1]_5 ,
    \crc_imd_reg[4]_2 ,
    \crc_imd_reg[6]_4 ,
    stateOp_reg_3,
    aclk_sig,
    first_reg_0,
    \txlen_reg[3] ,
    Q,
    \retbuf_reg[0][0] ,
    \retbuf_reg[33][0] ,
    \retbuf_reg[0][6] ,
    \retbuf_reg[31][0] ,
    \tixVCommand_reg[0] ,
    \tixVCommand_reg[0]_0 ,
    \crc_imd_reg[0]_4 ,
    \crc_imd_reg[0]_5 ,
    \crc_imd_reg[1]_2 ,
    \crc_imd_reg[1]_3 ,
    \crc_imd_reg[1]_4 ,
    \crc_imd_reg[7]_2 ,
    \crc_imd_reg[8]_1 ,
    \crc_imd_reg[8]_2 ,
    AXIS_tdata,
    \crc_imd_reg[10]_0 ,
    \crc_imd_reg[11]_1 ,
    crc_imd017_out,
    \crc_imd_reg[13]_3 ,
    \crc_imd_reg[14]_3 ,
    \crc_imd_reg[15]_8 ,
    \crc_imd_reg[15]_9 ,
    \crc_imd_reg[15]_10 ,
    \crc_imd_reg[15]_11 ,
    \crc_imd_reg[0]_6 ,
    \crc_imd_reg[0]_7 ,
    p_24_in,
    crc_imd032_out,
    crc_imd059_out,
    \crc_imd_reg[0]_8 ,
    rxAXIS_tvalid,
    recvAXIS_tlast,
    crc_imd060_out,
    \crc_imd_reg[0]_9 ,
    \crc_imd_reg[0]_10 ,
    \crc_imd_reg[0]_11 ,
    \crc_imd[15]_i_9__0 ,
    \crc_imd[15]_i_9__0_0 ,
    \crc_imd[1]_i_2__0_0 ,
    \crc_imd[1]_i_2__0_1 ,
    AXIS_tvalid,
    AXIS_tlast,
    \retbuf_reg[0][0]_0 ,
    \retbuf_reg[0][0]_1 ,
    \retbuf_reg[0][1] ,
    \retbuf_reg[2][7] ,
    \retbuf_reg[6][7] ,
    \txAXIS_tdata_reg[16] ,
    \txAXIS_tdata_reg[16]_0 ,
    \txAXIS_tdata_reg[18] ,
    \retbuf_reg[37][0] ,
    \retbuf_reg[36][0] ,
    \retbuf_reg[33][0]_0 ,
    \retbuf_reg[8][5] ,
    \retbuf_reg[0][3] ,
    \retbuf_reg[8][0] ,
    \stateOp_reg[2]_0 ,
    \stateOp_reg[4]_1 ,
    \stateOp_reg[4]_2 ,
    \txAXIS_tdata_reg[10] ,
    \txAXIS_tdata_reg[10]_0 ,
    \txAXIS_tdata_reg[10]_1 ,
    \txAXIS_tdata_reg[26] ,
    \retbuf_reg[1][0] ,
    \txAXIS_tdata_reg[6] ,
    \txAXIS_tdata_reg[6]_0 ,
    \crc_imd_reg[9]_3 );
  output stateOp_reg_0;
  output [0:0]E;
  output [0:0]\stateOp_reg[3] ;
  output [7:0]D;
  output [15:0]\crc_imd_reg[15]_0 ;
  output \crc_imd_reg[3]_0 ;
  output \resid_reg[1] ;
  output \resid_reg[1]_0 ;
  output \resid_reg[1]_1 ;
  output [0:0]\stateOp_reg[3]_0 ;
  output \crcAXIS_tkeep_reg[2] ;
  output [0:0]p_10_out;
  output stateOp_reg_1;
  output \crc_imd_reg[6]_0 ;
  output \recvAXIS_tdata_sig_reg[13] ;
  output \crcAXIS_tkeep_reg[2]_0 ;
  output crc_imd013_out;
  output crc_imd019_out;
  output crc_imd020_out;
  output stateOp_reg_2;
  output \crc_imd_reg[12]_0 ;
  output \crcAXIS_tkeep_reg[1] ;
  output \crc_imd_reg[7]_0 ;
  output \stateOp_reg[3]_1 ;
  output \crc_imd_reg[3]_1 ;
  output \crc_imd_reg[2]_0 ;
  output \crc_imd_reg[13]_0 ;
  output \crc_imd_reg[14]_0 ;
  output \stateOp_reg[2] ;
  output \crc_imd_reg[8]_0 ;
  output crc_imd015_out;
  output \crc_imd_reg[9]_0 ;
  output \txAXIS_tdata_reg[8] ;
  output \crc_imd_reg[0]_0 ;
  output crc_imd033_out;
  output [7:0]\tkst_reg[23] ;
  output [7:0]\tkst_reg[15] ;
  output [7:0]\scoreMax_reg[7] ;
  output [1:0]\crc_imd_reg[2]_1 ;
  output [7:0]\crc_imd_reg[15]_1 ;
  output [7:0]\crc_imd_reg[15]_2 ;
  output [7:0]\crc_imd_reg[15]_3 ;
  output [7:0]\crc_imd_reg[15]_4 ;
  output \crc_imd_reg[0]_1 ;
  output [7:0]\crc_imd_reg[15]_5 ;
  output \crc_imd_reg[1]_0 ;
  output \crc_imd_reg[2]_2 ;
  output [4:0]\crc_imd_reg[6]_1 ;
  output \crc_imd_reg[3]_2 ;
  output [1:0]\crc_imd_reg[14]_1 ;
  output \stateOp_next_reg[2] ;
  output \crc_imd_reg[3]_3 ;
  output \stateOp_reg[1] ;
  output \stateOp_next_reg[0] ;
  output \crc_imd_reg[15]_6 ;
  output \crc_imd_reg[13]_1 ;
  output \crc_imd_reg[11]_0 ;
  output \crc_imd_reg[9]_1 ;
  output \stateOp_reg[4] ;
  output \stateOp_reg[4]_0 ;
  output \crc_imd_reg[0]_2 ;
  output \crc_imd_reg[2]_3 ;
  output \crc_imd_reg[4]_0 ;
  output \crc_imd_reg[5]_0 ;
  output \crc_imd_reg[6]_2 ;
  output \crc_imd_reg[5]_1 ;
  output \crc_imd_reg[4]_1 ;
  output \crc_imd_reg[5]_2 ;
  output \crc_imd_reg[6]_3 ;
  output \stateOp_reg[3]_2 ;
  output \stateOp_reg[3]_3 ;
  output \stateOp_reg[3]_4 ;
  output \stateOp_reg[3]_5 ;
  output \crc_imd_reg[0]_3 ;
  output \crc_imd_reg[1]_1 ;
  output \crc_imd_reg[15]_7 ;
  output \crc_imd_reg[13]_2 ;
  output \resid_reg[1]_2 ;
  output \crc_imd_reg[9]_2 ;
  output \stateOp_reg[1]_0 ;
  output \stateOp_reg[1]_1 ;
  output \stateOp_reg[1]_2 ;
  output \stateOp_reg[1]_3 ;
  output \crc_imd_reg[7]_1 ;
  output \crc_imd_reg[12]_1 ;
  output \stateOp_reg[1]_4 ;
  output \crc_imd_reg[14]_2 ;
  output \stateOp_reg[1]_5 ;
  output \crc_imd_reg[4]_2 ;
  output \crc_imd_reg[6]_4 ;
  input stateOp_reg_3;
  input aclk_sig;
  input [0:0]first_reg_0;
  input \txlen_reg[3] ;
  input [4:0]Q;
  input \retbuf_reg[0][0] ;
  input \retbuf_reg[33][0] ;
  input \retbuf_reg[0][6] ;
  input [1:0]\retbuf_reg[31][0] ;
  input \tixVCommand_reg[0] ;
  input [0:0]\tixVCommand_reg[0]_0 ;
  input \crc_imd_reg[0]_4 ;
  input \crc_imd_reg[0]_5 ;
  input \crc_imd_reg[1]_2 ;
  input \crc_imd_reg[1]_3 ;
  input \crc_imd_reg[1]_4 ;
  input \crc_imd_reg[7]_2 ;
  input \crc_imd_reg[8]_1 ;
  input \crc_imd_reg[8]_2 ;
  input [11:0]AXIS_tdata;
  input \crc_imd_reg[10]_0 ;
  input \crc_imd_reg[11]_1 ;
  input crc_imd017_out;
  input \crc_imd_reg[13]_3 ;
  input \crc_imd_reg[14]_3 ;
  input \crc_imd_reg[15]_8 ;
  input \crc_imd_reg[15]_9 ;
  input \crc_imd_reg[15]_10 ;
  input \crc_imd_reg[15]_11 ;
  input \crc_imd_reg[0]_6 ;
  input [3:0]\crc_imd_reg[0]_7 ;
  input p_24_in;
  input crc_imd032_out;
  input crc_imd059_out;
  input \crc_imd_reg[0]_8 ;
  input rxAXIS_tvalid;
  input recvAXIS_tlast;
  input crc_imd060_out;
  input \crc_imd_reg[0]_9 ;
  input \crc_imd_reg[0]_10 ;
  input \crc_imd_reg[0]_11 ;
  input [8:0]\crc_imd[15]_i_9__0 ;
  input [8:0]\crc_imd[15]_i_9__0_0 ;
  input \crc_imd[1]_i_2__0_0 ;
  input \crc_imd[1]_i_2__0_1 ;
  input AXIS_tvalid;
  input AXIS_tlast;
  input \retbuf_reg[0][0]_0 ;
  input \retbuf_reg[0][0]_1 ;
  input [1:0]\retbuf_reg[0][1] ;
  input [15:0]\retbuf_reg[2][7] ;
  input [7:0]\retbuf_reg[6][7] ;
  input \txAXIS_tdata_reg[16] ;
  input \txAXIS_tdata_reg[16]_0 ;
  input \txAXIS_tdata_reg[18] ;
  input \retbuf_reg[37][0] ;
  input \retbuf_reg[36][0] ;
  input \retbuf_reg[33][0]_0 ;
  input \retbuf_reg[8][5] ;
  input \retbuf_reg[0][3] ;
  input \retbuf_reg[8][0] ;
  input [1:0]\stateOp_reg[2]_0 ;
  input \stateOp_reg[4]_1 ;
  input \stateOp_reg[4]_2 ;
  input \txAXIS_tdata_reg[10] ;
  input [0:0]\txAXIS_tdata_reg[10]_0 ;
  input [0:0]\txAXIS_tdata_reg[10]_1 ;
  input [0:0]\txAXIS_tdata_reg[26] ;
  input [2:0]\retbuf_reg[1][0] ;
  input [3:0]\txAXIS_tdata_reg[6] ;
  input [3:0]\txAXIS_tdata_reg[6]_0 ;
  input [5:0]\crc_imd_reg[9]_3 ;

  wire [11:0]AXIS_tdata;
  wire AXIS_tlast;
  wire AXIS_tvalid;
  wire [7:0]D;
  wire [0:0]E;
  wire [4:0]Q;
  wire aclk_sig;
  wire \crcAXIS_tkeep_reg[1] ;
  wire \crcAXIS_tkeep_reg[2] ;
  wire \crcAXIS_tkeep_reg[2]_0 ;
  wire crc_imd013_out;
  wire crc_imd015_out;
  wire crc_imd017_out;
  wire crc_imd019_out;
  wire crc_imd020_out;
  wire crc_imd032_out;
  wire crc_imd033_out;
  wire crc_imd059_out;
  wire crc_imd060_out;
  wire \crc_imd[0]_i_1__0_n_0 ;
  wire \crc_imd[0]_i_2__0_n_0 ;
  wire \crc_imd[0]_i_5__0_n_0 ;
  wire \crc_imd[0]_i_6__0_n_0 ;
  wire \crc_imd[10]_i_1__0_n_0 ;
  wire \crc_imd[11]_i_1__0_n_0 ;
  wire \crc_imd[11]_i_3__0_n_0 ;
  wire \crc_imd[12]_i_1__0_n_0 ;
  wire \crc_imd[12]_i_3__0_n_0 ;
  wire \crc_imd[13]_i_1__0_n_0 ;
  wire \crc_imd[14]_i_1__0_n_0 ;
  wire \crc_imd[15]_i_11__0_n_0 ;
  wire \crc_imd[15]_i_12__0_n_0 ;
  wire \crc_imd[15]_i_1__0_n_0 ;
  wire \crc_imd[15]_i_2__0_n_0 ;
  wire \crc_imd[15]_i_3_n_0 ;
  wire \crc_imd[15]_i_6__0_n_0 ;
  wire \crc_imd[15]_i_7__0_n_0 ;
  wire [8:0]\crc_imd[15]_i_9__0 ;
  wire [8:0]\crc_imd[15]_i_9__0_0 ;
  wire \crc_imd[1]_i_10__0_n_0 ;
  wire \crc_imd[1]_i_1__0_n_0 ;
  wire \crc_imd[1]_i_2__0_0 ;
  wire \crc_imd[1]_i_2__0_1 ;
  wire \crc_imd[1]_i_2__0_n_0 ;
  wire \crc_imd[1]_i_3__0_n_0 ;
  wire \crc_imd[1]_i_8__0_n_0 ;
  wire \crc_imd[1]_i_9__0_n_0 ;
  wire \crc_imd[7]_i_1__0_n_0 ;
  wire \crc_imd[7]_i_4__0_n_0 ;
  wire \crc_imd[7]_i_5__0_n_0 ;
  wire \crc_imd[7]_i_6__0_n_0 ;
  wire \crc_imd[7]_i_8__0_n_0 ;
  wire \crc_imd[8]_i_1__0_n_0 ;
  wire \crc_imd[8]_i_2__0_n_0 ;
  wire \crc_imd_reg[0]_0 ;
  wire \crc_imd_reg[0]_1 ;
  wire \crc_imd_reg[0]_10 ;
  wire \crc_imd_reg[0]_11 ;
  wire \crc_imd_reg[0]_2 ;
  wire \crc_imd_reg[0]_3 ;
  wire \crc_imd_reg[0]_4 ;
  wire \crc_imd_reg[0]_5 ;
  wire \crc_imd_reg[0]_6 ;
  wire [3:0]\crc_imd_reg[0]_7 ;
  wire \crc_imd_reg[0]_8 ;
  wire \crc_imd_reg[0]_9 ;
  wire \crc_imd_reg[10]_0 ;
  wire \crc_imd_reg[11]_0 ;
  wire \crc_imd_reg[11]_1 ;
  wire \crc_imd_reg[12]_0 ;
  wire \crc_imd_reg[12]_1 ;
  wire \crc_imd_reg[13]_0 ;
  wire \crc_imd_reg[13]_1 ;
  wire \crc_imd_reg[13]_2 ;
  wire \crc_imd_reg[13]_3 ;
  wire \crc_imd_reg[14]_0 ;
  wire [1:0]\crc_imd_reg[14]_1 ;
  wire \crc_imd_reg[14]_2 ;
  wire \crc_imd_reg[14]_3 ;
  wire [15:0]\crc_imd_reg[15]_0 ;
  wire [7:0]\crc_imd_reg[15]_1 ;
  wire \crc_imd_reg[15]_10 ;
  wire \crc_imd_reg[15]_11 ;
  wire [7:0]\crc_imd_reg[15]_2 ;
  wire [7:0]\crc_imd_reg[15]_3 ;
  wire [7:0]\crc_imd_reg[15]_4 ;
  wire [7:0]\crc_imd_reg[15]_5 ;
  wire \crc_imd_reg[15]_6 ;
  wire \crc_imd_reg[15]_7 ;
  wire \crc_imd_reg[15]_8 ;
  wire \crc_imd_reg[15]_9 ;
  wire \crc_imd_reg[1]_0 ;
  wire \crc_imd_reg[1]_1 ;
  wire \crc_imd_reg[1]_2 ;
  wire \crc_imd_reg[1]_3 ;
  wire \crc_imd_reg[1]_4 ;
  wire \crc_imd_reg[2]_0 ;
  wire [1:0]\crc_imd_reg[2]_1 ;
  wire \crc_imd_reg[2]_2 ;
  wire \crc_imd_reg[2]_3 ;
  wire \crc_imd_reg[3]_0 ;
  wire \crc_imd_reg[3]_1 ;
  wire \crc_imd_reg[3]_2 ;
  wire \crc_imd_reg[3]_3 ;
  wire \crc_imd_reg[4]_0 ;
  wire \crc_imd_reg[4]_1 ;
  wire \crc_imd_reg[4]_2 ;
  wire \crc_imd_reg[5]_0 ;
  wire \crc_imd_reg[5]_1 ;
  wire \crc_imd_reg[5]_2 ;
  wire \crc_imd_reg[6]_0 ;
  wire [4:0]\crc_imd_reg[6]_1 ;
  wire \crc_imd_reg[6]_2 ;
  wire \crc_imd_reg[6]_3 ;
  wire \crc_imd_reg[6]_4 ;
  wire \crc_imd_reg[7]_0 ;
  wire \crc_imd_reg[7]_1 ;
  wire \crc_imd_reg[7]_2 ;
  wire \crc_imd_reg[8]_0 ;
  wire \crc_imd_reg[8]_1 ;
  wire \crc_imd_reg[8]_2 ;
  wire \crc_imd_reg[9]_0 ;
  wire \crc_imd_reg[9]_1 ;
  wire \crc_imd_reg[9]_2 ;
  wire [5:0]\crc_imd_reg[9]_3 ;
  wire first;
  wire first_i_1__0_n_0;
  wire [0:0]first_reg_0;
  wire [0:0]p_10_out;
  wire p_24_in;
  wire \recvAXIS_tdata_sig_reg[13] ;
  wire recvAXIS_tlast;
  wire \resid_reg[1] ;
  wire \resid_reg[1]_0 ;
  wire \resid_reg[1]_1 ;
  wire \resid_reg[1]_2 ;
  wire \retbuf[0][1]_i_2__0_n_0 ;
  wire \retbuf[2][2]_i_2__0_n_0 ;
  wire \retbuf[2][4]_i_2__0_n_0 ;
  wire \retbuf[3][0]_i_2__0_n_0 ;
  wire \retbuf[6][6]_i_2__0_n_0 ;
  wire \retbuf_reg[0][0] ;
  wire \retbuf_reg[0][0]_0 ;
  wire \retbuf_reg[0][0]_1 ;
  wire [1:0]\retbuf_reg[0][1] ;
  wire \retbuf_reg[0][3] ;
  wire \retbuf_reg[0][6] ;
  wire [2:0]\retbuf_reg[1][0] ;
  wire [15:0]\retbuf_reg[2][7] ;
  wire [1:0]\retbuf_reg[31][0] ;
  wire \retbuf_reg[33][0] ;
  wire \retbuf_reg[33][0]_0 ;
  wire \retbuf_reg[36][0] ;
  wire \retbuf_reg[37][0] ;
  wire [7:0]\retbuf_reg[6][7] ;
  wire \retbuf_reg[8][0] ;
  wire \retbuf_reg[8][5] ;
  wire rxAXIS_tvalid;
  wire [7:0]\scoreMax_reg[7] ;
  wire \stateOp[3]_i_10_n_0 ;
  wire \stateOp[3]_i_11_n_0 ;
  wire \stateOp[3]_i_12_n_0 ;
  wire \stateOp_next_reg[0] ;
  wire \stateOp_next_reg[2] ;
  wire \stateOp_reg[1] ;
  wire \stateOp_reg[1]_0 ;
  wire \stateOp_reg[1]_1 ;
  wire \stateOp_reg[1]_2 ;
  wire \stateOp_reg[1]_3 ;
  wire \stateOp_reg[1]_4 ;
  wire \stateOp_reg[1]_5 ;
  wire \stateOp_reg[2] ;
  wire [1:0]\stateOp_reg[2]_0 ;
  wire [0:0]\stateOp_reg[3] ;
  wire [0:0]\stateOp_reg[3]_0 ;
  wire \stateOp_reg[3]_1 ;
  wire \stateOp_reg[3]_2 ;
  wire \stateOp_reg[3]_3 ;
  wire \stateOp_reg[3]_4 ;
  wire \stateOp_reg[3]_5 ;
  wire \stateOp_reg[4] ;
  wire \stateOp_reg[4]_0 ;
  wire \stateOp_reg[4]_1 ;
  wire \stateOp_reg[4]_2 ;
  wire stateOp_reg_0;
  wire stateOp_reg_1;
  wire stateOp_reg_2;
  wire stateOp_reg_3;
  wire \tixVCommand_reg[0] ;
  wire [0:0]\tixVCommand_reg[0]_0 ;
  wire \tixVController[7]_i_3__0_n_0 ;
  wire [7:0]\tkst_reg[15] ;
  wire [7:0]\tkst_reg[23] ;
  wire \txAXIS_tdata[0]_i_6__0_n_0 ;
  wire \txAXIS_tdata[10]_i_5__0_n_0 ;
  wire \txAXIS_tdata[26]_i_6__0_n_0 ;
  wire \txAXIS_tdata[2]_i_6__0_n_0 ;
  wire \txAXIS_tdata[4]_i_7__0_n_0 ;
  wire \txAXIS_tdata[6]_i_9__0_n_0 ;
  wire \txAXIS_tdata_reg[10] ;
  wire [0:0]\txAXIS_tdata_reg[10]_0 ;
  wire [0:0]\txAXIS_tdata_reg[10]_1 ;
  wire \txAXIS_tdata_reg[16] ;
  wire \txAXIS_tdata_reg[16]_0 ;
  wire \txAXIS_tdata_reg[18] ;
  wire [0:0]\txAXIS_tdata_reg[26] ;
  wire [3:0]\txAXIS_tdata_reg[6] ;
  wire [3:0]\txAXIS_tdata_reg[6]_0 ;
  wire \txAXIS_tdata_reg[8] ;
  wire \txlen[3]_i_2_n_0 ;
  wire \txlen_reg[3] ;
  wire validCrc_sig_i_1__0_n_0;
  wire validCrc_sig_reg_n_0;

  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFEEE)) 
    \crc_imd[0]_i_1__0 
       (.I0(\crc_imd_reg[0]_4 ),
        .I1(\crc_imd[0]_i_2__0_n_0 ),
        .I2(\crcAXIS_tkeep_reg[2] ),
        .I3(p_10_out),
        .I4(\crc_imd_reg[0]_5 ),
        .I5(\crc_imd[0]_i_5__0_n_0 ),
        .O(\crc_imd[0]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[0]_i_2__0 
       (.I0(\crcAXIS_tkeep_reg[2]_0 ),
        .I1(\recvAXIS_tdata_sig_reg[13] ),
        .I2(\crc_imd_reg[15]_11 ),
        .I3(\crc_imd[1]_i_10__0_n_0 ),
        .I4(\crc_imd_reg[0]_6 ),
        .O(\crc_imd[0]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2663" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[0]_i_3__0 
       (.I0(\crc_imd_reg[15]_10 ),
        .I1(\crc_imd[1]_i_10__0_n_0 ),
        .I2(\crc_imd[0]_i_6__0_n_0 ),
        .O(p_10_out));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[0]_i_5__0 
       (.I0(stateOp_reg_1),
        .I1(\crc_imd_reg[0]_9 ),
        .I2(\recvAXIS_tdata_sig_reg[13] ),
        .I3(\crc_imd_reg[0]_10 ),
        .I4(\crc_imd_reg[0]_11 ),
        .I5(\crc_imd_reg[13]_0 ),
        .O(\crc_imd[0]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h95AA95956A556A6A)) 
    \crc_imd[0]_i_6__0 
       (.I0(\crc_imd[1]_i_9__0_n_0 ),
        .I1(\stateOp_reg[2] ),
        .I2(\crc_imd[15]_i_9__0 [0]),
        .I3(\stateOp_reg[3]_1 ),
        .I4(\crc_imd[15]_i_9__0_0 [0]),
        .I5(\crc_imd_reg[15]_0 [8]),
        .O(\crc_imd[0]_i_6__0_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \crc_imd[0]_i_9__0 
       (.I0(\crc_imd[1]_i_10__0_n_0 ),
        .I1(\crc_imd_reg[15]_10 ),
        .O(\crc_imd_reg[13]_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEAEAEA)) 
    \crc_imd[10]_i_1__0 
       (.I0(\crc_imd_reg[0]_4 ),
        .I1(\crcAXIS_tkeep_reg[2]_0 ),
        .I2(crc_imd013_out),
        .I3(\crcAXIS_tkeep_reg[2] ),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\crc_imd_reg[10]_0 ),
        .O(\crc_imd[10]_i_1__0_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[10]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [8]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(AXIS_tdata[1]),
        .I3(AXIS_tdata[0]),
        .O(crc_imd013_out));
  LUT6 #(
    .INIT(64'hFFFFFFFFEAAEAEEA)) 
    \crc_imd[11]_i_1__0 
       (.I0(\crc_imd_reg[0]_4 ),
        .I1(\crcAXIS_tkeep_reg[2]_0 ),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\crc_imd_reg[15]_0 [9]),
        .I4(\crc_imd_reg[11]_1 ),
        .I5(\crc_imd[11]_i_3__0_n_0 ),
        .O(\crc_imd[11]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[11]_i_3__0 
       (.I0(stateOp_reg_1),
        .I1(crc_imd032_out),
        .I2(stateOp_reg_2),
        .I3(crc_imd059_out),
        .I4(\crc_imd_reg[15]_0 [3]),
        .I5(\crcAXIS_tkeep_reg[2] ),
        .O(\crc_imd[11]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEAEAEA)) 
    \crc_imd[12]_i_1__0 
       (.I0(\crc_imd_reg[0]_4 ),
        .I1(\crcAXIS_tkeep_reg[2]_0 ),
        .I2(crc_imd017_out),
        .I3(\crcAXIS_tkeep_reg[2] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\crc_imd[12]_i_3__0_n_0 ),
        .O(\crc_imd[12]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hAA0000003C000000)) 
    \crc_imd[12]_i_3__0 
       (.I0(crc_imd060_out),
        .I1(\crc_imd_reg[2]_0 ),
        .I2(\crc_imd_reg[3]_1 ),
        .I3(stateOp_reg_0),
        .I4(\crc_imd_reg[0]_7 [2]),
        .I5(\crc_imd_reg[0]_7 [3]),
        .O(\crc_imd[12]_i_3__0_n_0 ));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \crc_imd[12]_i_7__0 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd[15]_i_9__0_0 [5]),
        .I2(\stateOp_reg[3]_1 ),
        .I3(\crc_imd[15]_i_9__0 [5]),
        .I4(\stateOp_reg[2] ),
        .O(\crc_imd_reg[2]_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEAEAEA)) 
    \crc_imd[13]_i_1__0 
       (.I0(\crc_imd_reg[0]_4 ),
        .I1(\crcAXIS_tkeep_reg[2]_0 ),
        .I2(crc_imd019_out),
        .I3(\crcAXIS_tkeep_reg[2] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\crc_imd_reg[13]_3 ),
        .O(\crc_imd[13]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h9666999996669666)) 
    \crc_imd[13]_i_2__0 
       (.I0(\crc_imd_reg[12]_0 ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\stateOp_reg[2] ),
        .I3(\crc_imd[15]_i_9__0 [1]),
        .I4(\stateOp_reg[3]_1 ),
        .I5(\crc_imd[15]_i_9__0_0 [1]),
        .O(crc_imd019_out));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \crc_imd[13]_i_5__0 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd[15]_i_9__0_0 [6]),
        .I2(\stateOp_reg[3]_1 ),
        .I3(\crc_imd[15]_i_9__0 [6]),
        .I4(\stateOp_reg[2] ),
        .O(\crc_imd_reg[3]_1 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEAEAEA)) 
    \crc_imd[14]_i_1__0 
       (.I0(\crc_imd_reg[0]_4 ),
        .I1(\crcAXIS_tkeep_reg[2]_0 ),
        .I2(crc_imd020_out),
        .I3(\crcAXIS_tkeep_reg[2] ),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\crc_imd_reg[14]_3 ),
        .O(\crc_imd[14]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2633" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \crc_imd[14]_i_3__0 
       (.I0(\crc_imd_reg[0]_7 [2]),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_7 [1]),
        .O(\crcAXIS_tkeep_reg[2]_0 ));
  LUT6 #(
    .INIT(64'h8F88707770778F88)) 
    \crc_imd[14]_i_4__0 
       (.I0(\stateOp_reg[2] ),
        .I1(\crc_imd[15]_i_9__0 [3]),
        .I2(\stateOp_reg[3]_1 ),
        .I3(\crc_imd[15]_i_9__0_0 [3]),
        .I4(\crc_imd_reg[15]_0 [13]),
        .I5(\crc_imd_reg[12]_0 ),
        .O(crc_imd020_out));
  (* SOFT_HLUTNM = "soft_lutpair2662" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \crc_imd[14]_i_5__0 
       (.I0(\crc_imd_reg[0]_7 [2]),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_7 [1]),
        .O(\crcAXIS_tkeep_reg[2] ));
  (* SOFT_HLUTNM = "soft_lutpair2647" *) 
  LUT5 #(
    .INIT(32'h00040400)) 
    \crc_imd[14]_i_7__0 
       (.I0(Q[2]),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(Q[3]),
        .O(\stateOp_reg[2] ));
  (* SOFT_HLUTNM = "soft_lutpair2634" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \crc_imd[15]_i_10__0 
       (.I0(stateOp_reg_0),
        .I1(\crc_imd_reg[0]_7 [2]),
        .I2(\crc_imd_reg[0]_7 [3]),
        .O(stateOp_reg_2));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[15]_i_11__0 
       (.I0(stateOp_reg_1),
        .I1(\crc_imd_reg[15]_11 ),
        .I2(\crc_imd_reg[0]_10 ),
        .I3(p_10_out),
        .I4(\crc_imd_reg[0]_9 ),
        .I5(\crc_imd_reg[7]_0 ),
        .O(\crc_imd[15]_i_11__0_n_0 ));
  LUT6 #(
    .INIT(64'h8A888A888A880000)) 
    \crc_imd[15]_i_12__0 
       (.I0(\crc_imd_reg[0]_7 [0]),
        .I1(\stateOp_reg[2] ),
        .I2(\stateOp_reg[3]_1 ),
        .I3(rxAXIS_tvalid),
        .I4(validCrc_sig_reg_n_0),
        .I5(first),
        .O(\crc_imd[15]_i_12__0_n_0 ));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \crc_imd[15]_i_13__0 
       (.I0(\crc_imd_reg[15]_0 [12]),
        .I1(\crc_imd[15]_i_9__0_0 [2]),
        .I2(\stateOp_reg[3]_1 ),
        .I3(\crc_imd[15]_i_9__0 [2]),
        .I4(\stateOp_reg[2] ),
        .O(\crc_imd_reg[12]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2663" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[15]_i_16__0 
       (.I0(\crc_imd_reg[7]_2 ),
        .I1(\crc_imd_reg[7]_0 ),
        .I2(\crc_imd[0]_i_6__0_n_0 ),
        .O(\recvAXIS_tdata_sig_reg[13] ));
  LUT6 #(
    .INIT(64'hABABAAABABABABAB)) 
    \crc_imd[15]_i_1__0 
       (.I0(\crc_imd[15]_i_3_n_0 ),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_8 ),
        .I3(rxAXIS_tvalid),
        .I4(\stateOp_reg[3]_1 ),
        .I5(recvAXIS_tlast),
        .O(\crc_imd[15]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \crc_imd[15]_i_20__0 
       (.I0(\crc_imd_reg[15]_0 [8]),
        .I1(\crc_imd[15]_i_9__0_0 [0]),
        .I2(\stateOp_reg[3]_1 ),
        .I3(\crc_imd[15]_i_9__0 [0]),
        .I4(\stateOp_reg[2] ),
        .O(\crc_imd_reg[8]_0 ));
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[15]_i_21__0 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\crc_imd_reg[11]_1 ),
        .O(\crc_imd_reg[9]_0 ));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \crc_imd[15]_i_22__0 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd[15]_i_9__0_0 [8]),
        .I2(\stateOp_reg[3]_1 ),
        .I3(\crc_imd[15]_i_9__0 [8]),
        .I4(\stateOp_reg[2] ),
        .O(\crc_imd_reg[7]_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFEFFEEEEE)) 
    \crc_imd[15]_i_2__0 
       (.I0(\crc_imd[15]_i_6__0_n_0 ),
        .I1(\crc_imd[15]_i_7__0_n_0 ),
        .I2(\crc_imd_reg[15]_8 ),
        .I3(\crc_imd_reg[15]_9 ),
        .I4(stateOp_reg_2),
        .I5(\crc_imd[15]_i_11__0_n_0 ),
        .O(\crc_imd[15]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2634" *) 
  LUT5 #(
    .INIT(32'h80A00020)) 
    \crc_imd[15]_i_3 
       (.I0(\crc_imd[15]_i_12__0_n_0 ),
        .I1(\crc_imd_reg[0]_7 [2]),
        .I2(stateOp_reg_0),
        .I3(\crc_imd_reg[0]_7 [3]),
        .I4(\crc_imd_reg[0]_7 [1]),
        .O(\crc_imd[15]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2647" *) 
  LUT5 #(
    .INIT(32'hFFFBBFFF)) 
    \crc_imd[15]_i_5__0 
       (.I0(Q[3]),
        .I1(Q[1]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[0]),
        .O(\stateOp_reg[3]_1 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF69960000)) 
    \crc_imd[15]_i_6__0 
       (.I0(\crc_imd_reg[12]_0 ),
        .I1(\crc_imd_reg[15]_10 ),
        .I2(\crc_imd_reg[15]_11 ),
        .I3(\recvAXIS_tdata_sig_reg[13] ),
        .I4(\crcAXIS_tkeep_reg[2]_0 ),
        .I5(\crc_imd_reg[0]_4 ),
        .O(\crc_imd[15]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2633" *) 
  LUT5 #(
    .INIT(32'h00040400)) 
    \crc_imd[15]_i_7__0 
       (.I0(\crc_imd_reg[0]_7 [1]),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_7 [2]),
        .I3(\crc_imd_reg[15]_0 [7]),
        .I4(p_10_out),
        .O(\crc_imd[15]_i_7__0_n_0 ));
  LUT6 #(
    .INIT(64'h9666999996669666)) 
    \crc_imd[1]_i_10__0 
       (.I0(\crc_imd_reg[12]_0 ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\stateOp_reg[2] ),
        .I3(\crc_imd[15]_i_9__0 [3]),
        .I4(\stateOp_reg[3]_1 ),
        .I5(\crc_imd[15]_i_9__0_0 [3]),
        .O(\crc_imd[1]_i_10__0_n_0 ));
  LUT6 #(
    .INIT(64'hFEFFFFFEFEFEFEFE)) 
    \crc_imd[1]_i_1__0 
       (.I0(\crc_imd[1]_i_2__0_n_0 ),
        .I1(\crc_imd[1]_i_3__0_n_0 ),
        .I2(\crc_imd_reg[1]_2 ),
        .I3(\crc_imd_reg[1]_3 ),
        .I4(\crc_imd_reg[1]_4 ),
        .I5(stateOp_reg_1),
        .O(\crc_imd[1]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF9600)) 
    \crc_imd[1]_i_2__0 
       (.I0(\crc_imd_reg[6]_0 ),
        .I1(\recvAXIS_tdata_sig_reg[13] ),
        .I2(\crc_imd[1]_i_8__0_n_0 ),
        .I3(\crcAXIS_tkeep_reg[2]_0 ),
        .I4(\crc_imd_reg[0]_4 ),
        .O(\crc_imd[1]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h0400000400040400)) 
    \crc_imd[1]_i_3__0 
       (.I0(\crc_imd_reg[0]_7 [1]),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_7 [2]),
        .I3(\crc_imd[1]_i_9__0_n_0 ),
        .I4(\crc_imd[1]_i_10__0_n_0 ),
        .I5(\crc_imd_reg[15]_10 ),
        .O(\crc_imd[1]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2662" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \crc_imd[1]_i_7__0 
       (.I0(stateOp_reg_0),
        .I1(\crc_imd_reg[0]_7 [2]),
        .I2(\crc_imd_reg[0]_7 [3]),
        .O(stateOp_reg_1));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \crc_imd[1]_i_8__0 
       (.I0(\crc_imd[1]_i_10__0_n_0 ),
        .I1(\crc_imd[1]_i_2__0_0 ),
        .I2(\crc_imd[1]_i_2__0_1 ),
        .I3(AXIS_tdata[3]),
        .I4(\crc_imd_reg[15]_0 [14]),
        .I5(\crc_imd_reg[2]_0 ),
        .O(\crc_imd[1]_i_8__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2635" *) 
  LUT5 #(
    .INIT(32'h96696996)) 
    \crc_imd[1]_i_9__0 
       (.I0(\crc_imd_reg[15]_0 [11]),
        .I1(AXIS_tdata[2]),
        .I2(\crc_imd_reg[11]_1 ),
        .I3(\crc_imd_reg[15]_0 [10]),
        .I4(\crc_imd_reg[15]_0 [9]),
        .O(\crc_imd[1]_i_9__0_n_0 ));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \crc_imd[2]_i_7__0 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\crc_imd[15]_i_9__0_0 [4]),
        .I2(\stateOp_reg[3]_1 ),
        .I3(\crc_imd[15]_i_9__0 [4]),
        .I4(\stateOp_reg[2] ),
        .O(\crc_imd_reg[0]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2635" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[3]_i_3__0 
       (.I0(\crc_imd_reg[11]_1 ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\crc_imd_reg[15]_0 [10]),
        .O(crc_imd015_out));
  LUT6 #(
    .INIT(64'h95AA95956A556A6A)) 
    \crc_imd[4]_i_2__0 
       (.I0(\crc_imd_reg[2]_0 ),
        .I1(\stateOp_reg[2] ),
        .I2(\crc_imd[15]_i_9__0 [6]),
        .I3(\stateOp_reg[3]_1 ),
        .I4(\crc_imd[15]_i_9__0_0 [6]),
        .I5(\crc_imd_reg[15]_0 [3]),
        .O(crc_imd033_out));
  LUT6 #(
    .INIT(64'h95AA95956A556A6A)) 
    \crc_imd[4]_i_5__0 
       (.I0(\crc_imd_reg[2]_0 ),
        .I1(\stateOp_reg[2] ),
        .I2(\crc_imd[15]_i_9__0 [4]),
        .I3(\stateOp_reg[3]_1 ),
        .I4(\crc_imd[15]_i_9__0_0 [4]),
        .I5(\crc_imd_reg[15]_0 [0]),
        .O(\txAXIS_tdata_reg[8] ));
  LUT5 #(
    .INIT(32'hFFFFAEEA)) 
    \crc_imd[7]_i_1__0 
       (.I0(\crc_imd_reg[0]_4 ),
        .I1(\crcAXIS_tkeep_reg[2]_0 ),
        .I2(\crc_imd_reg[7]_2 ),
        .I3(\crc_imd_reg[6]_0 ),
        .I4(\crc_imd[7]_i_4__0_n_0 ),
        .O(\crc_imd[7]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \crc_imd[7]_i_3__0 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd[15]_i_9__0_0 [7]),
        .I2(\stateOp_reg[3]_1 ),
        .I3(\crc_imd[15]_i_9__0 [7]),
        .I4(\stateOp_reg[2] ),
        .O(\crc_imd_reg[6]_0 ));
  LUT6 #(
    .INIT(64'hFEEFEFFEEEEEEEEE)) 
    \crc_imd[7]_i_4__0 
       (.I0(\crc_imd[7]_i_5__0_n_0 ),
        .I1(\crc_imd[7]_i_6__0_n_0 ),
        .I2(p_24_in),
        .I3(\crc_imd_reg[15]_0 [13]),
        .I4(\crc_imd_reg[15]_0 [14]),
        .I5(\crcAXIS_tkeep_reg[2] ),
        .O(\crc_imd[7]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[7]_i_5__0 
       (.I0(stateOp_reg_1),
        .I1(\crc_imd[7]_i_8__0_n_0 ),
        .I2(\crc_imd_reg[15]_0 [11]),
        .I3(AXIS_tdata[8]),
        .I4(AXIS_tdata[2]),
        .I5(AXIS_tdata[7]),
        .O(\crc_imd[7]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[7]_i_6__0 
       (.I0(stateOp_reg_2),
        .I1(\crc_imd_reg[15]_0 [5]),
        .I2(AXIS_tdata[10]),
        .I3(\crc_imd_reg[3]_1 ),
        .I4(AXIS_tdata[4]),
        .I5(AXIS_tdata[11]),
        .O(\crc_imd[7]_i_6__0_n_0 ));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \crc_imd[7]_i_8__0 
       (.I0(\crc_imd_reg[15]_0 [13]),
        .I1(\crc_imd[15]_i_9__0_0 [3]),
        .I2(\stateOp_reg[3]_1 ),
        .I3(\crc_imd[15]_i_9__0 [3]),
        .I4(\stateOp_reg[2] ),
        .O(\crc_imd[7]_i_8__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFEAAEAEEA)) 
    \crc_imd[8]_i_1__0 
       (.I0(\crc_imd[8]_i_2__0_n_0 ),
        .I1(\crcAXIS_tkeep_reg[2] ),
        .I2(\crc_imd_reg[15]_0 [0]),
        .I3(\crc_imd_reg[15]_0 [15]),
        .I4(\crc_imd_reg[8]_1 ),
        .I5(\crc_imd_reg[8]_2 ),
        .O(\crc_imd[8]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF69960000)) 
    \crc_imd[8]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(AXIS_tdata[5]),
        .I2(\crc_imd_reg[15]_0 [6]),
        .I3(AXIS_tdata[6]),
        .I4(\crcAXIS_tkeep_reg[2]_0 ),
        .I5(\crc_imd_reg[0]_4 ),
        .O(\crc_imd[8]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[8]_i_9__0 
       (.I0(stateOp_reg_1),
        .I1(AXIS_tdata[9]),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(AXIS_tdata[8]),
        .I4(\crc_imd_reg[12]_0 ),
        .I5(AXIS_tdata[3]),
        .O(\crc_imd_reg[14]_0 ));
  LUT6 #(
    .INIT(64'h0800000800080800)) 
    \crc_imd[9]_i_2__0 
       (.I0(\crc_imd_reg[0]_7 [1]),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_7 [2]),
        .I3(AXIS_tdata[0]),
        .I4(\crc_imd_reg[15]_0 [8]),
        .I5(\crc_imd_reg[7]_0 ),
        .O(\crcAXIS_tkeep_reg[1] ));
  FDCE \crc_imd_reg[0] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd[0]_i_1__0_n_0 ),
        .Q(\crc_imd_reg[15]_0 [0]));
  FDCE \crc_imd_reg[10] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd[10]_i_1__0_n_0 ),
        .Q(\crc_imd_reg[15]_0 [10]));
  FDCE \crc_imd_reg[11] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd[11]_i_1__0_n_0 ),
        .Q(\crc_imd_reg[15]_0 [11]));
  FDCE \crc_imd_reg[12] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd[12]_i_1__0_n_0 ),
        .Q(\crc_imd_reg[15]_0 [12]));
  FDCE \crc_imd_reg[13] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd[13]_i_1__0_n_0 ),
        .Q(\crc_imd_reg[15]_0 [13]));
  FDCE \crc_imd_reg[14] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd[14]_i_1__0_n_0 ),
        .Q(\crc_imd_reg[15]_0 [14]));
  FDCE \crc_imd_reg[15] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd[15]_i_2__0_n_0 ),
        .Q(\crc_imd_reg[15]_0 [15]));
  FDCE \crc_imd_reg[1] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd[1]_i_1__0_n_0 ),
        .Q(\crc_imd_reg[15]_0 [1]));
  FDCE \crc_imd_reg[2] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd_reg[9]_3 [0]),
        .Q(\crc_imd_reg[15]_0 [2]));
  FDCE \crc_imd_reg[3] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd_reg[9]_3 [1]),
        .Q(\crc_imd_reg[15]_0 [3]));
  FDCE \crc_imd_reg[4] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd_reg[9]_3 [2]),
        .Q(\crc_imd_reg[15]_0 [4]));
  FDCE \crc_imd_reg[5] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd_reg[9]_3 [3]),
        .Q(\crc_imd_reg[15]_0 [5]));
  FDCE \crc_imd_reg[6] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd_reg[9]_3 [4]),
        .Q(\crc_imd_reg[15]_0 [6]));
  FDCE \crc_imd_reg[7] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd[7]_i_1__0_n_0 ),
        .Q(\crc_imd_reg[15]_0 [7]));
  FDCE \crc_imd_reg[8] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd[8]_i_1__0_n_0 ),
        .Q(\crc_imd_reg[15]_0 [8]));
  FDCE \crc_imd_reg[9] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1__0_n_0 ),
        .CLR(first_reg_0),
        .D(\crc_imd_reg[9]_3 [5]),
        .Q(\crc_imd_reg[15]_0 [9]));
  LUT4 #(
    .INIT(16'h2A2F)) 
    first_i_1__0
       (.I0(first),
        .I1(AXIS_tvalid),
        .I2(stateOp_reg_0),
        .I3(AXIS_tlast),
        .O(first_i_1__0_n_0));
  FDPE first_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(first_i_1__0_n_0),
        .PRE(first_reg_0),
        .Q(first));
  (* SOFT_HLUTNM = "soft_lutpair2653" *) 
  LUT4 #(
    .INIT(16'h01FF)) 
    \len[15]_i_1__0 
       (.I0(\tixVController[7]_i_3__0_n_0 ),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(\txlen_reg[3] ),
        .O(\stateOp_reg[3] ));
  LUT6 #(
    .INIT(64'hB800FFFFB800B800)) 
    \retbuf[0][0]_i_1__0 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\retbuf_reg[0][0] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[0][0]_0 ),
        .I4(\retbuf_reg[0][0]_1 ),
        .I5(\retbuf_reg[0][1] [0]),
        .O(D[0]));
  LUT5 #(
    .INIT(32'h5500FC00)) 
    \retbuf[0][1]_i_1__0 
       (.I0(\retbuf[0][1]_i_2__0_n_0 ),
        .I1(\retbuf_reg[0][1] [1]),
        .I2(\retbuf_reg[0][3] ),
        .I3(\txlen_reg[3] ),
        .I4(\retbuf_reg[33][0] ),
        .O(D[1]));
  (* SOFT_HLUTNM = "soft_lutpair2637" *) 
  LUT4 #(
    .INIT(16'h01FD)) 
    \retbuf[0][1]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\crc_imd_reg[15]_0 [9]),
        .O(\retbuf[0][1]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[0][2]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [2]),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hE2E20000FF000000)) 
    \retbuf[0][3]_i_1__0 
       (.I0(\crc_imd_reg[15]_0 [11]),
        .I1(\retbuf_reg[0][0] ),
        .I2(\crc_imd_reg[15]_0 [3]),
        .I3(\retbuf_reg[0][3] ),
        .I4(\txlen_reg[3] ),
        .I5(\retbuf_reg[33][0] ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hB8B80000FF000000)) 
    \retbuf[0][4]_i_1__0 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\retbuf_reg[0][0] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[0][3] ),
        .I4(\txlen_reg[3] ),
        .I5(\retbuf_reg[33][0] ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hA808AAAA00000000)) 
    \retbuf[0][5]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[0][0] ),
        .I3(\crc_imd_reg[15]_0 [5]),
        .I4(\retbuf_reg[33][0] ),
        .I5(\retbuf_reg[0][6] ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hA808AAAA00000000)) 
    \retbuf[0][6]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[0][0] ),
        .I3(\crc_imd_reg[15]_0 [6]),
        .I4(\retbuf_reg[33][0] ),
        .I5(\retbuf_reg[0][6] ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hFE02000000000000)) 
    \retbuf[0][7]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\crc_imd_reg[15]_0 [15]),
        .I4(\txlen_reg[3] ),
        .I5(\retbuf_reg[33][0] ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hFFFD555D00000000)) 
    \retbuf[15][1]_i_1__0 
       (.I0(\retbuf_reg[33][0] ),
        .I1(\crc_imd_reg[15]_0 [1]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\crc_imd_reg[15]_0 [9]),
        .I5(\txlen_reg[3] ),
        .O(\crc_imd_reg[1]_0 ));
  LUT6 #(
    .INIT(64'hFFFD555D00000000)) 
    \retbuf[15][2]_i_1__0 
       (.I0(\retbuf_reg[33][0] ),
        .I1(\crc_imd_reg[15]_0 [2]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\crc_imd_reg[15]_0 [10]),
        .I5(\txlen_reg[3] ),
        .O(\crc_imd_reg[2]_2 ));
  LUT6 #(
    .INIT(64'hFFFD555D00000000)) 
    \retbuf[15][3]_i_1__0 
       (.I0(\retbuf_reg[33][0] ),
        .I1(\crc_imd_reg[15]_0 [3]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\crc_imd_reg[15]_0 [11]),
        .I5(\txlen_reg[3] ),
        .O(\crc_imd_reg[3]_2 ));
  LUT6 #(
    .INIT(64'h555500015555FFFD)) 
    \retbuf[1][0]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\retbuf_reg[1][0] [0]),
        .I2(\retbuf_reg[1][0] [2]),
        .I3(\retbuf_reg[1][0] [1]),
        .I4(\retbuf_reg[0][0] ),
        .I5(\crc_imd_reg[15]_0 [8]),
        .O(\crc_imd_reg[0]_2 ));
  LUT6 #(
    .INIT(64'h555500015555FFFD)) 
    \retbuf[1][2]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\retbuf_reg[1][0] [0]),
        .I2(\retbuf_reg[1][0] [2]),
        .I3(\retbuf_reg[1][0] [1]),
        .I4(\retbuf_reg[0][0] ),
        .I5(\crc_imd_reg[15]_0 [10]),
        .O(\crc_imd_reg[2]_3 ));
  LUT6 #(
    .INIT(64'h555500015555FFFD)) 
    \retbuf[1][4]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\retbuf_reg[1][0] [0]),
        .I2(\retbuf_reg[1][0] [2]),
        .I3(\retbuf_reg[1][0] [1]),
        .I4(\retbuf_reg[0][0] ),
        .I5(\crc_imd_reg[15]_0 [12]),
        .O(\crc_imd_reg[4]_0 ));
  LUT6 #(
    .INIT(64'h555500015555FFFD)) 
    \retbuf[1][5]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [5]),
        .I1(\retbuf_reg[1][0] [0]),
        .I2(\retbuf_reg[1][0] [2]),
        .I3(\retbuf_reg[1][0] [1]),
        .I4(\retbuf_reg[0][0] ),
        .I5(\crc_imd_reg[15]_0 [13]),
        .O(\crc_imd_reg[5]_0 ));
  LUT6 #(
    .INIT(64'h555500015555FFFD)) 
    \retbuf[1][6]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\retbuf_reg[1][0] [0]),
        .I2(\retbuf_reg[1][0] [2]),
        .I3(\retbuf_reg[1][0] [1]),
        .I4(\retbuf_reg[0][0] ),
        .I5(\crc_imd_reg[15]_0 [14]),
        .O(\crc_imd_reg[6]_2 ));
  LUT6 #(
    .INIT(64'hB800FFFFB800B800)) 
    \retbuf[2][0]_i_1__0 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\retbuf_reg[0][0] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[0][0]_0 ),
        .I4(\retbuf_reg[0][0]_1 ),
        .I5(\retbuf_reg[2][7] [8]),
        .O(\tkst_reg[23] [0]));
  LUT5 #(
    .INIT(32'h5500FC00)) 
    \retbuf[2][1]_i_1__0 
       (.I0(\retbuf[0][1]_i_2__0_n_0 ),
        .I1(\retbuf_reg[2][7] [9]),
        .I2(\retbuf_reg[0][3] ),
        .I3(\txlen_reg[3] ),
        .I4(\retbuf_reg[33][0] ),
        .O(\tkst_reg[23] [1]));
  LUT5 #(
    .INIT(32'h5500FC00)) 
    \retbuf[2][2]_i_1__0 
       (.I0(\retbuf[2][2]_i_2__0_n_0 ),
        .I1(\retbuf_reg[2][7] [10]),
        .I2(\retbuf_reg[0][3] ),
        .I3(\txlen_reg[3] ),
        .I4(\retbuf_reg[33][0] ),
        .O(\tkst_reg[23] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2638" *) 
  LUT4 #(
    .INIT(16'h01FD)) 
    \retbuf[2][2]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\crc_imd_reg[15]_0 [10]),
        .O(\retbuf[2][2]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2665" *) 
  LUT3 #(
    .INIT(8'hBA)) 
    \retbuf[2][3]_i_1__0 
       (.I0(\crc_imd_reg[3]_0 ),
        .I1(\retbuf_reg[0][0]_1 ),
        .I2(\retbuf_reg[2][7] [11]),
        .O(\tkst_reg[23] [3]));
  LUT5 #(
    .INIT(32'h5500FC00)) 
    \retbuf[2][4]_i_1__0 
       (.I0(\retbuf[2][4]_i_2__0_n_0 ),
        .I1(\retbuf_reg[2][7] [12]),
        .I2(\retbuf_reg[0][3] ),
        .I3(\txlen_reg[3] ),
        .I4(\retbuf_reg[33][0] ),
        .O(\tkst_reg[23] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2639" *) 
  LUT4 #(
    .INIT(16'h01FD)) 
    \retbuf[2][4]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\crc_imd_reg[15]_0 [12]),
        .O(\retbuf[2][4]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2668" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \retbuf[2][5]_i_1__0 
       (.I0(\crc_imd_reg[6]_1 [3]),
        .I1(\retbuf_reg[0][6] ),
        .I2(\retbuf_reg[2][7] [13]),
        .O(\tkst_reg[23] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2667" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \retbuf[2][6]_i_1__0 
       (.I0(\crc_imd_reg[6]_1 [4]),
        .I1(\retbuf_reg[0][6] ),
        .I2(\retbuf_reg[2][7] [14]),
        .O(\tkst_reg[23] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2664" *) 
  LUT3 #(
    .INIT(8'hBA)) 
    \retbuf[2][7]_i_2__0 
       (.I0(D[7]),
        .I1(\retbuf_reg[0][0]_1 ),
        .I2(\retbuf_reg[2][7] [15]),
        .O(\tkst_reg[23] [7]));
  LUT6 #(
    .INIT(64'hFFFD555D00000000)) 
    \retbuf[31][0]_i_2 
       (.I0(\retbuf_reg[33][0] ),
        .I1(\crc_imd_reg[15]_0 [0]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\crc_imd_reg[15]_0 [8]),
        .I5(\txlen_reg[3] ),
        .O(\crc_imd_reg[0]_1 ));
  LUT6 #(
    .INIT(64'hFFFD555D00000000)) 
    \retbuf[32][4]_i_1__0 
       (.I0(\retbuf_reg[33][0] ),
        .I1(\crc_imd_reg[15]_0 [4]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\crc_imd_reg[15]_0 [12]),
        .I5(\txlen_reg[3] ),
        .O(\crc_imd_reg[6]_1 [2]));
  LUT6 #(
    .INIT(64'hFFFD555D00000000)) 
    \retbuf[32][6]_i_1__0 
       (.I0(\retbuf_reg[33][0] ),
        .I1(\crc_imd_reg[15]_0 [6]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\crc_imd_reg[15]_0 [14]),
        .I5(\txlen_reg[3] ),
        .O(\crc_imd_reg[6]_1 [4]));
  LUT6 #(
    .INIT(64'h88AA88AA8AAA80AA)) 
    \retbuf[33][0]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [0]),
        .I2(\retbuf_reg[0][0] ),
        .I3(\retbuf_reg[33][0] ),
        .I4(\crc_imd_reg[15]_0 [8]),
        .I5(\retbuf_reg[33][0]_0 ),
        .O(\crc_imd_reg[15]_3 [0]));
  LUT6 #(
    .INIT(64'h88AA88AA8AAA80AA)) 
    \retbuf[33][1]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [1]),
        .I2(\retbuf_reg[0][0] ),
        .I3(\retbuf_reg[33][0] ),
        .I4(\crc_imd_reg[15]_0 [9]),
        .I5(\retbuf_reg[33][0]_0 ),
        .O(\crc_imd_reg[15]_3 [1]));
  LUT6 #(
    .INIT(64'hAAAA888A00008880)) 
    \retbuf[33][2]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\retbuf_reg[33][0]_0 ),
        .I5(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[15]_3 [2]));
  LUT6 #(
    .INIT(64'hAAAA888A00008880)) 
    \retbuf[33][3]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\retbuf_reg[33][0]_0 ),
        .I5(\crc_imd_reg[15]_0 [3]),
        .O(\crc_imd_reg[15]_3 [3]));
  LUT6 #(
    .INIT(64'h88AA88AA8AAA80AA)) 
    \retbuf[33][4]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [4]),
        .I2(\retbuf_reg[0][0] ),
        .I3(\retbuf_reg[33][0] ),
        .I4(\crc_imd_reg[15]_0 [12]),
        .I5(\retbuf_reg[33][0]_0 ),
        .O(\crc_imd_reg[15]_3 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[33][5]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\retbuf_reg[0][0] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[33][0]_0 ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[33][0] ),
        .O(\crc_imd_reg[15]_3 [5]));
  LUT6 #(
    .INIT(64'h88AA88AA8AAA80AA)) 
    \retbuf[33][6]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [6]),
        .I2(\retbuf_reg[0][0] ),
        .I3(\retbuf_reg[33][0] ),
        .I4(\crc_imd_reg[15]_0 [14]),
        .I5(\retbuf_reg[33][0]_0 ),
        .O(\crc_imd_reg[15]_3 [6]));
  LUT6 #(
    .INIT(64'hAAAA888A00008880)) 
    \retbuf[33][7]_i_2__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\retbuf_reg[33][0]_0 ),
        .I5(\crc_imd_reg[15]_0 [7]),
        .O(\crc_imd_reg[15]_3 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2654" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][0]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[15]_2 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2655" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][1]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[15]_2 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2656" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][2]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[15]_2 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2657" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][3]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [3]),
        .O(\crc_imd_reg[15]_2 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2658" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][4]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .O(\crc_imd_reg[15]_2 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2659" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][5]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [5]),
        .O(\crc_imd_reg[15]_2 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2660" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][6]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [6]),
        .O(\crc_imd_reg[15]_2 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2661" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][7]_i_2__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [7]),
        .O(\crc_imd_reg[15]_2 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2654" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][0]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[15]_1 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2655" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][1]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[15]_1 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2656" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][2]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[15]_1 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2657" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][3]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [3]),
        .O(\crc_imd_reg[15]_1 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2658" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][4]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .O(\crc_imd_reg[15]_1 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2659" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][5]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [5]),
        .O(\crc_imd_reg[15]_1 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2660" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][6]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [6]),
        .O(\crc_imd_reg[15]_1 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2661" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][7]_i_2__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [7]),
        .O(\crc_imd_reg[15]_1 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2636" *) 
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[38][0]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[15]_5 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2637" *) 
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[38][1]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[15]_5 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2638" *) 
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[38][2]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[15]_5 [2]));
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[38][3]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [3]),
        .O(\crc_imd_reg[15]_5 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2639" *) 
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[38][4]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [4]),
        .O(\crc_imd_reg[15]_5 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2641" *) 
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[38][5]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [5]),
        .O(\crc_imd_reg[15]_5 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2640" *) 
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[38][6]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [6]),
        .O(\crc_imd_reg[15]_5 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2645" *) 
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[38][7]_i_2__0 
       (.I0(\txlen_reg[3] ),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [7]),
        .O(\crc_imd_reg[15]_5 [7]));
  LUT5 #(
    .INIT(32'h5500FC00)) 
    \retbuf[3][0]_i_1__0 
       (.I0(\retbuf[3][0]_i_2__0_n_0 ),
        .I1(\retbuf_reg[2][7] [0]),
        .I2(\retbuf_reg[0][3] ),
        .I3(\txlen_reg[3] ),
        .I4(\retbuf_reg[33][0] ),
        .O(\tkst_reg[15] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2636" *) 
  LUT4 #(
    .INIT(16'h01FD)) 
    \retbuf[3][0]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\crc_imd_reg[15]_0 [8]),
        .O(\retbuf[3][0]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'h5500FC00)) 
    \retbuf[3][1]_i_1__0 
       (.I0(\retbuf[0][1]_i_2__0_n_0 ),
        .I1(\retbuf_reg[2][7] [1]),
        .I2(\retbuf_reg[0][3] ),
        .I3(\txlen_reg[3] ),
        .I4(\retbuf_reg[33][0] ),
        .O(\tkst_reg[15] [1]));
  LUT6 #(
    .INIT(64'hB800FFFFB800B800)) 
    \retbuf[3][2]_i_1__0 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\retbuf_reg[0][0] ),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\retbuf_reg[0][0]_0 ),
        .I4(\retbuf_reg[0][0]_1 ),
        .I5(\retbuf_reg[2][7] [2]),
        .O(\tkst_reg[15] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2665" *) 
  LUT3 #(
    .INIT(8'hBA)) 
    \retbuf[3][3]_i_1__0 
       (.I0(\crc_imd_reg[3]_0 ),
        .I1(\retbuf_reg[0][0]_1 ),
        .I2(\retbuf_reg[2][7] [3]),
        .O(\tkst_reg[15] [3]));
  LUT5 #(
    .INIT(32'h5500FC00)) 
    \retbuf[3][4]_i_1__0 
       (.I0(\retbuf[2][4]_i_2__0_n_0 ),
        .I1(\retbuf_reg[2][7] [4]),
        .I2(\retbuf_reg[0][3] ),
        .I3(\txlen_reg[3] ),
        .I4(\retbuf_reg[33][0] ),
        .O(\tkst_reg[15] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2668" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \retbuf[3][5]_i_1__0 
       (.I0(\crc_imd_reg[6]_1 [3]),
        .I1(\retbuf_reg[0][6] ),
        .I2(\retbuf_reg[2][7] [5]),
        .O(\tkst_reg[15] [5]));
  (* SOFT_HLUTNM = "soft_lutpair2667" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \retbuf[3][6]_i_1__0 
       (.I0(\crc_imd_reg[6]_1 [4]),
        .I1(\retbuf_reg[0][6] ),
        .I2(\retbuf_reg[2][7] [6]),
        .O(\tkst_reg[15] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2664" *) 
  LUT3 #(
    .INIT(8'hBA)) 
    \retbuf[3][7]_i_2__0 
       (.I0(D[7]),
        .I1(\retbuf_reg[0][0]_1 ),
        .I2(\retbuf_reg[2][7] [7]),
        .O(\tkst_reg[15] [7]));
  LUT6 #(
    .INIT(64'h555500105555FFDF)) 
    \retbuf[4][4]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\retbuf_reg[1][0] [2]),
        .I2(\retbuf_reg[1][0] [0]),
        .I3(\retbuf_reg[1][0] [1]),
        .I4(\retbuf_reg[0][0] ),
        .I5(\crc_imd_reg[15]_0 [12]),
        .O(\crc_imd_reg[4]_1 ));
  LUT6 #(
    .INIT(64'h555500105555FFDF)) 
    \retbuf[4][5]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [5]),
        .I1(\retbuf_reg[1][0] [2]),
        .I2(\retbuf_reg[1][0] [0]),
        .I3(\retbuf_reg[1][0] [1]),
        .I4(\retbuf_reg[0][0] ),
        .I5(\crc_imd_reg[15]_0 [13]),
        .O(\crc_imd_reg[5]_2 ));
  LUT6 #(
    .INIT(64'h555500105555FFDF)) 
    \retbuf[4][6]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\retbuf_reg[1][0] [2]),
        .I2(\retbuf_reg[1][0] [0]),
        .I3(\retbuf_reg[1][0] [1]),
        .I4(\retbuf_reg[0][0] ),
        .I5(\crc_imd_reg[15]_0 [14]),
        .O(\crc_imd_reg[6]_3 ));
  LUT6 #(
    .INIT(64'h555501005555FDFF)) 
    \retbuf[5][5]_i_2 
       (.I0(\crc_imd_reg[15]_0 [5]),
        .I1(\retbuf_reg[1][0] [0]),
        .I2(\retbuf_reg[1][0] [2]),
        .I3(\retbuf_reg[1][0] [1]),
        .I4(\retbuf_reg[0][0] ),
        .I5(\crc_imd_reg[15]_0 [13]),
        .O(\crc_imd_reg[5]_1 ));
  LUT6 #(
    .INIT(64'hB800FFFFB800B800)) 
    \retbuf[6][0]_i_1 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\retbuf_reg[0][0] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[0][0]_0 ),
        .I4(\retbuf_reg[0][0]_1 ),
        .I5(\retbuf_reg[6][7] [0]),
        .O(\scoreMax_reg[7] [0]));
  LUT6 #(
    .INIT(64'hB800FFFFB800B800)) 
    \retbuf[6][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\retbuf_reg[0][0] ),
        .I2(\crc_imd_reg[15]_0 [9]),
        .I3(\retbuf_reg[0][0]_0 ),
        .I4(\retbuf_reg[0][0]_1 ),
        .I5(\retbuf_reg[6][7] [1]),
        .O(\scoreMax_reg[7] [1]));
  LUT6 #(
    .INIT(64'hB800FFFFB800B800)) 
    \retbuf[6][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\retbuf_reg[0][0] ),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\retbuf_reg[0][0]_0 ),
        .I4(\retbuf_reg[0][0]_1 ),
        .I5(\retbuf_reg[6][7] [2]),
        .O(\scoreMax_reg[7] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2666" *) 
  LUT3 #(
    .INIT(8'hBA)) 
    \retbuf[6][3]_i_1 
       (.I0(\crc_imd_reg[3]_0 ),
        .I1(\retbuf_reg[0][0]_1 ),
        .I2(\retbuf_reg[6][7] [3]),
        .O(\scoreMax_reg[7] [3]));
  LUT6 #(
    .INIT(64'hB800FFFFB800B800)) 
    \retbuf[6][4]_i_1 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\retbuf_reg[0][0] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[0][0]_0 ),
        .I4(\retbuf_reg[0][0]_1 ),
        .I5(\retbuf_reg[6][7] [4]),
        .O(\scoreMax_reg[7] [4]));
  LUT3 #(
    .INIT(8'hA8)) 
    \retbuf[6][5]_i_1__0 
       (.I0(\crc_imd_reg[6]_1 [3]),
        .I1(\retbuf_reg[0][6] ),
        .I2(\retbuf_reg[6][7] [5]),
        .O(\scoreMax_reg[7] [5]));
  LUT5 #(
    .INIT(32'h55003000)) 
    \retbuf[6][6]_i_1 
       (.I0(\retbuf[6][6]_i_2__0_n_0 ),
        .I1(\retbuf_reg[0][3] ),
        .I2(\retbuf_reg[6][7] [6]),
        .I3(\txlen_reg[3] ),
        .I4(\retbuf_reg[33][0] ),
        .O(\scoreMax_reg[7] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2640" *) 
  LUT4 #(
    .INIT(16'h01FD)) 
    \retbuf[6][6]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\crc_imd_reg[15]_0 [14]),
        .O(\retbuf[6][6]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2666" *) 
  LUT3 #(
    .INIT(8'hBA)) 
    \retbuf[6][7]_i_1__0 
       (.I0(D[7]),
        .I1(\retbuf_reg[0][0]_1 ),
        .I2(\retbuf_reg[6][7] [7]),
        .O(\scoreMax_reg[7] [7]));
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[7][0]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[6]_1 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2643" *) 
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[7][1]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[6]_1 [1]));
  LUT6 #(
    .INIT(64'hFE02000000000000)) 
    \retbuf[7][3]_i_1__0 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\crc_imd_reg[15]_0 [11]),
        .I4(\txlen_reg[3] ),
        .I5(\retbuf_reg[33][0] ),
        .O(\crc_imd_reg[3]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2644" *) 
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[7][4]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [4]),
        .O(\crc_imd_reg[14]_1 [0]));
  LUT6 #(
    .INIT(64'hFFFD555D00000000)) 
    \retbuf[7][5]_i_1__0 
       (.I0(\retbuf_reg[33][0] ),
        .I1(\crc_imd_reg[15]_0 [5]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\crc_imd_reg[15]_0 [13]),
        .I5(\txlen_reg[3] ),
        .O(\crc_imd_reg[6]_1 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2642" *) 
  LUT5 #(
    .INIT(32'h888A8880)) 
    \retbuf[7][6]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [6]),
        .O(\crc_imd_reg[14]_1 [1]));
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[8][0]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[8][0] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[15]_4 [0]));
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[8][1]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[8][0] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[15]_4 [1]));
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[8][2]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[8][0] ),
        .I3(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[15]_4 [2]));
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[8][3]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[8][0] ),
        .I3(\crc_imd_reg[15]_0 [3]),
        .O(\crc_imd_reg[15]_4 [3]));
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[8][4]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[8][0] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .O(\crc_imd_reg[15]_4 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[8][5]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\retbuf_reg[0][0] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[8][5] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[33][0] ),
        .O(\crc_imd_reg[15]_4 [5]));
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[8][6]_i_1__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[8][0] ),
        .I3(\crc_imd_reg[15]_0 [6]),
        .O(\crc_imd_reg[15]_4 [6]));
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[8][7]_i_2__0 
       (.I0(\retbuf_reg[0][0]_0 ),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[8][0] ),
        .I3(\crc_imd_reg[15]_0 [7]),
        .O(\crc_imd_reg[15]_4 [7]));
  LUT5 #(
    .INIT(32'hF3FAF0F0)) 
    \stateOp[0]_i_4__0 
       (.I0(\crc_imd_reg[3]_3 ),
        .I1(\stateOp_reg[2]_0 [0]),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[2]),
        .O(\stateOp_next_reg[0] ));
  (* SOFT_HLUTNM = "soft_lutpair2646" *) 
  LUT5 #(
    .INIT(32'hF00F3FAF)) 
    \stateOp[2]_i_2__2 
       (.I0(\crc_imd_reg[3]_3 ),
        .I1(\stateOp_reg[2]_0 [1]),
        .I2(Q[2]),
        .I3(Q[1]),
        .I4(Q[0]),
        .O(\stateOp_next_reg[2] ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[3]_i_10 
       (.I0(\crc_imd_reg[15]_0 [5]),
        .I1(\crc_imd_reg[15]_0 [4]),
        .I2(\crc_imd_reg[15]_0 [7]),
        .I3(\crc_imd_reg[15]_0 [6]),
        .O(\stateOp[3]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[3]_i_11 
       (.I0(\crc_imd_reg[15]_0 [8]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\crc_imd_reg[15]_0 [11]),
        .I4(\stateOp[3]_i_12_n_0 ),
        .O(\stateOp[3]_i_11_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[3]_i_12 
       (.I0(\crc_imd_reg[15]_0 [13]),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(\crc_imd_reg[15]_0 [15]),
        .O(\stateOp[3]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp[3]_i_4 
       (.I0(\stateOp[3]_i_10_n_0 ),
        .I1(\crc_imd_reg[15]_0 [3]),
        .I2(\crc_imd_reg[15]_0 [2]),
        .I3(\crc_imd_reg[15]_0 [1]),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\stateOp[3]_i_11_n_0 ),
        .O(\crc_imd_reg[3]_3 ));
  LUT6 #(
    .INIT(64'h20C32CC3FFFFFFFF)) 
    \stateOp[4]_i_10 
       (.I0(\crc_imd_reg[3]_3 ),
        .I1(\stateOp_reg[4]_1 ),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(\crc_imd_reg[0]_8 ),
        .I5(\stateOp_reg[4]_2 ),
        .O(\stateOp_reg[1] ));
  FDCE stateOp_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(first_reg_0),
        .D(stateOp_reg_3),
        .Q(stateOp_reg_0));
  LUT6 #(
    .INIT(64'h01FF00FF01FF01FF)) 
    \tixVController[7]_i_1__0 
       (.I0(\tixVController[7]_i_3__0_n_0 ),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(\txlen_reg[3] ),
        .I4(\tixVCommand_reg[0] ),
        .I5(\tixVCommand_reg[0]_0 ),
        .O(\stateOp_reg[3]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2646" *) 
  LUT4 #(
    .INIT(16'hFEFF)) 
    \tixVController[7]_i_3__0 
       (.I0(\crc_imd_reg[3]_3 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[2]),
        .O(\tixVController[7]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h8A80FFFF8A808A80)) 
    \txAXIS_tdata[0]_i_3__0 
       (.I0(Q[3]),
        .I1(\txAXIS_tdata_reg[6] [0]),
        .I2(\txAXIS_tdata_reg[10] ),
        .I3(\txAXIS_tdata_reg[6]_0 [0]),
        .I4(\txAXIS_tdata[0]_i_6__0_n_0 ),
        .I5(Q[1]),
        .O(\stateOp_reg[3]_2 ));
  LUT6 #(
    .INIT(64'h0301030003010303)) 
    \txAXIS_tdata[0]_i_6__0 
       (.I0(\crc_imd_reg[15]_0 [8]),
        .I1(Q[0]),
        .I2(Q[3]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\retbuf_reg[31][0] [0]),
        .I5(\crc_imd_reg[15]_0 [0]),
        .O(\txAXIS_tdata[0]_i_6__0_n_0 ));
  LUT6 #(
    .INIT(64'hABABABAAAAABAAAA)) 
    \txAXIS_tdata[10]_i_2__0 
       (.I0(\txAXIS_tdata[10]_i_5__0_n_0 ),
        .I1(Q[4]),
        .I2(Q[1]),
        .I3(\txAXIS_tdata_reg[10] ),
        .I4(\txAXIS_tdata_reg[10]_0 ),
        .I5(\txAXIS_tdata_reg[10]_1 ),
        .O(\stateOp_reg[4] ));
  (* SOFT_HLUTNM = "soft_lutpair2648" *) 
  LUT5 #(
    .INIT(32'h28082000)) 
    \txAXIS_tdata[10]_i_5__0 
       (.I0(Q[1]),
        .I1(\retbuf_reg[31][0] [1]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\crc_imd_reg[15]_0 [2]),
        .I4(\crc_imd_reg[15]_0 [10]),
        .O(\txAXIS_tdata[10]_i_5__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2632" *) 
  LUT5 #(
    .INIT(32'h9DBFFFFF)) 
    \txAXIS_tdata[11]_i_4__0 
       (.I0(\retbuf_reg[31][0] [1]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [3]),
        .I3(\crc_imd_reg[15]_0 [11]),
        .I4(Q[1]),
        .O(\resid_reg[1]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2644" *) 
  LUT4 #(
    .INIT(16'hF53F)) 
    \txAXIS_tdata[12]_i_4__0 
       (.I0(\crc_imd_reg[15]_0 [12]),
        .I1(\crc_imd_reg[15]_0 [4]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .O(\crc_imd_reg[12]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2650" *) 
  LUT5 #(
    .INIT(32'h28082000)) 
    \txAXIS_tdata[13]_i_2__0 
       (.I0(Q[1]),
        .I1(\retbuf_reg[31][0] [1]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\crc_imd_reg[15]_0 [5]),
        .I4(\crc_imd_reg[15]_0 [13]),
        .O(\stateOp_reg[1]_4 ));
  (* SOFT_HLUTNM = "soft_lutpair2642" *) 
  LUT4 #(
    .INIT(16'hF53F)) 
    \txAXIS_tdata[14]_i_4__0 
       (.I0(\crc_imd_reg[15]_0 [14]),
        .I1(\crc_imd_reg[15]_0 [6]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .O(\crc_imd_reg[14]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair2652" *) 
  LUT5 #(
    .INIT(32'h28082000)) 
    \txAXIS_tdata[15]_i_3__0 
       (.I0(Q[1]),
        .I1(\retbuf_reg[31][0] [1]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\crc_imd_reg[15]_0 [7]),
        .I4(\crc_imd_reg[15]_0 [15]),
        .O(\stateOp_reg[1]_5 ));
  LUT6 #(
    .INIT(64'h88888888AAA888A8)) 
    \txAXIS_tdata[16]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\txAXIS_tdata_reg[16] ),
        .I2(\crc_imd_reg[15]_0 [0]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [8]),
        .I5(\txAXIS_tdata_reg[16]_0 ),
        .O(\crc_imd_reg[2]_1 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2643" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[17]_i_4__0 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[9]_2 ));
  LUT6 #(
    .INIT(64'h88888888AAA888A8)) 
    \txAXIS_tdata[18]_i_1__0 
       (.I0(\txlen_reg[3] ),
        .I1(\txAXIS_tdata_reg[18] ),
        .I2(\crc_imd_reg[15]_0 [2]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [10]),
        .I5(\txAXIS_tdata_reg[16]_0 ),
        .O(\crc_imd_reg[2]_1 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2632" *) 
  LUT5 #(
    .INIT(32'h777FFF7F)) 
    \txAXIS_tdata[19]_i_4__0 
       (.I0(\retbuf_reg[31][0] [1]),
        .I1(Q[1]),
        .I2(\crc_imd_reg[15]_0 [3]),
        .I3(\retbuf_reg[31][0] [0]),
        .I4(\crc_imd_reg[15]_0 [11]),
        .O(\resid_reg[1]_2 ));
  LUT6 #(
    .INIT(64'h0000FFFF00B80000)) 
    \txAXIS_tdata[1]_i_2 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [1]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\crc_imd_reg[9]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2649" *) 
  LUT5 #(
    .INIT(32'hE2000000)) 
    \txAXIS_tdata[20]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(Q[1]),
        .I4(\retbuf_reg[31][0] [1]),
        .O(\crc_imd_reg[4]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair2641" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[21]_i_4__0 
       (.I0(\crc_imd_reg[15]_0 [13]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [5]),
        .O(\crc_imd_reg[13]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair2651" *) 
  LUT5 #(
    .INIT(32'h1DFFFFFF)) 
    \txAXIS_tdata[22]_i_4__0 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(Q[1]),
        .I4(\retbuf_reg[31][0] [1]),
        .O(\crc_imd_reg[6]_4 ));
  (* SOFT_HLUTNM = "soft_lutpair2645" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[23]_i_6__0 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [7]),
        .O(\crc_imd_reg[15]_7 ));
  (* SOFT_HLUTNM = "soft_lutpair2630" *) 
  LUT4 #(
    .INIT(16'h5FF3)) 
    \txAXIS_tdata[24]_i_3__0 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .O(\crc_imd_reg[0]_3 ));
  (* SOFT_HLUTNM = "soft_lutpair2631" *) 
  LUT4 #(
    .INIT(16'h5FF3)) 
    \txAXIS_tdata[25]_i_4__0 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .O(\crc_imd_reg[1]_1 ));
  LUT5 #(
    .INIT(32'hAAAAABAA)) 
    \txAXIS_tdata[26]_i_2__0 
       (.I0(\txAXIS_tdata[26]_i_6__0_n_0 ),
        .I1(Q[4]),
        .I2(Q[1]),
        .I3(\txAXIS_tdata_reg[26] ),
        .I4(\txAXIS_tdata_reg[10] ),
        .O(\stateOp_reg[4]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2648" *) 
  LUT5 #(
    .INIT(32'hA0000808)) 
    \txAXIS_tdata[26]_i_6__0 
       (.I0(Q[1]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\crc_imd_reg[15]_0 [2]),
        .I4(\retbuf_reg[31][0] [0]),
        .O(\txAXIS_tdata[26]_i_6__0_n_0 ));
  LUT5 #(
    .INIT(32'h7F7FF5FF)) 
    \txAXIS_tdata[27]_i_5__0 
       (.I0(Q[1]),
        .I1(\crc_imd_reg[15]_0 [3]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\crc_imd_reg[15]_0 [11]),
        .I4(\retbuf_reg[31][0] [1]),
        .O(\stateOp_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2649" *) 
  LUT5 #(
    .INIT(32'h7F7FF5FF)) 
    \txAXIS_tdata[28]_i_4__0 
       (.I0(Q[1]),
        .I1(\crc_imd_reg[15]_0 [4]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\crc_imd_reg[15]_0 [12]),
        .I4(\retbuf_reg[31][0] [1]),
        .O(\stateOp_reg[1]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2650" *) 
  LUT5 #(
    .INIT(32'hA0000808)) 
    \txAXIS_tdata[29]_i_2__0 
       (.I0(Q[1]),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[31][0] [1]),
        .I3(\crc_imd_reg[15]_0 [5]),
        .I4(\retbuf_reg[31][0] [0]),
        .O(\stateOp_reg[1]_2 ));
  LUT6 #(
    .INIT(64'h8A80FFFF8A808A80)) 
    \txAXIS_tdata[2]_i_3__0 
       (.I0(Q[3]),
        .I1(\txAXIS_tdata_reg[6] [1]),
        .I2(\txAXIS_tdata_reg[10] ),
        .I3(\txAXIS_tdata_reg[6]_0 [1]),
        .I4(\txAXIS_tdata[2]_i_6__0_n_0 ),
        .I5(Q[1]),
        .O(\stateOp_reg[3]_3 ));
  LUT6 #(
    .INIT(64'h0301030003010303)) 
    \txAXIS_tdata[2]_i_6__0 
       (.I0(\crc_imd_reg[15]_0 [10]),
        .I1(Q[0]),
        .I2(Q[3]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\retbuf_reg[31][0] [0]),
        .I5(\crc_imd_reg[15]_0 [2]),
        .O(\txAXIS_tdata[2]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2651" *) 
  LUT5 #(
    .INIT(32'h7F7FF5FF)) 
    \txAXIS_tdata[30]_i_4__0 
       (.I0(Q[1]),
        .I1(\crc_imd_reg[15]_0 [6]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\crc_imd_reg[15]_0 [14]),
        .I4(\retbuf_reg[31][0] [1]),
        .O(\stateOp_reg[1]_3 ));
  (* SOFT_HLUTNM = "soft_lutpair2652" *) 
  LUT5 #(
    .INIT(32'h5FF3FFFF)) 
    \txAXIS_tdata[31]_i_8__0 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[31][0] [0]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(Q[1]),
        .O(\crc_imd_reg[7]_1 ));
  LUT6 #(
    .INIT(64'h0000FFFF00B80000)) 
    \txAXIS_tdata[3]_i_2 
       (.I0(\crc_imd_reg[15]_0 [11]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [3]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\crc_imd_reg[11]_0 ));
  LUT6 #(
    .INIT(64'h8A80FFFF8A808A80)) 
    \txAXIS_tdata[4]_i_3__0 
       (.I0(Q[3]),
        .I1(\txAXIS_tdata_reg[6] [2]),
        .I2(\txAXIS_tdata_reg[10] ),
        .I3(\txAXIS_tdata_reg[6]_0 [2]),
        .I4(\txAXIS_tdata[4]_i_7__0_n_0 ),
        .I5(Q[1]),
        .O(\stateOp_reg[3]_4 ));
  LUT6 #(
    .INIT(64'h0301030003010303)) 
    \txAXIS_tdata[4]_i_7__0 
       (.I0(\crc_imd_reg[15]_0 [12]),
        .I1(Q[0]),
        .I2(Q[3]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\retbuf_reg[31][0] [0]),
        .I5(\crc_imd_reg[15]_0 [4]),
        .O(\txAXIS_tdata[4]_i_7__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000FFFF00B80000)) 
    \txAXIS_tdata[5]_i_2__0 
       (.I0(\crc_imd_reg[15]_0 [13]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [5]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\crc_imd_reg[13]_1 ));
  LUT6 #(
    .INIT(64'h8A80FFFF8A808A80)) 
    \txAXIS_tdata[6]_i_4__0 
       (.I0(Q[3]),
        .I1(\txAXIS_tdata_reg[6] [3]),
        .I2(\txAXIS_tdata_reg[10] ),
        .I3(\txAXIS_tdata_reg[6]_0 [3]),
        .I4(\txAXIS_tdata[6]_i_9__0_n_0 ),
        .I5(Q[1]),
        .O(\stateOp_reg[3]_5 ));
  LUT6 #(
    .INIT(64'h0301030003010303)) 
    \txAXIS_tdata[6]_i_9__0 
       (.I0(\crc_imd_reg[15]_0 [14]),
        .I1(Q[0]),
        .I2(Q[3]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(\retbuf_reg[31][0] [0]),
        .I5(\crc_imd_reg[15]_0 [6]),
        .O(\txAXIS_tdata[6]_i_9__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000FFFF00B80000)) 
    \txAXIS_tdata[7]_i_4__0 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [7]),
        .I3(\retbuf_reg[31][0] [1]),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\crc_imd_reg[15]_6 ));
  (* SOFT_HLUTNM = "soft_lutpair2630" *) 
  LUT5 #(
    .INIT(32'h9DBFFFFF)) 
    \txAXIS_tdata[8]_i_4__0 
       (.I0(\retbuf_reg[31][0] [1]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [0]),
        .I3(\crc_imd_reg[15]_0 [8]),
        .I4(Q[1]),
        .O(\resid_reg[1] ));
  (* SOFT_HLUTNM = "soft_lutpair2631" *) 
  LUT5 #(
    .INIT(32'h9DBFFFFF)) 
    \txAXIS_tdata[9]_i_4__0 
       (.I0(\retbuf_reg[31][0] [1]),
        .I1(\retbuf_reg[31][0] [0]),
        .I2(\crc_imd_reg[15]_0 [1]),
        .I3(\crc_imd_reg[15]_0 [9]),
        .I4(Q[1]),
        .O(\resid_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2653" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \txlen[3]_i_1 
       (.I0(\txlen[3]_i_2_n_0 ),
        .I1(\txlen_reg[3] ),
        .O(E));
  LUT6 #(
    .INIT(64'h040000000CC00C00)) 
    \txlen[3]_i_2 
       (.I0(\crc_imd_reg[3]_3 ),
        .I1(Q[2]),
        .I2(Q[3]),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(Q[4]),
        .O(\txlen[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAF0F0A8F0AAAA)) 
    validCrc_sig_i_1__0
       (.I0(\crc_imd[15]_i_3_n_0 ),
        .I1(first),
        .I2(validCrc_sig_reg_n_0),
        .I3(AXIS_tvalid),
        .I4(stateOp_reg_0),
        .I5(AXIS_tlast),
        .O(validCrc_sig_i_1__0_n_0));
  FDCE validCrc_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(first_reg_0),
        .D(validCrc_sig_i_1__0_n_0),
        .Q(validCrc_sig_reg_n_0));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Crc8005_64
   (stateOp_reg_0,
    E,
    \stateOp_reg[4] ,
    D,
    \crc_imd_reg[15]_0 ,
    \crc_imd_reg[15]_1 ,
    \stateOp_reg[0] ,
    \opbuf_reg[2][0] ,
    \crc_imd_reg[14]_0 ,
    \crc_imd_reg[15]_2 ,
    \crc_imd_reg[15]_3 ,
    \crc_imd_reg[15]_4 ,
    \crc_imd_reg[15]_5 ,
    \crc_imd_reg[7]_0 ,
    \crc_imd_reg[15]_6 ,
    \crc_imd_reg[15]_7 ,
    \crc_imd_reg[7]_1 ,
    \crc_imd_reg[7]_2 ,
    \crc_imd_reg[7]_3 ,
    \crc_imd_reg[7]_4 ,
    \crc_imd_reg[7]_5 ,
    \crc_imd_reg[7]_6 ,
    \crc_imd_reg[7]_7 ,
    \crc_imd_reg[7]_8 ,
    \crc_imd_reg[7]_9 ,
    \crc_imd_reg[7]_10 ,
    \crc_imd_reg[7]_11 ,
    \crc_imd_reg[7]_12 ,
    \crc_imd_reg[7]_13 ,
    \crc_imd_reg[7]_14 ,
    \crc_imd_reg[15]_8 ,
    \crc_imd_reg[15]_9 ,
    \crc_imd_reg[7]_15 ,
    \crc_imd_reg[11]_0 ,
    \crc_imd_reg[13]_0 ,
    \crc_imd_reg[14]_1 ,
    \crc_imd_reg[7]_16 ,
    \crc_imd_reg[7]_17 ,
    \crc_imd_reg[8]_0 ,
    \crc_imd_reg[11]_1 ,
    \stateOp_reg[1] ,
    \stateOp_reg[5] ,
    \stateOp_reg[5]_0 ,
    \stateOp_reg[3] ,
    \stateOp_reg[2] ,
    \stateOp_reg[1]_0 ,
    \stateOp_reg[1]_1 ,
    \stateOp_reg[3]_0 ,
    \stateOp_reg[3]_1 ,
    \stateOp_reg[4]_0 ,
    \stateOp_reg[4]_1 ,
    \stateOp_reg[1]_2 ,
    \crc_imd_reg[7]_18 ,
    \crc_imd_reg[6]_0 ,
    \stateOp_reg[3]_2 ,
    \crc_imd_reg[4]_0 ,
    \crc_imd_reg[3]_0 ,
    \crc_imd_reg[2]_0 ,
    \stateOp_reg[3]_3 ,
    \crc_imd_reg[0]_0 ,
    \crc_imd_reg[9]_0 ,
    \tixVBuffer_reg[7] ,
    \tixVBuffer_reg[7]_0 ,
    \tixVBuffer_reg[7]_1 ,
    \tixVBuffer_reg[7]_2 ,
    \tixVBuffer_reg[7]_3 ,
    \crc_imd_reg[14]_2 ,
    \tixVBuffer_reg[7]_4 ,
    \crc_imd_reg[13]_1 ,
    \tixVBuffer_reg[7]_5 ,
    \tixVBuffer_reg[7]_6 ,
    \tixVBuffer_reg[7]_7 ,
    \crc_imd_reg[10]_0 ,
    \tixVBuffer_reg[7]_8 ,
    \tixVBuffer_reg[7]_9 ,
    \crc_imd_reg[8]_1 ,
    \crc_imd_reg[10]_1 ,
    \pollbuf_reg[0][4] ,
    \pollbuf_reg[0][6] ,
    \crc_imd_reg[15]_10 ,
    \resid_reg[0] ,
    \resid_reg[0]_0 ,
    \resid_reg[0]_1 ,
    \resid_reg[0]_2 ,
    \resid_reg[0]_3 ,
    \resid_reg[0]_4 ,
    \resid_reg[0]_5 ,
    \crc_imd_reg[15]_11 ,
    \crc_imd_reg[13]_2 ,
    \crc_imd_reg[12]_0 ,
    \crc_imd_reg[9]_1 ,
    \crc_imd_reg[8]_2 ,
    \resid_reg[1] ,
    \resid_reg[1]_0 ,
    \resid_reg[1]_1 ,
    \resid_reg[2] ,
    \resid_reg[2]_0 ,
    \resid_reg[2]_1 ,
    \resid_reg[2]_2 ,
    \resid_reg[2]_3 ,
    \resid_reg[2]_4 ,
    \crc_imd_reg[14]_3 ,
    \crc_imd_reg[15]_12 ,
    \crcAXIS_tkeep_reg[2] ,
    \crcAXIS_tkeep_reg[2]_0 ,
    \recvAXIS_tdata_sig_reg[11] ,
    \crcAXIS_tkeep_reg[6] ,
    \crcAXIS_tkeep_reg[6]_0 ,
    \crcAXIS_tkeep_reg[4] ,
    \crcAXIS_tkeep_reg[4]_0 ,
    \crcAXIS_tkeep_reg[6]_1 ,
    \crcAXIS_tkeep_reg[6]_2 ,
    \crcAXIS_tkeep_reg[6]_3 ,
    \crcAXIS_tkeep_reg[6]_4 ,
    \crc_imd_reg[6]_1 ,
    \crc_imd_reg[15]_13 ,
    \crc_imd_reg[8]_3 ,
    \crc_imd_reg[3]_1 ,
    \crc_imd_reg[3]_2 ,
    \crc_imd_reg[4]_1 ,
    \crc_imd_reg[7]_19 ,
    \crc_imd_reg[2]_1 ,
    p_10_out,
    stateOp_reg_1,
    aclk_sig,
    \crc_imd_reg[0]_1 ,
    \txlen_reg[28] ,
    \txlen_reg[28]_0 ,
    Q,
    \retbuf_reg[0][6] ,
    \len_reg[0] ,
    \len_reg[0]_0 ,
    \retbuf_reg[6][0] ,
    \retbuf_reg[5][7] ,
    \retbuf_reg[4][6] ,
    \retbuf_reg[5][7]_0 ,
    \retbuf_reg[5][6] ,
    \retbuf_reg[5][5] ,
    \retbuf_reg[5][4] ,
    \retbuf_reg[5][3] ,
    \retbuf_reg[5][2] ,
    \retbuf_reg[5][1] ,
    \retbuf_reg[5][0] ,
    \retbuf_reg[6][7] ,
    \retbuf_reg[6][7]_0 ,
    \retbuf_reg[6][6] ,
    \retbuf_reg[6][4] ,
    \retbuf_reg[6][3] ,
    \retbuf_reg[6][2] ,
    \retbuf_reg[6][1] ,
    \retbuf_reg[6][0]_0 ,
    \txAXIS_tdata_reg[3] ,
    \txAXIS_tdata_reg[0] ,
    \txAXIS_tdata_reg[3]_0 ,
    \txAXIS_tdata_reg[8] ,
    \txAXIS_tdata_reg[1] ,
    \tixVCommand_reg[0] ,
    \tixVCommand_reg[0]_0 ,
    \retbuf_reg[4][6]_0 ,
    \retbuf_reg[4][6]_1 ,
    \retbuf_reg[4][5] ,
    \retbuf_reg[4][4] ,
    \retbuf_reg[39][0] ,
    \retbuf_reg[38][0] ,
    \retbuf_reg[37][0] ,
    \retbuf_reg[36][0] ,
    \retbuf_reg[35][5] ,
    \retbuf_reg[35][5]_0 ,
    \retbuf_reg[34][0] ,
    \retbuf_reg[33][0] ,
    \retbuf_reg[3][5] ,
    \retbuf_reg[32][4] ,
    \retbuf_reg[32][6] ,
    \retbuf_reg[31][0] ,
    \retbuf_reg[30][1] ,
    \retbuf_reg[30][1]_0 ,
    \retbuf_reg[29][0] ,
    \retbuf_reg[28][0] ,
    \retbuf_reg[27][5] ,
    \retbuf_reg[26][1] ,
    \retbuf_reg[25][0] ,
    \retbuf_reg[24][0] ,
    \retbuf_reg[23][1] ,
    \retbuf_reg[22][0] ,
    \retbuf_reg[21][3] ,
    \retbuf_reg[20][0] ,
    \retbuf_reg[19][5] ,
    \retbuf_reg[18][5] ,
    \retbuf_reg[17][0] ,
    \retbuf_reg[16][0] ,
    \retbuf_reg[7][3] ,
    \retbuf_reg[7][3]_0 ,
    \retbuf_reg[3][0] ,
    \retbuf_reg[3][0]_0 ,
    \retbuf_reg[3][1] ,
    \retbuf_reg[3][4] ,
    \retbuf_reg[3][5]_0 ,
    \retbuf_reg[2][0] ,
    \retbuf_reg[2][0]_0 ,
    \retbuf_reg[2][1] ,
    \retbuf_reg[2][2] ,
    \retbuf_reg[2][3] ,
    \retbuf_reg[2][4] ,
    \retbuf_reg[2][5] ,
    \retbuf_reg[2][6] ,
    \retbuf_reg[1][0] ,
    \retbuf_reg[1][0]_0 ,
    \retbuf_reg[1][1] ,
    \retbuf_reg[1][2] ,
    \retbuf_reg[1][4] ,
    \retbuf_reg[1][5] ,
    \retbuf_reg[1][6] ,
    \retbuf_reg[0][1] ,
    \retbuf_reg[0][1]_0 ,
    \retbuf_reg[0][3] ,
    \retbuf_reg[0][4] ,
    \retbuf_reg[0][5] ,
    \retbuf_reg[0][6]_0 ,
    \retbuf_reg[1][7] ,
    \retbuf_reg[1][7]_0 ,
    \retbuf_reg[1][7]_1 ,
    \retbuf_reg[1][3] ,
    \retbuf_reg[34][7] ,
    \retbuf_reg[35][0] ,
    \retbuf_reg[32][0] ,
    \retbuf_reg[30][0] ,
    \retbuf_reg[28][1] ,
    \retbuf_reg[27][0] ,
    \retbuf_reg[26][0] ,
    \retbuf_reg[25][1] ,
    \retbuf_reg[24][1] ,
    \retbuf_reg[23][0] ,
    \retbuf_reg[22][1] ,
    \retbuf_reg[21][0] ,
    \retbuf_reg[20][1] ,
    \retbuf_reg[19][0] ,
    \retbuf_reg[18][0] ,
    \retbuf_reg[17][1] ,
    \retbuf_reg[16][1] ,
    \retbuf_reg[15][0] ,
    \retbuf_reg[11][0] ,
    \retbuf_reg[4][1] ,
    \retbuf_reg[4][2] ,
    \retbuf_reg[0][7] ,
    \txAXIS_tdata_reg[1]_0 ,
    \txAXIS_tdata_reg[1]_1 ,
    \txAXIS_tdata_reg[1]_2 ,
    \txAXIS_tdata_reg[1]_3 ,
    \txAXIS_tdata_reg[3]_1 ,
    \txAXIS_tdata_reg[8]_0 ,
    \txAXIS_tdata_reg[9] ,
    \txAXIS_tdata_reg[10] ,
    \txAXIS_tdata_reg[11] ,
    \txAXIS_tdata_reg[12] ,
    \txAXIS_tdata_reg[13] ,
    \txAXIS_tdata_reg[14] ,
    \txAXIS_tdata_reg[15] ,
    \txAXIS_tdata_reg[40] ,
    \txAXIS_tdata_reg[41] ,
    \txAXIS_tdata_reg[42] ,
    \txAXIS_tdata_reg[43] ,
    \txAXIS_tdata_reg[44] ,
    \txAXIS_tdata_reg[45] ,
    \txAXIS_tdata_reg[46] ,
    \txAXIS_tdata_reg[47] ,
    \txAXIS_tdata_reg[7] ,
    \txAXIS_tdata_reg[7]_0 ,
    \txAXIS_tdata_reg[7]_1 ,
    \txAXIS_tdata_reg[7]_2 ,
    \crc_imd_reg[0]_2 ,
    \txAXIS_tdata_reg[7]_3 ,
    CO,
    \stateOp_reg[2]_0 ,
    \stateOp_reg[0]_0 ,
    \stateOp_reg[2]_1 ,
    \stateOp_reg[5]_1 ,
    \stateOp_reg[0]_1 ,
    \stateOp_reg[5]_2 ,
    \stateOp_reg[5]_3 ,
    \stateOp_reg[5]_4 ,
    \stateOp_reg[5]_5 ,
    \txAXIS_tdata_reg[0]_0 ,
    \txAXIS_tdata_reg[0]_1 ,
    \txAXIS_tdata[0]_i_2_0 ,
    \txAXIS_tdata[0]_i_2_1 ,
    \txAXIS_tdata_reg[62] ,
    \txAXIS_tdata[0]_i_2_2 ,
    \txAXIS_tdata[2]_i_3_0 ,
    \txAXIS_tdata_reg[7]_4 ,
    \txAXIS_tdata_reg[7]_5 ,
    \txAXIS_tdata_reg[7]_6 ,
    \txAXIS_tdata_reg[5] ,
    \txAXIS_tdata_reg[39] ,
    \txAXIS_tdata_reg[39]_0 ,
    \retbuf_reg[0][0] ,
    \txAXIS_tdata_reg[38] ,
    \txAXIS_tdata_reg[37] ,
    \txAXIS_tdata_reg[36] ,
    \txAXIS_tdata_reg[35] ,
    \txAXIS_tdata_reg[34] ,
    \txAXIS_tdata_reg[33] ,
    \txAXIS_tdata_reg[32] ,
    \txAXIS_tdata_reg[1]_4 ,
    \txAXIS_tdata_reg[62]_0 ,
    \txAXIS_tdata_reg[62]_1 ,
    \txAXIS_tdata_reg[62]_2 ,
    \txAXIS_tdata_reg[59] ,
    \txAXIS_tdata_reg[59]_0 ,
    \txAXIS_tdata_reg[58] ,
    \txAXIS_tdata_reg[58]_0 ,
    \txAXIS_tdata_reg[55] ,
    \txAXIS_tdata_reg[55]_0 ,
    \txAXIS_tdata_reg[55]_1 ,
    \txAXIS_tdata_reg[54] ,
    \txAXIS_tdata_reg[54]_0 ,
    \txAXIS_tdata_reg[53] ,
    \txAXIS_tdata_reg[53]_0 ,
    \txAXIS_tdata_reg[52] ,
    \txAXIS_tdata_reg[52]_0 ,
    \txAXIS_tdata_reg[51] ,
    \txAXIS_tdata_reg[51]_0 ,
    \txAXIS_tdata_reg[50] ,
    \txAXIS_tdata_reg[50]_0 ,
    \txAXIS_tdata_reg[49] ,
    \txAXIS_tdata_reg[49]_0 ,
    \txAXIS_tdata_reg[48] ,
    \txAXIS_tdata_reg[48]_0 ,
    \txAXIS_tdata_reg[15]_0 ,
    \txAXIS_tdata_reg[15]_1 ,
    \txAXIS_tdata_reg[14]_0 ,
    \txAXIS_tdata_reg[14]_1 ,
    \txAXIS_tdata_reg[13]_0 ,
    \txAXIS_tdata_reg[13]_1 ,
    \txAXIS_tdata_reg[12]_0 ,
    \txAXIS_tdata_reg[12]_1 ,
    \txAXIS_tdata_reg[11]_0 ,
    \txAXIS_tdata_reg[11]_1 ,
    \txAXIS_tdata_reg[10]_0 ,
    \txAXIS_tdata_reg[10]_1 ,
    \txAXIS_tdata_reg[9]_0 ,
    \txAXIS_tdata_reg[9]_1 ,
    \txAXIS_tdata_reg[8]_1 ,
    \txAXIS_tdata_reg[8]_2 ,
    \txAXIS_tdata_reg[47]_0 ,
    \txAXIS_tdata_reg[47]_1 ,
    \txAXIS_tdata_reg[47]_2 ,
    \txAXIS_tdata_reg[46]_0 ,
    \txAXIS_tdata_reg[46]_1 ,
    \txAXIS_tdata_reg[45]_0 ,
    \txAXIS_tdata_reg[45]_1 ,
    \txAXIS_tdata_reg[44]_0 ,
    \txAXIS_tdata_reg[44]_1 ,
    \txAXIS_tdata_reg[43]_0 ,
    \txAXIS_tdata_reg[43]_1 ,
    \txAXIS_tdata_reg[42]_0 ,
    \txAXIS_tdata_reg[42]_1 ,
    \txAXIS_tdata_reg[41]_0 ,
    \txAXIS_tdata_reg[41]_1 ,
    \txAXIS_tdata_reg[40]_0 ,
    \txAXIS_tdata_reg[40]_1 ,
    \txAXIS_tdata[15]_i_6_0 ,
    \txAXIS_tdata_reg[4] ,
    \txAXIS_tdata_reg[4]_0 ,
    \txAXIS_tdata_reg[2] ,
    \retbuf_reg[0][0]_0 ,
    \retbuf_reg[3][7] ,
    \retbuf_reg[6][5] ,
    \retbuf_reg[7][5] ,
    \crc_imd_reg[3]_3 ,
    \crc_imd_reg[3]_4 ,
    \crc_imd_reg[5]_0 ,
    \crc_imd_reg[6]_2 ,
    \crc_imd_reg[7]_20 ,
    \crc_imd_reg[7]_21 ,
    \crc_imd_reg[7]_22 ,
    p_136_in,
    \crc_imd_reg[7]_23 ,
    crc_imd0148_out,
    crc_imd065_out,
    crc_imd081_out,
    crc_imd0149_out,
    crc_imd066_out,
    crc_imd083_out,
    crc_imd0150_out,
    crc_imd067_out,
    crc_imd085_out,
    crc_imd0151_out,
    crc_imd068_out,
    crc_imd086_out,
    crc_imd0152_out,
    crc_imd069_out,
    crc_imd087_out,
    crc_imd0112_out,
    crc_imd041_out,
    crc_imd0115_out,
    crc_imd042_out,
    crc_imd0118_out,
    crc_imd043_out,
    crc_imd0121_out,
    crc_imd0124_out,
    \crc_imd_reg[0]_3 ,
    \crc_imd_reg[0]_4 ,
    recvAXIS_tlast,
    \crc_imd_reg[0]_5 ,
    crc_imd0175_out,
    crc_imd0198_out,
    crc_imd0176_out,
    crc_imd0200_out,
    crc_imd0165_out,
    crc_imd0202_out,
    crc_imd0100_out,
    crc_imd0172_out,
    crc_imd0173_out,
    crc_imd0174_out,
    AXIS_tdata,
    \crc_imd[15]_i_21 ,
    \crc_imd[15]_i_21_0 ,
    \crc_imd[15]_i_18 ,
    AXIS_tvalid,
    AXIS_tlast,
    \crc_imd_reg[15]_14 );
  output stateOp_reg_0;
  output [0:0]E;
  output [0:0]\stateOp_reg[4] ;
  output [7:0]D;
  output [15:0]\crc_imd_reg[15]_0 ;
  output [6:0]\crc_imd_reg[15]_1 ;
  output \stateOp_reg[0] ;
  output [0:0]\opbuf_reg[2][0] ;
  output [4:0]\crc_imd_reg[14]_0 ;
  output [7:0]\crc_imd_reg[15]_2 ;
  output [7:0]\crc_imd_reg[15]_3 ;
  output [7:0]\crc_imd_reg[15]_4 ;
  output [7:0]\crc_imd_reg[15]_5 ;
  output [7:0]\crc_imd_reg[7]_0 ;
  output [7:0]\crc_imd_reg[15]_6 ;
  output [7:0]\crc_imd_reg[15]_7 ;
  output [7:0]\crc_imd_reg[7]_1 ;
  output [7:0]\crc_imd_reg[7]_2 ;
  output [7:0]\crc_imd_reg[7]_3 ;
  output [7:0]\crc_imd_reg[7]_4 ;
  output [7:0]\crc_imd_reg[7]_5 ;
  output [7:0]\crc_imd_reg[7]_6 ;
  output [7:0]\crc_imd_reg[7]_7 ;
  output [7:0]\crc_imd_reg[7]_8 ;
  output [7:0]\crc_imd_reg[7]_9 ;
  output [7:0]\crc_imd_reg[7]_10 ;
  output [7:0]\crc_imd_reg[7]_11 ;
  output [7:0]\crc_imd_reg[7]_12 ;
  output [7:0]\crc_imd_reg[7]_13 ;
  output [7:0]\crc_imd_reg[7]_14 ;
  output [7:0]\crc_imd_reg[15]_8 ;
  output [7:0]\crc_imd_reg[15]_9 ;
  output [7:0]\crc_imd_reg[7]_15 ;
  output [3:0]\crc_imd_reg[11]_0 ;
  output [3:0]\crc_imd_reg[13]_0 ;
  output [6:0]\crc_imd_reg[14]_1 ;
  output [7:0]\crc_imd_reg[7]_16 ;
  output [5:0]\crc_imd_reg[7]_17 ;
  output [0:0]\crc_imd_reg[8]_0 ;
  output [3:0]\crc_imd_reg[11]_1 ;
  output [17:0]\stateOp_reg[1] ;
  output [0:0]\stateOp_reg[5] ;
  output [0:0]\stateOp_reg[5]_0 ;
  output \stateOp_reg[3] ;
  output \stateOp_reg[2] ;
  output \stateOp_reg[1]_0 ;
  output \stateOp_reg[1]_1 ;
  output \stateOp_reg[3]_0 ;
  output \stateOp_reg[3]_1 ;
  output \stateOp_reg[4]_0 ;
  output \stateOp_reg[4]_1 ;
  output \stateOp_reg[1]_2 ;
  output \crc_imd_reg[7]_18 ;
  output \crc_imd_reg[6]_0 ;
  output \stateOp_reg[3]_2 ;
  output \crc_imd_reg[4]_0 ;
  output \crc_imd_reg[3]_0 ;
  output \crc_imd_reg[2]_0 ;
  output \stateOp_reg[3]_3 ;
  output \crc_imd_reg[0]_0 ;
  output \crc_imd_reg[9]_0 ;
  output \tixVBuffer_reg[7] ;
  output \tixVBuffer_reg[7]_0 ;
  output \tixVBuffer_reg[7]_1 ;
  output \tixVBuffer_reg[7]_2 ;
  output \tixVBuffer_reg[7]_3 ;
  output \crc_imd_reg[14]_2 ;
  output \tixVBuffer_reg[7]_4 ;
  output \crc_imd_reg[13]_1 ;
  output \tixVBuffer_reg[7]_5 ;
  output \tixVBuffer_reg[7]_6 ;
  output \tixVBuffer_reg[7]_7 ;
  output \crc_imd_reg[10]_0 ;
  output \tixVBuffer_reg[7]_8 ;
  output \tixVBuffer_reg[7]_9 ;
  output \crc_imd_reg[8]_1 ;
  output \crc_imd_reg[10]_1 ;
  output \pollbuf_reg[0][4] ;
  output \pollbuf_reg[0][6] ;
  output \crc_imd_reg[15]_10 ;
  output \resid_reg[0] ;
  output \resid_reg[0]_0 ;
  output \resid_reg[0]_1 ;
  output \resid_reg[0]_2 ;
  output \resid_reg[0]_3 ;
  output \resid_reg[0]_4 ;
  output \resid_reg[0]_5 ;
  output \crc_imd_reg[15]_11 ;
  output \crc_imd_reg[13]_2 ;
  output \crc_imd_reg[12]_0 ;
  output \crc_imd_reg[9]_1 ;
  output \crc_imd_reg[8]_2 ;
  output \resid_reg[1] ;
  output \resid_reg[1]_0 ;
  output \resid_reg[1]_1 ;
  output \resid_reg[2] ;
  output \resid_reg[2]_0 ;
  output \resid_reg[2]_1 ;
  output \resid_reg[2]_2 ;
  output \resid_reg[2]_3 ;
  output \resid_reg[2]_4 ;
  output \crc_imd_reg[14]_3 ;
  output \crc_imd_reg[15]_12 ;
  output \crcAXIS_tkeep_reg[2] ;
  output \crcAXIS_tkeep_reg[2]_0 ;
  output \recvAXIS_tdata_sig_reg[11] ;
  output \crcAXIS_tkeep_reg[6] ;
  output \crcAXIS_tkeep_reg[6]_0 ;
  output \crcAXIS_tkeep_reg[4] ;
  output \crcAXIS_tkeep_reg[4]_0 ;
  output \crcAXIS_tkeep_reg[6]_1 ;
  output \crcAXIS_tkeep_reg[6]_2 ;
  output \crcAXIS_tkeep_reg[6]_3 ;
  output \crcAXIS_tkeep_reg[6]_4 ;
  output \crc_imd_reg[6]_1 ;
  output \crc_imd_reg[15]_13 ;
  output \crc_imd_reg[8]_3 ;
  output \crc_imd_reg[3]_1 ;
  output \crc_imd_reg[3]_2 ;
  output \crc_imd_reg[4]_1 ;
  output \crc_imd_reg[7]_19 ;
  output \crc_imd_reg[2]_1 ;
  output [0:0]p_10_out;
  input stateOp_reg_1;
  input aclk_sig;
  input [0:0]\crc_imd_reg[0]_1 ;
  input \txlen_reg[28] ;
  input \txlen_reg[28]_0 ;
  input [5:0]Q;
  input \retbuf_reg[0][6] ;
  input \len_reg[0] ;
  input \len_reg[0]_0 ;
  input \retbuf_reg[6][0] ;
  input \retbuf_reg[5][7] ;
  input \retbuf_reg[4][6] ;
  input \retbuf_reg[5][7]_0 ;
  input \retbuf_reg[5][6] ;
  input \retbuf_reg[5][5] ;
  input \retbuf_reg[5][4] ;
  input \retbuf_reg[5][3] ;
  input \retbuf_reg[5][2] ;
  input \retbuf_reg[5][1] ;
  input \retbuf_reg[5][0] ;
  input \retbuf_reg[6][7] ;
  input \retbuf_reg[6][7]_0 ;
  input \retbuf_reg[6][6] ;
  input \retbuf_reg[6][4] ;
  input \retbuf_reg[6][3] ;
  input \retbuf_reg[6][2] ;
  input \retbuf_reg[6][1] ;
  input \retbuf_reg[6][0]_0 ;
  input [2:0]\txAXIS_tdata_reg[3] ;
  input \txAXIS_tdata_reg[0] ;
  input \txAXIS_tdata_reg[3]_0 ;
  input \txAXIS_tdata_reg[8] ;
  input \txAXIS_tdata_reg[1] ;
  input \tixVCommand_reg[0] ;
  input [0:0]\tixVCommand_reg[0]_0 ;
  input \retbuf_reg[4][6]_0 ;
  input \retbuf_reg[4][6]_1 ;
  input \retbuf_reg[4][5] ;
  input \retbuf_reg[4][4] ;
  input \retbuf_reg[39][0] ;
  input \retbuf_reg[38][0] ;
  input \retbuf_reg[37][0] ;
  input \retbuf_reg[36][0] ;
  input \retbuf_reg[35][5] ;
  input \retbuf_reg[35][5]_0 ;
  input \retbuf_reg[34][0] ;
  input \retbuf_reg[33][0] ;
  input \retbuf_reg[3][5] ;
  input \retbuf_reg[32][4] ;
  input \retbuf_reg[32][6] ;
  input \retbuf_reg[31][0] ;
  input \retbuf_reg[30][1] ;
  input \retbuf_reg[30][1]_0 ;
  input \retbuf_reg[29][0] ;
  input \retbuf_reg[28][0] ;
  input \retbuf_reg[27][5] ;
  input \retbuf_reg[26][1] ;
  input \retbuf_reg[25][0] ;
  input \retbuf_reg[24][0] ;
  input \retbuf_reg[23][1] ;
  input \retbuf_reg[22][0] ;
  input \retbuf_reg[21][3] ;
  input \retbuf_reg[20][0] ;
  input \retbuf_reg[19][5] ;
  input \retbuf_reg[18][5] ;
  input \retbuf_reg[17][0] ;
  input \retbuf_reg[16][0] ;
  input \retbuf_reg[7][3] ;
  input \retbuf_reg[7][3]_0 ;
  input \retbuf_reg[3][0] ;
  input \retbuf_reg[3][0]_0 ;
  input \retbuf_reg[3][1] ;
  input \retbuf_reg[3][4] ;
  input \retbuf_reg[3][5]_0 ;
  input \retbuf_reg[2][0] ;
  input \retbuf_reg[2][0]_0 ;
  input \retbuf_reg[2][1] ;
  input \retbuf_reg[2][2] ;
  input \retbuf_reg[2][3] ;
  input \retbuf_reg[2][4] ;
  input \retbuf_reg[2][5] ;
  input \retbuf_reg[2][6] ;
  input \retbuf_reg[1][0] ;
  input \retbuf_reg[1][0]_0 ;
  input \retbuf_reg[1][1] ;
  input \retbuf_reg[1][2] ;
  input \retbuf_reg[1][4] ;
  input \retbuf_reg[1][5] ;
  input \retbuf_reg[1][6] ;
  input \retbuf_reg[0][1] ;
  input \retbuf_reg[0][1]_0 ;
  input \retbuf_reg[0][3] ;
  input \retbuf_reg[0][4] ;
  input \retbuf_reg[0][5] ;
  input \retbuf_reg[0][6]_0 ;
  input \retbuf_reg[1][7] ;
  input \retbuf_reg[1][7]_0 ;
  input \retbuf_reg[1][7]_1 ;
  input \retbuf_reg[1][3] ;
  input \retbuf_reg[34][7] ;
  input \retbuf_reg[35][0] ;
  input \retbuf_reg[32][0] ;
  input \retbuf_reg[30][0] ;
  input \retbuf_reg[28][1] ;
  input \retbuf_reg[27][0] ;
  input \retbuf_reg[26][0] ;
  input \retbuf_reg[25][1] ;
  input \retbuf_reg[24][1] ;
  input \retbuf_reg[23][0] ;
  input \retbuf_reg[22][1] ;
  input \retbuf_reg[21][0] ;
  input \retbuf_reg[20][1] ;
  input \retbuf_reg[19][0] ;
  input \retbuf_reg[18][0] ;
  input \retbuf_reg[17][1] ;
  input \retbuf_reg[16][1] ;
  input \retbuf_reg[15][0] ;
  input \retbuf_reg[11][0] ;
  input \retbuf_reg[4][1] ;
  input \retbuf_reg[4][2] ;
  input \retbuf_reg[0][7] ;
  input \txAXIS_tdata_reg[1]_0 ;
  input \txAXIS_tdata_reg[1]_1 ;
  input \txAXIS_tdata_reg[1]_2 ;
  input \txAXIS_tdata_reg[1]_3 ;
  input \txAXIS_tdata_reg[3]_1 ;
  input \txAXIS_tdata_reg[8]_0 ;
  input \txAXIS_tdata_reg[9] ;
  input \txAXIS_tdata_reg[10] ;
  input \txAXIS_tdata_reg[11] ;
  input \txAXIS_tdata_reg[12] ;
  input \txAXIS_tdata_reg[13] ;
  input \txAXIS_tdata_reg[14] ;
  input \txAXIS_tdata_reg[15] ;
  input \txAXIS_tdata_reg[40] ;
  input \txAXIS_tdata_reg[41] ;
  input \txAXIS_tdata_reg[42] ;
  input \txAXIS_tdata_reg[43] ;
  input \txAXIS_tdata_reg[44] ;
  input \txAXIS_tdata_reg[45] ;
  input \txAXIS_tdata_reg[46] ;
  input \txAXIS_tdata_reg[47] ;
  input \txAXIS_tdata_reg[7] ;
  input \txAXIS_tdata_reg[7]_0 ;
  input \txAXIS_tdata_reg[7]_1 ;
  input [0:0]\txAXIS_tdata_reg[7]_2 ;
  input \crc_imd_reg[0]_2 ;
  input \txAXIS_tdata_reg[7]_3 ;
  input [0:0]CO;
  input [0:0]\stateOp_reg[2]_0 ;
  input \stateOp_reg[0]_0 ;
  input \stateOp_reg[2]_1 ;
  input [1:0]\stateOp_reg[5]_1 ;
  input \stateOp_reg[0]_1 ;
  input \stateOp_reg[5]_2 ;
  input \stateOp_reg[5]_3 ;
  input \stateOp_reg[5]_4 ;
  input \stateOp_reg[5]_5 ;
  input \txAXIS_tdata_reg[0]_0 ;
  input \txAXIS_tdata_reg[0]_1 ;
  input \txAXIS_tdata[0]_i_2_0 ;
  input \txAXIS_tdata[0]_i_2_1 ;
  input \txAXIS_tdata_reg[62] ;
  input \txAXIS_tdata[0]_i_2_2 ;
  input \txAXIS_tdata[2]_i_3_0 ;
  input \txAXIS_tdata_reg[7]_4 ;
  input \txAXIS_tdata_reg[7]_5 ;
  input [7:0]\txAXIS_tdata_reg[7]_6 ;
  input \txAXIS_tdata_reg[5] ;
  input \txAXIS_tdata_reg[39] ;
  input \txAXIS_tdata_reg[39]_0 ;
  input [2:0]\retbuf_reg[0][0] ;
  input \txAXIS_tdata_reg[38] ;
  input \txAXIS_tdata_reg[37] ;
  input \txAXIS_tdata_reg[36] ;
  input \txAXIS_tdata_reg[35] ;
  input \txAXIS_tdata_reg[34] ;
  input \txAXIS_tdata_reg[33] ;
  input \txAXIS_tdata_reg[32] ;
  input \txAXIS_tdata_reg[1]_4 ;
  input \txAXIS_tdata_reg[62]_0 ;
  input \txAXIS_tdata_reg[62]_1 ;
  input \txAXIS_tdata_reg[62]_2 ;
  input \txAXIS_tdata_reg[59] ;
  input \txAXIS_tdata_reg[59]_0 ;
  input \txAXIS_tdata_reg[58] ;
  input \txAXIS_tdata_reg[58]_0 ;
  input \txAXIS_tdata_reg[55] ;
  input \txAXIS_tdata_reg[55]_0 ;
  input \txAXIS_tdata_reg[55]_1 ;
  input \txAXIS_tdata_reg[54] ;
  input \txAXIS_tdata_reg[54]_0 ;
  input \txAXIS_tdata_reg[53] ;
  input \txAXIS_tdata_reg[53]_0 ;
  input \txAXIS_tdata_reg[52] ;
  input \txAXIS_tdata_reg[52]_0 ;
  input \txAXIS_tdata_reg[51] ;
  input \txAXIS_tdata_reg[51]_0 ;
  input \txAXIS_tdata_reg[50] ;
  input \txAXIS_tdata_reg[50]_0 ;
  input \txAXIS_tdata_reg[49] ;
  input \txAXIS_tdata_reg[49]_0 ;
  input \txAXIS_tdata_reg[48] ;
  input \txAXIS_tdata_reg[48]_0 ;
  input \txAXIS_tdata_reg[15]_0 ;
  input \txAXIS_tdata_reg[15]_1 ;
  input \txAXIS_tdata_reg[14]_0 ;
  input \txAXIS_tdata_reg[14]_1 ;
  input \txAXIS_tdata_reg[13]_0 ;
  input \txAXIS_tdata_reg[13]_1 ;
  input \txAXIS_tdata_reg[12]_0 ;
  input \txAXIS_tdata_reg[12]_1 ;
  input \txAXIS_tdata_reg[11]_0 ;
  input \txAXIS_tdata_reg[11]_1 ;
  input \txAXIS_tdata_reg[10]_0 ;
  input \txAXIS_tdata_reg[10]_1 ;
  input \txAXIS_tdata_reg[9]_0 ;
  input \txAXIS_tdata_reg[9]_1 ;
  input \txAXIS_tdata_reg[8]_1 ;
  input \txAXIS_tdata_reg[8]_2 ;
  input \txAXIS_tdata_reg[47]_0 ;
  input \txAXIS_tdata_reg[47]_1 ;
  input \txAXIS_tdata_reg[47]_2 ;
  input \txAXIS_tdata_reg[46]_0 ;
  input \txAXIS_tdata_reg[46]_1 ;
  input \txAXIS_tdata_reg[45]_0 ;
  input \txAXIS_tdata_reg[45]_1 ;
  input \txAXIS_tdata_reg[44]_0 ;
  input \txAXIS_tdata_reg[44]_1 ;
  input \txAXIS_tdata_reg[43]_0 ;
  input \txAXIS_tdata_reg[43]_1 ;
  input \txAXIS_tdata_reg[42]_0 ;
  input \txAXIS_tdata_reg[42]_1 ;
  input \txAXIS_tdata_reg[41]_0 ;
  input \txAXIS_tdata_reg[41]_1 ;
  input \txAXIS_tdata_reg[40]_0 ;
  input \txAXIS_tdata_reg[40]_1 ;
  input [7:0]\txAXIS_tdata[15]_i_6_0 ;
  input \txAXIS_tdata_reg[4] ;
  input \txAXIS_tdata_reg[4]_0 ;
  input \txAXIS_tdata_reg[2] ;
  input \retbuf_reg[0][0]_0 ;
  input \retbuf_reg[3][7] ;
  input \retbuf_reg[6][5] ;
  input \retbuf_reg[7][5] ;
  input \crc_imd_reg[3]_3 ;
  input \crc_imd_reg[3]_4 ;
  input \crc_imd_reg[5]_0 ;
  input \crc_imd_reg[6]_2 ;
  input \crc_imd_reg[7]_20 ;
  input \crc_imd_reg[7]_21 ;
  input \crc_imd_reg[7]_22 ;
  input p_136_in;
  input \crc_imd_reg[7]_23 ;
  input crc_imd0148_out;
  input crc_imd065_out;
  input crc_imd081_out;
  input crc_imd0149_out;
  input crc_imd066_out;
  input crc_imd083_out;
  input crc_imd0150_out;
  input crc_imd067_out;
  input crc_imd085_out;
  input crc_imd0151_out;
  input crc_imd068_out;
  input crc_imd086_out;
  input crc_imd0152_out;
  input crc_imd069_out;
  input crc_imd087_out;
  input crc_imd0112_out;
  input crc_imd041_out;
  input crc_imd0115_out;
  input crc_imd042_out;
  input crc_imd0118_out;
  input crc_imd043_out;
  input crc_imd0121_out;
  input crc_imd0124_out;
  input [6:0]\crc_imd_reg[0]_3 ;
  input \crc_imd_reg[0]_4 ;
  input recvAXIS_tlast;
  input \crc_imd_reg[0]_5 ;
  input crc_imd0175_out;
  input crc_imd0198_out;
  input crc_imd0176_out;
  input crc_imd0200_out;
  input crc_imd0165_out;
  input crc_imd0202_out;
  input crc_imd0100_out;
  input crc_imd0172_out;
  input crc_imd0173_out;
  input crc_imd0174_out;
  input [12:0]AXIS_tdata;
  input [5:0]\crc_imd[15]_i_21 ;
  input [5:0]\crc_imd[15]_i_21_0 ;
  input \crc_imd[15]_i_18 ;
  input AXIS_tvalid;
  input AXIS_tlast;
  input [6:0]\crc_imd_reg[15]_14 ;

  wire [12:0]AXIS_tdata;
  wire AXIS_tlast;
  wire AXIS_tvalid;
  wire [0:0]CO;
  wire [7:0]D;
  wire [0:0]E;
  wire [5:0]Q;
  wire aclk_sig;
  wire commok_sig_i_3_n_0;
  wire \crcAXIS_tkeep_reg[2] ;
  wire \crcAXIS_tkeep_reg[2]_0 ;
  wire \crcAXIS_tkeep_reg[4] ;
  wire \crcAXIS_tkeep_reg[4]_0 ;
  wire \crcAXIS_tkeep_reg[6] ;
  wire \crcAXIS_tkeep_reg[6]_0 ;
  wire \crcAXIS_tkeep_reg[6]_1 ;
  wire \crcAXIS_tkeep_reg[6]_2 ;
  wire \crcAXIS_tkeep_reg[6]_3 ;
  wire \crcAXIS_tkeep_reg[6]_4 ;
  wire crc_imd0100_out;
  wire crc_imd0112_out;
  wire crc_imd0115_out;
  wire crc_imd0118_out;
  wire crc_imd0121_out;
  wire crc_imd0124_out;
  wire crc_imd013_out;
  wire crc_imd0148_out;
  wire crc_imd0149_out;
  wire crc_imd0150_out;
  wire crc_imd0151_out;
  wire crc_imd0152_out;
  wire crc_imd0165_out;
  wire crc_imd0172_out;
  wire crc_imd0173_out;
  wire crc_imd0174_out;
  wire crc_imd0175_out;
  wire crc_imd0176_out;
  wire crc_imd0198_out;
  wire crc_imd0200_out;
  wire crc_imd0202_out;
  wire crc_imd041_out;
  wire crc_imd042_out;
  wire crc_imd043_out;
  wire crc_imd044_out;
  wire crc_imd046_out;
  wire crc_imd065_out;
  wire crc_imd066_out;
  wire crc_imd067_out;
  wire crc_imd068_out;
  wire crc_imd069_out;
  wire crc_imd081_out;
  wire crc_imd083_out;
  wire crc_imd085_out;
  wire crc_imd086_out;
  wire crc_imd087_out;
  wire \crc_imd[10]_i_1_n_0 ;
  wire \crc_imd[10]_i_2_n_0 ;
  wire \crc_imd[10]_i_3_n_0 ;
  wire \crc_imd[10]_i_4_n_0 ;
  wire \crc_imd[11]_i_1_n_0 ;
  wire \crc_imd[11]_i_2_n_0 ;
  wire \crc_imd[11]_i_3_n_0 ;
  wire \crc_imd[11]_i_4_n_0 ;
  wire \crc_imd[12]_i_1_n_0 ;
  wire \crc_imd[12]_i_2_n_0 ;
  wire \crc_imd[12]_i_3_n_0 ;
  wire \crc_imd[12]_i_4_n_0 ;
  wire \crc_imd[13]_i_1_n_0 ;
  wire \crc_imd[13]_i_2_n_0 ;
  wire \crc_imd[13]_i_3_n_0 ;
  wire \crc_imd[13]_i_4_n_0 ;
  wire \crc_imd[14]_i_1_n_0 ;
  wire \crc_imd[14]_i_4_n_0 ;
  wire \crc_imd[14]_i_5_n_0 ;
  wire \crc_imd[14]_i_6_n_0 ;
  wire \crc_imd[15]_i_12_n_0 ;
  wire \crc_imd[15]_i_13_n_0 ;
  wire \crc_imd[15]_i_14_n_0 ;
  wire \crc_imd[15]_i_18 ;
  wire \crc_imd[15]_i_1_n_0 ;
  wire [5:0]\crc_imd[15]_i_21 ;
  wire [5:0]\crc_imd[15]_i_21_0 ;
  wire \crc_imd[15]_i_43_n_0 ;
  wire \crc_imd[15]_i_44_n_0 ;
  wire \crc_imd[15]_i_45_n_0 ;
  wire \crc_imd[15]_i_46_n_0 ;
  wire \crc_imd[15]_i_5_n_0 ;
  wire \crc_imd[3]_i_1_n_0 ;
  wire \crc_imd[3]_i_4_n_0 ;
  wire \crc_imd[5]_i_1_n_0 ;
  wire \crc_imd[5]_i_4_n_0 ;
  wire \crc_imd[5]_i_5_n_0 ;
  wire \crc_imd[6]_i_1_n_0 ;
  wire \crc_imd[6]_i_5_n_0 ;
  wire \crc_imd[6]_i_6_n_0 ;
  wire \crc_imd[7]_i_1_n_0 ;
  wire \crc_imd[7]_i_2_n_0 ;
  wire \crc_imd[7]_i_8_n_0 ;
  wire \crc_imd_reg[0]_0 ;
  wire [0:0]\crc_imd_reg[0]_1 ;
  wire \crc_imd_reg[0]_2 ;
  wire [6:0]\crc_imd_reg[0]_3 ;
  wire \crc_imd_reg[0]_4 ;
  wire \crc_imd_reg[0]_5 ;
  wire \crc_imd_reg[10]_0 ;
  wire \crc_imd_reg[10]_1 ;
  wire [3:0]\crc_imd_reg[11]_0 ;
  wire [3:0]\crc_imd_reg[11]_1 ;
  wire \crc_imd_reg[12]_0 ;
  wire [3:0]\crc_imd_reg[13]_0 ;
  wire \crc_imd_reg[13]_1 ;
  wire \crc_imd_reg[13]_2 ;
  wire [4:0]\crc_imd_reg[14]_0 ;
  wire [6:0]\crc_imd_reg[14]_1 ;
  wire \crc_imd_reg[14]_2 ;
  wire \crc_imd_reg[14]_3 ;
  wire [15:0]\crc_imd_reg[15]_0 ;
  wire [6:0]\crc_imd_reg[15]_1 ;
  wire \crc_imd_reg[15]_10 ;
  wire \crc_imd_reg[15]_11 ;
  wire \crc_imd_reg[15]_12 ;
  wire \crc_imd_reg[15]_13 ;
  wire [6:0]\crc_imd_reg[15]_14 ;
  wire [7:0]\crc_imd_reg[15]_2 ;
  wire [7:0]\crc_imd_reg[15]_3 ;
  wire [7:0]\crc_imd_reg[15]_4 ;
  wire [7:0]\crc_imd_reg[15]_5 ;
  wire [7:0]\crc_imd_reg[15]_6 ;
  wire [7:0]\crc_imd_reg[15]_7 ;
  wire [7:0]\crc_imd_reg[15]_8 ;
  wire [7:0]\crc_imd_reg[15]_9 ;
  wire \crc_imd_reg[2]_0 ;
  wire \crc_imd_reg[2]_1 ;
  wire \crc_imd_reg[3]_0 ;
  wire \crc_imd_reg[3]_1 ;
  wire \crc_imd_reg[3]_2 ;
  wire \crc_imd_reg[3]_3 ;
  wire \crc_imd_reg[3]_4 ;
  wire \crc_imd_reg[4]_0 ;
  wire \crc_imd_reg[4]_1 ;
  wire \crc_imd_reg[5]_0 ;
  wire \crc_imd_reg[6]_0 ;
  wire \crc_imd_reg[6]_1 ;
  wire \crc_imd_reg[6]_2 ;
  wire [7:0]\crc_imd_reg[7]_0 ;
  wire [7:0]\crc_imd_reg[7]_1 ;
  wire [7:0]\crc_imd_reg[7]_10 ;
  wire [7:0]\crc_imd_reg[7]_11 ;
  wire [7:0]\crc_imd_reg[7]_12 ;
  wire [7:0]\crc_imd_reg[7]_13 ;
  wire [7:0]\crc_imd_reg[7]_14 ;
  wire [7:0]\crc_imd_reg[7]_15 ;
  wire [7:0]\crc_imd_reg[7]_16 ;
  wire [5:0]\crc_imd_reg[7]_17 ;
  wire \crc_imd_reg[7]_18 ;
  wire \crc_imd_reg[7]_19 ;
  wire [7:0]\crc_imd_reg[7]_2 ;
  wire \crc_imd_reg[7]_20 ;
  wire \crc_imd_reg[7]_21 ;
  wire \crc_imd_reg[7]_22 ;
  wire \crc_imd_reg[7]_23 ;
  wire [7:0]\crc_imd_reg[7]_3 ;
  wire [7:0]\crc_imd_reg[7]_4 ;
  wire [7:0]\crc_imd_reg[7]_5 ;
  wire [7:0]\crc_imd_reg[7]_6 ;
  wire [7:0]\crc_imd_reg[7]_7 ;
  wire [7:0]\crc_imd_reg[7]_8 ;
  wire [7:0]\crc_imd_reg[7]_9 ;
  wire [0:0]\crc_imd_reg[8]_0 ;
  wire \crc_imd_reg[8]_1 ;
  wire \crc_imd_reg[8]_2 ;
  wire \crc_imd_reg[8]_3 ;
  wire \crc_imd_reg[9]_0 ;
  wire \crc_imd_reg[9]_1 ;
  wire first;
  wire first_i_1_n_0;
  wire \len_reg[0] ;
  wire \len_reg[0]_0 ;
  wire [0:0]\opbuf_reg[2][0] ;
  wire [0:0]p_10_out;
  wire p_136_in;
  wire \pollbuf_reg[0][4] ;
  wire \pollbuf_reg[0][6] ;
  wire \recvAXIS_tdata_sig_reg[11] ;
  wire recvAXIS_tlast;
  wire \resid_reg[0] ;
  wire \resid_reg[0]_0 ;
  wire \resid_reg[0]_1 ;
  wire \resid_reg[0]_2 ;
  wire \resid_reg[0]_3 ;
  wire \resid_reg[0]_4 ;
  wire \resid_reg[0]_5 ;
  wire \resid_reg[1] ;
  wire \resid_reg[1]_0 ;
  wire \resid_reg[1]_1 ;
  wire \resid_reg[2] ;
  wire \resid_reg[2]_0 ;
  wire \resid_reg[2]_1 ;
  wire \resid_reg[2]_2 ;
  wire \resid_reg[2]_3 ;
  wire \resid_reg[2]_4 ;
  wire [2:0]\retbuf_reg[0][0] ;
  wire \retbuf_reg[0][0]_0 ;
  wire \retbuf_reg[0][1] ;
  wire \retbuf_reg[0][1]_0 ;
  wire \retbuf_reg[0][3] ;
  wire \retbuf_reg[0][4] ;
  wire \retbuf_reg[0][5] ;
  wire \retbuf_reg[0][6] ;
  wire \retbuf_reg[0][6]_0 ;
  wire \retbuf_reg[0][7] ;
  wire \retbuf_reg[11][0] ;
  wire \retbuf_reg[15][0] ;
  wire \retbuf_reg[16][0] ;
  wire \retbuf_reg[16][1] ;
  wire \retbuf_reg[17][0] ;
  wire \retbuf_reg[17][1] ;
  wire \retbuf_reg[18][0] ;
  wire \retbuf_reg[18][5] ;
  wire \retbuf_reg[19][0] ;
  wire \retbuf_reg[19][5] ;
  wire \retbuf_reg[1][0] ;
  wire \retbuf_reg[1][0]_0 ;
  wire \retbuf_reg[1][1] ;
  wire \retbuf_reg[1][2] ;
  wire \retbuf_reg[1][3] ;
  wire \retbuf_reg[1][4] ;
  wire \retbuf_reg[1][5] ;
  wire \retbuf_reg[1][6] ;
  wire \retbuf_reg[1][7] ;
  wire \retbuf_reg[1][7]_0 ;
  wire \retbuf_reg[1][7]_1 ;
  wire \retbuf_reg[20][0] ;
  wire \retbuf_reg[20][1] ;
  wire \retbuf_reg[21][0] ;
  wire \retbuf_reg[21][3] ;
  wire \retbuf_reg[22][0] ;
  wire \retbuf_reg[22][1] ;
  wire \retbuf_reg[23][0] ;
  wire \retbuf_reg[23][1] ;
  wire \retbuf_reg[24][0] ;
  wire \retbuf_reg[24][1] ;
  wire \retbuf_reg[25][0] ;
  wire \retbuf_reg[25][1] ;
  wire \retbuf_reg[26][0] ;
  wire \retbuf_reg[26][1] ;
  wire \retbuf_reg[27][0] ;
  wire \retbuf_reg[27][5] ;
  wire \retbuf_reg[28][0] ;
  wire \retbuf_reg[28][1] ;
  wire \retbuf_reg[29][0] ;
  wire \retbuf_reg[2][0] ;
  wire \retbuf_reg[2][0]_0 ;
  wire \retbuf_reg[2][1] ;
  wire \retbuf_reg[2][2] ;
  wire \retbuf_reg[2][3] ;
  wire \retbuf_reg[2][4] ;
  wire \retbuf_reg[2][5] ;
  wire \retbuf_reg[2][6] ;
  wire \retbuf_reg[30][0] ;
  wire \retbuf_reg[30][1] ;
  wire \retbuf_reg[30][1]_0 ;
  wire \retbuf_reg[31][0] ;
  wire \retbuf_reg[32][0] ;
  wire \retbuf_reg[32][4] ;
  wire \retbuf_reg[32][6] ;
  wire \retbuf_reg[33][0] ;
  wire \retbuf_reg[34][0] ;
  wire \retbuf_reg[34][7] ;
  wire \retbuf_reg[35][0] ;
  wire \retbuf_reg[35][5] ;
  wire \retbuf_reg[35][5]_0 ;
  wire \retbuf_reg[36][0] ;
  wire \retbuf_reg[37][0] ;
  wire \retbuf_reg[38][0] ;
  wire \retbuf_reg[39][0] ;
  wire \retbuf_reg[3][0] ;
  wire \retbuf_reg[3][0]_0 ;
  wire \retbuf_reg[3][1] ;
  wire \retbuf_reg[3][4] ;
  wire \retbuf_reg[3][5] ;
  wire \retbuf_reg[3][5]_0 ;
  wire \retbuf_reg[3][7] ;
  wire \retbuf_reg[4][1] ;
  wire \retbuf_reg[4][2] ;
  wire \retbuf_reg[4][4] ;
  wire \retbuf_reg[4][5] ;
  wire \retbuf_reg[4][6] ;
  wire \retbuf_reg[4][6]_0 ;
  wire \retbuf_reg[4][6]_1 ;
  wire \retbuf_reg[5][0] ;
  wire \retbuf_reg[5][1] ;
  wire \retbuf_reg[5][2] ;
  wire \retbuf_reg[5][3] ;
  wire \retbuf_reg[5][4] ;
  wire \retbuf_reg[5][5] ;
  wire \retbuf_reg[5][6] ;
  wire \retbuf_reg[5][7] ;
  wire \retbuf_reg[5][7]_0 ;
  wire \retbuf_reg[6][0] ;
  wire \retbuf_reg[6][0]_0 ;
  wire \retbuf_reg[6][1] ;
  wire \retbuf_reg[6][2] ;
  wire \retbuf_reg[6][3] ;
  wire \retbuf_reg[6][4] ;
  wire \retbuf_reg[6][5] ;
  wire \retbuf_reg[6][6] ;
  wire \retbuf_reg[6][7] ;
  wire \retbuf_reg[6][7]_0 ;
  wire \retbuf_reg[7][3] ;
  wire \retbuf_reg[7][3]_0 ;
  wire \retbuf_reg[7][5] ;
  wire \stateOp[0]_i_6_n_0 ;
  wire \stateOp[2]_i_7__1_n_0 ;
  wire \stateOp[5]_i_10_n_0 ;
  wire \stateOp[5]_i_11_n_0 ;
  wire \stateOp_reg[0] ;
  wire \stateOp_reg[0]_0 ;
  wire \stateOp_reg[0]_1 ;
  wire [17:0]\stateOp_reg[1] ;
  wire \stateOp_reg[1]_0 ;
  wire \stateOp_reg[1]_1 ;
  wire \stateOp_reg[1]_2 ;
  wire \stateOp_reg[2] ;
  wire [0:0]\stateOp_reg[2]_0 ;
  wire \stateOp_reg[2]_1 ;
  wire \stateOp_reg[3] ;
  wire \stateOp_reg[3]_0 ;
  wire \stateOp_reg[3]_1 ;
  wire \stateOp_reg[3]_2 ;
  wire \stateOp_reg[3]_3 ;
  wire [0:0]\stateOp_reg[4] ;
  wire \stateOp_reg[4]_0 ;
  wire \stateOp_reg[4]_1 ;
  wire [0:0]\stateOp_reg[5] ;
  wire [0:0]\stateOp_reg[5]_0 ;
  wire [1:0]\stateOp_reg[5]_1 ;
  wire \stateOp_reg[5]_2 ;
  wire \stateOp_reg[5]_3 ;
  wire \stateOp_reg[5]_4 ;
  wire \stateOp_reg[5]_5 ;
  wire stateOp_reg_0;
  wire stateOp_reg_1;
  wire \tixVBuffer[7]_i_5_n_0 ;
  wire \tixVBuffer[7]_i_6_n_0 ;
  wire \tixVBuffer[7]_i_7_n_0 ;
  wire \tixVBuffer[7]_i_8_n_0 ;
  wire \tixVBuffer_reg[7] ;
  wire \tixVBuffer_reg[7]_0 ;
  wire \tixVBuffer_reg[7]_1 ;
  wire \tixVBuffer_reg[7]_2 ;
  wire \tixVBuffer_reg[7]_3 ;
  wire \tixVBuffer_reg[7]_4 ;
  wire \tixVBuffer_reg[7]_5 ;
  wire \tixVBuffer_reg[7]_6 ;
  wire \tixVBuffer_reg[7]_7 ;
  wire \tixVBuffer_reg[7]_8 ;
  wire \tixVBuffer_reg[7]_9 ;
  wire \tixVCommand_reg[0] ;
  wire [0:0]\tixVCommand_reg[0]_0 ;
  wire \txAXIS_tdata[0]_i_2_0 ;
  wire \txAXIS_tdata[0]_i_2_1 ;
  wire \txAXIS_tdata[0]_i_2_2 ;
  wire \txAXIS_tdata[0]_i_4_n_0 ;
  wire \txAXIS_tdata[0]_i_8_n_0 ;
  wire \txAXIS_tdata[10]_i_2_n_0 ;
  wire \txAXIS_tdata[10]_i_6_n_0 ;
  wire \txAXIS_tdata[10]_i_8_n_0 ;
  wire \txAXIS_tdata[11]_i_2_n_0 ;
  wire \txAXIS_tdata[11]_i_6_n_0 ;
  wire \txAXIS_tdata[11]_i_8_n_0 ;
  wire \txAXIS_tdata[12]_i_2_n_0 ;
  wire \txAXIS_tdata[12]_i_6_n_0 ;
  wire \txAXIS_tdata[12]_i_8_n_0 ;
  wire \txAXIS_tdata[13]_i_2_n_0 ;
  wire \txAXIS_tdata[13]_i_6_n_0 ;
  wire \txAXIS_tdata[13]_i_8_n_0 ;
  wire \txAXIS_tdata[14]_i_2_n_0 ;
  wire \txAXIS_tdata[14]_i_6_n_0 ;
  wire \txAXIS_tdata[14]_i_8_n_0 ;
  wire \txAXIS_tdata[15]_i_16_n_0 ;
  wire \txAXIS_tdata[15]_i_21_n_0 ;
  wire [7:0]\txAXIS_tdata[15]_i_6_0 ;
  wire \txAXIS_tdata[15]_i_6_n_0 ;
  wire \txAXIS_tdata[1]_i_2__0_n_0 ;
  wire \txAXIS_tdata[1]_i_3_n_0 ;
  wire \txAXIS_tdata[2]_i_3_0 ;
  wire \txAXIS_tdata[2]_i_7_n_0 ;
  wire \txAXIS_tdata[3]_i_2__0_n_0 ;
  wire \txAXIS_tdata[3]_i_3_n_0 ;
  wire \txAXIS_tdata[40]_i_3_n_0 ;
  wire \txAXIS_tdata[40]_i_7_n_0 ;
  wire \txAXIS_tdata[41]_i_3_n_0 ;
  wire \txAXIS_tdata[41]_i_7_n_0 ;
  wire \txAXIS_tdata[42]_i_3_n_0 ;
  wire \txAXIS_tdata[42]_i_7_n_0 ;
  wire \txAXIS_tdata[43]_i_3_n_0 ;
  wire \txAXIS_tdata[43]_i_7_n_0 ;
  wire \txAXIS_tdata[44]_i_3_n_0 ;
  wire \txAXIS_tdata[44]_i_7_n_0 ;
  wire \txAXIS_tdata[45]_i_3_n_0 ;
  wire \txAXIS_tdata[45]_i_7_n_0 ;
  wire \txAXIS_tdata[46]_i_3_n_0 ;
  wire \txAXIS_tdata[46]_i_7_n_0 ;
  wire \txAXIS_tdata[47]_i_5_n_0 ;
  wire \txAXIS_tdata[47]_i_9_n_0 ;
  wire \txAXIS_tdata[51]_i_7_n_0 ;
  wire \txAXIS_tdata[52]_i_7_n_0 ;
  wire \txAXIS_tdata[55]_i_12_n_0 ;
  wire \txAXIS_tdata[58]_i_7_n_0 ;
  wire \txAXIS_tdata[59]_i_7_n_0 ;
  wire \txAXIS_tdata[5]_i_7_n_0 ;
  wire \txAXIS_tdata[62]_i_7_n_0 ;
  wire \txAXIS_tdata[7]_i_12_n_0 ;
  wire \txAXIS_tdata[7]_i_5_n_0 ;
  wire \txAXIS_tdata[8]_i_2_n_0 ;
  wire \txAXIS_tdata[8]_i_6_n_0 ;
  wire \txAXIS_tdata[8]_i_8_n_0 ;
  wire \txAXIS_tdata[9]_i_2_n_0 ;
  wire \txAXIS_tdata[9]_i_6_n_0 ;
  wire \txAXIS_tdata[9]_i_8_n_0 ;
  wire \txAXIS_tdata_reg[0] ;
  wire \txAXIS_tdata_reg[0]_0 ;
  wire \txAXIS_tdata_reg[0]_1 ;
  wire \txAXIS_tdata_reg[10] ;
  wire \txAXIS_tdata_reg[10]_0 ;
  wire \txAXIS_tdata_reg[10]_1 ;
  wire \txAXIS_tdata_reg[11] ;
  wire \txAXIS_tdata_reg[11]_0 ;
  wire \txAXIS_tdata_reg[11]_1 ;
  wire \txAXIS_tdata_reg[12] ;
  wire \txAXIS_tdata_reg[12]_0 ;
  wire \txAXIS_tdata_reg[12]_1 ;
  wire \txAXIS_tdata_reg[13] ;
  wire \txAXIS_tdata_reg[13]_0 ;
  wire \txAXIS_tdata_reg[13]_1 ;
  wire \txAXIS_tdata_reg[14] ;
  wire \txAXIS_tdata_reg[14]_0 ;
  wire \txAXIS_tdata_reg[14]_1 ;
  wire \txAXIS_tdata_reg[15] ;
  wire \txAXIS_tdata_reg[15]_0 ;
  wire \txAXIS_tdata_reg[15]_1 ;
  wire \txAXIS_tdata_reg[1] ;
  wire \txAXIS_tdata_reg[1]_0 ;
  wire \txAXIS_tdata_reg[1]_1 ;
  wire \txAXIS_tdata_reg[1]_2 ;
  wire \txAXIS_tdata_reg[1]_3 ;
  wire \txAXIS_tdata_reg[1]_4 ;
  wire \txAXIS_tdata_reg[2] ;
  wire \txAXIS_tdata_reg[32] ;
  wire \txAXIS_tdata_reg[33] ;
  wire \txAXIS_tdata_reg[34] ;
  wire \txAXIS_tdata_reg[35] ;
  wire \txAXIS_tdata_reg[36] ;
  wire \txAXIS_tdata_reg[37] ;
  wire \txAXIS_tdata_reg[38] ;
  wire \txAXIS_tdata_reg[39] ;
  wire \txAXIS_tdata_reg[39]_0 ;
  wire [2:0]\txAXIS_tdata_reg[3] ;
  wire \txAXIS_tdata_reg[3]_0 ;
  wire \txAXIS_tdata_reg[3]_1 ;
  wire \txAXIS_tdata_reg[40] ;
  wire \txAXIS_tdata_reg[40]_0 ;
  wire \txAXIS_tdata_reg[40]_1 ;
  wire \txAXIS_tdata_reg[41] ;
  wire \txAXIS_tdata_reg[41]_0 ;
  wire \txAXIS_tdata_reg[41]_1 ;
  wire \txAXIS_tdata_reg[42] ;
  wire \txAXIS_tdata_reg[42]_0 ;
  wire \txAXIS_tdata_reg[42]_1 ;
  wire \txAXIS_tdata_reg[43] ;
  wire \txAXIS_tdata_reg[43]_0 ;
  wire \txAXIS_tdata_reg[43]_1 ;
  wire \txAXIS_tdata_reg[44] ;
  wire \txAXIS_tdata_reg[44]_0 ;
  wire \txAXIS_tdata_reg[44]_1 ;
  wire \txAXIS_tdata_reg[45] ;
  wire \txAXIS_tdata_reg[45]_0 ;
  wire \txAXIS_tdata_reg[45]_1 ;
  wire \txAXIS_tdata_reg[46] ;
  wire \txAXIS_tdata_reg[46]_0 ;
  wire \txAXIS_tdata_reg[46]_1 ;
  wire \txAXIS_tdata_reg[47] ;
  wire \txAXIS_tdata_reg[47]_0 ;
  wire \txAXIS_tdata_reg[47]_1 ;
  wire \txAXIS_tdata_reg[47]_2 ;
  wire \txAXIS_tdata_reg[48] ;
  wire \txAXIS_tdata_reg[48]_0 ;
  wire \txAXIS_tdata_reg[49] ;
  wire \txAXIS_tdata_reg[49]_0 ;
  wire \txAXIS_tdata_reg[4] ;
  wire \txAXIS_tdata_reg[4]_0 ;
  wire \txAXIS_tdata_reg[50] ;
  wire \txAXIS_tdata_reg[50]_0 ;
  wire \txAXIS_tdata_reg[51] ;
  wire \txAXIS_tdata_reg[51]_0 ;
  wire \txAXIS_tdata_reg[52] ;
  wire \txAXIS_tdata_reg[52]_0 ;
  wire \txAXIS_tdata_reg[53] ;
  wire \txAXIS_tdata_reg[53]_0 ;
  wire \txAXIS_tdata_reg[54] ;
  wire \txAXIS_tdata_reg[54]_0 ;
  wire \txAXIS_tdata_reg[55] ;
  wire \txAXIS_tdata_reg[55]_0 ;
  wire \txAXIS_tdata_reg[55]_1 ;
  wire \txAXIS_tdata_reg[58] ;
  wire \txAXIS_tdata_reg[58]_0 ;
  wire \txAXIS_tdata_reg[59] ;
  wire \txAXIS_tdata_reg[59]_0 ;
  wire \txAXIS_tdata_reg[5] ;
  wire \txAXIS_tdata_reg[62] ;
  wire \txAXIS_tdata_reg[62]_0 ;
  wire \txAXIS_tdata_reg[62]_1 ;
  wire \txAXIS_tdata_reg[62]_2 ;
  wire \txAXIS_tdata_reg[7] ;
  wire \txAXIS_tdata_reg[7]_0 ;
  wire \txAXIS_tdata_reg[7]_1 ;
  wire [0:0]\txAXIS_tdata_reg[7]_2 ;
  wire \txAXIS_tdata_reg[7]_3 ;
  wire \txAXIS_tdata_reg[7]_4 ;
  wire \txAXIS_tdata_reg[7]_5 ;
  wire [7:0]\txAXIS_tdata_reg[7]_6 ;
  wire \txAXIS_tdata_reg[8] ;
  wire \txAXIS_tdata_reg[8]_0 ;
  wire \txAXIS_tdata_reg[8]_1 ;
  wire \txAXIS_tdata_reg[8]_2 ;
  wire \txAXIS_tdata_reg[9] ;
  wire \txAXIS_tdata_reg[9]_0 ;
  wire \txAXIS_tdata_reg[9]_1 ;
  wire \txlen[28]_i_2_n_0 ;
  wire \txlen[28]_i_3_n_0 ;
  wire \txlen_reg[28] ;
  wire \txlen_reg[28]_0 ;
  wire validCrc_sig_i_1_n_0;
  wire validCrc_sig_reg_n_0;

  LUT5 #(
    .INIT(32'hFFFF7E3F)) 
    commok_sig_i_2
       (.I0(Q[3]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[2]),
        .I4(commok_sig_i_3_n_0),
        .O(\stateOp_reg[3] ));
  LUT6 #(
    .INIT(64'hFFFBBFF8FFFBBFFB)) 
    commok_sig_i_3
       (.I0(\tixVBuffer[7]_i_5_n_0 ),
        .I1(Q[2]),
        .I2(Q[3]),
        .I3(Q[4]),
        .I4(Q[5]),
        .I5(\crc_imd_reg[0]_2 ),
        .O(commok_sig_i_3_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFF8)) 
    \crc_imd[10]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crcAXIS_tkeep_reg[2] ),
        .I2(\crc_imd_reg[3]_3 ),
        .I3(\crc_imd[10]_i_2_n_0 ),
        .I4(\crc_imd[10]_i_3_n_0 ),
        .I5(\crc_imd[10]_i_4_n_0 ),
        .O(\crc_imd[10]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[10]_i_2 
       (.I0(\crcAXIS_tkeep_reg[2]_0 ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\crc_imd_reg[15]_0 [9]),
        .I3(AXIS_tdata[0]),
        .I4(AXIS_tdata[1]),
        .O(\crc_imd[10]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[10]_i_3 
       (.I0(\crcAXIS_tkeep_reg[6]_2 ),
        .I1(crc_imd0148_out),
        .I2(\crcAXIS_tkeep_reg[6]_3 ),
        .I3(crc_imd0172_out),
        .I4(crc_imd081_out),
        .I5(\crcAXIS_tkeep_reg[6]_4 ),
        .O(\crc_imd[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[10]_i_4 
       (.I0(\crcAXIS_tkeep_reg[6] ),
        .I1(crc_imd0112_out),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(crc_imd041_out),
        .I4(crc_imd065_out),
        .I5(\crcAXIS_tkeep_reg[4]_0 ),
        .O(\crc_imd[10]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFF8)) 
    \crc_imd[11]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crcAXIS_tkeep_reg[2] ),
        .I2(\crc_imd_reg[3]_3 ),
        .I3(\crc_imd[11]_i_2_n_0 ),
        .I4(\crc_imd[11]_i_3_n_0 ),
        .I5(\crc_imd[11]_i_4_n_0 ),
        .O(\crc_imd[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1929" *) 
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[11]_i_2 
       (.I0(\crcAXIS_tkeep_reg[2]_0 ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(AXIS_tdata[2]),
        .I3(AXIS_tdata[1]),
        .I4(\crc_imd_reg[15]_0 [9]),
        .O(\crc_imd[11]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[11]_i_3 
       (.I0(\crcAXIS_tkeep_reg[6]_2 ),
        .I1(crc_imd0149_out),
        .I2(\crcAXIS_tkeep_reg[6]_3 ),
        .I3(crc_imd0173_out),
        .I4(crc_imd083_out),
        .I5(\crcAXIS_tkeep_reg[6]_4 ),
        .O(\crc_imd[11]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[11]_i_4 
       (.I0(\crcAXIS_tkeep_reg[6] ),
        .I1(crc_imd0115_out),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(crc_imd042_out),
        .I4(crc_imd066_out),
        .I5(\crcAXIS_tkeep_reg[4]_0 ),
        .O(\crc_imd[11]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFF8)) 
    \crc_imd[12]_i_1 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\crcAXIS_tkeep_reg[2] ),
        .I2(\crc_imd_reg[3]_3 ),
        .I3(\crc_imd[12]_i_2_n_0 ),
        .I4(\crc_imd[12]_i_3_n_0 ),
        .I5(\crc_imd[12]_i_4_n_0 ),
        .O(\crc_imd[12]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[12]_i_2 
       (.I0(\crcAXIS_tkeep_reg[2]_0 ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(AXIS_tdata[3]),
        .I4(AXIS_tdata[2]),
        .O(\crc_imd[12]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[12]_i_3 
       (.I0(\crcAXIS_tkeep_reg[6]_2 ),
        .I1(crc_imd0150_out),
        .I2(\crcAXIS_tkeep_reg[6]_3 ),
        .I3(crc_imd0174_out),
        .I4(crc_imd085_out),
        .I5(\crcAXIS_tkeep_reg[6]_4 ),
        .O(\crc_imd[12]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[12]_i_4 
       (.I0(\crcAXIS_tkeep_reg[6] ),
        .I1(crc_imd0118_out),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(crc_imd043_out),
        .I4(crc_imd067_out),
        .I5(\crcAXIS_tkeep_reg[4]_0 ),
        .O(\crc_imd[12]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFF8)) 
    \crc_imd[13]_i_1 
       (.I0(\crc_imd_reg[15]_0 [5]),
        .I1(\crcAXIS_tkeep_reg[2] ),
        .I2(\crc_imd_reg[3]_3 ),
        .I3(\crc_imd[13]_i_2_n_0 ),
        .I4(\crc_imd[13]_i_3_n_0 ),
        .I5(\crc_imd[13]_i_4_n_0 ),
        .O(\crc_imd[13]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[13]_i_2 
       (.I0(\crcAXIS_tkeep_reg[2]_0 ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(AXIS_tdata[3]),
        .I4(AXIS_tdata[4]),
        .O(\crc_imd[13]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[13]_i_3 
       (.I0(\crcAXIS_tkeep_reg[6]_2 ),
        .I1(crc_imd0151_out),
        .I2(\crcAXIS_tkeep_reg[6]_3 ),
        .I3(crc_imd0175_out),
        .I4(crc_imd086_out),
        .I5(\crcAXIS_tkeep_reg[6]_4 ),
        .O(\crc_imd[13]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[13]_i_4 
       (.I0(\crcAXIS_tkeep_reg[6] ),
        .I1(crc_imd0121_out),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(crc_imd044_out),
        .I4(crc_imd068_out),
        .I5(\crcAXIS_tkeep_reg[4]_0 ),
        .O(\crc_imd[13]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFF8)) 
    \crc_imd[14]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crcAXIS_tkeep_reg[2] ),
        .I2(\crc_imd_reg[3]_3 ),
        .I3(\crc_imd[14]_i_4_n_0 ),
        .I4(\crc_imd[14]_i_5_n_0 ),
        .I5(\crc_imd[14]_i_6_n_0 ),
        .O(\crc_imd[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1995" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    \crc_imd[14]_i_13 
       (.I0(\crc_imd_reg[0]_3 [3]),
        .I1(\crc_imd_reg[0]_3 [1]),
        .I2(stateOp_reg_0),
        .I3(\crc_imd_reg[0]_3 [2]),
        .O(\crcAXIS_tkeep_reg[4] ));
  (* SOFT_HLUTNM = "soft_lutpair1995" *) 
  LUT4 #(
    .INIT(16'h4000)) 
    \crc_imd[14]_i_15 
       (.I0(\crc_imd_reg[0]_3 [3]),
        .I1(\crc_imd_reg[0]_3 [1]),
        .I2(stateOp_reg_0),
        .I3(\crc_imd_reg[0]_3 [2]),
        .O(\crcAXIS_tkeep_reg[4]_0 ));
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[14]_i_17 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd[15]_i_21 [3]),
        .I2(\stateOp_reg[2] ),
        .I3(\crc_imd[15]_i_21_0 [3]),
        .I4(\stateOp_reg[0] ),
        .O(\crc_imd_reg[3]_2 ));
  LUT3 #(
    .INIT(8'h04)) 
    \crc_imd[14]_i_2 
       (.I0(\crc_imd_reg[0]_3 [1]),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_3 [0]),
        .O(\crcAXIS_tkeep_reg[2] ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[14]_i_4 
       (.I0(\crcAXIS_tkeep_reg[2]_0 ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(AXIS_tdata[4]),
        .I4(AXIS_tdata[5]),
        .O(\crc_imd[14]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[14]_i_5 
       (.I0(\crcAXIS_tkeep_reg[6]_2 ),
        .I1(crc_imd0152_out),
        .I2(\crcAXIS_tkeep_reg[6]_3 ),
        .I3(crc_imd0176_out),
        .I4(crc_imd087_out),
        .I5(\crcAXIS_tkeep_reg[6]_4 ),
        .O(\crc_imd[14]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[14]_i_6 
       (.I0(\crcAXIS_tkeep_reg[6] ),
        .I1(crc_imd0124_out),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(crc_imd046_out),
        .I4(crc_imd069_out),
        .I5(\crcAXIS_tkeep_reg[4]_0 ),
        .O(\crc_imd[14]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF11011111)) 
    \crc_imd[15]_i_1 
       (.I0(stateOp_reg_0),
        .I1(\crc_imd_reg[0]_4 ),
        .I2(\crc_imd_reg[0]_2 ),
        .I3(\stateOp_reg[0] ),
        .I4(recvAXIS_tlast),
        .I5(\crc_imd[15]_i_5_n_0 ),
        .O(\crc_imd[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFF00020200000202)) 
    \crc_imd[15]_i_12 
       (.I0(\crc_imd[15]_i_43_n_0 ),
        .I1(\crc_imd_reg[0]_3 [6]),
        .I2(\crc_imd_reg[0]_3 [5]),
        .I3(\crc_imd[15]_i_44_n_0 ),
        .I4(\crc_imd_reg[0]_3 [4]),
        .I5(\crc_imd_reg[0]_3 [2]),
        .O(\crc_imd[15]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'hEAAAAAAA)) 
    \crc_imd[15]_i_13 
       (.I0(\crc_imd[15]_i_45_n_0 ),
        .I1(\crc_imd[15]_i_46_n_0 ),
        .I2(\crc_imd_reg[0]_3 [0]),
        .I3(\crc_imd_reg[0]_3 [4]),
        .I4(\crc_imd_reg[0]_3 [2]),
        .O(\crc_imd[15]_i_13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1997" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \crc_imd[15]_i_14 
       (.I0(first),
        .I1(validCrc_sig_reg_n_0),
        .O(\crc_imd[15]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1927" *) 
  LUT5 #(
    .INIT(32'h00004000)) 
    \crc_imd[15]_i_20 
       (.I0(\crc_imd_reg[0]_3 [5]),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_3 [1]),
        .I3(\crc_imd_reg[0]_3 [3]),
        .I4(\crc_imd_reg[0]_3 [4]),
        .O(\crcAXIS_tkeep_reg[6]_4 ));
  (* SOFT_HLUTNM = "soft_lutpair1928" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \crc_imd[15]_i_26 
       (.I0(\crc_imd_reg[0]_3 [5]),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_3 [1]),
        .I3(\crc_imd_reg[0]_3 [3]),
        .I4(\crc_imd_reg[0]_3 [6]),
        .O(\crcAXIS_tkeep_reg[6]_3 ));
  (* SOFT_HLUTNM = "soft_lutpair1928" *) 
  LUT5 #(
    .INIT(32'h00008000)) 
    \crc_imd[15]_i_32 
       (.I0(\crc_imd_reg[0]_3 [5]),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_3 [1]),
        .I3(\crc_imd_reg[0]_3 [3]),
        .I4(\crc_imd_reg[0]_3 [6]),
        .O(\crcAXIS_tkeep_reg[6]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair1996" *) 
  LUT4 #(
    .INIT(16'hD100)) 
    \crc_imd[15]_i_43 
       (.I0(\crc_imd_reg[0]_3 [3]),
        .I1(\crc_imd_reg[0]_3 [2]),
        .I2(\crc_imd_reg[0]_3 [1]),
        .I3(stateOp_reg_0),
        .O(\crc_imd[15]_i_43_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1996" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \crc_imd[15]_i_44 
       (.I0(\crc_imd_reg[0]_3 [3]),
        .I1(\crc_imd_reg[0]_3 [1]),
        .I2(stateOp_reg_0),
        .I3(\crc_imd_reg[0]_3 [5]),
        .O(\crc_imd[15]_i_44_n_0 ));
  LUT6 #(
    .INIT(64'h0000000100000000)) 
    \crc_imd[15]_i_45 
       (.I0(\crc_imd_reg[0]_3 [3]),
        .I1(\crc_imd_reg[0]_3 [5]),
        .I2(\crc_imd_reg[0]_3 [2]),
        .I3(\crc_imd_reg[0]_3 [4]),
        .I4(\crc_imd_reg[0]_3 [1]),
        .I5(stateOp_reg_0),
        .O(\crc_imd[15]_i_45_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1999" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \crc_imd[15]_i_46 
       (.I0(stateOp_reg_0),
        .I1(\crc_imd_reg[0]_3 [1]),
        .I2(\crc_imd_reg[0]_3 [3]),
        .O(\crc_imd[15]_i_46_n_0 ));
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[15]_i_49 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd[15]_i_21 [2]),
        .I2(\stateOp_reg[2] ),
        .I3(\crc_imd[15]_i_21_0 [2]),
        .I4(\stateOp_reg[0] ),
        .O(\crc_imd_reg[2]_1 ));
  LUT6 #(
    .INIT(64'hFFBFFFFFFEFDFFFF)) 
    \crc_imd[15]_i_4__0 
       (.I0(Q[0]),
        .I1(Q[2]),
        .I2(Q[4]),
        .I3(Q[5]),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\stateOp_reg[0] ));
  LUT6 #(
    .INIT(64'h88F8000000000000)) 
    \crc_imd[15]_i_5 
       (.I0(\crc_imd[15]_i_12_n_0 ),
        .I1(\crc_imd_reg[0]_3 [0]),
        .I2(\crc_imd[15]_i_13_n_0 ),
        .I3(\crc_imd_reg[0]_3 [6]),
        .I4(\crc_imd[15]_i_14_n_0 ),
        .I5(\crc_imd_reg[0]_5 ),
        .O(\crc_imd[15]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[15]_i_50 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd[15]_i_21 [5]),
        .I2(\stateOp_reg[2] ),
        .I3(\crc_imd[15]_i_21_0 [5]),
        .I4(\stateOp_reg[0] ),
        .O(\crc_imd_reg[7]_19 ));
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[15]_i_76 
       (.I0(\crc_imd_reg[15]_0 [8]),
        .I1(\crc_imd[15]_i_21 [0]),
        .I2(\stateOp_reg[2] ),
        .I3(\crc_imd[15]_i_21_0 [0]),
        .I4(\stateOp_reg[0] ),
        .O(\crc_imd_reg[8]_3 ));
  LUT3 #(
    .INIT(8'h96)) 
    \crc_imd[1]_i_11 
       (.I0(\crc_imd_reg[3]_2 ),
        .I1(\crc_imd_reg[4]_1 ),
        .I2(\crc_imd[15]_i_18 ),
        .O(\crc_imd_reg[3]_1 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[2]_i_5 
       (.I0(\crcAXIS_tkeep_reg[6] ),
        .I1(crc_imd0148_out),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(crc_imd065_out),
        .I4(crc_imd081_out),
        .I5(\crcAXIS_tkeep_reg[4]_0 ),
        .O(\crcAXIS_tkeep_reg[6]_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFF8)) 
    \crc_imd[3]_i_1 
       (.I0(crc_imd013_out),
        .I1(\crcAXIS_tkeep_reg[2] ),
        .I2(\crc_imd_reg[3]_3 ),
        .I3(\crc_imd_reg[3]_4 ),
        .I4(\crc_imd[3]_i_4_n_0 ),
        .O(\crc_imd[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1929" *) 
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[3]_i_2 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(AXIS_tdata[1]),
        .I2(AXIS_tdata[2]),
        .I3(\crc_imd_reg[15]_0 [10]),
        .O(crc_imd013_out));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[3]_i_4 
       (.I0(\crcAXIS_tkeep_reg[6] ),
        .I1(crc_imd0149_out),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(crc_imd066_out),
        .I4(crc_imd083_out),
        .I5(\crcAXIS_tkeep_reg[4]_0 ),
        .O(\crc_imd[3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[4]_i_5 
       (.I0(\crcAXIS_tkeep_reg[6] ),
        .I1(crc_imd0150_out),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(crc_imd067_out),
        .I4(crc_imd085_out),
        .I5(\crcAXIS_tkeep_reg[4]_0 ),
        .O(\crcAXIS_tkeep_reg[6]_1 ));
  LUT5 #(
    .INIT(32'hFFFFFFEA)) 
    \crc_imd[5]_i_1 
       (.I0(\crc_imd_reg[5]_0 ),
        .I1(crc_imd044_out),
        .I2(\crcAXIS_tkeep_reg[2]_0 ),
        .I3(\crc_imd[5]_i_4_n_0 ),
        .I4(\crc_imd[5]_i_5_n_0 ),
        .O(\crc_imd[5]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[5]_i_3 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(AXIS_tdata[9]),
        .I2(AXIS_tdata[8]),
        .I3(\crc_imd_reg[15]_0 [4]),
        .O(crc_imd044_out));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[5]_i_4 
       (.I0(\crcAXIS_tkeep_reg[6]_2 ),
        .I1(crc_imd0175_out),
        .I2(\crcAXIS_tkeep_reg[6]_3 ),
        .I3(crc_imd0198_out),
        .I4(crc_imd0121_out),
        .I5(\crcAXIS_tkeep_reg[6]_4 ),
        .O(\crc_imd[5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[5]_i_5 
       (.I0(\crcAXIS_tkeep_reg[6] ),
        .I1(crc_imd0151_out),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(crc_imd068_out),
        .I4(crc_imd086_out),
        .I5(\crcAXIS_tkeep_reg[4]_0 ),
        .O(\crc_imd[5]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFEA)) 
    \crc_imd[6]_i_1 
       (.I0(\crc_imd_reg[6]_2 ),
        .I1(crc_imd046_out),
        .I2(\crcAXIS_tkeep_reg[2]_0 ),
        .I3(\crc_imd[6]_i_5_n_0 ),
        .I4(\crc_imd[6]_i_6_n_0 ),
        .O(\crc_imd[6]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \crc_imd[6]_i_3 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(AXIS_tdata[10]),
        .I2(AXIS_tdata[9]),
        .I3(\crc_imd_reg[15]_0 [5]),
        .O(crc_imd046_out));
  (* SOFT_HLUTNM = "soft_lutpair1999" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \crc_imd[6]_i_4 
       (.I0(\crc_imd_reg[0]_3 [1]),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_3 [0]),
        .O(\crcAXIS_tkeep_reg[2]_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[6]_i_5 
       (.I0(\crcAXIS_tkeep_reg[6]_2 ),
        .I1(crc_imd0176_out),
        .I2(\crcAXIS_tkeep_reg[6]_3 ),
        .I3(crc_imd0200_out),
        .I4(crc_imd0124_out),
        .I5(\crcAXIS_tkeep_reg[6]_4 ),
        .O(\crc_imd[6]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[6]_i_6 
       (.I0(\crcAXIS_tkeep_reg[6] ),
        .I1(crc_imd0152_out),
        .I2(\crcAXIS_tkeep_reg[4] ),
        .I3(crc_imd069_out),
        .I4(crc_imd087_out),
        .I5(\crcAXIS_tkeep_reg[4]_0 ),
        .O(\crc_imd[6]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFEFFFFFEFEFEFEFE)) 
    \crc_imd[7]_i_1 
       (.I0(\crc_imd[7]_i_2_n_0 ),
        .I1(\crc_imd_reg[7]_20 ),
        .I2(\crc_imd_reg[7]_21 ),
        .I3(\recvAXIS_tdata_sig_reg[11] ),
        .I4(\crc_imd_reg[7]_22 ),
        .I5(\crcAXIS_tkeep_reg[6] ),
        .O(\crc_imd[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hA6A655A6)) 
    \crc_imd[7]_i_15 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\crc_imd[15]_i_21 [4]),
        .I2(\stateOp_reg[2] ),
        .I3(\crc_imd[15]_i_21_0 [4]),
        .I4(\stateOp_reg[0] ),
        .O(\crc_imd_reg[4]_1 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFEAAEAEEA)) 
    \crc_imd[7]_i_2 
       (.I0(\crc_imd[7]_i_8_n_0 ),
        .I1(\crcAXIS_tkeep_reg[2]_0 ),
        .I2(\crc_imd_reg[15]_0 [5]),
        .I3(\crc_imd_reg[15]_0 [6]),
        .I4(p_136_in),
        .I5(\crc_imd_reg[7]_23 ),
        .O(\crc_imd[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h65AA65659A559A9A)) 
    \crc_imd[7]_i_5 
       (.I0(\crc_imd_reg[4]_1 ),
        .I1(\stateOp_reg[0] ),
        .I2(\crc_imd[15]_i_21_0 [3]),
        .I3(\stateOp_reg[2] ),
        .I4(\crc_imd[15]_i_21 [3]),
        .I5(\crc_imd_reg[15]_0 [3]),
        .O(\recvAXIS_tdata_sig_reg[11] ));
  (* SOFT_HLUTNM = "soft_lutpair1927" *) 
  LUT5 #(
    .INIT(32'h40000000)) 
    \crc_imd[7]_i_7 
       (.I0(\crc_imd_reg[0]_3 [5]),
        .I1(stateOp_reg_0),
        .I2(\crc_imd_reg[0]_3 [1]),
        .I3(\crc_imd_reg[0]_3 [3]),
        .I4(\crc_imd_reg[0]_3 [4]),
        .O(\crcAXIS_tkeep_reg[6] ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \crc_imd[7]_i_8 
       (.I0(\crcAXIS_tkeep_reg[6]_2 ),
        .I1(crc_imd0165_out),
        .I2(\crcAXIS_tkeep_reg[6]_3 ),
        .I3(crc_imd0202_out),
        .I4(crc_imd0100_out),
        .I5(\crcAXIS_tkeep_reg[6]_4 ),
        .O(\crc_imd[7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h8228288228828228)) 
    \crc_imd[8]_i_2 
       (.I0(\crcAXIS_tkeep_reg[2] ),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(AXIS_tdata[7]),
        .I4(AXIS_tdata[6]),
        .I5(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[15]_13 ));
  LUT5 #(
    .INIT(32'h28828228)) 
    \crc_imd[8]_i_3 
       (.I0(\crcAXIS_tkeep_reg[2]_0 ),
        .I1(\crc_imd_reg[15]_0 [6]),
        .I2(\crc_imd_reg[15]_0 [7]),
        .I3(AXIS_tdata[11]),
        .I4(AXIS_tdata[12]),
        .O(\crc_imd_reg[6]_1 ));
  LUT6 #(
    .INIT(64'h22F2DD0DDD0D22F2)) 
    \crc_imd[9]_i_2 
       (.I0(\crc_imd[15]_i_21 [1]),
        .I1(\stateOp_reg[2] ),
        .I2(\crc_imd[15]_i_21_0 [1]),
        .I3(\stateOp_reg[0] ),
        .I4(\crc_imd_reg[15]_0 [1]),
        .I5(\crc_imd_reg[15]_0 [15]),
        .O(p_10_out));
  LUT6 #(
    .INIT(64'hFFFEF6FFFFFFFFFF)) 
    \crc_imd[9]_i_6 
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[5]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[0]),
        .O(\stateOp_reg[2] ));
  FDCE \crc_imd_reg[0] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd_reg[15]_14 [0]),
        .Q(\crc_imd_reg[15]_0 [0]));
  FDCE \crc_imd_reg[10] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd[10]_i_1_n_0 ),
        .Q(\crc_imd_reg[15]_0 [10]));
  FDCE \crc_imd_reg[11] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd[11]_i_1_n_0 ),
        .Q(\crc_imd_reg[15]_0 [11]));
  FDCE \crc_imd_reg[12] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd[12]_i_1_n_0 ),
        .Q(\crc_imd_reg[15]_0 [12]));
  FDCE \crc_imd_reg[13] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd[13]_i_1_n_0 ),
        .Q(\crc_imd_reg[15]_0 [13]));
  FDCE \crc_imd_reg[14] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd[14]_i_1_n_0 ),
        .Q(\crc_imd_reg[15]_0 [14]));
  FDCE \crc_imd_reg[15] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd_reg[15]_14 [6]),
        .Q(\crc_imd_reg[15]_0 [15]));
  FDCE \crc_imd_reg[1] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd_reg[15]_14 [1]),
        .Q(\crc_imd_reg[15]_0 [1]));
  FDCE \crc_imd_reg[2] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd_reg[15]_14 [2]),
        .Q(\crc_imd_reg[15]_0 [2]));
  FDCE \crc_imd_reg[3] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd[3]_i_1_n_0 ),
        .Q(\crc_imd_reg[15]_0 [3]));
  FDCE \crc_imd_reg[4] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd_reg[15]_14 [3]),
        .Q(\crc_imd_reg[15]_0 [4]));
  FDCE \crc_imd_reg[5] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd[5]_i_1_n_0 ),
        .Q(\crc_imd_reg[15]_0 [5]));
  FDCE \crc_imd_reg[6] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd[6]_i_1_n_0 ),
        .Q(\crc_imd_reg[15]_0 [6]));
  FDCE \crc_imd_reg[7] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd[7]_i_1_n_0 ),
        .Q(\crc_imd_reg[15]_0 [7]));
  FDCE \crc_imd_reg[8] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd_reg[15]_14 [4]),
        .Q(\crc_imd_reg[15]_0 [8]));
  FDCE \crc_imd_reg[9] 
       (.C(aclk_sig),
        .CE(\crc_imd[15]_i_1_n_0 ),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(\crc_imd_reg[15]_14 [5]),
        .Q(\crc_imd_reg[15]_0 [9]));
  (* SOFT_HLUTNM = "soft_lutpair1997" *) 
  LUT4 #(
    .INIT(16'h2A2F)) 
    first_i_1
       (.I0(first),
        .I1(AXIS_tvalid),
        .I2(stateOp_reg_0),
        .I3(AXIS_tlast),
        .O(first_i_1_n_0));
  FDPE first_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(first_i_1_n_0),
        .PRE(\crc_imd_reg[0]_1 ),
        .Q(first));
  LUT6 #(
    .INIT(64'h00FF000100FFFEFF)) 
    \retbuf[0][0]_i_5 
       (.I0(\retbuf_reg[0][0] [0]),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\crc_imd_reg[15]_0 [0]),
        .I4(\retbuf_reg[0][0]_0 ),
        .I5(\crc_imd_reg[15]_0 [8]),
        .O(\resid_reg[0] ));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[0][1]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .I4(\retbuf_reg[0][1] ),
        .I5(\retbuf_reg[0][1]_0 ),
        .O(\crc_imd_reg[7]_17 [0]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[0][3]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [3]),
        .I4(\retbuf_reg[0][1] ),
        .I5(\retbuf_reg[0][3] ),
        .O(\crc_imd_reg[7]_17 [1]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[0][4]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .I4(\retbuf_reg[0][1] ),
        .I5(\retbuf_reg[0][4] ),
        .O(\crc_imd_reg[7]_17 [2]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[0][5]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [5]),
        .I4(\retbuf_reg[0][1] ),
        .I5(\retbuf_reg[0][5] ),
        .O(\crc_imd_reg[7]_17 [3]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[0][6]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [6]),
        .I4(\retbuf_reg[0][1] ),
        .I5(\retbuf_reg[0][6]_0 ),
        .O(\crc_imd_reg[7]_17 [4]));
  LUT5 #(
    .INIT(32'hFFFFE040)) 
    \retbuf[0][7]_i_2 
       (.I0(\retbuf_reg[0][1] ),
        .I1(\crc_imd_reg[15]_0 [7]),
        .I2(\retbuf_reg[1][7] ),
        .I3(\crc_imd_reg[15]_0 [15]),
        .I4(\retbuf_reg[0][7] ),
        .O(\crc_imd_reg[7]_17 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1991" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[11][0]_i_1 
       (.I0(\retbuf_reg[1][7] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[11][0] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[11]_1 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1992" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[11][1]_i_1 
       (.I0(\retbuf_reg[1][7] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[11][0] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[11]_1 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1993" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[11][2]_i_1 
       (.I0(\retbuf_reg[1][7] ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[11][0] ),
        .I3(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[11]_1 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1994" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[11][3]_i_1 
       (.I0(\retbuf_reg[1][7] ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[11][0] ),
        .I3(\crc_imd_reg[15]_0 [3]),
        .O(\crc_imd_reg[11]_1 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1984" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[15][0]_i_1 
       (.I0(\retbuf_reg[1][7] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[15][0] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[8]_0 ));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[16][0]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[16][0] ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_15 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1988" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[16][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[16][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_15 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1985" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[16][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[16][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_15 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1989" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[16][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[16][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_15 [3]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[16][4]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[16][0] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_15 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[16][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[16][0] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_15 [5]));
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[16][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[16][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_15 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1990" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[16][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[16][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_15 [7]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[17][0]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[17][0] ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_9 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1988" *) 
  LUT4 #(
    .INIT(16'hAC00)) 
    \retbuf[17][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(\crc_imd_reg[15]_0 [1]),
        .I2(\retbuf_reg[17][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[15]_9 [1]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[17][2]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\retbuf_reg[17][0] ),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_9 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1989" *) 
  LUT4 #(
    .INIT(16'hAC00)) 
    \retbuf[17][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [11]),
        .I1(\crc_imd_reg[15]_0 [3]),
        .I2(\retbuf_reg[17][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[15]_9 [3]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[17][4]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[17][0] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_9 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[17][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[17][0] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_9 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1986" *) 
  LUT4 #(
    .INIT(16'hAC00)) 
    \retbuf[17][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [14]),
        .I1(\crc_imd_reg[15]_0 [6]),
        .I2(\retbuf_reg[17][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[15]_9 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1987" *) 
  LUT4 #(
    .INIT(16'hAC00)) 
    \retbuf[17][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\crc_imd_reg[15]_0 [7]),
        .I2(\retbuf_reg[17][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[15]_9 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1984" *) 
  LUT4 #(
    .INIT(16'hAC00)) 
    \retbuf[18][0]_i_1 
       (.I0(\crc_imd_reg[15]_0 [8]),
        .I1(\crc_imd_reg[15]_0 [0]),
        .I2(\retbuf_reg[18][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[15]_8 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1981" *) 
  LUT4 #(
    .INIT(16'hAC00)) 
    \retbuf[18][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(\crc_imd_reg[15]_0 [1]),
        .I2(\retbuf_reg[18][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[15]_8 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1985" *) 
  LUT4 #(
    .INIT(16'hAC00)) 
    \retbuf[18][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [10]),
        .I1(\crc_imd_reg[15]_0 [2]),
        .I2(\retbuf_reg[18][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[15]_8 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1982" *) 
  LUT4 #(
    .INIT(16'hAC00)) 
    \retbuf[18][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [11]),
        .I1(\crc_imd_reg[15]_0 [3]),
        .I2(\retbuf_reg[18][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[15]_8 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1983" *) 
  LUT4 #(
    .INIT(16'hAC00)) 
    \retbuf[18][4]_i_1 
       (.I0(\crc_imd_reg[15]_0 [12]),
        .I1(\crc_imd_reg[15]_0 [4]),
        .I2(\retbuf_reg[18][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[15]_8 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[18][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[18][5] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_8 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1986" *) 
  LUT4 #(
    .INIT(16'hAC00)) 
    \retbuf[18][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [14]),
        .I1(\crc_imd_reg[15]_0 [6]),
        .I2(\retbuf_reg[18][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[15]_8 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1987" *) 
  LUT4 #(
    .INIT(16'hAC00)) 
    \retbuf[18][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\crc_imd_reg[15]_0 [7]),
        .I2(\retbuf_reg[18][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[15]_8 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1976" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[19][0]_i_1 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[19][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_14 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1981" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[19][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[19][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_14 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1978" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[19][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[19][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_14 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1982" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[19][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[19][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_14 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1983" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[19][4]_i_1 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[19][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_14 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[19][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[19][5] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_14 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1979" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[19][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[19][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_14 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1980" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[19][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[19][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_14 [7]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[1][0]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .I4(\retbuf_reg[1][0] ),
        .I5(\retbuf_reg[1][0]_0 ),
        .O(\crc_imd_reg[7]_16 [0]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[1][1]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .I4(\retbuf_reg[1][0] ),
        .I5(\retbuf_reg[1][1] ),
        .O(\crc_imd_reg[7]_16 [1]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[1][2]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [2]),
        .I4(\retbuf_reg[1][0] ),
        .I5(\retbuf_reg[1][2] ),
        .O(\crc_imd_reg[7]_16 [2]));
  LUT6 #(
    .INIT(64'hE040FFFFE040E040)) 
    \retbuf[1][3]_i_1 
       (.I0(\retbuf_reg[1][0] ),
        .I1(\crc_imd_reg[15]_0 [3]),
        .I2(\retbuf_reg[1][7] ),
        .I3(\crc_imd_reg[15]_0 [11]),
        .I4(\retbuf_reg[1][3] ),
        .I5(\retbuf_reg[1][7]_1 ),
        .O(\crc_imd_reg[7]_16 [3]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[1][4]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .I4(\retbuf_reg[1][0] ),
        .I5(\retbuf_reg[1][4] ),
        .O(\crc_imd_reg[7]_16 [4]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[1][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [5]),
        .I4(\retbuf_reg[1][0] ),
        .I5(\retbuf_reg[1][5] ),
        .O(\crc_imd_reg[7]_16 [5]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[1][6]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [6]),
        .I4(\retbuf_reg[1][0] ),
        .I5(\retbuf_reg[1][6] ),
        .O(\crc_imd_reg[7]_16 [6]));
  LUT6 #(
    .INIT(64'hE040FFFFE040E040)) 
    \retbuf[1][7]_i_2 
       (.I0(\retbuf_reg[1][0] ),
        .I1(\crc_imd_reg[15]_0 [7]),
        .I2(\retbuf_reg[1][7] ),
        .I3(\crc_imd_reg[15]_0 [15]),
        .I4(\retbuf_reg[1][7]_0 ),
        .I5(\retbuf_reg[1][7]_1 ),
        .O(\crc_imd_reg[7]_16 [7]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[20][0]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[20][0] ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_13 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1977" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[20][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[20][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_13 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1978" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[20][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[20][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_13 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1973" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[20][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[20][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_13 [3]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[20][4]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[20][0] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_13 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[20][5]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[20][0] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_13 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1979" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[20][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[20][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_13 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1980" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[20][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[20][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_13 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1976" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[21][0]_i_1 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[21][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_12 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1977" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[21][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[21][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_12 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1972" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[21][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[21][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_12 [2]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[21][3]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [11]),
        .I3(\retbuf_reg[21][3] ),
        .I4(\crc_imd_reg[15]_0 [3]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_12 [3]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[21][4]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[21][3] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_12 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[21][5]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[21][3] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_12 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1974" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[21][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[21][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_12 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1975" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[21][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[21][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_12 [7]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[22][0]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[22][0] ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_11 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1969" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[22][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[22][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_11 [1]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[22][2]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\retbuf_reg[22][0] ),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_11 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1973" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[22][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[22][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_11 [3]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[22][4]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[22][0] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_11 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[22][5]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[22][0] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_11 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1974" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[22][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[22][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_11 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1975" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[22][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[22][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_11 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1964" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[23][0]_i_1 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[23][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_10 [0]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[23][1]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [9]),
        .I3(\retbuf_reg[23][1] ),
        .I4(\crc_imd_reg[15]_0 [1]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_10 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1972" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[23][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[23][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_10 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1970" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[23][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[23][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_10 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1962" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[23][4]_i_1 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[23][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_10 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[23][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[23][1] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_10 [5]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[23][6]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(\retbuf_reg[23][1] ),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_10 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1971" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[23][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[23][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_10 [7]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[24][0]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[24][0] ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_9 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1969" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[24][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[24][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_9 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1967" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[24][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[24][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_9 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1970" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[24][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[24][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_9 [3]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[24][4]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[24][0] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_9 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[24][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[24][0] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_9 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1968" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[24][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[24][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_9 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1971" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[24][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[24][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_9 [7]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[25][0]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[25][0] ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_8 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1960" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[25][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[25][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_8 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1967" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[25][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[25][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_8 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1965" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[25][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[25][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_8 [3]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[25][4]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[25][0] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_8 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[25][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[25][0] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_8 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1968" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[25][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[25][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_8 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1966" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[25][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[25][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_8 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1964" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[26][0]_i_1 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[26][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_7 [0]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[26][1]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [9]),
        .I3(\retbuf_reg[26][1] ),
        .I4(\crc_imd_reg[15]_0 [1]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_7 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1961" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[26][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[26][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_7 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1965" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[26][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[26][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_7 [3]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[26][4]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[26][1] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_7 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[26][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[26][1] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_7 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1963" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[26][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[26][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_7 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1966" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[26][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[26][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_7 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1956" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[27][0]_i_1 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[27][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_6 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1960" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[27][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[27][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_6 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1961" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[27][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[27][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_6 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1958" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[27][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[27][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_6 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1962" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[27][4]_i_1 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[27][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_6 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[27][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[27][5] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_6 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1963" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[27][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[27][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_6 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1959" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[27][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[27][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_6 [7]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[28][0]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[28][0] ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_5 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1953" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[28][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[28][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_5 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1954" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[28][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[28][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_5 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1958" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[28][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[28][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_5 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1957" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[28][4]_i_1 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[28][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_5 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[28][5]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[28][0] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_5 [5]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[28][6]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(\retbuf_reg[28][0] ),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_5 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1959" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[28][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[28][1] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_5 [7]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[29][0]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[29][0] ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_4 [0]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[29][1]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [9]),
        .I3(\retbuf_reg[29][0] ),
        .I4(\crc_imd_reg[15]_0 [1]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_4 [1]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[29][2]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\retbuf_reg[29][0] ),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_4 [2]));
  LUT5 #(
    .INIT(32'hAAAC0000)) 
    \retbuf[29][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[29][0] ),
        .I3(\retbuf_reg[35][5] ),
        .I4(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_4 [3]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[29][4]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[29][0] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_4 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[29][5]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[29][0] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_4 [5]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[29][6]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(\retbuf_reg[29][0] ),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_4 [6]));
  LUT5 #(
    .INIT(32'hAAAC0000)) 
    \retbuf[29][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[29][0] ),
        .I3(\retbuf_reg[35][5] ),
        .I4(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_4 [7]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[2][0]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .I4(\retbuf_reg[2][0] ),
        .I5(\retbuf_reg[2][0]_0 ),
        .O(\crc_imd_reg[14]_1 [0]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[2][1]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .I4(\retbuf_reg[2][0] ),
        .I5(\retbuf_reg[2][1] ),
        .O(\crc_imd_reg[14]_1 [1]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[2][2]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [2]),
        .I4(\retbuf_reg[2][0] ),
        .I5(\retbuf_reg[2][2] ),
        .O(\crc_imd_reg[14]_1 [2]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[2][3]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [3]),
        .I4(\retbuf_reg[2][0] ),
        .I5(\retbuf_reg[2][3] ),
        .O(\crc_imd_reg[14]_1 [3]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[2][4]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .I4(\retbuf_reg[2][0] ),
        .I5(\retbuf_reg[2][4] ),
        .O(\crc_imd_reg[14]_1 [4]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[2][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [5]),
        .I4(\retbuf_reg[2][0] ),
        .I5(\retbuf_reg[2][5] ),
        .O(\crc_imd_reg[14]_1 [5]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[2][6]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [6]),
        .I4(\retbuf_reg[2][0] ),
        .I5(\retbuf_reg[2][6] ),
        .O(\crc_imd_reg[14]_1 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1956" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[30][0]_i_1 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[30][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_3 [0]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[30][1]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [9]),
        .I3(\retbuf_reg[30][1]_0 ),
        .I4(\crc_imd_reg[15]_0 [1]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_3 [1]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[30][2]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\retbuf_reg[30][1]_0 ),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_3 [2]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[30][3]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [11]),
        .I3(\retbuf_reg[30][1]_0 ),
        .I4(\crc_imd_reg[15]_0 [3]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_3 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1957" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[30][4]_i_1 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[30][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_3 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[30][5]_i_1 
       (.I0(\retbuf_reg[30][1] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[30][1]_0 ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_3 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1952" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[30][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[30][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_3 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1955" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[30][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[30][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_3 [7]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[31][0]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[31][0] ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_2 [0]));
  LUT5 #(
    .INIT(32'hAAAC0000)) 
    \retbuf[31][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[31][0] ),
        .I3(\retbuf_reg[35][5] ),
        .I4(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_2 [1]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[31][2]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\retbuf_reg[31][0] ),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_2 [2]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[31][3]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [11]),
        .I3(\retbuf_reg[31][0] ),
        .I4(\crc_imd_reg[15]_0 [3]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_2 [3]));
  LUT5 #(
    .INIT(32'hAAAC0000)) 
    \retbuf[31][4]_i_1 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[31][0] ),
        .I3(\retbuf_reg[35][5] ),
        .I4(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_2 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[31][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[31][0] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_2 [5]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[31][6]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(\retbuf_reg[31][0] ),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_2 [6]));
  LUT5 #(
    .INIT(32'hAAAC0000)) 
    \retbuf[31][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[31][0] ),
        .I3(\retbuf_reg[35][5] ),
        .I4(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_2 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1950" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[32][0]_i_1 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[32][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_1 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1953" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[32][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[32][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_1 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1954" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[32][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[32][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_1 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1951" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[32][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[32][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_1 [3]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[32][4]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[32][4] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_1 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[32][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[32][4] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_1 [5]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[32][6]_i_1 
       (.I0(\retbuf_reg[32][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(\retbuf_reg[32][4] ),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_1 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1955" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[32][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[32][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_1 [7]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[33][0]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[33][0] ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_7 [0]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[33][1]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [9]),
        .I3(\retbuf_reg[33][0] ),
        .I4(\crc_imd_reg[15]_0 [1]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_7 [1]));
  LUT5 #(
    .INIT(32'hC0C0C088)) 
    \retbuf[33][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [10]),
        .I1(\retbuf_reg[1][7] ),
        .I2(\crc_imd_reg[15]_0 [2]),
        .I3(\retbuf_reg[33][0] ),
        .I4(\retbuf_reg[35][5] ),
        .O(\crc_imd_reg[15]_7 [2]));
  LUT5 #(
    .INIT(32'hC0C0C088)) 
    \retbuf[33][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [11]),
        .I1(\retbuf_reg[1][7] ),
        .I2(\crc_imd_reg[15]_0 [3]),
        .I3(\retbuf_reg[33][0] ),
        .I4(\retbuf_reg[35][5] ),
        .O(\crc_imd_reg[15]_7 [3]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[33][4]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[33][0] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_7 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[33][5]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[33][0] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_7 [5]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[33][6]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(\retbuf_reg[33][0] ),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_7 [6]));
  LUT5 #(
    .INIT(32'hC0C0C088)) 
    \retbuf[33][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\retbuf_reg[1][7] ),
        .I2(\crc_imd_reg[15]_0 [7]),
        .I3(\retbuf_reg[33][0] ),
        .I4(\retbuf_reg[35][5] ),
        .O(\crc_imd_reg[15]_7 [7]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[34][0]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[34][0] ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_6 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1949" *) 
  LUT4 #(
    .INIT(16'h88C0)) 
    \retbuf[34][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(\retbuf_reg[1][7] ),
        .I2(\crc_imd_reg[15]_0 [1]),
        .I3(\retbuf_reg[34][7] ),
        .O(\crc_imd_reg[15]_6 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1948" *) 
  LUT4 #(
    .INIT(16'h88C0)) 
    \retbuf[34][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [10]),
        .I1(\retbuf_reg[1][7] ),
        .I2(\crc_imd_reg[15]_0 [2]),
        .I3(\retbuf_reg[34][7] ),
        .O(\crc_imd_reg[15]_6 [2]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[34][3]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [11]),
        .I3(\retbuf_reg[34][0] ),
        .I4(\crc_imd_reg[15]_0 [3]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_6 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1947" *) 
  LUT4 #(
    .INIT(16'h88C0)) 
    \retbuf[34][4]_i_1 
       (.I0(\crc_imd_reg[15]_0 [12]),
        .I1(\retbuf_reg[1][7] ),
        .I2(\crc_imd_reg[15]_0 [4]),
        .I3(\retbuf_reg[34][7] ),
        .O(\crc_imd_reg[15]_6 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[34][5]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[34][0] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_6 [5]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[34][6]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(\retbuf_reg[34][0] ),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[15]_6 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1946" *) 
  LUT4 #(
    .INIT(16'h88C0)) 
    \retbuf[34][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\retbuf_reg[1][7] ),
        .I2(\crc_imd_reg[15]_0 [7]),
        .I3(\retbuf_reg[34][7] ),
        .O(\crc_imd_reg[15]_6 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1950" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[35][0]_i_1 
       (.I0(\crc_imd_reg[15]_0 [0]),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[35][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_0 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1949" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[35][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [1]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[35][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1948" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[35][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [2]),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[35][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1951" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[35][3]_i_1 
       (.I0(\crc_imd_reg[15]_0 [3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[35][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_0 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1947" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[35][4]_i_1 
       (.I0(\crc_imd_reg[15]_0 [4]),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[35][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_0 [4]));
  LUT6 #(
    .INIT(64'hAAA80020AAAAAAAA)) 
    \retbuf[35][5]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\retbuf_reg[35][5] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[35][5]_0 ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6] ),
        .O(\crc_imd_reg[7]_0 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1952" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[35][6]_i_1 
       (.I0(\crc_imd_reg[15]_0 [6]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[35][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1946" *) 
  LUT4 #(
    .INIT(16'hCA00)) 
    \retbuf[35][7]_i_2 
       (.I0(\crc_imd_reg[15]_0 [7]),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[35][0] ),
        .I3(\retbuf_reg[1][7] ),
        .O(\crc_imd_reg[7]_0 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1938" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][0]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[15]_5 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1939" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][1]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[15]_5 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1940" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][2]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[15]_5 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1941" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][3]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [3]),
        .O(\crc_imd_reg[15]_5 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1942" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][4]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .O(\crc_imd_reg[15]_5 [4]));
  (* SOFT_HLUTNM = "soft_lutpair1943" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][5]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [5]),
        .O(\crc_imd_reg[15]_5 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1944" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][6]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [6]),
        .O(\crc_imd_reg[15]_5 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1945" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[36][7]_i_2 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[36][0] ),
        .I3(\crc_imd_reg[15]_0 [7]),
        .O(\crc_imd_reg[15]_5 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1938" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][0]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[15]_4 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1939" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][1]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[15]_4 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1940" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][2]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[15]_4 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1941" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][3]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [3]),
        .O(\crc_imd_reg[15]_4 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1942" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][4]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .O(\crc_imd_reg[15]_4 [4]));
  (* SOFT_HLUTNM = "soft_lutpair1943" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][5]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [5]),
        .O(\crc_imd_reg[15]_4 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1944" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][6]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [6]),
        .O(\crc_imd_reg[15]_4 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1945" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[37][7]_i_2 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[37][0] ),
        .I3(\crc_imd_reg[15]_0 [7]),
        .O(\crc_imd_reg[15]_4 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1930" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[38][0]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[38][0] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[15]_3 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1931" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[38][1]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[38][0] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[15]_3 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1932" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[38][2]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[38][0] ),
        .I3(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[15]_3 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1933" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[38][3]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[38][0] ),
        .I3(\crc_imd_reg[15]_0 [3]),
        .O(\crc_imd_reg[15]_3 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1934" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[38][4]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[38][0] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .O(\crc_imd_reg[15]_3 [4]));
  (* SOFT_HLUTNM = "soft_lutpair1935" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[38][5]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[38][0] ),
        .I3(\crc_imd_reg[15]_0 [5]),
        .O(\crc_imd_reg[15]_3 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1936" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[38][6]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[38][0] ),
        .I3(\crc_imd_reg[15]_0 [6]),
        .O(\crc_imd_reg[15]_3 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1937" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[38][7]_i_2 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[38][0] ),
        .I3(\crc_imd_reg[15]_0 [7]),
        .O(\crc_imd_reg[15]_3 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1930" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[39][0]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[39][0] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[15]_2 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1931" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[39][1]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[39][0] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[15]_2 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1932" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[39][2]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[39][0] ),
        .I3(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[15]_2 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1933" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[39][3]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\retbuf_reg[39][0] ),
        .I3(\crc_imd_reg[15]_0 [3]),
        .O(\crc_imd_reg[15]_2 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1934" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[39][4]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[39][0] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .O(\crc_imd_reg[15]_2 [4]));
  (* SOFT_HLUTNM = "soft_lutpair1935" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[39][5]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[39][0] ),
        .I3(\crc_imd_reg[15]_0 [5]),
        .O(\crc_imd_reg[15]_2 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1936" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[39][6]_i_1 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\retbuf_reg[39][0] ),
        .I3(\crc_imd_reg[15]_0 [6]),
        .O(\crc_imd_reg[15]_2 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1937" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[39][7]_i_2 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\crc_imd_reg[15]_0 [15]),
        .I2(\retbuf_reg[39][0] ),
        .I3(\crc_imd_reg[15]_0 [7]),
        .O(\crc_imd_reg[15]_2 [7]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[3][0]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .I4(\retbuf_reg[3][0] ),
        .I5(\retbuf_reg[3][0]_0 ),
        .O(\crc_imd_reg[13]_0 [0]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[3][1]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .I4(\retbuf_reg[3][0] ),
        .I5(\retbuf_reg[3][1] ),
        .O(\crc_imd_reg[13]_0 [1]));
  LUT6 #(
    .INIT(64'h00FF000100FFFEFF)) 
    \retbuf[3][2]_i_3 
       (.I0(\retbuf_reg[0][0] [0]),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\crc_imd_reg[15]_0 [2]),
        .I4(\retbuf_reg[3][7] ),
        .I5(\crc_imd_reg[15]_0 [10]),
        .O(\resid_reg[0]_3 ));
  LUT6 #(
    .INIT(64'h00FF000100FFFEFF)) 
    \retbuf[3][3]_i_3 
       (.I0(\retbuf_reg[0][0] [0]),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\crc_imd_reg[15]_0 [3]),
        .I4(\retbuf_reg[3][7] ),
        .I5(\crc_imd_reg[15]_0 [11]),
        .O(\resid_reg[0]_2 ));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[3][4]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [12]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .I4(\retbuf_reg[3][0] ),
        .I5(\retbuf_reg[3][4] ),
        .O(\crc_imd_reg[13]_0 [2]));
  LUT6 #(
    .INIT(64'h8A8AAA0A8080A000)) 
    \retbuf[3][5]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [5]),
        .I4(\retbuf_reg[3][0] ),
        .I5(\retbuf_reg[3][5]_0 ),
        .O(\crc_imd_reg[13]_0 [3]));
  LUT6 #(
    .INIT(64'h00FF000100FFFEFF)) 
    \retbuf[3][6]_i_3 
       (.I0(\retbuf_reg[0][0] [0]),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\crc_imd_reg[15]_0 [6]),
        .I4(\retbuf_reg[3][7] ),
        .I5(\crc_imd_reg[15]_0 [14]),
        .O(\resid_reg[0]_1 ));
  LUT6 #(
    .INIT(64'h00FF000100FFFEFF)) 
    \retbuf[3][7]_i_7 
       (.I0(\retbuf_reg[0][0] [0]),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\crc_imd_reg[15]_0 [7]),
        .I4(\retbuf_reg[3][7] ),
        .I5(\crc_imd_reg[15]_0 [15]),
        .O(\resid_reg[0]_0 ));
  LUT5 #(
    .INIT(32'hFFFFB800)) 
    \retbuf[4][1]_i_1 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(\retbuf_reg[4][6]_1 ),
        .I2(\crc_imd_reg[15]_0 [1]),
        .I3(\retbuf_reg[1][7] ),
        .I4(\retbuf_reg[4][1] ),
        .O(\crc_imd_reg[14]_0 [0]));
  LUT5 #(
    .INIT(32'hFFFFB800)) 
    \retbuf[4][2]_i_1 
       (.I0(\crc_imd_reg[15]_0 [10]),
        .I1(\retbuf_reg[4][6]_1 ),
        .I2(\crc_imd_reg[15]_0 [2]),
        .I3(\retbuf_reg[1][7] ),
        .I4(\retbuf_reg[4][2] ),
        .O(\crc_imd_reg[14]_0 [1]));
  LUT6 #(
    .INIT(64'h8088808888880088)) 
    \retbuf[4][4]_i_1 
       (.I0(\retbuf_reg[4][4] ),
        .I1(\retbuf_reg[6][0] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[4][6] ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[4][6]_1 ),
        .O(\crc_imd_reg[14]_0 [2]));
  LUT6 #(
    .INIT(64'h8088808888880088)) 
    \retbuf[4][5]_i_1 
       (.I0(\retbuf_reg[4][5] ),
        .I1(\retbuf_reg[6][0] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[4][6] ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[4][6]_1 ),
        .O(\crc_imd_reg[14]_0 [3]));
  LUT6 #(
    .INIT(64'h8088808888880088)) 
    \retbuf[4][6]_i_1 
       (.I0(\retbuf_reg[4][6]_0 ),
        .I1(\retbuf_reg[6][0] ),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(\retbuf_reg[4][6] ),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\retbuf_reg[4][6]_1 ),
        .O(\crc_imd_reg[14]_0 [4]));
  (* SOFT_HLUTNM = "soft_lutpair1990" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \retbuf[4][7]_i_8 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\retbuf_reg[4][6]_1 ),
        .I2(\crc_imd_reg[15]_0 [7]),
        .O(\crc_imd_reg[15]_10 ));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[5][0]_i_1__0 
       (.I0(\retbuf_reg[5][0] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[6][0] ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[5][1]_i_1__0 
       (.I0(\retbuf_reg[5][1] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [9]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [1]),
        .I5(\retbuf_reg[6][0] ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[5][2]_i_1__0 
       (.I0(\retbuf_reg[5][2] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\retbuf_reg[6][0] ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[5][3]_i_1__0 
       (.I0(\retbuf_reg[5][3] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [11]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [3]),
        .I5(\retbuf_reg[6][0] ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[5][4]_i_1__0 
       (.I0(\retbuf_reg[5][4] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[6][0] ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[5][5]_i_1__0 
       (.I0(\retbuf_reg[5][5] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [13]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\retbuf_reg[6][0] ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[5][6]_i_1__0 
       (.I0(\retbuf_reg[5][6] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\retbuf_reg[6][0] ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[5][7]_i_2__0 
       (.I0(\retbuf_reg[5][7] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [15]),
        .I3(\retbuf_reg[5][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [7]),
        .I5(\retbuf_reg[6][0] ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[6][0]_i_1__0 
       (.I0(\retbuf_reg[6][0]_0 ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [8]),
        .I3(\retbuf_reg[6][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\retbuf_reg[6][0] ),
        .O(\crc_imd_reg[15]_1 [0]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[6][1]_i_1__0 
       (.I0(\retbuf_reg[6][1] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [9]),
        .I3(\retbuf_reg[6][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [1]),
        .I5(\retbuf_reg[6][0] ),
        .O(\crc_imd_reg[15]_1 [1]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[6][2]_i_1__0 
       (.I0(\retbuf_reg[6][2] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\retbuf_reg[6][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\retbuf_reg[6][0] ),
        .O(\crc_imd_reg[15]_1 [2]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[6][3]_i_1__0 
       (.I0(\retbuf_reg[6][3] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [11]),
        .I3(\retbuf_reg[6][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [3]),
        .I5(\retbuf_reg[6][0] ),
        .O(\crc_imd_reg[15]_1 [3]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[6][4]_i_1__0 
       (.I0(\retbuf_reg[6][4] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\retbuf_reg[6][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\retbuf_reg[6][0] ),
        .O(\crc_imd_reg[15]_1 [4]));
  LUT6 #(
    .INIT(64'h00FF000100FFFEFF)) 
    \retbuf[6][5]_i_4 
       (.I0(\retbuf_reg[0][0] [0]),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\crc_imd_reg[15]_0 [5]),
        .I4(\retbuf_reg[6][5] ),
        .I5(\crc_imd_reg[15]_0 [13]),
        .O(\resid_reg[0]_4 ));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[6][6]_i_1__0 
       (.I0(\retbuf_reg[6][6] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [14]),
        .I3(\retbuf_reg[6][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\retbuf_reg[6][0] ),
        .O(\crc_imd_reg[15]_1 [5]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \retbuf[6][7]_i_2 
       (.I0(\retbuf_reg[6][7] ),
        .I1(\retbuf_reg[4][6] ),
        .I2(\crc_imd_reg[15]_0 [15]),
        .I3(\retbuf_reg[6][7]_0 ),
        .I4(\crc_imd_reg[15]_0 [7]),
        .I5(\retbuf_reg[6][0] ),
        .O(\crc_imd_reg[15]_1 [6]));
  (* SOFT_HLUTNM = "soft_lutpair1991" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[7][0]_i_1 
       (.I0(\retbuf_reg[1][7] ),
        .I1(\crc_imd_reg[15]_0 [8]),
        .I2(\retbuf_reg[7][3]_0 ),
        .I3(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[11]_0 [0]));
  (* SOFT_HLUTNM = "soft_lutpair1992" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[7][1]_i_1 
       (.I0(\retbuf_reg[1][7] ),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\retbuf_reg[7][3]_0 ),
        .I3(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[11]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1993" *) 
  LUT4 #(
    .INIT(16'hA808)) 
    \retbuf[7][2]_i_1 
       (.I0(\retbuf_reg[1][7] ),
        .I1(\crc_imd_reg[15]_0 [10]),
        .I2(\retbuf_reg[7][3]_0 ),
        .I3(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[11]_0 [2]));
  LUT6 #(
    .INIT(64'hA2A2A2020202A202)) 
    \retbuf[7][3]_i_1 
       (.I0(\retbuf_reg[3][5] ),
        .I1(\retbuf_reg[7][3] ),
        .I2(\retbuf_reg[4][6] ),
        .I3(\crc_imd_reg[15]_0 [11]),
        .I4(\retbuf_reg[7][3]_0 ),
        .I5(\crc_imd_reg[15]_0 [3]),
        .O(\crc_imd_reg[11]_0 [3]));
  LUT6 #(
    .INIT(64'h00FF000100FFFEFF)) 
    \retbuf[7][5]_i_2 
       (.I0(\retbuf_reg[0][0] [0]),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\crc_imd_reg[15]_0 [5]),
        .I4(\retbuf_reg[7][5] ),
        .I5(\crc_imd_reg[15]_0 [13]),
        .O(\resid_reg[0]_5 ));
  LUT6 #(
    .INIT(64'h0044440400004444)) 
    \stateOp[0]_i_5 
       (.I0(\stateOp_reg[0]_0 ),
        .I1(\txAXIS_tdata_reg[7]_0 ),
        .I2(\tixVBuffer[7]_i_5_n_0 ),
        .I3(Q[1]),
        .I4(Q[0]),
        .I5(Q[2]),
        .O(\stateOp_reg[1]_1 ));
  LUT5 #(
    .INIT(32'hFFFF4700)) 
    \stateOp[0]_i_6 
       (.I0(\stateOp_reg[5]_1 [0]),
        .I1(Q[1]),
        .I2(\tixVBuffer[7]_i_5_n_0 ),
        .I3(Q[2]),
        .I4(Q[0]),
        .O(\stateOp[0]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAAA2AAAAAAA2AAA2)) 
    \stateOp[2]_i_3__1 
       (.I0(\stateOp[5]_i_10_n_0 ),
        .I1(Q[1]),
        .I2(Q[2]),
        .I3(Q[0]),
        .I4(CO),
        .I5(\stateOp_reg[2]_0 ),
        .O(\stateOp_reg[1]_0 ));
  LUT5 #(
    .INIT(32'hF0530FFF)) 
    \stateOp[2]_i_7__1 
       (.I0(\stateOp_reg[5]_1 [0]),
        .I1(\tixVBuffer[7]_i_5_n_0 ),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(Q[2]),
        .O(\stateOp[2]_i_7__1_n_0 ));
  LUT6 #(
    .INIT(64'h0800080008880088)) 
    \stateOp[5]_i_10 
       (.I0(Q[5]),
        .I1(\txAXIS_tdata_reg[7]_0 ),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(\tixVBuffer[7]_i_5_n_0 ),
        .I5(Q[0]),
        .O(\stateOp[5]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h7F007F7F7F7F7F7F)) 
    \stateOp[5]_i_11 
       (.I0(\stateOp_reg[5]_1 [1]),
        .I1(\stateOp_reg[5]_2 ),
        .I2(\stateOp_reg[5]_3 ),
        .I3(\stateOp_reg[5]_4 ),
        .I4(\stateOp_reg[5]_5 ),
        .I5(\tixVBuffer[7]_i_5_n_0 ),
        .O(\stateOp[5]_i_11_n_0 ));
  LUT4 #(
    .INIT(16'h888A)) 
    \stateOp[5]_i_2 
       (.I0(\retbuf_reg[0][6] ),
        .I1(\stateOp[5]_i_10_n_0 ),
        .I2(Q[5]),
        .I3(\stateOp[5]_i_11_n_0 ),
        .O(\stateOp_reg[5] ));
  FDCE stateOp_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(stateOp_reg_1),
        .Q(stateOp_reg_0));
  MUXF7 \stateOp_reg[0]_i_3 
       (.I0(\stateOp[0]_i_6_n_0 ),
        .I1(\stateOp_reg[0]_1 ),
        .O(\stateOp_reg[3]_1 ),
        .S(Q[3]));
  MUXF7 \stateOp_reg[2]_i_4 
       (.I0(\stateOp[2]_i_7__1_n_0 ),
        .I1(\stateOp_reg[2]_1 ),
        .O(\stateOp_reg[3]_0 ),
        .S(Q[3]));
  LUT6 #(
    .INIT(64'h00080000FFFFFFFF)) 
    \tixVBuffer[7]_i_1__0 
       (.I0(\len_reg[0] ),
        .I1(\len_reg[0]_0 ),
        .I2(Q[4]),
        .I3(Q[5]),
        .I4(\tixVBuffer[7]_i_5_n_0 ),
        .I5(\retbuf_reg[6][0] ),
        .O(\stateOp_reg[4] ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \tixVBuffer[7]_i_5 
       (.I0(\tixVBuffer[7]_i_6_n_0 ),
        .I1(\crc_imd_reg[15]_0 [0]),
        .I2(\crc_imd_reg[15]_0 [1]),
        .I3(\crc_imd_reg[15]_0 [3]),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\tixVBuffer[7]_i_7_n_0 ),
        .O(\tixVBuffer[7]_i_5_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \tixVBuffer[7]_i_6 
       (.I0(\crc_imd_reg[15]_0 [5]),
        .I1(\crc_imd_reg[15]_0 [4]),
        .I2(\crc_imd_reg[15]_0 [6]),
        .I3(\crc_imd_reg[15]_0 [7]),
        .O(\tixVBuffer[7]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \tixVBuffer[7]_i_7 
       (.I0(\crc_imd_reg[15]_0 [8]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\crc_imd_reg[15]_0 [10]),
        .I3(\crc_imd_reg[15]_0 [11]),
        .I4(\tixVBuffer[7]_i_8_n_0 ),
        .O(\tixVBuffer[7]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \tixVBuffer[7]_i_8 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\crc_imd_reg[15]_0 [14]),
        .I2(\crc_imd_reg[15]_0 [12]),
        .I3(\crc_imd_reg[15]_0 [13]),
        .O(\tixVBuffer[7]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h8AAA)) 
    \tixVController[7]_i_1 
       (.I0(\stateOp_reg[4] ),
        .I1(\tixVCommand_reg[0] ),
        .I2(\tixVCommand_reg[0]_0 ),
        .I3(\retbuf_reg[6][0] ),
        .O(\opbuf_reg[2][0] ));
  LUT6 #(
    .INIT(64'hFFFFFFFF77F30000)) 
    \txAXIS_tdata[0]_i_2 
       (.I0(\txAXIS_tdata_reg[0]_0 ),
        .I1(Q[4]),
        .I2(\txAXIS_tdata_reg[3] [0]),
        .I3(\txAXIS_tdata_reg[0] ),
        .I4(\txAXIS_tdata_reg[0]_1 ),
        .I5(\txAXIS_tdata[0]_i_4_n_0 ),
        .O(\stateOp_reg[4]_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF4540)) 
    \txAXIS_tdata[0]_i_4 
       (.I0(\txAXIS_tdata[0]_i_2_0 ),
        .I1(\txAXIS_tdata[0]_i_2_1 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata[0]_i_2_2 ),
        .I4(\txAXIS_tdata[0]_i_8_n_0 ),
        .I5(\txAXIS_tdata[2]_i_3_0 ),
        .O(\txAXIS_tdata[0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF44F444F444F4)) 
    \txAXIS_tdata[0]_i_8 
       (.I0(\crc_imd_reg[8]_1 ),
        .I1(\txAXIS_tdata_reg[4] ),
        .I2(\txAXIS_tdata_reg[7]_6 [0]),
        .I3(\txAXIS_tdata_reg[4]_0 ),
        .I4(\stateOp_reg[5]_5 ),
        .I5(\crc_imd_reg[15]_0 [8]),
        .O(\txAXIS_tdata[0]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAA8A888A88888888)) 
    \txAXIS_tdata[10]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata[10]_i_2_n_0 ),
        .I2(\txAXIS_tdata_reg[10] ),
        .I3(Q[3]),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\txAXIS_tdata_reg[8] ),
        .O(\stateOp_reg[1] [4]));
  LUT5 #(
    .INIT(32'hFFFF4540)) 
    \txAXIS_tdata[10]_i_2 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[10]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[10]_1 ),
        .I4(\txAXIS_tdata[10]_i_6_n_0 ),
        .O(\txAXIS_tdata[10]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h101F1010)) 
    \txAXIS_tdata[10]_i_6 
       (.I0(\txAXIS_tdata[10]_i_8_n_0 ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(\txAXIS_tdata[15]_i_6_0 [2]),
        .O(\txAXIS_tdata[10]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1921" *) 
  LUT5 #(
    .INIT(32'hFFFFC7F7)) 
    \txAXIS_tdata[10]_i_8 
       (.I0(\crc_imd_reg[15]_0 [10]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [2]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[10]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAA8A888A88888888)) 
    \txAXIS_tdata[11]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata[11]_i_2_n_0 ),
        .I2(\txAXIS_tdata_reg[11] ),
        .I3(Q[3]),
        .I4(\crc_imd_reg[15]_0 [3]),
        .I5(\txAXIS_tdata_reg[8] ),
        .O(\stateOp_reg[1] [5]));
  LUT5 #(
    .INIT(32'hFFFF4540)) 
    \txAXIS_tdata[11]_i_2 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[11]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[11]_1 ),
        .I4(\txAXIS_tdata[11]_i_6_n_0 ),
        .O(\txAXIS_tdata[11]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h101F1010)) 
    \txAXIS_tdata[11]_i_6 
       (.I0(\txAXIS_tdata[11]_i_8_n_0 ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(\txAXIS_tdata[15]_i_6_0 [3]),
        .O(\txAXIS_tdata[11]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1920" *) 
  LUT5 #(
    .INIT(32'hFFFFC7F7)) 
    \txAXIS_tdata[11]_i_8 
       (.I0(\crc_imd_reg[15]_0 [11]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [3]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[11]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAA8A888A88888888)) 
    \txAXIS_tdata[12]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata[12]_i_2_n_0 ),
        .I2(\txAXIS_tdata_reg[12] ),
        .I3(Q[3]),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\txAXIS_tdata_reg[8] ),
        .O(\stateOp_reg[1] [6]));
  LUT5 #(
    .INIT(32'hFFFF4540)) 
    \txAXIS_tdata[12]_i_2 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[12]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[12]_1 ),
        .I4(\txAXIS_tdata[12]_i_6_n_0 ),
        .O(\txAXIS_tdata[12]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h101F1010)) 
    \txAXIS_tdata[12]_i_6 
       (.I0(\txAXIS_tdata[12]_i_8_n_0 ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(\txAXIS_tdata[15]_i_6_0 [4]),
        .O(\txAXIS_tdata[12]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1924" *) 
  LUT5 #(
    .INIT(32'hFFFFC7F7)) 
    \txAXIS_tdata[12]_i_8 
       (.I0(\crc_imd_reg[15]_0 [12]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [4]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[12]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAA8A888A88888888)) 
    \txAXIS_tdata[13]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata[13]_i_2_n_0 ),
        .I2(\txAXIS_tdata_reg[13] ),
        .I3(Q[3]),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\txAXIS_tdata_reg[8] ),
        .O(\stateOp_reg[1] [7]));
  LUT5 #(
    .INIT(32'hFFFF4540)) 
    \txAXIS_tdata[13]_i_2 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[13]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[13]_1 ),
        .I4(\txAXIS_tdata[13]_i_6_n_0 ),
        .O(\txAXIS_tdata[13]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h101F1010)) 
    \txAXIS_tdata[13]_i_6 
       (.I0(\txAXIS_tdata[13]_i_8_n_0 ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(\txAXIS_tdata[15]_i_6_0 [5]),
        .O(\txAXIS_tdata[13]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1925" *) 
  LUT5 #(
    .INIT(32'hFFFFC7F7)) 
    \txAXIS_tdata[13]_i_8 
       (.I0(\crc_imd_reg[15]_0 [13]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [5]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[13]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAA8A888A88888888)) 
    \txAXIS_tdata[14]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata[14]_i_2_n_0 ),
        .I2(\txAXIS_tdata_reg[14] ),
        .I3(Q[3]),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\txAXIS_tdata_reg[8] ),
        .O(\stateOp_reg[1] [8]));
  LUT5 #(
    .INIT(32'hFFFF4540)) 
    \txAXIS_tdata[14]_i_2 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[14]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[14]_1 ),
        .I4(\txAXIS_tdata[14]_i_6_n_0 ),
        .O(\txAXIS_tdata[14]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h101F1010)) 
    \txAXIS_tdata[14]_i_6 
       (.I0(\txAXIS_tdata[14]_i_8_n_0 ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(\txAXIS_tdata[15]_i_6_0 [6]),
        .O(\txAXIS_tdata[14]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1926" *) 
  LUT5 #(
    .INIT(32'hFFFFC7F7)) 
    \txAXIS_tdata[14]_i_8 
       (.I0(\crc_imd_reg[15]_0 [14]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [6]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[14]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h101F1010)) 
    \txAXIS_tdata[15]_i_16 
       (.I0(\txAXIS_tdata[15]_i_21_n_0 ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(\txAXIS_tdata[15]_i_6_0 [7]),
        .O(\txAXIS_tdata[15]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'hAA8A888A88888888)) 
    \txAXIS_tdata[15]_i_2 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata[15]_i_6_n_0 ),
        .I2(\txAXIS_tdata_reg[15] ),
        .I3(Q[3]),
        .I4(\crc_imd_reg[15]_0 [7]),
        .I5(\txAXIS_tdata_reg[8] ),
        .O(\stateOp_reg[1] [9]));
  (* SOFT_HLUTNM = "soft_lutpair1919" *) 
  LUT5 #(
    .INIT(32'hFFFFC7F7)) 
    \txAXIS_tdata[15]_i_21 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [7]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[15]_i_21_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF4540)) 
    \txAXIS_tdata[15]_i_6 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[15]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[15]_1 ),
        .I4(\txAXIS_tdata[15]_i_16_n_0 ),
        .O(\txAXIS_tdata[15]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1922" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[16]_i_3 
       (.I0(\crc_imd_reg[15]_0 [8]),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\crc_imd_reg[15]_0 [0]),
        .O(\crc_imd_reg[8]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair1923" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[17]_i_3 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\crc_imd_reg[15]_0 [1]),
        .O(\crc_imd_reg[9]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1998" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[18]_i_3 
       (.I0(\crc_imd_reg[15]_0 [10]),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\crc_imd_reg[15]_0 [2]),
        .O(\crc_imd_reg[10]_0 ));
  LUT6 #(
    .INIT(64'h2020200000002000)) 
    \txAXIS_tdata[19]_i_3 
       (.I0(\retbuf_reg[0][0] [1]),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\txAXIS_tdata_reg[2] ),
        .I3(\crc_imd_reg[15]_0 [3]),
        .I4(\retbuf_reg[0][0] [0]),
        .I5(\crc_imd_reg[15]_0 [11]),
        .O(\resid_reg[1] ));
  LUT6 #(
    .INIT(64'hAAAAA200AAAAAAAA)) 
    \txAXIS_tdata[1]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata[1]_i_2__0_n_0 ),
        .I2(\txAXIS_tdata[1]_i_3_n_0 ),
        .I3(\txAXIS_tdata_reg[1]_1 ),
        .I4(\txAXIS_tdata_reg[1]_2 ),
        .I5(\txAXIS_tdata_reg[1]_3 ),
        .O(\stateOp_reg[1] [0]));
  LUT6 #(
    .INIT(64'h22277727FFFFFFFF)) 
    \txAXIS_tdata[1]_i_2__0 
       (.I0(Q[3]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\txAXIS_tdata_reg[3] [1]),
        .I3(\txAXIS_tdata_reg[0] ),
        .I4(\txAXIS_tdata_reg[1] ),
        .I5(\txAXIS_tdata_reg[8] ),
        .O(\txAXIS_tdata[1]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h00FF040000000400)) 
    \txAXIS_tdata[1]_i_3 
       (.I0(\txAXIS_tdata_reg[1]_4 ),
        .I1(Q[1]),
        .I2(\crc_imd_reg[9]_0 ),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(\txAXIS_tdata_reg[7]_6 [1]),
        .O(\txAXIS_tdata[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h2020200000002000)) 
    \txAXIS_tdata[20]_i_3 
       (.I0(\retbuf_reg[0][0] [1]),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\txAXIS_tdata_reg[2] ),
        .I3(\crc_imd_reg[15]_0 [4]),
        .I4(\retbuf_reg[0][0] [0]),
        .I5(\crc_imd_reg[15]_0 [12]),
        .O(\resid_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1925" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[21]_i_3 
       (.I0(\crc_imd_reg[15]_0 [13]),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\crc_imd_reg[15]_0 [5]),
        .O(\crc_imd_reg[13]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair1926" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[22]_i_3 
       (.I0(\crc_imd_reg[15]_0 [14]),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\crc_imd_reg[15]_0 [6]),
        .O(\crc_imd_reg[14]_2 ));
  LUT6 #(
    .INIT(64'h2020200000002000)) 
    \txAXIS_tdata[23]_i_6 
       (.I0(\retbuf_reg[0][0] [1]),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\txAXIS_tdata_reg[2] ),
        .I3(\crc_imd_reg[15]_0 [7]),
        .I4(\retbuf_reg[0][0] [0]),
        .I5(\crc_imd_reg[15]_0 [15]),
        .O(\resid_reg[1]_1 ));
  LUT6 #(
    .INIT(64'h2008000820000000)) 
    \txAXIS_tdata[24]_i_3 
       (.I0(\txAXIS_tdata_reg[2] ),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\crc_imd_reg[15]_0 [8]),
        .O(\resid_reg[2] ));
  LUT6 #(
    .INIT(64'h2008000820000000)) 
    \txAXIS_tdata[25]_i_3 
       (.I0(\txAXIS_tdata_reg[2] ),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\crc_imd_reg[15]_0 [1]),
        .I5(\crc_imd_reg[15]_0 [9]),
        .O(\resid_reg[2]_0 ));
  LUT6 #(
    .INIT(64'h2008000820000000)) 
    \txAXIS_tdata[26]_i_3 
       (.I0(\txAXIS_tdata_reg[2] ),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\crc_imd_reg[15]_0 [10]),
        .O(\resid_reg[2]_1 ));
  LUT6 #(
    .INIT(64'h2008000820000000)) 
    \txAXIS_tdata[27]_i_3 
       (.I0(\txAXIS_tdata_reg[2] ),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\crc_imd_reg[15]_0 [3]),
        .I5(\crc_imd_reg[15]_0 [11]),
        .O(\resid_reg[2]_2 ));
  LUT6 #(
    .INIT(64'h2008000820000000)) 
    \txAXIS_tdata[28]_i_3 
       (.I0(\txAXIS_tdata_reg[2] ),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\crc_imd_reg[15]_0 [4]),
        .I5(\crc_imd_reg[15]_0 [12]),
        .O(\resid_reg[2]_3 ));
  LUT6 #(
    .INIT(64'h2008000820000000)) 
    \txAXIS_tdata[29]_i_4 
       (.I0(\txAXIS_tdata_reg[2] ),
        .I1(\retbuf_reg[0][0] [2]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\crc_imd_reg[15]_0 [5]),
        .I5(\crc_imd_reg[15]_0 [13]),
        .O(\resid_reg[2]_4 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF0000B800)) 
    \txAXIS_tdata[2]_i_3 
       (.I0(\crc_imd_reg[15]_0 [10]),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\crc_imd_reg[15]_0 [2]),
        .I3(\txAXIS_tdata_reg[2] ),
        .I4(\txAXIS_tdata_reg[1]_4 ),
        .I5(\txAXIS_tdata[2]_i_7_n_0 ),
        .O(\crc_imd_reg[10]_1 ));
  LUT6 #(
    .INIT(64'hEAAAEAAAFBBBEAAA)) 
    \txAXIS_tdata[2]_i_7 
       (.I0(\txAXIS_tdata[2]_i_3_0 ),
        .I1(Q[4]),
        .I2(Q[3]),
        .I3(\crc_imd_reg[15]_0 [10]),
        .I4(\txAXIS_tdata_reg[7]_6 [2]),
        .I5(Q[0]),
        .O(\txAXIS_tdata[2]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1918" *) 
  LUT5 #(
    .INIT(32'hFFF53FFF)) 
    \txAXIS_tdata[30]_i_3 
       (.I0(\crc_imd_reg[15]_0 [14]),
        .I1(\crc_imd_reg[15]_0 [6]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\retbuf_reg[0][0] [1]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\crc_imd_reg[14]_3 ));
  (* SOFT_HLUTNM = "soft_lutpair1913" *) 
  LUT5 #(
    .INIT(32'hFFF53FFF)) 
    \txAXIS_tdata[31]_i_5 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\crc_imd_reg[15]_0 [7]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\retbuf_reg[0][0] [1]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\crc_imd_reg[15]_12 ));
  LUT6 #(
    .INIT(64'h0000AA2A222AAA2A)) 
    \txAXIS_tdata[32]_i_3 
       (.I0(\txAXIS_tdata_reg[32] ),
        .I1(\txAXIS_tdata_reg[39]_0 ),
        .I2(\crc_imd_reg[15]_0 [0]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\crc_imd_reg[15]_0 [8]),
        .I5(Q[3]),
        .O(\crc_imd_reg[0]_0 ));
  LUT6 #(
    .INIT(64'h0000000033077777)) 
    \txAXIS_tdata[33]_i_3 
       (.I0(Q[3]),
        .I1(\crc_imd_reg[15]_0 [9]),
        .I2(\crc_imd_reg[15]_0 [1]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\txAXIS_tdata_reg[39]_0 ),
        .I5(\txAXIS_tdata_reg[33] ),
        .O(\stateOp_reg[3]_3 ));
  LUT6 #(
    .INIT(64'h0000AA2A222AAA2A)) 
    \txAXIS_tdata[34]_i_3 
       (.I0(\txAXIS_tdata_reg[34] ),
        .I1(\txAXIS_tdata_reg[39]_0 ),
        .I2(\crc_imd_reg[15]_0 [2]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\crc_imd_reg[15]_0 [10]),
        .I5(Q[3]),
        .O(\crc_imd_reg[2]_0 ));
  LUT6 #(
    .INIT(64'h0000AA2A222AAA2A)) 
    \txAXIS_tdata[35]_i_3 
       (.I0(\txAXIS_tdata_reg[35] ),
        .I1(\txAXIS_tdata_reg[39]_0 ),
        .I2(\crc_imd_reg[15]_0 [3]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\crc_imd_reg[15]_0 [11]),
        .I5(Q[3]),
        .O(\crc_imd_reg[3]_0 ));
  LUT6 #(
    .INIT(64'h0000AA2A222AAA2A)) 
    \txAXIS_tdata[36]_i_3 
       (.I0(\txAXIS_tdata_reg[36] ),
        .I1(\txAXIS_tdata_reg[39]_0 ),
        .I2(\crc_imd_reg[15]_0 [4]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\crc_imd_reg[15]_0 [12]),
        .I5(Q[3]),
        .O(\crc_imd_reg[4]_0 ));
  LUT6 #(
    .INIT(64'h0000000033077777)) 
    \txAXIS_tdata[37]_i_3 
       (.I0(Q[3]),
        .I1(\crc_imd_reg[15]_0 [13]),
        .I2(\crc_imd_reg[15]_0 [5]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\txAXIS_tdata_reg[39]_0 ),
        .I5(\txAXIS_tdata_reg[37] ),
        .O(\stateOp_reg[3]_2 ));
  LUT6 #(
    .INIT(64'h0000000000F757F7)) 
    \txAXIS_tdata[38]_i_3 
       (.I0(\txAXIS_tdata_reg[39]_0 ),
        .I1(\crc_imd_reg[15]_0 [6]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [14]),
        .I4(Q[3]),
        .I5(\txAXIS_tdata_reg[38] ),
        .O(\crc_imd_reg[6]_0 ));
  LUT6 #(
    .INIT(64'h0000AA2A222AAA2A)) 
    \txAXIS_tdata[39]_i_6 
       (.I0(\txAXIS_tdata_reg[39] ),
        .I1(\txAXIS_tdata_reg[39]_0 ),
        .I2(\crc_imd_reg[15]_0 [7]),
        .I3(\retbuf_reg[0][0] [0]),
        .I4(\crc_imd_reg[15]_0 [15]),
        .I5(Q[3]),
        .O(\crc_imd_reg[7]_18 ));
  LUT6 #(
    .INIT(64'hAAAAA200AAAAAAAA)) 
    \txAXIS_tdata[3]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata[3]_i_2__0_n_0 ),
        .I2(\txAXIS_tdata[3]_i_3_n_0 ),
        .I3(\txAXIS_tdata_reg[1]_1 ),
        .I4(\txAXIS_tdata_reg[3]_1 ),
        .I5(\txAXIS_tdata_reg[1]_3 ),
        .O(\stateOp_reg[1] [1]));
  LUT6 #(
    .INIT(64'h22277727FFFFFFFF)) 
    \txAXIS_tdata[3]_i_2__0 
       (.I0(Q[3]),
        .I1(\crc_imd_reg[15]_0 [11]),
        .I2(\txAXIS_tdata_reg[3] [2]),
        .I3(\txAXIS_tdata_reg[0] ),
        .I4(\txAXIS_tdata_reg[3]_0 ),
        .I5(\txAXIS_tdata_reg[8] ),
        .O(\txAXIS_tdata[3]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h00FF040000000400)) 
    \txAXIS_tdata[3]_i_3 
       (.I0(\txAXIS_tdata_reg[1]_4 ),
        .I1(Q[1]),
        .I2(\txAXIS_tdata[51]_i_7_n_0 ),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(\txAXIS_tdata_reg[7]_6 [3]),
        .O(\txAXIS_tdata[3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hA2A202A2020202A2)) 
    \txAXIS_tdata[40]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata_reg[40] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata[40]_i_3_n_0 ),
        .I4(Q[3]),
        .I5(\crc_imd_reg[15]_0 [0]),
        .O(\stateOp_reg[1] [10]));
  LUT6 #(
    .INIT(64'hABFBFFFFABFB0000)) 
    \txAXIS_tdata[40]_i_3 
       (.I0(\txAXIS_tdata_reg[47]_0 ),
        .I1(\txAXIS_tdata_reg[40]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[40]_1 ),
        .I4(Q[2]),
        .I5(\txAXIS_tdata[40]_i_7_n_0 ),
        .O(\txAXIS_tdata[40]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1917" *) 
  LUT5 #(
    .INIT(32'hC7F7FFFF)) 
    \txAXIS_tdata[40]_i_7 
       (.I0(\crc_imd_reg[15]_0 [8]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [0]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[40]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hA2A202A2020202A2)) 
    \txAXIS_tdata[41]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata_reg[41] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata[41]_i_3_n_0 ),
        .I4(Q[3]),
        .I5(\crc_imd_reg[15]_0 [1]),
        .O(\stateOp_reg[1] [11]));
  LUT6 #(
    .INIT(64'hABFBFFFFABFB0000)) 
    \txAXIS_tdata[41]_i_3 
       (.I0(\txAXIS_tdata_reg[47]_0 ),
        .I1(\txAXIS_tdata_reg[41]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[41]_1 ),
        .I4(Q[2]),
        .I5(\txAXIS_tdata[41]_i_7_n_0 ),
        .O(\txAXIS_tdata[41]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1916" *) 
  LUT5 #(
    .INIT(32'hC7F7FFFF)) 
    \txAXIS_tdata[41]_i_7 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [1]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[41]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hA2A202A2020202A2)) 
    \txAXIS_tdata[42]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata_reg[42] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata[42]_i_3_n_0 ),
        .I4(Q[3]),
        .I5(\crc_imd_reg[15]_0 [2]),
        .O(\stateOp_reg[1] [12]));
  LUT6 #(
    .INIT(64'hABFBFFFFABFB0000)) 
    \txAXIS_tdata[42]_i_3 
       (.I0(\txAXIS_tdata_reg[47]_0 ),
        .I1(\txAXIS_tdata_reg[42]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[42]_1 ),
        .I4(Q[2]),
        .I5(\txAXIS_tdata[42]_i_7_n_0 ),
        .O(\txAXIS_tdata[42]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1921" *) 
  LUT5 #(
    .INIT(32'hC7F7FFFF)) 
    \txAXIS_tdata[42]_i_7 
       (.I0(\crc_imd_reg[15]_0 [10]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [2]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[42]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hA2A202A2020202A2)) 
    \txAXIS_tdata[43]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata_reg[43] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata[43]_i_3_n_0 ),
        .I4(Q[3]),
        .I5(\crc_imd_reg[15]_0 [3]),
        .O(\stateOp_reg[1] [13]));
  LUT6 #(
    .INIT(64'hABFBFFFFABFB0000)) 
    \txAXIS_tdata[43]_i_3 
       (.I0(\txAXIS_tdata_reg[47]_0 ),
        .I1(\txAXIS_tdata_reg[43]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[43]_1 ),
        .I4(Q[2]),
        .I5(\txAXIS_tdata[43]_i_7_n_0 ),
        .O(\txAXIS_tdata[43]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1920" *) 
  LUT5 #(
    .INIT(32'hC7F7FFFF)) 
    \txAXIS_tdata[43]_i_7 
       (.I0(\crc_imd_reg[15]_0 [11]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [3]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[43]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hA2A202A2020202A2)) 
    \txAXIS_tdata[44]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata_reg[44] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata[44]_i_3_n_0 ),
        .I4(Q[3]),
        .I5(\crc_imd_reg[15]_0 [4]),
        .O(\stateOp_reg[1] [14]));
  LUT6 #(
    .INIT(64'hABFBFFFFABFB0000)) 
    \txAXIS_tdata[44]_i_3 
       (.I0(\txAXIS_tdata_reg[47]_0 ),
        .I1(\txAXIS_tdata_reg[44]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[44]_1 ),
        .I4(Q[2]),
        .I5(\txAXIS_tdata[44]_i_7_n_0 ),
        .O(\txAXIS_tdata[44]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1915" *) 
  LUT5 #(
    .INIT(32'hC7F7FFFF)) 
    \txAXIS_tdata[44]_i_7 
       (.I0(\crc_imd_reg[15]_0 [12]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [4]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[44]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hA2A202A2020202A2)) 
    \txAXIS_tdata[45]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata_reg[45] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata[45]_i_3_n_0 ),
        .I4(Q[3]),
        .I5(\crc_imd_reg[15]_0 [5]),
        .O(\stateOp_reg[1] [15]));
  LUT6 #(
    .INIT(64'hABFBFFFFABFB0000)) 
    \txAXIS_tdata[45]_i_3 
       (.I0(\txAXIS_tdata_reg[47]_0 ),
        .I1(\txAXIS_tdata_reg[45]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[45]_1 ),
        .I4(Q[2]),
        .I5(\txAXIS_tdata[45]_i_7_n_0 ),
        .O(\txAXIS_tdata[45]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1914" *) 
  LUT5 #(
    .INIT(32'hC7F7FFFF)) 
    \txAXIS_tdata[45]_i_7 
       (.I0(\crc_imd_reg[15]_0 [13]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [5]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[45]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hA2A202A2020202A2)) 
    \txAXIS_tdata[46]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata_reg[46] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata[46]_i_3_n_0 ),
        .I4(Q[3]),
        .I5(\crc_imd_reg[15]_0 [6]),
        .O(\stateOp_reg[1] [16]));
  LUT6 #(
    .INIT(64'hABFBFFFFABFB0000)) 
    \txAXIS_tdata[46]_i_3 
       (.I0(\txAXIS_tdata_reg[47]_0 ),
        .I1(\txAXIS_tdata_reg[46]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[46]_1 ),
        .I4(Q[2]),
        .I5(\txAXIS_tdata[46]_i_7_n_0 ),
        .O(\txAXIS_tdata[46]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1918" *) 
  LUT5 #(
    .INIT(32'hC7F7FFFF)) 
    \txAXIS_tdata[46]_i_7 
       (.I0(\crc_imd_reg[15]_0 [14]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [6]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[46]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hA2A202A2020202A2)) 
    \txAXIS_tdata[47]_i_2 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata_reg[47] ),
        .I2(Q[1]),
        .I3(\txAXIS_tdata[47]_i_5_n_0 ),
        .I4(Q[3]),
        .I5(\crc_imd_reg[15]_0 [7]),
        .O(\stateOp_reg[1] [17]));
  LUT6 #(
    .INIT(64'hABFBFFFFABFB0000)) 
    \txAXIS_tdata[47]_i_5 
       (.I0(\txAXIS_tdata_reg[47]_0 ),
        .I1(\txAXIS_tdata_reg[47]_1 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[47]_2 ),
        .I4(Q[2]),
        .I5(\txAXIS_tdata[47]_i_9_n_0 ),
        .O(\txAXIS_tdata[47]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1919" *) 
  LUT5 #(
    .INIT(32'hC7F7FFFF)) 
    \txAXIS_tdata[47]_i_9 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [7]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[47]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hABFB0000ABFBABFB)) 
    \txAXIS_tdata[48]_i_4 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[48] ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[48]_0 ),
        .I4(\crc_imd_reg[8]_1 ),
        .I5(\txAXIS_tdata_reg[55]_1 ),
        .O(\tixVBuffer_reg[7]_9 ));
  LUT6 #(
    .INIT(64'hABFB0000ABFBABFB)) 
    \txAXIS_tdata[49]_i_4 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[49] ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[49]_0 ),
        .I4(\crc_imd_reg[9]_0 ),
        .I5(\txAXIS_tdata_reg[55]_1 ),
        .O(\tixVBuffer_reg[7]_8 ));
  LUT6 #(
    .INIT(64'hFFFF44F444F444F4)) 
    \txAXIS_tdata[4]_i_3 
       (.I0(\txAXIS_tdata[52]_i_7_n_0 ),
        .I1(\txAXIS_tdata_reg[4] ),
        .I2(\txAXIS_tdata_reg[7]_6 [4]),
        .I3(\txAXIS_tdata_reg[4]_0 ),
        .I4(\stateOp_reg[5]_5 ),
        .I5(\crc_imd_reg[15]_0 [12]),
        .O(\pollbuf_reg[0][4] ));
  LUT6 #(
    .INIT(64'hABFB0000ABFBABFB)) 
    \txAXIS_tdata[50]_i_4 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[50] ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[50]_0 ),
        .I4(\crc_imd_reg[10]_0 ),
        .I5(\txAXIS_tdata_reg[55]_1 ),
        .O(\tixVBuffer_reg[7]_7 ));
  LUT6 #(
    .INIT(64'hABFB0000ABFBABFB)) 
    \txAXIS_tdata[51]_i_4 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[51] ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[51]_0 ),
        .I4(\txAXIS_tdata[51]_i_7_n_0 ),
        .I5(\txAXIS_tdata_reg[55]_1 ),
        .O(\tixVBuffer_reg[7]_6 ));
  (* SOFT_HLUTNM = "soft_lutpair1994" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[51]_i_7 
       (.I0(\crc_imd_reg[15]_0 [11]),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\crc_imd_reg[15]_0 [3]),
        .O(\txAXIS_tdata[51]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hABFB0000ABFBABFB)) 
    \txAXIS_tdata[52]_i_4 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[52] ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[52]_0 ),
        .I4(\txAXIS_tdata[52]_i_7_n_0 ),
        .I5(\txAXIS_tdata_reg[55]_1 ),
        .O(\tixVBuffer_reg[7]_5 ));
  (* SOFT_HLUTNM = "soft_lutpair1924" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[52]_i_7 
       (.I0(\crc_imd_reg[15]_0 [12]),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\crc_imd_reg[15]_0 [4]),
        .O(\txAXIS_tdata[52]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hABFB0000ABFBABFB)) 
    \txAXIS_tdata[53]_i_4 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[53] ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[53]_0 ),
        .I4(\crc_imd_reg[13]_1 ),
        .I5(\txAXIS_tdata_reg[55]_1 ),
        .O(\tixVBuffer_reg[7]_4 ));
  LUT6 #(
    .INIT(64'hABFB0000ABFBABFB)) 
    \txAXIS_tdata[54]_i_4 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[54] ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[54]_0 ),
        .I4(\crc_imd_reg[14]_2 ),
        .I5(\txAXIS_tdata_reg[55]_1 ),
        .O(\tixVBuffer_reg[7]_3 ));
  (* SOFT_HLUTNM = "soft_lutpair1998" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[55]_i_12 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\crc_imd_reg[15]_0 [7]),
        .O(\txAXIS_tdata[55]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hABFB0000ABFBABFB)) 
    \txAXIS_tdata[55]_i_9 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[55] ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[55]_0 ),
        .I4(\txAXIS_tdata[55]_i_12_n_0 ),
        .I5(\txAXIS_tdata_reg[55]_1 ),
        .O(\tixVBuffer_reg[7]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair1917" *) 
  LUT5 #(
    .INIT(32'h3FFFFFF5)) 
    \txAXIS_tdata[56]_i_2 
       (.I0(\crc_imd_reg[15]_0 [8]),
        .I1(\crc_imd_reg[15]_0 [0]),
        .I2(\retbuf_reg[0][0] [2]),
        .I3(\retbuf_reg[0][0] [1]),
        .I4(\retbuf_reg[0][0] [0]),
        .O(\crc_imd_reg[8]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair1916" *) 
  LUT5 #(
    .INIT(32'h3FFFFFF5)) 
    \txAXIS_tdata[57]_i_2 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(\crc_imd_reg[15]_0 [1]),
        .I2(\retbuf_reg[0][0] [2]),
        .I3(\retbuf_reg[0][0] [1]),
        .I4(\retbuf_reg[0][0] [0]),
        .O(\crc_imd_reg[9]_1 ));
  LUT5 #(
    .INIT(32'h0000ABFB)) 
    \txAXIS_tdata[58]_i_3 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[58] ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[58]_0 ),
        .I4(\txAXIS_tdata[58]_i_7_n_0 ),
        .O(\tixVBuffer_reg[7]_1 ));
  LUT6 #(
    .INIT(64'h8002000280000000)) 
    \txAXIS_tdata[58]_i_7 
       (.I0(\txAXIS_tdata_reg[2] ),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\retbuf_reg[0][0] [2]),
        .I4(\crc_imd_reg[15]_0 [2]),
        .I5(\crc_imd_reg[15]_0 [10]),
        .O(\txAXIS_tdata[58]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h0000ABFB)) 
    \txAXIS_tdata[59]_i_3 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[59] ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[59]_0 ),
        .I4(\txAXIS_tdata[59]_i_7_n_0 ),
        .O(\tixVBuffer_reg[7]_0 ));
  LUT6 #(
    .INIT(64'h8002000280000000)) 
    \txAXIS_tdata[59]_i_7 
       (.I0(\txAXIS_tdata_reg[2] ),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\retbuf_reg[0][0] [2]),
        .I4(\crc_imd_reg[15]_0 [3]),
        .I5(\crc_imd_reg[15]_0 [11]),
        .O(\txAXIS_tdata[59]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h0F000DFF0FFF0DFF)) 
    \txAXIS_tdata[5]_i_2 
       (.I0(\txAXIS_tdata_reg[5] ),
        .I1(Q[1]),
        .I2(\txAXIS_tdata[5]_i_7_n_0 ),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(\txAXIS_tdata_reg[7]_6 [5]),
        .O(\stateOp_reg[1]_2 ));
  LUT6 #(
    .INIT(64'h00FF0E0000000400)) 
    \txAXIS_tdata[5]_i_7 
       (.I0(\retbuf_reg[0][0] [0]),
        .I1(\crc_imd_reg[15]_0 [5]),
        .I2(\txAXIS_tdata_reg[1]_4 ),
        .I3(Q[1]),
        .I4(Q[3]),
        .I5(\crc_imd_reg[15]_0 [13]),
        .O(\txAXIS_tdata[5]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1915" *) 
  LUT5 #(
    .INIT(32'h3FFFFFF5)) 
    \txAXIS_tdata[60]_i_2 
       (.I0(\crc_imd_reg[15]_0 [12]),
        .I1(\crc_imd_reg[15]_0 [4]),
        .I2(\retbuf_reg[0][0] [2]),
        .I3(\retbuf_reg[0][0] [1]),
        .I4(\retbuf_reg[0][0] [0]),
        .O(\crc_imd_reg[12]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1914" *) 
  LUT5 #(
    .INIT(32'h3FFFFFF5)) 
    \txAXIS_tdata[61]_i_2 
       (.I0(\crc_imd_reg[15]_0 [13]),
        .I1(\crc_imd_reg[15]_0 [5]),
        .I2(\retbuf_reg[0][0] [2]),
        .I3(\retbuf_reg[0][0] [1]),
        .I4(\retbuf_reg[0][0] [0]),
        .O(\crc_imd_reg[13]_2 ));
  LUT5 #(
    .INIT(32'h0000ABFB)) 
    \txAXIS_tdata[62]_i_3 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[62]_1 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[62]_2 ),
        .I4(\txAXIS_tdata[62]_i_7_n_0 ),
        .O(\tixVBuffer_reg[7] ));
  LUT6 #(
    .INIT(64'h8002000280000000)) 
    \txAXIS_tdata[62]_i_7 
       (.I0(\txAXIS_tdata_reg[2] ),
        .I1(\retbuf_reg[0][0] [0]),
        .I2(\retbuf_reg[0][0] [1]),
        .I3(\retbuf_reg[0][0] [2]),
        .I4(\crc_imd_reg[15]_0 [6]),
        .I5(\crc_imd_reg[15]_0 [14]),
        .O(\txAXIS_tdata[62]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1913" *) 
  LUT5 #(
    .INIT(32'h3FFFFFF5)) 
    \txAXIS_tdata[63]_i_6 
       (.I0(\crc_imd_reg[15]_0 [15]),
        .I1(\crc_imd_reg[15]_0 [7]),
        .I2(\retbuf_reg[0][0] [2]),
        .I3(\retbuf_reg[0][0] [1]),
        .I4(\retbuf_reg[0][0] [0]),
        .O(\crc_imd_reg[15]_11 ));
  LUT6 #(
    .INIT(64'hFFFF44F444F444F4)) 
    \txAXIS_tdata[6]_i_4 
       (.I0(\crc_imd_reg[14]_2 ),
        .I1(\txAXIS_tdata_reg[4] ),
        .I2(\txAXIS_tdata_reg[7]_6 [6]),
        .I3(\txAXIS_tdata_reg[4]_0 ),
        .I4(\stateOp_reg[5]_5 ),
        .I5(\crc_imd_reg[15]_0 [14]),
        .O(\pollbuf_reg[0][6] ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF0075)) 
    \txAXIS_tdata[7]_i_1 
       (.I0(\txAXIS_tdata_reg[7] ),
        .I1(\txAXIS_tdata_reg[7]_0 ),
        .I2(\txAXIS_tdata_reg[7]_1 ),
        .I3(Q[5]),
        .I4(\txAXIS_tdata[7]_i_5_n_0 ),
        .I5(\txAXIS_tdata_reg[7]_2 ),
        .O(\stateOp_reg[5]_0 ));
  LUT6 #(
    .INIT(64'h00FF0E0000000400)) 
    \txAXIS_tdata[7]_i_12 
       (.I0(\retbuf_reg[0][0] [0]),
        .I1(\crc_imd_reg[15]_0 [7]),
        .I2(\txAXIS_tdata_reg[1]_4 ),
        .I3(Q[1]),
        .I4(Q[3]),
        .I5(\crc_imd_reg[15]_0 [15]),
        .O(\txAXIS_tdata[7]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \txAXIS_tdata[7]_i_5 
       (.I0(\tixVBuffer[7]_i_5_n_0 ),
        .I1(\txAXIS_tdata_reg[7]_3 ),
        .O(\txAXIS_tdata[7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0E000EFF0EFF0EFF)) 
    \txAXIS_tdata[7]_i_6 
       (.I0(\txAXIS_tdata_reg[7]_4 ),
        .I1(\txAXIS_tdata_reg[7]_5 ),
        .I2(\txAXIS_tdata[7]_i_12_n_0 ),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(\txAXIS_tdata_reg[7]_6 [7]),
        .O(\stateOp_reg[4]_1 ));
  LUT6 #(
    .INIT(64'hAA8A888A88888888)) 
    \txAXIS_tdata[8]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata[8]_i_2_n_0 ),
        .I2(\txAXIS_tdata_reg[8]_0 ),
        .I3(Q[3]),
        .I4(\crc_imd_reg[15]_0 [0]),
        .I5(\txAXIS_tdata_reg[8] ),
        .O(\stateOp_reg[1] [2]));
  LUT5 #(
    .INIT(32'hFFFF4540)) 
    \txAXIS_tdata[8]_i_2 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[8]_1 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[8]_2 ),
        .I4(\txAXIS_tdata[8]_i_6_n_0 ),
        .O(\txAXIS_tdata[8]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h101F1010)) 
    \txAXIS_tdata[8]_i_6 
       (.I0(\txAXIS_tdata[8]_i_8_n_0 ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(\txAXIS_tdata[15]_i_6_0 [0]),
        .O(\txAXIS_tdata[8]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1922" *) 
  LUT5 #(
    .INIT(32'hFFFFC7F7)) 
    \txAXIS_tdata[8]_i_8 
       (.I0(\crc_imd_reg[15]_0 [8]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [0]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[8]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAA8A888A88888888)) 
    \txAXIS_tdata[9]_i_1 
       (.I0(\txAXIS_tdata_reg[1]_0 ),
        .I1(\txAXIS_tdata[9]_i_2_n_0 ),
        .I2(\txAXIS_tdata_reg[9] ),
        .I3(Q[3]),
        .I4(\crc_imd_reg[15]_0 [1]),
        .I5(\txAXIS_tdata_reg[8] ),
        .O(\stateOp_reg[1] [3]));
  LUT5 #(
    .INIT(32'hFFFF4540)) 
    \txAXIS_tdata[9]_i_2 
       (.I0(\txAXIS_tdata_reg[62]_0 ),
        .I1(\txAXIS_tdata_reg[9]_0 ),
        .I2(\txAXIS_tdata_reg[62] ),
        .I3(\txAXIS_tdata_reg[9]_1 ),
        .I4(\txAXIS_tdata[9]_i_6_n_0 ),
        .O(\txAXIS_tdata[9]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h101F1010)) 
    \txAXIS_tdata[9]_i_6 
       (.I0(\txAXIS_tdata[9]_i_8_n_0 ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(\txAXIS_tdata[15]_i_6_0 [1]),
        .O(\txAXIS_tdata[9]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1923" *) 
  LUT5 #(
    .INIT(32'hFFFFC7F7)) 
    \txAXIS_tdata[9]_i_8 
       (.I0(\crc_imd_reg[15]_0 [9]),
        .I1(\retbuf_reg[0][0] [1]),
        .I2(\retbuf_reg[0][0] [0]),
        .I3(\crc_imd_reg[15]_0 [1]),
        .I4(\retbuf_reg[0][0] [2]),
        .O(\txAXIS_tdata[9]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h75770000FFFFFFFF)) 
    \txlen[28]_i_1 
       (.I0(\txlen[28]_i_2_n_0 ),
        .I1(\txlen[28]_i_3_n_0 ),
        .I2(\txlen_reg[28] ),
        .I3(\txlen_reg[28]_0 ),
        .I4(Q[2]),
        .I5(\retbuf_reg[0][6] ),
        .O(E));
  LUT6 #(
    .INIT(64'hFFFFFFEFEEFFFFFF)) 
    \txlen[28]_i_2 
       (.I0(Q[4]),
        .I1(Q[0]),
        .I2(\tixVBuffer[7]_i_5_n_0 ),
        .I3(Q[1]),
        .I4(Q[3]),
        .I5(Q[5]),
        .O(\txlen[28]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF7FFFFFFFFF3F3F3)) 
    \txlen[28]_i_3 
       (.I0(\tixVBuffer[7]_i_5_n_0 ),
        .I1(Q[0]),
        .I2(Q[5]),
        .I3(Q[4]),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\txlen[28]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAF0F0A8F0AAAA)) 
    validCrc_sig_i_1
       (.I0(\crc_imd[15]_i_5_n_0 ),
        .I1(first),
        .I2(validCrc_sig_reg_n_0),
        .I3(AXIS_tvalid),
        .I4(stateOp_reg_0),
        .I5(AXIS_tlast),
        .O(validCrc_sig_i_1_n_0));
  FDCE validCrc_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\crc_imd_reg[0]_1 ),
        .D(validCrc_sig_i_1_n_0),
        .Q(validCrc_sig_reg_n_0));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Ddrif
   (stateStats,
    ddrAXI_bready_sig_reg_0,
    Q,
    ddrAXI_rvalid_0,
    \ixRdidEgr_reg[4]_0 ,
    ddrAXI_wlast,
    \rdmutex_reg[1]_0 ,
    \wrmutex_reg[1]_0 ,
    hdrmemAXI_rlast,
    ddrAXI_araddr,
    probe,
    \FSM_onehot_stateRead_reg[2]_0 ,
    \rdmutex_reg[1]_1 ,
    ddrAXI_awaddr,
    \wrmutex_reg[1]_1 ,
    stateStats_reg_0,
    ddrAXI_wready_0,
    \NRdA_reg[31]_0 ,
    \NRdB_reg[31]_0 ,
    \NWrA_reg[31]_0 ,
    \NWrB_reg[31]_0 ,
    tkclk,
    aclk_sig,
    AR,
    memclk,
    \strbWrlock_i_reg[0]_0 ,
    D,
    wrAAXI_awvalid,
    ddrAXI_rvalid,
    \burstIgrstr_reg[0] ,
    ddrAXI_bvalid,
    wrAAXI_wlast,
    ddrAXI_wready,
    ddrAXI_wvalid,
    ddrAXI_rlast,
    \rdid_reg[1][0]_0 ,
    rdAAXI_araddr,
    \ixRdid_reg[0]_0 ,
    ddrAXI_arready,
    \rdmutex_reg[1]_2 ,
    web,
    ddrAXI_awready,
    ddrAXI_awvalid,
    \i_reg[0]_0 ,
    egrAXIS_tlast);
  output stateStats;
  output ddrAXI_bready_sig_reg_0;
  output [1:0]Q;
  output ddrAXI_rvalid_0;
  output \ixRdidEgr_reg[4]_0 ;
  output ddrAXI_wlast;
  output [1:0]\rdmutex_reg[1]_0 ;
  output \wrmutex_reg[1]_0 ;
  output hdrmemAXI_rlast;
  output [20:0]ddrAXI_araddr;
  output [1:0]probe;
  output [0:0]\FSM_onehot_stateRead_reg[2]_0 ;
  output \rdmutex_reg[1]_1 ;
  output [0:0]ddrAXI_awaddr;
  output \wrmutex_reg[1]_1 ;
  output [0:0]stateStats_reg_0;
  output ddrAXI_wready_0;
  output [27:0]\NRdA_reg[31]_0 ;
  output [27:0]\NRdB_reg[31]_0 ;
  output [27:0]\NWrA_reg[31]_0 ;
  output [27:0]\NWrB_reg[31]_0 ;
  input tkclk;
  input aclk_sig;
  input [0:0]AR;
  input memclk;
  input [0:0]\strbWrlock_i_reg[0]_0 ;
  input [1:0]D;
  input wrAAXI_awvalid;
  input ddrAXI_rvalid;
  input [0:0]\burstIgrstr_reg[0] ;
  input ddrAXI_bvalid;
  input wrAAXI_wlast;
  input ddrAXI_wready;
  input ddrAXI_wvalid;
  input ddrAXI_rlast;
  input \rdid_reg[1][0]_0 ;
  input [19:0]rdAAXI_araddr;
  input [0:0]\ixRdid_reg[0]_0 ;
  input ddrAXI_arready;
  input [0:0]\rdmutex_reg[1]_2 ;
  input [0:0]web;
  input ddrAXI_awready;
  input ddrAXI_awvalid;
  input [0:0]\i_reg[0]_0 ;
  input egrAXIS_tlast;

  wire [0:0]AR;
  wire [1:0]D;
  wire \FSM_onehot_stateRead[1]_i_1_n_0 ;
  wire \FSM_onehot_stateRead[2]_i_1_n_0 ;
  wire \FSM_onehot_stateRead[2]_i_2_n_0 ;
  wire [0:0]\FSM_onehot_stateRead_reg[2]_0 ;
  wire \FSM_onehot_stateRead_reg_n_0_[0] ;
  wire \FSM_onehot_stateRead_reg_n_0_[1] ;
  wire \FSM_onehot_stateWrite[1]_i_1_n_0 ;
  wire \FSM_onehot_stateWrite[2]_i_1_n_0 ;
  wire \FSM_onehot_stateWrite[2]_i_2_n_0 ;
  wire \FSM_onehot_stateWrite[2]_i_3_n_0 ;
  wire NRdA;
  wire \NRdA[10]_i_1_n_0 ;
  wire \NRdA[11]_i_1_n_0 ;
  wire \NRdA[12]_i_1_n_0 ;
  wire \NRdA[13]_i_1_n_0 ;
  wire \NRdA[14]_i_1_n_0 ;
  wire \NRdA[15]_i_1_n_0 ;
  wire \NRdA[16]_i_1_n_0 ;
  wire \NRdA[17]_i_1_n_0 ;
  wire \NRdA[18]_i_1_n_0 ;
  wire \NRdA[19]_i_1_n_0 ;
  wire \NRdA[20]_i_1_n_0 ;
  wire \NRdA[21]_i_1_n_0 ;
  wire \NRdA[22]_i_1_n_0 ;
  wire \NRdA[23]_i_1_n_0 ;
  wire \NRdA[24]_i_1_n_0 ;
  wire \NRdA[25]_i_1_n_0 ;
  wire \NRdA[26]_i_1_n_0 ;
  wire \NRdA[27]_i_1_n_0 ;
  wire \NRdA[28]_i_1_n_0 ;
  wire \NRdA[29]_i_1_n_0 ;
  wire \NRdA[30]_i_1_n_0 ;
  wire \NRdA[31]_i_2_n_0 ;
  wire \NRdA[31]_i_3_n_0 ;
  wire \NRdA[31]_i_4_n_0 ;
  wire \NRdA[31]_i_5_n_0 ;
  wire \NRdA[4]_i_1_n_0 ;
  wire \NRdA[5]_i_1_n_0 ;
  wire \NRdA[6]_i_1_n_0 ;
  wire \NRdA[7]_i_1_n_0 ;
  wire \NRdA[8]_i_1_n_0 ;
  wire \NRdA[9]_i_1_n_0 ;
  wire \NRdA_collect[10]_i_1_n_0 ;
  wire \NRdA_collect[10]_i_3_n_0 ;
  wire \NRdA_collect[11]_i_1_n_0 ;
  wire \NRdA_collect[12]_i_1_n_0 ;
  wire \NRdA_collect[13]_i_1_n_0 ;
  wire \NRdA_collect[14]_i_1_n_0 ;
  wire \NRdA_collect[15]_i_1_n_0 ;
  wire \NRdA_collect[16]_i_1_n_0 ;
  wire \NRdA_collect[17]_i_1_n_0 ;
  wire \NRdA_collect[18]_i_1_n_0 ;
  wire \NRdA_collect[19]_i_1_n_0 ;
  wire \NRdA_collect[20]_i_1_n_0 ;
  wire \NRdA_collect[21]_i_1_n_0 ;
  wire \NRdA_collect[22]_i_1_n_0 ;
  wire \NRdA_collect[23]_i_1_n_0 ;
  wire \NRdA_collect[24]_i_1_n_0 ;
  wire \NRdA_collect[25]_i_1_n_0 ;
  wire \NRdA_collect[26]_i_1_n_0 ;
  wire \NRdA_collect[27]_i_1_n_0 ;
  wire \NRdA_collect[28]_i_1_n_0 ;
  wire \NRdA_collect[29]_i_1_n_0 ;
  wire \NRdA_collect[30]_i_1_n_0 ;
  wire \NRdA_collect[31]_i_1_n_0 ;
  wire \NRdA_collect[4]_i_1_n_0 ;
  wire \NRdA_collect[5]_i_1_n_0 ;
  wire \NRdA_collect[6]_i_1_n_0 ;
  wire \NRdA_collect[7]_i_1_n_0 ;
  wire \NRdA_collect[8]_i_1_n_0 ;
  wire \NRdA_collect[9]_i_1_n_0 ;
  wire \NRdA_collect_reg[10]_i_2_n_0 ;
  wire \NRdA_collect_reg[10]_i_2_n_1 ;
  wire \NRdA_collect_reg[10]_i_2_n_2 ;
  wire \NRdA_collect_reg[10]_i_2_n_3 ;
  wire \NRdA_collect_reg[10]_i_2_n_4 ;
  wire \NRdA_collect_reg[10]_i_2_n_5 ;
  wire \NRdA_collect_reg[10]_i_2_n_6 ;
  wire \NRdA_collect_reg[10]_i_2_n_7 ;
  wire \NRdA_collect_reg[18]_i_2_n_0 ;
  wire \NRdA_collect_reg[18]_i_2_n_1 ;
  wire \NRdA_collect_reg[18]_i_2_n_2 ;
  wire \NRdA_collect_reg[18]_i_2_n_3 ;
  wire \NRdA_collect_reg[18]_i_2_n_4 ;
  wire \NRdA_collect_reg[18]_i_2_n_5 ;
  wire \NRdA_collect_reg[18]_i_2_n_6 ;
  wire \NRdA_collect_reg[18]_i_2_n_7 ;
  wire \NRdA_collect_reg[26]_i_2_n_0 ;
  wire \NRdA_collect_reg[26]_i_2_n_1 ;
  wire \NRdA_collect_reg[26]_i_2_n_2 ;
  wire \NRdA_collect_reg[26]_i_2_n_3 ;
  wire \NRdA_collect_reg[26]_i_2_n_4 ;
  wire \NRdA_collect_reg[26]_i_2_n_5 ;
  wire \NRdA_collect_reg[26]_i_2_n_6 ;
  wire \NRdA_collect_reg[26]_i_2_n_7 ;
  wire \NRdA_collect_reg[31]_i_2_n_4 ;
  wire \NRdA_collect_reg[31]_i_2_n_5 ;
  wire \NRdA_collect_reg[31]_i_2_n_6 ;
  wire \NRdA_collect_reg[31]_i_2_n_7 ;
  wire \NRdA_collect_reg_n_0_[10] ;
  wire \NRdA_collect_reg_n_0_[11] ;
  wire \NRdA_collect_reg_n_0_[12] ;
  wire \NRdA_collect_reg_n_0_[13] ;
  wire \NRdA_collect_reg_n_0_[14] ;
  wire \NRdA_collect_reg_n_0_[15] ;
  wire \NRdA_collect_reg_n_0_[16] ;
  wire \NRdA_collect_reg_n_0_[17] ;
  wire \NRdA_collect_reg_n_0_[18] ;
  wire \NRdA_collect_reg_n_0_[19] ;
  wire \NRdA_collect_reg_n_0_[20] ;
  wire \NRdA_collect_reg_n_0_[21] ;
  wire \NRdA_collect_reg_n_0_[22] ;
  wire \NRdA_collect_reg_n_0_[23] ;
  wire \NRdA_collect_reg_n_0_[24] ;
  wire \NRdA_collect_reg_n_0_[25] ;
  wire \NRdA_collect_reg_n_0_[26] ;
  wire \NRdA_collect_reg_n_0_[27] ;
  wire \NRdA_collect_reg_n_0_[28] ;
  wire \NRdA_collect_reg_n_0_[29] ;
  wire \NRdA_collect_reg_n_0_[30] ;
  wire \NRdA_collect_reg_n_0_[31] ;
  wire \NRdA_collect_reg_n_0_[4] ;
  wire \NRdA_collect_reg_n_0_[5] ;
  wire \NRdA_collect_reg_n_0_[6] ;
  wire \NRdA_collect_reg_n_0_[7] ;
  wire \NRdA_collect_reg_n_0_[8] ;
  wire \NRdA_collect_reg_n_0_[9] ;
  wire [27:0]\NRdA_reg[31]_0 ;
  wire \NRdB[10]_i_1_n_0 ;
  wire \NRdB[11]_i_1_n_0 ;
  wire \NRdB[12]_i_1_n_0 ;
  wire \NRdB[13]_i_1_n_0 ;
  wire \NRdB[14]_i_1_n_0 ;
  wire \NRdB[15]_i_1_n_0 ;
  wire \NRdB[16]_i_1_n_0 ;
  wire \NRdB[17]_i_1_n_0 ;
  wire \NRdB[18]_i_1_n_0 ;
  wire \NRdB[19]_i_1_n_0 ;
  wire \NRdB[20]_i_1_n_0 ;
  wire \NRdB[21]_i_1_n_0 ;
  wire \NRdB[22]_i_1_n_0 ;
  wire \NRdB[23]_i_1_n_0 ;
  wire \NRdB[24]_i_1_n_0 ;
  wire \NRdB[25]_i_1_n_0 ;
  wire \NRdB[26]_i_1_n_0 ;
  wire \NRdB[27]_i_1_n_0 ;
  wire \NRdB[28]_i_1_n_0 ;
  wire \NRdB[29]_i_1_n_0 ;
  wire \NRdB[30]_i_1_n_0 ;
  wire \NRdB[31]_i_1_n_0 ;
  wire \NRdB[4]_i_1_n_0 ;
  wire \NRdB[5]_i_1_n_0 ;
  wire \NRdB[6]_i_1_n_0 ;
  wire \NRdB[7]_i_1_n_0 ;
  wire \NRdB[8]_i_1_n_0 ;
  wire \NRdB[9]_i_1_n_0 ;
  wire \NRdB_collect[10]_i_1_n_0 ;
  wire \NRdB_collect[10]_i_3_n_0 ;
  wire \NRdB_collect[11]_i_1_n_0 ;
  wire \NRdB_collect[12]_i_1_n_0 ;
  wire \NRdB_collect[13]_i_1_n_0 ;
  wire \NRdB_collect[14]_i_1_n_0 ;
  wire \NRdB_collect[15]_i_1_n_0 ;
  wire \NRdB_collect[16]_i_1_n_0 ;
  wire \NRdB_collect[17]_i_1_n_0 ;
  wire \NRdB_collect[18]_i_1_n_0 ;
  wire \NRdB_collect[19]_i_1_n_0 ;
  wire \NRdB_collect[20]_i_1_n_0 ;
  wire \NRdB_collect[21]_i_1_n_0 ;
  wire \NRdB_collect[22]_i_1_n_0 ;
  wire \NRdB_collect[23]_i_1_n_0 ;
  wire \NRdB_collect[24]_i_1_n_0 ;
  wire \NRdB_collect[25]_i_1_n_0 ;
  wire \NRdB_collect[26]_i_1_n_0 ;
  wire \NRdB_collect[27]_i_1_n_0 ;
  wire \NRdB_collect[28]_i_1_n_0 ;
  wire \NRdB_collect[29]_i_1_n_0 ;
  wire \NRdB_collect[30]_i_1_n_0 ;
  wire \NRdB_collect[31]_i_1_n_0 ;
  wire \NRdB_collect[4]_i_1_n_0 ;
  wire \NRdB_collect[5]_i_1_n_0 ;
  wire \NRdB_collect[6]_i_1_n_0 ;
  wire \NRdB_collect[7]_i_1_n_0 ;
  wire \NRdB_collect[8]_i_1_n_0 ;
  wire \NRdB_collect[9]_i_1_n_0 ;
  wire \NRdB_collect_reg[10]_i_2_n_0 ;
  wire \NRdB_collect_reg[10]_i_2_n_1 ;
  wire \NRdB_collect_reg[10]_i_2_n_10 ;
  wire \NRdB_collect_reg[10]_i_2_n_11 ;
  wire \NRdB_collect_reg[10]_i_2_n_12 ;
  wire \NRdB_collect_reg[10]_i_2_n_13 ;
  wire \NRdB_collect_reg[10]_i_2_n_14 ;
  wire \NRdB_collect_reg[10]_i_2_n_2 ;
  wire \NRdB_collect_reg[10]_i_2_n_3 ;
  wire \NRdB_collect_reg[10]_i_2_n_4 ;
  wire \NRdB_collect_reg[10]_i_2_n_5 ;
  wire \NRdB_collect_reg[10]_i_2_n_6 ;
  wire \NRdB_collect_reg[10]_i_2_n_7 ;
  wire \NRdB_collect_reg[10]_i_2_n_8 ;
  wire \NRdB_collect_reg[10]_i_2_n_9 ;
  wire \NRdB_collect_reg[18]_i_2_n_0 ;
  wire \NRdB_collect_reg[18]_i_2_n_1 ;
  wire \NRdB_collect_reg[18]_i_2_n_10 ;
  wire \NRdB_collect_reg[18]_i_2_n_11 ;
  wire \NRdB_collect_reg[18]_i_2_n_12 ;
  wire \NRdB_collect_reg[18]_i_2_n_13 ;
  wire \NRdB_collect_reg[18]_i_2_n_14 ;
  wire \NRdB_collect_reg[18]_i_2_n_15 ;
  wire \NRdB_collect_reg[18]_i_2_n_2 ;
  wire \NRdB_collect_reg[18]_i_2_n_3 ;
  wire \NRdB_collect_reg[18]_i_2_n_4 ;
  wire \NRdB_collect_reg[18]_i_2_n_5 ;
  wire \NRdB_collect_reg[18]_i_2_n_6 ;
  wire \NRdB_collect_reg[18]_i_2_n_7 ;
  wire \NRdB_collect_reg[18]_i_2_n_8 ;
  wire \NRdB_collect_reg[18]_i_2_n_9 ;
  wire \NRdB_collect_reg[26]_i_2_n_0 ;
  wire \NRdB_collect_reg[26]_i_2_n_1 ;
  wire \NRdB_collect_reg[26]_i_2_n_10 ;
  wire \NRdB_collect_reg[26]_i_2_n_11 ;
  wire \NRdB_collect_reg[26]_i_2_n_12 ;
  wire \NRdB_collect_reg[26]_i_2_n_13 ;
  wire \NRdB_collect_reg[26]_i_2_n_14 ;
  wire \NRdB_collect_reg[26]_i_2_n_15 ;
  wire \NRdB_collect_reg[26]_i_2_n_2 ;
  wire \NRdB_collect_reg[26]_i_2_n_3 ;
  wire \NRdB_collect_reg[26]_i_2_n_4 ;
  wire \NRdB_collect_reg[26]_i_2_n_5 ;
  wire \NRdB_collect_reg[26]_i_2_n_6 ;
  wire \NRdB_collect_reg[26]_i_2_n_7 ;
  wire \NRdB_collect_reg[26]_i_2_n_8 ;
  wire \NRdB_collect_reg[26]_i_2_n_9 ;
  wire \NRdB_collect_reg[31]_i_2_n_11 ;
  wire \NRdB_collect_reg[31]_i_2_n_12 ;
  wire \NRdB_collect_reg[31]_i_2_n_13 ;
  wire \NRdB_collect_reg[31]_i_2_n_14 ;
  wire \NRdB_collect_reg[31]_i_2_n_15 ;
  wire \NRdB_collect_reg[31]_i_2_n_4 ;
  wire \NRdB_collect_reg[31]_i_2_n_5 ;
  wire \NRdB_collect_reg[31]_i_2_n_6 ;
  wire \NRdB_collect_reg[31]_i_2_n_7 ;
  wire \NRdB_collect_reg_n_0_[10] ;
  wire \NRdB_collect_reg_n_0_[11] ;
  wire \NRdB_collect_reg_n_0_[12] ;
  wire \NRdB_collect_reg_n_0_[13] ;
  wire \NRdB_collect_reg_n_0_[14] ;
  wire \NRdB_collect_reg_n_0_[15] ;
  wire \NRdB_collect_reg_n_0_[16] ;
  wire \NRdB_collect_reg_n_0_[17] ;
  wire \NRdB_collect_reg_n_0_[18] ;
  wire \NRdB_collect_reg_n_0_[19] ;
  wire \NRdB_collect_reg_n_0_[20] ;
  wire \NRdB_collect_reg_n_0_[21] ;
  wire \NRdB_collect_reg_n_0_[22] ;
  wire \NRdB_collect_reg_n_0_[23] ;
  wire \NRdB_collect_reg_n_0_[24] ;
  wire \NRdB_collect_reg_n_0_[25] ;
  wire \NRdB_collect_reg_n_0_[26] ;
  wire \NRdB_collect_reg_n_0_[27] ;
  wire \NRdB_collect_reg_n_0_[28] ;
  wire \NRdB_collect_reg_n_0_[29] ;
  wire \NRdB_collect_reg_n_0_[30] ;
  wire \NRdB_collect_reg_n_0_[31] ;
  wire \NRdB_collect_reg_n_0_[4] ;
  wire \NRdB_collect_reg_n_0_[5] ;
  wire \NRdB_collect_reg_n_0_[6] ;
  wire \NRdB_collect_reg_n_0_[7] ;
  wire \NRdB_collect_reg_n_0_[8] ;
  wire \NRdB_collect_reg_n_0_[9] ;
  wire [27:0]\NRdB_reg[31]_0 ;
  wire \NWrA[10]_i_1_n_0 ;
  wire \NWrA[11]_i_1_n_0 ;
  wire \NWrA[12]_i_1_n_0 ;
  wire \NWrA[13]_i_1_n_0 ;
  wire \NWrA[14]_i_1_n_0 ;
  wire \NWrA[15]_i_1_n_0 ;
  wire \NWrA[16]_i_1_n_0 ;
  wire \NWrA[17]_i_1_n_0 ;
  wire \NWrA[18]_i_1_n_0 ;
  wire \NWrA[19]_i_1_n_0 ;
  wire \NWrA[20]_i_1_n_0 ;
  wire \NWrA[21]_i_1_n_0 ;
  wire \NWrA[22]_i_1_n_0 ;
  wire \NWrA[23]_i_1_n_0 ;
  wire \NWrA[24]_i_1_n_0 ;
  wire \NWrA[25]_i_1_n_0 ;
  wire \NWrA[26]_i_1_n_0 ;
  wire \NWrA[27]_i_1_n_0 ;
  wire \NWrA[28]_i_1_n_0 ;
  wire \NWrA[29]_i_1_n_0 ;
  wire \NWrA[30]_i_1_n_0 ;
  wire \NWrA[31]_i_1_n_0 ;
  wire \NWrA[4]_i_1_n_0 ;
  wire \NWrA[5]_i_1_n_0 ;
  wire \NWrA[6]_i_1_n_0 ;
  wire \NWrA[7]_i_1_n_0 ;
  wire \NWrA[8]_i_1_n_0 ;
  wire \NWrA[9]_i_1_n_0 ;
  wire \NWrA_collect[10]_i_1_n_0 ;
  wire \NWrA_collect[10]_i_3_n_0 ;
  wire \NWrA_collect[11]_i_1_n_0 ;
  wire \NWrA_collect[12]_i_1_n_0 ;
  wire \NWrA_collect[13]_i_1_n_0 ;
  wire \NWrA_collect[14]_i_1_n_0 ;
  wire \NWrA_collect[15]_i_1_n_0 ;
  wire \NWrA_collect[16]_i_1_n_0 ;
  wire \NWrA_collect[17]_i_1_n_0 ;
  wire \NWrA_collect[18]_i_1_n_0 ;
  wire \NWrA_collect[19]_i_1_n_0 ;
  wire \NWrA_collect[20]_i_1_n_0 ;
  wire \NWrA_collect[21]_i_1_n_0 ;
  wire \NWrA_collect[22]_i_1_n_0 ;
  wire \NWrA_collect[23]_i_1_n_0 ;
  wire \NWrA_collect[24]_i_1_n_0 ;
  wire \NWrA_collect[25]_i_1_n_0 ;
  wire \NWrA_collect[26]_i_1_n_0 ;
  wire \NWrA_collect[27]_i_1_n_0 ;
  wire \NWrA_collect[28]_i_1_n_0 ;
  wire \NWrA_collect[29]_i_1_n_0 ;
  wire \NWrA_collect[30]_i_1_n_0 ;
  wire \NWrA_collect[31]_i_1_n_0 ;
  wire \NWrA_collect[4]_i_1_n_0 ;
  wire \NWrA_collect[5]_i_1_n_0 ;
  wire \NWrA_collect[6]_i_1_n_0 ;
  wire \NWrA_collect[7]_i_1_n_0 ;
  wire \NWrA_collect[8]_i_1_n_0 ;
  wire \NWrA_collect[9]_i_1_n_0 ;
  wire \NWrA_collect_reg[10]_i_2_n_0 ;
  wire \NWrA_collect_reg[10]_i_2_n_1 ;
  wire \NWrA_collect_reg[10]_i_2_n_10 ;
  wire \NWrA_collect_reg[10]_i_2_n_11 ;
  wire \NWrA_collect_reg[10]_i_2_n_12 ;
  wire \NWrA_collect_reg[10]_i_2_n_13 ;
  wire \NWrA_collect_reg[10]_i_2_n_14 ;
  wire \NWrA_collect_reg[10]_i_2_n_2 ;
  wire \NWrA_collect_reg[10]_i_2_n_3 ;
  wire \NWrA_collect_reg[10]_i_2_n_4 ;
  wire \NWrA_collect_reg[10]_i_2_n_5 ;
  wire \NWrA_collect_reg[10]_i_2_n_6 ;
  wire \NWrA_collect_reg[10]_i_2_n_7 ;
  wire \NWrA_collect_reg[10]_i_2_n_8 ;
  wire \NWrA_collect_reg[10]_i_2_n_9 ;
  wire \NWrA_collect_reg[18]_i_2_n_0 ;
  wire \NWrA_collect_reg[18]_i_2_n_1 ;
  wire \NWrA_collect_reg[18]_i_2_n_10 ;
  wire \NWrA_collect_reg[18]_i_2_n_11 ;
  wire \NWrA_collect_reg[18]_i_2_n_12 ;
  wire \NWrA_collect_reg[18]_i_2_n_13 ;
  wire \NWrA_collect_reg[18]_i_2_n_14 ;
  wire \NWrA_collect_reg[18]_i_2_n_15 ;
  wire \NWrA_collect_reg[18]_i_2_n_2 ;
  wire \NWrA_collect_reg[18]_i_2_n_3 ;
  wire \NWrA_collect_reg[18]_i_2_n_4 ;
  wire \NWrA_collect_reg[18]_i_2_n_5 ;
  wire \NWrA_collect_reg[18]_i_2_n_6 ;
  wire \NWrA_collect_reg[18]_i_2_n_7 ;
  wire \NWrA_collect_reg[18]_i_2_n_8 ;
  wire \NWrA_collect_reg[18]_i_2_n_9 ;
  wire \NWrA_collect_reg[26]_i_2_n_0 ;
  wire \NWrA_collect_reg[26]_i_2_n_1 ;
  wire \NWrA_collect_reg[26]_i_2_n_10 ;
  wire \NWrA_collect_reg[26]_i_2_n_11 ;
  wire \NWrA_collect_reg[26]_i_2_n_12 ;
  wire \NWrA_collect_reg[26]_i_2_n_13 ;
  wire \NWrA_collect_reg[26]_i_2_n_14 ;
  wire \NWrA_collect_reg[26]_i_2_n_15 ;
  wire \NWrA_collect_reg[26]_i_2_n_2 ;
  wire \NWrA_collect_reg[26]_i_2_n_3 ;
  wire \NWrA_collect_reg[26]_i_2_n_4 ;
  wire \NWrA_collect_reg[26]_i_2_n_5 ;
  wire \NWrA_collect_reg[26]_i_2_n_6 ;
  wire \NWrA_collect_reg[26]_i_2_n_7 ;
  wire \NWrA_collect_reg[26]_i_2_n_8 ;
  wire \NWrA_collect_reg[26]_i_2_n_9 ;
  wire \NWrA_collect_reg[31]_i_2_n_11 ;
  wire \NWrA_collect_reg[31]_i_2_n_12 ;
  wire \NWrA_collect_reg[31]_i_2_n_13 ;
  wire \NWrA_collect_reg[31]_i_2_n_14 ;
  wire \NWrA_collect_reg[31]_i_2_n_15 ;
  wire \NWrA_collect_reg[31]_i_2_n_4 ;
  wire \NWrA_collect_reg[31]_i_2_n_5 ;
  wire \NWrA_collect_reg[31]_i_2_n_6 ;
  wire \NWrA_collect_reg[31]_i_2_n_7 ;
  wire \NWrA_collect_reg_n_0_[10] ;
  wire \NWrA_collect_reg_n_0_[11] ;
  wire \NWrA_collect_reg_n_0_[12] ;
  wire \NWrA_collect_reg_n_0_[13] ;
  wire \NWrA_collect_reg_n_0_[14] ;
  wire \NWrA_collect_reg_n_0_[15] ;
  wire \NWrA_collect_reg_n_0_[16] ;
  wire \NWrA_collect_reg_n_0_[17] ;
  wire \NWrA_collect_reg_n_0_[18] ;
  wire \NWrA_collect_reg_n_0_[19] ;
  wire \NWrA_collect_reg_n_0_[20] ;
  wire \NWrA_collect_reg_n_0_[21] ;
  wire \NWrA_collect_reg_n_0_[22] ;
  wire \NWrA_collect_reg_n_0_[23] ;
  wire \NWrA_collect_reg_n_0_[24] ;
  wire \NWrA_collect_reg_n_0_[25] ;
  wire \NWrA_collect_reg_n_0_[26] ;
  wire \NWrA_collect_reg_n_0_[27] ;
  wire \NWrA_collect_reg_n_0_[28] ;
  wire \NWrA_collect_reg_n_0_[29] ;
  wire \NWrA_collect_reg_n_0_[30] ;
  wire \NWrA_collect_reg_n_0_[31] ;
  wire \NWrA_collect_reg_n_0_[4] ;
  wire \NWrA_collect_reg_n_0_[5] ;
  wire \NWrA_collect_reg_n_0_[6] ;
  wire \NWrA_collect_reg_n_0_[7] ;
  wire \NWrA_collect_reg_n_0_[8] ;
  wire \NWrA_collect_reg_n_0_[9] ;
  wire [27:0]\NWrA_reg[31]_0 ;
  wire \NWrB[10]_i_1_n_0 ;
  wire \NWrB[11]_i_1_n_0 ;
  wire \NWrB[12]_i_1_n_0 ;
  wire \NWrB[13]_i_1_n_0 ;
  wire \NWrB[14]_i_1_n_0 ;
  wire \NWrB[15]_i_1_n_0 ;
  wire \NWrB[16]_i_1_n_0 ;
  wire \NWrB[17]_i_1_n_0 ;
  wire \NWrB[18]_i_1_n_0 ;
  wire \NWrB[19]_i_1_n_0 ;
  wire \NWrB[20]_i_1_n_0 ;
  wire \NWrB[21]_i_1_n_0 ;
  wire \NWrB[22]_i_1_n_0 ;
  wire \NWrB[23]_i_1_n_0 ;
  wire \NWrB[24]_i_1_n_0 ;
  wire \NWrB[25]_i_1_n_0 ;
  wire \NWrB[26]_i_1_n_0 ;
  wire \NWrB[27]_i_1_n_0 ;
  wire \NWrB[28]_i_1_n_0 ;
  wire \NWrB[29]_i_1_n_0 ;
  wire \NWrB[30]_i_1_n_0 ;
  wire \NWrB[31]_i_1_n_0 ;
  wire \NWrB[4]_i_1_n_0 ;
  wire \NWrB[5]_i_1_n_0 ;
  wire \NWrB[6]_i_1_n_0 ;
  wire \NWrB[7]_i_1_n_0 ;
  wire \NWrB[8]_i_1_n_0 ;
  wire \NWrB[9]_i_1_n_0 ;
  wire \NWrB_collect[10]_i_1_n_0 ;
  wire \NWrB_collect[10]_i_3_n_0 ;
  wire \NWrB_collect[11]_i_1_n_0 ;
  wire \NWrB_collect[12]_i_1_n_0 ;
  wire \NWrB_collect[13]_i_1_n_0 ;
  wire \NWrB_collect[14]_i_1_n_0 ;
  wire \NWrB_collect[15]_i_1_n_0 ;
  wire \NWrB_collect[16]_i_1_n_0 ;
  wire \NWrB_collect[17]_i_1_n_0 ;
  wire \NWrB_collect[18]_i_1_n_0 ;
  wire \NWrB_collect[19]_i_1_n_0 ;
  wire \NWrB_collect[20]_i_1_n_0 ;
  wire \NWrB_collect[21]_i_1_n_0 ;
  wire \NWrB_collect[22]_i_1_n_0 ;
  wire \NWrB_collect[23]_i_1_n_0 ;
  wire \NWrB_collect[24]_i_1_n_0 ;
  wire \NWrB_collect[25]_i_1_n_0 ;
  wire \NWrB_collect[26]_i_1_n_0 ;
  wire \NWrB_collect[27]_i_1_n_0 ;
  wire \NWrB_collect[28]_i_1_n_0 ;
  wire \NWrB_collect[29]_i_1_n_0 ;
  wire \NWrB_collect[30]_i_1_n_0 ;
  wire \NWrB_collect[31]_i_1_n_0 ;
  wire \NWrB_collect[4]_i_1_n_0 ;
  wire \NWrB_collect[5]_i_1_n_0 ;
  wire \NWrB_collect[6]_i_1_n_0 ;
  wire \NWrB_collect[7]_i_1_n_0 ;
  wire \NWrB_collect[8]_i_1_n_0 ;
  wire \NWrB_collect[9]_i_1_n_0 ;
  wire \NWrB_collect_reg[10]_i_2_n_0 ;
  wire \NWrB_collect_reg[10]_i_2_n_1 ;
  wire \NWrB_collect_reg[10]_i_2_n_10 ;
  wire \NWrB_collect_reg[10]_i_2_n_11 ;
  wire \NWrB_collect_reg[10]_i_2_n_12 ;
  wire \NWrB_collect_reg[10]_i_2_n_13 ;
  wire \NWrB_collect_reg[10]_i_2_n_14 ;
  wire \NWrB_collect_reg[10]_i_2_n_2 ;
  wire \NWrB_collect_reg[10]_i_2_n_3 ;
  wire \NWrB_collect_reg[10]_i_2_n_4 ;
  wire \NWrB_collect_reg[10]_i_2_n_5 ;
  wire \NWrB_collect_reg[10]_i_2_n_6 ;
  wire \NWrB_collect_reg[10]_i_2_n_7 ;
  wire \NWrB_collect_reg[10]_i_2_n_8 ;
  wire \NWrB_collect_reg[10]_i_2_n_9 ;
  wire \NWrB_collect_reg[18]_i_2_n_0 ;
  wire \NWrB_collect_reg[18]_i_2_n_1 ;
  wire \NWrB_collect_reg[18]_i_2_n_10 ;
  wire \NWrB_collect_reg[18]_i_2_n_11 ;
  wire \NWrB_collect_reg[18]_i_2_n_12 ;
  wire \NWrB_collect_reg[18]_i_2_n_13 ;
  wire \NWrB_collect_reg[18]_i_2_n_14 ;
  wire \NWrB_collect_reg[18]_i_2_n_15 ;
  wire \NWrB_collect_reg[18]_i_2_n_2 ;
  wire \NWrB_collect_reg[18]_i_2_n_3 ;
  wire \NWrB_collect_reg[18]_i_2_n_4 ;
  wire \NWrB_collect_reg[18]_i_2_n_5 ;
  wire \NWrB_collect_reg[18]_i_2_n_6 ;
  wire \NWrB_collect_reg[18]_i_2_n_7 ;
  wire \NWrB_collect_reg[18]_i_2_n_8 ;
  wire \NWrB_collect_reg[18]_i_2_n_9 ;
  wire \NWrB_collect_reg[26]_i_2_n_0 ;
  wire \NWrB_collect_reg[26]_i_2_n_1 ;
  wire \NWrB_collect_reg[26]_i_2_n_10 ;
  wire \NWrB_collect_reg[26]_i_2_n_11 ;
  wire \NWrB_collect_reg[26]_i_2_n_12 ;
  wire \NWrB_collect_reg[26]_i_2_n_13 ;
  wire \NWrB_collect_reg[26]_i_2_n_14 ;
  wire \NWrB_collect_reg[26]_i_2_n_15 ;
  wire \NWrB_collect_reg[26]_i_2_n_2 ;
  wire \NWrB_collect_reg[26]_i_2_n_3 ;
  wire \NWrB_collect_reg[26]_i_2_n_4 ;
  wire \NWrB_collect_reg[26]_i_2_n_5 ;
  wire \NWrB_collect_reg[26]_i_2_n_6 ;
  wire \NWrB_collect_reg[26]_i_2_n_7 ;
  wire \NWrB_collect_reg[26]_i_2_n_8 ;
  wire \NWrB_collect_reg[26]_i_2_n_9 ;
  wire \NWrB_collect_reg[31]_i_2_n_11 ;
  wire \NWrB_collect_reg[31]_i_2_n_12 ;
  wire \NWrB_collect_reg[31]_i_2_n_13 ;
  wire \NWrB_collect_reg[31]_i_2_n_14 ;
  wire \NWrB_collect_reg[31]_i_2_n_15 ;
  wire \NWrB_collect_reg[31]_i_2_n_4 ;
  wire \NWrB_collect_reg[31]_i_2_n_5 ;
  wire \NWrB_collect_reg[31]_i_2_n_6 ;
  wire \NWrB_collect_reg[31]_i_2_n_7 ;
  wire \NWrB_collect_reg_n_0_[10] ;
  wire \NWrB_collect_reg_n_0_[11] ;
  wire \NWrB_collect_reg_n_0_[12] ;
  wire \NWrB_collect_reg_n_0_[13] ;
  wire \NWrB_collect_reg_n_0_[14] ;
  wire \NWrB_collect_reg_n_0_[15] ;
  wire \NWrB_collect_reg_n_0_[16] ;
  wire \NWrB_collect_reg_n_0_[17] ;
  wire \NWrB_collect_reg_n_0_[18] ;
  wire \NWrB_collect_reg_n_0_[19] ;
  wire \NWrB_collect_reg_n_0_[20] ;
  wire \NWrB_collect_reg_n_0_[21] ;
  wire \NWrB_collect_reg_n_0_[22] ;
  wire \NWrB_collect_reg_n_0_[23] ;
  wire \NWrB_collect_reg_n_0_[24] ;
  wire \NWrB_collect_reg_n_0_[25] ;
  wire \NWrB_collect_reg_n_0_[26] ;
  wire \NWrB_collect_reg_n_0_[27] ;
  wire \NWrB_collect_reg_n_0_[28] ;
  wire \NWrB_collect_reg_n_0_[29] ;
  wire \NWrB_collect_reg_n_0_[30] ;
  wire \NWrB_collect_reg_n_0_[31] ;
  wire \NWrB_collect_reg_n_0_[4] ;
  wire \NWrB_collect_reg_n_0_[5] ;
  wire \NWrB_collect_reg_n_0_[6] ;
  wire \NWrB_collect_reg_n_0_[7] ;
  wire \NWrB_collect_reg_n_0_[8] ;
  wire \NWrB_collect_reg_n_0_[9] ;
  wire [27:0]\NWrB_reg[31]_0 ;
  wire [1:0]Q;
  wire aclk_sig;
  wire awdone_i_1_n_0;
  wire awdone_reg_n_0;
  wire [0:0]\burstIgrstr_reg[0] ;
  wire [20:0]ddrAXI_araddr;
  wire ddrAXI_arready;
  wire [0:0]ddrAXI_awaddr;
  wire ddrAXI_awready;
  wire ddrAXI_awvalid;
  wire ddrAXI_bready_sig;
  wire ddrAXI_bready_sig0;
  wire ddrAXI_bready_sig_i_1_n_0;
  wire ddrAXI_bready_sig_i_2_n_0;
  wire ddrAXI_bready_sig_i_3_n_0;
  wire ddrAXI_bready_sig_i_4_n_0;
  wire ddrAXI_bready_sig_reg_0;
  wire ddrAXI_bvalid;
  wire ddrAXI_rlast;
  wire ddrAXI_rready_INST_0_i_10_n_0;
  wire ddrAXI_rready_INST_0_i_11_n_0;
  wire ddrAXI_rready_INST_0_i_12_n_0;
  wire ddrAXI_rready_INST_0_i_13_n_0;
  wire ddrAXI_rready_INST_0_i_2_n_0;
  wire ddrAXI_rready_INST_0_i_3_n_0;
  wire ddrAXI_rready_INST_0_i_4_n_0;
  wire ddrAXI_rready_INST_0_i_5_n_0;
  wire ddrAXI_rready_INST_0_i_6_n_0;
  wire ddrAXI_rready_INST_0_i_7_n_0;
  wire ddrAXI_rready_INST_0_i_8_n_0;
  wire ddrAXI_rready_INST_0_i_9_n_0;
  wire ddrAXI_rvalid;
  wire ddrAXI_rvalid_0;
  wire ddrAXI_wlast;
  wire ddrAXI_wready;
  wire ddrAXI_wready_0;
  wire ddrAXI_wvalid;
  wire egrAXIS_tlast;
  wire hdrmemAXI_rlast;
  wire \i[10]_i_2_n_0 ;
  wire \i[13]_i_1_n_0 ;
  wire \i[13]_i_2_n_0 ;
  wire \i[13]_i_3_n_0 ;
  wire \i[1]_i_1__5_n_0 ;
  wire \i[5]_i_2__1_n_0 ;
  wire \i[9]_i_2__0_n_0 ;
  wire [13:0]i_reg;
  wire [0:0]\i_reg[0]_0 ;
  wire [1:0]ixRdid;
  wire ixRdidEgr;
  wire \ixRdidEgr[0]_i_1_n_0 ;
  wire \ixRdidEgr[1]_i_1_n_0 ;
  wire \ixRdidEgr[2]_i_1_n_0 ;
  wire \ixRdidEgr[3]_i_1_n_0 ;
  wire \ixRdidEgr[4]_i_2_n_0 ;
  wire [4:0]ixRdidEgr__0;
  wire \ixRdidEgr_reg[4]_0 ;
  wire \ixRdid[2]_i_1_n_0 ;
  wire \ixRdid[3]_i_1_n_0 ;
  wire \ixRdid[4]_i_1_n_0 ;
  wire \ixRdid[4]_i_2_n_0 ;
  wire [4:0]ixRdid__0;
  wire [0:0]\ixRdid_reg[0]_0 ;
  wire memclk;
  wire [12:0]p_0_in;
  wire [31:4]plusOp;
  wire [1:0]probe;
  wire [19:0]rdAAXI_araddr;
  wire \rdid[0][0]_i_1_n_0 ;
  wire \rdid[0][0]_i_2_n_0 ;
  wire \rdid[0][0]_i_3_n_0 ;
  wire \rdid[10][0]_i_1_n_0 ;
  wire \rdid[10][0]_i_2_n_0 ;
  wire \rdid[11][0]_i_1_n_0 ;
  wire \rdid[11][0]_i_2_n_0 ;
  wire \rdid[12][0]_i_1_n_0 ;
  wire \rdid[12][0]_i_2_n_0 ;
  wire \rdid[12][0]_i_3_n_0 ;
  wire \rdid[13][0]_i_1_n_0 ;
  wire \rdid[13][0]_i_2_n_0 ;
  wire \rdid[13][0]_i_3_n_0 ;
  wire \rdid[14][0]_i_1_n_0 ;
  wire \rdid[14][0]_i_2_n_0 ;
  wire \rdid[14][0]_i_3_n_0 ;
  wire \rdid[15][0]_i_1_n_0 ;
  wire \rdid[15][0]_i_2_n_0 ;
  wire \rdid[15][0]_i_3_n_0 ;
  wire \rdid[16][0]_i_1_n_0 ;
  wire \rdid[16][0]_i_2_n_0 ;
  wire \rdid[16][0]_i_3_n_0 ;
  wire \rdid[16][0]_i_4_n_0 ;
  wire \rdid[17][0]_i_1_n_0 ;
  wire \rdid[17][0]_i_2_n_0 ;
  wire \rdid[17][0]_i_3_n_0 ;
  wire \rdid[18][0]_i_1_n_0 ;
  wire \rdid[18][0]_i_2_n_0 ;
  wire \rdid[18][0]_i_3_n_0 ;
  wire \rdid[18][0]_i_4_n_0 ;
  wire \rdid[18][0]_i_5_n_0 ;
  wire \rdid[19][0]_i_1_n_0 ;
  wire \rdid[19][0]_i_2_n_0 ;
  wire \rdid[19][0]_i_3_n_0 ;
  wire \rdid[1][0]_i_1_n_0 ;
  wire \rdid[1][0]_i_2_n_0 ;
  wire \rdid[1][0]_i_3_n_0 ;
  wire \rdid[1][0]_i_5_n_0 ;
  wire \rdid[20][0]_i_1_n_0 ;
  wire \rdid[20][0]_i_2_n_0 ;
  wire \rdid[20][0]_i_3_n_0 ;
  wire \rdid[21][0]_i_1_n_0 ;
  wire \rdid[21][0]_i_2_n_0 ;
  wire \rdid[22][0]_i_1_n_0 ;
  wire \rdid[22][0]_i_2_n_0 ;
  wire \rdid[22][0]_i_3_n_0 ;
  wire \rdid[23][0]_i_1_n_0 ;
  wire \rdid[23][0]_i_2_n_0 ;
  wire \rdid[23][0]_i_3_n_0 ;
  wire \rdid[24][0]_i_1_n_0 ;
  wire \rdid[24][0]_i_2_n_0 ;
  wire \rdid[25][0]_i_1_n_0 ;
  wire \rdid[25][0]_i_2_n_0 ;
  wire \rdid[25][0]_i_3_n_0 ;
  wire \rdid[26][0]_i_1_n_0 ;
  wire \rdid[26][0]_i_2_n_0 ;
  wire \rdid[27][0]_i_1_n_0 ;
  wire \rdid[27][0]_i_2_n_0 ;
  wire \rdid[27][0]_i_3_n_0 ;
  wire \rdid[27][0]_i_4_n_0 ;
  wire \rdid[28][0]_i_1_n_0 ;
  wire \rdid[28][0]_i_2_n_0 ;
  wire \rdid[29][0]_i_1_n_0 ;
  wire \rdid[29][0]_i_2_n_0 ;
  wire \rdid[2][0]_i_1_n_0 ;
  wire \rdid[2][0]_i_2_n_0 ;
  wire \rdid[2][0]_i_3_n_0 ;
  wire \rdid[2][0]_i_4_n_0 ;
  wire \rdid[30][0]_i_1_n_0 ;
  wire \rdid[30][0]_i_2_n_0 ;
  wire \rdid[31][0]_i_1_n_0 ;
  wire \rdid[31][0]_i_2_n_0 ;
  wire \rdid[3][0]_i_1_n_0 ;
  wire \rdid[3][0]_i_2_n_0 ;
  wire \rdid[3][0]_i_3_n_0 ;
  wire \rdid[3][0]_i_4_n_0 ;
  wire \rdid[3][0]_i_5_n_0 ;
  wire \rdid[4][0]_i_1_n_0 ;
  wire \rdid[4][0]_i_2_n_0 ;
  wire \rdid[4][0]_i_3_n_0 ;
  wire \rdid[5][0]_i_1_n_0 ;
  wire \rdid[5][0]_i_2_n_0 ;
  wire \rdid[5][0]_i_3_n_0 ;
  wire \rdid[5][0]_i_4_n_0 ;
  wire \rdid[5][0]_i_5_n_0 ;
  wire \rdid[5][0]_i_6_n_0 ;
  wire \rdid[6][0]_i_1_n_0 ;
  wire \rdid[6][0]_i_2_n_0 ;
  wire \rdid[6][0]_i_3_n_0 ;
  wire \rdid[7][0]_i_1_n_0 ;
  wire \rdid[7][0]_i_2_n_0 ;
  wire \rdid[8][0]_i_1_n_0 ;
  wire \rdid[8][0]_i_2_n_0 ;
  wire \rdid[8][0]_i_3_n_0 ;
  wire \rdid[9][0]_i_1_n_0 ;
  wire \rdid[9][0]_i_2_n_0 ;
  wire \rdid[9][0]_i_3_n_0 ;
  wire \rdid[9][0]_i_4_n_0 ;
  wire [0:0]\rdid_reg[0]_3 ;
  wire [0:0]\rdid_reg[10]_13 ;
  wire [0:0]\rdid_reg[11]_14 ;
  wire [0:0]\rdid_reg[12]_15 ;
  wire [0:0]\rdid_reg[13]_16 ;
  wire [0:0]\rdid_reg[14]_17 ;
  wire [0:0]\rdid_reg[15]_18 ;
  wire [0:0]\rdid_reg[16]_19 ;
  wire [0:0]\rdid_reg[17]_20 ;
  wire [0:0]\rdid_reg[18]_21 ;
  wire [0:0]\rdid_reg[19]_22 ;
  wire \rdid_reg[1][0]_0 ;
  wire [0:0]\rdid_reg[1]_4 ;
  wire [0:0]\rdid_reg[20]_23 ;
  wire [0:0]\rdid_reg[21]_24 ;
  wire [0:0]\rdid_reg[22]_25 ;
  wire [0:0]\rdid_reg[23]_26 ;
  wire [0:0]\rdid_reg[24]_27 ;
  wire [0:0]\rdid_reg[25]_28 ;
  wire [0:0]\rdid_reg[26]_29 ;
  wire [0:0]\rdid_reg[27]_30 ;
  wire [0:0]\rdid_reg[28]_31 ;
  wire [0:0]\rdid_reg[29]_32 ;
  wire [0:0]\rdid_reg[2]_5 ;
  wire [0:0]\rdid_reg[30]_33 ;
  wire [0:0]\rdid_reg[31]_34 ;
  wire [0:0]\rdid_reg[3]_6 ;
  wire [0:0]\rdid_reg[4]_7 ;
  wire [0:0]\rdid_reg[5]_8 ;
  wire [0:0]\rdid_reg[6]_9 ;
  wire [0:0]\rdid_reg[7]_10 ;
  wire [0:0]\rdid_reg[8]_11 ;
  wire [0:0]\rdid_reg[9]_12 ;
  wire \rdmutex[0]_i_1_n_0 ;
  wire \rdmutex[1]_i_10_n_0 ;
  wire \rdmutex[1]_i_11_n_0 ;
  wire \rdmutex[1]_i_12_n_0 ;
  wire \rdmutex[1]_i_13_n_0 ;
  wire \rdmutex[1]_i_14_n_0 ;
  wire \rdmutex[1]_i_15_n_0 ;
  wire \rdmutex[1]_i_16_n_0 ;
  wire \rdmutex[1]_i_1_n_0 ;
  wire \rdmutex[1]_i_2_n_0 ;
  wire \rdmutex[1]_i_9_n_0 ;
  wire [1:0]\rdmutex_reg[1]_0 ;
  wire \rdmutex_reg[1]_1 ;
  wire [0:0]\rdmutex_reg[1]_2 ;
  wire \rdmutex_reg[1]_i_3_n_0 ;
  wire \rdmutex_reg[1]_i_4_n_0 ;
  wire \rdmutex_reg[1]_i_5_n_0 ;
  wire \rdmutex_reg[1]_i_6_n_0 ;
  wire \rdmutex_reg[1]_i_7_n_0 ;
  wire \rdmutex_reg[1]_i_8_n_0 ;
  wire stateStats;
  wire [0:0]stateStats_reg_0;
  wire \strbRdlock_i[0]_i_1_n_0 ;
  wire \strbRdlock_i[1]_i_1_n_0 ;
  wire \strbRdlock_i[2]_i_1_n_0 ;
  wire \strbRdlock_i[3]_i_1_n_0 ;
  wire \strbRdlock_i[3]_i_2_n_0 ;
  wire strbRdlock_i_1_n_0;
  wire [3:0]strbRdlock_i_reg;
  wire strbRdlock_mclk_i_1_n_0;
  wire strbRdlock_mclk_reg_n_0;
  wire strbRdlock_reg_n_0;
  wire strbRdlock_to_mclk_i_1_n_0;
  wire strbRdlock_to_mclk_reg_n_0;
  wire strbRdlock_to_mclkm1;
  wire strbRdlock_to_mclkm2;
  wire strbRdlock_wait9_out;
  wire strbRdlock_wait_reg_n_0;
  wire strbWrlock;
  wire \strbWrlock_i[0]_i_1_n_0 ;
  wire \strbWrlock_i[1]_i_1_n_0 ;
  wire \strbWrlock_i[2]_i_1_n_0 ;
  wire \strbWrlock_i[3]_i_1_n_0 ;
  wire \strbWrlock_i[3]_i_2_n_0 ;
  wire [3:0]strbWrlock_i_reg;
  wire [0:0]\strbWrlock_i_reg[0]_0 ;
  wire strbWrlock_mclk_i_1_n_0;
  wire strbWrlock_mclk_reg_n_0;
  wire strbWrlock_to_mclk_i_1_n_0;
  wire strbWrlock_to_mclk_reg_n_0;
  wire strbWrlock_to_mclkm1;
  wire strbWrlock_to_mclkm2;
  wire strbWrlock_wait3_out;
  wire strbWrlock_wait_reg_n_0;
  wire tkclk;
  wire wdone_i_1_n_0;
  wire wdone_i_2_n_0;
  wire wdone_reg_n_0;
  wire [0:0]web;
  wire wrAAXI_awvalid;
  wire wrAAXI_wlast;
  wire \wrmutex_reg[1]_0 ;
  wire \wrmutex_reg[1]_1 ;
  wire \wrmutex_reg_n_0_[0] ;
  wire \wrmutex_reg_n_0_[1] ;
  wire [4:0]wtr;
  wire \wtr[0]_i_1_n_0 ;
  wire \wtr[1]_i_1_n_0 ;
  wire \wtr[2]_i_1_n_0 ;
  wire \wtr[3]_i_1_n_0 ;
  wire \wtr[4]_i_1_n_0 ;
  wire \wtr[4]_i_2_n_0 ;
  wire \wtr[4]_i_3_n_0 ;
  wire \wtr[4]_i_4_n_0 ;
  wire \wtr[4]_i_5_n_0 ;
  wire [0:0]\NLW_NRdA_collect_reg[10]_i_2_O_UNCONNECTED ;
  wire [7:4]\NLW_NRdA_collect_reg[31]_i_2_CO_UNCONNECTED ;
  wire [7:5]\NLW_NRdA_collect_reg[31]_i_2_O_UNCONNECTED ;
  wire [0:0]\NLW_NRdB_collect_reg[10]_i_2_O_UNCONNECTED ;
  wire [7:4]\NLW_NRdB_collect_reg[31]_i_2_CO_UNCONNECTED ;
  wire [7:5]\NLW_NRdB_collect_reg[31]_i_2_O_UNCONNECTED ;
  wire [0:0]\NLW_NWrA_collect_reg[10]_i_2_O_UNCONNECTED ;
  wire [7:4]\NLW_NWrA_collect_reg[31]_i_2_CO_UNCONNECTED ;
  wire [7:5]\NLW_NWrA_collect_reg[31]_i_2_O_UNCONNECTED ;
  wire [0:0]\NLW_NWrB_collect_reg[10]_i_2_O_UNCONNECTED ;
  wire [7:4]\NLW_NWrB_collect_reg[31]_i_2_CO_UNCONNECTED ;
  wire [7:5]\NLW_NWrB_collect_reg[31]_i_2_O_UNCONNECTED ;

  (* SOFT_HLUTNM = "soft_lutpair1625" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \FSM_onehot_stateRead[1]_i_1 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .O(\FSM_onehot_stateRead[1]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \FSM_onehot_stateRead[2]_i_1 
       (.I0(\ixRdid[4]_i_1_n_0 ),
        .I1(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .O(\FSM_onehot_stateRead[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1587" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \FSM_onehot_stateRead[2]_i_2 
       (.I0(\rdmutex[1]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .O(\FSM_onehot_stateRead[2]_i_2_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:100,iSTATE0:001,iSTATE1:010," *) 
  FDPE #(
    .INIT(1'b1)) 
    \FSM_onehot_stateRead_reg[0] 
       (.C(memclk),
        .CE(\FSM_onehot_stateRead[2]_i_1_n_0 ),
        .D(1'b0),
        .PRE(\strbWrlock_i_reg[0]_0 ),
        .Q(\FSM_onehot_stateRead_reg_n_0_[0] ));
  (* FSM_ENCODED_STATES = "iSTATE:100,iSTATE0:001,iSTATE1:010," *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateRead_reg[1] 
       (.C(memclk),
        .CE(\FSM_onehot_stateRead[2]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\FSM_onehot_stateRead[1]_i_1_n_0 ),
        .Q(\FSM_onehot_stateRead_reg_n_0_[1] ));
  (* FSM_ENCODED_STATES = "iSTATE:100,iSTATE0:001,iSTATE1:010," *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateRead_reg[2] 
       (.C(memclk),
        .CE(\FSM_onehot_stateRead[2]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .Q(\FSM_onehot_stateRead_reg[2]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1618" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \FSM_onehot_stateWrite[1]_i_1 
       (.I0(ddrAXI_bready_sig),
        .I1(Q[0]),
        .O(\FSM_onehot_stateWrite[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFEAAAAAAAAAAAAA)) 
    \FSM_onehot_stateWrite[2]_i_1 
       (.I0(\FSM_onehot_stateWrite[2]_i_2_n_0 ),
        .I1(ddrAXI_awready),
        .I2(ddrAXI_awvalid),
        .I3(awdone_reg_n_0),
        .I4(Q[1]),
        .I5(\FSM_onehot_stateWrite[2]_i_3_n_0 ),
        .O(\FSM_onehot_stateWrite[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEAEAEAEAEAEAAAEA)) 
    \FSM_onehot_stateWrite[2]_i_2 
       (.I0(ddrAXI_bready_sig),
        .I1(wrAAXI_awvalid),
        .I2(Q[0]),
        .I3(wtr[4]),
        .I4(\wtr[4]_i_4_n_0 ),
        .I5(wtr[3]),
        .O(\FSM_onehot_stateWrite[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFEF0F0F0FFF0F0F0)) 
    \FSM_onehot_stateWrite[2]_i_3 
       (.I0(\wrmutex_reg_n_0_[1] ),
        .I1(wrAAXI_wlast),
        .I2(wdone_reg_n_0),
        .I3(ddrAXI_wready),
        .I4(ddrAXI_wvalid),
        .I5(\wrmutex_reg_n_0_[0] ),
        .O(\FSM_onehot_stateWrite[2]_i_3_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:100,iSTATE0:001,iSTATE1:010," *) 
  FDPE #(
    .INIT(1'b1)) 
    \FSM_onehot_stateWrite_reg[0] 
       (.C(memclk),
        .CE(\FSM_onehot_stateWrite[2]_i_1_n_0 ),
        .D(1'b0),
        .PRE(\strbWrlock_i_reg[0]_0 ),
        .Q(ddrAXI_bready_sig));
  (* FSM_ENCODED_STATES = "iSTATE:100,iSTATE0:001,iSTATE1:010," *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateWrite_reg[1] 
       (.C(memclk),
        .CE(\FSM_onehot_stateWrite[2]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\FSM_onehot_stateWrite[1]_i_1_n_0 ),
        .Q(Q[0]));
  (* FSM_ENCODED_STATES = "iSTATE:100,iSTATE0:001,iSTATE1:010," *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateWrite_reg[2] 
       (.C(memclk),
        .CE(\FSM_onehot_stateWrite[2]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(Q[0]),
        .Q(Q[1]));
  (* SOFT_HLUTNM = "soft_lutpair1598" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \FSM_sequential_stateIgrstr[0]_i_3 
       (.I0(ddrAXI_rlast),
        .I1(\ixRdidEgr_reg[4]_0 ),
        .O(hdrmemAXI_rlast));
  (* SOFT_HLUTNM = "soft_lutpair1598" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \FSM_sequential_stateIgrstr[1]_i_4 
       (.I0(ddrAXI_rvalid),
        .I1(\ixRdidEgr_reg[4]_0 ),
        .I2(\burstIgrstr_reg[0] ),
        .O(ddrAXI_rvalid_0));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[10]_i_1 
       (.I0(plusOp[10]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[10] ),
        .O(\NRdA[10]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[11]_i_1 
       (.I0(plusOp[11]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[11] ),
        .O(\NRdA[11]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[12]_i_1 
       (.I0(plusOp[12]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[12] ),
        .O(\NRdA[12]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[13]_i_1 
       (.I0(plusOp[13]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[13] ),
        .O(\NRdA[13]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[14]_i_1 
       (.I0(plusOp[14]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[14] ),
        .O(\NRdA[14]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[15]_i_1 
       (.I0(plusOp[15]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[15] ),
        .O(\NRdA[15]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[16]_i_1 
       (.I0(plusOp[16]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[16] ),
        .O(\NRdA[16]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[17]_i_1 
       (.I0(plusOp[17]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[17] ),
        .O(\NRdA[17]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[18]_i_1 
       (.I0(plusOp[18]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[18] ),
        .O(\NRdA[18]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[19]_i_1 
       (.I0(plusOp[19]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[19] ),
        .O(\NRdA[19]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[20]_i_1 
       (.I0(plusOp[20]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[20] ),
        .O(\NRdA[20]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[21]_i_1 
       (.I0(plusOp[21]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[21] ),
        .O(\NRdA[21]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[22]_i_1 
       (.I0(plusOp[22]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[22] ),
        .O(\NRdA[22]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[23]_i_1 
       (.I0(plusOp[23]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[23] ),
        .O(\NRdA[23]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[24]_i_1 
       (.I0(plusOp[24]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[24] ),
        .O(\NRdA[24]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[25]_i_1 
       (.I0(plusOp[25]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[25] ),
        .O(\NRdA[25]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[26]_i_1 
       (.I0(plusOp[26]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[26] ),
        .O(\NRdA[26]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[27]_i_1 
       (.I0(plusOp[27]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[27] ),
        .O(\NRdA[27]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[28]_i_1 
       (.I0(plusOp[28]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[28] ),
        .O(\NRdA[28]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[29]_i_1 
       (.I0(plusOp[29]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[29] ),
        .O(\NRdA[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1572" *) 
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[30]_i_1 
       (.I0(plusOp[30]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[30] ),
        .O(\NRdA[30]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000040)) 
    \NRdA[31]_i_1 
       (.I0(\NRdA[31]_i_3_n_0 ),
        .I1(i_reg[10]),
        .I2(i_reg[9]),
        .I3(i_reg[7]),
        .I4(i_reg[3]),
        .I5(\NRdA[31]_i_4_n_0 ),
        .O(NRdA));
  (* SOFT_HLUTNM = "soft_lutpair1571" *) 
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[31]_i_2 
       (.I0(plusOp[31]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[31] ),
        .O(\NRdA[31]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1588" *) 
  LUT4 #(
    .INIT(16'hFFFD)) 
    \NRdA[31]_i_3 
       (.I0(tkclk),
        .I1(stateStats),
        .I2(i_reg[1]),
        .I3(i_reg[0]),
        .O(\NRdA[31]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFB)) 
    \NRdA[31]_i_4 
       (.I0(i_reg[12]),
        .I1(i_reg[4]),
        .I2(i_reg[2]),
        .I3(i_reg[6]),
        .I4(\NRdA[31]_i_5_n_0 ),
        .O(\NRdA[31]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'hFFDF)) 
    \NRdA[31]_i_5 
       (.I0(i_reg[8]),
        .I1(i_reg[5]),
        .I2(i_reg[13]),
        .I3(i_reg[11]),
        .O(\NRdA[31]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[4]_i_1 
       (.I0(plusOp[4]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[4] ),
        .O(\NRdA[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[5]_i_1 
       (.I0(plusOp[5]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[5] ),
        .O(\NRdA[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[6]_i_1 
       (.I0(plusOp[6]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[6] ),
        .O(\NRdA[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[7]_i_1 
       (.I0(plusOp[7]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[7] ),
        .O(\NRdA[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[8]_i_1 
       (.I0(plusOp[8]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[8] ),
        .O(\NRdA[8]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFBF0080)) 
    \NRdA[9]_i_1 
       (.I0(plusOp[9]),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdA_collect_reg_n_0_[9] ),
        .O(\NRdA[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[10]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[10] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[10]),
        .I5(NRdA),
        .O(\NRdA_collect[10]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \NRdA_collect[10]_i_3 
       (.I0(\NRdA_collect_reg_n_0_[4] ),
        .O(\NRdA_collect[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[11]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[11] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[11]),
        .I5(NRdA),
        .O(\NRdA_collect[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[12]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[12] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[12]),
        .I5(NRdA),
        .O(\NRdA_collect[12]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[13]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[13] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[13]),
        .I5(NRdA),
        .O(\NRdA_collect[13]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[14]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[14] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[14]),
        .I5(NRdA),
        .O(\NRdA_collect[14]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[15]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[15] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[15]),
        .I5(NRdA),
        .O(\NRdA_collect[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[16]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[16] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[16]),
        .I5(NRdA),
        .O(\NRdA_collect[16]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[17]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[17] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[17]),
        .I5(NRdA),
        .O(\NRdA_collect[17]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[18]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[18] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[18]),
        .I5(NRdA),
        .O(\NRdA_collect[18]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[19]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[19] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[19]),
        .I5(NRdA),
        .O(\NRdA_collect[19]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[20]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[20] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[20]),
        .I5(NRdA),
        .O(\NRdA_collect[20]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[21]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[21] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[21]),
        .I5(NRdA),
        .O(\NRdA_collect[21]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[22]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[22] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[22]),
        .I5(NRdA),
        .O(\NRdA_collect[22]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[23]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[23] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[23]),
        .I5(NRdA),
        .O(\NRdA_collect[23]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[24]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[24] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[24]),
        .I5(NRdA),
        .O(\NRdA_collect[24]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[25]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[25] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[25]),
        .I5(NRdA),
        .O(\NRdA_collect[25]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[26]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[26] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[26]),
        .I5(NRdA),
        .O(\NRdA_collect[26]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[27]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[27] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[27]),
        .I5(NRdA),
        .O(\NRdA_collect[27]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[28]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[28] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[28]),
        .I5(NRdA),
        .O(\NRdA_collect[28]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[29]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[29] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[29]),
        .I5(NRdA),
        .O(\NRdA_collect[29]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[30]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[30] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[30]),
        .I5(NRdA),
        .O(\NRdA_collect[30]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[31]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[31] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[31]),
        .I5(NRdA),
        .O(\NRdA_collect[31]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[4]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[4] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[4]),
        .I5(NRdA),
        .O(\NRdA_collect[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[5]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[5] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[5]),
        .I5(NRdA),
        .O(\NRdA_collect[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[6]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[6] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[6]),
        .I5(NRdA),
        .O(\NRdA_collect[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[7]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[7] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[7]),
        .I5(NRdA),
        .O(\NRdA_collect[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[8]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[8] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[8]),
        .I5(NRdA),
        .O(\NRdA_collect[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BAAA8AAA)) 
    \NRdA_collect[9]_i_1 
       (.I0(\NRdA_collect_reg_n_0_[9] ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(plusOp[9]),
        .I5(NRdA),
        .O(\NRdA_collect[9]_i_1_n_0 ));
  FDCE \NRdA_collect_reg[10] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[10]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[10] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NRdA_collect_reg[10]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NRdA_collect_reg[10]_i_2_n_0 ,\NRdA_collect_reg[10]_i_2_n_1 ,\NRdA_collect_reg[10]_i_2_n_2 ,\NRdA_collect_reg[10]_i_2_n_3 ,\NRdA_collect_reg[10]_i_2_n_4 ,\NRdA_collect_reg[10]_i_2_n_5 ,\NRdA_collect_reg[10]_i_2_n_6 ,\NRdA_collect_reg[10]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\NRdA_collect_reg_n_0_[4] ,1'b0}),
        .O({plusOp[10:4],\NLW_NRdA_collect_reg[10]_i_2_O_UNCONNECTED [0]}),
        .S({\NRdA_collect_reg_n_0_[10] ,\NRdA_collect_reg_n_0_[9] ,\NRdA_collect_reg_n_0_[8] ,\NRdA_collect_reg_n_0_[7] ,\NRdA_collect_reg_n_0_[6] ,\NRdA_collect_reg_n_0_[5] ,\NRdA_collect[10]_i_3_n_0 ,1'b0}));
  FDCE \NRdA_collect_reg[11] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[11]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[11] ));
  FDCE \NRdA_collect_reg[12] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[12]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[12] ));
  FDCE \NRdA_collect_reg[13] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[13]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[13] ));
  FDCE \NRdA_collect_reg[14] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[14]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[14] ));
  FDCE \NRdA_collect_reg[15] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[15]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[15] ));
  FDCE \NRdA_collect_reg[16] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[16]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[16] ));
  FDCE \NRdA_collect_reg[17] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[17]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[17] ));
  FDCE \NRdA_collect_reg[18] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[18]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[18] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NRdA_collect_reg[18]_i_2 
       (.CI(\NRdA_collect_reg[10]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NRdA_collect_reg[18]_i_2_n_0 ,\NRdA_collect_reg[18]_i_2_n_1 ,\NRdA_collect_reg[18]_i_2_n_2 ,\NRdA_collect_reg[18]_i_2_n_3 ,\NRdA_collect_reg[18]_i_2_n_4 ,\NRdA_collect_reg[18]_i_2_n_5 ,\NRdA_collect_reg[18]_i_2_n_6 ,\NRdA_collect_reg[18]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(plusOp[18:11]),
        .S({\NRdA_collect_reg_n_0_[18] ,\NRdA_collect_reg_n_0_[17] ,\NRdA_collect_reg_n_0_[16] ,\NRdA_collect_reg_n_0_[15] ,\NRdA_collect_reg_n_0_[14] ,\NRdA_collect_reg_n_0_[13] ,\NRdA_collect_reg_n_0_[12] ,\NRdA_collect_reg_n_0_[11] }));
  FDCE \NRdA_collect_reg[19] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[19]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[19] ));
  FDCE \NRdA_collect_reg[20] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[20]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[20] ));
  FDCE \NRdA_collect_reg[21] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[21]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[21] ));
  FDCE \NRdA_collect_reg[22] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[22]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[22] ));
  FDCE \NRdA_collect_reg[23] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[23]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[23] ));
  FDCE \NRdA_collect_reg[24] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[24]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[24] ));
  FDCE \NRdA_collect_reg[25] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[25]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[25] ));
  FDCE \NRdA_collect_reg[26] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[26]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[26] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NRdA_collect_reg[26]_i_2 
       (.CI(\NRdA_collect_reg[18]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NRdA_collect_reg[26]_i_2_n_0 ,\NRdA_collect_reg[26]_i_2_n_1 ,\NRdA_collect_reg[26]_i_2_n_2 ,\NRdA_collect_reg[26]_i_2_n_3 ,\NRdA_collect_reg[26]_i_2_n_4 ,\NRdA_collect_reg[26]_i_2_n_5 ,\NRdA_collect_reg[26]_i_2_n_6 ,\NRdA_collect_reg[26]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(plusOp[26:19]),
        .S({\NRdA_collect_reg_n_0_[26] ,\NRdA_collect_reg_n_0_[25] ,\NRdA_collect_reg_n_0_[24] ,\NRdA_collect_reg_n_0_[23] ,\NRdA_collect_reg_n_0_[22] ,\NRdA_collect_reg_n_0_[21] ,\NRdA_collect_reg_n_0_[20] ,\NRdA_collect_reg_n_0_[19] }));
  FDCE \NRdA_collect_reg[27] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[27]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[27] ));
  FDCE \NRdA_collect_reg[28] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[28]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[28] ));
  FDCE \NRdA_collect_reg[29] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[29]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[29] ));
  FDCE \NRdA_collect_reg[30] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[30]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[30] ));
  FDCE \NRdA_collect_reg[31] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[31]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[31] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NRdA_collect_reg[31]_i_2 
       (.CI(\NRdA_collect_reg[26]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_NRdA_collect_reg[31]_i_2_CO_UNCONNECTED [7:4],\NRdA_collect_reg[31]_i_2_n_4 ,\NRdA_collect_reg[31]_i_2_n_5 ,\NRdA_collect_reg[31]_i_2_n_6 ,\NRdA_collect_reg[31]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_NRdA_collect_reg[31]_i_2_O_UNCONNECTED [7:5],plusOp[31:27]}),
        .S({1'b0,1'b0,1'b0,\NRdA_collect_reg_n_0_[31] ,\NRdA_collect_reg_n_0_[30] ,\NRdA_collect_reg_n_0_[29] ,\NRdA_collect_reg_n_0_[28] ,\NRdA_collect_reg_n_0_[27] }));
  FDCE \NRdA_collect_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[4]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[4] ));
  FDCE \NRdA_collect_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[5]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[5] ));
  FDCE \NRdA_collect_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[6]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[6] ));
  FDCE \NRdA_collect_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[7]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[7] ));
  FDCE \NRdA_collect_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[8]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[8] ));
  FDCE \NRdA_collect_reg[9] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdA_collect[9]_i_1_n_0 ),
        .Q(\NRdA_collect_reg_n_0_[9] ));
  FDCE \NRdA_reg[10] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[10]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [6]));
  FDCE \NRdA_reg[11] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[11]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [7]));
  FDCE \NRdA_reg[12] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[12]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [8]));
  FDCE \NRdA_reg[13] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[13]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [9]));
  FDCE \NRdA_reg[14] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[14]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [10]));
  FDCE \NRdA_reg[15] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[15]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [11]));
  FDCE \NRdA_reg[16] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[16]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [12]));
  FDCE \NRdA_reg[17] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[17]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [13]));
  FDCE \NRdA_reg[18] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[18]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [14]));
  FDCE \NRdA_reg[19] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[19]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [15]));
  FDCE \NRdA_reg[20] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[20]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [16]));
  FDCE \NRdA_reg[21] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[21]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [17]));
  FDCE \NRdA_reg[22] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[22]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [18]));
  FDCE \NRdA_reg[23] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[23]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [19]));
  FDCE \NRdA_reg[24] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[24]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [20]));
  FDCE \NRdA_reg[25] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[25]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [21]));
  FDCE \NRdA_reg[26] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[26]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [22]));
  FDCE \NRdA_reg[27] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[27]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [23]));
  FDCE \NRdA_reg[28] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[28]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [24]));
  FDCE \NRdA_reg[29] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[29]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [25]));
  FDCE \NRdA_reg[30] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[30]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [26]));
  FDCE \NRdA_reg[31] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[31]_i_2_n_0 ),
        .Q(\NRdA_reg[31]_0 [27]));
  FDCE \NRdA_reg[4] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[4]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [0]));
  FDCE \NRdA_reg[5] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[5]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [1]));
  FDCE \NRdA_reg[6] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[6]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [2]));
  FDCE \NRdA_reg[7] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[7]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [3]));
  FDCE \NRdA_reg[8] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[8]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [4]));
  FDCE \NRdA_reg[9] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdA[9]_i_1_n_0 ),
        .Q(\NRdA_reg[31]_0 [5]));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[10]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[10] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[10]_i_2_n_8 ),
        .O(\NRdB[10]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[11]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[11] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[18]_i_2_n_15 ),
        .O(\NRdB[11]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[12]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[12] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[18]_i_2_n_14 ),
        .O(\NRdB[12]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[13]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[13] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[18]_i_2_n_13 ),
        .O(\NRdB[13]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[14]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[14] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[18]_i_2_n_12 ),
        .O(\NRdB[14]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[15]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[15] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[18]_i_2_n_11 ),
        .O(\NRdB[15]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[16]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[16] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[18]_i_2_n_10 ),
        .O(\NRdB[16]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[17]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[17] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[18]_i_2_n_9 ),
        .O(\NRdB[17]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[18]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[18] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[18]_i_2_n_8 ),
        .O(\NRdB[18]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[19]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[19] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[26]_i_2_n_15 ),
        .O(\NRdB[19]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[20]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[20] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[26]_i_2_n_14 ),
        .O(\NRdB[20]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[21]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[21] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[26]_i_2_n_13 ),
        .O(\NRdB[21]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[22]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[22] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[26]_i_2_n_12 ),
        .O(\NRdB[22]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[23]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[23] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[26]_i_2_n_11 ),
        .O(\NRdB[23]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[24]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[24] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[26]_i_2_n_10 ),
        .O(\NRdB[24]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[25]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[25] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[26]_i_2_n_9 ),
        .O(\NRdB[25]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[26]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[26] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[26]_i_2_n_8 ),
        .O(\NRdB[26]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[27]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[27] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[31]_i_2_n_15 ),
        .O(\NRdB[27]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[28]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[28] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[31]_i_2_n_14 ),
        .O(\NRdB[28]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[29]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[29] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[31]_i_2_n_13 ),
        .O(\NRdB[29]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[30]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[30] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[31]_i_2_n_12 ),
        .O(\NRdB[30]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[31]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[31] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[31]_i_2_n_11 ),
        .O(\NRdB[31]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[4]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[4] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[10]_i_2_n_14 ),
        .O(\NRdB[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[5]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[5] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[10]_i_2_n_13 ),
        .O(\NRdB[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[6]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[6] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[10]_i_2_n_12 ),
        .O(\NRdB[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[7]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[7] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[10]_i_2_n_11 ),
        .O(\NRdB[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[8]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[8] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[10]_i_2_n_10 ),
        .O(\NRdB[8]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NRdB[9]_i_1 
       (.I0(\NRdB_collect_reg_n_0_[9] ),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(\rdmutex_reg[1]_0 [1]),
        .I4(\NRdB_collect_reg[10]_i_2_n_9 ),
        .O(\NRdB[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[10]_i_1 
       (.I0(\NRdB_collect_reg[10]_i_2_n_8 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[10] ),
        .I5(NRdA),
        .O(\NRdB_collect[10]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \NRdB_collect[10]_i_3 
       (.I0(\NRdB_collect_reg_n_0_[4] ),
        .O(\NRdB_collect[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[11]_i_1 
       (.I0(\NRdB_collect_reg[18]_i_2_n_15 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[11] ),
        .I5(NRdA),
        .O(\NRdB_collect[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[12]_i_1 
       (.I0(\NRdB_collect_reg[18]_i_2_n_14 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[12] ),
        .I5(NRdA),
        .O(\NRdB_collect[12]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[13]_i_1 
       (.I0(\NRdB_collect_reg[18]_i_2_n_13 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[13] ),
        .I5(NRdA),
        .O(\NRdB_collect[13]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[14]_i_1 
       (.I0(\NRdB_collect_reg[18]_i_2_n_12 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[14] ),
        .I5(NRdA),
        .O(\NRdB_collect[14]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[15]_i_1 
       (.I0(\NRdB_collect_reg[18]_i_2_n_11 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[15] ),
        .I5(NRdA),
        .O(\NRdB_collect[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[16]_i_1 
       (.I0(\NRdB_collect_reg[18]_i_2_n_10 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[16] ),
        .I5(NRdA),
        .O(\NRdB_collect[16]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[17]_i_1 
       (.I0(\NRdB_collect_reg[18]_i_2_n_9 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[17] ),
        .I5(NRdA),
        .O(\NRdB_collect[17]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[18]_i_1 
       (.I0(\NRdB_collect_reg[18]_i_2_n_8 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[18] ),
        .I5(NRdA),
        .O(\NRdB_collect[18]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[19]_i_1 
       (.I0(\NRdB_collect_reg[26]_i_2_n_15 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[19] ),
        .I5(NRdA),
        .O(\NRdB_collect[19]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[20]_i_1 
       (.I0(\NRdB_collect_reg[26]_i_2_n_14 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[20] ),
        .I5(NRdA),
        .O(\NRdB_collect[20]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[21]_i_1 
       (.I0(\NRdB_collect_reg[26]_i_2_n_13 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[21] ),
        .I5(NRdA),
        .O(\NRdB_collect[21]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[22]_i_1 
       (.I0(\NRdB_collect_reg[26]_i_2_n_12 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[22] ),
        .I5(NRdA),
        .O(\NRdB_collect[22]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[23]_i_1 
       (.I0(\NRdB_collect_reg[26]_i_2_n_11 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[23] ),
        .I5(NRdA),
        .O(\NRdB_collect[23]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[24]_i_1 
       (.I0(\NRdB_collect_reg[26]_i_2_n_10 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[24] ),
        .I5(NRdA),
        .O(\NRdB_collect[24]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[25]_i_1 
       (.I0(\NRdB_collect_reg[26]_i_2_n_9 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[25] ),
        .I5(NRdA),
        .O(\NRdB_collect[25]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[26]_i_1 
       (.I0(\NRdB_collect_reg[26]_i_2_n_8 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[26] ),
        .I5(NRdA),
        .O(\NRdB_collect[26]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[27]_i_1 
       (.I0(\NRdB_collect_reg[31]_i_2_n_15 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[27] ),
        .I5(NRdA),
        .O(\NRdB_collect[27]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[28]_i_1 
       (.I0(\NRdB_collect_reg[31]_i_2_n_14 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[28] ),
        .I5(NRdA),
        .O(\NRdB_collect[28]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[29]_i_1 
       (.I0(\NRdB_collect_reg[31]_i_2_n_13 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[29] ),
        .I5(NRdA),
        .O(\NRdB_collect[29]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[30]_i_1 
       (.I0(\NRdB_collect_reg[31]_i_2_n_12 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[30] ),
        .I5(NRdA),
        .O(\NRdB_collect[30]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[31]_i_1 
       (.I0(\NRdB_collect_reg[31]_i_2_n_11 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[31] ),
        .I5(NRdA),
        .O(\NRdB_collect[31]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[4]_i_1 
       (.I0(\NRdB_collect_reg[10]_i_2_n_14 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[4] ),
        .I5(NRdA),
        .O(\NRdB_collect[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[5]_i_1 
       (.I0(\NRdB_collect_reg[10]_i_2_n_13 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[5] ),
        .I5(NRdA),
        .O(\NRdB_collect[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[6]_i_1 
       (.I0(\NRdB_collect_reg[10]_i_2_n_12 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[6] ),
        .I5(NRdA),
        .O(\NRdB_collect[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[7]_i_1 
       (.I0(\NRdB_collect_reg[10]_i_2_n_11 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[7] ),
        .I5(NRdA),
        .O(\NRdB_collect[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[8]_i_1 
       (.I0(\NRdB_collect_reg[10]_i_2_n_10 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[8] ),
        .I5(NRdA),
        .O(\NRdB_collect[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NRdB_collect[9]_i_1 
       (.I0(\NRdB_collect_reg[10]_i_2_n_9 ),
        .I1(\rdmutex_reg[1]_0 [1]),
        .I2(\rdmutex_reg[1]_0 [0]),
        .I3(strbRdlock_mclk_reg_n_0),
        .I4(\NRdB_collect_reg_n_0_[9] ),
        .I5(NRdA),
        .O(\NRdB_collect[9]_i_1_n_0 ));
  FDCE \NRdB_collect_reg[10] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[10]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[10] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NRdB_collect_reg[10]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NRdB_collect_reg[10]_i_2_n_0 ,\NRdB_collect_reg[10]_i_2_n_1 ,\NRdB_collect_reg[10]_i_2_n_2 ,\NRdB_collect_reg[10]_i_2_n_3 ,\NRdB_collect_reg[10]_i_2_n_4 ,\NRdB_collect_reg[10]_i_2_n_5 ,\NRdB_collect_reg[10]_i_2_n_6 ,\NRdB_collect_reg[10]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\NRdB_collect_reg_n_0_[4] ,1'b0}),
        .O({\NRdB_collect_reg[10]_i_2_n_8 ,\NRdB_collect_reg[10]_i_2_n_9 ,\NRdB_collect_reg[10]_i_2_n_10 ,\NRdB_collect_reg[10]_i_2_n_11 ,\NRdB_collect_reg[10]_i_2_n_12 ,\NRdB_collect_reg[10]_i_2_n_13 ,\NRdB_collect_reg[10]_i_2_n_14 ,\NLW_NRdB_collect_reg[10]_i_2_O_UNCONNECTED [0]}),
        .S({\NRdB_collect_reg_n_0_[10] ,\NRdB_collect_reg_n_0_[9] ,\NRdB_collect_reg_n_0_[8] ,\NRdB_collect_reg_n_0_[7] ,\NRdB_collect_reg_n_0_[6] ,\NRdB_collect_reg_n_0_[5] ,\NRdB_collect[10]_i_3_n_0 ,1'b0}));
  FDCE \NRdB_collect_reg[11] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[11]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[11] ));
  FDCE \NRdB_collect_reg[12] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[12]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[12] ));
  FDCE \NRdB_collect_reg[13] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[13]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[13] ));
  FDCE \NRdB_collect_reg[14] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[14]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[14] ));
  FDCE \NRdB_collect_reg[15] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[15]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[15] ));
  FDCE \NRdB_collect_reg[16] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[16]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[16] ));
  FDCE \NRdB_collect_reg[17] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[17]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[17] ));
  FDCE \NRdB_collect_reg[18] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[18]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[18] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NRdB_collect_reg[18]_i_2 
       (.CI(\NRdB_collect_reg[10]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NRdB_collect_reg[18]_i_2_n_0 ,\NRdB_collect_reg[18]_i_2_n_1 ,\NRdB_collect_reg[18]_i_2_n_2 ,\NRdB_collect_reg[18]_i_2_n_3 ,\NRdB_collect_reg[18]_i_2_n_4 ,\NRdB_collect_reg[18]_i_2_n_5 ,\NRdB_collect_reg[18]_i_2_n_6 ,\NRdB_collect_reg[18]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NRdB_collect_reg[18]_i_2_n_8 ,\NRdB_collect_reg[18]_i_2_n_9 ,\NRdB_collect_reg[18]_i_2_n_10 ,\NRdB_collect_reg[18]_i_2_n_11 ,\NRdB_collect_reg[18]_i_2_n_12 ,\NRdB_collect_reg[18]_i_2_n_13 ,\NRdB_collect_reg[18]_i_2_n_14 ,\NRdB_collect_reg[18]_i_2_n_15 }),
        .S({\NRdB_collect_reg_n_0_[18] ,\NRdB_collect_reg_n_0_[17] ,\NRdB_collect_reg_n_0_[16] ,\NRdB_collect_reg_n_0_[15] ,\NRdB_collect_reg_n_0_[14] ,\NRdB_collect_reg_n_0_[13] ,\NRdB_collect_reg_n_0_[12] ,\NRdB_collect_reg_n_0_[11] }));
  FDCE \NRdB_collect_reg[19] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[19]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[19] ));
  FDCE \NRdB_collect_reg[20] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[20]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[20] ));
  FDCE \NRdB_collect_reg[21] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[21]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[21] ));
  FDCE \NRdB_collect_reg[22] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[22]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[22] ));
  FDCE \NRdB_collect_reg[23] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[23]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[23] ));
  FDCE \NRdB_collect_reg[24] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[24]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[24] ));
  FDCE \NRdB_collect_reg[25] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[25]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[25] ));
  FDCE \NRdB_collect_reg[26] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[26]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[26] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NRdB_collect_reg[26]_i_2 
       (.CI(\NRdB_collect_reg[18]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NRdB_collect_reg[26]_i_2_n_0 ,\NRdB_collect_reg[26]_i_2_n_1 ,\NRdB_collect_reg[26]_i_2_n_2 ,\NRdB_collect_reg[26]_i_2_n_3 ,\NRdB_collect_reg[26]_i_2_n_4 ,\NRdB_collect_reg[26]_i_2_n_5 ,\NRdB_collect_reg[26]_i_2_n_6 ,\NRdB_collect_reg[26]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NRdB_collect_reg[26]_i_2_n_8 ,\NRdB_collect_reg[26]_i_2_n_9 ,\NRdB_collect_reg[26]_i_2_n_10 ,\NRdB_collect_reg[26]_i_2_n_11 ,\NRdB_collect_reg[26]_i_2_n_12 ,\NRdB_collect_reg[26]_i_2_n_13 ,\NRdB_collect_reg[26]_i_2_n_14 ,\NRdB_collect_reg[26]_i_2_n_15 }),
        .S({\NRdB_collect_reg_n_0_[26] ,\NRdB_collect_reg_n_0_[25] ,\NRdB_collect_reg_n_0_[24] ,\NRdB_collect_reg_n_0_[23] ,\NRdB_collect_reg_n_0_[22] ,\NRdB_collect_reg_n_0_[21] ,\NRdB_collect_reg_n_0_[20] ,\NRdB_collect_reg_n_0_[19] }));
  FDCE \NRdB_collect_reg[27] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[27]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[27] ));
  FDCE \NRdB_collect_reg[28] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[28]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[28] ));
  FDCE \NRdB_collect_reg[29] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[29]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[29] ));
  FDCE \NRdB_collect_reg[30] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[30]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[30] ));
  FDCE \NRdB_collect_reg[31] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[31]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[31] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NRdB_collect_reg[31]_i_2 
       (.CI(\NRdB_collect_reg[26]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_NRdB_collect_reg[31]_i_2_CO_UNCONNECTED [7:4],\NRdB_collect_reg[31]_i_2_n_4 ,\NRdB_collect_reg[31]_i_2_n_5 ,\NRdB_collect_reg[31]_i_2_n_6 ,\NRdB_collect_reg[31]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_NRdB_collect_reg[31]_i_2_O_UNCONNECTED [7:5],\NRdB_collect_reg[31]_i_2_n_11 ,\NRdB_collect_reg[31]_i_2_n_12 ,\NRdB_collect_reg[31]_i_2_n_13 ,\NRdB_collect_reg[31]_i_2_n_14 ,\NRdB_collect_reg[31]_i_2_n_15 }),
        .S({1'b0,1'b0,1'b0,\NRdB_collect_reg_n_0_[31] ,\NRdB_collect_reg_n_0_[30] ,\NRdB_collect_reg_n_0_[29] ,\NRdB_collect_reg_n_0_[28] ,\NRdB_collect_reg_n_0_[27] }));
  FDCE \NRdB_collect_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[4]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[4] ));
  FDCE \NRdB_collect_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[5]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[5] ));
  FDCE \NRdB_collect_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[6]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[6] ));
  FDCE \NRdB_collect_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[7]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[7] ));
  FDCE \NRdB_collect_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[8]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[8] ));
  FDCE \NRdB_collect_reg[9] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NRdB_collect[9]_i_1_n_0 ),
        .Q(\NRdB_collect_reg_n_0_[9] ));
  FDCE \NRdB_reg[10] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[10]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [6]));
  FDCE \NRdB_reg[11] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[11]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [7]));
  FDCE \NRdB_reg[12] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[12]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [8]));
  FDCE \NRdB_reg[13] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[13]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [9]));
  FDCE \NRdB_reg[14] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[14]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [10]));
  FDCE \NRdB_reg[15] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[15]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [11]));
  FDCE \NRdB_reg[16] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[16]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [12]));
  FDCE \NRdB_reg[17] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[17]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [13]));
  FDCE \NRdB_reg[18] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[18]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [14]));
  FDCE \NRdB_reg[19] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[19]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [15]));
  FDCE \NRdB_reg[20] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[20]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [16]));
  FDCE \NRdB_reg[21] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[21]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [17]));
  FDCE \NRdB_reg[22] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[22]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [18]));
  FDCE \NRdB_reg[23] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[23]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [19]));
  FDCE \NRdB_reg[24] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[24]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [20]));
  FDCE \NRdB_reg[25] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[25]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [21]));
  FDCE \NRdB_reg[26] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[26]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [22]));
  FDCE \NRdB_reg[27] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[27]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [23]));
  FDCE \NRdB_reg[28] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[28]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [24]));
  FDCE \NRdB_reg[29] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[29]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [25]));
  FDCE \NRdB_reg[30] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[30]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [26]));
  FDCE \NRdB_reg[31] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[31]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [27]));
  FDCE \NRdB_reg[4] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[4]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [0]));
  FDCE \NRdB_reg[5] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[5]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [1]));
  FDCE \NRdB_reg[6] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[6]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [2]));
  FDCE \NRdB_reg[7] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[7]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [3]));
  FDCE \NRdB_reg[8] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[8]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [4]));
  FDCE \NRdB_reg[9] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NRdB[9]_i_1_n_0 ),
        .Q(\NRdB_reg[31]_0 [5]));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[10]_i_1 
       (.I0(\NWrA_collect_reg[10]_i_2_n_8 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[10] ),
        .O(\NWrA[10]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[11]_i_1 
       (.I0(\NWrA_collect_reg[18]_i_2_n_15 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[11] ),
        .O(\NWrA[11]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[12]_i_1 
       (.I0(\NWrA_collect_reg[18]_i_2_n_14 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[12] ),
        .O(\NWrA[12]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[13]_i_1 
       (.I0(\NWrA_collect_reg[18]_i_2_n_13 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[13] ),
        .O(\NWrA[13]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[14]_i_1 
       (.I0(\NWrA_collect_reg[18]_i_2_n_12 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[14] ),
        .O(\NWrA[14]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[15]_i_1 
       (.I0(\NWrA_collect_reg[18]_i_2_n_11 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[15] ),
        .O(\NWrA[15]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[16]_i_1 
       (.I0(\NWrA_collect_reg[18]_i_2_n_10 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[16] ),
        .O(\NWrA[16]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[17]_i_1 
       (.I0(\NWrA_collect_reg[18]_i_2_n_9 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[17] ),
        .O(\NWrA[17]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[18]_i_1 
       (.I0(\NWrA_collect_reg[18]_i_2_n_8 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[18] ),
        .O(\NWrA[18]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[19]_i_1 
       (.I0(\NWrA_collect_reg[26]_i_2_n_15 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[19] ),
        .O(\NWrA[19]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[20]_i_1 
       (.I0(\NWrA_collect_reg[26]_i_2_n_14 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[20] ),
        .O(\NWrA[20]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[21]_i_1 
       (.I0(\NWrA_collect_reg[26]_i_2_n_13 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[21] ),
        .O(\NWrA[21]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[22]_i_1 
       (.I0(\NWrA_collect_reg[26]_i_2_n_12 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[22] ),
        .O(\NWrA[22]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[23]_i_1 
       (.I0(\NWrA_collect_reg[26]_i_2_n_11 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[23] ),
        .O(\NWrA[23]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[24]_i_1 
       (.I0(\NWrA_collect_reg[26]_i_2_n_10 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[24] ),
        .O(\NWrA[24]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[25]_i_1 
       (.I0(\NWrA_collect_reg[26]_i_2_n_9 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[25] ),
        .O(\NWrA[25]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[26]_i_1 
       (.I0(\NWrA_collect_reg[26]_i_2_n_8 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[26] ),
        .O(\NWrA[26]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[27]_i_1 
       (.I0(\NWrA_collect_reg[31]_i_2_n_15 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[27] ),
        .O(\NWrA[27]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[28]_i_1 
       (.I0(\NWrA_collect_reg[31]_i_2_n_14 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[28] ),
        .O(\NWrA[28]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[29]_i_1 
       (.I0(\NWrA_collect_reg[31]_i_2_n_13 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[29] ),
        .O(\NWrA[29]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[30]_i_1 
       (.I0(\NWrA_collect_reg[31]_i_2_n_12 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[30] ),
        .O(\NWrA[30]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[31]_i_1 
       (.I0(\NWrA_collect_reg[31]_i_2_n_11 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[31] ),
        .O(\NWrA[31]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[4]_i_1 
       (.I0(\NWrA_collect_reg[10]_i_2_n_14 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[4] ),
        .O(\NWrA[4]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[5]_i_1 
       (.I0(\NWrA_collect_reg[10]_i_2_n_13 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[5] ),
        .O(\NWrA[5]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[6]_i_1 
       (.I0(\NWrA_collect_reg[10]_i_2_n_12 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[6] ),
        .O(\NWrA[6]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[7]_i_1 
       (.I0(\NWrA_collect_reg[10]_i_2_n_11 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[7] ),
        .O(\NWrA[7]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[8]_i_1 
       (.I0(\NWrA_collect_reg[10]_i_2_n_10 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[8] ),
        .O(\NWrA[8]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFB08)) 
    \NWrA[9]_i_1 
       (.I0(\NWrA_collect_reg[10]_i_2_n_9 ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg[1]_0 ),
        .I3(\NWrA_collect_reg_n_0_[9] ),
        .O(\NWrA[9]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[10]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[10] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[10]_i_2_n_8 ),
        .I4(NRdA),
        .O(\NWrA_collect[10]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \NWrA_collect[10]_i_3 
       (.I0(\NWrA_collect_reg_n_0_[4] ),
        .O(\NWrA_collect[10]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[11]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[11] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[18]_i_2_n_15 ),
        .I4(NRdA),
        .O(\NWrA_collect[11]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[12]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[12] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[18]_i_2_n_14 ),
        .I4(NRdA),
        .O(\NWrA_collect[12]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[13]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[13] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[18]_i_2_n_13 ),
        .I4(NRdA),
        .O(\NWrA_collect[13]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[14]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[14] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[18]_i_2_n_12 ),
        .I4(NRdA),
        .O(\NWrA_collect[14]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[15]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[15] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[18]_i_2_n_11 ),
        .I4(NRdA),
        .O(\NWrA_collect[15]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[16]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[16] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[18]_i_2_n_10 ),
        .I4(NRdA),
        .O(\NWrA_collect[16]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[17]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[17] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[18]_i_2_n_9 ),
        .I4(NRdA),
        .O(\NWrA_collect[17]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[18]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[18] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[18]_i_2_n_8 ),
        .I4(NRdA),
        .O(\NWrA_collect[18]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[19]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[19] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[26]_i_2_n_15 ),
        .I4(NRdA),
        .O(\NWrA_collect[19]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[20]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[20] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[26]_i_2_n_14 ),
        .I4(NRdA),
        .O(\NWrA_collect[20]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[21]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[21] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[26]_i_2_n_13 ),
        .I4(NRdA),
        .O(\NWrA_collect[21]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[22]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[22] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[26]_i_2_n_12 ),
        .I4(NRdA),
        .O(\NWrA_collect[22]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[23]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[23] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[26]_i_2_n_11 ),
        .I4(NRdA),
        .O(\NWrA_collect[23]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[24]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[24] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[26]_i_2_n_10 ),
        .I4(NRdA),
        .O(\NWrA_collect[24]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[25]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[25] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[26]_i_2_n_9 ),
        .I4(NRdA),
        .O(\NWrA_collect[25]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[26]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[26] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[26]_i_2_n_8 ),
        .I4(NRdA),
        .O(\NWrA_collect[26]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[27]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[27] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[31]_i_2_n_15 ),
        .I4(NRdA),
        .O(\NWrA_collect[27]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[28]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[28] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[31]_i_2_n_14 ),
        .I4(NRdA),
        .O(\NWrA_collect[28]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[29]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[29] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[31]_i_2_n_13 ),
        .I4(NRdA),
        .O(\NWrA_collect[29]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[30]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[30] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[31]_i_2_n_12 ),
        .I4(NRdA),
        .O(\NWrA_collect[30]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[31]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[31] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[31]_i_2_n_11 ),
        .I4(NRdA),
        .O(\NWrA_collect[31]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[4]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[4] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[10]_i_2_n_14 ),
        .I4(NRdA),
        .O(\NWrA_collect[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[5]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[5] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[10]_i_2_n_13 ),
        .I4(NRdA),
        .O(\NWrA_collect[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[6]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[6] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[10]_i_2_n_12 ),
        .I4(NRdA),
        .O(\NWrA_collect[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[7]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[7] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[10]_i_2_n_11 ),
        .I4(NRdA),
        .O(\NWrA_collect[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[8]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[8] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[10]_i_2_n_10 ),
        .I4(NRdA),
        .O(\NWrA_collect[8]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \NWrA_collect[9]_i_1 
       (.I0(\NWrA_collect_reg_n_0_[9] ),
        .I1(\wrmutex_reg[1]_0 ),
        .I2(strbWrlock_mclk_reg_n_0),
        .I3(\NWrA_collect_reg[10]_i_2_n_9 ),
        .I4(NRdA),
        .O(\NWrA_collect[9]_i_1_n_0 ));
  FDCE \NWrA_collect_reg[10] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[10]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[10] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NWrA_collect_reg[10]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NWrA_collect_reg[10]_i_2_n_0 ,\NWrA_collect_reg[10]_i_2_n_1 ,\NWrA_collect_reg[10]_i_2_n_2 ,\NWrA_collect_reg[10]_i_2_n_3 ,\NWrA_collect_reg[10]_i_2_n_4 ,\NWrA_collect_reg[10]_i_2_n_5 ,\NWrA_collect_reg[10]_i_2_n_6 ,\NWrA_collect_reg[10]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\NWrA_collect_reg_n_0_[4] ,1'b0}),
        .O({\NWrA_collect_reg[10]_i_2_n_8 ,\NWrA_collect_reg[10]_i_2_n_9 ,\NWrA_collect_reg[10]_i_2_n_10 ,\NWrA_collect_reg[10]_i_2_n_11 ,\NWrA_collect_reg[10]_i_2_n_12 ,\NWrA_collect_reg[10]_i_2_n_13 ,\NWrA_collect_reg[10]_i_2_n_14 ,\NLW_NWrA_collect_reg[10]_i_2_O_UNCONNECTED [0]}),
        .S({\NWrA_collect_reg_n_0_[10] ,\NWrA_collect_reg_n_0_[9] ,\NWrA_collect_reg_n_0_[8] ,\NWrA_collect_reg_n_0_[7] ,\NWrA_collect_reg_n_0_[6] ,\NWrA_collect_reg_n_0_[5] ,\NWrA_collect[10]_i_3_n_0 ,1'b0}));
  FDCE \NWrA_collect_reg[11] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[11]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[11] ));
  FDCE \NWrA_collect_reg[12] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[12]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[12] ));
  FDCE \NWrA_collect_reg[13] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[13]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[13] ));
  FDCE \NWrA_collect_reg[14] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[14]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[14] ));
  FDCE \NWrA_collect_reg[15] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[15]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[15] ));
  FDCE \NWrA_collect_reg[16] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[16]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[16] ));
  FDCE \NWrA_collect_reg[17] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[17]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[17] ));
  FDCE \NWrA_collect_reg[18] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[18]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[18] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NWrA_collect_reg[18]_i_2 
       (.CI(\NWrA_collect_reg[10]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NWrA_collect_reg[18]_i_2_n_0 ,\NWrA_collect_reg[18]_i_2_n_1 ,\NWrA_collect_reg[18]_i_2_n_2 ,\NWrA_collect_reg[18]_i_2_n_3 ,\NWrA_collect_reg[18]_i_2_n_4 ,\NWrA_collect_reg[18]_i_2_n_5 ,\NWrA_collect_reg[18]_i_2_n_6 ,\NWrA_collect_reg[18]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NWrA_collect_reg[18]_i_2_n_8 ,\NWrA_collect_reg[18]_i_2_n_9 ,\NWrA_collect_reg[18]_i_2_n_10 ,\NWrA_collect_reg[18]_i_2_n_11 ,\NWrA_collect_reg[18]_i_2_n_12 ,\NWrA_collect_reg[18]_i_2_n_13 ,\NWrA_collect_reg[18]_i_2_n_14 ,\NWrA_collect_reg[18]_i_2_n_15 }),
        .S({\NWrA_collect_reg_n_0_[18] ,\NWrA_collect_reg_n_0_[17] ,\NWrA_collect_reg_n_0_[16] ,\NWrA_collect_reg_n_0_[15] ,\NWrA_collect_reg_n_0_[14] ,\NWrA_collect_reg_n_0_[13] ,\NWrA_collect_reg_n_0_[12] ,\NWrA_collect_reg_n_0_[11] }));
  FDCE \NWrA_collect_reg[19] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[19]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[19] ));
  FDCE \NWrA_collect_reg[20] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[20]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[20] ));
  FDCE \NWrA_collect_reg[21] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[21]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[21] ));
  FDCE \NWrA_collect_reg[22] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[22]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[22] ));
  FDCE \NWrA_collect_reg[23] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[23]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[23] ));
  FDCE \NWrA_collect_reg[24] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[24]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[24] ));
  FDCE \NWrA_collect_reg[25] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[25]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[25] ));
  FDCE \NWrA_collect_reg[26] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[26]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[26] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NWrA_collect_reg[26]_i_2 
       (.CI(\NWrA_collect_reg[18]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NWrA_collect_reg[26]_i_2_n_0 ,\NWrA_collect_reg[26]_i_2_n_1 ,\NWrA_collect_reg[26]_i_2_n_2 ,\NWrA_collect_reg[26]_i_2_n_3 ,\NWrA_collect_reg[26]_i_2_n_4 ,\NWrA_collect_reg[26]_i_2_n_5 ,\NWrA_collect_reg[26]_i_2_n_6 ,\NWrA_collect_reg[26]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NWrA_collect_reg[26]_i_2_n_8 ,\NWrA_collect_reg[26]_i_2_n_9 ,\NWrA_collect_reg[26]_i_2_n_10 ,\NWrA_collect_reg[26]_i_2_n_11 ,\NWrA_collect_reg[26]_i_2_n_12 ,\NWrA_collect_reg[26]_i_2_n_13 ,\NWrA_collect_reg[26]_i_2_n_14 ,\NWrA_collect_reg[26]_i_2_n_15 }),
        .S({\NWrA_collect_reg_n_0_[26] ,\NWrA_collect_reg_n_0_[25] ,\NWrA_collect_reg_n_0_[24] ,\NWrA_collect_reg_n_0_[23] ,\NWrA_collect_reg_n_0_[22] ,\NWrA_collect_reg_n_0_[21] ,\NWrA_collect_reg_n_0_[20] ,\NWrA_collect_reg_n_0_[19] }));
  FDCE \NWrA_collect_reg[27] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[27]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[27] ));
  FDCE \NWrA_collect_reg[28] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[28]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[28] ));
  FDCE \NWrA_collect_reg[29] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[29]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[29] ));
  FDCE \NWrA_collect_reg[30] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[30]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[30] ));
  FDCE \NWrA_collect_reg[31] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[31]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[31] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NWrA_collect_reg[31]_i_2 
       (.CI(\NWrA_collect_reg[26]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_NWrA_collect_reg[31]_i_2_CO_UNCONNECTED [7:4],\NWrA_collect_reg[31]_i_2_n_4 ,\NWrA_collect_reg[31]_i_2_n_5 ,\NWrA_collect_reg[31]_i_2_n_6 ,\NWrA_collect_reg[31]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_NWrA_collect_reg[31]_i_2_O_UNCONNECTED [7:5],\NWrA_collect_reg[31]_i_2_n_11 ,\NWrA_collect_reg[31]_i_2_n_12 ,\NWrA_collect_reg[31]_i_2_n_13 ,\NWrA_collect_reg[31]_i_2_n_14 ,\NWrA_collect_reg[31]_i_2_n_15 }),
        .S({1'b0,1'b0,1'b0,\NWrA_collect_reg_n_0_[31] ,\NWrA_collect_reg_n_0_[30] ,\NWrA_collect_reg_n_0_[29] ,\NWrA_collect_reg_n_0_[28] ,\NWrA_collect_reg_n_0_[27] }));
  FDCE \NWrA_collect_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[4]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[4] ));
  FDCE \NWrA_collect_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[5]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[5] ));
  FDCE \NWrA_collect_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[6]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[6] ));
  FDCE \NWrA_collect_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[7]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[7] ));
  FDCE \NWrA_collect_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[8]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[8] ));
  FDCE \NWrA_collect_reg[9] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrA_collect[9]_i_1_n_0 ),
        .Q(\NWrA_collect_reg_n_0_[9] ));
  FDCE \NWrA_reg[10] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[10]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [6]));
  FDCE \NWrA_reg[11] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[11]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [7]));
  FDCE \NWrA_reg[12] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[12]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [8]));
  FDCE \NWrA_reg[13] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[13]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [9]));
  FDCE \NWrA_reg[14] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[14]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [10]));
  FDCE \NWrA_reg[15] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[15]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [11]));
  FDCE \NWrA_reg[16] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[16]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [12]));
  FDCE \NWrA_reg[17] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[17]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [13]));
  FDCE \NWrA_reg[18] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[18]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [14]));
  FDCE \NWrA_reg[19] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[19]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [15]));
  FDCE \NWrA_reg[20] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[20]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [16]));
  FDCE \NWrA_reg[21] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[21]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [17]));
  FDCE \NWrA_reg[22] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[22]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [18]));
  FDCE \NWrA_reg[23] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[23]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [19]));
  FDCE \NWrA_reg[24] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[24]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [20]));
  FDCE \NWrA_reg[25] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[25]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [21]));
  FDCE \NWrA_reg[26] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[26]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [22]));
  FDCE \NWrA_reg[27] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[27]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [23]));
  FDCE \NWrA_reg[28] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[28]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [24]));
  FDCE \NWrA_reg[29] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[29]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [25]));
  FDCE \NWrA_reg[30] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[30]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [26]));
  FDCE \NWrA_reg[31] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[31]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [27]));
  FDCE \NWrA_reg[4] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[4]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [0]));
  FDCE \NWrA_reg[5] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[5]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [1]));
  FDCE \NWrA_reg[6] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[6]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [2]));
  FDCE \NWrA_reg[7] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[7]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [3]));
  FDCE \NWrA_reg[8] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[8]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [4]));
  FDCE \NWrA_reg[9] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrA[9]_i_1_n_0 ),
        .Q(\NWrA_reg[31]_0 [5]));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[10]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[10] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[10]_i_2_n_8 ),
        .O(\NWrB[10]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[11]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[11] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[18]_i_2_n_15 ),
        .O(\NWrB[11]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[12]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[12] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[18]_i_2_n_14 ),
        .O(\NWrB[12]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[13]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[13] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[18]_i_2_n_13 ),
        .O(\NWrB[13]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[14]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[14] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[18]_i_2_n_12 ),
        .O(\NWrB[14]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[15]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[15] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[18]_i_2_n_11 ),
        .O(\NWrB[15]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[16]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[16] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[18]_i_2_n_10 ),
        .O(\NWrB[16]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[17]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[17] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[18]_i_2_n_9 ),
        .O(\NWrB[17]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[18]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[18] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[18]_i_2_n_8 ),
        .O(\NWrB[18]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[19]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[19] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[26]_i_2_n_15 ),
        .O(\NWrB[19]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[20]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[20] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[26]_i_2_n_14 ),
        .O(\NWrB[20]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[21]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[21] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[26]_i_2_n_13 ),
        .O(\NWrB[21]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[22]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[22] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[26]_i_2_n_12 ),
        .O(\NWrB[22]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[23]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[23] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[26]_i_2_n_11 ),
        .O(\NWrB[23]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[24]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[24] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[26]_i_2_n_10 ),
        .O(\NWrB[24]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[25]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[25] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[26]_i_2_n_9 ),
        .O(\NWrB[25]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[26]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[26] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[26]_i_2_n_8 ),
        .O(\NWrB[26]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[27]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[27] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[31]_i_2_n_15 ),
        .O(\NWrB[27]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[28]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[28] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[31]_i_2_n_14 ),
        .O(\NWrB[28]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[29]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[29] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[31]_i_2_n_13 ),
        .O(\NWrB[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1586" *) 
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[30]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[30] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[31]_i_2_n_12 ),
        .O(\NWrB[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1585" *) 
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[31]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[31] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[31]_i_2_n_11 ),
        .O(\NWrB[31]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[4]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[4] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[10]_i_2_n_14 ),
        .O(\NWrB[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[5]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[5] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[10]_i_2_n_13 ),
        .O(\NWrB[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[6]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[6] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[10]_i_2_n_12 ),
        .O(\NWrB[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[7]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[7] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[10]_i_2_n_11 ),
        .O(\NWrB[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[8]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[8] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[10]_i_2_n_10 ),
        .O(\NWrB[8]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hAEAAA2AA)) 
    \NWrB[9]_i_1 
       (.I0(\NWrB_collect_reg_n_0_[9] ),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(\wrmutex_reg_n_0_[1] ),
        .I4(\NWrB_collect_reg[10]_i_2_n_9 ),
        .O(\NWrB[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[10]_i_1 
       (.I0(\NWrB_collect_reg[10]_i_2_n_8 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[10] ),
        .I5(NRdA),
        .O(\NWrB_collect[10]_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \NWrB_collect[10]_i_3 
       (.I0(\NWrB_collect_reg_n_0_[4] ),
        .O(\NWrB_collect[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[11]_i_1 
       (.I0(\NWrB_collect_reg[18]_i_2_n_15 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[11] ),
        .I5(NRdA),
        .O(\NWrB_collect[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[12]_i_1 
       (.I0(\NWrB_collect_reg[18]_i_2_n_14 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[12] ),
        .I5(NRdA),
        .O(\NWrB_collect[12]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[13]_i_1 
       (.I0(\NWrB_collect_reg[18]_i_2_n_13 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[13] ),
        .I5(NRdA),
        .O(\NWrB_collect[13]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[14]_i_1 
       (.I0(\NWrB_collect_reg[18]_i_2_n_12 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[14] ),
        .I5(NRdA),
        .O(\NWrB_collect[14]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[15]_i_1 
       (.I0(\NWrB_collect_reg[18]_i_2_n_11 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[15] ),
        .I5(NRdA),
        .O(\NWrB_collect[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[16]_i_1 
       (.I0(\NWrB_collect_reg[18]_i_2_n_10 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[16] ),
        .I5(NRdA),
        .O(\NWrB_collect[16]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[17]_i_1 
       (.I0(\NWrB_collect_reg[18]_i_2_n_9 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[17] ),
        .I5(NRdA),
        .O(\NWrB_collect[17]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[18]_i_1 
       (.I0(\NWrB_collect_reg[18]_i_2_n_8 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[18] ),
        .I5(NRdA),
        .O(\NWrB_collect[18]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[19]_i_1 
       (.I0(\NWrB_collect_reg[26]_i_2_n_15 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[19] ),
        .I5(NRdA),
        .O(\NWrB_collect[19]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[20]_i_1 
       (.I0(\NWrB_collect_reg[26]_i_2_n_14 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[20] ),
        .I5(NRdA),
        .O(\NWrB_collect[20]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[21]_i_1 
       (.I0(\NWrB_collect_reg[26]_i_2_n_13 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[21] ),
        .I5(NRdA),
        .O(\NWrB_collect[21]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[22]_i_1 
       (.I0(\NWrB_collect_reg[26]_i_2_n_12 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[22] ),
        .I5(NRdA),
        .O(\NWrB_collect[22]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[23]_i_1 
       (.I0(\NWrB_collect_reg[26]_i_2_n_11 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[23] ),
        .I5(NRdA),
        .O(\NWrB_collect[23]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[24]_i_1 
       (.I0(\NWrB_collect_reg[26]_i_2_n_10 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[24] ),
        .I5(NRdA),
        .O(\NWrB_collect[24]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[25]_i_1 
       (.I0(\NWrB_collect_reg[26]_i_2_n_9 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[25] ),
        .I5(NRdA),
        .O(\NWrB_collect[25]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[26]_i_1 
       (.I0(\NWrB_collect_reg[26]_i_2_n_8 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[26] ),
        .I5(NRdA),
        .O(\NWrB_collect[26]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[27]_i_1 
       (.I0(\NWrB_collect_reg[31]_i_2_n_15 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[27] ),
        .I5(NRdA),
        .O(\NWrB_collect[27]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[28]_i_1 
       (.I0(\NWrB_collect_reg[31]_i_2_n_14 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[28] ),
        .I5(NRdA),
        .O(\NWrB_collect[28]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[29]_i_1 
       (.I0(\NWrB_collect_reg[31]_i_2_n_13 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[29] ),
        .I5(NRdA),
        .O(\NWrB_collect[29]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[30]_i_1 
       (.I0(\NWrB_collect_reg[31]_i_2_n_12 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[30] ),
        .I5(NRdA),
        .O(\NWrB_collect[30]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[31]_i_1 
       (.I0(\NWrB_collect_reg[31]_i_2_n_11 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[31] ),
        .I5(NRdA),
        .O(\NWrB_collect[31]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[4]_i_1 
       (.I0(\NWrB_collect_reg[10]_i_2_n_14 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[4] ),
        .I5(NRdA),
        .O(\NWrB_collect[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[5]_i_1 
       (.I0(\NWrB_collect_reg[10]_i_2_n_13 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[5] ),
        .I5(NRdA),
        .O(\NWrB_collect[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[6]_i_1 
       (.I0(\NWrB_collect_reg[10]_i_2_n_12 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[6] ),
        .I5(NRdA),
        .O(\NWrB_collect[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[7]_i_1 
       (.I0(\NWrB_collect_reg[10]_i_2_n_11 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[7] ),
        .I5(NRdA),
        .O(\NWrB_collect[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[8]_i_1 
       (.I0(\NWrB_collect_reg[10]_i_2_n_10 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[8] ),
        .I5(NRdA),
        .O(\NWrB_collect[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FBFF0800)) 
    \NWrB_collect[9]_i_1 
       (.I0(\NWrB_collect_reg[10]_i_2_n_9 ),
        .I1(\wrmutex_reg_n_0_[1] ),
        .I2(\wrmutex_reg_n_0_[0] ),
        .I3(strbWrlock_mclk_reg_n_0),
        .I4(\NWrB_collect_reg_n_0_[9] ),
        .I5(NRdA),
        .O(\NWrB_collect[9]_i_1_n_0 ));
  FDCE \NWrB_collect_reg[10] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[10]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[10] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NWrB_collect_reg[10]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NWrB_collect_reg[10]_i_2_n_0 ,\NWrB_collect_reg[10]_i_2_n_1 ,\NWrB_collect_reg[10]_i_2_n_2 ,\NWrB_collect_reg[10]_i_2_n_3 ,\NWrB_collect_reg[10]_i_2_n_4 ,\NWrB_collect_reg[10]_i_2_n_5 ,\NWrB_collect_reg[10]_i_2_n_6 ,\NWrB_collect_reg[10]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\NWrB_collect_reg_n_0_[4] ,1'b0}),
        .O({\NWrB_collect_reg[10]_i_2_n_8 ,\NWrB_collect_reg[10]_i_2_n_9 ,\NWrB_collect_reg[10]_i_2_n_10 ,\NWrB_collect_reg[10]_i_2_n_11 ,\NWrB_collect_reg[10]_i_2_n_12 ,\NWrB_collect_reg[10]_i_2_n_13 ,\NWrB_collect_reg[10]_i_2_n_14 ,\NLW_NWrB_collect_reg[10]_i_2_O_UNCONNECTED [0]}),
        .S({\NWrB_collect_reg_n_0_[10] ,\NWrB_collect_reg_n_0_[9] ,\NWrB_collect_reg_n_0_[8] ,\NWrB_collect_reg_n_0_[7] ,\NWrB_collect_reg_n_0_[6] ,\NWrB_collect_reg_n_0_[5] ,\NWrB_collect[10]_i_3_n_0 ,1'b0}));
  FDCE \NWrB_collect_reg[11] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[11]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[11] ));
  FDCE \NWrB_collect_reg[12] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[12]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[12] ));
  FDCE \NWrB_collect_reg[13] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[13]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[13] ));
  FDCE \NWrB_collect_reg[14] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[14]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[14] ));
  FDCE \NWrB_collect_reg[15] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[15]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[15] ));
  FDCE \NWrB_collect_reg[16] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[16]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[16] ));
  FDCE \NWrB_collect_reg[17] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[17]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[17] ));
  FDCE \NWrB_collect_reg[18] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[18]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[18] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NWrB_collect_reg[18]_i_2 
       (.CI(\NWrB_collect_reg[10]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NWrB_collect_reg[18]_i_2_n_0 ,\NWrB_collect_reg[18]_i_2_n_1 ,\NWrB_collect_reg[18]_i_2_n_2 ,\NWrB_collect_reg[18]_i_2_n_3 ,\NWrB_collect_reg[18]_i_2_n_4 ,\NWrB_collect_reg[18]_i_2_n_5 ,\NWrB_collect_reg[18]_i_2_n_6 ,\NWrB_collect_reg[18]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NWrB_collect_reg[18]_i_2_n_8 ,\NWrB_collect_reg[18]_i_2_n_9 ,\NWrB_collect_reg[18]_i_2_n_10 ,\NWrB_collect_reg[18]_i_2_n_11 ,\NWrB_collect_reg[18]_i_2_n_12 ,\NWrB_collect_reg[18]_i_2_n_13 ,\NWrB_collect_reg[18]_i_2_n_14 ,\NWrB_collect_reg[18]_i_2_n_15 }),
        .S({\NWrB_collect_reg_n_0_[18] ,\NWrB_collect_reg_n_0_[17] ,\NWrB_collect_reg_n_0_[16] ,\NWrB_collect_reg_n_0_[15] ,\NWrB_collect_reg_n_0_[14] ,\NWrB_collect_reg_n_0_[13] ,\NWrB_collect_reg_n_0_[12] ,\NWrB_collect_reg_n_0_[11] }));
  FDCE \NWrB_collect_reg[19] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[19]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[19] ));
  FDCE \NWrB_collect_reg[20] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[20]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[20] ));
  FDCE \NWrB_collect_reg[21] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[21]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[21] ));
  FDCE \NWrB_collect_reg[22] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[22]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[22] ));
  FDCE \NWrB_collect_reg[23] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[23]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[23] ));
  FDCE \NWrB_collect_reg[24] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[24]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[24] ));
  FDCE \NWrB_collect_reg[25] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[25]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[25] ));
  FDCE \NWrB_collect_reg[26] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[26]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[26] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NWrB_collect_reg[26]_i_2 
       (.CI(\NWrB_collect_reg[18]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NWrB_collect_reg[26]_i_2_n_0 ,\NWrB_collect_reg[26]_i_2_n_1 ,\NWrB_collect_reg[26]_i_2_n_2 ,\NWrB_collect_reg[26]_i_2_n_3 ,\NWrB_collect_reg[26]_i_2_n_4 ,\NWrB_collect_reg[26]_i_2_n_5 ,\NWrB_collect_reg[26]_i_2_n_6 ,\NWrB_collect_reg[26]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NWrB_collect_reg[26]_i_2_n_8 ,\NWrB_collect_reg[26]_i_2_n_9 ,\NWrB_collect_reg[26]_i_2_n_10 ,\NWrB_collect_reg[26]_i_2_n_11 ,\NWrB_collect_reg[26]_i_2_n_12 ,\NWrB_collect_reg[26]_i_2_n_13 ,\NWrB_collect_reg[26]_i_2_n_14 ,\NWrB_collect_reg[26]_i_2_n_15 }),
        .S({\NWrB_collect_reg_n_0_[26] ,\NWrB_collect_reg_n_0_[25] ,\NWrB_collect_reg_n_0_[24] ,\NWrB_collect_reg_n_0_[23] ,\NWrB_collect_reg_n_0_[22] ,\NWrB_collect_reg_n_0_[21] ,\NWrB_collect_reg_n_0_[20] ,\NWrB_collect_reg_n_0_[19] }));
  FDCE \NWrB_collect_reg[27] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[27]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[27] ));
  FDCE \NWrB_collect_reg[28] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[28]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[28] ));
  FDCE \NWrB_collect_reg[29] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[29]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[29] ));
  FDCE \NWrB_collect_reg[30] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[30]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[30] ));
  FDCE \NWrB_collect_reg[31] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[31]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[31] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \NWrB_collect_reg[31]_i_2 
       (.CI(\NWrB_collect_reg[26]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_NWrB_collect_reg[31]_i_2_CO_UNCONNECTED [7:4],\NWrB_collect_reg[31]_i_2_n_4 ,\NWrB_collect_reg[31]_i_2_n_5 ,\NWrB_collect_reg[31]_i_2_n_6 ,\NWrB_collect_reg[31]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_NWrB_collect_reg[31]_i_2_O_UNCONNECTED [7:5],\NWrB_collect_reg[31]_i_2_n_11 ,\NWrB_collect_reg[31]_i_2_n_12 ,\NWrB_collect_reg[31]_i_2_n_13 ,\NWrB_collect_reg[31]_i_2_n_14 ,\NWrB_collect_reg[31]_i_2_n_15 }),
        .S({1'b0,1'b0,1'b0,\NWrB_collect_reg_n_0_[31] ,\NWrB_collect_reg_n_0_[30] ,\NWrB_collect_reg_n_0_[29] ,\NWrB_collect_reg_n_0_[28] ,\NWrB_collect_reg_n_0_[27] }));
  FDCE \NWrB_collect_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[4]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[4] ));
  FDCE \NWrB_collect_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[5]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[5] ));
  FDCE \NWrB_collect_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[6]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[6] ));
  FDCE \NWrB_collect_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[7]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[7] ));
  FDCE \NWrB_collect_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[8]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[8] ));
  FDCE \NWrB_collect_reg[9] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(\NWrB_collect[9]_i_1_n_0 ),
        .Q(\NWrB_collect_reg_n_0_[9] ));
  FDCE \NWrB_reg[10] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[10]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [6]));
  FDCE \NWrB_reg[11] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[11]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [7]));
  FDCE \NWrB_reg[12] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[12]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [8]));
  FDCE \NWrB_reg[13] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[13]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [9]));
  FDCE \NWrB_reg[14] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[14]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [10]));
  FDCE \NWrB_reg[15] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[15]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [11]));
  FDCE \NWrB_reg[16] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[16]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [12]));
  FDCE \NWrB_reg[17] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[17]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [13]));
  FDCE \NWrB_reg[18] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[18]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [14]));
  FDCE \NWrB_reg[19] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[19]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [15]));
  FDCE \NWrB_reg[20] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[20]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [16]));
  FDCE \NWrB_reg[21] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[21]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [17]));
  FDCE \NWrB_reg[22] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[22]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [18]));
  FDCE \NWrB_reg[23] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[23]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [19]));
  FDCE \NWrB_reg[24] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[24]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [20]));
  FDCE \NWrB_reg[25] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[25]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [21]));
  FDCE \NWrB_reg[26] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[26]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [22]));
  FDCE \NWrB_reg[27] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[27]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [23]));
  FDCE \NWrB_reg[28] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[28]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [24]));
  FDCE \NWrB_reg[29] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[29]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [25]));
  FDCE \NWrB_reg[30] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[30]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [26]));
  FDCE \NWrB_reg[31] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[31]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [27]));
  FDCE \NWrB_reg[4] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[4]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [0]));
  FDCE \NWrB_reg[5] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[5]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [1]));
  FDCE \NWrB_reg[6] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[6]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [2]));
  FDCE \NWrB_reg[7] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[7]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [3]));
  FDCE \NWrB_reg[8] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[8]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [4]));
  FDCE \NWrB_reg[9] 
       (.C(aclk_sig),
        .CE(NRdA),
        .CLR(AR),
        .D(\NWrB[9]_i_1_n_0 ),
        .Q(\NWrB_reg[31]_0 [5]));
  (* SOFT_HLUTNM = "soft_lutpair1624" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \aRowbufBEgrstr[8]_i_3 
       (.I0(\wrmutex_reg[1]_1 ),
        .I1(ddrAXI_wready),
        .I2(egrAXIS_tlast),
        .O(ddrAXI_wready_0));
  LUT6 #(
    .INIT(64'h000000000000FF20)) 
    awdone_i_1
       (.I0(ddrAXI_awready),
        .I1(\wrmutex_reg[1]_1 ),
        .I2(wrAAXI_awvalid),
        .I3(awdone_reg_n_0),
        .I4(ddrAXI_bready_sig),
        .I5(Q[0]),
        .O(awdone_i_1_n_0));
  FDCE awdone_reg
       (.C(memclk),
        .CE(wdone_i_1_n_0),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(awdone_i_1_n_0),
        .Q(awdone_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1602" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[10]_INST_0 
       (.I0(rdAAXI_araddr[2]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[2]));
  (* SOFT_HLUTNM = "soft_lutpair1602" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[11]_INST_0 
       (.I0(rdAAXI_araddr[3]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[3]));
  (* SOFT_HLUTNM = "soft_lutpair1603" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[12]_INST_0 
       (.I0(rdAAXI_araddr[4]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[4]));
  (* SOFT_HLUTNM = "soft_lutpair1603" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[13]_INST_0 
       (.I0(rdAAXI_araddr[5]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[5]));
  (* SOFT_HLUTNM = "soft_lutpair1604" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[14]_INST_0 
       (.I0(rdAAXI_araddr[6]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[6]));
  (* SOFT_HLUTNM = "soft_lutpair1604" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[15]_INST_0 
       (.I0(rdAAXI_araddr[7]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[7]));
  (* SOFT_HLUTNM = "soft_lutpair1605" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[16]_INST_0 
       (.I0(rdAAXI_araddr[8]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[8]));
  (* SOFT_HLUTNM = "soft_lutpair1605" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[17]_INST_0 
       (.I0(rdAAXI_araddr[9]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[9]));
  (* SOFT_HLUTNM = "soft_lutpair1606" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[18]_INST_0 
       (.I0(rdAAXI_araddr[10]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[10]));
  (* SOFT_HLUTNM = "soft_lutpair1606" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[19]_INST_0 
       (.I0(rdAAXI_araddr[11]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[11]));
  (* SOFT_HLUTNM = "soft_lutpair1607" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[20]_INST_0 
       (.I0(rdAAXI_araddr[12]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[12]));
  (* SOFT_HLUTNM = "soft_lutpair1607" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[21]_INST_0 
       (.I0(rdAAXI_araddr[13]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[13]));
  (* SOFT_HLUTNM = "soft_lutpair1608" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[22]_INST_0 
       (.I0(rdAAXI_araddr[14]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[14]));
  (* SOFT_HLUTNM = "soft_lutpair1608" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[23]_INST_0 
       (.I0(rdAAXI_araddr[15]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[15]));
  (* SOFT_HLUTNM = "soft_lutpair1609" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[24]_INST_0 
       (.I0(rdAAXI_araddr[16]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[16]));
  (* SOFT_HLUTNM = "soft_lutpair1609" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[25]_INST_0 
       (.I0(rdAAXI_araddr[17]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[17]));
  (* SOFT_HLUTNM = "soft_lutpair1610" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[26]_INST_0 
       (.I0(rdAAXI_araddr[18]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[18]));
  (* SOFT_HLUTNM = "soft_lutpair1610" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[27]_INST_0 
       (.I0(rdAAXI_araddr[19]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[19]));
  (* SOFT_HLUTNM = "soft_lutpair1572" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \ddrAXI_araddr[28]_INST_0 
       (.I0(\rdmutex_reg[1]_0 [1]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .O(ddrAXI_araddr[20]));
  (* SOFT_HLUTNM = "soft_lutpair1601" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[8]_INST_0 
       (.I0(rdAAXI_araddr[0]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[0]));
  (* SOFT_HLUTNM = "soft_lutpair1601" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \ddrAXI_araddr[9]_INST_0 
       (.I0(rdAAXI_araddr[1]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(ddrAXI_araddr[1]));
  LUT2 #(
    .INIT(4'hB)) 
    \ddrAXI_awaddr[27]_INST_0_i_1 
       (.I0(\wrmutex_reg_n_0_[1] ),
        .I1(\wrmutex_reg_n_0_[0] ),
        .O(\wrmutex_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1585" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \ddrAXI_awaddr[28]_INST_0 
       (.I0(\wrmutex_reg_n_0_[1] ),
        .I1(\wrmutex_reg_n_0_[0] ),
        .O(ddrAXI_awaddr));
  LUT6 #(
    .INIT(64'h0000447F0000CCFF)) 
    ddrAXI_bready_sig_i_1
       (.I0(ddrAXI_bready_sig_i_2_n_0),
        .I1(ddrAXI_bready_sig_reg_0),
        .I2(ddrAXI_bvalid),
        .I3(ddrAXI_bready_sig_i_3_n_0),
        .I4(ddrAXI_bready_sig),
        .I5(ddrAXI_bready_sig_i_4_n_0),
        .O(ddrAXI_bready_sig_i_1_n_0));
  LUT6 #(
    .INIT(64'h00000000FFFFFFFE)) 
    ddrAXI_bready_sig_i_2
       (.I0(wtr[4]),
        .I1(wtr[3]),
        .I2(wtr[2]),
        .I3(wtr[0]),
        .I4(wtr[1]),
        .I5(\wtr[4]_i_3_n_0 ),
        .O(ddrAXI_bready_sig_i_2_n_0));
  LUT6 #(
    .INIT(64'h00010000FFFFFFFF)) 
    ddrAXI_bready_sig_i_3
       (.I0(wtr[3]),
        .I1(wtr[1]),
        .I2(wtr[0]),
        .I3(wtr[2]),
        .I4(wtr[4]),
        .I5(D[0]),
        .O(ddrAXI_bready_sig_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1584" *) 
  LUT5 #(
    .INIT(32'h00000010)) 
    ddrAXI_bready_sig_i_4
       (.I0(wtr[3]),
        .I1(wtr[4]),
        .I2(wtr[0]),
        .I3(wtr[1]),
        .I4(wtr[2]),
        .O(ddrAXI_bready_sig_i_4_n_0));
  FDCE ddrAXI_bready_sig_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(ddrAXI_bready_sig_i_1_n_0),
        .Q(ddrAXI_bready_sig_reg_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    ddrAXI_rready_INST_0_i_1
       (.I0(ddrAXI_rready_INST_0_i_2_n_0),
        .I1(ddrAXI_rready_INST_0_i_3_n_0),
        .I2(ixRdidEgr__0[4]),
        .I3(ddrAXI_rready_INST_0_i_4_n_0),
        .I4(ixRdidEgr__0[3]),
        .I5(ddrAXI_rready_INST_0_i_5_n_0),
        .O(\ixRdidEgr_reg[4]_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    ddrAXI_rready_INST_0_i_10
       (.I0(\rdid_reg[11]_14 ),
        .I1(\rdid_reg[10]_13 ),
        .I2(ixRdidEgr__0[1]),
        .I3(\rdid_reg[9]_12 ),
        .I4(ixRdidEgr__0[0]),
        .I5(\rdid_reg[8]_11 ),
        .O(ddrAXI_rready_INST_0_i_10_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    ddrAXI_rready_INST_0_i_11
       (.I0(\rdid_reg[15]_18 ),
        .I1(\rdid_reg[14]_17 ),
        .I2(ixRdidEgr__0[1]),
        .I3(\rdid_reg[13]_16 ),
        .I4(ixRdidEgr__0[0]),
        .I5(\rdid_reg[12]_15 ),
        .O(ddrAXI_rready_INST_0_i_11_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    ddrAXI_rready_INST_0_i_12
       (.I0(\rdid_reg[3]_6 ),
        .I1(\rdid_reg[2]_5 ),
        .I2(ixRdidEgr__0[1]),
        .I3(\rdid_reg[1]_4 ),
        .I4(ixRdidEgr__0[0]),
        .I5(\rdid_reg[0]_3 ),
        .O(ddrAXI_rready_INST_0_i_12_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    ddrAXI_rready_INST_0_i_13
       (.I0(\rdid_reg[7]_10 ),
        .I1(\rdid_reg[6]_9 ),
        .I2(ixRdidEgr__0[1]),
        .I3(\rdid_reg[5]_8 ),
        .I4(ixRdidEgr__0[0]),
        .I5(\rdid_reg[4]_7 ),
        .O(ddrAXI_rready_INST_0_i_13_n_0));
  MUXF7 ddrAXI_rready_INST_0_i_2
       (.I0(ddrAXI_rready_INST_0_i_6_n_0),
        .I1(ddrAXI_rready_INST_0_i_7_n_0),
        .O(ddrAXI_rready_INST_0_i_2_n_0),
        .S(ixRdidEgr__0[2]));
  MUXF7 ddrAXI_rready_INST_0_i_3
       (.I0(ddrAXI_rready_INST_0_i_8_n_0),
        .I1(ddrAXI_rready_INST_0_i_9_n_0),
        .O(ddrAXI_rready_INST_0_i_3_n_0),
        .S(ixRdidEgr__0[2]));
  MUXF7 ddrAXI_rready_INST_0_i_4
       (.I0(ddrAXI_rready_INST_0_i_10_n_0),
        .I1(ddrAXI_rready_INST_0_i_11_n_0),
        .O(ddrAXI_rready_INST_0_i_4_n_0),
        .S(ixRdidEgr__0[2]));
  MUXF7 ddrAXI_rready_INST_0_i_5
       (.I0(ddrAXI_rready_INST_0_i_12_n_0),
        .I1(ddrAXI_rready_INST_0_i_13_n_0),
        .O(ddrAXI_rready_INST_0_i_5_n_0),
        .S(ixRdidEgr__0[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    ddrAXI_rready_INST_0_i_6
       (.I0(\rdid_reg[27]_30 ),
        .I1(\rdid_reg[26]_29 ),
        .I2(ixRdidEgr__0[1]),
        .I3(\rdid_reg[25]_28 ),
        .I4(ixRdidEgr__0[0]),
        .I5(\rdid_reg[24]_27 ),
        .O(ddrAXI_rready_INST_0_i_6_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    ddrAXI_rready_INST_0_i_7
       (.I0(\rdid_reg[31]_34 ),
        .I1(\rdid_reg[30]_33 ),
        .I2(ixRdidEgr__0[1]),
        .I3(\rdid_reg[29]_32 ),
        .I4(ixRdidEgr__0[0]),
        .I5(\rdid_reg[28]_31 ),
        .O(ddrAXI_rready_INST_0_i_7_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    ddrAXI_rready_INST_0_i_8
       (.I0(\rdid_reg[19]_22 ),
        .I1(\rdid_reg[18]_21 ),
        .I2(ixRdidEgr__0[1]),
        .I3(\rdid_reg[17]_20 ),
        .I4(ixRdidEgr__0[0]),
        .I5(\rdid_reg[16]_19 ),
        .O(ddrAXI_rready_INST_0_i_8_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    ddrAXI_rready_INST_0_i_9
       (.I0(\rdid_reg[23]_26 ),
        .I1(\rdid_reg[22]_25 ),
        .I2(ixRdidEgr__0[1]),
        .I3(\rdid_reg[21]_24 ),
        .I4(ixRdidEgr__0[0]),
        .I5(\rdid_reg[20]_23 ),
        .O(ddrAXI_rready_INST_0_i_9_n_0));
  LUT3 #(
    .INIT(8'hEF)) 
    ddrAXI_wlast_INST_0
       (.I0(\wrmutex_reg_n_0_[1] ),
        .I1(wrAAXI_wlast),
        .I2(\wrmutex_reg_n_0_[0] ),
        .O(ddrAXI_wlast));
  (* SOFT_HLUTNM = "soft_lutpair1586" *) 
  LUT2 #(
    .INIT(4'hB)) 
    ddrAXI_wvalid_INST_0_i_1
       (.I0(\wrmutex_reg_n_0_[1] ),
        .I1(\wrmutex_reg_n_0_[0] ),
        .O(\wrmutex_reg[1]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair1626" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \i[0]_i_1__3 
       (.I0(stateStats),
        .I1(i_reg[0]),
        .O(p_0_in[0]));
  (* SOFT_HLUTNM = "soft_lutpair1626" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \i[0]_i_1__8 
       (.I0(stateStats),
        .I1(\i_reg[0]_0 ),
        .O(stateStats_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair1617" *) 
  LUT3 #(
    .INIT(8'h82)) 
    \i[10]_i_1 
       (.I0(stateStats),
        .I1(\i[10]_i_2_n_0 ),
        .I2(i_reg[10]),
        .O(p_0_in[10]));
  LUT5 #(
    .INIT(32'hF7FFFFFF)) 
    \i[10]_i_2 
       (.I0(i_reg[8]),
        .I1(i_reg[6]),
        .I2(\i[9]_i_2__0_n_0 ),
        .I3(i_reg[7]),
        .I4(i_reg[9]),
        .O(\i[10]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1617" *) 
  LUT3 #(
    .INIT(8'h82)) 
    \i[11]_i_1 
       (.I0(stateStats),
        .I1(\i[13]_i_3_n_0 ),
        .I2(i_reg[11]),
        .O(p_0_in[11]));
  (* SOFT_HLUTNM = "soft_lutpair1566" *) 
  LUT4 #(
    .INIT(16'hA208)) 
    \i[12]_i_1 
       (.I0(stateStats),
        .I1(i_reg[11]),
        .I2(\i[13]_i_3_n_0 ),
        .I3(i_reg[12]),
        .O(p_0_in[12]));
  LUT3 #(
    .INIT(8'hF4)) 
    \i[13]_i_1 
       (.I0(tkclk),
        .I1(stateStats),
        .I2(NRdA),
        .O(\i[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1566" *) 
  LUT5 #(
    .INIT(32'hBF400000)) 
    \i[13]_i_2 
       (.I0(\i[13]_i_3_n_0 ),
        .I1(i_reg[11]),
        .I2(i_reg[12]),
        .I3(i_reg[13]),
        .I4(stateStats),
        .O(\i[13]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF7FFFFFFFFFFFFFF)) 
    \i[13]_i_3 
       (.I0(i_reg[9]),
        .I1(i_reg[7]),
        .I2(\i[9]_i_2__0_n_0 ),
        .I3(i_reg[6]),
        .I4(i_reg[8]),
        .I5(i_reg[10]),
        .O(\i[13]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1588" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \i[1]_i_1__5 
       (.I0(i_reg[1]),
        .I1(i_reg[0]),
        .I2(stateStats),
        .O(\i[1]_i_1__5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1580" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \i[2]_i_1__1 
       (.I0(stateStats),
        .I1(i_reg[0]),
        .I2(i_reg[1]),
        .I3(i_reg[2]),
        .O(p_0_in[2]));
  (* SOFT_HLUTNM = "soft_lutpair1580" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \i[3]_i_1__1 
       (.I0(stateStats),
        .I1(i_reg[1]),
        .I2(i_reg[0]),
        .I3(i_reg[2]),
        .I4(i_reg[3]),
        .O(p_0_in[3]));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \i[4]_i_1__1 
       (.I0(stateStats),
        .I1(i_reg[2]),
        .I2(i_reg[0]),
        .I3(i_reg[1]),
        .I4(i_reg[3]),
        .I5(i_reg[4]),
        .O(p_0_in[4]));
  (* SOFT_HLUTNM = "soft_lutpair1616" *) 
  LUT3 #(
    .INIT(8'h82)) 
    \i[5]_i_1__1 
       (.I0(stateStats),
        .I1(\i[5]_i_2__1_n_0 ),
        .I2(i_reg[5]),
        .O(p_0_in[5]));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \i[5]_i_2__1 
       (.I0(i_reg[3]),
        .I1(i_reg[1]),
        .I2(i_reg[0]),
        .I3(i_reg[2]),
        .I4(i_reg[4]),
        .O(\i[5]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1616" *) 
  LUT3 #(
    .INIT(8'h82)) 
    \i[6]_i_1__1 
       (.I0(stateStats),
        .I1(\i[9]_i_2__0_n_0 ),
        .I2(i_reg[6]),
        .O(p_0_in[6]));
  (* SOFT_HLUTNM = "soft_lutpair1581" *) 
  LUT4 #(
    .INIT(16'h8A20)) 
    \i[7]_i_1__1 
       (.I0(stateStats),
        .I1(\i[9]_i_2__0_n_0 ),
        .I2(i_reg[6]),
        .I3(i_reg[7]),
        .O(p_0_in[7]));
  (* SOFT_HLUTNM = "soft_lutpair1581" *) 
  LUT5 #(
    .INIT(32'hA2AA0800)) 
    \i[8]_i_1__0 
       (.I0(stateStats),
        .I1(i_reg[6]),
        .I2(\i[9]_i_2__0_n_0 ),
        .I3(i_reg[7]),
        .I4(i_reg[8]),
        .O(p_0_in[8]));
  LUT6 #(
    .INIT(64'hA2AAAAAA08000000)) 
    \i[9]_i_1__0 
       (.I0(stateStats),
        .I1(i_reg[7]),
        .I2(\i[9]_i_2__0_n_0 ),
        .I3(i_reg[6]),
        .I4(i_reg[8]),
        .I5(i_reg[9]),
        .O(p_0_in[9]));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \i[9]_i_2__0 
       (.I0(i_reg[4]),
        .I1(i_reg[2]),
        .I2(i_reg[0]),
        .I3(i_reg[1]),
        .I4(i_reg[3]),
        .I5(i_reg[5]),
        .O(\i[9]_i_2__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[0]),
        .Q(i_reg[0]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[10] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[10]),
        .Q(i_reg[10]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[11] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[11]),
        .Q(i_reg[11]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[12] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[12]),
        .Q(i_reg[12]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[13] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(\i[13]_i_2_n_0 ),
        .Q(i_reg[13]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(\i[1]_i_1__5_n_0 ),
        .Q(i_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[2]),
        .Q(i_reg[2]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[3]),
        .Q(i_reg[3]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[4]),
        .Q(i_reg[4]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[5]),
        .Q(i_reg[5]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[6]),
        .Q(i_reg[6]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[7]),
        .Q(i_reg[7]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[8] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[8]),
        .Q(i_reg[8]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[9] 
       (.C(aclk_sig),
        .CE(\i[13]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[9]),
        .Q(i_reg[9]));
  (* SOFT_HLUTNM = "soft_lutpair1623" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \ixRdidEgr[0]_i_1 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(ixRdidEgr__0[0]),
        .O(\ixRdidEgr[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1621" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \ixRdidEgr[1]_i_1 
       (.I0(ixRdidEgr__0[0]),
        .I1(ixRdidEgr__0[1]),
        .I2(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .O(\ixRdidEgr[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1567" *) 
  LUT4 #(
    .INIT(16'h1540)) 
    \ixRdidEgr[2]_i_1 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(ixRdidEgr__0[1]),
        .I2(ixRdidEgr__0[0]),
        .I3(ixRdidEgr__0[2]),
        .O(\ixRdidEgr[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1567" *) 
  LUT5 #(
    .INIT(32'h15554000)) 
    \ixRdidEgr[3]_i_1 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(ixRdidEgr__0[0]),
        .I2(ixRdidEgr__0[1]),
        .I3(ixRdidEgr__0[2]),
        .I4(ixRdidEgr__0[3]),
        .O(\ixRdidEgr[3]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \ixRdidEgr[4]_i_1 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(\rdid_reg[1][0]_0 ),
        .O(ixRdidEgr));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \ixRdidEgr[4]_i_2 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(ixRdidEgr__0[2]),
        .I2(ixRdidEgr__0[3]),
        .I3(ixRdidEgr__0[0]),
        .I4(ixRdidEgr__0[1]),
        .I5(ixRdidEgr__0[4]),
        .O(\ixRdidEgr[4]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdidEgr_reg[0] 
       (.C(memclk),
        .CE(ixRdidEgr),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\ixRdidEgr[0]_i_1_n_0 ),
        .Q(ixRdidEgr__0[0]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdidEgr_reg[1] 
       (.C(memclk),
        .CE(ixRdidEgr),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\ixRdidEgr[1]_i_1_n_0 ),
        .Q(ixRdidEgr__0[1]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdidEgr_reg[2] 
       (.C(memclk),
        .CE(ixRdidEgr),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\ixRdidEgr[2]_i_1_n_0 ),
        .Q(ixRdidEgr__0[2]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdidEgr_reg[3] 
       (.C(memclk),
        .CE(ixRdidEgr),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\ixRdidEgr[3]_i_1_n_0 ),
        .Q(ixRdidEgr__0[3]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdidEgr_reg[4] 
       (.C(memclk),
        .CE(ixRdidEgr),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\ixRdidEgr[4]_i_2_n_0 ),
        .Q(ixRdidEgr__0[4]));
  (* SOFT_HLUTNM = "soft_lutpair1619" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \ixRdid[0]_i_1 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(ixRdid__0[0]),
        .O(ixRdid[0]));
  (* SOFT_HLUTNM = "soft_lutpair1619" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \ixRdid[1]_i_1 
       (.I0(ixRdid__0[0]),
        .I1(ixRdid__0[1]),
        .I2(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .O(ixRdid[1]));
  (* SOFT_HLUTNM = "soft_lutpair1565" *) 
  LUT4 #(
    .INIT(16'h1540)) 
    \ixRdid[2]_i_1 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(ixRdid__0[1]),
        .I2(ixRdid__0[0]),
        .I3(ixRdid__0[2]),
        .O(\ixRdid[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1565" *) 
  LUT5 #(
    .INIT(32'h15554000)) 
    \ixRdid[3]_i_1 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(ixRdid__0[0]),
        .I2(ixRdid__0[1]),
        .I3(ixRdid__0[2]),
        .I4(ixRdid__0[3]),
        .O(\ixRdid[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAEAAAAAA)) 
    \ixRdid[4]_i_1 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(\ixRdid_reg[0]_0 ),
        .I2(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I3(\FSM_onehot_stateRead_reg[2]_0 ),
        .I4(ddrAXI_arready),
        .I5(\rdmutex_reg[1]_1 ),
        .O(\ixRdid[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \ixRdid[4]_i_2 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(ixRdid__0[0]),
        .I2(ixRdid__0[1]),
        .I3(ixRdid__0[2]),
        .I4(ixRdid__0[3]),
        .I5(ixRdid__0[4]),
        .O(\ixRdid[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1571" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \ixRdid[4]_i_3 
       (.I0(\rdmutex_reg[1]_0 [1]),
        .I1(\rdmutex_reg[1]_0 [0]),
        .O(\rdmutex_reg[1]_1 ));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdid_reg[0] 
       (.C(memclk),
        .CE(\ixRdid[4]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(ixRdid[0]),
        .Q(ixRdid__0[0]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdid_reg[1] 
       (.C(memclk),
        .CE(\ixRdid[4]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(ixRdid[1]),
        .Q(ixRdid__0[1]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdid_reg[2] 
       (.C(memclk),
        .CE(\ixRdid[4]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\ixRdid[2]_i_1_n_0 ),
        .Q(ixRdid__0[2]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdid_reg[3] 
       (.C(memclk),
        .CE(\ixRdid[4]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\ixRdid[3]_i_1_n_0 ),
        .Q(ixRdid__0[3]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdid_reg[4] 
       (.C(memclk),
        .CE(\ixRdid[4]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\ixRdid[4]_i_2_n_0 ),
        .Q(ixRdid__0[4]));
  LUT3 #(
    .INIT(8'h08)) 
    \probe[3]_INST_0 
       (.I0(\FSM_onehot_stateRead_reg[2]_0 ),
        .I1(\rdmutex_reg[1]_0 [0]),
        .I2(\rdmutex_reg[1]_0 [1]),
        .O(probe[0]));
  (* SOFT_HLUTNM = "soft_lutpair1624" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \probe[5]_INST_0 
       (.I0(Q[1]),
        .I1(\wrmutex_reg[1]_1 ),
        .O(probe[1]));
  LUT6 #(
    .INIT(64'hAAAAFFFBAAAAAAAA)) 
    \rdid[0][0]_i_1 
       (.I0(\rdid[0][0]_i_2_n_0 ),
        .I1(\rdid[0][0]_i_3_n_0 ),
        .I2(ixRdidEgr__0[4]),
        .I3(ixRdidEgr__0[3]),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[0]_3 ),
        .O(\rdid[0][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \rdid[0][0]_i_2 
       (.I0(ixRdid__0[1]),
        .I1(ixRdid__0[0]),
        .I2(ixRdid__0[2]),
        .I3(ixRdid__0[3]),
        .I4(ixRdid__0[4]),
        .I5(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .O(\rdid[0][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1589" *) 
  LUT4 #(
    .INIT(16'h0002)) 
    \rdid[0][0]_i_3 
       (.I0(\rdid_reg[1][0]_0 ),
        .I1(ixRdidEgr__0[1]),
        .I2(ixRdidEgr__0[0]),
        .I3(ixRdidEgr__0[2]),
        .O(\rdid[0][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FFEFFF00FF00)) 
    \rdid[10][0]_i_1 
       (.I0(\rdid[8][0]_i_2_n_0 ),
        .I1(ixRdidEgr__0[0]),
        .I2(ixRdidEgr__0[1]),
        .I3(\rdid[10][0]_i_2_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[10]_13 ),
        .O(\rdid[10][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1578" *) 
  LUT5 #(
    .INIT(32'h00080000)) 
    \rdid[10][0]_i_2 
       (.I0(\rdid[2][0]_i_4_n_0 ),
        .I1(ixRdid__0[3]),
        .I2(ixRdid__0[2]),
        .I3(ixRdid__0[4]),
        .I4(ixRdid__0[1]),
        .O(\rdid[10][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FFBFFF00FF00)) 
    \rdid[11][0]_i_1 
       (.I0(\rdid[8][0]_i_2_n_0 ),
        .I1(ixRdidEgr__0[1]),
        .I2(ixRdidEgr__0[0]),
        .I3(\rdid[11][0]_i_2_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[11]_14 ),
        .O(\rdid[11][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000004000000)) 
    \rdid[11][0]_i_2 
       (.I0(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .I1(ixRdid__0[3]),
        .I2(ixRdid__0[2]),
        .I3(ixRdid__0[1]),
        .I4(ixRdid__0[0]),
        .I5(ixRdid__0[4]),
        .O(\rdid[11][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0030557500300030)) 
    \rdid[12][0]_i_1 
       (.I0(\rdid[12][0]_i_2_n_0 ),
        .I1(ixRdid__0[0]),
        .I2(ixRdid__0[3]),
        .I3(\rdid[12][0]_i_3_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[12]_15 ),
        .O(\rdid[12][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000002000000000)) 
    \rdid[12][0]_i_2 
       (.I0(\rdid_reg[1][0]_0 ),
        .I1(ixRdidEgr__0[0]),
        .I2(ixRdidEgr__0[3]),
        .I3(ixRdidEgr__0[4]),
        .I4(ixRdidEgr__0[1]),
        .I5(ixRdidEgr__0[2]),
        .O(\rdid[12][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1574" *) 
  LUT5 #(
    .INIT(32'hFEFFFFFF)) 
    \rdid[12][0]_i_3 
       (.I0(\rdmutex[1]_i_2_n_0 ),
        .I1(ixRdid__0[4]),
        .I2(ixRdid__0[1]),
        .I3(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I4(ixRdid__0[2]),
        .O(\rdid[12][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FFBFFF00FF00)) 
    \rdid[13][0]_i_1 
       (.I0(\rdid[1][0]_i_3_n_0 ),
        .I1(\rdid[13][0]_i_2_n_0 ),
        .I2(\rdid_reg[1][0]_0 ),
        .I3(\rdid[13][0]_i_3_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[13]_16 ),
        .O(\rdid[13][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1600" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \rdid[13][0]_i_2 
       (.I0(ixRdidEgr__0[3]),
        .I1(ixRdidEgr__0[2]),
        .O(\rdid[13][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1613" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \rdid[13][0]_i_3 
       (.I0(ixRdid__0[0]),
        .I1(ixRdid__0[3]),
        .I2(\rdid[12][0]_i_3_n_0 ),
        .O(\rdid[13][0]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hAAFBAAAA)) 
    \rdid[14][0]_i_1 
       (.I0(\rdid[14][0]_i_2_n_0 ),
        .I1(\rdid_reg[1][0]_0 ),
        .I2(\rdid[14][0]_i_3_n_0 ),
        .I3(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I4(\rdid_reg[14]_17 ),
        .O(\rdid[14][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1578" *) 
  LUT5 #(
    .INIT(32'h00800000)) 
    \rdid[14][0]_i_2 
       (.I0(\rdid[2][0]_i_4_n_0 ),
        .I1(ixRdid__0[3]),
        .I2(ixRdid__0[2]),
        .I3(ixRdid__0[4]),
        .I4(ixRdid__0[1]),
        .O(\rdid[14][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1583" *) 
  LUT5 #(
    .INIT(32'hFFFFF7FF)) 
    \rdid[14][0]_i_3 
       (.I0(ixRdidEgr__0[2]),
        .I1(ixRdidEgr__0[1]),
        .I2(ixRdidEgr__0[4]),
        .I3(ixRdidEgr__0[3]),
        .I4(ixRdidEgr__0[0]),
        .O(\rdid[14][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAFFBFAAAAAAAA)) 
    \rdid[15][0]_i_1 
       (.I0(\rdid[15][0]_i_2_n_0 ),
        .I1(\rdid_reg[1][0]_0 ),
        .I2(\rdid[15][0]_i_3_n_0 ),
        .I3(ixRdidEgr__0[4]),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[15]_18 ),
        .O(\rdid[15][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000040000000)) 
    \rdid[15][0]_i_2 
       (.I0(ixRdid__0[4]),
        .I1(ixRdid__0[0]),
        .I2(ixRdid__0[1]),
        .I3(ixRdid__0[2]),
        .I4(ixRdid__0[3]),
        .I5(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .O(\rdid[15][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1583" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \rdid[15][0]_i_3 
       (.I0(ixRdidEgr__0[2]),
        .I1(ixRdidEgr__0[3]),
        .I2(ixRdidEgr__0[0]),
        .I3(ixRdidEgr__0[1]),
        .O(\rdid[15][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0010FFFF00100000)) 
    \rdid[16][0]_i_1 
       (.I0(ixRdid__0[1]),
        .I1(ixRdid__0[0]),
        .I2(ixRdid__0[4]),
        .I3(\rdid[16][0]_i_2_n_0 ),
        .I4(\rdid[16][0]_i_3_n_0 ),
        .I5(\rdid_reg[16]_19 ),
        .O(\rdid[16][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1612" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \rdid[16][0]_i_2 
       (.I0(ixRdid__0[2]),
        .I1(ixRdid__0[3]),
        .I2(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .O(\rdid[16][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1570" *) 
  LUT5 #(
    .INIT(32'hFFFFAAEA)) 
    \rdid[16][0]_i_3 
       (.I0(\rdid[16][0]_i_4_n_0 ),
        .I1(\rdid[0][0]_i_3_n_0 ),
        .I2(ixRdidEgr__0[4]),
        .I3(ixRdidEgr__0[3]),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .O(\rdid[16][0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1575" *) 
  LUT5 #(
    .INIT(32'h00004000)) 
    \rdid[16][0]_i_4 
       (.I0(ixRdid__0[0]),
        .I1(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I2(\rdid[20][0]_i_3_n_0 ),
        .I3(ixRdid__0[4]),
        .I4(ixRdid__0[2]),
        .O(\rdid[16][0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAFFFEAAAAAAAA)) 
    \rdid[17][0]_i_1 
       (.I0(\rdid[17][0]_i_2_n_0 ),
        .I1(ixRdidEgr__0[2]),
        .I2(ixRdidEgr__0[3]),
        .I3(\rdid[17][0]_i_3_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[17]_20 ),
        .O(\rdid[17][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    \rdid[17][0]_i_2 
       (.I0(ixRdid__0[4]),
        .I1(ixRdid__0[0]),
        .I2(ixRdid__0[1]),
        .I3(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .I4(ixRdid__0[3]),
        .I5(ixRdid__0[2]),
        .O(\rdid[17][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1591" *) 
  LUT4 #(
    .INIT(16'hDFFF)) 
    \rdid[17][0]_i_3 
       (.I0(\rdid_reg[1][0]_0 ),
        .I1(ixRdidEgr__0[1]),
        .I2(ixRdidEgr__0[0]),
        .I3(ixRdidEgr__0[4]),
        .O(\rdid[17][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h2222F2FF22220200)) 
    \rdid[18][0]_i_1 
       (.I0(\rdid[18][0]_i_2_n_0 ),
        .I1(\rdid[16][0]_i_2_n_0 ),
        .I2(\rdid[18][0]_i_3_n_0 ),
        .I3(\rdid[2][0]_i_3_n_0 ),
        .I4(\rdid[18][0]_i_4_n_0 ),
        .I5(\rdid_reg[18]_21 ),
        .O(\rdid[18][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1614" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \rdid[18][0]_i_2 
       (.I0(ixRdid__0[4]),
        .I1(ixRdid__0[1]),
        .I2(ixRdid__0[0]),
        .O(\rdid[18][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1599" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \rdid[18][0]_i_3 
       (.I0(ixRdidEgr__0[3]),
        .I1(ixRdidEgr__0[4]),
        .O(\rdid[18][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAEAAAAAAAAAAAA)) 
    \rdid[18][0]_i_4 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I1(ixRdid__0[4]),
        .I2(ixRdid__0[3]),
        .I3(ixRdid__0[0]),
        .I4(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I5(\rdid[18][0]_i_5_n_0 ),
        .O(\rdid[18][0]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1574" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \rdid[18][0]_i_5 
       (.I0(\rdmutex[1]_i_2_n_0 ),
        .I1(ixRdid__0[1]),
        .I2(ixRdid__0[2]),
        .O(\rdid[18][0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAFFEFAAAAAAAA)) 
    \rdid[19][0]_i_1 
       (.I0(\rdid[19][0]_i_2_n_0 ),
        .I1(ixRdidEgr__0[2]),
        .I2(\rdid[3][0]_i_3_n_0 ),
        .I3(\rdid[19][0]_i_3_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[19]_22 ),
        .O(\rdid[19][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1611" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \rdid[19][0]_i_2 
       (.I0(\rdid[3][0]_i_5_n_0 ),
        .I1(ixRdid__0[4]),
        .I2(ixRdid__0[3]),
        .O(\rdid[19][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1599" *) 
  LUT3 #(
    .INIT(8'hDF)) 
    \rdid[19][0]_i_3 
       (.I0(ixRdidEgr__0[4]),
        .I1(ixRdidEgr__0[3]),
        .I2(\rdid_reg[1][0]_0 ),
        .O(\rdid[19][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FFEFFF00FF00)) 
    \rdid[1][0]_i_1 
       (.I0(\rdid[1][0]_i_2_n_0 ),
        .I1(\rdid[1][0]_i_3_n_0 ),
        .I2(\rdid_reg[1][0]_0 ),
        .I3(\rdid[1][0]_i_5_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[1]_4 ),
        .O(\rdid[1][0]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \rdid[1][0]_i_2 
       (.I0(ixRdidEgr__0[3]),
        .I1(ixRdidEgr__0[2]),
        .O(\rdid[1][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1622" *) 
  LUT3 #(
    .INIT(8'hFB)) 
    \rdid[1][0]_i_3 
       (.I0(ixRdidEgr__0[4]),
        .I1(ixRdidEgr__0[0]),
        .I2(ixRdidEgr__0[1]),
        .O(\rdid[1][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000010000)) 
    \rdid[1][0]_i_5 
       (.I0(ixRdid__0[2]),
        .I1(ixRdid__0[4]),
        .I2(ixRdid__0[3]),
        .I3(ixRdid__0[1]),
        .I4(ixRdid__0[0]),
        .I5(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .O(\rdid[1][0]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hF0FBF0F0)) 
    \rdid[20][0]_i_1 
       (.I0(\rdid[19][0]_i_3_n_0 ),
        .I1(\rdid[4][0]_i_3_n_0 ),
        .I2(\rdid[20][0]_i_2_n_0 ),
        .I3(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I4(\rdid_reg[20]_23 ),
        .O(\rdid[20][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1575" *) 
  LUT5 #(
    .INIT(32'h08000000)) 
    \rdid[20][0]_i_2 
       (.I0(\rdid[20][0]_i_3_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I2(ixRdid__0[0]),
        .I3(ixRdid__0[2]),
        .I4(ixRdid__0[4]),
        .O(\rdid[20][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1614" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \rdid[20][0]_i_3 
       (.I0(ixRdid__0[1]),
        .I1(ixRdid__0[3]),
        .I2(\rdmutex[1]_i_2_n_0 ),
        .O(\rdid[20][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FFEFFF00FF00)) 
    \rdid[21][0]_i_1 
       (.I0(\rdid[17][0]_i_3_n_0 ),
        .I1(ixRdidEgr__0[3]),
        .I2(ixRdidEgr__0[2]),
        .I3(\rdid[21][0]_i_2_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[21]_24 ),
        .O(\rdid[21][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1576" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \rdid[21][0]_i_2 
       (.I0(\rdid[20][0]_i_3_n_0 ),
        .I1(ixRdid__0[4]),
        .I2(ixRdid__0[0]),
        .I3(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I4(ixRdid__0[2]),
        .O(\rdid[21][0]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hBABBAAAA)) 
    \rdid[22][0]_i_1 
       (.I0(\rdid[22][0]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I2(\rdid[19][0]_i_3_n_0 ),
        .I3(\rdid[6][0]_i_3_n_0 ),
        .I4(\rdid_reg[22]_25 ),
        .O(\rdid[22][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000040)) 
    \rdid[22][0]_i_2 
       (.I0(ixRdid__0[3]),
        .I1(ixRdid__0[4]),
        .I2(ixRdid__0[1]),
        .I3(ixRdid__0[0]),
        .I4(\rdid[22][0]_i_3_n_0 ),
        .I5(\rdmutex[1]_i_2_n_0 ),
        .O(\rdid[22][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1612" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \rdid[22][0]_i_3 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I1(ixRdid__0[2]),
        .O(\rdid[22][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hBABBBBBBAAAAAAAA)) 
    \rdid[23][0]_i_1 
       (.I0(\rdid[23][0]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I2(ixRdidEgr__0[3]),
        .I3(ixRdidEgr__0[4]),
        .I4(\rdid[23][0]_i_3_n_0 ),
        .I5(\rdid_reg[23]_26 ),
        .O(\rdid[23][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000008000)) 
    \rdid[23][0]_i_2 
       (.I0(ixRdid__0[2]),
        .I1(ixRdid__0[4]),
        .I2(ixRdid__0[0]),
        .I3(ixRdid__0[1]),
        .I4(ixRdid__0[3]),
        .I5(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .O(\rdid[23][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1591" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \rdid[23][0]_i_3 
       (.I0(\rdid_reg[1][0]_0 ),
        .I1(ixRdidEgr__0[2]),
        .I2(ixRdidEgr__0[1]),
        .I3(ixRdidEgr__0[0]),
        .O(\rdid[23][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FF7FFF00FF00)) 
    \rdid[24][0]_i_1 
       (.I0(ixRdidEgr__0[3]),
        .I1(ixRdidEgr__0[4]),
        .I2(\rdid[0][0]_i_3_n_0 ),
        .I3(\rdid[24][0]_i_2_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[24]_27 ),
        .O(\rdid[24][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    \rdid[24][0]_i_2 
       (.I0(ixRdid__0[3]),
        .I1(ixRdid__0[4]),
        .I2(ixRdid__0[2]),
        .I3(ixRdid__0[0]),
        .I4(ixRdid__0[1]),
        .I5(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .O(\rdid[24][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FFFBFF00FF00)) 
    \rdid[25][0]_i_1 
       (.I0(\rdid[9][0]_i_3_n_0 ),
        .I1(ixRdidEgr__0[4]),
        .I2(\rdid[25][0]_i_2_n_0 ),
        .I3(\rdid[25][0]_i_3_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[25]_28 ),
        .O(\rdid[25][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1622" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \rdid[25][0]_i_2 
       (.I0(ixRdidEgr__0[1]),
        .I1(ixRdidEgr__0[0]),
        .O(\rdid[25][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000080000)) 
    \rdid[25][0]_i_3 
       (.I0(ixRdid__0[4]),
        .I1(ixRdid__0[0]),
        .I2(ixRdid__0[1]),
        .I3(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .I4(ixRdid__0[3]),
        .I5(ixRdid__0[2]),
        .O(\rdid[25][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hABBBBBBBAAAAAAAA)) 
    \rdid[26][0]_i_1 
       (.I0(\rdid[26][0]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I2(ixRdidEgr__0[3]),
        .I3(ixRdidEgr__0[4]),
        .I4(\rdid[2][0]_i_3_n_0 ),
        .I5(\rdid_reg[26]_29 ),
        .O(\rdid[26][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000400000)) 
    \rdid[26][0]_i_2 
       (.I0(ixRdid__0[0]),
        .I1(ixRdid__0[1]),
        .I2(ixRdid__0[4]),
        .I3(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .I4(ixRdid__0[3]),
        .I5(ixRdid__0[2]),
        .O(\rdid[26][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FF7FFF00FF00)) 
    \rdid[27][0]_i_1 
       (.I0(\rdid[27][0]_i_2_n_0 ),
        .I1(\rdid_reg[1][0]_0 ),
        .I2(\rdid[27][0]_i_3_n_0 ),
        .I3(\rdid[27][0]_i_4_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[27]_30 ),
        .O(\rdid[27][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1570" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \rdid[27][0]_i_2 
       (.I0(ixRdidEgr__0[3]),
        .I1(ixRdidEgr__0[4]),
        .O(\rdid[27][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1620" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \rdid[27][0]_i_3 
       (.I0(ixRdidEgr__0[0]),
        .I1(ixRdidEgr__0[1]),
        .I2(ixRdidEgr__0[2]),
        .O(\rdid[27][0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1615" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \rdid[27][0]_i_4 
       (.I0(ixRdid__0[4]),
        .I1(ixRdid__0[3]),
        .I2(\rdid[3][0]_i_5_n_0 ),
        .O(\rdid[27][0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FF7FFF00FF00)) 
    \rdid[28][0]_i_1 
       (.I0(\rdid[27][0]_i_2_n_0 ),
        .I1(\rdid_reg[1][0]_0 ),
        .I2(\rdid[4][0]_i_3_n_0 ),
        .I3(\rdid[28][0]_i_2_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[28]_31 ),
        .O(\rdid[28][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000400000)) 
    \rdid[28][0]_i_2 
       (.I0(ixRdid__0[0]),
        .I1(ixRdid__0[2]),
        .I2(ixRdid__0[4]),
        .I3(ixRdid__0[1]),
        .I4(ixRdid__0[3]),
        .I5(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .O(\rdid[28][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FFBFFF00FF00)) 
    \rdid[29][0]_i_1 
       (.I0(\rdid[17][0]_i_3_n_0 ),
        .I1(ixRdidEgr__0[3]),
        .I2(ixRdidEgr__0[2]),
        .I3(\rdid[29][0]_i_2_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[29]_32 ),
        .O(\rdid[29][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1615" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \rdid[29][0]_i_2 
       (.I0(ixRdid__0[4]),
        .I1(ixRdid__0[3]),
        .I2(\rdid[5][0]_i_3_n_0 ),
        .O(\rdid[29][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hBBBABBBBAAAAAAAA)) 
    \rdid[2][0]_i_1 
       (.I0(\rdid[2][0]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I2(ixRdidEgr__0[3]),
        .I3(ixRdidEgr__0[4]),
        .I4(\rdid[2][0]_i_3_n_0 ),
        .I5(\rdid_reg[2]_5 ),
        .O(\rdid[2][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1573" *) 
  LUT5 #(
    .INIT(32'h00000008)) 
    \rdid[2][0]_i_2 
       (.I0(\rdid[2][0]_i_4_n_0 ),
        .I1(ixRdid__0[1]),
        .I2(ixRdid__0[2]),
        .I3(ixRdid__0[4]),
        .I4(ixRdid__0[3]),
        .O(\rdid[2][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1589" *) 
  LUT4 #(
    .INIT(16'h0020)) 
    \rdid[2][0]_i_3 
       (.I0(\rdid_reg[1][0]_0 ),
        .I1(ixRdidEgr__0[0]),
        .I2(ixRdidEgr__0[1]),
        .I3(ixRdidEgr__0[2]),
        .O(\rdid[2][0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1613" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \rdid[2][0]_i_4 
       (.I0(ixRdid__0[0]),
        .I1(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I2(\rdmutex[1]_i_2_n_0 ),
        .O(\rdid[2][0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FF7FFF00FF00)) 
    \rdid[30][0]_i_1 
       (.I0(\rdid[27][0]_i_2_n_0 ),
        .I1(\rdid[6][0]_i_3_n_0 ),
        .I2(\rdid_reg[1][0]_0 ),
        .I3(\rdid[30][0]_i_2_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[30]_33 ),
        .O(\rdid[30][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1579" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \rdid[30][0]_i_2 
       (.I0(\rdid[2][0]_i_4_n_0 ),
        .I1(ixRdid__0[3]),
        .I2(ixRdid__0[2]),
        .I3(ixRdid__0[4]),
        .I4(ixRdid__0[1]),
        .O(\rdid[30][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FF7FFF00FF00)) 
    \rdid[31][0]_i_1 
       (.I0(ixRdidEgr__0[3]),
        .I1(ixRdidEgr__0[4]),
        .I2(\rdid[23][0]_i_3_n_0 ),
        .I3(\rdid[31][0]_i_2_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[31]_34 ),
        .O(\rdid[31][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000080000000)) 
    \rdid[31][0]_i_2 
       (.I0(ixRdid__0[2]),
        .I1(ixRdid__0[4]),
        .I2(ixRdid__0[1]),
        .I3(ixRdid__0[3]),
        .I4(ixRdid__0[0]),
        .I5(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .O(\rdid[31][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAFFEFAAAAAAAA)) 
    \rdid[3][0]_i_1 
       (.I0(\rdid[3][0]_i_2_n_0 ),
        .I1(ixRdidEgr__0[2]),
        .I2(\rdid[3][0]_i_3_n_0 ),
        .I3(\rdid[3][0]_i_4_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[3]_6 ),
        .O(\rdid[3][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1611" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \rdid[3][0]_i_2 
       (.I0(ixRdid__0[4]),
        .I1(ixRdid__0[3]),
        .I2(\rdid[3][0]_i_5_n_0 ),
        .O(\rdid[3][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1621" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \rdid[3][0]_i_3 
       (.I0(ixRdidEgr__0[1]),
        .I1(ixRdidEgr__0[0]),
        .O(\rdid[3][0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1590" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \rdid[3][0]_i_4 
       (.I0(ixRdidEgr__0[4]),
        .I1(ixRdidEgr__0[3]),
        .I2(\rdid_reg[1][0]_0 ),
        .O(\rdid[3][0]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1577" *) 
  LUT5 #(
    .INIT(32'hFFFFF7FF)) 
    \rdid[3][0]_i_5 
       (.I0(ixRdid__0[0]),
        .I1(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I2(ixRdid__0[2]),
        .I3(ixRdid__0[1]),
        .I4(\rdmutex[1]_i_2_n_0 ),
        .O(\rdid[3][0]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hBABBAAAA)) 
    \rdid[4][0]_i_1 
       (.I0(\rdid[4][0]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I2(\rdid[3][0]_i_4_n_0 ),
        .I3(\rdid[4][0]_i_3_n_0 ),
        .I4(\rdid_reg[4]_7 ),
        .O(\rdid[4][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000080000)) 
    \rdid[4][0]_i_2 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I1(ixRdid__0[2]),
        .I2(ixRdid__0[0]),
        .I3(ixRdid__0[1]),
        .I4(\rdid[5][0]_i_2_n_0 ),
        .I5(\rdmutex[1]_i_2_n_0 ),
        .O(\rdid[4][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1623" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \rdid[4][0]_i_3 
       (.I0(ixRdidEgr__0[0]),
        .I1(ixRdidEgr__0[2]),
        .I2(ixRdidEgr__0[1]),
        .O(\rdid[4][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h2222222F22222220)) 
    \rdid[5][0]_i_1 
       (.I0(\rdid[5][0]_i_2_n_0 ),
        .I1(\rdid[5][0]_i_3_n_0 ),
        .I2(\rdid[5][0]_i_4_n_0 ),
        .I3(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I4(\rdid[5][0]_i_5_n_0 ),
        .I5(\rdid_reg[5]_8 ),
        .O(\rdid[5][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1579" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \rdid[5][0]_i_2 
       (.I0(ixRdid__0[3]),
        .I1(ixRdid__0[4]),
        .O(\rdid[5][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1577" *) 
  LUT5 #(
    .INIT(32'hFFBFFFFF)) 
    \rdid[5][0]_i_3 
       (.I0(\rdmutex[1]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I2(ixRdid__0[2]),
        .I3(ixRdid__0[1]),
        .I4(ixRdid__0[0]),
        .O(\rdid[5][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000800)) 
    \rdid[5][0]_i_4 
       (.I0(\rdid_reg[1][0]_0 ),
        .I1(ixRdidEgr__0[0]),
        .I2(ixRdidEgr__0[1]),
        .I3(ixRdidEgr__0[2]),
        .I4(ixRdidEgr__0[3]),
        .I5(ixRdidEgr__0[4]),
        .O(\rdid[5][0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000010000)) 
    \rdid[5][0]_i_5 
       (.I0(ixRdid__0[1]),
        .I1(ixRdid__0[4]),
        .I2(\rdid[5][0]_i_6_n_0 ),
        .I3(ixRdid__0[3]),
        .I4(ixRdid__0[2]),
        .I5(\rdmutex[1]_i_2_n_0 ),
        .O(\rdid[5][0]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1576" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \rdid[5][0]_i_6 
       (.I0(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I1(ixRdid__0[0]),
        .O(\rdid[5][0]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hBABBAAAA)) 
    \rdid[6][0]_i_1 
       (.I0(\rdid[6][0]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I2(\rdid[3][0]_i_4_n_0 ),
        .I3(\rdid[6][0]_i_3_n_0 ),
        .I4(\rdid_reg[6]_9 ),
        .O(\rdid[6][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000008000000)) 
    \rdid[6][0]_i_2 
       (.I0(\rdid[5][0]_i_2_n_0 ),
        .I1(ixRdid__0[1]),
        .I2(ixRdid__0[0]),
        .I3(ixRdid__0[2]),
        .I4(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I5(\rdmutex[1]_i_2_n_0 ),
        .O(\rdid[6][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1620" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \rdid[6][0]_i_3 
       (.I0(ixRdidEgr__0[2]),
        .I1(ixRdidEgr__0[1]),
        .I2(ixRdidEgr__0[0]),
        .O(\rdid[6][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hBABBBBBBAAAAAAAA)) 
    \rdid[7][0]_i_1 
       (.I0(\rdid[7][0]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I2(\rdid[3][0]_i_4_n_0 ),
        .I3(\rdid[3][0]_i_3_n_0 ),
        .I4(ixRdidEgr__0[2]),
        .I5(\rdid_reg[7]_10 ),
        .O(\rdid[7][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000080)) 
    \rdid[7][0]_i_2 
       (.I0(ixRdid__0[2]),
        .I1(ixRdid__0[1]),
        .I2(ixRdid__0[0]),
        .I3(ixRdid__0[3]),
        .I4(ixRdid__0[4]),
        .I5(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .O(\rdid[7][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FFFEFF00FF00)) 
    \rdid[8][0]_i_1 
       (.I0(\rdid[8][0]_i_2_n_0 ),
        .I1(ixRdidEgr__0[1]),
        .I2(ixRdidEgr__0[0]),
        .I3(\rdid[8][0]_i_3_n_0 ),
        .I4(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I5(\rdid_reg[8]_11 ),
        .O(\rdid[8][0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1590" *) 
  LUT4 #(
    .INIT(16'hFFBF)) 
    \rdid[8][0]_i_2 
       (.I0(ixRdidEgr__0[4]),
        .I1(\rdid_reg[1][0]_0 ),
        .I2(ixRdidEgr__0[3]),
        .I3(ixRdidEgr__0[2]),
        .O(\rdid[8][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1573" *) 
  LUT5 #(
    .INIT(32'h00000200)) 
    \rdid[8][0]_i_3 
       (.I0(\rdid[2][0]_i_4_n_0 ),
        .I1(ixRdid__0[4]),
        .I2(ixRdid__0[1]),
        .I3(ixRdid__0[3]),
        .I4(ixRdid__0[2]),
        .O(\rdid[8][0]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hBBBAAAAA)) 
    \rdid[9][0]_i_1 
       (.I0(\rdid[9][0]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I2(\rdid[1][0]_i_3_n_0 ),
        .I3(\rdid[9][0]_i_3_n_0 ),
        .I4(\rdid_reg[9]_12 ),
        .O(\rdid[9][0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000040000000)) 
    \rdid[9][0]_i_2 
       (.I0(ixRdid__0[2]),
        .I1(ixRdid__0[3]),
        .I2(\rdid[9][0]_i_4_n_0 ),
        .I3(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I4(ixRdid__0[0]),
        .I5(\rdmutex[1]_i_2_n_0 ),
        .O(\rdid[9][0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1600" *) 
  LUT3 #(
    .INIT(8'hBF)) 
    \rdid[9][0]_i_3 
       (.I0(ixRdidEgr__0[2]),
        .I1(ixRdidEgr__0[3]),
        .I2(\rdid_reg[1][0]_0 ),
        .O(\rdid[9][0]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \rdid[9][0]_i_4 
       (.I0(ixRdid__0[4]),
        .I1(ixRdid__0[1]),
        .O(\rdid[9][0]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[0][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[0][0]_i_1_n_0 ),
        .Q(\rdid_reg[0]_3 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[10][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[10][0]_i_1_n_0 ),
        .Q(\rdid_reg[10]_13 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[11][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[11][0]_i_1_n_0 ),
        .Q(\rdid_reg[11]_14 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[12][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[12][0]_i_1_n_0 ),
        .Q(\rdid_reg[12]_15 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[13][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[13][0]_i_1_n_0 ),
        .Q(\rdid_reg[13]_16 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[14][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[14][0]_i_1_n_0 ),
        .Q(\rdid_reg[14]_17 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[15][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[15][0]_i_1_n_0 ),
        .Q(\rdid_reg[15]_18 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[16][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[16][0]_i_1_n_0 ),
        .Q(\rdid_reg[16]_19 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[17][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[17][0]_i_1_n_0 ),
        .Q(\rdid_reg[17]_20 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[18][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[18][0]_i_1_n_0 ),
        .Q(\rdid_reg[18]_21 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[19][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[19][0]_i_1_n_0 ),
        .Q(\rdid_reg[19]_22 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[1][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[1][0]_i_1_n_0 ),
        .Q(\rdid_reg[1]_4 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[20][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[20][0]_i_1_n_0 ),
        .Q(\rdid_reg[20]_23 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[21][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[21][0]_i_1_n_0 ),
        .Q(\rdid_reg[21]_24 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[22][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[22][0]_i_1_n_0 ),
        .Q(\rdid_reg[22]_25 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[23][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[23][0]_i_1_n_0 ),
        .Q(\rdid_reg[23]_26 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[24][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[24][0]_i_1_n_0 ),
        .Q(\rdid_reg[24]_27 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[25][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[25][0]_i_1_n_0 ),
        .Q(\rdid_reg[25]_28 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[26][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[26][0]_i_1_n_0 ),
        .Q(\rdid_reg[26]_29 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[27][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[27][0]_i_1_n_0 ),
        .Q(\rdid_reg[27]_30 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[28][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[28][0]_i_1_n_0 ),
        .Q(\rdid_reg[28]_31 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[29][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[29][0]_i_1_n_0 ),
        .Q(\rdid_reg[29]_32 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[2][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[2][0]_i_1_n_0 ),
        .Q(\rdid_reg[2]_5 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[30][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[30][0]_i_1_n_0 ),
        .Q(\rdid_reg[30]_33 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[31][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[31][0]_i_1_n_0 ),
        .Q(\rdid_reg[31]_34 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[3][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[3][0]_i_1_n_0 ),
        .Q(\rdid_reg[3]_6 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[4][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[4][0]_i_1_n_0 ),
        .Q(\rdid_reg[4]_7 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[5][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[5][0]_i_1_n_0 ),
        .Q(\rdid_reg[5]_8 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[6][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[6][0]_i_1_n_0 ),
        .Q(\rdid_reg[6]_9 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[7][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[7][0]_i_1_n_0 ),
        .Q(\rdid_reg[7]_10 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[8][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[8][0]_i_1_n_0 ),
        .Q(\rdid_reg[8]_11 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdid_reg[9][0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdid[9][0]_i_1_n_0 ),
        .Q(\rdid_reg[9]_12 ));
  LUT1 #(
    .INIT(2'h1)) 
    \rdmutex[0]_i_1 
       (.I0(\FSM_onehot_stateRead[2]_i_2_n_0 ),
        .O(\rdmutex[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1625" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \rdmutex[1]_i_1 
       (.I0(\rdmutex[1]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .O(\rdmutex[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rdmutex[1]_i_10 
       (.I0(\rdid_reg[7]_10 ),
        .I1(\rdid_reg[6]_9 ),
        .I2(ixRdid__0[1]),
        .I3(\rdid_reg[5]_8 ),
        .I4(ixRdid__0[0]),
        .I5(\rdid_reg[4]_7 ),
        .O(\rdmutex[1]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rdmutex[1]_i_11 
       (.I0(\rdid_reg[11]_14 ),
        .I1(\rdid_reg[10]_13 ),
        .I2(ixRdid__0[1]),
        .I3(\rdid_reg[9]_12 ),
        .I4(ixRdid__0[0]),
        .I5(\rdid_reg[8]_11 ),
        .O(\rdmutex[1]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rdmutex[1]_i_12 
       (.I0(\rdid_reg[15]_18 ),
        .I1(\rdid_reg[14]_17 ),
        .I2(ixRdid__0[1]),
        .I3(\rdid_reg[13]_16 ),
        .I4(ixRdid__0[0]),
        .I5(\rdid_reg[12]_15 ),
        .O(\rdmutex[1]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rdmutex[1]_i_13 
       (.I0(\rdid_reg[19]_22 ),
        .I1(\rdid_reg[18]_21 ),
        .I2(ixRdid__0[1]),
        .I3(\rdid_reg[17]_20 ),
        .I4(ixRdid__0[0]),
        .I5(\rdid_reg[16]_19 ),
        .O(\rdmutex[1]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rdmutex[1]_i_14 
       (.I0(\rdid_reg[23]_26 ),
        .I1(\rdid_reg[22]_25 ),
        .I2(ixRdid__0[1]),
        .I3(\rdid_reg[21]_24 ),
        .I4(ixRdid__0[0]),
        .I5(\rdid_reg[20]_23 ),
        .O(\rdmutex[1]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rdmutex[1]_i_15 
       (.I0(\rdid_reg[27]_30 ),
        .I1(\rdid_reg[26]_29 ),
        .I2(ixRdid__0[1]),
        .I3(\rdid_reg[25]_28 ),
        .I4(ixRdid__0[0]),
        .I5(\rdid_reg[24]_27 ),
        .O(\rdmutex[1]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rdmutex[1]_i_16 
       (.I0(\rdid_reg[31]_34 ),
        .I1(\rdid_reg[30]_33 ),
        .I2(ixRdid__0[1]),
        .I3(\rdid_reg[29]_32 ),
        .I4(ixRdid__0[0]),
        .I5(\rdid_reg[28]_31 ),
        .O(\rdmutex[1]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hFFE2FFFF)) 
    \rdmutex[1]_i_2 
       (.I0(\rdmutex_reg[1]_i_3_n_0 ),
        .I1(ixRdid__0[4]),
        .I2(\rdmutex_reg[1]_i_4_n_0 ),
        .I3(\rdmutex_reg[1]_2 ),
        .I4(web),
        .O(\rdmutex[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rdmutex[1]_i_9 
       (.I0(\rdid_reg[3]_6 ),
        .I1(\rdid_reg[2]_5 ),
        .I2(ixRdid__0[1]),
        .I3(\rdid_reg[1]_4 ),
        .I4(ixRdid__0[0]),
        .I5(\rdid_reg[0]_3 ),
        .O(\rdmutex[1]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdmutex_reg[0] 
       (.C(memclk),
        .CE(\FSM_onehot_stateRead[2]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdmutex[0]_i_1_n_0 ),
        .Q(\rdmutex_reg[1]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \rdmutex_reg[1] 
       (.C(memclk),
        .CE(\FSM_onehot_stateRead[2]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\rdmutex[1]_i_1_n_0 ),
        .Q(\rdmutex_reg[1]_0 [1]));
  MUXF8 \rdmutex_reg[1]_i_3 
       (.I0(\rdmutex_reg[1]_i_5_n_0 ),
        .I1(\rdmutex_reg[1]_i_6_n_0 ),
        .O(\rdmutex_reg[1]_i_3_n_0 ),
        .S(ixRdid__0[3]));
  MUXF8 \rdmutex_reg[1]_i_4 
       (.I0(\rdmutex_reg[1]_i_7_n_0 ),
        .I1(\rdmutex_reg[1]_i_8_n_0 ),
        .O(\rdmutex_reg[1]_i_4_n_0 ),
        .S(ixRdid__0[3]));
  MUXF7 \rdmutex_reg[1]_i_5 
       (.I0(\rdmutex[1]_i_9_n_0 ),
        .I1(\rdmutex[1]_i_10_n_0 ),
        .O(\rdmutex_reg[1]_i_5_n_0 ),
        .S(ixRdid__0[2]));
  MUXF7 \rdmutex_reg[1]_i_6 
       (.I0(\rdmutex[1]_i_11_n_0 ),
        .I1(\rdmutex[1]_i_12_n_0 ),
        .O(\rdmutex_reg[1]_i_6_n_0 ),
        .S(ixRdid__0[2]));
  MUXF7 \rdmutex_reg[1]_i_7 
       (.I0(\rdmutex[1]_i_13_n_0 ),
        .I1(\rdmutex[1]_i_14_n_0 ),
        .O(\rdmutex_reg[1]_i_7_n_0 ),
        .S(ixRdid__0[2]));
  MUXF7 \rdmutex_reg[1]_i_8 
       (.I0(\rdmutex[1]_i_15_n_0 ),
        .I1(\rdmutex[1]_i_16_n_0 ),
        .O(\rdmutex_reg[1]_i_8_n_0 ),
        .S(ixRdid__0[2]));
  FDCE stateStats_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(tkclk),
        .Q(stateStats));
  (* SOFT_HLUTNM = "soft_lutpair1596" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \strbRdlock_i[0]_i_1 
       (.I0(strbRdlock_i_reg[0]),
        .I1(strbRdlock_reg_n_0),
        .O(\strbRdlock_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1596" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \strbRdlock_i[1]_i_1 
       (.I0(strbRdlock_i_reg[1]),
        .I1(strbRdlock_i_reg[0]),
        .I2(strbRdlock_reg_n_0),
        .O(\strbRdlock_i[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1568" *) 
  LUT4 #(
    .INIT(16'h006A)) 
    \strbRdlock_i[2]_i_1 
       (.I0(strbRdlock_i_reg[2]),
        .I1(strbRdlock_i_reg[1]),
        .I2(strbRdlock_i_reg[0]),
        .I3(strbRdlock_reg_n_0),
        .O(\strbRdlock_i[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFEFFFFFF)) 
    \strbRdlock_i[3]_i_1 
       (.I0(strbRdlock_reg_n_0),
        .I1(strbRdlock_i_reg[2]),
        .I2(strbRdlock_i_reg[0]),
        .I3(strbRdlock_i_reg[1]),
        .I4(strbRdlock_i_reg[3]),
        .O(\strbRdlock_i[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1568" *) 
  LUT5 #(
    .INIT(32'h00006AAA)) 
    \strbRdlock_i[3]_i_2 
       (.I0(strbRdlock_i_reg[3]),
        .I1(strbRdlock_i_reg[2]),
        .I2(strbRdlock_i_reg[0]),
        .I3(strbRdlock_i_reg[1]),
        .I4(strbRdlock_reg_n_0),
        .O(\strbRdlock_i[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1587" *) 
  LUT5 #(
    .INIT(32'h00F30050)) 
    strbRdlock_i_1
       (.I0(\rdmutex[1]_i_2_n_0 ),
        .I1(\FSM_onehot_stateRead_reg[2]_0 ),
        .I2(\FSM_onehot_stateRead_reg_n_0_[1] ),
        .I3(\FSM_onehot_stateRead_reg_n_0_[0] ),
        .I4(strbRdlock_reg_n_0),
        .O(strbRdlock_i_1_n_0));
  FDCE #(
    .INIT(1'b0)) 
    \strbRdlock_i_reg[0] 
       (.C(memclk),
        .CE(\strbRdlock_i[3]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\strbRdlock_i[0]_i_1_n_0 ),
        .Q(strbRdlock_i_reg[0]));
  FDCE #(
    .INIT(1'b0)) 
    \strbRdlock_i_reg[1] 
       (.C(memclk),
        .CE(\strbRdlock_i[3]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\strbRdlock_i[1]_i_1_n_0 ),
        .Q(strbRdlock_i_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \strbRdlock_i_reg[2] 
       (.C(memclk),
        .CE(\strbRdlock_i[3]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\strbRdlock_i[2]_i_1_n_0 ),
        .Q(strbRdlock_i_reg[2]));
  FDCE #(
    .INIT(1'b0)) 
    \strbRdlock_i_reg[3] 
       (.C(memclk),
        .CE(\strbRdlock_i[3]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\strbRdlock_i[3]_i_2_n_0 ),
        .Q(strbRdlock_i_reg[3]));
  (* SOFT_HLUTNM = "soft_lutpair1592" *) 
  LUT4 #(
    .INIT(16'h1000)) 
    strbRdlock_mclk_i_1
       (.I0(strbRdlock_mclk_reg_n_0),
        .I1(strbRdlock_wait_reg_n_0),
        .I2(strbRdlock_to_mclkm2),
        .I3(strbRdlock_to_mclkm1),
        .O(strbRdlock_mclk_i_1_n_0));
  FDCE strbRdlock_mclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(strbRdlock_mclk_i_1_n_0),
        .Q(strbRdlock_mclk_reg_n_0));
  FDCE strbRdlock_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(strbRdlock_i_1_n_0),
        .Q(strbRdlock_reg_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFBFAAAAAAAA)) 
    strbRdlock_to_mclk_i_1
       (.I0(strbRdlock_reg_n_0),
        .I1(strbRdlock_i_reg[3]),
        .I2(strbRdlock_i_reg[1]),
        .I3(strbRdlock_i_reg[2]),
        .I4(strbRdlock_i_reg[0]),
        .I5(strbRdlock_to_mclk_reg_n_0),
        .O(strbRdlock_to_mclk_i_1_n_0));
  FDCE strbRdlock_to_mclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(strbRdlock_to_mclk_i_1_n_0),
        .Q(strbRdlock_to_mclk_reg_n_0));
  FDCE strbRdlock_to_mclkm1_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(strbRdlock_to_mclk_reg_n_0),
        .Q(strbRdlock_to_mclkm1));
  FDCE strbRdlock_to_mclkm2_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(strbRdlock_to_mclkm1),
        .Q(strbRdlock_to_mclkm2));
  (* SOFT_HLUTNM = "soft_lutpair1592" *) 
  LUT4 #(
    .INIT(16'hBAA0)) 
    strbRdlock_wait_i_1
       (.I0(strbRdlock_wait_reg_n_0),
        .I1(strbRdlock_mclk_reg_n_0),
        .I2(strbRdlock_to_mclkm1),
        .I3(strbRdlock_to_mclkm2),
        .O(strbRdlock_wait9_out));
  FDCE strbRdlock_wait_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(strbRdlock_wait9_out),
        .Q(strbRdlock_wait_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1597" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \strbWrlock_i[0]_i_1 
       (.I0(strbWrlock_i_reg[0]),
        .I1(strbWrlock),
        .O(\strbWrlock_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1597" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \strbWrlock_i[1]_i_1 
       (.I0(strbWrlock_i_reg[1]),
        .I1(strbWrlock_i_reg[0]),
        .I2(strbWrlock),
        .O(\strbWrlock_i[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1569" *) 
  LUT4 #(
    .INIT(16'h006A)) 
    \strbWrlock_i[2]_i_1 
       (.I0(strbWrlock_i_reg[2]),
        .I1(strbWrlock_i_reg[1]),
        .I2(strbWrlock_i_reg[0]),
        .I3(strbWrlock),
        .O(\strbWrlock_i[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFEFFFFFF)) 
    \strbWrlock_i[3]_i_1 
       (.I0(strbWrlock),
        .I1(strbWrlock_i_reg[2]),
        .I2(strbWrlock_i_reg[0]),
        .I3(strbWrlock_i_reg[1]),
        .I4(strbWrlock_i_reg[3]),
        .O(\strbWrlock_i[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1569" *) 
  LUT5 #(
    .INIT(32'h00006AAA)) 
    \strbWrlock_i[3]_i_2 
       (.I0(strbWrlock_i_reg[3]),
        .I1(strbWrlock_i_reg[2]),
        .I2(strbWrlock_i_reg[0]),
        .I3(strbWrlock_i_reg[1]),
        .I4(strbWrlock),
        .O(\strbWrlock_i[3]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \strbWrlock_i_reg[0] 
       (.C(memclk),
        .CE(\strbWrlock_i[3]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\strbWrlock_i[0]_i_1_n_0 ),
        .Q(strbWrlock_i_reg[0]));
  FDCE #(
    .INIT(1'b0)) 
    \strbWrlock_i_reg[1] 
       (.C(memclk),
        .CE(\strbWrlock_i[3]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\strbWrlock_i[1]_i_1_n_0 ),
        .Q(strbWrlock_i_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \strbWrlock_i_reg[2] 
       (.C(memclk),
        .CE(\strbWrlock_i[3]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\strbWrlock_i[2]_i_1_n_0 ),
        .Q(strbWrlock_i_reg[2]));
  FDCE #(
    .INIT(1'b0)) 
    \strbWrlock_i_reg[3] 
       (.C(memclk),
        .CE(\strbWrlock_i[3]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\strbWrlock_i[3]_i_2_n_0 ),
        .Q(strbWrlock_i_reg[3]));
  (* SOFT_HLUTNM = "soft_lutpair1593" *) 
  LUT4 #(
    .INIT(16'h1000)) 
    strbWrlock_mclk_i_1
       (.I0(strbWrlock_mclk_reg_n_0),
        .I1(strbWrlock_wait_reg_n_0),
        .I2(strbWrlock_to_mclkm2),
        .I3(strbWrlock_to_mclkm1),
        .O(strbWrlock_mclk_i_1_n_0));
  FDCE strbWrlock_mclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(strbWrlock_mclk_i_1_n_0),
        .Q(strbWrlock_mclk_reg_n_0));
  FDCE strbWrlock_reg
       (.C(memclk),
        .CE(wdone_i_1_n_0),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(D[0]),
        .Q(strbWrlock));
  LUT6 #(
    .INIT(64'hFFFFFFBFAAAAAAAA)) 
    strbWrlock_to_mclk_i_1
       (.I0(strbWrlock),
        .I1(strbWrlock_i_reg[3]),
        .I2(strbWrlock_i_reg[1]),
        .I3(strbWrlock_i_reg[2]),
        .I4(strbWrlock_i_reg[0]),
        .I5(strbWrlock_to_mclk_reg_n_0),
        .O(strbWrlock_to_mclk_i_1_n_0));
  FDCE strbWrlock_to_mclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(strbWrlock_to_mclk_i_1_n_0),
        .Q(strbWrlock_to_mclk_reg_n_0));
  FDCE strbWrlock_to_mclkm1_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(strbWrlock_to_mclk_reg_n_0),
        .Q(strbWrlock_to_mclkm1));
  FDCE strbWrlock_to_mclkm2_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(strbWrlock_to_mclkm1),
        .Q(strbWrlock_to_mclkm2));
  (* SOFT_HLUTNM = "soft_lutpair1593" *) 
  LUT4 #(
    .INIT(16'hBAA0)) 
    strbWrlock_wait_i_1
       (.I0(strbWrlock_wait_reg_n_0),
        .I1(strbWrlock_mclk_reg_n_0),
        .I2(strbWrlock_to_mclkm1),
        .I3(strbWrlock_to_mclkm2),
        .O(strbWrlock_wait3_out));
  FDCE strbWrlock_wait_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(strbWrlock_wait3_out),
        .Q(strbWrlock_wait_reg_n_0));
  LUT3 #(
    .INIT(8'hBA)) 
    wdone_i_1
       (.I0(\FSM_onehot_stateWrite[2]_i_2_n_0 ),
        .I1(Q[0]),
        .I2(Q[1]),
        .O(wdone_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1618" *) 
  LUT3 #(
    .INIT(8'h02)) 
    wdone_i_2
       (.I0(\FSM_onehot_stateWrite[2]_i_3_n_0 ),
        .I1(ddrAXI_bready_sig),
        .I2(Q[0]),
        .O(wdone_i_2_n_0));
  FDCE wdone_reg
       (.C(memclk),
        .CE(wdone_i_1_n_0),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(wdone_i_2_n_0),
        .Q(wdone_reg_n_0));
  FDCE #(
    .INIT(1'b0)) 
    \wrmutex_reg[0] 
       (.C(memclk),
        .CE(\FSM_onehot_stateWrite[2]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(D[0]),
        .Q(\wrmutex_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \wrmutex_reg[1] 
       (.C(memclk),
        .CE(\FSM_onehot_stateWrite[2]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(D[1]),
        .Q(\wrmutex_reg_n_0_[1] ));
  (* SOFT_HLUTNM = "soft_lutpair1595" *) 
  LUT3 #(
    .INIT(8'h54)) 
    \wtr[0]_i_1 
       (.I0(wtr[0]),
        .I1(ddrAXI_bready_sig_i_2_n_0),
        .I2(ddrAXI_bready_sig0),
        .O(\wtr[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1582" *) 
  LUT4 #(
    .INIT(16'hEB28)) 
    \wtr[1]_i_1 
       (.I0(ddrAXI_bready_sig0),
        .I1(wtr[1]),
        .I2(wtr[0]),
        .I3(ddrAXI_bready_sig_i_2_n_0),
        .O(\wtr[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1582" *) 
  LUT5 #(
    .INIT(32'hBCCE8882)) 
    \wtr[2]_i_1 
       (.I0(ddrAXI_bready_sig_i_2_n_0),
        .I1(wtr[2]),
        .I2(wtr[0]),
        .I3(wtr[1]),
        .I4(ddrAXI_bready_sig0),
        .O(\wtr[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hBCCCCCCE88888882)) 
    \wtr[3]_i_1 
       (.I0(ddrAXI_bready_sig_i_2_n_0),
        .I1(wtr[3]),
        .I2(wtr[2]),
        .I3(wtr[1]),
        .I4(wtr[0]),
        .I5(ddrAXI_bready_sig0),
        .O(\wtr[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFAABF)) 
    \wtr[4]_i_1 
       (.I0(ddrAXI_bready_sig_i_2_n_0),
        .I1(ddrAXI_bready_sig_reg_0),
        .I2(ddrAXI_bvalid),
        .I3(ddrAXI_bready_sig_i_3_n_0),
        .I4(ddrAXI_bready_sig),
        .O(\wtr[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5FF0F0F050405040)) 
    \wtr[4]_i_2 
       (.I0(\wtr[4]_i_3_n_0 ),
        .I1(\wtr[4]_i_4_n_0 ),
        .I2(wtr[4]),
        .I3(wtr[3]),
        .I4(\wtr[4]_i_5_n_0 ),
        .I5(ddrAXI_bready_sig0),
        .O(\wtr[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1594" *) 
  LUT3 #(
    .INIT(8'hF7)) 
    \wtr[4]_i_3 
       (.I0(ddrAXI_bready_sig_reg_0),
        .I1(ddrAXI_bvalid),
        .I2(\FSM_onehot_stateWrite[2]_i_2_n_0 ),
        .O(\wtr[4]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1595" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \wtr[4]_i_4 
       (.I0(wtr[2]),
        .I1(wtr[0]),
        .I2(wtr[1]),
        .O(\wtr[4]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1584" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \wtr[4]_i_5 
       (.I0(wtr[0]),
        .I1(wtr[1]),
        .I2(wtr[2]),
        .O(\wtr[4]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1594" *) 
  LUT4 #(
    .INIT(16'h0015)) 
    \wtr[4]_i_6 
       (.I0(ddrAXI_bready_sig_i_3_n_0),
        .I1(ddrAXI_bvalid),
        .I2(ddrAXI_bready_sig_reg_0),
        .I3(ddrAXI_bready_sig),
        .O(ddrAXI_bready_sig0));
  FDCE #(
    .INIT(1'b0)) 
    \wtr_reg[0] 
       (.C(memclk),
        .CE(\wtr[4]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\wtr[0]_i_1_n_0 ),
        .Q(wtr[0]));
  FDCE #(
    .INIT(1'b0)) 
    \wtr_reg[1] 
       (.C(memclk),
        .CE(\wtr[4]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\wtr[1]_i_1_n_0 ),
        .Q(wtr[1]));
  FDCE #(
    .INIT(1'b0)) 
    \wtr_reg[2] 
       (.C(memclk),
        .CE(\wtr[4]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\wtr[2]_i_1_n_0 ),
        .Q(wtr[2]));
  FDCE #(
    .INIT(1'b0)) 
    \wtr_reg[3] 
       (.C(memclk),
        .CE(\wtr[4]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\wtr[3]_i_1_n_0 ),
        .Q(wtr[3]));
  FDCE #(
    .INIT(1'b0)) 
    \wtr_reg[4] 
       (.C(memclk),
        .CE(\wtr[4]_i_1_n_0 ),
        .CLR(\strbWrlock_i_reg[0]_0 ),
        .D(\wtr[4]_i_2_n_0 ),
        .Q(wtr[4]));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Decim
   (doutb,
    ackInvDecimConfig,
    ackInvDecimSet,
    ackInvDecimUnlock,
    ackInvDecimAcquire,
    rgbNotGray_reg_0,
    rng_reg_0,
    S,
    \stateStream_reg[0]_0 ,
    \stateOp_reg[1]_0 ,
    enAccbuf0,
    \tixVState_reg[1]_0 ,
    \stateStore_reg[1]_0 ,
    vsync_last_reg_0,
    \stateStream_reg[0]_1 ,
    \stateStream_reg[1]_0 ,
    \stateStream_reg[1]_1 ,
    \FSM_onehot_statePvwbufB_reg[5]_0 ,
    \ixTExp_lcl_reg[1]_0 ,
    \tkst_reg[31]_0 ,
    \acc0_lcl_reg[7]_0 ,
    ackPvwbufDecimToHostif,
    aclk_sig,
    AR,
    ackInvSet_sig,
    ackInvUnlock_sig_reg_0,
    hdrNotFix,
    rng_reg_1,
    CO,
    D,
    Q,
    enAccbuf_reg_0,
    vsync_last_reg_1,
    vsync_last_reg_2,
    reqInvDecimConfig,
    reqInvDecimAcquire,
    tixVState1,
    rgbVideoinToManyAXIS_tvalid,
    grayVideoinToManyAXIS_tvalid,
    enAccbuf1,
    O,
    NRowRaw,
    NColRaw,
    reqInvDecimSet,
    reqInvDecimUnlock,
    \tixVState_reg[1]_1 ,
    \tixVState_reg[1]_2 ,
    \stateStream_reg[0]_2 ,
    grayVideoinToManyAXIS_tlast,
    \dwrAccbuf_reg[15]_0 ,
    DI,
    \state_reg[5] ,
    videoinStateRgbegr_dbg,
    \state_reg[5]_0 ,
    \stateOp_reg[1]_1 ,
    E,
    \ixTExp_lcl_reg[3]_0 ,
    \tixVState_reg[1]_3 ,
    \tixVState_reg[1]_4 ,
    \tkst_reg[31]_1 ,
    \decimLast_reg[8]_0 ,
    \acc0_lcl_reg[7]_i_2 ,
    \acc2_lcl_reg[15]_i_2 ,
    pvwbufDecimToHostifAXIS_tready,
    reqPvwbufDecimToHostif,
    dnePvwbufDecimToHostif);
  output [63:0]doutb;
  output ackInvDecimConfig;
  output ackInvDecimSet;
  output ackInvDecimUnlock;
  output ackInvDecimAcquire;
  output rgbNotGray_reg_0;
  output rng_reg_0;
  output [7:0]S;
  output [0:0]\stateStream_reg[0]_0 ;
  output [1:0]\stateOp_reg[1]_0 ;
  output enAccbuf0;
  output [1:0]\tixVState_reg[1]_0 ;
  output [1:0]\stateStore_reg[1]_0 ;
  output vsync_last_reg_0;
  output \stateStream_reg[0]_1 ;
  output \stateStream_reg[1]_0 ;
  output \stateStream_reg[1]_1 ;
  output [1:0]\FSM_onehot_statePvwbufB_reg[5]_0 ;
  output [1:0]\ixTExp_lcl_reg[1]_0 ;
  output [31:0]\tkst_reg[31]_0 ;
  output [7:0]\acc0_lcl_reg[7]_0 ;
  output ackPvwbufDecimToHostif;
  input aclk_sig;
  input [0:0]AR;
  input ackInvSet_sig;
  input ackInvUnlock_sig_reg_0;
  input hdrNotFix;
  input rng_reg_1;
  input [0:0]CO;
  input [23:0]D;
  input [7:0]Q;
  input enAccbuf_reg_0;
  input vsync_last_reg_1;
  input vsync_last_reg_2;
  input reqInvDecimConfig;
  input reqInvDecimAcquire;
  input tixVState1;
  input rgbVideoinToManyAXIS_tvalid;
  input grayVideoinToManyAXIS_tvalid;
  input enAccbuf1;
  input [7:0]O;
  input [10:0]NRowRaw;
  input [10:0]NColRaw;
  input reqInvDecimSet;
  input reqInvDecimUnlock;
  input \tixVState_reg[1]_1 ;
  input [0:0]\tixVState_reg[1]_2 ;
  input \stateStream_reg[0]_2 ;
  input grayVideoinToManyAXIS_tlast;
  input [0:0]\dwrAccbuf_reg[15]_0 ;
  input [3:0]DI;
  input [1:0]\state_reg[5] ;
  input [2:0]videoinStateRgbegr_dbg;
  input [0:0]\state_reg[5]_0 ;
  input [1:0]\stateOp_reg[1]_1 ;
  input [0:0]E;
  input [3:0]\ixTExp_lcl_reg[3]_0 ;
  input [0:0]\tixVState_reg[1]_3 ;
  input [0:0]\tixVState_reg[1]_4 ;
  input [31:0]\tkst_reg[31]_1 ;
  input [7:0]\decimLast_reg[8]_0 ;
  input [7:0]\acc0_lcl_reg[7]_i_2 ;
  input [23:0]\acc2_lcl_reg[15]_i_2 ;
  input pvwbufDecimToHostifAXIS_tready;
  input reqPvwbufDecimToHostif;
  input dnePvwbufDecimToHostif;

  wire [0:0]AR;
  wire [0:0]CO;
  wire [23:0]D;
  wire [3:0]DI;
  wire [0:0]E;
  wire \FSM_onehot_statePvwbufB[0]_i_1_n_0 ;
  wire \FSM_onehot_statePvwbufB[2]_i_1_n_0 ;
  wire \FSM_onehot_statePvwbufB[3]_i_1_n_0 ;
  wire \FSM_onehot_statePvwbufB[3]_i_2_n_0 ;
  wire \FSM_onehot_statePvwbufB[5]_i_1_n_0 ;
  wire \FSM_onehot_statePvwbufB[5]_i_4_n_0 ;
  wire [1:0]\FSM_onehot_statePvwbufB_reg[5]_0 ;
  wire \FSM_onehot_statePvwbufB_reg_n_0_[0] ;
  wire \FSM_onehot_statePvwbufB_reg_n_0_[2] ;
  wire [10:0]NColRaw;
  wire [10:0]NRowRaw;
  wire [7:0]O;
  wire [7:0]Q;
  wire [7:0]S;
  wire \aAccbufB[0]_i_1_n_0 ;
  wire \aAccbufB[1]_i_1_n_0 ;
  wire \aAccbufB[2]_i_1_n_0 ;
  wire \aAccbufB[3]_i_1_n_0 ;
  wire \aAccbufB[4]_i_1_n_0 ;
  wire \aAccbufB[5]_i_1_n_0 ;
  wire \aAccbufB[5]_i_2_n_0 ;
  wire \aAccbufB[6]_i_1_n_0 ;
  wire \aAccbufB[7]_i_1_n_0 ;
  wire \aAccbufB[7]_i_2_n_0 ;
  wire \aAccbufB[7]_i_3_n_0 ;
  wire \aAccbufB[7]_i_4_n_0 ;
  wire \aAccbufB_reg_n_0_[0] ;
  wire \aAccbufB_reg_n_0_[1] ;
  wire \aAccbufB_reg_n_0_[2] ;
  wire \aAccbufB_reg_n_0_[3] ;
  wire \aAccbufB_reg_n_0_[4] ;
  wire \aAccbufB_reg_n_0_[5] ;
  wire \aAccbufB_reg_n_0_[6] ;
  wire \aAccbufB_reg_n_0_[7] ;
  wire \aAccbuf[0]_i_1_n_0 ;
  wire \aAccbuf[1]_i_1_n_0 ;
  wire \aAccbuf[2]_i_1_n_0 ;
  wire \aAccbuf[3]_i_1_n_0 ;
  wire \aAccbuf[4]_i_1_n_0 ;
  wire \aAccbuf[5]_i_1_n_0 ;
  wire \aAccbuf[5]_i_2_n_0 ;
  wire \aAccbuf[6]_i_1_n_0 ;
  wire \aAccbuf[7]_i_1_n_0 ;
  wire \aAccbuf[7]_i_2_n_0 ;
  wire \aAccbuf[7]_i_3_n_0 ;
  wire \aAccbuf[7]_i_4_n_0 ;
  wire \aAccbuf_reg_n_0_[0] ;
  wire \aAccbuf_reg_n_0_[1] ;
  wire \aAccbuf_reg_n_0_[2] ;
  wire \aAccbuf_reg_n_0_[3] ;
  wire \aAccbuf_reg_n_0_[4] ;
  wire \aAccbuf_reg_n_0_[5] ;
  wire \aAccbuf_reg_n_0_[6] ;
  wire \aAccbuf_reg_n_0_[7] ;
  wire aPvwbuf1;
  wire \aPvwbufB[0]_i_1_n_0 ;
  wire \aPvwbufB[10]_i_1_n_0 ;
  wire \aPvwbufB[11]_i_1_n_0 ;
  wire \aPvwbufB[12]_i_1_n_0 ;
  wire \aPvwbufB[12]_i_2_n_0 ;
  wire \aPvwbufB[12]_i_3_n_0 ;
  wire \aPvwbufB[1]_i_1_n_0 ;
  wire \aPvwbufB[2]_i_1_n_0 ;
  wire \aPvwbufB[3]_i_1_n_0 ;
  wire \aPvwbufB[4]_i_1_n_0 ;
  wire \aPvwbufB[5]_i_1_n_0 ;
  wire \aPvwbufB[5]_i_2_n_0 ;
  wire \aPvwbufB[6]_i_1_n_0 ;
  wire \aPvwbufB[7]_i_1_n_0 ;
  wire \aPvwbufB[8]_i_1_n_0 ;
  wire \aPvwbufB[9]_i_1_n_0 ;
  wire \aPvwbufB[9]_i_2_n_0 ;
  wire \aPvwbufB_reg_n_0_[0] ;
  wire \aPvwbufB_reg_n_0_[10] ;
  wire \aPvwbufB_reg_n_0_[11] ;
  wire \aPvwbufB_reg_n_0_[12] ;
  wire \aPvwbufB_reg_n_0_[1] ;
  wire \aPvwbufB_reg_n_0_[2] ;
  wire \aPvwbufB_reg_n_0_[3] ;
  wire \aPvwbufB_reg_n_0_[4] ;
  wire \aPvwbufB_reg_n_0_[5] ;
  wire \aPvwbufB_reg_n_0_[6] ;
  wire \aPvwbufB_reg_n_0_[7] ;
  wire \aPvwbufB_reg_n_0_[8] ;
  wire \aPvwbufB_reg_n_0_[9] ;
  wire \aPvwbuf[10]_i_2_n_0 ;
  wire \aPvwbuf[14]_i_2_n_0 ;
  wire \aPvwbuf[15]_i_1_n_0 ;
  wire \aPvwbuf[15]_i_3_n_0 ;
  wire \aPvwbuf[5]_i_2_n_0 ;
  wire \aPvwbuf[9]_i_2_n_0 ;
  wire [15:0]aPvwbuf_reg;
  wire [19:0]acc0;
  wire \acc0_lcl[19]_i_7_n_0 ;
  wire [7:0]\acc0_lcl_reg[7]_0 ;
  wire [7:0]\acc0_lcl_reg[7]_i_2 ;
  wire \acc0_lcl_reg_n_0_[0] ;
  wire \acc0_lcl_reg_n_0_[10] ;
  wire \acc0_lcl_reg_n_0_[11] ;
  wire \acc0_lcl_reg_n_0_[12] ;
  wire \acc0_lcl_reg_n_0_[13] ;
  wire \acc0_lcl_reg_n_0_[14] ;
  wire \acc0_lcl_reg_n_0_[15] ;
  wire \acc0_lcl_reg_n_0_[16] ;
  wire \acc0_lcl_reg_n_0_[17] ;
  wire \acc0_lcl_reg_n_0_[18] ;
  wire \acc0_lcl_reg_n_0_[19] ;
  wire \acc0_lcl_reg_n_0_[1] ;
  wire \acc0_lcl_reg_n_0_[2] ;
  wire \acc0_lcl_reg_n_0_[3] ;
  wire \acc0_lcl_reg_n_0_[4] ;
  wire \acc0_lcl_reg_n_0_[5] ;
  wire \acc0_lcl_reg_n_0_[6] ;
  wire \acc0_lcl_reg_n_0_[7] ;
  wire \acc0_lcl_reg_n_0_[8] ;
  wire \acc0_lcl_reg_n_0_[9] ;
  wire \acc0_reg_n_0_[0] ;
  wire \acc0_reg_n_0_[10] ;
  wire \acc0_reg_n_0_[11] ;
  wire \acc0_reg_n_0_[12] ;
  wire \acc0_reg_n_0_[13] ;
  wire \acc0_reg_n_0_[14] ;
  wire \acc0_reg_n_0_[15] ;
  wire \acc0_reg_n_0_[16] ;
  wire \acc0_reg_n_0_[17] ;
  wire \acc0_reg_n_0_[18] ;
  wire \acc0_reg_n_0_[19] ;
  wire \acc0_reg_n_0_[1] ;
  wire \acc0_reg_n_0_[2] ;
  wire \acc0_reg_n_0_[3] ;
  wire \acc0_reg_n_0_[4] ;
  wire \acc0_reg_n_0_[5] ;
  wire \acc0_reg_n_0_[6] ;
  wire \acc0_reg_n_0_[7] ;
  wire \acc0_reg_n_0_[8] ;
  wire \acc0_reg_n_0_[9] ;
  wire [19:0]acc1;
  wire \acc1_lcl_reg_n_0_[0] ;
  wire \acc1_lcl_reg_n_0_[10] ;
  wire \acc1_lcl_reg_n_0_[11] ;
  wire \acc1_lcl_reg_n_0_[12] ;
  wire \acc1_lcl_reg_n_0_[13] ;
  wire \acc1_lcl_reg_n_0_[14] ;
  wire \acc1_lcl_reg_n_0_[15] ;
  wire \acc1_lcl_reg_n_0_[16] ;
  wire \acc1_lcl_reg_n_0_[17] ;
  wire \acc1_lcl_reg_n_0_[18] ;
  wire \acc1_lcl_reg_n_0_[19] ;
  wire \acc1_lcl_reg_n_0_[1] ;
  wire \acc1_lcl_reg_n_0_[2] ;
  wire \acc1_lcl_reg_n_0_[3] ;
  wire \acc1_lcl_reg_n_0_[4] ;
  wire \acc1_lcl_reg_n_0_[5] ;
  wire \acc1_lcl_reg_n_0_[6] ;
  wire \acc1_lcl_reg_n_0_[7] ;
  wire \acc1_lcl_reg_n_0_[8] ;
  wire \acc1_lcl_reg_n_0_[9] ;
  wire \acc1_reg_n_0_[0] ;
  wire \acc1_reg_n_0_[10] ;
  wire \acc1_reg_n_0_[11] ;
  wire \acc1_reg_n_0_[12] ;
  wire \acc1_reg_n_0_[13] ;
  wire \acc1_reg_n_0_[14] ;
  wire \acc1_reg_n_0_[15] ;
  wire \acc1_reg_n_0_[16] ;
  wire \acc1_reg_n_0_[17] ;
  wire \acc1_reg_n_0_[18] ;
  wire \acc1_reg_n_0_[19] ;
  wire \acc1_reg_n_0_[1] ;
  wire \acc1_reg_n_0_[2] ;
  wire \acc1_reg_n_0_[3] ;
  wire \acc1_reg_n_0_[4] ;
  wire \acc1_reg_n_0_[5] ;
  wire \acc1_reg_n_0_[6] ;
  wire \acc1_reg_n_0_[7] ;
  wire \acc1_reg_n_0_[8] ;
  wire \acc1_reg_n_0_[9] ;
  wire acc2;
  wire [23:0]\acc2_lcl_reg[15]_i_2 ;
  wire \acc2_lcl_reg_n_0_[0] ;
  wire \acc2_lcl_reg_n_0_[10] ;
  wire \acc2_lcl_reg_n_0_[11] ;
  wire \acc2_lcl_reg_n_0_[12] ;
  wire \acc2_lcl_reg_n_0_[13] ;
  wire \acc2_lcl_reg_n_0_[14] ;
  wire \acc2_lcl_reg_n_0_[15] ;
  wire \acc2_lcl_reg_n_0_[16] ;
  wire \acc2_lcl_reg_n_0_[17] ;
  wire \acc2_lcl_reg_n_0_[18] ;
  wire \acc2_lcl_reg_n_0_[19] ;
  wire \acc2_lcl_reg_n_0_[1] ;
  wire \acc2_lcl_reg_n_0_[2] ;
  wire \acc2_lcl_reg_n_0_[3] ;
  wire \acc2_lcl_reg_n_0_[4] ;
  wire \acc2_lcl_reg_n_0_[5] ;
  wire \acc2_lcl_reg_n_0_[6] ;
  wire \acc2_lcl_reg_n_0_[7] ;
  wire \acc2_lcl_reg_n_0_[8] ;
  wire \acc2_lcl_reg_n_0_[9] ;
  wire \acc2_reg_n_0_[0] ;
  wire \acc2_reg_n_0_[10] ;
  wire \acc2_reg_n_0_[11] ;
  wire \acc2_reg_n_0_[12] ;
  wire \acc2_reg_n_0_[13] ;
  wire \acc2_reg_n_0_[14] ;
  wire \acc2_reg_n_0_[15] ;
  wire \acc2_reg_n_0_[16] ;
  wire \acc2_reg_n_0_[17] ;
  wire \acc2_reg_n_0_[18] ;
  wire \acc2_reg_n_0_[19] ;
  wire \acc2_reg_n_0_[1] ;
  wire \acc2_reg_n_0_[2] ;
  wire \acc2_reg_n_0_[3] ;
  wire \acc2_reg_n_0_[4] ;
  wire \acc2_reg_n_0_[5] ;
  wire \acc2_reg_n_0_[6] ;
  wire \acc2_reg_n_0_[7] ;
  wire \acc2_reg_n_0_[8] ;
  wire \acc2_reg_n_0_[9] ;
  wire ackInvAcquire_sig;
  wire ackInvConfig_sig;
  wire ackInvConfig_sig_i_4_n_0;
  wire ackInvConfig_sig_i_5_n_0;
  wire ackInvDecimAcquire;
  wire ackInvDecimConfig;
  wire ackInvDecimSet;
  wire ackInvDecimUnlock;
  wire ackInvSet_sig;
  wire ackInvUnlock_sig;
  wire ackInvUnlock_sig_reg_0;
  wire ackPvwbufDecimToHostif;
  wire aclk_sig;
  wire [10:0]col;
  wire [2:2]col2__0;
  wire \col[0]_i_1__0_n_0 ;
  wire \col[10]_i_10_n_0 ;
  wire \col[10]_i_11_n_0 ;
  wire \col[10]_i_12_n_0 ;
  wire \col[10]_i_13_n_0 ;
  wire \col[10]_i_14_n_0 ;
  wire \col[10]_i_15_n_0 ;
  wire \col[10]_i_16_n_0 ;
  wire \col[10]_i_17_n_0 ;
  wire \col[10]_i_18_n_0 ;
  wire \col[10]_i_19_n_0 ;
  wire \col[10]_i_1__0_n_0 ;
  wire \col[10]_i_20_n_0 ;
  wire \col[10]_i_2__0_n_0 ;
  wire \col[10]_i_3__0_n_0 ;
  wire \col[10]_i_5_n_0 ;
  wire \col[10]_i_6_n_0 ;
  wire \col[10]_i_7_n_0 ;
  wire \col[10]_i_8_n_0 ;
  wire \col[10]_i_9_n_0 ;
  wire \col[1]_i_1__0_n_0 ;
  wire \col[2]_i_1__0_n_0 ;
  wire \col[3]_i_1__0_n_0 ;
  wire \col[4]_i_1__0_n_0 ;
  wire \col[5]_i_1__0_n_0 ;
  wire \col[5]_i_2__0_n_0 ;
  wire \col[6]_i_1__0_n_0 ;
  wire \col[7]_i_1__0_n_0 ;
  wire \col[8]_i_1__0_n_0 ;
  wire \col[9]_i_1__0_n_0 ;
  wire \col[9]_i_2__0_n_0 ;
  wire \col_reg[10]_i_4_n_2 ;
  wire \col_reg[10]_i_4_n_3 ;
  wire \col_reg[10]_i_4_n_4 ;
  wire \col_reg[10]_i_4_n_5 ;
  wire \col_reg[10]_i_4_n_6 ;
  wire \col_reg[10]_i_4_n_7 ;
  wire [3:0]colacc;
  wire [3:0]colaccLast0;
  wire \colacc[0]_i_1_n_0 ;
  wire \colacc[1]_i_1_n_0 ;
  wire \colacc[2]_i_1_n_0 ;
  wire \colacc[3]_i_1_n_0 ;
  wire \colacc[3]_i_2_n_0 ;
  wire \colacc[3]_i_3_n_0 ;
  wire \colacc[3]_i_4_n_0 ;
  wire \colacc[3]_i_6_n_0 ;
  wire [23:16]decim1;
  wire decim10_n_100;
  wire decim10_n_101;
  wire decim10_n_102;
  wire decim10_n_103;
  wire decim10_n_104;
  wire decim10_n_105;
  wire decim10_n_75;
  wire decim10_n_76;
  wire decim10_n_77;
  wire decim10_n_78;
  wire decim10_n_79;
  wire decim10_n_80;
  wire decim10_n_81;
  wire decim10_n_82;
  wire decim10_n_83;
  wire decim10_n_84;
  wire decim10_n_85;
  wire decim10_n_86;
  wire decim10_n_87;
  wire decim10_n_88;
  wire decim10_n_89;
  wire decim10_n_90;
  wire decim10_n_91;
  wire decim10_n_92;
  wire decim10_n_93;
  wire decim10_n_94;
  wire decim10_n_95;
  wire decim10_n_96;
  wire decim10_n_97;
  wire decim10_n_98;
  wire decim10_n_99;
  wire \decim1[16]_i_1_n_0 ;
  wire \decim1[17]_i_1_n_0 ;
  wire \decim1[18]_i_1_n_0 ;
  wire \decim1[19]_i_1_n_0 ;
  wire \decim1[20]_i_1_n_0 ;
  wire \decim1[21]_i_1_n_0 ;
  wire \decim1[22]_i_1_n_0 ;
  wire \decim1[23]_i_1_n_0 ;
  wire decim2;
  wire decim20_n_100;
  wire decim20_n_101;
  wire decim20_n_102;
  wire decim20_n_103;
  wire decim20_n_104;
  wire decim20_n_105;
  wire decim20_n_75;
  wire decim20_n_76;
  wire decim20_n_77;
  wire decim20_n_78;
  wire decim20_n_79;
  wire decim20_n_80;
  wire decim20_n_81;
  wire decim20_n_82;
  wire decim20_n_83;
  wire decim20_n_84;
  wire decim20_n_85;
  wire decim20_n_86;
  wire decim20_n_87;
  wire decim20_n_88;
  wire decim20_n_89;
  wire decim20_n_90;
  wire decim20_n_91;
  wire decim20_n_92;
  wire decim20_n_93;
  wire decim20_n_94;
  wire decim20_n_95;
  wire decim20_n_96;
  wire decim20_n_97;
  wire decim20_n_98;
  wire decim20_n_99;
  wire \decim2[16]_i_1_n_0 ;
  wire \decim2[17]_i_1_n_0 ;
  wire \decim2[18]_i_1_n_0 ;
  wire \decim2[19]_i_1_n_0 ;
  wire \decim2[20]_i_1_n_0 ;
  wire \decim2[21]_i_1_n_0 ;
  wire \decim2[22]_i_1_n_0 ;
  wire \decim2[23]_i_2_n_0 ;
  wire \decim2_reg_n_0_[16] ;
  wire \decim2_reg_n_0_[17] ;
  wire \decim2_reg_n_0_[18] ;
  wire \decim2_reg_n_0_[19] ;
  wire \decim2_reg_n_0_[20] ;
  wire \decim2_reg_n_0_[21] ;
  wire \decim2_reg_n_0_[22] ;
  wire \decim2_reg_n_0_[23] ;
  wire [15:0]decimLast;
  wire \decimLast[15]_i_2_n_0 ;
  wire \decimLast[15]_i_3_n_0 ;
  wire \decimLast[15]_i_4_n_0 ;
  wire \decimLast[15]_i_5_n_0 ;
  wire \decimLast[15]_i_6_n_0 ;
  wire \decimLast[15]_i_7_n_0 ;
  wire \decimLast[15]_i_8_n_0 ;
  wire \decimLast_reg[15]_i_1_n_2 ;
  wire \decimLast_reg[15]_i_1_n_3 ;
  wire \decimLast_reg[15]_i_1_n_4 ;
  wire \decimLast_reg[15]_i_1_n_5 ;
  wire \decimLast_reg[15]_i_1_n_6 ;
  wire \decimLast_reg[15]_i_1_n_7 ;
  wire [7:0]\decimLast_reg[8]_0 ;
  wire [5:5]decimStateStream_dbg;
  wire dnePvwbufDecimToHostif;
  wire [63:0]doutb;
  wire [59:0]dwrA;
  wire \dwrAccbuf[59]_i_1_n_0 ;
  wire [0:0]\dwrAccbuf_reg[15]_0 ;
  wire dwrPvwbuf0_n_100;
  wire dwrPvwbuf0_n_101;
  wire dwrPvwbuf0_n_102;
  wire dwrPvwbuf0_n_103;
  wire dwrPvwbuf0_n_104;
  wire dwrPvwbuf0_n_105;
  wire dwrPvwbuf0_n_75;
  wire dwrPvwbuf0_n_76;
  wire dwrPvwbuf0_n_77;
  wire dwrPvwbuf0_n_78;
  wire dwrPvwbuf0_n_79;
  wire dwrPvwbuf0_n_80;
  wire dwrPvwbuf0_n_81;
  wire dwrPvwbuf0_n_82;
  wire dwrPvwbuf0_n_83;
  wire dwrPvwbuf0_n_84;
  wire dwrPvwbuf0_n_85;
  wire dwrPvwbuf0_n_86;
  wire dwrPvwbuf0_n_87;
  wire dwrPvwbuf0_n_88;
  wire dwrPvwbuf0_n_89;
  wire dwrPvwbuf0_n_90;
  wire dwrPvwbuf0_n_91;
  wire dwrPvwbuf0_n_92;
  wire dwrPvwbuf0_n_93;
  wire dwrPvwbuf0_n_94;
  wire dwrPvwbuf0_n_95;
  wire dwrPvwbuf0_n_96;
  wire dwrPvwbuf0_n_97;
  wire dwrPvwbuf0_n_98;
  wire dwrPvwbuf0_n_99;
  wire \dwrPvwbuf[7]_i_2_n_0 ;
  wire \dwrPvwbuf_reg_n_0_[0] ;
  wire \dwrPvwbuf_reg_n_0_[1] ;
  wire \dwrPvwbuf_reg_n_0_[2] ;
  wire \dwrPvwbuf_reg_n_0_[3] ;
  wire \dwrPvwbuf_reg_n_0_[4] ;
  wire \dwrPvwbuf_reg_n_0_[5] ;
  wire \dwrPvwbuf_reg_n_0_[6] ;
  wire \dwrPvwbuf_reg_n_0_[7] ;
  wire [10:0]edge2;
  wire \edge_reg_n_0_[0] ;
  wire \edge_reg_n_0_[1] ;
  wire \edge_reg_n_0_[2] ;
  wire \edge_reg_n_0_[3] ;
  wire \edge_reg_n_0_[4] ;
  wire enAccbuf0;
  wire enAccbuf1;
  wire enAccbuf11_out;
  wire enAccbuf_i_1_n_0;
  wire enAccbuf_i_3_n_0;
  wire enAccbuf_reg_0;
  wire enAccbuf_reg_n_0;
  wire enPvwbufB;
  wire grayVideoinToManyAXIS_tlast;
  wire grayVideoinToManyAXIS_tvalid;
  wire hdrNotFix;
  wire \i[0]_i_1__4_n_0 ;
  wire \i[1]_i_1__2_n_0 ;
  wire \i[1]_i_2__1_n_0 ;
  wire \i_reg_n_0_[0] ;
  wire \i_reg_n_0_[1] ;
  wire [1:0]\ixTExp_lcl_reg[1]_0 ;
  wire [3:0]\ixTExp_lcl_reg[3]_0 ;
  wire \ixTExp_lcl_reg_n_0_[2] ;
  wire \ixTExp_lcl_reg_n_0_[3] ;
  wire [15:0]minusOp;
  wire myAccbuf_n_0;
  wire myAccbuf_n_1;
  wire myAccbuf_n_10;
  wire myAccbuf_n_11;
  wire myAccbuf_n_12;
  wire myAccbuf_n_13;
  wire myAccbuf_n_14;
  wire myAccbuf_n_15;
  wire myAccbuf_n_16;
  wire myAccbuf_n_17;
  wire myAccbuf_n_18;
  wire myAccbuf_n_19;
  wire myAccbuf_n_2;
  wire myAccbuf_n_3;
  wire myAccbuf_n_4;
  wire myAccbuf_n_5;
  wire myAccbuf_n_6;
  wire myAccbuf_n_7;
  wire myAccbuf_n_8;
  wire myAccbuf_n_9;
  wire [15:0]p_0_in;
  wire [7:0]p_1_in;
  wire pvwbufDecimToHostifAXIS_tready;
  wire reqInvDecimAcquire;
  wire reqInvDecimConfig;
  wire reqInvDecimSet;
  wire reqInvDecimUnlock;
  wire reqPvwbufDecimToHostif;
  wire rgbNotGray_reg_0;
  wire rgbVideoinToManyAXIS_tvalid;
  wire rng_reg_0;
  wire rng_reg_1;
  wire row;
  wire [2:2]row2__0;
  wire \row[0]_i_1__0_n_0 ;
  wire \row[10]_i_1__0_n_0 ;
  wire \row[10]_i_2_n_0 ;
  wire \row[10]_i_3_n_0 ;
  wire \row[1]_i_1__0_n_0 ;
  wire \row[2]_i_1__0_n_0 ;
  wire \row[3]_i_1__0_n_0 ;
  wire \row[4]_i_1__0_n_0 ;
  wire \row[5]_i_1__0_n_0 ;
  wire \row[5]_i_2__0_n_0 ;
  wire \row[6]_i_1__0_n_0 ;
  wire \row[7]_i_1__0_n_0 ;
  wire \row[8]_i_1__0_n_0 ;
  wire \row[9]_i_1__0_n_0 ;
  wire \row[9]_i_2__0_n_0 ;
  wire \row_reg_n_0_[0] ;
  wire \row_reg_n_0_[10] ;
  wire \row_reg_n_0_[1] ;
  wire \row_reg_n_0_[2] ;
  wire \row_reg_n_0_[3] ;
  wire \row_reg_n_0_[4] ;
  wire \row_reg_n_0_[5] ;
  wire \row_reg_n_0_[6] ;
  wire \row_reg_n_0_[7] ;
  wire \row_reg_n_0_[8] ;
  wire \row_reg_n_0_[9] ;
  wire [3:0]rowacc;
  wire [3:0]rowaccLast;
  wire \rowacc[0]_i_1_n_0 ;
  wire \rowacc[1]_i_1_n_0 ;
  wire \rowacc[2]_i_1_n_0 ;
  wire \rowacc[3]_i_2_n_0 ;
  wire \rowacc[3]_i_3_n_0 ;
  wire [1:0]\stateOp_reg[1]_0 ;
  wire [1:0]\stateOp_reg[1]_1 ;
  wire \stateStore[0]_i_1_n_0 ;
  wire \stateStore[0]_i_2_n_0 ;
  wire \stateStore[1]_i_10_n_0 ;
  wire \stateStore[1]_i_1_n_0 ;
  wire \stateStore[1]_i_2_n_0 ;
  wire \stateStore[1]_i_3_n_0 ;
  wire \stateStore[1]_i_4_n_0 ;
  wire \stateStore[1]_i_5_n_0 ;
  wire \stateStore[1]_i_6_n_0 ;
  wire \stateStore[1]_i_7_n_0 ;
  wire \stateStore[1]_i_8_n_0 ;
  wire \stateStore[1]_i_9_n_0 ;
  wire [1:0]\stateStore_reg[1]_0 ;
  wire [2:0]stateStream;
  wire \stateStream[0]_i_1_n_0 ;
  wire \stateStream[0]_i_2_n_0 ;
  wire \stateStream[1]_i_1_n_0 ;
  wire \stateStream[1]_i_2_n_0 ;
  wire \stateStream[2]_i_10_n_0 ;
  wire \stateStream[2]_i_11_n_0 ;
  wire \stateStream[2]_i_12_n_0 ;
  wire \stateStream[2]_i_13_n_0 ;
  wire \stateStream[2]_i_14_n_0 ;
  wire \stateStream[2]_i_15_n_0 ;
  wire \stateStream[2]_i_16_n_0 ;
  wire \stateStream[2]_i_17_n_0 ;
  wire \stateStream[2]_i_18_n_0 ;
  wire \stateStream[2]_i_19_n_0 ;
  wire \stateStream[2]_i_1_n_0 ;
  wire \stateStream[2]_i_20_n_0 ;
  wire \stateStream[2]_i_21_n_0 ;
  wire \stateStream[2]_i_22_n_0 ;
  wire \stateStream[2]_i_2_n_0 ;
  wire \stateStream[2]_i_3_n_0 ;
  wire \stateStream[2]_i_4_n_0 ;
  wire \stateStream[2]_i_6_n_0 ;
  wire \stateStream[2]_i_7_n_0 ;
  wire \stateStream[2]_i_8_n_0 ;
  wire \stateStream[2]_i_9_n_0 ;
  wire [0:0]\stateStream_reg[0]_0 ;
  wire \stateStream_reg[0]_1 ;
  wire \stateStream_reg[0]_2 ;
  wire \stateStream_reg[1]_0 ;
  wire \stateStream_reg[1]_1 ;
  wire \stateStream_reg[2]_i_5_n_2 ;
  wire \stateStream_reg[2]_i_5_n_3 ;
  wire \stateStream_reg[2]_i_5_n_4 ;
  wire \stateStream_reg[2]_i_5_n_5 ;
  wire \stateStream_reg[2]_i_5_n_6 ;
  wire \stateStream_reg[2]_i_5_n_7 ;
  wire [1:0]\state_reg[5] ;
  wire [0:0]\state_reg[5]_0 ;
  wire strbStore5_out;
  wire strbStore_i_1_n_0;
  wire strbStore_reg_n_0;
  wire tixVState1;
  wire \tixVState[1]_i_5_n_0 ;
  wire [1:0]\tixVState_reg[1]_0 ;
  wire \tixVState_reg[1]_1 ;
  wire [0:0]\tixVState_reg[1]_2 ;
  wire [0:0]\tixVState_reg[1]_3 ;
  wire [0:0]\tixVState_reg[1]_4 ;
  wire tkst;
  wire [31:0]\tkst_reg[31]_0 ;
  wire [31:0]\tkst_reg[31]_1 ;
  wire [2:0]videoinStateRgbegr_dbg;
  wire vsync_last_i_1__0_n_0;
  wire vsync_last_reg_0;
  wire vsync_last_reg_1;
  wire vsync_last_reg_2;
  wire vsync_last_reg_n_0;
  wire [7:6]\NLW_col_reg[10]_i_4_CO_UNCONNECTED ;
  wire [7:0]\NLW_col_reg[10]_i_4_O_UNCONNECTED ;
  wire NLW_decim10_CARRYCASCOUT_UNCONNECTED;
  wire NLW_decim10_MULTSIGNOUT_UNCONNECTED;
  wire NLW_decim10_OVERFLOW_UNCONNECTED;
  wire NLW_decim10_PATTERNBDETECT_UNCONNECTED;
  wire NLW_decim10_PATTERNDETECT_UNCONNECTED;
  wire NLW_decim10_UNDERFLOW_UNCONNECTED;
  wire [29:0]NLW_decim10_ACOUT_UNCONNECTED;
  wire [17:0]NLW_decim10_BCOUT_UNCONNECTED;
  wire [3:0]NLW_decim10_CARRYOUT_UNCONNECTED;
  wire [47:31]NLW_decim10_P_UNCONNECTED;
  wire [47:0]NLW_decim10_PCOUT_UNCONNECTED;
  wire [7:0]NLW_decim10_XOROUT_UNCONNECTED;
  wire NLW_decim20_CARRYCASCOUT_UNCONNECTED;
  wire NLW_decim20_MULTSIGNOUT_UNCONNECTED;
  wire NLW_decim20_OVERFLOW_UNCONNECTED;
  wire NLW_decim20_PATTERNBDETECT_UNCONNECTED;
  wire NLW_decim20_PATTERNDETECT_UNCONNECTED;
  wire NLW_decim20_UNDERFLOW_UNCONNECTED;
  wire [29:0]NLW_decim20_ACOUT_UNCONNECTED;
  wire [17:0]NLW_decim20_BCOUT_UNCONNECTED;
  wire [3:0]NLW_decim20_CARRYOUT_UNCONNECTED;
  wire [47:31]NLW_decim20_P_UNCONNECTED;
  wire [47:0]NLW_decim20_PCOUT_UNCONNECTED;
  wire [7:0]NLW_decim20_XOROUT_UNCONNECTED;
  wire [7:6]\NLW_decimLast_reg[15]_i_1_CO_UNCONNECTED ;
  wire [7:7]\NLW_decimLast_reg[15]_i_1_O_UNCONNECTED ;
  wire NLW_dwrPvwbuf0_CARRYCASCOUT_UNCONNECTED;
  wire NLW_dwrPvwbuf0_MULTSIGNOUT_UNCONNECTED;
  wire NLW_dwrPvwbuf0_OVERFLOW_UNCONNECTED;
  wire NLW_dwrPvwbuf0_PATTERNBDETECT_UNCONNECTED;
  wire NLW_dwrPvwbuf0_PATTERNDETECT_UNCONNECTED;
  wire NLW_dwrPvwbuf0_UNDERFLOW_UNCONNECTED;
  wire [29:0]NLW_dwrPvwbuf0_ACOUT_UNCONNECTED;
  wire [17:0]NLW_dwrPvwbuf0_BCOUT_UNCONNECTED;
  wire [3:0]NLW_dwrPvwbuf0_CARRYOUT_UNCONNECTED;
  wire [47:31]NLW_dwrPvwbuf0_P_UNCONNECTED;
  wire [47:0]NLW_dwrPvwbuf0_PCOUT_UNCONNECTED;
  wire [7:0]NLW_dwrPvwbuf0_XOROUT_UNCONNECTED;
  wire [7:6]\NLW_stateStream_reg[2]_i_5_CO_UNCONNECTED ;
  wire [7:0]\NLW_stateStream_reg[2]_i_5_O_UNCONNECTED ;

  LUT6 #(
    .INIT(64'h000100010001FF01)) 
    \FSM_onehot_statePvwbufB[0]_i_1 
       (.I0(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .I1(enPvwbufB),
        .I2(\FSM_onehot_statePvwbufB_reg[5]_0 [1]),
        .I3(\FSM_onehot_statePvwbufB_reg[5]_0 [0]),
        .I4(reqPvwbufDecimToHostif),
        .I5(pvwbufDecimToHostifAXIS_tready),
        .O(\FSM_onehot_statePvwbufB[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1663" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \FSM_onehot_statePvwbufB[2]_i_1 
       (.I0(pvwbufDecimToHostifAXIS_tready),
        .I1(\FSM_onehot_statePvwbufB_reg[5]_0 [0]),
        .I2(\FSM_onehot_statePvwbufB[3]_i_2_n_0 ),
        .O(\FSM_onehot_statePvwbufB[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1663" *) 
  LUT4 #(
    .INIT(16'hFF80)) 
    \FSM_onehot_statePvwbufB[3]_i_1 
       (.I0(\FSM_onehot_statePvwbufB_reg[5]_0 [0]),
        .I1(pvwbufDecimToHostifAXIS_tready),
        .I2(\FSM_onehot_statePvwbufB[3]_i_2_n_0 ),
        .I3(\FSM_onehot_statePvwbufB_reg[5]_0 [1]),
        .O(\FSM_onehot_statePvwbufB[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFB)) 
    \FSM_onehot_statePvwbufB[3]_i_2 
       (.I0(\aPvwbufB_reg_n_0_[11] ),
        .I1(\aPvwbufB_reg_n_0_[12] ),
        .I2(\aPvwbufB_reg_n_0_[8] ),
        .I3(\aPvwbufB_reg_n_0_[10] ),
        .I4(\aPvwbufB[12]_i_3_n_0 ),
        .O(\FSM_onehot_statePvwbufB[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFF888)) 
    \FSM_onehot_statePvwbufB[5]_i_1 
       (.I0(reqPvwbufDecimToHostif),
        .I1(\FSM_onehot_statePvwbufB_reg[5]_0 [1]),
        .I2(pvwbufDecimToHostifAXIS_tready),
        .I3(\FSM_onehot_statePvwbufB_reg[5]_0 [0]),
        .I4(\FSM_onehot_statePvwbufB[5]_i_4_n_0 ),
        .I5(enPvwbufB),
        .O(\FSM_onehot_statePvwbufB[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h8F8F8F88)) 
    \FSM_onehot_statePvwbufB[5]_i_4 
       (.I0(\FSM_onehot_statePvwbufB_reg_n_0_[2] ),
        .I1(dnePvwbufDecimToHostif),
        .I2(reqPvwbufDecimToHostif),
        .I3(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .I4(\FSM_onehot_statePvwbufB_reg[5]_0 [0]),
        .O(\FSM_onehot_statePvwbufB[5]_i_4_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDPE #(
    .INIT(1'b1)) 
    \FSM_onehot_statePvwbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_statePvwbufB[5]_i_1_n_0 ),
        .D(\FSM_onehot_statePvwbufB[0]_i_1_n_0 ),
        .PRE(AR),
        .Q(\FSM_onehot_statePvwbufB_reg_n_0_[0] ));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_statePvwbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_statePvwbufB[5]_i_1_n_0 ),
        .CLR(AR),
        .D(enPvwbufB),
        .Q(\FSM_onehot_statePvwbufB_reg[5]_0 [0]));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_statePvwbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_statePvwbufB[5]_i_1_n_0 ),
        .CLR(AR),
        .D(\FSM_onehot_statePvwbufB[2]_i_1_n_0 ),
        .Q(\FSM_onehot_statePvwbufB_reg_n_0_[2] ));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_statePvwbufB_reg[3] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_statePvwbufB[5]_i_1_n_0 ),
        .CLR(AR),
        .D(\FSM_onehot_statePvwbufB[3]_i_1_n_0 ),
        .Q(enPvwbufB));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_statePvwbufB_reg[5] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_statePvwbufB[5]_i_1_n_0 ),
        .CLR(AR),
        .D(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .Q(\FSM_onehot_statePvwbufB_reg[5]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1632" *) 
  LUT5 #(
    .INIT(32'h00001000)) 
    \aAccbufB[0]_i_1 
       (.I0(stateStream[1]),
        .I1(stateStream[2]),
        .I2(rng_reg_0),
        .I3(stateStream[0]),
        .I4(\aAccbufB_reg_n_0_[0] ),
        .O(\aAccbufB[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800080000)) 
    \aAccbufB[1]_i_1 
       (.I0(stateStream[0]),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(\aAccbufB_reg_n_0_[0] ),
        .I5(\aAccbufB_reg_n_0_[1] ),
        .O(\aAccbufB[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1633" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \aAccbufB[2]_i_1 
       (.I0(\aAccbuf[7]_i_4_n_0 ),
        .I1(\aAccbufB_reg_n_0_[0] ),
        .I2(\aAccbufB_reg_n_0_[1] ),
        .I3(\aAccbufB_reg_n_0_[2] ),
        .O(\aAccbufB[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1633" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \aAccbufB[3]_i_1 
       (.I0(\aAccbuf[7]_i_4_n_0 ),
        .I1(\aAccbufB_reg_n_0_[1] ),
        .I2(\aAccbufB_reg_n_0_[0] ),
        .I3(\aAccbufB_reg_n_0_[2] ),
        .I4(\aAccbufB_reg_n_0_[3] ),
        .O(\aAccbufB[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \aAccbufB[4]_i_1 
       (.I0(\aAccbuf[7]_i_4_n_0 ),
        .I1(\aAccbufB_reg_n_0_[2] ),
        .I2(\aAccbufB_reg_n_0_[0] ),
        .I3(\aAccbufB_reg_n_0_[1] ),
        .I4(\aAccbufB_reg_n_0_[3] ),
        .I5(\aAccbufB_reg_n_0_[4] ),
        .O(\aAccbufB[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0100000002000000)) 
    \aAccbufB[5]_i_1 
       (.I0(\aAccbufB[5]_i_2_n_0 ),
        .I1(stateStream[1]),
        .I2(stateStream[2]),
        .I3(rng_reg_0),
        .I4(stateStream[0]),
        .I5(\aAccbufB_reg_n_0_[5] ),
        .O(\aAccbufB[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aAccbufB[5]_i_2 
       (.I0(\aAccbufB_reg_n_0_[4] ),
        .I1(\aAccbufB_reg_n_0_[2] ),
        .I2(\aAccbufB_reg_n_0_[0] ),
        .I3(\aAccbufB_reg_n_0_[1] ),
        .I4(\aAccbufB_reg_n_0_[3] ),
        .O(\aAccbufB[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0200000001000000)) 
    \aAccbufB[6]_i_1 
       (.I0(\aAccbufB[7]_i_4_n_0 ),
        .I1(stateStream[1]),
        .I2(stateStream[2]),
        .I3(rng_reg_0),
        .I4(stateStream[0]),
        .I5(\aAccbufB_reg_n_0_[6] ),
        .O(\aAccbufB[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF44400040)) 
    \aAccbufB[7]_i_1 
       (.I0(\colacc[3]_i_3_n_0 ),
        .I1(\aAccbufB[7]_i_3_n_0 ),
        .I2(grayVideoinToManyAXIS_tvalid),
        .I3(rgbNotGray_reg_0),
        .I4(rgbVideoinToManyAXIS_tvalid),
        .I5(row),
        .O(\aAccbufB[7]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hB040)) 
    \aAccbufB[7]_i_2 
       (.I0(\aAccbufB[7]_i_4_n_0 ),
        .I1(\aAccbufB_reg_n_0_[6] ),
        .I2(\aAccbuf[7]_i_4_n_0 ),
        .I3(\aAccbufB_reg_n_0_[7] ),
        .O(\aAccbufB[7]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1661" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \aAccbufB[7]_i_3 
       (.I0(colacc[1]),
        .I1(colacc[0]),
        .I2(colacc[3]),
        .I3(colacc[2]),
        .O(\aAccbufB[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \aAccbufB[7]_i_4 
       (.I0(\aAccbufB_reg_n_0_[5] ),
        .I1(\aAccbufB_reg_n_0_[3] ),
        .I2(\aAccbufB_reg_n_0_[1] ),
        .I3(\aAccbufB_reg_n_0_[0] ),
        .I4(\aAccbufB_reg_n_0_[2] ),
        .I5(\aAccbufB_reg_n_0_[4] ),
        .O(\aAccbufB[7]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\aAccbufB[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbufB[0]_i_1_n_0 ),
        .Q(\aAccbufB_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\aAccbufB[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbufB[1]_i_1_n_0 ),
        .Q(\aAccbufB_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\aAccbufB[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbufB[2]_i_1_n_0 ),
        .Q(\aAccbufB_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbufB_reg[3] 
       (.C(aclk_sig),
        .CE(\aAccbufB[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbufB[3]_i_1_n_0 ),
        .Q(\aAccbufB_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbufB_reg[4] 
       (.C(aclk_sig),
        .CE(\aAccbufB[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbufB[4]_i_1_n_0 ),
        .Q(\aAccbufB_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbufB_reg[5] 
       (.C(aclk_sig),
        .CE(\aAccbufB[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbufB[5]_i_1_n_0 ),
        .Q(\aAccbufB_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbufB_reg[6] 
       (.C(aclk_sig),
        .CE(\aAccbufB[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbufB[6]_i_1_n_0 ),
        .Q(\aAccbufB_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbufB_reg[7] 
       (.C(aclk_sig),
        .CE(\aAccbufB[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbufB[7]_i_2_n_0 ),
        .Q(\aAccbufB_reg_n_0_[7] ));
  (* SOFT_HLUTNM = "soft_lutpair1634" *) 
  LUT5 #(
    .INIT(32'h00001000)) 
    \aAccbuf[0]_i_1 
       (.I0(stateStream[1]),
        .I1(stateStream[2]),
        .I2(rng_reg_0),
        .I3(stateStream[0]),
        .I4(\aAccbuf_reg_n_0_[0] ),
        .O(\aAccbuf[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800080000)) 
    \aAccbuf[1]_i_1 
       (.I0(stateStream[0]),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(\aAccbuf_reg_n_0_[0] ),
        .I5(\aAccbuf_reg_n_0_[1] ),
        .O(\aAccbuf[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1635" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \aAccbuf[2]_i_1 
       (.I0(\aAccbuf[7]_i_4_n_0 ),
        .I1(\aAccbuf_reg_n_0_[0] ),
        .I2(\aAccbuf_reg_n_0_[1] ),
        .I3(\aAccbuf_reg_n_0_[2] ),
        .O(\aAccbuf[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1635" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \aAccbuf[3]_i_1 
       (.I0(\aAccbuf[7]_i_4_n_0 ),
        .I1(\aAccbuf_reg_n_0_[1] ),
        .I2(\aAccbuf_reg_n_0_[0] ),
        .I3(\aAccbuf_reg_n_0_[2] ),
        .I4(\aAccbuf_reg_n_0_[3] ),
        .O(\aAccbuf[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \aAccbuf[4]_i_1 
       (.I0(\aAccbuf[7]_i_4_n_0 ),
        .I1(\aAccbuf_reg_n_0_[2] ),
        .I2(\aAccbuf_reg_n_0_[0] ),
        .I3(\aAccbuf_reg_n_0_[1] ),
        .I4(\aAccbuf_reg_n_0_[3] ),
        .I5(\aAccbuf_reg_n_0_[4] ),
        .O(\aAccbuf[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0100000002000000)) 
    \aAccbuf[5]_i_1 
       (.I0(\aAccbuf[5]_i_2_n_0 ),
        .I1(stateStream[1]),
        .I2(stateStream[2]),
        .I3(rng_reg_0),
        .I4(stateStream[0]),
        .I5(\aAccbuf_reg_n_0_[5] ),
        .O(\aAccbuf[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aAccbuf[5]_i_2 
       (.I0(\aAccbuf_reg_n_0_[4] ),
        .I1(\aAccbuf_reg_n_0_[2] ),
        .I2(\aAccbuf_reg_n_0_[0] ),
        .I3(\aAccbuf_reg_n_0_[1] ),
        .I4(\aAccbuf_reg_n_0_[3] ),
        .O(\aAccbuf[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0200000001000000)) 
    \aAccbuf[6]_i_1 
       (.I0(\aAccbuf[7]_i_3_n_0 ),
        .I1(stateStream[1]),
        .I2(stateStream[2]),
        .I3(rng_reg_0),
        .I4(stateStream[0]),
        .I5(\aAccbuf_reg_n_0_[6] ),
        .O(\aAccbuf[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h003BFFFF)) 
    \aAccbuf[7]_i_1 
       (.I0(enAccbuf_reg_n_0),
        .I1(stateStream[0]),
        .I2(stateStream[1]),
        .I3(stateStream[2]),
        .I4(rng_reg_0),
        .O(\aAccbuf[7]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hB040)) 
    \aAccbuf[7]_i_2 
       (.I0(\aAccbuf[7]_i_3_n_0 ),
        .I1(\aAccbuf_reg_n_0_[6] ),
        .I2(\aAccbuf[7]_i_4_n_0 ),
        .I3(\aAccbuf_reg_n_0_[7] ),
        .O(\aAccbuf[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \aAccbuf[7]_i_3 
       (.I0(\aAccbuf_reg_n_0_[5] ),
        .I1(\aAccbuf_reg_n_0_[3] ),
        .I2(\aAccbuf_reg_n_0_[1] ),
        .I3(\aAccbuf_reg_n_0_[0] ),
        .I4(\aAccbuf_reg_n_0_[2] ),
        .I5(\aAccbuf_reg_n_0_[4] ),
        .O(\aAccbuf[7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1632" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \aAccbuf[7]_i_4 
       (.I0(stateStream[0]),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .O(\aAccbuf[7]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\aAccbuf[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbuf[0]_i_1_n_0 ),
        .Q(\aAccbuf_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\aAccbuf[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbuf[1]_i_1_n_0 ),
        .Q(\aAccbuf_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\aAccbuf[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbuf[2]_i_1_n_0 ),
        .Q(\aAccbuf_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\aAccbuf[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbuf[3]_i_1_n_0 ),
        .Q(\aAccbuf_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\aAccbuf[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbuf[4]_i_1_n_0 ),
        .Q(\aAccbuf_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\aAccbuf[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbuf[5]_i_1_n_0 ),
        .Q(\aAccbuf_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\aAccbuf[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbuf[6]_i_1_n_0 ),
        .Q(\aAccbuf_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aAccbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\aAccbuf[7]_i_1_n_0 ),
        .CLR(AR),
        .D(\aAccbuf[7]_i_2_n_0 ),
        .Q(\aAccbuf_reg_n_0_[7] ));
  LUT2 #(
    .INIT(4'h1)) 
    \aPvwbufB[0]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[0] ),
        .I1(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1630" *) 
  LUT4 #(
    .INIT(16'h00A6)) 
    \aPvwbufB[10]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[10] ),
        .I1(\aPvwbufB_reg_n_0_[8] ),
        .I2(\aPvwbufB[12]_i_3_n_0 ),
        .I3(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1630" *) 
  LUT5 #(
    .INIT(32'h0000AA6A)) 
    \aPvwbufB[11]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[11] ),
        .I1(\aPvwbufB_reg_n_0_[10] ),
        .I2(\aPvwbufB_reg_n_0_[8] ),
        .I3(\aPvwbufB[12]_i_3_n_0 ),
        .I4(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[11]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFF80)) 
    \aPvwbufB[12]_i_1 
       (.I0(\FSM_onehot_statePvwbufB_reg[5]_0 [0]),
        .I1(pvwbufDecimToHostifAXIS_tready),
        .I2(\FSM_onehot_statePvwbufB[3]_i_2_n_0 ),
        .I3(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[12]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000AAAA6AAA)) 
    \aPvwbufB[12]_i_2 
       (.I0(\aPvwbufB_reg_n_0_[12] ),
        .I1(\aPvwbufB_reg_n_0_[8] ),
        .I2(\aPvwbufB_reg_n_0_[10] ),
        .I3(\aPvwbufB_reg_n_0_[11] ),
        .I4(\aPvwbufB[12]_i_3_n_0 ),
        .I5(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[12]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1664" *) 
  LUT4 #(
    .INIT(16'hDFFF)) 
    \aPvwbufB[12]_i_3 
       (.I0(\aPvwbufB_reg_n_0_[7] ),
        .I1(\aPvwbufB[9]_i_2_n_0 ),
        .I2(\aPvwbufB_reg_n_0_[6] ),
        .I3(\aPvwbufB_reg_n_0_[9] ),
        .O(\aPvwbufB[12]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1665" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \aPvwbufB[1]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[1] ),
        .I1(\aPvwbufB_reg_n_0_[0] ),
        .I2(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1628" *) 
  LUT4 #(
    .INIT(16'h006A)) 
    \aPvwbufB[2]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[2] ),
        .I1(\aPvwbufB_reg_n_0_[0] ),
        .I2(\aPvwbufB_reg_n_0_[1] ),
        .I3(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1628" *) 
  LUT5 #(
    .INIT(32'h00006AAA)) 
    \aPvwbufB[3]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[3] ),
        .I1(\aPvwbufB_reg_n_0_[1] ),
        .I2(\aPvwbufB_reg_n_0_[0] ),
        .I3(\aPvwbufB_reg_n_0_[2] ),
        .I4(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h000000006AAAAAAA)) 
    \aPvwbufB[4]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[4] ),
        .I1(\aPvwbufB_reg_n_0_[2] ),
        .I2(\aPvwbufB_reg_n_0_[0] ),
        .I3(\aPvwbufB_reg_n_0_[1] ),
        .I4(\aPvwbufB_reg_n_0_[3] ),
        .I5(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1665" *) 
  LUT3 #(
    .INIT(8'h09)) 
    \aPvwbufB[5]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[5] ),
        .I1(\aPvwbufB[5]_i_2_n_0 ),
        .I2(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \aPvwbufB[5]_i_2 
       (.I0(\aPvwbufB_reg_n_0_[3] ),
        .I1(\aPvwbufB_reg_n_0_[1] ),
        .I2(\aPvwbufB_reg_n_0_[0] ),
        .I3(\aPvwbufB_reg_n_0_[2] ),
        .I4(\aPvwbufB_reg_n_0_[4] ),
        .O(\aPvwbufB[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1664" *) 
  LUT3 #(
    .INIT(8'h09)) 
    \aPvwbufB[6]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[6] ),
        .I1(\aPvwbufB[9]_i_2_n_0 ),
        .I2(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1629" *) 
  LUT4 #(
    .INIT(16'h009A)) 
    \aPvwbufB[7]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[7] ),
        .I1(\aPvwbufB[9]_i_2_n_0 ),
        .I2(\aPvwbufB_reg_n_0_[6] ),
        .I3(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1629" *) 
  LUT5 #(
    .INIT(32'h0000A6AA)) 
    \aPvwbufB[8]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[8] ),
        .I1(\aPvwbufB_reg_n_0_[6] ),
        .I2(\aPvwbufB[9]_i_2_n_0 ),
        .I3(\aPvwbufB_reg_n_0_[7] ),
        .I4(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000AA6AAAAA)) 
    \aPvwbufB[9]_i_1 
       (.I0(\aPvwbufB_reg_n_0_[9] ),
        .I1(\aPvwbufB_reg_n_0_[8] ),
        .I2(\aPvwbufB_reg_n_0_[7] ),
        .I3(\aPvwbufB[9]_i_2_n_0 ),
        .I4(\aPvwbufB_reg_n_0_[6] ),
        .I5(\FSM_onehot_statePvwbufB_reg_n_0_[0] ),
        .O(\aPvwbufB[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \aPvwbufB[9]_i_2 
       (.I0(\aPvwbufB_reg_n_0_[4] ),
        .I1(\aPvwbufB_reg_n_0_[2] ),
        .I2(\aPvwbufB_reg_n_0_[0] ),
        .I3(\aPvwbufB_reg_n_0_[1] ),
        .I4(\aPvwbufB_reg_n_0_[3] ),
        .I5(\aPvwbufB_reg_n_0_[5] ),
        .O(\aPvwbufB[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[0]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[10] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[10]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[11] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[11]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[12] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[12]_i_2_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[12] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[1]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[2]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[3] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[3]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[4] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[4]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[5] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[5]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[6] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[6]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[7] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[7]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[8] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[8]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbufB_reg[9] 
       (.C(aclk_sig),
        .CE(\aPvwbufB[12]_i_1_n_0 ),
        .CLR(AR),
        .D(\aPvwbufB[9]_i_1_n_0 ),
        .Q(\aPvwbufB_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1649" *) 
  LUT4 #(
    .INIT(16'h00A8)) 
    \aPvwbuf[0]_i_1 
       (.I0(rng_reg_0),
        .I1(\stateStore_reg[1]_0 [0]),
        .I2(\stateStore_reg[1]_0 [1]),
        .I3(aPvwbuf_reg[0]),
        .O(p_0_in[0]));
  LUT5 #(
    .INIT(32'h88804440)) 
    \aPvwbuf[10]_i_1 
       (.I0(\aPvwbuf[10]_i_2_n_0 ),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .I4(aPvwbuf_reg[10]),
        .O(p_0_in[10]));
  LUT5 #(
    .INIT(32'hF7FFFFFF)) 
    \aPvwbuf[10]_i_2 
       (.I0(aPvwbuf_reg[9]),
        .I1(aPvwbuf_reg[6]),
        .I2(\aPvwbuf[9]_i_2_n_0 ),
        .I3(aPvwbuf_reg[7]),
        .I4(aPvwbuf_reg[8]),
        .O(\aPvwbuf[10]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h88804440)) 
    \aPvwbuf[11]_i_1 
       (.I0(\aPvwbuf[14]_i_2_n_0 ),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .I4(aPvwbuf_reg[11]),
        .O(p_0_in[11]));
  LUT6 #(
    .INIT(64'hB0B0B00040404000)) 
    \aPvwbuf[12]_i_1 
       (.I0(\aPvwbuf[14]_i_2_n_0 ),
        .I1(aPvwbuf_reg[11]),
        .I2(rng_reg_0),
        .I3(\stateStore_reg[1]_0 [0]),
        .I4(\stateStore_reg[1]_0 [1]),
        .I5(aPvwbuf_reg[12]),
        .O(p_0_in[12]));
  (* SOFT_HLUTNM = "soft_lutpair1648" *) 
  LUT5 #(
    .INIT(32'h00F70008)) 
    \aPvwbuf[13]_i_1 
       (.I0(aPvwbuf_reg[12]),
        .I1(aPvwbuf_reg[11]),
        .I2(\aPvwbuf[14]_i_2_n_0 ),
        .I3(aPvwbuf1),
        .I4(aPvwbuf_reg[13]),
        .O(p_0_in[13]));
  LUT6 #(
    .INIT(64'h0000DFFF00002000)) 
    \aPvwbuf[14]_i_1 
       (.I0(aPvwbuf_reg[13]),
        .I1(\aPvwbuf[14]_i_2_n_0 ),
        .I2(aPvwbuf_reg[11]),
        .I3(aPvwbuf_reg[12]),
        .I4(aPvwbuf1),
        .I5(aPvwbuf_reg[14]),
        .O(p_0_in[14]));
  LUT6 #(
    .INIT(64'hF7FFFFFFFFFFFFFF)) 
    \aPvwbuf[14]_i_2 
       (.I0(aPvwbuf_reg[8]),
        .I1(aPvwbuf_reg[7]),
        .I2(\aPvwbuf[9]_i_2_n_0 ),
        .I3(aPvwbuf_reg[6]),
        .I4(aPvwbuf_reg[9]),
        .I5(aPvwbuf_reg[10]),
        .O(\aPvwbuf[14]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h373F)) 
    \aPvwbuf[15]_i_1 
       (.I0(\stateStore[1]_i_3_n_0 ),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\aPvwbuf[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hB0B0B00040404000)) 
    \aPvwbuf[15]_i_2 
       (.I0(\aPvwbuf[15]_i_3_n_0 ),
        .I1(aPvwbuf_reg[14]),
        .I2(rng_reg_0),
        .I3(\stateStore_reg[1]_0 [0]),
        .I4(\stateStore_reg[1]_0 [1]),
        .I5(aPvwbuf_reg[15]),
        .O(p_0_in[15]));
  (* SOFT_HLUTNM = "soft_lutpair1648" *) 
  LUT4 #(
    .INIT(16'hDFFF)) 
    \aPvwbuf[15]_i_3 
       (.I0(aPvwbuf_reg[13]),
        .I1(\aPvwbuf[14]_i_2_n_0 ),
        .I2(aPvwbuf_reg[11]),
        .I3(aPvwbuf_reg[12]),
        .O(\aPvwbuf[15]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1649" *) 
  LUT5 #(
    .INIT(32'h00E0E000)) 
    \aPvwbuf[1]_i_1 
       (.I0(\stateStore_reg[1]_0 [1]),
        .I1(\stateStore_reg[1]_0 [0]),
        .I2(rng_reg_0),
        .I3(aPvwbuf_reg[0]),
        .I4(aPvwbuf_reg[1]),
        .O(p_0_in[1]));
  LUT6 #(
    .INIT(64'h00E0E0E0E0000000)) 
    \aPvwbuf[2]_i_1 
       (.I0(\stateStore_reg[1]_0 [1]),
        .I1(\stateStore_reg[1]_0 [0]),
        .I2(rng_reg_0),
        .I3(aPvwbuf_reg[0]),
        .I4(aPvwbuf_reg[1]),
        .I5(aPvwbuf_reg[2]),
        .O(p_0_in[2]));
  LUT5 #(
    .INIT(32'h007F0080)) 
    \aPvwbuf[3]_i_1 
       (.I0(aPvwbuf_reg[0]),
        .I1(aPvwbuf_reg[1]),
        .I2(aPvwbuf_reg[2]),
        .I3(aPvwbuf1),
        .I4(aPvwbuf_reg[3]),
        .O(p_0_in[3]));
  LUT6 #(
    .INIT(64'h00007FFF00008000)) 
    \aPvwbuf[4]_i_1 
       (.I0(aPvwbuf_reg[2]),
        .I1(aPvwbuf_reg[1]),
        .I2(aPvwbuf_reg[0]),
        .I3(aPvwbuf_reg[3]),
        .I4(aPvwbuf1),
        .I5(aPvwbuf_reg[4]),
        .O(p_0_in[4]));
  (* SOFT_HLUTNM = "soft_lutpair1647" *) 
  LUT5 #(
    .INIT(32'h44408880)) 
    \aPvwbuf[5]_i_1 
       (.I0(\aPvwbuf[5]_i_2_n_0 ),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .I4(aPvwbuf_reg[5]),
        .O(p_0_in[5]));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aPvwbuf[5]_i_2 
       (.I0(aPvwbuf_reg[4]),
        .I1(aPvwbuf_reg[3]),
        .I2(aPvwbuf_reg[0]),
        .I3(aPvwbuf_reg[1]),
        .I4(aPvwbuf_reg[2]),
        .O(\aPvwbuf[5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h88804440)) 
    \aPvwbuf[6]_i_1 
       (.I0(\aPvwbuf[9]_i_2_n_0 ),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .I4(aPvwbuf_reg[6]),
        .O(p_0_in[6]));
  LUT6 #(
    .INIT(64'hB0B0B00040404000)) 
    \aPvwbuf[7]_i_1 
       (.I0(\aPvwbuf[9]_i_2_n_0 ),
        .I1(aPvwbuf_reg[6]),
        .I2(rng_reg_0),
        .I3(\stateStore_reg[1]_0 [0]),
        .I4(\stateStore_reg[1]_0 [1]),
        .I5(aPvwbuf_reg[7]),
        .O(p_0_in[7]));
  LUT5 #(
    .INIT(32'h00DF0020)) 
    \aPvwbuf[8]_i_1 
       (.I0(aPvwbuf_reg[6]),
        .I1(\aPvwbuf[9]_i_2_n_0 ),
        .I2(aPvwbuf_reg[7]),
        .I3(aPvwbuf1),
        .I4(aPvwbuf_reg[8]),
        .O(p_0_in[8]));
  LUT6 #(
    .INIT(64'h0000F7FF00000800)) 
    \aPvwbuf[9]_i_1 
       (.I0(aPvwbuf_reg[8]),
        .I1(aPvwbuf_reg[7]),
        .I2(\aPvwbuf[9]_i_2_n_0 ),
        .I3(aPvwbuf_reg[6]),
        .I4(aPvwbuf1),
        .I5(aPvwbuf_reg[9]),
        .O(p_0_in[9]));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \aPvwbuf[9]_i_2 
       (.I0(aPvwbuf_reg[5]),
        .I1(aPvwbuf_reg[2]),
        .I2(aPvwbuf_reg[1]),
        .I3(aPvwbuf_reg[0]),
        .I4(aPvwbuf_reg[3]),
        .I5(aPvwbuf_reg[4]),
        .O(\aPvwbuf[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[0]),
        .Q(aPvwbuf_reg[0]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[10] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[10]),
        .Q(aPvwbuf_reg[10]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[11] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[11]),
        .Q(aPvwbuf_reg[11]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[12] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[12]),
        .Q(aPvwbuf_reg[12]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[13] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[13]),
        .Q(aPvwbuf_reg[13]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[14] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[14]),
        .Q(aPvwbuf_reg[14]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[15] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[15]),
        .Q(aPvwbuf_reg[15]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[1]),
        .Q(aPvwbuf_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[2]),
        .Q(aPvwbuf_reg[2]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[3]),
        .Q(aPvwbuf_reg[3]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[4]),
        .Q(aPvwbuf_reg[4]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[5]),
        .Q(aPvwbuf_reg[5]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[6]),
        .Q(aPvwbuf_reg[6]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[7]),
        .Q(aPvwbuf_reg[7]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[8] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[8]),
        .Q(aPvwbuf_reg[8]));
  FDCE #(
    .INIT(1'b0)) 
    \aPvwbuf_reg[9] 
       (.C(aclk_sig),
        .CE(\aPvwbuf[15]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_in[9]),
        .Q(aPvwbuf_reg[9]));
  (* SOFT_HLUTNM = "soft_lutpair1638" *) 
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[0]_i_1 
       (.I0(O[0]),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(stateStream[0]),
        .O(acc0[0]));
  LUT5 #(
    .INIT(32'hAAAAAAA8)) 
    \acc0_lcl[19]_i_7 
       (.I0(\aAccbufB[7]_i_3_n_0 ),
        .I1(rowacc[2]),
        .I2(rowacc[3]),
        .I3(rowacc[1]),
        .I4(rowacc[0]),
        .O(\acc0_lcl[19]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1639" *) 
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[1]_i_1 
       (.I0(O[1]),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(stateStream[0]),
        .O(acc0[1]));
  (* SOFT_HLUTNM = "soft_lutpair1640" *) 
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[2]_i_1 
       (.I0(O[2]),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(stateStream[0]),
        .O(acc0[2]));
  (* SOFT_HLUTNM = "soft_lutpair1641" *) 
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[3]_i_1 
       (.I0(O[3]),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(stateStream[0]),
        .O(acc0[3]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[4]_i_1 
       (.I0(O[4]),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(stateStream[0]),
        .O(acc0[4]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[5]_i_1 
       (.I0(O[5]),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(stateStream[0]),
        .O(acc0[5]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[6]_i_1 
       (.I0(O[6]),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(stateStream[0]),
        .O(acc0[6]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[7]_i_1 
       (.I0(O[7]),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(stateStream[0]),
        .O(acc0[7]));
  FDCE \acc0_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[0]),
        .Q(\acc0_lcl_reg_n_0_[0] ));
  FDCE \acc0_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[10]),
        .Q(\acc0_lcl_reg_n_0_[10] ));
  FDCE \acc0_lcl_reg[11] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[11]),
        .Q(\acc0_lcl_reg_n_0_[11] ));
  FDCE \acc0_lcl_reg[12] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[12]),
        .Q(\acc0_lcl_reg_n_0_[12] ));
  FDCE \acc0_lcl_reg[13] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[13]),
        .Q(\acc0_lcl_reg_n_0_[13] ));
  FDCE \acc0_lcl_reg[14] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[14]),
        .Q(\acc0_lcl_reg_n_0_[14] ));
  FDCE \acc0_lcl_reg[15] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[15]),
        .Q(\acc0_lcl_reg_n_0_[15] ));
  FDCE \acc0_lcl_reg[16] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[16]),
        .Q(\acc0_lcl_reg_n_0_[16] ));
  FDCE \acc0_lcl_reg[17] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[17]),
        .Q(\acc0_lcl_reg_n_0_[17] ));
  FDCE \acc0_lcl_reg[18] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[18]),
        .Q(\acc0_lcl_reg_n_0_[18] ));
  FDCE \acc0_lcl_reg[19] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[19]),
        .Q(\acc0_lcl_reg_n_0_[19] ));
  FDCE \acc0_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[1]),
        .Q(\acc0_lcl_reg_n_0_[1] ));
  FDCE \acc0_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[2]),
        .Q(\acc0_lcl_reg_n_0_[2] ));
  FDCE \acc0_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[3]),
        .Q(\acc0_lcl_reg_n_0_[3] ));
  FDCE \acc0_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[4]),
        .Q(\acc0_lcl_reg_n_0_[4] ));
  FDCE \acc0_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[5]),
        .Q(\acc0_lcl_reg_n_0_[5] ));
  FDCE \acc0_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[6]),
        .Q(\acc0_lcl_reg_n_0_[6] ));
  FDCE \acc0_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[7]),
        .Q(\acc0_lcl_reg_n_0_[7] ));
  FDCE \acc0_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[8]),
        .Q(\acc0_lcl_reg_n_0_[8] ));
  FDCE \acc0_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[9]),
        .Q(\acc0_lcl_reg_n_0_[9] ));
  FDCE \acc0_reg[0] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[0]),
        .Q(\acc0_reg_n_0_[0] ));
  FDCE \acc0_reg[10] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[10]),
        .Q(\acc0_reg_n_0_[10] ));
  FDCE \acc0_reg[11] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[11]),
        .Q(\acc0_reg_n_0_[11] ));
  FDCE \acc0_reg[12] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[12]),
        .Q(\acc0_reg_n_0_[12] ));
  FDCE \acc0_reg[13] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[13]),
        .Q(\acc0_reg_n_0_[13] ));
  FDCE \acc0_reg[14] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[14]),
        .Q(\acc0_reg_n_0_[14] ));
  FDCE \acc0_reg[15] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[15]),
        .Q(\acc0_reg_n_0_[15] ));
  FDCE \acc0_reg[16] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[16]),
        .Q(\acc0_reg_n_0_[16] ));
  FDCE \acc0_reg[17] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[17]),
        .Q(\acc0_reg_n_0_[17] ));
  FDCE \acc0_reg[18] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[18]),
        .Q(\acc0_reg_n_0_[18] ));
  FDCE \acc0_reg[19] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[19]),
        .Q(\acc0_reg_n_0_[19] ));
  FDCE \acc0_reg[1] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[1]),
        .Q(\acc0_reg_n_0_[1] ));
  FDCE \acc0_reg[2] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[2]),
        .Q(\acc0_reg_n_0_[2] ));
  FDCE \acc0_reg[3] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[3]),
        .Q(\acc0_reg_n_0_[3] ));
  FDCE \acc0_reg[4] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[4]),
        .Q(\acc0_reg_n_0_[4] ));
  FDCE \acc0_reg[5] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[5]),
        .Q(\acc0_reg_n_0_[5] ));
  FDCE \acc0_reg[6] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[6]),
        .Q(\acc0_reg_n_0_[6] ));
  FDCE \acc0_reg[7] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[7]),
        .Q(\acc0_reg_n_0_[7] ));
  FDCE \acc0_reg[8] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[8]),
        .Q(\acc0_reg_n_0_[8] ));
  FDCE \acc0_reg[9] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc0[9]),
        .Q(\acc0_reg_n_0_[9] ));
  FDCE \acc1_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[0]),
        .Q(\acc1_lcl_reg_n_0_[0] ));
  FDCE \acc1_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[10]),
        .Q(\acc1_lcl_reg_n_0_[10] ));
  FDCE \acc1_lcl_reg[11] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[11]),
        .Q(\acc1_lcl_reg_n_0_[11] ));
  FDCE \acc1_lcl_reg[12] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[12]),
        .Q(\acc1_lcl_reg_n_0_[12] ));
  FDCE \acc1_lcl_reg[13] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[13]),
        .Q(\acc1_lcl_reg_n_0_[13] ));
  FDCE \acc1_lcl_reg[14] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[14]),
        .Q(\acc1_lcl_reg_n_0_[14] ));
  FDCE \acc1_lcl_reg[15] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[15]),
        .Q(\acc1_lcl_reg_n_0_[15] ));
  FDCE \acc1_lcl_reg[16] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[16]),
        .Q(\acc1_lcl_reg_n_0_[16] ));
  FDCE \acc1_lcl_reg[17] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[17]),
        .Q(\acc1_lcl_reg_n_0_[17] ));
  FDCE \acc1_lcl_reg[18] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[18]),
        .Q(\acc1_lcl_reg_n_0_[18] ));
  FDCE \acc1_lcl_reg[19] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[19]),
        .Q(\acc1_lcl_reg_n_0_[19] ));
  FDCE \acc1_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[1]),
        .Q(\acc1_lcl_reg_n_0_[1] ));
  FDCE \acc1_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[2]),
        .Q(\acc1_lcl_reg_n_0_[2] ));
  FDCE \acc1_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[3]),
        .Q(\acc1_lcl_reg_n_0_[3] ));
  FDCE \acc1_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[4]),
        .Q(\acc1_lcl_reg_n_0_[4] ));
  FDCE \acc1_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[5]),
        .Q(\acc1_lcl_reg_n_0_[5] ));
  FDCE \acc1_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[6]),
        .Q(\acc1_lcl_reg_n_0_[6] ));
  FDCE \acc1_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[7]),
        .Q(\acc1_lcl_reg_n_0_[7] ));
  FDCE \acc1_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[8]),
        .Q(\acc1_lcl_reg_n_0_[8] ));
  FDCE \acc1_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[9]),
        .Q(\acc1_lcl_reg_n_0_[9] ));
  FDCE \acc1_reg[0] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[0]),
        .Q(\acc1_reg_n_0_[0] ));
  FDCE \acc1_reg[10] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[10]),
        .Q(\acc1_reg_n_0_[10] ));
  FDCE \acc1_reg[11] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[11]),
        .Q(\acc1_reg_n_0_[11] ));
  FDCE \acc1_reg[12] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[12]),
        .Q(\acc1_reg_n_0_[12] ));
  FDCE \acc1_reg[13] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[13]),
        .Q(\acc1_reg_n_0_[13] ));
  FDCE \acc1_reg[14] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[14]),
        .Q(\acc1_reg_n_0_[14] ));
  FDCE \acc1_reg[15] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[15]),
        .Q(\acc1_reg_n_0_[15] ));
  FDCE \acc1_reg[16] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[16]),
        .Q(\acc1_reg_n_0_[16] ));
  FDCE \acc1_reg[17] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[17]),
        .Q(\acc1_reg_n_0_[17] ));
  FDCE \acc1_reg[18] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[18]),
        .Q(\acc1_reg_n_0_[18] ));
  FDCE \acc1_reg[19] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[19]),
        .Q(\acc1_reg_n_0_[19] ));
  FDCE \acc1_reg[1] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[1]),
        .Q(\acc1_reg_n_0_[1] ));
  FDCE \acc1_reg[2] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[2]),
        .Q(\acc1_reg_n_0_[2] ));
  FDCE \acc1_reg[3] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[3]),
        .Q(\acc1_reg_n_0_[3] ));
  FDCE \acc1_reg[4] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[4]),
        .Q(\acc1_reg_n_0_[4] ));
  FDCE \acc1_reg[5] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[5]),
        .Q(\acc1_reg_n_0_[5] ));
  FDCE \acc1_reg[6] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[6]),
        .Q(\acc1_reg_n_0_[6] ));
  FDCE \acc1_reg[7] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[7]),
        .Q(\acc1_reg_n_0_[7] ));
  FDCE \acc1_reg[8] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[8]),
        .Q(\acc1_reg_n_0_[8] ));
  FDCE \acc1_reg[9] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(acc1[9]),
        .Q(\acc1_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'h0F0F0F8F0F0F0FFF)) 
    \acc2[19]_i_1 
       (.I0(enAccbuf_reg_0),
        .I1(\stateStream[2]_i_4_n_0 ),
        .I2(rng_reg_0),
        .I3(stateStream[2]),
        .I4(stateStream[1]),
        .I5(stateStream[0]),
        .O(acc2));
  FDCE \acc2_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_19),
        .Q(\acc2_lcl_reg_n_0_[0] ));
  FDCE \acc2_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_9),
        .Q(\acc2_lcl_reg_n_0_[10] ));
  FDCE \acc2_lcl_reg[11] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_8),
        .Q(\acc2_lcl_reg_n_0_[11] ));
  FDCE \acc2_lcl_reg[12] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_7),
        .Q(\acc2_lcl_reg_n_0_[12] ));
  FDCE \acc2_lcl_reg[13] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_6),
        .Q(\acc2_lcl_reg_n_0_[13] ));
  FDCE \acc2_lcl_reg[14] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_5),
        .Q(\acc2_lcl_reg_n_0_[14] ));
  FDCE \acc2_lcl_reg[15] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_4),
        .Q(\acc2_lcl_reg_n_0_[15] ));
  FDCE \acc2_lcl_reg[16] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_3),
        .Q(\acc2_lcl_reg_n_0_[16] ));
  FDCE \acc2_lcl_reg[17] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_2),
        .Q(\acc2_lcl_reg_n_0_[17] ));
  FDCE \acc2_lcl_reg[18] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_1),
        .Q(\acc2_lcl_reg_n_0_[18] ));
  FDCE \acc2_lcl_reg[19] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_0),
        .Q(\acc2_lcl_reg_n_0_[19] ));
  FDCE \acc2_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_18),
        .Q(\acc2_lcl_reg_n_0_[1] ));
  FDCE \acc2_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_17),
        .Q(\acc2_lcl_reg_n_0_[2] ));
  FDCE \acc2_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_16),
        .Q(\acc2_lcl_reg_n_0_[3] ));
  FDCE \acc2_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_15),
        .Q(\acc2_lcl_reg_n_0_[4] ));
  FDCE \acc2_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_14),
        .Q(\acc2_lcl_reg_n_0_[5] ));
  FDCE \acc2_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_13),
        .Q(\acc2_lcl_reg_n_0_[6] ));
  FDCE \acc2_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_12),
        .Q(\acc2_lcl_reg_n_0_[7] ));
  FDCE \acc2_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_11),
        .Q(\acc2_lcl_reg_n_0_[8] ));
  FDCE \acc2_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_10),
        .Q(\acc2_lcl_reg_n_0_[9] ));
  FDCE \acc2_reg[0] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_19),
        .Q(\acc2_reg_n_0_[0] ));
  FDCE \acc2_reg[10] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_9),
        .Q(\acc2_reg_n_0_[10] ));
  FDCE \acc2_reg[11] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_8),
        .Q(\acc2_reg_n_0_[11] ));
  FDCE \acc2_reg[12] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_7),
        .Q(\acc2_reg_n_0_[12] ));
  FDCE \acc2_reg[13] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_6),
        .Q(\acc2_reg_n_0_[13] ));
  FDCE \acc2_reg[14] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_5),
        .Q(\acc2_reg_n_0_[14] ));
  FDCE \acc2_reg[15] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_4),
        .Q(\acc2_reg_n_0_[15] ));
  FDCE \acc2_reg[16] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_3),
        .Q(\acc2_reg_n_0_[16] ));
  FDCE \acc2_reg[17] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_2),
        .Q(\acc2_reg_n_0_[17] ));
  FDCE \acc2_reg[18] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_1),
        .Q(\acc2_reg_n_0_[18] ));
  FDCE \acc2_reg[19] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_0),
        .Q(\acc2_reg_n_0_[19] ));
  FDCE \acc2_reg[1] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_18),
        .Q(\acc2_reg_n_0_[1] ));
  FDCE \acc2_reg[2] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_17),
        .Q(\acc2_reg_n_0_[2] ));
  FDCE \acc2_reg[3] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_16),
        .Q(\acc2_reg_n_0_[3] ));
  FDCE \acc2_reg[4] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_15),
        .Q(\acc2_reg_n_0_[4] ));
  FDCE \acc2_reg[5] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_14),
        .Q(\acc2_reg_n_0_[5] ));
  FDCE \acc2_reg[6] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_13),
        .Q(\acc2_reg_n_0_[6] ));
  FDCE \acc2_reg[7] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_12),
        .Q(\acc2_reg_n_0_[7] ));
  FDCE \acc2_reg[8] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_11),
        .Q(\acc2_reg_n_0_[8] ));
  FDCE \acc2_reg[9] 
       (.C(aclk_sig),
        .CE(acc2),
        .CLR(AR),
        .D(myAccbuf_n_10),
        .Q(\acc2_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1631" *) 
  LUT3 #(
    .INIT(8'hD0)) 
    ackInvAcquire_sig_i_1__0
       (.I0(\stateOp_reg[1]_0 [0]),
        .I1(\stateOp_reg[1]_0 [1]),
        .I2(reqInvDecimAcquire),
        .O(ackInvAcquire_sig));
  FDCE ackInvAcquire_sig_reg
       (.C(aclk_sig),
        .CE(ackInvUnlock_sig),
        .CLR(AR),
        .D(ackInvAcquire_sig),
        .Q(ackInvDecimAcquire));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF0400)) 
    ackInvConfig_sig_i_1__1
       (.I0(reqInvDecimConfig),
        .I1(ackInvDecimConfig),
        .I2(\stateOp_reg[1]_0 [1]),
        .I3(\stateOp_reg[1]_0 [0]),
        .I4(ackInvConfig_sig_i_4_n_0),
        .I5(ackInvConfig_sig_i_5_n_0),
        .O(ackInvUnlock_sig));
  LUT4 #(
    .INIT(16'h0D00)) 
    ackInvConfig_sig_i_2
       (.I0(\stateOp_reg[1]_0 [0]),
        .I1(\stateOp_reg[1]_0 [1]),
        .I2(reqInvDecimAcquire),
        .I3(reqInvDecimConfig),
        .O(ackInvConfig_sig));
  LUT6 #(
    .INIT(64'h0020002000F00020)) 
    ackInvConfig_sig_i_4
       (.I0(ackInvDecimSet),
        .I1(reqInvDecimSet),
        .I2(\stateOp_reg[1]_0 [0]),
        .I3(\stateOp_reg[1]_0 [1]),
        .I4(ackInvDecimUnlock),
        .I5(reqInvDecimUnlock),
        .O(ackInvConfig_sig_i_4_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1631" *) 
  LUT5 #(
    .INIT(32'hFFFF0020)) 
    ackInvConfig_sig_i_5
       (.I0(\stateOp_reg[1]_0 [0]),
        .I1(\stateOp_reg[1]_0 [1]),
        .I2(ackInvDecimAcquire),
        .I3(reqInvDecimAcquire),
        .I4(tixVState1),
        .O(ackInvConfig_sig_i_5_n_0));
  FDCE ackInvConfig_sig_reg
       (.C(aclk_sig),
        .CE(ackInvUnlock_sig),
        .CLR(AR),
        .D(ackInvConfig_sig),
        .Q(ackInvDecimConfig));
  FDCE ackInvSet_sig_reg
       (.C(aclk_sig),
        .CE(ackInvUnlock_sig),
        .CLR(AR),
        .D(ackInvSet_sig),
        .Q(ackInvDecimSet));
  FDCE ackInvUnlock_sig_reg
       (.C(aclk_sig),
        .CE(ackInvUnlock_sig),
        .CLR(AR),
        .D(ackInvUnlock_sig_reg_0),
        .Q(ackInvDecimUnlock));
  (* SOFT_HLUTNM = "soft_lutpair1666" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \col[0]_i_1__0 
       (.I0(\col[10]_i_3__0_n_0 ),
        .I1(col[0]),
        .O(\col[0]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h3110077307733110)) 
    \col[10]_i_10 
       (.I0(NColRaw[0]),
        .I1(NColRaw[1]),
        .I2(\edge_reg_n_0_[0] ),
        .I3(col[0]),
        .I4(\edge_reg_n_0_[1] ),
        .I5(col[1]),
        .O(\col[10]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'h96999999)) 
    \col[10]_i_11 
       (.I0(NColRaw[10]),
        .I1(col[10]),
        .I2(\col[10]_i_17_n_0 ),
        .I3(col[8]),
        .I4(col[9]),
        .O(\col[10]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'h82412418)) 
    \col[10]_i_12 
       (.I0(col[9]),
        .I1(col[8]),
        .I2(\col[10]_i_17_n_0 ),
        .I3(NColRaw[9]),
        .I4(NColRaw[8]),
        .O(\col[10]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'h82412418)) 
    \col[10]_i_13 
       (.I0(col[7]),
        .I1(col[6]),
        .I2(\col[10]_i_18_n_0 ),
        .I3(NColRaw[7]),
        .I4(NColRaw[6]),
        .O(\col[10]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h4228811414422881)) 
    \col[10]_i_14 
       (.I0(col[5]),
        .I1(\col[10]_i_19_n_0 ),
        .I2(\edge_reg_n_0_[4] ),
        .I3(col[4]),
        .I4(NColRaw[5]),
        .I5(NColRaw[4]),
        .O(\col[10]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h9669000000009669)) 
    \col[10]_i_15 
       (.I0(NColRaw[3]),
        .I1(\col[10]_i_20_n_0 ),
        .I2(col[3]),
        .I3(\edge_reg_n_0_[3] ),
        .I4(col2__0),
        .I5(NColRaw[2]),
        .O(\col[10]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h0069690096000069)) 
    \col[10]_i_16 
       (.I0(NColRaw[1]),
        .I1(col[1]),
        .I2(\edge_reg_n_0_[1] ),
        .I3(col[0]),
        .I4(\edge_reg_n_0_[0] ),
        .I5(NColRaw[0]),
        .O(\col[10]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h17FFFFFFFFFFFFFF)) 
    \col[10]_i_17 
       (.I0(col[4]),
        .I1(\edge_reg_n_0_[4] ),
        .I2(\col[10]_i_19_n_0 ),
        .I3(col[5]),
        .I4(col[6]),
        .I5(col[7]),
        .O(\col[10]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h11171777FFFFFFFF)) 
    \col[10]_i_18 
       (.I0(col[4]),
        .I1(\edge_reg_n_0_[4] ),
        .I2(\col[10]_i_20_n_0 ),
        .I3(\edge_reg_n_0_[3] ),
        .I4(col[3]),
        .I5(col[5]),
        .O(\col[10]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1668" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \col[10]_i_19 
       (.I0(\col[10]_i_20_n_0 ),
        .I1(\edge_reg_n_0_[3] ),
        .I2(col[3]),
        .O(\col[10]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h7FFF000080000000)) 
    \col[10]_i_1__0 
       (.I0(\col[10]_i_2__0_n_0 ),
        .I1(col[7]),
        .I2(col[8]),
        .I3(col[9]),
        .I4(\col[10]_i_3__0_n_0 ),
        .I5(col[10]),
        .O(\col[10]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFEC80EC800000)) 
    \col[10]_i_20 
       (.I0(\edge_reg_n_0_[0] ),
        .I1(col[1]),
        .I2(col[0]),
        .I3(\edge_reg_n_0_[1] ),
        .I4(\edge_reg_n_0_[2] ),
        .I5(col[2]),
        .O(\col[10]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hA9959955566A66AA)) 
    \col[10]_i_21 
       (.I0(\edge_reg_n_0_[2] ),
        .I1(\edge_reg_n_0_[1] ),
        .I2(col[0]),
        .I3(col[1]),
        .I4(\edge_reg_n_0_[0] ),
        .I5(col[2]),
        .O(col2__0));
  LUT6 #(
    .INIT(64'h0000000080000000)) 
    \col[10]_i_2__0 
       (.I0(col[6]),
        .I1(col[5]),
        .I2(col[4]),
        .I3(col[3]),
        .I4(col[2]),
        .I5(\col[5]_i_2__0_n_0 ),
        .O(\col[10]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h7070707070707000)) 
    \col[10]_i_3__0 
       (.I0(enAccbuf0),
        .I1(\col_reg[10]_i_4_n_2 ),
        .I2(rng_reg_0),
        .I3(stateStream[2]),
        .I4(stateStream[1]),
        .I5(stateStream[0]),
        .O(\col[10]_i_3__0_n_0 ));
  LUT5 #(
    .INIT(32'h00009AAA)) 
    \col[10]_i_5 
       (.I0(col[10]),
        .I1(\col[10]_i_17_n_0 ),
        .I2(col[8]),
        .I3(col[9]),
        .I4(NColRaw[10]),
        .O(\col[10]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h70371301)) 
    \col[10]_i_6 
       (.I0(NColRaw[8]),
        .I1(NColRaw[9]),
        .I2(\col[10]_i_17_n_0 ),
        .I3(col[8]),
        .I4(col[9]),
        .O(\col[10]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h70371301)) 
    \col[10]_i_7 
       (.I0(NColRaw[6]),
        .I1(NColRaw[7]),
        .I2(\col[10]_i_18_n_0 ),
        .I3(col[6]),
        .I4(col[7]),
        .O(\col[10]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h1007077373313110)) 
    \col[10]_i_8 
       (.I0(NColRaw[4]),
        .I1(NColRaw[5]),
        .I2(col[4]),
        .I3(\edge_reg_n_0_[4] ),
        .I4(\col[10]_i_19_n_0 ),
        .I5(col[5]),
        .O(\col[10]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h0096009696FF0096)) 
    \col[10]_i_9 
       (.I0(\col[10]_i_20_n_0 ),
        .I1(col[3]),
        .I2(\edge_reg_n_0_[3] ),
        .I3(NColRaw[3]),
        .I4(col2__0),
        .I5(NColRaw[2]),
        .O(\col[10]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1666" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \col[1]_i_1__0 
       (.I0(\col[10]_i_3__0_n_0 ),
        .I1(col[0]),
        .I2(col[1]),
        .O(\col[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1636" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \col[2]_i_1__0 
       (.I0(\col[10]_i_3__0_n_0 ),
        .I1(col[1]),
        .I2(col[0]),
        .I3(col[2]),
        .O(\col[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1636" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \col[3]_i_1__0 
       (.I0(\col[10]_i_3__0_n_0 ),
        .I1(col[0]),
        .I2(col[1]),
        .I3(col[2]),
        .I4(col[3]),
        .O(\col[3]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \col[4]_i_1__0 
       (.I0(\col[10]_i_3__0_n_0 ),
        .I1(col[3]),
        .I2(col[2]),
        .I3(col[1]),
        .I4(col[0]),
        .I5(col[4]),
        .O(\col[4]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFF7F000000800000)) 
    \col[5]_i_1__0 
       (.I0(col[4]),
        .I1(col[3]),
        .I2(col[2]),
        .I3(\col[5]_i_2__0_n_0 ),
        .I4(\col[10]_i_3__0_n_0 ),
        .I5(col[5]),
        .O(\col[5]_i_1__0_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \col[5]_i_2__0 
       (.I0(col[0]),
        .I1(col[1]),
        .O(\col[5]_i_2__0_n_0 ));
  LUT3 #(
    .INIT(8'h84)) 
    \col[6]_i_1__0 
       (.I0(\col[9]_i_2__0_n_0 ),
        .I1(\col[10]_i_3__0_n_0 ),
        .I2(col[6]),
        .O(\col[6]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1637" *) 
  LUT4 #(
    .INIT(16'hD020)) 
    \col[7]_i_1__0 
       (.I0(col[6]),
        .I1(\col[9]_i_2__0_n_0 ),
        .I2(\col[10]_i_3__0_n_0 ),
        .I3(col[7]),
        .O(\col[7]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1637" *) 
  LUT5 #(
    .INIT(32'hBF004000)) 
    \col[8]_i_1__0 
       (.I0(\col[9]_i_2__0_n_0 ),
        .I1(col[6]),
        .I2(col[7]),
        .I3(\col[10]_i_3__0_n_0 ),
        .I4(col[8]),
        .O(\col[8]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFF7F000000800000)) 
    \col[9]_i_1__0 
       (.I0(col[8]),
        .I1(col[7]),
        .I2(col[6]),
        .I3(\col[9]_i_2__0_n_0 ),
        .I4(\col[10]_i_3__0_n_0 ),
        .I5(col[9]),
        .O(\col[9]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \col[9]_i_2__0 
       (.I0(col[0]),
        .I1(col[1]),
        .I2(col[2]),
        .I3(col[3]),
        .I4(col[4]),
        .I5(col[5]),
        .O(\col[9]_i_2__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_reg[0] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\col[0]_i_1__0_n_0 ),
        .Q(col[0]));
  FDCE #(
    .INIT(1'b0)) 
    \col_reg[10] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\col[10]_i_1__0_n_0 ),
        .Q(col[10]));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \col_reg[10]_i_4 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\NLW_col_reg[10]_i_4_CO_UNCONNECTED [7:6],\col_reg[10]_i_4_n_2 ,\col_reg[10]_i_4_n_3 ,\col_reg[10]_i_4_n_4 ,\col_reg[10]_i_4_n_5 ,\col_reg[10]_i_4_n_6 ,\col_reg[10]_i_4_n_7 }),
        .DI({1'b0,1'b0,\col[10]_i_5_n_0 ,\col[10]_i_6_n_0 ,\col[10]_i_7_n_0 ,\col[10]_i_8_n_0 ,\col[10]_i_9_n_0 ,\col[10]_i_10_n_0 }),
        .O(\NLW_col_reg[10]_i_4_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,\col[10]_i_11_n_0 ,\col[10]_i_12_n_0 ,\col[10]_i_13_n_0 ,\col[10]_i_14_n_0 ,\col[10]_i_15_n_0 ,\col[10]_i_16_n_0 }));
  FDCE #(
    .INIT(1'b0)) 
    \col_reg[1] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\col[1]_i_1__0_n_0 ),
        .Q(col[1]));
  FDCE #(
    .INIT(1'b0)) 
    \col_reg[2] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\col[2]_i_1__0_n_0 ),
        .Q(col[2]));
  FDCE #(
    .INIT(1'b0)) 
    \col_reg[3] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\col[3]_i_1__0_n_0 ),
        .Q(col[3]));
  FDCE #(
    .INIT(1'b0)) 
    \col_reg[4] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\col[4]_i_1__0_n_0 ),
        .Q(col[4]));
  FDCE #(
    .INIT(1'b0)) 
    \col_reg[5] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\col[5]_i_1__0_n_0 ),
        .Q(col[5]));
  FDCE #(
    .INIT(1'b0)) 
    \col_reg[6] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\col[6]_i_1__0_n_0 ),
        .Q(col[6]));
  FDCE #(
    .INIT(1'b0)) 
    \col_reg[7] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\col[7]_i_1__0_n_0 ),
        .Q(col[7]));
  FDCE #(
    .INIT(1'b0)) 
    \col_reg[8] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\col[8]_i_1__0_n_0 ),
        .Q(col[8]));
  FDCE #(
    .INIT(1'b0)) 
    \col_reg[9] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\col[9]_i_1__0_n_0 ),
        .Q(col[9]));
  (* SOFT_HLUTNM = "soft_lutpair1669" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \colaccLast[0]_i_1 
       (.I0(\edge_reg_n_0_[0] ),
        .O(colaccLast0[0]));
  (* SOFT_HLUTNM = "soft_lutpair1660" *) 
  LUT2 #(
    .INIT(4'h9)) 
    \colaccLast[1]_i_1 
       (.I0(\edge_reg_n_0_[1] ),
        .I1(\edge_reg_n_0_[0] ),
        .O(colaccLast0[1]));
  (* SOFT_HLUTNM = "soft_lutpair1669" *) 
  LUT3 #(
    .INIT(8'hA9)) 
    \colaccLast[2]_i_1 
       (.I0(\edge_reg_n_0_[2] ),
        .I1(\edge_reg_n_0_[0] ),
        .I2(\edge_reg_n_0_[1] ),
        .O(colaccLast0[2]));
  LUT5 #(
    .INIT(32'hB0000000)) 
    \colaccLast[3]_i_1 
       (.I0(\tixVState_reg[1]_0 [0]),
        .I1(\tixVState_reg[1]_0 [1]),
        .I2(vsync_last_reg_1),
        .I3(rng_reg_0),
        .I4(enAccbuf11_out),
        .O(tkst));
  (* SOFT_HLUTNM = "soft_lutpair1660" *) 
  LUT4 #(
    .INIT(16'hFE01)) 
    \colaccLast[3]_i_2 
       (.I0(\edge_reg_n_0_[2] ),
        .I1(\edge_reg_n_0_[0] ),
        .I2(\edge_reg_n_0_[1] ),
        .I3(\edge_reg_n_0_[3] ),
        .O(colaccLast0[3]));
  (* SOFT_HLUTNM = "soft_lutpair1634" *) 
  LUT4 #(
    .INIT(16'h01FF)) 
    \colaccLast[3]_i_3 
       (.I0(stateStream[0]),
        .I1(stateStream[1]),
        .I2(stateStream[2]),
        .I3(rng_reg_0),
        .O(enAccbuf11_out));
  FDPE #(
    .INIT(1'b1)) 
    \colaccLast_reg[0] 
       (.C(aclk_sig),
        .CE(tkst),
        .D(colaccLast0[0]),
        .PRE(AR),
        .Q(rowaccLast[0]));
  FDCE #(
    .INIT(1'b0)) 
    \colaccLast_reg[1] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(colaccLast0[1]),
        .Q(rowaccLast[1]));
  FDPE #(
    .INIT(1'b1)) 
    \colaccLast_reg[2] 
       (.C(aclk_sig),
        .CE(tkst),
        .D(colaccLast0[2]),
        .PRE(AR),
        .Q(rowaccLast[2]));
  FDCE #(
    .INIT(1'b0)) 
    \colaccLast_reg[3] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(colaccLast0[3]),
        .Q(rowaccLast[3]));
  (* SOFT_HLUTNM = "soft_lutpair1651" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \colacc[0]_i_1 
       (.I0(\colacc[3]_i_4_n_0 ),
        .I1(colacc[0]),
        .O(\colacc[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1661" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \colacc[1]_i_1 
       (.I0(\colacc[3]_i_4_n_0 ),
        .I1(colacc[0]),
        .I2(colacc[1]),
        .O(\colacc[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1644" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \colacc[2]_i_1 
       (.I0(\colacc[3]_i_4_n_0 ),
        .I1(colacc[0]),
        .I2(colacc[1]),
        .I3(colacc[2]),
        .O(\colacc[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF4540)) 
    \colacc[3]_i_1 
       (.I0(\colacc[3]_i_3_n_0 ),
        .I1(rgbVideoinToManyAXIS_tvalid),
        .I2(rgbNotGray_reg_0),
        .I3(grayVideoinToManyAXIS_tvalid),
        .I4(enAccbuf11_out),
        .O(\colacc[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1644" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \colacc[3]_i_2 
       (.I0(\colacc[3]_i_4_n_0 ),
        .I1(colacc[2]),
        .I2(colacc[1]),
        .I3(colacc[0]),
        .I4(colacc[3]),
        .O(\colacc[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1638" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \colacc[3]_i_3 
       (.I0(stateStream[2]),
        .I1(stateStream[1]),
        .I2(stateStream[0]),
        .O(\colacc[3]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h44444440)) 
    \colacc[3]_i_4 
       (.I0(enAccbuf0),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(stateStream[0]),
        .O(\colacc[3]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h90090000)) 
    \colacc[3]_i_5 
       (.I0(rowaccLast[1]),
        .I1(colacc[1]),
        .I2(rowaccLast[2]),
        .I3(colacc[2]),
        .I4(\colacc[3]_i_6_n_0 ),
        .O(enAccbuf0));
  (* SOFT_HLUTNM = "soft_lutpair1651" *) 
  LUT4 #(
    .INIT(16'h9009)) 
    \colacc[3]_i_6 
       (.I0(colacc[3]),
        .I1(rowaccLast[3]),
        .I2(colacc[0]),
        .I3(rowaccLast[0]),
        .O(\colacc[3]_i_6_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \colacc_reg[0] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\colacc[0]_i_1_n_0 ),
        .Q(colacc[0]));
  FDCE #(
    .INIT(1'b0)) 
    \colacc_reg[1] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\colacc[1]_i_1_n_0 ),
        .Q(colacc[1]));
  FDCE #(
    .INIT(1'b0)) 
    \colacc_reg[2] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\colacc[2]_i_1_n_0 ),
        .Q(colacc[2]));
  FDCE #(
    .INIT(1'b0)) 
    \colacc_reg[3] 
       (.C(aclk_sig),
        .CE(\colacc[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\colacc[3]_i_2_n_0 ),
        .Q(colacc[3]));
  (* KEEP_HIERARCHY = "yes" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-13 {cell *THIS*}}" *) 
  DSP48E2 #(
    .ACASCREG(0),
    .ADREG(1),
    .ALUMODEREG(0),
    .AMULTSEL("A"),
    .AREG(0),
    .AUTORESET_PATDET("NO_RESET"),
    .AUTORESET_PRIORITY("RESET"),
    .A_INPUT("DIRECT"),
    .BCASCREG(0),
    .BMULTSEL("B"),
    .BREG(0),
    .B_INPUT("DIRECT"),
    .CARRYINREG(0),
    .CARRYINSELREG(0),
    .CREG(1),
    .DREG(1),
    .INMODEREG(0),
    .MASK(48'h3FFFFFFFFFFF),
    .MREG(0),
    .OPMODEREG(0),
    .PATTERN(48'h000000000000),
    .PREADDINSEL("A"),
    .PREG(0),
    .RND(48'h000000000000),
    .SEL_MASK("MASK"),
    .SEL_PATTERN("PATTERN"),
    .USE_MULT("MULTIPLY"),
    .USE_PATTERN_DETECT("NO_PATDET"),
    .USE_SIMD("ONE48"),
    .USE_WIDEXOR("FALSE"),
    .XORSIMD("XOR24_48_96")) 
    decim10
       (.A({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\acc1_reg_n_0_[19] ,\acc1_reg_n_0_[18] ,\acc1_reg_n_0_[17] ,\acc1_reg_n_0_[16] ,\acc1_reg_n_0_[15] ,\acc1_reg_n_0_[14] ,\acc1_reg_n_0_[13] ,\acc1_reg_n_0_[12] ,\acc1_reg_n_0_[11] ,\acc1_reg_n_0_[10] ,\acc1_reg_n_0_[9] ,\acc1_reg_n_0_[8] ,\acc1_reg_n_0_[7] ,\acc1_reg_n_0_[6] ,\acc1_reg_n_0_[5] ,\acc1_reg_n_0_[4] ,\acc1_reg_n_0_[3] ,\acc1_reg_n_0_[2] ,\acc1_reg_n_0_[1] ,\acc1_reg_n_0_[0] }),
        .ACIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ACOUT(NLW_decim10_ACOUT_UNCONNECTED[29:0]),
        .ALUMODE({1'b0,1'b0,1'b0,1'b0}),
        .B({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,edge2}),
        .BCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .BCOUT(NLW_decim10_BCOUT_UNCONNECTED[17:0]),
        .C({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CARRYCASCIN(1'b0),
        .CARRYCASCOUT(NLW_decim10_CARRYCASCOUT_UNCONNECTED),
        .CARRYIN(1'b0),
        .CARRYINSEL({1'b0,1'b0,1'b0}),
        .CARRYOUT(NLW_decim10_CARRYOUT_UNCONNECTED[3:0]),
        .CEA1(1'b0),
        .CEA2(1'b0),
        .CEAD(1'b0),
        .CEALUMODE(1'b0),
        .CEB1(1'b0),
        .CEB2(1'b0),
        .CEC(1'b0),
        .CECARRYIN(1'b0),
        .CECTRL(1'b0),
        .CED(1'b0),
        .CEINMODE(1'b0),
        .CEM(1'b0),
        .CEP(1'b0),
        .CLK(1'b0),
        .D({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .INMODE({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .MULTSIGNIN(1'b0),
        .MULTSIGNOUT(NLW_decim10_MULTSIGNOUT_UNCONNECTED),
        .OPMODE({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,1'b0,1'b1}),
        .OVERFLOW(NLW_decim10_OVERFLOW_UNCONNECTED),
        .P({NLW_decim10_P_UNCONNECTED[47:31],decim10_n_75,decim10_n_76,decim10_n_77,decim10_n_78,decim10_n_79,decim10_n_80,decim10_n_81,decim10_n_82,decim10_n_83,decim10_n_84,decim10_n_85,decim10_n_86,decim10_n_87,decim10_n_88,decim10_n_89,decim10_n_90,decim10_n_91,decim10_n_92,decim10_n_93,decim10_n_94,decim10_n_95,decim10_n_96,decim10_n_97,decim10_n_98,decim10_n_99,decim10_n_100,decim10_n_101,decim10_n_102,decim10_n_103,decim10_n_104,decim10_n_105}),
        .PATTERNBDETECT(NLW_decim10_PATTERNBDETECT_UNCONNECTED),
        .PATTERNDETECT(NLW_decim10_PATTERNDETECT_UNCONNECTED),
        .PCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .PCOUT(NLW_decim10_PCOUT_UNCONNECTED[47:0]),
        .RSTA(1'b0),
        .RSTALLCARRYIN(1'b0),
        .RSTALUMODE(1'b0),
        .RSTB(1'b0),
        .RSTC(1'b0),
        .RSTCTRL(1'b0),
        .RSTD(1'b0),
        .RSTINMODE(1'b0),
        .RSTM(1'b0),
        .RSTP(1'b0),
        .UNDERFLOW(NLW_decim10_UNDERFLOW_UNCONNECTED),
        .XOROUT(NLW_decim10_XOROUT_UNCONNECTED[7:0]));
  (* SOFT_HLUTNM = "soft_lutpair1652" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim1[16]_i_1 
       (.I0(decim10_n_89),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim1[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1652" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim1[17]_i_1 
       (.I0(decim10_n_88),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim1[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1653" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim1[18]_i_1 
       (.I0(decim10_n_87),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim1[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1653" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim1[19]_i_1 
       (.I0(decim10_n_86),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim1[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1654" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim1[20]_i_1 
       (.I0(decim10_n_85),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim1[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1654" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim1[21]_i_1 
       (.I0(decim10_n_84),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim1[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1655" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim1[22]_i_1 
       (.I0(decim10_n_83),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim1[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1655" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim1[23]_i_1 
       (.I0(decim10_n_82),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim1[23]_i_1_n_0 ));
  FDCE \decim1_reg[16] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim1[16]_i_1_n_0 ),
        .Q(decim1[16]));
  FDCE \decim1_reg[17] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim1[17]_i_1_n_0 ),
        .Q(decim1[17]));
  FDCE \decim1_reg[18] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim1[18]_i_1_n_0 ),
        .Q(decim1[18]));
  FDCE \decim1_reg[19] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim1[19]_i_1_n_0 ),
        .Q(decim1[19]));
  FDCE \decim1_reg[20] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim1[20]_i_1_n_0 ),
        .Q(decim1[20]));
  FDCE \decim1_reg[21] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim1[21]_i_1_n_0 ),
        .Q(decim1[21]));
  FDCE \decim1_reg[22] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim1[22]_i_1_n_0 ),
        .Q(decim1[22]));
  FDCE \decim1_reg[23] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim1[23]_i_1_n_0 ),
        .Q(decim1[23]));
  (* KEEP_HIERARCHY = "yes" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-13 {cell *THIS*}}" *) 
  DSP48E2 #(
    .ACASCREG(0),
    .ADREG(1),
    .ALUMODEREG(0),
    .AMULTSEL("A"),
    .AREG(0),
    .AUTORESET_PATDET("NO_RESET"),
    .AUTORESET_PRIORITY("RESET"),
    .A_INPUT("DIRECT"),
    .BCASCREG(0),
    .BMULTSEL("B"),
    .BREG(0),
    .B_INPUT("DIRECT"),
    .CARRYINREG(0),
    .CARRYINSELREG(0),
    .CREG(1),
    .DREG(1),
    .INMODEREG(0),
    .MASK(48'h3FFFFFFFFFFF),
    .MREG(0),
    .OPMODEREG(0),
    .PATTERN(48'h000000000000),
    .PREADDINSEL("A"),
    .PREG(0),
    .RND(48'h000000000000),
    .SEL_MASK("MASK"),
    .SEL_PATTERN("PATTERN"),
    .USE_MULT("MULTIPLY"),
    .USE_PATTERN_DETECT("NO_PATDET"),
    .USE_SIMD("ONE48"),
    .USE_WIDEXOR("FALSE"),
    .XORSIMD("XOR24_48_96")) 
    decim20
       (.A({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\acc2_reg_n_0_[19] ,\acc2_reg_n_0_[18] ,\acc2_reg_n_0_[17] ,\acc2_reg_n_0_[16] ,\acc2_reg_n_0_[15] ,\acc2_reg_n_0_[14] ,\acc2_reg_n_0_[13] ,\acc2_reg_n_0_[12] ,\acc2_reg_n_0_[11] ,\acc2_reg_n_0_[10] ,\acc2_reg_n_0_[9] ,\acc2_reg_n_0_[8] ,\acc2_reg_n_0_[7] ,\acc2_reg_n_0_[6] ,\acc2_reg_n_0_[5] ,\acc2_reg_n_0_[4] ,\acc2_reg_n_0_[3] ,\acc2_reg_n_0_[2] ,\acc2_reg_n_0_[1] ,\acc2_reg_n_0_[0] }),
        .ACIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ACOUT(NLW_decim20_ACOUT_UNCONNECTED[29:0]),
        .ALUMODE({1'b0,1'b0,1'b0,1'b0}),
        .B({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,edge2}),
        .BCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .BCOUT(NLW_decim20_BCOUT_UNCONNECTED[17:0]),
        .C({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CARRYCASCIN(1'b0),
        .CARRYCASCOUT(NLW_decim20_CARRYCASCOUT_UNCONNECTED),
        .CARRYIN(1'b0),
        .CARRYINSEL({1'b0,1'b0,1'b0}),
        .CARRYOUT(NLW_decim20_CARRYOUT_UNCONNECTED[3:0]),
        .CEA1(1'b0),
        .CEA2(1'b0),
        .CEAD(1'b0),
        .CEALUMODE(1'b0),
        .CEB1(1'b0),
        .CEB2(1'b0),
        .CEC(1'b0),
        .CECARRYIN(1'b0),
        .CECTRL(1'b0),
        .CED(1'b0),
        .CEINMODE(1'b0),
        .CEM(1'b0),
        .CEP(1'b0),
        .CLK(1'b0),
        .D({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .INMODE({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .MULTSIGNIN(1'b0),
        .MULTSIGNOUT(NLW_decim20_MULTSIGNOUT_UNCONNECTED),
        .OPMODE({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,1'b0,1'b1}),
        .OVERFLOW(NLW_decim20_OVERFLOW_UNCONNECTED),
        .P({NLW_decim20_P_UNCONNECTED[47:31],decim20_n_75,decim20_n_76,decim20_n_77,decim20_n_78,decim20_n_79,decim20_n_80,decim20_n_81,decim20_n_82,decim20_n_83,decim20_n_84,decim20_n_85,decim20_n_86,decim20_n_87,decim20_n_88,decim20_n_89,decim20_n_90,decim20_n_91,decim20_n_92,decim20_n_93,decim20_n_94,decim20_n_95,decim20_n_96,decim20_n_97,decim20_n_98,decim20_n_99,decim20_n_100,decim20_n_101,decim20_n_102,decim20_n_103,decim20_n_104,decim20_n_105}),
        .PATTERNBDETECT(NLW_decim20_PATTERNBDETECT_UNCONNECTED),
        .PATTERNDETECT(NLW_decim20_PATTERNDETECT_UNCONNECTED),
        .PCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .PCOUT(NLW_decim20_PCOUT_UNCONNECTED[47:0]),
        .RSTA(1'b0),
        .RSTALLCARRYIN(1'b0),
        .RSTALUMODE(1'b0),
        .RSTB(1'b0),
        .RSTC(1'b0),
        .RSTCTRL(1'b0),
        .RSTD(1'b0),
        .RSTINMODE(1'b0),
        .RSTM(1'b0),
        .RSTP(1'b0),
        .UNDERFLOW(NLW_decim20_UNDERFLOW_UNCONNECTED),
        .XOROUT(NLW_decim20_XOROUT_UNCONNECTED[7:0]));
  (* SOFT_HLUTNM = "soft_lutpair1656" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim2[16]_i_1 
       (.I0(decim20_n_89),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim2[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1656" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim2[17]_i_1 
       (.I0(decim20_n_88),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim2[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1657" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim2[18]_i_1 
       (.I0(decim20_n_87),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim2[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1657" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim2[19]_i_1 
       (.I0(decim20_n_86),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim2[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1658" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim2[20]_i_1 
       (.I0(decim20_n_85),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim2[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1658" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim2[21]_i_1 
       (.I0(decim20_n_84),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim2[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1659" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim2[22]_i_1 
       (.I0(decim20_n_83),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim2[22]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h33BF)) 
    \decim2[23]_i_1 
       (.I0(strbStore_reg_n_0),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(decim2));
  (* SOFT_HLUTNM = "soft_lutpair1659" *) 
  LUT4 #(
    .INIT(16'h8880)) 
    \decim2[23]_i_2 
       (.I0(decim20_n_82),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(\stateStore_reg[1]_0 [1]),
        .O(\decim2[23]_i_2_n_0 ));
  FDCE \decim2_reg[16] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim2[16]_i_1_n_0 ),
        .Q(\decim2_reg_n_0_[16] ));
  FDCE \decim2_reg[17] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim2[17]_i_1_n_0 ),
        .Q(\decim2_reg_n_0_[17] ));
  FDCE \decim2_reg[18] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim2[18]_i_1_n_0 ),
        .Q(\decim2_reg_n_0_[18] ));
  FDCE \decim2_reg[19] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim2[19]_i_1_n_0 ),
        .Q(\decim2_reg_n_0_[19] ));
  FDCE \decim2_reg[20] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim2[20]_i_1_n_0 ),
        .Q(\decim2_reg_n_0_[20] ));
  FDCE \decim2_reg[21] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim2[21]_i_1_n_0 ),
        .Q(\decim2_reg_n_0_[21] ));
  FDCE \decim2_reg[22] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim2[22]_i_1_n_0 ),
        .Q(\decim2_reg_n_0_[22] ));
  FDCE \decim2_reg[23] 
       (.C(aclk_sig),
        .CE(decim2),
        .CLR(AR),
        .D(\decim2[23]_i_2_n_0 ),
        .Q(\decim2_reg_n_0_[23] ));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[0]_i_1 
       (.I0(Q[0]),
        .O(minusOp[0]));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[15]_i_2 
       (.I0(D[7]),
        .O(\decimLast[15]_i_2_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[15]_i_3 
       (.I0(D[6]),
        .O(\decimLast[15]_i_3_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[15]_i_4 
       (.I0(D[5]),
        .O(\decimLast[15]_i_4_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[15]_i_5 
       (.I0(D[4]),
        .O(\decimLast[15]_i_5_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[15]_i_6 
       (.I0(D[3]),
        .O(\decimLast[15]_i_6_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[15]_i_7 
       (.I0(D[2]),
        .O(\decimLast[15]_i_7_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[15]_i_8 
       (.I0(D[1]),
        .O(\decimLast[15]_i_8_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[8]_i_2 
       (.I0(D[0]),
        .O(S[7]));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[8]_i_3 
       (.I0(Q[7]),
        .O(S[6]));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[8]_i_4 
       (.I0(Q[6]),
        .O(S[5]));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[8]_i_5 
       (.I0(Q[5]),
        .O(S[4]));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[8]_i_6 
       (.I0(Q[4]),
        .O(S[3]));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[8]_i_7 
       (.I0(Q[3]),
        .O(S[2]));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[8]_i_8 
       (.I0(Q[2]),
        .O(S[1]));
  LUT1 #(
    .INIT(2'h1)) 
    \decimLast[8]_i_9 
       (.I0(Q[1]),
        .O(S[0]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[0] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(minusOp[0]),
        .Q(decimLast[0]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[10] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(minusOp[10]),
        .Q(decimLast[10]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[11] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(minusOp[11]),
        .Q(decimLast[11]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[12] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(minusOp[12]),
        .Q(decimLast[12]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[13] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(minusOp[13]),
        .Q(decimLast[13]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[14] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(minusOp[14]),
        .Q(decimLast[14]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[15] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(minusOp[15]),
        .Q(decimLast[15]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \decimLast_reg[15]_i_1 
       (.CI(CO),
        .CI_TOP(1'b0),
        .CO({\NLW_decimLast_reg[15]_i_1_CO_UNCONNECTED [7:6],\decimLast_reg[15]_i_1_n_2 ,\decimLast_reg[15]_i_1_n_3 ,\decimLast_reg[15]_i_1_n_4 ,\decimLast_reg[15]_i_1_n_5 ,\decimLast_reg[15]_i_1_n_6 ,\decimLast_reg[15]_i_1_n_7 }),
        .DI({1'b0,1'b0,D[6:1]}),
        .O({\NLW_decimLast_reg[15]_i_1_O_UNCONNECTED [7],minusOp[15:9]}),
        .S({1'b0,\decimLast[15]_i_2_n_0 ,\decimLast[15]_i_3_n_0 ,\decimLast[15]_i_4_n_0 ,\decimLast[15]_i_5_n_0 ,\decimLast[15]_i_6_n_0 ,\decimLast[15]_i_7_n_0 ,\decimLast[15]_i_8_n_0 }));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[1] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(\decimLast_reg[8]_0 [0]),
        .Q(decimLast[1]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[2] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(\decimLast_reg[8]_0 [1]),
        .Q(decimLast[2]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[3] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(\decimLast_reg[8]_0 [2]),
        .Q(decimLast[3]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[4] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(\decimLast_reg[8]_0 [3]),
        .Q(decimLast[4]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[5] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(\decimLast_reg[8]_0 [4]),
        .Q(decimLast[5]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[6] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(\decimLast_reg[8]_0 [5]),
        .Q(decimLast[6]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[7] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(\decimLast_reg[8]_0 [6]),
        .Q(decimLast[7]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[8] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(\decimLast_reg[8]_0 [7]),
        .Q(decimLast[8]));
  FDCE #(
    .INIT(1'b0)) 
    \decimLast_reg[9] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(minusOp[9]),
        .Q(decimLast[9]));
  LUT6 #(
    .INIT(64'h0F0F0F2F0F0F0FFF)) 
    \dwrAccbuf[59]_i_1 
       (.I0(enAccbuf_reg_0),
        .I1(\stateStream[2]_i_4_n_0 ),
        .I2(rng_reg_0),
        .I3(stateStream[2]),
        .I4(stateStream[1]),
        .I5(stateStream[0]),
        .O(\dwrAccbuf[59]_i_1_n_0 ));
  FDCE \dwrAccbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[0]),
        .Q(dwrA[0]));
  FDCE \dwrAccbuf_reg[10] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[10]),
        .Q(dwrA[10]));
  FDCE \dwrAccbuf_reg[11] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[11]),
        .Q(dwrA[11]));
  FDCE \dwrAccbuf_reg[12] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[12]),
        .Q(dwrA[12]));
  FDCE \dwrAccbuf_reg[13] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[13]),
        .Q(dwrA[13]));
  FDCE \dwrAccbuf_reg[14] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[14]),
        .Q(dwrA[14]));
  FDCE \dwrAccbuf_reg[15] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[15]),
        .Q(dwrA[15]));
  FDCE \dwrAccbuf_reg[16] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[16]),
        .Q(dwrA[16]));
  FDCE \dwrAccbuf_reg[17] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[17]),
        .Q(dwrA[17]));
  FDCE \dwrAccbuf_reg[18] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[18]),
        .Q(dwrA[18]));
  FDCE \dwrAccbuf_reg[19] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[19]),
        .Q(dwrA[19]));
  FDCE \dwrAccbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[1]),
        .Q(dwrA[1]));
  FDCE \dwrAccbuf_reg[20] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[0]),
        .Q(dwrA[20]));
  FDCE \dwrAccbuf_reg[21] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[1]),
        .Q(dwrA[21]));
  FDCE \dwrAccbuf_reg[22] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[2]),
        .Q(dwrA[22]));
  FDCE \dwrAccbuf_reg[23] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[3]),
        .Q(dwrA[23]));
  FDCE \dwrAccbuf_reg[24] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[4]),
        .Q(dwrA[24]));
  FDCE \dwrAccbuf_reg[25] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[5]),
        .Q(dwrA[25]));
  FDCE \dwrAccbuf_reg[26] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[6]),
        .Q(dwrA[26]));
  FDCE \dwrAccbuf_reg[27] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[7]),
        .Q(dwrA[27]));
  FDCE \dwrAccbuf_reg[28] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[8]),
        .Q(dwrA[28]));
  FDCE \dwrAccbuf_reg[29] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[9]),
        .Q(dwrA[29]));
  FDCE \dwrAccbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[2]),
        .Q(dwrA[2]));
  FDCE \dwrAccbuf_reg[30] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[10]),
        .Q(dwrA[30]));
  FDCE \dwrAccbuf_reg[31] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[11]),
        .Q(dwrA[31]));
  FDCE \dwrAccbuf_reg[32] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[12]),
        .Q(dwrA[32]));
  FDCE \dwrAccbuf_reg[33] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[13]),
        .Q(dwrA[33]));
  FDCE \dwrAccbuf_reg[34] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[14]),
        .Q(dwrA[34]));
  FDCE \dwrAccbuf_reg[35] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[15]),
        .Q(dwrA[35]));
  FDCE \dwrAccbuf_reg[36] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[16]),
        .Q(dwrA[36]));
  FDCE \dwrAccbuf_reg[37] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[17]),
        .Q(dwrA[37]));
  FDCE \dwrAccbuf_reg[38] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[18]),
        .Q(dwrA[38]));
  FDCE \dwrAccbuf_reg[39] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc1[19]),
        .Q(dwrA[39]));
  FDCE \dwrAccbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[3]),
        .Q(dwrA[3]));
  FDCE \dwrAccbuf_reg[40] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_19),
        .Q(dwrA[40]));
  FDCE \dwrAccbuf_reg[41] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_18),
        .Q(dwrA[41]));
  FDCE \dwrAccbuf_reg[42] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_17),
        .Q(dwrA[42]));
  FDCE \dwrAccbuf_reg[43] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_16),
        .Q(dwrA[43]));
  FDCE \dwrAccbuf_reg[44] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_15),
        .Q(dwrA[44]));
  FDCE \dwrAccbuf_reg[45] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_14),
        .Q(dwrA[45]));
  FDCE \dwrAccbuf_reg[46] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_13),
        .Q(dwrA[46]));
  FDCE \dwrAccbuf_reg[47] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_12),
        .Q(dwrA[47]));
  FDCE \dwrAccbuf_reg[48] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_11),
        .Q(dwrA[48]));
  FDCE \dwrAccbuf_reg[49] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_10),
        .Q(dwrA[49]));
  FDCE \dwrAccbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[4]),
        .Q(dwrA[4]));
  FDCE \dwrAccbuf_reg[50] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_9),
        .Q(dwrA[50]));
  FDCE \dwrAccbuf_reg[51] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_8),
        .Q(dwrA[51]));
  FDCE \dwrAccbuf_reg[52] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_7),
        .Q(dwrA[52]));
  FDCE \dwrAccbuf_reg[53] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_6),
        .Q(dwrA[53]));
  FDCE \dwrAccbuf_reg[54] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_5),
        .Q(dwrA[54]));
  FDCE \dwrAccbuf_reg[55] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_4),
        .Q(dwrA[55]));
  FDCE \dwrAccbuf_reg[56] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_3),
        .Q(dwrA[56]));
  FDCE \dwrAccbuf_reg[57] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_2),
        .Q(dwrA[57]));
  FDCE \dwrAccbuf_reg[58] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_1),
        .Q(dwrA[58]));
  FDCE \dwrAccbuf_reg[59] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(myAccbuf_n_0),
        .Q(dwrA[59]));
  FDCE \dwrAccbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[5]),
        .Q(dwrA[5]));
  FDCE \dwrAccbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[6]),
        .Q(dwrA[6]));
  FDCE \dwrAccbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[7]),
        .Q(dwrA[7]));
  FDCE \dwrAccbuf_reg[8] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[8]),
        .Q(dwrA[8]));
  FDCE \dwrAccbuf_reg[9] 
       (.C(aclk_sig),
        .CE(\dwrAccbuf[59]_i_1_n_0 ),
        .CLR(AR),
        .D(acc0[9]),
        .Q(dwrA[9]));
  (* KEEP_HIERARCHY = "yes" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-13 {cell *THIS*}}" *) 
  DSP48E2 #(
    .ACASCREG(0),
    .ADREG(1),
    .ALUMODEREG(0),
    .AMULTSEL("A"),
    .AREG(0),
    .AUTORESET_PATDET("NO_RESET"),
    .AUTORESET_PRIORITY("RESET"),
    .A_INPUT("DIRECT"),
    .BCASCREG(0),
    .BMULTSEL("B"),
    .BREG(0),
    .B_INPUT("DIRECT"),
    .CARRYINREG(0),
    .CARRYINSELREG(0),
    .CREG(1),
    .DREG(1),
    .INMODEREG(0),
    .MASK(48'h3FFFFFFFFFFF),
    .MREG(0),
    .OPMODEREG(0),
    .PATTERN(48'h000000000000),
    .PREADDINSEL("A"),
    .PREG(0),
    .RND(48'h000000000000),
    .SEL_MASK("MASK"),
    .SEL_PATTERN("PATTERN"),
    .USE_MULT("MULTIPLY"),
    .USE_PATTERN_DETECT("NO_PATDET"),
    .USE_SIMD("ONE48"),
    .USE_WIDEXOR("FALSE"),
    .XORSIMD("XOR24_48_96")) 
    dwrPvwbuf0
       (.A({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\acc0_reg_n_0_[19] ,\acc0_reg_n_0_[18] ,\acc0_reg_n_0_[17] ,\acc0_reg_n_0_[16] ,\acc0_reg_n_0_[15] ,\acc0_reg_n_0_[14] ,\acc0_reg_n_0_[13] ,\acc0_reg_n_0_[12] ,\acc0_reg_n_0_[11] ,\acc0_reg_n_0_[10] ,\acc0_reg_n_0_[9] ,\acc0_reg_n_0_[8] ,\acc0_reg_n_0_[7] ,\acc0_reg_n_0_[6] ,\acc0_reg_n_0_[5] ,\acc0_reg_n_0_[4] ,\acc0_reg_n_0_[3] ,\acc0_reg_n_0_[2] ,\acc0_reg_n_0_[1] ,\acc0_reg_n_0_[0] }),
        .ACIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ACOUT(NLW_dwrPvwbuf0_ACOUT_UNCONNECTED[29:0]),
        .ALUMODE({1'b0,1'b0,1'b0,1'b0}),
        .B({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,edge2}),
        .BCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .BCOUT(NLW_dwrPvwbuf0_BCOUT_UNCONNECTED[17:0]),
        .C({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CARRYCASCIN(1'b0),
        .CARRYCASCOUT(NLW_dwrPvwbuf0_CARRYCASCOUT_UNCONNECTED),
        .CARRYIN(1'b0),
        .CARRYINSEL({1'b0,1'b0,1'b0}),
        .CARRYOUT(NLW_dwrPvwbuf0_CARRYOUT_UNCONNECTED[3:0]),
        .CEA1(1'b0),
        .CEA2(1'b0),
        .CEAD(1'b0),
        .CEALUMODE(1'b0),
        .CEB1(1'b0),
        .CEB2(1'b0),
        .CEC(1'b0),
        .CECARRYIN(1'b0),
        .CECTRL(1'b0),
        .CED(1'b0),
        .CEINMODE(1'b0),
        .CEM(1'b0),
        .CEP(1'b0),
        .CLK(1'b0),
        .D({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .INMODE({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .MULTSIGNIN(1'b0),
        .MULTSIGNOUT(NLW_dwrPvwbuf0_MULTSIGNOUT_UNCONNECTED),
        .OPMODE({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,1'b0,1'b1}),
        .OVERFLOW(NLW_dwrPvwbuf0_OVERFLOW_UNCONNECTED),
        .P({NLW_dwrPvwbuf0_P_UNCONNECTED[47:31],dwrPvwbuf0_n_75,dwrPvwbuf0_n_76,dwrPvwbuf0_n_77,dwrPvwbuf0_n_78,dwrPvwbuf0_n_79,dwrPvwbuf0_n_80,dwrPvwbuf0_n_81,dwrPvwbuf0_n_82,dwrPvwbuf0_n_83,dwrPvwbuf0_n_84,dwrPvwbuf0_n_85,dwrPvwbuf0_n_86,dwrPvwbuf0_n_87,dwrPvwbuf0_n_88,dwrPvwbuf0_n_89,dwrPvwbuf0_n_90,dwrPvwbuf0_n_91,dwrPvwbuf0_n_92,dwrPvwbuf0_n_93,dwrPvwbuf0_n_94,dwrPvwbuf0_n_95,dwrPvwbuf0_n_96,dwrPvwbuf0_n_97,dwrPvwbuf0_n_98,dwrPvwbuf0_n_99,dwrPvwbuf0_n_100,dwrPvwbuf0_n_101,dwrPvwbuf0_n_102,dwrPvwbuf0_n_103,dwrPvwbuf0_n_104,dwrPvwbuf0_n_105}),
        .PATTERNBDETECT(NLW_dwrPvwbuf0_PATTERNBDETECT_UNCONNECTED),
        .PATTERNDETECT(NLW_dwrPvwbuf0_PATTERNDETECT_UNCONNECTED),
        .PCIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .PCOUT(NLW_dwrPvwbuf0_PCOUT_UNCONNECTED[47:0]),
        .RSTA(1'b0),
        .RSTALLCARRYIN(1'b0),
        .RSTALUMODE(1'b0),
        .RSTB(1'b0),
        .RSTC(1'b0),
        .RSTCTRL(1'b0),
        .RSTD(1'b0),
        .RSTINMODE(1'b0),
        .RSTM(1'b0),
        .RSTP(1'b0),
        .UNDERFLOW(NLW_dwrPvwbuf0_UNDERFLOW_UNCONNECTED),
        .XOROUT(NLW_dwrPvwbuf0_XOROUT_UNCONNECTED[7:0]));
  LUT6 #(
    .INIT(64'h00000000FF00E4E4)) 
    \dwrPvwbuf[0]_i_1 
       (.I0(\i_reg_n_0_[0] ),
        .I1(decim1[16]),
        .I2(\decim2_reg_n_0_[16] ),
        .I3(dwrPvwbuf0_n_89),
        .I4(\dwrPvwbuf[7]_i_2_n_0 ),
        .I5(aPvwbuf1),
        .O(p_1_in[0]));
  LUT6 #(
    .INIT(64'h00000000FF00E4E4)) 
    \dwrPvwbuf[1]_i_1 
       (.I0(\i_reg_n_0_[0] ),
        .I1(decim1[17]),
        .I2(\decim2_reg_n_0_[17] ),
        .I3(dwrPvwbuf0_n_88),
        .I4(\dwrPvwbuf[7]_i_2_n_0 ),
        .I5(aPvwbuf1),
        .O(p_1_in[1]));
  LUT6 #(
    .INIT(64'h00000000FF00E4E4)) 
    \dwrPvwbuf[2]_i_1 
       (.I0(\i_reg_n_0_[0] ),
        .I1(decim1[18]),
        .I2(\decim2_reg_n_0_[18] ),
        .I3(dwrPvwbuf0_n_87),
        .I4(\dwrPvwbuf[7]_i_2_n_0 ),
        .I5(aPvwbuf1),
        .O(p_1_in[2]));
  LUT6 #(
    .INIT(64'h00000000FF00E4E4)) 
    \dwrPvwbuf[3]_i_1 
       (.I0(\i_reg_n_0_[0] ),
        .I1(decim1[19]),
        .I2(\decim2_reg_n_0_[19] ),
        .I3(dwrPvwbuf0_n_86),
        .I4(\dwrPvwbuf[7]_i_2_n_0 ),
        .I5(aPvwbuf1),
        .O(p_1_in[3]));
  LUT6 #(
    .INIT(64'h00000000FF00E4E4)) 
    \dwrPvwbuf[4]_i_1 
       (.I0(\i_reg_n_0_[0] ),
        .I1(decim1[20]),
        .I2(\decim2_reg_n_0_[20] ),
        .I3(dwrPvwbuf0_n_85),
        .I4(\dwrPvwbuf[7]_i_2_n_0 ),
        .I5(aPvwbuf1),
        .O(p_1_in[4]));
  LUT6 #(
    .INIT(64'h00000000FF00E4E4)) 
    \dwrPvwbuf[5]_i_1 
       (.I0(\i_reg_n_0_[0] ),
        .I1(decim1[21]),
        .I2(\decim2_reg_n_0_[21] ),
        .I3(dwrPvwbuf0_n_84),
        .I4(\dwrPvwbuf[7]_i_2_n_0 ),
        .I5(aPvwbuf1),
        .O(p_1_in[5]));
  LUT6 #(
    .INIT(64'h00000000FF00E4E4)) 
    \dwrPvwbuf[6]_i_1 
       (.I0(\i_reg_n_0_[0] ),
        .I1(decim1[22]),
        .I2(\decim2_reg_n_0_[22] ),
        .I3(dwrPvwbuf0_n_83),
        .I4(\dwrPvwbuf[7]_i_2_n_0 ),
        .I5(aPvwbuf1),
        .O(p_1_in[6]));
  LUT6 #(
    .INIT(64'h00000000FF00E4E4)) 
    \dwrPvwbuf[7]_i_1 
       (.I0(\i_reg_n_0_[0] ),
        .I1(decim1[23]),
        .I2(\decim2_reg_n_0_[23] ),
        .I3(dwrPvwbuf0_n_82),
        .I4(\dwrPvwbuf[7]_i_2_n_0 ),
        .I5(aPvwbuf1),
        .O(p_1_in[7]));
  (* SOFT_HLUTNM = "soft_lutpair1647" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrPvwbuf[7]_i_2 
       (.I0(\stateStore_reg[1]_0 [0]),
        .I1(\stateStore_reg[1]_0 [1]),
        .O(\dwrPvwbuf[7]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1646" *) 
  LUT3 #(
    .INIT(8'h1F)) 
    \dwrPvwbuf[7]_i_3 
       (.I0(\stateStore_reg[1]_0 [1]),
        .I1(\stateStore_reg[1]_0 [0]),
        .I2(rng_reg_0),
        .O(aPvwbuf1));
  FDCE \dwrPvwbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__2_n_0 ),
        .CLR(AR),
        .D(p_1_in[0]),
        .Q(\dwrPvwbuf_reg_n_0_[0] ));
  FDCE \dwrPvwbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__2_n_0 ),
        .CLR(AR),
        .D(p_1_in[1]),
        .Q(\dwrPvwbuf_reg_n_0_[1] ));
  FDCE \dwrPvwbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__2_n_0 ),
        .CLR(AR),
        .D(p_1_in[2]),
        .Q(\dwrPvwbuf_reg_n_0_[2] ));
  FDCE \dwrPvwbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__2_n_0 ),
        .CLR(AR),
        .D(p_1_in[3]),
        .Q(\dwrPvwbuf_reg_n_0_[3] ));
  FDCE \dwrPvwbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__2_n_0 ),
        .CLR(AR),
        .D(p_1_in[4]),
        .Q(\dwrPvwbuf_reg_n_0_[4] ));
  FDCE \dwrPvwbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__2_n_0 ),
        .CLR(AR),
        .D(p_1_in[5]),
        .Q(\dwrPvwbuf_reg_n_0_[5] ));
  FDCE \dwrPvwbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__2_n_0 ),
        .CLR(AR),
        .D(p_1_in[6]),
        .Q(\dwrPvwbuf_reg_n_0_[6] ));
  FDCE \dwrPvwbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__2_n_0 ),
        .CLR(AR),
        .D(p_1_in[7]),
        .Q(\dwrPvwbuf_reg_n_0_[7] ));
  FDCE \edge2_reg[0] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[8]),
        .Q(edge2[0]));
  FDCE \edge2_reg[10] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[18]),
        .Q(edge2[10]));
  FDCE \edge2_reg[1] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[9]),
        .Q(edge2[1]));
  FDPE \edge2_reg[2] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(D[10]),
        .PRE(AR),
        .Q(edge2[2]));
  FDCE \edge2_reg[3] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[11]),
        .Q(edge2[3]));
  FDCE \edge2_reg[4] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[12]),
        .Q(edge2[4]));
  FDPE \edge2_reg[5] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(D[13]),
        .PRE(AR),
        .Q(edge2[5]));
  FDCE \edge2_reg[6] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[14]),
        .Q(edge2[6]));
  FDCE \edge2_reg[7] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[15]),
        .Q(edge2[7]));
  FDCE \edge2_reg[8] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[16]),
        .Q(edge2[8]));
  FDCE \edge2_reg[9] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[17]),
        .Q(edge2[9]));
  FDCE #(
    .INIT(1'b0)) 
    \edge_reg[0] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[19]),
        .Q(\edge_reg_n_0_[0] ));
  FDPE #(
    .INIT(1'b1)) 
    \edge_reg[1] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(D[20]),
        .PRE(AR),
        .Q(\edge_reg_n_0_[1] ));
  FDPE #(
    .INIT(1'b1)) 
    \edge_reg[2] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .D(D[21]),
        .PRE(AR),
        .Q(\edge_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \edge_reg[3] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[22]),
        .Q(\edge_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \edge_reg[4] 
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(D[23]),
        .Q(\edge_reg_n_0_[4] ));
  LUT6 #(
    .INIT(64'h4000FFFF40000000)) 
    enAccbuf_i_1
       (.I0(decimStateStream_dbg),
        .I1(rng_reg_0),
        .I2(stateStream[0]),
        .I3(enAccbuf_reg_0),
        .I4(enAccbuf_i_3_n_0),
        .I5(enAccbuf_reg_n_0),
        .O(enAccbuf_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1640" *) 
  LUT2 #(
    .INIT(4'hE)) 
    enAccbuf_i_2
       (.I0(stateStream[1]),
        .I1(stateStream[2]),
        .O(decimStateStream_dbg));
  LUT5 #(
    .INIT(32'hABABAFAB)) 
    enAccbuf_i_3
       (.I0(row),
        .I1(enAccbuf1),
        .I2(\colacc[3]_i_3_n_0 ),
        .I3(enAccbuf0),
        .I4(\stateStream[2]_i_4_n_0 ),
        .O(enAccbuf_i_3_n_0));
  FDCE enAccbuf_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(enAccbuf_i_1_n_0),
        .Q(enAccbuf_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1662" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \i[0]_i_1__4 
       (.I0(\stateStore_reg[1]_0 [1]),
        .I1(rng_reg_0),
        .I2(\i_reg_n_0_[0] ),
        .O(\i[0]_i_1__4_n_0 ));
  LUT5 #(
    .INIT(32'h37FF07FF)) 
    \i[1]_i_1__2 
       (.I0(\stateStore[0]_i_2_n_0 ),
        .I1(\stateStore_reg[1]_0 [1]),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(rng_reg_0),
        .I4(strbStore_reg_n_0),
        .O(\i[1]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1662" *) 
  LUT4 #(
    .INIT(16'h4080)) 
    \i[1]_i_2__1 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\stateStore_reg[1]_0 [1]),
        .I2(rng_reg_0),
        .I3(\i_reg_n_0_[0] ),
        .O(\i[1]_i_2__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\i[0]_i_1__4_n_0 ),
        .Q(\i_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__2_n_0 ),
        .CLR(AR),
        .D(\i[1]_i_2__1_n_0 ),
        .Q(\i_reg_n_0_[1] ));
  FDCE \ixTExp_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(AR),
        .D(\ixTExp_lcl_reg[3]_0 [0]),
        .Q(\ixTExp_lcl_reg[1]_0 [0]));
  FDCE \ixTExp_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(AR),
        .D(\ixTExp_lcl_reg[3]_0 [1]),
        .Q(\ixTExp_lcl_reg[1]_0 [1]));
  FDCE \ixTExp_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(AR),
        .D(\ixTExp_lcl_reg[3]_0 [2]),
        .Q(\ixTExp_lcl_reg_n_0_[2] ));
  FDCE \ixTExp_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(AR),
        .D(\ixTExp_lcl_reg[3]_0 [3]),
        .Q(\ixTExp_lcl_reg_n_0_[3] ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a64b64 myAccbuf
       (.D({myAccbuf_n_0,myAccbuf_n_1,myAccbuf_n_2,myAccbuf_n_3,myAccbuf_n_4,myAccbuf_n_5,myAccbuf_n_6,myAccbuf_n_7,myAccbuf_n_8,myAccbuf_n_9,myAccbuf_n_10,myAccbuf_n_11,myAccbuf_n_12,myAccbuf_n_13,myAccbuf_n_14,myAccbuf_n_15,myAccbuf_n_16,myAccbuf_n_17,myAccbuf_n_18,myAccbuf_n_19,acc1,acc0[19:8]}),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (dwrA),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\aAccbufB_reg_n_0_[7] ,\aAccbufB_reg_n_0_[6] ,\aAccbufB_reg_n_0_[5] ,\aAccbufB_reg_n_0_[4] ,\aAccbufB_reg_n_0_[3] ,\aAccbufB_reg_n_0_[2] ,\aAccbufB_reg_n_0_[1] ,\aAccbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 (stateStream),
        .DI(DI),
        .Q({\aAccbuf_reg_n_0_[7] ,\aAccbuf_reg_n_0_[6] ,\aAccbuf_reg_n_0_[5] ,\aAccbuf_reg_n_0_[4] ,\aAccbuf_reg_n_0_[3] ,\aAccbuf_reg_n_0_[2] ,\aAccbuf_reg_n_0_[1] ,\aAccbuf_reg_n_0_[0] }),
        .\acc0_lcl_reg[19]_i_2_0 (\acc0_lcl[19]_i_7_n_0 ),
        .\acc0_lcl_reg[19]_i_2_1 (\aAccbufB[7]_i_3_n_0 ),
        .\acc0_lcl_reg[19]_i_2_2 ({\acc0_lcl_reg_n_0_[19] ,\acc0_lcl_reg_n_0_[18] ,\acc0_lcl_reg_n_0_[17] ,\acc0_lcl_reg_n_0_[16] ,\acc0_lcl_reg_n_0_[15] ,\acc0_lcl_reg_n_0_[14] ,\acc0_lcl_reg_n_0_[13] ,\acc0_lcl_reg_n_0_[12] ,\acc0_lcl_reg_n_0_[11] ,\acc0_lcl_reg_n_0_[10] ,\acc0_lcl_reg_n_0_[9] ,\acc0_lcl_reg_n_0_[8] ,\acc0_lcl_reg_n_0_[7] ,\acc0_lcl_reg_n_0_[6] ,\acc0_lcl_reg_n_0_[5] ,\acc0_lcl_reg_n_0_[4] ,\acc0_lcl_reg_n_0_[3] ,\acc0_lcl_reg_n_0_[2] ,\acc0_lcl_reg_n_0_[1] ,\acc0_lcl_reg_n_0_[0] }),
        .\acc0_lcl_reg[7] (\acc0_lcl_reg[7]_0 ),
        .\acc0_lcl_reg[7]_i_2 (\acc0_lcl_reg[7]_i_2 ),
        .\acc1_lcl_reg[19]_i_2_0 ({\acc1_lcl_reg_n_0_[19] ,\acc1_lcl_reg_n_0_[18] ,\acc1_lcl_reg_n_0_[17] ,\acc1_lcl_reg_n_0_[16] ,\acc1_lcl_reg_n_0_[15] ,\acc1_lcl_reg_n_0_[14] ,\acc1_lcl_reg_n_0_[13] ,\acc1_lcl_reg_n_0_[12] ,\acc1_lcl_reg_n_0_[11] ,\acc1_lcl_reg_n_0_[10] ,\acc1_lcl_reg_n_0_[9] ,\acc1_lcl_reg_n_0_[8] ,\acc1_lcl_reg_n_0_[7] ,\acc1_lcl_reg_n_0_[6] ,\acc1_lcl_reg_n_0_[5] ,\acc1_lcl_reg_n_0_[4] ,\acc1_lcl_reg_n_0_[3] ,\acc1_lcl_reg_n_0_[2] ,\acc1_lcl_reg_n_0_[1] ,\acc1_lcl_reg_n_0_[0] }),
        .\acc1_lcl_reg[7]_i_2_0 (rgbNotGray_reg_0),
        .\acc2_lcl_reg[15]_i_2_0 (\acc2_lcl_reg[15]_i_2 ),
        .\acc2_lcl_reg[19]_i_2_0 ({\acc2_lcl_reg_n_0_[19] ,\acc2_lcl_reg_n_0_[18] ,\acc2_lcl_reg_n_0_[17] ,\acc2_lcl_reg_n_0_[16] ,\acc2_lcl_reg_n_0_[15] ,\acc2_lcl_reg_n_0_[14] ,\acc2_lcl_reg_n_0_[13] ,\acc2_lcl_reg_n_0_[12] ,\acc2_lcl_reg_n_0_[11] ,\acc2_lcl_reg_n_0_[10] ,\acc2_lcl_reg_n_0_[9] ,\acc2_lcl_reg_n_0_[8] ,\acc2_lcl_reg_n_0_[7] ,\acc2_lcl_reg_n_0_[6] ,\acc2_lcl_reg_n_0_[5] ,\acc2_lcl_reg_n_0_[4] ,\acc2_lcl_reg_n_0_[3] ,\acc2_lcl_reg_n_0_[2] ,\acc2_lcl_reg_n_0_[1] ,\acc2_lcl_reg_n_0_[0] }),
        .\acc2_reg[19] (rng_reg_0),
        .aclk_sig(aclk_sig),
        .\dwrAccbuf_reg[15] (\dwrAccbuf_reg[15]_0 ),
        .ena(enAccbuf_reg_n_0));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size38kB_a8b64__xdcDup__1 myPvwbuf
       (.\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ({\dwrPvwbuf_reg_n_0_[7] ,\dwrPvwbuf_reg_n_0_[6] ,\dwrPvwbuf_reg_n_0_[5] ,\dwrPvwbuf_reg_n_0_[4] ,\dwrPvwbuf_reg_n_0_[3] ,\dwrPvwbuf_reg_n_0_[2] ,\dwrPvwbuf_reg_n_0_[1] ,\dwrPvwbuf_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 (\stateStore_reg[1]_0 ),
        .Q(aPvwbuf_reg),
        .aclk_sig(aclk_sig),
        .doutb(doutb),
        .\no_softecc_sel_reg.ce_pri.sel_pipe_reg[0] (enPvwbufB),
        .\no_softecc_sel_reg.ce_pri.sel_pipe_reg[2] ({\aPvwbufB_reg_n_0_[12] ,\aPvwbufB_reg_n_0_[11] ,\aPvwbufB_reg_n_0_[10] ,\aPvwbufB_reg_n_0_[9] ,\aPvwbufB_reg_n_0_[8] ,\aPvwbufB_reg_n_0_[7] ,\aPvwbufB_reg_n_0_[6] ,\aPvwbufB_reg_n_0_[5] ,\aPvwbufB_reg_n_0_[4] ,\aPvwbufB_reg_n_0_[3] ,\aPvwbufB_reg_n_0_[2] ,\aPvwbufB_reg_n_0_[1] ,\aPvwbufB_reg_n_0_[0] }));
  FDCE rgbNotGray_reg
       (.C(aclk_sig),
        .CE(ackInvConfig_sig),
        .CLR(AR),
        .D(hdrNotFix),
        .Q(rgbNotGray_reg_0));
  FDCE rng_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(rng_reg_1),
        .Q(rng_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair1667" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \row[0]_i_1__0 
       (.I0(\row[10]_i_3_n_0 ),
        .I1(\row_reg_n_0_[0] ),
        .O(\row[0]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h7FFF000080000000)) 
    \row[10]_i_1__0 
       (.I0(\row[10]_i_2_n_0 ),
        .I1(\row_reg_n_0_[7] ),
        .I2(\row_reg_n_0_[8] ),
        .I3(\row_reg_n_0_[9] ),
        .I4(\row[10]_i_3_n_0 ),
        .I5(\row_reg_n_0_[10] ),
        .O(\row[10]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000000080000000)) 
    \row[10]_i_2 
       (.I0(\row_reg_n_0_[6] ),
        .I1(\row_reg_n_0_[5] ),
        .I2(\row_reg_n_0_[4] ),
        .I3(\row_reg_n_0_[3] ),
        .I4(\row_reg_n_0_[2] ),
        .I5(\row[5]_i_2__0_n_0 ),
        .O(\row[10]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h7070707070707000)) 
    \row[10]_i_3 
       (.I0(\stateStream[2]_i_4_n_0 ),
        .I1(\stateStream_reg[2]_i_5_n_2 ),
        .I2(rng_reg_0),
        .I3(stateStream[2]),
        .I4(stateStream[1]),
        .I5(stateStream[0]),
        .O(\row[10]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1667" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \row[1]_i_1__0 
       (.I0(\row[10]_i_3_n_0 ),
        .I1(\row_reg_n_0_[0] ),
        .I2(\row_reg_n_0_[1] ),
        .O(\row[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1642" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \row[2]_i_1__0 
       (.I0(\row[10]_i_3_n_0 ),
        .I1(\row_reg_n_0_[1] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\row_reg_n_0_[2] ),
        .O(\row[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1642" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \row[3]_i_1__0 
       (.I0(\row[10]_i_3_n_0 ),
        .I1(\row_reg_n_0_[0] ),
        .I2(\row_reg_n_0_[1] ),
        .I3(\row_reg_n_0_[2] ),
        .I4(\row_reg_n_0_[3] ),
        .O(\row[3]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \row[4]_i_1__0 
       (.I0(\row[10]_i_3_n_0 ),
        .I1(\row_reg_n_0_[3] ),
        .I2(\row_reg_n_0_[2] ),
        .I3(\row_reg_n_0_[1] ),
        .I4(\row_reg_n_0_[0] ),
        .I5(\row_reg_n_0_[4] ),
        .O(\row[4]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFF7F000000800000)) 
    \row[5]_i_1__0 
       (.I0(\row_reg_n_0_[4] ),
        .I1(\row_reg_n_0_[3] ),
        .I2(\row_reg_n_0_[2] ),
        .I3(\row[5]_i_2__0_n_0 ),
        .I4(\row[10]_i_3_n_0 ),
        .I5(\row_reg_n_0_[5] ),
        .O(\row[5]_i_1__0_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \row[5]_i_2__0 
       (.I0(\row_reg_n_0_[0] ),
        .I1(\row_reg_n_0_[1] ),
        .O(\row[5]_i_2__0_n_0 ));
  LUT3 #(
    .INIT(8'h84)) 
    \row[6]_i_1__0 
       (.I0(\row[9]_i_2__0_n_0 ),
        .I1(\row[10]_i_3_n_0 ),
        .I2(\row_reg_n_0_[6] ),
        .O(\row[6]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1643" *) 
  LUT4 #(
    .INIT(16'hD020)) 
    \row[7]_i_1__0 
       (.I0(\row_reg_n_0_[6] ),
        .I1(\row[9]_i_2__0_n_0 ),
        .I2(\row[10]_i_3_n_0 ),
        .I3(\row_reg_n_0_[7] ),
        .O(\row[7]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1643" *) 
  LUT5 #(
    .INIT(32'hBF004000)) 
    \row[8]_i_1__0 
       (.I0(\row[9]_i_2__0_n_0 ),
        .I1(\row_reg_n_0_[6] ),
        .I2(\row_reg_n_0_[7] ),
        .I3(\row[10]_i_3_n_0 ),
        .I4(\row_reg_n_0_[8] ),
        .O(\row[8]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFF7F000000800000)) 
    \row[9]_i_1__0 
       (.I0(\row_reg_n_0_[8] ),
        .I1(\row_reg_n_0_[7] ),
        .I2(\row_reg_n_0_[6] ),
        .I3(\row[9]_i_2__0_n_0 ),
        .I4(\row[10]_i_3_n_0 ),
        .I5(\row_reg_n_0_[9] ),
        .O(\row[9]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \row[9]_i_2__0 
       (.I0(\row_reg_n_0_[0] ),
        .I1(\row_reg_n_0_[1] ),
        .I2(\row_reg_n_0_[2] ),
        .I3(\row_reg_n_0_[3] ),
        .I4(\row_reg_n_0_[4] ),
        .I5(\row_reg_n_0_[5] ),
        .O(\row[9]_i_2__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \row_reg[0] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\row[0]_i_1__0_n_0 ),
        .Q(\row_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \row_reg[10] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\row[10]_i_1__0_n_0 ),
        .Q(\row_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \row_reg[1] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\row[1]_i_1__0_n_0 ),
        .Q(\row_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \row_reg[2] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\row[2]_i_1__0_n_0 ),
        .Q(\row_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \row_reg[3] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\row[3]_i_1__0_n_0 ),
        .Q(\row_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \row_reg[4] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\row[4]_i_1__0_n_0 ),
        .Q(\row_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \row_reg[5] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\row[5]_i_1__0_n_0 ),
        .Q(\row_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \row_reg[6] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\row[6]_i_1__0_n_0 ),
        .Q(\row_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \row_reg[7] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\row[7]_i_1__0_n_0 ),
        .Q(\row_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \row_reg[8] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\row[8]_i_1__0_n_0 ),
        .Q(\row_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \row_reg[9] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\row[9]_i_1__0_n_0 ),
        .Q(\row_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1650" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \rowacc[0]_i_1 
       (.I0(\rowacc[3]_i_3_n_0 ),
        .I1(rowacc[0]),
        .O(\rowacc[0]_i_1_n_0 ));
  LUT3 #(
    .INIT(8'h28)) 
    \rowacc[1]_i_1 
       (.I0(\rowacc[3]_i_3_n_0 ),
        .I1(rowacc[0]),
        .I2(rowacc[1]),
        .O(\rowacc[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1645" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \rowacc[2]_i_1 
       (.I0(\rowacc[3]_i_3_n_0 ),
        .I1(rowacc[0]),
        .I2(rowacc[1]),
        .I3(rowacc[2]),
        .O(\rowacc[2]_i_1_n_0 ));
  LUT3 #(
    .INIT(8'h57)) 
    \rowacc[3]_i_1 
       (.I0(rng_reg_0),
        .I1(stateStream[2]),
        .I2(stateStream[0]),
        .O(row));
  (* SOFT_HLUTNM = "soft_lutpair1645" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \rowacc[3]_i_2 
       (.I0(\rowacc[3]_i_3_n_0 ),
        .I1(rowacc[2]),
        .I2(rowacc[1]),
        .I3(rowacc[0]),
        .I4(rowacc[3]),
        .O(\rowacc[3]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h44444440)) 
    \rowacc[3]_i_3 
       (.I0(\stateStream[2]_i_4_n_0 ),
        .I1(rng_reg_0),
        .I2(stateStream[2]),
        .I3(stateStream[1]),
        .I4(stateStream[0]),
        .O(\rowacc[3]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \rowacc_reg[0] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\rowacc[0]_i_1_n_0 ),
        .Q(rowacc[0]));
  FDCE #(
    .INIT(1'b0)) 
    \rowacc_reg[1] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\rowacc[1]_i_1_n_0 ),
        .Q(rowacc[1]));
  FDCE #(
    .INIT(1'b0)) 
    \rowacc_reg[2] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\rowacc[2]_i_1_n_0 ),
        .Q(rowacc[2]));
  FDCE #(
    .INIT(1'b0)) 
    \rowacc_reg[3] 
       (.C(aclk_sig),
        .CE(row),
        .CLR(AR),
        .D(\rowacc[3]_i_2_n_0 ),
        .Q(rowacc[3]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(ackInvUnlock_sig),
        .CLR(AR),
        .D(\stateOp_reg[1]_1 [0]),
        .Q(\stateOp_reg[1]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(ackInvUnlock_sig),
        .CLR(AR),
        .D(\stateOp_reg[1]_1 [1]),
        .Q(\stateOp_reg[1]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair1646" *) 
  LUT5 #(
    .INIT(32'h00C000A0)) 
    \stateStore[0]_i_1 
       (.I0(vsync_last_reg_1),
        .I1(\stateStore[0]_i_2_n_0 ),
        .I2(rng_reg_0),
        .I3(\stateStore_reg[1]_0 [0]),
        .I4(\stateStore_reg[1]_0 [1]),
        .O(\stateStore[0]_i_1_n_0 ));
  LUT3 #(
    .INIT(8'hFD)) 
    \stateStore[0]_i_2 
       (.I0(rgbNotGray_reg_0),
        .I1(\i_reg_n_0_[1] ),
        .I2(\stateStore[1]_i_3_n_0 ),
        .O(\stateStore[0]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hFF3FBFBF)) 
    \stateStore[1]_i_1 
       (.I0(strbStore_reg_n_0),
        .I1(rng_reg_0),
        .I2(\stateStore_reg[1]_0 [0]),
        .I3(vsync_last_reg_1),
        .I4(\stateStore_reg[1]_0 [1]),
        .O(\stateStore[1]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h6FF6)) 
    \stateStore[1]_i_10 
       (.I0(aPvwbuf_reg[5]),
        .I1(decimLast[5]),
        .I2(aPvwbuf_reg[2]),
        .I3(decimLast[2]),
        .O(\stateStore[1]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h00FFAE0000000000)) 
    \stateStore[1]_i_2 
       (.I0(\stateStore[1]_i_3_n_0 ),
        .I1(rgbNotGray_reg_0),
        .I2(\i_reg_n_0_[1] ),
        .I3(\stateStore_reg[1]_0 [1]),
        .I4(\stateStore_reg[1]_0 [0]),
        .I5(rng_reg_0),
        .O(\stateStore[1]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00004004)) 
    \stateStore[1]_i_3 
       (.I0(\stateStore[1]_i_4_n_0 ),
        .I1(\stateStore[1]_i_5_n_0 ),
        .I2(aPvwbuf_reg[15]),
        .I3(decimLast[15]),
        .I4(\stateStore[1]_i_6_n_0 ),
        .O(\stateStore[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFBEFFFFBE)) 
    \stateStore[1]_i_4 
       (.I0(\stateStore[1]_i_7_n_0 ),
        .I1(aPvwbuf_reg[7]),
        .I2(decimLast[7]),
        .I3(aPvwbuf_reg[6]),
        .I4(decimLast[6]),
        .I5(\stateStore[1]_i_8_n_0 ),
        .O(\stateStore[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stateStore[1]_i_5 
       (.I0(decimLast[12]),
        .I1(aPvwbuf_reg[12]),
        .I2(decimLast[13]),
        .I3(aPvwbuf_reg[13]),
        .I4(aPvwbuf_reg[14]),
        .I5(decimLast[14]),
        .O(\stateStore[1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFBEFFFFBE)) 
    \stateStore[1]_i_6 
       (.I0(\stateStore[1]_i_9_n_0 ),
        .I1(aPvwbuf_reg[1]),
        .I2(decimLast[1]),
        .I3(aPvwbuf_reg[0]),
        .I4(decimLast[0]),
        .I5(\stateStore[1]_i_10_n_0 ),
        .O(\stateStore[1]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'h6FF6)) 
    \stateStore[1]_i_7 
       (.I0(aPvwbuf_reg[10]),
        .I1(decimLast[10]),
        .I2(aPvwbuf_reg[9]),
        .I3(decimLast[9]),
        .O(\stateStore[1]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'h6FF6)) 
    \stateStore[1]_i_8 
       (.I0(aPvwbuf_reg[11]),
        .I1(decimLast[11]),
        .I2(aPvwbuf_reg[8]),
        .I3(decimLast[8]),
        .O(\stateStore[1]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h6FF6)) 
    \stateStore[1]_i_9 
       (.I0(aPvwbuf_reg[4]),
        .I1(decimLast[4]),
        .I2(aPvwbuf_reg[3]),
        .I3(decimLast[3]),
        .O(\stateStore[1]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateStore_reg[0] 
       (.C(aclk_sig),
        .CE(\stateStore[1]_i_1_n_0 ),
        .CLR(AR),
        .D(\stateStore[0]_i_1_n_0 ),
        .Q(\stateStore_reg[1]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateStore_reg[1] 
       (.C(aclk_sig),
        .CE(\stateStore[1]_i_1_n_0 ),
        .CLR(AR),
        .D(\stateStore[1]_i_2_n_0 ),
        .Q(\stateStore_reg[1]_0 [1]));
  LUT6 #(
    .INIT(64'hBBBBBAAABABABAAA)) 
    \stateStream[0]_i_1 
       (.I0(tkst),
        .I1(stateStream[2]),
        .I2(stateStream[1]),
        .I3(\row[10]_i_3_n_0 ),
        .I4(\stateStream[0]_i_2_n_0 ),
        .I5(\stateStream[1]_i_2_n_0 ),
        .O(\stateStream[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1641" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \stateStream[0]_i_2 
       (.I0(rng_reg_0),
        .I1(stateStream[0]),
        .O(\stateStream[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00000A0A00003000)) 
    \stateStream[1]_i_1 
       (.I0(\row[10]_i_3_n_0 ),
        .I1(\stateStream[1]_i_2_n_0 ),
        .I2(stateStream[0]),
        .I3(rng_reg_0),
        .I4(stateStream[2]),
        .I5(stateStream[1]),
        .O(\stateStream[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h777FFF7F)) 
    \stateStream[1]_i_2 
       (.I0(enAccbuf0),
        .I1(\col_reg[10]_i_4_n_2 ),
        .I2(grayVideoinToManyAXIS_tvalid),
        .I3(rgbNotGray_reg_0),
        .I4(rgbVideoinToManyAXIS_tvalid),
        .O(\stateStream[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF577F5777)) 
    \stateStream[2]_i_1 
       (.I0(rng_reg_0),
        .I1(stateStream[2]),
        .I2(stateStream[1]),
        .I3(stateStream[0]),
        .I4(vsync_last_reg_1),
        .I5(\stateStream[2]_i_3_n_0 ),
        .O(\stateStream[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1007077373313110)) 
    \stateStream[2]_i_10 
       (.I0(NRowRaw[4]),
        .I1(NRowRaw[5]),
        .I2(\row_reg_n_0_[4] ),
        .I3(\edge_reg_n_0_[4] ),
        .I4(\stateStream[2]_i_21_n_0 ),
        .I5(\row_reg_n_0_[5] ),
        .O(\stateStream[2]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h0096009696FF0096)) 
    \stateStream[2]_i_11 
       (.I0(\stateStream[2]_i_22_n_0 ),
        .I1(\row_reg_n_0_[3] ),
        .I2(\edge_reg_n_0_[3] ),
        .I3(NRowRaw[3]),
        .I4(row2__0),
        .I5(NRowRaw[2]),
        .O(\stateStream[2]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h3110077307733110)) 
    \stateStream[2]_i_12 
       (.I0(NRowRaw[0]),
        .I1(NRowRaw[1]),
        .I2(\row_reg_n_0_[0] ),
        .I3(\edge_reg_n_0_[0] ),
        .I4(\edge_reg_n_0_[1] ),
        .I5(\row_reg_n_0_[1] ),
        .O(\stateStream[2]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'h96999999)) 
    \stateStream[2]_i_13 
       (.I0(NRowRaw[10]),
        .I1(\row_reg_n_0_[10] ),
        .I2(\stateStream[2]_i_19_n_0 ),
        .I3(\row_reg_n_0_[8] ),
        .I4(\row_reg_n_0_[9] ),
        .O(\stateStream[2]_i_13_n_0 ));
  LUT5 #(
    .INIT(32'h82412418)) 
    \stateStream[2]_i_14 
       (.I0(\row_reg_n_0_[9] ),
        .I1(\row_reg_n_0_[8] ),
        .I2(\stateStream[2]_i_19_n_0 ),
        .I3(NRowRaw[9]),
        .I4(NRowRaw[8]),
        .O(\stateStream[2]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'h82412418)) 
    \stateStream[2]_i_15 
       (.I0(\row_reg_n_0_[7] ),
        .I1(\row_reg_n_0_[6] ),
        .I2(\stateStream[2]_i_20_n_0 ),
        .I3(NRowRaw[7]),
        .I4(NRowRaw[6]),
        .O(\stateStream[2]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h4228811414422881)) 
    \stateStream[2]_i_16 
       (.I0(\row_reg_n_0_[5] ),
        .I1(\stateStream[2]_i_21_n_0 ),
        .I2(\edge_reg_n_0_[4] ),
        .I3(\row_reg_n_0_[4] ),
        .I4(NRowRaw[5]),
        .I5(NRowRaw[4]),
        .O(\stateStream[2]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h9669000000009669)) 
    \stateStream[2]_i_17 
       (.I0(NRowRaw[3]),
        .I1(\stateStream[2]_i_22_n_0 ),
        .I2(\row_reg_n_0_[3] ),
        .I3(\edge_reg_n_0_[3] ),
        .I4(row2__0),
        .I5(NRowRaw[2]),
        .O(\stateStream[2]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h0069690096000069)) 
    \stateStream[2]_i_18 
       (.I0(NRowRaw[1]),
        .I1(\row_reg_n_0_[1] ),
        .I2(\edge_reg_n_0_[1] ),
        .I3(\edge_reg_n_0_[0] ),
        .I4(\row_reg_n_0_[0] ),
        .I5(NRowRaw[0]),
        .O(\stateStream[2]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h17FFFFFFFFFFFFFF)) 
    \stateStream[2]_i_19 
       (.I0(\row_reg_n_0_[4] ),
        .I1(\edge_reg_n_0_[4] ),
        .I2(\stateStream[2]_i_21_n_0 ),
        .I3(\row_reg_n_0_[5] ),
        .I4(\row_reg_n_0_[6] ),
        .I5(\row_reg_n_0_[7] ),
        .O(\stateStream[2]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h0400000000000000)) 
    \stateStream[2]_i_2 
       (.I0(stateStream[0]),
        .I1(stateStream[1]),
        .I2(stateStream[2]),
        .I3(rng_reg_0),
        .I4(\stateStream[2]_i_4_n_0 ),
        .I5(\stateStream_reg[2]_i_5_n_2 ),
        .O(\stateStream[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h11171777FFFFFFFF)) 
    \stateStream[2]_i_20 
       (.I0(\row_reg_n_0_[4] ),
        .I1(\edge_reg_n_0_[4] ),
        .I2(\stateStream[2]_i_22_n_0 ),
        .I3(\edge_reg_n_0_[3] ),
        .I4(\row_reg_n_0_[3] ),
        .I5(\row_reg_n_0_[5] ),
        .O(\stateStream[2]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1668" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \stateStream[2]_i_21 
       (.I0(\stateStream[2]_i_22_n_0 ),
        .I1(\edge_reg_n_0_[3] ),
        .I2(\row_reg_n_0_[3] ),
        .O(\stateStream[2]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFEC80EC800000)) 
    \stateStream[2]_i_22 
       (.I0(\edge_reg_n_0_[0] ),
        .I1(\row_reg_n_0_[1] ),
        .I2(\row_reg_n_0_[0] ),
        .I3(\edge_reg_n_0_[1] ),
        .I4(\edge_reg_n_0_[2] ),
        .I5(\row_reg_n_0_[2] ),
        .O(\stateStream[2]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'hE8A0175F175FE8A0)) 
    \stateStream[2]_i_23 
       (.I0(\edge_reg_n_0_[1] ),
        .I1(\row_reg_n_0_[0] ),
        .I2(\row_reg_n_0_[1] ),
        .I3(\edge_reg_n_0_[0] ),
        .I4(\edge_reg_n_0_[2] ),
        .I5(\row_reg_n_0_[2] ),
        .O(row2__0));
  LUT5 #(
    .INIT(32'h08080C00)) 
    \stateStream[2]_i_3 
       (.I0(\stateStream_reg[0]_2 ),
        .I1(stateStream[1]),
        .I2(stateStream[2]),
        .I3(grayVideoinToManyAXIS_tlast),
        .I4(rgbNotGray_reg_0),
        .O(\stateStream[2]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h90090000)) 
    \stateStream[2]_i_4 
       (.I0(rowacc[1]),
        .I1(rowaccLast[1]),
        .I2(rowacc[2]),
        .I3(rowaccLast[2]),
        .I4(\stateStream[2]_i_6_n_0 ),
        .O(\stateStream[2]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1650" *) 
  LUT4 #(
    .INIT(16'h9009)) 
    \stateStream[2]_i_6 
       (.I0(rowacc[3]),
        .I1(rowaccLast[3]),
        .I2(rowacc[0]),
        .I3(rowaccLast[0]),
        .O(\stateStream[2]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h00009AAA)) 
    \stateStream[2]_i_7 
       (.I0(\row_reg_n_0_[10] ),
        .I1(\stateStream[2]_i_19_n_0 ),
        .I2(\row_reg_n_0_[8] ),
        .I3(\row_reg_n_0_[9] ),
        .I4(NRowRaw[10]),
        .O(\stateStream[2]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h70371301)) 
    \stateStream[2]_i_8 
       (.I0(NRowRaw[8]),
        .I1(NRowRaw[9]),
        .I2(\stateStream[2]_i_19_n_0 ),
        .I3(\row_reg_n_0_[8] ),
        .I4(\row_reg_n_0_[9] ),
        .O(\stateStream[2]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h70371301)) 
    \stateStream[2]_i_9 
       (.I0(NRowRaw[6]),
        .I1(NRowRaw[7]),
        .I2(\stateStream[2]_i_20_n_0 ),
        .I3(\row_reg_n_0_[6] ),
        .I4(\row_reg_n_0_[7] ),
        .O(\stateStream[2]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateStream_reg[0] 
       (.C(aclk_sig),
        .CE(\stateStream[2]_i_1_n_0 ),
        .CLR(AR),
        .D(\stateStream[0]_i_1_n_0 ),
        .Q(stateStream[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateStream_reg[1] 
       (.C(aclk_sig),
        .CE(\stateStream[2]_i_1_n_0 ),
        .CLR(AR),
        .D(\stateStream[1]_i_1_n_0 ),
        .Q(stateStream[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateStream_reg[2] 
       (.C(aclk_sig),
        .CE(\stateStream[2]_i_1_n_0 ),
        .CLR(AR),
        .D(\stateStream[2]_i_2_n_0 ),
        .Q(stateStream[2]));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \stateStream_reg[2]_i_5 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\NLW_stateStream_reg[2]_i_5_CO_UNCONNECTED [7:6],\stateStream_reg[2]_i_5_n_2 ,\stateStream_reg[2]_i_5_n_3 ,\stateStream_reg[2]_i_5_n_4 ,\stateStream_reg[2]_i_5_n_5 ,\stateStream_reg[2]_i_5_n_6 ,\stateStream_reg[2]_i_5_n_7 }),
        .DI({1'b0,1'b0,\stateStream[2]_i_7_n_0 ,\stateStream[2]_i_8_n_0 ,\stateStream[2]_i_9_n_0 ,\stateStream[2]_i_10_n_0 ,\stateStream[2]_i_11_n_0 ,\stateStream[2]_i_12_n_0 }),
        .O(\NLW_stateStream_reg[2]_i_5_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,\stateStream[2]_i_13_n_0 ,\stateStream[2]_i_14_n_0 ,\stateStream[2]_i_15_n_0 ,\stateStream[2]_i_16_n_0 ,\stateStream[2]_i_17_n_0 ,\stateStream[2]_i_18_n_0 }));
  LUT5 #(
    .INIT(32'hE8FFE800)) 
    \state[0]_i_2 
       (.I0(stateStream[0]),
        .I1(stateStream[1]),
        .I2(stateStream[2]),
        .I3(\state_reg[5] [0]),
        .I4(videoinStateRgbegr_dbg[2]),
        .O(\stateStream_reg[0]_1 ));
  LUT5 #(
    .INIT(32'hF4FFF400)) 
    \state[4]_i_4 
       (.I0(stateStream[1]),
        .I1(stateStream[0]),
        .I2(stateStream[2]),
        .I3(\state_reg[5] [0]),
        .I4(videoinStateRgbegr_dbg[0]),
        .O(\stateStream_reg[1]_0 ));
  LUT6 #(
    .INIT(64'hEEFFEE00F0FFF0FF)) 
    \state[5]_i_2 
       (.I0(stateStream[1]),
        .I1(stateStream[2]),
        .I2(videoinStateRgbegr_dbg[1]),
        .I3(\state_reg[5] [1]),
        .I4(\state_reg[5]_0 ),
        .I5(\state_reg[5] [0]),
        .O(\stateStream_reg[1]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair1639" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \state[7]_i_2 
       (.I0(stateStream[0]),
        .I1(stateStream[1]),
        .I2(stateStream[2]),
        .O(\stateStream_reg[0]_0 ));
  LUT6 #(
    .INIT(64'hEEEEEAAA22222AAA)) 
    strbStore_i_1
       (.I0(strbStore5_out),
        .I1(rng_reg_0),
        .I2(stateStream[0]),
        .I3(stateStream[1]),
        .I4(stateStream[2]),
        .I5(strbStore_reg_n_0),
        .O(strbStore_i_1_n_0));
  LUT6 #(
    .INIT(64'h0000008000000000)) 
    strbStore_i_2
       (.I0(rng_reg_0),
        .I1(stateStream[0]),
        .I2(enAccbuf_reg_0),
        .I3(stateStream[1]),
        .I4(stateStream[2]),
        .I5(\stateStream[2]_i_4_n_0 ),
        .O(strbStore5_out));
  FDCE strbStore_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(strbStore_i_1_n_0),
        .Q(strbStore_reg_n_0));
  LUT6 #(
    .INIT(64'h0002000000000002)) 
    \tixVState[1]_i_3__0 
       (.I0(\tixVState[1]_i_5_n_0 ),
        .I1(\tixVState_reg[1]_1 ),
        .I2(vsync_last_reg_n_0),
        .I3(\ixTExp_lcl_reg_n_0_[3] ),
        .I4(\tixVState_reg[1]_2 ),
        .I5(\ixTExp_lcl_reg_n_0_[2] ),
        .O(vsync_last_reg_0));
  LUT5 #(
    .INIT(32'h02000000)) 
    \tixVState[1]_i_5 
       (.I0(\tixVState_reg[1]_0 [0]),
        .I1(\tixVState_reg[1]_0 [1]),
        .I2(\stateOp_reg[1]_0 [0]),
        .I3(vsync_last_reg_1),
        .I4(\stateOp_reg[1]_0 [1]),
        .O(\tixVState[1]_i_5_n_0 ));
  FDCE \tixVState_reg[0] 
       (.C(aclk_sig),
        .CE(\tixVState_reg[1]_3 ),
        .CLR(AR),
        .D(ackInvAcquire_sig),
        .Q(\tixVState_reg[1]_0 [0]));
  FDCE \tixVState_reg[1] 
       (.C(aclk_sig),
        .CE(\tixVState_reg[1]_3 ),
        .CLR(AR),
        .D(\tixVState_reg[1]_4 ),
        .Q(\tixVState_reg[1]_0 [1]));
  FDCE \tkst_reg[0] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [0]),
        .Q(\tkst_reg[31]_0 [0]));
  FDCE \tkst_reg[10] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [10]),
        .Q(\tkst_reg[31]_0 [10]));
  FDCE \tkst_reg[11] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [11]),
        .Q(\tkst_reg[31]_0 [11]));
  FDCE \tkst_reg[12] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [12]),
        .Q(\tkst_reg[31]_0 [12]));
  FDCE \tkst_reg[13] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [13]),
        .Q(\tkst_reg[31]_0 [13]));
  FDCE \tkst_reg[14] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [14]),
        .Q(\tkst_reg[31]_0 [14]));
  FDCE \tkst_reg[15] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [15]),
        .Q(\tkst_reg[31]_0 [15]));
  FDCE \tkst_reg[16] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [16]),
        .Q(\tkst_reg[31]_0 [16]));
  FDCE \tkst_reg[17] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [17]),
        .Q(\tkst_reg[31]_0 [17]));
  FDCE \tkst_reg[18] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [18]),
        .Q(\tkst_reg[31]_0 [18]));
  FDCE \tkst_reg[19] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [19]),
        .Q(\tkst_reg[31]_0 [19]));
  FDCE \tkst_reg[1] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [1]),
        .Q(\tkst_reg[31]_0 [1]));
  FDCE \tkst_reg[20] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [20]),
        .Q(\tkst_reg[31]_0 [20]));
  FDCE \tkst_reg[21] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [21]),
        .Q(\tkst_reg[31]_0 [21]));
  FDCE \tkst_reg[22] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [22]),
        .Q(\tkst_reg[31]_0 [22]));
  FDCE \tkst_reg[23] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [23]),
        .Q(\tkst_reg[31]_0 [23]));
  FDCE \tkst_reg[24] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [24]),
        .Q(\tkst_reg[31]_0 [24]));
  FDCE \tkst_reg[25] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [25]),
        .Q(\tkst_reg[31]_0 [25]));
  FDCE \tkst_reg[26] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [26]),
        .Q(\tkst_reg[31]_0 [26]));
  FDCE \tkst_reg[27] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [27]),
        .Q(\tkst_reg[31]_0 [27]));
  FDCE \tkst_reg[28] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [28]),
        .Q(\tkst_reg[31]_0 [28]));
  FDCE \tkst_reg[29] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [29]),
        .Q(\tkst_reg[31]_0 [29]));
  FDCE \tkst_reg[2] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [2]),
        .Q(\tkst_reg[31]_0 [2]));
  FDCE \tkst_reg[30] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [30]),
        .Q(\tkst_reg[31]_0 [30]));
  FDCE \tkst_reg[31] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [31]),
        .Q(\tkst_reg[31]_0 [31]));
  FDCE \tkst_reg[3] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [3]),
        .Q(\tkst_reg[31]_0 [3]));
  FDCE \tkst_reg[4] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [4]),
        .Q(\tkst_reg[31]_0 [4]));
  FDCE \tkst_reg[5] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [5]),
        .Q(\tkst_reg[31]_0 [5]));
  FDCE \tkst_reg[6] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [6]),
        .Q(\tkst_reg[31]_0 [6]));
  FDCE \tkst_reg[7] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [7]),
        .Q(\tkst_reg[31]_0 [7]));
  FDCE \tkst_reg[8] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [8]),
        .Q(\tkst_reg[31]_0 [8]));
  FDCE \tkst_reg[9] 
       (.C(aclk_sig),
        .CE(tkst),
        .CLR(AR),
        .D(\tkst_reg[31]_1 [9]),
        .Q(\tkst_reg[31]_0 [9]));
  LUT4 #(
    .INIT(16'hFE02)) 
    vsync_last_i_1__0
       (.I0(vsync_last_reg_1),
        .I1(vsync_last_reg_2),
        .I2(\stateOp_reg[1]_0 [0]),
        .I3(vsync_last_reg_n_0),
        .O(vsync_last_i_1__0_n_0));
  FDCE vsync_last_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(vsync_last_i_1__0_n_0),
        .Q(vsync_last_reg_n_0));
  LUT3 #(
    .INIT(8'hFE)) 
    \wordcntLast[28]_i_16 
       (.I0(enPvwbufB),
        .I1(\FSM_onehot_statePvwbufB_reg_n_0_[2] ),
        .I2(\FSM_onehot_statePvwbufB_reg[5]_0 [0]),
        .O(ackPvwbufDecimToHostif));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Director
   (ackInvDirectorSet,
    ackInvDirectorConfig,
    stateOp_reg_0,
    rng,
    \NRowRaw_sig_reg[7]_0 ,
    Q,
    rng_sig_reg_0,
    \rowRaw_lcl_reg[10] ,
    \NRowRaw_sig_reg[10]_0 ,
    \NRowRaw_sig_reg[11]_0 ,
    \row_reg[11] ,
    \row_reg[9] ,
    \col_reg[8] ,
    \NColRaw_sig_reg[11]_0 ,
    rng_sig_reg_1,
    \NColRaw_sig_reg[11]_1 ,
    \NColRaw_sig_reg[8]_0 ,
    \NColRaw_sig_reg[2]_0 ,
    \NColRaw_sig_reg[9]_0 ,
    \NColRaw_sig_reg[5]_0 ,
    \NColRaw_sig_reg[3]_0 ,
    \row_lcl_reg[0] ,
    \NColRaw_sig_reg[7]_0 ,
    aclk_sig,
    AR,
    stateOp0_out,
    rng_sig_reg_2,
    reqInvDirectorConfig,
    reqInvDirectorSet,
    enCoobuf_reg,
    \stateMaxsel[0]_i_2_0 ,
    commok,
    \i_reg[0]__1 ,
    \stateLive[1]_i_11_0 ,
    \row_reg[0] ,
    \stateSynth[2]_i_12_0 ,
    \i[7]_i_3_0 ,
    \i[7]_i_6_0 ,
    \toVideoinAXIS_tdata_sig_reg[23] ,
    \aImdbufB_reg[0] ,
    \stateMaxsel[0]_i_6_0 ,
    \stateSwap[2]_i_5_0 ,
    rgbToManyAXIS_tlast_sig_i_2,
    rgbToManyAXIS_tlast_sig_i_2_0,
    rgbToManyAXIS_tlast_sig_i_4_0,
    rgbToManyAXIS_tlast_sig_i_4_1,
    rgbToManyAXIS_tlast_sig_i_4_2,
    \NRowRaw_sig_reg[11]_1 ,
    D);
  output ackInvDirectorSet;
  output ackInvDirectorConfig;
  output stateOp_reg_0;
  output rng;
  output \NRowRaw_sig_reg[7]_0 ;
  output [11:0]Q;
  output rng_sig_reg_0;
  output \rowRaw_lcl_reg[10] ;
  output \NRowRaw_sig_reg[10]_0 ;
  output \NRowRaw_sig_reg[11]_0 ;
  output \row_reg[11] ;
  output \row_reg[9] ;
  output \col_reg[8] ;
  output [10:0]\NColRaw_sig_reg[11]_0 ;
  output [0:0]rng_sig_reg_1;
  output \NColRaw_sig_reg[11]_1 ;
  output \NColRaw_sig_reg[8]_0 ;
  output \NColRaw_sig_reg[2]_0 ;
  output \NColRaw_sig_reg[9]_0 ;
  output \NColRaw_sig_reg[5]_0 ;
  output \NColRaw_sig_reg[3]_0 ;
  output \row_lcl_reg[0] ;
  output \NColRaw_sig_reg[7]_0 ;
  input aclk_sig;
  input [0:0]AR;
  input stateOp0_out;
  input rng_sig_reg_2;
  input reqInvDirectorConfig;
  input reqInvDirectorSet;
  input enCoobuf_reg;
  input [7:0]\stateMaxsel[0]_i_2_0 ;
  input commok;
  input [8:0]\i_reg[0]__1 ;
  input \stateLive[1]_i_11_0 ;
  input [8:0]\row_reg[0] ;
  input \stateSynth[2]_i_12_0 ;
  input [7:0]\i[7]_i_3_0 ;
  input \i[7]_i_6_0 ;
  input [0:0]\toVideoinAXIS_tdata_sig_reg[23] ;
  input [10:0]\aImdbufB_reg[0] ;
  input \stateMaxsel[0]_i_6_0 ;
  input [10:0]\stateSwap[2]_i_5_0 ;
  input [4:0]rgbToManyAXIS_tlast_sig_i_2;
  input rgbToManyAXIS_tlast_sig_i_2_0;
  input rgbToManyAXIS_tlast_sig_i_4_0;
  input rgbToManyAXIS_tlast_sig_i_4_1;
  input rgbToManyAXIS_tlast_sig_i_4_2;
  input [3:0]\NRowRaw_sig_reg[11]_1 ;
  input [18:0]D;

  wire [0:0]AR;
  wire [18:0]D;
  wire [10:0]\NColRaw_sig_reg[11]_0 ;
  wire \NColRaw_sig_reg[11]_1 ;
  wire \NColRaw_sig_reg[2]_0 ;
  wire \NColRaw_sig_reg[3]_0 ;
  wire \NColRaw_sig_reg[5]_0 ;
  wire \NColRaw_sig_reg[7]_0 ;
  wire \NColRaw_sig_reg[8]_0 ;
  wire \NColRaw_sig_reg[9]_0 ;
  wire NRowRaw_sig;
  wire \NRowRaw_sig_reg[10]_0 ;
  wire \NRowRaw_sig_reg[11]_0 ;
  wire [3:0]\NRowRaw_sig_reg[11]_1 ;
  wire \NRowRaw_sig_reg[7]_0 ;
  wire [11:0]Q;
  wire [10:0]\aImdbufB_reg[0] ;
  wire ackInvDirectorConfig;
  wire ackInvDirectorSet;
  wire ackInvSet_sig;
  wire aclk_sig;
  wire \col_reg[8] ;
  wire commok;
  wire enCoobuf_reg;
  wire \i[7]_i_12_n_0 ;
  wire \i[7]_i_13_n_0 ;
  wire \i[7]_i_14_n_0 ;
  wire \i[7]_i_15_n_0 ;
  wire \i[7]_i_16_n_0 ;
  wire [7:0]\i[7]_i_3_0 ;
  wire \i[7]_i_6_0 ;
  wire \i[7]_i_6_n_0 ;
  wire \i[7]_i_7_n_0 ;
  wire \i[7]_i_8_n_0 ;
  wire \i[7]_i_9_n_0 ;
  wire [8:0]\i_reg[0]__1 ;
  wire reqInvDirectorConfig;
  wire reqInvDirectorSet;
  wire [4:0]rgbToManyAXIS_tlast_sig_i_2;
  wire rgbToManyAXIS_tlast_sig_i_2_0;
  wire rgbToManyAXIS_tlast_sig_i_4_0;
  wire rgbToManyAXIS_tlast_sig_i_4_1;
  wire rgbToManyAXIS_tlast_sig_i_4_2;
  wire rgbToManyAXIS_tlast_sig_i_6_n_0;
  wire rgbToManyAXIS_tlast_sig_i_7_n_0;
  wire rng;
  wire rng_sig_reg_0;
  wire [0:0]rng_sig_reg_1;
  wire rng_sig_reg_2;
  wire \rowRaw_lcl_reg[10] ;
  wire \row[11]_i_10_n_0 ;
  wire \row[11]_i_11_n_0 ;
  wire \row[11]_i_8_n_0 ;
  wire \row[11]_i_9_n_0 ;
  wire \row_lcl_reg[0] ;
  wire [8:0]\row_reg[0] ;
  wire \row_reg[11] ;
  wire \row_reg[9] ;
  wire \stateImdstream[2]_i_10_n_0 ;
  wire \stateImdstream[2]_i_4_n_0 ;
  wire \stateImdstream[2]_i_6_n_0 ;
  wire \stateImdstream[2]_i_7_n_0 ;
  wire \stateImdstream[2]_i_8_n_0 ;
  wire \stateImdstream[2]_i_9_n_0 ;
  wire \stateLive[1]_i_11_0 ;
  wire \stateLive[1]_i_11_n_0 ;
  wire \stateLive[1]_i_12_n_0 ;
  wire \stateLive[1]_i_13_n_0 ;
  wire \stateLive[1]_i_14_n_0 ;
  wire \stateLive[1]_i_17_n_0 ;
  wire \stateLive[1]_i_18_n_0 ;
  wire \stateLive[1]_i_19_n_0 ;
  wire \stateLive[1]_i_6_n_0 ;
  wire \stateLive[1]_i_7_n_0 ;
  wire [7:0]\stateMaxsel[0]_i_2_0 ;
  wire \stateMaxsel[0]_i_3_n_0 ;
  wire \stateMaxsel[0]_i_4_n_0 ;
  wire \stateMaxsel[0]_i_5_n_0 ;
  wire \stateMaxsel[0]_i_6_0 ;
  wire \stateMaxsel[0]_i_6_n_0 ;
  wire \stateMaxsel[0]_i_7_n_0 ;
  wire \stateMaxsel[0]_i_8_n_0 ;
  wire \stateMaxsel[0]_i_9_n_0 ;
  wire stateOp;
  wire stateOp0_out;
  wire stateOp_reg_0;
  wire \stateSwap[2]_i_10_n_0 ;
  wire \stateSwap[2]_i_11_n_0 ;
  wire \stateSwap[2]_i_12_n_0 ;
  wire \stateSwap[2]_i_13_n_0 ;
  wire \stateSwap[2]_i_14_n_0 ;
  wire \stateSwap[2]_i_15_n_0 ;
  wire [10:0]\stateSwap[2]_i_5_0 ;
  wire \stateSwap[2]_i_7_n_0 ;
  wire \stateSwap[2]_i_8_n_0 ;
  wire \stateSwap[2]_i_9_n_0 ;
  wire \stateSynth[2]_i_12_0 ;
  wire \stateSynth[2]_i_13_n_0 ;
  wire \stateSynth[2]_i_14_n_0 ;
  wire \stateSynth[2]_i_15_n_0 ;
  wire \stateSynth[2]_i_16_n_0 ;
  wire \stateSynth[2]_i_17_n_0 ;
  wire \stateSynth[2]_i_18_n_0 ;
  wire \stateSynth[2]_i_20_n_0 ;
  wire \stateSynth[2]_i_21_n_0 ;
  wire [0:0]\toVideoinAXIS_tdata_sig_reg[23] ;

  LUT3 #(
    .INIT(8'h10)) 
    \/i_ 
       (.I0(stateOp_reg_0),
        .I1(reqInvDirectorConfig),
        .I2(reqInvDirectorSet),
        .O(ackInvSet_sig));
  FDCE #(
    .INIT(1'b0)) 
    \NColRaw_sig_reg[10] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[9]),
        .Q(\NColRaw_sig_reg[11]_0 [9]));
  FDPE #(
    .INIT(1'b0)) 
    \NColRaw_sig_reg[11] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .D(D[10]),
        .PRE(AR),
        .Q(\NColRaw_sig_reg[11]_0 [10]));
  FDCE #(
    .INIT(1'b0)) 
    \NColRaw_sig_reg[1] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[0]),
        .Q(\NColRaw_sig_reg[11]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \NColRaw_sig_reg[2] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[1]),
        .Q(\NColRaw_sig_reg[11]_0 [1]));
  FDCE #(
    .INIT(1'b0)) 
    \NColRaw_sig_reg[3] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[2]),
        .Q(\NColRaw_sig_reg[11]_0 [2]));
  FDCE #(
    .INIT(1'b0)) 
    \NColRaw_sig_reg[4] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[3]),
        .Q(\NColRaw_sig_reg[11]_0 [3]));
  FDPE #(
    .INIT(1'b0)) 
    \NColRaw_sig_reg[5] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .D(D[4]),
        .PRE(AR),
        .Q(\NColRaw_sig_reg[11]_0 [4]));
  FDCE #(
    .INIT(1'b0)) 
    \NColRaw_sig_reg[6] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[5]),
        .Q(\NColRaw_sig_reg[11]_0 [5]));
  FDCE #(
    .INIT(1'b0)) 
    \NColRaw_sig_reg[7] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[6]),
        .Q(\NColRaw_sig_reg[11]_0 [6]));
  FDCE #(
    .INIT(1'b0)) 
    \NColRaw_sig_reg[8] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[7]),
        .Q(\NColRaw_sig_reg[11]_0 [7]));
  FDPE #(
    .INIT(1'b0)) 
    \NColRaw_sig_reg[9] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .D(D[8]),
        .PRE(AR),
        .Q(\NColRaw_sig_reg[11]_0 [8]));
  FDCE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[0] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[11]),
        .Q(Q[0]));
  FDPE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[10] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .D(\NRowRaw_sig_reg[11]_1 [2]),
        .PRE(AR),
        .Q(Q[10]));
  FDCE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[11] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(\NRowRaw_sig_reg[11]_1 [3]),
        .Q(Q[11]));
  FDCE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[1] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[12]),
        .Q(Q[1]));
  FDCE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[2] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[13]),
        .Q(Q[2]));
  FDPE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[3] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .D(D[14]),
        .PRE(AR),
        .Q(Q[3]));
  FDPE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[4] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .D(D[15]),
        .PRE(AR),
        .Q(Q[4]));
  FDCE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[5] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[16]),
        .Q(Q[5]));
  FDCE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[6] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .CLR(AR),
        .D(D[17]),
        .Q(Q[6]));
  FDPE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[7] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .D(D[18]),
        .PRE(AR),
        .Q(Q[7]));
  FDPE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[8] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .D(\NRowRaw_sig_reg[11]_1 [0]),
        .PRE(AR),
        .Q(Q[8]));
  FDPE #(
    .INIT(1'b0)) 
    \NRowRaw_sig_reg[9] 
       (.C(aclk_sig),
        .CE(NRowRaw_sig),
        .D(\NRowRaw_sig_reg[11]_1 [1]),
        .PRE(AR),
        .Q(Q[9]));
  LUT2 #(
    .INIT(4'h4)) 
    ackInvConfig_sig_i_1__3
       (.I0(stateOp_reg_0),
        .I1(reqInvDirectorConfig),
        .O(NRowRaw_sig));
  FDCE ackInvConfig_sig_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(AR),
        .D(NRowRaw_sig),
        .Q(ackInvDirectorConfig));
  LUT5 #(
    .INIT(32'h5D5DFF5D)) 
    ackInvSet_sig_i_1__4
       (.I0(stateOp_reg_0),
        .I1(ackInvDirectorSet),
        .I2(reqInvDirectorSet),
        .I3(ackInvDirectorConfig),
        .I4(reqInvDirectorConfig),
        .O(stateOp));
  FDCE ackInvSet_sig_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(AR),
        .D(ackInvSet_sig),
        .Q(ackInvDirectorSet));
  LUT3 #(
    .INIT(8'h01)) 
    \col_lcl[10]__0_i_13 
       (.I0(\NColRaw_sig_reg[11]_0 [1]),
        .I1(\NColRaw_sig_reg[11]_0 [0]),
        .I2(\NColRaw_sig_reg[11]_0 [2]),
        .O(\NColRaw_sig_reg[2]_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \col_lcl[10]__0_i_15 
       (.I0(\NColRaw_sig_reg[11]_0 [4]),
        .I1(\NColRaw_sig_reg[11]_0 [2]),
        .I2(\NColRaw_sig_reg[11]_0 [0]),
        .I3(\NColRaw_sig_reg[11]_0 [1]),
        .I4(\NColRaw_sig_reg[11]_0 [3]),
        .I5(\NColRaw_sig_reg[11]_0 [5]),
        .O(\NColRaw_sig_reg[5]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1680" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \col_lcl[10]__0_i_18 
       (.I0(\NColRaw_sig_reg[11]_0 [2]),
        .I1(\NColRaw_sig_reg[11]_0 [0]),
        .I2(\NColRaw_sig_reg[11]_0 [1]),
        .I3(\NColRaw_sig_reg[11]_0 [3]),
        .O(\NColRaw_sig_reg[3]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1675" *) 
  LUT5 #(
    .INIT(32'hAAAAA9AA)) 
    \col_lcl[10]__0_i_7 
       (.I0(\NColRaw_sig_reg[11]_0 [8]),
        .I1(\NColRaw_sig_reg[11]_0 [7]),
        .I2(\NColRaw_sig_reg[11]_0 [5]),
        .I3(\stateImdstream[2]_i_8_n_0 ),
        .I4(\NColRaw_sig_reg[11]_0 [6]),
        .O(\NColRaw_sig_reg[9]_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF6FF6F69F)) 
    \i[7]_i_12 
       (.I0(\NColRaw_sig_reg[11]_0 [4]),
        .I1(\i[7]_i_3_0 [1]),
        .I2(\i[7]_i_3_0 [0]),
        .I3(\i[7]_i_16_n_0 ),
        .I4(\NColRaw_sig_reg[11]_0 [3]),
        .I5(\i[7]_i_6_0 ),
        .O(\i[7]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1672" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \i[7]_i_13 
       (.I0(\NColRaw_sig_reg[11]_0 [4]),
        .I1(\NColRaw_sig_reg[11]_0 [2]),
        .I2(\NColRaw_sig_reg[11]_0 [1]),
        .I3(\NColRaw_sig_reg[11]_0 [0]),
        .I4(\NColRaw_sig_reg[11]_0 [3]),
        .O(\i[7]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \i[7]_i_14 
       (.I0(\NColRaw_sig_reg[11]_0 [5]),
        .I1(\NColRaw_sig_reg[11]_0 [3]),
        .I2(\NColRaw_sig_reg[11]_0 [0]),
        .I3(\NColRaw_sig_reg[11]_0 [1]),
        .I4(\NColRaw_sig_reg[11]_0 [2]),
        .I5(\NColRaw_sig_reg[11]_0 [4]),
        .O(\i[7]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1678" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \i[7]_i_15 
       (.I0(\NColRaw_sig_reg[11]_0 [8]),
        .I1(\NColRaw_sig_reg[11]_0 [6]),
        .I2(\i[7]_i_14_n_0 ),
        .I3(\NColRaw_sig_reg[11]_0 [7]),
        .O(\i[7]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1680" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \i[7]_i_16 
       (.I0(\NColRaw_sig_reg[11]_0 [2]),
        .I1(\NColRaw_sig_reg[11]_0 [1]),
        .I2(\NColRaw_sig_reg[11]_0 [0]),
        .O(\i[7]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h0000000010010110)) 
    \i[7]_i_3 
       (.I0(\i[7]_i_6_n_0 ),
        .I1(\i[7]_i_7_n_0 ),
        .I2(\i[7]_i_3_0 [5]),
        .I3(\i[7]_i_8_n_0 ),
        .I4(\NColRaw_sig_reg[11]_0 [8]),
        .I5(\i[7]_i_9_n_0 ),
        .O(\col_reg[8] ));
  LUT6 #(
    .INIT(64'hBFEFEFFBFBFEFEBF)) 
    \i[7]_i_6 
       (.I0(\i[7]_i_12_n_0 ),
        .I1(\i[7]_i_3_0 [2]),
        .I2(\NColRaw_sig_reg[11]_0 [6]),
        .I3(\i[7]_i_13_n_0 ),
        .I4(\NColRaw_sig_reg[11]_0 [5]),
        .I5(\i[7]_i_3_0 [3]),
        .O(\i[7]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'h56A9)) 
    \i[7]_i_7 
       (.I0(\i[7]_i_3_0 [4]),
        .I1(\NColRaw_sig_reg[11]_0 [6]),
        .I2(\i[7]_i_14_n_0 ),
        .I3(\NColRaw_sig_reg[11]_0 [7]),
        .O(\i[7]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1678" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \i[7]_i_8 
       (.I0(\NColRaw_sig_reg[11]_0 [7]),
        .I1(\i[7]_i_14_n_0 ),
        .I2(\NColRaw_sig_reg[11]_0 [6]),
        .O(\i[7]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h9EF7F79E)) 
    \i[7]_i_9 
       (.I0(\i[7]_i_3_0 [6]),
        .I1(\i[7]_i_15_n_0 ),
        .I2(\NColRaw_sig_reg[11]_0 [9]),
        .I3(\NColRaw_sig_reg[11]_0 [10]),
        .I4(\i[7]_i_3_0 [7]),
        .O(\i[7]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h0480804040080804)) 
    rgbToManyAXIS_tlast_sig_i_4
       (.I0(\NColRaw_sig_reg[11]_0 [6]),
        .I1(rgbToManyAXIS_tlast_sig_i_6_n_0),
        .I2(rgbToManyAXIS_tlast_sig_i_2[4]),
        .I3(rgbToManyAXIS_tlast_sig_i_2_0),
        .I4(rgbToManyAXIS_tlast_sig_i_2[3]),
        .I5(\NColRaw_sig_reg[11]_0 [7]),
        .O(\NColRaw_sig_reg[7]_0 ));
  LUT6 #(
    .INIT(64'h1001000000001001)) 
    rgbToManyAXIS_tlast_sig_i_6
       (.I0(rgbToManyAXIS_tlast_sig_i_7_n_0),
        .I1(rgbToManyAXIS_tlast_sig_i_4_0),
        .I2(\NColRaw_sig_reg[11]_0 [4]),
        .I3(rgbToManyAXIS_tlast_sig_i_4_1),
        .I4(rgbToManyAXIS_tlast_sig_i_4_2),
        .I5(\NColRaw_sig_reg[11]_0 [5]),
        .O(rgbToManyAXIS_tlast_sig_i_6_n_0));
  LUT6 #(
    .INIT(64'hF7BFFDEFEFF7BFFD)) 
    rgbToManyAXIS_tlast_sig_i_7
       (.I0(\NColRaw_sig_reg[11]_0 [0]),
        .I1(\NColRaw_sig_reg[11]_0 [2]),
        .I2(rgbToManyAXIS_tlast_sig_i_2[0]),
        .I3(rgbToManyAXIS_tlast_sig_i_2[1]),
        .I4(rgbToManyAXIS_tlast_sig_i_2[2]),
        .I5(\NColRaw_sig_reg[11]_0 [1]),
        .O(rgbToManyAXIS_tlast_sig_i_7_n_0));
  FDCE rng_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(AR),
        .D(rng_sig_reg_2),
        .Q(rng));
  (* SOFT_HLUTNM = "soft_lutpair1674" *) 
  LUT4 #(
    .INIT(16'h5556)) 
    \row[11]_i_10 
       (.I0(Q[8]),
        .I1(Q[6]),
        .I2(\stateLive[1]_i_13_n_0 ),
        .I3(Q[7]),
        .O(\row[11]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1679" *) 
  LUT3 #(
    .INIT(8'h56)) 
    \row[11]_i_11 
       (.I0(Q[7]),
        .I1(\stateLive[1]_i_13_n_0 ),
        .I2(Q[6]),
        .O(\row[11]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h0000000900090000)) 
    \row[11]_i_4 
       (.I0(\NRowRaw_sig_reg[11]_0 ),
        .I1(\row_reg[0] [8]),
        .I2(\row[11]_i_8_n_0 ),
        .I3(\row[11]_i_9_n_0 ),
        .I4(\row_reg[0] [7]),
        .I5(\NRowRaw_sig_reg[10]_0 ),
        .O(\row_reg[11] ));
  LUT6 #(
    .INIT(64'h55555556AAAAAAA9)) 
    \row[11]_i_8 
       (.I0(\row_reg[0] [6]),
        .I1(Q[8]),
        .I2(Q[6]),
        .I3(\stateLive[1]_i_13_n_0 ),
        .I4(Q[7]),
        .I5(Q[9]),
        .O(\row[11]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFF9FFF9FFFF)) 
    \row[11]_i_9 
       (.I0(\row[11]_i_10_n_0 ),
        .I1(\row_reg[0] [5]),
        .I2(\stateSynth[2]_i_16_n_0 ),
        .I3(\stateSynth[2]_i_15_n_0 ),
        .I4(\row_reg[0] [4]),
        .I5(\row[11]_i_11_n_0 ),
        .O(\row[11]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1683" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \seq[1][5]_i_1 
       (.I0(rng),
        .I1(commok),
        .O(rng_sig_reg_0));
  LUT6 #(
    .INIT(64'hFFFFF69F6FF6FFFF)) 
    \stateImdstream[2]_i_10 
       (.I0(\NColRaw_sig_reg[11]_0 [2]),
        .I1(\aImdbufB_reg[0] [2]),
        .I2(\aImdbufB_reg[0] [1]),
        .I3(\NColRaw_sig_reg[11]_0 [1]),
        .I4(\NColRaw_sig_reg[11]_0 [0]),
        .I5(\aImdbufB_reg[0] [0]),
        .O(\stateImdstream[2]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hFFF6F6FFF9FFFFF6)) 
    \stateImdstream[2]_i_3 
       (.I0(\NColRaw_sig_reg[11]_0 [10]),
        .I1(\aImdbufB_reg[0] [10]),
        .I2(\stateImdstream[2]_i_4_n_0 ),
        .I3(\aImdbufB_reg[0] [9]),
        .I4(\NColRaw_sig_reg[8]_0 ),
        .I5(\NColRaw_sig_reg[11]_0 [9]),
        .O(\NColRaw_sig_reg[11]_1 ));
  LUT6 #(
    .INIT(64'hFFF6F6FFF9FFFFF6)) 
    \stateImdstream[2]_i_4 
       (.I0(\NColRaw_sig_reg[11]_0 [8]),
        .I1(\aImdbufB_reg[0] [8]),
        .I2(\stateImdstream[2]_i_6_n_0 ),
        .I3(\aImdbufB_reg[0] [7]),
        .I4(\stateImdstream[2]_i_7_n_0 ),
        .I5(\NColRaw_sig_reg[11]_0 [7]),
        .O(\stateImdstream[2]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1675" *) 
  LUT5 #(
    .INIT(32'h00000010)) 
    \stateImdstream[2]_i_5 
       (.I0(\NColRaw_sig_reg[11]_0 [7]),
        .I1(\NColRaw_sig_reg[11]_0 [5]),
        .I2(\stateImdstream[2]_i_8_n_0 ),
        .I3(\NColRaw_sig_reg[11]_0 [6]),
        .I4(\NColRaw_sig_reg[11]_0 [8]),
        .O(\NColRaw_sig_reg[8]_0 ));
  LUT6 #(
    .INIT(64'hEBFEFFBFFFBFEBFE)) 
    \stateImdstream[2]_i_6 
       (.I0(\stateImdstream[2]_i_9_n_0 ),
        .I1(\aImdbufB_reg[0] [5]),
        .I2(\stateImdstream[2]_i_8_n_0 ),
        .I3(\NColRaw_sig_reg[11]_0 [5]),
        .I4(\NColRaw_sig_reg[11]_0 [6]),
        .I5(\aImdbufB_reg[0] [6]),
        .O(\stateImdstream[2]_i_6_n_0 ));
  LUT3 #(
    .INIT(8'h04)) 
    \stateImdstream[2]_i_7 
       (.I0(\NColRaw_sig_reg[11]_0 [5]),
        .I1(\stateImdstream[2]_i_8_n_0 ),
        .I2(\NColRaw_sig_reg[11]_0 [6]),
        .O(\stateImdstream[2]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1672" *) 
  LUT5 #(
    .INIT(32'h00000001)) 
    \stateImdstream[2]_i_8 
       (.I0(\NColRaw_sig_reg[11]_0 [3]),
        .I1(\NColRaw_sig_reg[11]_0 [1]),
        .I2(\NColRaw_sig_reg[11]_0 [0]),
        .I3(\NColRaw_sig_reg[11]_0 [2]),
        .I4(\NColRaw_sig_reg[11]_0 [4]),
        .O(\stateImdstream[2]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFF66F9FF6)) 
    \stateImdstream[2]_i_9 
       (.I0(\NColRaw_sig_reg[11]_0 [4]),
        .I1(\aImdbufB_reg[0] [4]),
        .I2(\aImdbufB_reg[0] [3]),
        .I3(\NColRaw_sig_reg[2]_0 ),
        .I4(\NColRaw_sig_reg[11]_0 [3]),
        .I5(\stateImdstream[2]_i_10_n_0 ),
        .O(\stateImdstream[2]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hBFEFEFFBFBFEFEBF)) 
    \stateLive[1]_i_11 
       (.I0(\stateLive[1]_i_17_n_0 ),
        .I1(\i_reg[0]__1 [2]),
        .I2(Q[6]),
        .I3(\stateLive[1]_i_18_n_0 ),
        .I4(Q[5]),
        .I5(\i_reg[0]__1 [3]),
        .O(\stateLive[1]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1682" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \stateLive[1]_i_12 
       (.I0(Q[6]),
        .I1(\stateLive[1]_i_13_n_0 ),
        .O(\stateLive[1]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateLive[1]_i_13 
       (.I0(Q[5]),
        .I1(Q[3]),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[2]),
        .I5(Q[4]),
        .O(\stateLive[1]_i_13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1671" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateLive[1]_i_14 
       (.I0(Q[9]),
        .I1(Q[7]),
        .I2(\stateLive[1]_i_13_n_0 ),
        .I3(Q[6]),
        .I4(Q[8]),
        .O(\stateLive[1]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF6FF6F69F)) 
    \stateLive[1]_i_17 
       (.I0(Q[4]),
        .I1(\i_reg[0]__1 [1]),
        .I2(\i_reg[0]__1 [0]),
        .I3(\stateLive[1]_i_19_n_0 ),
        .I4(Q[3]),
        .I5(\stateLive[1]_i_11_0 ),
        .O(\stateLive[1]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1670" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateLive[1]_i_18 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(Q[3]),
        .O(\stateLive[1]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1673" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \stateLive[1]_i_19 
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[0]),
        .O(\stateLive[1]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hFEEFFFFFFFFFFEEF)) 
    \stateLive[1]_i_4 
       (.I0(\stateLive[1]_i_6_n_0 ),
        .I1(\stateLive[1]_i_7_n_0 ),
        .I2(\i_reg[0]__1 [7]),
        .I3(\NRowRaw_sig_reg[10]_0 ),
        .I4(\i_reg[0]__1 [8]),
        .I5(\NRowRaw_sig_reg[11]_0 ),
        .O(\rowRaw_lcl_reg[10] ));
  LUT6 #(
    .INIT(64'hDFEFEFFDFDFEFEDF)) 
    \stateLive[1]_i_6 
       (.I0(\i_reg[0]__1 [4]),
        .I1(\stateLive[1]_i_11_n_0 ),
        .I2(Q[8]),
        .I3(\stateLive[1]_i_12_n_0 ),
        .I4(Q[7]),
        .I5(\i_reg[0]__1 [5]),
        .O(\stateLive[1]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h55555556AAAAAAA9)) 
    \stateLive[1]_i_7 
       (.I0(\i_reg[0]__1 [6]),
        .I1(Q[8]),
        .I2(Q[6]),
        .I3(\stateLive[1]_i_13_n_0 ),
        .I4(Q[7]),
        .I5(Q[9]),
        .O(\stateLive[1]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h5555555555555556)) 
    \stateLive[1]_i_8 
       (.I0(Q[10]),
        .I1(Q[8]),
        .I2(Q[6]),
        .I3(\stateLive[1]_i_13_n_0 ),
        .I4(Q[7]),
        .I5(Q[9]),
        .O(\NRowRaw_sig_reg[10]_0 ));
  LUT3 #(
    .INIT(8'hA9)) 
    \stateLive[1]_i_9 
       (.I0(Q[11]),
        .I1(\stateLive[1]_i_14_n_0 ),
        .I2(Q[10]),
        .O(\NRowRaw_sig_reg[11]_0 ));
  LUT6 #(
    .INIT(64'h5555411455555555)) 
    \stateMaxsel[0]_i_2 
       (.I0(enCoobuf_reg),
        .I1(Q[7]),
        .I2(\stateMaxsel[0]_i_3_n_0 ),
        .I3(\stateMaxsel[0]_i_2_0 [3]),
        .I4(\stateMaxsel[0]_i_4_n_0 ),
        .I5(\stateMaxsel[0]_i_5_n_0 ),
        .O(\NRowRaw_sig_reg[7]_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \stateMaxsel[0]_i_3 
       (.I0(Q[5]),
        .I1(Q[3]),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(Q[4]),
        .I5(Q[6]),
        .O(\stateMaxsel[0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h6FF96F6FF66FF6F6)) 
    \stateMaxsel[0]_i_4 
       (.I0(Q[9]),
        .I1(\stateMaxsel[0]_i_2_0 [5]),
        .I2(Q[8]),
        .I3(Q[7]),
        .I4(\stateMaxsel[0]_i_3_n_0 ),
        .I5(\stateMaxsel[0]_i_2_0 [4]),
        .O(\stateMaxsel[0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h2802008000802802)) 
    \stateMaxsel[0]_i_5 
       (.I0(\stateMaxsel[0]_i_6_n_0 ),
        .I1(\stateMaxsel[0]_i_2_0 [6]),
        .I2(\stateMaxsel[0]_i_7_n_0 ),
        .I3(Q[10]),
        .I4(Q[11]),
        .I5(\stateMaxsel[0]_i_2_0 [7]),
        .O(\stateMaxsel[0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0009090006000009)) 
    \stateMaxsel[0]_i_6 
       (.I0(Q[6]),
        .I1(\stateMaxsel[0]_i_2_0 [2]),
        .I2(\stateMaxsel[0]_i_8_n_0 ),
        .I3(\stateMaxsel[0]_i_2_0 [1]),
        .I4(\stateMaxsel[0]_i_9_n_0 ),
        .I5(Q[5]),
        .O(\stateMaxsel[0]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1681" *) 
  LUT4 #(
    .INIT(16'h0004)) 
    \stateMaxsel[0]_i_7 
       (.I0(Q[8]),
        .I1(\stateMaxsel[0]_i_3_n_0 ),
        .I2(Q[7]),
        .I3(Q[9]),
        .O(\stateMaxsel[0]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hBBBBBBBEEEEEEEEB)) 
    \stateMaxsel[0]_i_8 
       (.I0(\stateMaxsel[0]_i_6_0 ),
        .I1(Q[4]),
        .I2(Q[3]),
        .I3(Q[1]),
        .I4(Q[2]),
        .I5(\stateMaxsel[0]_i_2_0 [0]),
        .O(\stateMaxsel[0]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1676" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \stateMaxsel[0]_i_9 
       (.I0(Q[3]),
        .I1(Q[1]),
        .I2(Q[2]),
        .I3(Q[4]),
        .O(\stateMaxsel[0]_i_9_n_0 ));
  FDCE stateOp_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(AR),
        .D(stateOp0_out),
        .Q(stateOp_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair1681" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \stateSwap[2]_i_10 
       (.I0(Q[7]),
        .I1(\stateSwap[2]_i_15_n_0 ),
        .I2(Q[8]),
        .O(\stateSwap[2]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1676" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateSwap[2]_i_11 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[3]),
        .I4(Q[5]),
        .O(\stateSwap[2]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h7B7B7BBDDEDEDEE7)) 
    \stateSwap[2]_i_12 
       (.I0(\stateSwap[2]_i_5_0 [7]),
        .I1(\stateSwap[2]_i_5_0 [8]),
        .I2(Q[8]),
        .I3(\stateSwap[2]_i_15_n_0 ),
        .I4(Q[7]),
        .I5(Q[9]),
        .O(\stateSwap[2]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1677" *) 
  LUT5 #(
    .INIT(32'h7BBDDEE7)) 
    \stateSwap[2]_i_13 
       (.I0(\stateSwap[2]_i_5_0 [1]),
        .I1(\stateSwap[2]_i_5_0 [2]),
        .I2(Q[2]),
        .I3(Q[1]),
        .I4(Q[3]),
        .O(\stateSwap[2]_i_13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1677" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \stateSwap[2]_i_14 
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[3]),
        .O(\stateSwap[2]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateSwap[2]_i_15 
       (.I0(Q[5]),
        .I1(Q[3]),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(Q[4]),
        .I5(Q[6]),
        .O(\stateSwap[2]_i_15_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFEB)) 
    \stateSwap[2]_i_5 
       (.I0(\stateSwap[2]_i_7_n_0 ),
        .I1(\stateSwap[2]_i_5_0 [0]),
        .I2(Q[1]),
        .I3(\stateSwap[2]_i_8_n_0 ),
        .I4(\stateSwap[2]_i_9_n_0 ),
        .O(\row_lcl_reg[0] ));
  LUT6 #(
    .INIT(64'h777BBBBDDDDEEEE7)) 
    \stateSwap[2]_i_7 
       (.I0(\stateSwap[2]_i_5_0 [9]),
        .I1(\stateSwap[2]_i_5_0 [10]),
        .I2(\stateSwap[2]_i_10_n_0 ),
        .I3(Q[9]),
        .I4(Q[10]),
        .I5(Q[11]),
        .O(\stateSwap[2]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF7EBDD7EB)) 
    \stateSwap[2]_i_8 
       (.I0(Q[7]),
        .I1(\stateSwap[2]_i_11_n_0 ),
        .I2(Q[6]),
        .I3(\stateSwap[2]_i_5_0 [6]),
        .I4(\stateSwap[2]_i_5_0 [5]),
        .I5(\stateSwap[2]_i_12_n_0 ),
        .O(\stateSwap[2]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hBFFEEFFBFBBFFEEF)) 
    \stateSwap[2]_i_9 
       (.I0(\stateSwap[2]_i_13_n_0 ),
        .I1(Q[5]),
        .I2(\stateSwap[2]_i_14_n_0 ),
        .I3(Q[4]),
        .I4(\stateSwap[2]_i_5_0 [4]),
        .I5(\stateSwap[2]_i_5_0 [3]),
        .O(\stateSwap[2]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFF9)) 
    \stateSynth[2]_i_12 
       (.I0(\stateSynth[2]_i_13_n_0 ),
        .I1(\row_reg[0] [6]),
        .I2(\stateSynth[2]_i_14_n_0 ),
        .I3(\stateSynth[2]_i_15_n_0 ),
        .I4(\stateSynth[2]_i_16_n_0 ),
        .I5(\stateSynth[2]_i_17_n_0 ),
        .O(\row_reg[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1671" *) 
  LUT5 #(
    .INIT(32'h55555556)) 
    \stateSynth[2]_i_13 
       (.I0(Q[9]),
        .I1(Q[7]),
        .I2(\stateLive[1]_i_13_n_0 ),
        .I3(Q[6]),
        .I4(Q[8]),
        .O(\stateSynth[2]_i_13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1679" *) 
  LUT4 #(
    .INIT(16'h56A9)) 
    \stateSynth[2]_i_14 
       (.I0(\row_reg[0] [4]),
        .I1(Q[6]),
        .I2(\stateLive[1]_i_13_n_0 ),
        .I3(Q[7]),
        .O(\stateSynth[2]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1682" *) 
  LUT3 #(
    .INIT(8'h69)) 
    \stateSynth[2]_i_15 
       (.I0(\row_reg[0] [3]),
        .I1(\stateLive[1]_i_13_n_0 ),
        .I2(Q[6]),
        .O(\stateSynth[2]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFF9FFF9FFFF)) 
    \stateSynth[2]_i_16 
       (.I0(\stateSynth[2]_i_18_n_0 ),
        .I1(\row_reg[0] [2]),
        .I2(\stateSynth[2]_i_12_0 ),
        .I3(\stateSynth[2]_i_20_n_0 ),
        .I4(\row_reg[0] [1]),
        .I5(\stateSynth[2]_i_21_n_0 ),
        .O(\stateSynth[2]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1674" *) 
  LUT5 #(
    .INIT(32'h5556AAA9)) 
    \stateSynth[2]_i_17 
       (.I0(\row_reg[0] [5]),
        .I1(Q[7]),
        .I2(\stateLive[1]_i_13_n_0 ),
        .I3(Q[6]),
        .I4(Q[8]),
        .O(\stateSynth[2]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h5555555555555556)) 
    \stateSynth[2]_i_18 
       (.I0(Q[5]),
        .I1(Q[3]),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[2]),
        .I5(Q[4]),
        .O(\stateSynth[2]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1673" *) 
  LUT5 #(
    .INIT(32'h5556AAA9)) 
    \stateSynth[2]_i_20 
       (.I0(\row_reg[0] [0]),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(Q[3]),
        .O(\stateSynth[2]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1670" *) 
  LUT5 #(
    .INIT(32'h55555556)) 
    \stateSynth[2]_i_21 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(Q[3]),
        .O(\stateSynth[2]_i_21_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1683" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \toVideoinAXIS_tdata_sig[23]_i_1 
       (.I0(rng),
        .I1(\toVideoinAXIS_tdata_sig_reg[23] ),
        .O(rng_sig_reg_1));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a32b64
   (doutb,
    aclk_sig,
    ena,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 );
  output [63:0]doutb;
  input aclk_sig;
  input ena;
  input [8:0]Q;
  input [22:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input [0:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;

  wire [22:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [0:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [8:0]Q;
  wire aclk_sig;
  wire [63:0]doutb;
  wire ena;
  wire [31:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a32b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a32b64 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina({\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [22],1'b0,1'b0,1'b0,1'b0,\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [21:11],1'b0,1'b0,1'b0,1'b0,1'b0,\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [10:0]}),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[31:0]),
        .doutb(doutb),
        .ena(ena),
        .enb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .wea(1'b1),
        .web(1'b0));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a64b64
   (D,
    \acc0_lcl_reg[7] ,
    aclk_sig,
    ena,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ,
    \acc2_reg[19] ,
    \acc0_lcl_reg[19]_i_2_0 ,
    \acc0_lcl_reg[19]_i_2_1 ,
    \acc2_lcl_reg[19]_i_2_0 ,
    \acc1_lcl_reg[19]_i_2_0 ,
    \acc0_lcl_reg[19]_i_2_2 ,
    \dwrAccbuf_reg[15] ,
    DI,
    \acc0_lcl_reg[7]_i_2 ,
    \acc2_lcl_reg[15]_i_2_0 ,
    \acc1_lcl_reg[7]_i_2_0 );
  output [51:0]D;
  output [7:0]\acc0_lcl_reg[7] ;
  input aclk_sig;
  input ena;
  input [7:0]Q;
  input [59:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  input \acc2_reg[19] ;
  input \acc0_lcl_reg[19]_i_2_0 ;
  input \acc0_lcl_reg[19]_i_2_1 ;
  input [19:0]\acc2_lcl_reg[19]_i_2_0 ;
  input [19:0]\acc1_lcl_reg[19]_i_2_0 ;
  input [19:0]\acc0_lcl_reg[19]_i_2_2 ;
  input [0:0]\dwrAccbuf_reg[15] ;
  input [3:0]DI;
  input [7:0]\acc0_lcl_reg[7]_i_2 ;
  input [23:0]\acc2_lcl_reg[15]_i_2_0 ;
  input \acc1_lcl_reg[7]_i_2_0 ;

  wire [51:0]D;
  wire [59:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [3:0]DI;
  wire [7:0]Q;
  wire [19:12]acc0_lcl;
  wire \acc0_lcl[15]_i_11_n_0 ;
  wire \acc0_lcl[15]_i_12_n_0 ;
  wire \acc0_lcl[15]_i_13_n_0 ;
  wire \acc0_lcl[15]_i_14_n_0 ;
  wire \acc0_lcl_reg[15]_i_2_n_0 ;
  wire \acc0_lcl_reg[15]_i_2_n_1 ;
  wire \acc0_lcl_reg[15]_i_2_n_2 ;
  wire \acc0_lcl_reg[15]_i_2_n_3 ;
  wire \acc0_lcl_reg[15]_i_2_n_4 ;
  wire \acc0_lcl_reg[15]_i_2_n_5 ;
  wire \acc0_lcl_reg[15]_i_2_n_6 ;
  wire \acc0_lcl_reg[15]_i_2_n_7 ;
  wire \acc0_lcl_reg[19]_i_2_0 ;
  wire \acc0_lcl_reg[19]_i_2_1 ;
  wire [19:0]\acc0_lcl_reg[19]_i_2_2 ;
  wire \acc0_lcl_reg[19]_i_2_n_5 ;
  wire \acc0_lcl_reg[19]_i_2_n_6 ;
  wire \acc0_lcl_reg[19]_i_2_n_7 ;
  wire [7:0]\acc0_lcl_reg[7] ;
  wire [7:0]\acc0_lcl_reg[7]_i_2 ;
  wire [19:0]acc1_lcl;
  wire \acc1_lcl[15]_i_11_n_0 ;
  wire \acc1_lcl[15]_i_12_n_0 ;
  wire \acc1_lcl[15]_i_13_n_0 ;
  wire \acc1_lcl[15]_i_14_n_0 ;
  wire \acc1_lcl[7]_i_11_n_0 ;
  wire \acc1_lcl[7]_i_12_n_0 ;
  wire \acc1_lcl[7]_i_13_n_0 ;
  wire \acc1_lcl[7]_i_14_n_0 ;
  wire \acc1_lcl[7]_i_15_n_0 ;
  wire \acc1_lcl[7]_i_16_n_0 ;
  wire \acc1_lcl[7]_i_17_n_0 ;
  wire \acc1_lcl[7]_i_18_n_0 ;
  wire \acc1_lcl_reg[15]_i_2_n_0 ;
  wire \acc1_lcl_reg[15]_i_2_n_1 ;
  wire \acc1_lcl_reg[15]_i_2_n_2 ;
  wire \acc1_lcl_reg[15]_i_2_n_3 ;
  wire \acc1_lcl_reg[15]_i_2_n_4 ;
  wire \acc1_lcl_reg[15]_i_2_n_5 ;
  wire \acc1_lcl_reg[15]_i_2_n_6 ;
  wire \acc1_lcl_reg[15]_i_2_n_7 ;
  wire [19:0]\acc1_lcl_reg[19]_i_2_0 ;
  wire \acc1_lcl_reg[19]_i_2_n_5 ;
  wire \acc1_lcl_reg[19]_i_2_n_6 ;
  wire \acc1_lcl_reg[19]_i_2_n_7 ;
  wire \acc1_lcl_reg[7]_i_2_0 ;
  wire \acc1_lcl_reg[7]_i_2_n_0 ;
  wire \acc1_lcl_reg[7]_i_2_n_1 ;
  wire \acc1_lcl_reg[7]_i_2_n_2 ;
  wire \acc1_lcl_reg[7]_i_2_n_3 ;
  wire \acc1_lcl_reg[7]_i_2_n_4 ;
  wire \acc1_lcl_reg[7]_i_2_n_5 ;
  wire \acc1_lcl_reg[7]_i_2_n_6 ;
  wire \acc1_lcl_reg[7]_i_2_n_7 ;
  wire [19:0]acc2_lcl;
  wire \acc2_lcl[15]_i_11_n_0 ;
  wire \acc2_lcl[15]_i_12_n_0 ;
  wire \acc2_lcl[15]_i_13_n_0 ;
  wire \acc2_lcl[15]_i_14_n_0 ;
  wire \acc2_lcl[7]_i_11_n_0 ;
  wire \acc2_lcl[7]_i_12_n_0 ;
  wire \acc2_lcl[7]_i_13_n_0 ;
  wire \acc2_lcl[7]_i_14_n_0 ;
  wire \acc2_lcl[7]_i_15_n_0 ;
  wire \acc2_lcl[7]_i_16_n_0 ;
  wire \acc2_lcl[7]_i_17_n_0 ;
  wire \acc2_lcl[7]_i_18_n_0 ;
  wire [23:0]\acc2_lcl_reg[15]_i_2_0 ;
  wire \acc2_lcl_reg[15]_i_2_n_0 ;
  wire \acc2_lcl_reg[15]_i_2_n_1 ;
  wire \acc2_lcl_reg[15]_i_2_n_2 ;
  wire \acc2_lcl_reg[15]_i_2_n_3 ;
  wire \acc2_lcl_reg[15]_i_2_n_4 ;
  wire \acc2_lcl_reg[15]_i_2_n_5 ;
  wire \acc2_lcl_reg[15]_i_2_n_6 ;
  wire \acc2_lcl_reg[15]_i_2_n_7 ;
  wire [19:0]\acc2_lcl_reg[19]_i_2_0 ;
  wire \acc2_lcl_reg[19]_i_2_n_5 ;
  wire \acc2_lcl_reg[19]_i_2_n_6 ;
  wire \acc2_lcl_reg[19]_i_2_n_7 ;
  wire \acc2_lcl_reg[7]_i_2_n_0 ;
  wire \acc2_lcl_reg[7]_i_2_n_1 ;
  wire \acc2_lcl_reg[7]_i_2_n_2 ;
  wire \acc2_lcl_reg[7]_i_2_n_3 ;
  wire \acc2_lcl_reg[7]_i_2_n_4 ;
  wire \acc2_lcl_reg[7]_i_2_n_5 ;
  wire \acc2_lcl_reg[7]_i_2_n_6 ;
  wire \acc2_lcl_reg[7]_i_2_n_7 ;
  wire \acc2_reg[19] ;
  wire aclk_sig;
  wire [59:0]drdAccbufB;
  wire [59:8]dwrAccbuf;
  wire [0:0]\dwrAccbuf_reg[15] ;
  wire enB;
  wire ena;
  wire [7:3]\NLW_acc0_lcl_reg[19]_i_2_CO_UNCONNECTED ;
  wire [7:4]\NLW_acc0_lcl_reg[19]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_acc1_lcl_reg[19]_i_2_CO_UNCONNECTED ;
  wire [7:4]\NLW_acc1_lcl_reg[19]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_acc2_lcl_reg[19]_i_2_CO_UNCONNECTED ;
  wire [7:4]\NLW_acc2_lcl_reg[19]_i_2_O_UNCONNECTED ;
  wire [63:0]NLW_myMnfcore_douta_UNCONNECTED;
  wire [63:60]NLW_myMnfcore_doutb_UNCONNECTED;

  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[10]_i_1 
       (.I0(dwrAccbuf[10]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[2]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[11]_i_1 
       (.I0(dwrAccbuf[11]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[3]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[12]_i_1 
       (.I0(dwrAccbuf[12]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[4]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[13]_i_1 
       (.I0(dwrAccbuf[13]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[5]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[14]_i_1 
       (.I0(dwrAccbuf[14]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[6]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[15]_i_1 
       (.I0(dwrAccbuf[15]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[7]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc0_lcl[15]_i_10 
       (.I0(drdAccbufB[12]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_2 [12]),
        .O(acc0_lcl[12]));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[15]_i_11 
       (.I0(DI[3]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [11]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[11]),
        .O(\acc0_lcl[15]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[15]_i_12 
       (.I0(DI[2]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [10]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[10]),
        .O(\acc0_lcl[15]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[15]_i_13 
       (.I0(DI[1]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [9]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[9]),
        .O(\acc0_lcl[15]_i_13_n_0 ));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[15]_i_14 
       (.I0(DI[0]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [8]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[8]),
        .O(\acc0_lcl[15]_i_14_n_0 ));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc0_lcl[15]_i_7 
       (.I0(drdAccbufB[15]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_2 [15]),
        .O(acc0_lcl[15]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc0_lcl[15]_i_8 
       (.I0(drdAccbufB[14]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_2 [14]),
        .O(acc0_lcl[14]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc0_lcl[15]_i_9 
       (.I0(drdAccbufB[13]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_2 [13]),
        .O(acc0_lcl[13]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[16]_i_1 
       (.I0(dwrAccbuf[16]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[8]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[17]_i_1 
       (.I0(dwrAccbuf[17]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[9]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[18]_i_1 
       (.I0(dwrAccbuf[18]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[10]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[19]_i_1 
       (.I0(dwrAccbuf[19]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[11]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc0_lcl[19]_i_3 
       (.I0(drdAccbufB[19]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_2 [19]),
        .O(acc0_lcl[19]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc0_lcl[19]_i_4 
       (.I0(drdAccbufB[18]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_2 [18]),
        .O(acc0_lcl[18]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc0_lcl[19]_i_5 
       (.I0(drdAccbufB[17]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_2 [17]),
        .O(acc0_lcl[17]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc0_lcl[19]_i_6 
       (.I0(drdAccbufB[16]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_2 [16]),
        .O(acc0_lcl[16]));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[7]_i_11 
       (.I0(\acc0_lcl_reg[7]_i_2 [7]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [7]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[7]),
        .O(\acc0_lcl_reg[7] [7]));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[7]_i_12 
       (.I0(\acc0_lcl_reg[7]_i_2 [6]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [6]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[6]),
        .O(\acc0_lcl_reg[7] [6]));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[7]_i_13 
       (.I0(\acc0_lcl_reg[7]_i_2 [5]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [5]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[5]),
        .O(\acc0_lcl_reg[7] [5]));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[7]_i_14 
       (.I0(\acc0_lcl_reg[7]_i_2 [4]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [4]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[4]),
        .O(\acc0_lcl_reg[7] [4]));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[7]_i_15 
       (.I0(\acc0_lcl_reg[7]_i_2 [3]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [3]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[3]),
        .O(\acc0_lcl_reg[7] [3]));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[7]_i_16 
       (.I0(\acc0_lcl_reg[7]_i_2 [2]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [2]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[2]),
        .O(\acc0_lcl_reg[7] [2]));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[7]_i_17 
       (.I0(\acc0_lcl_reg[7]_i_2 [1]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [1]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[1]),
        .O(\acc0_lcl_reg[7] [1]));
  LUT5 #(
    .INIT(32'h55A6A6A6)) 
    \acc0_lcl[7]_i_18 
       (.I0(\acc0_lcl_reg[7]_i_2 [0]),
        .I1(\acc0_lcl_reg[19]_i_2_2 [0]),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc0_lcl_reg[19]_i_2_0 ),
        .I4(drdAccbufB[0]),
        .O(\acc0_lcl_reg[7] [0]));
  (* SOFT_HLUTNM = "soft_lutpair1627" *) 
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[8]_i_1 
       (.I0(dwrAccbuf[8]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[0]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc0_lcl[9]_i_1 
       (.I0(dwrAccbuf[9]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[1]));
  (* ADDER_THRESHOLD = "35" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-8 {cell *THIS*}}" *) 
  CARRY8 \acc0_lcl_reg[15]_i_2 
       (.CI(\dwrAccbuf_reg[15] ),
        .CI_TOP(1'b0),
        .CO({\acc0_lcl_reg[15]_i_2_n_0 ,\acc0_lcl_reg[15]_i_2_n_1 ,\acc0_lcl_reg[15]_i_2_n_2 ,\acc0_lcl_reg[15]_i_2_n_3 ,\acc0_lcl_reg[15]_i_2_n_4 ,\acc0_lcl_reg[15]_i_2_n_5 ,\acc0_lcl_reg[15]_i_2_n_6 ,\acc0_lcl_reg[15]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,DI}),
        .O(dwrAccbuf[15:8]),
        .S({acc0_lcl[15:12],\acc0_lcl[15]_i_11_n_0 ,\acc0_lcl[15]_i_12_n_0 ,\acc0_lcl[15]_i_13_n_0 ,\acc0_lcl[15]_i_14_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-8 {cell *THIS*}}" *) 
  CARRY8 \acc0_lcl_reg[19]_i_2 
       (.CI(\acc0_lcl_reg[15]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_acc0_lcl_reg[19]_i_2_CO_UNCONNECTED [7:3],\acc0_lcl_reg[19]_i_2_n_5 ,\acc0_lcl_reg[19]_i_2_n_6 ,\acc0_lcl_reg[19]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_acc0_lcl_reg[19]_i_2_O_UNCONNECTED [7:4],dwrAccbuf[19:16]}),
        .S({1'b0,1'b0,1'b0,1'b0,acc0_lcl[19:16]}));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[0]_i_1 
       (.I0(dwrAccbuf[20]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[12]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[10]_i_1 
       (.I0(dwrAccbuf[30]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[22]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[11]_i_1 
       (.I0(dwrAccbuf[31]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[23]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[12]_i_1 
       (.I0(dwrAccbuf[32]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[24]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[13]_i_1 
       (.I0(dwrAccbuf[33]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[25]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[14]_i_1 
       (.I0(dwrAccbuf[34]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[26]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[15]_i_1 
       (.I0(dwrAccbuf[35]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[27]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[15]_i_10 
       (.I0(drdAccbufB[32]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [12]),
        .O(acc1_lcl[12]));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[15]_i_11 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [11]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[31]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [11]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[15]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[15]_i_12 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [10]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[30]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [10]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[15]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[15]_i_13 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [9]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[29]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [9]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[15]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[15]_i_14 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [8]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[28]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [8]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[15]_i_14_n_0 ));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[15]_i_3 
       (.I0(drdAccbufB[31]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [11]),
        .O(acc1_lcl[11]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[15]_i_4 
       (.I0(drdAccbufB[30]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [10]),
        .O(acc1_lcl[10]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[15]_i_5 
       (.I0(drdAccbufB[29]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [9]),
        .O(acc1_lcl[9]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[15]_i_6 
       (.I0(drdAccbufB[28]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [8]),
        .O(acc1_lcl[8]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[15]_i_7 
       (.I0(drdAccbufB[35]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [15]),
        .O(acc1_lcl[15]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[15]_i_8 
       (.I0(drdAccbufB[34]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [14]),
        .O(acc1_lcl[14]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[15]_i_9 
       (.I0(drdAccbufB[33]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [13]),
        .O(acc1_lcl[13]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[16]_i_1 
       (.I0(dwrAccbuf[36]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[28]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[17]_i_1 
       (.I0(dwrAccbuf[37]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[29]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[18]_i_1 
       (.I0(dwrAccbuf[38]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[30]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[19]_i_1 
       (.I0(dwrAccbuf[39]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[31]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[19]_i_3 
       (.I0(drdAccbufB[39]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [19]),
        .O(acc1_lcl[19]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[19]_i_4 
       (.I0(drdAccbufB[38]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [18]),
        .O(acc1_lcl[18]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[19]_i_5 
       (.I0(drdAccbufB[37]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [17]),
        .O(acc1_lcl[17]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[19]_i_6 
       (.I0(drdAccbufB[36]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [16]),
        .O(acc1_lcl[16]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[1]_i_1 
       (.I0(dwrAccbuf[21]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[13]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[2]_i_1 
       (.I0(dwrAccbuf[22]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[14]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[3]_i_1 
       (.I0(dwrAccbuf[23]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[15]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[4]_i_1 
       (.I0(dwrAccbuf[24]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[16]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[5]_i_1 
       (.I0(dwrAccbuf[25]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[17]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[6]_i_1 
       (.I0(dwrAccbuf[26]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[18]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[7]_i_1 
       (.I0(dwrAccbuf[27]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[19]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[7]_i_10 
       (.I0(drdAccbufB[20]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [0]),
        .O(acc1_lcl[0]));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[7]_i_11 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [7]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[27]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [7]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[7]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[7]_i_12 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [6]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[26]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [6]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[7]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[7]_i_13 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [5]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[25]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [5]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[7]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[7]_i_14 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [4]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[24]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [4]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[7]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[7]_i_15 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [3]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[23]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [3]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[7]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[7]_i_16 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [2]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[22]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [2]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[7]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[7]_i_17 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [1]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[21]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [1]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[7]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc1_lcl[7]_i_18 
       (.I0(\acc1_lcl_reg[19]_i_2_0 [0]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[20]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [0]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc1_lcl[7]_i_18_n_0 ));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[7]_i_3 
       (.I0(drdAccbufB[27]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [7]),
        .O(acc1_lcl[7]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[7]_i_4 
       (.I0(drdAccbufB[26]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [6]),
        .O(acc1_lcl[6]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[7]_i_5 
       (.I0(drdAccbufB[25]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [5]),
        .O(acc1_lcl[5]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[7]_i_6 
       (.I0(drdAccbufB[24]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [4]),
        .O(acc1_lcl[4]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[7]_i_7 
       (.I0(drdAccbufB[23]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [3]),
        .O(acc1_lcl[3]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[7]_i_8 
       (.I0(drdAccbufB[22]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [2]),
        .O(acc1_lcl[2]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc1_lcl[7]_i_9 
       (.I0(drdAccbufB[21]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc1_lcl_reg[19]_i_2_0 [1]),
        .O(acc1_lcl[1]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[8]_i_1 
       (.I0(dwrAccbuf[28]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[20]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc1_lcl[9]_i_1 
       (.I0(dwrAccbuf[29]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[21]));
  (* ADDER_THRESHOLD = "35" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-8 {cell *THIS*}}" *) 
  CARRY8 \acc1_lcl_reg[15]_i_2 
       (.CI(\acc1_lcl_reg[7]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\acc1_lcl_reg[15]_i_2_n_0 ,\acc1_lcl_reg[15]_i_2_n_1 ,\acc1_lcl_reg[15]_i_2_n_2 ,\acc1_lcl_reg[15]_i_2_n_3 ,\acc1_lcl_reg[15]_i_2_n_4 ,\acc1_lcl_reg[15]_i_2_n_5 ,\acc1_lcl_reg[15]_i_2_n_6 ,\acc1_lcl_reg[15]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,acc1_lcl[11:8]}),
        .O(dwrAccbuf[35:28]),
        .S({acc1_lcl[15:12],\acc1_lcl[15]_i_11_n_0 ,\acc1_lcl[15]_i_12_n_0 ,\acc1_lcl[15]_i_13_n_0 ,\acc1_lcl[15]_i_14_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-8 {cell *THIS*}}" *) 
  CARRY8 \acc1_lcl_reg[19]_i_2 
       (.CI(\acc1_lcl_reg[15]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_acc1_lcl_reg[19]_i_2_CO_UNCONNECTED [7:3],\acc1_lcl_reg[19]_i_2_n_5 ,\acc1_lcl_reg[19]_i_2_n_6 ,\acc1_lcl_reg[19]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_acc1_lcl_reg[19]_i_2_O_UNCONNECTED [7:4],dwrAccbuf[39:36]}),
        .S({1'b0,1'b0,1'b0,1'b0,acc1_lcl[19:16]}));
  (* ADDER_THRESHOLD = "35" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-8 {cell *THIS*}}" *) 
  CARRY8 \acc1_lcl_reg[7]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\acc1_lcl_reg[7]_i_2_n_0 ,\acc1_lcl_reg[7]_i_2_n_1 ,\acc1_lcl_reg[7]_i_2_n_2 ,\acc1_lcl_reg[7]_i_2_n_3 ,\acc1_lcl_reg[7]_i_2_n_4 ,\acc1_lcl_reg[7]_i_2_n_5 ,\acc1_lcl_reg[7]_i_2_n_6 ,\acc1_lcl_reg[7]_i_2_n_7 }),
        .DI(acc1_lcl[7:0]),
        .O(dwrAccbuf[27:20]),
        .S({\acc1_lcl[7]_i_11_n_0 ,\acc1_lcl[7]_i_12_n_0 ,\acc1_lcl[7]_i_13_n_0 ,\acc1_lcl[7]_i_14_n_0 ,\acc1_lcl[7]_i_15_n_0 ,\acc1_lcl[7]_i_16_n_0 ,\acc1_lcl[7]_i_17_n_0 ,\acc1_lcl[7]_i_18_n_0 }));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[0]_i_1 
       (.I0(dwrAccbuf[40]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[32]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[10]_i_1 
       (.I0(dwrAccbuf[50]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[42]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[11]_i_1 
       (.I0(dwrAccbuf[51]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[43]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[12]_i_1 
       (.I0(dwrAccbuf[52]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[44]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[13]_i_1 
       (.I0(dwrAccbuf[53]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[45]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[14]_i_1 
       (.I0(dwrAccbuf[54]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[46]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[15]_i_1 
       (.I0(dwrAccbuf[55]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[47]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[15]_i_10 
       (.I0(drdAccbufB[52]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [12]),
        .O(acc2_lcl[12]));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[15]_i_11 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [11]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[51]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [23]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[15]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[15]_i_12 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [10]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[50]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [22]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[15]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[15]_i_13 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [9]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[49]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [21]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[15]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[15]_i_14 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [8]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[48]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [20]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[15]_i_14_n_0 ));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[15]_i_3 
       (.I0(drdAccbufB[51]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [11]),
        .O(acc2_lcl[11]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[15]_i_4 
       (.I0(drdAccbufB[50]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [10]),
        .O(acc2_lcl[10]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[15]_i_5 
       (.I0(drdAccbufB[49]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [9]),
        .O(acc2_lcl[9]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[15]_i_6 
       (.I0(drdAccbufB[48]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [8]),
        .O(acc2_lcl[8]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[15]_i_7 
       (.I0(drdAccbufB[55]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [15]),
        .O(acc2_lcl[15]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[15]_i_8 
       (.I0(drdAccbufB[54]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [14]),
        .O(acc2_lcl[14]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[15]_i_9 
       (.I0(drdAccbufB[53]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [13]),
        .O(acc2_lcl[13]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[16]_i_1 
       (.I0(dwrAccbuf[56]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[48]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[17]_i_1 
       (.I0(dwrAccbuf[57]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[49]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[18]_i_1 
       (.I0(dwrAccbuf[58]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[50]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[19]_i_1 
       (.I0(dwrAccbuf[59]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[51]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[19]_i_3 
       (.I0(drdAccbufB[59]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [19]),
        .O(acc2_lcl[19]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[19]_i_4 
       (.I0(drdAccbufB[58]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [18]),
        .O(acc2_lcl[18]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[19]_i_5 
       (.I0(drdAccbufB[57]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [17]),
        .O(acc2_lcl[17]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[19]_i_6 
       (.I0(drdAccbufB[56]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [16]),
        .O(acc2_lcl[16]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[1]_i_1 
       (.I0(dwrAccbuf[41]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[33]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[2]_i_1 
       (.I0(dwrAccbuf[42]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[34]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[3]_i_1 
       (.I0(dwrAccbuf[43]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[35]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[4]_i_1 
       (.I0(dwrAccbuf[44]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[36]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[5]_i_1 
       (.I0(dwrAccbuf[45]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[37]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[6]_i_1 
       (.I0(dwrAccbuf[46]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[38]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[7]_i_1 
       (.I0(dwrAccbuf[47]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[39]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[7]_i_10 
       (.I0(drdAccbufB[40]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [0]),
        .O(acc2_lcl[0]));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[7]_i_11 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [7]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[47]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [19]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[7]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[7]_i_12 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [6]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[46]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [18]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[7]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[7]_i_13 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [5]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[45]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [17]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[7]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[7]_i_14 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [4]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[44]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [16]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[7]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[7]_i_15 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [3]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[43]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [15]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[7]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[7]_i_16 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [2]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[42]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [14]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[7]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[7]_i_17 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [1]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[41]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [13]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[7]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h0DDDF222F222F222)) 
    \acc2_lcl[7]_i_18 
       (.I0(\acc2_lcl_reg[19]_i_2_0 [0]),
        .I1(\acc0_lcl_reg[19]_i_2_1 ),
        .I2(\acc0_lcl_reg[19]_i_2_0 ),
        .I3(drdAccbufB[40]),
        .I4(\acc2_lcl_reg[15]_i_2_0 [12]),
        .I5(\acc1_lcl_reg[7]_i_2_0 ),
        .O(\acc2_lcl[7]_i_18_n_0 ));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[7]_i_3 
       (.I0(drdAccbufB[47]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [7]),
        .O(acc2_lcl[7]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[7]_i_4 
       (.I0(drdAccbufB[46]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [6]),
        .O(acc2_lcl[6]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[7]_i_5 
       (.I0(drdAccbufB[45]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [5]),
        .O(acc2_lcl[5]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[7]_i_6 
       (.I0(drdAccbufB[44]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [4]),
        .O(acc2_lcl[4]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[7]_i_7 
       (.I0(drdAccbufB[43]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [3]),
        .O(acc2_lcl[3]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[7]_i_8 
       (.I0(drdAccbufB[42]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [2]),
        .O(acc2_lcl[2]));
  LUT4 #(
    .INIT(16'h8F88)) 
    \acc2_lcl[7]_i_9 
       (.I0(drdAccbufB[41]),
        .I1(\acc0_lcl_reg[19]_i_2_0 ),
        .I2(\acc0_lcl_reg[19]_i_2_1 ),
        .I3(\acc2_lcl_reg[19]_i_2_0 [1]),
        .O(acc2_lcl[1]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[8]_i_1 
       (.I0(dwrAccbuf[48]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[40]));
  LUT5 #(
    .INIT(32'h88888880)) 
    \acc2_lcl[9]_i_1 
       (.I0(dwrAccbuf[49]),
        .I1(\acc2_reg[19] ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(D[41]));
  (* ADDER_THRESHOLD = "35" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-8 {cell *THIS*}}" *) 
  CARRY8 \acc2_lcl_reg[15]_i_2 
       (.CI(\acc2_lcl_reg[7]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\acc2_lcl_reg[15]_i_2_n_0 ,\acc2_lcl_reg[15]_i_2_n_1 ,\acc2_lcl_reg[15]_i_2_n_2 ,\acc2_lcl_reg[15]_i_2_n_3 ,\acc2_lcl_reg[15]_i_2_n_4 ,\acc2_lcl_reg[15]_i_2_n_5 ,\acc2_lcl_reg[15]_i_2_n_6 ,\acc2_lcl_reg[15]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,acc2_lcl[11:8]}),
        .O(dwrAccbuf[55:48]),
        .S({acc2_lcl[15:12],\acc2_lcl[15]_i_11_n_0 ,\acc2_lcl[15]_i_12_n_0 ,\acc2_lcl[15]_i_13_n_0 ,\acc2_lcl[15]_i_14_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-8 {cell *THIS*}}" *) 
  CARRY8 \acc2_lcl_reg[19]_i_2 
       (.CI(\acc2_lcl_reg[15]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_acc2_lcl_reg[19]_i_2_CO_UNCONNECTED [7:3],\acc2_lcl_reg[19]_i_2_n_5 ,\acc2_lcl_reg[19]_i_2_n_6 ,\acc2_lcl_reg[19]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_acc2_lcl_reg[19]_i_2_O_UNCONNECTED [7:4],dwrAccbuf[59:56]}),
        .S({1'b0,1'b0,1'b0,1'b0,acc2_lcl[19:16]}));
  (* ADDER_THRESHOLD = "35" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-8 {cell *THIS*}}" *) 
  CARRY8 \acc2_lcl_reg[7]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\acc2_lcl_reg[7]_i_2_n_0 ,\acc2_lcl_reg[7]_i_2_n_1 ,\acc2_lcl_reg[7]_i_2_n_2 ,\acc2_lcl_reg[7]_i_2_n_3 ,\acc2_lcl_reg[7]_i_2_n_4 ,\acc2_lcl_reg[7]_i_2_n_5 ,\acc2_lcl_reg[7]_i_2_n_6 ,\acc2_lcl_reg[7]_i_2_n_7 }),
        .DI(acc2_lcl[7:0]),
        .O(dwrAccbuf[47:40]),
        .S({\acc2_lcl[7]_i_11_n_0 ,\acc2_lcl[7]_i_12_n_0 ,\acc2_lcl[7]_i_13_n_0 ,\acc2_lcl[7]_i_14_n_0 ,\acc2_lcl[7]_i_15_n_0 ,\acc2_lcl[7]_i_16_n_0 ,\acc2_lcl[7]_i_17_n_0 ,\acc2_lcl[7]_i_18_n_0 }));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a64b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a64b64 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina({1'b0,1'b0,1'b0,1'b0,\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram }),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[63:0]),
        .doutb({NLW_myMnfcore_doutb_UNCONNECTED[63:60],drdAccbufB}),
        .ena(ena),
        .enb(enB),
        .wea(1'b1),
        .web(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair1627" *) 
  LUT3 #(
    .INIT(8'h02)) 
    myMnfcore_i_1__1
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .O(enB));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a8b8
   (doutb,
    D,
    \fghij_reg[2] ,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ,
    \dImd_reg[7] ,
    \dImd_reg[7]_0 ,
    \dImd_reg[7]_1 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ,
    \dImd_reg[7]_2 ,
    \dImd_reg[7]_3 ,
    \dImd_reg[7]_4 );
  output [7:0]doutb;
  output [7:0]D;
  output \fghij_reg[2] ;
  input aclk_sig;
  input [10:0]Q;
  input [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ;
  input [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ;
  input [2:0]\dImd_reg[7] ;
  input [7:0]\dImd_reg[7]_0 ;
  input \dImd_reg[7]_1 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ;
  input [7:0]\dImd_reg[7]_2 ;
  input [7:0]\dImd_reg[7]_3 ;
  input [7:0]\dImd_reg[7]_4 ;

  wire [7:0]D;
  wire [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ;
  wire [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ;
  wire [10:0]Q;
  wire aclk_sig;
  wire \dImd[0]_i_2_n_0 ;
  wire \dImd[1]_i_2_n_0 ;
  wire \dImd[2]_i_2_n_0 ;
  wire \dImd[3]_i_2_n_0 ;
  wire \dImd[4]_i_2_n_0 ;
  wire \dImd[5]_i_2_n_0 ;
  wire \dImd[6]_i_2_n_0 ;
  wire \dImd[7]_i_2_n_0 ;
  wire [2:0]\dImd_reg[7] ;
  wire [7:0]\dImd_reg[7]_0 ;
  wire \dImd_reg[7]_1 ;
  wire [7:0]\dImd_reg[7]_2 ;
  wire [7:0]\dImd_reg[7]_3 ;
  wire [7:0]\dImd_reg[7]_4 ;
  wire [7:0]doutb;
  wire \fghij_reg[2] ;
  wire myMnfcore_i_1_n_0;
  wire [7:0]NLW_myMnfcore_douta_UNCONNECTED;

  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[0]_i_1 
       (.I0(\dImd[0]_i_2_n_0 ),
        .I1(\dImd_reg[7] [2]),
        .I2(\dImd_reg[7]_0 [0]),
        .I3(\dImd_reg[7]_1 ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[0]_i_2 
       (.I0(doutb[0]),
        .I1(\dImd_reg[7]_2 [0]),
        .I2(\dImd_reg[7] [1]),
        .I3(\dImd_reg[7]_3 [0]),
        .I4(\dImd_reg[7] [0]),
        .I5(\dImd_reg[7]_4 [0]),
        .O(\dImd[0]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[1]_i_1 
       (.I0(\dImd[1]_i_2_n_0 ),
        .I1(\dImd_reg[7] [2]),
        .I2(\dImd_reg[7]_0 [1]),
        .I3(\dImd_reg[7]_1 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[1]_i_2 
       (.I0(doutb[1]),
        .I1(\dImd_reg[7]_2 [1]),
        .I2(\dImd_reg[7] [1]),
        .I3(\dImd_reg[7]_3 [1]),
        .I4(\dImd_reg[7] [0]),
        .I5(\dImd_reg[7]_4 [1]),
        .O(\dImd[1]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[2]_i_1 
       (.I0(\dImd[2]_i_2_n_0 ),
        .I1(\dImd_reg[7] [2]),
        .I2(\dImd_reg[7]_0 [2]),
        .I3(\dImd_reg[7]_1 ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[2]_i_2 
       (.I0(doutb[2]),
        .I1(\dImd_reg[7]_2 [2]),
        .I2(\dImd_reg[7] [1]),
        .I3(\dImd_reg[7]_3 [2]),
        .I4(\dImd_reg[7] [0]),
        .I5(\dImd_reg[7]_4 [2]),
        .O(\dImd[2]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[3]_i_1 
       (.I0(\dImd[3]_i_2_n_0 ),
        .I1(\dImd_reg[7] [2]),
        .I2(\dImd_reg[7]_0 [3]),
        .I3(\dImd_reg[7]_1 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[3]_i_2 
       (.I0(doutb[3]),
        .I1(\dImd_reg[7]_2 [3]),
        .I2(\dImd_reg[7] [1]),
        .I3(\dImd_reg[7]_3 [3]),
        .I4(\dImd_reg[7] [0]),
        .I5(\dImd_reg[7]_4 [3]),
        .O(\dImd[3]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[4]_i_1 
       (.I0(\dImd[4]_i_2_n_0 ),
        .I1(\dImd_reg[7] [2]),
        .I2(\dImd_reg[7]_0 [4]),
        .I3(\dImd_reg[7]_1 ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[4]_i_2 
       (.I0(doutb[4]),
        .I1(\dImd_reg[7]_2 [4]),
        .I2(\dImd_reg[7] [1]),
        .I3(\dImd_reg[7]_3 [4]),
        .I4(\dImd_reg[7] [0]),
        .I5(\dImd_reg[7]_4 [4]),
        .O(\dImd[4]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[5]_i_1 
       (.I0(\dImd[5]_i_2_n_0 ),
        .I1(\dImd_reg[7] [2]),
        .I2(\dImd_reg[7]_0 [5]),
        .I3(\dImd_reg[7]_1 ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[5]_i_2 
       (.I0(doutb[5]),
        .I1(\dImd_reg[7]_2 [5]),
        .I2(\dImd_reg[7] [1]),
        .I3(\dImd_reg[7]_3 [5]),
        .I4(\dImd_reg[7] [0]),
        .I5(\dImd_reg[7]_4 [5]),
        .O(\dImd[5]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[6]_i_1 
       (.I0(\dImd[6]_i_2_n_0 ),
        .I1(\dImd_reg[7] [2]),
        .I2(\dImd_reg[7]_0 [6]),
        .I3(\dImd_reg[7]_1 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[6]_i_2 
       (.I0(doutb[6]),
        .I1(\dImd_reg[7]_2 [6]),
        .I2(\dImd_reg[7] [1]),
        .I3(\dImd_reg[7]_3 [6]),
        .I4(\dImd_reg[7] [0]),
        .I5(\dImd_reg[7]_4 [6]),
        .O(\dImd[6]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[7]_i_1 
       (.I0(\dImd[7]_i_2_n_0 ),
        .I1(\dImd_reg[7] [2]),
        .I2(\dImd_reg[7]_0 [7]),
        .I3(\dImd_reg[7]_1 ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[7]_i_2 
       (.I0(doutb[7]),
        .I1(\dImd_reg[7]_2 [7]),
        .I2(\dImd_reg[7] [1]),
        .I3(\dImd_reg[7]_3 [7]),
        .I4(\dImd_reg[7] [0]),
        .I5(\dImd_reg[7]_4 [7]),
        .O(\dImd[7]_i_2_n_0 ));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a8b8,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a8b8__5 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .ena(myMnfcore_i_1_n_0),
        .enb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ),
        .wea(1'b1),
        .web(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    myMnfcore_i_1
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ),
        .I1(\fghij_reg[2] ),
        .O(myMnfcore_i_1_n_0));
  LUT5 #(
    .INIT(32'hFFFFFFEF)) 
    myMnfcore_i_2
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ),
        .I2(\dImd_reg[7] [2]),
        .I3(\dImd_reg[7] [1]),
        .I4(\dImd_reg[7] [0]),
        .O(\fghij_reg[2] ));
endmodule

(* ORIG_REF_NAME = "Dpbram_size2kB_a8b8" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a8b8__xdcDup__1
   (doutb,
    D,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ,
    \dImd_reg[39] ,
    \dImd_reg[39]_0 ,
    \dImd_reg[39]_1 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ,
    \dImd_reg[39]_2 ,
    \dImd_reg[39]_3 ,
    \dImd_reg[39]_4 );
  output [7:0]doutb;
  output [7:0]D;
  input aclk_sig;
  input [10:0]Q;
  input [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ;
  input [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ;
  input [2:0]\dImd_reg[39] ;
  input [7:0]\dImd_reg[39]_0 ;
  input \dImd_reg[39]_1 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ;
  input [7:0]\dImd_reg[39]_2 ;
  input [7:0]\dImd_reg[39]_3 ;
  input [7:0]\dImd_reg[39]_4 ;

  wire [7:0]D;
  wire [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ;
  wire [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ;
  wire [10:0]Q;
  wire aclk_sig;
  wire \dImd[32]_i_2_n_0 ;
  wire \dImd[33]_i_2_n_0 ;
  wire \dImd[34]_i_2_n_0 ;
  wire \dImd[35]_i_2_n_0 ;
  wire \dImd[36]_i_2_n_0 ;
  wire \dImd[37]_i_2_n_0 ;
  wire \dImd[38]_i_2_n_0 ;
  wire \dImd[39]_i_6_n_0 ;
  wire [2:0]\dImd_reg[39] ;
  wire [7:0]\dImd_reg[39]_0 ;
  wire \dImd_reg[39]_1 ;
  wire [7:0]\dImd_reg[39]_2 ;
  wire [7:0]\dImd_reg[39]_3 ;
  wire [7:0]\dImd_reg[39]_4 ;
  wire [7:0]doutb;
  wire myMnfcore_i_1__7_n_0;
  wire [7:0]NLW_myMnfcore_douta_UNCONNECTED;

  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[32]_i_1 
       (.I0(\dImd[32]_i_2_n_0 ),
        .I1(\dImd_reg[39] [2]),
        .I2(\dImd_reg[39]_0 [0]),
        .I3(\dImd_reg[39]_1 ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[32]_i_2 
       (.I0(doutb[0]),
        .I1(\dImd_reg[39]_2 [0]),
        .I2(\dImd_reg[39] [1]),
        .I3(\dImd_reg[39]_3 [0]),
        .I4(\dImd_reg[39] [0]),
        .I5(\dImd_reg[39]_4 [0]),
        .O(\dImd[32]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[33]_i_1 
       (.I0(\dImd[33]_i_2_n_0 ),
        .I1(\dImd_reg[39] [2]),
        .I2(\dImd_reg[39]_0 [1]),
        .I3(\dImd_reg[39]_1 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[33]_i_2 
       (.I0(doutb[1]),
        .I1(\dImd_reg[39]_2 [1]),
        .I2(\dImd_reg[39] [1]),
        .I3(\dImd_reg[39]_3 [1]),
        .I4(\dImd_reg[39] [0]),
        .I5(\dImd_reg[39]_4 [1]),
        .O(\dImd[33]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[34]_i_1 
       (.I0(\dImd[34]_i_2_n_0 ),
        .I1(\dImd_reg[39] [2]),
        .I2(\dImd_reg[39]_0 [2]),
        .I3(\dImd_reg[39]_1 ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[34]_i_2 
       (.I0(doutb[2]),
        .I1(\dImd_reg[39]_2 [2]),
        .I2(\dImd_reg[39] [1]),
        .I3(\dImd_reg[39]_3 [2]),
        .I4(\dImd_reg[39] [0]),
        .I5(\dImd_reg[39]_4 [2]),
        .O(\dImd[34]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[35]_i_1 
       (.I0(\dImd[35]_i_2_n_0 ),
        .I1(\dImd_reg[39] [2]),
        .I2(\dImd_reg[39]_0 [3]),
        .I3(\dImd_reg[39]_1 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[35]_i_2 
       (.I0(doutb[3]),
        .I1(\dImd_reg[39]_2 [3]),
        .I2(\dImd_reg[39] [1]),
        .I3(\dImd_reg[39]_3 [3]),
        .I4(\dImd_reg[39] [0]),
        .I5(\dImd_reg[39]_4 [3]),
        .O(\dImd[35]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[36]_i_1 
       (.I0(\dImd[36]_i_2_n_0 ),
        .I1(\dImd_reg[39] [2]),
        .I2(\dImd_reg[39]_0 [4]),
        .I3(\dImd_reg[39]_1 ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[36]_i_2 
       (.I0(doutb[4]),
        .I1(\dImd_reg[39]_2 [4]),
        .I2(\dImd_reg[39] [1]),
        .I3(\dImd_reg[39]_3 [4]),
        .I4(\dImd_reg[39] [0]),
        .I5(\dImd_reg[39]_4 [4]),
        .O(\dImd[36]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[37]_i_1 
       (.I0(\dImd[37]_i_2_n_0 ),
        .I1(\dImd_reg[39] [2]),
        .I2(\dImd_reg[39]_0 [5]),
        .I3(\dImd_reg[39]_1 ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[37]_i_2 
       (.I0(doutb[5]),
        .I1(\dImd_reg[39]_2 [5]),
        .I2(\dImd_reg[39] [1]),
        .I3(\dImd_reg[39]_3 [5]),
        .I4(\dImd_reg[39] [0]),
        .I5(\dImd_reg[39]_4 [5]),
        .O(\dImd[37]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[38]_i_1 
       (.I0(\dImd[38]_i_2_n_0 ),
        .I1(\dImd_reg[39] [2]),
        .I2(\dImd_reg[39]_0 [6]),
        .I3(\dImd_reg[39]_1 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[38]_i_2 
       (.I0(doutb[6]),
        .I1(\dImd_reg[39]_2 [6]),
        .I2(\dImd_reg[39] [1]),
        .I3(\dImd_reg[39]_3 [6]),
        .I4(\dImd_reg[39] [0]),
        .I5(\dImd_reg[39]_4 [6]),
        .O(\dImd[38]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[39]_i_2 
       (.I0(\dImd[39]_i_6_n_0 ),
        .I1(\dImd_reg[39] [2]),
        .I2(\dImd_reg[39]_0 [7]),
        .I3(\dImd_reg[39]_1 ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[39]_i_6 
       (.I0(doutb[7]),
        .I1(\dImd_reg[39]_2 [7]),
        .I2(\dImd_reg[39] [1]),
        .I3(\dImd_reg[39]_3 [7]),
        .I4(\dImd_reg[39] [0]),
        .I5(\dImd_reg[39]_4 [7]),
        .O(\dImd[39]_i_6_n_0 ));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a8b8,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a8b8 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .ena(myMnfcore_i_1__7_n_0),
        .enb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ),
        .wea(1'b1),
        .web(1'b0));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    myMnfcore_i_1__7
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ),
        .I1(\dImd_reg[39] [2]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ),
        .I4(\dImd_reg[39] [1]),
        .I5(\dImd_reg[39] [0]),
        .O(myMnfcore_i_1__7_n_0));
endmodule

(* ORIG_REF_NAME = "Dpbram_size2kB_a8b8" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a8b8__xdcDup__2
   (doutb,
    D,
    \fghij_reg[11] ,
    \fghij_reg[30] ,
    \fghij_reg[11]_0 ,
    \fghij_reg[13] ,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ,
    \dImd_reg[31] ,
    \dImd_reg[31]_0 ,
    \dImd_reg[31]_1 ,
    \dImd_reg[31]_2 ,
    \dImd_reg[31]_3 );
  output [7:0]doutb;
  output [7:0]D;
  output \fghij_reg[11] ;
  output \fghij_reg[30] ;
  output \fghij_reg[11]_0 ;
  output \fghij_reg[13] ;
  input aclk_sig;
  input [10:0]Q;
  input [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ;
  input [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ;
  input [30:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ;
  input [7:0]\dImd_reg[31] ;
  input \dImd_reg[31]_0 ;
  input [7:0]\dImd_reg[31]_1 ;
  input [7:0]\dImd_reg[31]_2 ;
  input [7:0]\dImd_reg[31]_3 ;

  wire [7:0]D;
  wire [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ;
  wire [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ;
  wire [30:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ;
  wire [10:0]Q;
  wire aclk_sig;
  wire \dImd[24]_i_2_n_0 ;
  wire \dImd[25]_i_2_n_0 ;
  wire \dImd[26]_i_2_n_0 ;
  wire \dImd[27]_i_2_n_0 ;
  wire \dImd[28]_i_2_n_0 ;
  wire \dImd[29]_i_2_n_0 ;
  wire \dImd[30]_i_2_n_0 ;
  wire \dImd[31]_i_2_n_0 ;
  wire \dImd[39]_i_7_n_0 ;
  wire [7:0]\dImd_reg[31] ;
  wire \dImd_reg[31]_0 ;
  wire [7:0]\dImd_reg[31]_1 ;
  wire [7:0]\dImd_reg[31]_2 ;
  wire [7:0]\dImd_reg[31]_3 ;
  wire [7:0]doutb;
  wire \fghij_reg[11] ;
  wire \fghij_reg[11]_0 ;
  wire \fghij_reg[13] ;
  wire \fghij_reg[30] ;
  wire myMnfcore_i_1__9_n_0;
  wire myMnfcore_i_5_n_0;
  wire myMnfcore_i_6_n_0;
  wire myMnfcore_i_7_n_0;
  wire [7:0]NLW_myMnfcore_douta_UNCONNECTED;

  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[24]_i_1 
       (.I0(\dImd[24]_i_2_n_0 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [2]),
        .I2(\dImd_reg[31] [0]),
        .I3(\dImd_reg[31]_0 ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[24]_i_2 
       (.I0(doutb[0]),
        .I1(\dImd_reg[31]_1 [0]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [1]),
        .I3(\dImd_reg[31]_2 [0]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [0]),
        .I5(\dImd_reg[31]_3 [0]),
        .O(\dImd[24]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[25]_i_1 
       (.I0(\dImd[25]_i_2_n_0 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [2]),
        .I2(\dImd_reg[31] [1]),
        .I3(\dImd_reg[31]_0 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[25]_i_2 
       (.I0(doutb[1]),
        .I1(\dImd_reg[31]_1 [1]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [1]),
        .I3(\dImd_reg[31]_2 [1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [0]),
        .I5(\dImd_reg[31]_3 [1]),
        .O(\dImd[25]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[26]_i_1 
       (.I0(\dImd[26]_i_2_n_0 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [2]),
        .I2(\dImd_reg[31] [2]),
        .I3(\dImd_reg[31]_0 ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[26]_i_2 
       (.I0(doutb[2]),
        .I1(\dImd_reg[31]_1 [2]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [1]),
        .I3(\dImd_reg[31]_2 [2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [0]),
        .I5(\dImd_reg[31]_3 [2]),
        .O(\dImd[26]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[27]_i_1 
       (.I0(\dImd[27]_i_2_n_0 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [2]),
        .I2(\dImd_reg[31] [3]),
        .I3(\dImd_reg[31]_0 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[27]_i_2 
       (.I0(doutb[3]),
        .I1(\dImd_reg[31]_1 [3]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [1]),
        .I3(\dImd_reg[31]_2 [3]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [0]),
        .I5(\dImd_reg[31]_3 [3]),
        .O(\dImd[27]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[28]_i_1 
       (.I0(\dImd[28]_i_2_n_0 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [2]),
        .I2(\dImd_reg[31] [4]),
        .I3(\dImd_reg[31]_0 ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[28]_i_2 
       (.I0(doutb[4]),
        .I1(\dImd_reg[31]_1 [4]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [1]),
        .I3(\dImd_reg[31]_2 [4]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [0]),
        .I5(\dImd_reg[31]_3 [4]),
        .O(\dImd[28]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[29]_i_1 
       (.I0(\dImd[29]_i_2_n_0 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [2]),
        .I2(\dImd_reg[31] [5]),
        .I3(\dImd_reg[31]_0 ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[29]_i_2 
       (.I0(doutb[5]),
        .I1(\dImd_reg[31]_1 [5]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [1]),
        .I3(\dImd_reg[31]_2 [5]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [0]),
        .I5(\dImd_reg[31]_3 [5]),
        .O(\dImd[29]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[30]_i_1 
       (.I0(\dImd[30]_i_2_n_0 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [2]),
        .I2(\dImd_reg[31] [6]),
        .I3(\dImd_reg[31]_0 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[30]_i_2 
       (.I0(doutb[6]),
        .I1(\dImd_reg[31]_1 [6]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [1]),
        .I3(\dImd_reg[31]_2 [6]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [0]),
        .I5(\dImd_reg[31]_3 [6]),
        .O(\dImd[30]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[31]_i_1 
       (.I0(\dImd[31]_i_2_n_0 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [2]),
        .I2(\dImd_reg[31] [7]),
        .I3(\dImd_reg[31]_0 ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[31]_i_2 
       (.I0(doutb[7]),
        .I1(\dImd_reg[31]_1 [7]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [1]),
        .I3(\dImd_reg[31]_2 [7]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [0]),
        .I5(\dImd_reg[31]_3 [7]),
        .O(\dImd[31]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \dImd[39]_i_4 
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [11]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [10]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [20]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [19]),
        .I4(\dImd[39]_i_7_n_0 ),
        .O(\fghij_reg[11]_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \dImd[39]_i_7 
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [4]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [5]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [23]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [7]),
        .O(\dImd[39]_i_7_n_0 ));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a8b8,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a8b8__8 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .ena(myMnfcore_i_1__9_n_0),
        .enb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ),
        .wea(1'b1),
        .web(1'b0));
  LUT6 #(
    .INIT(64'h0000000000100000)) 
    myMnfcore_i_1__9
       (.I0(\fghij_reg[11] ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [2]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ),
        .I3(\fghij_reg[30] ),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [0]),
        .I5(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [1]),
        .O(myMnfcore_i_1__9_n_0));
  LUT2 #(
    .INIT(4'hE)) 
    myMnfcore_i_2__0
       (.I0(\fghij_reg[11]_0 ),
        .I1(\fghij_reg[13] ),
        .O(\fghij_reg[11] ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    myMnfcore_i_3
       (.I0(myMnfcore_i_5_n_0),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [30]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [29]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [24]),
        .I4(myMnfcore_i_6_n_0),
        .O(\fghij_reg[30] ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    myMnfcore_i_4
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [13]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [12]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [6]),
        .I3(myMnfcore_i_7_n_0),
        .O(\fghij_reg[13] ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    myMnfcore_i_5
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [28]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [27]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [25]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [26]),
        .O(myMnfcore_i_5_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    myMnfcore_i_6
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [14]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [15]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [9]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [8]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [17]),
        .I5(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [18]),
        .O(myMnfcore_i_6_n_0));
  LUT4 #(
    .INIT(16'hFFFE)) 
    myMnfcore_i_7
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [22]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [21]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [16]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 [3]),
        .O(myMnfcore_i_7_n_0));
endmodule

(* ORIG_REF_NAME = "Dpbram_size2kB_a8b8" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a8b8__xdcDup__3
   (doutb,
    D,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ,
    \dImd_reg[23] ,
    \dImd_reg[23]_0 ,
    \dImd_reg[23]_1 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ,
    \dImd_reg[23]_2 ,
    \dImd_reg[23]_3 ,
    \dImd_reg[23]_4 );
  output [7:0]doutb;
  output [7:0]D;
  input aclk_sig;
  input [10:0]Q;
  input [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ;
  input [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ;
  input [2:0]\dImd_reg[23] ;
  input [7:0]\dImd_reg[23]_0 ;
  input \dImd_reg[23]_1 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ;
  input [7:0]\dImd_reg[23]_2 ;
  input [7:0]\dImd_reg[23]_3 ;
  input [7:0]\dImd_reg[23]_4 ;

  wire [7:0]D;
  wire [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ;
  wire [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ;
  wire [10:0]Q;
  wire aclk_sig;
  wire \dImd[16]_i_2_n_0 ;
  wire \dImd[17]_i_2_n_0 ;
  wire \dImd[18]_i_2_n_0 ;
  wire \dImd[19]_i_2_n_0 ;
  wire \dImd[20]_i_2_n_0 ;
  wire \dImd[21]_i_2_n_0 ;
  wire \dImd[22]_i_2_n_0 ;
  wire \dImd[23]_i_2_n_0 ;
  wire [2:0]\dImd_reg[23] ;
  wire [7:0]\dImd_reg[23]_0 ;
  wire \dImd_reg[23]_1 ;
  wire [7:0]\dImd_reg[23]_2 ;
  wire [7:0]\dImd_reg[23]_3 ;
  wire [7:0]\dImd_reg[23]_4 ;
  wire [7:0]doutb;
  wire myMnfcore_i_1__6_n_0;
  wire [7:0]NLW_myMnfcore_douta_UNCONNECTED;

  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[16]_i_1 
       (.I0(\dImd[16]_i_2_n_0 ),
        .I1(\dImd_reg[23] [2]),
        .I2(\dImd_reg[23]_0 [0]),
        .I3(\dImd_reg[23]_1 ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[16]_i_2 
       (.I0(doutb[0]),
        .I1(\dImd_reg[23]_2 [0]),
        .I2(\dImd_reg[23] [1]),
        .I3(\dImd_reg[23]_3 [0]),
        .I4(\dImd_reg[23] [0]),
        .I5(\dImd_reg[23]_4 [0]),
        .O(\dImd[16]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[17]_i_1 
       (.I0(\dImd[17]_i_2_n_0 ),
        .I1(\dImd_reg[23] [2]),
        .I2(\dImd_reg[23]_0 [1]),
        .I3(\dImd_reg[23]_1 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[17]_i_2 
       (.I0(doutb[1]),
        .I1(\dImd_reg[23]_2 [1]),
        .I2(\dImd_reg[23] [1]),
        .I3(\dImd_reg[23]_3 [1]),
        .I4(\dImd_reg[23] [0]),
        .I5(\dImd_reg[23]_4 [1]),
        .O(\dImd[17]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[18]_i_1 
       (.I0(\dImd[18]_i_2_n_0 ),
        .I1(\dImd_reg[23] [2]),
        .I2(\dImd_reg[23]_0 [2]),
        .I3(\dImd_reg[23]_1 ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[18]_i_2 
       (.I0(doutb[2]),
        .I1(\dImd_reg[23]_2 [2]),
        .I2(\dImd_reg[23] [1]),
        .I3(\dImd_reg[23]_3 [2]),
        .I4(\dImd_reg[23] [0]),
        .I5(\dImd_reg[23]_4 [2]),
        .O(\dImd[18]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[19]_i_1 
       (.I0(\dImd[19]_i_2_n_0 ),
        .I1(\dImd_reg[23] [2]),
        .I2(\dImd_reg[23]_0 [3]),
        .I3(\dImd_reg[23]_1 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[19]_i_2 
       (.I0(doutb[3]),
        .I1(\dImd_reg[23]_2 [3]),
        .I2(\dImd_reg[23] [1]),
        .I3(\dImd_reg[23]_3 [3]),
        .I4(\dImd_reg[23] [0]),
        .I5(\dImd_reg[23]_4 [3]),
        .O(\dImd[19]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[20]_i_1 
       (.I0(\dImd[20]_i_2_n_0 ),
        .I1(\dImd_reg[23] [2]),
        .I2(\dImd_reg[23]_0 [4]),
        .I3(\dImd_reg[23]_1 ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[20]_i_2 
       (.I0(doutb[4]),
        .I1(\dImd_reg[23]_2 [4]),
        .I2(\dImd_reg[23] [1]),
        .I3(\dImd_reg[23]_3 [4]),
        .I4(\dImd_reg[23] [0]),
        .I5(\dImd_reg[23]_4 [4]),
        .O(\dImd[20]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[21]_i_1 
       (.I0(\dImd[21]_i_2_n_0 ),
        .I1(\dImd_reg[23] [2]),
        .I2(\dImd_reg[23]_0 [5]),
        .I3(\dImd_reg[23]_1 ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[21]_i_2 
       (.I0(doutb[5]),
        .I1(\dImd_reg[23]_2 [5]),
        .I2(\dImd_reg[23] [1]),
        .I3(\dImd_reg[23]_3 [5]),
        .I4(\dImd_reg[23] [0]),
        .I5(\dImd_reg[23]_4 [5]),
        .O(\dImd[21]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[22]_i_1 
       (.I0(\dImd[22]_i_2_n_0 ),
        .I1(\dImd_reg[23] [2]),
        .I2(\dImd_reg[23]_0 [6]),
        .I3(\dImd_reg[23]_1 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[22]_i_2 
       (.I0(doutb[6]),
        .I1(\dImd_reg[23]_2 [6]),
        .I2(\dImd_reg[23] [1]),
        .I3(\dImd_reg[23]_3 [6]),
        .I4(\dImd_reg[23] [0]),
        .I5(\dImd_reg[23]_4 [6]),
        .O(\dImd[22]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[23]_i_1 
       (.I0(\dImd[23]_i_2_n_0 ),
        .I1(\dImd_reg[23] [2]),
        .I2(\dImd_reg[23]_0 [7]),
        .I3(\dImd_reg[23]_1 ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[23]_i_2 
       (.I0(doutb[7]),
        .I1(\dImd_reg[23]_2 [7]),
        .I2(\dImd_reg[23] [1]),
        .I3(\dImd_reg[23]_3 [7]),
        .I4(\dImd_reg[23] [0]),
        .I5(\dImd_reg[23]_4 [7]),
        .O(\dImd[23]_i_2_n_0 ));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a8b8,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a8b8__7 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .ena(myMnfcore_i_1__6_n_0),
        .enb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ),
        .wea(1'b1),
        .web(1'b0));
  LUT6 #(
    .INIT(64'h0000000000100000)) 
    myMnfcore_i_1__6
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ),
        .I1(\dImd_reg[23] [2]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ),
        .I4(\dImd_reg[23] [1]),
        .I5(\dImd_reg[23] [0]),
        .O(myMnfcore_i_1__6_n_0));
endmodule

(* ORIG_REF_NAME = "Dpbram_size2kB_a8b8" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size2kB_a8b8__xdcDup__4
   (doutb,
    D,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ,
    \dImd_reg[15] ,
    \dImd_reg[15]_0 ,
    \dImd_reg[15]_1 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ,
    \dImd_reg[15]_2 ,
    \dImd_reg[15]_3 ,
    \dImd_reg[15]_4 );
  output [7:0]doutb;
  output [7:0]D;
  input aclk_sig;
  input [10:0]Q;
  input [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ;
  input [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ;
  input [2:0]\dImd_reg[15] ;
  input [7:0]\dImd_reg[15]_0 ;
  input \dImd_reg[15]_1 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ;
  input [7:0]\dImd_reg[15]_2 ;
  input [7:0]\dImd_reg[15]_3 ;
  input [7:0]\dImd_reg[15]_4 ;

  wire [7:0]D;
  wire [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ;
  wire [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ;
  wire [10:0]Q;
  wire aclk_sig;
  wire \dImd[10]_i_2_n_0 ;
  wire \dImd[11]_i_2_n_0 ;
  wire \dImd[12]_i_2_n_0 ;
  wire \dImd[13]_i_2_n_0 ;
  wire \dImd[14]_i_2_n_0 ;
  wire \dImd[15]_i_2_n_0 ;
  wire \dImd[8]_i_2_n_0 ;
  wire \dImd[9]_i_2_n_0 ;
  wire [2:0]\dImd_reg[15] ;
  wire [7:0]\dImd_reg[15]_0 ;
  wire \dImd_reg[15]_1 ;
  wire [7:0]\dImd_reg[15]_2 ;
  wire [7:0]\dImd_reg[15]_3 ;
  wire [7:0]\dImd_reg[15]_4 ;
  wire [7:0]doutb;
  wire myMnfcore_i_1__8_n_0;
  wire [7:0]NLW_myMnfcore_douta_UNCONNECTED;

  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[10]_i_1 
       (.I0(\dImd[10]_i_2_n_0 ),
        .I1(\dImd_reg[15] [2]),
        .I2(\dImd_reg[15]_0 [2]),
        .I3(\dImd_reg[15]_1 ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[10]_i_2 
       (.I0(doutb[2]),
        .I1(\dImd_reg[15]_2 [2]),
        .I2(\dImd_reg[15] [1]),
        .I3(\dImd_reg[15]_3 [2]),
        .I4(\dImd_reg[15] [0]),
        .I5(\dImd_reg[15]_4 [2]),
        .O(\dImd[10]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[11]_i_1 
       (.I0(\dImd[11]_i_2_n_0 ),
        .I1(\dImd_reg[15] [2]),
        .I2(\dImd_reg[15]_0 [3]),
        .I3(\dImd_reg[15]_1 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[11]_i_2 
       (.I0(doutb[3]),
        .I1(\dImd_reg[15]_2 [3]),
        .I2(\dImd_reg[15] [1]),
        .I3(\dImd_reg[15]_3 [3]),
        .I4(\dImd_reg[15] [0]),
        .I5(\dImd_reg[15]_4 [3]),
        .O(\dImd[11]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[12]_i_1 
       (.I0(\dImd[12]_i_2_n_0 ),
        .I1(\dImd_reg[15] [2]),
        .I2(\dImd_reg[15]_0 [4]),
        .I3(\dImd_reg[15]_1 ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[12]_i_2 
       (.I0(doutb[4]),
        .I1(\dImd_reg[15]_2 [4]),
        .I2(\dImd_reg[15] [1]),
        .I3(\dImd_reg[15]_3 [4]),
        .I4(\dImd_reg[15] [0]),
        .I5(\dImd_reg[15]_4 [4]),
        .O(\dImd[12]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[13]_i_1 
       (.I0(\dImd[13]_i_2_n_0 ),
        .I1(\dImd_reg[15] [2]),
        .I2(\dImd_reg[15]_0 [5]),
        .I3(\dImd_reg[15]_1 ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[13]_i_2 
       (.I0(doutb[5]),
        .I1(\dImd_reg[15]_2 [5]),
        .I2(\dImd_reg[15] [1]),
        .I3(\dImd_reg[15]_3 [5]),
        .I4(\dImd_reg[15] [0]),
        .I5(\dImd_reg[15]_4 [5]),
        .O(\dImd[13]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[14]_i_1 
       (.I0(\dImd[14]_i_2_n_0 ),
        .I1(\dImd_reg[15] [2]),
        .I2(\dImd_reg[15]_0 [6]),
        .I3(\dImd_reg[15]_1 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[14]_i_2 
       (.I0(doutb[6]),
        .I1(\dImd_reg[15]_2 [6]),
        .I2(\dImd_reg[15] [1]),
        .I3(\dImd_reg[15]_3 [6]),
        .I4(\dImd_reg[15] [0]),
        .I5(\dImd_reg[15]_4 [6]),
        .O(\dImd[14]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[15]_i_1 
       (.I0(\dImd[15]_i_2_n_0 ),
        .I1(\dImd_reg[15] [2]),
        .I2(\dImd_reg[15]_0 [7]),
        .I3(\dImd_reg[15]_1 ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[15]_i_2 
       (.I0(doutb[7]),
        .I1(\dImd_reg[15]_2 [7]),
        .I2(\dImd_reg[15] [1]),
        .I3(\dImd_reg[15]_3 [7]),
        .I4(\dImd_reg[15] [0]),
        .I5(\dImd_reg[15]_4 [7]),
        .O(\dImd[15]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[8]_i_1 
       (.I0(\dImd[8]_i_2_n_0 ),
        .I1(\dImd_reg[15] [2]),
        .I2(\dImd_reg[15]_0 [0]),
        .I3(\dImd_reg[15]_1 ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[8]_i_2 
       (.I0(doutb[0]),
        .I1(\dImd_reg[15]_2 [0]),
        .I2(\dImd_reg[15] [1]),
        .I3(\dImd_reg[15]_3 [0]),
        .I4(\dImd_reg[15] [0]),
        .I5(\dImd_reg[15]_4 [0]),
        .O(\dImd[8]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hE200)) 
    \dImd[9]_i_1 
       (.I0(\dImd[9]_i_2_n_0 ),
        .I1(\dImd_reg[15] [2]),
        .I2(\dImd_reg[15]_0 [1]),
        .I3(\dImd_reg[15]_1 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dImd[9]_i_2 
       (.I0(doutb[1]),
        .I1(\dImd_reg[15]_2 [1]),
        .I2(\dImd_reg[15] [1]),
        .I3(\dImd_reg[15]_3 [1]),
        .I4(\dImd_reg[15] [0]),
        .I5(\dImd_reg[15]_4 [1]),
        .O(\dImd[9]_i_2_n_0 ));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a8b8,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a8b8__6 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .ena(myMnfcore_i_1__8_n_0),
        .enb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ),
        .wea(1'b1),
        .web(1'b0));
  LUT6 #(
    .INIT(64'h0010000000000000)) 
    myMnfcore_i_1__8
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_2 ),
        .I1(\dImd_reg[15] [2]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_0 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM18.ram_3 ),
        .I4(\dImd_reg[15] [0]),
        .I5(\dImd_reg[15] [1]),
        .O(myMnfcore_i_1__8_n_0));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size38kB_a8b64
   (doutb,
    aclk_sig,
    Q,
    \no_softecc_sel_reg.ce_pri.sel_pipe_reg[2] );
  output [63:0]doutb;
  input aclk_sig;
  input [0:0]Q;
  input [12:0]\no_softecc_sel_reg.ce_pri.sel_pipe_reg[2] ;

  wire [0:0]Q;
  wire aclk_sig;
  wire [63:0]doutb;
  wire [12:0]\no_softecc_sel_reg.ce_pri.sel_pipe_reg[2] ;
  wire [7:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size38kB_a8b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size38kB_a8b64 myMnfcore
       (.addra({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .addrb(\no_softecc_sel_reg.ce_pri.sel_pipe_reg[2] ),
        .clka(1'b0),
        .clkb(aclk_sig),
        .dina({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .ena(1'b0),
        .enb(Q),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* ORIG_REF_NAME = "Dpbram_size38kB_a8b64" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size38kB_a8b64__xdcDup__1
   (doutb,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    aclk_sig,
    \no_softecc_sel_reg.ce_pri.sel_pipe_reg[0] ,
    \no_softecc_sel_reg.ce_pri.sel_pipe_reg[2] ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 );
  output [63:0]doutb;
  input [15:0]Q;
  input [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input aclk_sig;
  input [0:0]\no_softecc_sel_reg.ce_pri.sel_pipe_reg[0] ;
  input [12:0]\no_softecc_sel_reg.ce_pri.sel_pipe_reg[2] ;
  input [1:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;

  wire [7:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [1:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [15:0]Q;
  wire aclk_sig;
  wire [63:0]doutb;
  wire enA;
  wire [0:0]\no_softecc_sel_reg.ce_pri.sel_pipe_reg[0] ;
  wire [12:0]\no_softecc_sel_reg.ce_pri.sel_pipe_reg[2] ;
  wire [7:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size38kB_a8b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size38kB_a8b64__2 myMnfcore
       (.addra(Q),
        .addrb(\no_softecc_sel_reg.ce_pri.sel_pipe_reg[2] ),
        .clka(1'b0),
        .clkb(aclk_sig),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .ena(enA),
        .enb(\no_softecc_sel_reg.ce_pri.sel_pipe_reg[0] ),
        .wea(1'b1),
        .web(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    myMnfcore_i_1__2
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 [1]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 [0]),
        .O(enA));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a32b64
   (doutb,
    aclk_sig,
    ena,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 );
  output [63:0]doutb;
  input aclk_sig;
  input ena;
  input [9:0]Q;
  input [31:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;

  wire [31:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [9:0]Q;
  wire aclk_sig;
  wire [63:0]doutb;
  wire enSeqbufB;
  wire ena;
  wire [31:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a32b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a32b64__5 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[31:0]),
        .doutb(doutb),
        .ena(ena),
        .enb(enSeqbufB),
        .wea(1'b1),
        .web(1'b0));
  LUT3 #(
    .INIT(8'h04)) 
    myMnfcore_i_1__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(enSeqbufB));
endmodule

(* ORIG_REF_NAME = "Dpbram_size4kB_a32b64" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a32b64__xdcDup__1
   (doutb,
    aclk_sig,
    ena,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 );
  output [63:0]doutb;
  input aclk_sig;
  input ena;
  input [9:0]Q;
  input [31:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;

  wire [31:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [9:0]Q;
  wire aclk_sig;
  wire [63:0]doutb;
  wire enSeqbufB;
  wire ena;
  wire [31:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a32b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a32b64__6 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[31:0]),
        .doutb(doutb),
        .ena(ena),
        .enb(enSeqbufB),
        .wea(1'b1),
        .web(1'b0));
  LUT3 #(
    .INIT(8'h04)) 
    myMnfcore_i_1__19
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(enSeqbufB));
endmodule

(* ORIG_REF_NAME = "Dpbram_size4kB_a32b64" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a32b64__xdcDup__2
   (doutb,
    aclk_sig,
    ena,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 );
  output [63:0]doutb;
  input aclk_sig;
  input ena;
  input [9:0]Q;
  input [23:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;

  wire [23:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [9:0]Q;
  wire aclk_sig;
  wire [63:0]doutb;
  wire enSeqbufB;
  wire ena;
  wire [31:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a32b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a32b64 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina({\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [23:22],1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [21:0]}),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[31:0]),
        .doutb(doutb),
        .ena(ena),
        .enb(enSeqbufB),
        .wea(1'b1),
        .web(1'b0));
  LUT3 #(
    .INIT(8'h04)) 
    myMnfcore_i_1__18
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(enSeqbufB));
endmodule

(* ORIG_REF_NAME = "Dpbram_size4kB_a32b64" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a32b64__xdcDup__3
   (doutb,
    memclk,
    ena,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    aclk_sig,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 );
  output [63:0]doutb;
  input memclk;
  input ena;
  input [9:0]Q;
  input [26:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input aclk_sig;
  input [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;

  wire [26:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [9:0]Q;
  wire aclk_sig;
  wire [63:0]doutb;
  wire enSeqbufB;
  wire ena;
  wire memclk;
  wire [31:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a32b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a32b64__4 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .clka(memclk),
        .clkb(aclk_sig),
        .dina({\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [26:25],1'b0,1'b0,1'b0,1'b0,1'b0,\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [24:0]}),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[31:0]),
        .doutb(doutb),
        .ena(ena),
        .enb(enSeqbufB),
        .wea(1'b1),
        .web(1'b0));
  LUT3 #(
    .INIT(8'h04)) 
    myMnfcore_i_1__3
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [2]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [1]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 [0]),
        .O(enSeqbufB));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a64b64
   (D,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    enb,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ,
    \gr4_reg[4] ,
    \gr4_reg[4]_0 ,
    \drdRow4bufBm1_reg[60] ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ,
    \gr4_reg[7] );
  output [7:0]D;
  output [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input aclk_sig;
  input [8:0]Q;
  input [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input enb;
  input [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  input [3:0]\gr4_reg[4] ;
  input \gr4_reg[4]_0 ;
  input [2:0]\drdRow4bufBm1_reg[60] ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  input [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  input [3:0]\gr4_reg[7] ;

  wire [7:0]D;
  wire [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  wire [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  wire [8:0]Q;
  wire aclk_sig;
  wire [63:0]drdRow4bufB;
  wire [2:0]\drdRow4bufBm1_reg[60] ;
  wire enb;
  wire \gr4[10]_i_3_n_0 ;
  wire \gr4[10]_i_4_n_0 ;
  wire \gr4[10]_i_5_n_0 ;
  wire \gr4[10]_i_6_n_0 ;
  wire \gr4[11]_i_4_n_0 ;
  wire \gr4[11]_i_5_n_0 ;
  wire \gr4[11]_i_6_n_0 ;
  wire \gr4[11]_i_7_n_0 ;
  wire \gr4[4]_i_3_n_0 ;
  wire \gr4[4]_i_4_n_0 ;
  wire \gr4[4]_i_5_n_0 ;
  wire \gr4[4]_i_6_n_0 ;
  wire \gr4[5]_i_3_n_0 ;
  wire \gr4[5]_i_4_n_0 ;
  wire \gr4[5]_i_5_n_0 ;
  wire \gr4[5]_i_6_n_0 ;
  wire \gr4[6]_i_3_n_0 ;
  wire \gr4[6]_i_4_n_0 ;
  wire \gr4[6]_i_5_n_0 ;
  wire \gr4[6]_i_6_n_0 ;
  wire \gr4[7]_i_3_n_0 ;
  wire \gr4[7]_i_4_n_0 ;
  wire \gr4[7]_i_5_n_0 ;
  wire \gr4[7]_i_6_n_0 ;
  wire \gr4[8]_i_3_n_0 ;
  wire \gr4[8]_i_4_n_0 ;
  wire \gr4[8]_i_5_n_0 ;
  wire \gr4[8]_i_6_n_0 ;
  wire \gr4[9]_i_3_n_0 ;
  wire \gr4[9]_i_4_n_0 ;
  wire \gr4[9]_i_5_n_0 ;
  wire \gr4[9]_i_6_n_0 ;
  wire \gr4_reg[10]_i_2_n_0 ;
  wire \gr4_reg[11]_i_3_n_0 ;
  wire [3:0]\gr4_reg[4] ;
  wire \gr4_reg[4]_0 ;
  wire \gr4_reg[4]_i_2_n_0 ;
  wire \gr4_reg[5]_i_2_n_0 ;
  wire \gr4_reg[6]_i_2_n_0 ;
  wire [3:0]\gr4_reg[7] ;
  wire \gr4_reg[7]_i_2_n_0 ;
  wire \gr4_reg[8]_i_2_n_0 ;
  wire \gr4_reg[9]_i_2_n_0 ;
  wire myMnfcore_i_1__13_n_0;
  wire [63:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* SOFT_HLUTNM = "soft_lutpair2955" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow4bufBm1[60]_i_1 
       (.I0(drdRow4bufB[60]),
        .I1(\drdRow4bufBm1_reg[60] [1]),
        .I2(\drdRow4bufBm1_reg[60] [2]),
        .I3(\drdRow4bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [0]));
  (* SOFT_HLUTNM = "soft_lutpair2955" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow4bufBm1[61]_i_1 
       (.I0(drdRow4bufB[61]),
        .I1(\drdRow4bufBm1_reg[60] [1]),
        .I2(\drdRow4bufBm1_reg[60] [2]),
        .I3(\drdRow4bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [1]));
  (* SOFT_HLUTNM = "soft_lutpair2956" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow4bufBm1[62]_i_1 
       (.I0(drdRow4bufB[62]),
        .I1(\drdRow4bufBm1_reg[60] [1]),
        .I2(\drdRow4bufBm1_reg[60] [2]),
        .I3(\drdRow4bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [2]));
  (* SOFT_HLUTNM = "soft_lutpair2956" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow4bufBm1[63]_i_2 
       (.I0(drdRow4bufB[63]),
        .I1(\drdRow4bufBm1_reg[60] [1]),
        .I2(\drdRow4bufBm1_reg[60] [2]),
        .I3(\drdRow4bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [3]));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr4[10]_i_1 
       (.I0(\gr4_reg[10]_i_2_n_0 ),
        .I1(\gr4_reg[4] [3]),
        .I2(\gr4[10]_i_3_n_0 ),
        .I3(\gr4_reg[4] [2]),
        .I4(\gr4[10]_i_4_n_0 ),
        .I5(\gr4_reg[4]_0 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[10]_i_3 
       (.I0(drdRow4bufB[14]),
        .I1(drdRow4bufB[2]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[54]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[42]),
        .O(\gr4[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[10]_i_4 
       (.I0(drdRow4bufB[62]),
        .I1(drdRow4bufB[50]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[38]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[26]),
        .O(\gr4[10]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[10]_i_5 
       (.I0(drdRow4bufB[46]),
        .I1(drdRow4bufB[34]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[22]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[10]),
        .O(\gr4[10]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[10]_i_6 
       (.I0(drdRow4bufB[30]),
        .I1(drdRow4bufB[18]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[6]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[58]),
        .O(\gr4[10]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr4[11]_i_2 
       (.I0(\gr4_reg[11]_i_3_n_0 ),
        .I1(\gr4_reg[4] [3]),
        .I2(\gr4[11]_i_4_n_0 ),
        .I3(\gr4_reg[4] [2]),
        .I4(\gr4[11]_i_5_n_0 ),
        .I5(\gr4_reg[4]_0 ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[11]_i_4 
       (.I0(drdRow4bufB[15]),
        .I1(drdRow4bufB[3]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[55]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[43]),
        .O(\gr4[11]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[11]_i_5 
       (.I0(drdRow4bufB[63]),
        .I1(drdRow4bufB[51]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[39]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[27]),
        .O(\gr4[11]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[11]_i_6 
       (.I0(drdRow4bufB[47]),
        .I1(drdRow4bufB[35]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[23]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[11]),
        .O(\gr4[11]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[11]_i_7 
       (.I0(drdRow4bufB[31]),
        .I1(drdRow4bufB[19]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[7]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[59]),
        .O(\gr4[11]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr4[4]_i_1 
       (.I0(\gr4_reg[4]_i_2_n_0 ),
        .I1(\gr4_reg[4] [3]),
        .I2(\gr4[4]_i_3_n_0 ),
        .I3(\gr4_reg[4] [2]),
        .I4(\gr4[4]_i_4_n_0 ),
        .I5(\gr4_reg[4]_0 ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[4]_i_3 
       (.I0(drdRow4bufB[8]),
        .I1(\gr4_reg[7] [0]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[48]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[36]),
        .O(\gr4[4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[4]_i_4 
       (.I0(drdRow4bufB[56]),
        .I1(drdRow4bufB[44]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[32]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[20]),
        .O(\gr4[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[4]_i_5 
       (.I0(drdRow4bufB[40]),
        .I1(drdRow4bufB[28]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[16]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[4]),
        .O(\gr4[4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[4]_i_6 
       (.I0(drdRow4bufB[24]),
        .I1(drdRow4bufB[12]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[0]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[52]),
        .O(\gr4[4]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr4[5]_i_1 
       (.I0(\gr4_reg[5]_i_2_n_0 ),
        .I1(\gr4_reg[4] [3]),
        .I2(\gr4[5]_i_3_n_0 ),
        .I3(\gr4_reg[4] [2]),
        .I4(\gr4[5]_i_4_n_0 ),
        .I5(\gr4_reg[4]_0 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[5]_i_3 
       (.I0(drdRow4bufB[9]),
        .I1(\gr4_reg[7] [1]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[49]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[37]),
        .O(\gr4[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[5]_i_4 
       (.I0(drdRow4bufB[57]),
        .I1(drdRow4bufB[45]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[33]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[21]),
        .O(\gr4[5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[5]_i_5 
       (.I0(drdRow4bufB[41]),
        .I1(drdRow4bufB[29]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[17]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[5]),
        .O(\gr4[5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[5]_i_6 
       (.I0(drdRow4bufB[25]),
        .I1(drdRow4bufB[13]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[1]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[53]),
        .O(\gr4[5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr4[6]_i_1 
       (.I0(\gr4_reg[6]_i_2_n_0 ),
        .I1(\gr4_reg[4] [3]),
        .I2(\gr4[6]_i_3_n_0 ),
        .I3(\gr4_reg[4] [2]),
        .I4(\gr4[6]_i_4_n_0 ),
        .I5(\gr4_reg[4]_0 ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[6]_i_3 
       (.I0(drdRow4bufB[10]),
        .I1(\gr4_reg[7] [2]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[50]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[38]),
        .O(\gr4[6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[6]_i_4 
       (.I0(drdRow4bufB[58]),
        .I1(drdRow4bufB[46]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[34]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[22]),
        .O(\gr4[6]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[6]_i_5 
       (.I0(drdRow4bufB[42]),
        .I1(drdRow4bufB[30]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[18]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[6]),
        .O(\gr4[6]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[6]_i_6 
       (.I0(drdRow4bufB[26]),
        .I1(drdRow4bufB[14]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[2]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[54]),
        .O(\gr4[6]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr4[7]_i_1 
       (.I0(\gr4_reg[7]_i_2_n_0 ),
        .I1(\gr4_reg[4] [3]),
        .I2(\gr4[7]_i_3_n_0 ),
        .I3(\gr4_reg[4] [2]),
        .I4(\gr4[7]_i_4_n_0 ),
        .I5(\gr4_reg[4]_0 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[7]_i_3 
       (.I0(drdRow4bufB[11]),
        .I1(\gr4_reg[7] [3]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[51]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[39]),
        .O(\gr4[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[7]_i_4 
       (.I0(drdRow4bufB[59]),
        .I1(drdRow4bufB[47]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[35]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[23]),
        .O(\gr4[7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[7]_i_5 
       (.I0(drdRow4bufB[43]),
        .I1(drdRow4bufB[31]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[19]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[7]),
        .O(\gr4[7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[7]_i_6 
       (.I0(drdRow4bufB[27]),
        .I1(drdRow4bufB[15]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[3]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[55]),
        .O(\gr4[7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr4[8]_i_1 
       (.I0(\gr4_reg[8]_i_2_n_0 ),
        .I1(\gr4_reg[4] [3]),
        .I2(\gr4[8]_i_3_n_0 ),
        .I3(\gr4_reg[4] [2]),
        .I4(\gr4[8]_i_4_n_0 ),
        .I5(\gr4_reg[4]_0 ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[8]_i_3 
       (.I0(drdRow4bufB[12]),
        .I1(drdRow4bufB[0]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[52]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[40]),
        .O(\gr4[8]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[8]_i_4 
       (.I0(drdRow4bufB[60]),
        .I1(drdRow4bufB[48]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[36]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[24]),
        .O(\gr4[8]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[8]_i_5 
       (.I0(drdRow4bufB[44]),
        .I1(drdRow4bufB[32]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[20]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[8]),
        .O(\gr4[8]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[8]_i_6 
       (.I0(drdRow4bufB[28]),
        .I1(drdRow4bufB[16]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[4]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[56]),
        .O(\gr4[8]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr4[9]_i_1 
       (.I0(\gr4_reg[9]_i_2_n_0 ),
        .I1(\gr4_reg[4] [3]),
        .I2(\gr4[9]_i_3_n_0 ),
        .I3(\gr4_reg[4] [2]),
        .I4(\gr4[9]_i_4_n_0 ),
        .I5(\gr4_reg[4]_0 ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[9]_i_3 
       (.I0(drdRow4bufB[13]),
        .I1(drdRow4bufB[1]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[53]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[41]),
        .O(\gr4[9]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[9]_i_4 
       (.I0(drdRow4bufB[61]),
        .I1(drdRow4bufB[49]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[37]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[25]),
        .O(\gr4[9]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[9]_i_5 
       (.I0(drdRow4bufB[45]),
        .I1(drdRow4bufB[33]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[21]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[9]),
        .O(\gr4[9]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr4[9]_i_6 
       (.I0(drdRow4bufB[29]),
        .I1(drdRow4bufB[17]),
        .I2(\gr4_reg[4] [1]),
        .I3(drdRow4bufB[5]),
        .I4(\gr4_reg[4] [0]),
        .I5(drdRow4bufB[57]),
        .O(\gr4[9]_i_6_n_0 ));
  MUXF7 \gr4_reg[10]_i_2 
       (.I0(\gr4[10]_i_5_n_0 ),
        .I1(\gr4[10]_i_6_n_0 ),
        .O(\gr4_reg[10]_i_2_n_0 ),
        .S(\gr4_reg[4] [2]));
  MUXF7 \gr4_reg[11]_i_3 
       (.I0(\gr4[11]_i_6_n_0 ),
        .I1(\gr4[11]_i_7_n_0 ),
        .O(\gr4_reg[11]_i_3_n_0 ),
        .S(\gr4_reg[4] [2]));
  MUXF7 \gr4_reg[4]_i_2 
       (.I0(\gr4[4]_i_5_n_0 ),
        .I1(\gr4[4]_i_6_n_0 ),
        .O(\gr4_reg[4]_i_2_n_0 ),
        .S(\gr4_reg[4] [2]));
  MUXF7 \gr4_reg[5]_i_2 
       (.I0(\gr4[5]_i_5_n_0 ),
        .I1(\gr4[5]_i_6_n_0 ),
        .O(\gr4_reg[5]_i_2_n_0 ),
        .S(\gr4_reg[4] [2]));
  MUXF7 \gr4_reg[6]_i_2 
       (.I0(\gr4[6]_i_5_n_0 ),
        .I1(\gr4[6]_i_6_n_0 ),
        .O(\gr4_reg[6]_i_2_n_0 ),
        .S(\gr4_reg[4] [2]));
  MUXF7 \gr4_reg[7]_i_2 
       (.I0(\gr4[7]_i_5_n_0 ),
        .I1(\gr4[7]_i_6_n_0 ),
        .O(\gr4_reg[7]_i_2_n_0 ),
        .S(\gr4_reg[4] [2]));
  MUXF7 \gr4_reg[8]_i_2 
       (.I0(\gr4[8]_i_5_n_0 ),
        .I1(\gr4[8]_i_6_n_0 ),
        .O(\gr4_reg[8]_i_2_n_0 ),
        .S(\gr4_reg[4] [2]));
  MUXF7 \gr4_reg[9]_i_2 
       (.I0(\gr4[9]_i_5_n_0 ),
        .I1(\gr4[9]_i_6_n_0 ),
        .O(\gr4_reg[9]_i_2_n_0 ),
        .S(\gr4_reg[4] [2]));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a64b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a64b64__5 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[63:0]),
        .doutb(drdRow4bufB),
        .ena(myMnfcore_i_1__13_n_0),
        .enb(enb),
        .wea(1'b1),
        .web(1'b0));
  LUT4 #(
    .INIT(16'h0008)) 
    myMnfcore_i_1__13
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 [2]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 [1]),
        .O(myMnfcore_i_1__13_n_0));
endmodule

(* ORIG_REF_NAME = "Dpbram_size4kB_a64b64" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a64b64__xdcDup__1
   (D,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    enb,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ,
    \gr0_reg[4] ,
    \gr0_reg[4]_0 ,
    \drdRow0bufBm1_reg[60] ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ,
    \gr0_reg[7] );
  output [7:0]D;
  output [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input aclk_sig;
  input [8:0]Q;
  input [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input enb;
  input [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  input [3:0]\gr0_reg[4] ;
  input \gr0_reg[4]_0 ;
  input [2:0]\drdRow0bufBm1_reg[60] ;
  input [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  input [3:0]\gr0_reg[7] ;

  wire [7:0]D;
  wire [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  wire [8:0]Q;
  wire aclk_sig;
  wire [63:0]drdRow0bufB;
  wire [2:0]\drdRow0bufBm1_reg[60] ;
  wire enb;
  wire \gr0[10]_i_3_n_0 ;
  wire \gr0[10]_i_4_n_0 ;
  wire \gr0[10]_i_5_n_0 ;
  wire \gr0[10]_i_6_n_0 ;
  wire \gr0[11]_i_3_n_0 ;
  wire \gr0[11]_i_4_n_0 ;
  wire \gr0[11]_i_5_n_0 ;
  wire \gr0[11]_i_6_n_0 ;
  wire \gr0[4]_i_3_n_0 ;
  wire \gr0[4]_i_4_n_0 ;
  wire \gr0[4]_i_5_n_0 ;
  wire \gr0[4]_i_6_n_0 ;
  wire \gr0[5]_i_3_n_0 ;
  wire \gr0[5]_i_4_n_0 ;
  wire \gr0[5]_i_5_n_0 ;
  wire \gr0[5]_i_6_n_0 ;
  wire \gr0[6]_i_3_n_0 ;
  wire \gr0[6]_i_4_n_0 ;
  wire \gr0[6]_i_5_n_0 ;
  wire \gr0[6]_i_6_n_0 ;
  wire \gr0[7]_i_3_n_0 ;
  wire \gr0[7]_i_4_n_0 ;
  wire \gr0[7]_i_5_n_0 ;
  wire \gr0[7]_i_6_n_0 ;
  wire \gr0[8]_i_3_n_0 ;
  wire \gr0[8]_i_4_n_0 ;
  wire \gr0[8]_i_5_n_0 ;
  wire \gr0[8]_i_6_n_0 ;
  wire \gr0[9]_i_3_n_0 ;
  wire \gr0[9]_i_4_n_0 ;
  wire \gr0[9]_i_5_n_0 ;
  wire \gr0[9]_i_6_n_0 ;
  wire \gr0_reg[10]_i_2_n_0 ;
  wire \gr0_reg[11]_i_2_n_0 ;
  wire [3:0]\gr0_reg[4] ;
  wire \gr0_reg[4]_0 ;
  wire \gr0_reg[4]_i_2_n_0 ;
  wire \gr0_reg[5]_i_2_n_0 ;
  wire \gr0_reg[6]_i_2_n_0 ;
  wire [3:0]\gr0_reg[7] ;
  wire \gr0_reg[7]_i_2_n_0 ;
  wire \gr0_reg[8]_i_2_n_0 ;
  wire \gr0_reg[9]_i_2_n_0 ;
  wire myMnfcore_i_1__14_n_0;
  wire [63:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* SOFT_HLUTNM = "soft_lutpair2947" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow0bufBm1[60]_i_1 
       (.I0(drdRow0bufB[60]),
        .I1(\drdRow0bufBm1_reg[60] [1]),
        .I2(\drdRow0bufBm1_reg[60] [2]),
        .I3(\drdRow0bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [0]));
  (* SOFT_HLUTNM = "soft_lutpair2947" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow0bufBm1[61]_i_1 
       (.I0(drdRow0bufB[61]),
        .I1(\drdRow0bufBm1_reg[60] [1]),
        .I2(\drdRow0bufBm1_reg[60] [2]),
        .I3(\drdRow0bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [1]));
  (* SOFT_HLUTNM = "soft_lutpair2948" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow0bufBm1[62]_i_1 
       (.I0(drdRow0bufB[62]),
        .I1(\drdRow0bufBm1_reg[60] [1]),
        .I2(\drdRow0bufBm1_reg[60] [2]),
        .I3(\drdRow0bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [2]));
  (* SOFT_HLUTNM = "soft_lutpair2948" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow0bufBm1[63]_i_1 
       (.I0(drdRow0bufB[63]),
        .I1(\drdRow0bufBm1_reg[60] [1]),
        .I2(\drdRow0bufBm1_reg[60] [2]),
        .I3(\drdRow0bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [3]));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr0[10]_i_1 
       (.I0(\gr0_reg[10]_i_2_n_0 ),
        .I1(\gr0_reg[4] [3]),
        .I2(\gr0[10]_i_3_n_0 ),
        .I3(\gr0_reg[4] [2]),
        .I4(\gr0[10]_i_4_n_0 ),
        .I5(\gr0_reg[4]_0 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[10]_i_3 
       (.I0(drdRow0bufB[14]),
        .I1(drdRow0bufB[2]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[54]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[42]),
        .O(\gr0[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[10]_i_4 
       (.I0(drdRow0bufB[62]),
        .I1(drdRow0bufB[50]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[38]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[26]),
        .O(\gr0[10]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[10]_i_5 
       (.I0(drdRow0bufB[46]),
        .I1(drdRow0bufB[34]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[22]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[10]),
        .O(\gr0[10]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[10]_i_6 
       (.I0(drdRow0bufB[30]),
        .I1(drdRow0bufB[18]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[6]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[58]),
        .O(\gr0[10]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr0[11]_i_1 
       (.I0(\gr0_reg[11]_i_2_n_0 ),
        .I1(\gr0_reg[4] [3]),
        .I2(\gr0[11]_i_3_n_0 ),
        .I3(\gr0_reg[4] [2]),
        .I4(\gr0[11]_i_4_n_0 ),
        .I5(\gr0_reg[4]_0 ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[11]_i_3 
       (.I0(drdRow0bufB[15]),
        .I1(drdRow0bufB[3]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[55]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[43]),
        .O(\gr0[11]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[11]_i_4 
       (.I0(drdRow0bufB[63]),
        .I1(drdRow0bufB[51]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[39]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[27]),
        .O(\gr0[11]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[11]_i_5 
       (.I0(drdRow0bufB[47]),
        .I1(drdRow0bufB[35]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[23]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[11]),
        .O(\gr0[11]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[11]_i_6 
       (.I0(drdRow0bufB[31]),
        .I1(drdRow0bufB[19]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[7]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[59]),
        .O(\gr0[11]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr0[4]_i_1 
       (.I0(\gr0_reg[4]_i_2_n_0 ),
        .I1(\gr0_reg[4] [3]),
        .I2(\gr0[4]_i_3_n_0 ),
        .I3(\gr0_reg[4] [2]),
        .I4(\gr0[4]_i_4_n_0 ),
        .I5(\gr0_reg[4]_0 ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[4]_i_3 
       (.I0(drdRow0bufB[8]),
        .I1(\gr0_reg[7] [0]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[48]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[36]),
        .O(\gr0[4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[4]_i_4 
       (.I0(drdRow0bufB[56]),
        .I1(drdRow0bufB[44]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[32]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[20]),
        .O(\gr0[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[4]_i_5 
       (.I0(drdRow0bufB[40]),
        .I1(drdRow0bufB[28]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[16]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[4]),
        .O(\gr0[4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[4]_i_6 
       (.I0(drdRow0bufB[24]),
        .I1(drdRow0bufB[12]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[0]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[52]),
        .O(\gr0[4]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr0[5]_i_1 
       (.I0(\gr0_reg[5]_i_2_n_0 ),
        .I1(\gr0_reg[4] [3]),
        .I2(\gr0[5]_i_3_n_0 ),
        .I3(\gr0_reg[4] [2]),
        .I4(\gr0[5]_i_4_n_0 ),
        .I5(\gr0_reg[4]_0 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[5]_i_3 
       (.I0(drdRow0bufB[9]),
        .I1(\gr0_reg[7] [1]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[49]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[37]),
        .O(\gr0[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[5]_i_4 
       (.I0(drdRow0bufB[57]),
        .I1(drdRow0bufB[45]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[33]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[21]),
        .O(\gr0[5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[5]_i_5 
       (.I0(drdRow0bufB[41]),
        .I1(drdRow0bufB[29]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[17]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[5]),
        .O(\gr0[5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[5]_i_6 
       (.I0(drdRow0bufB[25]),
        .I1(drdRow0bufB[13]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[1]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[53]),
        .O(\gr0[5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr0[6]_i_1 
       (.I0(\gr0_reg[6]_i_2_n_0 ),
        .I1(\gr0_reg[4] [3]),
        .I2(\gr0[6]_i_3_n_0 ),
        .I3(\gr0_reg[4] [2]),
        .I4(\gr0[6]_i_4_n_0 ),
        .I5(\gr0_reg[4]_0 ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[6]_i_3 
       (.I0(drdRow0bufB[10]),
        .I1(\gr0_reg[7] [2]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[50]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[38]),
        .O(\gr0[6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[6]_i_4 
       (.I0(drdRow0bufB[58]),
        .I1(drdRow0bufB[46]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[34]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[22]),
        .O(\gr0[6]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[6]_i_5 
       (.I0(drdRow0bufB[42]),
        .I1(drdRow0bufB[30]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[18]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[6]),
        .O(\gr0[6]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[6]_i_6 
       (.I0(drdRow0bufB[26]),
        .I1(drdRow0bufB[14]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[2]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[54]),
        .O(\gr0[6]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr0[7]_i_1 
       (.I0(\gr0_reg[7]_i_2_n_0 ),
        .I1(\gr0_reg[4] [3]),
        .I2(\gr0[7]_i_3_n_0 ),
        .I3(\gr0_reg[4] [2]),
        .I4(\gr0[7]_i_4_n_0 ),
        .I5(\gr0_reg[4]_0 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[7]_i_3 
       (.I0(drdRow0bufB[11]),
        .I1(\gr0_reg[7] [3]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[51]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[39]),
        .O(\gr0[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[7]_i_4 
       (.I0(drdRow0bufB[59]),
        .I1(drdRow0bufB[47]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[35]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[23]),
        .O(\gr0[7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[7]_i_5 
       (.I0(drdRow0bufB[43]),
        .I1(drdRow0bufB[31]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[19]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[7]),
        .O(\gr0[7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[7]_i_6 
       (.I0(drdRow0bufB[27]),
        .I1(drdRow0bufB[15]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[3]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[55]),
        .O(\gr0[7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr0[8]_i_1 
       (.I0(\gr0_reg[8]_i_2_n_0 ),
        .I1(\gr0_reg[4] [3]),
        .I2(\gr0[8]_i_3_n_0 ),
        .I3(\gr0_reg[4] [2]),
        .I4(\gr0[8]_i_4_n_0 ),
        .I5(\gr0_reg[4]_0 ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[8]_i_3 
       (.I0(drdRow0bufB[12]),
        .I1(drdRow0bufB[0]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[52]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[40]),
        .O(\gr0[8]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[8]_i_4 
       (.I0(drdRow0bufB[60]),
        .I1(drdRow0bufB[48]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[36]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[24]),
        .O(\gr0[8]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[8]_i_5 
       (.I0(drdRow0bufB[44]),
        .I1(drdRow0bufB[32]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[20]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[8]),
        .O(\gr0[8]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[8]_i_6 
       (.I0(drdRow0bufB[28]),
        .I1(drdRow0bufB[16]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[4]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[56]),
        .O(\gr0[8]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr0[9]_i_1 
       (.I0(\gr0_reg[9]_i_2_n_0 ),
        .I1(\gr0_reg[4] [3]),
        .I2(\gr0[9]_i_3_n_0 ),
        .I3(\gr0_reg[4] [2]),
        .I4(\gr0[9]_i_4_n_0 ),
        .I5(\gr0_reg[4]_0 ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[9]_i_3 
       (.I0(drdRow0bufB[13]),
        .I1(drdRow0bufB[1]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[53]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[41]),
        .O(\gr0[9]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[9]_i_4 
       (.I0(drdRow0bufB[61]),
        .I1(drdRow0bufB[49]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[37]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[25]),
        .O(\gr0[9]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[9]_i_5 
       (.I0(drdRow0bufB[45]),
        .I1(drdRow0bufB[33]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[21]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[9]),
        .O(\gr0[9]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr0[9]_i_6 
       (.I0(drdRow0bufB[29]),
        .I1(drdRow0bufB[17]),
        .I2(\gr0_reg[4] [1]),
        .I3(drdRow0bufB[5]),
        .I4(\gr0_reg[4] [0]),
        .I5(drdRow0bufB[57]),
        .O(\gr0[9]_i_6_n_0 ));
  MUXF7 \gr0_reg[10]_i_2 
       (.I0(\gr0[10]_i_5_n_0 ),
        .I1(\gr0[10]_i_6_n_0 ),
        .O(\gr0_reg[10]_i_2_n_0 ),
        .S(\gr0_reg[4] [2]));
  MUXF7 \gr0_reg[11]_i_2 
       (.I0(\gr0[11]_i_5_n_0 ),
        .I1(\gr0[11]_i_6_n_0 ),
        .O(\gr0_reg[11]_i_2_n_0 ),
        .S(\gr0_reg[4] [2]));
  MUXF7 \gr0_reg[4]_i_2 
       (.I0(\gr0[4]_i_5_n_0 ),
        .I1(\gr0[4]_i_6_n_0 ),
        .O(\gr0_reg[4]_i_2_n_0 ),
        .S(\gr0_reg[4] [2]));
  MUXF7 \gr0_reg[5]_i_2 
       (.I0(\gr0[5]_i_5_n_0 ),
        .I1(\gr0[5]_i_6_n_0 ),
        .O(\gr0_reg[5]_i_2_n_0 ),
        .S(\gr0_reg[4] [2]));
  MUXF7 \gr0_reg[6]_i_2 
       (.I0(\gr0[6]_i_5_n_0 ),
        .I1(\gr0[6]_i_6_n_0 ),
        .O(\gr0_reg[6]_i_2_n_0 ),
        .S(\gr0_reg[4] [2]));
  MUXF7 \gr0_reg[7]_i_2 
       (.I0(\gr0[7]_i_5_n_0 ),
        .I1(\gr0[7]_i_6_n_0 ),
        .O(\gr0_reg[7]_i_2_n_0 ),
        .S(\gr0_reg[4] [2]));
  MUXF7 \gr0_reg[8]_i_2 
       (.I0(\gr0[8]_i_5_n_0 ),
        .I1(\gr0[8]_i_6_n_0 ),
        .O(\gr0_reg[8]_i_2_n_0 ),
        .S(\gr0_reg[4] [2]));
  MUXF7 \gr0_reg[9]_i_2 
       (.I0(\gr0[9]_i_5_n_0 ),
        .I1(\gr0[9]_i_6_n_0 ),
        .O(\gr0_reg[9]_i_2_n_0 ),
        .S(\gr0_reg[4] [2]));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a64b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a64b64 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[63:0]),
        .doutb(drdRow0bufB),
        .ena(myMnfcore_i_1__14_n_0),
        .enb(enb),
        .wea(1'b1),
        .web(1'b0));
  LUT4 #(
    .INIT(16'h0010)) 
    myMnfcore_i_1__14
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [1]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [0]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [2]),
        .O(myMnfcore_i_1__14_n_0));
endmodule

(* ORIG_REF_NAME = "Dpbram_size4kB_a64b64" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a64b64__xdcDup__2
   (D,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    enb,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ,
    \gr1_reg[4] ,
    \gr1_reg[4]_0 ,
    \drdRow1bufBm1_reg[60] ,
    \gr1_reg[7] ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 );
  output [7:0]D;
  output [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input aclk_sig;
  input [8:0]Q;
  input [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input enb;
  input [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  input [3:0]\gr1_reg[4] ;
  input \gr1_reg[4]_0 ;
  input [2:0]\drdRow1bufBm1_reg[60] ;
  input [3:0]\gr1_reg[7] ;
  input [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;

  wire [7:0]D;
  wire [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  wire [8:0]Q;
  wire aclk_sig;
  wire [63:0]drdRow1bufB;
  wire [2:0]\drdRow1bufBm1_reg[60] ;
  wire enA;
  wire enb;
  wire \gr1[10]_i_3_n_0 ;
  wire \gr1[10]_i_4_n_0 ;
  wire \gr1[10]_i_5_n_0 ;
  wire \gr1[10]_i_6_n_0 ;
  wire \gr1[11]_i_3_n_0 ;
  wire \gr1[11]_i_4_n_0 ;
  wire \gr1[11]_i_5_n_0 ;
  wire \gr1[11]_i_6_n_0 ;
  wire \gr1[4]_i_3_n_0 ;
  wire \gr1[4]_i_4_n_0 ;
  wire \gr1[4]_i_5_n_0 ;
  wire \gr1[4]_i_6_n_0 ;
  wire \gr1[5]_i_3_n_0 ;
  wire \gr1[5]_i_4_n_0 ;
  wire \gr1[5]_i_5_n_0 ;
  wire \gr1[5]_i_6_n_0 ;
  wire \gr1[6]_i_3_n_0 ;
  wire \gr1[6]_i_4_n_0 ;
  wire \gr1[6]_i_5_n_0 ;
  wire \gr1[6]_i_6_n_0 ;
  wire \gr1[7]_i_3_n_0 ;
  wire \gr1[7]_i_4_n_0 ;
  wire \gr1[7]_i_5_n_0 ;
  wire \gr1[7]_i_6_n_0 ;
  wire \gr1[8]_i_3_n_0 ;
  wire \gr1[8]_i_4_n_0 ;
  wire \gr1[8]_i_5_n_0 ;
  wire \gr1[8]_i_6_n_0 ;
  wire \gr1[9]_i_3_n_0 ;
  wire \gr1[9]_i_4_n_0 ;
  wire \gr1[9]_i_5_n_0 ;
  wire \gr1[9]_i_6_n_0 ;
  wire \gr1_reg[10]_i_2_n_0 ;
  wire \gr1_reg[11]_i_2_n_0 ;
  wire [3:0]\gr1_reg[4] ;
  wire \gr1_reg[4]_0 ;
  wire \gr1_reg[4]_i_2_n_0 ;
  wire \gr1_reg[5]_i_2_n_0 ;
  wire \gr1_reg[6]_i_2_n_0 ;
  wire [3:0]\gr1_reg[7] ;
  wire \gr1_reg[7]_i_2_n_0 ;
  wire \gr1_reg[8]_i_2_n_0 ;
  wire \gr1_reg[9]_i_2_n_0 ;
  wire [63:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* SOFT_HLUTNM = "soft_lutpair2949" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow1bufBm1[60]_i_1 
       (.I0(drdRow1bufB[60]),
        .I1(\drdRow1bufBm1_reg[60] [1]),
        .I2(\drdRow1bufBm1_reg[60] [2]),
        .I3(\drdRow1bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [0]));
  (* SOFT_HLUTNM = "soft_lutpair2949" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow1bufBm1[61]_i_1 
       (.I0(drdRow1bufB[61]),
        .I1(\drdRow1bufBm1_reg[60] [1]),
        .I2(\drdRow1bufBm1_reg[60] [2]),
        .I3(\drdRow1bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [1]));
  (* SOFT_HLUTNM = "soft_lutpair2950" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow1bufBm1[62]_i_1 
       (.I0(drdRow1bufB[62]),
        .I1(\drdRow1bufBm1_reg[60] [1]),
        .I2(\drdRow1bufBm1_reg[60] [2]),
        .I3(\drdRow1bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [2]));
  (* SOFT_HLUTNM = "soft_lutpair2950" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow1bufBm1[63]_i_1 
       (.I0(drdRow1bufB[63]),
        .I1(\drdRow1bufBm1_reg[60] [1]),
        .I2(\drdRow1bufBm1_reg[60] [2]),
        .I3(\drdRow1bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [3]));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr1[10]_i_1 
       (.I0(\gr1_reg[10]_i_2_n_0 ),
        .I1(\gr1_reg[4] [3]),
        .I2(\gr1[10]_i_3_n_0 ),
        .I3(\gr1_reg[4] [2]),
        .I4(\gr1[10]_i_4_n_0 ),
        .I5(\gr1_reg[4]_0 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[10]_i_3 
       (.I0(drdRow1bufB[14]),
        .I1(drdRow1bufB[2]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[54]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[42]),
        .O(\gr1[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[10]_i_4 
       (.I0(drdRow1bufB[62]),
        .I1(drdRow1bufB[50]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[38]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[26]),
        .O(\gr1[10]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[10]_i_5 
       (.I0(drdRow1bufB[46]),
        .I1(drdRow1bufB[34]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[22]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[10]),
        .O(\gr1[10]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[10]_i_6 
       (.I0(drdRow1bufB[30]),
        .I1(drdRow1bufB[18]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[6]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[58]),
        .O(\gr1[10]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr1[11]_i_1 
       (.I0(\gr1_reg[11]_i_2_n_0 ),
        .I1(\gr1_reg[4] [3]),
        .I2(\gr1[11]_i_3_n_0 ),
        .I3(\gr1_reg[4] [2]),
        .I4(\gr1[11]_i_4_n_0 ),
        .I5(\gr1_reg[4]_0 ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[11]_i_3 
       (.I0(drdRow1bufB[15]),
        .I1(drdRow1bufB[3]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[55]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[43]),
        .O(\gr1[11]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[11]_i_4 
       (.I0(drdRow1bufB[63]),
        .I1(drdRow1bufB[51]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[39]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[27]),
        .O(\gr1[11]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[11]_i_5 
       (.I0(drdRow1bufB[47]),
        .I1(drdRow1bufB[35]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[23]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[11]),
        .O(\gr1[11]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[11]_i_6 
       (.I0(drdRow1bufB[31]),
        .I1(drdRow1bufB[19]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[7]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[59]),
        .O(\gr1[11]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr1[4]_i_1 
       (.I0(\gr1_reg[4]_i_2_n_0 ),
        .I1(\gr1_reg[4] [3]),
        .I2(\gr1[4]_i_3_n_0 ),
        .I3(\gr1_reg[4] [2]),
        .I4(\gr1[4]_i_4_n_0 ),
        .I5(\gr1_reg[4]_0 ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[4]_i_3 
       (.I0(drdRow1bufB[8]),
        .I1(\gr1_reg[7] [0]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[48]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[36]),
        .O(\gr1[4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[4]_i_4 
       (.I0(drdRow1bufB[56]),
        .I1(drdRow1bufB[44]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[32]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[20]),
        .O(\gr1[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[4]_i_5 
       (.I0(drdRow1bufB[40]),
        .I1(drdRow1bufB[28]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[16]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[4]),
        .O(\gr1[4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[4]_i_6 
       (.I0(drdRow1bufB[24]),
        .I1(drdRow1bufB[12]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[0]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[52]),
        .O(\gr1[4]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr1[5]_i_1 
       (.I0(\gr1_reg[5]_i_2_n_0 ),
        .I1(\gr1_reg[4] [3]),
        .I2(\gr1[5]_i_3_n_0 ),
        .I3(\gr1_reg[4] [2]),
        .I4(\gr1[5]_i_4_n_0 ),
        .I5(\gr1_reg[4]_0 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[5]_i_3 
       (.I0(drdRow1bufB[9]),
        .I1(\gr1_reg[7] [1]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[49]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[37]),
        .O(\gr1[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[5]_i_4 
       (.I0(drdRow1bufB[57]),
        .I1(drdRow1bufB[45]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[33]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[21]),
        .O(\gr1[5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[5]_i_5 
       (.I0(drdRow1bufB[41]),
        .I1(drdRow1bufB[29]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[17]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[5]),
        .O(\gr1[5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[5]_i_6 
       (.I0(drdRow1bufB[25]),
        .I1(drdRow1bufB[13]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[1]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[53]),
        .O(\gr1[5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr1[6]_i_1 
       (.I0(\gr1_reg[6]_i_2_n_0 ),
        .I1(\gr1_reg[4] [3]),
        .I2(\gr1[6]_i_3_n_0 ),
        .I3(\gr1_reg[4] [2]),
        .I4(\gr1[6]_i_4_n_0 ),
        .I5(\gr1_reg[4]_0 ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[6]_i_3 
       (.I0(drdRow1bufB[10]),
        .I1(\gr1_reg[7] [2]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[50]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[38]),
        .O(\gr1[6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[6]_i_4 
       (.I0(drdRow1bufB[58]),
        .I1(drdRow1bufB[46]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[34]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[22]),
        .O(\gr1[6]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[6]_i_5 
       (.I0(drdRow1bufB[42]),
        .I1(drdRow1bufB[30]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[18]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[6]),
        .O(\gr1[6]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[6]_i_6 
       (.I0(drdRow1bufB[26]),
        .I1(drdRow1bufB[14]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[2]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[54]),
        .O(\gr1[6]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr1[7]_i_1 
       (.I0(\gr1_reg[7]_i_2_n_0 ),
        .I1(\gr1_reg[4] [3]),
        .I2(\gr1[7]_i_3_n_0 ),
        .I3(\gr1_reg[4] [2]),
        .I4(\gr1[7]_i_4_n_0 ),
        .I5(\gr1_reg[4]_0 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[7]_i_3 
       (.I0(drdRow1bufB[11]),
        .I1(\gr1_reg[7] [3]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[51]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[39]),
        .O(\gr1[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[7]_i_4 
       (.I0(drdRow1bufB[59]),
        .I1(drdRow1bufB[47]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[35]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[23]),
        .O(\gr1[7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[7]_i_5 
       (.I0(drdRow1bufB[43]),
        .I1(drdRow1bufB[31]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[19]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[7]),
        .O(\gr1[7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[7]_i_6 
       (.I0(drdRow1bufB[27]),
        .I1(drdRow1bufB[15]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[3]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[55]),
        .O(\gr1[7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr1[8]_i_1 
       (.I0(\gr1_reg[8]_i_2_n_0 ),
        .I1(\gr1_reg[4] [3]),
        .I2(\gr1[8]_i_3_n_0 ),
        .I3(\gr1_reg[4] [2]),
        .I4(\gr1[8]_i_4_n_0 ),
        .I5(\gr1_reg[4]_0 ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[8]_i_3 
       (.I0(drdRow1bufB[12]),
        .I1(drdRow1bufB[0]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[52]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[40]),
        .O(\gr1[8]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[8]_i_4 
       (.I0(drdRow1bufB[60]),
        .I1(drdRow1bufB[48]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[36]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[24]),
        .O(\gr1[8]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[8]_i_5 
       (.I0(drdRow1bufB[44]),
        .I1(drdRow1bufB[32]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[20]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[8]),
        .O(\gr1[8]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[8]_i_6 
       (.I0(drdRow1bufB[28]),
        .I1(drdRow1bufB[16]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[4]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[56]),
        .O(\gr1[8]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr1[9]_i_1 
       (.I0(\gr1_reg[9]_i_2_n_0 ),
        .I1(\gr1_reg[4] [3]),
        .I2(\gr1[9]_i_3_n_0 ),
        .I3(\gr1_reg[4] [2]),
        .I4(\gr1[9]_i_4_n_0 ),
        .I5(\gr1_reg[4]_0 ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[9]_i_3 
       (.I0(drdRow1bufB[13]),
        .I1(drdRow1bufB[1]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[53]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[41]),
        .O(\gr1[9]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[9]_i_4 
       (.I0(drdRow1bufB[61]),
        .I1(drdRow1bufB[49]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[37]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[25]),
        .O(\gr1[9]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[9]_i_5 
       (.I0(drdRow1bufB[45]),
        .I1(drdRow1bufB[33]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[21]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[9]),
        .O(\gr1[9]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr1[9]_i_6 
       (.I0(drdRow1bufB[29]),
        .I1(drdRow1bufB[17]),
        .I2(\gr1_reg[4] [1]),
        .I3(drdRow1bufB[5]),
        .I4(\gr1_reg[4] [0]),
        .I5(drdRow1bufB[57]),
        .O(\gr1[9]_i_6_n_0 ));
  MUXF7 \gr1_reg[10]_i_2 
       (.I0(\gr1[10]_i_5_n_0 ),
        .I1(\gr1[10]_i_6_n_0 ),
        .O(\gr1_reg[10]_i_2_n_0 ),
        .S(\gr1_reg[4] [2]));
  MUXF7 \gr1_reg[11]_i_2 
       (.I0(\gr1[11]_i_5_n_0 ),
        .I1(\gr1[11]_i_6_n_0 ),
        .O(\gr1_reg[11]_i_2_n_0 ),
        .S(\gr1_reg[4] [2]));
  MUXF7 \gr1_reg[4]_i_2 
       (.I0(\gr1[4]_i_5_n_0 ),
        .I1(\gr1[4]_i_6_n_0 ),
        .O(\gr1_reg[4]_i_2_n_0 ),
        .S(\gr1_reg[4] [2]));
  MUXF7 \gr1_reg[5]_i_2 
       (.I0(\gr1[5]_i_5_n_0 ),
        .I1(\gr1[5]_i_6_n_0 ),
        .O(\gr1_reg[5]_i_2_n_0 ),
        .S(\gr1_reg[4] [2]));
  MUXF7 \gr1_reg[6]_i_2 
       (.I0(\gr1[6]_i_5_n_0 ),
        .I1(\gr1[6]_i_6_n_0 ),
        .O(\gr1_reg[6]_i_2_n_0 ),
        .S(\gr1_reg[4] [2]));
  MUXF7 \gr1_reg[7]_i_2 
       (.I0(\gr1[7]_i_5_n_0 ),
        .I1(\gr1[7]_i_6_n_0 ),
        .O(\gr1_reg[7]_i_2_n_0 ),
        .S(\gr1_reg[4] [2]));
  MUXF7 \gr1_reg[8]_i_2 
       (.I0(\gr1[8]_i_5_n_0 ),
        .I1(\gr1[8]_i_6_n_0 ),
        .O(\gr1_reg[8]_i_2_n_0 ),
        .S(\gr1_reg[4] [2]));
  MUXF7 \gr1_reg[9]_i_2 
       (.I0(\gr1[9]_i_5_n_0 ),
        .I1(\gr1[9]_i_6_n_0 ),
        .O(\gr1_reg[9]_i_2_n_0 ),
        .S(\gr1_reg[4] [2]));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a64b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a64b64__8 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[63:0]),
        .doutb(drdRow1bufB),
        .ena(enA),
        .enb(enb),
        .wea(1'b1),
        .web(1'b0));
  LUT4 #(
    .INIT(16'h0040)) 
    myMnfcore_i_1__15
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [1]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [0]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [2]),
        .O(enA));
endmodule

(* ORIG_REF_NAME = "Dpbram_size4kB_a64b64" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a64b64__xdcDup__3
   (D,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    enb,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ,
    \gr2_reg[4] ,
    \gr2_reg[4]_0 ,
    \drdRow2bufBm1_reg[60] ,
    \gr2_reg[7] ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 );
  output [7:0]D;
  output [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input aclk_sig;
  input [8:0]Q;
  input [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input enb;
  input [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  input [3:0]\gr2_reg[4] ;
  input \gr2_reg[4]_0 ;
  input [2:0]\drdRow2bufBm1_reg[60] ;
  input [3:0]\gr2_reg[7] ;
  input [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;

  wire [7:0]D;
  wire [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  wire [8:0]Q;
  wire aclk_sig;
  wire [63:0]drdRow2bufB;
  wire [2:0]\drdRow2bufBm1_reg[60] ;
  wire enb;
  wire \gr2[10]_i_3_n_0 ;
  wire \gr2[10]_i_4_n_0 ;
  wire \gr2[10]_i_5_n_0 ;
  wire \gr2[10]_i_6_n_0 ;
  wire \gr2[11]_i_3_n_0 ;
  wire \gr2[11]_i_4_n_0 ;
  wire \gr2[11]_i_5_n_0 ;
  wire \gr2[11]_i_6_n_0 ;
  wire \gr2[4]_i_3_n_0 ;
  wire \gr2[4]_i_4_n_0 ;
  wire \gr2[4]_i_5_n_0 ;
  wire \gr2[4]_i_6_n_0 ;
  wire \gr2[5]_i_3_n_0 ;
  wire \gr2[5]_i_4_n_0 ;
  wire \gr2[5]_i_5_n_0 ;
  wire \gr2[5]_i_6_n_0 ;
  wire \gr2[6]_i_3_n_0 ;
  wire \gr2[6]_i_4_n_0 ;
  wire \gr2[6]_i_5_n_0 ;
  wire \gr2[6]_i_6_n_0 ;
  wire \gr2[7]_i_3_n_0 ;
  wire \gr2[7]_i_4_n_0 ;
  wire \gr2[7]_i_5_n_0 ;
  wire \gr2[7]_i_6_n_0 ;
  wire \gr2[8]_i_3_n_0 ;
  wire \gr2[8]_i_4_n_0 ;
  wire \gr2[8]_i_5_n_0 ;
  wire \gr2[8]_i_6_n_0 ;
  wire \gr2[9]_i_3_n_0 ;
  wire \gr2[9]_i_4_n_0 ;
  wire \gr2[9]_i_5_n_0 ;
  wire \gr2[9]_i_6_n_0 ;
  wire \gr2_reg[10]_i_2_n_0 ;
  wire \gr2_reg[11]_i_2_n_0 ;
  wire [3:0]\gr2_reg[4] ;
  wire \gr2_reg[4]_0 ;
  wire \gr2_reg[4]_i_2_n_0 ;
  wire \gr2_reg[5]_i_2_n_0 ;
  wire \gr2_reg[6]_i_2_n_0 ;
  wire [3:0]\gr2_reg[7] ;
  wire \gr2_reg[7]_i_2_n_0 ;
  wire \gr2_reg[8]_i_2_n_0 ;
  wire \gr2_reg[9]_i_2_n_0 ;
  wire myMnfcore_i_1__16_n_0;
  wire [63:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* SOFT_HLUTNM = "soft_lutpair2951" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow2bufBm1[60]_i_1 
       (.I0(drdRow2bufB[60]),
        .I1(\drdRow2bufBm1_reg[60] [1]),
        .I2(\drdRow2bufBm1_reg[60] [2]),
        .I3(\drdRow2bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [0]));
  (* SOFT_HLUTNM = "soft_lutpair2951" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow2bufBm1[61]_i_1 
       (.I0(drdRow2bufB[61]),
        .I1(\drdRow2bufBm1_reg[60] [1]),
        .I2(\drdRow2bufBm1_reg[60] [2]),
        .I3(\drdRow2bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [1]));
  (* SOFT_HLUTNM = "soft_lutpair2952" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow2bufBm1[62]_i_1 
       (.I0(drdRow2bufB[62]),
        .I1(\drdRow2bufBm1_reg[60] [1]),
        .I2(\drdRow2bufBm1_reg[60] [2]),
        .I3(\drdRow2bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [2]));
  (* SOFT_HLUTNM = "soft_lutpair2952" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow2bufBm1[63]_i_1 
       (.I0(drdRow2bufB[63]),
        .I1(\drdRow2bufBm1_reg[60] [1]),
        .I2(\drdRow2bufBm1_reg[60] [2]),
        .I3(\drdRow2bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [3]));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr2[10]_i_1 
       (.I0(\gr2_reg[10]_i_2_n_0 ),
        .I1(\gr2_reg[4] [3]),
        .I2(\gr2[10]_i_3_n_0 ),
        .I3(\gr2_reg[4] [2]),
        .I4(\gr2[10]_i_4_n_0 ),
        .I5(\gr2_reg[4]_0 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[10]_i_3 
       (.I0(drdRow2bufB[14]),
        .I1(drdRow2bufB[2]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[54]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[42]),
        .O(\gr2[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[10]_i_4 
       (.I0(drdRow2bufB[62]),
        .I1(drdRow2bufB[50]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[38]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[26]),
        .O(\gr2[10]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[10]_i_5 
       (.I0(drdRow2bufB[46]),
        .I1(drdRow2bufB[34]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[22]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[10]),
        .O(\gr2[10]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[10]_i_6 
       (.I0(drdRow2bufB[30]),
        .I1(drdRow2bufB[18]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[6]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[58]),
        .O(\gr2[10]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr2[11]_i_1 
       (.I0(\gr2_reg[11]_i_2_n_0 ),
        .I1(\gr2_reg[4] [3]),
        .I2(\gr2[11]_i_3_n_0 ),
        .I3(\gr2_reg[4] [2]),
        .I4(\gr2[11]_i_4_n_0 ),
        .I5(\gr2_reg[4]_0 ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[11]_i_3 
       (.I0(drdRow2bufB[15]),
        .I1(drdRow2bufB[3]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[55]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[43]),
        .O(\gr2[11]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[11]_i_4 
       (.I0(drdRow2bufB[63]),
        .I1(drdRow2bufB[51]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[39]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[27]),
        .O(\gr2[11]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[11]_i_5 
       (.I0(drdRow2bufB[47]),
        .I1(drdRow2bufB[35]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[23]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[11]),
        .O(\gr2[11]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[11]_i_6 
       (.I0(drdRow2bufB[31]),
        .I1(drdRow2bufB[19]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[7]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[59]),
        .O(\gr2[11]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr2[4]_i_1 
       (.I0(\gr2_reg[4]_i_2_n_0 ),
        .I1(\gr2_reg[4] [3]),
        .I2(\gr2[4]_i_3_n_0 ),
        .I3(\gr2_reg[4] [2]),
        .I4(\gr2[4]_i_4_n_0 ),
        .I5(\gr2_reg[4]_0 ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[4]_i_3 
       (.I0(drdRow2bufB[8]),
        .I1(\gr2_reg[7] [0]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[48]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[36]),
        .O(\gr2[4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[4]_i_4 
       (.I0(drdRow2bufB[56]),
        .I1(drdRow2bufB[44]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[32]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[20]),
        .O(\gr2[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[4]_i_5 
       (.I0(drdRow2bufB[40]),
        .I1(drdRow2bufB[28]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[16]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[4]),
        .O(\gr2[4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[4]_i_6 
       (.I0(drdRow2bufB[24]),
        .I1(drdRow2bufB[12]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[0]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[52]),
        .O(\gr2[4]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr2[5]_i_1 
       (.I0(\gr2_reg[5]_i_2_n_0 ),
        .I1(\gr2_reg[4] [3]),
        .I2(\gr2[5]_i_3_n_0 ),
        .I3(\gr2_reg[4] [2]),
        .I4(\gr2[5]_i_4_n_0 ),
        .I5(\gr2_reg[4]_0 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[5]_i_3 
       (.I0(drdRow2bufB[9]),
        .I1(\gr2_reg[7] [1]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[49]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[37]),
        .O(\gr2[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[5]_i_4 
       (.I0(drdRow2bufB[57]),
        .I1(drdRow2bufB[45]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[33]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[21]),
        .O(\gr2[5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[5]_i_5 
       (.I0(drdRow2bufB[41]),
        .I1(drdRow2bufB[29]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[17]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[5]),
        .O(\gr2[5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[5]_i_6 
       (.I0(drdRow2bufB[25]),
        .I1(drdRow2bufB[13]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[1]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[53]),
        .O(\gr2[5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr2[6]_i_1 
       (.I0(\gr2_reg[6]_i_2_n_0 ),
        .I1(\gr2_reg[4] [3]),
        .I2(\gr2[6]_i_3_n_0 ),
        .I3(\gr2_reg[4] [2]),
        .I4(\gr2[6]_i_4_n_0 ),
        .I5(\gr2_reg[4]_0 ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[6]_i_3 
       (.I0(drdRow2bufB[10]),
        .I1(\gr2_reg[7] [2]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[50]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[38]),
        .O(\gr2[6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[6]_i_4 
       (.I0(drdRow2bufB[58]),
        .I1(drdRow2bufB[46]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[34]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[22]),
        .O(\gr2[6]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[6]_i_5 
       (.I0(drdRow2bufB[42]),
        .I1(drdRow2bufB[30]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[18]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[6]),
        .O(\gr2[6]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[6]_i_6 
       (.I0(drdRow2bufB[26]),
        .I1(drdRow2bufB[14]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[2]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[54]),
        .O(\gr2[6]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr2[7]_i_1 
       (.I0(\gr2_reg[7]_i_2_n_0 ),
        .I1(\gr2_reg[4] [3]),
        .I2(\gr2[7]_i_3_n_0 ),
        .I3(\gr2_reg[4] [2]),
        .I4(\gr2[7]_i_4_n_0 ),
        .I5(\gr2_reg[4]_0 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[7]_i_3 
       (.I0(drdRow2bufB[11]),
        .I1(\gr2_reg[7] [3]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[51]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[39]),
        .O(\gr2[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[7]_i_4 
       (.I0(drdRow2bufB[59]),
        .I1(drdRow2bufB[47]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[35]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[23]),
        .O(\gr2[7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[7]_i_5 
       (.I0(drdRow2bufB[43]),
        .I1(drdRow2bufB[31]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[19]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[7]),
        .O(\gr2[7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[7]_i_6 
       (.I0(drdRow2bufB[27]),
        .I1(drdRow2bufB[15]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[3]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[55]),
        .O(\gr2[7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr2[8]_i_1 
       (.I0(\gr2_reg[8]_i_2_n_0 ),
        .I1(\gr2_reg[4] [3]),
        .I2(\gr2[8]_i_3_n_0 ),
        .I3(\gr2_reg[4] [2]),
        .I4(\gr2[8]_i_4_n_0 ),
        .I5(\gr2_reg[4]_0 ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[8]_i_3 
       (.I0(drdRow2bufB[12]),
        .I1(drdRow2bufB[0]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[52]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[40]),
        .O(\gr2[8]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[8]_i_4 
       (.I0(drdRow2bufB[60]),
        .I1(drdRow2bufB[48]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[36]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[24]),
        .O(\gr2[8]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[8]_i_5 
       (.I0(drdRow2bufB[44]),
        .I1(drdRow2bufB[32]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[20]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[8]),
        .O(\gr2[8]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[8]_i_6 
       (.I0(drdRow2bufB[28]),
        .I1(drdRow2bufB[16]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[4]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[56]),
        .O(\gr2[8]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr2[9]_i_1 
       (.I0(\gr2_reg[9]_i_2_n_0 ),
        .I1(\gr2_reg[4] [3]),
        .I2(\gr2[9]_i_3_n_0 ),
        .I3(\gr2_reg[4] [2]),
        .I4(\gr2[9]_i_4_n_0 ),
        .I5(\gr2_reg[4]_0 ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[9]_i_3 
       (.I0(drdRow2bufB[13]),
        .I1(drdRow2bufB[1]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[53]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[41]),
        .O(\gr2[9]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[9]_i_4 
       (.I0(drdRow2bufB[61]),
        .I1(drdRow2bufB[49]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[37]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[25]),
        .O(\gr2[9]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[9]_i_5 
       (.I0(drdRow2bufB[45]),
        .I1(drdRow2bufB[33]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[21]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[9]),
        .O(\gr2[9]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr2[9]_i_6 
       (.I0(drdRow2bufB[29]),
        .I1(drdRow2bufB[17]),
        .I2(\gr2_reg[4] [1]),
        .I3(drdRow2bufB[5]),
        .I4(\gr2_reg[4] [0]),
        .I5(drdRow2bufB[57]),
        .O(\gr2[9]_i_6_n_0 ));
  MUXF7 \gr2_reg[10]_i_2 
       (.I0(\gr2[10]_i_5_n_0 ),
        .I1(\gr2[10]_i_6_n_0 ),
        .O(\gr2_reg[10]_i_2_n_0 ),
        .S(\gr2_reg[4] [2]));
  MUXF7 \gr2_reg[11]_i_2 
       (.I0(\gr2[11]_i_5_n_0 ),
        .I1(\gr2[11]_i_6_n_0 ),
        .O(\gr2_reg[11]_i_2_n_0 ),
        .S(\gr2_reg[4] [2]));
  MUXF7 \gr2_reg[4]_i_2 
       (.I0(\gr2[4]_i_5_n_0 ),
        .I1(\gr2[4]_i_6_n_0 ),
        .O(\gr2_reg[4]_i_2_n_0 ),
        .S(\gr2_reg[4] [2]));
  MUXF7 \gr2_reg[5]_i_2 
       (.I0(\gr2[5]_i_5_n_0 ),
        .I1(\gr2[5]_i_6_n_0 ),
        .O(\gr2_reg[5]_i_2_n_0 ),
        .S(\gr2_reg[4] [2]));
  MUXF7 \gr2_reg[6]_i_2 
       (.I0(\gr2[6]_i_5_n_0 ),
        .I1(\gr2[6]_i_6_n_0 ),
        .O(\gr2_reg[6]_i_2_n_0 ),
        .S(\gr2_reg[4] [2]));
  MUXF7 \gr2_reg[7]_i_2 
       (.I0(\gr2[7]_i_5_n_0 ),
        .I1(\gr2[7]_i_6_n_0 ),
        .O(\gr2_reg[7]_i_2_n_0 ),
        .S(\gr2_reg[4] [2]));
  MUXF7 \gr2_reg[8]_i_2 
       (.I0(\gr2[8]_i_5_n_0 ),
        .I1(\gr2[8]_i_6_n_0 ),
        .O(\gr2_reg[8]_i_2_n_0 ),
        .S(\gr2_reg[4] [2]));
  MUXF7 \gr2_reg[9]_i_2 
       (.I0(\gr2[9]_i_5_n_0 ),
        .I1(\gr2[9]_i_6_n_0 ),
        .O(\gr2_reg[9]_i_2_n_0 ),
        .S(\gr2_reg[4] [2]));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a64b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a64b64__7 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[63:0]),
        .doutb(drdRow2bufB),
        .ena(myMnfcore_i_1__16_n_0),
        .enb(enb),
        .wea(1'b1),
        .web(1'b0));
  LUT4 #(
    .INIT(16'h0040)) 
    myMnfcore_i_1__16
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [0]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [1]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [2]),
        .O(myMnfcore_i_1__16_n_0));
endmodule

(* ORIG_REF_NAME = "Dpbram_size4kB_a64b64" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a64b64__xdcDup__4
   (D,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    enb,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ,
    \gr3_reg[4] ,
    \gr3_reg[4]_0 ,
    \drdRow3bufBm1_reg[60] ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ,
    \gr3_reg[7] );
  output [7:0]D;
  output [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input aclk_sig;
  input [8:0]Q;
  input [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input enb;
  input [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  input [3:0]\gr3_reg[4] ;
  input \gr3_reg[4]_0 ;
  input [2:0]\drdRow3bufBm1_reg[60] ;
  input [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  input [3:0]\gr3_reg[7] ;

  wire [7:0]D;
  wire [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [2:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  wire [8:0]Q;
  wire aclk_sig;
  wire [63:0]drdRow3bufB;
  wire [2:0]\drdRow3bufBm1_reg[60] ;
  wire enb;
  wire \gr3[10]_i_3_n_0 ;
  wire \gr3[10]_i_4_n_0 ;
  wire \gr3[10]_i_5_n_0 ;
  wire \gr3[10]_i_6_n_0 ;
  wire \gr3[11]_i_3_n_0 ;
  wire \gr3[11]_i_4_n_0 ;
  wire \gr3[11]_i_5_n_0 ;
  wire \gr3[11]_i_6_n_0 ;
  wire \gr3[4]_i_3_n_0 ;
  wire \gr3[4]_i_4_n_0 ;
  wire \gr3[4]_i_5_n_0 ;
  wire \gr3[4]_i_6_n_0 ;
  wire \gr3[5]_i_3_n_0 ;
  wire \gr3[5]_i_4_n_0 ;
  wire \gr3[5]_i_5_n_0 ;
  wire \gr3[5]_i_6_n_0 ;
  wire \gr3[6]_i_3_n_0 ;
  wire \gr3[6]_i_4_n_0 ;
  wire \gr3[6]_i_5_n_0 ;
  wire \gr3[6]_i_6_n_0 ;
  wire \gr3[7]_i_3_n_0 ;
  wire \gr3[7]_i_4_n_0 ;
  wire \gr3[7]_i_5_n_0 ;
  wire \gr3[7]_i_6_n_0 ;
  wire \gr3[8]_i_3_n_0 ;
  wire \gr3[8]_i_4_n_0 ;
  wire \gr3[8]_i_5_n_0 ;
  wire \gr3[8]_i_6_n_0 ;
  wire \gr3[9]_i_3_n_0 ;
  wire \gr3[9]_i_4_n_0 ;
  wire \gr3[9]_i_5_n_0 ;
  wire \gr3[9]_i_6_n_0 ;
  wire \gr3_reg[10]_i_2_n_0 ;
  wire \gr3_reg[11]_i_2_n_0 ;
  wire [3:0]\gr3_reg[4] ;
  wire \gr3_reg[4]_0 ;
  wire \gr3_reg[4]_i_2_n_0 ;
  wire \gr3_reg[5]_i_2_n_0 ;
  wire \gr3_reg[6]_i_2_n_0 ;
  wire [3:0]\gr3_reg[7] ;
  wire \gr3_reg[7]_i_2_n_0 ;
  wire \gr3_reg[8]_i_2_n_0 ;
  wire \gr3_reg[9]_i_2_n_0 ;
  wire myMnfcore_i_1__12_n_0;
  wire [63:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* SOFT_HLUTNM = "soft_lutpair2953" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow3bufBm1[60]_i_1 
       (.I0(drdRow3bufB[60]),
        .I1(\drdRow3bufBm1_reg[60] [1]),
        .I2(\drdRow3bufBm1_reg[60] [2]),
        .I3(\drdRow3bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [0]));
  (* SOFT_HLUTNM = "soft_lutpair2953" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow3bufBm1[61]_i_1 
       (.I0(drdRow3bufB[61]),
        .I1(\drdRow3bufBm1_reg[60] [1]),
        .I2(\drdRow3bufBm1_reg[60] [2]),
        .I3(\drdRow3bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [1]));
  (* SOFT_HLUTNM = "soft_lutpair2954" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow3bufBm1[62]_i_1 
       (.I0(drdRow3bufB[62]),
        .I1(\drdRow3bufBm1_reg[60] [1]),
        .I2(\drdRow3bufBm1_reg[60] [2]),
        .I3(\drdRow3bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [2]));
  (* SOFT_HLUTNM = "soft_lutpair2954" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    \drdRow3bufBm1[63]_i_1 
       (.I0(drdRow3bufB[63]),
        .I1(\drdRow3bufBm1_reg[60] [1]),
        .I2(\drdRow3bufBm1_reg[60] [2]),
        .I3(\drdRow3bufBm1_reg[60] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [3]));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr3[10]_i_1 
       (.I0(\gr3_reg[10]_i_2_n_0 ),
        .I1(\gr3_reg[4] [3]),
        .I2(\gr3[10]_i_3_n_0 ),
        .I3(\gr3_reg[4] [2]),
        .I4(\gr3[10]_i_4_n_0 ),
        .I5(\gr3_reg[4]_0 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[10]_i_3 
       (.I0(drdRow3bufB[14]),
        .I1(drdRow3bufB[2]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[54]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[42]),
        .O(\gr3[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[10]_i_4 
       (.I0(drdRow3bufB[62]),
        .I1(drdRow3bufB[50]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[38]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[26]),
        .O(\gr3[10]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[10]_i_5 
       (.I0(drdRow3bufB[46]),
        .I1(drdRow3bufB[34]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[22]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[10]),
        .O(\gr3[10]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[10]_i_6 
       (.I0(drdRow3bufB[30]),
        .I1(drdRow3bufB[18]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[6]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[58]),
        .O(\gr3[10]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr3[11]_i_1 
       (.I0(\gr3_reg[11]_i_2_n_0 ),
        .I1(\gr3_reg[4] [3]),
        .I2(\gr3[11]_i_3_n_0 ),
        .I3(\gr3_reg[4] [2]),
        .I4(\gr3[11]_i_4_n_0 ),
        .I5(\gr3_reg[4]_0 ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[11]_i_3 
       (.I0(drdRow3bufB[15]),
        .I1(drdRow3bufB[3]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[55]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[43]),
        .O(\gr3[11]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[11]_i_4 
       (.I0(drdRow3bufB[63]),
        .I1(drdRow3bufB[51]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[39]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[27]),
        .O(\gr3[11]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[11]_i_5 
       (.I0(drdRow3bufB[47]),
        .I1(drdRow3bufB[35]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[23]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[11]),
        .O(\gr3[11]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[11]_i_6 
       (.I0(drdRow3bufB[31]),
        .I1(drdRow3bufB[19]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[7]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[59]),
        .O(\gr3[11]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr3[4]_i_1 
       (.I0(\gr3_reg[4]_i_2_n_0 ),
        .I1(\gr3_reg[4] [3]),
        .I2(\gr3[4]_i_3_n_0 ),
        .I3(\gr3_reg[4] [2]),
        .I4(\gr3[4]_i_4_n_0 ),
        .I5(\gr3_reg[4]_0 ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[4]_i_3 
       (.I0(drdRow3bufB[8]),
        .I1(\gr3_reg[7] [0]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[48]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[36]),
        .O(\gr3[4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[4]_i_4 
       (.I0(drdRow3bufB[56]),
        .I1(drdRow3bufB[44]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[32]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[20]),
        .O(\gr3[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[4]_i_5 
       (.I0(drdRow3bufB[40]),
        .I1(drdRow3bufB[28]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[16]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[4]),
        .O(\gr3[4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[4]_i_6 
       (.I0(drdRow3bufB[24]),
        .I1(drdRow3bufB[12]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[0]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[52]),
        .O(\gr3[4]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr3[5]_i_1 
       (.I0(\gr3_reg[5]_i_2_n_0 ),
        .I1(\gr3_reg[4] [3]),
        .I2(\gr3[5]_i_3_n_0 ),
        .I3(\gr3_reg[4] [2]),
        .I4(\gr3[5]_i_4_n_0 ),
        .I5(\gr3_reg[4]_0 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[5]_i_3 
       (.I0(drdRow3bufB[9]),
        .I1(\gr3_reg[7] [1]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[49]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[37]),
        .O(\gr3[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[5]_i_4 
       (.I0(drdRow3bufB[57]),
        .I1(drdRow3bufB[45]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[33]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[21]),
        .O(\gr3[5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[5]_i_5 
       (.I0(drdRow3bufB[41]),
        .I1(drdRow3bufB[29]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[17]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[5]),
        .O(\gr3[5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[5]_i_6 
       (.I0(drdRow3bufB[25]),
        .I1(drdRow3bufB[13]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[1]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[53]),
        .O(\gr3[5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr3[6]_i_1 
       (.I0(\gr3_reg[6]_i_2_n_0 ),
        .I1(\gr3_reg[4] [3]),
        .I2(\gr3[6]_i_3_n_0 ),
        .I3(\gr3_reg[4] [2]),
        .I4(\gr3[6]_i_4_n_0 ),
        .I5(\gr3_reg[4]_0 ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[6]_i_3 
       (.I0(drdRow3bufB[10]),
        .I1(\gr3_reg[7] [2]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[50]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[38]),
        .O(\gr3[6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[6]_i_4 
       (.I0(drdRow3bufB[58]),
        .I1(drdRow3bufB[46]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[34]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[22]),
        .O(\gr3[6]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[6]_i_5 
       (.I0(drdRow3bufB[42]),
        .I1(drdRow3bufB[30]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[18]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[6]),
        .O(\gr3[6]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[6]_i_6 
       (.I0(drdRow3bufB[26]),
        .I1(drdRow3bufB[14]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[2]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[54]),
        .O(\gr3[6]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr3[7]_i_1 
       (.I0(\gr3_reg[7]_i_2_n_0 ),
        .I1(\gr3_reg[4] [3]),
        .I2(\gr3[7]_i_3_n_0 ),
        .I3(\gr3_reg[4] [2]),
        .I4(\gr3[7]_i_4_n_0 ),
        .I5(\gr3_reg[4]_0 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[7]_i_3 
       (.I0(drdRow3bufB[11]),
        .I1(\gr3_reg[7] [3]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[51]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[39]),
        .O(\gr3[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[7]_i_4 
       (.I0(drdRow3bufB[59]),
        .I1(drdRow3bufB[47]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[35]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[23]),
        .O(\gr3[7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[7]_i_5 
       (.I0(drdRow3bufB[43]),
        .I1(drdRow3bufB[31]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[19]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[7]),
        .O(\gr3[7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[7]_i_6 
       (.I0(drdRow3bufB[27]),
        .I1(drdRow3bufB[15]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[3]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[55]),
        .O(\gr3[7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr3[8]_i_1 
       (.I0(\gr3_reg[8]_i_2_n_0 ),
        .I1(\gr3_reg[4] [3]),
        .I2(\gr3[8]_i_3_n_0 ),
        .I3(\gr3_reg[4] [2]),
        .I4(\gr3[8]_i_4_n_0 ),
        .I5(\gr3_reg[4]_0 ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[8]_i_3 
       (.I0(drdRow3bufB[12]),
        .I1(drdRow3bufB[0]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[52]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[40]),
        .O(\gr3[8]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[8]_i_4 
       (.I0(drdRow3bufB[60]),
        .I1(drdRow3bufB[48]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[36]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[24]),
        .O(\gr3[8]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[8]_i_5 
       (.I0(drdRow3bufB[44]),
        .I1(drdRow3bufB[32]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[20]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[8]),
        .O(\gr3[8]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[8]_i_6 
       (.I0(drdRow3bufB[28]),
        .I1(drdRow3bufB[16]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[4]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[56]),
        .O(\gr3[8]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \gr3[9]_i_1 
       (.I0(\gr3_reg[9]_i_2_n_0 ),
        .I1(\gr3_reg[4] [3]),
        .I2(\gr3[9]_i_3_n_0 ),
        .I3(\gr3_reg[4] [2]),
        .I4(\gr3[9]_i_4_n_0 ),
        .I5(\gr3_reg[4]_0 ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[9]_i_3 
       (.I0(drdRow3bufB[13]),
        .I1(drdRow3bufB[1]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[53]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[41]),
        .O(\gr3[9]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[9]_i_4 
       (.I0(drdRow3bufB[61]),
        .I1(drdRow3bufB[49]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[37]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[25]),
        .O(\gr3[9]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[9]_i_5 
       (.I0(drdRow3bufB[45]),
        .I1(drdRow3bufB[33]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[21]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[9]),
        .O(\gr3[9]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr3[9]_i_6 
       (.I0(drdRow3bufB[29]),
        .I1(drdRow3bufB[17]),
        .I2(\gr3_reg[4] [1]),
        .I3(drdRow3bufB[5]),
        .I4(\gr3_reg[4] [0]),
        .I5(drdRow3bufB[57]),
        .O(\gr3[9]_i_6_n_0 ));
  MUXF7 \gr3_reg[10]_i_2 
       (.I0(\gr3[10]_i_5_n_0 ),
        .I1(\gr3[10]_i_6_n_0 ),
        .O(\gr3_reg[10]_i_2_n_0 ),
        .S(\gr3_reg[4] [2]));
  MUXF7 \gr3_reg[11]_i_2 
       (.I0(\gr3[11]_i_5_n_0 ),
        .I1(\gr3[11]_i_6_n_0 ),
        .O(\gr3_reg[11]_i_2_n_0 ),
        .S(\gr3_reg[4] [2]));
  MUXF7 \gr3_reg[4]_i_2 
       (.I0(\gr3[4]_i_5_n_0 ),
        .I1(\gr3[4]_i_6_n_0 ),
        .O(\gr3_reg[4]_i_2_n_0 ),
        .S(\gr3_reg[4] [2]));
  MUXF7 \gr3_reg[5]_i_2 
       (.I0(\gr3[5]_i_5_n_0 ),
        .I1(\gr3[5]_i_6_n_0 ),
        .O(\gr3_reg[5]_i_2_n_0 ),
        .S(\gr3_reg[4] [2]));
  MUXF7 \gr3_reg[6]_i_2 
       (.I0(\gr3[6]_i_5_n_0 ),
        .I1(\gr3[6]_i_6_n_0 ),
        .O(\gr3_reg[6]_i_2_n_0 ),
        .S(\gr3_reg[4] [2]));
  MUXF7 \gr3_reg[7]_i_2 
       (.I0(\gr3[7]_i_5_n_0 ),
        .I1(\gr3[7]_i_6_n_0 ),
        .O(\gr3_reg[7]_i_2_n_0 ),
        .S(\gr3_reg[4] [2]));
  MUXF7 \gr3_reg[8]_i_2 
       (.I0(\gr3[8]_i_5_n_0 ),
        .I1(\gr3[8]_i_6_n_0 ),
        .O(\gr3_reg[8]_i_2_n_0 ),
        .S(\gr3_reg[4] [2]));
  MUXF7 \gr3_reg[9]_i_2 
       (.I0(\gr3[9]_i_5_n_0 ),
        .I1(\gr3[9]_i_6_n_0 ),
        .O(\gr3_reg[9]_i_2_n_0 ),
        .S(\gr3_reg[4] [2]));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a64b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a64b64__6 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[63:0]),
        .doutb(drdRow3bufB),
        .ena(myMnfcore_i_1__12_n_0),
        .enb(enb),
        .wea(1'b1),
        .web(1'b0));
  LUT4 #(
    .INIT(16'h0080)) 
    myMnfcore_i_1__12
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [1]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [0]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 [2]),
        .O(myMnfcore_i_1__12_n_0));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size6kB_a64b64
   (\qrs_reg[2] ,
    \qrs_reg[1] ,
    \qrs_reg[1]_0 ,
    \qrs_reg[1]_1 ,
    \qrs_reg[2]_0 ,
    \qrs_reg[2]_1 ,
    \qrs_reg[2]_2 ,
    p_1_in,
    \qrs_reg[1]_2 ,
    D,
    \qrs_reg[1]_3 ,
    \qrs_reg[1]_4 ,
    \qrs_reg[1]_5 ,
    \qrs_reg[1]_6 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    \FSM_sequential_stateRgbegr_reg[1] ,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    enEobufB,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ,
    \rgbToManyAXIS_tdata_sig_reg[7] ,
    p_0_in,
    p_3_in,
    \gr_reg[11]_i_3_0 ,
    \gr_reg[11]_i_3_1 ,
    \gr_reg[5]_i_2_0 ,
    \gr_reg[5]_i_2_1 ,
    \gr_reg[11]_i_3_2 ,
    \gr_reg[5]_i_2_2 ,
    \gr_reg[5]_i_2_3 ,
    \gr_reg[5]_i_2_4 ,
    \gr_reg[5]_i_2_5 ,
    \gr_reg[11]_i_3_3 ,
    \drdOddbufBm1_reg[63] ,
    oddNotEven,
    enEobuf,
    \rgbToManyAXIS_tdata_sig_reg[7]_0 ,
    S);
  output [0:0]\qrs_reg[2] ;
  output \qrs_reg[1] ;
  output \qrs_reg[1]_0 ;
  output \qrs_reg[1]_1 ;
  output \qrs_reg[2]_0 ;
  output \qrs_reg[2]_1 ;
  output \qrs_reg[2]_2 ;
  output [1:0]p_1_in;
  output \qrs_reg[1]_2 ;
  output [11:0]D;
  output \qrs_reg[1]_3 ;
  output \qrs_reg[1]_4 ;
  output \qrs_reg[1]_5 ;
  output \qrs_reg[1]_6 ;
  output [15:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  output [11:0]\FSM_sequential_stateRgbegr_reg[1] ;
  input aclk_sig;
  input [9:0]Q;
  input [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input enEobufB;
  input [9:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  input [2:0]\rgbToManyAXIS_tdata_sig_reg[7] ;
  input [11:0]p_0_in;
  input [1:0]p_3_in;
  input \gr_reg[11]_i_3_0 ;
  input \gr_reg[11]_i_3_1 ;
  input \gr_reg[5]_i_2_0 ;
  input \gr_reg[5]_i_2_1 ;
  input \gr_reg[11]_i_3_2 ;
  input \gr_reg[5]_i_2_2 ;
  input \gr_reg[5]_i_2_3 ;
  input \gr_reg[5]_i_2_4 ;
  input \gr_reg[5]_i_2_5 ;
  input \gr_reg[11]_i_3_3 ;
  input [1:0]\drdOddbufBm1_reg[63] ;
  input oddNotEven;
  input enEobuf;
  input [15:0]\rgbToManyAXIS_tdata_sig_reg[7]_0 ;
  input [0:0]S;

  wire [11:0]D;
  wire [15:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire [9:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [11:0]\FSM_sequential_stateRgbegr_reg[1] ;
  wire [9:0]Q;
  wire [0:0]S;
  wire aclk_sig;
  wire [63:0]drdOddbufB;
  wire [1:0]\drdOddbufBm1_reg[63] ;
  wire enEobuf;
  wire enEobufB;
  wire [13:2]gr0;
  wire \gr[11]_i_10_n_0 ;
  wire \gr[11]_i_11_n_0 ;
  wire \gr[11]_i_12_n_0 ;
  wire \gr[11]_i_13_n_0 ;
  wire \gr[11]_i_15_n_0 ;
  wire \gr[11]_i_17_n_0 ;
  wire \gr[11]_i_19_n_0 ;
  wire \gr[11]_i_20_n_0 ;
  wire \gr[11]_i_21_n_0 ;
  wire \gr[11]_i_22_n_0 ;
  wire \gr[11]_i_23_n_0 ;
  wire \gr[11]_i_24_n_0 ;
  wire \gr[11]_i_25_n_0 ;
  wire \gr[11]_i_26_n_0 ;
  wire \gr[11]_i_27_n_0 ;
  wire \gr[11]_i_28_n_0 ;
  wire \gr[11]_i_29_n_0 ;
  wire \gr[11]_i_30_n_0 ;
  wire \gr[11]_i_31_n_0 ;
  wire \gr[11]_i_4_n_0 ;
  wire \gr[11]_i_5_n_0 ;
  wire \gr[11]_i_6_n_0 ;
  wire \gr[11]_i_7_n_0 ;
  wire \gr[11]_i_8_n_0 ;
  wire \gr[11]_i_9_n_0 ;
  wire \gr[5]_i_10_n_0 ;
  wire \gr[5]_i_11_n_0 ;
  wire \gr[5]_i_12_n_0 ;
  wire \gr[5]_i_13_n_0 ;
  wire \gr[5]_i_14_n_0 ;
  wire \gr[5]_i_16_n_0 ;
  wire \gr[5]_i_17_n_0 ;
  wire \gr[5]_i_18_n_0 ;
  wire \gr[5]_i_19_n_0 ;
  wire \gr[5]_i_21_n_0 ;
  wire \gr[5]_i_22_n_0 ;
  wire \gr[5]_i_24_n_0 ;
  wire \gr[5]_i_27_n_0 ;
  wire \gr[5]_i_28_n_0 ;
  wire \gr[5]_i_29_n_0 ;
  wire \gr[5]_i_30_n_0 ;
  wire \gr[5]_i_31_n_0 ;
  wire \gr[5]_i_32_n_0 ;
  wire \gr[5]_i_33_n_0 ;
  wire \gr[5]_i_34_n_0 ;
  wire \gr[5]_i_35_n_0 ;
  wire \gr[5]_i_3_n_0 ;
  wire \gr[5]_i_4_n_0 ;
  wire \gr[5]_i_5_n_0 ;
  wire \gr[5]_i_6_n_0 ;
  wire \gr[5]_i_7_n_0 ;
  wire \gr[5]_i_8_n_0 ;
  wire \gr[5]_i_9_n_0 ;
  wire \gr_reg[11]_i_3_0 ;
  wire \gr_reg[11]_i_3_1 ;
  wire \gr_reg[11]_i_3_2 ;
  wire \gr_reg[11]_i_3_3 ;
  wire \gr_reg[11]_i_3_n_4 ;
  wire \gr_reg[11]_i_3_n_5 ;
  wire \gr_reg[11]_i_3_n_6 ;
  wire \gr_reg[11]_i_3_n_7 ;
  wire \gr_reg[5]_i_2_0 ;
  wire \gr_reg[5]_i_2_1 ;
  wire \gr_reg[5]_i_2_2 ;
  wire \gr_reg[5]_i_2_3 ;
  wire \gr_reg[5]_i_2_4 ;
  wire \gr_reg[5]_i_2_5 ;
  wire \gr_reg[5]_i_2_n_0 ;
  wire \gr_reg[5]_i_2_n_1 ;
  wire \gr_reg[5]_i_2_n_2 ;
  wire \gr_reg[5]_i_2_n_3 ;
  wire \gr_reg[5]_i_2_n_4 ;
  wire \gr_reg[5]_i_2_n_5 ;
  wire \gr_reg[5]_i_2_n_6 ;
  wire \gr_reg[5]_i_2_n_7 ;
  wire myMnfcore_i_1__10_n_0;
  wire oddNotEven;
  wire [11:0]p_0_in;
  wire [1:0]p_1_in;
  wire [0:0]p_2_in;
  wire [1:0]p_3_in;
  wire \qrs_reg[1] ;
  wire \qrs_reg[1]_0 ;
  wire \qrs_reg[1]_1 ;
  wire \qrs_reg[1]_2 ;
  wire \qrs_reg[1]_3 ;
  wire \qrs_reg[1]_4 ;
  wire \qrs_reg[1]_5 ;
  wire \qrs_reg[1]_6 ;
  wire [0:0]\qrs_reg[2] ;
  wire \qrs_reg[2]_0 ;
  wire \qrs_reg[2]_1 ;
  wire \qrs_reg[2]_2 ;
  wire \rgbToManyAXIS_tdata_sig[0]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[0]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[10]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[10]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[11]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[11]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_39_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_40_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_41_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_42_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_43_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_44_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_45_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_46_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_47_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_48_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_49_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[1]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[1]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_28_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_29_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_30_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[2]_i_2_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[2]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[2]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[3]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[3]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[4]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[4]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[5]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[5]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[6]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[6]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[7]_i_2_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[7]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[8]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[8]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[9]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[9]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[10]_i_2_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[11]_i_2_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[3]_i_2_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[4]_i_2_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[5]_i_2_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[6]_i_2_n_0 ;
  wire [2:0]\rgbToManyAXIS_tdata_sig_reg[7] ;
  wire [15:0]\rgbToManyAXIS_tdata_sig_reg[7]_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[8]_i_2_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[9]_i_2_n_0 ;
  wire [7:4]\NLW_gr_reg[11]_i_3_CO_UNCONNECTED ;
  wire [7:5]\NLW_gr_reg[11]_i_3_O_UNCONNECTED ;
  wire [1:0]\NLW_gr_reg[5]_i_2_O_UNCONNECTED ;
  wire [63:0]NLW_myMnfcore_douta_UNCONNECTED;

  (* SOFT_HLUTNM = "soft_lutpair2936" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[48]_i_1 
       (.I0(drdOddbufB[48]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [0]));
  (* SOFT_HLUTNM = "soft_lutpair2936" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[49]_i_1 
       (.I0(drdOddbufB[49]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [1]));
  (* SOFT_HLUTNM = "soft_lutpair2935" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[50]_i_1 
       (.I0(drdOddbufB[50]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [2]));
  (* SOFT_HLUTNM = "soft_lutpair2935" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[51]_i_1 
       (.I0(drdOddbufB[51]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [3]));
  (* SOFT_HLUTNM = "soft_lutpair2934" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[52]_i_1 
       (.I0(drdOddbufB[52]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [4]));
  (* SOFT_HLUTNM = "soft_lutpair2934" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[53]_i_1 
       (.I0(drdOddbufB[53]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [5]));
  (* SOFT_HLUTNM = "soft_lutpair2933" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[54]_i_1 
       (.I0(drdOddbufB[54]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [6]));
  (* SOFT_HLUTNM = "soft_lutpair2933" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[55]_i_1 
       (.I0(drdOddbufB[55]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [7]));
  (* SOFT_HLUTNM = "soft_lutpair2932" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[56]_i_1 
       (.I0(drdOddbufB[56]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [8]));
  (* SOFT_HLUTNM = "soft_lutpair2932" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[57]_i_1 
       (.I0(drdOddbufB[57]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [9]));
  (* SOFT_HLUTNM = "soft_lutpair2931" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[58]_i_1 
       (.I0(drdOddbufB[58]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [10]));
  (* SOFT_HLUTNM = "soft_lutpair2931" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[59]_i_1 
       (.I0(drdOddbufB[59]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [11]));
  (* SOFT_HLUTNM = "soft_lutpair2930" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[60]_i_1 
       (.I0(drdOddbufB[60]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [12]));
  (* SOFT_HLUTNM = "soft_lutpair2930" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[61]_i_1 
       (.I0(drdOddbufB[61]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [13]));
  (* SOFT_HLUTNM = "soft_lutpair2929" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[62]_i_1 
       (.I0(drdOddbufB[62]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [14]));
  (* SOFT_HLUTNM = "soft_lutpair2929" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \drdOddbufBm1[63]_i_1 
       (.I0(drdOddbufB[63]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram [15]));
  (* SOFT_HLUTNM = "soft_lutpair2942" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[0]_i_1 
       (.I0(gr0[2]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [0]));
  (* SOFT_HLUTNM = "soft_lutpair2937" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[10]_i_1 
       (.I0(gr0[12]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [10]));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \gr[11]_i_10 
       (.I0(p_0_in[11]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[11]_i_2_n_0 ),
        .I2(\qrs_reg[1]_2 ),
        .I3(\gr[11]_i_5_n_0 ),
        .I4(\gr[11]_i_15_n_0 ),
        .I5(\gr_reg[11]_i_3_3 ),
        .O(\gr[11]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hD42B2BD42BD4D42B)) 
    \gr[11]_i_11 
       (.I0(p_0_in[9]),
        .I1(\qrs_reg[1]_1 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[9]_i_2_n_0 ),
        .I3(\gr[11]_i_6_n_0 ),
        .I4(\gr_reg[11]_i_3_2 ),
        .I5(\gr[11]_i_17_n_0 ),
        .O(\gr[11]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hB24D4DB24DB2B24D)) 
    \gr[11]_i_12 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[8]_i_2_n_0 ),
        .I1(\qrs_reg[1] ),
        .I2(p_0_in[8]),
        .I3(\gr[11]_i_7_n_0 ),
        .I4(\gr_reg[11]_i_3_1 ),
        .I5(\gr[11]_i_19_n_0 ),
        .O(\gr[11]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \gr[11]_i_13 
       (.I0(\qrs_reg[1] ),
        .I1(p_0_in[8]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[8]_i_2_n_0 ),
        .I3(\gr[11]_i_8_n_0 ),
        .I4(\gr[11]_i_20_n_0 ),
        .I5(\gr_reg[11]_i_3_0 ),
        .O(\gr[11]_i_13_n_0 ));
  LUT5 #(
    .INIT(32'h5530553F)) 
    \gr[11]_i_14 
       (.I0(\gr[11]_i_23_n_0 ),
        .I1(\gr[11]_i_24_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I4(\gr[11]_i_25_n_0 ),
        .O(\qrs_reg[1]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair2920" *) 
  LUT3 #(
    .INIT(8'hB2)) 
    \gr[11]_i_15 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[10]_i_2_n_0 ),
        .I1(\qrs_reg[1]_5 ),
        .I2(p_0_in[10]),
        .O(\gr[11]_i_15_n_0 ));
  LUT5 #(
    .INIT(32'h5530553F)) 
    \gr[11]_i_16 
       (.I0(\gr[11]_i_26_n_0 ),
        .I1(\gr[11]_i_27_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I4(\gr[11]_i_28_n_0 ),
        .O(\qrs_reg[1]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2920" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \gr[11]_i_17 
       (.I0(\qrs_reg[1]_5 ),
        .I1(p_0_in[10]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[10]_i_2_n_0 ),
        .O(\gr[11]_i_17_n_0 ));
  LUT5 #(
    .INIT(32'h5530553F)) 
    \gr[11]_i_18 
       (.I0(\gr[11]_i_29_n_0 ),
        .I1(\gr[11]_i_30_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I4(\gr[11]_i_31_n_0 ),
        .O(\qrs_reg[1] ));
  (* SOFT_HLUTNM = "soft_lutpair2915" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \gr[11]_i_19 
       (.I0(\qrs_reg[1]_1 ),
        .I1(p_0_in[9]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[9]_i_2_n_0 ),
        .O(\gr[11]_i_19_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2937" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[11]_i_2 
       (.I0(gr0[13]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [11]));
  (* SOFT_HLUTNM = "soft_lutpair2913" *) 
  LUT5 #(
    .INIT(32'hB800FFB8)) 
    \gr[11]_i_20 
       (.I0(\rgbToManyAXIS_tdata_sig[7]_i_2_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I2(\rgbToManyAXIS_tdata_sig[7]_i_3_n_0 ),
        .I3(p_0_in[7]),
        .I4(\qrs_reg[1]_3 ),
        .O(\gr[11]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2921" *) 
  LUT3 #(
    .INIT(8'hB2)) 
    \gr[11]_i_21 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[6]_i_2_n_0 ),
        .I1(\qrs_reg[1]_6 ),
        .I2(p_0_in[6]),
        .O(\gr[11]_i_21_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2913" *) 
  LUT5 #(
    .INIT(32'h47B8B847)) 
    \gr[11]_i_22 
       (.I0(\rgbToManyAXIS_tdata_sig[7]_i_2_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I2(\rgbToManyAXIS_tdata_sig[7]_i_3_n_0 ),
        .I3(\qrs_reg[1]_3 ),
        .I4(p_0_in[7]),
        .O(\gr[11]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr[11]_i_23 
       (.I0(drdOddbufB[63]),
        .I1(drdOddbufB[39]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[15]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[55]),
        .O(\gr[11]_i_23_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2928" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \gr[11]_i_24 
       (.I0(drdOddbufB[31]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[7]),
        .O(\gr[11]_i_24_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2928" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \gr[11]_i_25 
       (.I0(drdOddbufB[47]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[23]),
        .O(\gr[11]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr[11]_i_26 
       (.I0(drdOddbufB[61]),
        .I1(drdOddbufB[37]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[13]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[53]),
        .O(\gr[11]_i_26_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2926" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \gr[11]_i_27 
       (.I0(drdOddbufB[29]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[5]),
        .O(\gr[11]_i_27_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2926" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \gr[11]_i_28 
       (.I0(drdOddbufB[45]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[21]),
        .O(\gr[11]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr[11]_i_29 
       (.I0(drdOddbufB[60]),
        .I1(drdOddbufB[36]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[12]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[52]),
        .O(\gr[11]_i_29_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2925" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \gr[11]_i_30 
       (.I0(drdOddbufB[28]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[4]),
        .O(\gr[11]_i_30_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2925" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \gr[11]_i_31 
       (.I0(drdOddbufB[44]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[20]),
        .O(\gr[11]_i_31_n_0 ));
  LUT5 #(
    .INIT(32'h69FF0069)) 
    \gr[11]_i_4 
       (.I0(p_0_in[11]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[11]_i_2_n_0 ),
        .I2(\qrs_reg[1]_2 ),
        .I3(\gr_reg[11]_i_3_3 ),
        .I4(\gr[11]_i_15_n_0 ),
        .O(\gr[11]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h002B2BFF)) 
    \gr[11]_i_5 
       (.I0(p_0_in[9]),
        .I1(\qrs_reg[1]_1 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[9]_i_2_n_0 ),
        .I3(\gr_reg[11]_i_3_2 ),
        .I4(\gr[11]_i_17_n_0 ),
        .O(\gr[11]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hB200FFB2)) 
    \gr[11]_i_6 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[8]_i_2_n_0 ),
        .I1(\qrs_reg[1] ),
        .I2(p_0_in[8]),
        .I3(\gr[11]_i_19_n_0 ),
        .I4(\gr_reg[11]_i_3_1 ),
        .O(\gr[11]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h6900FF69)) 
    \gr[11]_i_7 
       (.I0(\qrs_reg[1] ),
        .I1(p_0_in[8]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[8]_i_2_n_0 ),
        .I3(\gr[11]_i_20_n_0 ),
        .I4(\gr_reg[11]_i_3_0 ),
        .O(\gr[11]_i_7_n_0 ));
  LUT3 #(
    .INIT(8'hB2)) 
    \gr[11]_i_8 
       (.I0(\gr[11]_i_21_n_0 ),
        .I1(\gr_reg[5]_i_2_4 ),
        .I2(\gr[11]_i_22_n_0 ),
        .O(\gr[11]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'hE7718EE7)) 
    \gr[11]_i_9 
       (.I0(p_0_in[11]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[11]_i_2_n_0 ),
        .I2(\qrs_reg[1]_2 ),
        .I3(\gr_reg[11]_i_3_3 ),
        .I4(\gr[11]_i_15_n_0 ),
        .O(\gr[11]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2942" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[1]_i_1 
       (.I0(gr0[3]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [1]));
  (* SOFT_HLUTNM = "soft_lutpair2941" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[2]_i_1 
       (.I0(gr0[4]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [2]));
  (* SOFT_HLUTNM = "soft_lutpair2941" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[3]_i_1 
       (.I0(gr0[5]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [3]));
  (* SOFT_HLUTNM = "soft_lutpair2940" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[4]_i_1 
       (.I0(gr0[6]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [4]));
  (* SOFT_HLUTNM = "soft_lutpair2940" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[5]_i_1 
       (.I0(gr0[7]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [5]));
  LUT6 #(
    .INIT(64'h2BD4D42BD42B2BD4)) 
    \gr[5]_i_10 
       (.I0(\gr[5]_i_18_n_0 ),
        .I1(\gr_reg[5]_i_2_3 ),
        .I2(\gr[5]_i_19_n_0 ),
        .I3(\gr[11]_i_21_n_0 ),
        .I4(\gr_reg[5]_i_2_4 ),
        .I5(\gr[11]_i_22_n_0 ),
        .O(\gr[5]_i_10_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \gr[5]_i_11 
       (.I0(\gr[5]_i_4_n_0 ),
        .I1(\gr[5]_i_18_n_0 ),
        .I2(\gr_reg[5]_i_2_3 ),
        .I3(\gr[5]_i_19_n_0 ),
        .O(\gr[5]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h4DB2B24DB24D4DB2)) 
    \gr[5]_i_12 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[4]_i_2_n_0 ),
        .I1(\qrs_reg[1]_0 ),
        .I2(p_0_in[4]),
        .I3(\gr[5]_i_5_n_0 ),
        .I4(\gr_reg[5]_i_2_0 ),
        .I5(\gr[5]_i_21_n_0 ),
        .O(\gr[5]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \gr[5]_i_13 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[4]_i_2_n_0 ),
        .I1(\qrs_reg[1]_0 ),
        .I2(p_0_in[4]),
        .I3(\gr[5]_i_6_n_0 ),
        .I4(\gr[5]_i_22_n_0 ),
        .I5(\gr_reg[5]_i_2_1 ),
        .O(\gr[5]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h718E8E718E71718E)) 
    \gr[5]_i_14 
       (.I0(p_0_in[2]),
        .I1(p_1_in[0]),
        .I2(\rgbToManyAXIS_tdata_sig[2]_i_2_n_0 ),
        .I3(\gr[5]_i_7_n_0 ),
        .I4(\gr_reg[5]_i_2_5 ),
        .I5(\gr[5]_i_24_n_0 ),
        .O(\gr[5]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h00FFCA35CA35FF00)) 
    \gr[5]_i_16 
       (.I0(\gr[5]_i_27_n_0 ),
        .I1(\gr[5]_i_28_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I3(\gr[5]_i_9_n_0 ),
        .I4(p_0_in[0]),
        .I5(p_2_in),
        .O(\gr[5]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'hCA3535CA35CACA35)) 
    \gr[5]_i_17 
       (.I0(\gr[5]_i_27_n_0 ),
        .I1(\gr[5]_i_28_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I3(p_0_in[0]),
        .I4(p_2_in),
        .I5(p_3_in[0]),
        .O(\gr[5]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2917" *) 
  LUT3 #(
    .INIT(8'hB2)) 
    \gr[5]_i_18 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[5]_i_2_n_0 ),
        .I1(\qrs_reg[1]_4 ),
        .I2(p_0_in[5]),
        .O(\gr[5]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2921" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \gr[5]_i_19 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[6]_i_2_n_0 ),
        .I1(\qrs_reg[1]_6 ),
        .I2(p_0_in[6]),
        .O(\gr[5]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h5530553F)) 
    \gr[5]_i_20 
       (.I0(\gr[5]_i_29_n_0 ),
        .I1(\gr[5]_i_30_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I4(\gr[5]_i_31_n_0 ),
        .O(\qrs_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2917" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \gr[5]_i_21 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[5]_i_2_n_0 ),
        .I1(\qrs_reg[1]_4 ),
        .I2(p_0_in[5]),
        .O(\gr[5]_i_21_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2923" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \gr[5]_i_22 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[3]_i_2_n_0 ),
        .I1(p_0_in[3]),
        .I2(p_1_in[1]),
        .O(\gr[5]_i_22_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2923" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \gr[5]_i_24 
       (.I0(p_1_in[1]),
        .I1(p_0_in[3]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[3]_i_2_n_0 ),
        .O(\gr[5]_i_24_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2916" *) 
  LUT3 #(
    .INIT(8'hCA)) 
    \gr[5]_i_25 
       (.I0(\gr[5]_i_34_n_0 ),
        .I1(\gr[5]_i_35_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .O(\qrs_reg[2]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2919" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \gr[5]_i_26 
       (.I0(\rgbToManyAXIS_tdata_sig[2]_i_2_n_0 ),
        .I1(p_1_in[0]),
        .I2(p_0_in[2]),
        .O(\qrs_reg[2]_2 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \gr[5]_i_27 
       (.I0(drdOddbufB[20]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [12]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[36]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[12]),
        .O(\gr[5]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \gr[5]_i_28 
       (.I0(drdOddbufB[52]),
        .I1(drdOddbufB[28]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[4]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[44]),
        .O(\gr[5]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr[5]_i_29 
       (.I0(drdOddbufB[56]),
        .I1(drdOddbufB[32]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[8]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[48]),
        .O(\gr[5]_i_29_n_0 ));
  LUT3 #(
    .INIT(8'h2B)) 
    \gr[5]_i_3 
       (.I0(\gr[5]_i_18_n_0 ),
        .I1(\gr_reg[5]_i_2_3 ),
        .I2(\gr[5]_i_19_n_0 ),
        .O(\gr[5]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2914" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \gr[5]_i_30 
       (.I0(drdOddbufB[24]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[0]),
        .O(\gr[5]_i_30_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2914" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \gr[5]_i_31 
       (.I0(drdOddbufB[40]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[16]),
        .O(\gr[5]_i_31_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr[5]_i_32 
       (.I0(drdOddbufB[22]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [14]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[38]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[14]),
        .O(\gr[5]_i_32_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \gr[5]_i_33 
       (.I0(drdOddbufB[54]),
        .I1(drdOddbufB[30]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[6]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[46]),
        .O(\gr[5]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \gr[5]_i_34 
       (.I0(drdOddbufB[21]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [13]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[37]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[13]),
        .O(\gr[5]_i_34_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \gr[5]_i_35 
       (.I0(drdOddbufB[53]),
        .I1(drdOddbufB[29]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[5]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[45]),
        .O(\gr[5]_i_35_n_0 ));
  LUT5 #(
    .INIT(32'h00B2B2FF)) 
    \gr[5]_i_4 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[4]_i_2_n_0 ),
        .I1(\qrs_reg[1]_0 ),
        .I2(p_0_in[4]),
        .I3(\gr_reg[5]_i_2_0 ),
        .I4(\gr[5]_i_21_n_0 ),
        .O(\gr[5]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h69FF0069)) 
    \gr[5]_i_5 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[4]_i_2_n_0 ),
        .I1(\qrs_reg[1]_0 ),
        .I2(p_0_in[4]),
        .I3(\gr_reg[5]_i_2_1 ),
        .I4(\gr[5]_i_22_n_0 ),
        .O(\gr[5]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hFF8E8E00)) 
    \gr[5]_i_6 
       (.I0(p_0_in[2]),
        .I1(p_1_in[0]),
        .I2(\rgbToManyAXIS_tdata_sig[2]_i_2_n_0 ),
        .I3(\gr_reg[5]_i_2_5 ),
        .I4(\gr[5]_i_24_n_0 ),
        .O(\gr[5]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h002B2BFF)) 
    \gr[5]_i_7 
       (.I0(p_0_in[1]),
        .I1(\qrs_reg[2]_1 ),
        .I2(\qrs_reg[2]_0 ),
        .I3(\gr_reg[5]_i_2_2 ),
        .I4(\qrs_reg[2]_2 ),
        .O(\gr[5]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h2BD4D42B)) 
    \gr[5]_i_8 
       (.I0(p_0_in[1]),
        .I1(\qrs_reg[2]_1 ),
        .I2(\qrs_reg[2]_0 ),
        .I3(\qrs_reg[2]_2 ),
        .I4(\gr_reg[5]_i_2_2 ),
        .O(\gr[5]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h6996)) 
    \gr[5]_i_9 
       (.I0(\qrs_reg[2]_0 ),
        .I1(\qrs_reg[2]_1 ),
        .I2(p_0_in[1]),
        .I3(p_3_in[1]),
        .O(\gr[5]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2939" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[6]_i_1 
       (.I0(gr0[8]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [6]));
  (* SOFT_HLUTNM = "soft_lutpair2939" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[7]_i_1 
       (.I0(gr0[9]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [7]));
  (* SOFT_HLUTNM = "soft_lutpair2938" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[8]_i_1 
       (.I0(gr0[10]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [8]));
  (* SOFT_HLUTNM = "soft_lutpair2938" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \gr[9]_i_1 
       (.I0(gr0[11]),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(\FSM_sequential_stateRgbegr_reg[1] [9]));
  CARRY8 \gr_reg[11]_i_3 
       (.CI(\gr_reg[5]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_gr_reg[11]_i_3_CO_UNCONNECTED [7:6],gr0[13],\NLW_gr_reg[11]_i_3_CO_UNCONNECTED [4],\gr_reg[11]_i_3_n_4 ,\gr_reg[11]_i_3_n_5 ,\gr_reg[11]_i_3_n_6 ,\gr_reg[11]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,\gr[11]_i_4_n_0 ,\gr[11]_i_5_n_0 ,\gr[11]_i_6_n_0 ,\gr[11]_i_7_n_0 ,\gr[11]_i_8_n_0 }),
        .O({\NLW_gr_reg[11]_i_3_O_UNCONNECTED [7:5],gr0[12:8]}),
        .S({1'b0,1'b0,1'b1,\gr[11]_i_9_n_0 ,\gr[11]_i_10_n_0 ,\gr[11]_i_11_n_0 ,\gr[11]_i_12_n_0 ,\gr[11]_i_13_n_0 }));
  CARRY8 \gr_reg[5]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\gr_reg[5]_i_2_n_0 ,\gr_reg[5]_i_2_n_1 ,\gr_reg[5]_i_2_n_2 ,\gr_reg[5]_i_2_n_3 ,\gr_reg[5]_i_2_n_4 ,\gr_reg[5]_i_2_n_5 ,\gr_reg[5]_i_2_n_6 ,\gr_reg[5]_i_2_n_7 }),
        .DI({\gr[5]_i_3_n_0 ,\gr[5]_i_4_n_0 ,\gr[5]_i_5_n_0 ,\gr[5]_i_6_n_0 ,\gr[5]_i_7_n_0 ,\gr[5]_i_8_n_0 ,\gr[5]_i_9_n_0 ,p_3_in[0]}),
        .O({gr0[7:2],\NLW_gr_reg[5]_i_2_O_UNCONNECTED [1:0]}),
        .S({\gr[5]_i_10_n_0 ,\gr[5]_i_11_n_0 ,\gr[5]_i_12_n_0 ,\gr[5]_i_13_n_0 ,\gr[5]_i_14_n_0 ,S,\gr[5]_i_16_n_0 ,\gr[5]_i_17_n_0 }));
  MUXF7 \gr_reg[5]_i_23 
       (.I0(\gr[5]_i_32_n_0 ),
        .I1(\gr[5]_i_33_n_0 ),
        .O(p_1_in[0]),
        .S(\rgbToManyAXIS_tdata_sig_reg[7] [2]));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size6kB_a64b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size6kB_a64b64__3 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[63:0]),
        .doutb(drdOddbufB),
        .ena(myMnfcore_i_1__10_n_0),
        .enb(enEobufB),
        .wea(1'b1),
        .web(1'b0));
  LUT2 #(
    .INIT(4'h8)) 
    myMnfcore_i_1__10
       (.I0(oddNotEven),
        .I1(enEobuf),
        .O(myMnfcore_i_1__10_n_0));
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[0]_i_1 
       (.I0(p_2_in),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[0]_i_3 
       (.I0(drdOddbufB[8]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [0]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[24]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[0]),
        .O(\rgbToManyAXIS_tdata_sig[0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[0]_i_4 
       (.I0(drdOddbufB[40]),
        .I1(drdOddbufB[16]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7]_0 [8]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[32]),
        .O(\rgbToManyAXIS_tdata_sig[0]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2943" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[10]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[10]_i_2_n_0 ),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(D[10]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[10]_i_3 
       (.I0(drdOddbufB[18]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [10]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[34]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[10]),
        .O(\rgbToManyAXIS_tdata_sig[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[10]_i_4 
       (.I0(drdOddbufB[50]),
        .I1(drdOddbufB[26]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[2]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[42]),
        .O(\rgbToManyAXIS_tdata_sig[10]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2943" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[11]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[11]_i_2_n_0 ),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(D[11]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[11]_i_3 
       (.I0(drdOddbufB[19]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [11]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[35]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[11]),
        .O(\rgbToManyAXIS_tdata_sig[11]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[11]_i_4 
       (.I0(drdOddbufB[51]),
        .I1(drdOddbufB[27]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[3]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[43]),
        .O(\rgbToManyAXIS_tdata_sig[11]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'hCA35)) 
    \rgbToManyAXIS_tdata_sig[18]_i_18 
       (.I0(\gr[5]_i_27_n_0 ),
        .I1(\gr[5]_i_28_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I3(p_0_in[0]),
        .O(\qrs_reg[2] ));
  LUT5 #(
    .INIT(32'h5530553F)) 
    \rgbToManyAXIS_tdata_sig[18]_i_35 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_39_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_40_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_41_n_0 ),
        .O(\qrs_reg[1]_3 ));
  LUT5 #(
    .INIT(32'h5530553F)) 
    \rgbToManyAXIS_tdata_sig[18]_i_36 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_42_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_43_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_44_n_0 ),
        .O(\qrs_reg[1]_6 ));
  LUT5 #(
    .INIT(32'h5530553F)) 
    \rgbToManyAXIS_tdata_sig[18]_i_37 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_45_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_46_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_47_n_0 ),
        .O(\qrs_reg[1]_4 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_39 
       (.I0(drdOddbufB[59]),
        .I1(drdOddbufB[35]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[11]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[51]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_39_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2924" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[18]_i_40 
       (.I0(drdOddbufB[27]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[3]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_40_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2924" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[18]_i_41 
       (.I0(drdOddbufB[43]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[19]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_42 
       (.I0(drdOddbufB[58]),
        .I1(drdOddbufB[34]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[10]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[50]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_42_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2922" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[18]_i_43 
       (.I0(drdOddbufB[26]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[2]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_43_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2922" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[18]_i_44 
       (.I0(drdOddbufB[42]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[18]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_44_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_45 
       (.I0(drdOddbufB[57]),
        .I1(drdOddbufB[33]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[9]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[49]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_45_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2918" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[18]_i_46 
       (.I0(drdOddbufB[25]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[1]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_46_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2918" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[18]_i_47 
       (.I0(drdOddbufB[41]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[17]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_47_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_48 
       (.I0(drdOddbufB[23]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [15]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[39]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[15]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_48_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_49 
       (.I0(drdOddbufB[55]),
        .I1(drdOddbufB[31]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[7]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[47]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_49_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2946" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[1]_i_1 
       (.I0(\drdOddbufBm1_reg[63] [1]),
        .I1(\drdOddbufBm1_reg[63] [0]),
        .I2(\qrs_reg[2]_0 ),
        .O(D[1]));
  (* SOFT_HLUTNM = "soft_lutpair2916" *) 
  LUT3 #(
    .INIT(8'hCA)) 
    \rgbToManyAXIS_tdata_sig[1]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[1]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[1]_i_4_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .O(\qrs_reg[2]_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \rgbToManyAXIS_tdata_sig[1]_i_3 
       (.I0(drdOddbufB[25]),
        .I1(drdOddbufB[1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[9]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(\rgbToManyAXIS_tdata_sig_reg[7]_0 [1]),
        .O(\rgbToManyAXIS_tdata_sig[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \rgbToManyAXIS_tdata_sig[1]_i_4 
       (.I0(drdOddbufB[41]),
        .I1(drdOddbufB[17]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7]_0 [9]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[33]),
        .O(\rgbToManyAXIS_tdata_sig[1]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h5530553F)) 
    \rgbToManyAXIS_tdata_sig[23]_i_27 
       (.I0(\rgbToManyAXIS_tdata_sig[23]_i_28_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[23]_i_29_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I4(\rgbToManyAXIS_tdata_sig[23]_i_30_n_0 ),
        .O(\qrs_reg[1]_5 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_28 
       (.I0(drdOddbufB[62]),
        .I1(drdOddbufB[38]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[14]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[54]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_28_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2927" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[23]_i_29 
       (.I0(drdOddbufB[30]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[6]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_29_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2927" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[23]_i_30 
       (.I0(drdOddbufB[46]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I2(drdOddbufB[22]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_30_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2919" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[2]_i_1 
       (.I0(\drdOddbufBm1_reg[63] [1]),
        .I1(\drdOddbufBm1_reg[63] [0]),
        .I2(\rgbToManyAXIS_tdata_sig[2]_i_2_n_0 ),
        .O(D[2]));
  LUT3 #(
    .INIT(8'h1D)) 
    \rgbToManyAXIS_tdata_sig[2]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[2]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I2(\rgbToManyAXIS_tdata_sig[2]_i_4_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[2]_i_3 
       (.I0(drdOddbufB[10]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [2]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[26]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[2]),
        .O(\rgbToManyAXIS_tdata_sig[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[2]_i_4 
       (.I0(drdOddbufB[42]),
        .I1(drdOddbufB[18]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7]_0 [10]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[34]),
        .O(\rgbToManyAXIS_tdata_sig[2]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2946" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[3]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[3]_i_2_n_0 ),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[3]_i_3 
       (.I0(drdOddbufB[11]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [3]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[27]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[3]),
        .O(\rgbToManyAXIS_tdata_sig[3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[3]_i_4 
       (.I0(drdOddbufB[43]),
        .I1(drdOddbufB[19]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7]_0 [11]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[35]),
        .O(\rgbToManyAXIS_tdata_sig[3]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2945" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[4]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[4]_i_2_n_0 ),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[4]_i_3 
       (.I0(drdOddbufB[12]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [4]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[28]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[4]),
        .O(\rgbToManyAXIS_tdata_sig[4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[4]_i_4 
       (.I0(drdOddbufB[44]),
        .I1(drdOddbufB[20]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7]_0 [12]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[36]),
        .O(\rgbToManyAXIS_tdata_sig[4]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2945" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[5]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[5]_i_2_n_0 ),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[5]_i_3 
       (.I0(drdOddbufB[13]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [5]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[29]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[5]),
        .O(\rgbToManyAXIS_tdata_sig[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[5]_i_4 
       (.I0(drdOddbufB[45]),
        .I1(drdOddbufB[21]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7]_0 [13]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[37]),
        .O(\rgbToManyAXIS_tdata_sig[5]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2944" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[6]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[6]_i_2_n_0 ),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[6]_i_3 
       (.I0(drdOddbufB[14]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [6]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[30]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[6]),
        .O(\rgbToManyAXIS_tdata_sig[6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[6]_i_4 
       (.I0(drdOddbufB[46]),
        .I1(drdOddbufB[22]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7]_0 [14]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[38]),
        .O(\rgbToManyAXIS_tdata_sig[6]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hB8B8B800)) 
    \rgbToManyAXIS_tdata_sig[7]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig[7]_i_2_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7] [2]),
        .I2(\rgbToManyAXIS_tdata_sig[7]_i_3_n_0 ),
        .I3(\drdOddbufBm1_reg[63] [1]),
        .I4(\drdOddbufBm1_reg[63] [0]),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[7]_i_2 
       (.I0(drdOddbufB[47]),
        .I1(drdOddbufB[23]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[7]_0 [15]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[39]),
        .O(\rgbToManyAXIS_tdata_sig[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[7]_i_3 
       (.I0(drdOddbufB[15]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [7]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[31]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[7]),
        .O(\rgbToManyAXIS_tdata_sig[7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2944" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[8]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[8]_i_2_n_0 ),
        .I1(\drdOddbufBm1_reg[63] [1]),
        .I2(\drdOddbufBm1_reg[63] [0]),
        .O(D[8]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[8]_i_3 
       (.I0(drdOddbufB[16]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [8]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[32]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[8]),
        .O(\rgbToManyAXIS_tdata_sig[8]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[8]_i_4 
       (.I0(drdOddbufB[48]),
        .I1(drdOddbufB[24]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[0]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[40]),
        .O(\rgbToManyAXIS_tdata_sig[8]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2915" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[9]_i_1 
       (.I0(\drdOddbufBm1_reg[63] [1]),
        .I1(\drdOddbufBm1_reg[63] [0]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[9]_i_2_n_0 ),
        .O(D[9]));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \rgbToManyAXIS_tdata_sig[9]_i_3 
       (.I0(drdOddbufB[17]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[7]_0 [9]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[33]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[9]),
        .O(\rgbToManyAXIS_tdata_sig[9]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \rgbToManyAXIS_tdata_sig[9]_i_4 
       (.I0(drdOddbufB[1]),
        .I1(drdOddbufB[41]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[7] [1]),
        .I3(drdOddbufB[49]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[7] [0]),
        .I5(drdOddbufB[25]),
        .O(\rgbToManyAXIS_tdata_sig[9]_i_4_n_0 ));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[0]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[0]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[0]_i_4_n_0 ),
        .O(p_2_in),
        .S(\rgbToManyAXIS_tdata_sig_reg[7] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[10]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[10]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[10]_i_4_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[10]_i_2_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[7] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[11]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[11]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[11]_i_4_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[11]_i_2_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[7] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[18]_i_38 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_48_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_49_n_0 ),
        .O(p_1_in[1]),
        .S(\rgbToManyAXIS_tdata_sig_reg[7] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[3]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[3]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[3]_i_4_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[3]_i_2_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[7] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[4]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[4]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[4]_i_4_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[4]_i_2_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[7] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[5]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[5]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[5]_i_4_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[5]_i_2_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[7] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[6]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[6]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[6]_i_4_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[6]_i_2_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[7] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[8]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[8]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[8]_i_4_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[8]_i_2_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[7] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[9]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[9]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[9]_i_4_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[9]_i_2_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[7] [2]));
endmodule

(* ORIG_REF_NAME = "Dpbram_size6kB_a64b64" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size6kB_a64b64__xdcDup__1
   (doutb,
    p_0_in,
    S,
    \qrs_reg[2] ,
    p_3_in,
    \qrs_reg[1] ,
    \qrs_reg[1]_0 ,
    \qrs_reg[1]_1 ,
    \qrs_reg[2]_0 ,
    \qrs_reg[1]_2 ,
    \qrs_reg[1]_3 ,
    \qrs_reg[1]_4 ,
    \qrs_reg[2]_1 ,
    \qrs_reg[1]_5 ,
    D,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ,
    enEobuf,
    oddNotEven,
    \rgbToManyAXIS_tdata_sig_reg[23]_i_2_0 ,
    \rgbToManyAXIS_tdata_sig_reg[18]_i_2_0 ,
    \rgbToManyAXIS_tdata_sig_reg[23]_i_2_1 ,
    \gr_reg[5]_i_2 ,
    \rgbToManyAXIS_tdata_sig_reg[18]_i_2_1 ,
    \rgbToManyAXIS_tdata_sig_reg[23]_i_2_2 ,
    \rgbToManyAXIS_tdata_sig_reg[18]_i_2_2 ,
    \rgbToManyAXIS_tdata_sig_reg[23]_i_2_3 ,
    \rgbToManyAXIS_tdata_sig_reg[18]_i_2_3 ,
    \gr_reg[5]_i_2_0 ,
    \gr_reg[5]_i_2_1 ,
    enEobufB,
    \rgbToManyAXIS_tdata_sig_reg[28] ,
    \rgbToManyAXIS_tdata_sig[35]_i_2_0 ,
    \rgbToManyAXIS_tdata_sig[18]_i_3_0 ,
    \rgbToManyAXIS_tdata_sig_reg[35] ,
    \rgbToManyAXIS_tdata_sig_reg[18] ,
    p_1_in);
  output [15:0]doutb;
  output [11:0]p_0_in;
  output [0:0]S;
  output \qrs_reg[2] ;
  output [1:0]p_3_in;
  output \qrs_reg[1] ;
  output \qrs_reg[1]_0 ;
  output \qrs_reg[1]_1 ;
  output \qrs_reg[2]_0 ;
  output \qrs_reg[1]_2 ;
  output \qrs_reg[1]_3 ;
  output \qrs_reg[1]_4 ;
  output \qrs_reg[2]_1 ;
  output \qrs_reg[1]_5 ;
  output [23:0]D;
  input aclk_sig;
  input [9:0]Q;
  input [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input [9:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  input enEobuf;
  input oddNotEven;
  input \rgbToManyAXIS_tdata_sig_reg[23]_i_2_0 ;
  input \rgbToManyAXIS_tdata_sig_reg[18]_i_2_0 ;
  input \rgbToManyAXIS_tdata_sig_reg[23]_i_2_1 ;
  input \gr_reg[5]_i_2 ;
  input \rgbToManyAXIS_tdata_sig_reg[18]_i_2_1 ;
  input \rgbToManyAXIS_tdata_sig_reg[23]_i_2_2 ;
  input \rgbToManyAXIS_tdata_sig_reg[18]_i_2_2 ;
  input \rgbToManyAXIS_tdata_sig_reg[23]_i_2_3 ;
  input \rgbToManyAXIS_tdata_sig_reg[18]_i_2_3 ;
  input \gr_reg[5]_i_2_0 ;
  input \gr_reg[5]_i_2_1 ;
  input enEobufB;
  input [2:0]\rgbToManyAXIS_tdata_sig_reg[28] ;
  input [63:0]\rgbToManyAXIS_tdata_sig[35]_i_2_0 ;
  input [15:0]\rgbToManyAXIS_tdata_sig[18]_i_3_0 ;
  input [1:0]\rgbToManyAXIS_tdata_sig_reg[35] ;
  input [0:0]\rgbToManyAXIS_tdata_sig_reg[18] ;
  input [1:0]p_1_in;

  wire [23:0]D;
  wire [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [9:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [9:0]Q;
  wire [0:0]S;
  wire aclk_sig;
  wire [15:0]doutb;
  wire [47:0]drdEvenAbufB;
  wire enB7_out;
  wire enEobuf;
  wire enEobufB;
  wire \gr_reg[5]_i_2 ;
  wire \gr_reg[5]_i_2_0 ;
  wire \gr_reg[5]_i_2_1 ;
  wire myMnfcore_i_1__17_n_0;
  wire oddNotEven;
  wire [11:0]p_0_in;
  wire [1:0]p_1_in;
  wire [1:0]p_3_in;
  wire \qrs_reg[1] ;
  wire \qrs_reg[1]_0 ;
  wire \qrs_reg[1]_1 ;
  wire \qrs_reg[1]_2 ;
  wire \qrs_reg[1]_3 ;
  wire \qrs_reg[1]_4 ;
  wire \qrs_reg[1]_5 ;
  wire \qrs_reg[2] ;
  wire \qrs_reg[2]_0 ;
  wire \qrs_reg[2]_1 ;
  wire [12:1]rgbToManyAXIS_tdata_sig0;
  wire \rgbToManyAXIS_tdata_sig[18]_i_11_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_12_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_13_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_14_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_15_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_16_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_17_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_19_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_20_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_21_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_22_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_23_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_24_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_25_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_26_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_27_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_28_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_29_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_30_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_31_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_32_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_33_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[18]_i_34_n_0 ;
  wire [15:0]\rgbToManyAXIS_tdata_sig[18]_i_3_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_10_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_11_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_12_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_13_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_14_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_15_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_16_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_17_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_18_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_19_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_20_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_21_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_22_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_23_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_24_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_25_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_26_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_7_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_8_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[23]_i_9_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[24]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[24]_i_6_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[24]_i_7_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[24]_i_8_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[25]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[25]_i_6_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[25]_i_7_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[25]_i_8_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[26]_i_10_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[26]_i_11_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[26]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[26]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[26]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[26]_i_6_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[26]_i_7_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[26]_i_8_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[26]_i_9_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[27]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[27]_i_6_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[27]_i_7_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[27]_i_8_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[28]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[28]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[28]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[28]_i_6_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[29]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[29]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[29]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[29]_i_6_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[30]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[30]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[30]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[30]_i_6_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[31]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[31]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[31]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[31]_i_6_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[32]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[32]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[32]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[32]_i_6_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[32]_i_7_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[33]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[33]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[33]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[33]_i_6_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[34]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[34]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[34]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[34]_i_6_n_0 ;
  wire [63:0]\rgbToManyAXIS_tdata_sig[35]_i_2_0 ;
  wire \rgbToManyAXIS_tdata_sig[35]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[35]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[35]_i_5_n_0 ;
  wire \rgbToManyAXIS_tdata_sig[35]_i_6_n_0 ;
  wire [0:0]\rgbToManyAXIS_tdata_sig_reg[18] ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_1 ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_2 ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_3 ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_1 ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_2 ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_3 ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_4 ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_5 ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_6 ;
  wire \rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_7 ;
  wire \rgbToManyAXIS_tdata_sig_reg[23]_i_2_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[23]_i_2_1 ;
  wire \rgbToManyAXIS_tdata_sig_reg[23]_i_2_2 ;
  wire \rgbToManyAXIS_tdata_sig_reg[23]_i_2_3 ;
  wire \rgbToManyAXIS_tdata_sig_reg[23]_i_2_n_5 ;
  wire \rgbToManyAXIS_tdata_sig_reg[23]_i_2_n_6 ;
  wire \rgbToManyAXIS_tdata_sig_reg[23]_i_2_n_7 ;
  wire \rgbToManyAXIS_tdata_sig_reg[24]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[24]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[25]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[25]_i_4_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[27]_i_3_n_0 ;
  wire \rgbToManyAXIS_tdata_sig_reg[27]_i_4_n_0 ;
  wire [2:0]\rgbToManyAXIS_tdata_sig_reg[28] ;
  wire [1:0]\rgbToManyAXIS_tdata_sig_reg[35] ;
  wire [63:0]NLW_myMnfcore_douta_UNCONNECTED;
  wire [0:0]\NLW_rgbToManyAXIS_tdata_sig_reg[18]_i_2_O_UNCONNECTED ;
  wire [7:3]\NLW_rgbToManyAXIS_tdata_sig_reg[23]_i_2_CO_UNCONNECTED ;
  wire [7:4]\NLW_rgbToManyAXIS_tdata_sig_reg[23]_i_2_O_UNCONNECTED ;

  LUT6 #(
    .INIT(64'hBD4242BD2BD4D42B)) 
    \gr[5]_i_15 
       (.I0(p_0_in[1]),
        .I1(\gr_reg[5]_i_2 ),
        .I2(\gr_reg[5]_i_2_0 ),
        .I3(\gr_reg[5]_i_2_1 ),
        .I4(\qrs_reg[2] ),
        .I5(p_3_in[1]),
        .O(S));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size6kB_a64b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size6kB_a64b64 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[63:0]),
        .doutb({doutb,drdEvenAbufB}),
        .ena(myMnfcore_i_1__17_n_0),
        .enb(enB7_out),
        .wea(1'b1),
        .web(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair2897" *) 
  LUT3 #(
    .INIT(8'h04)) 
    myMnfcore_i_1__17
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I1(enEobuf),
        .I2(oddNotEven),
        .O(myMnfcore_i_1__17_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2897" *) 
  LUT2 #(
    .INIT(4'h8)) 
    myMnfcore_i_2__4
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I1(enEobufB),
        .O(enB7_out));
  (* SOFT_HLUTNM = "soft_lutpair2911" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[12]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[1]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[0]));
  (* SOFT_HLUTNM = "soft_lutpair2911" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[13]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[2]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[1]));
  (* SOFT_HLUTNM = "soft_lutpair2910" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[14]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[3]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[2]));
  (* SOFT_HLUTNM = "soft_lutpair2910" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[15]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[4]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[3]));
  (* SOFT_HLUTNM = "soft_lutpair2909" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[16]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[5]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[4]));
  (* SOFT_HLUTNM = "soft_lutpair2909" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[17]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[6]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[5]));
  (* SOFT_HLUTNM = "soft_lutpair2908" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[18]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[7]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_10 
       (.I0(\rgbToManyAXIS_tdata_sig[28]_i_6_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_33_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[18]_i_34_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[28]_i_5_n_0 ),
        .O(p_0_in[0]));
  LUT2 #(
    .INIT(4'h9)) 
    \rgbToManyAXIS_tdata_sig[18]_i_11 
       (.I0(p_0_in[7]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[18]_i_2_3 ),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_11_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \rgbToManyAXIS_tdata_sig[18]_i_12 
       (.I0(p_0_in[6]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[18]_i_2_2 ),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \rgbToManyAXIS_tdata_sig[18]_i_13 
       (.I0(p_0_in[5]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[18]_i_2_1 ),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_13_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \rgbToManyAXIS_tdata_sig[18]_i_14 
       (.I0(p_0_in[4]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[18]_i_2_0 ),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \rgbToManyAXIS_tdata_sig[18]_i_15 
       (.I0(p_0_in[3]),
        .I1(p_1_in[1]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_15_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \rgbToManyAXIS_tdata_sig[18]_i_16 
       (.I0(p_0_in[2]),
        .I1(p_1_in[0]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \rgbToManyAXIS_tdata_sig[18]_i_17 
       (.I0(p_0_in[1]),
        .I1(\gr_reg[5]_i_2 ),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_17_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rgbToManyAXIS_tdata_sig[18]_i_19 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [15]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I2(drdEvenAbufB[39]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I4(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [39]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[18]_i_20 
       (.I0(drdEvenAbufB[15]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [15]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [7]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2895" *) 
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rgbToManyAXIS_tdata_sig[18]_i_21 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [14]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I2(drdEvenAbufB[38]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I4(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [38]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_21_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2896" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[18]_i_22 
       (.I0(drdEvenAbufB[14]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [14]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [6]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_22_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rgbToManyAXIS_tdata_sig[18]_i_23 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [13]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I2(drdEvenAbufB[37]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I4(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [37]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_23_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[18]_i_24 
       (.I0(drdEvenAbufB[13]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [13]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [5]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rgbToManyAXIS_tdata_sig[18]_i_25 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [12]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I2(drdEvenAbufB[36]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I4(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [36]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_25_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2894" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[18]_i_26 
       (.I0(drdEvenAbufB[12]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [12]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [4]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_26_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rgbToManyAXIS_tdata_sig[18]_i_27 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [11]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I2(drdEvenAbufB[35]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I4(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [35]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_27_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[18]_i_28 
       (.I0(drdEvenAbufB[11]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [11]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [3]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_28_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rgbToManyAXIS_tdata_sig[18]_i_29 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [10]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I2(drdEvenAbufB[34]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I4(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [34]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_3 
       (.I0(\rgbToManyAXIS_tdata_sig[35]_i_6_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_19_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[18]_i_20_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_5_n_0 ),
        .O(p_0_in[7]));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[18]_i_30 
       (.I0(drdEvenAbufB[10]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [10]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [2]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_30_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rgbToManyAXIS_tdata_sig[18]_i_31 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [9]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I2(drdEvenAbufB[33]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I4(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [33]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_31_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[18]_i_32 
       (.I0(drdEvenAbufB[9]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [9]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [1]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_32_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \rgbToManyAXIS_tdata_sig[18]_i_33 
       (.I0(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [8]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I2(drdEvenAbufB[32]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I4(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [32]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_33_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[18]_i_34 
       (.I0(drdEvenAbufB[8]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [8]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [0]),
        .O(\rgbToManyAXIS_tdata_sig[18]_i_34_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_4 
       (.I0(\rgbToManyAXIS_tdata_sig[34]_i_6_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_21_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[18]_i_22_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[34]_i_5_n_0 ),
        .O(p_0_in[6]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_5 
       (.I0(\rgbToManyAXIS_tdata_sig[33]_i_6_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_23_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[18]_i_24_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[33]_i_5_n_0 ),
        .O(p_0_in[5]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_6 
       (.I0(\rgbToManyAXIS_tdata_sig[32]_i_5_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_25_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[18]_i_26_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[32]_i_6_n_0 ),
        .O(p_0_in[4]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_7 
       (.I0(\rgbToManyAXIS_tdata_sig[31]_i_6_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_27_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[18]_i_28_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[31]_i_5_n_0 ),
        .O(p_0_in[3]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_8 
       (.I0(\rgbToManyAXIS_tdata_sig[30]_i_6_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_29_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[18]_i_30_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[30]_i_5_n_0 ),
        .O(p_0_in[2]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[18]_i_9 
       (.I0(\rgbToManyAXIS_tdata_sig[29]_i_6_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[18]_i_31_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[18]_i_32_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[29]_i_5_n_0 ),
        .O(p_0_in[1]));
  (* SOFT_HLUTNM = "soft_lutpair2908" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[19]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[8]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[7]));
  (* SOFT_HLUTNM = "soft_lutpair2907" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[20]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[9]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[8]));
  (* SOFT_HLUTNM = "soft_lutpair2907" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[21]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[10]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[9]));
  (* SOFT_HLUTNM = "soft_lutpair2906" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[22]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[11]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[10]));
  (* SOFT_HLUTNM = "soft_lutpair2906" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[23]_i_1 
       (.I0(rgbToManyAXIS_tdata_sig0[12]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[11]));
  LUT2 #(
    .INIT(4'h9)) 
    \rgbToManyAXIS_tdata_sig[23]_i_10 
       (.I0(p_0_in[8]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[23]_i_2_0 ),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_11 
       (.I0(doutb[3]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [51]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[27]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [27]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_12 
       (.I0(drdEvenAbufB[3]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [3]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[43]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [43]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[23]_i_13 
       (.I0(drdEvenAbufB[19]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [19]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [11]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_14 
       (.I0(drdEvenAbufB[35]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [35]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[11]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [11]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_15 
       (.I0(doutb[2]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [50]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[26]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [26]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_16 
       (.I0(drdEvenAbufB[2]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [2]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[42]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [42]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[23]_i_17 
       (.I0(drdEvenAbufB[18]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [18]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [10]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_18 
       (.I0(drdEvenAbufB[34]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [34]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[10]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [10]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_19 
       (.I0(doutb[1]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [49]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[25]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [25]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_20 
       (.I0(drdEvenAbufB[1]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[41]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [41]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_20_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[23]_i_21 
       (.I0(drdEvenAbufB[17]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [17]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [9]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_22 
       (.I0(drdEvenAbufB[33]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [33]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[9]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [9]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_23 
       (.I0(doutb[0]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [48]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[24]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [24]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_23_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_24 
       (.I0(drdEvenAbufB[0]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [0]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[40]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [40]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_24_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[23]_i_25 
       (.I0(drdEvenAbufB[16]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [16]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [8]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_26 
       (.I0(drdEvenAbufB[32]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [32]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[8]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [8]),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_3 
       (.I0(\rgbToManyAXIS_tdata_sig[23]_i_11_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[23]_i_12_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[23]_i_13_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[23]_i_14_n_0 ),
        .O(p_0_in[11]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_4 
       (.I0(\rgbToManyAXIS_tdata_sig[23]_i_15_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[23]_i_16_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[23]_i_17_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[23]_i_18_n_0 ),
        .O(p_0_in[10]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_5 
       (.I0(\rgbToManyAXIS_tdata_sig[23]_i_19_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[23]_i_20_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[23]_i_21_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[23]_i_22_n_0 ),
        .O(p_0_in[9]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[23]_i_6 
       (.I0(\rgbToManyAXIS_tdata_sig[23]_i_23_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[23]_i_24_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[23]_i_25_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[23]_i_26_n_0 ),
        .O(p_0_in[8]));
  LUT2 #(
    .INIT(4'h9)) 
    \rgbToManyAXIS_tdata_sig[23]_i_7 
       (.I0(p_0_in[11]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[23]_i_2_3 ),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_7_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \rgbToManyAXIS_tdata_sig[23]_i_8 
       (.I0(p_0_in[10]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[23]_i_2_2 ),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \rgbToManyAXIS_tdata_sig[23]_i_9 
       (.I0(p_0_in[9]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[23]_i_2_1 ),
        .O(\rgbToManyAXIS_tdata_sig[23]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2905" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[24]_i_1 
       (.I0(p_3_in[0]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[12]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[24]_i_5 
       (.I0(drdEvenAbufB[36]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [36]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[12]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [12]),
        .O(\rgbToManyAXIS_tdata_sig[24]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[24]_i_6 
       (.I0(drdEvenAbufB[20]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [20]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [12]),
        .O(\rgbToManyAXIS_tdata_sig[24]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[24]_i_7 
       (.I0(drdEvenAbufB[4]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [4]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[44]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [44]),
        .O(\rgbToManyAXIS_tdata_sig[24]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[24]_i_8 
       (.I0(doutb[4]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [52]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[28]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [28]),
        .O(\rgbToManyAXIS_tdata_sig[24]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2905" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[25]_i_1 
       (.I0(p_3_in[1]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[13]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[25]_i_5 
       (.I0(drdEvenAbufB[37]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [37]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[13]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [13]),
        .O(\rgbToManyAXIS_tdata_sig[25]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[25]_i_6 
       (.I0(drdEvenAbufB[21]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [21]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [13]),
        .O(\rgbToManyAXIS_tdata_sig[25]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[25]_i_7 
       (.I0(drdEvenAbufB[5]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [5]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[45]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [45]),
        .O(\rgbToManyAXIS_tdata_sig[25]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[25]_i_8 
       (.I0(doutb[5]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [53]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[29]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [29]),
        .O(\rgbToManyAXIS_tdata_sig[25]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2904" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[26]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .I2(\qrs_reg[2] ),
        .O(D[14]));
  (* SOFT_HLUTNM = "soft_lutpair2898" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[26]_i_10 
       (.I0(doutb[6]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [54]),
        .O(\rgbToManyAXIS_tdata_sig[26]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2898" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[26]_i_11 
       (.I0(drdEvenAbufB[30]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [30]),
        .O(\rgbToManyAXIS_tdata_sig[26]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \rgbToManyAXIS_tdata_sig[26]_i_3 
       (.I0(\rgbToManyAXIS_tdata_sig[26]_i_5_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[26]_i_6_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I3(\rgbToManyAXIS_tdata_sig[26]_i_7_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I5(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [14]),
        .O(\rgbToManyAXIS_tdata_sig[26]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h03F3050503F3F5F5)) 
    \rgbToManyAXIS_tdata_sig[26]_i_4 
       (.I0(\rgbToManyAXIS_tdata_sig[26]_i_8_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[26]_i_9_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I3(\rgbToManyAXIS_tdata_sig[26]_i_10_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I5(\rgbToManyAXIS_tdata_sig[26]_i_11_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig[26]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2895" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[26]_i_5 
       (.I0(drdEvenAbufB[38]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [38]),
        .O(\rgbToManyAXIS_tdata_sig[26]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2896" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[26]_i_6 
       (.I0(drdEvenAbufB[14]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [14]),
        .O(\rgbToManyAXIS_tdata_sig[26]_i_6_n_0 ));
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[26]_i_7 
       (.I0(drdEvenAbufB[22]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [22]),
        .O(\rgbToManyAXIS_tdata_sig[26]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2899" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[26]_i_8 
       (.I0(drdEvenAbufB[46]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [46]),
        .O(\rgbToManyAXIS_tdata_sig[26]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2899" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[26]_i_9 
       (.I0(drdEvenAbufB[6]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [6]),
        .O(\rgbToManyAXIS_tdata_sig[26]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2904" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \rgbToManyAXIS_tdata_sig[27]_i_1 
       (.I0(\qrs_reg[2]_1 ),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .O(D[15]));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[27]_i_5 
       (.I0(drdEvenAbufB[39]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [39]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[15]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [15]),
        .O(\rgbToManyAXIS_tdata_sig[27]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \rgbToManyAXIS_tdata_sig[27]_i_6 
       (.I0(drdEvenAbufB[23]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [23]),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I4(\rgbToManyAXIS_tdata_sig[18]_i_3_0 [15]),
        .O(\rgbToManyAXIS_tdata_sig[27]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[27]_i_7 
       (.I0(drdEvenAbufB[7]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [7]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[47]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [47]),
        .O(\rgbToManyAXIS_tdata_sig[27]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[27]_i_8 
       (.I0(doutb[7]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [55]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[31]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [31]),
        .O(\rgbToManyAXIS_tdata_sig[27]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2903" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[28]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .I2(\qrs_reg[1] ),
        .O(D[16]));
  LUT6 #(
    .INIT(64'h55330F0055330FFF)) 
    \rgbToManyAXIS_tdata_sig[28]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[28]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[28]_i_4_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig[28]_i_5_n_0 ),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I5(\rgbToManyAXIS_tdata_sig[28]_i_6_n_0 ),
        .O(\qrs_reg[1] ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[28]_i_3 
       (.I0(doutb[8]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [56]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[32]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [32]),
        .O(\rgbToManyAXIS_tdata_sig[28]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[28]_i_4 
       (.I0(drdEvenAbufB[8]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [8]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(doutb[0]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [48]),
        .O(\rgbToManyAXIS_tdata_sig[28]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[28]_i_5 
       (.I0(drdEvenAbufB[24]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [24]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[0]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [0]),
        .O(\rgbToManyAXIS_tdata_sig[28]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[28]_i_6 
       (.I0(drdEvenAbufB[40]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [40]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[16]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [16]),
        .O(\rgbToManyAXIS_tdata_sig[28]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2903" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[29]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .I2(\qrs_reg[1]_0 ),
        .O(D[17]));
  LUT6 #(
    .INIT(64'h55330F0055330FFF)) 
    \rgbToManyAXIS_tdata_sig[29]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[29]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[29]_i_4_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig[29]_i_5_n_0 ),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I5(\rgbToManyAXIS_tdata_sig[29]_i_6_n_0 ),
        .O(\qrs_reg[1]_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[29]_i_3 
       (.I0(doutb[9]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [57]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[33]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [33]),
        .O(\rgbToManyAXIS_tdata_sig[29]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[29]_i_4 
       (.I0(drdEvenAbufB[9]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [9]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(doutb[1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [49]),
        .O(\rgbToManyAXIS_tdata_sig[29]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[29]_i_5 
       (.I0(drdEvenAbufB[25]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [25]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [1]),
        .O(\rgbToManyAXIS_tdata_sig[29]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[29]_i_6 
       (.I0(drdEvenAbufB[41]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [41]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[17]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [17]),
        .O(\rgbToManyAXIS_tdata_sig[29]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2902" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[30]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .I2(\qrs_reg[1]_2 ),
        .O(D[18]));
  LUT6 #(
    .INIT(64'h55330F0055330FFF)) 
    \rgbToManyAXIS_tdata_sig[30]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[30]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[30]_i_4_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig[30]_i_5_n_0 ),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I5(\rgbToManyAXIS_tdata_sig[30]_i_6_n_0 ),
        .O(\qrs_reg[1]_2 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[30]_i_3 
       (.I0(doutb[10]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [58]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[34]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [34]),
        .O(\rgbToManyAXIS_tdata_sig[30]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[30]_i_4 
       (.I0(drdEvenAbufB[10]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [10]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(doutb[2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [50]),
        .O(\rgbToManyAXIS_tdata_sig[30]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[30]_i_5 
       (.I0(drdEvenAbufB[26]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [26]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [2]),
        .O(\rgbToManyAXIS_tdata_sig[30]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[30]_i_6 
       (.I0(drdEvenAbufB[42]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [42]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[18]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [18]),
        .O(\rgbToManyAXIS_tdata_sig[30]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2902" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[31]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .I2(\qrs_reg[1]_4 ),
        .O(D[19]));
  LUT6 #(
    .INIT(64'h55330F0055330FFF)) 
    \rgbToManyAXIS_tdata_sig[31]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[31]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[31]_i_4_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig[31]_i_5_n_0 ),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I5(\rgbToManyAXIS_tdata_sig[31]_i_6_n_0 ),
        .O(\qrs_reg[1]_4 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[31]_i_3 
       (.I0(doutb[11]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [59]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[35]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [35]),
        .O(\rgbToManyAXIS_tdata_sig[31]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[31]_i_4 
       (.I0(drdEvenAbufB[11]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [11]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(doutb[3]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [51]),
        .O(\rgbToManyAXIS_tdata_sig[31]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[31]_i_5 
       (.I0(drdEvenAbufB[27]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [27]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[3]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [3]),
        .O(\rgbToManyAXIS_tdata_sig[31]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[31]_i_6 
       (.I0(drdEvenAbufB[43]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [43]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[19]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [19]),
        .O(\rgbToManyAXIS_tdata_sig[31]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2901" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[32]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .I2(\qrs_reg[2]_0 ),
        .O(D[20]));
  LUT6 #(
    .INIT(64'h2020A0AF2F2FA0AF)) 
    \rgbToManyAXIS_tdata_sig[32]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[32]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[32]_i_4_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I3(\rgbToManyAXIS_tdata_sig[32]_i_5_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I5(\rgbToManyAXIS_tdata_sig[32]_i_6_n_0 ),
        .O(\qrs_reg[2]_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00FF4747)) 
    \rgbToManyAXIS_tdata_sig[32]_i_3 
       (.I0(doutb[4]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [52]),
        .I3(\rgbToManyAXIS_tdata_sig[32]_i_7_n_0 ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I5(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .O(\rgbToManyAXIS_tdata_sig[32]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[32]_i_4 
       (.I0(doutb[12]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [60]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[36]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [36]),
        .O(\rgbToManyAXIS_tdata_sig[32]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[32]_i_5 
       (.I0(drdEvenAbufB[44]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [44]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[20]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [20]),
        .O(\rgbToManyAXIS_tdata_sig[32]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[32]_i_6 
       (.I0(drdEvenAbufB[28]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [28]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[4]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [4]),
        .O(\rgbToManyAXIS_tdata_sig[32]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2894" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \rgbToManyAXIS_tdata_sig[32]_i_7 
       (.I0(drdEvenAbufB[12]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [12]),
        .O(\rgbToManyAXIS_tdata_sig[32]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2901" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[33]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .I2(\qrs_reg[1]_1 ),
        .O(D[21]));
  LUT6 #(
    .INIT(64'h55330F0055330FFF)) 
    \rgbToManyAXIS_tdata_sig[33]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[33]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[33]_i_4_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig[33]_i_5_n_0 ),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I5(\rgbToManyAXIS_tdata_sig[33]_i_6_n_0 ),
        .O(\qrs_reg[1]_1 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[33]_i_3 
       (.I0(doutb[13]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [61]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[37]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [37]),
        .O(\rgbToManyAXIS_tdata_sig[33]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[33]_i_4 
       (.I0(drdEvenAbufB[13]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [13]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(doutb[5]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [53]),
        .O(\rgbToManyAXIS_tdata_sig[33]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[33]_i_5 
       (.I0(drdEvenAbufB[29]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [29]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[5]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [5]),
        .O(\rgbToManyAXIS_tdata_sig[33]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[33]_i_6 
       (.I0(drdEvenAbufB[45]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [45]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[21]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [21]),
        .O(\rgbToManyAXIS_tdata_sig[33]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2900" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[34]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .I2(\qrs_reg[1]_3 ),
        .O(D[22]));
  LUT6 #(
    .INIT(64'h55330F0055330FFF)) 
    \rgbToManyAXIS_tdata_sig[34]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[34]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[34]_i_4_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig[34]_i_5_n_0 ),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I5(\rgbToManyAXIS_tdata_sig[34]_i_6_n_0 ),
        .O(\qrs_reg[1]_3 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[34]_i_3 
       (.I0(doutb[14]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [62]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[38]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [38]),
        .O(\rgbToManyAXIS_tdata_sig[34]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[34]_i_4 
       (.I0(drdEvenAbufB[14]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [14]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(doutb[6]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [54]),
        .O(\rgbToManyAXIS_tdata_sig[34]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[34]_i_5 
       (.I0(drdEvenAbufB[30]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [30]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[6]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [6]),
        .O(\rgbToManyAXIS_tdata_sig[34]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[34]_i_6 
       (.I0(drdEvenAbufB[46]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [46]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[22]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [22]),
        .O(\rgbToManyAXIS_tdata_sig[34]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2900" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \rgbToManyAXIS_tdata_sig[35]_i_1 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35] [1]),
        .I1(\rgbToManyAXIS_tdata_sig_reg[35] [0]),
        .I2(\qrs_reg[1]_5 ),
        .O(D[23]));
  LUT6 #(
    .INIT(64'h55330F0055330FFF)) 
    \rgbToManyAXIS_tdata_sig[35]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[35]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_4_n_0 ),
        .I2(\rgbToManyAXIS_tdata_sig[35]_i_5_n_0 ),
        .I3(\rgbToManyAXIS_tdata_sig_reg[28] [1]),
        .I4(\rgbToManyAXIS_tdata_sig_reg[28] [2]),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_6_n_0 ),
        .O(\qrs_reg[1]_5 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[35]_i_3 
       (.I0(doutb[15]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [63]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[39]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [39]),
        .O(\rgbToManyAXIS_tdata_sig[35]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[35]_i_4 
       (.I0(drdEvenAbufB[15]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [15]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(doutb[7]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [55]),
        .O(\rgbToManyAXIS_tdata_sig[35]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[35]_i_5 
       (.I0(drdEvenAbufB[31]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [31]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[7]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [7]),
        .O(\rgbToManyAXIS_tdata_sig[35]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \rgbToManyAXIS_tdata_sig[35]_i_6 
       (.I0(drdEvenAbufB[47]),
        .I1(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [47]),
        .I2(\rgbToManyAXIS_tdata_sig_reg[28] [0]),
        .I3(drdEvenAbufB[23]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I5(\rgbToManyAXIS_tdata_sig[35]_i_2_0 [23]),
        .O(\rgbToManyAXIS_tdata_sig[35]_i_6_n_0 ));
  CARRY8 \rgbToManyAXIS_tdata_sig_reg[18]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_0 ,\rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_1 ,\rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_2 ,\rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_3 ,\rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_4 ,\rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_5 ,\rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_6 ,\rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_7 }),
        .DI(p_0_in[7:0]),
        .O({rgbToManyAXIS_tdata_sig0[7:1],\NLW_rgbToManyAXIS_tdata_sig_reg[18]_i_2_O_UNCONNECTED [0]}),
        .S({\rgbToManyAXIS_tdata_sig[18]_i_11_n_0 ,\rgbToManyAXIS_tdata_sig[18]_i_12_n_0 ,\rgbToManyAXIS_tdata_sig[18]_i_13_n_0 ,\rgbToManyAXIS_tdata_sig[18]_i_14_n_0 ,\rgbToManyAXIS_tdata_sig[18]_i_15_n_0 ,\rgbToManyAXIS_tdata_sig[18]_i_16_n_0 ,\rgbToManyAXIS_tdata_sig[18]_i_17_n_0 ,\rgbToManyAXIS_tdata_sig_reg[18] }));
  CARRY8 \rgbToManyAXIS_tdata_sig_reg[23]_i_2 
       (.CI(\rgbToManyAXIS_tdata_sig_reg[18]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_rgbToManyAXIS_tdata_sig_reg[23]_i_2_CO_UNCONNECTED [7:5],rgbToManyAXIS_tdata_sig0[12],\NLW_rgbToManyAXIS_tdata_sig_reg[23]_i_2_CO_UNCONNECTED [3],\rgbToManyAXIS_tdata_sig_reg[23]_i_2_n_5 ,\rgbToManyAXIS_tdata_sig_reg[23]_i_2_n_6 ,\rgbToManyAXIS_tdata_sig_reg[23]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,p_0_in[11:8]}),
        .O({\NLW_rgbToManyAXIS_tdata_sig_reg[23]_i_2_O_UNCONNECTED [7:4],rgbToManyAXIS_tdata_sig0[11:8]}),
        .S({1'b0,1'b0,1'b0,1'b1,\rgbToManyAXIS_tdata_sig[23]_i_7_n_0 ,\rgbToManyAXIS_tdata_sig[23]_i_8_n_0 ,\rgbToManyAXIS_tdata_sig[23]_i_9_n_0 ,\rgbToManyAXIS_tdata_sig[23]_i_10_n_0 }));
  MUXF8 \rgbToManyAXIS_tdata_sig_reg[24]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[24]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig_reg[24]_i_4_n_0 ),
        .O(p_3_in[0]),
        .S(\rgbToManyAXIS_tdata_sig_reg[28] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[24]_i_3 
       (.I0(\rgbToManyAXIS_tdata_sig[24]_i_5_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[24]_i_6_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[24]_i_3_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[28] [1]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[24]_i_4 
       (.I0(\rgbToManyAXIS_tdata_sig[24]_i_7_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[24]_i_8_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[24]_i_4_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[28] [1]));
  MUXF8 \rgbToManyAXIS_tdata_sig_reg[25]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[25]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig_reg[25]_i_4_n_0 ),
        .O(p_3_in[1]),
        .S(\rgbToManyAXIS_tdata_sig_reg[28] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[25]_i_3 
       (.I0(\rgbToManyAXIS_tdata_sig[25]_i_5_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[25]_i_6_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[25]_i_3_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[28] [1]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[25]_i_4 
       (.I0(\rgbToManyAXIS_tdata_sig[25]_i_7_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[25]_i_8_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[25]_i_4_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[28] [1]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[26]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig[26]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[26]_i_4_n_0 ),
        .O(\qrs_reg[2] ),
        .S(\rgbToManyAXIS_tdata_sig_reg[28] [2]));
  MUXF8 \rgbToManyAXIS_tdata_sig_reg[27]_i_2 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[27]_i_3_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig_reg[27]_i_4_n_0 ),
        .O(\qrs_reg[2]_1 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[28] [2]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[27]_i_3 
       (.I0(\rgbToManyAXIS_tdata_sig[27]_i_5_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[27]_i_6_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[27]_i_3_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[28] [1]));
  MUXF7 \rgbToManyAXIS_tdata_sig_reg[27]_i_4 
       (.I0(\rgbToManyAXIS_tdata_sig[27]_i_7_n_0 ),
        .I1(\rgbToManyAXIS_tdata_sig[27]_i_8_n_0 ),
        .O(\rgbToManyAXIS_tdata_sig_reg[27]_i_4_n_0 ),
        .S(\rgbToManyAXIS_tdata_sig_reg[28] [1]));
endmodule

(* ORIG_REF_NAME = "Dpbram_size6kB_a64b64" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size6kB_a64b64__xdcDup__2
   (doutb,
    D,
    aclk_sig,
    Q,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ,
    enEobuf,
    oddNotEven,
    enEobufB,
    \drdEvenbufBm1_reg[63] ,
    \drdEvenbufBm1_reg[63]_0 );
  output [63:0]doutb;
  output [15:0]D;
  input aclk_sig;
  input [9:0]Q;
  input [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  input [9:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  input enEobuf;
  input oddNotEven;
  input enEobufB;
  input [15:0]\drdEvenbufBm1_reg[63] ;
  input [1:0]\drdEvenbufBm1_reg[63]_0 ;

  wire [15:0]D;
  wire [63:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire [9:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire [9:0]Q;
  wire aclk_sig;
  wire [63:0]doutb;
  wire [15:0]\drdEvenbufBm1_reg[63] ;
  wire [1:0]\drdEvenbufBm1_reg[63]_0 ;
  wire enA6_out;
  wire enB;
  wire enEobuf;
  wire enEobufB;
  wire oddNotEven;
  wire [63:0]NLW_myMnfcore_douta_UNCONNECTED;

  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[48]_i_1 
       (.I0(doutb[48]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [0]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[0]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[49]_i_1 
       (.I0(doutb[49]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [1]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[1]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[50]_i_1 
       (.I0(doutb[50]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [2]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[2]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[51]_i_1 
       (.I0(doutb[51]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [3]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[3]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[52]_i_1 
       (.I0(doutb[52]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [4]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[4]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[53]_i_1 
       (.I0(doutb[53]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [5]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[5]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[54]_i_1 
       (.I0(doutb[54]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [6]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[6]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[55]_i_1 
       (.I0(doutb[55]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [7]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[7]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[56]_i_1 
       (.I0(doutb[56]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [8]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[8]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[57]_i_1 
       (.I0(doutb[57]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [9]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[9]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[58]_i_1 
       (.I0(doutb[58]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [10]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[10]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[59]_i_1 
       (.I0(doutb[59]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [11]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[11]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[60]_i_1 
       (.I0(doutb[60]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [12]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[12]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[61]_i_1 
       (.I0(doutb[61]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [13]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[13]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[62]_i_1 
       (.I0(doutb[62]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [14]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[14]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \drdEvenbufBm1[63]_i_2 
       (.I0(doutb[63]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I2(\drdEvenbufBm1_reg[63] [15]),
        .I3(\drdEvenbufBm1_reg[63]_0 [1]),
        .I4(\drdEvenbufBm1_reg[63]_0 [0]),
        .O(D[15]));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size6kB_a64b64,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size6kB_a64b64__4 myMnfcore
       (.addra(Q),
        .addrb(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .clka(aclk_sig),
        .clkb(1'b0),
        .dina(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_myMnfcore_douta_UNCONNECTED[63:0]),
        .doutb(doutb),
        .ena(enA6_out),
        .enb(enB),
        .wea(1'b1),
        .web(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair2912" *) 
  LUT3 #(
    .INIT(8'h08)) 
    myMnfcore_i_1__11
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .I1(enEobuf),
        .I2(oddNotEven),
        .O(enA6_out));
  (* SOFT_HLUTNM = "soft_lutpair2912" *) 
  LUT2 #(
    .INIT(4'h2)) 
    myMnfcore_i_2__3
       (.I0(enEobufB),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ),
        .O(enB));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size8kB_a32b128
   (douta,
    doutb,
    web,
    addrb,
    D,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ,
    aclk_sig,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ,
    Q,
    memclk,
    ddrAXI_rdata,
    \dwrRowbuf_reg[9] ,
    \dwrRowbuf_reg[9]_0 ,
    \dwrRowbuf_reg[9]_1 ,
    \dwrRowbuf_reg[9]_2 ,
    \dwrRowbuf_reg[9]_3 ,
    \dwrRowbuf_reg[10] ,
    \dwrRowbuf_reg[10]_0 ,
    \dwrRowbuf_reg[11] ,
    \dwrRowbuf_reg[11]_0 ,
    \dwrRowbuf_reg[12] ,
    \dwrRowbuf_reg[12]_0 ,
    \dwrRowbuf_reg[13] ,
    \dwrRowbuf_reg[13]_0 ,
    \dwrRowbuf_reg[14] ,
    \dwrRowbuf_reg[14]_0 ,
    \dwrRowbuf_reg[15] ,
    \dwrRowbuf_reg[31] ,
    \dwrRowbuf_reg[8] ,
    \dwrRowbuf_reg[8]_0 ,
    \dwrRowbuf_reg[2] ,
    \dwrRowbuf_reg[2]_0 ,
    \dwrRowbuf_reg[2]_1 ,
    \dwrRowbuf_reg[16] ,
    \dwrRowbuf_reg[16]_0 ,
    \dwrRowbuf_reg[16]_1 ,
    \dwrRowbuf_reg[17] ,
    \dwrRowbuf_reg[17]_0 ,
    \dwrRowbuf_reg[18] ,
    \dwrRowbuf_reg[18]_0 ,
    \dwrRowbuf_reg[19] ,
    \dwrRowbuf_reg[19]_0 ,
    \dwrRowbuf_reg[20] ,
    \dwrRowbuf_reg[20]_0 ,
    \dwrRowbuf_reg[21] ,
    \dwrRowbuf_reg[21]_0 ,
    \dwrRowbuf_reg[22] ,
    \dwrRowbuf_reg[22]_0 ,
    \dwrRowbuf_reg[23] ,
    \dwrRowbuf_reg[25] ,
    \dwrRowbuf_reg[24] ,
    \dwrRowbuf_reg[25]_0 ,
    \dwrRowbuf_reg[26] ,
    \dwrRowbuf_reg[27] ,
    \dwrRowbuf_reg[27]_0 ,
    \dwrRowbuf_reg[27]_1 ,
    \dwrRowbuf_reg[28] ,
    \dwrRowbuf_reg[28]_0 ,
    \dwrRowbuf_reg[29] ,
    \dwrRowbuf_reg[29]_0 ,
    \dwrRowbuf_reg[30] ,
    \dwrRowbuf_reg[30]_0 ,
    \dwrRowbuf_reg[31]_0 ,
    \dwrRowbuf_reg[9]_4 ,
    \dwrRowbuf_reg[24]_0 ,
    \dwrRowbuf_reg[24]_1 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_5 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_6 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_9 ,
    enRowbufBEgrstr,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_10 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_11 ,
    liveBNotA_memclk,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 );
  output [27:0]douta;
  output [127:0]doutb;
  output [0:0]web;
  output [8:0]addrb;
  output [24:0]D;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  input aclk_sig;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ;
  input [31:0]Q;
  input memclk;
  input [127:0]ddrAXI_rdata;
  input \dwrRowbuf_reg[9] ;
  input \dwrRowbuf_reg[9]_0 ;
  input \dwrRowbuf_reg[9]_1 ;
  input \dwrRowbuf_reg[9]_2 ;
  input \dwrRowbuf_reg[9]_3 ;
  input \dwrRowbuf_reg[10] ;
  input \dwrRowbuf_reg[10]_0 ;
  input \dwrRowbuf_reg[11] ;
  input \dwrRowbuf_reg[11]_0 ;
  input \dwrRowbuf_reg[12] ;
  input \dwrRowbuf_reg[12]_0 ;
  input \dwrRowbuf_reg[13] ;
  input \dwrRowbuf_reg[13]_0 ;
  input \dwrRowbuf_reg[14] ;
  input \dwrRowbuf_reg[14]_0 ;
  input \dwrRowbuf_reg[15] ;
  input [29:0]\dwrRowbuf_reg[31] ;
  input \dwrRowbuf_reg[8] ;
  input \dwrRowbuf_reg[8]_0 ;
  input \dwrRowbuf_reg[2] ;
  input \dwrRowbuf_reg[2]_0 ;
  input \dwrRowbuf_reg[2]_1 ;
  input \dwrRowbuf_reg[16] ;
  input \dwrRowbuf_reg[16]_0 ;
  input \dwrRowbuf_reg[16]_1 ;
  input \dwrRowbuf_reg[17] ;
  input \dwrRowbuf_reg[17]_0 ;
  input \dwrRowbuf_reg[18] ;
  input \dwrRowbuf_reg[18]_0 ;
  input \dwrRowbuf_reg[19] ;
  input \dwrRowbuf_reg[19]_0 ;
  input \dwrRowbuf_reg[20] ;
  input \dwrRowbuf_reg[20]_0 ;
  input \dwrRowbuf_reg[21] ;
  input \dwrRowbuf_reg[21]_0 ;
  input \dwrRowbuf_reg[22] ;
  input \dwrRowbuf_reg[22]_0 ;
  input \dwrRowbuf_reg[23] ;
  input \dwrRowbuf_reg[25] ;
  input \dwrRowbuf_reg[24] ;
  input \dwrRowbuf_reg[25]_0 ;
  input \dwrRowbuf_reg[26] ;
  input \dwrRowbuf_reg[27] ;
  input \dwrRowbuf_reg[27]_0 ;
  input \dwrRowbuf_reg[27]_1 ;
  input \dwrRowbuf_reg[28] ;
  input \dwrRowbuf_reg[28]_0 ;
  input \dwrRowbuf_reg[29] ;
  input \dwrRowbuf_reg[29]_0 ;
  input \dwrRowbuf_reg[30] ;
  input \dwrRowbuf_reg[30]_0 ;
  input \dwrRowbuf_reg[31]_0 ;
  input \dwrRowbuf_reg[9]_4 ;
  input \dwrRowbuf_reg[24]_0 ;
  input \dwrRowbuf_reg[24]_1 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_5 ;
  input [1:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_6 ;
  input [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 ;
  input [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_9 ;
  input enRowbufBEgrstr;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_10 ;
  input [1:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_11 ;
  input liveBNotA_memclk;
  input [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 ;
  input [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 ;
  input [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 ;

  wire [24:0]D;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_10 ;
  wire [1:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_11 ;
  wire [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 ;
  wire [8:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 ;
  wire [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_5 ;
  wire [1:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_6 ;
  wire [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 ;
  wire [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_9 ;
  wire [31:0]Q;
  wire aclk_sig;
  wire [8:0]addrb;
  wire [127:0]ddrAXI_rdata;
  wire [27:0]douta;
  wire [127:0]doutb;
  wire [31:15]drdRowBbuf;
  wire \dwrRowbuf[31]_i_10_n_0 ;
  wire \dwrRowbuf[31]_i_11_n_0 ;
  wire \dwrRowbuf[31]_i_12_n_0 ;
  wire \dwrRowbuf[31]_i_13_n_0 ;
  wire \dwrRowbuf[31]_i_14_n_0 ;
  wire \dwrRowbuf[31]_i_15_n_0 ;
  wire \dwrRowbuf[31]_i_16_n_0 ;
  wire \dwrRowbuf[31]_i_17_n_0 ;
  wire \dwrRowbuf[31]_i_6_n_0 ;
  wire \dwrRowbuf[31]_i_7_n_0 ;
  wire \dwrRowbuf[31]_i_8_n_0 ;
  wire \dwrRowbuf[31]_i_9_n_0 ;
  wire \dwrRowbuf[4]_i_5_n_0 ;
  wire \dwrRowbuf_reg[10] ;
  wire \dwrRowbuf_reg[10]_0 ;
  wire \dwrRowbuf_reg[11] ;
  wire \dwrRowbuf_reg[11]_0 ;
  wire \dwrRowbuf_reg[12] ;
  wire \dwrRowbuf_reg[12]_0 ;
  wire \dwrRowbuf_reg[13] ;
  wire \dwrRowbuf_reg[13]_0 ;
  wire \dwrRowbuf_reg[14] ;
  wire \dwrRowbuf_reg[14]_0 ;
  wire \dwrRowbuf_reg[15] ;
  wire \dwrRowbuf_reg[16] ;
  wire \dwrRowbuf_reg[16]_0 ;
  wire \dwrRowbuf_reg[16]_1 ;
  wire \dwrRowbuf_reg[17] ;
  wire \dwrRowbuf_reg[17]_0 ;
  wire \dwrRowbuf_reg[18] ;
  wire \dwrRowbuf_reg[18]_0 ;
  wire \dwrRowbuf_reg[19] ;
  wire \dwrRowbuf_reg[19]_0 ;
  wire \dwrRowbuf_reg[20] ;
  wire \dwrRowbuf_reg[20]_0 ;
  wire \dwrRowbuf_reg[21] ;
  wire \dwrRowbuf_reg[21]_0 ;
  wire \dwrRowbuf_reg[22] ;
  wire \dwrRowbuf_reg[22]_0 ;
  wire \dwrRowbuf_reg[23] ;
  wire \dwrRowbuf_reg[24] ;
  wire \dwrRowbuf_reg[24]_0 ;
  wire \dwrRowbuf_reg[24]_1 ;
  wire \dwrRowbuf_reg[25] ;
  wire \dwrRowbuf_reg[25]_0 ;
  wire \dwrRowbuf_reg[26] ;
  wire \dwrRowbuf_reg[27] ;
  wire \dwrRowbuf_reg[27]_0 ;
  wire \dwrRowbuf_reg[27]_1 ;
  wire \dwrRowbuf_reg[28] ;
  wire \dwrRowbuf_reg[28]_0 ;
  wire \dwrRowbuf_reg[29] ;
  wire \dwrRowbuf_reg[29]_0 ;
  wire \dwrRowbuf_reg[2] ;
  wire \dwrRowbuf_reg[2]_0 ;
  wire \dwrRowbuf_reg[2]_1 ;
  wire \dwrRowbuf_reg[30] ;
  wire \dwrRowbuf_reg[30]_0 ;
  wire [29:0]\dwrRowbuf_reg[31] ;
  wire \dwrRowbuf_reg[31]_0 ;
  wire \dwrRowbuf_reg[8] ;
  wire \dwrRowbuf_reg[8]_0 ;
  wire \dwrRowbuf_reg[9] ;
  wire \dwrRowbuf_reg[9]_0 ;
  wire \dwrRowbuf_reg[9]_1 ;
  wire \dwrRowbuf_reg[9]_2 ;
  wire \dwrRowbuf_reg[9]_3 ;
  wire \dwrRowbuf_reg[9]_4 ;
  wire enA;
  wire enB;
  wire enRowbufBEgrstr;
  wire liveBNotA_memclk;
  wire memclk;
  wire myMnfcore_i_10_n_0;
  wire myMnfcore_i_11_n_0;
  wire myMnfcore_i_12_n_0;
  wire myMnfcore_i_2__2_n_0;
  wire myMnfcore_i_3__0_n_0;
  wire myMnfcore_i_4__0_n_0;
  wire myMnfcore_i_5__0_n_0;
  wire myMnfcore_i_6__0_n_0;
  wire myMnfcore_i_7__0_n_0;
  wire myMnfcore_i_8_n_0;
  wire myMnfcore_i_9_n_0;
  wire [0:0]web;

  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[10]_i_1 
       (.I0(\dwrRowbuf_reg[9]_1 ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[10] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[10]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[11]_i_1 
       (.I0(\dwrRowbuf_reg[10] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[11] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[11]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[12]_i_1 
       (.I0(\dwrRowbuf_reg[11] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[12] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[12]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[5]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[13]_i_1 
       (.I0(\dwrRowbuf_reg[12] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[13] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[13]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[14]_i_1 
       (.I0(\dwrRowbuf_reg[13] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[14] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[14]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \dwrRowbuf[15]_i_1 
       (.I0(\dwrRowbuf_reg[15] ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I2(drdRowBbuf[15]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I4(\dwrRowbuf_reg[31] [14]),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[8]));
  LUT6 #(
    .INIT(64'hFF27002700000000)) 
    \dwrRowbuf[16]_i_1 
       (.I0(\dwrRowbuf_reg[9]_0 ),
        .I1(\dwrRowbuf_reg[16] ),
        .I2(\dwrRowbuf_reg[16]_0 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[16]_1 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[9]));
  LUT6 #(
    .INIT(64'hFFD100D100000000)) 
    \dwrRowbuf[17]_i_1 
       (.I0(\dwrRowbuf_reg[16] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[17] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[17]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[10]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[18]_i_1 
       (.I0(\dwrRowbuf_reg[17] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[18] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[18]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[11]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[19]_i_1 
       (.I0(\dwrRowbuf_reg[18] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[19] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[19]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[12]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[20]_i_1 
       (.I0(\dwrRowbuf_reg[19] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[20] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[20]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[13]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[21]_i_1 
       (.I0(\dwrRowbuf_reg[20] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[21] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[21]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[14]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[22]_i_1 
       (.I0(\dwrRowbuf_reg[21] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[22] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[22]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[15]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \dwrRowbuf[23]_i_1 
       (.I0(\dwrRowbuf_reg[23] ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I2(drdRowBbuf[23]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I4(\dwrRowbuf_reg[31] [21]),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[16]));
  LUT6 #(
    .INIT(64'h888AAA8A00022202)) 
    \dwrRowbuf[24]_i_1 
       (.I0(\dwrRowbuf_reg[9]_3 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I2(\dwrRowbuf_reg[24]_0 ),
        .I3(\dwrRowbuf_reg[9]_0 ),
        .I4(\dwrRowbuf_reg[24] ),
        .I5(\dwrRowbuf_reg[24]_1 ),
        .O(D[17]));
  LUT6 #(
    .INIT(64'hFF27002700000000)) 
    \dwrRowbuf[25]_i_1 
       (.I0(\dwrRowbuf_reg[9]_0 ),
        .I1(\dwrRowbuf_reg[25] ),
        .I2(\dwrRowbuf_reg[24] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[25]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[18]));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \dwrRowbuf[26]_i_1 
       (.I0(\dwrRowbuf_reg[26] ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I2(drdRowBbuf[26]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I4(\dwrRowbuf_reg[31] [24]),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[19]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[27]_i_1 
       (.I0(\dwrRowbuf_reg[27] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[27]_0 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[27]_1 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[20]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[28]_i_1 
       (.I0(\dwrRowbuf_reg[27]_0 ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[28] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[28]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[21]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[29]_i_1 
       (.I0(\dwrRowbuf_reg[28] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[29] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[29]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[22]));
  LUT6 #(
    .INIT(64'hFF96009600000000)) 
    \dwrRowbuf[2]_i_1 
       (.I0(\dwrRowbuf_reg[2] ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ),
        .I2(\dwrRowbuf_reg[2]_0 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[2]_1 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[0]));
  LUT5 #(
    .INIT(32'h8A80202A)) 
    \dwrRowbuf[2]_i_3 
       (.I0(\dwrRowbuf_reg[9]_4 ),
        .I1(\dwrRowbuf_reg[31] [2]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I3(douta[2]),
        .I4(\dwrRowbuf[4]_i_5_n_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[30]_i_1 
       (.I0(\dwrRowbuf_reg[29] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[30] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[30]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[23]));
  LUT6 #(
    .INIT(64'h0000000054040000)) 
    \dwrRowbuf[31]_i_10 
       (.I0(\dwrRowbuf[31]_i_15_n_0 ),
        .I1(douta[15]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I3(\dwrRowbuf_reg[31] [15]),
        .I4(\dwrRowbuf_reg[17]_0 ),
        .I5(\dwrRowbuf[31]_i_16_n_0 ),
        .O(\dwrRowbuf[31]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'h335FFF5F)) 
    \dwrRowbuf[31]_i_11 
       (.I0(douta[13]),
        .I1(\dwrRowbuf_reg[31] [12]),
        .I2(douta[8]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I4(\dwrRowbuf_reg[31] [7]),
        .O(\dwrRowbuf[31]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'h335FFF5F)) 
    \dwrRowbuf[31]_i_12 
       (.I0(drdRowBbuf[15]),
        .I1(\dwrRowbuf_reg[31] [14]),
        .I2(douta[12]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I4(\dwrRowbuf_reg[31] [11]),
        .O(\dwrRowbuf[31]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'h335FFF5F)) 
    \dwrRowbuf[31]_i_13 
       (.I0(douta[22]),
        .I1(\dwrRowbuf_reg[31] [22]),
        .I2(douta[26]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I4(\dwrRowbuf_reg[31] [27]),
        .O(\dwrRowbuf[31]_i_13_n_0 ));
  LUT5 #(
    .INIT(32'h335FFF5F)) 
    \dwrRowbuf[31]_i_14 
       (.I0(drdRowBbuf[31]),
        .I1(\dwrRowbuf_reg[31] [29]),
        .I2(douta[24]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I4(\dwrRowbuf_reg[31] [25]),
        .O(\dwrRowbuf[31]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'h335FFF5F)) 
    \dwrRowbuf[31]_i_15 
       (.I0(douta[18]),
        .I1(\dwrRowbuf_reg[31] [17]),
        .I2(douta[17]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I4(\dwrRowbuf_reg[31] [16]),
        .O(\dwrRowbuf[31]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF47CF77FF)) 
    \dwrRowbuf[31]_i_16 
       (.I0(\dwrRowbuf_reg[31] [21]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(drdRowBbuf[23]),
        .I3(\dwrRowbuf_reg[31] [20]),
        .I4(douta[21]),
        .I5(\dwrRowbuf[31]_i_17_n_0 ),
        .O(\dwrRowbuf[31]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'h335FFF5F)) 
    \dwrRowbuf[31]_i_17 
       (.I0(douta[19]),
        .I1(\dwrRowbuf_reg[31] [18]),
        .I2(douta[20]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I4(\dwrRowbuf_reg[31] [19]),
        .O(\dwrRowbuf[31]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'hEEE222E200000000)) 
    \dwrRowbuf[31]_i_2 
       (.I0(\dwrRowbuf_reg[31]_0 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I2(drdRowBbuf[31]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I4(\dwrRowbuf_reg[31] [29]),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[24]));
  LUT6 #(
    .INIT(64'h00000000DD0D0000)) 
    \dwrRowbuf[31]_i_4 
       (.I0(\dwrRowbuf[31]_i_6_n_0 ),
        .I1(\dwrRowbuf[31]_i_7_n_0 ),
        .I2(\dwrRowbuf[31]_i_8_n_0 ),
        .I3(\dwrRowbuf[31]_i_9_n_0 ),
        .I4(\dwrRowbuf_reg[9]_4 ),
        .I5(\dwrRowbuf[31]_i_10_n_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ));
  LUT6 #(
    .INIT(64'h00000000B8308800)) 
    \dwrRowbuf[31]_i_6 
       (.I0(\dwrRowbuf_reg[31] [8]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(douta[9]),
        .I3(\dwrRowbuf_reg[31] [13]),
        .I4(douta[14]),
        .I5(\dwrRowbuf[31]_i_11_n_0 ),
        .O(\dwrRowbuf[31]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF47CF77FF)) 
    \dwrRowbuf[31]_i_7 
       (.I0(\dwrRowbuf_reg[31] [9]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(douta[10]),
        .I3(\dwrRowbuf_reg[31] [10]),
        .I4(douta[11]),
        .I5(\dwrRowbuf[31]_i_12_n_0 ),
        .O(\dwrRowbuf[31]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00000000B8308800)) 
    \dwrRowbuf[31]_i_8 
       (.I0(\dwrRowbuf_reg[31] [26]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(douta[25]),
        .I3(\dwrRowbuf_reg[31] [23]),
        .I4(douta[23]),
        .I5(\dwrRowbuf[31]_i_13_n_0 ),
        .O(\dwrRowbuf[31]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF47CF77FF)) 
    \dwrRowbuf[31]_i_9 
       (.I0(\dwrRowbuf_reg[31] [28]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(douta[27]),
        .I3(\dwrRowbuf_reg[31] [24]),
        .I4(drdRowBbuf[26]),
        .I5(\dwrRowbuf[31]_i_14_n_0 ),
        .O(\dwrRowbuf[31]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h4444500000005000)) 
    \dwrRowbuf[4]_i_3 
       (.I0(\dwrRowbuf[4]_i_5_n_0 ),
        .I1(\dwrRowbuf_reg[31] [2]),
        .I2(douta[2]),
        .I3(douta[3]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I5(\dwrRowbuf_reg[31] [3]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ));
  LUT5 #(
    .INIT(32'h00053305)) 
    \dwrRowbuf[4]_i_5 
       (.I0(douta[1]),
        .I1(\dwrRowbuf_reg[31] [1]),
        .I2(douta[0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I4(\dwrRowbuf_reg[31] [0]),
        .O(\dwrRowbuf[4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hA0A0C0000000C000)) 
    \dwrRowbuf[6]_i_3 
       (.I0(\dwrRowbuf_reg[31] [4]),
        .I1(douta[4]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ),
        .I3(douta[5]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I5(\dwrRowbuf_reg[31] [5]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ));
  LUT5 #(
    .INIT(32'h202A8A80)) 
    \dwrRowbuf[7]_i_2 
       (.I0(\dwrRowbuf_reg[9]_4 ),
        .I1(\dwrRowbuf_reg[31] [6]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I3(douta[6]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[8]_i_1 
       (.I0(\dwrRowbuf_reg[8] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[9] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[8]_0 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hFFE200E200000000)) 
    \dwrRowbuf[9]_i_1 
       (.I0(\dwrRowbuf_reg[9] ),
        .I1(\dwrRowbuf_reg[9]_0 ),
        .I2(\dwrRowbuf_reg[9]_1 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ),
        .I4(\dwrRowbuf_reg[9]_2 ),
        .I5(\dwrRowbuf_reg[9]_3 ),
        .O(D[2]));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size8kB_a32b128,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size8kB_a32b128__2 myMnfcore
       (.addra({myMnfcore_i_2__2_n_0,myMnfcore_i_3__0_n_0,myMnfcore_i_4__0_n_0,myMnfcore_i_5__0_n_0,myMnfcore_i_6__0_n_0,myMnfcore_i_7__0_n_0,myMnfcore_i_8_n_0,myMnfcore_i_9_n_0,myMnfcore_i_10_n_0,myMnfcore_i_11_n_0,myMnfcore_i_12_n_0}),
        .addrb(addrb),
        .clka(aclk_sig),
        .clkb(memclk),
        .dina(Q),
        .dinb(ddrAXI_rdata),
        .douta({drdRowBbuf[31],douta[27:24],drdRowBbuf[26],douta[23:22],drdRowBbuf[23],douta[21:15],drdRowBbuf[15],douta[14:0]}),
        .doutb(doutb),
        .ena(enA),
        .enb(enB),
        .wea(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .web(web));
  (* SOFT_HLUTNM = "soft_lutpair1710" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_10
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 [2]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 [2]),
        .O(myMnfcore_i_10_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1710" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_11
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 [1]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 [1]),
        .O(myMnfcore_i_11_n_0));
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_12
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 [0]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 [0]),
        .O(myMnfcore_i_12_n_0));
  LUT6 #(
    .INIT(64'h0000000088F88888)) 
    myMnfcore_i_13__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_9 ),
        .I1(enRowbufBEgrstr),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_10 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_11 [0]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_11 [1]),
        .I5(liveBNotA_memclk),
        .O(enB));
  LUT3 #(
    .INIT(8'h40)) 
    myMnfcore_i_15
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [3]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [1]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [2]),
        .O(web));
  LUT6 #(
    .INIT(64'h00000000AAC0CC00)) 
    myMnfcore_i_16
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 [8]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 [8]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [1]),
        .I5(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [3]),
        .O(addrb[8]));
  LUT6 #(
    .INIT(64'h00000000AAC0CC00)) 
    myMnfcore_i_17
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 [7]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 [7]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [1]),
        .I5(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [3]),
        .O(addrb[7]));
  LUT6 #(
    .INIT(64'h00000000AAC0CC00)) 
    myMnfcore_i_18
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 [6]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 [6]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [1]),
        .I5(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [3]),
        .O(addrb[6]));
  LUT6 #(
    .INIT(64'h00000000AAC0CC00)) 
    myMnfcore_i_19
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 [5]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 [5]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [1]),
        .I5(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [3]),
        .O(addrb[5]));
  LUT4 #(
    .INIT(16'h8BB8)) 
    myMnfcore_i_1__5
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_5 ),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_6 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_6 [1]),
        .O(enA));
  LUT6 #(
    .INIT(64'h00000000AAC0CC00)) 
    myMnfcore_i_20
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 [4]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 [4]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [1]),
        .I5(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [3]),
        .O(addrb[4]));
  LUT6 #(
    .INIT(64'h00000000AAC0CC00)) 
    myMnfcore_i_21
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 [3]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 [3]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [1]),
        .I5(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [3]),
        .O(addrb[3]));
  LUT6 #(
    .INIT(64'h00000000AAC0CC00)) 
    myMnfcore_i_22
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 [2]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 [2]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [1]),
        .I5(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [3]),
        .O(addrb[2]));
  LUT6 #(
    .INIT(64'h00000000AAC0CC00)) 
    myMnfcore_i_23
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 [1]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 [1]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [1]),
        .I5(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [3]),
        .O(addrb[1]));
  LUT6 #(
    .INIT(64'h00000000AAC0CC00)) 
    myMnfcore_i_24
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 [0]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 [0]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [2]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [1]),
        .I5(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 [3]),
        .O(addrb[0]));
  (* SOFT_HLUTNM = "soft_lutpair1706" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_2__2
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 [10]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 [10]),
        .O(myMnfcore_i_2__2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1706" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_3__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 [9]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 [9]),
        .O(myMnfcore_i_3__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1707" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_4__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 [8]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 [8]),
        .O(myMnfcore_i_4__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1707" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_5__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 [7]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 [7]),
        .O(myMnfcore_i_5__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1708" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_6__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 [6]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 [6]),
        .O(myMnfcore_i_6__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1708" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_7__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 [5]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 [5]),
        .O(myMnfcore_i_7__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1709" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_8
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 [4]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 [4]),
        .O(myMnfcore_i_8_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1709" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_9
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 [3]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 [3]),
        .O(myMnfcore_i_9_n_0));
endmodule

(* ORIG_REF_NAME = "Dpbram_size8kB_a32b128" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size8kB_a32b128__xdcDup__1
   (douta,
    D,
    \stateSwap_reg[0] ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_5 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_6 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_9 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_10 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_11 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_15 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_16 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_17 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_18 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_19 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_20 ,
    \stateSwap_reg[2] ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 ,
    aclk_sig,
    Q,
    memclk,
    web,
    addrb,
    ddrAXI_rdata,
    \dwrRowbuf_reg[1] ,
    \dwrRowbuf_reg[1]_0 ,
    \dwrRowbuf_reg[1]_1 ,
    \dwrRowbuf_reg[0] ,
    \dwrRowbuf_reg[4] ,
    \dwrRowbuf_reg[6] ,
    \dwrRowbuf_reg[0]_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ,
    \dwrRowbuf_reg[7] ,
    \dwrRowbuf_reg[30] ,
    \dwrRowbuf_reg[3] ,
    \dwrRowbuf_reg[3]_0 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_24 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_25 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 ,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 ,
    enRowbufBEgrstr,
    \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_28 ,
    liveBNotA_memclk,
    \egrfifo_reg[0][0] ,
    doutb,
    \egrfifo_reg[0][0]_0 );
  output [29:0]douta;
  output [6:0]D;
  output \stateSwap_reg[0] ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_5 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_6 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_9 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_10 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_11 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_15 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_16 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_17 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_18 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_19 ;
  output \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_20 ;
  output \stateSwap_reg[2] ;
  output [127:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 ;
  input aclk_sig;
  input [31:0]Q;
  input memclk;
  input [0:0]web;
  input [8:0]addrb;
  input [127:0]ddrAXI_rdata;
  input \dwrRowbuf_reg[1] ;
  input \dwrRowbuf_reg[1]_0 ;
  input \dwrRowbuf_reg[1]_1 ;
  input \dwrRowbuf_reg[0] ;
  input \dwrRowbuf_reg[4] ;
  input \dwrRowbuf_reg[6] ;
  input \dwrRowbuf_reg[0]_0 ;
  input [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ;
  input \dwrRowbuf_reg[7] ;
  input [27:0]\dwrRowbuf_reg[30] ;
  input \dwrRowbuf_reg[3] ;
  input \dwrRowbuf_reg[3]_0 ;
  input [1:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_24 ;
  input \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_25 ;
  input [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 ;
  input [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 ;
  input enRowbufBEgrstr;
  input [1:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_28 ;
  input liveBNotA_memclk;
  input \egrfifo_reg[0][0] ;
  input [127:0]doutb;
  input \egrfifo_reg[0][0]_0 ;

  wire [6:0]D;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_10 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_11 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_15 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_16 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_17 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_18 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_19 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_20 ;
  wire [127:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 ;
  wire [3:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ;
  wire [1:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_24 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_25 ;
  wire [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 ;
  wire [10:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 ;
  wire [1:0]\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_28 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_5 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_6 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 ;
  wire \DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_9 ;
  wire [31:0]Q;
  wire [10:0]aA;
  wire aclk_sig;
  wire [8:0]addrb;
  wire [127:0]ddrAXI_rdata;
  wire [29:0]douta;
  wire [127:0]doutb;
  wire [17:7]drdA;
  wire [127:0]drdB;
  wire \dwrRowbuf[0]_i_2_n_0 ;
  wire \dwrRowbuf[1]_i_3_n_0 ;
  wire \dwrRowbuf[1]_i_4_n_0 ;
  wire \dwrRowbuf[1]_i_5_n_0 ;
  wire \dwrRowbuf[3]_i_2_n_0 ;
  wire \dwrRowbuf[3]_i_3_n_0 ;
  wire \dwrRowbuf[3]_i_4_n_0 ;
  wire \dwrRowbuf[4]_i_2_n_0 ;
  wire \dwrRowbuf[4]_i_4_n_0 ;
  wire \dwrRowbuf[5]_i_2_n_0 ;
  wire \dwrRowbuf[5]_i_3_n_0 ;
  wire \dwrRowbuf[5]_i_4_n_0 ;
  wire \dwrRowbuf[6]_i_2_n_0 ;
  wire \dwrRowbuf[7]_i_3_n_0 ;
  wire \dwrRowbuf[7]_i_4_n_0 ;
  wire \dwrRowbuf[7]_i_5_n_0 ;
  wire \dwrRowbuf_reg[0] ;
  wire \dwrRowbuf_reg[0]_0 ;
  wire \dwrRowbuf_reg[1] ;
  wire \dwrRowbuf_reg[1]_0 ;
  wire \dwrRowbuf_reg[1]_1 ;
  wire [27:0]\dwrRowbuf_reg[30] ;
  wire \dwrRowbuf_reg[3] ;
  wire \dwrRowbuf_reg[3]_0 ;
  wire \dwrRowbuf_reg[4] ;
  wire \dwrRowbuf_reg[6] ;
  wire \dwrRowbuf_reg[7] ;
  wire \egrfifo_reg[0][0] ;
  wire \egrfifo_reg[0][0]_0 ;
  wire enA2;
  wire enA8_out;
  wire enB19_out;
  wire enRowbufBEgrstr;
  wire liveBNotA_memclk;
  wire memclk;
  wire \stateSwap_reg[0] ;
  wire \stateSwap_reg[2] ;
  wire [0:0]web;

  LUT5 #(
    .INIT(32'hAAB40000)) 
    \dwrRowbuf[0]_i_1 
       (.I0(\dwrRowbuf[0]_i_2_n_0 ),
        .I1(\dwrRowbuf_reg[0] ),
        .I2(\dwrRowbuf_reg[0]_0 ),
        .I3(\dwrRowbuf_reg[1]_0 ),
        .I4(\dwrRowbuf_reg[1]_1 ),
        .O(D[0]));
  (* SOFT_HLUTNM = "soft_lutpair1684" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[0]_i_2 
       (.I0(douta[0]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [0]),
        .O(\dwrRowbuf[0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1691" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[10]_i_3 
       (.I0(douta[9]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [10]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 ));
  (* SOFT_HLUTNM = "soft_lutpair1691" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[11]_i_3 
       (.I0(douta[10]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [11]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_9 ));
  (* SOFT_HLUTNM = "soft_lutpair1690" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[12]_i_3 
       (.I0(douta[11]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [12]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 ));
  (* SOFT_HLUTNM = "soft_lutpair1692" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[13]_i_3 
       (.I0(douta[12]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [13]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_11 ));
  (* SOFT_HLUTNM = "soft_lutpair1693" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[14]_i_4 
       (.I0(douta[13]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [14]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 ));
  (* SOFT_HLUTNM = "soft_lutpair1690" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[16]_i_3 
       (.I0(douta[15]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [15]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_6 ));
  (* SOFT_HLUTNM = "soft_lutpair1689" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[17]_i_3 
       (.I0(drdA[17]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [16]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_5 ));
  (* SOFT_HLUTNM = "soft_lutpair1688" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[18]_i_3 
       (.I0(douta[16]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [17]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ));
  (* SOFT_HLUTNM = "soft_lutpair1689" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[19]_i_3 
       (.I0(douta[17]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [18]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 ));
  LUT6 #(
    .INIT(64'hFF69006900000000)) 
    \dwrRowbuf[1]_i_1 
       (.I0(\dwrRowbuf_reg[1] ),
        .I1(\dwrRowbuf[1]_i_3_n_0 ),
        .I2(\dwrRowbuf[1]_i_4_n_0 ),
        .I3(\dwrRowbuf_reg[1]_0 ),
        .I4(\dwrRowbuf[1]_i_5_n_0 ),
        .I5(\dwrRowbuf_reg[1]_1 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'h8A802A20808A202A)) 
    \dwrRowbuf[1]_i_3 
       (.I0(\dwrRowbuf_reg[0] ),
        .I1(douta[0]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I3(\dwrRowbuf_reg[30] [0]),
        .I4(douta[1]),
        .I5(\dwrRowbuf_reg[30] [1]),
        .O(\dwrRowbuf[1]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1684" *) 
  LUT5 #(
    .INIT(32'h08000888)) 
    \dwrRowbuf[1]_i_4 
       (.I0(\dwrRowbuf_reg[0]_0 ),
        .I1(\dwrRowbuf_reg[0] ),
        .I2(douta[0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I4(\dwrRowbuf_reg[30] [0]),
        .O(\dwrRowbuf[1]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1699" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[1]_i_5 
       (.I0(douta[1]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [1]),
        .O(\dwrRowbuf[1]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1687" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[20]_i_3 
       (.I0(douta[18]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [19]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ));
  (* SOFT_HLUTNM = "soft_lutpair1687" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[21]_i_3 
       (.I0(douta[19]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [20]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1688" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[22]_i_4 
       (.I0(douta[20]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [21]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ));
  (* SOFT_HLUTNM = "soft_lutpair1695" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[24]_i_3 
       (.I0(douta[22]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [22]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_17 ));
  (* SOFT_HLUTNM = "soft_lutpair1696" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[25]_i_4 
       (.I0(douta[23]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [23]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_19 ));
  (* SOFT_HLUTNM = "soft_lutpair1694" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[27]_i_3 
       (.I0(douta[25]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [24]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 ));
  (* SOFT_HLUTNM = "soft_lutpair1696" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[28]_i_3 
       (.I0(douta[26]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [25]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_18 ));
  (* SOFT_HLUTNM = "soft_lutpair1695" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[29]_i_3 
       (.I0(douta[27]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [26]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_16 ));
  LUT5 #(
    .INIT(32'hFFBF37BB)) 
    \dwrRowbuf[2]_i_4 
       (.I0(\dwrRowbuf[0]_i_2_n_0 ),
        .I1(\dwrRowbuf_reg[0] ),
        .I2(\dwrRowbuf_reg[0]_0 ),
        .I3(\dwrRowbuf[1]_i_5_n_0 ),
        .I4(\dwrRowbuf_reg[1] ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ));
  (* SOFT_HLUTNM = "soft_lutpair1700" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[2]_i_5 
       (.I0(douta[2]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [2]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_20 ));
  (* SOFT_HLUTNM = "soft_lutpair1694" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[30]_i_5 
       (.I0(douta[28]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [27]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_15 ));
  LUT6 #(
    .INIT(64'hCCCCD72800000000)) 
    \dwrRowbuf[3]_i_1 
       (.I0(\dwrRowbuf_reg[0] ),
        .I1(\dwrRowbuf[3]_i_2_n_0 ),
        .I2(\dwrRowbuf[3]_i_3_n_0 ),
        .I3(\dwrRowbuf[3]_i_4_n_0 ),
        .I4(\dwrRowbuf_reg[1]_0 ),
        .I5(\dwrRowbuf_reg[1]_1 ),
        .O(D[2]));
  (* SOFT_HLUTNM = "soft_lutpair1699" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[3]_i_2 
       (.I0(douta[3]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [3]),
        .O(\dwrRowbuf[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hCCC0AAAACCC0A0A0)) 
    \dwrRowbuf[3]_i_3 
       (.I0(\dwrRowbuf_reg[30] [2]),
        .I1(douta[2]),
        .I2(\dwrRowbuf[0]_i_2_n_0 ),
        .I3(douta[1]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I5(\dwrRowbuf_reg[30] [1]),
        .O(\dwrRowbuf[3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h3F00FF0F2F002F00)) 
    \dwrRowbuf[3]_i_4 
       (.I0(\dwrRowbuf[1]_i_3_n_0 ),
        .I1(\dwrRowbuf_reg[1] ),
        .I2(\dwrRowbuf_reg[3] ),
        .I3(\dwrRowbuf_reg[3]_0 ),
        .I4(\dwrRowbuf[1]_i_5_n_0 ),
        .I5(\dwrRowbuf[1]_i_4_n_0 ),
        .O(\dwrRowbuf[3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCD72800000000)) 
    \dwrRowbuf[4]_i_1 
       (.I0(\dwrRowbuf_reg[0] ),
        .I1(\dwrRowbuf[4]_i_2_n_0 ),
        .I2(\dwrRowbuf_reg[4] ),
        .I3(\dwrRowbuf[4]_i_4_n_0 ),
        .I4(\dwrRowbuf_reg[1]_0 ),
        .I5(\dwrRowbuf_reg[1]_1 ),
        .O(D[3]));
  (* SOFT_HLUTNM = "soft_lutpair1698" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[4]_i_2 
       (.I0(douta[4]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [4]),
        .O(\dwrRowbuf[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h2228882800000000)) 
    \dwrRowbuf[4]_i_4 
       (.I0(\dwrRowbuf[3]_i_4_n_0 ),
        .I1(\dwrRowbuf[3]_i_3_n_0 ),
        .I2(\dwrRowbuf_reg[30] [3]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I4(douta[3]),
        .I5(\dwrRowbuf_reg[0] ),
        .O(\dwrRowbuf[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCD72800000000)) 
    \dwrRowbuf[5]_i_1 
       (.I0(\dwrRowbuf_reg[0] ),
        .I1(\dwrRowbuf[5]_i_2_n_0 ),
        .I2(\dwrRowbuf[5]_i_3_n_0 ),
        .I3(\dwrRowbuf[5]_i_4_n_0 ),
        .I4(\dwrRowbuf_reg[1]_0 ),
        .I5(\dwrRowbuf_reg[1]_1 ),
        .O(D[4]));
  (* SOFT_HLUTNM = "soft_lutpair1698" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[5]_i_2 
       (.I0(douta[5]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [5]),
        .O(\dwrRowbuf[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hA0A0C0000000C000)) 
    \dwrRowbuf[5]_i_3 
       (.I0(douta[3]),
        .I1(\dwrRowbuf_reg[30] [3]),
        .I2(\dwrRowbuf[3]_i_3_n_0 ),
        .I3(\dwrRowbuf_reg[30] [4]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I5(douta[4]),
        .O(\dwrRowbuf[5]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h28000000)) 
    \dwrRowbuf[5]_i_4 
       (.I0(\dwrRowbuf[3]_i_4_n_0 ),
        .I1(\dwrRowbuf[3]_i_2_n_0 ),
        .I2(\dwrRowbuf[3]_i_3_n_0 ),
        .I3(\dwrRowbuf[4]_i_2_n_0 ),
        .I4(\dwrRowbuf_reg[0] ),
        .O(\dwrRowbuf[5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hCCCCD72800000000)) 
    \dwrRowbuf[6]_i_1 
       (.I0(\dwrRowbuf_reg[0] ),
        .I1(\dwrRowbuf[6]_i_2_n_0 ),
        .I2(\dwrRowbuf_reg[6] ),
        .I3(\dwrRowbuf[7]_i_3_n_0 ),
        .I4(\dwrRowbuf_reg[1]_0 ),
        .I5(\dwrRowbuf_reg[1]_1 ),
        .O(D[5]));
  (* SOFT_HLUTNM = "soft_lutpair1697" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[6]_i_2 
       (.I0(douta[6]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [6]),
        .O(\dwrRowbuf[6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFF00780000007800)) 
    \dwrRowbuf[7]_i_1 
       (.I0(\dwrRowbuf_reg[7] ),
        .I1(\dwrRowbuf[7]_i_3_n_0 ),
        .I2(\dwrRowbuf[7]_i_4_n_0 ),
        .I3(\dwrRowbuf_reg[1]_1 ),
        .I4(\dwrRowbuf_reg[1]_0 ),
        .I5(\dwrRowbuf[7]_i_5_n_0 ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'h0880000000000000)) 
    \dwrRowbuf[7]_i_3 
       (.I0(\dwrRowbuf[3]_i_4_n_0 ),
        .I1(\dwrRowbuf[4]_i_2_n_0 ),
        .I2(\dwrRowbuf[3]_i_3_n_0 ),
        .I3(\dwrRowbuf[3]_i_2_n_0 ),
        .I4(\dwrRowbuf[5]_i_2_n_0 ),
        .I5(\dwrRowbuf_reg[0] ),
        .O(\dwrRowbuf[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h202A8A808A808A80)) 
    \dwrRowbuf[7]_i_4 
       (.I0(\dwrRowbuf_reg[0] ),
        .I1(drdA[7]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I3(\dwrRowbuf_reg[30] [7]),
        .I4(\dwrRowbuf_reg[6] ),
        .I5(\dwrRowbuf[6]_i_2_n_0 ),
        .O(\dwrRowbuf[7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1697" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[7]_i_5 
       (.I0(drdA[7]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [7]),
        .O(\dwrRowbuf[7]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1692" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[8]_i_3 
       (.I0(douta[7]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [8]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_10 ));
  (* SOFT_HLUTNM = "soft_lutpair1693" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrRowbuf[9]_i_3 
       (.I0(douta[8]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\dwrRowbuf_reg[30] [9]),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 ));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][0]_i_1 
       (.I0(drdB[0]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[0]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [0]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][100]_i_1 
       (.I0(drdB[100]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[100]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [100]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][101]_i_1 
       (.I0(drdB[101]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[101]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [101]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][102]_i_1 
       (.I0(drdB[102]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[102]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [102]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][103]_i_1 
       (.I0(drdB[103]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[103]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [103]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][104]_i_1 
       (.I0(drdB[104]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[104]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [104]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][105]_i_1 
       (.I0(drdB[105]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[105]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [105]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][106]_i_1 
       (.I0(drdB[106]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[106]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [106]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][107]_i_1 
       (.I0(drdB[107]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[107]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [107]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][108]_i_1 
       (.I0(drdB[108]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[108]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [108]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][109]_i_1 
       (.I0(drdB[109]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[109]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [109]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][10]_i_1 
       (.I0(drdB[10]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[10]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [10]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][110]_i_1 
       (.I0(drdB[110]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[110]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [110]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][111]_i_1 
       (.I0(drdB[111]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[111]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [111]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][112]_i_1 
       (.I0(drdB[112]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[112]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [112]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][113]_i_1 
       (.I0(drdB[113]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[113]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [113]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][114]_i_1 
       (.I0(drdB[114]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[114]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [114]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][115]_i_1 
       (.I0(drdB[115]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[115]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [115]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][116]_i_1 
       (.I0(drdB[116]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[116]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [116]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][117]_i_1 
       (.I0(drdB[117]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[117]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [117]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][118]_i_1 
       (.I0(drdB[118]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[118]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [118]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][119]_i_1 
       (.I0(drdB[119]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[119]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [119]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][11]_i_1 
       (.I0(drdB[11]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[11]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [11]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][120]_i_1 
       (.I0(drdB[120]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[120]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [120]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][121]_i_1 
       (.I0(drdB[121]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[121]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [121]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][122]_i_1 
       (.I0(drdB[122]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[122]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [122]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][123]_i_1 
       (.I0(drdB[123]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[123]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [123]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][124]_i_1 
       (.I0(drdB[124]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[124]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [124]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][125]_i_1 
       (.I0(drdB[125]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[125]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [125]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][126]_i_1 
       (.I0(drdB[126]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[126]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [126]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][127]_i_2 
       (.I0(drdB[127]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[127]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [127]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][12]_i_1 
       (.I0(drdB[12]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[12]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [12]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][13]_i_1 
       (.I0(drdB[13]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[13]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [13]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][14]_i_1 
       (.I0(drdB[14]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[14]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [14]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][15]_i_1 
       (.I0(drdB[15]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[15]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [15]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][16]_i_1 
       (.I0(drdB[16]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[16]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [16]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][17]_i_1 
       (.I0(drdB[17]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[17]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [17]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][18]_i_1 
       (.I0(drdB[18]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[18]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [18]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][19]_i_1 
       (.I0(drdB[19]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[19]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [19]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][1]_i_1 
       (.I0(drdB[1]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[1]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [1]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][20]_i_1 
       (.I0(drdB[20]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[20]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [20]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][21]_i_1 
       (.I0(drdB[21]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[21]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [21]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][22]_i_1 
       (.I0(drdB[22]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[22]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [22]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][23]_i_1 
       (.I0(drdB[23]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[23]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [23]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][24]_i_1 
       (.I0(drdB[24]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[24]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [24]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][25]_i_1 
       (.I0(drdB[25]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[25]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [25]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][26]_i_1 
       (.I0(drdB[26]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[26]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [26]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][27]_i_1 
       (.I0(drdB[27]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[27]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [27]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][28]_i_1 
       (.I0(drdB[28]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[28]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [28]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][29]_i_1 
       (.I0(drdB[29]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[29]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [29]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][2]_i_1 
       (.I0(drdB[2]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[2]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [2]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][30]_i_1 
       (.I0(drdB[30]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[30]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [30]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][31]_i_1 
       (.I0(drdB[31]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[31]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [31]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][32]_i_1 
       (.I0(drdB[32]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[32]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [32]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][33]_i_1 
       (.I0(drdB[33]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[33]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [33]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][34]_i_1 
       (.I0(drdB[34]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[34]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [34]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][35]_i_1 
       (.I0(drdB[35]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[35]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [35]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][36]_i_1 
       (.I0(drdB[36]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[36]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [36]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][37]_i_1 
       (.I0(drdB[37]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[37]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [37]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][38]_i_1 
       (.I0(drdB[38]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[38]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [38]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][39]_i_1 
       (.I0(drdB[39]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[39]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [39]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][3]_i_1 
       (.I0(drdB[3]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[3]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [3]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][40]_i_1 
       (.I0(drdB[40]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[40]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [40]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][41]_i_1 
       (.I0(drdB[41]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[41]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [41]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][42]_i_1 
       (.I0(drdB[42]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[42]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [42]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][43]_i_1 
       (.I0(drdB[43]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[43]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [43]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][44]_i_1 
       (.I0(drdB[44]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[44]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [44]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][45]_i_1 
       (.I0(drdB[45]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[45]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [45]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][46]_i_1 
       (.I0(drdB[46]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[46]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [46]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][47]_i_1 
       (.I0(drdB[47]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[47]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [47]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][48]_i_1 
       (.I0(drdB[48]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[48]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [48]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][49]_i_1 
       (.I0(drdB[49]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[49]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [49]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][4]_i_1 
       (.I0(drdB[4]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[4]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [4]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][50]_i_1 
       (.I0(drdB[50]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[50]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [50]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][51]_i_1 
       (.I0(drdB[51]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[51]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [51]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][52]_i_1 
       (.I0(drdB[52]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[52]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [52]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][53]_i_1 
       (.I0(drdB[53]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[53]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [53]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][54]_i_1 
       (.I0(drdB[54]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[54]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [54]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][55]_i_1 
       (.I0(drdB[55]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[55]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [55]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][56]_i_1 
       (.I0(drdB[56]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[56]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [56]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][57]_i_1 
       (.I0(drdB[57]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[57]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [57]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][58]_i_1 
       (.I0(drdB[58]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[58]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [58]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][59]_i_1 
       (.I0(drdB[59]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[59]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [59]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][5]_i_1 
       (.I0(drdB[5]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[5]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [5]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][60]_i_1 
       (.I0(drdB[60]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[60]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [60]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][61]_i_1 
       (.I0(drdB[61]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[61]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [61]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][62]_i_1 
       (.I0(drdB[62]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[62]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [62]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][63]_i_1 
       (.I0(drdB[63]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[63]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [63]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][64]_i_1 
       (.I0(drdB[64]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[64]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [64]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][65]_i_1 
       (.I0(drdB[65]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[65]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [65]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][66]_i_1 
       (.I0(drdB[66]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[66]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [66]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][67]_i_1 
       (.I0(drdB[67]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[67]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [67]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][68]_i_1 
       (.I0(drdB[68]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[68]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [68]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][69]_i_1 
       (.I0(drdB[69]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[69]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [69]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][6]_i_1 
       (.I0(drdB[6]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[6]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [6]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][70]_i_1 
       (.I0(drdB[70]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[70]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [70]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][71]_i_1 
       (.I0(drdB[71]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[71]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [71]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][72]_i_1 
       (.I0(drdB[72]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[72]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [72]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][73]_i_1 
       (.I0(drdB[73]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[73]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [73]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][74]_i_1 
       (.I0(drdB[74]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[74]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [74]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][75]_i_1 
       (.I0(drdB[75]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[75]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [75]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][76]_i_1 
       (.I0(drdB[76]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[76]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [76]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][77]_i_1 
       (.I0(drdB[77]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[77]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [77]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][78]_i_1 
       (.I0(drdB[78]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[78]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [78]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][79]_i_1 
       (.I0(drdB[79]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[79]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [79]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][7]_i_1 
       (.I0(drdB[7]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[7]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [7]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][80]_i_1 
       (.I0(drdB[80]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[80]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [80]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][81]_i_1 
       (.I0(drdB[81]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[81]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [81]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][82]_i_1 
       (.I0(drdB[82]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[82]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [82]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][83]_i_1 
       (.I0(drdB[83]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[83]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [83]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][84]_i_1 
       (.I0(drdB[84]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[84]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [84]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][85]_i_1 
       (.I0(drdB[85]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[85]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [85]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][86]_i_1 
       (.I0(drdB[86]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[86]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [86]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][87]_i_1 
       (.I0(drdB[87]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[87]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [87]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][88]_i_1 
       (.I0(drdB[88]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[88]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [88]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][89]_i_1 
       (.I0(drdB[89]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[89]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [89]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][8]_i_1 
       (.I0(drdB[8]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[8]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [8]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][90]_i_1 
       (.I0(drdB[90]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[90]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [90]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][91]_i_1 
       (.I0(drdB[91]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[91]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [91]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][92]_i_1 
       (.I0(drdB[92]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[92]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [92]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][93]_i_1 
       (.I0(drdB[93]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[93]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [93]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][94]_i_1 
       (.I0(drdB[94]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[94]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [94]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][95]_i_1 
       (.I0(drdB[95]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[95]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [95]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][96]_i_1 
       (.I0(drdB[96]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[96]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [96]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][97]_i_1 
       (.I0(drdB[97]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[97]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [97]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][98]_i_1 
       (.I0(drdB[98]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[98]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [98]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][99]_i_1 
       (.I0(drdB[99]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[99]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [99]));
  LUT4 #(
    .INIT(16'hF888)) 
    \egrfifo[2][9]_i_1 
       (.I0(drdB[9]),
        .I1(\egrfifo_reg[0][0] ),
        .I2(doutb[9]),
        .I3(\egrfifo_reg[0][0]_0 ),
        .O(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 [9]));
  (* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size8kB_a32b128,blk_mem_gen_v8_4_9,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size8kB_a32b128 myMnfcore
       (.addra(aA),
        .addrb(addrb),
        .clka(aclk_sig),
        .clkb(memclk),
        .dina(Q),
        .dinb(ddrAXI_rdata),
        .douta({douta[29:16],drdA[17],douta[15:7],drdA[7],douta[6:0]}),
        .doutb(drdB),
        .ena(enA8_out),
        .enb(enB19_out),
        .wea(enA2),
        .web(web));
  (* SOFT_HLUTNM = "soft_lutpair1704" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_10__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 [3]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 [3]),
        .O(aA[3]));
  (* SOFT_HLUTNM = "soft_lutpair1704" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_11__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 [2]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 [2]),
        .O(aA[2]));
  (* SOFT_HLUTNM = "soft_lutpair1705" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_12__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 [1]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 [1]),
        .O(aA[1]));
  (* SOFT_HLUTNM = "soft_lutpair1705" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_13
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 [0]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 [0]),
        .O(aA[0]));
  LUT6 #(
    .INIT(64'h88F8888800000000)) 
    myMnfcore_i_14
       (.I0(\stateSwap_reg[0] ),
        .I1(enRowbufBEgrstr),
        .I2(\stateSwap_reg[2] ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_28 [0]),
        .I4(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_28 [1]),
        .I5(liveBNotA_memclk),
        .O(enB19_out));
  (* SOFT_HLUTNM = "soft_lutpair1686" *) 
  LUT4 #(
    .INIT(16'h6F60)) 
    myMnfcore_i_1__4
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_24 [0]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_24 [1]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_25 ),
        .O(enA8_out));
  (* SOFT_HLUTNM = "soft_lutpair1685" *) 
  LUT4 #(
    .INIT(16'h002C)) 
    myMnfcore_i_25
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 [0]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 [2]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 [1]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 [3]),
        .O(\stateSwap_reg[0] ));
  (* SOFT_HLUTNM = "soft_lutpair1685" *) 
  LUT4 #(
    .INIT(16'hFF9D)) 
    myMnfcore_i_26
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 [2]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 [1]),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 [0]),
        .I3(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 [3]),
        .O(\stateSwap_reg[2] ));
  (* SOFT_HLUTNM = "soft_lutpair1686" *) 
  LUT1 #(
    .INIT(2'h1)) 
    myMnfcore_i_2__1
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .O(enA2));
  (* SOFT_HLUTNM = "soft_lutpair1700" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_3__1
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 [10]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 [10]),
        .O(aA[10]));
  (* SOFT_HLUTNM = "soft_lutpair1701" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_4__1
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 [9]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 [9]),
        .O(aA[9]));
  (* SOFT_HLUTNM = "soft_lutpair1701" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_5__1
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 [8]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 [8]),
        .O(aA[8]));
  (* SOFT_HLUTNM = "soft_lutpair1702" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_6__1
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 [7]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 [7]),
        .O(aA[7]));
  (* SOFT_HLUTNM = "soft_lutpair1702" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_7__1
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 [6]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 [6]),
        .O(aA[6]));
  (* SOFT_HLUTNM = "soft_lutpair1703" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_8__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 [5]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 [5]),
        .O(aA[5]));
  (* SOFT_HLUTNM = "soft_lutpair1703" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    myMnfcore_i_9__0
       (.I0(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 [4]),
        .I1(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 ),
        .I2(\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 [4]),
        .O(aA[4]));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a32b64,blk_mem_gen_v8_4_9,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a32b64
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [8:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [31:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [31:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [7:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [8:0]addra;
  wire [7:0]addrb;
  wire clka;
  wire [31:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [31:0]NLW_U0_douta_UNCONNECTED;
  wire [7:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [7:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "9" *) 
  (* C_ADDRB_WIDTH = "8" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.000303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size2kB_a32b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "512" *) 
  (* C_READ_DEPTH_B = "256" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "32" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "512" *) 
  (* C_WRITE_DEPTH_B = "256" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "32" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina({dina[31],1'b0,1'b0,1'b0,1'b0,dina[26:16],1'b0,1'b0,1'b0,1'b0,1'b0,dina[10:0]}),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[31:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[7:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[7:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a64b64,blk_mem_gen_v8_4_9,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a64b64
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [7:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [63:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [63:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [7:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [7:0]addra;
  wire [7:0]addrb;
  wire clka;
  wire [63:0]dina;
  wire [59:0]\^doutb ;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [63:0]NLW_U0_douta_UNCONNECTED;
  wire [63:60]NLW_U0_doutb_UNCONNECTED;
  wire [7:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [7:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[63] = \<const0> ;
  assign douta[62] = \<const0> ;
  assign douta[61] = \<const0> ;
  assign douta[60] = \<const0> ;
  assign douta[59] = \<const0> ;
  assign douta[58] = \<const0> ;
  assign douta[57] = \<const0> ;
  assign douta[56] = \<const0> ;
  assign douta[55] = \<const0> ;
  assign douta[54] = \<const0> ;
  assign douta[53] = \<const0> ;
  assign douta[52] = \<const0> ;
  assign douta[51] = \<const0> ;
  assign douta[50] = \<const0> ;
  assign douta[49] = \<const0> ;
  assign douta[48] = \<const0> ;
  assign douta[47] = \<const0> ;
  assign douta[46] = \<const0> ;
  assign douta[45] = \<const0> ;
  assign douta[44] = \<const0> ;
  assign douta[43] = \<const0> ;
  assign douta[42] = \<const0> ;
  assign douta[41] = \<const0> ;
  assign douta[40] = \<const0> ;
  assign douta[39] = \<const0> ;
  assign douta[38] = \<const0> ;
  assign douta[37] = \<const0> ;
  assign douta[36] = \<const0> ;
  assign douta[35] = \<const0> ;
  assign douta[34] = \<const0> ;
  assign douta[33] = \<const0> ;
  assign douta[32] = \<const0> ;
  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  assign doutb[63] = \<const0> ;
  assign doutb[62] = \<const0> ;
  assign doutb[61] = \<const0> ;
  assign doutb[60] = \<const0> ;
  assign doutb[59:0] = \^doutb [59:0];
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "8" *) 
  (* C_ADDRB_WIDTH = "8" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.476303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size2kB_a64b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "256" *) 
  (* C_READ_DEPTH_B = "256" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "64" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "256" *) 
  (* C_WRITE_DEPTH_B = "256" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "64" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized5 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina({1'b0,1'b0,1'b0,1'b0,dina[59:0]}),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[63:0]),
        .doutb({NLW_U0_doutb_UNCONNECTED[63:60],\^doutb }),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[7:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[7:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a8b8,blk_mem_gen_v8_4_9,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a8b8
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [10:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [7:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [7:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [10:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [7:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [7:0]doutb;

  wire \<const0> ;
  wire [10:0]addra;
  wire [10:0]addrb;
  wire clka;
  wire [7:0]dina;
  wire [7:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [7:0]NLW_U0_douta_UNCONNECTED;
  wire [10:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [10:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [7:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "11" *) 
  (* C_ADDRB_WIDTH = "11" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "1" *) 
  (* C_COUNT_36K_BRAM = "0" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     2.05356 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size2kB_a8b8.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "2048" *) 
  (* C_READ_DEPTH_B = "2048" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "8" *) 
  (* C_READ_WIDTH_B = "8" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "2048" *) 
  (* C_WRITE_DEPTH_B = "2048" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "8" *) 
  (* C_WRITE_WIDTH_B = "8" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized1 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[10:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[10:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[7:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a8b8,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size2kB_a8b8" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a8b8__5
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [10:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [7:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [7:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [10:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [7:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [7:0]doutb;

  wire \<const0> ;
  wire [10:0]addra;
  wire [10:0]addrb;
  wire clka;
  wire [7:0]dina;
  wire [7:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [7:0]NLW_U0_douta_UNCONNECTED;
  wire [10:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [10:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [7:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "11" *) 
  (* C_ADDRB_WIDTH = "11" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "1" *) 
  (* C_COUNT_36K_BRAM = "0" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     2.05356 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size2kB_a8b8.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "2048" *) 
  (* C_READ_DEPTH_B = "2048" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "8" *) 
  (* C_READ_WIDTH_B = "8" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "2048" *) 
  (* C_WRITE_DEPTH_B = "2048" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "8" *) 
  (* C_WRITE_WIDTH_B = "8" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized1__5 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[10:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[10:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[7:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a8b8,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size2kB_a8b8" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a8b8__6
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [10:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [7:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [7:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [10:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [7:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [7:0]doutb;

  wire \<const0> ;
  wire [10:0]addra;
  wire [10:0]addrb;
  wire clka;
  wire [7:0]dina;
  wire [7:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [7:0]NLW_U0_douta_UNCONNECTED;
  wire [10:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [10:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [7:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "11" *) 
  (* C_ADDRB_WIDTH = "11" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "1" *) 
  (* C_COUNT_36K_BRAM = "0" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     2.05356 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size2kB_a8b8.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "2048" *) 
  (* C_READ_DEPTH_B = "2048" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "8" *) 
  (* C_READ_WIDTH_B = "8" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "2048" *) 
  (* C_WRITE_DEPTH_B = "2048" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "8" *) 
  (* C_WRITE_WIDTH_B = "8" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized1__6 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[10:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[10:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[7:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a8b8,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size2kB_a8b8" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a8b8__7
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [10:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [7:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [7:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [10:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [7:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [7:0]doutb;

  wire \<const0> ;
  wire [10:0]addra;
  wire [10:0]addrb;
  wire clka;
  wire [7:0]dina;
  wire [7:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [7:0]NLW_U0_douta_UNCONNECTED;
  wire [10:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [10:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [7:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "11" *) 
  (* C_ADDRB_WIDTH = "11" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "1" *) 
  (* C_COUNT_36K_BRAM = "0" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     2.05356 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size2kB_a8b8.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "2048" *) 
  (* C_READ_DEPTH_B = "2048" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "8" *) 
  (* C_READ_WIDTH_B = "8" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "2048" *) 
  (* C_WRITE_DEPTH_B = "2048" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "8" *) 
  (* C_WRITE_WIDTH_B = "8" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized1__7 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[10:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[10:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[7:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size2kB_a8b8,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size2kB_a8b8" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size2kB_a8b8__8
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [10:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [7:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [7:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [10:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [7:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [7:0]doutb;

  wire \<const0> ;
  wire [10:0]addra;
  wire [10:0]addrb;
  wire clka;
  wire [7:0]dina;
  wire [7:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [7:0]NLW_U0_douta_UNCONNECTED;
  wire [10:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [10:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [7:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "11" *) 
  (* C_ADDRB_WIDTH = "11" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "1" *) 
  (* C_COUNT_36K_BRAM = "0" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     2.05356 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size2kB_a8b8.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "2048" *) 
  (* C_READ_DEPTH_B = "2048" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "8" *) 
  (* C_READ_WIDTH_B = "8" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "2048" *) 
  (* C_WRITE_DEPTH_B = "2048" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "8" *) 
  (* C_WRITE_WIDTH_B = "8" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized1__8 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[10:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[10:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[7:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size38kB_a8b64,blk_mem_gen_v8_4_9,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size38kB_a8b64
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [15:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [7:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [7:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [12:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [12:0]addrb;
  wire clkb;
  wire [63:0]doutb;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [7:0]NLW_U0_douta_UNCONNECTED;
  wire [12:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [12:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "16" *) 
  (* C_ADDRB_WIDTH = "13" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "10" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     26.47852 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size38kB_a8b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "38912" *) 
  (* C_READ_DEPTH_B = "4864" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "8" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "38912" *) 
  (* C_WRITE_DEPTH_B = "4864" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "8" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized7 U0
       (.addra({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .addrb(addrb),
        .clka(1'b0),
        .clkb(clkb),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(1'b0),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[12:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[12:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size38kB_a8b64,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size38kB_a8b64" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size38kB_a8b64__2
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [15:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [7:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [7:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [12:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [15:0]addra;
  wire [12:0]addrb;
  wire clkb;
  wire [7:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [7:0]NLW_U0_douta_UNCONNECTED;
  wire [12:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [12:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "16" *) 
  (* C_ADDRB_WIDTH = "13" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "10" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     26.47852 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size38kB_a8b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "38912" *) 
  (* C_READ_DEPTH_B = "4864" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "8" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "38912" *) 
  (* C_WRITE_DEPTH_B = "4864" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "8" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized7__2 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(1'b0),
        .clkb(clkb),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[7:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[12:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[12:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a32b64,blk_mem_gen_v8_4_9,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a32b64
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [9:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [31:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [31:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [8:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [9:0]addra;
  wire [8:0]addrb;
  wire clka;
  wire [31:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [31:0]NLW_U0_douta_UNCONNECTED;
  wire [8:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [8:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "10" *) 
  (* C_ADDRB_WIDTH = "9" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.000303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size4kB_a32b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "1024" *) 
  (* C_READ_DEPTH_B = "512" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "32" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "1024" *) 
  (* C_WRITE_DEPTH_B = "512" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "32" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized3 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina({dina[31:30],1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,dina[21:0]}),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[31:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[8:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[8:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a32b64,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size4kB_a32b64" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a32b64__4
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [9:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [31:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [31:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [8:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [9:0]addra;
  wire [8:0]addrb;
  wire clka;
  wire clkb;
  wire [31:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [31:0]NLW_U0_douta_UNCONNECTED;
  wire [8:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [8:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "10" *) 
  (* C_ADDRB_WIDTH = "9" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.000303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size4kB_a32b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "1024" *) 
  (* C_READ_DEPTH_B = "512" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "32" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "1024" *) 
  (* C_WRITE_DEPTH_B = "512" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "32" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized3__4 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(clkb),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina({dina[31:30],1'b0,1'b0,1'b0,1'b0,1'b0,dina[24:0]}),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[31:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[8:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[8:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a32b64,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size4kB_a32b64" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a32b64__5
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [9:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [31:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [31:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [8:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [9:0]addra;
  wire [8:0]addrb;
  wire clka;
  wire [31:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [31:0]NLW_U0_douta_UNCONNECTED;
  wire [8:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [8:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "10" *) 
  (* C_ADDRB_WIDTH = "9" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.000303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size4kB_a32b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "1024" *) 
  (* C_READ_DEPTH_B = "512" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "32" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "1024" *) 
  (* C_WRITE_DEPTH_B = "512" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "32" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized3__5 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[31:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[8:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[8:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a32b64,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size4kB_a32b64" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a32b64__6
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [9:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [31:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [31:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [8:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [9:0]addra;
  wire [8:0]addrb;
  wire clka;
  wire [31:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [31:0]NLW_U0_douta_UNCONNECTED;
  wire [8:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [8:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "10" *) 
  (* C_ADDRB_WIDTH = "9" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.000303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size4kB_a32b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "1024" *) 
  (* C_READ_DEPTH_B = "512" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "32" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "1024" *) 
  (* C_WRITE_DEPTH_B = "512" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "32" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized3__6 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[31:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[8:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[8:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a64b64,blk_mem_gen_v8_4_9,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a64b64
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [8:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [63:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [63:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [8:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [8:0]addra;
  wire [8:0]addrb;
  wire clka;
  wire [63:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [63:0]NLW_U0_douta_UNCONNECTED;
  wire [8:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [8:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[63] = \<const0> ;
  assign douta[62] = \<const0> ;
  assign douta[61] = \<const0> ;
  assign douta[60] = \<const0> ;
  assign douta[59] = \<const0> ;
  assign douta[58] = \<const0> ;
  assign douta[57] = \<const0> ;
  assign douta[56] = \<const0> ;
  assign douta[55] = \<const0> ;
  assign douta[54] = \<const0> ;
  assign douta[53] = \<const0> ;
  assign douta[52] = \<const0> ;
  assign douta[51] = \<const0> ;
  assign douta[50] = \<const0> ;
  assign douta[49] = \<const0> ;
  assign douta[48] = \<const0> ;
  assign douta[47] = \<const0> ;
  assign douta[46] = \<const0> ;
  assign douta[45] = \<const0> ;
  assign douta[44] = \<const0> ;
  assign douta[43] = \<const0> ;
  assign douta[42] = \<const0> ;
  assign douta[41] = \<const0> ;
  assign douta[40] = \<const0> ;
  assign douta[39] = \<const0> ;
  assign douta[38] = \<const0> ;
  assign douta[37] = \<const0> ;
  assign douta[36] = \<const0> ;
  assign douta[35] = \<const0> ;
  assign douta[34] = \<const0> ;
  assign douta[33] = \<const0> ;
  assign douta[32] = \<const0> ;
  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "9" *) 
  (* C_ADDRB_WIDTH = "9" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.476303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size4kB_a64b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "512" *) 
  (* C_READ_DEPTH_B = "512" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "64" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "512" *) 
  (* C_WRITE_DEPTH_B = "512" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "64" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized17 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[63:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[8:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[8:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a64b64,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size4kB_a64b64" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a64b64__5
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [8:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [63:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [63:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [8:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [8:0]addra;
  wire [8:0]addrb;
  wire clka;
  wire [63:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [63:0]NLW_U0_douta_UNCONNECTED;
  wire [8:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [8:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[63] = \<const0> ;
  assign douta[62] = \<const0> ;
  assign douta[61] = \<const0> ;
  assign douta[60] = \<const0> ;
  assign douta[59] = \<const0> ;
  assign douta[58] = \<const0> ;
  assign douta[57] = \<const0> ;
  assign douta[56] = \<const0> ;
  assign douta[55] = \<const0> ;
  assign douta[54] = \<const0> ;
  assign douta[53] = \<const0> ;
  assign douta[52] = \<const0> ;
  assign douta[51] = \<const0> ;
  assign douta[50] = \<const0> ;
  assign douta[49] = \<const0> ;
  assign douta[48] = \<const0> ;
  assign douta[47] = \<const0> ;
  assign douta[46] = \<const0> ;
  assign douta[45] = \<const0> ;
  assign douta[44] = \<const0> ;
  assign douta[43] = \<const0> ;
  assign douta[42] = \<const0> ;
  assign douta[41] = \<const0> ;
  assign douta[40] = \<const0> ;
  assign douta[39] = \<const0> ;
  assign douta[38] = \<const0> ;
  assign douta[37] = \<const0> ;
  assign douta[36] = \<const0> ;
  assign douta[35] = \<const0> ;
  assign douta[34] = \<const0> ;
  assign douta[33] = \<const0> ;
  assign douta[32] = \<const0> ;
  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "9" *) 
  (* C_ADDRB_WIDTH = "9" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.476303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size4kB_a64b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "512" *) 
  (* C_READ_DEPTH_B = "512" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "64" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "512" *) 
  (* C_WRITE_DEPTH_B = "512" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "64" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized17__5 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[63:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[8:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[8:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a64b64,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size4kB_a64b64" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a64b64__6
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [8:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [63:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [63:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [8:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [8:0]addra;
  wire [8:0]addrb;
  wire clka;
  wire [63:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [63:0]NLW_U0_douta_UNCONNECTED;
  wire [8:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [8:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[63] = \<const0> ;
  assign douta[62] = \<const0> ;
  assign douta[61] = \<const0> ;
  assign douta[60] = \<const0> ;
  assign douta[59] = \<const0> ;
  assign douta[58] = \<const0> ;
  assign douta[57] = \<const0> ;
  assign douta[56] = \<const0> ;
  assign douta[55] = \<const0> ;
  assign douta[54] = \<const0> ;
  assign douta[53] = \<const0> ;
  assign douta[52] = \<const0> ;
  assign douta[51] = \<const0> ;
  assign douta[50] = \<const0> ;
  assign douta[49] = \<const0> ;
  assign douta[48] = \<const0> ;
  assign douta[47] = \<const0> ;
  assign douta[46] = \<const0> ;
  assign douta[45] = \<const0> ;
  assign douta[44] = \<const0> ;
  assign douta[43] = \<const0> ;
  assign douta[42] = \<const0> ;
  assign douta[41] = \<const0> ;
  assign douta[40] = \<const0> ;
  assign douta[39] = \<const0> ;
  assign douta[38] = \<const0> ;
  assign douta[37] = \<const0> ;
  assign douta[36] = \<const0> ;
  assign douta[35] = \<const0> ;
  assign douta[34] = \<const0> ;
  assign douta[33] = \<const0> ;
  assign douta[32] = \<const0> ;
  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "9" *) 
  (* C_ADDRB_WIDTH = "9" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.476303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size4kB_a64b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "512" *) 
  (* C_READ_DEPTH_B = "512" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "64" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "512" *) 
  (* C_WRITE_DEPTH_B = "512" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "64" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized17__6 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[63:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[8:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[8:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a64b64,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size4kB_a64b64" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a64b64__7
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [8:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [63:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [63:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [8:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [8:0]addra;
  wire [8:0]addrb;
  wire clka;
  wire [63:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [63:0]NLW_U0_douta_UNCONNECTED;
  wire [8:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [8:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[63] = \<const0> ;
  assign douta[62] = \<const0> ;
  assign douta[61] = \<const0> ;
  assign douta[60] = \<const0> ;
  assign douta[59] = \<const0> ;
  assign douta[58] = \<const0> ;
  assign douta[57] = \<const0> ;
  assign douta[56] = \<const0> ;
  assign douta[55] = \<const0> ;
  assign douta[54] = \<const0> ;
  assign douta[53] = \<const0> ;
  assign douta[52] = \<const0> ;
  assign douta[51] = \<const0> ;
  assign douta[50] = \<const0> ;
  assign douta[49] = \<const0> ;
  assign douta[48] = \<const0> ;
  assign douta[47] = \<const0> ;
  assign douta[46] = \<const0> ;
  assign douta[45] = \<const0> ;
  assign douta[44] = \<const0> ;
  assign douta[43] = \<const0> ;
  assign douta[42] = \<const0> ;
  assign douta[41] = \<const0> ;
  assign douta[40] = \<const0> ;
  assign douta[39] = \<const0> ;
  assign douta[38] = \<const0> ;
  assign douta[37] = \<const0> ;
  assign douta[36] = \<const0> ;
  assign douta[35] = \<const0> ;
  assign douta[34] = \<const0> ;
  assign douta[33] = \<const0> ;
  assign douta[32] = \<const0> ;
  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "9" *) 
  (* C_ADDRB_WIDTH = "9" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.476303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size4kB_a64b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "512" *) 
  (* C_READ_DEPTH_B = "512" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "64" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "512" *) 
  (* C_WRITE_DEPTH_B = "512" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "64" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized17__7 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[63:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[8:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[8:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size4kB_a64b64,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size4kB_a64b64" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size4kB_a64b64__8
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [8:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [63:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [63:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [8:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [8:0]addra;
  wire [8:0]addrb;
  wire clka;
  wire [63:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [63:0]NLW_U0_douta_UNCONNECTED;
  wire [8:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [8:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[63] = \<const0> ;
  assign douta[62] = \<const0> ;
  assign douta[61] = \<const0> ;
  assign douta[60] = \<const0> ;
  assign douta[59] = \<const0> ;
  assign douta[58] = \<const0> ;
  assign douta[57] = \<const0> ;
  assign douta[56] = \<const0> ;
  assign douta[55] = \<const0> ;
  assign douta[54] = \<const0> ;
  assign douta[53] = \<const0> ;
  assign douta[52] = \<const0> ;
  assign douta[51] = \<const0> ;
  assign douta[50] = \<const0> ;
  assign douta[49] = \<const0> ;
  assign douta[48] = \<const0> ;
  assign douta[47] = \<const0> ;
  assign douta[46] = \<const0> ;
  assign douta[45] = \<const0> ;
  assign douta[44] = \<const0> ;
  assign douta[43] = \<const0> ;
  assign douta[42] = \<const0> ;
  assign douta[41] = \<const0> ;
  assign douta[40] = \<const0> ;
  assign douta[39] = \<const0> ;
  assign douta[38] = \<const0> ;
  assign douta[37] = \<const0> ;
  assign douta[36] = \<const0> ;
  assign douta[35] = \<const0> ;
  assign douta[34] = \<const0> ;
  assign douta[33] = \<const0> ;
  assign douta[32] = \<const0> ;
  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "9" *) 
  (* C_ADDRB_WIDTH = "9" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.476303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size4kB_a64b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "512" *) 
  (* C_READ_DEPTH_B = "512" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "64" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "512" *) 
  (* C_WRITE_DEPTH_B = "512" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "64" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized17__8 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[63:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[8:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[8:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size6kB_a64b64,blk_mem_gen_v8_4_9,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size6kB_a64b64
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [9:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [63:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [63:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [9:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [9:0]addra;
  wire [9:0]addrb;
  wire clka;
  wire [63:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [63:0]NLW_U0_douta_UNCONNECTED;
  wire [9:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [9:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[63] = \<const0> ;
  assign douta[62] = \<const0> ;
  assign douta[61] = \<const0> ;
  assign douta[60] = \<const0> ;
  assign douta[59] = \<const0> ;
  assign douta[58] = \<const0> ;
  assign douta[57] = \<const0> ;
  assign douta[56] = \<const0> ;
  assign douta[55] = \<const0> ;
  assign douta[54] = \<const0> ;
  assign douta[53] = \<const0> ;
  assign douta[52] = \<const0> ;
  assign douta[51] = \<const0> ;
  assign douta[50] = \<const0> ;
  assign douta[49] = \<const0> ;
  assign douta[48] = \<const0> ;
  assign douta[47] = \<const0> ;
  assign douta[46] = \<const0> ;
  assign douta[45] = \<const0> ;
  assign douta[44] = \<const0> ;
  assign douta[43] = \<const0> ;
  assign douta[42] = \<const0> ;
  assign douta[41] = \<const0> ;
  assign douta[40] = \<const0> ;
  assign douta[39] = \<const0> ;
  assign douta[38] = \<const0> ;
  assign douta[37] = \<const0> ;
  assign douta[36] = \<const0> ;
  assign douta[35] = \<const0> ;
  assign douta[34] = \<const0> ;
  assign douta[33] = \<const0> ;
  assign douta[32] = \<const0> ;
  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "10" *) 
  (* C_ADDRB_WIDTH = "10" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.476303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size6kB_a64b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "768" *) 
  (* C_READ_DEPTH_B = "768" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "64" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "768" *) 
  (* C_WRITE_DEPTH_B = "768" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "64" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized15 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[63:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[9:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[9:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size6kB_a64b64,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size6kB_a64b64" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size6kB_a64b64__3
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [9:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [63:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [63:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [9:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [9:0]addra;
  wire [9:0]addrb;
  wire clka;
  wire [63:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [63:0]NLW_U0_douta_UNCONNECTED;
  wire [9:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [9:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[63] = \<const0> ;
  assign douta[62] = \<const0> ;
  assign douta[61] = \<const0> ;
  assign douta[60] = \<const0> ;
  assign douta[59] = \<const0> ;
  assign douta[58] = \<const0> ;
  assign douta[57] = \<const0> ;
  assign douta[56] = \<const0> ;
  assign douta[55] = \<const0> ;
  assign douta[54] = \<const0> ;
  assign douta[53] = \<const0> ;
  assign douta[52] = \<const0> ;
  assign douta[51] = \<const0> ;
  assign douta[50] = \<const0> ;
  assign douta[49] = \<const0> ;
  assign douta[48] = \<const0> ;
  assign douta[47] = \<const0> ;
  assign douta[46] = \<const0> ;
  assign douta[45] = \<const0> ;
  assign douta[44] = \<const0> ;
  assign douta[43] = \<const0> ;
  assign douta[42] = \<const0> ;
  assign douta[41] = \<const0> ;
  assign douta[40] = \<const0> ;
  assign douta[39] = \<const0> ;
  assign douta[38] = \<const0> ;
  assign douta[37] = \<const0> ;
  assign douta[36] = \<const0> ;
  assign douta[35] = \<const0> ;
  assign douta[34] = \<const0> ;
  assign douta[33] = \<const0> ;
  assign douta[32] = \<const0> ;
  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "10" *) 
  (* C_ADDRB_WIDTH = "10" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.476303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size6kB_a64b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "768" *) 
  (* C_READ_DEPTH_B = "768" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "64" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "768" *) 
  (* C_WRITE_DEPTH_B = "768" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "64" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized15__3 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[63:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[9:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[9:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size6kB_a64b64,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size6kB_a64b64" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size6kB_a64b64__4
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [9:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [63:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [63:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [9:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [63:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [63:0]doutb;

  wire \<const0> ;
  wire [9:0]addra;
  wire [9:0]addrb;
  wire clka;
  wire [63:0]dina;
  wire [63:0]doutb;
  wire ena;
  wire enb;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [63:0]NLW_U0_douta_UNCONNECTED;
  wire [9:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [9:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [63:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  assign douta[63] = \<const0> ;
  assign douta[62] = \<const0> ;
  assign douta[61] = \<const0> ;
  assign douta[60] = \<const0> ;
  assign douta[59] = \<const0> ;
  assign douta[58] = \<const0> ;
  assign douta[57] = \<const0> ;
  assign douta[56] = \<const0> ;
  assign douta[55] = \<const0> ;
  assign douta[54] = \<const0> ;
  assign douta[53] = \<const0> ;
  assign douta[52] = \<const0> ;
  assign douta[51] = \<const0> ;
  assign douta[50] = \<const0> ;
  assign douta[49] = \<const0> ;
  assign douta[48] = \<const0> ;
  assign douta[47] = \<const0> ;
  assign douta[46] = \<const0> ;
  assign douta[45] = \<const0> ;
  assign douta[44] = \<const0> ;
  assign douta[43] = \<const0> ;
  assign douta[42] = \<const0> ;
  assign douta[41] = \<const0> ;
  assign douta[40] = \<const0> ;
  assign douta[39] = \<const0> ;
  assign douta[38] = \<const0> ;
  assign douta[37] = \<const0> ;
  assign douta[36] = \<const0> ;
  assign douta[35] = \<const0> ;
  assign douta[34] = \<const0> ;
  assign douta[33] = \<const0> ;
  assign douta[32] = \<const0> ;
  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ADDRA_WIDTH = "10" *) 
  (* C_ADDRB_WIDTH = "10" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "2" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     8.476303 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size6kB_a64b64.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "768" *) 
  (* C_READ_DEPTH_B = "768" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "64" *) 
  (* C_READ_WIDTH_B = "64" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "768" *) 
  (* C_WRITE_DEPTH_B = "768" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "64" *) 
  (* C_WRITE_WIDTH_B = "64" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized15__4 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(1'b0),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(NLW_U0_douta_UNCONNECTED[63:0]),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[9:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[9:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[63:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(1'b1),
        .web(1'b0));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size8kB_a32b128,blk_mem_gen_v8_4_9,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size8kB_a32b128
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [10:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [31:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [31:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [8:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [127:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [127:0]doutb;

  wire [10:0]addra;
  wire [8:0]addrb;
  wire clka;
  wire clkb;
  wire [31:0]dina;
  wire [127:0]dinb;
  wire [31:0]douta;
  wire [127:0]doutb;
  wire ena;
  wire enb;
  wire [0:0]wea;
  wire [0:0]web;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [8:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [8:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [127:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  (* C_ADDRA_WIDTH = "11" *) 
  (* C_ADDRB_WIDTH = "9" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "4" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     15.524607 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size8kB_a32b128.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "2048" *) 
  (* C_READ_DEPTH_B = "512" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "32" *) 
  (* C_READ_WIDTH_B = "128" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "2048" *) 
  (* C_WRITE_DEPTH_B = "512" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "32" *) 
  (* C_WRITE_WIDTH_B = "128" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized9 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(clkb),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb(dinb),
        .douta(douta),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[8:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[8:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[127:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(wea),
        .web(web));
endmodule

(* CHECK_LICENSE_TYPE = "Dpbram_xlnx_size8kB_a32b128,blk_mem_gen_v8_4_9,{}" *) (* ORIG_REF_NAME = "Dpbram_xlnx_size8kB_a32b128" *) (* downgradeipidentifiedwarnings = "yes" *) 
(* x_core_info = "blk_mem_gen_v8_4_9,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_xlnx_size8kB_a32b128__2
   (clka,
    ena,
    wea,
    addra,
    dina,
    douta,
    clkb,
    enb,
    web,
    addrb,
    dinb,
    doutb);
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK" *) (* x_interface_mode = "slave BRAM_PORTA" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTA, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clka;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA EN" *) input ena;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA WE" *) input [0:0]wea;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR" *) input [10:0]addra;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN" *) input [31:0]dina;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT" *) output [31:0]douta;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK" *) (* x_interface_mode = "slave BRAM_PORTB" *) (* x_interface_parameter = "XIL_INTERFACENAME BRAM_PORTB, MEM_ADDRESS_MODE BYTE_ADDRESS, MEM_SIZE 8192, MEM_WIDTH 32, MEM_ECC NONE, MASTER_TYPE OTHER, READ_LATENCY 1" *) input clkb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB EN" *) input enb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB WE" *) input [0:0]web;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR" *) input [8:0]addrb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DIN" *) input [127:0]dinb;
  (* x_interface_info = "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT" *) output [127:0]doutb;

  wire [10:0]addra;
  wire [8:0]addrb;
  wire clka;
  wire clkb;
  wire [31:0]dina;
  wire [127:0]dinb;
  wire [31:0]douta;
  wire [127:0]doutb;
  wire ena;
  wire enb;
  wire [0:0]wea;
  wire [0:0]web;
  wire NLW_U0_dbiterr_UNCONNECTED;
  wire NLW_U0_rsta_busy_UNCONNECTED;
  wire NLW_U0_rstb_busy_UNCONNECTED;
  wire NLW_U0_s_axi_arready_UNCONNECTED;
  wire NLW_U0_s_axi_awready_UNCONNECTED;
  wire NLW_U0_s_axi_bvalid_UNCONNECTED;
  wire NLW_U0_s_axi_dbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_rlast_UNCONNECTED;
  wire NLW_U0_s_axi_rvalid_UNCONNECTED;
  wire NLW_U0_s_axi_sbiterr_UNCONNECTED;
  wire NLW_U0_s_axi_wready_UNCONNECTED;
  wire NLW_U0_sbiterr_UNCONNECTED;
  wire [8:0]NLW_U0_rdaddrecc_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_bid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_bresp_UNCONNECTED;
  wire [8:0]NLW_U0_s_axi_rdaddrecc_UNCONNECTED;
  wire [127:0]NLW_U0_s_axi_rdata_UNCONNECTED;
  wire [3:0]NLW_U0_s_axi_rid_UNCONNECTED;
  wire [1:0]NLW_U0_s_axi_rresp_UNCONNECTED;

  (* C_ADDRA_WIDTH = "11" *) 
  (* C_ADDRB_WIDTH = "9" *) 
  (* C_ALGORITHM = "1" *) 
  (* C_AXI_ID_WIDTH = "4" *) 
  (* C_AXI_SLAVE_TYPE = "0" *) 
  (* C_AXI_TYPE = "1" *) 
  (* C_BYTE_SIZE = "9" *) 
  (* C_COMMON_CLK = "0" *) 
  (* C_COUNT_18K_BRAM = "0" *) 
  (* C_COUNT_36K_BRAM = "4" *) 
  (* C_CTRL_ECC_ALGO = "NONE" *) 
  (* C_DEFAULT_DATA = "0" *) 
  (* C_DISABLE_WARN_BHV_COLL = "0" *) 
  (* C_DISABLE_WARN_BHV_RANGE = "0" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_ENABLE_32BIT_ADDRESS = "0" *) 
  (* C_EN_DEEPSLEEP_PIN = "0" *) 
  (* C_EN_ECC_PIPE = "0" *) 
  (* C_EN_RDADDRA_CHG = "0" *) 
  (* C_EN_RDADDRB_CHG = "0" *) 
  (* C_EN_SAFETY_CKT = "0" *) 
  (* C_EN_SHUTDOWN_PIN = "0" *) 
  (* C_EN_SLEEP_PIN = "0" *) 
  (* C_EST_POWER_SUMMARY = "Estimated Power for IP     :     15.524607 mW" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HAS_AXI_ID = "0" *) 
  (* C_HAS_ENA = "1" *) 
  (* C_HAS_ENB = "1" *) 
  (* C_HAS_INJECTERR = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MEM_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_A = "0" *) 
  (* C_HAS_MUX_OUTPUT_REGS_B = "0" *) 
  (* C_HAS_REGCEA = "0" *) 
  (* C_HAS_REGCEB = "0" *) 
  (* C_HAS_RSTA = "0" *) 
  (* C_HAS_RSTB = "0" *) 
  (* C_HAS_SOFTECC_INPUT_REGS_A = "0" *) 
  (* C_HAS_SOFTECC_OUTPUT_REGS_B = "0" *) 
  (* C_INITA_VAL = "0" *) 
  (* C_INITB_VAL = "0" *) 
  (* C_INIT_FILE = "Dpbram_xlnx_size8kB_a32b128.mem" *) 
  (* C_INIT_FILE_NAME = "no_coe_file_loaded" *) 
  (* C_INTERFACE_TYPE = "0" *) 
  (* C_LOAD_INIT_FILE = "0" *) 
  (* C_MEM_TYPE = "2" *) 
  (* C_MUX_PIPELINE_STAGES = "0" *) 
  (* C_PRIM_TYPE = "1" *) 
  (* C_READ_DEPTH_A = "2048" *) 
  (* C_READ_DEPTH_B = "512" *) 
  (* C_READ_LATENCY_A = "1" *) 
  (* C_READ_LATENCY_B = "1" *) 
  (* C_READ_WIDTH_A = "32" *) 
  (* C_READ_WIDTH_B = "128" *) 
  (* C_RSTRAM_A = "0" *) 
  (* C_RSTRAM_B = "0" *) 
  (* C_RST_PRIORITY_A = "CE" *) 
  (* C_RST_PRIORITY_B = "CE" *) 
  (* C_SIM_COLLISION_CHECK = "ALL" *) 
  (* C_USE_BRAM_BLOCK = "0" *) 
  (* C_USE_BYTE_WEA = "0" *) 
  (* C_USE_BYTE_WEB = "0" *) 
  (* C_USE_DEFAULT_DATA = "0" *) 
  (* C_USE_ECC = "0" *) 
  (* C_USE_SOFTECC = "0" *) 
  (* C_USE_URAM = "0" *) 
  (* C_WEA_WIDTH = "1" *) 
  (* C_WEB_WIDTH = "1" *) 
  (* C_WRITE_DEPTH_A = "2048" *) 
  (* C_WRITE_DEPTH_B = "512" *) 
  (* C_WRITE_MODE_A = "WRITE_FIRST" *) 
  (* C_WRITE_MODE_B = "WRITE_FIRST" *) 
  (* C_WRITE_WIDTH_A = "32" *) 
  (* C_WRITE_WIDTH_B = "128" *) 
  (* C_XDEVICEFAMILY = "zynquplus" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_blk_mem_gen_v8_4_9__parameterized9__2 U0
       (.addra(addra),
        .addrb(addrb),
        .clka(clka),
        .clkb(clkb),
        .dbiterr(NLW_U0_dbiterr_UNCONNECTED),
        .deepsleep(1'b0),
        .dina(dina),
        .dinb(dinb),
        .douta(douta),
        .doutb(doutb),
        .eccpipece(1'b0),
        .ena(ena),
        .enb(enb),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .rdaddrecc(NLW_U0_rdaddrecc_UNCONNECTED[8:0]),
        .regcea(1'b1),
        .regceb(1'b1),
        .rsta(1'b0),
        .rsta_busy(NLW_U0_rsta_busy_UNCONNECTED),
        .rstb(1'b0),
        .rstb_busy(NLW_U0_rstb_busy_UNCONNECTED),
        .s_aclk(1'b0),
        .s_aresetn(1'b0),
        .s_axi_araddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arburst({1'b0,1'b0}),
        .s_axi_arid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_arready(NLW_U0_s_axi_arready_UNCONNECTED),
        .s_axi_arsize({1'b0,1'b0,1'b0}),
        .s_axi_arvalid(1'b0),
        .s_axi_awaddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awburst({1'b0,1'b0}),
        .s_axi_awid({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awlen({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_awready(NLW_U0_s_axi_awready_UNCONNECTED),
        .s_axi_awsize({1'b0,1'b0,1'b0}),
        .s_axi_awvalid(1'b0),
        .s_axi_bid(NLW_U0_s_axi_bid_UNCONNECTED[3:0]),
        .s_axi_bready(1'b0),
        .s_axi_bresp(NLW_U0_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(NLW_U0_s_axi_bvalid_UNCONNECTED),
        .s_axi_dbiterr(NLW_U0_s_axi_dbiterr_UNCONNECTED),
        .s_axi_injectdbiterr(1'b0),
        .s_axi_injectsbiterr(1'b0),
        .s_axi_rdaddrecc(NLW_U0_s_axi_rdaddrecc_UNCONNECTED[8:0]),
        .s_axi_rdata(NLW_U0_s_axi_rdata_UNCONNECTED[127:0]),
        .s_axi_rid(NLW_U0_s_axi_rid_UNCONNECTED[3:0]),
        .s_axi_rlast(NLW_U0_s_axi_rlast_UNCONNECTED),
        .s_axi_rready(1'b0),
        .s_axi_rresp(NLW_U0_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(NLW_U0_s_axi_rvalid_UNCONNECTED),
        .s_axi_sbiterr(NLW_U0_s_axi_sbiterr_UNCONNECTED),
        .s_axi_wdata({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wlast(1'b0),
        .s_axi_wready(NLW_U0_s_axi_wready_UNCONNECTED),
        .s_axi_wstrb(1'b0),
        .s_axi_wvalid(1'b0),
        .sbiterr(NLW_U0_sbiterr_UNCONNECTED),
        .shutdown(1'b0),
        .sleep(1'b0),
        .wea(wea),
        .web(web));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Hdreng
   (web,
    stateOp_reg_0,
    ackInvHdrengSet,
    ackInvHdrengAssign,
    rng_reg_0,
    egrAXIS_tlast,
    Q,
    \stateSwap_reg[3]_0 ,
    ddrAXI_rvalid_0,
    \FSM_sequential_stateIgrstr_reg[0]_0 ,
    D,
    \row_lcl_reg[10]_0 ,
    ddrAXI_rready,
    ddrAXI_arvalid,
    \FSM_onehot_stateWrite_reg[1] ,
    ddrAXI_wdata,
    ddrAXI_awaddr,
    rdAAXI_araddr,
    ddrAXI_awvalid,
    ddrAXI_wvalid,
    \FSM_sequential_stateEgrstr_reg[2]_0 ,
    \ixMemAcq_reg[7]_0 ,
    \ixMem_reg[7]_0 ,
    wrAAXI_wlast,
    wrAAXI_awvalid,
    probe,
    \tixVState_reg[7]_0 ,
    \tkst_reg[31]_0 ,
    aclk_sig,
    memclk,
    ddrAXI_rdata,
    AR,
    stateOp_reg_1,
    \dwrRowbuf_reg[0]_0 ,
    ackInvSet_sig_reg_0,
    ackInvAssign_sig,
    rgbVideoinToManyAXIS_tvalid,
    rng_reg_1,
    \dwrRowbuf_reg[0]_1 ,
    rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_0,
    ddrAXI_rvalid,
    ddrAXI_rready_0,
    ddrAXI_rlast,
    \capt_reg[5] ,
    \stateStream_reg[1]_0 ,
    \stateStream_reg[0]_0 ,
    hdrmemAXI_rlast,
    \burstIgrstr_reg[0]_0 ,
    ddrAXI_arvalid_0,
    \stateSwap[3]_i_5_0 ,
    ddrAXI_wdata_0_sp_1,
    \ddrAXI_awaddr[27] ,
    reqInvAssign,
    reqInvHdrengSet,
    \dwrRowbuf[2]_i_19_0 ,
    \tixVState_reg[7]_1 ,
    \tkstAcq_reg[31]_0 ,
    \stateStream_reg[0]_1 ,
    ddrAXI_arready,
    \stateSwap[3]_i_3_0 ,
    \stateSwap[3]_i_3_1 ,
    \aRowbufBEgrstr_reg[0]_0 ,
    ddrAXI_wready,
    ddrAXI_awready,
    \stateSwap_reg[2]_0 ,
    E,
    \ixMemNext_reg[7]_0 ,
    \rgbFromVideoinAXIS_tdatam1_reg[35]_0 );
  output [0:0]web;
  output stateOp_reg_0;
  output ackInvHdrengSet;
  output ackInvHdrengAssign;
  output rng_reg_0;
  output egrAXIS_tlast;
  output [1:0]Q;
  output [3:0]\stateSwap_reg[3]_0 ;
  output ddrAXI_rvalid_0;
  output [0:0]\FSM_sequential_stateIgrstr_reg[0]_0 ;
  output [0:0]D;
  output [10:0]\row_lcl_reg[10]_0 ;
  output ddrAXI_rready;
  output ddrAXI_arvalid;
  output [1:0]\FSM_onehot_stateWrite_reg[1] ;
  output [127:0]ddrAXI_wdata;
  output [19:0]ddrAXI_awaddr;
  output [19:0]rdAAXI_araddr;
  output ddrAXI_awvalid;
  output ddrAXI_wvalid;
  output [2:0]\FSM_sequential_stateEgrstr_reg[2]_0 ;
  output [7:0]\ixMemAcq_reg[7]_0 ;
  output [7:0]\ixMem_reg[7]_0 ;
  output wrAAXI_wlast;
  output wrAAXI_awvalid;
  output [0:0]probe;
  output [2:0]\tixVState_reg[7]_0 ;
  output [31:0]\tkst_reg[31]_0 ;
  input aclk_sig;
  input memclk;
  input [127:0]ddrAXI_rdata;
  input [0:0]AR;
  input stateOp_reg_1;
  input [0:0]\dwrRowbuf_reg[0]_0 ;
  input ackInvSet_sig_reg_0;
  input ackInvAssign_sig;
  input rgbVideoinToManyAXIS_tvalid;
  input rng_reg_1;
  input \dwrRowbuf_reg[0]_1 ;
  input rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_0;
  input ddrAXI_rvalid;
  input ddrAXI_rready_0;
  input ddrAXI_rlast;
  input \capt_reg[5] ;
  input \stateStream_reg[1]_0 ;
  input \stateStream_reg[0]_0 ;
  input hdrmemAXI_rlast;
  input \burstIgrstr_reg[0]_0 ;
  input [1:0]ddrAXI_arvalid_0;
  input [1:0]\stateSwap[3]_i_5_0 ;
  input ddrAXI_wdata_0_sp_1;
  input \ddrAXI_awaddr[27] ;
  input reqInvAssign;
  input reqInvHdrengSet;
  input \dwrRowbuf[2]_i_19_0 ;
  input \tixVState_reg[7]_1 ;
  input [31:0]\tkstAcq_reg[31]_0 ;
  input [10:0]\stateStream_reg[0]_1 ;
  input ddrAXI_arready;
  input \stateSwap[3]_i_3_0 ;
  input [0:0]\stateSwap[3]_i_3_1 ;
  input \aRowbufBEgrstr_reg[0]_0 ;
  input ddrAXI_wready;
  input ddrAXI_awready;
  input \stateSwap_reg[2]_0 ;
  input [0:0]E;
  input [7:0]\ixMemNext_reg[7]_0 ;
  input [35:0]\rgbFromVideoinAXIS_tdatam1_reg[35]_0 ;

  wire [0:0]AR;
  wire [0:0]D;
  wire [0:0]E;
  wire [1:0]\FSM_onehot_stateWrite_reg[1] ;
  wire \FSM_sequential_stateEgrstr[0]_i_3_n_0 ;
  wire \FSM_sequential_stateEgrstr[2]_i_1_n_0 ;
  wire [2:0]\FSM_sequential_stateEgrstr_reg[2]_0 ;
  wire \FSM_sequential_stateIgrstr[0]_i_10_n_0 ;
  wire \FSM_sequential_stateIgrstr[0]_i_11_n_0 ;
  wire \FSM_sequential_stateIgrstr[0]_i_12_n_0 ;
  wire \FSM_sequential_stateIgrstr[0]_i_2_n_0 ;
  wire \FSM_sequential_stateIgrstr[0]_i_4_n_0 ;
  wire \FSM_sequential_stateIgrstr[0]_i_5_n_0 ;
  wire \FSM_sequential_stateIgrstr[0]_i_6_n_0 ;
  wire \FSM_sequential_stateIgrstr[0]_i_7_n_0 ;
  wire \FSM_sequential_stateIgrstr[0]_i_8_n_0 ;
  wire \FSM_sequential_stateIgrstr[0]_i_9_n_0 ;
  wire \FSM_sequential_stateIgrstr[1]_i_1_n_0 ;
  wire \FSM_sequential_stateIgrstr[1]_i_3_n_0 ;
  wire \FSM_sequential_stateIgrstr[1]_i_5_n_0 ;
  wire [0:0]\FSM_sequential_stateIgrstr_reg[0]_0 ;
  wire [1:0]Q;
  wire a0Egrstr;
  wire \a0Egrstr_reg_n_0_[4] ;
  wire \a0Egrstr_reg_n_0_[5] ;
  wire \a0Egrstr_reg_n_0_[6] ;
  wire \a0Egrstr_reg_n_0_[7] ;
  wire \a0Egrstr_reg_n_0_[8] ;
  wire \a0[0]_i_1_n_0 ;
  wire \a0[1]_i_1_n_0 ;
  wire \a0[2]_i_1_n_0 ;
  wire \a0[3]_i_1_n_0 ;
  wire \a0[4]_i_1_n_0 ;
  wire \a0[4]_i_2_n_0 ;
  wire \a0[4]_i_3_n_0 ;
  wire \a0[4]_i_4_n_0 ;
  wire a0_i;
  wire \a0_i[0]_i_1_n_0 ;
  wire a0_memclk0;
  wire \a0_memclk[4]_i_2_n_0 ;
  wire \a0_reg_n_0_[0] ;
  wire \a0_reg_n_0_[1] ;
  wire \a0_reg_n_0_[2] ;
  wire \a0_reg_n_0_[3] ;
  wire \a0_reg_n_0_[4] ;
  wire a0_to_memclk;
  wire \a0_to_memclk[4]_i_2_n_0 ;
  wire \a0_to_memclk_reg_n_0_[0] ;
  wire \a0_to_memclk_reg_n_0_[1] ;
  wire \a0_to_memclk_reg_n_0_[2] ;
  wire \a0_to_memclk_reg_n_0_[3] ;
  wire \a0_to_memclk_reg_n_0_[4] ;
  wire [4:0]a0_to_memclkm1;
  wire [4:0]a0_to_memclkm2;
  wire [8:0]aB;
  wire [8:0]aRowbufBEgrstr;
  wire \aRowbufBEgrstr[0]_i_1_n_0 ;
  wire \aRowbufBEgrstr[1]_i_1_n_0 ;
  wire \aRowbufBEgrstr[2]_i_1_n_0 ;
  wire \aRowbufBEgrstr[3]_i_1_n_0 ;
  wire \aRowbufBEgrstr[4]_i_1_n_0 ;
  wire \aRowbufBEgrstr[4]_i_2_n_0 ;
  wire \aRowbufBEgrstr[5]_i_1_n_0 ;
  wire \aRowbufBEgrstr[6]_i_1_n_0 ;
  wire \aRowbufBEgrstr[6]_i_2_n_0 ;
  wire \aRowbufBEgrstr[6]_i_3_n_0 ;
  wire \aRowbufBEgrstr[7]_i_1_n_0 ;
  wire \aRowbufBEgrstr[7]_i_2_n_0 ;
  wire \aRowbufBEgrstr[8]_i_1_n_0 ;
  wire \aRowbufBEgrstr[8]_i_2_n_0 ;
  wire \aRowbufBEgrstr_reg[0]_0 ;
  wire [30:0]aRowbufBIgrstr;
  wire \aRowbufBIgrstr[30]_i_1_n_0 ;
  wire \aRowbufBIgrstr_reg[16]_i_2_n_0 ;
  wire \aRowbufBIgrstr_reg[16]_i_2_n_1 ;
  wire \aRowbufBIgrstr_reg[16]_i_2_n_2 ;
  wire \aRowbufBIgrstr_reg[16]_i_2_n_3 ;
  wire \aRowbufBIgrstr_reg[16]_i_2_n_4 ;
  wire \aRowbufBIgrstr_reg[16]_i_2_n_5 ;
  wire \aRowbufBIgrstr_reg[16]_i_2_n_6 ;
  wire \aRowbufBIgrstr_reg[16]_i_2_n_7 ;
  wire \aRowbufBIgrstr_reg[24]_i_2_n_0 ;
  wire \aRowbufBIgrstr_reg[24]_i_2_n_1 ;
  wire \aRowbufBIgrstr_reg[24]_i_2_n_2 ;
  wire \aRowbufBIgrstr_reg[24]_i_2_n_3 ;
  wire \aRowbufBIgrstr_reg[24]_i_2_n_4 ;
  wire \aRowbufBIgrstr_reg[24]_i_2_n_5 ;
  wire \aRowbufBIgrstr_reg[24]_i_2_n_6 ;
  wire \aRowbufBIgrstr_reg[24]_i_2_n_7 ;
  wire \aRowbufBIgrstr_reg[30]_i_3_n_3 ;
  wire \aRowbufBIgrstr_reg[30]_i_3_n_4 ;
  wire \aRowbufBIgrstr_reg[30]_i_3_n_5 ;
  wire \aRowbufBIgrstr_reg[30]_i_3_n_6 ;
  wire \aRowbufBIgrstr_reg[30]_i_3_n_7 ;
  wire \aRowbufBIgrstr_reg[8]_i_2_n_0 ;
  wire \aRowbufBIgrstr_reg[8]_i_2_n_1 ;
  wire \aRowbufBIgrstr_reg[8]_i_2_n_2 ;
  wire \aRowbufBIgrstr_reg[8]_i_2_n_3 ;
  wire \aRowbufBIgrstr_reg[8]_i_2_n_4 ;
  wire \aRowbufBIgrstr_reg[8]_i_2_n_5 ;
  wire \aRowbufBIgrstr_reg[8]_i_2_n_6 ;
  wire \aRowbufBIgrstr_reg[8]_i_2_n_7 ;
  wire \aRowbufBIgrstr_reg_n_0_[0] ;
  wire \aRowbufBIgrstr_reg_n_0_[10] ;
  wire \aRowbufBIgrstr_reg_n_0_[11] ;
  wire \aRowbufBIgrstr_reg_n_0_[12] ;
  wire \aRowbufBIgrstr_reg_n_0_[13] ;
  wire \aRowbufBIgrstr_reg_n_0_[14] ;
  wire \aRowbufBIgrstr_reg_n_0_[15] ;
  wire \aRowbufBIgrstr_reg_n_0_[16] ;
  wire \aRowbufBIgrstr_reg_n_0_[17] ;
  wire \aRowbufBIgrstr_reg_n_0_[18] ;
  wire \aRowbufBIgrstr_reg_n_0_[19] ;
  wire \aRowbufBIgrstr_reg_n_0_[1] ;
  wire \aRowbufBIgrstr_reg_n_0_[20] ;
  wire \aRowbufBIgrstr_reg_n_0_[21] ;
  wire \aRowbufBIgrstr_reg_n_0_[22] ;
  wire \aRowbufBIgrstr_reg_n_0_[23] ;
  wire \aRowbufBIgrstr_reg_n_0_[24] ;
  wire \aRowbufBIgrstr_reg_n_0_[25] ;
  wire \aRowbufBIgrstr_reg_n_0_[26] ;
  wire \aRowbufBIgrstr_reg_n_0_[27] ;
  wire \aRowbufBIgrstr_reg_n_0_[28] ;
  wire \aRowbufBIgrstr_reg_n_0_[29] ;
  wire \aRowbufBIgrstr_reg_n_0_[2] ;
  wire \aRowbufBIgrstr_reg_n_0_[30] ;
  wire \aRowbufBIgrstr_reg_n_0_[3] ;
  wire \aRowbufBIgrstr_reg_n_0_[4] ;
  wire \aRowbufBIgrstr_reg_n_0_[5] ;
  wire \aRowbufBIgrstr_reg_n_0_[6] ;
  wire \aRowbufBIgrstr_reg_n_0_[7] ;
  wire \aRowbufBIgrstr_reg_n_0_[8] ;
  wire \aRowbufBIgrstr_reg_n_0_[9] ;
  wire [10:0]aRowbufStockrls;
  wire \aRowbufStockrls[0]_i_1_n_0 ;
  wire \aRowbufStockrls[10]_i_1_n_0 ;
  wire \aRowbufStockrls[10]_i_2_n_0 ;
  wire \aRowbufStockrls[10]_i_3_n_0 ;
  wire \aRowbufStockrls[1]_i_1_n_0 ;
  wire \aRowbufStockrls[2]_i_1_n_0 ;
  wire \aRowbufStockrls[3]_i_1_n_0 ;
  wire \aRowbufStockrls[4]_i_1_n_0 ;
  wire \aRowbufStockrls[5]_i_1_n_0 ;
  wire \aRowbufStockrls[5]_i_2_n_0 ;
  wire \aRowbufStockrls[6]_i_1_n_0 ;
  wire \aRowbufStockrls[7]_i_1_n_0 ;
  wire \aRowbufStockrls[8]_i_1_n_0 ;
  wire \aRowbufStockrls[9]_i_1_n_0 ;
  wire \aRowbufStockrls[9]_i_2_n_0 ;
  wire \aRowbufStockrls[9]_i_3_n_0 ;
  wire \aRowbufStream[0]_i_1_n_0 ;
  wire \aRowbufStream[10]_i_1_n_0 ;
  wire \aRowbufStream[10]_i_2_n_0 ;
  wire \aRowbufStream[10]_i_3_n_0 ;
  wire \aRowbufStream[10]_i_4_n_0 ;
  wire \aRowbufStream[10]_i_5_n_0 ;
  wire \aRowbufStream[10]_i_6_n_0 ;
  wire \aRowbufStream[1]_i_1_n_0 ;
  wire \aRowbufStream[2]_i_1_n_0 ;
  wire \aRowbufStream[3]_i_1_n_0 ;
  wire \aRowbufStream[4]_i_1_n_0 ;
  wire \aRowbufStream[5]_i_1_n_0 ;
  wire \aRowbufStream[5]_i_2_n_0 ;
  wire \aRowbufStream[6]_i_1_n_0 ;
  wire \aRowbufStream[7]_i_1_n_0 ;
  wire \aRowbufStream[8]_i_1_n_0 ;
  wire \aRowbufStream[9]_i_1_n_0 ;
  wire \aRowbufStream[9]_i_2_n_0 ;
  wire [10:0]aRowbufStream__0;
  wire ackInvAssign_sig;
  wire ackInvHdrengAssign;
  wire ackInvHdrengSet;
  wire ackInvSet_sig_reg_0;
  wire aclk_sig;
  wire addrEgr;
  wire \addrEgr[10]_i_2_n_0 ;
  wire \addrEgr[14]_i_3_n_0 ;
  wire \addrEgr[14]_i_4_n_0 ;
  wire \addrEgr[5]_i_2_n_0 ;
  wire \addrEgr[8]_i_2_n_0 ;
  wire \addrEgr[9]_i_2_n_0 ;
  wire addrIgr;
  wire \addrIgr[10]_i_2_n_0 ;
  wire \addrIgr[14]_i_3_n_0 ;
  wire \addrIgr[5]_i_2_n_0 ;
  wire \addrIgr[8]_i_2_n_0 ;
  wire \addrIgr[9]_i_2_n_0 ;
  wire [4:0]burstIgrstr;
  wire \burstIgrstr[4]_i_1_n_0 ;
  wire \burstIgrstr[4]_i_3_n_0 ;
  wire \burstIgrstr_reg[0]_0 ;
  wire \burstIgrstr_reg_n_0_[0] ;
  wire \burstIgrstr_reg_n_0_[1] ;
  wire \burstIgrstr_reg_n_0_[2] ;
  wire \burstIgrstr_reg_n_0_[3] ;
  wire \burstIgrstr_reg_n_0_[4] ;
  wire [1:1]burstSwapLast;
  wire \burstSwap[0]_i_1_n_0 ;
  wire \burstSwap[0]_i_2_n_0 ;
  wire \burstSwap[1]_i_1_n_0 ;
  wire \burstSwap[2]_i_1_n_0 ;
  wire \burstSwap[3]_i_1_n_0 ;
  wire \burstSwap[4]_i_1_n_0 ;
  wire \burstSwap[4]_i_2_n_0 ;
  wire \burstSwap[4]_i_3_n_0 ;
  wire \burstSwap[4]_i_4_n_0 ;
  wire \burstSwap[4]_i_5_n_0 ;
  wire \burstSwap[4]_i_6_n_0 ;
  wire \capt_reg[5] ;
  wire clear;
  wire [10:0]col_lcl;
  wire \col_lcl[0]_i_1__0_n_0 ;
  wire \col_lcl[10]_i_1_n_0 ;
  wire \col_lcl[10]_i_2__0_n_0 ;
  wire \col_lcl[10]_i_3__0_n_0 ;
  wire \col_lcl[1]_i_1__0_n_0 ;
  wire \col_lcl[2]_i_1__0_n_0 ;
  wire \col_lcl[3]_i_1__0_n_0 ;
  wire \col_lcl[4]_i_1__0_n_0 ;
  wire \col_lcl[5]_i_1__0_n_0 ;
  wire \col_lcl[5]_i_2_n_0 ;
  wire \col_lcl[6]_i_1__0_n_0 ;
  wire \col_lcl[7]_i_1__0_n_0 ;
  wire \col_lcl[8]_i_1_n_0 ;
  wire \col_lcl[9]_i_1_n_0 ;
  wire \col_lcl[9]_i_2_n_0 ;
  wire \col_lcl[9]_i_3_n_0 ;
  wire [12:8]data;
  wire data5;
  wire ddrAXI_arready;
  wire ddrAXI_arvalid;
  wire [1:0]ddrAXI_arvalid_0;
  wire [19:0]ddrAXI_awaddr;
  wire \ddrAXI_awaddr[27] ;
  wire ddrAXI_awready;
  wire ddrAXI_awvalid;
  wire [127:0]ddrAXI_rdata;
  wire ddrAXI_rlast;
  wire ddrAXI_rready;
  wire ddrAXI_rready_0;
  wire ddrAXI_rvalid;
  wire ddrAXI_rvalid_0;
  wire [127:0]ddrAXI_wdata;
  wire ddrAXI_wdata_0_sn_1;
  wire ddrAXI_wlast_INST_0_i_2_n_0;
  wire ddrAXI_wready;
  wire ddrAXI_wvalid;
  wire [31:0]drdA;
  wire [30:0]drdRowBbuf;
  wire [127:0]drdRowBbufB;
  wire [31:0]dwrRowbuf;
  wire \dwrRowbuf[10]_i_2_n_0 ;
  wire \dwrRowbuf[10]_i_4_n_0 ;
  wire \dwrRowbuf[11]_i_2_n_0 ;
  wire \dwrRowbuf[11]_i_4_n_0 ;
  wire \dwrRowbuf[12]_i_2_n_0 ;
  wire \dwrRowbuf[12]_i_4_n_0 ;
  wire \dwrRowbuf[13]_i_2_n_0 ;
  wire \dwrRowbuf[13]_i_4_n_0 ;
  wire \dwrRowbuf[14]_i_2_n_0 ;
  wire \dwrRowbuf[14]_i_3_n_0 ;
  wire \dwrRowbuf[14]_i_5_n_0 ;
  wire \dwrRowbuf[14]_i_6_n_0 ;
  wire \dwrRowbuf[14]_i_7_n_0 ;
  wire \dwrRowbuf[14]_i_8_n_0 ;
  wire \dwrRowbuf[15]_i_2_n_0 ;
  wire \dwrRowbuf[15]_i_3_n_0 ;
  wire \dwrRowbuf[16]_i_2_n_0 ;
  wire \dwrRowbuf[16]_i_4_n_0 ;
  wire \dwrRowbuf[17]_i_2_n_0 ;
  wire \dwrRowbuf[17]_i_4_n_0 ;
  wire \dwrRowbuf[18]_i_2_n_0 ;
  wire \dwrRowbuf[18]_i_4_n_0 ;
  wire \dwrRowbuf[19]_i_2_n_0 ;
  wire \dwrRowbuf[19]_i_4_n_0 ;
  wire \dwrRowbuf[1]_i_2_n_0 ;
  wire \dwrRowbuf[1]_i_6_n_0 ;
  wire \dwrRowbuf[1]_i_7_n_0 ;
  wire \dwrRowbuf[20]_i_2_n_0 ;
  wire \dwrRowbuf[20]_i_4_n_0 ;
  wire \dwrRowbuf[21]_i_2_n_0 ;
  wire \dwrRowbuf[21]_i_4_n_0 ;
  wire \dwrRowbuf[22]_i_2_n_0 ;
  wire \dwrRowbuf[22]_i_3_n_0 ;
  wire \dwrRowbuf[22]_i_5_n_0 ;
  wire \dwrRowbuf[22]_i_6_n_0 ;
  wire \dwrRowbuf[22]_i_7_n_0 ;
  wire \dwrRowbuf[22]_i_8_n_0 ;
  wire \dwrRowbuf[23]_i_2_n_0 ;
  wire \dwrRowbuf[24]_i_2_n_0 ;
  wire \dwrRowbuf[24]_i_4_n_0 ;
  wire \dwrRowbuf[24]_i_5_n_0 ;
  wire \dwrRowbuf[25]_i_2_n_0 ;
  wire \dwrRowbuf[25]_i_3_n_0 ;
  wire \dwrRowbuf[25]_i_5_n_0 ;
  wire \dwrRowbuf[25]_i_6_n_0 ;
  wire \dwrRowbuf[25]_i_7_n_0 ;
  wire \dwrRowbuf[26]_i_2_n_0 ;
  wire \dwrRowbuf[27]_i_2_n_0 ;
  wire \dwrRowbuf[27]_i_4_n_0 ;
  wire \dwrRowbuf[28]_i_2_n_0 ;
  wire \dwrRowbuf[28]_i_4_n_0 ;
  wire \dwrRowbuf[28]_i_5_n_0 ;
  wire \dwrRowbuf[29]_i_2_n_0 ;
  wire \dwrRowbuf[29]_i_4_n_0 ;
  wire \dwrRowbuf[2]_i_10_n_0 ;
  wire \dwrRowbuf[2]_i_11_n_0 ;
  wire \dwrRowbuf[2]_i_12_n_0 ;
  wire \dwrRowbuf[2]_i_13_n_0 ;
  wire \dwrRowbuf[2]_i_14_n_0 ;
  wire \dwrRowbuf[2]_i_15_n_0 ;
  wire \dwrRowbuf[2]_i_16_n_0 ;
  wire \dwrRowbuf[2]_i_17_n_0 ;
  wire \dwrRowbuf[2]_i_18_n_0 ;
  wire \dwrRowbuf[2]_i_19_0 ;
  wire \dwrRowbuf[2]_i_19_n_0 ;
  wire \dwrRowbuf[2]_i_20_n_0 ;
  wire \dwrRowbuf[2]_i_21_n_0 ;
  wire \dwrRowbuf[2]_i_22_n_0 ;
  wire \dwrRowbuf[2]_i_23_n_0 ;
  wire \dwrRowbuf[2]_i_24_n_0 ;
  wire \dwrRowbuf[2]_i_25_n_0 ;
  wire \dwrRowbuf[2]_i_26_n_0 ;
  wire \dwrRowbuf[2]_i_27_n_0 ;
  wire \dwrRowbuf[2]_i_28_n_0 ;
  wire \dwrRowbuf[2]_i_29_n_0 ;
  wire \dwrRowbuf[2]_i_2_n_0 ;
  wire \dwrRowbuf[2]_i_30_n_0 ;
  wire \dwrRowbuf[2]_i_31_n_0 ;
  wire \dwrRowbuf[2]_i_32_n_0 ;
  wire \dwrRowbuf[2]_i_33_n_0 ;
  wire \dwrRowbuf[2]_i_34_n_0 ;
  wire \dwrRowbuf[2]_i_35_n_0 ;
  wire \dwrRowbuf[2]_i_36_n_0 ;
  wire \dwrRowbuf[2]_i_37_n_0 ;
  wire \dwrRowbuf[2]_i_38_n_0 ;
  wire \dwrRowbuf[2]_i_39_n_0 ;
  wire \dwrRowbuf[2]_i_40_n_0 ;
  wire \dwrRowbuf[2]_i_41_n_0 ;
  wire \dwrRowbuf[2]_i_42_n_0 ;
  wire \dwrRowbuf[2]_i_43_n_0 ;
  wire \dwrRowbuf[2]_i_44_n_0 ;
  wire \dwrRowbuf[2]_i_9_n_0 ;
  wire \dwrRowbuf[30]_i_10_n_0 ;
  wire \dwrRowbuf[30]_i_2_n_0 ;
  wire \dwrRowbuf[30]_i_3_n_0 ;
  wire \dwrRowbuf[30]_i_4_n_0 ;
  wire \dwrRowbuf[30]_i_6_n_0 ;
  wire \dwrRowbuf[30]_i_7_n_0 ;
  wire \dwrRowbuf[30]_i_8_n_0 ;
  wire \dwrRowbuf[30]_i_9_n_0 ;
  wire \dwrRowbuf[31]_i_1_n_0 ;
  wire \dwrRowbuf[31]_i_3_n_0 ;
  wire \dwrRowbuf[31]_i_5_n_0 ;
  wire \dwrRowbuf[8]_i_2_n_0 ;
  wire \dwrRowbuf[8]_i_4_n_0 ;
  wire \dwrRowbuf[9]_i_2_n_0 ;
  wire \dwrRowbuf[9]_i_4_n_0 ;
  wire [0:0]\dwrRowbuf_reg[0]_0 ;
  wire \dwrRowbuf_reg[0]_1 ;
  wire \dwrRowbuf_reg[2]_i_6_n_3 ;
  wire \dwrRowbuf_reg[2]_i_6_n_4 ;
  wire \dwrRowbuf_reg[2]_i_6_n_5 ;
  wire \dwrRowbuf_reg[2]_i_6_n_6 ;
  wire \dwrRowbuf_reg[2]_i_6_n_7 ;
  wire \dwrRowbuf_reg[2]_i_7_n_3 ;
  wire \dwrRowbuf_reg[2]_i_7_n_4 ;
  wire \dwrRowbuf_reg[2]_i_7_n_5 ;
  wire \dwrRowbuf_reg[2]_i_7_n_6 ;
  wire \dwrRowbuf_reg[2]_i_7_n_7 ;
  wire \dwrRowbuf_reg[2]_i_8_n_3 ;
  wire \dwrRowbuf_reg[2]_i_8_n_4 ;
  wire \dwrRowbuf_reg[2]_i_8_n_5 ;
  wire \dwrRowbuf_reg[2]_i_8_n_6 ;
  wire \dwrRowbuf_reg[2]_i_8_n_7 ;
  wire [127:0]egrAXIS_tdata;
  wire \egrAXIS_tdata[127]_i_1_n_0 ;
  wire \egrAXIS_tdata[127]_i_3_n_0 ;
  wire \egrAXIS_tdata[127]_i_4_n_0 ;
  wire \egrAXIS_tdata[127]_i_5_n_0 ;
  wire egrAXIS_tlast;
  wire egrAXIS_tlast_i_1_n_0;
  wire egrAXIS_tlast_i_2_n_0;
  wire egrAXIS_tlast_i_3_n_0;
  wire \egrfifo[0][127]_i_1_n_0 ;
  wire \egrfifo[1][127]_i_1_n_0 ;
  wire \egrfifo[2][127]_i_1_n_0 ;
  wire \egrfifo[2][127]_i_3_n_0 ;
  wire \egrfifo[2][127]_i_4_n_0 ;
  wire \egrfifo[2][127]_i_5_n_0 ;
  wire [127:0]\egrfifo[2]_44 ;
  wire [127:0]\egrfifo_reg[0]_43 ;
  wire [127:0]\egrfifo_reg[1]_42 ;
  wire [127:0]\egrfifo_reg[2]_41 ;
  wire enRowbufBEgrstr;
  wire enRowbufBEgrstr_i_1_n_0;
  wire enRowbufBEgrstr_i_2_n_0;
  wire enRowbufBEgrstrm1;
  wire enRowbufBEgrstrm1_i_1_n_0;
  wire enRowbufStream_i_1_n_0;
  wire enRowbufStream_reg_n_0;
  wire hdrmemAXI_rlast;
  wire [1:0]i;
  wire \i[0]_i_1__5_n_0 ;
  wire \i[1]__0_i_1__0_n_0 ;
  wire \i[1]_i_1__3_n_0 ;
  wire \i[1]_i_2__2_n_0 ;
  wire \i_reg[0]__0_n_0 ;
  wire \i_reg_n_0_[0] ;
  wire \i_reg_n_0_[1] ;
  wire [8:8]in30;
  wire [30:1]in8;
  wire ixMem;
  wire \ixMemAcq[0]_i_1_n_0 ;
  wire \ixMemAcq[1]_i_1_n_0 ;
  wire \ixMemAcq[2]_i_1_n_0 ;
  wire \ixMemAcq[3]_i_1_n_0 ;
  wire \ixMemAcq[4]_i_1_n_0 ;
  wire \ixMemAcq[5]_i_1_n_0 ;
  wire \ixMemAcq[6]_i_1_n_0 ;
  wire \ixMemAcq[7]_i_1_n_0 ;
  wire [7:0]\ixMemAcq_reg[7]_0 ;
  wire [7:0]\ixMemNext_reg[7]_0 ;
  wire \ixMemNext_reg_n_0_[0] ;
  wire \ixMemNext_reg_n_0_[1] ;
  wire \ixMemNext_reg_n_0_[2] ;
  wire \ixMemNext_reg_n_0_[3] ;
  wire \ixMemNext_reg_n_0_[4] ;
  wire \ixMemNext_reg_n_0_[5] ;
  wire \ixMemNext_reg_n_0_[6] ;
  wire \ixMemNext_reg_n_0_[7] ;
  wire \ixMem[0]_i_1_n_0 ;
  wire \ixMem[1]_i_1_n_0 ;
  wire \ixMem[2]_i_1_n_0 ;
  wire \ixMem[3]_i_1_n_0 ;
  wire \ixMem[4]_i_1_n_0 ;
  wire \ixMem[5]_i_1_n_0 ;
  wire \ixMem[6]_i_1_n_0 ;
  wire \ixMem[7]_i_2_n_0 ;
  wire [7:0]\ixMem_reg[7]_0 ;
  wire [1:0]ixRdEgrfifo;
  wire \ixRdEgrfifo[0]_i_1_n_0 ;
  wire \ixRdEgrfifo[1]_i_1_n_0 ;
  wire \ixRdEgrfifo[1]_i_2_n_0 ;
  wire [1:0]ixWrEgrfifo;
  wire \ixWrEgrfifo[0]_i_1_n_0 ;
  wire \ixWrEgrfifo[1]_i_1_n_0 ;
  wire \ixWrEgrfifo[1]_i_2_n_0 ;
  wire liveBNotA_i;
  wire \liveBNotA_i[0]_i_1_n_0 ;
  wire liveBNotA_i_1_n_0;
  wire liveBNotA_memclk;
  wire liveBNotA_memclk_i_1_n_0;
  wire liveBNotA_reg_n_0;
  wire liveBNotA_to_memclk_i_1_n_0;
  wire liveBNotA_to_memclk_reg_n_0;
  wire liveBNotA_to_memclkm1;
  wire liveBNotA_to_memclkm2;
  wire memclk;
  wire myRowAbuf_n_30;
  wire myRowAbuf_n_31;
  wire myRowAbuf_n_32;
  wire myRowAbuf_n_33;
  wire myRowAbuf_n_34;
  wire myRowAbuf_n_35;
  wire myRowAbuf_n_36;
  wire myRowAbuf_n_37;
  wire myRowAbuf_n_38;
  wire myRowAbuf_n_39;
  wire myRowAbuf_n_40;
  wire myRowAbuf_n_41;
  wire myRowAbuf_n_42;
  wire myRowAbuf_n_43;
  wire myRowAbuf_n_44;
  wire myRowAbuf_n_45;
  wire myRowAbuf_n_46;
  wire myRowAbuf_n_47;
  wire myRowAbuf_n_48;
  wire myRowAbuf_n_49;
  wire myRowAbuf_n_50;
  wire myRowAbuf_n_51;
  wire myRowAbuf_n_52;
  wire myRowAbuf_n_53;
  wire myRowAbuf_n_54;
  wire myRowAbuf_n_55;
  wire myRowAbuf_n_56;
  wire myRowAbuf_n_57;
  wire myRowAbuf_n_58;
  wire myRowAbuf_n_59;
  wire myRowAbuf_n_60;
  wire myRowBbuf_n_166;
  wire myRowBbuf_n_167;
  wire myRowBbuf_n_168;
  wire myRowBbuf_n_169;
  wire myRowBbuf_n_170;
  wire myRowBbuf_n_171;
  wire myRowBbuf_n_172;
  wire myRowBbuf_n_173;
  wire myRowBbuf_n_174;
  wire myRowBbuf_n_175;
  wire myRowBbuf_n_176;
  wire myRowBbuf_n_177;
  wire myRowBbuf_n_178;
  wire myRowBbuf_n_179;
  wire myRowBbuf_n_180;
  wire myRowBbuf_n_181;
  wire myRowBbuf_n_182;
  wire myRowBbuf_n_183;
  wire myRowBbuf_n_184;
  wire myRowBbuf_n_185;
  wire myRowBbuf_n_186;
  wire myRowBbuf_n_187;
  wire myRowBbuf_n_188;
  wire myRowBbuf_n_189;
  wire myRowBbuf_n_190;
  wire myRowBbuf_n_191;
  wire myRowBbuf_n_192;
  wire myRowBbuf_n_193;
  wire myRowBbuf_n_194;
  wire myRowBbuf_n_195;
  wire p_0_in;
  wire [14:0]p_0_in__0;
  wire [14:0]p_0_in__0__0;
  wire [1:0]p_0_out;
  wire [2:0]p_3_out;
  wire [0:0]probe;
  wire pvt2;
  wire pvt29_in;
  wire [19:0]rdAAXI_araddr;
  wire reqInvAssign;
  wire reqInvHdrengSet;
  wire [35:0]rgbFromVideoinAXIS_tdatam1;
  wire [35:0]\rgbFromVideoinAXIS_tdatam1_reg[35]_0 ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[0] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[12] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[13] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[14] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[15] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[16] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[17] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[18] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[19] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[1] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[21] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[23] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[24] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[25] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[26] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[27] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[28] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[29] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[2] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[30] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[31] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[3] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[4] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[5] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[6] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[7] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ;
  wire \rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ;
  wire rgbFromVideoinAXIS_tlast_sig_i;
  wire \rgbFromVideoinAXIS_tlast_sig_i[0]_i_1_n_0 ;
  wire rgbFromVideoinAXIS_tlast_sig_memclk;
  wire rgbFromVideoinAXIS_tlast_sig_memclk_i_1_n_0;
  wire rgbFromVideoinAXIS_tlast_sig_to_memclk_i_1_n_0;
  wire rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_0;
  wire rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_n_0;
  wire rgbFromVideoinAXIS_tlast_sig_to_memclkm1;
  wire rgbFromVideoinAXIS_tlast_sig_to_memclkm2;
  wire rgbFromVideoinAXIS_tvalidm1;
  wire rgbFromVideoinAXIS_tvalidm2;
  wire rgbVideoinToManyAXIS_tvalid;
  wire rng_i;
  wire \rng_i[0]_i_1_n_0 ;
  wire rng_memclk;
  wire rng_memclk_i_1_n_0;
  wire rng_reg_0;
  wire rng_reg_1;
  wire rng_to_memclk_i_1_n_0;
  wire rng_to_memclk_reg_n_0;
  wire rng_to_memclkm1;
  wire rng_to_memclkm2;
  wire \row_lcl[0]_i_1__0_n_0 ;
  wire \row_lcl[10]_i_3__0_n_0 ;
  wire \row_lcl[10]_i_4_n_0 ;
  wire \row_lcl[10]_i_5_n_0 ;
  wire \row_lcl[10]_i_6_n_0 ;
  wire \row_lcl[1]_i_1__0_n_0 ;
  wire \row_lcl[2]_i_1__0_n_0 ;
  wire \row_lcl[3]_i_1__0_n_0 ;
  wire \row_lcl[4]_i_1__0_n_0 ;
  wire \row_lcl[5]_i_1__0_n_0 ;
  wire \row_lcl[6]_i_1__0_n_0 ;
  wire \row_lcl[7]_i_1__0_n_0 ;
  wire \row_lcl[8]_i_1__0_n_0 ;
  wire \row_lcl[9]_i_1__0_n_0 ;
  wire [10:0]\row_lcl_reg[10]_0 ;
  wire sel;
  wire [1:1]stateIgrstr;
  wire stateOp;
  wire stateOp_reg_0;
  wire stateOp_reg_1;
  wire [1:0]stateStockrls;
  wire \stateStockrls[0]_i_1_n_0 ;
  wire \stateStockrls[1]_i_1_n_0 ;
  wire \stateStockrls[1]_i_2_n_0 ;
  wire \stateStream[0]_i_10_n_0 ;
  wire \stateStream[0]_i_11_n_0 ;
  wire \stateStream[0]_i_12_n_0 ;
  wire \stateStream[0]_i_1__0_n_0 ;
  wire \stateStream[0]_i_2__0_n_0 ;
  wire \stateStream[0]_i_4_n_0 ;
  wire \stateStream[0]_i_5_n_0 ;
  wire \stateStream[0]_i_6_n_0 ;
  wire \stateStream[0]_i_7_n_0 ;
  wire \stateStream[0]_i_8_n_0 ;
  wire \stateStream[0]_i_9_n_0 ;
  wire \stateStream[1]_i_1__0_n_0 ;
  wire \stateStream[1]_i_2__0_n_0 ;
  wire \stateStream[1]_i_3_n_0 ;
  wire \stateStream[1]_i_4_n_0 ;
  wire \stateStream[1]_i_5_n_0 ;
  wire \stateStream[1]_i_7_n_0 ;
  wire \stateStream[1]_i_8_n_0 ;
  wire \stateStream_reg[0]_0 ;
  wire [10:0]\stateStream_reg[0]_1 ;
  wire \stateStream_reg[1]_0 ;
  wire \stateSwap[0]_i_1_n_0 ;
  wire \stateSwap[0]_i_2_n_0 ;
  wire \stateSwap[0]_i_3_n_0 ;
  wire \stateSwap[0]_i_4_n_0 ;
  wire \stateSwap[0]_i_5_n_0 ;
  wire \stateSwap[1]_i_1_n_0 ;
  wire \stateSwap[1]_i_2_n_0 ;
  wire \stateSwap[1]_i_3_n_0 ;
  wire \stateSwap[1]_i_4_n_0 ;
  wire \stateSwap[1]_i_5_n_0 ;
  wire \stateSwap[1]_i_6_n_0 ;
  wire \stateSwap[1]_i_7_n_0 ;
  wire \stateSwap[2]_i_1_n_0 ;
  wire \stateSwap[2]_i_2_n_0 ;
  wire \stateSwap[2]_i_3_n_0 ;
  wire \stateSwap[2]_i_4_n_0 ;
  wire \stateSwap[2]_i_6_n_0 ;
  wire \stateSwap[3]_i_1_n_0 ;
  wire \stateSwap[3]_i_2_n_0 ;
  wire \stateSwap[3]_i_3_0 ;
  wire [0:0]\stateSwap[3]_i_3_1 ;
  wire \stateSwap[3]_i_3_n_0 ;
  wire \stateSwap[3]_i_4_n_0 ;
  wire [1:0]\stateSwap[3]_i_5_0 ;
  wire \stateSwap[3]_i_5_n_0 ;
  wire \stateSwap[3]_i_6_n_0 ;
  wire \stateSwap[3]_i_7_n_0 ;
  wire \stateSwap_reg[2]_0 ;
  wire [3:0]\stateSwap_reg[3]_0 ;
  wire \tixVState[0]_i_1_n_0 ;
  wire \tixVState[1]_i_1__1_n_0 ;
  wire \tixVState[7]_i_1_n_0 ;
  wire \tixVState[7]_i_2_n_0 ;
  wire [2:0]\tixVState_reg[7]_0 ;
  wire \tixVState_reg[7]_1 ;
  wire [31:0]tkstAcq;
  wire \tkstAcq[0]_i_1_n_0 ;
  wire \tkstAcq[10]_i_1_n_0 ;
  wire \tkstAcq[11]_i_1_n_0 ;
  wire \tkstAcq[12]_i_1_n_0 ;
  wire \tkstAcq[13]_i_1_n_0 ;
  wire \tkstAcq[14]_i_1_n_0 ;
  wire \tkstAcq[15]_i_1_n_0 ;
  wire \tkstAcq[16]_i_1_n_0 ;
  wire \tkstAcq[17]_i_1_n_0 ;
  wire \tkstAcq[18]_i_1_n_0 ;
  wire \tkstAcq[19]_i_1_n_0 ;
  wire \tkstAcq[1]_i_1_n_0 ;
  wire \tkstAcq[20]_i_1_n_0 ;
  wire \tkstAcq[21]_i_1_n_0 ;
  wire \tkstAcq[22]_i_1_n_0 ;
  wire \tkstAcq[23]_i_1_n_0 ;
  wire \tkstAcq[24]_i_1_n_0 ;
  wire \tkstAcq[25]_i_1_n_0 ;
  wire \tkstAcq[26]_i_1_n_0 ;
  wire \tkstAcq[27]_i_1_n_0 ;
  wire \tkstAcq[28]_i_1_n_0 ;
  wire \tkstAcq[29]_i_1_n_0 ;
  wire \tkstAcq[2]_i_1_n_0 ;
  wire \tkstAcq[30]_i_1_n_0 ;
  wire \tkstAcq[31]_i_1_n_0 ;
  wire \tkstAcq[3]_i_1_n_0 ;
  wire \tkstAcq[4]_i_1_n_0 ;
  wire \tkstAcq[5]_i_1_n_0 ;
  wire \tkstAcq[6]_i_1_n_0 ;
  wire \tkstAcq[7]_i_1_n_0 ;
  wire \tkstAcq[8]_i_1_n_0 ;
  wire \tkstAcq[9]_i_1_n_0 ;
  wire [31:0]\tkstAcq_reg[31]_0 ;
  wire \tkst[0]_i_1_n_0 ;
  wire \tkst[10]_i_1_n_0 ;
  wire \tkst[11]_i_1_n_0 ;
  wire \tkst[12]_i_1_n_0 ;
  wire \tkst[13]_i_1_n_0 ;
  wire \tkst[14]_i_1_n_0 ;
  wire \tkst[15]_i_1_n_0 ;
  wire \tkst[16]_i_1_n_0 ;
  wire \tkst[17]_i_1_n_0 ;
  wire \tkst[18]_i_1_n_0 ;
  wire \tkst[19]_i_1_n_0 ;
  wire \tkst[1]_i_1_n_0 ;
  wire \tkst[20]_i_1_n_0 ;
  wire \tkst[21]_i_1_n_0 ;
  wire \tkst[22]_i_1_n_0 ;
  wire \tkst[23]_i_1_n_0 ;
  wire \tkst[24]_i_1_n_0 ;
  wire \tkst[25]_i_1_n_0 ;
  wire \tkst[26]_i_1_n_0 ;
  wire \tkst[27]_i_1_n_0 ;
  wire \tkst[28]_i_1_n_0 ;
  wire \tkst[29]_i_1_n_0 ;
  wire \tkst[2]_i_1_n_0 ;
  wire \tkst[30]_i_1_n_0 ;
  wire \tkst[31]_i_1__0_n_0 ;
  wire \tkst[3]_i_1_n_0 ;
  wire \tkst[4]_i_1_n_0 ;
  wire \tkst[5]_i_1_n_0 ;
  wire \tkst[6]_i_1_n_0 ;
  wire \tkst[7]_i_1_n_0 ;
  wire \tkst[8]_i_1_n_0 ;
  wire \tkst[9]_i_1_n_0 ;
  wire [31:0]\tkst_reg[31]_0 ;
  wire vsync_sig_i;
  wire \vsync_sig_i[0]_i_1_n_0 ;
  wire vsync_sig_memclk;
  wire vsync_sig_memclk_i_1_n_0;
  wire vsync_sig_to_memclk_i_1_n_0;
  wire vsync_sig_to_memclk_reg_n_0;
  wire vsync_sig_to_memclkm1;
  wire vsync_sig_to_memclkm2;
  wire [0:0]web;
  wire \wordEgrLast[2]_i_1_n_0 ;
  wire \wordEgrLast_reg_n_0_[2] ;
  wire [3:0]wordEgrRd;
  wire \wordEgrRd[0]_i_1_n_0 ;
  wire \wordEgrRd[1]_i_1_n_0 ;
  wire \wordEgrRd[2]_i_1_n_0 ;
  wire \wordEgrRd[3]_i_1_n_0 ;
  wire \wordEgrRd[3]_i_2_n_0 ;
  wire \wordEgrRd[3]_i_3_n_0 ;
  wire \wordEgrRd[3]_i_4_n_0 ;
  wire \wordEgrRd[3]_i_5_n_0 ;
  wire \wordEgrWr[0]_i_1_n_0 ;
  wire \wordEgrWr[1]_i_1_n_0 ;
  wire \wordEgrWr[2]_i_1_n_0 ;
  wire \wordEgrWr[3]_i_1_n_0 ;
  wire \wordEgrWr[3]_i_2_n_0 ;
  wire \wordEgrWr[3]_i_3_n_0 ;
  wire \wordEgrWr[3]_i_4_n_0 ;
  wire \wordEgrWr[3]_i_5_n_0 ;
  wire [3:0]wordEgrWr__0;
  wire [19:5]wrAAXI_awaddr;
  wire wrAAXI_awvalid;
  wire [127:0]wrAAXI_wdata;
  wire wrAAXI_wlast;
  wire wrAAXI_wvalid;
  wire [7:5]\NLW_aRowbufBIgrstr_reg[30]_i_3_CO_UNCONNECTED ;
  wire [7:6]\NLW_aRowbufBIgrstr_reg[30]_i_3_O_UNCONNECTED ;
  wire [7:6]\NLW_dwrRowbuf_reg[2]_i_6_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrRowbuf_reg[2]_i_6_O_UNCONNECTED ;
  wire [7:6]\NLW_dwrRowbuf_reg[2]_i_7_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrRowbuf_reg[2]_i_7_O_UNCONNECTED ;
  wire [7:6]\NLW_dwrRowbuf_reg[2]_i_8_CO_UNCONNECTED ;
  wire [7:0]\NLW_dwrRowbuf_reg[2]_i_8_O_UNCONNECTED ;

  assign ddrAXI_wdata_0_sn_1 = ddrAXI_wdata_0_sp_1;
  LUT5 #(
    .INIT(32'hFFFFA2AA)) 
    \FSM_sequential_stateEgrstr[0]_i_1 
       (.I0(wrAAXI_wvalid),
        .I1(egrAXIS_tlast),
        .I2(ddrAXI_wdata_0_sn_1),
        .I3(ddrAXI_wready),
        .I4(\FSM_sequential_stateEgrstr[0]_i_3_n_0 ),
        .O(p_3_out[0]));
  (* SOFT_HLUTNM = "soft_lutpair1800" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \FSM_sequential_stateEgrstr[0]_i_2 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .O(wrAAXI_wvalid));
  (* SOFT_HLUTNM = "soft_lutpair1799" *) 
  LUT4 #(
    .INIT(16'h000B)) 
    \FSM_sequential_stateEgrstr[0]_i_3 
       (.I0(p_0_in),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .O(\FSM_sequential_stateEgrstr[0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0E0E060E0E0E0E0E)) 
    \FSM_sequential_stateEgrstr[1]_i_1 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I3(egrAXIS_tlast),
        .I4(ddrAXI_wdata_0_sn_1),
        .I5(ddrAXI_wready),
        .O(p_3_out[1]));
  LUT6 #(
    .INIT(64'h1D1D1D1D1D1D0F1D)) 
    \FSM_sequential_stateEgrstr[2]_i_1 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I3(\stateSwap_reg[3]_0 [2]),
        .I4(\stateSwap_reg[3]_0 [1]),
        .I5(\stateSwap_reg[3]_0 [3]),
        .O(\FSM_sequential_stateEgrstr[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000080000000000)) 
    \FSM_sequential_stateEgrstr[2]_i_2 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I3(ddrAXI_wready),
        .I4(ddrAXI_wdata_0_sn_1),
        .I5(egrAXIS_tlast),
        .O(p_3_out[2]));
  (* FSM_ENCODED_STATES = "iSTATE:001,iSTATE0:010,iSTATE1:011,iSTATE2:100,iSTATE3:000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateEgrstr_reg[0] 
       (.C(memclk),
        .CE(\FSM_sequential_stateEgrstr[2]_i_1_n_0 ),
        .CLR(AR),
        .D(p_3_out[0]),
        .Q(\FSM_sequential_stateEgrstr_reg[2]_0 [0]));
  (* FSM_ENCODED_STATES = "iSTATE:001,iSTATE0:010,iSTATE1:011,iSTATE2:100,iSTATE3:000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateEgrstr_reg[1] 
       (.C(memclk),
        .CE(\FSM_sequential_stateEgrstr[2]_i_1_n_0 ),
        .CLR(AR),
        .D(p_3_out[1]),
        .Q(\FSM_sequential_stateEgrstr_reg[2]_0 [1]));
  (* FSM_ENCODED_STATES = "iSTATE:001,iSTATE0:010,iSTATE1:011,iSTATE2:100,iSTATE3:000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateEgrstr_reg[2] 
       (.C(memclk),
        .CE(\FSM_sequential_stateEgrstr[2]_i_1_n_0 ),
        .CLR(AR),
        .D(p_3_out[2]),
        .Q(\FSM_sequential_stateEgrstr_reg[2]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1715" *) 
  LUT5 #(
    .INIT(32'h00004FFF)) 
    \FSM_sequential_stateIgrstr[0]_i_1 
       (.I0(\FSM_sequential_stateIgrstr[0]_i_2_n_0 ),
        .I1(hdrmemAXI_rlast),
        .I2(stateIgrstr),
        .I3(\FSM_sequential_stateIgrstr[0]_i_4_n_0 ),
        .I4(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .O(p_0_out[0]));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \FSM_sequential_stateIgrstr[0]_i_10 
       (.I0(\aRowbufBIgrstr_reg_n_0_[11] ),
        .I1(\aRowbufBIgrstr_reg_n_0_[12] ),
        .I2(\aRowbufBIgrstr_reg_n_0_[9] ),
        .I3(\aRowbufBIgrstr_reg_n_0_[10] ),
        .I4(\FSM_sequential_stateIgrstr[0]_i_12_n_0 ),
        .O(\FSM_sequential_stateIgrstr[0]_i_10_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \FSM_sequential_stateIgrstr[0]_i_11 
       (.I0(\aRowbufBIgrstr_reg_n_0_[22] ),
        .I1(\aRowbufBIgrstr_reg_n_0_[21] ),
        .I2(\aRowbufBIgrstr_reg_n_0_[24] ),
        .I3(\aRowbufBIgrstr_reg_n_0_[23] ),
        .O(\FSM_sequential_stateIgrstr[0]_i_11_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \FSM_sequential_stateIgrstr[0]_i_12 
       (.I0(\aRowbufBIgrstr_reg_n_0_[14] ),
        .I1(\aRowbufBIgrstr_reg_n_0_[13] ),
        .I2(\aRowbufBIgrstr_reg_n_0_[16] ),
        .I3(\aRowbufBIgrstr_reg_n_0_[15] ),
        .O(\FSM_sequential_stateIgrstr[0]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'hBEFFFFBE)) 
    \FSM_sequential_stateIgrstr[0]_i_2 
       (.I0(\FSM_sequential_stateIgrstr[0]_i_5_n_0 ),
        .I1(\burstIgrstr_reg_n_0_[2] ),
        .I2(rdAAXI_araddr[2]),
        .I3(\burstIgrstr_reg_n_0_[1] ),
        .I4(rdAAXI_araddr[1]),
        .O(\FSM_sequential_stateIgrstr[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFEF)) 
    \FSM_sequential_stateIgrstr[0]_i_4 
       (.I0(\FSM_sequential_stateIgrstr[0]_i_6_n_0 ),
        .I1(\FSM_sequential_stateIgrstr[0]_i_7_n_0 ),
        .I2(\aRowbufBIgrstr_reg_n_0_[0] ),
        .I3(\aRowbufBIgrstr_reg_n_0_[29] ),
        .I4(\aRowbufBIgrstr_reg_n_0_[30] ),
        .I5(\FSM_sequential_stateIgrstr[0]_i_8_n_0 ),
        .O(\FSM_sequential_stateIgrstr[0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \FSM_sequential_stateIgrstr[0]_i_5 
       (.I0(\burstIgrstr_reg_n_0_[4] ),
        .I1(rdAAXI_araddr[4]),
        .I2(\burstIgrstr_reg_n_0_[3] ),
        .I3(rdAAXI_araddr[3]),
        .I4(rdAAXI_araddr[0]),
        .I5(\burstIgrstr_reg_n_0_[0] ),
        .O(\FSM_sequential_stateIgrstr[0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFBFFFFFFF)) 
    \FSM_sequential_stateIgrstr[0]_i_6 
       (.I0(\FSM_sequential_stateIgrstr[0]_i_9_n_0 ),
        .I1(\aRowbufBIgrstr_reg_n_0_[2] ),
        .I2(\aRowbufBIgrstr_reg_n_0_[1] ),
        .I3(\aRowbufBIgrstr_reg_n_0_[4] ),
        .I4(\aRowbufBIgrstr_reg_n_0_[3] ),
        .I5(\FSM_sequential_stateIgrstr[0]_i_10_n_0 ),
        .O(\FSM_sequential_stateIgrstr[0]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \FSM_sequential_stateIgrstr[0]_i_7 
       (.I0(\aRowbufBIgrstr_reg_n_0_[26] ),
        .I1(\aRowbufBIgrstr_reg_n_0_[25] ),
        .I2(\aRowbufBIgrstr_reg_n_0_[28] ),
        .I3(\aRowbufBIgrstr_reg_n_0_[27] ),
        .O(\FSM_sequential_stateIgrstr[0]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \FSM_sequential_stateIgrstr[0]_i_8 
       (.I0(\aRowbufBIgrstr_reg_n_0_[19] ),
        .I1(\aRowbufBIgrstr_reg_n_0_[20] ),
        .I2(\aRowbufBIgrstr_reg_n_0_[17] ),
        .I3(\aRowbufBIgrstr_reg_n_0_[18] ),
        .I4(\FSM_sequential_stateIgrstr[0]_i_11_n_0 ),
        .O(\FSM_sequential_stateIgrstr[0]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \FSM_sequential_stateIgrstr[0]_i_9 
       (.I0(\aRowbufBIgrstr_reg_n_0_[6] ),
        .I1(\aRowbufBIgrstr_reg_n_0_[5] ),
        .I2(\aRowbufBIgrstr_reg_n_0_[8] ),
        .I3(\aRowbufBIgrstr_reg_n_0_[7] ),
        .O(\FSM_sequential_stateIgrstr[0]_i_9_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFEEEF)) 
    \FSM_sequential_stateIgrstr[1]_i_1 
       (.I0(\FSM_sequential_stateIgrstr[1]_i_3_n_0 ),
        .I1(\burstIgrstr_reg[0]_0 ),
        .I2(stateIgrstr),
        .I3(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I4(\FSM_sequential_stateIgrstr[1]_i_5_n_0 ),
        .O(\FSM_sequential_stateIgrstr[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1735" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \FSM_sequential_stateIgrstr[1]_i_2 
       (.I0(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I1(stateIgrstr),
        .O(p_0_out[1]));
  LUT6 #(
    .INIT(64'hAA00220000030000)) 
    \FSM_sequential_stateIgrstr[1]_i_3 
       (.I0(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I1(\stateSwap_reg[3]_0 [2]),
        .I2(\stateSwap_reg[3]_0 [0]),
        .I3(\stateSwap_reg[3]_0 [1]),
        .I4(\stateSwap_reg[3]_0 [3]),
        .I5(stateIgrstr),
        .O(\FSM_sequential_stateIgrstr[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0E0F000000C000C0)) 
    \FSM_sequential_stateIgrstr[1]_i_5 
       (.I0(\stateSwap_reg[3]_0 [0]),
        .I1(\stateSwap_reg[3]_0 [2]),
        .I2(\stateSwap_reg[3]_0 [1]),
        .I3(\stateSwap_reg[3]_0 [3]),
        .I4(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I5(stateIgrstr),
        .O(\FSM_sequential_stateIgrstr[1]_i_5_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:01,iSTATE0:10,iSTATE1:11,iSTATE2:00" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateIgrstr_reg[0] 
       (.C(memclk),
        .CE(\FSM_sequential_stateIgrstr[1]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_out[0]),
        .Q(\FSM_sequential_stateIgrstr_reg[0]_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:01,iSTATE0:10,iSTATE1:11,iSTATE2:00" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateIgrstr_reg[1] 
       (.C(memclk),
        .CE(\FSM_sequential_stateIgrstr[1]_i_1_n_0 ),
        .CLR(AR),
        .D(p_0_out[1]),
        .Q(stateIgrstr));
  LUT5 #(
    .INIT(32'h00000800)) 
    \a0Egrstr[8]_i_1 
       (.I0(rng_memclk),
        .I1(\stateSwap_reg[3]_0 [1]),
        .I2(\stateSwap_reg[3]_0 [3]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(\stateSwap_reg[3]_0 [2]),
        .O(a0Egrstr));
  FDCE #(
    .INIT(1'b0)) 
    \a0Egrstr_reg[4] 
       (.C(memclk),
        .CE(a0Egrstr),
        .CLR(AR),
        .D(rdAAXI_araddr[0]),
        .Q(\a0Egrstr_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \a0Egrstr_reg[5] 
       (.C(memclk),
        .CE(a0Egrstr),
        .CLR(AR),
        .D(rdAAXI_araddr[1]),
        .Q(\a0Egrstr_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \a0Egrstr_reg[6] 
       (.C(memclk),
        .CE(a0Egrstr),
        .CLR(AR),
        .D(rdAAXI_araddr[2]),
        .Q(\a0Egrstr_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \a0Egrstr_reg[7] 
       (.C(memclk),
        .CE(a0Egrstr),
        .CLR(AR),
        .D(rdAAXI_araddr[3]),
        .Q(\a0Egrstr_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \a0Egrstr_reg[8] 
       (.C(memclk),
        .CE(a0Egrstr),
        .CLR(AR),
        .D(rdAAXI_araddr[4]),
        .Q(\a0Egrstr_reg_n_0_[8] ));
  (* SOFT_HLUTNM = "soft_lutpair1726" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \a0[0]_i_1 
       (.I0(\ixMemNext_reg_n_0_[0] ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\a0[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1726" *) 
  LUT5 #(
    .INIT(32'h00E0E000)) 
    \a0[1]_i_1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(rng_reg_0),
        .I3(\ixMemNext_reg_n_0_[1] ),
        .I4(\ixMemNext_reg_n_0_[0] ),
        .O(\a0[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hE0E000E00000E000)) 
    \a0[2]_i_1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(rng_reg_0),
        .I3(\ixMemNext_reg_n_0_[1] ),
        .I4(\ixMemNext_reg_n_0_[0] ),
        .I5(\ixMemNext_reg_n_0_[2] ),
        .O(\a0[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1727" *) 
  LUT5 #(
    .INIT(32'h822882A0)) 
    \a0[3]_i_1 
       (.I0(\a0[4]_i_4_n_0 ),
        .I1(\ixMemNext_reg_n_0_[1] ),
        .I2(\ixMemNext_reg_n_0_[3] ),
        .I3(\ixMemNext_reg_n_0_[2] ),
        .I4(\ixMemNext_reg_n_0_[0] ),
        .O(\a0[3]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h23FF)) 
    \a0[4]_i_1 
       (.I0(\a0[4]_i_3_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\a0[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1727" *) 
  LUT5 #(
    .INIT(32'h20082808)) 
    \a0[4]_i_2 
       (.I0(\a0[4]_i_4_n_0 ),
        .I1(\ixMemNext_reg_n_0_[3] ),
        .I2(\ixMemNext_reg_n_0_[2] ),
        .I3(\ixMemNext_reg_n_0_[1] ),
        .I4(\ixMemNext_reg_n_0_[0] ),
        .O(\a0[4]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \a0[4]_i_3 
       (.I0(\stateStream[1]_i_4_n_0 ),
        .I1(\stateStream[1]_i_3_n_0 ),
        .O(\a0[4]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1722" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \a0[4]_i_4 
       (.I0(rng_reg_0),
        .I1(Q[0]),
        .I2(Q[1]),
        .O(\a0[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h09000009FFFFFFFF)) 
    \a0_i[0]_i_1 
       (.I0(\a0_reg_n_0_[4] ),
        .I1(\a0_to_memclk_reg_n_0_[4] ),
        .I2(\a0_to_memclk[4]_i_2_n_0 ),
        .I3(\a0_to_memclk_reg_n_0_[3] ),
        .I4(\a0_reg_n_0_[3] ),
        .I5(a0_i),
        .O(\a0_i[0]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \a0_i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\a0_i[0]_i_1_n_0 ),
        .Q(a0_i));
  LUT5 #(
    .INIT(32'h90000090)) 
    \a0_memclk[4]_i_1 
       (.I0(a0_to_memclkm1[3]),
        .I1(a0_to_memclkm2[3]),
        .I2(\a0_memclk[4]_i_2_n_0 ),
        .I3(a0_to_memclkm2[4]),
        .I4(a0_to_memclkm1[4]),
        .O(a0_memclk0));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \a0_memclk[4]_i_2 
       (.I0(a0_to_memclkm1[0]),
        .I1(a0_to_memclkm2[0]),
        .I2(a0_to_memclkm2[2]),
        .I3(a0_to_memclkm1[2]),
        .I4(a0_to_memclkm2[1]),
        .I5(a0_to_memclkm1[1]),
        .O(\a0_memclk[4]_i_2_n_0 ));
  FDCE \a0_memclk_reg[0] 
       (.C(memclk),
        .CE(a0_memclk0),
        .CLR(AR),
        .D(a0_to_memclkm2[0]),
        .Q(data[8]));
  FDCE \a0_memclk_reg[1] 
       (.C(memclk),
        .CE(a0_memclk0),
        .CLR(AR),
        .D(a0_to_memclkm2[1]),
        .Q(data[9]));
  FDCE \a0_memclk_reg[2] 
       (.C(memclk),
        .CE(a0_memclk0),
        .CLR(AR),
        .D(a0_to_memclkm2[2]),
        .Q(data[10]));
  FDCE \a0_memclk_reg[3] 
       (.C(memclk),
        .CE(a0_memclk0),
        .CLR(AR),
        .D(a0_to_memclkm2[3]),
        .Q(data[11]));
  FDCE \a0_memclk_reg[4] 
       (.C(memclk),
        .CE(a0_memclk0),
        .CLR(AR),
        .D(a0_to_memclkm2[4]),
        .Q(data[12]));
  FDCE \a0_reg[0] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\a0[0]_i_1_n_0 ),
        .Q(\a0_reg_n_0_[0] ));
  FDCE \a0_reg[1] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\a0[1]_i_1_n_0 ),
        .Q(\a0_reg_n_0_[1] ));
  FDCE \a0_reg[2] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\a0[2]_i_1_n_0 ),
        .Q(\a0_reg_n_0_[2] ));
  FDCE \a0_reg[3] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\a0[3]_i_1_n_0 ),
        .Q(\a0_reg_n_0_[3] ));
  FDCE \a0_reg[4] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\a0[4]_i_2_n_0 ),
        .Q(\a0_reg_n_0_[4] ));
  LUT6 #(
    .INIT(64'hAA28AAAAAAAAAA28)) 
    \a0_to_memclk[4]_i_1 
       (.I0(a0_i),
        .I1(\a0_reg_n_0_[4] ),
        .I2(\a0_to_memclk_reg_n_0_[4] ),
        .I3(\a0_to_memclk[4]_i_2_n_0 ),
        .I4(\a0_to_memclk_reg_n_0_[3] ),
        .I5(\a0_reg_n_0_[3] ),
        .O(a0_to_memclk));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \a0_to_memclk[4]_i_2 
       (.I0(\a0_reg_n_0_[0] ),
        .I1(\a0_to_memclk_reg_n_0_[0] ),
        .I2(\a0_to_memclk_reg_n_0_[2] ),
        .I3(\a0_reg_n_0_[2] ),
        .I4(\a0_to_memclk_reg_n_0_[1] ),
        .I5(\a0_reg_n_0_[1] ),
        .O(\a0_to_memclk[4]_i_2_n_0 ));
  FDCE \a0_to_memclk_reg[0] 
       (.C(aclk_sig),
        .CE(a0_to_memclk),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\a0_reg_n_0_[0] ),
        .Q(\a0_to_memclk_reg_n_0_[0] ));
  FDCE \a0_to_memclk_reg[1] 
       (.C(aclk_sig),
        .CE(a0_to_memclk),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\a0_reg_n_0_[1] ),
        .Q(\a0_to_memclk_reg_n_0_[1] ));
  FDCE \a0_to_memclk_reg[2] 
       (.C(aclk_sig),
        .CE(a0_to_memclk),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\a0_reg_n_0_[2] ),
        .Q(\a0_to_memclk_reg_n_0_[2] ));
  FDCE \a0_to_memclk_reg[3] 
       (.C(aclk_sig),
        .CE(a0_to_memclk),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\a0_reg_n_0_[3] ),
        .Q(\a0_to_memclk_reg_n_0_[3] ));
  FDCE \a0_to_memclk_reg[4] 
       (.C(aclk_sig),
        .CE(a0_to_memclk),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\a0_reg_n_0_[4] ),
        .Q(\a0_to_memclk_reg_n_0_[4] ));
  FDCE \a0_to_memclkm1_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\a0_to_memclk_reg_n_0_[0] ),
        .Q(a0_to_memclkm1[0]));
  FDCE \a0_to_memclkm1_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\a0_to_memclk_reg_n_0_[1] ),
        .Q(a0_to_memclkm1[1]));
  FDCE \a0_to_memclkm1_reg[2] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\a0_to_memclk_reg_n_0_[2] ),
        .Q(a0_to_memclkm1[2]));
  FDCE \a0_to_memclkm1_reg[3] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\a0_to_memclk_reg_n_0_[3] ),
        .Q(a0_to_memclkm1[3]));
  FDCE \a0_to_memclkm1_reg[4] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\a0_to_memclk_reg_n_0_[4] ),
        .Q(a0_to_memclkm1[4]));
  FDCE \a0_to_memclkm2_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(a0_to_memclkm1[0]),
        .Q(a0_to_memclkm2[0]));
  FDCE \a0_to_memclkm2_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(a0_to_memclkm1[1]),
        .Q(a0_to_memclkm2[1]));
  FDCE \a0_to_memclkm2_reg[2] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(a0_to_memclkm1[2]),
        .Q(a0_to_memclkm2[2]));
  FDCE \a0_to_memclkm2_reg[3] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(a0_to_memclkm1[3]),
        .Q(a0_to_memclkm2[3]));
  FDCE \a0_to_memclkm2_reg[4] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(a0_to_memclkm1[4]),
        .Q(a0_to_memclkm2[4]));
  (* SOFT_HLUTNM = "soft_lutpair1841" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \aRowbufBEgrstr[0]_i_1 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I1(aRowbufBEgrstr[0]),
        .O(\aRowbufBEgrstr[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1841" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \aRowbufBEgrstr[1]_i_1 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I1(aRowbufBEgrstr[1]),
        .I2(aRowbufBEgrstr[0]),
        .O(\aRowbufBEgrstr[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1746" *) 
  LUT4 #(
    .INIT(16'h2888)) 
    \aRowbufBEgrstr[2]_i_1 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I1(aRowbufBEgrstr[2]),
        .I2(aRowbufBEgrstr[0]),
        .I3(aRowbufBEgrstr[1]),
        .O(\aRowbufBEgrstr[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1746" *) 
  LUT5 #(
    .INIT(32'h28888888)) 
    \aRowbufBEgrstr[3]_i_1 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I1(aRowbufBEgrstr[3]),
        .I2(aRowbufBEgrstr[1]),
        .I3(aRowbufBEgrstr[0]),
        .I4(aRowbufBEgrstr[2]),
        .O(\aRowbufBEgrstr[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h6666F000)) 
    \aRowbufBEgrstr[4]_i_1 
       (.I0(\aRowbufBEgrstr[4]_i_2_n_0 ),
        .I1(aRowbufBEgrstr[4]),
        .I2(\a0Egrstr_reg_n_0_[4] ),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .O(\aRowbufBEgrstr[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1745" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \aRowbufBEgrstr[4]_i_2 
       (.I0(aRowbufBEgrstr[2]),
        .I1(aRowbufBEgrstr[0]),
        .I2(aRowbufBEgrstr[1]),
        .I3(aRowbufBEgrstr[3]),
        .O(\aRowbufBEgrstr[4]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h6666F000)) 
    \aRowbufBEgrstr[5]_i_1 
       (.I0(\aRowbufBEgrstr[6]_i_2_n_0 ),
        .I1(aRowbufBEgrstr[5]),
        .I2(\a0Egrstr_reg_n_0_[5] ),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .O(\aRowbufBEgrstr[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h78787878FF000000)) 
    \aRowbufBEgrstr[6]_i_1 
       (.I0(aRowbufBEgrstr[5]),
        .I1(\aRowbufBEgrstr[6]_i_2_n_0 ),
        .I2(aRowbufBEgrstr[6]),
        .I3(\a0Egrstr_reg_n_0_[6] ),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I5(\aRowbufBEgrstr[6]_i_3_n_0 ),
        .O(\aRowbufBEgrstr[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1745" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \aRowbufBEgrstr[6]_i_2 
       (.I0(aRowbufBEgrstr[3]),
        .I1(aRowbufBEgrstr[1]),
        .I2(aRowbufBEgrstr[0]),
        .I3(aRowbufBEgrstr[2]),
        .I4(aRowbufBEgrstr[4]),
        .O(\aRowbufBEgrstr[6]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \aRowbufBEgrstr[6]_i_3 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .O(\aRowbufBEgrstr[6]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1803" *) 
  LUT4 #(
    .INIT(16'hAAEA)) 
    \aRowbufBEgrstr[7]_i_1 
       (.I0(\aRowbufBEgrstr[7]_i_2_n_0 ),
        .I1(\a0Egrstr_reg_n_0_[7] ),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .O(\aRowbufBEgrstr[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0EE0E0E0E0E0E0E0)) 
    \aRowbufBEgrstr[7]_i_2 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I2(aRowbufBEgrstr[7]),
        .I3(aRowbufBEgrstr[6]),
        .I4(aRowbufBEgrstr[5]),
        .I5(\aRowbufBEgrstr[6]_i_2_n_0 ),
        .O(\aRowbufBEgrstr[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000F55500007777)) 
    \aRowbufBEgrstr[8]_i_1 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I1(\wordEgrRd[3]_i_3_n_0 ),
        .I2(\wordEgrWr[3]_i_5_n_0 ),
        .I3(\aRowbufBEgrstr_reg[0]_0 ),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I5(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .O(\aRowbufBEgrstr[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1802" *) 
  LUT4 #(
    .INIT(16'hAAC0)) 
    \aRowbufBEgrstr[8]_i_2 
       (.I0(in30),
        .I1(\a0Egrstr_reg_n_0_[8] ),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .O(\aRowbufBEgrstr[8]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \aRowbufBEgrstr[8]_i_4 
       (.I0(\aRowbufBEgrstr[6]_i_2_n_0 ),
        .I1(aRowbufBEgrstr[7]),
        .I2(aRowbufBEgrstr[6]),
        .I3(aRowbufBEgrstr[5]),
        .I4(aRowbufBEgrstr[8]),
        .O(in30));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBEgrstr_reg[0] 
       (.C(memclk),
        .CE(\aRowbufBEgrstr[8]_i_1_n_0 ),
        .CLR(AR),
        .D(\aRowbufBEgrstr[0]_i_1_n_0 ),
        .Q(aRowbufBEgrstr[0]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBEgrstr_reg[1] 
       (.C(memclk),
        .CE(\aRowbufBEgrstr[8]_i_1_n_0 ),
        .CLR(AR),
        .D(\aRowbufBEgrstr[1]_i_1_n_0 ),
        .Q(aRowbufBEgrstr[1]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBEgrstr_reg[2] 
       (.C(memclk),
        .CE(\aRowbufBEgrstr[8]_i_1_n_0 ),
        .CLR(AR),
        .D(\aRowbufBEgrstr[2]_i_1_n_0 ),
        .Q(aRowbufBEgrstr[2]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBEgrstr_reg[3] 
       (.C(memclk),
        .CE(\aRowbufBEgrstr[8]_i_1_n_0 ),
        .CLR(AR),
        .D(\aRowbufBEgrstr[3]_i_1_n_0 ),
        .Q(aRowbufBEgrstr[3]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBEgrstr_reg[4] 
       (.C(memclk),
        .CE(\aRowbufBEgrstr[8]_i_1_n_0 ),
        .CLR(AR),
        .D(\aRowbufBEgrstr[4]_i_1_n_0 ),
        .Q(aRowbufBEgrstr[4]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBEgrstr_reg[5] 
       (.C(memclk),
        .CE(\aRowbufBEgrstr[8]_i_1_n_0 ),
        .CLR(AR),
        .D(\aRowbufBEgrstr[5]_i_1_n_0 ),
        .Q(aRowbufBEgrstr[5]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBEgrstr_reg[6] 
       (.C(memclk),
        .CE(\aRowbufBEgrstr[8]_i_1_n_0 ),
        .CLR(AR),
        .D(\aRowbufBEgrstr[6]_i_1_n_0 ),
        .Q(aRowbufBEgrstr[6]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBEgrstr_reg[7] 
       (.C(memclk),
        .CE(\aRowbufBEgrstr[8]_i_1_n_0 ),
        .CLR(AR),
        .D(\aRowbufBEgrstr[7]_i_1_n_0 ),
        .Q(aRowbufBEgrstr[7]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBEgrstr_reg[8] 
       (.C(memclk),
        .CE(\aRowbufBEgrstr[8]_i_1_n_0 ),
        .CLR(AR),
        .D(\aRowbufBEgrstr[8]_i_2_n_0 ),
        .Q(aRowbufBEgrstr[8]));
  (* SOFT_HLUTNM = "soft_lutpair1749" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \aRowbufBIgrstr[0]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(\aRowbufBIgrstr_reg_n_0_[0] ),
        .O(aRowbufBIgrstr[0]));
  (* SOFT_HLUTNM = "soft_lutpair1829" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[10]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[10]),
        .O(aRowbufBIgrstr[10]));
  (* SOFT_HLUTNM = "soft_lutpair1830" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[11]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[11]),
        .O(aRowbufBIgrstr[11]));
  (* SOFT_HLUTNM = "soft_lutpair1830" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[12]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[12]),
        .O(aRowbufBIgrstr[12]));
  (* SOFT_HLUTNM = "soft_lutpair1831" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[13]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[13]),
        .O(aRowbufBIgrstr[13]));
  (* SOFT_HLUTNM = "soft_lutpair1831" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[14]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[14]),
        .O(aRowbufBIgrstr[14]));
  (* SOFT_HLUTNM = "soft_lutpair1832" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[15]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[15]),
        .O(aRowbufBIgrstr[15]));
  (* SOFT_HLUTNM = "soft_lutpair1832" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[16]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[16]),
        .O(aRowbufBIgrstr[16]));
  (* SOFT_HLUTNM = "soft_lutpair1833" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[17]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[17]),
        .O(aRowbufBIgrstr[17]));
  (* SOFT_HLUTNM = "soft_lutpair1833" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[18]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[18]),
        .O(aRowbufBIgrstr[18]));
  (* SOFT_HLUTNM = "soft_lutpair1834" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[19]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[19]),
        .O(aRowbufBIgrstr[19]));
  (* SOFT_HLUTNM = "soft_lutpair1825" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[1]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[1]),
        .O(aRowbufBIgrstr[1]));
  (* SOFT_HLUTNM = "soft_lutpair1834" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[20]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[20]),
        .O(aRowbufBIgrstr[20]));
  (* SOFT_HLUTNM = "soft_lutpair1835" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[21]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[21]),
        .O(aRowbufBIgrstr[21]));
  (* SOFT_HLUTNM = "soft_lutpair1835" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[22]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[22]),
        .O(aRowbufBIgrstr[22]));
  (* SOFT_HLUTNM = "soft_lutpair1836" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[23]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[23]),
        .O(aRowbufBIgrstr[23]));
  (* SOFT_HLUTNM = "soft_lutpair1836" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[24]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[24]),
        .O(aRowbufBIgrstr[24]));
  (* SOFT_HLUTNM = "soft_lutpair1837" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[25]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[25]),
        .O(aRowbufBIgrstr[25]));
  (* SOFT_HLUTNM = "soft_lutpair1837" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[26]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[26]),
        .O(aRowbufBIgrstr[26]));
  (* SOFT_HLUTNM = "soft_lutpair1838" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[27]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[27]),
        .O(aRowbufBIgrstr[27]));
  (* SOFT_HLUTNM = "soft_lutpair1838" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[28]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[28]),
        .O(aRowbufBIgrstr[28]));
  (* SOFT_HLUTNM = "soft_lutpair1839" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[29]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[29]),
        .O(aRowbufBIgrstr[29]));
  (* SOFT_HLUTNM = "soft_lutpair1825" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[2]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[2]),
        .O(aRowbufBIgrstr[2]));
  LUT6 #(
    .INIT(64'hB000B000B000FFFF)) 
    \aRowbufBIgrstr[30]_i_1 
       (.I0(\FSM_sequential_stateIgrstr[0]_i_2_n_0 ),
        .I1(hdrmemAXI_rlast),
        .I2(\burstIgrstr_reg[0]_0 ),
        .I3(\FSM_sequential_stateIgrstr[0]_i_4_n_0 ),
        .I4(stateIgrstr),
        .I5(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .O(\aRowbufBIgrstr[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1839" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[30]_i_2 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[30]),
        .O(aRowbufBIgrstr[30]));
  (* SOFT_HLUTNM = "soft_lutpair1826" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[3]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[3]),
        .O(aRowbufBIgrstr[3]));
  (* SOFT_HLUTNM = "soft_lutpair1826" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[4]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[4]),
        .O(aRowbufBIgrstr[4]));
  (* SOFT_HLUTNM = "soft_lutpair1827" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[5]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[5]),
        .O(aRowbufBIgrstr[5]));
  (* SOFT_HLUTNM = "soft_lutpair1827" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[6]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[6]),
        .O(aRowbufBIgrstr[6]));
  (* SOFT_HLUTNM = "soft_lutpair1828" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[7]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[7]),
        .O(aRowbufBIgrstr[7]));
  (* SOFT_HLUTNM = "soft_lutpair1828" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[8]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[8]),
        .O(aRowbufBIgrstr[8]));
  (* SOFT_HLUTNM = "soft_lutpair1829" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \aRowbufBIgrstr[9]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(in8[9]),
        .O(aRowbufBIgrstr[9]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[0] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[0]),
        .Q(\aRowbufBIgrstr_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[10] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[10]),
        .Q(\aRowbufBIgrstr_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[11] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[11]),
        .Q(\aRowbufBIgrstr_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[12] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[12]),
        .Q(\aRowbufBIgrstr_reg_n_0_[12] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[13] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[13]),
        .Q(\aRowbufBIgrstr_reg_n_0_[13] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[14] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[14]),
        .Q(\aRowbufBIgrstr_reg_n_0_[14] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[15] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[15]),
        .Q(\aRowbufBIgrstr_reg_n_0_[15] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[16] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[16]),
        .Q(\aRowbufBIgrstr_reg_n_0_[16] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \aRowbufBIgrstr_reg[16]_i_2 
       (.CI(\aRowbufBIgrstr_reg[8]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\aRowbufBIgrstr_reg[16]_i_2_n_0 ,\aRowbufBIgrstr_reg[16]_i_2_n_1 ,\aRowbufBIgrstr_reg[16]_i_2_n_2 ,\aRowbufBIgrstr_reg[16]_i_2_n_3 ,\aRowbufBIgrstr_reg[16]_i_2_n_4 ,\aRowbufBIgrstr_reg[16]_i_2_n_5 ,\aRowbufBIgrstr_reg[16]_i_2_n_6 ,\aRowbufBIgrstr_reg[16]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in8[16:9]),
        .S({\aRowbufBIgrstr_reg_n_0_[16] ,\aRowbufBIgrstr_reg_n_0_[15] ,\aRowbufBIgrstr_reg_n_0_[14] ,\aRowbufBIgrstr_reg_n_0_[13] ,\aRowbufBIgrstr_reg_n_0_[12] ,\aRowbufBIgrstr_reg_n_0_[11] ,\aRowbufBIgrstr_reg_n_0_[10] ,\aRowbufBIgrstr_reg_n_0_[9] }));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[17] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[17]),
        .Q(\aRowbufBIgrstr_reg_n_0_[17] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[18] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[18]),
        .Q(\aRowbufBIgrstr_reg_n_0_[18] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[19] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[19]),
        .Q(\aRowbufBIgrstr_reg_n_0_[19] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[1] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[1]),
        .Q(\aRowbufBIgrstr_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[20] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[20]),
        .Q(\aRowbufBIgrstr_reg_n_0_[20] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[21] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[21]),
        .Q(\aRowbufBIgrstr_reg_n_0_[21] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[22] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[22]),
        .Q(\aRowbufBIgrstr_reg_n_0_[22] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[23] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[23]),
        .Q(\aRowbufBIgrstr_reg_n_0_[23] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[24] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[24]),
        .Q(\aRowbufBIgrstr_reg_n_0_[24] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \aRowbufBIgrstr_reg[24]_i_2 
       (.CI(\aRowbufBIgrstr_reg[16]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\aRowbufBIgrstr_reg[24]_i_2_n_0 ,\aRowbufBIgrstr_reg[24]_i_2_n_1 ,\aRowbufBIgrstr_reg[24]_i_2_n_2 ,\aRowbufBIgrstr_reg[24]_i_2_n_3 ,\aRowbufBIgrstr_reg[24]_i_2_n_4 ,\aRowbufBIgrstr_reg[24]_i_2_n_5 ,\aRowbufBIgrstr_reg[24]_i_2_n_6 ,\aRowbufBIgrstr_reg[24]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in8[24:17]),
        .S({\aRowbufBIgrstr_reg_n_0_[24] ,\aRowbufBIgrstr_reg_n_0_[23] ,\aRowbufBIgrstr_reg_n_0_[22] ,\aRowbufBIgrstr_reg_n_0_[21] ,\aRowbufBIgrstr_reg_n_0_[20] ,\aRowbufBIgrstr_reg_n_0_[19] ,\aRowbufBIgrstr_reg_n_0_[18] ,\aRowbufBIgrstr_reg_n_0_[17] }));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[25] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[25]),
        .Q(\aRowbufBIgrstr_reg_n_0_[25] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[26] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[26]),
        .Q(\aRowbufBIgrstr_reg_n_0_[26] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[27] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[27]),
        .Q(\aRowbufBIgrstr_reg_n_0_[27] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[28] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[28]),
        .Q(\aRowbufBIgrstr_reg_n_0_[28] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[29] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[29]),
        .Q(\aRowbufBIgrstr_reg_n_0_[29] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[2] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[2]),
        .Q(\aRowbufBIgrstr_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[30] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[30]),
        .Q(\aRowbufBIgrstr_reg_n_0_[30] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \aRowbufBIgrstr_reg[30]_i_3 
       (.CI(\aRowbufBIgrstr_reg[24]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_aRowbufBIgrstr_reg[30]_i_3_CO_UNCONNECTED [7:5],\aRowbufBIgrstr_reg[30]_i_3_n_3 ,\aRowbufBIgrstr_reg[30]_i_3_n_4 ,\aRowbufBIgrstr_reg[30]_i_3_n_5 ,\aRowbufBIgrstr_reg[30]_i_3_n_6 ,\aRowbufBIgrstr_reg[30]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_aRowbufBIgrstr_reg[30]_i_3_O_UNCONNECTED [7:6],in8[30:25]}),
        .S({1'b0,1'b0,\aRowbufBIgrstr_reg_n_0_[30] ,\aRowbufBIgrstr_reg_n_0_[29] ,\aRowbufBIgrstr_reg_n_0_[28] ,\aRowbufBIgrstr_reg_n_0_[27] ,\aRowbufBIgrstr_reg_n_0_[26] ,\aRowbufBIgrstr_reg_n_0_[25] }));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[3] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[3]),
        .Q(\aRowbufBIgrstr_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[4] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[4]),
        .Q(\aRowbufBIgrstr_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[5] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[5]),
        .Q(\aRowbufBIgrstr_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[6] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[6]),
        .Q(\aRowbufBIgrstr_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[7] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[7]),
        .Q(\aRowbufBIgrstr_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[8] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[8]),
        .Q(\aRowbufBIgrstr_reg_n_0_[8] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \aRowbufBIgrstr_reg[8]_i_2 
       (.CI(\aRowbufBIgrstr_reg_n_0_[0] ),
        .CI_TOP(1'b0),
        .CO({\aRowbufBIgrstr_reg[8]_i_2_n_0 ,\aRowbufBIgrstr_reg[8]_i_2_n_1 ,\aRowbufBIgrstr_reg[8]_i_2_n_2 ,\aRowbufBIgrstr_reg[8]_i_2_n_3 ,\aRowbufBIgrstr_reg[8]_i_2_n_4 ,\aRowbufBIgrstr_reg[8]_i_2_n_5 ,\aRowbufBIgrstr_reg[8]_i_2_n_6 ,\aRowbufBIgrstr_reg[8]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in8[8:1]),
        .S({\aRowbufBIgrstr_reg_n_0_[8] ,\aRowbufBIgrstr_reg_n_0_[7] ,\aRowbufBIgrstr_reg_n_0_[6] ,\aRowbufBIgrstr_reg_n_0_[5] ,\aRowbufBIgrstr_reg_n_0_[4] ,\aRowbufBIgrstr_reg_n_0_[3] ,\aRowbufBIgrstr_reg_n_0_[2] ,\aRowbufBIgrstr_reg_n_0_[1] }));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufBIgrstr_reg[9] 
       (.C(memclk),
        .CE(\aRowbufBIgrstr[30]_i_1_n_0 ),
        .CLR(AR),
        .D(aRowbufBIgrstr[9]),
        .Q(\aRowbufBIgrstr_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1729" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \aRowbufStockrls[0]_i_1 
       (.I0(rng_reg_0),
        .I1(stateStockrls[0]),
        .I2(stateStockrls[1]),
        .I3(aRowbufStockrls[0]),
        .O(\aRowbufStockrls[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h05FFDDFF)) 
    \aRowbufStockrls[10]_i_1 
       (.I0(stateStockrls[0]),
        .I1(rgbVideoinToManyAXIS_tvalid),
        .I2(\stateStream_reg[1]_0 ),
        .I3(rng_reg_0),
        .I4(stateStockrls[1]),
        .O(\aRowbufStockrls[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1728" *) 
  LUT5 #(
    .INIT(32'h00404000)) 
    \aRowbufStockrls[10]_i_2 
       (.I0(stateStockrls[1]),
        .I1(stateStockrls[0]),
        .I2(rng_reg_0),
        .I3(aRowbufStockrls[10]),
        .I4(\aRowbufStockrls[10]_i_3_n_0 ),
        .O(\aRowbufStockrls[10]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aRowbufStockrls[10]_i_3 
       (.I0(aRowbufStockrls[8]),
        .I1(aRowbufStockrls[6]),
        .I2(\aRowbufStockrls[9]_i_3_n_0 ),
        .I3(aRowbufStockrls[7]),
        .I4(aRowbufStockrls[9]),
        .O(\aRowbufStockrls[10]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1729" *) 
  LUT5 #(
    .INIT(32'h00080800)) 
    \aRowbufStockrls[1]_i_1 
       (.I0(rng_reg_0),
        .I1(stateStockrls[0]),
        .I2(stateStockrls[1]),
        .I3(aRowbufStockrls[1]),
        .I4(aRowbufStockrls[0]),
        .O(\aRowbufStockrls[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0040404040000000)) 
    \aRowbufStockrls[2]_i_1 
       (.I0(stateStockrls[1]),
        .I1(stateStockrls[0]),
        .I2(rng_reg_0),
        .I3(aRowbufStockrls[0]),
        .I4(aRowbufStockrls[1]),
        .I5(aRowbufStockrls[2]),
        .O(\aRowbufStockrls[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h28888888)) 
    \aRowbufStockrls[3]_i_1 
       (.I0(\aRowbufStockrls[9]_i_2_n_0 ),
        .I1(aRowbufStockrls[3]),
        .I2(aRowbufStockrls[2]),
        .I3(aRowbufStockrls[1]),
        .I4(aRowbufStockrls[0]),
        .O(\aRowbufStockrls[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \aRowbufStockrls[4]_i_1 
       (.I0(\aRowbufStockrls[9]_i_2_n_0 ),
        .I1(aRowbufStockrls[4]),
        .I2(aRowbufStockrls[0]),
        .I3(aRowbufStockrls[1]),
        .I4(aRowbufStockrls[2]),
        .I5(aRowbufStockrls[3]),
        .O(\aRowbufStockrls[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00404000)) 
    \aRowbufStockrls[5]_i_1 
       (.I0(stateStockrls[1]),
        .I1(stateStockrls[0]),
        .I2(rng_reg_0),
        .I3(aRowbufStockrls[5]),
        .I4(\aRowbufStockrls[5]_i_2_n_0 ),
        .O(\aRowbufStockrls[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aRowbufStockrls[5]_i_2 
       (.I0(aRowbufStockrls[3]),
        .I1(aRowbufStockrls[2]),
        .I2(aRowbufStockrls[1]),
        .I3(aRowbufStockrls[0]),
        .I4(aRowbufStockrls[4]),
        .O(\aRowbufStockrls[5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h00404000)) 
    \aRowbufStockrls[6]_i_1 
       (.I0(stateStockrls[1]),
        .I1(stateStockrls[0]),
        .I2(rng_reg_0),
        .I3(aRowbufStockrls[6]),
        .I4(\aRowbufStockrls[9]_i_3_n_0 ),
        .O(\aRowbufStockrls[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0040400040004000)) 
    \aRowbufStockrls[7]_i_1 
       (.I0(stateStockrls[1]),
        .I1(stateStockrls[0]),
        .I2(rng_reg_0),
        .I3(aRowbufStockrls[7]),
        .I4(\aRowbufStockrls[9]_i_3_n_0 ),
        .I5(aRowbufStockrls[6]),
        .O(\aRowbufStockrls[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h28888888)) 
    \aRowbufStockrls[8]_i_1 
       (.I0(\aRowbufStockrls[9]_i_2_n_0 ),
        .I1(aRowbufStockrls[8]),
        .I2(aRowbufStockrls[6]),
        .I3(\aRowbufStockrls[9]_i_3_n_0 ),
        .I4(aRowbufStockrls[7]),
        .O(\aRowbufStockrls[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \aRowbufStockrls[9]_i_1 
       (.I0(\aRowbufStockrls[9]_i_2_n_0 ),
        .I1(aRowbufStockrls[9]),
        .I2(aRowbufStockrls[7]),
        .I3(\aRowbufStockrls[9]_i_3_n_0 ),
        .I4(aRowbufStockrls[6]),
        .I5(aRowbufStockrls[8]),
        .O(\aRowbufStockrls[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1728" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \aRowbufStockrls[9]_i_2 
       (.I0(stateStockrls[1]),
        .I1(stateStockrls[0]),
        .I2(rng_reg_0),
        .O(\aRowbufStockrls[9]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aRowbufStockrls[9]_i_3 
       (.I0(aRowbufStockrls[4]),
        .I1(aRowbufStockrls[0]),
        .I2(aRowbufStockrls[1]),
        .I3(aRowbufStockrls[2]),
        .I4(aRowbufStockrls[3]),
        .I5(aRowbufStockrls[5]),
        .O(\aRowbufStockrls[9]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStockrls_reg[0] 
       (.C(aclk_sig),
        .CE(\aRowbufStockrls[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStockrls[0]_i_1_n_0 ),
        .Q(aRowbufStockrls[0]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStockrls_reg[10] 
       (.C(aclk_sig),
        .CE(\aRowbufStockrls[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStockrls[10]_i_2_n_0 ),
        .Q(aRowbufStockrls[10]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStockrls_reg[1] 
       (.C(aclk_sig),
        .CE(\aRowbufStockrls[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStockrls[1]_i_1_n_0 ),
        .Q(aRowbufStockrls[1]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStockrls_reg[2] 
       (.C(aclk_sig),
        .CE(\aRowbufStockrls[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStockrls[2]_i_1_n_0 ),
        .Q(aRowbufStockrls[2]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStockrls_reg[3] 
       (.C(aclk_sig),
        .CE(\aRowbufStockrls[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStockrls[3]_i_1_n_0 ),
        .Q(aRowbufStockrls[3]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStockrls_reg[4] 
       (.C(aclk_sig),
        .CE(\aRowbufStockrls[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStockrls[4]_i_1_n_0 ),
        .Q(aRowbufStockrls[4]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStockrls_reg[5] 
       (.C(aclk_sig),
        .CE(\aRowbufStockrls[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStockrls[5]_i_1_n_0 ),
        .Q(aRowbufStockrls[5]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStockrls_reg[6] 
       (.C(aclk_sig),
        .CE(\aRowbufStockrls[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStockrls[6]_i_1_n_0 ),
        .Q(aRowbufStockrls[6]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStockrls_reg[7] 
       (.C(aclk_sig),
        .CE(\aRowbufStockrls[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStockrls[7]_i_1_n_0 ),
        .Q(aRowbufStockrls[7]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStockrls_reg[8] 
       (.C(aclk_sig),
        .CE(\aRowbufStockrls[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStockrls[8]_i_1_n_0 ),
        .Q(aRowbufStockrls[8]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStockrls_reg[9] 
       (.C(aclk_sig),
        .CE(\aRowbufStockrls[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStockrls[9]_i_1_n_0 ),
        .Q(aRowbufStockrls[9]));
  (* SOFT_HLUTNM = "soft_lutpair1720" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    \aRowbufStream[0]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(rng_reg_0),
        .I3(aRowbufStream__0[0]),
        .O(\aRowbufStream[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAA8AAAAAAAA)) 
    \aRowbufStream[10]_i_1 
       (.I0(\col_lcl[10]_i_1_n_0 ),
        .I1(col_lcl[3]),
        .I2(col_lcl[10]),
        .I3(col_lcl[5]),
        .I4(\aRowbufStream[10]_i_3_n_0 ),
        .I5(\aRowbufStream[10]_i_4_n_0 ),
        .O(\aRowbufStream[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1719" *) 
  LUT5 #(
    .INIT(32'h00080800)) 
    \aRowbufStream[10]_i_2 
       (.I0(rng_reg_0),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(aRowbufStream__0[10]),
        .I4(\aRowbufStream[10]_i_5_n_0 ),
        .O(\aRowbufStream[10]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \aRowbufStream[10]_i_3 
       (.I0(col_lcl[8]),
        .I1(col_lcl[9]),
        .I2(col_lcl[4]),
        .I3(col_lcl[7]),
        .I4(\aRowbufStream[10]_i_6_n_0 ),
        .O(\aRowbufStream[10]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1721" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \aRowbufStream[10]_i_4 
       (.I0(rng_reg_0),
        .I1(Q[0]),
        .I2(Q[1]),
        .O(\aRowbufStream[10]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aRowbufStream[10]_i_5 
       (.I0(aRowbufStream__0[8]),
        .I1(aRowbufStream__0[6]),
        .I2(\aRowbufStream[9]_i_2_n_0 ),
        .I3(aRowbufStream__0[7]),
        .I4(aRowbufStream__0[9]),
        .O(\aRowbufStream[10]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1792" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \aRowbufStream[10]_i_6 
       (.I0(col_lcl[1]),
        .I1(col_lcl[0]),
        .I2(col_lcl[6]),
        .I3(col_lcl[2]),
        .O(\aRowbufStream[10]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1720" *) 
  LUT5 #(
    .INIT(32'h00404000)) 
    \aRowbufStream[1]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(rng_reg_0),
        .I3(aRowbufStream__0[1]),
        .I4(aRowbufStream__0[0]),
        .O(\aRowbufStream[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0008080808000000)) 
    \aRowbufStream[2]_i_1 
       (.I0(rng_reg_0),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(aRowbufStream__0[0]),
        .I4(aRowbufStream__0[1]),
        .I5(aRowbufStream__0[2]),
        .O(\aRowbufStream[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h28888888)) 
    \aRowbufStream[3]_i_1 
       (.I0(\col_lcl[9]_i_3_n_0 ),
        .I1(aRowbufStream__0[3]),
        .I2(aRowbufStream__0[2]),
        .I3(aRowbufStream__0[1]),
        .I4(aRowbufStream__0[0]),
        .O(\aRowbufStream[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \aRowbufStream[4]_i_1 
       (.I0(\col_lcl[9]_i_3_n_0 ),
        .I1(aRowbufStream__0[4]),
        .I2(aRowbufStream__0[0]),
        .I3(aRowbufStream__0[1]),
        .I4(aRowbufStream__0[2]),
        .I5(aRowbufStream__0[3]),
        .O(\aRowbufStream[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1721" *) 
  LUT5 #(
    .INIT(32'h00080800)) 
    \aRowbufStream[5]_i_1 
       (.I0(rng_reg_0),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(aRowbufStream__0[5]),
        .I4(\aRowbufStream[5]_i_2_n_0 ),
        .O(\aRowbufStream[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aRowbufStream[5]_i_2 
       (.I0(aRowbufStream__0[3]),
        .I1(aRowbufStream__0[2]),
        .I2(aRowbufStream__0[1]),
        .I3(aRowbufStream__0[0]),
        .I4(aRowbufStream__0[4]),
        .O(\aRowbufStream[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1722" *) 
  LUT5 #(
    .INIT(32'h00080800)) 
    \aRowbufStream[6]_i_1 
       (.I0(rng_reg_0),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(aRowbufStream__0[6]),
        .I4(\aRowbufStream[9]_i_2_n_0 ),
        .O(\aRowbufStream[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0008080008000800)) 
    \aRowbufStream[7]_i_1 
       (.I0(rng_reg_0),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(aRowbufStream__0[7]),
        .I4(\aRowbufStream[9]_i_2_n_0 ),
        .I5(aRowbufStream__0[6]),
        .O(\aRowbufStream[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h28888888)) 
    \aRowbufStream[8]_i_1 
       (.I0(\col_lcl[9]_i_3_n_0 ),
        .I1(aRowbufStream__0[8]),
        .I2(aRowbufStream__0[6]),
        .I3(\aRowbufStream[9]_i_2_n_0 ),
        .I4(aRowbufStream__0[7]),
        .O(\aRowbufStream[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \aRowbufStream[9]_i_1 
       (.I0(\col_lcl[9]_i_3_n_0 ),
        .I1(aRowbufStream__0[9]),
        .I2(aRowbufStream__0[7]),
        .I3(\aRowbufStream[9]_i_2_n_0 ),
        .I4(aRowbufStream__0[6]),
        .I5(aRowbufStream__0[8]),
        .O(\aRowbufStream[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aRowbufStream[9]_i_2 
       (.I0(aRowbufStream__0[4]),
        .I1(aRowbufStream__0[0]),
        .I2(aRowbufStream__0[1]),
        .I3(aRowbufStream__0[2]),
        .I4(aRowbufStream__0[3]),
        .I5(aRowbufStream__0[5]),
        .O(\aRowbufStream[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStream_reg[0] 
       (.C(aclk_sig),
        .CE(\aRowbufStream[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStream[0]_i_1_n_0 ),
        .Q(aRowbufStream__0[0]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStream_reg[10] 
       (.C(aclk_sig),
        .CE(\aRowbufStream[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStream[10]_i_2_n_0 ),
        .Q(aRowbufStream__0[10]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStream_reg[1] 
       (.C(aclk_sig),
        .CE(\aRowbufStream[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStream[1]_i_1_n_0 ),
        .Q(aRowbufStream__0[1]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStream_reg[2] 
       (.C(aclk_sig),
        .CE(\aRowbufStream[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStream[2]_i_1_n_0 ),
        .Q(aRowbufStream__0[2]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStream_reg[3] 
       (.C(aclk_sig),
        .CE(\aRowbufStream[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStream[3]_i_1_n_0 ),
        .Q(aRowbufStream__0[3]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStream_reg[4] 
       (.C(aclk_sig),
        .CE(\aRowbufStream[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStream[4]_i_1_n_0 ),
        .Q(aRowbufStream__0[4]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStream_reg[5] 
       (.C(aclk_sig),
        .CE(\aRowbufStream[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStream[5]_i_1_n_0 ),
        .Q(aRowbufStream__0[5]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStream_reg[6] 
       (.C(aclk_sig),
        .CE(\aRowbufStream[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStream[6]_i_1_n_0 ),
        .Q(aRowbufStream__0[6]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStream_reg[7] 
       (.C(aclk_sig),
        .CE(\aRowbufStream[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStream[7]_i_1_n_0 ),
        .Q(aRowbufStream__0[7]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStream_reg[8] 
       (.C(aclk_sig),
        .CE(\aRowbufStream[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStream[8]_i_1_n_0 ),
        .Q(aRowbufStream__0[8]));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufStream_reg[9] 
       (.C(aclk_sig),
        .CE(\aRowbufStream[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\aRowbufStream[9]_i_1_n_0 ),
        .Q(aRowbufStream__0[9]));
  FDCE ackInvAssign_sig_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(ackInvAssign_sig),
        .Q(ackInvHdrengAssign));
  FDCE ackInvSet_sig_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(ackInvSet_sig_reg_0),
        .Q(ackInvHdrengSet));
  (* SOFT_HLUTNM = "soft_lutpair1733" *) 
  LUT5 #(
    .INIT(32'h0000FEFF)) 
    \addrEgr[0]_i_1 
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(wrAAXI_awaddr[5]),
        .O(p_0_in__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair1797" *) 
  LUT4 #(
    .INIT(16'h6F60)) 
    \addrEgr[10]_i_1 
       (.I0(\addrEgr[10]_i_2_n_0 ),
        .I1(wrAAXI_awaddr[15]),
        .I2(\row_lcl[10]_i_4_n_0 ),
        .I3(data[10]),
        .O(p_0_in__0[10]));
  (* SOFT_HLUTNM = "soft_lutpair1739" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \addrEgr[10]_i_2 
       (.I0(wrAAXI_awaddr[13]),
        .I1(wrAAXI_awaddr[11]),
        .I2(\addrEgr[8]_i_2_n_0 ),
        .I3(wrAAXI_awaddr[12]),
        .I4(wrAAXI_awaddr[14]),
        .O(\addrEgr[10]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1798" *) 
  LUT4 #(
    .INIT(16'h6F60)) 
    \addrEgr[11]_i_1 
       (.I0(\addrEgr[14]_i_4_n_0 ),
        .I1(wrAAXI_awaddr[16]),
        .I2(\row_lcl[10]_i_4_n_0 ),
        .I3(data[11]),
        .O(p_0_in__0[11]));
  LUT5 #(
    .INIT(32'h78FF7800)) 
    \addrEgr[12]_i_1 
       (.I0(wrAAXI_awaddr[16]),
        .I1(\addrEgr[14]_i_4_n_0 ),
        .I2(wrAAXI_awaddr[17]),
        .I3(\row_lcl[10]_i_4_n_0 ),
        .I4(data[12]),
        .O(p_0_in__0[12]));
  LUT5 #(
    .INIT(32'h28888888)) 
    \addrEgr[13]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(wrAAXI_awaddr[18]),
        .I2(wrAAXI_awaddr[17]),
        .I3(wrAAXI_awaddr[16]),
        .I4(\addrEgr[14]_i_4_n_0 ),
        .O(p_0_in__0[13]));
  LUT5 #(
    .INIT(32'hFFFF0040)) 
    \addrEgr[14]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(rng_memclk),
        .I2(\i_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[0] ),
        .I4(\addrEgr[14]_i_3_n_0 ),
        .O(addrEgr));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \addrEgr[14]_i_2 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(wrAAXI_awaddr[19]),
        .I2(wrAAXI_awaddr[16]),
        .I3(wrAAXI_awaddr[17]),
        .I4(wrAAXI_awaddr[18]),
        .I5(\addrEgr[14]_i_4_n_0 ),
        .O(p_0_in__0[14]));
  LUT6 #(
    .INIT(64'h0001000000000000)) 
    \addrEgr[14]_i_3 
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I5(\stateSwap[1]_i_3_n_0 ),
        .O(\addrEgr[14]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \addrEgr[14]_i_4 
       (.I0(wrAAXI_awaddr[14]),
        .I1(wrAAXI_awaddr[12]),
        .I2(\addrEgr[8]_i_2_n_0 ),
        .I3(wrAAXI_awaddr[11]),
        .I4(wrAAXI_awaddr[13]),
        .I5(wrAAXI_awaddr[15]),
        .O(\addrEgr[14]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000FEFFFEFF0000)) 
    \addrEgr[1]_i_1 
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(wrAAXI_awaddr[6]),
        .I5(wrAAXI_awaddr[5]),
        .O(p_0_in__0[1]));
  (* SOFT_HLUTNM = "soft_lutpair1734" *) 
  LUT4 #(
    .INIT(16'h2888)) 
    \addrEgr[2]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(wrAAXI_awaddr[7]),
        .I2(wrAAXI_awaddr[5]),
        .I3(wrAAXI_awaddr[6]),
        .O(p_0_in__0[2]));
  (* SOFT_HLUTNM = "soft_lutpair1734" *) 
  LUT5 #(
    .INIT(32'h28888888)) 
    \addrEgr[3]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(wrAAXI_awaddr[8]),
        .I2(wrAAXI_awaddr[6]),
        .I3(wrAAXI_awaddr[5]),
        .I4(wrAAXI_awaddr[7]),
        .O(p_0_in__0[3]));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \addrEgr[4]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(wrAAXI_awaddr[9]),
        .I2(wrAAXI_awaddr[7]),
        .I3(wrAAXI_awaddr[5]),
        .I4(wrAAXI_awaddr[6]),
        .I5(wrAAXI_awaddr[8]),
        .O(p_0_in__0[4]));
  LUT6 #(
    .INIT(64'h0000FEFFFEFF0000)) 
    \addrEgr[5]_i_1 
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(wrAAXI_awaddr[10]),
        .I5(\addrEgr[5]_i_2_n_0 ),
        .O(p_0_in__0[5]));
  LUT5 #(
    .INIT(32'h80000000)) 
    \addrEgr[5]_i_2 
       (.I0(wrAAXI_awaddr[8]),
        .I1(wrAAXI_awaddr[6]),
        .I2(wrAAXI_awaddr[5]),
        .I3(wrAAXI_awaddr[7]),
        .I4(wrAAXI_awaddr[9]),
        .O(\addrEgr[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000FEFFFEFF0000)) 
    \addrEgr[6]_i_1 
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(wrAAXI_awaddr[11]),
        .I5(\addrEgr[8]_i_2_n_0 ),
        .O(p_0_in__0[6]));
  (* SOFT_HLUTNM = "soft_lutpair1795" *) 
  LUT4 #(
    .INIT(16'h2888)) 
    \addrEgr[7]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(wrAAXI_awaddr[12]),
        .I2(\addrEgr[8]_i_2_n_0 ),
        .I3(wrAAXI_awaddr[11]),
        .O(p_0_in__0[7]));
  LUT6 #(
    .INIT(64'h7F80FFFF7F800000)) 
    \addrEgr[8]_i_1 
       (.I0(wrAAXI_awaddr[12]),
        .I1(\addrEgr[8]_i_2_n_0 ),
        .I2(wrAAXI_awaddr[11]),
        .I3(wrAAXI_awaddr[13]),
        .I4(\row_lcl[10]_i_4_n_0 ),
        .I5(data[8]),
        .O(p_0_in__0[8]));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \addrEgr[8]_i_2 
       (.I0(wrAAXI_awaddr[9]),
        .I1(wrAAXI_awaddr[7]),
        .I2(wrAAXI_awaddr[5]),
        .I3(wrAAXI_awaddr[6]),
        .I4(wrAAXI_awaddr[8]),
        .I5(wrAAXI_awaddr[10]),
        .O(\addrEgr[8]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1796" *) 
  LUT4 #(
    .INIT(16'h6F60)) 
    \addrEgr[9]_i_1 
       (.I0(\addrEgr[9]_i_2_n_0 ),
        .I1(wrAAXI_awaddr[14]),
        .I2(\row_lcl[10]_i_4_n_0 ),
        .I3(data[9]),
        .O(p_0_in__0[9]));
  (* SOFT_HLUTNM = "soft_lutpair1739" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \addrEgr[9]_i_2 
       (.I0(wrAAXI_awaddr[12]),
        .I1(\addrEgr[8]_i_2_n_0 ),
        .I2(wrAAXI_awaddr[11]),
        .I3(wrAAXI_awaddr[13]),
        .O(\addrEgr[9]_i_2_n_0 ));
  FDCE \addrEgr_reg[0] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[0]),
        .Q(wrAAXI_awaddr[5]));
  FDCE \addrEgr_reg[10] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[10]),
        .Q(wrAAXI_awaddr[15]));
  FDCE \addrEgr_reg[11] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[11]),
        .Q(wrAAXI_awaddr[16]));
  FDCE \addrEgr_reg[12] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[12]),
        .Q(wrAAXI_awaddr[17]));
  FDCE \addrEgr_reg[13] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[13]),
        .Q(wrAAXI_awaddr[18]));
  FDCE \addrEgr_reg[14] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[14]),
        .Q(wrAAXI_awaddr[19]));
  FDCE \addrEgr_reg[1] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[1]),
        .Q(wrAAXI_awaddr[6]));
  FDCE \addrEgr_reg[2] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[2]),
        .Q(wrAAXI_awaddr[7]));
  FDCE \addrEgr_reg[3] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[3]),
        .Q(wrAAXI_awaddr[8]));
  FDCE \addrEgr_reg[4] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[4]),
        .Q(wrAAXI_awaddr[9]));
  FDCE \addrEgr_reg[5] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[5]),
        .Q(wrAAXI_awaddr[10]));
  FDCE \addrEgr_reg[6] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[6]),
        .Q(wrAAXI_awaddr[11]));
  FDCE \addrEgr_reg[7] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[7]),
        .Q(wrAAXI_awaddr[12]));
  FDCE \addrEgr_reg[8] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[8]),
        .Q(wrAAXI_awaddr[13]));
  FDCE \addrEgr_reg[9] 
       (.C(memclk),
        .CE(addrEgr),
        .CLR(AR),
        .D(p_0_in__0[9]),
        .Q(wrAAXI_awaddr[14]));
  (* SOFT_HLUTNM = "soft_lutpair1731" *) 
  LUT5 #(
    .INIT(32'h0000FEFF)) 
    \addrIgr[0]_i_1 
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(rdAAXI_araddr[5]),
        .O(p_0_in__0__0[0]));
  LUT4 #(
    .INIT(16'h6F60)) 
    \addrIgr[10]_i_1 
       (.I0(\addrIgr[10]_i_2_n_0 ),
        .I1(rdAAXI_araddr[15]),
        .I2(\row_lcl[10]_i_4_n_0 ),
        .I3(data[10]),
        .O(p_0_in__0__0[10]));
  (* SOFT_HLUTNM = "soft_lutpair1740" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \addrIgr[10]_i_2 
       (.I0(rdAAXI_araddr[13]),
        .I1(rdAAXI_araddr[11]),
        .I2(\addrIgr[8]_i_2_n_0 ),
        .I3(rdAAXI_araddr[12]),
        .I4(rdAAXI_araddr[14]),
        .O(\addrIgr[10]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h6F60)) 
    \addrIgr[11]_i_1 
       (.I0(\addrIgr[14]_i_3_n_0 ),
        .I1(rdAAXI_araddr[16]),
        .I2(\row_lcl[10]_i_4_n_0 ),
        .I3(data[11]),
        .O(p_0_in__0__0[11]));
  LUT5 #(
    .INIT(32'h78FF7800)) 
    \addrIgr[12]_i_1 
       (.I0(rdAAXI_araddr[16]),
        .I1(\addrIgr[14]_i_3_n_0 ),
        .I2(rdAAXI_araddr[17]),
        .I3(\row_lcl[10]_i_4_n_0 ),
        .I4(data[12]),
        .O(p_0_in__0__0[12]));
  LUT5 #(
    .INIT(32'h28888888)) 
    \addrIgr[13]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(rdAAXI_araddr[18]),
        .I2(rdAAXI_araddr[17]),
        .I3(rdAAXI_araddr[16]),
        .I4(\addrIgr[14]_i_3_n_0 ),
        .O(p_0_in__0__0[13]));
  LUT6 #(
    .INIT(64'hFF04000004040000)) 
    \addrIgr[14]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(\stateSwap_reg[3]_0 [3]),
        .I4(rng_memclk),
        .I5(\row_lcl[10]_i_5_n_0 ),
        .O(addrIgr));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \addrIgr[14]_i_2 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(rdAAXI_araddr[19]),
        .I2(rdAAXI_araddr[16]),
        .I3(rdAAXI_araddr[17]),
        .I4(rdAAXI_araddr[18]),
        .I5(\addrIgr[14]_i_3_n_0 ),
        .O(p_0_in__0__0[14]));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \addrIgr[14]_i_3 
       (.I0(rdAAXI_araddr[14]),
        .I1(rdAAXI_araddr[12]),
        .I2(\addrIgr[8]_i_2_n_0 ),
        .I3(rdAAXI_araddr[11]),
        .I4(rdAAXI_araddr[13]),
        .I5(rdAAXI_araddr[15]),
        .O(\addrIgr[14]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000FEFFFEFF0000)) 
    \addrIgr[1]_i_1 
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(rdAAXI_araddr[6]),
        .I5(rdAAXI_araddr[5]),
        .O(p_0_in__0__0[1]));
  (* SOFT_HLUTNM = "soft_lutpair1732" *) 
  LUT4 #(
    .INIT(16'h2888)) 
    \addrIgr[2]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(rdAAXI_araddr[7]),
        .I2(rdAAXI_araddr[5]),
        .I3(rdAAXI_araddr[6]),
        .O(p_0_in__0__0[2]));
  (* SOFT_HLUTNM = "soft_lutpair1732" *) 
  LUT5 #(
    .INIT(32'h28888888)) 
    \addrIgr[3]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(rdAAXI_araddr[8]),
        .I2(rdAAXI_araddr[6]),
        .I3(rdAAXI_araddr[5]),
        .I4(rdAAXI_araddr[7]),
        .O(p_0_in__0__0[3]));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \addrIgr[4]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(rdAAXI_araddr[9]),
        .I2(rdAAXI_araddr[7]),
        .I3(rdAAXI_araddr[5]),
        .I4(rdAAXI_araddr[6]),
        .I5(rdAAXI_araddr[8]),
        .O(p_0_in__0__0[4]));
  LUT6 #(
    .INIT(64'h0000FEFFFEFF0000)) 
    \addrIgr[5]_i_1 
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(rdAAXI_araddr[10]),
        .I5(\addrIgr[5]_i_2_n_0 ),
        .O(p_0_in__0__0[5]));
  LUT5 #(
    .INIT(32'h80000000)) 
    \addrIgr[5]_i_2 
       (.I0(rdAAXI_araddr[8]),
        .I1(rdAAXI_araddr[6]),
        .I2(rdAAXI_araddr[5]),
        .I3(rdAAXI_araddr[7]),
        .I4(rdAAXI_araddr[9]),
        .O(\addrIgr[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000FEFFFEFF0000)) 
    \addrIgr[6]_i_1 
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(rdAAXI_araddr[11]),
        .I5(\addrIgr[8]_i_2_n_0 ),
        .O(p_0_in__0__0[6]));
  LUT4 #(
    .INIT(16'h2888)) 
    \addrIgr[7]_i_1 
       (.I0(\row_lcl[10]_i_4_n_0 ),
        .I1(rdAAXI_araddr[12]),
        .I2(\addrIgr[8]_i_2_n_0 ),
        .I3(rdAAXI_araddr[11]),
        .O(p_0_in__0__0[7]));
  LUT6 #(
    .INIT(64'h7F80FFFF7F800000)) 
    \addrIgr[8]_i_1 
       (.I0(rdAAXI_araddr[12]),
        .I1(\addrIgr[8]_i_2_n_0 ),
        .I2(rdAAXI_araddr[11]),
        .I3(rdAAXI_araddr[13]),
        .I4(\row_lcl[10]_i_4_n_0 ),
        .I5(data[8]),
        .O(p_0_in__0__0[8]));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \addrIgr[8]_i_2 
       (.I0(rdAAXI_araddr[9]),
        .I1(rdAAXI_araddr[7]),
        .I2(rdAAXI_araddr[5]),
        .I3(rdAAXI_araddr[6]),
        .I4(rdAAXI_araddr[8]),
        .I5(rdAAXI_araddr[10]),
        .O(\addrIgr[8]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h6F60)) 
    \addrIgr[9]_i_1 
       (.I0(\addrIgr[9]_i_2_n_0 ),
        .I1(rdAAXI_araddr[14]),
        .I2(\row_lcl[10]_i_4_n_0 ),
        .I3(data[9]),
        .O(p_0_in__0__0[9]));
  (* SOFT_HLUTNM = "soft_lutpair1740" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \addrIgr[9]_i_2 
       (.I0(rdAAXI_araddr[12]),
        .I1(\addrIgr[8]_i_2_n_0 ),
        .I2(rdAAXI_araddr[11]),
        .I3(rdAAXI_araddr[13]),
        .O(\addrIgr[9]_i_2_n_0 ));
  FDCE \addrIgr_reg[0] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[0]),
        .Q(rdAAXI_araddr[5]));
  FDCE \addrIgr_reg[10] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[10]),
        .Q(rdAAXI_araddr[15]));
  FDCE \addrIgr_reg[11] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[11]),
        .Q(rdAAXI_araddr[16]));
  FDCE \addrIgr_reg[12] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[12]),
        .Q(rdAAXI_araddr[17]));
  FDCE \addrIgr_reg[13] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[13]),
        .Q(rdAAXI_araddr[18]));
  FDCE \addrIgr_reg[14] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[14]),
        .Q(rdAAXI_araddr[19]));
  FDCE \addrIgr_reg[1] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[1]),
        .Q(rdAAXI_araddr[6]));
  FDCE \addrIgr_reg[2] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[2]),
        .Q(rdAAXI_araddr[7]));
  FDCE \addrIgr_reg[3] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[3]),
        .Q(rdAAXI_araddr[8]));
  FDCE \addrIgr_reg[4] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[4]),
        .Q(rdAAXI_araddr[9]));
  FDCE \addrIgr_reg[5] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[5]),
        .Q(rdAAXI_araddr[10]));
  FDCE \addrIgr_reg[6] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[6]),
        .Q(rdAAXI_araddr[11]));
  FDCE \addrIgr_reg[7] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[7]),
        .Q(rdAAXI_araddr[12]));
  FDCE \addrIgr_reg[8] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[8]),
        .Q(rdAAXI_araddr[13]));
  FDCE \addrIgr_reg[9] 
       (.C(memclk),
        .CE(addrIgr),
        .CLR(AR),
        .D(p_0_in__0__0[9]),
        .Q(rdAAXI_araddr[14]));
  (* SOFT_HLUTNM = "soft_lutpair1718" *) 
  LUT4 #(
    .INIT(16'h0002)) 
    awdone_i_2
       (.I0(\stateSwap_reg[3]_0 [2]),
        .I1(\stateSwap_reg[3]_0 [1]),
        .I2(\stateSwap_reg[3]_0 [3]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .O(wrAAXI_awvalid));
  LUT3 #(
    .INIT(8'h0E)) 
    \burstIgrstr[0]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(\burstIgrstr_reg_n_0_[0] ),
        .O(burstIgrstr[0]));
  (* SOFT_HLUTNM = "soft_lutpair1744" *) 
  LUT4 #(
    .INIT(16'h0EE0)) 
    \burstIgrstr[1]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(\burstIgrstr_reg_n_0_[1] ),
        .I3(\burstIgrstr_reg_n_0_[0] ),
        .O(burstIgrstr[1]));
  (* SOFT_HLUTNM = "soft_lutpair1744" *) 
  LUT5 #(
    .INIT(32'h0EE0E0E0)) 
    \burstIgrstr[2]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(\burstIgrstr_reg_n_0_[2] ),
        .I3(\burstIgrstr_reg_n_0_[0] ),
        .I4(\burstIgrstr_reg_n_0_[1] ),
        .O(burstIgrstr[2]));
  LUT6 #(
    .INIT(64'h0EE0E0E0E0E0E0E0)) 
    \burstIgrstr[3]_i_1 
       (.I0(stateIgrstr),
        .I1(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I2(\burstIgrstr_reg_n_0_[3] ),
        .I3(\burstIgrstr_reg_n_0_[2] ),
        .I4(\burstIgrstr_reg_n_0_[1] ),
        .I5(\burstIgrstr_reg_n_0_[0] ),
        .O(burstIgrstr[3]));
  LUT6 #(
    .INIT(64'h800080008000FFFF)) 
    \burstIgrstr[4]_i_1 
       (.I0(hdrmemAXI_rlast),
        .I1(\burstIgrstr_reg[0]_0 ),
        .I2(\FSM_sequential_stateIgrstr[0]_i_2_n_0 ),
        .I3(\FSM_sequential_stateIgrstr[0]_i_4_n_0 ),
        .I4(stateIgrstr),
        .I5(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .O(\burstIgrstr[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \burstIgrstr[4]_i_2 
       (.I0(\burstIgrstr[4]_i_3_n_0 ),
        .I1(\burstIgrstr_reg_n_0_[4] ),
        .I2(\burstIgrstr_reg_n_0_[1] ),
        .I3(\burstIgrstr_reg_n_0_[0] ),
        .I4(\burstIgrstr_reg_n_0_[3] ),
        .I5(\burstIgrstr_reg_n_0_[2] ),
        .O(burstIgrstr[4]));
  (* SOFT_HLUTNM = "soft_lutpair1715" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \burstIgrstr[4]_i_3 
       (.I0(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I1(stateIgrstr),
        .O(\burstIgrstr[4]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \burstIgrstr_reg[0] 
       (.C(memclk),
        .CE(\burstIgrstr[4]_i_1_n_0 ),
        .CLR(AR),
        .D(burstIgrstr[0]),
        .Q(\burstIgrstr_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstIgrstr_reg[1] 
       (.C(memclk),
        .CE(\burstIgrstr[4]_i_1_n_0 ),
        .CLR(AR),
        .D(burstIgrstr[1]),
        .Q(\burstIgrstr_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstIgrstr_reg[2] 
       (.C(memclk),
        .CE(\burstIgrstr[4]_i_1_n_0 ),
        .CLR(AR),
        .D(burstIgrstr[2]),
        .Q(\burstIgrstr_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstIgrstr_reg[3] 
       (.C(memclk),
        .CE(\burstIgrstr[4]_i_1_n_0 ),
        .CLR(AR),
        .D(burstIgrstr[3]),
        .Q(\burstIgrstr_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstIgrstr_reg[4] 
       (.C(memclk),
        .CE(\burstIgrstr[4]_i_1_n_0 ),
        .CLR(AR),
        .D(burstIgrstr[4]),
        .Q(\burstIgrstr_reg_n_0_[4] ));
  (* XILINX_LEGACY_PRIM = "LD" *) 
  (* XILINX_TRANSFORM_PINMAP = "VCC:GE GND:CLR" *) 
  LDCE #(
    .INIT(1'b0)) 
    \burstSwapLast_reg[1] 
       (.CLR(1'b0),
        .D(1'b1),
        .G(AR),
        .GE(1'b1),
        .Q(burstSwapLast));
  LUT6 #(
    .INIT(64'h0000000032000000)) 
    \burstSwap[0]_i_1 
       (.I0(\burstSwap[0]_i_2_n_0 ),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [1]),
        .I3(\stateSwap_reg[3]_0 [2]),
        .I4(\stateSwap_reg[3]_0 [0]),
        .I5(rdAAXI_araddr[0]),
        .O(\burstSwap[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \burstSwap[0]_i_2 
       (.I0(burstSwapLast),
        .I1(rdAAXI_araddr[1]),
        .I2(rdAAXI_araddr[4]),
        .I3(rdAAXI_araddr[3]),
        .I4(rdAAXI_araddr[2]),
        .O(\burstSwap[0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1820" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \burstSwap[1]_i_1 
       (.I0(\burstSwap[4]_i_5_n_0 ),
        .I1(rdAAXI_araddr[1]),
        .I2(rdAAXI_araddr[0]),
        .O(\burstSwap[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1736" *) 
  LUT4 #(
    .INIT(16'h2888)) 
    \burstSwap[2]_i_1 
       (.I0(\burstSwap[4]_i_5_n_0 ),
        .I1(rdAAXI_araddr[2]),
        .I2(rdAAXI_araddr[0]),
        .I3(rdAAXI_araddr[1]),
        .O(\burstSwap[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1736" *) 
  LUT5 #(
    .INIT(32'h28888888)) 
    \burstSwap[3]_i_1 
       (.I0(\burstSwap[4]_i_5_n_0 ),
        .I1(rdAAXI_araddr[3]),
        .I2(rdAAXI_araddr[2]),
        .I3(rdAAXI_araddr[1]),
        .I4(rdAAXI_araddr[0]),
        .O(\burstSwap[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAFAEAAAAABAAAAAA)) 
    \burstSwap[4]_i_1 
       (.I0(\burstSwap[4]_i_3_n_0 ),
        .I1(\stateSwap_reg[3]_0 [1]),
        .I2(\stateSwap_reg[3]_0 [3]),
        .I3(\burstSwap[4]_i_4_n_0 ),
        .I4(\stateSwap[1]_i_3_n_0 ),
        .I5(\stateSwap[3]_i_4_n_0 ),
        .O(\burstSwap[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \burstSwap[4]_i_2 
       (.I0(\burstSwap[4]_i_5_n_0 ),
        .I1(rdAAXI_araddr[4]),
        .I2(rdAAXI_araddr[1]),
        .I3(rdAAXI_araddr[0]),
        .I4(rdAAXI_araddr[3]),
        .I5(rdAAXI_araddr[2]),
        .O(\burstSwap[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800000000)) 
    \burstSwap[4]_i_3 
       (.I0(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I1(stateIgrstr),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(\stateSwap_reg[3]_0 [1]),
        .I5(\burstSwap[4]_i_6_n_0 ),
        .O(\burstSwap[4]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1752" *) 
  LUT3 #(
    .INIT(8'h10)) 
    \burstSwap[4]_i_4 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .O(\burstSwap[4]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1737" *) 
  LUT5 #(
    .INIT(32'h00880080)) 
    \burstSwap[4]_i_5 
       (.I0(\stateSwap_reg[3]_0 [2]),
        .I1(\stateSwap_reg[3]_0 [0]),
        .I2(\stateSwap_reg[3]_0 [1]),
        .I3(\stateSwap_reg[3]_0 [3]),
        .I4(\stateSwap[3]_i_4_n_0 ),
        .O(\burstSwap[4]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1821" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstSwap[4]_i_6 
       (.I0(\stateSwap_reg[3]_0 [3]),
        .I1(rng_memclk),
        .O(\burstSwap[4]_i_6_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \burstSwap_reg[0] 
       (.C(memclk),
        .CE(\burstSwap[4]_i_1_n_0 ),
        .CLR(AR),
        .D(\burstSwap[0]_i_1_n_0 ),
        .Q(rdAAXI_araddr[0]));
  FDCE #(
    .INIT(1'b0)) 
    \burstSwap_reg[1] 
       (.C(memclk),
        .CE(\burstSwap[4]_i_1_n_0 ),
        .CLR(AR),
        .D(\burstSwap[1]_i_1_n_0 ),
        .Q(rdAAXI_araddr[1]));
  FDCE #(
    .INIT(1'b0)) 
    \burstSwap_reg[2] 
       (.C(memclk),
        .CE(\burstSwap[4]_i_1_n_0 ),
        .CLR(AR),
        .D(\burstSwap[2]_i_1_n_0 ),
        .Q(rdAAXI_araddr[2]));
  FDCE #(
    .INIT(1'b0)) 
    \burstSwap_reg[3] 
       (.C(memclk),
        .CE(\burstSwap[4]_i_1_n_0 ),
        .CLR(AR),
        .D(\burstSwap[3]_i_1_n_0 ),
        .Q(rdAAXI_araddr[3]));
  FDCE #(
    .INIT(1'b0)) 
    \burstSwap_reg[4] 
       (.C(memclk),
        .CE(\burstSwap[4]_i_1_n_0 ),
        .CLR(AR),
        .D(\burstSwap[4]_i_2_n_0 ),
        .Q(rdAAXI_araddr[4]));
  (* SOFT_HLUTNM = "soft_lutpair1749" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    \capt[5]_i_1 
       (.I0(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I1(stateIgrstr),
        .I2(ddrAXI_rready_0),
        .I3(\capt_reg[5] ),
        .O(D));
  (* SOFT_HLUTNM = "soft_lutpair1723" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    \col_lcl[0]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(rng_reg_0),
        .I3(col_lcl[0]),
        .O(\col_lcl[0]_i_1__0_n_0 ));
  LUT4 #(
    .INIT(16'hCBFF)) 
    \col_lcl[10]_i_1 
       (.I0(rgbFromVideoinAXIS_tvalidm2),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\col_lcl[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1751" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    \col_lcl[10]_i_2__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(rng_reg_0),
        .I3(\col_lcl[10]_i_3__0_n_0 ),
        .O(\col_lcl[10]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h9555555555555555)) 
    \col_lcl[10]_i_3__0 
       (.I0(col_lcl[10]),
        .I1(col_lcl[8]),
        .I2(col_lcl[6]),
        .I3(\col_lcl[9]_i_2_n_0 ),
        .I4(col_lcl[7]),
        .I5(col_lcl[9]),
        .O(\col_lcl[10]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1723" *) 
  LUT5 #(
    .INIT(32'h00404000)) 
    \col_lcl[1]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(rng_reg_0),
        .I3(col_lcl[1]),
        .I4(col_lcl[0]),
        .O(\col_lcl[1]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0040404040000000)) 
    \col_lcl[2]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(rng_reg_0),
        .I3(col_lcl[0]),
        .I4(col_lcl[1]),
        .I5(col_lcl[2]),
        .O(\col_lcl[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1713" *) 
  LUT5 #(
    .INIT(32'h7F800000)) 
    \col_lcl[3]_i_1__0 
       (.I0(col_lcl[2]),
        .I1(col_lcl[1]),
        .I2(col_lcl[0]),
        .I3(col_lcl[3]),
        .I4(\col_lcl[9]_i_3_n_0 ),
        .O(\col_lcl[3]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h7FFF800000000000)) 
    \col_lcl[4]_i_1__0 
       (.I0(col_lcl[3]),
        .I1(col_lcl[0]),
        .I2(col_lcl[1]),
        .I3(col_lcl[2]),
        .I4(col_lcl[4]),
        .I5(\col_lcl[9]_i_3_n_0 ),
        .O(\col_lcl[4]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1747" *) 
  LUT4 #(
    .INIT(16'h2000)) 
    \col_lcl[5]_i_1__0 
       (.I0(\col_lcl[5]_i_2_n_0 ),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(rng_reg_0),
        .O(\col_lcl[5]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h6AAAAAAAAAAAAAAA)) 
    \col_lcl[5]_i_2 
       (.I0(col_lcl[5]),
        .I1(col_lcl[3]),
        .I2(col_lcl[0]),
        .I3(col_lcl[1]),
        .I4(col_lcl[2]),
        .I5(col_lcl[4]),
        .O(\col_lcl[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1712" *) 
  LUT5 #(
    .INIT(32'h06000000)) 
    \col_lcl[6]_i_1__0 
       (.I0(\col_lcl[9]_i_2_n_0 ),
        .I1(col_lcl[6]),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(rng_reg_0),
        .O(\col_lcl[6]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0078000000000000)) 
    \col_lcl[7]_i_1__0 
       (.I0(col_lcl[6]),
        .I1(\col_lcl[9]_i_2_n_0 ),
        .I2(col_lcl[7]),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(rng_reg_0),
        .O(\col_lcl[7]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1711" *) 
  LUT5 #(
    .INIT(32'h7F800000)) 
    \col_lcl[8]_i_1 
       (.I0(col_lcl[7]),
        .I1(\col_lcl[9]_i_2_n_0 ),
        .I2(col_lcl[6]),
        .I3(col_lcl[8]),
        .I4(\col_lcl[9]_i_3_n_0 ),
        .O(\col_lcl[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFF800000000000)) 
    \col_lcl[9]_i_1 
       (.I0(col_lcl[8]),
        .I1(col_lcl[6]),
        .I2(\col_lcl[9]_i_2_n_0 ),
        .I3(col_lcl[7]),
        .I4(col_lcl[9]),
        .I5(\col_lcl[9]_i_3_n_0 ),
        .O(\col_lcl[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \col_lcl[9]_i_2 
       (.I0(col_lcl[5]),
        .I1(col_lcl[3]),
        .I2(col_lcl[0]),
        .I3(col_lcl[1]),
        .I4(col_lcl[2]),
        .I5(col_lcl[4]),
        .O(\col_lcl[9]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1719" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \col_lcl[9]_i_3 
       (.I0(rng_reg_0),
        .I1(Q[1]),
        .I2(Q[0]),
        .O(\col_lcl[9]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\col_lcl[0]_i_1__0_n_0 ),
        .Q(col_lcl[0]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\col_lcl[10]_i_2__0_n_0 ),
        .Q(col_lcl[10]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\col_lcl[1]_i_1__0_n_0 ),
        .Q(col_lcl[1]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\col_lcl[2]_i_1__0_n_0 ),
        .Q(col_lcl[2]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\col_lcl[3]_i_1__0_n_0 ),
        .Q(col_lcl[3]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\col_lcl[4]_i_1__0_n_0 ),
        .Q(col_lcl[4]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\col_lcl[5]_i_1__0_n_0 ),
        .Q(col_lcl[5]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\col_lcl[6]_i_1__0_n_0 ),
        .Q(col_lcl[6]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\col_lcl[7]_i_1__0_n_0 ),
        .Q(col_lcl[7]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\col_lcl[8]_i_1_n_0 ),
        .Q(col_lcl[8]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\col_lcl[9]_i_1_n_0 ),
        .Q(col_lcl[9]));
  LUT6 #(
    .INIT(64'h0000000010000000)) 
    ddrAXI_arvalid_INST_0
       (.I0(\stateSwap_reg[3]_0 [0]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [1]),
        .I3(\stateSwap_reg[3]_0 [2]),
        .I4(ddrAXI_arvalid_0[0]),
        .I5(ddrAXI_arvalid_0[1]),
        .O(ddrAXI_arvalid));
  (* SOFT_HLUTNM = "soft_lutpair1906" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[10]_INST_0 
       (.I0(rdAAXI_araddr[2]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[2]));
  (* SOFT_HLUTNM = "soft_lutpair1907" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[11]_INST_0 
       (.I0(rdAAXI_araddr[3]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[3]));
  (* SOFT_HLUTNM = "soft_lutpair1907" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[12]_INST_0 
       (.I0(rdAAXI_araddr[4]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[4]));
  (* SOFT_HLUTNM = "soft_lutpair1908" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[13]_INST_0 
       (.I0(wrAAXI_awaddr[5]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[5]));
  (* SOFT_HLUTNM = "soft_lutpair1908" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[14]_INST_0 
       (.I0(wrAAXI_awaddr[6]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[6]));
  (* SOFT_HLUTNM = "soft_lutpair1909" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[15]_INST_0 
       (.I0(wrAAXI_awaddr[7]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[7]));
  (* SOFT_HLUTNM = "soft_lutpair1909" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[16]_INST_0 
       (.I0(wrAAXI_awaddr[8]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[8]));
  (* SOFT_HLUTNM = "soft_lutpair1910" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[17]_INST_0 
       (.I0(wrAAXI_awaddr[9]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[9]));
  (* SOFT_HLUTNM = "soft_lutpair1910" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[18]_INST_0 
       (.I0(wrAAXI_awaddr[10]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[10]));
  (* SOFT_HLUTNM = "soft_lutpair1911" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[19]_INST_0 
       (.I0(wrAAXI_awaddr[11]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[11]));
  (* SOFT_HLUTNM = "soft_lutpair1795" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[20]_INST_0 
       (.I0(wrAAXI_awaddr[12]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[12]));
  (* SOFT_HLUTNM = "soft_lutpair1911" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[21]_INST_0 
       (.I0(wrAAXI_awaddr[13]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[13]));
  (* SOFT_HLUTNM = "soft_lutpair1796" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[22]_INST_0 
       (.I0(wrAAXI_awaddr[14]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[14]));
  (* SOFT_HLUTNM = "soft_lutpair1797" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[23]_INST_0 
       (.I0(wrAAXI_awaddr[15]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[15]));
  (* SOFT_HLUTNM = "soft_lutpair1798" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[24]_INST_0 
       (.I0(wrAAXI_awaddr[16]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[16]));
  (* SOFT_HLUTNM = "soft_lutpair1912" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[25]_INST_0 
       (.I0(wrAAXI_awaddr[17]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[17]));
  (* SOFT_HLUTNM = "soft_lutpair1912" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[26]_INST_0 
       (.I0(wrAAXI_awaddr[18]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[18]));
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[27]_INST_0 
       (.I0(wrAAXI_awaddr[19]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[19]));
  (* SOFT_HLUTNM = "soft_lutpair1906" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[8]_INST_0 
       (.I0(rdAAXI_araddr[0]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[0]));
  (* SOFT_HLUTNM = "soft_lutpair1820" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_awaddr[9]_INST_0 
       (.I0(rdAAXI_araddr[1]),
        .I1(\ddrAXI_awaddr[27] ),
        .O(ddrAXI_awaddr[1]));
  (* SOFT_HLUTNM = "soft_lutpair1718" *) 
  LUT5 #(
    .INIT(32'h00000100)) 
    ddrAXI_awvalid_INST_0
       (.I0(\stateSwap_reg[3]_0 [0]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [1]),
        .I3(\stateSwap_reg[3]_0 [2]),
        .I4(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_awvalid));
  (* SOFT_HLUTNM = "soft_lutpair1714" *) 
  LUT3 #(
    .INIT(8'h40)) 
    ddrAXI_rready_INST_0
       (.I0(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .I1(stateIgrstr),
        .I2(ddrAXI_rready_0),
        .O(ddrAXI_rready));
  (* SOFT_HLUTNM = "soft_lutpair1842" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[0]_INST_0 
       (.I0(wrAAXI_wdata[0]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[0]));
  (* SOFT_HLUTNM = "soft_lutpair1892" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[100]_INST_0 
       (.I0(wrAAXI_wdata[100]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[100]));
  (* SOFT_HLUTNM = "soft_lutpair1892" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[101]_INST_0 
       (.I0(wrAAXI_wdata[101]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[101]));
  (* SOFT_HLUTNM = "soft_lutpair1893" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[102]_INST_0 
       (.I0(wrAAXI_wdata[102]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[102]));
  (* SOFT_HLUTNM = "soft_lutpair1893" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[103]_INST_0 
       (.I0(wrAAXI_wdata[103]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[103]));
  (* SOFT_HLUTNM = "soft_lutpair1894" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[104]_INST_0 
       (.I0(wrAAXI_wdata[104]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[104]));
  (* SOFT_HLUTNM = "soft_lutpair1894" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[105]_INST_0 
       (.I0(wrAAXI_wdata[105]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[105]));
  (* SOFT_HLUTNM = "soft_lutpair1895" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[106]_INST_0 
       (.I0(wrAAXI_wdata[106]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[106]));
  (* SOFT_HLUTNM = "soft_lutpair1895" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[107]_INST_0 
       (.I0(wrAAXI_wdata[107]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[107]));
  (* SOFT_HLUTNM = "soft_lutpair1896" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[108]_INST_0 
       (.I0(wrAAXI_wdata[108]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[108]));
  (* SOFT_HLUTNM = "soft_lutpair1896" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[109]_INST_0 
       (.I0(wrAAXI_wdata[109]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[109]));
  (* SOFT_HLUTNM = "soft_lutpair1847" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[10]_INST_0 
       (.I0(wrAAXI_wdata[10]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[10]));
  (* SOFT_HLUTNM = "soft_lutpair1897" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[110]_INST_0 
       (.I0(wrAAXI_wdata[110]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[110]));
  (* SOFT_HLUTNM = "soft_lutpair1897" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[111]_INST_0 
       (.I0(wrAAXI_wdata[111]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[111]));
  (* SOFT_HLUTNM = "soft_lutpair1898" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[112]_INST_0 
       (.I0(wrAAXI_wdata[112]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[112]));
  (* SOFT_HLUTNM = "soft_lutpair1898" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[113]_INST_0 
       (.I0(wrAAXI_wdata[113]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[113]));
  (* SOFT_HLUTNM = "soft_lutpair1899" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[114]_INST_0 
       (.I0(wrAAXI_wdata[114]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[114]));
  (* SOFT_HLUTNM = "soft_lutpair1899" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[115]_INST_0 
       (.I0(wrAAXI_wdata[115]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[115]));
  (* SOFT_HLUTNM = "soft_lutpair1900" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[116]_INST_0 
       (.I0(wrAAXI_wdata[116]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[116]));
  (* SOFT_HLUTNM = "soft_lutpair1900" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[117]_INST_0 
       (.I0(wrAAXI_wdata[117]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[117]));
  (* SOFT_HLUTNM = "soft_lutpair1901" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[118]_INST_0 
       (.I0(wrAAXI_wdata[118]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[118]));
  (* SOFT_HLUTNM = "soft_lutpair1901" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[119]_INST_0 
       (.I0(wrAAXI_wdata[119]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[119]));
  (* SOFT_HLUTNM = "soft_lutpair1847" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[11]_INST_0 
       (.I0(wrAAXI_wdata[11]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[11]));
  (* SOFT_HLUTNM = "soft_lutpair1902" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[120]_INST_0 
       (.I0(wrAAXI_wdata[120]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[120]));
  (* SOFT_HLUTNM = "soft_lutpair1902" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[121]_INST_0 
       (.I0(wrAAXI_wdata[121]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[121]));
  (* SOFT_HLUTNM = "soft_lutpair1903" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[122]_INST_0 
       (.I0(wrAAXI_wdata[122]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[122]));
  (* SOFT_HLUTNM = "soft_lutpair1903" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[123]_INST_0 
       (.I0(wrAAXI_wdata[123]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[123]));
  (* SOFT_HLUTNM = "soft_lutpair1904" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[124]_INST_0 
       (.I0(wrAAXI_wdata[124]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[124]));
  (* SOFT_HLUTNM = "soft_lutpair1904" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[125]_INST_0 
       (.I0(wrAAXI_wdata[125]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[125]));
  (* SOFT_HLUTNM = "soft_lutpair1905" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[126]_INST_0 
       (.I0(wrAAXI_wdata[126]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[126]));
  (* SOFT_HLUTNM = "soft_lutpair1905" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[127]_INST_0 
       (.I0(wrAAXI_wdata[127]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[127]));
  (* SOFT_HLUTNM = "soft_lutpair1848" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[12]_INST_0 
       (.I0(wrAAXI_wdata[12]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[12]));
  (* SOFT_HLUTNM = "soft_lutpair1848" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[13]_INST_0 
       (.I0(wrAAXI_wdata[13]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[13]));
  (* SOFT_HLUTNM = "soft_lutpair1849" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[14]_INST_0 
       (.I0(wrAAXI_wdata[14]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[14]));
  (* SOFT_HLUTNM = "soft_lutpair1849" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[15]_INST_0 
       (.I0(wrAAXI_wdata[15]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[15]));
  (* SOFT_HLUTNM = "soft_lutpair1850" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[16]_INST_0 
       (.I0(wrAAXI_wdata[16]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[16]));
  (* SOFT_HLUTNM = "soft_lutpair1850" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[17]_INST_0 
       (.I0(wrAAXI_wdata[17]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[17]));
  (* SOFT_HLUTNM = "soft_lutpair1851" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[18]_INST_0 
       (.I0(wrAAXI_wdata[18]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[18]));
  (* SOFT_HLUTNM = "soft_lutpair1851" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[19]_INST_0 
       (.I0(wrAAXI_wdata[19]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[19]));
  (* SOFT_HLUTNM = "soft_lutpair1842" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[1]_INST_0 
       (.I0(wrAAXI_wdata[1]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[1]));
  (* SOFT_HLUTNM = "soft_lutpair1852" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[20]_INST_0 
       (.I0(wrAAXI_wdata[20]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[20]));
  (* SOFT_HLUTNM = "soft_lutpair1852" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[21]_INST_0 
       (.I0(wrAAXI_wdata[21]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[21]));
  (* SOFT_HLUTNM = "soft_lutpair1853" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[22]_INST_0 
       (.I0(wrAAXI_wdata[22]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[22]));
  (* SOFT_HLUTNM = "soft_lutpair1853" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[23]_INST_0 
       (.I0(wrAAXI_wdata[23]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[23]));
  (* SOFT_HLUTNM = "soft_lutpair1854" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[24]_INST_0 
       (.I0(wrAAXI_wdata[24]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[24]));
  (* SOFT_HLUTNM = "soft_lutpair1854" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[25]_INST_0 
       (.I0(wrAAXI_wdata[25]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[25]));
  (* SOFT_HLUTNM = "soft_lutpair1855" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[26]_INST_0 
       (.I0(wrAAXI_wdata[26]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[26]));
  (* SOFT_HLUTNM = "soft_lutpair1855" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[27]_INST_0 
       (.I0(wrAAXI_wdata[27]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[27]));
  (* SOFT_HLUTNM = "soft_lutpair1856" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[28]_INST_0 
       (.I0(wrAAXI_wdata[28]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[28]));
  (* SOFT_HLUTNM = "soft_lutpair1856" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[29]_INST_0 
       (.I0(wrAAXI_wdata[29]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[29]));
  (* SOFT_HLUTNM = "soft_lutpair1843" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[2]_INST_0 
       (.I0(wrAAXI_wdata[2]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[2]));
  (* SOFT_HLUTNM = "soft_lutpair1857" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[30]_INST_0 
       (.I0(wrAAXI_wdata[30]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[30]));
  (* SOFT_HLUTNM = "soft_lutpair1857" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[31]_INST_0 
       (.I0(wrAAXI_wdata[31]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[31]));
  (* SOFT_HLUTNM = "soft_lutpair1858" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[32]_INST_0 
       (.I0(wrAAXI_wdata[32]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[32]));
  (* SOFT_HLUTNM = "soft_lutpair1858" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[33]_INST_0 
       (.I0(wrAAXI_wdata[33]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[33]));
  (* SOFT_HLUTNM = "soft_lutpair1859" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[34]_INST_0 
       (.I0(wrAAXI_wdata[34]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[34]));
  (* SOFT_HLUTNM = "soft_lutpair1859" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[35]_INST_0 
       (.I0(wrAAXI_wdata[35]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[35]));
  (* SOFT_HLUTNM = "soft_lutpair1860" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[36]_INST_0 
       (.I0(wrAAXI_wdata[36]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[36]));
  (* SOFT_HLUTNM = "soft_lutpair1860" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[37]_INST_0 
       (.I0(wrAAXI_wdata[37]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[37]));
  (* SOFT_HLUTNM = "soft_lutpair1861" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[38]_INST_0 
       (.I0(wrAAXI_wdata[38]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[38]));
  (* SOFT_HLUTNM = "soft_lutpair1861" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[39]_INST_0 
       (.I0(wrAAXI_wdata[39]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[39]));
  (* SOFT_HLUTNM = "soft_lutpair1843" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[3]_INST_0 
       (.I0(wrAAXI_wdata[3]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[3]));
  (* SOFT_HLUTNM = "soft_lutpair1862" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[40]_INST_0 
       (.I0(wrAAXI_wdata[40]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[40]));
  (* SOFT_HLUTNM = "soft_lutpair1862" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[41]_INST_0 
       (.I0(wrAAXI_wdata[41]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[41]));
  (* SOFT_HLUTNM = "soft_lutpair1863" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[42]_INST_0 
       (.I0(wrAAXI_wdata[42]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[42]));
  (* SOFT_HLUTNM = "soft_lutpair1863" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[43]_INST_0 
       (.I0(wrAAXI_wdata[43]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[43]));
  (* SOFT_HLUTNM = "soft_lutpair1864" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[44]_INST_0 
       (.I0(wrAAXI_wdata[44]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[44]));
  (* SOFT_HLUTNM = "soft_lutpair1864" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[45]_INST_0 
       (.I0(wrAAXI_wdata[45]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[45]));
  (* SOFT_HLUTNM = "soft_lutpair1865" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[46]_INST_0 
       (.I0(wrAAXI_wdata[46]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[46]));
  (* SOFT_HLUTNM = "soft_lutpair1865" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[47]_INST_0 
       (.I0(wrAAXI_wdata[47]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[47]));
  (* SOFT_HLUTNM = "soft_lutpair1866" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[48]_INST_0 
       (.I0(wrAAXI_wdata[48]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[48]));
  (* SOFT_HLUTNM = "soft_lutpair1866" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[49]_INST_0 
       (.I0(wrAAXI_wdata[49]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[49]));
  (* SOFT_HLUTNM = "soft_lutpair1844" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[4]_INST_0 
       (.I0(wrAAXI_wdata[4]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[4]));
  (* SOFT_HLUTNM = "soft_lutpair1867" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[50]_INST_0 
       (.I0(wrAAXI_wdata[50]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[50]));
  (* SOFT_HLUTNM = "soft_lutpair1867" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[51]_INST_0 
       (.I0(wrAAXI_wdata[51]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[51]));
  (* SOFT_HLUTNM = "soft_lutpair1868" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[52]_INST_0 
       (.I0(wrAAXI_wdata[52]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[52]));
  (* SOFT_HLUTNM = "soft_lutpair1868" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[53]_INST_0 
       (.I0(wrAAXI_wdata[53]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[53]));
  (* SOFT_HLUTNM = "soft_lutpair1869" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[54]_INST_0 
       (.I0(wrAAXI_wdata[54]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[54]));
  (* SOFT_HLUTNM = "soft_lutpair1869" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[55]_INST_0 
       (.I0(wrAAXI_wdata[55]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[55]));
  (* SOFT_HLUTNM = "soft_lutpair1870" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[56]_INST_0 
       (.I0(wrAAXI_wdata[56]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[56]));
  (* SOFT_HLUTNM = "soft_lutpair1870" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[57]_INST_0 
       (.I0(wrAAXI_wdata[57]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[57]));
  (* SOFT_HLUTNM = "soft_lutpair1871" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[58]_INST_0 
       (.I0(wrAAXI_wdata[58]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[58]));
  (* SOFT_HLUTNM = "soft_lutpair1871" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[59]_INST_0 
       (.I0(wrAAXI_wdata[59]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[59]));
  (* SOFT_HLUTNM = "soft_lutpair1844" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[5]_INST_0 
       (.I0(wrAAXI_wdata[5]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[5]));
  (* SOFT_HLUTNM = "soft_lutpair1872" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[60]_INST_0 
       (.I0(wrAAXI_wdata[60]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[60]));
  (* SOFT_HLUTNM = "soft_lutpair1872" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[61]_INST_0 
       (.I0(wrAAXI_wdata[61]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[61]));
  (* SOFT_HLUTNM = "soft_lutpair1873" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[62]_INST_0 
       (.I0(wrAAXI_wdata[62]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[62]));
  (* SOFT_HLUTNM = "soft_lutpair1873" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[63]_INST_0 
       (.I0(wrAAXI_wdata[63]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[63]));
  (* SOFT_HLUTNM = "soft_lutpair1874" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[64]_INST_0 
       (.I0(wrAAXI_wdata[64]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[64]));
  (* SOFT_HLUTNM = "soft_lutpair1874" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[65]_INST_0 
       (.I0(wrAAXI_wdata[65]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[65]));
  (* SOFT_HLUTNM = "soft_lutpair1875" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[66]_INST_0 
       (.I0(wrAAXI_wdata[66]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[66]));
  (* SOFT_HLUTNM = "soft_lutpair1875" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[67]_INST_0 
       (.I0(wrAAXI_wdata[67]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[67]));
  (* SOFT_HLUTNM = "soft_lutpair1876" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[68]_INST_0 
       (.I0(wrAAXI_wdata[68]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[68]));
  (* SOFT_HLUTNM = "soft_lutpair1876" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[69]_INST_0 
       (.I0(wrAAXI_wdata[69]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[69]));
  (* SOFT_HLUTNM = "soft_lutpair1845" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[6]_INST_0 
       (.I0(wrAAXI_wdata[6]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[6]));
  (* SOFT_HLUTNM = "soft_lutpair1877" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[70]_INST_0 
       (.I0(wrAAXI_wdata[70]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[70]));
  (* SOFT_HLUTNM = "soft_lutpair1877" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[71]_INST_0 
       (.I0(wrAAXI_wdata[71]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[71]));
  (* SOFT_HLUTNM = "soft_lutpair1878" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[72]_INST_0 
       (.I0(wrAAXI_wdata[72]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[72]));
  (* SOFT_HLUTNM = "soft_lutpair1878" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[73]_INST_0 
       (.I0(wrAAXI_wdata[73]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[73]));
  (* SOFT_HLUTNM = "soft_lutpair1879" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[74]_INST_0 
       (.I0(wrAAXI_wdata[74]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[74]));
  (* SOFT_HLUTNM = "soft_lutpair1879" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[75]_INST_0 
       (.I0(wrAAXI_wdata[75]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[75]));
  (* SOFT_HLUTNM = "soft_lutpair1880" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[76]_INST_0 
       (.I0(wrAAXI_wdata[76]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[76]));
  (* SOFT_HLUTNM = "soft_lutpair1880" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[77]_INST_0 
       (.I0(wrAAXI_wdata[77]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[77]));
  (* SOFT_HLUTNM = "soft_lutpair1881" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[78]_INST_0 
       (.I0(wrAAXI_wdata[78]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[78]));
  (* SOFT_HLUTNM = "soft_lutpair1881" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[79]_INST_0 
       (.I0(wrAAXI_wdata[79]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[79]));
  (* SOFT_HLUTNM = "soft_lutpair1845" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[7]_INST_0 
       (.I0(wrAAXI_wdata[7]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[7]));
  (* SOFT_HLUTNM = "soft_lutpair1882" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[80]_INST_0 
       (.I0(wrAAXI_wdata[80]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[80]));
  (* SOFT_HLUTNM = "soft_lutpair1882" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[81]_INST_0 
       (.I0(wrAAXI_wdata[81]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[81]));
  (* SOFT_HLUTNM = "soft_lutpair1883" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[82]_INST_0 
       (.I0(wrAAXI_wdata[82]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[82]));
  (* SOFT_HLUTNM = "soft_lutpair1883" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[83]_INST_0 
       (.I0(wrAAXI_wdata[83]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[83]));
  (* SOFT_HLUTNM = "soft_lutpair1884" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[84]_INST_0 
       (.I0(wrAAXI_wdata[84]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[84]));
  (* SOFT_HLUTNM = "soft_lutpair1884" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[85]_INST_0 
       (.I0(wrAAXI_wdata[85]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[85]));
  (* SOFT_HLUTNM = "soft_lutpair1885" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[86]_INST_0 
       (.I0(wrAAXI_wdata[86]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[86]));
  (* SOFT_HLUTNM = "soft_lutpair1885" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[87]_INST_0 
       (.I0(wrAAXI_wdata[87]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[87]));
  (* SOFT_HLUTNM = "soft_lutpair1886" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[88]_INST_0 
       (.I0(wrAAXI_wdata[88]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[88]));
  (* SOFT_HLUTNM = "soft_lutpair1886" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[89]_INST_0 
       (.I0(wrAAXI_wdata[89]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[89]));
  (* SOFT_HLUTNM = "soft_lutpair1846" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[8]_INST_0 
       (.I0(wrAAXI_wdata[8]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[8]));
  (* SOFT_HLUTNM = "soft_lutpair1887" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[90]_INST_0 
       (.I0(wrAAXI_wdata[90]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[90]));
  (* SOFT_HLUTNM = "soft_lutpair1887" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[91]_INST_0 
       (.I0(wrAAXI_wdata[91]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[91]));
  (* SOFT_HLUTNM = "soft_lutpair1888" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[92]_INST_0 
       (.I0(wrAAXI_wdata[92]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[92]));
  (* SOFT_HLUTNM = "soft_lutpair1888" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[93]_INST_0 
       (.I0(wrAAXI_wdata[93]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[93]));
  (* SOFT_HLUTNM = "soft_lutpair1889" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[94]_INST_0 
       (.I0(wrAAXI_wdata[94]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[94]));
  (* SOFT_HLUTNM = "soft_lutpair1889" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[95]_INST_0 
       (.I0(wrAAXI_wdata[95]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[95]));
  (* SOFT_HLUTNM = "soft_lutpair1890" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[96]_INST_0 
       (.I0(wrAAXI_wdata[96]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[96]));
  (* SOFT_HLUTNM = "soft_lutpair1890" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[97]_INST_0 
       (.I0(wrAAXI_wdata[97]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[97]));
  (* SOFT_HLUTNM = "soft_lutpair1891" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[98]_INST_0 
       (.I0(wrAAXI_wdata[98]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[98]));
  (* SOFT_HLUTNM = "soft_lutpair1891" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[99]_INST_0 
       (.I0(wrAAXI_wdata[99]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[99]));
  (* SOFT_HLUTNM = "soft_lutpair1846" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \ddrAXI_wdata[9]_INST_0 
       (.I0(wrAAXI_wdata[9]),
        .I1(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wdata[9]));
  LUT6 #(
    .INIT(64'hFF001800FF00FF00)) 
    ddrAXI_wlast_INST_0_i_1
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I3(egrAXIS_tlast),
        .I4(ddrAXI_wlast_INST_0_i_2_n_0),
        .I5(\stateSwap_reg[3]_0 [2]),
        .O(wrAAXI_wlast));
  (* SOFT_HLUTNM = "soft_lutpair1737" *) 
  LUT2 #(
    .INIT(4'hE)) 
    ddrAXI_wlast_INST_0_i_2
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .O(ddrAXI_wlast_INST_0_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1752" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    ddrAXI_wvalid_INST_0
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I3(ddrAXI_wdata_0_sn_1),
        .O(ddrAXI_wvalid));
  LUT5 #(
    .INIT(32'h03F35555)) 
    \dwrRowbuf[10]_i_2 
       (.I0(\dwrRowbuf[12]_i_4_n_0 ),
        .I1(\dwrRowbuf[14]_i_5_n_0 ),
        .I2(\dwrRowbuf[2]_i_2_n_0 ),
        .I3(\dwrRowbuf[10]_i_4_n_0 ),
        .I4(\dwrRowbuf[1]_i_2_n_0 ),
        .O(\dwrRowbuf[10]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1810" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[10]_i_4 
       (.I0(\dwrRowbuf[14]_i_7_n_0 ),
        .I1(\dwrRowbuf[14]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[2] ),
        .O(\dwrRowbuf[10]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h470047FF)) 
    \dwrRowbuf[11]_i_2 
       (.I0(\dwrRowbuf[11]_i_4_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\dwrRowbuf[14]_i_6_n_0 ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\dwrRowbuf[13]_i_4_n_0 ),
        .O(\dwrRowbuf[11]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1810" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[11]_i_4 
       (.I0(\dwrRowbuf[14]_i_7_n_0 ),
        .I1(\dwrRowbuf[14]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[3] ),
        .O(\dwrRowbuf[11]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hEE0EEE0E0000EE0E)) 
    \dwrRowbuf[12]_i_2 
       (.I0(\dwrRowbuf[2]_i_2_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ),
        .I2(\dwrRowbuf[12]_i_4_n_0 ),
        .I3(\dwrRowbuf[28]_i_5_n_0 ),
        .I4(\dwrRowbuf[14]_i_5_n_0 ),
        .I5(\dwrRowbuf[1]_i_2_n_0 ),
        .O(\dwrRowbuf[12]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1809" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[12]_i_4 
       (.I0(\dwrRowbuf[14]_i_7_n_0 ),
        .I1(\dwrRowbuf[14]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[4] ),
        .O(\dwrRowbuf[12]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505FCFCF505FC0C0)) 
    \dwrRowbuf[13]_i_2 
       (.I0(\dwrRowbuf[13]_i_4_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ),
        .I2(\dwrRowbuf[1]_i_2_n_0 ),
        .I3(\dwrRowbuf[14]_i_6_n_0 ),
        .I4(\dwrRowbuf[2]_i_2_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ),
        .O(\dwrRowbuf[13]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1809" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[13]_i_4 
       (.I0(\dwrRowbuf[14]_i_7_n_0 ),
        .I1(\dwrRowbuf[14]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[5] ),
        .O(\dwrRowbuf[13]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h74FF7400)) 
    \dwrRowbuf[14]_i_2 
       (.I0(\dwrRowbuf[14]_i_5_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ),
        .O(\dwrRowbuf[14]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1724" *) 
  LUT5 #(
    .INIT(32'h74FF7400)) 
    \dwrRowbuf[14]_i_3 
       (.I0(\dwrRowbuf[14]_i_6_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ),
        .O(\dwrRowbuf[14]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1808" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[14]_i_5 
       (.I0(\dwrRowbuf[14]_i_7_n_0 ),
        .I1(\dwrRowbuf[14]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[6] ),
        .O(\dwrRowbuf[14]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1808" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[14]_i_6 
       (.I0(\dwrRowbuf[14]_i_7_n_0 ),
        .I1(\dwrRowbuf[14]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[7] ),
        .O(\dwrRowbuf[14]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \dwrRowbuf[14]_i_7 
       (.I0(\dwrRowbuf[2]_i_19_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ),
        .O(\dwrRowbuf[14]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h00000002)) 
    \dwrRowbuf[14]_i_8 
       (.I0(\dwrRowbuf_reg[0]_1 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ),
        .O(\dwrRowbuf[14]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dwrRowbuf[15]_i_2 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ),
        .I2(\dwrRowbuf[30]_i_3_n_0 ),
        .I3(\dwrRowbuf[15]_i_3_n_0 ),
        .I4(\dwrRowbuf[1]_i_2_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ),
        .O(\dwrRowbuf[15]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1724" *) 
  LUT3 #(
    .INIT(8'h74)) 
    \dwrRowbuf[15]_i_3 
       (.I0(\dwrRowbuf[14]_i_6_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ),
        .O(\dwrRowbuf[15]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \dwrRowbuf[16]_i_2 
       (.I0(\dwrRowbuf[16]_i_4_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\dwrRowbuf[20]_i_4_n_0 ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\dwrRowbuf[18]_i_4_n_0 ),
        .O(\dwrRowbuf[16]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1815" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[16]_i_4 
       (.I0(\dwrRowbuf[22]_i_7_n_0 ),
        .I1(\dwrRowbuf[22]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[12] ),
        .O(\dwrRowbuf[16]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \dwrRowbuf[17]_i_2 
       (.I0(\dwrRowbuf[17]_i_4_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\dwrRowbuf[21]_i_4_n_0 ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\dwrRowbuf[19]_i_4_n_0 ),
        .O(\dwrRowbuf[17]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1815" *) 
  LUT3 #(
    .INIT(8'h0B)) 
    \dwrRowbuf[17]_i_4 
       (.I0(\dwrRowbuf[22]_i_8_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[13] ),
        .I2(\dwrRowbuf[22]_i_7_n_0 ),
        .O(\dwrRowbuf[17]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hDD0DDD0D0000DD0D)) 
    \dwrRowbuf[18]_i_2 
       (.I0(\dwrRowbuf[22]_i_5_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\dwrRowbuf[18]_i_4_n_0 ),
        .I3(\dwrRowbuf[28]_i_5_n_0 ),
        .I4(\dwrRowbuf[20]_i_4_n_0 ),
        .I5(\dwrRowbuf[1]_i_2_n_0 ),
        .O(\dwrRowbuf[18]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1814" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[18]_i_4 
       (.I0(\dwrRowbuf[22]_i_7_n_0 ),
        .I1(\dwrRowbuf[22]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[14] ),
        .O(\dwrRowbuf[18]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hDD0DDD0D0000DD0D)) 
    \dwrRowbuf[19]_i_2 
       (.I0(\dwrRowbuf[22]_i_6_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\dwrRowbuf[19]_i_4_n_0 ),
        .I3(\dwrRowbuf[28]_i_5_n_0 ),
        .I4(\dwrRowbuf[21]_i_4_n_0 ),
        .I5(\dwrRowbuf[1]_i_2_n_0 ),
        .O(\dwrRowbuf[19]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1814" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[19]_i_4 
       (.I0(\dwrRowbuf[22]_i_7_n_0 ),
        .I1(\dwrRowbuf[22]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[15] ),
        .O(\dwrRowbuf[19]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \dwrRowbuf[1]_i_2 
       (.I0(\dwrRowbuf[2]_i_2_n_0 ),
        .I1(\dwrRowbuf[1]_i_6_n_0 ),
        .O(\dwrRowbuf[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFE200E2)) 
    \dwrRowbuf[1]_i_6 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ),
        .I1(data5),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ),
        .I3(\dwrRowbuf[1]_i_7_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ),
        .I5(\dwrRowbuf[30]_i_8_n_0 ),
        .O(\dwrRowbuf[1]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \dwrRowbuf[1]_i_7 
       (.I0(pvt2),
        .I1(pvt29_in),
        .O(\dwrRowbuf[1]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h303FAFAF303FA0A0)) 
    \dwrRowbuf[20]_i_2 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ),
        .I1(\dwrRowbuf[20]_i_4_n_0 ),
        .I2(\dwrRowbuf[1]_i_2_n_0 ),
        .I3(\dwrRowbuf[22]_i_5_n_0 ),
        .I4(\dwrRowbuf[2]_i_2_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ),
        .O(\dwrRowbuf[20]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1813" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[20]_i_4 
       (.I0(\dwrRowbuf[22]_i_7_n_0 ),
        .I1(\dwrRowbuf[22]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[16] ),
        .O(\dwrRowbuf[20]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h2E002EFF)) 
    \dwrRowbuf[21]_i_2 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[21] ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\dwrRowbuf[21]_i_4_n_0 ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\dwrRowbuf[22]_i_6_n_0 ),
        .O(\dwrRowbuf[21]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1813" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[21]_i_4 
       (.I0(\dwrRowbuf[22]_i_7_n_0 ),
        .I1(\dwrRowbuf[22]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[17] ),
        .O(\dwrRowbuf[21]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h74FF7400)) 
    \dwrRowbuf[22]_i_2 
       (.I0(\dwrRowbuf[22]_i_5_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ),
        .O(\dwrRowbuf[22]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h74FF7400)) 
    \dwrRowbuf[22]_i_3 
       (.I0(\dwrRowbuf[22]_i_6_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[23] ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[21] ),
        .O(\dwrRowbuf[22]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1812" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[22]_i_5 
       (.I0(\dwrRowbuf[22]_i_7_n_0 ),
        .I1(\dwrRowbuf[22]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[18] ),
        .O(\dwrRowbuf[22]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1812" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[22]_i_6 
       (.I0(\dwrRowbuf[22]_i_7_n_0 ),
        .I1(\dwrRowbuf[22]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[19] ),
        .O(\dwrRowbuf[22]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \dwrRowbuf[22]_i_7 
       (.I0(\dwrRowbuf[2]_i_19_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[21] ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[23] ),
        .O(\dwrRowbuf[22]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h00000002)) 
    \dwrRowbuf[22]_i_8 
       (.I0(\dwrRowbuf_reg[0]_1 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[21] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[23] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ),
        .O(\dwrRowbuf[22]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \dwrRowbuf[23]_i_2 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ),
        .I1(\dwrRowbuf[1]_i_2_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ),
        .I3(\dwrRowbuf[30]_i_3_n_0 ),
        .I4(\dwrRowbuf[22]_i_3_n_0 ),
        .O(\dwrRowbuf[23]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \dwrRowbuf[24]_i_2 
       (.I0(\dwrRowbuf[24]_i_4_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\dwrRowbuf[28]_i_4_n_0 ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\dwrRowbuf[24]_i_5_n_0 ),
        .O(\dwrRowbuf[24]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1819" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[24]_i_4 
       (.I0(\dwrRowbuf[25]_i_5_n_0 ),
        .I1(\dwrRowbuf[25]_i_6_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[24] ),
        .O(\dwrRowbuf[24]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1818" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[24]_i_5 
       (.I0(\dwrRowbuf[25]_i_5_n_0 ),
        .I1(\dwrRowbuf[25]_i_6_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[26] ),
        .O(\dwrRowbuf[24]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h005F0011005F001F)) 
    \dwrRowbuf[25]_i_2 
       (.I0(\dwrRowbuf[1]_i_2_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[28] ),
        .I2(\dwrRowbuf[28]_i_5_n_0 ),
        .I3(\dwrRowbuf[25]_i_5_n_0 ),
        .I4(\dwrRowbuf[25]_i_6_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[26] ),
        .O(\dwrRowbuf[25]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \dwrRowbuf[25]_i_3 
       (.I0(\dwrRowbuf[25]_i_7_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\dwrRowbuf[29]_i_4_n_0 ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\dwrRowbuf[27]_i_4_n_0 ),
        .O(\dwrRowbuf[25]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \dwrRowbuf[25]_i_5 
       (.I0(\dwrRowbuf[2]_i_19_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ),
        .O(\dwrRowbuf[25]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h00000002)) 
    \dwrRowbuf[25]_i_6 
       (.I0(\dwrRowbuf_reg[0]_1 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ),
        .O(\dwrRowbuf[25]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1819" *) 
  LUT3 #(
    .INIT(8'h0B)) 
    \dwrRowbuf[25]_i_7 
       (.I0(\dwrRowbuf[25]_i_6_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[25] ),
        .I2(\dwrRowbuf[25]_i_5_n_0 ),
        .O(\dwrRowbuf[25]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h8888BB8B)) 
    \dwrRowbuf[26]_i_2 
       (.I0(\dwrRowbuf[27]_i_2_n_0 ),
        .I1(\dwrRowbuf[30]_i_3_n_0 ),
        .I2(\dwrRowbuf[30]_i_6_n_0 ),
        .I3(\dwrRowbuf[2]_i_2_n_0 ),
        .I4(\dwrRowbuf[25]_i_2_n_0 ),
        .O(\dwrRowbuf[26]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hDD0DDD0D0000DD0D)) 
    \dwrRowbuf[27]_i_2 
       (.I0(\dwrRowbuf[30]_i_10_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\dwrRowbuf[27]_i_4_n_0 ),
        .I3(\dwrRowbuf[28]_i_5_n_0 ),
        .I4(\dwrRowbuf[29]_i_4_n_0 ),
        .I5(\dwrRowbuf[1]_i_2_n_0 ),
        .O(\dwrRowbuf[27]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1818" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[27]_i_4 
       (.I0(\dwrRowbuf[25]_i_5_n_0 ),
        .I1(\dwrRowbuf[25]_i_6_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[27] ),
        .O(\dwrRowbuf[27]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hEE0EEE0E0000EE0E)) 
    \dwrRowbuf[28]_i_2 
       (.I0(\dwrRowbuf[2]_i_2_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ),
        .I2(\dwrRowbuf[28]_i_4_n_0 ),
        .I3(\dwrRowbuf[28]_i_5_n_0 ),
        .I4(\dwrRowbuf[30]_i_6_n_0 ),
        .I5(\dwrRowbuf[1]_i_2_n_0 ),
        .O(\dwrRowbuf[28]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1817" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[28]_i_4 
       (.I0(\dwrRowbuf[25]_i_5_n_0 ),
        .I1(\dwrRowbuf[25]_i_6_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[28] ),
        .O(\dwrRowbuf[28]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1793" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \dwrRowbuf[28]_i_5 
       (.I0(\dwrRowbuf[1]_i_6_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .O(\dwrRowbuf[28]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505FCFCF505FC0C0)) 
    \dwrRowbuf[29]_i_2 
       (.I0(\dwrRowbuf[29]_i_4_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ),
        .I2(\dwrRowbuf[1]_i_2_n_0 ),
        .I3(\dwrRowbuf[30]_i_10_n_0 ),
        .I4(\dwrRowbuf[2]_i_2_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ),
        .O(\dwrRowbuf[29]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1817" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[29]_i_4 
       (.I0(\dwrRowbuf[25]_i_5_n_0 ),
        .I1(\dwrRowbuf[25]_i_6_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[29] ),
        .O(\dwrRowbuf[29]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrRowbuf[2]_i_10 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ),
        .O(\dwrRowbuf[2]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h0051005100F100F7)) 
    \dwrRowbuf[2]_i_11 
       (.I0(\dwrRowbuf[30]_i_10_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[7] ),
        .I2(\dwrRowbuf[14]_i_8_n_0 ),
        .I3(\dwrRowbuf[14]_i_7_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[6] ),
        .I5(\dwrRowbuf[30]_i_6_n_0 ),
        .O(\dwrRowbuf[2]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h0051005100F100F7)) 
    \dwrRowbuf[2]_i_12 
       (.I0(\dwrRowbuf[29]_i_4_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[5] ),
        .I2(\dwrRowbuf[14]_i_8_n_0 ),
        .I3(\dwrRowbuf[14]_i_7_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[4] ),
        .I5(\dwrRowbuf[28]_i_4_n_0 ),
        .O(\dwrRowbuf[2]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hF3F2F200F2F0F200)) 
    \dwrRowbuf[2]_i_13 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[27] ),
        .I1(\dwrRowbuf[25]_i_6_n_0 ),
        .I2(\dwrRowbuf[25]_i_5_n_0 ),
        .I3(\dwrRowbuf[11]_i_4_n_0 ),
        .I4(\dwrRowbuf[10]_i_4_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[26] ),
        .O(\dwrRowbuf[2]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hAFAEAE00AEAAAE00)) 
    \dwrRowbuf[2]_i_14 
       (.I0(\dwrRowbuf[25]_i_5_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[25] ),
        .I2(\dwrRowbuf[25]_i_6_n_0 ),
        .I3(\dwrRowbuf[9]_i_4_n_0 ),
        .I4(\dwrRowbuf[8]_i_4_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[24] ),
        .O(\dwrRowbuf[2]_i_14_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrRowbuf[2]_i_15 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ),
        .O(\dwrRowbuf[2]_i_15_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrRowbuf[2]_i_16 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ),
        .O(\dwrRowbuf[2]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h0C000C0630363030)) 
    \dwrRowbuf[2]_i_17 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[7] ),
        .I1(\dwrRowbuf[30]_i_10_n_0 ),
        .I2(\dwrRowbuf[14]_i_7_n_0 ),
        .I3(\dwrRowbuf[14]_i_8_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[6] ),
        .I5(\dwrRowbuf[30]_i_6_n_0 ),
        .O(\dwrRowbuf[2]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h0C000C0630363030)) 
    \dwrRowbuf[2]_i_18 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[5] ),
        .I1(\dwrRowbuf[29]_i_4_n_0 ),
        .I2(\dwrRowbuf[14]_i_7_n_0 ),
        .I3(\dwrRowbuf[14]_i_8_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[4] ),
        .I5(\dwrRowbuf[28]_i_4_n_0 ),
        .O(\dwrRowbuf[2]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h05A0050605A00560)) 
    \dwrRowbuf[2]_i_19 
       (.I0(\dwrRowbuf[11]_i_4_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[27] ),
        .I2(\dwrRowbuf[10]_i_4_n_0 ),
        .I3(\dwrRowbuf[25]_i_5_n_0 ),
        .I4(\dwrRowbuf[25]_i_6_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[26] ),
        .O(\dwrRowbuf[2]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h407F4040407F7F7F)) 
    \dwrRowbuf[2]_i_2 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ),
        .I1(pvt2),
        .I2(pvt29_in),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[23] ),
        .I4(data5),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ),
        .O(\dwrRowbuf[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h05A0050605A00560)) 
    \dwrRowbuf[2]_i_20 
       (.I0(\dwrRowbuf[9]_i_4_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[25] ),
        .I2(\dwrRowbuf[8]_i_4_n_0 ),
        .I3(\dwrRowbuf[25]_i_5_n_0 ),
        .I4(\dwrRowbuf[25]_i_6_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[24] ),
        .O(\dwrRowbuf[2]_i_20_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrRowbuf[2]_i_21 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[23] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ),
        .O(\dwrRowbuf[2]_i_21_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrRowbuf[2]_i_22 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[21] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ),
        .O(\dwrRowbuf[2]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h0051005100F100F7)) 
    \dwrRowbuf[2]_i_23 
       (.I0(\dwrRowbuf[30]_i_10_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[19] ),
        .I2(\dwrRowbuf[22]_i_8_n_0 ),
        .I3(\dwrRowbuf[22]_i_7_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[18] ),
        .I5(\dwrRowbuf[30]_i_6_n_0 ),
        .O(\dwrRowbuf[2]_i_23_n_0 ));
  LUT6 #(
    .INIT(64'hF3F2F200F2F0F200)) 
    \dwrRowbuf[2]_i_24 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[29] ),
        .I1(\dwrRowbuf[25]_i_6_n_0 ),
        .I2(\dwrRowbuf[25]_i_5_n_0 ),
        .I3(\dwrRowbuf[21]_i_4_n_0 ),
        .I4(\dwrRowbuf[20]_i_4_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[28] ),
        .O(\dwrRowbuf[2]_i_24_n_0 ));
  LUT6 #(
    .INIT(64'hF3F2F200F2F0F200)) 
    \dwrRowbuf[2]_i_25 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[27] ),
        .I1(\dwrRowbuf[25]_i_6_n_0 ),
        .I2(\dwrRowbuf[25]_i_5_n_0 ),
        .I3(\dwrRowbuf[19]_i_4_n_0 ),
        .I4(\dwrRowbuf[18]_i_4_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[26] ),
        .O(\dwrRowbuf[2]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hAFAEAE00AEAAAE00)) 
    \dwrRowbuf[2]_i_26 
       (.I0(\dwrRowbuf[25]_i_5_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[25] ),
        .I2(\dwrRowbuf[25]_i_6_n_0 ),
        .I3(\dwrRowbuf[17]_i_4_n_0 ),
        .I4(\dwrRowbuf[16]_i_4_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[24] ),
        .O(\dwrRowbuf[2]_i_26_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrRowbuf[2]_i_27 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[23] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ),
        .O(\dwrRowbuf[2]_i_27_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrRowbuf[2]_i_28 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[21] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ),
        .O(\dwrRowbuf[2]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h0C000C0630363030)) 
    \dwrRowbuf[2]_i_29 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[19] ),
        .I1(\dwrRowbuf[30]_i_10_n_0 ),
        .I2(\dwrRowbuf[22]_i_7_n_0 ),
        .I3(\dwrRowbuf[22]_i_8_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[18] ),
        .I5(\dwrRowbuf[30]_i_6_n_0 ),
        .O(\dwrRowbuf[2]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h05A0050605A00560)) 
    \dwrRowbuf[2]_i_30 
       (.I0(\dwrRowbuf[21]_i_4_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[29] ),
        .I2(\dwrRowbuf[20]_i_4_n_0 ),
        .I3(\dwrRowbuf[25]_i_5_n_0 ),
        .I4(\dwrRowbuf[25]_i_6_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[28] ),
        .O(\dwrRowbuf[2]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h05A0050605A00560)) 
    \dwrRowbuf[2]_i_31 
       (.I0(\dwrRowbuf[19]_i_4_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[27] ),
        .I2(\dwrRowbuf[18]_i_4_n_0 ),
        .I3(\dwrRowbuf[25]_i_5_n_0 ),
        .I4(\dwrRowbuf[25]_i_6_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[26] ),
        .O(\dwrRowbuf[2]_i_31_n_0 ));
  LUT6 #(
    .INIT(64'h05A0050605A00560)) 
    \dwrRowbuf[2]_i_32 
       (.I0(\dwrRowbuf[17]_i_4_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[25] ),
        .I2(\dwrRowbuf[16]_i_4_n_0 ),
        .I3(\dwrRowbuf[25]_i_5_n_0 ),
        .I4(\dwrRowbuf[25]_i_6_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[24] ),
        .O(\dwrRowbuf[2]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrRowbuf[2]_i_33 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[23] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ),
        .O(\dwrRowbuf[2]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h44D4)) 
    \dwrRowbuf[2]_i_34 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[21] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ),
        .O(\dwrRowbuf[2]_i_34_n_0 ));
  LUT6 #(
    .INIT(64'h000D000D0C0D0D0F)) 
    \dwrRowbuf[2]_i_35 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[7] ),
        .I1(\dwrRowbuf[14]_i_8_n_0 ),
        .I2(\dwrRowbuf[14]_i_7_n_0 ),
        .I3(\dwrRowbuf[22]_i_6_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[6] ),
        .I5(\dwrRowbuf[22]_i_5_n_0 ),
        .O(\dwrRowbuf[2]_i_35_n_0 ));
  LUT6 #(
    .INIT(64'h000D000D0C0D0D0F)) 
    \dwrRowbuf[2]_i_36 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[5] ),
        .I1(\dwrRowbuf[14]_i_8_n_0 ),
        .I2(\dwrRowbuf[14]_i_7_n_0 ),
        .I3(\dwrRowbuf[21]_i_4_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[4] ),
        .I5(\dwrRowbuf[20]_i_4_n_0 ),
        .O(\dwrRowbuf[2]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h000D000D0C0D0D0F)) 
    \dwrRowbuf[2]_i_37 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[3] ),
        .I1(\dwrRowbuf[14]_i_8_n_0 ),
        .I2(\dwrRowbuf[14]_i_7_n_0 ),
        .I3(\dwrRowbuf[19]_i_4_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[2] ),
        .I5(\dwrRowbuf[18]_i_4_n_0 ),
        .O(\dwrRowbuf[2]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'h0051005150515155)) 
    \dwrRowbuf[2]_i_38 
       (.I0(\dwrRowbuf[14]_i_7_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[1] ),
        .I2(\dwrRowbuf[14]_i_8_n_0 ),
        .I3(\dwrRowbuf[17]_i_4_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[0] ),
        .I5(\dwrRowbuf[16]_i_4_n_0 ),
        .O(\dwrRowbuf[2]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrRowbuf[2]_i_39 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[23] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ),
        .O(\dwrRowbuf[2]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \dwrRowbuf[2]_i_40 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[21] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ),
        .O(\dwrRowbuf[2]_i_40_n_0 ));
  LUT6 #(
    .INIT(64'h05A0050605A00560)) 
    \dwrRowbuf[2]_i_41 
       (.I0(\dwrRowbuf[22]_i_6_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[7] ),
        .I2(\dwrRowbuf[22]_i_5_n_0 ),
        .I3(\dwrRowbuf[14]_i_7_n_0 ),
        .I4(\dwrRowbuf[14]_i_8_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[6] ),
        .O(\dwrRowbuf[2]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h05A0050605A00560)) 
    \dwrRowbuf[2]_i_42 
       (.I0(\dwrRowbuf[21]_i_4_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[5] ),
        .I2(\dwrRowbuf[20]_i_4_n_0 ),
        .I3(\dwrRowbuf[14]_i_7_n_0 ),
        .I4(\dwrRowbuf[14]_i_8_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[4] ),
        .O(\dwrRowbuf[2]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'h05A0050605A00560)) 
    \dwrRowbuf[2]_i_43 
       (.I0(\dwrRowbuf[19]_i_4_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[3] ),
        .I2(\dwrRowbuf[18]_i_4_n_0 ),
        .I3(\dwrRowbuf[14]_i_7_n_0 ),
        .I4(\dwrRowbuf[14]_i_8_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[2] ),
        .O(\dwrRowbuf[2]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h05A0050605A00560)) 
    \dwrRowbuf[2]_i_44 
       (.I0(\dwrRowbuf[17]_i_4_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[1] ),
        .I2(\dwrRowbuf[16]_i_4_n_0 ),
        .I3(\dwrRowbuf[14]_i_7_n_0 ),
        .I4(\dwrRowbuf[14]_i_8_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[0] ),
        .O(\dwrRowbuf[2]_i_44_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \dwrRowbuf[2]_i_9 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ),
        .O(\dwrRowbuf[2]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1816" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[30]_i_10 
       (.I0(\dwrRowbuf[25]_i_5_n_0 ),
        .I1(\dwrRowbuf[25]_i_6_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[31] ),
        .O(\dwrRowbuf[30]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'h2EFF2E00)) 
    \dwrRowbuf[30]_i_2 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\dwrRowbuf[30]_i_6_n_0 ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ),
        .O(\dwrRowbuf[30]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1793" *) 
  LUT4 #(
    .INIT(16'hAA08)) 
    \dwrRowbuf[30]_i_3 
       (.I0(\dwrRowbuf[2]_i_2_n_0 ),
        .I1(\dwrRowbuf[30]_i_7_n_0 ),
        .I2(\dwrRowbuf[30]_i_8_n_0 ),
        .I3(\dwrRowbuf[30]_i_9_n_0 ),
        .O(\dwrRowbuf[30]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1725" *) 
  LUT5 #(
    .INIT(32'h74FF7400)) 
    \dwrRowbuf[30]_i_4 
       (.I0(\dwrRowbuf[30]_i_10_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ),
        .I3(\dwrRowbuf[1]_i_2_n_0 ),
        .I4(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ),
        .O(\dwrRowbuf[30]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1816" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[30]_i_6 
       (.I0(\dwrRowbuf[25]_i_5_n_0 ),
        .I1(\dwrRowbuf[25]_i_6_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[30] ),
        .O(\dwrRowbuf[30]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hBF80BFBFBF808080)) 
    \dwrRowbuf[30]_i_7 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ),
        .I1(pvt2),
        .I2(pvt29_in),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ),
        .I4(data5),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ),
        .O(\dwrRowbuf[30]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hBF80BFBFBF808080)) 
    \dwrRowbuf[30]_i_8 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ),
        .I1(pvt2),
        .I2(pvt29_in),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[21] ),
        .I4(data5),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ),
        .O(\dwrRowbuf[30]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hBF80BFBFBF808080)) 
    \dwrRowbuf[30]_i_9 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ),
        .I1(pvt2),
        .I2(pvt29_in),
        .I3(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ),
        .I4(data5),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ),
        .O(\dwrRowbuf[30]_i_9_n_0 ));
  LUT4 #(
    .INIT(16'h0BFF)) 
    \dwrRowbuf[31]_i_1 
       (.I0(rgbFromVideoinAXIS_tvalidm2),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\dwrRowbuf[31]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \dwrRowbuf[31]_i_3 
       (.I0(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ),
        .I2(\dwrRowbuf[30]_i_3_n_0 ),
        .I3(\dwrRowbuf[31]_i_5_n_0 ),
        .I4(\dwrRowbuf[1]_i_2_n_0 ),
        .I5(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ),
        .O(\dwrRowbuf[31]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1725" *) 
  LUT3 #(
    .INIT(8'h74)) 
    \dwrRowbuf[31]_i_5 
       (.I0(\dwrRowbuf[30]_i_10_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ),
        .O(\dwrRowbuf[31]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h111F111F111FFFFF)) 
    \dwrRowbuf[8]_i_2 
       (.I0(\dwrRowbuf[12]_i_4_n_0 ),
        .I1(\dwrRowbuf[2]_i_2_n_0 ),
        .I2(\dwrRowbuf[1]_i_2_n_0 ),
        .I3(\dwrRowbuf[10]_i_4_n_0 ),
        .I4(\dwrRowbuf[8]_i_4_n_0 ),
        .I5(\dwrRowbuf[28]_i_5_n_0 ),
        .O(\dwrRowbuf[8]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1811" *) 
  LUT3 #(
    .INIT(8'h45)) 
    \dwrRowbuf[8]_i_4 
       (.I0(\dwrRowbuf[14]_i_7_n_0 ),
        .I1(\dwrRowbuf[14]_i_8_n_0 ),
        .I2(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[0] ),
        .O(\dwrRowbuf[8]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h111F111F111FFFFF)) 
    \dwrRowbuf[9]_i_2 
       (.I0(\dwrRowbuf[9]_i_4_n_0 ),
        .I1(\dwrRowbuf[28]_i_5_n_0 ),
        .I2(\dwrRowbuf[1]_i_2_n_0 ),
        .I3(\dwrRowbuf[11]_i_4_n_0 ),
        .I4(\dwrRowbuf[13]_i_4_n_0 ),
        .I5(\dwrRowbuf[2]_i_2_n_0 ),
        .O(\dwrRowbuf[9]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1811" *) 
  LUT3 #(
    .INIT(8'h0B)) 
    \dwrRowbuf[9]_i_4 
       (.I0(\dwrRowbuf[14]_i_8_n_0 ),
        .I1(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[1] ),
        .I2(\dwrRowbuf[14]_i_7_n_0 ),
        .O(\dwrRowbuf[9]_i_4_n_0 ));
  FDCE \dwrRowbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowAbuf_n_36),
        .Q(dwrRowbuf[0]));
  FDCE \dwrRowbuf_reg[10] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_187),
        .Q(dwrRowbuf[10]));
  FDCE \dwrRowbuf_reg[11] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_186),
        .Q(dwrRowbuf[11]));
  FDCE \dwrRowbuf_reg[12] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_185),
        .Q(dwrRowbuf[12]));
  FDCE \dwrRowbuf_reg[13] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_184),
        .Q(dwrRowbuf[13]));
  FDCE \dwrRowbuf_reg[14] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_183),
        .Q(dwrRowbuf[14]));
  FDCE \dwrRowbuf_reg[15] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_182),
        .Q(dwrRowbuf[15]));
  FDCE \dwrRowbuf_reg[16] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_181),
        .Q(dwrRowbuf[16]));
  FDCE \dwrRowbuf_reg[17] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_180),
        .Q(dwrRowbuf[17]));
  FDCE \dwrRowbuf_reg[18] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_179),
        .Q(dwrRowbuf[18]));
  FDCE \dwrRowbuf_reg[19] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_178),
        .Q(dwrRowbuf[19]));
  FDCE \dwrRowbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowAbuf_n_35),
        .Q(dwrRowbuf[1]));
  FDCE \dwrRowbuf_reg[20] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_177),
        .Q(dwrRowbuf[20]));
  FDCE \dwrRowbuf_reg[21] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_176),
        .Q(dwrRowbuf[21]));
  FDCE \dwrRowbuf_reg[22] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_175),
        .Q(dwrRowbuf[22]));
  FDCE \dwrRowbuf_reg[23] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_174),
        .Q(dwrRowbuf[23]));
  FDCE \dwrRowbuf_reg[24] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_173),
        .Q(dwrRowbuf[24]));
  FDCE \dwrRowbuf_reg[25] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_172),
        .Q(dwrRowbuf[25]));
  FDCE \dwrRowbuf_reg[26] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_171),
        .Q(dwrRowbuf[26]));
  FDCE \dwrRowbuf_reg[27] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_170),
        .Q(dwrRowbuf[27]));
  FDCE \dwrRowbuf_reg[28] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_169),
        .Q(dwrRowbuf[28]));
  FDCE \dwrRowbuf_reg[29] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_168),
        .Q(dwrRowbuf[29]));
  FDCE \dwrRowbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_190),
        .Q(dwrRowbuf[2]));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrRowbuf_reg[2]_i_6 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrRowbuf_reg[2]_i_6_CO_UNCONNECTED [7:6],pvt2,\dwrRowbuf_reg[2]_i_6_n_3 ,\dwrRowbuf_reg[2]_i_6_n_4 ,\dwrRowbuf_reg[2]_i_6_n_5 ,\dwrRowbuf_reg[2]_i_6_n_6 ,\dwrRowbuf_reg[2]_i_6_n_7 }),
        .DI({1'b0,1'b0,\dwrRowbuf[2]_i_9_n_0 ,\dwrRowbuf[2]_i_10_n_0 ,\dwrRowbuf[2]_i_11_n_0 ,\dwrRowbuf[2]_i_12_n_0 ,\dwrRowbuf[2]_i_13_n_0 ,\dwrRowbuf[2]_i_14_n_0 }),
        .O(\NLW_dwrRowbuf_reg[2]_i_6_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,\dwrRowbuf[2]_i_15_n_0 ,\dwrRowbuf[2]_i_16_n_0 ,\dwrRowbuf[2]_i_17_n_0 ,\dwrRowbuf[2]_i_18_n_0 ,\dwrRowbuf[2]_i_19_n_0 ,\dwrRowbuf[2]_i_20_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrRowbuf_reg[2]_i_7 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrRowbuf_reg[2]_i_7_CO_UNCONNECTED [7:6],pvt29_in,\dwrRowbuf_reg[2]_i_7_n_3 ,\dwrRowbuf_reg[2]_i_7_n_4 ,\dwrRowbuf_reg[2]_i_7_n_5 ,\dwrRowbuf_reg[2]_i_7_n_6 ,\dwrRowbuf_reg[2]_i_7_n_7 }),
        .DI({1'b0,1'b0,\dwrRowbuf[2]_i_21_n_0 ,\dwrRowbuf[2]_i_22_n_0 ,\dwrRowbuf[2]_i_23_n_0 ,\dwrRowbuf[2]_i_24_n_0 ,\dwrRowbuf[2]_i_25_n_0 ,\dwrRowbuf[2]_i_26_n_0 }),
        .O(\NLW_dwrRowbuf_reg[2]_i_7_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,\dwrRowbuf[2]_i_27_n_0 ,\dwrRowbuf[2]_i_28_n_0 ,\dwrRowbuf[2]_i_29_n_0 ,\dwrRowbuf[2]_i_30_n_0 ,\dwrRowbuf[2]_i_31_n_0 ,\dwrRowbuf[2]_i_32_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \dwrRowbuf_reg[2]_i_8 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\NLW_dwrRowbuf_reg[2]_i_8_CO_UNCONNECTED [7:6],data5,\dwrRowbuf_reg[2]_i_8_n_3 ,\dwrRowbuf_reg[2]_i_8_n_4 ,\dwrRowbuf_reg[2]_i_8_n_5 ,\dwrRowbuf_reg[2]_i_8_n_6 ,\dwrRowbuf_reg[2]_i_8_n_7 }),
        .DI({1'b0,1'b0,\dwrRowbuf[2]_i_33_n_0 ,\dwrRowbuf[2]_i_34_n_0 ,\dwrRowbuf[2]_i_35_n_0 ,\dwrRowbuf[2]_i_36_n_0 ,\dwrRowbuf[2]_i_37_n_0 ,\dwrRowbuf[2]_i_38_n_0 }),
        .O(\NLW_dwrRowbuf_reg[2]_i_8_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,\dwrRowbuf[2]_i_39_n_0 ,\dwrRowbuf[2]_i_40_n_0 ,\dwrRowbuf[2]_i_41_n_0 ,\dwrRowbuf[2]_i_42_n_0 ,\dwrRowbuf[2]_i_43_n_0 ,\dwrRowbuf[2]_i_44_n_0 }));
  FDCE \dwrRowbuf_reg[30] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_167),
        .Q(dwrRowbuf[30]));
  FDCE \dwrRowbuf_reg[31] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_166),
        .Q(dwrRowbuf[31]));
  FDCE \dwrRowbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowAbuf_n_34),
        .Q(dwrRowbuf[3]));
  FDCE \dwrRowbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowAbuf_n_33),
        .Q(dwrRowbuf[4]));
  FDCE \dwrRowbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowAbuf_n_32),
        .Q(dwrRowbuf[5]));
  FDCE \dwrRowbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowAbuf_n_31),
        .Q(dwrRowbuf[6]));
  FDCE \dwrRowbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowAbuf_n_30),
        .Q(dwrRowbuf[7]));
  FDCE \dwrRowbuf_reg[8] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_189),
        .Q(dwrRowbuf[8]));
  FDCE \dwrRowbuf_reg[9] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(myRowBbuf_n_188),
        .Q(dwrRowbuf[9]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[0]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [0]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [0]),
        .I4(\egrfifo_reg[2]_41 [0]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[0]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[100]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [100]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [100]),
        .I4(\egrfifo_reg[2]_41 [100]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[100]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[101]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [101]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [101]),
        .I4(\egrfifo_reg[2]_41 [101]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[101]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[102]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [102]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [102]),
        .I4(\egrfifo_reg[2]_41 [102]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[102]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[103]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [103]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [103]),
        .I4(\egrfifo_reg[2]_41 [103]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[103]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[104]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [104]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [104]),
        .I4(\egrfifo_reg[2]_41 [104]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[104]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[105]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [105]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [105]),
        .I4(\egrfifo_reg[2]_41 [105]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[105]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[106]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [106]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [106]),
        .I4(\egrfifo_reg[2]_41 [106]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[106]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[107]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [107]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [107]),
        .I4(\egrfifo_reg[2]_41 [107]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[107]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[108]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [108]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [108]),
        .I4(\egrfifo_reg[2]_41 [108]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[108]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[109]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [109]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [109]),
        .I4(\egrfifo_reg[2]_41 [109]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[109]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[10]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [10]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [10]),
        .I4(\egrfifo_reg[2]_41 [10]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[10]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[110]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [110]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [110]),
        .I4(\egrfifo_reg[2]_41 [110]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[110]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[111]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [111]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [111]),
        .I4(\egrfifo_reg[2]_41 [111]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[111]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[112]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [112]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [112]),
        .I4(\egrfifo_reg[2]_41 [112]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[112]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[113]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [113]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [113]),
        .I4(\egrfifo_reg[2]_41 [113]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[113]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[114]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [114]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [114]),
        .I4(\egrfifo_reg[2]_41 [114]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[114]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[115]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [115]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [115]),
        .I4(\egrfifo_reg[2]_41 [115]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[115]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[116]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [116]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [116]),
        .I4(\egrfifo_reg[2]_41 [116]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[116]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[117]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [117]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [117]),
        .I4(\egrfifo_reg[2]_41 [117]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[117]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[118]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [118]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [118]),
        .I4(\egrfifo_reg[2]_41 [118]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[118]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[119]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [119]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [119]),
        .I4(\egrfifo_reg[2]_41 [119]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[119]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[11]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [11]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [11]),
        .I4(\egrfifo_reg[2]_41 [11]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[11]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[120]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [120]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [120]),
        .I4(\egrfifo_reg[2]_41 [120]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[120]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[121]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [121]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [121]),
        .I4(\egrfifo_reg[2]_41 [121]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[121]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[122]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [122]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [122]),
        .I4(\egrfifo_reg[2]_41 [122]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[122]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[123]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [123]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [123]),
        .I4(\egrfifo_reg[2]_41 [123]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[123]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[124]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [124]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [124]),
        .I4(\egrfifo_reg[2]_41 [124]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[124]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[125]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [125]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [125]),
        .I4(\egrfifo_reg[2]_41 [125]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[125]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[126]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [126]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [126]),
        .I4(\egrfifo_reg[2]_41 [126]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[126]));
  LUT5 #(
    .INIT(32'hABABAAAB)) 
    \egrAXIS_tdata[127]_i_1 
       (.I0(\wordEgrRd[3]_i_4_n_0 ),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I4(p_0_in),
        .O(\egrAXIS_tdata[127]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[127]_i_2 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [127]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [127]),
        .I4(\egrfifo_reg[2]_41 [127]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[127]));
  LUT5 #(
    .INIT(32'h00005554)) 
    \egrAXIS_tdata[127]_i_3 
       (.I0(ixRdEgrfifo[0]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I4(ixRdEgrfifo[1]),
        .O(\egrAXIS_tdata[127]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h44444440)) 
    \egrAXIS_tdata[127]_i_4 
       (.I0(ixRdEgrfifo[1]),
        .I1(ixRdEgrfifo[0]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .O(\egrAXIS_tdata[127]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h55540000)) 
    \egrAXIS_tdata[127]_i_5 
       (.I0(ixRdEgrfifo[0]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I4(ixRdEgrfifo[1]),
        .O(\egrAXIS_tdata[127]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[12]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [12]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [12]),
        .I4(\egrfifo_reg[2]_41 [12]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[12]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[13]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [13]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [13]),
        .I4(\egrfifo_reg[2]_41 [13]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[13]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[14]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [14]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [14]),
        .I4(\egrfifo_reg[2]_41 [14]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[14]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[15]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [15]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [15]),
        .I4(\egrfifo_reg[2]_41 [15]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[15]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[16]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [16]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [16]),
        .I4(\egrfifo_reg[2]_41 [16]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[16]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[17]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [17]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [17]),
        .I4(\egrfifo_reg[2]_41 [17]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[17]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[18]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [18]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [18]),
        .I4(\egrfifo_reg[2]_41 [18]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[18]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[19]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [19]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [19]),
        .I4(\egrfifo_reg[2]_41 [19]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[19]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[1]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [1]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [1]),
        .I4(\egrfifo_reg[2]_41 [1]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[1]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[20]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [20]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [20]),
        .I4(\egrfifo_reg[2]_41 [20]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[20]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[21]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [21]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [21]),
        .I4(\egrfifo_reg[2]_41 [21]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[21]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[22]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [22]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [22]),
        .I4(\egrfifo_reg[2]_41 [22]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[22]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[23]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [23]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [23]),
        .I4(\egrfifo_reg[2]_41 [23]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[23]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[24]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [24]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [24]),
        .I4(\egrfifo_reg[2]_41 [24]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[24]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[25]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [25]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [25]),
        .I4(\egrfifo_reg[2]_41 [25]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[25]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[26]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [26]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [26]),
        .I4(\egrfifo_reg[2]_41 [26]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[26]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[27]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [27]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [27]),
        .I4(\egrfifo_reg[2]_41 [27]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[27]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[28]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [28]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [28]),
        .I4(\egrfifo_reg[2]_41 [28]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[28]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[29]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [29]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [29]),
        .I4(\egrfifo_reg[2]_41 [29]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[29]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[2]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [2]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [2]),
        .I4(\egrfifo_reg[2]_41 [2]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[2]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[30]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [30]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [30]),
        .I4(\egrfifo_reg[2]_41 [30]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[30]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[31]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [31]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [31]),
        .I4(\egrfifo_reg[2]_41 [31]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[31]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[32]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [32]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [32]),
        .I4(\egrfifo_reg[2]_41 [32]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[32]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[33]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [33]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [33]),
        .I4(\egrfifo_reg[2]_41 [33]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[33]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[34]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [34]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [34]),
        .I4(\egrfifo_reg[2]_41 [34]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[34]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[35]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [35]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [35]),
        .I4(\egrfifo_reg[2]_41 [35]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[35]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[36]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [36]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [36]),
        .I4(\egrfifo_reg[2]_41 [36]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[36]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[37]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [37]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [37]),
        .I4(\egrfifo_reg[2]_41 [37]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[37]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[38]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [38]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [38]),
        .I4(\egrfifo_reg[2]_41 [38]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[38]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[39]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [39]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [39]),
        .I4(\egrfifo_reg[2]_41 [39]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[39]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[3]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [3]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [3]),
        .I4(\egrfifo_reg[2]_41 [3]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[3]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[40]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [40]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [40]),
        .I4(\egrfifo_reg[2]_41 [40]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[40]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[41]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [41]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [41]),
        .I4(\egrfifo_reg[2]_41 [41]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[41]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[42]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [42]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [42]),
        .I4(\egrfifo_reg[2]_41 [42]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[42]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[43]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [43]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [43]),
        .I4(\egrfifo_reg[2]_41 [43]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[43]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[44]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [44]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [44]),
        .I4(\egrfifo_reg[2]_41 [44]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[44]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[45]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [45]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [45]),
        .I4(\egrfifo_reg[2]_41 [45]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[45]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[46]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [46]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [46]),
        .I4(\egrfifo_reg[2]_41 [46]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[46]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[47]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [47]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [47]),
        .I4(\egrfifo_reg[2]_41 [47]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[47]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[48]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [48]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [48]),
        .I4(\egrfifo_reg[2]_41 [48]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[48]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[49]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [49]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [49]),
        .I4(\egrfifo_reg[2]_41 [49]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[49]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[4]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [4]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [4]),
        .I4(\egrfifo_reg[2]_41 [4]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[4]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[50]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [50]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [50]),
        .I4(\egrfifo_reg[2]_41 [50]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[50]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[51]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [51]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [51]),
        .I4(\egrfifo_reg[2]_41 [51]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[51]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[52]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [52]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [52]),
        .I4(\egrfifo_reg[2]_41 [52]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[52]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[53]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [53]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [53]),
        .I4(\egrfifo_reg[2]_41 [53]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[53]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[54]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [54]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [54]),
        .I4(\egrfifo_reg[2]_41 [54]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[54]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[55]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [55]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [55]),
        .I4(\egrfifo_reg[2]_41 [55]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[55]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[56]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [56]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [56]),
        .I4(\egrfifo_reg[2]_41 [56]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[56]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[57]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [57]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [57]),
        .I4(\egrfifo_reg[2]_41 [57]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[57]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[58]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [58]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [58]),
        .I4(\egrfifo_reg[2]_41 [58]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[58]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[59]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [59]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [59]),
        .I4(\egrfifo_reg[2]_41 [59]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[59]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[5]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [5]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [5]),
        .I4(\egrfifo_reg[2]_41 [5]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[5]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[60]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [60]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [60]),
        .I4(\egrfifo_reg[2]_41 [60]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[60]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[61]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [61]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [61]),
        .I4(\egrfifo_reg[2]_41 [61]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[61]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[62]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [62]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [62]),
        .I4(\egrfifo_reg[2]_41 [62]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[62]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[63]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [63]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [63]),
        .I4(\egrfifo_reg[2]_41 [63]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[63]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[64]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [64]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [64]),
        .I4(\egrfifo_reg[2]_41 [64]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[64]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[65]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [65]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [65]),
        .I4(\egrfifo_reg[2]_41 [65]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[65]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[66]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [66]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [66]),
        .I4(\egrfifo_reg[2]_41 [66]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[66]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[67]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [67]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [67]),
        .I4(\egrfifo_reg[2]_41 [67]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[67]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[68]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [68]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [68]),
        .I4(\egrfifo_reg[2]_41 [68]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[68]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[69]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [69]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [69]),
        .I4(\egrfifo_reg[2]_41 [69]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[69]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[6]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [6]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [6]),
        .I4(\egrfifo_reg[2]_41 [6]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[6]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[70]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [70]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [70]),
        .I4(\egrfifo_reg[2]_41 [70]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[70]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[71]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [71]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [71]),
        .I4(\egrfifo_reg[2]_41 [71]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[71]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[72]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [72]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [72]),
        .I4(\egrfifo_reg[2]_41 [72]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[72]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[73]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [73]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [73]),
        .I4(\egrfifo_reg[2]_41 [73]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[73]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[74]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [74]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [74]),
        .I4(\egrfifo_reg[2]_41 [74]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[74]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[75]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [75]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [75]),
        .I4(\egrfifo_reg[2]_41 [75]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[75]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[76]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [76]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [76]),
        .I4(\egrfifo_reg[2]_41 [76]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[76]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[77]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [77]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [77]),
        .I4(\egrfifo_reg[2]_41 [77]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[77]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[78]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [78]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [78]),
        .I4(\egrfifo_reg[2]_41 [78]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[78]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[79]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [79]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [79]),
        .I4(\egrfifo_reg[2]_41 [79]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[79]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[7]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [7]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [7]),
        .I4(\egrfifo_reg[2]_41 [7]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[7]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[80]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [80]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [80]),
        .I4(\egrfifo_reg[2]_41 [80]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[80]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[81]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [81]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [81]),
        .I4(\egrfifo_reg[2]_41 [81]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[81]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[82]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [82]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [82]),
        .I4(\egrfifo_reg[2]_41 [82]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[82]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[83]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [83]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [83]),
        .I4(\egrfifo_reg[2]_41 [83]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[83]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[84]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [84]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [84]),
        .I4(\egrfifo_reg[2]_41 [84]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[84]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[85]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [85]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [85]),
        .I4(\egrfifo_reg[2]_41 [85]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[85]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[86]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [86]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [86]),
        .I4(\egrfifo_reg[2]_41 [86]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[86]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[87]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [87]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [87]),
        .I4(\egrfifo_reg[2]_41 [87]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[87]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[88]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [88]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [88]),
        .I4(\egrfifo_reg[2]_41 [88]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[88]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[89]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [89]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [89]),
        .I4(\egrfifo_reg[2]_41 [89]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[89]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[8]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [8]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [8]),
        .I4(\egrfifo_reg[2]_41 [8]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[8]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[90]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [90]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [90]),
        .I4(\egrfifo_reg[2]_41 [90]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[90]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[91]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [91]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [91]),
        .I4(\egrfifo_reg[2]_41 [91]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[91]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[92]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [92]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [92]),
        .I4(\egrfifo_reg[2]_41 [92]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[92]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[93]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [93]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [93]),
        .I4(\egrfifo_reg[2]_41 [93]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[93]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[94]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [94]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [94]),
        .I4(\egrfifo_reg[2]_41 [94]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[94]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[95]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [95]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [95]),
        .I4(\egrfifo_reg[2]_41 [95]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[95]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[96]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [96]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [96]),
        .I4(\egrfifo_reg[2]_41 [96]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[96]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[97]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [97]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [97]),
        .I4(\egrfifo_reg[2]_41 [97]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[97]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[98]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [98]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [98]),
        .I4(\egrfifo_reg[2]_41 [98]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[98]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[99]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [99]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [99]),
        .I4(\egrfifo_reg[2]_41 [99]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[99]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \egrAXIS_tdata[9]_i_1 
       (.I0(\egrAXIS_tdata[127]_i_3_n_0 ),
        .I1(\egrfifo_reg[0]_43 [9]),
        .I2(\egrAXIS_tdata[127]_i_4_n_0 ),
        .I3(\egrfifo_reg[1]_42 [9]),
        .I4(\egrfifo_reg[2]_41 [9]),
        .I5(\egrAXIS_tdata[127]_i_5_n_0 ),
        .O(egrAXIS_tdata[9]));
  FDCE \egrAXIS_tdata_reg[0] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[0]),
        .Q(wrAAXI_wdata[0]));
  FDCE \egrAXIS_tdata_reg[100] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[100]),
        .Q(wrAAXI_wdata[100]));
  FDCE \egrAXIS_tdata_reg[101] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[101]),
        .Q(wrAAXI_wdata[101]));
  FDCE \egrAXIS_tdata_reg[102] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[102]),
        .Q(wrAAXI_wdata[102]));
  FDCE \egrAXIS_tdata_reg[103] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[103]),
        .Q(wrAAXI_wdata[103]));
  FDCE \egrAXIS_tdata_reg[104] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[104]),
        .Q(wrAAXI_wdata[104]));
  FDCE \egrAXIS_tdata_reg[105] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[105]),
        .Q(wrAAXI_wdata[105]));
  FDCE \egrAXIS_tdata_reg[106] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[106]),
        .Q(wrAAXI_wdata[106]));
  FDCE \egrAXIS_tdata_reg[107] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[107]),
        .Q(wrAAXI_wdata[107]));
  FDCE \egrAXIS_tdata_reg[108] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[108]),
        .Q(wrAAXI_wdata[108]));
  FDCE \egrAXIS_tdata_reg[109] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[109]),
        .Q(wrAAXI_wdata[109]));
  FDCE \egrAXIS_tdata_reg[10] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[10]),
        .Q(wrAAXI_wdata[10]));
  FDCE \egrAXIS_tdata_reg[110] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[110]),
        .Q(wrAAXI_wdata[110]));
  FDCE \egrAXIS_tdata_reg[111] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[111]),
        .Q(wrAAXI_wdata[111]));
  FDCE \egrAXIS_tdata_reg[112] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[112]),
        .Q(wrAAXI_wdata[112]));
  FDCE \egrAXIS_tdata_reg[113] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[113]),
        .Q(wrAAXI_wdata[113]));
  FDCE \egrAXIS_tdata_reg[114] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[114]),
        .Q(wrAAXI_wdata[114]));
  FDCE \egrAXIS_tdata_reg[115] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[115]),
        .Q(wrAAXI_wdata[115]));
  FDCE \egrAXIS_tdata_reg[116] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[116]),
        .Q(wrAAXI_wdata[116]));
  FDCE \egrAXIS_tdata_reg[117] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[117]),
        .Q(wrAAXI_wdata[117]));
  FDCE \egrAXIS_tdata_reg[118] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[118]),
        .Q(wrAAXI_wdata[118]));
  FDCE \egrAXIS_tdata_reg[119] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[119]),
        .Q(wrAAXI_wdata[119]));
  FDCE \egrAXIS_tdata_reg[11] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[11]),
        .Q(wrAAXI_wdata[11]));
  FDCE \egrAXIS_tdata_reg[120] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[120]),
        .Q(wrAAXI_wdata[120]));
  FDCE \egrAXIS_tdata_reg[121] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[121]),
        .Q(wrAAXI_wdata[121]));
  FDCE \egrAXIS_tdata_reg[122] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[122]),
        .Q(wrAAXI_wdata[122]));
  FDCE \egrAXIS_tdata_reg[123] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[123]),
        .Q(wrAAXI_wdata[123]));
  FDCE \egrAXIS_tdata_reg[124] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[124]),
        .Q(wrAAXI_wdata[124]));
  FDCE \egrAXIS_tdata_reg[125] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[125]),
        .Q(wrAAXI_wdata[125]));
  FDCE \egrAXIS_tdata_reg[126] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[126]),
        .Q(wrAAXI_wdata[126]));
  FDCE \egrAXIS_tdata_reg[127] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[127]),
        .Q(wrAAXI_wdata[127]));
  FDCE \egrAXIS_tdata_reg[12] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[12]),
        .Q(wrAAXI_wdata[12]));
  FDCE \egrAXIS_tdata_reg[13] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[13]),
        .Q(wrAAXI_wdata[13]));
  FDCE \egrAXIS_tdata_reg[14] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[14]),
        .Q(wrAAXI_wdata[14]));
  FDCE \egrAXIS_tdata_reg[15] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[15]),
        .Q(wrAAXI_wdata[15]));
  FDCE \egrAXIS_tdata_reg[16] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[16]),
        .Q(wrAAXI_wdata[16]));
  FDCE \egrAXIS_tdata_reg[17] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[17]),
        .Q(wrAAXI_wdata[17]));
  FDCE \egrAXIS_tdata_reg[18] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[18]),
        .Q(wrAAXI_wdata[18]));
  FDCE \egrAXIS_tdata_reg[19] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[19]),
        .Q(wrAAXI_wdata[19]));
  FDCE \egrAXIS_tdata_reg[1] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[1]),
        .Q(wrAAXI_wdata[1]));
  FDCE \egrAXIS_tdata_reg[20] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[20]),
        .Q(wrAAXI_wdata[20]));
  FDCE \egrAXIS_tdata_reg[21] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[21]),
        .Q(wrAAXI_wdata[21]));
  FDCE \egrAXIS_tdata_reg[22] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[22]),
        .Q(wrAAXI_wdata[22]));
  FDCE \egrAXIS_tdata_reg[23] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[23]),
        .Q(wrAAXI_wdata[23]));
  FDCE \egrAXIS_tdata_reg[24] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[24]),
        .Q(wrAAXI_wdata[24]));
  FDCE \egrAXIS_tdata_reg[25] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[25]),
        .Q(wrAAXI_wdata[25]));
  FDCE \egrAXIS_tdata_reg[26] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[26]),
        .Q(wrAAXI_wdata[26]));
  FDCE \egrAXIS_tdata_reg[27] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[27]),
        .Q(wrAAXI_wdata[27]));
  FDCE \egrAXIS_tdata_reg[28] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[28]),
        .Q(wrAAXI_wdata[28]));
  FDCE \egrAXIS_tdata_reg[29] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[29]),
        .Q(wrAAXI_wdata[29]));
  FDCE \egrAXIS_tdata_reg[2] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[2]),
        .Q(wrAAXI_wdata[2]));
  FDCE \egrAXIS_tdata_reg[30] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[30]),
        .Q(wrAAXI_wdata[30]));
  FDCE \egrAXIS_tdata_reg[31] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[31]),
        .Q(wrAAXI_wdata[31]));
  FDCE \egrAXIS_tdata_reg[32] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[32]),
        .Q(wrAAXI_wdata[32]));
  FDCE \egrAXIS_tdata_reg[33] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[33]),
        .Q(wrAAXI_wdata[33]));
  FDCE \egrAXIS_tdata_reg[34] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[34]),
        .Q(wrAAXI_wdata[34]));
  FDCE \egrAXIS_tdata_reg[35] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[35]),
        .Q(wrAAXI_wdata[35]));
  FDCE \egrAXIS_tdata_reg[36] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[36]),
        .Q(wrAAXI_wdata[36]));
  FDCE \egrAXIS_tdata_reg[37] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[37]),
        .Q(wrAAXI_wdata[37]));
  FDCE \egrAXIS_tdata_reg[38] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[38]),
        .Q(wrAAXI_wdata[38]));
  FDCE \egrAXIS_tdata_reg[39] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[39]),
        .Q(wrAAXI_wdata[39]));
  FDCE \egrAXIS_tdata_reg[3] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[3]),
        .Q(wrAAXI_wdata[3]));
  FDCE \egrAXIS_tdata_reg[40] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[40]),
        .Q(wrAAXI_wdata[40]));
  FDCE \egrAXIS_tdata_reg[41] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[41]),
        .Q(wrAAXI_wdata[41]));
  FDCE \egrAXIS_tdata_reg[42] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[42]),
        .Q(wrAAXI_wdata[42]));
  FDCE \egrAXIS_tdata_reg[43] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[43]),
        .Q(wrAAXI_wdata[43]));
  FDCE \egrAXIS_tdata_reg[44] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[44]),
        .Q(wrAAXI_wdata[44]));
  FDCE \egrAXIS_tdata_reg[45] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[45]),
        .Q(wrAAXI_wdata[45]));
  FDCE \egrAXIS_tdata_reg[46] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[46]),
        .Q(wrAAXI_wdata[46]));
  FDCE \egrAXIS_tdata_reg[47] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[47]),
        .Q(wrAAXI_wdata[47]));
  FDCE \egrAXIS_tdata_reg[48] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[48]),
        .Q(wrAAXI_wdata[48]));
  FDCE \egrAXIS_tdata_reg[49] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[49]),
        .Q(wrAAXI_wdata[49]));
  FDCE \egrAXIS_tdata_reg[4] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[4]),
        .Q(wrAAXI_wdata[4]));
  FDCE \egrAXIS_tdata_reg[50] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[50]),
        .Q(wrAAXI_wdata[50]));
  FDCE \egrAXIS_tdata_reg[51] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[51]),
        .Q(wrAAXI_wdata[51]));
  FDCE \egrAXIS_tdata_reg[52] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[52]),
        .Q(wrAAXI_wdata[52]));
  FDCE \egrAXIS_tdata_reg[53] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[53]),
        .Q(wrAAXI_wdata[53]));
  FDCE \egrAXIS_tdata_reg[54] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[54]),
        .Q(wrAAXI_wdata[54]));
  FDCE \egrAXIS_tdata_reg[55] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[55]),
        .Q(wrAAXI_wdata[55]));
  FDCE \egrAXIS_tdata_reg[56] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[56]),
        .Q(wrAAXI_wdata[56]));
  FDCE \egrAXIS_tdata_reg[57] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[57]),
        .Q(wrAAXI_wdata[57]));
  FDCE \egrAXIS_tdata_reg[58] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[58]),
        .Q(wrAAXI_wdata[58]));
  FDCE \egrAXIS_tdata_reg[59] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[59]),
        .Q(wrAAXI_wdata[59]));
  FDCE \egrAXIS_tdata_reg[5] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[5]),
        .Q(wrAAXI_wdata[5]));
  FDCE \egrAXIS_tdata_reg[60] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[60]),
        .Q(wrAAXI_wdata[60]));
  FDCE \egrAXIS_tdata_reg[61] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[61]),
        .Q(wrAAXI_wdata[61]));
  FDCE \egrAXIS_tdata_reg[62] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[62]),
        .Q(wrAAXI_wdata[62]));
  FDCE \egrAXIS_tdata_reg[63] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[63]),
        .Q(wrAAXI_wdata[63]));
  FDCE \egrAXIS_tdata_reg[64] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[64]),
        .Q(wrAAXI_wdata[64]));
  FDCE \egrAXIS_tdata_reg[65] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[65]),
        .Q(wrAAXI_wdata[65]));
  FDCE \egrAXIS_tdata_reg[66] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[66]),
        .Q(wrAAXI_wdata[66]));
  FDCE \egrAXIS_tdata_reg[67] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[67]),
        .Q(wrAAXI_wdata[67]));
  FDCE \egrAXIS_tdata_reg[68] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[68]),
        .Q(wrAAXI_wdata[68]));
  FDCE \egrAXIS_tdata_reg[69] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[69]),
        .Q(wrAAXI_wdata[69]));
  FDCE \egrAXIS_tdata_reg[6] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[6]),
        .Q(wrAAXI_wdata[6]));
  FDCE \egrAXIS_tdata_reg[70] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[70]),
        .Q(wrAAXI_wdata[70]));
  FDCE \egrAXIS_tdata_reg[71] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[71]),
        .Q(wrAAXI_wdata[71]));
  FDCE \egrAXIS_tdata_reg[72] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[72]),
        .Q(wrAAXI_wdata[72]));
  FDCE \egrAXIS_tdata_reg[73] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[73]),
        .Q(wrAAXI_wdata[73]));
  FDCE \egrAXIS_tdata_reg[74] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[74]),
        .Q(wrAAXI_wdata[74]));
  FDCE \egrAXIS_tdata_reg[75] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[75]),
        .Q(wrAAXI_wdata[75]));
  FDCE \egrAXIS_tdata_reg[76] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[76]),
        .Q(wrAAXI_wdata[76]));
  FDCE \egrAXIS_tdata_reg[77] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[77]),
        .Q(wrAAXI_wdata[77]));
  FDCE \egrAXIS_tdata_reg[78] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[78]),
        .Q(wrAAXI_wdata[78]));
  FDCE \egrAXIS_tdata_reg[79] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[79]),
        .Q(wrAAXI_wdata[79]));
  FDCE \egrAXIS_tdata_reg[7] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[7]),
        .Q(wrAAXI_wdata[7]));
  FDCE \egrAXIS_tdata_reg[80] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[80]),
        .Q(wrAAXI_wdata[80]));
  FDCE \egrAXIS_tdata_reg[81] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[81]),
        .Q(wrAAXI_wdata[81]));
  FDCE \egrAXIS_tdata_reg[82] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[82]),
        .Q(wrAAXI_wdata[82]));
  FDCE \egrAXIS_tdata_reg[83] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[83]),
        .Q(wrAAXI_wdata[83]));
  FDCE \egrAXIS_tdata_reg[84] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[84]),
        .Q(wrAAXI_wdata[84]));
  FDCE \egrAXIS_tdata_reg[85] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[85]),
        .Q(wrAAXI_wdata[85]));
  FDCE \egrAXIS_tdata_reg[86] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[86]),
        .Q(wrAAXI_wdata[86]));
  FDCE \egrAXIS_tdata_reg[87] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[87]),
        .Q(wrAAXI_wdata[87]));
  FDCE \egrAXIS_tdata_reg[88] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[88]),
        .Q(wrAAXI_wdata[88]));
  FDCE \egrAXIS_tdata_reg[89] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[89]),
        .Q(wrAAXI_wdata[89]));
  FDCE \egrAXIS_tdata_reg[8] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[8]),
        .Q(wrAAXI_wdata[8]));
  FDCE \egrAXIS_tdata_reg[90] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[90]),
        .Q(wrAAXI_wdata[90]));
  FDCE \egrAXIS_tdata_reg[91] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[91]),
        .Q(wrAAXI_wdata[91]));
  FDCE \egrAXIS_tdata_reg[92] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[92]),
        .Q(wrAAXI_wdata[92]));
  FDCE \egrAXIS_tdata_reg[93] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[93]),
        .Q(wrAAXI_wdata[93]));
  FDCE \egrAXIS_tdata_reg[94] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[94]),
        .Q(wrAAXI_wdata[94]));
  FDCE \egrAXIS_tdata_reg[95] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[95]),
        .Q(wrAAXI_wdata[95]));
  FDCE \egrAXIS_tdata_reg[96] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[96]),
        .Q(wrAAXI_wdata[96]));
  FDCE \egrAXIS_tdata_reg[97] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[97]),
        .Q(wrAAXI_wdata[97]));
  FDCE \egrAXIS_tdata_reg[98] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[98]),
        .Q(wrAAXI_wdata[98]));
  FDCE \egrAXIS_tdata_reg[99] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[99]),
        .Q(wrAAXI_wdata[99]));
  FDCE \egrAXIS_tdata_reg[9] 
       (.C(memclk),
        .CE(\egrAXIS_tdata[127]_i_1_n_0 ),
        .CLR(AR),
        .D(egrAXIS_tdata[9]),
        .Q(wrAAXI_wdata[9]));
  LUT6 #(
    .INIT(64'hBABFBBBF8A8F888F)) 
    egrAXIS_tlast_i_1
       (.I0(egrAXIS_tlast_i_2_n_0),
        .I1(egrAXIS_tlast_i_3_n_0),
        .I2(\wordEgrWr[3]_i_4_n_0 ),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I4(p_0_in),
        .I5(egrAXIS_tlast),
        .O(egrAXIS_tlast_i_1_n_0));
  LUT6 #(
    .INIT(64'h4800000000000000)) 
    egrAXIS_tlast_i_2
       (.I0(wordEgrRd[0]),
        .I1(wordEgrRd[1]),
        .I2(\wordEgrLast_reg_n_0_[2] ),
        .I3(\wordEgrWr[3]_i_4_n_0 ),
        .I4(wordEgrRd[2]),
        .I5(wordEgrRd[3]),
        .O(egrAXIS_tlast_i_2_n_0));
  LUT6 #(
    .INIT(64'h2800000000000000)) 
    egrAXIS_tlast_i_3
       (.I0(\wordEgrRd[3]_i_4_n_0 ),
        .I1(\wordEgrLast_reg_n_0_[2] ),
        .I2(wordEgrRd[0]),
        .I3(wordEgrRd[1]),
        .I4(wordEgrRd[2]),
        .I5(wordEgrRd[3]),
        .O(egrAXIS_tlast_i_3_n_0));
  FDPE egrAXIS_tlast_reg
       (.C(memclk),
        .CE(1'b1),
        .D(egrAXIS_tlast_i_1_n_0),
        .PRE(AR),
        .Q(egrAXIS_tlast));
  LUT6 #(
    .INIT(64'h02020202020202FF)) 
    \egrfifo[0][127]_i_1 
       (.I0(\egrfifo[2][127]_i_3_n_0 ),
        .I1(ixWrEgrfifo[0]),
        .I2(ixWrEgrfifo[1]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I5(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .O(\egrfifo[0][127]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h08080808080808FF)) 
    \egrfifo[1][127]_i_1 
       (.I0(\egrfifo[2][127]_i_3_n_0 ),
        .I1(ixWrEgrfifo[0]),
        .I2(ixWrEgrfifo[1]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I5(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .O(\egrfifo[1][127]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h40404040404040FF)) 
    \egrfifo[2][127]_i_1 
       (.I0(ixWrEgrfifo[0]),
        .I1(ixWrEgrfifo[1]),
        .I2(\egrfifo[2][127]_i_3_n_0 ),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I5(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .O(\egrfifo[2][127]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00F0000000EE00EE)) 
    \egrfifo[2][127]_i_3 
       (.I0(\i_reg[0]__0_n_0 ),
        .I1(p_0_in),
        .I2(enRowbufBEgrstrm1),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I5(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .O(\egrfifo[2][127]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1800" *) 
  LUT4 #(
    .INIT(16'hFE00)) 
    \egrfifo[2][127]_i_4 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I3(liveBNotA_memclk),
        .O(\egrfifo[2][127]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1799" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \egrfifo[2][127]_i_5 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I3(liveBNotA_memclk),
        .O(\egrfifo[2][127]_i_5_n_0 ));
  FDCE \egrfifo_reg[0][0] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [0]),
        .Q(\egrfifo_reg[0]_43 [0]));
  FDCE \egrfifo_reg[0][100] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [100]),
        .Q(\egrfifo_reg[0]_43 [100]));
  FDCE \egrfifo_reg[0][101] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [101]),
        .Q(\egrfifo_reg[0]_43 [101]));
  FDCE \egrfifo_reg[0][102] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [102]),
        .Q(\egrfifo_reg[0]_43 [102]));
  FDCE \egrfifo_reg[0][103] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [103]),
        .Q(\egrfifo_reg[0]_43 [103]));
  FDCE \egrfifo_reg[0][104] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [104]),
        .Q(\egrfifo_reg[0]_43 [104]));
  FDCE \egrfifo_reg[0][105] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [105]),
        .Q(\egrfifo_reg[0]_43 [105]));
  FDCE \egrfifo_reg[0][106] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [106]),
        .Q(\egrfifo_reg[0]_43 [106]));
  FDCE \egrfifo_reg[0][107] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [107]),
        .Q(\egrfifo_reg[0]_43 [107]));
  FDCE \egrfifo_reg[0][108] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [108]),
        .Q(\egrfifo_reg[0]_43 [108]));
  FDCE \egrfifo_reg[0][109] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [109]),
        .Q(\egrfifo_reg[0]_43 [109]));
  FDCE \egrfifo_reg[0][10] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [10]),
        .Q(\egrfifo_reg[0]_43 [10]));
  FDCE \egrfifo_reg[0][110] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [110]),
        .Q(\egrfifo_reg[0]_43 [110]));
  FDCE \egrfifo_reg[0][111] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [111]),
        .Q(\egrfifo_reg[0]_43 [111]));
  FDCE \egrfifo_reg[0][112] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [112]),
        .Q(\egrfifo_reg[0]_43 [112]));
  FDCE \egrfifo_reg[0][113] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [113]),
        .Q(\egrfifo_reg[0]_43 [113]));
  FDCE \egrfifo_reg[0][114] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [114]),
        .Q(\egrfifo_reg[0]_43 [114]));
  FDCE \egrfifo_reg[0][115] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [115]),
        .Q(\egrfifo_reg[0]_43 [115]));
  FDCE \egrfifo_reg[0][116] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [116]),
        .Q(\egrfifo_reg[0]_43 [116]));
  FDCE \egrfifo_reg[0][117] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [117]),
        .Q(\egrfifo_reg[0]_43 [117]));
  FDCE \egrfifo_reg[0][118] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [118]),
        .Q(\egrfifo_reg[0]_43 [118]));
  FDCE \egrfifo_reg[0][119] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [119]),
        .Q(\egrfifo_reg[0]_43 [119]));
  FDCE \egrfifo_reg[0][11] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [11]),
        .Q(\egrfifo_reg[0]_43 [11]));
  FDCE \egrfifo_reg[0][120] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [120]),
        .Q(\egrfifo_reg[0]_43 [120]));
  FDCE \egrfifo_reg[0][121] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [121]),
        .Q(\egrfifo_reg[0]_43 [121]));
  FDCE \egrfifo_reg[0][122] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [122]),
        .Q(\egrfifo_reg[0]_43 [122]));
  FDCE \egrfifo_reg[0][123] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [123]),
        .Q(\egrfifo_reg[0]_43 [123]));
  FDCE \egrfifo_reg[0][124] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [124]),
        .Q(\egrfifo_reg[0]_43 [124]));
  FDCE \egrfifo_reg[0][125] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [125]),
        .Q(\egrfifo_reg[0]_43 [125]));
  FDCE \egrfifo_reg[0][126] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [126]),
        .Q(\egrfifo_reg[0]_43 [126]));
  FDCE \egrfifo_reg[0][127] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [127]),
        .Q(\egrfifo_reg[0]_43 [127]));
  FDCE \egrfifo_reg[0][12] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [12]),
        .Q(\egrfifo_reg[0]_43 [12]));
  FDCE \egrfifo_reg[0][13] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [13]),
        .Q(\egrfifo_reg[0]_43 [13]));
  FDCE \egrfifo_reg[0][14] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [14]),
        .Q(\egrfifo_reg[0]_43 [14]));
  FDCE \egrfifo_reg[0][15] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [15]),
        .Q(\egrfifo_reg[0]_43 [15]));
  FDCE \egrfifo_reg[0][16] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [16]),
        .Q(\egrfifo_reg[0]_43 [16]));
  FDCE \egrfifo_reg[0][17] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [17]),
        .Q(\egrfifo_reg[0]_43 [17]));
  FDCE \egrfifo_reg[0][18] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [18]),
        .Q(\egrfifo_reg[0]_43 [18]));
  FDCE \egrfifo_reg[0][19] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [19]),
        .Q(\egrfifo_reg[0]_43 [19]));
  FDCE \egrfifo_reg[0][1] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [1]),
        .Q(\egrfifo_reg[0]_43 [1]));
  FDCE \egrfifo_reg[0][20] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [20]),
        .Q(\egrfifo_reg[0]_43 [20]));
  FDCE \egrfifo_reg[0][21] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [21]),
        .Q(\egrfifo_reg[0]_43 [21]));
  FDCE \egrfifo_reg[0][22] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [22]),
        .Q(\egrfifo_reg[0]_43 [22]));
  FDCE \egrfifo_reg[0][23] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [23]),
        .Q(\egrfifo_reg[0]_43 [23]));
  FDCE \egrfifo_reg[0][24] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [24]),
        .Q(\egrfifo_reg[0]_43 [24]));
  FDCE \egrfifo_reg[0][25] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [25]),
        .Q(\egrfifo_reg[0]_43 [25]));
  FDCE \egrfifo_reg[0][26] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [26]),
        .Q(\egrfifo_reg[0]_43 [26]));
  FDCE \egrfifo_reg[0][27] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [27]),
        .Q(\egrfifo_reg[0]_43 [27]));
  FDCE \egrfifo_reg[0][28] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [28]),
        .Q(\egrfifo_reg[0]_43 [28]));
  FDCE \egrfifo_reg[0][29] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [29]),
        .Q(\egrfifo_reg[0]_43 [29]));
  FDCE \egrfifo_reg[0][2] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [2]),
        .Q(\egrfifo_reg[0]_43 [2]));
  FDCE \egrfifo_reg[0][30] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [30]),
        .Q(\egrfifo_reg[0]_43 [30]));
  FDCE \egrfifo_reg[0][31] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [31]),
        .Q(\egrfifo_reg[0]_43 [31]));
  FDCE \egrfifo_reg[0][32] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [32]),
        .Q(\egrfifo_reg[0]_43 [32]));
  FDCE \egrfifo_reg[0][33] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [33]),
        .Q(\egrfifo_reg[0]_43 [33]));
  FDCE \egrfifo_reg[0][34] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [34]),
        .Q(\egrfifo_reg[0]_43 [34]));
  FDCE \egrfifo_reg[0][35] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [35]),
        .Q(\egrfifo_reg[0]_43 [35]));
  FDCE \egrfifo_reg[0][36] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [36]),
        .Q(\egrfifo_reg[0]_43 [36]));
  FDCE \egrfifo_reg[0][37] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [37]),
        .Q(\egrfifo_reg[0]_43 [37]));
  FDCE \egrfifo_reg[0][38] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [38]),
        .Q(\egrfifo_reg[0]_43 [38]));
  FDCE \egrfifo_reg[0][39] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [39]),
        .Q(\egrfifo_reg[0]_43 [39]));
  FDCE \egrfifo_reg[0][3] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [3]),
        .Q(\egrfifo_reg[0]_43 [3]));
  FDCE \egrfifo_reg[0][40] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [40]),
        .Q(\egrfifo_reg[0]_43 [40]));
  FDCE \egrfifo_reg[0][41] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [41]),
        .Q(\egrfifo_reg[0]_43 [41]));
  FDCE \egrfifo_reg[0][42] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [42]),
        .Q(\egrfifo_reg[0]_43 [42]));
  FDCE \egrfifo_reg[0][43] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [43]),
        .Q(\egrfifo_reg[0]_43 [43]));
  FDCE \egrfifo_reg[0][44] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [44]),
        .Q(\egrfifo_reg[0]_43 [44]));
  FDCE \egrfifo_reg[0][45] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [45]),
        .Q(\egrfifo_reg[0]_43 [45]));
  FDCE \egrfifo_reg[0][46] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [46]),
        .Q(\egrfifo_reg[0]_43 [46]));
  FDCE \egrfifo_reg[0][47] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [47]),
        .Q(\egrfifo_reg[0]_43 [47]));
  FDCE \egrfifo_reg[0][48] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [48]),
        .Q(\egrfifo_reg[0]_43 [48]));
  FDCE \egrfifo_reg[0][49] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [49]),
        .Q(\egrfifo_reg[0]_43 [49]));
  FDCE \egrfifo_reg[0][4] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [4]),
        .Q(\egrfifo_reg[0]_43 [4]));
  FDCE \egrfifo_reg[0][50] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [50]),
        .Q(\egrfifo_reg[0]_43 [50]));
  FDCE \egrfifo_reg[0][51] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [51]),
        .Q(\egrfifo_reg[0]_43 [51]));
  FDCE \egrfifo_reg[0][52] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [52]),
        .Q(\egrfifo_reg[0]_43 [52]));
  FDCE \egrfifo_reg[0][53] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [53]),
        .Q(\egrfifo_reg[0]_43 [53]));
  FDCE \egrfifo_reg[0][54] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [54]),
        .Q(\egrfifo_reg[0]_43 [54]));
  FDCE \egrfifo_reg[0][55] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [55]),
        .Q(\egrfifo_reg[0]_43 [55]));
  FDCE \egrfifo_reg[0][56] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [56]),
        .Q(\egrfifo_reg[0]_43 [56]));
  FDCE \egrfifo_reg[0][57] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [57]),
        .Q(\egrfifo_reg[0]_43 [57]));
  FDCE \egrfifo_reg[0][58] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [58]),
        .Q(\egrfifo_reg[0]_43 [58]));
  FDCE \egrfifo_reg[0][59] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [59]),
        .Q(\egrfifo_reg[0]_43 [59]));
  FDCE \egrfifo_reg[0][5] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [5]),
        .Q(\egrfifo_reg[0]_43 [5]));
  FDCE \egrfifo_reg[0][60] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [60]),
        .Q(\egrfifo_reg[0]_43 [60]));
  FDCE \egrfifo_reg[0][61] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [61]),
        .Q(\egrfifo_reg[0]_43 [61]));
  FDCE \egrfifo_reg[0][62] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [62]),
        .Q(\egrfifo_reg[0]_43 [62]));
  FDCE \egrfifo_reg[0][63] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [63]),
        .Q(\egrfifo_reg[0]_43 [63]));
  FDCE \egrfifo_reg[0][64] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [64]),
        .Q(\egrfifo_reg[0]_43 [64]));
  FDCE \egrfifo_reg[0][65] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [65]),
        .Q(\egrfifo_reg[0]_43 [65]));
  FDCE \egrfifo_reg[0][66] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [66]),
        .Q(\egrfifo_reg[0]_43 [66]));
  FDCE \egrfifo_reg[0][67] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [67]),
        .Q(\egrfifo_reg[0]_43 [67]));
  FDCE \egrfifo_reg[0][68] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [68]),
        .Q(\egrfifo_reg[0]_43 [68]));
  FDCE \egrfifo_reg[0][69] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [69]),
        .Q(\egrfifo_reg[0]_43 [69]));
  FDCE \egrfifo_reg[0][6] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [6]),
        .Q(\egrfifo_reg[0]_43 [6]));
  FDCE \egrfifo_reg[0][70] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [70]),
        .Q(\egrfifo_reg[0]_43 [70]));
  FDCE \egrfifo_reg[0][71] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [71]),
        .Q(\egrfifo_reg[0]_43 [71]));
  FDCE \egrfifo_reg[0][72] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [72]),
        .Q(\egrfifo_reg[0]_43 [72]));
  FDCE \egrfifo_reg[0][73] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [73]),
        .Q(\egrfifo_reg[0]_43 [73]));
  FDCE \egrfifo_reg[0][74] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [74]),
        .Q(\egrfifo_reg[0]_43 [74]));
  FDCE \egrfifo_reg[0][75] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [75]),
        .Q(\egrfifo_reg[0]_43 [75]));
  FDCE \egrfifo_reg[0][76] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [76]),
        .Q(\egrfifo_reg[0]_43 [76]));
  FDCE \egrfifo_reg[0][77] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [77]),
        .Q(\egrfifo_reg[0]_43 [77]));
  FDCE \egrfifo_reg[0][78] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [78]),
        .Q(\egrfifo_reg[0]_43 [78]));
  FDCE \egrfifo_reg[0][79] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [79]),
        .Q(\egrfifo_reg[0]_43 [79]));
  FDCE \egrfifo_reg[0][7] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [7]),
        .Q(\egrfifo_reg[0]_43 [7]));
  FDCE \egrfifo_reg[0][80] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [80]),
        .Q(\egrfifo_reg[0]_43 [80]));
  FDCE \egrfifo_reg[0][81] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [81]),
        .Q(\egrfifo_reg[0]_43 [81]));
  FDCE \egrfifo_reg[0][82] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [82]),
        .Q(\egrfifo_reg[0]_43 [82]));
  FDCE \egrfifo_reg[0][83] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [83]),
        .Q(\egrfifo_reg[0]_43 [83]));
  FDCE \egrfifo_reg[0][84] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [84]),
        .Q(\egrfifo_reg[0]_43 [84]));
  FDCE \egrfifo_reg[0][85] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [85]),
        .Q(\egrfifo_reg[0]_43 [85]));
  FDCE \egrfifo_reg[0][86] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [86]),
        .Q(\egrfifo_reg[0]_43 [86]));
  FDCE \egrfifo_reg[0][87] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [87]),
        .Q(\egrfifo_reg[0]_43 [87]));
  FDCE \egrfifo_reg[0][88] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [88]),
        .Q(\egrfifo_reg[0]_43 [88]));
  FDCE \egrfifo_reg[0][89] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [89]),
        .Q(\egrfifo_reg[0]_43 [89]));
  FDCE \egrfifo_reg[0][8] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [8]),
        .Q(\egrfifo_reg[0]_43 [8]));
  FDCE \egrfifo_reg[0][90] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [90]),
        .Q(\egrfifo_reg[0]_43 [90]));
  FDCE \egrfifo_reg[0][91] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [91]),
        .Q(\egrfifo_reg[0]_43 [91]));
  FDCE \egrfifo_reg[0][92] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [92]),
        .Q(\egrfifo_reg[0]_43 [92]));
  FDCE \egrfifo_reg[0][93] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [93]),
        .Q(\egrfifo_reg[0]_43 [93]));
  FDCE \egrfifo_reg[0][94] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [94]),
        .Q(\egrfifo_reg[0]_43 [94]));
  FDCE \egrfifo_reg[0][95] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [95]),
        .Q(\egrfifo_reg[0]_43 [95]));
  FDCE \egrfifo_reg[0][96] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [96]),
        .Q(\egrfifo_reg[0]_43 [96]));
  FDCE \egrfifo_reg[0][97] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [97]),
        .Q(\egrfifo_reg[0]_43 [97]));
  FDCE \egrfifo_reg[0][98] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [98]),
        .Q(\egrfifo_reg[0]_43 [98]));
  FDCE \egrfifo_reg[0][99] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [99]),
        .Q(\egrfifo_reg[0]_43 [99]));
  FDCE \egrfifo_reg[0][9] 
       (.C(memclk),
        .CE(\egrfifo[0][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [9]),
        .Q(\egrfifo_reg[0]_43 [9]));
  FDCE \egrfifo_reg[1][0] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [0]),
        .Q(\egrfifo_reg[1]_42 [0]));
  FDCE \egrfifo_reg[1][100] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [100]),
        .Q(\egrfifo_reg[1]_42 [100]));
  FDCE \egrfifo_reg[1][101] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [101]),
        .Q(\egrfifo_reg[1]_42 [101]));
  FDCE \egrfifo_reg[1][102] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [102]),
        .Q(\egrfifo_reg[1]_42 [102]));
  FDCE \egrfifo_reg[1][103] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [103]),
        .Q(\egrfifo_reg[1]_42 [103]));
  FDCE \egrfifo_reg[1][104] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [104]),
        .Q(\egrfifo_reg[1]_42 [104]));
  FDCE \egrfifo_reg[1][105] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [105]),
        .Q(\egrfifo_reg[1]_42 [105]));
  FDCE \egrfifo_reg[1][106] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [106]),
        .Q(\egrfifo_reg[1]_42 [106]));
  FDCE \egrfifo_reg[1][107] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [107]),
        .Q(\egrfifo_reg[1]_42 [107]));
  FDCE \egrfifo_reg[1][108] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [108]),
        .Q(\egrfifo_reg[1]_42 [108]));
  FDCE \egrfifo_reg[1][109] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [109]),
        .Q(\egrfifo_reg[1]_42 [109]));
  FDCE \egrfifo_reg[1][10] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [10]),
        .Q(\egrfifo_reg[1]_42 [10]));
  FDCE \egrfifo_reg[1][110] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [110]),
        .Q(\egrfifo_reg[1]_42 [110]));
  FDCE \egrfifo_reg[1][111] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [111]),
        .Q(\egrfifo_reg[1]_42 [111]));
  FDCE \egrfifo_reg[1][112] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [112]),
        .Q(\egrfifo_reg[1]_42 [112]));
  FDCE \egrfifo_reg[1][113] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [113]),
        .Q(\egrfifo_reg[1]_42 [113]));
  FDCE \egrfifo_reg[1][114] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [114]),
        .Q(\egrfifo_reg[1]_42 [114]));
  FDCE \egrfifo_reg[1][115] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [115]),
        .Q(\egrfifo_reg[1]_42 [115]));
  FDCE \egrfifo_reg[1][116] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [116]),
        .Q(\egrfifo_reg[1]_42 [116]));
  FDCE \egrfifo_reg[1][117] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [117]),
        .Q(\egrfifo_reg[1]_42 [117]));
  FDCE \egrfifo_reg[1][118] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [118]),
        .Q(\egrfifo_reg[1]_42 [118]));
  FDCE \egrfifo_reg[1][119] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [119]),
        .Q(\egrfifo_reg[1]_42 [119]));
  FDCE \egrfifo_reg[1][11] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [11]),
        .Q(\egrfifo_reg[1]_42 [11]));
  FDCE \egrfifo_reg[1][120] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [120]),
        .Q(\egrfifo_reg[1]_42 [120]));
  FDCE \egrfifo_reg[1][121] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [121]),
        .Q(\egrfifo_reg[1]_42 [121]));
  FDCE \egrfifo_reg[1][122] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [122]),
        .Q(\egrfifo_reg[1]_42 [122]));
  FDCE \egrfifo_reg[1][123] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [123]),
        .Q(\egrfifo_reg[1]_42 [123]));
  FDCE \egrfifo_reg[1][124] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [124]),
        .Q(\egrfifo_reg[1]_42 [124]));
  FDCE \egrfifo_reg[1][125] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [125]),
        .Q(\egrfifo_reg[1]_42 [125]));
  FDCE \egrfifo_reg[1][126] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [126]),
        .Q(\egrfifo_reg[1]_42 [126]));
  FDCE \egrfifo_reg[1][127] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [127]),
        .Q(\egrfifo_reg[1]_42 [127]));
  FDCE \egrfifo_reg[1][12] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [12]),
        .Q(\egrfifo_reg[1]_42 [12]));
  FDCE \egrfifo_reg[1][13] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [13]),
        .Q(\egrfifo_reg[1]_42 [13]));
  FDCE \egrfifo_reg[1][14] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [14]),
        .Q(\egrfifo_reg[1]_42 [14]));
  FDCE \egrfifo_reg[1][15] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [15]),
        .Q(\egrfifo_reg[1]_42 [15]));
  FDCE \egrfifo_reg[1][16] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [16]),
        .Q(\egrfifo_reg[1]_42 [16]));
  FDCE \egrfifo_reg[1][17] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [17]),
        .Q(\egrfifo_reg[1]_42 [17]));
  FDCE \egrfifo_reg[1][18] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [18]),
        .Q(\egrfifo_reg[1]_42 [18]));
  FDCE \egrfifo_reg[1][19] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [19]),
        .Q(\egrfifo_reg[1]_42 [19]));
  FDCE \egrfifo_reg[1][1] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [1]),
        .Q(\egrfifo_reg[1]_42 [1]));
  FDCE \egrfifo_reg[1][20] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [20]),
        .Q(\egrfifo_reg[1]_42 [20]));
  FDCE \egrfifo_reg[1][21] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [21]),
        .Q(\egrfifo_reg[1]_42 [21]));
  FDCE \egrfifo_reg[1][22] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [22]),
        .Q(\egrfifo_reg[1]_42 [22]));
  FDCE \egrfifo_reg[1][23] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [23]),
        .Q(\egrfifo_reg[1]_42 [23]));
  FDCE \egrfifo_reg[1][24] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [24]),
        .Q(\egrfifo_reg[1]_42 [24]));
  FDCE \egrfifo_reg[1][25] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [25]),
        .Q(\egrfifo_reg[1]_42 [25]));
  FDCE \egrfifo_reg[1][26] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [26]),
        .Q(\egrfifo_reg[1]_42 [26]));
  FDCE \egrfifo_reg[1][27] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [27]),
        .Q(\egrfifo_reg[1]_42 [27]));
  FDCE \egrfifo_reg[1][28] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [28]),
        .Q(\egrfifo_reg[1]_42 [28]));
  FDCE \egrfifo_reg[1][29] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [29]),
        .Q(\egrfifo_reg[1]_42 [29]));
  FDCE \egrfifo_reg[1][2] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [2]),
        .Q(\egrfifo_reg[1]_42 [2]));
  FDCE \egrfifo_reg[1][30] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [30]),
        .Q(\egrfifo_reg[1]_42 [30]));
  FDCE \egrfifo_reg[1][31] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [31]),
        .Q(\egrfifo_reg[1]_42 [31]));
  FDCE \egrfifo_reg[1][32] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [32]),
        .Q(\egrfifo_reg[1]_42 [32]));
  FDCE \egrfifo_reg[1][33] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [33]),
        .Q(\egrfifo_reg[1]_42 [33]));
  FDCE \egrfifo_reg[1][34] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [34]),
        .Q(\egrfifo_reg[1]_42 [34]));
  FDCE \egrfifo_reg[1][35] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [35]),
        .Q(\egrfifo_reg[1]_42 [35]));
  FDCE \egrfifo_reg[1][36] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [36]),
        .Q(\egrfifo_reg[1]_42 [36]));
  FDCE \egrfifo_reg[1][37] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [37]),
        .Q(\egrfifo_reg[1]_42 [37]));
  FDCE \egrfifo_reg[1][38] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [38]),
        .Q(\egrfifo_reg[1]_42 [38]));
  FDCE \egrfifo_reg[1][39] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [39]),
        .Q(\egrfifo_reg[1]_42 [39]));
  FDCE \egrfifo_reg[1][3] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [3]),
        .Q(\egrfifo_reg[1]_42 [3]));
  FDCE \egrfifo_reg[1][40] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [40]),
        .Q(\egrfifo_reg[1]_42 [40]));
  FDCE \egrfifo_reg[1][41] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [41]),
        .Q(\egrfifo_reg[1]_42 [41]));
  FDCE \egrfifo_reg[1][42] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [42]),
        .Q(\egrfifo_reg[1]_42 [42]));
  FDCE \egrfifo_reg[1][43] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [43]),
        .Q(\egrfifo_reg[1]_42 [43]));
  FDCE \egrfifo_reg[1][44] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [44]),
        .Q(\egrfifo_reg[1]_42 [44]));
  FDCE \egrfifo_reg[1][45] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [45]),
        .Q(\egrfifo_reg[1]_42 [45]));
  FDCE \egrfifo_reg[1][46] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [46]),
        .Q(\egrfifo_reg[1]_42 [46]));
  FDCE \egrfifo_reg[1][47] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [47]),
        .Q(\egrfifo_reg[1]_42 [47]));
  FDCE \egrfifo_reg[1][48] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [48]),
        .Q(\egrfifo_reg[1]_42 [48]));
  FDCE \egrfifo_reg[1][49] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [49]),
        .Q(\egrfifo_reg[1]_42 [49]));
  FDCE \egrfifo_reg[1][4] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [4]),
        .Q(\egrfifo_reg[1]_42 [4]));
  FDCE \egrfifo_reg[1][50] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [50]),
        .Q(\egrfifo_reg[1]_42 [50]));
  FDCE \egrfifo_reg[1][51] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [51]),
        .Q(\egrfifo_reg[1]_42 [51]));
  FDCE \egrfifo_reg[1][52] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [52]),
        .Q(\egrfifo_reg[1]_42 [52]));
  FDCE \egrfifo_reg[1][53] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [53]),
        .Q(\egrfifo_reg[1]_42 [53]));
  FDCE \egrfifo_reg[1][54] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [54]),
        .Q(\egrfifo_reg[1]_42 [54]));
  FDCE \egrfifo_reg[1][55] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [55]),
        .Q(\egrfifo_reg[1]_42 [55]));
  FDCE \egrfifo_reg[1][56] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [56]),
        .Q(\egrfifo_reg[1]_42 [56]));
  FDCE \egrfifo_reg[1][57] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [57]),
        .Q(\egrfifo_reg[1]_42 [57]));
  FDCE \egrfifo_reg[1][58] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [58]),
        .Q(\egrfifo_reg[1]_42 [58]));
  FDCE \egrfifo_reg[1][59] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [59]),
        .Q(\egrfifo_reg[1]_42 [59]));
  FDCE \egrfifo_reg[1][5] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [5]),
        .Q(\egrfifo_reg[1]_42 [5]));
  FDCE \egrfifo_reg[1][60] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [60]),
        .Q(\egrfifo_reg[1]_42 [60]));
  FDCE \egrfifo_reg[1][61] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [61]),
        .Q(\egrfifo_reg[1]_42 [61]));
  FDCE \egrfifo_reg[1][62] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [62]),
        .Q(\egrfifo_reg[1]_42 [62]));
  FDCE \egrfifo_reg[1][63] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [63]),
        .Q(\egrfifo_reg[1]_42 [63]));
  FDCE \egrfifo_reg[1][64] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [64]),
        .Q(\egrfifo_reg[1]_42 [64]));
  FDCE \egrfifo_reg[1][65] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [65]),
        .Q(\egrfifo_reg[1]_42 [65]));
  FDCE \egrfifo_reg[1][66] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [66]),
        .Q(\egrfifo_reg[1]_42 [66]));
  FDCE \egrfifo_reg[1][67] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [67]),
        .Q(\egrfifo_reg[1]_42 [67]));
  FDCE \egrfifo_reg[1][68] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [68]),
        .Q(\egrfifo_reg[1]_42 [68]));
  FDCE \egrfifo_reg[1][69] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [69]),
        .Q(\egrfifo_reg[1]_42 [69]));
  FDCE \egrfifo_reg[1][6] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [6]),
        .Q(\egrfifo_reg[1]_42 [6]));
  FDCE \egrfifo_reg[1][70] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [70]),
        .Q(\egrfifo_reg[1]_42 [70]));
  FDCE \egrfifo_reg[1][71] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [71]),
        .Q(\egrfifo_reg[1]_42 [71]));
  FDCE \egrfifo_reg[1][72] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [72]),
        .Q(\egrfifo_reg[1]_42 [72]));
  FDCE \egrfifo_reg[1][73] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [73]),
        .Q(\egrfifo_reg[1]_42 [73]));
  FDCE \egrfifo_reg[1][74] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [74]),
        .Q(\egrfifo_reg[1]_42 [74]));
  FDCE \egrfifo_reg[1][75] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [75]),
        .Q(\egrfifo_reg[1]_42 [75]));
  FDCE \egrfifo_reg[1][76] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [76]),
        .Q(\egrfifo_reg[1]_42 [76]));
  FDCE \egrfifo_reg[1][77] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [77]),
        .Q(\egrfifo_reg[1]_42 [77]));
  FDCE \egrfifo_reg[1][78] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [78]),
        .Q(\egrfifo_reg[1]_42 [78]));
  FDCE \egrfifo_reg[1][79] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [79]),
        .Q(\egrfifo_reg[1]_42 [79]));
  FDCE \egrfifo_reg[1][7] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [7]),
        .Q(\egrfifo_reg[1]_42 [7]));
  FDCE \egrfifo_reg[1][80] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [80]),
        .Q(\egrfifo_reg[1]_42 [80]));
  FDCE \egrfifo_reg[1][81] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [81]),
        .Q(\egrfifo_reg[1]_42 [81]));
  FDCE \egrfifo_reg[1][82] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [82]),
        .Q(\egrfifo_reg[1]_42 [82]));
  FDCE \egrfifo_reg[1][83] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [83]),
        .Q(\egrfifo_reg[1]_42 [83]));
  FDCE \egrfifo_reg[1][84] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [84]),
        .Q(\egrfifo_reg[1]_42 [84]));
  FDCE \egrfifo_reg[1][85] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [85]),
        .Q(\egrfifo_reg[1]_42 [85]));
  FDCE \egrfifo_reg[1][86] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [86]),
        .Q(\egrfifo_reg[1]_42 [86]));
  FDCE \egrfifo_reg[1][87] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [87]),
        .Q(\egrfifo_reg[1]_42 [87]));
  FDCE \egrfifo_reg[1][88] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [88]),
        .Q(\egrfifo_reg[1]_42 [88]));
  FDCE \egrfifo_reg[1][89] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [89]),
        .Q(\egrfifo_reg[1]_42 [89]));
  FDCE \egrfifo_reg[1][8] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [8]),
        .Q(\egrfifo_reg[1]_42 [8]));
  FDCE \egrfifo_reg[1][90] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [90]),
        .Q(\egrfifo_reg[1]_42 [90]));
  FDCE \egrfifo_reg[1][91] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [91]),
        .Q(\egrfifo_reg[1]_42 [91]));
  FDCE \egrfifo_reg[1][92] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [92]),
        .Q(\egrfifo_reg[1]_42 [92]));
  FDCE \egrfifo_reg[1][93] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [93]),
        .Q(\egrfifo_reg[1]_42 [93]));
  FDCE \egrfifo_reg[1][94] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [94]),
        .Q(\egrfifo_reg[1]_42 [94]));
  FDCE \egrfifo_reg[1][95] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [95]),
        .Q(\egrfifo_reg[1]_42 [95]));
  FDCE \egrfifo_reg[1][96] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [96]),
        .Q(\egrfifo_reg[1]_42 [96]));
  FDCE \egrfifo_reg[1][97] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [97]),
        .Q(\egrfifo_reg[1]_42 [97]));
  FDCE \egrfifo_reg[1][98] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [98]),
        .Q(\egrfifo_reg[1]_42 [98]));
  FDCE \egrfifo_reg[1][99] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [99]),
        .Q(\egrfifo_reg[1]_42 [99]));
  FDCE \egrfifo_reg[1][9] 
       (.C(memclk),
        .CE(\egrfifo[1][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [9]),
        .Q(\egrfifo_reg[1]_42 [9]));
  FDCE \egrfifo_reg[2][0] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [0]),
        .Q(\egrfifo_reg[2]_41 [0]));
  FDCE \egrfifo_reg[2][100] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [100]),
        .Q(\egrfifo_reg[2]_41 [100]));
  FDCE \egrfifo_reg[2][101] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [101]),
        .Q(\egrfifo_reg[2]_41 [101]));
  FDCE \egrfifo_reg[2][102] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [102]),
        .Q(\egrfifo_reg[2]_41 [102]));
  FDCE \egrfifo_reg[2][103] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [103]),
        .Q(\egrfifo_reg[2]_41 [103]));
  FDCE \egrfifo_reg[2][104] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [104]),
        .Q(\egrfifo_reg[2]_41 [104]));
  FDCE \egrfifo_reg[2][105] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [105]),
        .Q(\egrfifo_reg[2]_41 [105]));
  FDCE \egrfifo_reg[2][106] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [106]),
        .Q(\egrfifo_reg[2]_41 [106]));
  FDCE \egrfifo_reg[2][107] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [107]),
        .Q(\egrfifo_reg[2]_41 [107]));
  FDCE \egrfifo_reg[2][108] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [108]),
        .Q(\egrfifo_reg[2]_41 [108]));
  FDCE \egrfifo_reg[2][109] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [109]),
        .Q(\egrfifo_reg[2]_41 [109]));
  FDCE \egrfifo_reg[2][10] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [10]),
        .Q(\egrfifo_reg[2]_41 [10]));
  FDCE \egrfifo_reg[2][110] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [110]),
        .Q(\egrfifo_reg[2]_41 [110]));
  FDCE \egrfifo_reg[2][111] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [111]),
        .Q(\egrfifo_reg[2]_41 [111]));
  FDCE \egrfifo_reg[2][112] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [112]),
        .Q(\egrfifo_reg[2]_41 [112]));
  FDCE \egrfifo_reg[2][113] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [113]),
        .Q(\egrfifo_reg[2]_41 [113]));
  FDCE \egrfifo_reg[2][114] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [114]),
        .Q(\egrfifo_reg[2]_41 [114]));
  FDCE \egrfifo_reg[2][115] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [115]),
        .Q(\egrfifo_reg[2]_41 [115]));
  FDCE \egrfifo_reg[2][116] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [116]),
        .Q(\egrfifo_reg[2]_41 [116]));
  FDCE \egrfifo_reg[2][117] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [117]),
        .Q(\egrfifo_reg[2]_41 [117]));
  FDCE \egrfifo_reg[2][118] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [118]),
        .Q(\egrfifo_reg[2]_41 [118]));
  FDCE \egrfifo_reg[2][119] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [119]),
        .Q(\egrfifo_reg[2]_41 [119]));
  FDCE \egrfifo_reg[2][11] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [11]),
        .Q(\egrfifo_reg[2]_41 [11]));
  FDCE \egrfifo_reg[2][120] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [120]),
        .Q(\egrfifo_reg[2]_41 [120]));
  FDCE \egrfifo_reg[2][121] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [121]),
        .Q(\egrfifo_reg[2]_41 [121]));
  FDCE \egrfifo_reg[2][122] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [122]),
        .Q(\egrfifo_reg[2]_41 [122]));
  FDCE \egrfifo_reg[2][123] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [123]),
        .Q(\egrfifo_reg[2]_41 [123]));
  FDCE \egrfifo_reg[2][124] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [124]),
        .Q(\egrfifo_reg[2]_41 [124]));
  FDCE \egrfifo_reg[2][125] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [125]),
        .Q(\egrfifo_reg[2]_41 [125]));
  FDCE \egrfifo_reg[2][126] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [126]),
        .Q(\egrfifo_reg[2]_41 [126]));
  FDCE \egrfifo_reg[2][127] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [127]),
        .Q(\egrfifo_reg[2]_41 [127]));
  FDCE \egrfifo_reg[2][12] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [12]),
        .Q(\egrfifo_reg[2]_41 [12]));
  FDCE \egrfifo_reg[2][13] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [13]),
        .Q(\egrfifo_reg[2]_41 [13]));
  FDCE \egrfifo_reg[2][14] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [14]),
        .Q(\egrfifo_reg[2]_41 [14]));
  FDCE \egrfifo_reg[2][15] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [15]),
        .Q(\egrfifo_reg[2]_41 [15]));
  FDCE \egrfifo_reg[2][16] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [16]),
        .Q(\egrfifo_reg[2]_41 [16]));
  FDCE \egrfifo_reg[2][17] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [17]),
        .Q(\egrfifo_reg[2]_41 [17]));
  FDCE \egrfifo_reg[2][18] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [18]),
        .Q(\egrfifo_reg[2]_41 [18]));
  FDCE \egrfifo_reg[2][19] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [19]),
        .Q(\egrfifo_reg[2]_41 [19]));
  FDCE \egrfifo_reg[2][1] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [1]),
        .Q(\egrfifo_reg[2]_41 [1]));
  FDCE \egrfifo_reg[2][20] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [20]),
        .Q(\egrfifo_reg[2]_41 [20]));
  FDCE \egrfifo_reg[2][21] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [21]),
        .Q(\egrfifo_reg[2]_41 [21]));
  FDCE \egrfifo_reg[2][22] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [22]),
        .Q(\egrfifo_reg[2]_41 [22]));
  FDCE \egrfifo_reg[2][23] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [23]),
        .Q(\egrfifo_reg[2]_41 [23]));
  FDCE \egrfifo_reg[2][24] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [24]),
        .Q(\egrfifo_reg[2]_41 [24]));
  FDCE \egrfifo_reg[2][25] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [25]),
        .Q(\egrfifo_reg[2]_41 [25]));
  FDCE \egrfifo_reg[2][26] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [26]),
        .Q(\egrfifo_reg[2]_41 [26]));
  FDCE \egrfifo_reg[2][27] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [27]),
        .Q(\egrfifo_reg[2]_41 [27]));
  FDCE \egrfifo_reg[2][28] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [28]),
        .Q(\egrfifo_reg[2]_41 [28]));
  FDCE \egrfifo_reg[2][29] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [29]),
        .Q(\egrfifo_reg[2]_41 [29]));
  FDCE \egrfifo_reg[2][2] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [2]),
        .Q(\egrfifo_reg[2]_41 [2]));
  FDCE \egrfifo_reg[2][30] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [30]),
        .Q(\egrfifo_reg[2]_41 [30]));
  FDCE \egrfifo_reg[2][31] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [31]),
        .Q(\egrfifo_reg[2]_41 [31]));
  FDCE \egrfifo_reg[2][32] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [32]),
        .Q(\egrfifo_reg[2]_41 [32]));
  FDCE \egrfifo_reg[2][33] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [33]),
        .Q(\egrfifo_reg[2]_41 [33]));
  FDCE \egrfifo_reg[2][34] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [34]),
        .Q(\egrfifo_reg[2]_41 [34]));
  FDCE \egrfifo_reg[2][35] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [35]),
        .Q(\egrfifo_reg[2]_41 [35]));
  FDCE \egrfifo_reg[2][36] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [36]),
        .Q(\egrfifo_reg[2]_41 [36]));
  FDCE \egrfifo_reg[2][37] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [37]),
        .Q(\egrfifo_reg[2]_41 [37]));
  FDCE \egrfifo_reg[2][38] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [38]),
        .Q(\egrfifo_reg[2]_41 [38]));
  FDCE \egrfifo_reg[2][39] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [39]),
        .Q(\egrfifo_reg[2]_41 [39]));
  FDCE \egrfifo_reg[2][3] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [3]),
        .Q(\egrfifo_reg[2]_41 [3]));
  FDCE \egrfifo_reg[2][40] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [40]),
        .Q(\egrfifo_reg[2]_41 [40]));
  FDCE \egrfifo_reg[2][41] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [41]),
        .Q(\egrfifo_reg[2]_41 [41]));
  FDCE \egrfifo_reg[2][42] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [42]),
        .Q(\egrfifo_reg[2]_41 [42]));
  FDCE \egrfifo_reg[2][43] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [43]),
        .Q(\egrfifo_reg[2]_41 [43]));
  FDCE \egrfifo_reg[2][44] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [44]),
        .Q(\egrfifo_reg[2]_41 [44]));
  FDCE \egrfifo_reg[2][45] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [45]),
        .Q(\egrfifo_reg[2]_41 [45]));
  FDCE \egrfifo_reg[2][46] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [46]),
        .Q(\egrfifo_reg[2]_41 [46]));
  FDCE \egrfifo_reg[2][47] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [47]),
        .Q(\egrfifo_reg[2]_41 [47]));
  FDCE \egrfifo_reg[2][48] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [48]),
        .Q(\egrfifo_reg[2]_41 [48]));
  FDCE \egrfifo_reg[2][49] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [49]),
        .Q(\egrfifo_reg[2]_41 [49]));
  FDCE \egrfifo_reg[2][4] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [4]),
        .Q(\egrfifo_reg[2]_41 [4]));
  FDCE \egrfifo_reg[2][50] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [50]),
        .Q(\egrfifo_reg[2]_41 [50]));
  FDCE \egrfifo_reg[2][51] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [51]),
        .Q(\egrfifo_reg[2]_41 [51]));
  FDCE \egrfifo_reg[2][52] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [52]),
        .Q(\egrfifo_reg[2]_41 [52]));
  FDCE \egrfifo_reg[2][53] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [53]),
        .Q(\egrfifo_reg[2]_41 [53]));
  FDCE \egrfifo_reg[2][54] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [54]),
        .Q(\egrfifo_reg[2]_41 [54]));
  FDCE \egrfifo_reg[2][55] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [55]),
        .Q(\egrfifo_reg[2]_41 [55]));
  FDCE \egrfifo_reg[2][56] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [56]),
        .Q(\egrfifo_reg[2]_41 [56]));
  FDCE \egrfifo_reg[2][57] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [57]),
        .Q(\egrfifo_reg[2]_41 [57]));
  FDCE \egrfifo_reg[2][58] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [58]),
        .Q(\egrfifo_reg[2]_41 [58]));
  FDCE \egrfifo_reg[2][59] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [59]),
        .Q(\egrfifo_reg[2]_41 [59]));
  FDCE \egrfifo_reg[2][5] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [5]),
        .Q(\egrfifo_reg[2]_41 [5]));
  FDCE \egrfifo_reg[2][60] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [60]),
        .Q(\egrfifo_reg[2]_41 [60]));
  FDCE \egrfifo_reg[2][61] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [61]),
        .Q(\egrfifo_reg[2]_41 [61]));
  FDCE \egrfifo_reg[2][62] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [62]),
        .Q(\egrfifo_reg[2]_41 [62]));
  FDCE \egrfifo_reg[2][63] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [63]),
        .Q(\egrfifo_reg[2]_41 [63]));
  FDCE \egrfifo_reg[2][64] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [64]),
        .Q(\egrfifo_reg[2]_41 [64]));
  FDCE \egrfifo_reg[2][65] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [65]),
        .Q(\egrfifo_reg[2]_41 [65]));
  FDCE \egrfifo_reg[2][66] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [66]),
        .Q(\egrfifo_reg[2]_41 [66]));
  FDCE \egrfifo_reg[2][67] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [67]),
        .Q(\egrfifo_reg[2]_41 [67]));
  FDCE \egrfifo_reg[2][68] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [68]),
        .Q(\egrfifo_reg[2]_41 [68]));
  FDCE \egrfifo_reg[2][69] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [69]),
        .Q(\egrfifo_reg[2]_41 [69]));
  FDCE \egrfifo_reg[2][6] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [6]),
        .Q(\egrfifo_reg[2]_41 [6]));
  FDCE \egrfifo_reg[2][70] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [70]),
        .Q(\egrfifo_reg[2]_41 [70]));
  FDCE \egrfifo_reg[2][71] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [71]),
        .Q(\egrfifo_reg[2]_41 [71]));
  FDCE \egrfifo_reg[2][72] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [72]),
        .Q(\egrfifo_reg[2]_41 [72]));
  FDCE \egrfifo_reg[2][73] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [73]),
        .Q(\egrfifo_reg[2]_41 [73]));
  FDCE \egrfifo_reg[2][74] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [74]),
        .Q(\egrfifo_reg[2]_41 [74]));
  FDCE \egrfifo_reg[2][75] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [75]),
        .Q(\egrfifo_reg[2]_41 [75]));
  FDCE \egrfifo_reg[2][76] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [76]),
        .Q(\egrfifo_reg[2]_41 [76]));
  FDCE \egrfifo_reg[2][77] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [77]),
        .Q(\egrfifo_reg[2]_41 [77]));
  FDCE \egrfifo_reg[2][78] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [78]),
        .Q(\egrfifo_reg[2]_41 [78]));
  FDCE \egrfifo_reg[2][79] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [79]),
        .Q(\egrfifo_reg[2]_41 [79]));
  FDCE \egrfifo_reg[2][7] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [7]),
        .Q(\egrfifo_reg[2]_41 [7]));
  FDCE \egrfifo_reg[2][80] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [80]),
        .Q(\egrfifo_reg[2]_41 [80]));
  FDCE \egrfifo_reg[2][81] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [81]),
        .Q(\egrfifo_reg[2]_41 [81]));
  FDCE \egrfifo_reg[2][82] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [82]),
        .Q(\egrfifo_reg[2]_41 [82]));
  FDCE \egrfifo_reg[2][83] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [83]),
        .Q(\egrfifo_reg[2]_41 [83]));
  FDCE \egrfifo_reg[2][84] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [84]),
        .Q(\egrfifo_reg[2]_41 [84]));
  FDCE \egrfifo_reg[2][85] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [85]),
        .Q(\egrfifo_reg[2]_41 [85]));
  FDCE \egrfifo_reg[2][86] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [86]),
        .Q(\egrfifo_reg[2]_41 [86]));
  FDCE \egrfifo_reg[2][87] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [87]),
        .Q(\egrfifo_reg[2]_41 [87]));
  FDCE \egrfifo_reg[2][88] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [88]),
        .Q(\egrfifo_reg[2]_41 [88]));
  FDCE \egrfifo_reg[2][89] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [89]),
        .Q(\egrfifo_reg[2]_41 [89]));
  FDCE \egrfifo_reg[2][8] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [8]),
        .Q(\egrfifo_reg[2]_41 [8]));
  FDCE \egrfifo_reg[2][90] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [90]),
        .Q(\egrfifo_reg[2]_41 [90]));
  FDCE \egrfifo_reg[2][91] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [91]),
        .Q(\egrfifo_reg[2]_41 [91]));
  FDCE \egrfifo_reg[2][92] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [92]),
        .Q(\egrfifo_reg[2]_41 [92]));
  FDCE \egrfifo_reg[2][93] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [93]),
        .Q(\egrfifo_reg[2]_41 [93]));
  FDCE \egrfifo_reg[2][94] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [94]),
        .Q(\egrfifo_reg[2]_41 [94]));
  FDCE \egrfifo_reg[2][95] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [95]),
        .Q(\egrfifo_reg[2]_41 [95]));
  FDCE \egrfifo_reg[2][96] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [96]),
        .Q(\egrfifo_reg[2]_41 [96]));
  FDCE \egrfifo_reg[2][97] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [97]),
        .Q(\egrfifo_reg[2]_41 [97]));
  FDCE \egrfifo_reg[2][98] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [98]),
        .Q(\egrfifo_reg[2]_41 [98]));
  FDCE \egrfifo_reg[2][99] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [99]),
        .Q(\egrfifo_reg[2]_41 [99]));
  FDCE \egrfifo_reg[2][9] 
       (.C(memclk),
        .CE(\egrfifo[2][127]_i_1_n_0 ),
        .CLR(AR),
        .D(\egrfifo[2]_44 [9]),
        .Q(\egrfifo_reg[2]_41 [9]));
  LUT6 #(
    .INIT(64'hFFBBFFEE008B00EE)) 
    enRowbufBEgrstr_i_1
       (.I0(enRowbufBEgrstr_i_2_n_0),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I2(\wordEgrRd[3]_i_3_n_0 ),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I5(enRowbufBEgrstr),
        .O(enRowbufBEgrstr_i_1_n_0));
  LUT6 #(
    .INIT(64'h00000E0000000000)) 
    enRowbufBEgrstr_i_2
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I2(ddrAXI_wdata_0_sn_1),
        .I3(ddrAXI_wready),
        .I4(egrAXIS_tlast),
        .I5(\wordEgrWr[3]_i_5_n_0 ),
        .O(enRowbufBEgrstr_i_2_n_0));
  FDCE enRowbufBEgrstr_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(enRowbufBEgrstr_i_1_n_0),
        .Q(enRowbufBEgrstr));
  LUT6 #(
    .INIT(64'hABA8FFFFABA80000)) 
    enRowbufBEgrstrm1_i_1
       (.I0(enRowbufBEgrstr),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I4(p_3_out[0]),
        .I5(enRowbufBEgrstrm1),
        .O(enRowbufBEgrstrm1_i_1_n_0));
  FDCE enRowbufBEgrstrm1_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(enRowbufBEgrstrm1_i_1_n_0),
        .Q(enRowbufBEgrstrm1));
  LUT5 #(
    .INIT(32'h2C002000)) 
    enRowbufStream_i_1
       (.I0(rgbFromVideoinAXIS_tvalidm2),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(rng_reg_0),
        .I4(enRowbufStream_reg_n_0),
        .O(enRowbufStream_i_1_n_0));
  FDCE enRowbufStream_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(enRowbufStream_i_1_n_0),
        .Q(enRowbufStream_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1840" *) 
  LUT3 #(
    .INIT(8'h02)) 
    \i[0]__0_i_1__0 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I1(p_0_in),
        .I2(\i_reg[0]__0_n_0 ),
        .O(i[0]));
  LUT6 #(
    .INIT(64'h00000000CCCCCCC8)) 
    \i[0]_i_1__5 
       (.I0(\stateSwap_reg[3]_0 [2]),
        .I1(rng_memclk),
        .I2(\stateSwap_reg[3]_0 [0]),
        .I3(\stateSwap_reg[3]_0 [1]),
        .I4(\stateSwap_reg[3]_0 [3]),
        .I5(\i_reg_n_0_[0] ),
        .O(\i[0]_i_1__5_n_0 ));
  LUT6 #(
    .INIT(64'h0015001F00150015)) 
    \i[1]__0_i_1__0 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I1(p_0_in),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I4(ddrAXI_wlast_INST_0_i_2_n_0),
        .I5(\stateSwap_reg[3]_0 [2]),
        .O(\i[1]__0_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1840" *) 
  LUT3 #(
    .INIT(8'hE0)) 
    \i[1]__0_i_2 
       (.I0(p_0_in),
        .I1(\i_reg[0]__0_n_0 ),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .O(i[1]));
  LUT6 #(
    .INIT(64'h555555555F5F575F)) 
    \i[1]_i_1__3 
       (.I0(rng_memclk),
        .I1(\stateSwap_reg[3]_0 [0]),
        .I2(ddrAXI_wlast_INST_0_i_2_n_0),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[0] ),
        .I5(\stateSwap_reg[3]_0 [2]),
        .O(\i[1]_i_1__3_n_0 ));
  LUT6 #(
    .INIT(64'h0000CCC8CCC80000)) 
    \i[1]_i_2__2 
       (.I0(\stateSwap_reg[3]_0 [2]),
        .I1(rng_memclk),
        .I2(\stateSwap_reg[3]_0 [0]),
        .I3(ddrAXI_wlast_INST_0_i_2_n_0),
        .I4(\i_reg_n_0_[1] ),
        .I5(\i_reg_n_0_[0] ),
        .O(\i[1]_i_2__2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(memclk),
        .CE(\i[1]_i_1__3_n_0 ),
        .CLR(AR),
        .D(\i[0]_i_1__5_n_0 ),
        .Q(\i_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0]__0 
       (.C(memclk),
        .CE(\i[1]__0_i_1__0_n_0 ),
        .CLR(AR),
        .D(i[0]),
        .Q(\i_reg[0]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(memclk),
        .CE(\i[1]_i_1__3_n_0 ),
        .CLR(AR),
        .D(\i[1]_i_2__2_n_0 ),
        .Q(\i_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1]__0 
       (.C(memclk),
        .CE(\i[1]__0_i_1__0_n_0 ),
        .CLR(AR),
        .D(i[1]),
        .Q(p_0_in));
  (* SOFT_HLUTNM = "soft_lutpair1788" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMemAcq[0]_i_1 
       (.I0(\ixMemNext_reg_n_0_[0] ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMemAcq[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1789" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMemAcq[1]_i_1 
       (.I0(\ixMemNext_reg_n_0_[1] ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMemAcq[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1748" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMemAcq[2]_i_1 
       (.I0(\ixMemNext_reg_n_0_[2] ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMemAcq[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1789" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMemAcq[3]_i_1 
       (.I0(\ixMemNext_reg_n_0_[3] ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMemAcq[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1790" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMemAcq[4]_i_1 
       (.I0(\ixMemNext_reg_n_0_[4] ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMemAcq[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1790" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMemAcq[5]_i_1 
       (.I0(\ixMemNext_reg_n_0_[5] ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMemAcq[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1791" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMemAcq[6]_i_1 
       (.I0(\ixMemNext_reg_n_0_[6] ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMemAcq[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1791" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMemAcq[7]_i_1 
       (.I0(\ixMemNext_reg_n_0_[7] ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMemAcq[7]_i_1_n_0 ));
  FDPE \ixMemAcq_reg[0] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .D(\ixMemAcq[0]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemAcq_reg[7]_0 [0]));
  FDPE \ixMemAcq_reg[1] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .D(\ixMemAcq[1]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemAcq_reg[7]_0 [1]));
  FDPE \ixMemAcq_reg[2] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .D(\ixMemAcq[2]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemAcq_reg[7]_0 [2]));
  FDPE \ixMemAcq_reg[3] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .D(\ixMemAcq[3]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemAcq_reg[7]_0 [3]));
  FDPE \ixMemAcq_reg[4] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .D(\ixMemAcq[4]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemAcq_reg[7]_0 [4]));
  FDPE \ixMemAcq_reg[5] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .D(\ixMemAcq[5]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemAcq_reg[7]_0 [5]));
  FDPE \ixMemAcq_reg[6] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .D(\ixMemAcq[6]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemAcq_reg[7]_0 [6]));
  FDPE \ixMemAcq_reg[7] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .D(\ixMemAcq[7]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemAcq_reg[7]_0 [7]));
  FDPE \ixMemNext_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .D(\ixMemNext_reg[7]_0 [0]),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemNext_reg_n_0_[0] ));
  FDPE \ixMemNext_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .D(\ixMemNext_reg[7]_0 [1]),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemNext_reg_n_0_[1] ));
  FDPE \ixMemNext_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .D(\ixMemNext_reg[7]_0 [2]),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemNext_reg_n_0_[2] ));
  FDPE \ixMemNext_reg[3] 
       (.C(aclk_sig),
        .CE(E),
        .D(\ixMemNext_reg[7]_0 [3]),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemNext_reg_n_0_[3] ));
  FDPE \ixMemNext_reg[4] 
       (.C(aclk_sig),
        .CE(E),
        .D(\ixMemNext_reg[7]_0 [4]),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemNext_reg_n_0_[4] ));
  FDPE \ixMemNext_reg[5] 
       (.C(aclk_sig),
        .CE(E),
        .D(\ixMemNext_reg[7]_0 [5]),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemNext_reg_n_0_[5] ));
  FDPE \ixMemNext_reg[6] 
       (.C(aclk_sig),
        .CE(E),
        .D(\ixMemNext_reg[7]_0 [6]),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemNext_reg_n_0_[6] ));
  FDPE \ixMemNext_reg[7] 
       (.C(aclk_sig),
        .CE(E),
        .D(\ixMemNext_reg[7]_0 [7]),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMemNext_reg_n_0_[7] ));
  (* SOFT_HLUTNM = "soft_lutpair1748" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMem[0]_i_1 
       (.I0(\ixMemAcq_reg[7]_0 [0]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMem[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1785" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMem[1]_i_1 
       (.I0(\ixMemAcq_reg[7]_0 [1]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMem[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1785" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMem[2]_i_1 
       (.I0(\ixMemAcq_reg[7]_0 [2]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMem[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1786" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMem[3]_i_1 
       (.I0(\ixMemAcq_reg[7]_0 [3]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMem[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1786" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMem[4]_i_1 
       (.I0(\ixMemAcq_reg[7]_0 [4]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMem[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1787" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMem[5]_i_1 
       (.I0(\ixMemAcq_reg[7]_0 [5]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMem[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1787" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMem[6]_i_1 
       (.I0(\ixMemAcq_reg[7]_0 [6]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMem[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h400FFFFF)) 
    \ixMem[7]_i_1 
       (.I0(\dwrRowbuf_reg[0]_1 ),
        .I1(\stateStream_reg[1]_0 ),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(rng_reg_0),
        .O(ixMem));
  (* SOFT_HLUTNM = "soft_lutpair1788" *) 
  LUT4 #(
    .INIT(16'hABFF)) 
    \ixMem[7]_i_2 
       (.I0(\ixMemAcq_reg[7]_0 [7]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\ixMem[7]_i_2_n_0 ));
  FDPE \ixMem_reg[0] 
       (.C(aclk_sig),
        .CE(ixMem),
        .D(\ixMem[0]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMem_reg[7]_0 [0]));
  FDPE \ixMem_reg[1] 
       (.C(aclk_sig),
        .CE(ixMem),
        .D(\ixMem[1]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMem_reg[7]_0 [1]));
  FDPE \ixMem_reg[2] 
       (.C(aclk_sig),
        .CE(ixMem),
        .D(\ixMem[2]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMem_reg[7]_0 [2]));
  FDPE \ixMem_reg[3] 
       (.C(aclk_sig),
        .CE(ixMem),
        .D(\ixMem[3]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMem_reg[7]_0 [3]));
  FDPE \ixMem_reg[4] 
       (.C(aclk_sig),
        .CE(ixMem),
        .D(\ixMem[4]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMem_reg[7]_0 [4]));
  FDPE \ixMem_reg[5] 
       (.C(aclk_sig),
        .CE(ixMem),
        .D(\ixMem[5]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMem_reg[7]_0 [5]));
  FDPE \ixMem_reg[6] 
       (.C(aclk_sig),
        .CE(ixMem),
        .D(\ixMem[6]_i_1_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMem_reg[7]_0 [6]));
  FDPE \ixMem_reg[7] 
       (.C(aclk_sig),
        .CE(ixMem),
        .D(\ixMem[7]_i_2_n_0 ),
        .PRE(\dwrRowbuf_reg[0]_0 ),
        .Q(\ixMem_reg[7]_0 [7]));
  (* SOFT_HLUTNM = "soft_lutpair1801" *) 
  LUT4 #(
    .INIT(16'h1F10)) 
    \ixRdEgrfifo[0]_i_1 
       (.I0(ixRdEgrfifo[0]),
        .I1(ixRdEgrfifo[1]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .O(\ixRdEgrfifo[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h020F000F0200000F)) 
    \ixRdEgrfifo[1]_i_1 
       (.I0(ddrAXI_wready),
        .I1(ddrAXI_wdata_0_sn_1),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I5(p_0_in),
        .O(\ixRdEgrfifo[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1801" *) 
  LUT3 #(
    .INIT(8'h20)) 
    \ixRdEgrfifo[1]_i_2 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I1(ixRdEgrfifo[1]),
        .I2(ixRdEgrfifo[0]),
        .O(\ixRdEgrfifo[1]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdEgrfifo_reg[0] 
       (.C(memclk),
        .CE(\ixRdEgrfifo[1]_i_1_n_0 ),
        .CLR(AR),
        .D(\ixRdEgrfifo[0]_i_1_n_0 ),
        .Q(ixRdEgrfifo[0]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRdEgrfifo_reg[1] 
       (.C(memclk),
        .CE(\ixRdEgrfifo[1]_i_1_n_0 ),
        .CLR(AR),
        .D(\ixRdEgrfifo[1]_i_2_n_0 ),
        .Q(ixRdEgrfifo[1]));
  LUT6 #(
    .INIT(64'h111111110F000000)) 
    \ixWrEgrfifo[0]_i_1 
       (.I0(ixWrEgrfifo[0]),
        .I1(ixWrEgrfifo[1]),
        .I2(p_0_in),
        .I3(\i_reg[0]__0_n_0 ),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I5(\wordEgrWr[3]_i_4_n_0 ),
        .O(\ixWrEgrfifo[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000AA00FCFF)) 
    \ixWrEgrfifo[1]_i_1 
       (.I0(enRowbufBEgrstrm1),
        .I1(p_0_in),
        .I2(\i_reg[0]__0_n_0 ),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I5(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .O(\ixWrEgrfifo[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h22F0220022F022F0)) 
    \ixWrEgrfifo[1]_i_2 
       (.I0(ixWrEgrfifo[0]),
        .I1(ixWrEgrfifo[1]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I3(\wordEgrWr[3]_i_4_n_0 ),
        .I4(p_0_in),
        .I5(\i_reg[0]__0_n_0 ),
        .O(\ixWrEgrfifo[1]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \ixWrEgrfifo_reg[0] 
       (.C(memclk),
        .CE(\ixWrEgrfifo[1]_i_1_n_0 ),
        .CLR(AR),
        .D(\ixWrEgrfifo[0]_i_1_n_0 ),
        .Q(ixWrEgrfifo[0]));
  FDCE #(
    .INIT(1'b0)) 
    \ixWrEgrfifo_reg[1] 
       (.C(memclk),
        .CE(\ixWrEgrfifo[1]_i_1_n_0 ),
        .CLR(AR),
        .D(\ixWrEgrfifo[1]_i_2_n_0 ),
        .Q(ixWrEgrfifo[1]));
  (* SOFT_HLUTNM = "soft_lutpair1807" *) 
  LUT3 #(
    .INIT(8'h9F)) 
    \liveBNotA_i[0]_i_1 
       (.I0(liveBNotA_reg_n_0),
        .I1(liveBNotA_to_memclk_reg_n_0),
        .I2(liveBNotA_i),
        .O(\liveBNotA_i[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h28002880)) 
    liveBNotA_i_1
       (.I0(rng_reg_0),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(liveBNotA_reg_n_0),
        .I4(\stateStream_reg[1]_0 ),
        .O(liveBNotA_i_1_n_0));
  FDCE #(
    .INIT(1'b0)) 
    \liveBNotA_i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\liveBNotA_i[0]_i_1_n_0 ),
        .Q(liveBNotA_i));
  LUT3 #(
    .INIT(8'hE8)) 
    liveBNotA_memclk_i_1
       (.I0(liveBNotA_to_memclkm2),
        .I1(liveBNotA_to_memclkm1),
        .I2(liveBNotA_memclk),
        .O(liveBNotA_memclk_i_1_n_0));
  FDCE liveBNotA_memclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(liveBNotA_memclk_i_1_n_0),
        .Q(liveBNotA_memclk));
  FDCE liveBNotA_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(liveBNotA_i_1_n_0),
        .Q(liveBNotA_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair1807" *) 
  LUT3 #(
    .INIT(8'hE4)) 
    liveBNotA_to_memclk_i_1
       (.I0(liveBNotA_i),
        .I1(liveBNotA_to_memclk_reg_n_0),
        .I2(liveBNotA_reg_n_0),
        .O(liveBNotA_to_memclk_i_1_n_0));
  FDCE liveBNotA_to_memclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(liveBNotA_to_memclk_i_1_n_0),
        .Q(liveBNotA_to_memclk_reg_n_0));
  FDCE liveBNotA_to_memclkm1_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(liveBNotA_to_memclk_reg_n_0),
        .Q(liveBNotA_to_memclkm1));
  FDCE liveBNotA_to_memclkm2_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(liveBNotA_to_memclkm1),
        .Q(liveBNotA_to_memclkm2));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size8kB_a32b128__xdcDup__1 myRowAbuf
       (.D({myRowAbuf_n_30,myRowAbuf_n_31,myRowAbuf_n_32,myRowAbuf_n_33,myRowAbuf_n_34,myRowAbuf_n_35,myRowAbuf_n_36}),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (myRowAbuf_n_38),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 (myRowAbuf_n_39),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 (myRowAbuf_n_40),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_10 (myRowAbuf_n_49),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_11 (myRowAbuf_n_50),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 (myRowAbuf_n_51),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 (myRowAbuf_n_52),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 (myRowAbuf_n_53),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_15 (myRowAbuf_n_54),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_16 (myRowAbuf_n_55),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_17 (myRowAbuf_n_56),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_18 (myRowAbuf_n_57),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_19 (myRowAbuf_n_58),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 (myRowAbuf_n_41),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_20 (myRowAbuf_n_59),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_21 (\egrfifo[2]_44 ),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_22 (\stateSwap_reg[3]_0 ),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_23 (liveBNotA_reg_n_0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_24 (stateStockrls),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_25 (enRowbufStream_reg_n_0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_26 (aRowbufStockrls),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_27 (aRowbufStream__0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_28 ({stateIgrstr,\FSM_sequential_stateIgrstr_reg[0]_0 }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 (myRowAbuf_n_42),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 (myRowAbuf_n_43),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_5 (myRowAbuf_n_44),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_6 (myRowAbuf_n_45),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 (myRowAbuf_n_46),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 (myRowAbuf_n_47),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_9 (myRowAbuf_n_48),
        .Q(dwrRowbuf),
        .aclk_sig(aclk_sig),
        .addrb(aB),
        .ddrAXI_rdata(ddrAXI_rdata),
        .douta({drdA[31:18],drdA[16:8],drdA[6:0]}),
        .doutb(drdRowBbufB),
        .\dwrRowbuf_reg[0] (\dwrRowbuf_reg[0]_1 ),
        .\dwrRowbuf_reg[0]_0 (\dwrRowbuf[30]_i_3_n_0 ),
        .\dwrRowbuf_reg[1] (\dwrRowbuf[1]_i_2_n_0 ),
        .\dwrRowbuf_reg[1]_0 (myRowBbuf_n_191),
        .\dwrRowbuf_reg[1]_1 (\a0[4]_i_4_n_0 ),
        .\dwrRowbuf_reg[30] ({drdRowBbuf[30:27],drdRowBbuf[25:24],drdRowBbuf[22:16],drdRowBbuf[14:0]}),
        .\dwrRowbuf_reg[3] (\dwrRowbuf[2]_i_2_n_0 ),
        .\dwrRowbuf_reg[3]_0 (myRowBbuf_n_192),
        .\dwrRowbuf_reg[4] (myRowBbuf_n_195),
        .\dwrRowbuf_reg[6] (myRowBbuf_n_194),
        .\dwrRowbuf_reg[7] (myRowBbuf_n_193),
        .\egrfifo_reg[0][0] (\egrfifo[2][127]_i_4_n_0 ),
        .\egrfifo_reg[0][0]_0 (\egrfifo[2][127]_i_5_n_0 ),
        .enRowbufBEgrstr(enRowbufBEgrstr),
        .liveBNotA_memclk(liveBNotA_memclk),
        .memclk(memclk),
        .\stateSwap_reg[0] (myRowAbuf_n_37),
        .\stateSwap_reg[2] (myRowAbuf_n_60),
        .web(web));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size8kB_a32b128 myRowBbuf
       (.D({myRowBbuf_n_166,myRowBbuf_n_167,myRowBbuf_n_168,myRowBbuf_n_169,myRowBbuf_n_170,myRowBbuf_n_171,myRowBbuf_n_172,myRowBbuf_n_173,myRowBbuf_n_174,myRowBbuf_n_175,myRowBbuf_n_176,myRowBbuf_n_177,myRowBbuf_n_178,myRowBbuf_n_179,myRowBbuf_n_180,myRowBbuf_n_181,myRowBbuf_n_182,myRowBbuf_n_183,myRowBbuf_n_184,myRowBbuf_n_185,myRowBbuf_n_186,myRowBbuf_n_187,myRowBbuf_n_188,myRowBbuf_n_189,myRowBbuf_n_190}),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (myRowBbuf_n_191),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 (myRowBbuf_n_192),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 (myRowBbuf_n_193),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_10 (myRowAbuf_n_60),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_11 ({stateIgrstr,\FSM_sequential_stateIgrstr_reg[0]_0 }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_12 ({\aRowbufBIgrstr_reg_n_0_[8] ,\aRowbufBIgrstr_reg_n_0_[7] ,\aRowbufBIgrstr_reg_n_0_[6] ,\aRowbufBIgrstr_reg_n_0_[5] ,\aRowbufBIgrstr_reg_n_0_[4] ,\aRowbufBIgrstr_reg_n_0_[3] ,\aRowbufBIgrstr_reg_n_0_[2] ,\aRowbufBIgrstr_reg_n_0_[1] ,\aRowbufBIgrstr_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_13 (aRowbufBEgrstr),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_14 (\stateSwap_reg[3]_0 ),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 (myRowBbuf_n_194),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 (myRowBbuf_n_195),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_4 (liveBNotA_reg_n_0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_5 (enRowbufStream_reg_n_0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_6 (stateStockrls),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_7 (aRowbufStream__0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_8 (aRowbufStockrls),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_9 (myRowAbuf_n_37),
        .Q(dwrRowbuf),
        .aclk_sig(aclk_sig),
        .addrb(aB),
        .ddrAXI_rdata(ddrAXI_rdata),
        .douta({drdRowBbuf[30:27],drdRowBbuf[25:24],drdRowBbuf[22:16],drdRowBbuf[14:0]}),
        .doutb(drdRowBbufB),
        .\dwrRowbuf_reg[10] (\dwrRowbuf[11]_i_2_n_0 ),
        .\dwrRowbuf_reg[10]_0 (myRowAbuf_n_47),
        .\dwrRowbuf_reg[11] (\dwrRowbuf[12]_i_2_n_0 ),
        .\dwrRowbuf_reg[11]_0 (myRowAbuf_n_48),
        .\dwrRowbuf_reg[12] (\dwrRowbuf[13]_i_2_n_0 ),
        .\dwrRowbuf_reg[12]_0 (myRowAbuf_n_46),
        .\dwrRowbuf_reg[13] (\dwrRowbuf[14]_i_2_n_0 ),
        .\dwrRowbuf_reg[13]_0 (myRowAbuf_n_50),
        .\dwrRowbuf_reg[14] (\dwrRowbuf[14]_i_3_n_0 ),
        .\dwrRowbuf_reg[14]_0 (myRowAbuf_n_52),
        .\dwrRowbuf_reg[15] (\dwrRowbuf[15]_i_2_n_0 ),
        .\dwrRowbuf_reg[16] (\dwrRowbuf[17]_i_2_n_0 ),
        .\dwrRowbuf_reg[16]_0 (\dwrRowbuf[16]_i_2_n_0 ),
        .\dwrRowbuf_reg[16]_1 (myRowAbuf_n_45),
        .\dwrRowbuf_reg[17] (\dwrRowbuf[18]_i_2_n_0 ),
        .\dwrRowbuf_reg[17]_0 (myRowAbuf_n_44),
        .\dwrRowbuf_reg[18] (\dwrRowbuf[19]_i_2_n_0 ),
        .\dwrRowbuf_reg[18]_0 (myRowAbuf_n_42),
        .\dwrRowbuf_reg[19] (\dwrRowbuf[20]_i_2_n_0 ),
        .\dwrRowbuf_reg[19]_0 (myRowAbuf_n_43),
        .\dwrRowbuf_reg[20] (\dwrRowbuf[21]_i_2_n_0 ),
        .\dwrRowbuf_reg[20]_0 (myRowAbuf_n_40),
        .\dwrRowbuf_reg[21] (\dwrRowbuf[22]_i_2_n_0 ),
        .\dwrRowbuf_reg[21]_0 (myRowAbuf_n_39),
        .\dwrRowbuf_reg[22] (\dwrRowbuf[22]_i_3_n_0 ),
        .\dwrRowbuf_reg[22]_0 (myRowAbuf_n_41),
        .\dwrRowbuf_reg[23] (\dwrRowbuf[23]_i_2_n_0 ),
        .\dwrRowbuf_reg[24] (\dwrRowbuf[25]_i_3_n_0 ),
        .\dwrRowbuf_reg[24]_0 (\dwrRowbuf[24]_i_2_n_0 ),
        .\dwrRowbuf_reg[24]_1 (myRowAbuf_n_56),
        .\dwrRowbuf_reg[25] (\dwrRowbuf[25]_i_2_n_0 ),
        .\dwrRowbuf_reg[25]_0 (myRowAbuf_n_58),
        .\dwrRowbuf_reg[26] (\dwrRowbuf[26]_i_2_n_0 ),
        .\dwrRowbuf_reg[27] (\dwrRowbuf[27]_i_2_n_0 ),
        .\dwrRowbuf_reg[27]_0 (\dwrRowbuf[28]_i_2_n_0 ),
        .\dwrRowbuf_reg[27]_1 (myRowAbuf_n_53),
        .\dwrRowbuf_reg[28] (\dwrRowbuf[29]_i_2_n_0 ),
        .\dwrRowbuf_reg[28]_0 (myRowAbuf_n_57),
        .\dwrRowbuf_reg[29] (\dwrRowbuf[30]_i_2_n_0 ),
        .\dwrRowbuf_reg[29]_0 (myRowAbuf_n_55),
        .\dwrRowbuf_reg[2] (\dwrRowbuf[2]_i_2_n_0 ),
        .\dwrRowbuf_reg[2]_0 (myRowAbuf_n_38),
        .\dwrRowbuf_reg[2]_1 (myRowAbuf_n_59),
        .\dwrRowbuf_reg[30] (\dwrRowbuf[30]_i_4_n_0 ),
        .\dwrRowbuf_reg[30]_0 (myRowAbuf_n_54),
        .\dwrRowbuf_reg[31] ({drdA[31:18],drdA[16:8],drdA[6:0]}),
        .\dwrRowbuf_reg[31]_0 (\dwrRowbuf[31]_i_3_n_0 ),
        .\dwrRowbuf_reg[8] (\dwrRowbuf[8]_i_2_n_0 ),
        .\dwrRowbuf_reg[8]_0 (myRowAbuf_n_49),
        .\dwrRowbuf_reg[9] (\dwrRowbuf[9]_i_2_n_0 ),
        .\dwrRowbuf_reg[9]_0 (\dwrRowbuf[30]_i_3_n_0 ),
        .\dwrRowbuf_reg[9]_1 (\dwrRowbuf[10]_i_2_n_0 ),
        .\dwrRowbuf_reg[9]_2 (myRowAbuf_n_51),
        .\dwrRowbuf_reg[9]_3 (\a0[4]_i_4_n_0 ),
        .\dwrRowbuf_reg[9]_4 (\dwrRowbuf_reg[0]_1 ),
        .enRowbufBEgrstr(enRowbufBEgrstr),
        .liveBNotA_memclk(liveBNotA_memclk),
        .memclk(memclk),
        .web(web));
  (* SOFT_HLUTNM = "soft_lutpair1733" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \probe[2]_INST_0 
       (.I0(\stateSwap_reg[3]_0 [2]),
        .I1(\stateSwap_reg[3]_0 [1]),
        .I2(\stateSwap_reg[3]_0 [3]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .O(probe));
  (* SOFT_HLUTNM = "soft_lutpair1714" *) 
  LUT5 #(
    .INIT(32'h00008000)) 
    \rdid[1][0]_i_4 
       (.I0(ddrAXI_rvalid),
        .I1(ddrAXI_rready_0),
        .I2(ddrAXI_rlast),
        .I3(stateIgrstr),
        .I4(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .O(ddrAXI_rvalid_0));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [0]),
        .Q(rgbFromVideoinAXIS_tdatam1[0]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[10] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [10]),
        .Q(rgbFromVideoinAXIS_tdatam1[10]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[11] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [11]),
        .Q(rgbFromVideoinAXIS_tdatam1[11]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[12] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [12]),
        .Q(rgbFromVideoinAXIS_tdatam1[12]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[13] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [13]),
        .Q(rgbFromVideoinAXIS_tdatam1[13]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[14] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [14]),
        .Q(rgbFromVideoinAXIS_tdatam1[14]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[15] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [15]),
        .Q(rgbFromVideoinAXIS_tdatam1[15]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[16] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [16]),
        .Q(rgbFromVideoinAXIS_tdatam1[16]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[17] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [17]),
        .Q(rgbFromVideoinAXIS_tdatam1[17]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[18] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [18]),
        .Q(rgbFromVideoinAXIS_tdatam1[18]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[19] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [19]),
        .Q(rgbFromVideoinAXIS_tdatam1[19]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [1]),
        .Q(rgbFromVideoinAXIS_tdatam1[1]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[20] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [20]),
        .Q(rgbFromVideoinAXIS_tdatam1[20]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[21] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [21]),
        .Q(rgbFromVideoinAXIS_tdatam1[21]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[22] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [22]),
        .Q(rgbFromVideoinAXIS_tdatam1[22]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[23] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [23]),
        .Q(rgbFromVideoinAXIS_tdatam1[23]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[24] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [24]),
        .Q(rgbFromVideoinAXIS_tdatam1[24]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[25] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [25]),
        .Q(rgbFromVideoinAXIS_tdatam1[25]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[26] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [26]),
        .Q(rgbFromVideoinAXIS_tdatam1[26]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[27] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [27]),
        .Q(rgbFromVideoinAXIS_tdatam1[27]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[28] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [28]),
        .Q(rgbFromVideoinAXIS_tdatam1[28]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[29] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [29]),
        .Q(rgbFromVideoinAXIS_tdatam1[29]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [2]),
        .Q(rgbFromVideoinAXIS_tdatam1[2]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[30] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [30]),
        .Q(rgbFromVideoinAXIS_tdatam1[30]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[31] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [31]),
        .Q(rgbFromVideoinAXIS_tdatam1[31]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[32] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [32]),
        .Q(rgbFromVideoinAXIS_tdatam1[32]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[33] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [33]),
        .Q(rgbFromVideoinAXIS_tdatam1[33]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[34] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [34]),
        .Q(rgbFromVideoinAXIS_tdatam1[34]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[35] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [35]),
        .Q(rgbFromVideoinAXIS_tdatam1[35]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [3]),
        .Q(rgbFromVideoinAXIS_tdatam1[3]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [4]),
        .Q(rgbFromVideoinAXIS_tdatam1[4]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [5]),
        .Q(rgbFromVideoinAXIS_tdatam1[5]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [6]),
        .Q(rgbFromVideoinAXIS_tdatam1[6]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [7]),
        .Q(rgbFromVideoinAXIS_tdatam1[7]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [8]),
        .Q(rgbFromVideoinAXIS_tdatam1[8]));
  FDCE \rgbFromVideoinAXIS_tdatam1_reg[9] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tdatam1_reg[35]_0 [9]),
        .Q(rgbFromVideoinAXIS_tdatam1[9]));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[0]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[0] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[10] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[10]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[10] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[11] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[11]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[11] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[12] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[12]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[12] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[13] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[13]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[13] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[14] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[14]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[14] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[15] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[15]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[15] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[16] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[16]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[16] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[17] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[17]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[17] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[18] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[18]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[18] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[19] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[19]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[19] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[1]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[1] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[20] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[20]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[20] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[21] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[21]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[21] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[22] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[22]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[22] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[23] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[23]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[23] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[24] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[24]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[24] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[25] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[25]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[25] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[26] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[26]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[26] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[27] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[27]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[27] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[28] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[28]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[28] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[29] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[29]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[29] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[2]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[2] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[30] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[30]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[30] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[31] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[31]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[31] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[32] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[32]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[32] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[33] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[33]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[33] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[34] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[34]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[34] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[35] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[35]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[35] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[3]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[3] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[4]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[4] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[5]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[5] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[6]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[6] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[7]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[7] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[8]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[8] ));
  FDCE \rgbFromVideoinAXIS_tdatam2_reg[9] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tdatam1[9]),
        .Q(\rgbFromVideoinAXIS_tdatam2_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair1805" *) 
  LUT3 #(
    .INIT(8'h9F)) 
    \rgbFromVideoinAXIS_tlast_sig_i[0]_i_1 
       (.I0(rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_0),
        .I1(rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_n_0),
        .I2(rgbFromVideoinAXIS_tlast_sig_i),
        .O(\rgbFromVideoinAXIS_tlast_sig_i[0]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \rgbFromVideoinAXIS_tlast_sig_i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rgbFromVideoinAXIS_tlast_sig_i[0]_i_1_n_0 ),
        .Q(rgbFromVideoinAXIS_tlast_sig_i));
  LUT3 #(
    .INIT(8'hE8)) 
    rgbFromVideoinAXIS_tlast_sig_memclk_i_1
       (.I0(rgbFromVideoinAXIS_tlast_sig_to_memclkm2),
        .I1(rgbFromVideoinAXIS_tlast_sig_to_memclkm1),
        .I2(rgbFromVideoinAXIS_tlast_sig_memclk),
        .O(rgbFromVideoinAXIS_tlast_sig_memclk_i_1_n_0));
  FDCE rgbFromVideoinAXIS_tlast_sig_memclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(rgbFromVideoinAXIS_tlast_sig_memclk_i_1_n_0),
        .Q(rgbFromVideoinAXIS_tlast_sig_memclk));
  (* SOFT_HLUTNM = "soft_lutpair1805" *) 
  LUT3 #(
    .INIT(8'hE4)) 
    rgbFromVideoinAXIS_tlast_sig_to_memclk_i_1
       (.I0(rgbFromVideoinAXIS_tlast_sig_i),
        .I1(rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_n_0),
        .I2(rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_0),
        .O(rgbFromVideoinAXIS_tlast_sig_to_memclk_i_1_n_0));
  FDCE rgbFromVideoinAXIS_tlast_sig_to_memclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tlast_sig_to_memclk_i_1_n_0),
        .Q(rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_n_0));
  FDCE rgbFromVideoinAXIS_tlast_sig_to_memclkm1_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_n_0),
        .Q(rgbFromVideoinAXIS_tlast_sig_to_memclkm1));
  FDCE rgbFromVideoinAXIS_tlast_sig_to_memclkm2_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(rgbFromVideoinAXIS_tlast_sig_to_memclkm1),
        .Q(rgbFromVideoinAXIS_tlast_sig_to_memclkm2));
  FDCE rgbFromVideoinAXIS_tvalidm1_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbVideoinToManyAXIS_tvalid),
        .Q(rgbFromVideoinAXIS_tvalidm1));
  FDCE rgbFromVideoinAXIS_tvalidm2_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rgbFromVideoinAXIS_tvalidm1),
        .Q(rgbFromVideoinAXIS_tvalidm2));
  (* SOFT_HLUTNM = "soft_lutpair1804" *) 
  LUT3 #(
    .INIT(8'h9F)) 
    \rng_i[0]_i_1 
       (.I0(rng_reg_0),
        .I1(rng_to_memclk_reg_n_0),
        .I2(rng_i),
        .O(\rng_i[0]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \rng_i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\rng_i[0]_i_1_n_0 ),
        .Q(rng_i));
  (* SOFT_HLUTNM = "soft_lutpair1823" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    rng_memclk_i_1
       (.I0(rng_to_memclkm2),
        .I1(rng_to_memclkm1),
        .I2(rng_memclk),
        .O(rng_memclk_i_1_n_0));
  FDCE rng_memclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(rng_memclk_i_1_n_0),
        .Q(rng_memclk));
  FDCE rng_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rng_reg_1),
        .Q(rng_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair1804" *) 
  LUT3 #(
    .INIT(8'hE4)) 
    rng_to_memclk_i_1
       (.I0(rng_i),
        .I1(rng_to_memclk_reg_n_0),
        .I2(rng_reg_0),
        .O(rng_to_memclk_i_1_n_0));
  FDCE rng_to_memclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(rng_to_memclk_i_1_n_0),
        .Q(rng_to_memclk_reg_n_0));
  FDCE rng_to_memclkm1_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(rng_to_memclk_reg_n_0),
        .Q(rng_to_memclkm1));
  FDCE rng_to_memclkm2_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(rng_to_memclkm1),
        .Q(rng_to_memclkm2));
  (* SOFT_HLUTNM = "soft_lutpair1824" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \row_lcl[0]_i_1__0 
       (.I0(\row_lcl_reg[10]_0 [0]),
        .O(\row_lcl[0]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h01000000)) 
    \row_lcl[10]_i_1__0 
       (.I0(AR),
        .I1(\row_lcl[10]_i_4_n_0 ),
        .I2(\i_reg_n_0_[0] ),
        .I3(\i_reg_n_0_[1] ),
        .I4(rng_memclk),
        .O(clear));
  LUT4 #(
    .INIT(16'h4000)) 
    \row_lcl[10]_i_2__0 
       (.I0(AR),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(rng_memclk),
        .I3(\row_lcl[10]_i_5_n_0 ),
        .O(sel));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \row_lcl[10]_i_3__0 
       (.I0(\row_lcl[10]_i_6_n_0 ),
        .I1(\row_lcl_reg[10]_0 [6]),
        .I2(\row_lcl_reg[10]_0 [9]),
        .I3(\row_lcl_reg[10]_0 [8]),
        .I4(\row_lcl_reg[10]_0 [7]),
        .I5(\row_lcl_reg[10]_0 [10]),
        .O(\row_lcl[10]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1731" *) 
  LUT4 #(
    .INIT(16'hFFFD)) 
    \row_lcl[10]_i_4 
       (.I0(\stateSwap_reg[3]_0 [0]),
        .I1(\stateSwap_reg[3]_0 [2]),
        .I2(\stateSwap_reg[3]_0 [3]),
        .I3(\stateSwap_reg[3]_0 [1]),
        .O(\row_lcl[10]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1735" *) 
  LUT5 #(
    .INIT(32'h01000000)) 
    \row_lcl[10]_i_5 
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [0]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(stateIgrstr),
        .I4(\FSM_sequential_stateIgrstr_reg[0]_0 ),
        .O(\row_lcl[10]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \row_lcl[10]_i_6 
       (.I0(\row_lcl_reg[10]_0 [4]),
        .I1(\row_lcl_reg[10]_0 [2]),
        .I2(\row_lcl_reg[10]_0 [0]),
        .I3(\row_lcl_reg[10]_0 [1]),
        .I4(\row_lcl_reg[10]_0 [3]),
        .I5(\row_lcl_reg[10]_0 [5]),
        .O(\row_lcl[10]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1741" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \row_lcl[1]_i_1__0 
       (.I0(\row_lcl_reg[10]_0 [0]),
        .I1(\row_lcl_reg[10]_0 [1]),
        .O(\row_lcl[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1824" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \row_lcl[2]_i_1__0 
       (.I0(\row_lcl_reg[10]_0 [1]),
        .I1(\row_lcl_reg[10]_0 [0]),
        .I2(\row_lcl_reg[10]_0 [2]),
        .O(\row_lcl[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1742" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \row_lcl[3]_i_1__0 
       (.I0(\row_lcl_reg[10]_0 [2]),
        .I1(\row_lcl_reg[10]_0 [0]),
        .I2(\row_lcl_reg[10]_0 [1]),
        .I3(\row_lcl_reg[10]_0 [3]),
        .O(\row_lcl[3]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1742" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \row_lcl[4]_i_1__0 
       (.I0(\row_lcl_reg[10]_0 [3]),
        .I1(\row_lcl_reg[10]_0 [1]),
        .I2(\row_lcl_reg[10]_0 [0]),
        .I3(\row_lcl_reg[10]_0 [2]),
        .I4(\row_lcl_reg[10]_0 [4]),
        .O(\row_lcl[4]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \row_lcl[5]_i_1__0 
       (.I0(\row_lcl_reg[10]_0 [4]),
        .I1(\row_lcl_reg[10]_0 [2]),
        .I2(\row_lcl_reg[10]_0 [0]),
        .I3(\row_lcl_reg[10]_0 [1]),
        .I4(\row_lcl_reg[10]_0 [3]),
        .I5(\row_lcl_reg[10]_0 [5]),
        .O(\row_lcl[5]_i_1__0_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \row_lcl[6]_i_1__0 
       (.I0(\row_lcl[10]_i_6_n_0 ),
        .I1(\row_lcl_reg[10]_0 [6]),
        .O(\row_lcl[6]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1750" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \row_lcl[7]_i_1__0 
       (.I0(\row_lcl[10]_i_6_n_0 ),
        .I1(\row_lcl_reg[10]_0 [6]),
        .I2(\row_lcl_reg[10]_0 [7]),
        .O(\row_lcl[7]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1750" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \row_lcl[8]_i_1__0 
       (.I0(\row_lcl[10]_i_6_n_0 ),
        .I1(\row_lcl_reg[10]_0 [6]),
        .I2(\row_lcl_reg[10]_0 [7]),
        .I3(\row_lcl_reg[10]_0 [8]),
        .O(\row_lcl[8]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1716" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \row_lcl[9]_i_1__0 
       (.I0(\row_lcl[10]_i_6_n_0 ),
        .I1(\row_lcl_reg[10]_0 [6]),
        .I2(\row_lcl_reg[10]_0 [7]),
        .I3(\row_lcl_reg[10]_0 [8]),
        .I4(\row_lcl_reg[10]_0 [9]),
        .O(\row_lcl[9]_i_1__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \row_lcl_reg[0] 
       (.C(memclk),
        .CE(sel),
        .D(\row_lcl[0]_i_1__0_n_0 ),
        .Q(\row_lcl_reg[10]_0 [0]),
        .R(clear));
  FDRE #(
    .INIT(1'b0)) 
    \row_lcl_reg[10] 
       (.C(memclk),
        .CE(sel),
        .D(\row_lcl[10]_i_3__0_n_0 ),
        .Q(\row_lcl_reg[10]_0 [10]),
        .R(clear));
  FDRE #(
    .INIT(1'b0)) 
    \row_lcl_reg[1] 
       (.C(memclk),
        .CE(sel),
        .D(\row_lcl[1]_i_1__0_n_0 ),
        .Q(\row_lcl_reg[10]_0 [1]),
        .R(clear));
  FDRE #(
    .INIT(1'b0)) 
    \row_lcl_reg[2] 
       (.C(memclk),
        .CE(sel),
        .D(\row_lcl[2]_i_1__0_n_0 ),
        .Q(\row_lcl_reg[10]_0 [2]),
        .R(clear));
  FDRE #(
    .INIT(1'b0)) 
    \row_lcl_reg[3] 
       (.C(memclk),
        .CE(sel),
        .D(\row_lcl[3]_i_1__0_n_0 ),
        .Q(\row_lcl_reg[10]_0 [3]),
        .R(clear));
  FDRE #(
    .INIT(1'b0)) 
    \row_lcl_reg[4] 
       (.C(memclk),
        .CE(sel),
        .D(\row_lcl[4]_i_1__0_n_0 ),
        .Q(\row_lcl_reg[10]_0 [4]),
        .R(clear));
  FDRE #(
    .INIT(1'b0)) 
    \row_lcl_reg[5] 
       (.C(memclk),
        .CE(sel),
        .D(\row_lcl[5]_i_1__0_n_0 ),
        .Q(\row_lcl_reg[10]_0 [5]),
        .R(clear));
  FDRE #(
    .INIT(1'b0)) 
    \row_lcl_reg[6] 
       (.C(memclk),
        .CE(sel),
        .D(\row_lcl[6]_i_1__0_n_0 ),
        .Q(\row_lcl_reg[10]_0 [6]),
        .R(clear));
  FDRE #(
    .INIT(1'b0)) 
    \row_lcl_reg[7] 
       (.C(memclk),
        .CE(sel),
        .D(\row_lcl[7]_i_1__0_n_0 ),
        .Q(\row_lcl_reg[10]_0 [7]),
        .R(clear));
  FDRE #(
    .INIT(1'b0)) 
    \row_lcl_reg[8] 
       (.C(memclk),
        .CE(sel),
        .D(\row_lcl[8]_i_1__0_n_0 ),
        .Q(\row_lcl_reg[10]_0 [8]),
        .R(clear));
  FDRE #(
    .INIT(1'b0)) 
    \row_lcl_reg[9] 
       (.C(memclk),
        .CE(sel),
        .D(\row_lcl[9]_i_1__0_n_0 ),
        .Q(\row_lcl_reg[10]_0 [9]),
        .R(clear));
  LUT5 #(
    .INIT(32'h4F4FFF4F)) 
    stateOp_i_1__0
       (.I0(reqInvAssign),
        .I1(ackInvHdrengAssign),
        .I2(stateOp_reg_0),
        .I3(ackInvHdrengSet),
        .I4(reqInvHdrengSet),
        .O(stateOp));
  FDCE stateOp_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(stateOp_reg_1),
        .Q(stateOp_reg_0));
  LUT6 #(
    .INIT(64'h040C0400C4C0C4C0)) 
    \stateStockrls[0]_i_1 
       (.I0(rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_0),
        .I1(rng_reg_0),
        .I2(stateStockrls[1]),
        .I3(stateStockrls[0]),
        .I4(\dwrRowbuf_reg[0]_1 ),
        .I5(\stateStream_reg[1]_0 ),
        .O(\stateStockrls[0]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h4FFF)) 
    \stateStockrls[1]_i_1 
       (.I0(stateStockrls[1]),
        .I1(rgbVideoinToManyAXIS_tvalid),
        .I2(stateStockrls[0]),
        .I3(rng_reg_0),
        .O(\stateStockrls[1]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0800)) 
    \stateStockrls[1]_i_2 
       (.I0(rng_reg_0),
        .I1(stateStockrls[0]),
        .I2(stateStockrls[1]),
        .I3(rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_0),
        .O(\stateStockrls[1]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateStockrls_reg[0] 
       (.C(aclk_sig),
        .CE(\stateStockrls[1]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\stateStockrls[0]_i_1_n_0 ),
        .Q(stateStockrls[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateStockrls_reg[1] 
       (.C(aclk_sig),
        .CE(\stateStockrls[1]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\stateStockrls[1]_i_2_n_0 ),
        .Q(stateStockrls[1]));
  LUT5 #(
    .INIT(32'hFFFF956A)) 
    \stateStream[0]_i_10 
       (.I0(col_lcl[2]),
        .I1(col_lcl[1]),
        .I2(col_lcl[0]),
        .I3(\stateStream_reg[0]_1 [2]),
        .I4(\stateStream[0]_i_12_n_0 ),
        .O(\stateStream[0]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1713" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \stateStream[0]_i_11 
       (.I0(col_lcl[2]),
        .I1(col_lcl[1]),
        .I2(col_lcl[0]),
        .O(\stateStream[0]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'hF69FFFFF)) 
    \stateStream[0]_i_12 
       (.I0(col_lcl[1]),
        .I1(\stateStream_reg[0]_1 [1]),
        .I2(col_lcl[0]),
        .I3(\stateStream_reg[0]_1 [0]),
        .I4(rgbFromVideoinAXIS_tvalidm2),
        .O(\stateStream[0]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hFF00FF0037000700)) 
    \stateStream[0]_i_1__0 
       (.I0(\a0[4]_i_3_n_0 ),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(rng_reg_0),
        .I4(\stateStream[0]_i_2__0_n_0 ),
        .I5(\stateStream_reg[0]_0 ),
        .O(\stateStream[0]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0006090009000009)) 
    \stateStream[0]_i_2__0 
       (.I0(col_lcl[10]),
        .I1(\stateStream_reg[0]_1 [10]),
        .I2(\stateStream[0]_i_4_n_0 ),
        .I3(\stateStream_reg[0]_1 [9]),
        .I4(\stateStream[0]_i_5_n_0 ),
        .I5(col_lcl[9]),
        .O(\stateStream[0]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFF9F6FFF6FFFFF6)) 
    \stateStream[0]_i_4 
       (.I0(col_lcl[8]),
        .I1(\stateStream_reg[0]_1 [8]),
        .I2(\stateStream[0]_i_6_n_0 ),
        .I3(\stateStream_reg[0]_1 [7]),
        .I4(\stateStream[0]_i_7_n_0 ),
        .I5(col_lcl[7]),
        .O(\stateStream[0]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1711" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \stateStream[0]_i_5 
       (.I0(col_lcl[8]),
        .I1(col_lcl[6]),
        .I2(\col_lcl[9]_i_2_n_0 ),
        .I3(col_lcl[7]),
        .O(\stateStream[0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFF9F6FFF6FFFFF6)) 
    \stateStream[0]_i_6 
       (.I0(col_lcl[6]),
        .I1(\stateStream_reg[0]_1 [6]),
        .I2(\stateStream[0]_i_8_n_0 ),
        .I3(\stateStream_reg[0]_1 [5]),
        .I4(\stateStream[0]_i_9_n_0 ),
        .I5(col_lcl[5]),
        .O(\stateStream[0]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1792" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \stateStream[0]_i_7 
       (.I0(col_lcl[6]),
        .I1(\col_lcl[9]_i_2_n_0 ),
        .O(\stateStream[0]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFF9F6FFF6FFFFF6)) 
    \stateStream[0]_i_8 
       (.I0(col_lcl[4]),
        .I1(\stateStream_reg[0]_1 [4]),
        .I2(\stateStream[0]_i_10_n_0 ),
        .I3(\stateStream_reg[0]_1 [3]),
        .I4(\stateStream[0]_i_11_n_0 ),
        .I5(col_lcl[3]),
        .O(\stateStream[0]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \stateStream[0]_i_9 
       (.I0(col_lcl[4]),
        .I1(col_lcl[2]),
        .I2(col_lcl[1]),
        .I3(col_lcl[0]),
        .I4(col_lcl[3]),
        .O(\stateStream[0]_i_9_n_0 ));
  LUT5 #(
    .INIT(32'hFFDFFFFF)) 
    \stateStream[1]_i_1__0 
       (.I0(\stateStream[1]_i_3_n_0 ),
        .I1(\stateStream[1]_i_4_n_0 ),
        .I2(rng_reg_0),
        .I3(Q[1]),
        .I4(Q[0]),
        .O(\stateStream[1]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hF838F8F800000000)) 
    \stateStream[1]_i_2__0 
       (.I0(\a0[4]_i_3_n_0 ),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(\dwrRowbuf_reg[0]_1 ),
        .I4(\stateStream_reg[1]_0 ),
        .I5(rng_reg_0),
        .O(\stateStream[1]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h80000000FFFFFFFF)) 
    \stateStream[1]_i_3 
       (.I0(\stateStream[1]_i_5_n_0 ),
        .I1(\ixMemNext_reg_n_0_[1] ),
        .I2(\ixMemNext_reg_n_0_[0] ),
        .I3(\ixMemNext_reg_n_0_[3] ),
        .I4(\ixMemNext_reg_n_0_[2] ),
        .I5(\tixVState_reg[7]_1 ),
        .O(\stateStream[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000009009)) 
    \stateStream[1]_i_4 
       (.I0(\ixMemNext_reg_n_0_[6] ),
        .I1(\ixMem_reg[7]_0 [6]),
        .I2(\ixMemNext_reg_n_0_[7] ),
        .I3(\ixMem_reg[7]_0 [7]),
        .I4(\stateStream[1]_i_7_n_0 ),
        .I5(\stateStream[1]_i_8_n_0 ),
        .O(\stateStream[1]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8000)) 
    \stateStream[1]_i_5 
       (.I0(\ixMemNext_reg_n_0_[6] ),
        .I1(\ixMemNext_reg_n_0_[7] ),
        .I2(\ixMemNext_reg_n_0_[5] ),
        .I3(\ixMemNext_reg_n_0_[4] ),
        .O(\stateStream[1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \stateStream[1]_i_7 
       (.I0(\ixMemNext_reg_n_0_[1] ),
        .I1(\ixMem_reg[7]_0 [1]),
        .I2(\ixMemNext_reg_n_0_[2] ),
        .I3(\ixMem_reg[7]_0 [2]),
        .I4(\ixMem_reg[7]_0 [0]),
        .I5(\ixMemNext_reg_n_0_[0] ),
        .O(\stateStream[1]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \stateStream[1]_i_8 
       (.I0(\ixMem_reg[7]_0 [3]),
        .I1(\ixMemNext_reg_n_0_[3] ),
        .I2(\ixMemNext_reg_n_0_[4] ),
        .I3(\ixMem_reg[7]_0 [4]),
        .I4(\ixMemNext_reg_n_0_[5] ),
        .I5(\ixMem_reg[7]_0 [5]),
        .O(\stateStream[1]_i_8_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateStream_reg[0] 
       (.C(aclk_sig),
        .CE(\stateStream[1]_i_1__0_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\stateStream[0]_i_1__0_n_0 ),
        .Q(Q[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateStream_reg[1] 
       (.C(aclk_sig),
        .CE(\stateStream[1]_i_1__0_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\stateStream[1]_i_2__0_n_0 ),
        .Q(Q[1]));
  LUT6 #(
    .INIT(64'hFFFFFFFF4F444444)) 
    \stateSwap[0]_i_1 
       (.I0(\stateSwap_reg[3]_0 [0]),
        .I1(\stateSwap[2]_i_3_n_0 ),
        .I2(ddrAXI_wlast_INST_0_i_2_n_0),
        .I3(\stateSwap[0]_i_2_n_0 ),
        .I4(\stateSwap[3]_i_4_n_0 ),
        .I5(\stateSwap[0]_i_3_n_0 ),
        .O(\stateSwap[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1822" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \stateSwap[0]_i_2 
       (.I0(\stateSwap_reg[3]_0 [2]),
        .I1(rng_memclk),
        .O(\stateSwap[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hEEEEEEEEFEEEFEFE)) 
    \stateSwap[0]_i_3 
       (.I0(\stateSwap[0]_i_4_n_0 ),
        .I1(\stateSwap[0]_i_5_n_0 ),
        .I2(rng_memclk),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[1] ),
        .I5(\row_lcl[10]_i_4_n_0 ),
        .O(\stateSwap[0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    \stateSwap[0]_i_4 
       (.I0(\stateSwap_reg[3]_0 [3]),
        .I1(rng_memclk),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(\stateSwap_reg[3]_0 [1]),
        .I5(\stateSwap[1]_i_5_n_0 ),
        .O(\stateSwap[0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h1100100010001000)) 
    \stateSwap[0]_i_5 
       (.I0(\stateSwap_reg[3]_0 [3]),
        .I1(\stateSwap_reg[3]_0 [0]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(rng_memclk),
        .I4(rgbFromVideoinAXIS_tlast_sig_memclk),
        .I5(vsync_sig_memclk),
        .O(\stateSwap[0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFEEFEAAAA)) 
    \stateSwap[1]_i_1 
       (.I0(\stateSwap[1]_i_2_n_0 ),
        .I1(\stateSwap[3]_i_4_n_0 ),
        .I2(\stateSwap_reg[2]_0 ),
        .I3(\stateSwap_reg[3]_0 [1]),
        .I4(\stateSwap[1]_i_3_n_0 ),
        .I5(\stateSwap[1]_i_4_n_0 ),
        .O(\stateSwap[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFAA10AA10001000)) 
    \stateSwap[1]_i_2 
       (.I0(\stateSwap_reg[3]_0 [1]),
        .I1(\stateSwap_reg[3]_0 [2]),
        .I2(\stateSwap[2]_i_6_n_0 ),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(\stateSwap_reg[3]_0 [3]),
        .I5(rng_memclk),
        .O(\stateSwap[1]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1822" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \stateSwap[1]_i_3 
       (.I0(rng_memclk),
        .I1(\stateSwap_reg[3]_0 [2]),
        .I2(\stateSwap_reg[3]_0 [0]),
        .O(\stateSwap[1]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1794" *) 
  LUT4 #(
    .INIT(16'hC800)) 
    \stateSwap[1]_i_4 
       (.I0(\stateSwap[1]_i_5_n_0 ),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(rng_memclk),
        .O(\stateSwap[1]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1741" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateSwap[1]_i_5 
       (.I0(\row_lcl[10]_i_3__0_n_0 ),
        .I1(\row_lcl_reg[10]_0 [1]),
        .I2(\row_lcl_reg[10]_0 [0]),
        .I3(\stateSwap[1]_i_6_n_0 ),
        .I4(\stateSwap[1]_i_7_n_0 ),
        .O(\stateSwap[1]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1716" *) 
  LUT5 #(
    .INIT(32'h7FFFFFFE)) 
    \stateSwap[1]_i_6 
       (.I0(\row_lcl[10]_i_6_n_0 ),
        .I1(\row_lcl_reg[10]_0 [6]),
        .I2(\row_lcl_reg[10]_0 [7]),
        .I3(\row_lcl_reg[10]_0 [8]),
        .I4(\row_lcl_reg[10]_0 [9]),
        .O(\stateSwap[1]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFEEE)) 
    \stateSwap[1]_i_7 
       (.I0(\row_lcl_reg[10]_0 [4]),
        .I1(\row_lcl_reg[10]_0 [2]),
        .I2(\row_lcl_reg[10]_0 [0]),
        .I3(\row_lcl_reg[10]_0 [1]),
        .I4(\row_lcl_reg[10]_0 [3]),
        .I5(\row_lcl_reg[10]_0 [5]),
        .O(\stateSwap[1]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hEAEAFFAAEAEAAAAA)) 
    \stateSwap[2]_i_1 
       (.I0(\stateSwap[2]_i_2_n_0 ),
        .I1(\stateSwap_reg[3]_0 [0]),
        .I2(\stateSwap[2]_i_3_n_0 ),
        .I3(\stateSwap[2]_i_4_n_0 ),
        .I4(\stateSwap[3]_i_4_n_0 ),
        .I5(\stateSwap_reg[2]_0 ),
        .O(\stateSwap[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h003C002C00200020)) 
    \stateSwap[2]_i_2 
       (.I0(\stateSwap[2]_i_6_n_0 ),
        .I1(\stateSwap_reg[3]_0 [2]),
        .I2(\stateSwap_reg[3]_0 [0]),
        .I3(\stateSwap_reg[3]_0 [3]),
        .I4(\stateSwap_reg[3]_0 [1]),
        .I5(rng_memclk),
        .O(\stateSwap[2]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1821" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \stateSwap[2]_i_3 
       (.I0(\stateSwap_reg[3]_0 [3]),
        .I1(\stateSwap_reg[3]_0 [1]),
        .I2(rng_memclk),
        .O(\stateSwap[2]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1794" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \stateSwap[2]_i_4 
       (.I0(rng_memclk),
        .I1(\stateSwap_reg[3]_0 [2]),
        .I2(\stateSwap_reg[3]_0 [3]),
        .I3(\stateSwap_reg[3]_0 [1]),
        .O(\stateSwap[2]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1823" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \stateSwap[2]_i_6 
       (.I0(rng_memclk),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .O(\stateSwap[2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAAABAAABAABFAABB)) 
    \stateSwap[3]_i_1 
       (.I0(\stateSwap[3]_i_3_n_0 ),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [1]),
        .I3(\stateSwap_reg[3]_0 [2]),
        .I4(\stateSwap_reg[3]_0 [0]),
        .I5(rgbFromVideoinAXIS_tlast_sig_memclk),
        .O(\stateSwap[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h000040000F000000)) 
    \stateSwap[3]_i_2 
       (.I0(\stateSwap[3]_i_4_n_0 ),
        .I1(\stateSwap_reg[3]_0 [0]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(rng_memclk),
        .I4(\stateSwap_reg[3]_0 [3]),
        .I5(\stateSwap_reg[3]_0 [1]),
        .O(\stateSwap[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hEEEEFEEEFFFFFFFF)) 
    \stateSwap[3]_i_3 
       (.I0(\stateSwap[3]_i_5_n_0 ),
        .I1(\row_lcl[10]_i_5_n_0 ),
        .I2(\stateSwap_reg[3]_0 [0]),
        .I3(\stateSwap_reg[3]_0 [1]),
        .I4(\stateSwap_reg[3]_0 [3]),
        .I5(rng_memclk),
        .O(\stateSwap[3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF7FFE)) 
    \stateSwap[3]_i_4 
       (.I0(burstSwapLast),
        .I1(rdAAXI_araddr[1]),
        .I2(rdAAXI_araddr[4]),
        .I3(rdAAXI_araddr[0]),
        .I4(rdAAXI_araddr[3]),
        .I5(rdAAXI_araddr[2]),
        .O(\stateSwap[3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFAEAAAAAA)) 
    \stateSwap[3]_i_5 
       (.I0(\stateSwap[3]_i_6_n_0 ),
        .I1(ddrAXI_arready),
        .I2(\stateSwap[3]_i_3_0 ),
        .I3(\stateSwap[3]_i_3_1 ),
        .I4(web),
        .I5(\stateSwap[3]_i_7_n_0 ),
        .O(\stateSwap[3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000020)) 
    \stateSwap[3]_i_6 
       (.I0(ddrAXI_awready),
        .I1(ddrAXI_wdata_0_sn_1),
        .I2(\stateSwap[3]_i_5_0 [1]),
        .I3(\stateSwap_reg[3]_0 [0]),
        .I4(\stateSwap_reg[3]_0 [1]),
        .I5(\stateSwap_reg[3]_0 [3]),
        .O(\stateSwap[3]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h0300000088888888)) 
    \stateSwap[3]_i_7 
       (.I0(\burstSwap[4]_i_4_n_0 ),
        .I1(\stateSwap_reg[3]_0 [0]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .I3(rgbFromVideoinAXIS_tlast_sig_memclk),
        .I4(\stateSwap_reg[3]_0 [1]),
        .I5(\stateSwap_reg[3]_0 [3]),
        .O(\stateSwap[3]_i_7_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateSwap_reg[0] 
       (.C(memclk),
        .CE(\stateSwap[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\stateSwap[0]_i_1_n_0 ),
        .Q(\stateSwap_reg[3]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSwap_reg[1] 
       (.C(memclk),
        .CE(\stateSwap[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\stateSwap[1]_i_1_n_0 ),
        .Q(\stateSwap_reg[3]_0 [1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSwap_reg[2] 
       (.C(memclk),
        .CE(\stateSwap[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\stateSwap[2]_i_1_n_0 ),
        .Q(\stateSwap_reg[3]_0 [2]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSwap_reg[3] 
       (.C(memclk),
        .CE(\stateSwap[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\stateSwap[3]_i_2_n_0 ),
        .Q(\stateSwap_reg[3]_0 [3]));
  (* SOFT_HLUTNM = "soft_lutpair1747" *) 
  LUT4 #(
    .INIT(16'hAB00)) 
    \tixVState[0]_i_1 
       (.I0(\a0[4]_i_3_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tixVState[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1751" *) 
  LUT4 #(
    .INIT(16'h5700)) 
    \tixVState[1]_i_1__1 
       (.I0(\a0[4]_i_3_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tixVState[1]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h0D00FFFF)) 
    \tixVState[7]_i_1 
       (.I0(\stateStream[1]_i_3_n_0 ),
        .I1(\stateStream[1]_i_4_n_0 ),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(rng_reg_0),
        .O(\tixVState[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1712" *) 
  LUT3 #(
    .INIT(8'h10)) 
    \tixVState[7]_i_2 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(rng_reg_0),
        .O(\tixVState[7]_i_2_n_0 ));
  FDCE \tixVState_reg[0] 
       (.C(aclk_sig),
        .CE(\tixVState[7]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tixVState[0]_i_1_n_0 ),
        .Q(\tixVState_reg[7]_0 [0]));
  FDCE \tixVState_reg[1] 
       (.C(aclk_sig),
        .CE(\tixVState[7]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tixVState[1]_i_1__1_n_0 ),
        .Q(\tixVState_reg[7]_0 [1]));
  FDCE \tixVState_reg[7] 
       (.C(aclk_sig),
        .CE(\tixVState[7]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tixVState[7]_i_2_n_0 ),
        .Q(\tixVState_reg[7]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair1769" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[0]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [0]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1774" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[10]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [10]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1774" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[11]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [11]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1775" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[12]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [12]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1775" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[13]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [13]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1776" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[14]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [14]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1776" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[15]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [15]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1777" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[16]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [16]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1777" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[17]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [17]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1778" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[18]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [18]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1778" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[19]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [19]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1769" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[1]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [1]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1779" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[20]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [20]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1779" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[21]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [21]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1780" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[22]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [22]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1780" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[23]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [23]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1781" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[24]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [24]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1781" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[25]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [25]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1782" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[26]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [26]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1782" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[27]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [27]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1783" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[28]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [28]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1783" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[29]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [29]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1770" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[2]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [2]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1784" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[30]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [30]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1784" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[31]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [31]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1770" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[3]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [3]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1771" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[4]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [4]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1771" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[5]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [5]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1772" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[6]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [6]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1772" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[7]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [7]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1773" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[8]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [8]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1773" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkstAcq[9]_i_1 
       (.I0(\tkstAcq_reg[31]_0 [9]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkstAcq[9]_i_1_n_0 ));
  FDCE \tkstAcq_reg[0] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[0]_i_1_n_0 ),
        .Q(tkstAcq[0]));
  FDCE \tkstAcq_reg[10] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[10]_i_1_n_0 ),
        .Q(tkstAcq[10]));
  FDCE \tkstAcq_reg[11] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[11]_i_1_n_0 ),
        .Q(tkstAcq[11]));
  FDCE \tkstAcq_reg[12] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[12]_i_1_n_0 ),
        .Q(tkstAcq[12]));
  FDCE \tkstAcq_reg[13] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[13]_i_1_n_0 ),
        .Q(tkstAcq[13]));
  FDCE \tkstAcq_reg[14] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[14]_i_1_n_0 ),
        .Q(tkstAcq[14]));
  FDCE \tkstAcq_reg[15] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[15]_i_1_n_0 ),
        .Q(tkstAcq[15]));
  FDCE \tkstAcq_reg[16] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[16]_i_1_n_0 ),
        .Q(tkstAcq[16]));
  FDCE \tkstAcq_reg[17] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[17]_i_1_n_0 ),
        .Q(tkstAcq[17]));
  FDCE \tkstAcq_reg[18] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[18]_i_1_n_0 ),
        .Q(tkstAcq[18]));
  FDCE \tkstAcq_reg[19] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[19]_i_1_n_0 ),
        .Q(tkstAcq[19]));
  FDCE \tkstAcq_reg[1] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[1]_i_1_n_0 ),
        .Q(tkstAcq[1]));
  FDCE \tkstAcq_reg[20] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[20]_i_1_n_0 ),
        .Q(tkstAcq[20]));
  FDCE \tkstAcq_reg[21] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[21]_i_1_n_0 ),
        .Q(tkstAcq[21]));
  FDCE \tkstAcq_reg[22] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[22]_i_1_n_0 ),
        .Q(tkstAcq[22]));
  FDCE \tkstAcq_reg[23] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[23]_i_1_n_0 ),
        .Q(tkstAcq[23]));
  FDCE \tkstAcq_reg[24] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[24]_i_1_n_0 ),
        .Q(tkstAcq[24]));
  FDCE \tkstAcq_reg[25] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[25]_i_1_n_0 ),
        .Q(tkstAcq[25]));
  FDCE \tkstAcq_reg[26] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[26]_i_1_n_0 ),
        .Q(tkstAcq[26]));
  FDCE \tkstAcq_reg[27] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[27]_i_1_n_0 ),
        .Q(tkstAcq[27]));
  FDCE \tkstAcq_reg[28] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[28]_i_1_n_0 ),
        .Q(tkstAcq[28]));
  FDCE \tkstAcq_reg[29] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[29]_i_1_n_0 ),
        .Q(tkstAcq[29]));
  FDCE \tkstAcq_reg[2] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[2]_i_1_n_0 ),
        .Q(tkstAcq[2]));
  FDCE \tkstAcq_reg[30] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[30]_i_1_n_0 ),
        .Q(tkstAcq[30]));
  FDCE \tkstAcq_reg[31] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[31]_i_1_n_0 ),
        .Q(tkstAcq[31]));
  FDCE \tkstAcq_reg[3] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[3]_i_1_n_0 ),
        .Q(tkstAcq[3]));
  FDCE \tkstAcq_reg[4] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[4]_i_1_n_0 ),
        .Q(tkstAcq[4]));
  FDCE \tkstAcq_reg[5] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[5]_i_1_n_0 ),
        .Q(tkstAcq[5]));
  FDCE \tkstAcq_reg[6] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[6]_i_1_n_0 ),
        .Q(tkstAcq[6]));
  FDCE \tkstAcq_reg[7] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[7]_i_1_n_0 ),
        .Q(tkstAcq[7]));
  FDCE \tkstAcq_reg[8] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[8]_i_1_n_0 ),
        .Q(tkstAcq[8]));
  FDCE \tkstAcq_reg[9] 
       (.C(aclk_sig),
        .CE(\a0[4]_i_1_n_0 ),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkstAcq[9]_i_1_n_0 ),
        .Q(tkstAcq[9]));
  (* SOFT_HLUTNM = "soft_lutpair1753" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[0]_i_1 
       (.I0(tkstAcq[0]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1758" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[10]_i_1 
       (.I0(tkstAcq[10]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1758" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[11]_i_1 
       (.I0(tkstAcq[11]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1759" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[12]_i_1 
       (.I0(tkstAcq[12]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1759" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[13]_i_1 
       (.I0(tkstAcq[13]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1760" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[14]_i_1 
       (.I0(tkstAcq[14]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1760" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[15]_i_1 
       (.I0(tkstAcq[15]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1761" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[16]_i_1 
       (.I0(tkstAcq[16]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1761" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[17]_i_1 
       (.I0(tkstAcq[17]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1762" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[18]_i_1 
       (.I0(tkstAcq[18]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1762" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[19]_i_1 
       (.I0(tkstAcq[19]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1753" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[1]_i_1 
       (.I0(tkstAcq[1]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1763" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[20]_i_1 
       (.I0(tkstAcq[20]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1763" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[21]_i_1 
       (.I0(tkstAcq[21]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1764" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[22]_i_1 
       (.I0(tkstAcq[22]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1764" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[23]_i_1 
       (.I0(tkstAcq[23]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1765" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[24]_i_1 
       (.I0(tkstAcq[24]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1765" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[25]_i_1 
       (.I0(tkstAcq[25]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1766" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[26]_i_1 
       (.I0(tkstAcq[26]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1766" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[27]_i_1 
       (.I0(tkstAcq[27]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1767" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[28]_i_1 
       (.I0(tkstAcq[28]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1767" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[29]_i_1 
       (.I0(tkstAcq[29]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1754" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[2]_i_1 
       (.I0(tkstAcq[2]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1768" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[30]_i_1 
       (.I0(tkstAcq[30]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1768" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[31]_i_1__0 
       (.I0(tkstAcq[31]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[31]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1754" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[3]_i_1 
       (.I0(tkstAcq[3]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1755" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[4]_i_1 
       (.I0(tkstAcq[4]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1755" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[5]_i_1 
       (.I0(tkstAcq[5]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1756" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[6]_i_1 
       (.I0(tkstAcq[6]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1756" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[7]_i_1 
       (.I0(tkstAcq[7]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1757" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[8]_i_1 
       (.I0(tkstAcq[8]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1757" *) 
  LUT4 #(
    .INIT(16'hA800)) 
    \tkst[9]_i_1 
       (.I0(tkstAcq[9]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(rng_reg_0),
        .O(\tkst[9]_i_1_n_0 ));
  FDCE \tkst_reg[0] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[0]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [0]));
  FDCE \tkst_reg[10] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[10]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [10]));
  FDCE \tkst_reg[11] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[11]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [11]));
  FDCE \tkst_reg[12] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[12]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [12]));
  FDCE \tkst_reg[13] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[13]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [13]));
  FDCE \tkst_reg[14] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[14]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [14]));
  FDCE \tkst_reg[15] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[15]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [15]));
  FDCE \tkst_reg[16] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[16]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [16]));
  FDCE \tkst_reg[17] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[17]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [17]));
  FDCE \tkst_reg[18] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[18]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [18]));
  FDCE \tkst_reg[19] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[19]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [19]));
  FDCE \tkst_reg[1] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[1]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [1]));
  FDCE \tkst_reg[20] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[20]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [20]));
  FDCE \tkst_reg[21] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[21]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [21]));
  FDCE \tkst_reg[22] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[22]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [22]));
  FDCE \tkst_reg[23] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[23]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [23]));
  FDCE \tkst_reg[24] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[24]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [24]));
  FDCE \tkst_reg[25] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[25]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [25]));
  FDCE \tkst_reg[26] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[26]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [26]));
  FDCE \tkst_reg[27] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[27]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [27]));
  FDCE \tkst_reg[28] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[28]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [28]));
  FDCE \tkst_reg[29] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[29]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [29]));
  FDCE \tkst_reg[2] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[2]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [2]));
  FDCE \tkst_reg[30] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[30]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [30]));
  FDCE \tkst_reg[31] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[31]_i_1__0_n_0 ),
        .Q(\tkst_reg[31]_0 [31]));
  FDCE \tkst_reg[3] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[3]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [3]));
  FDCE \tkst_reg[4] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[4]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [4]));
  FDCE \tkst_reg[5] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[5]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [5]));
  FDCE \tkst_reg[6] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[6]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [6]));
  FDCE \tkst_reg[7] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[7]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [7]));
  FDCE \tkst_reg[8] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[8]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [8]));
  FDCE \tkst_reg[9] 
       (.C(aclk_sig),
        .CE(ixMem),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\tkst[9]_i_1_n_0 ),
        .Q(\tkst_reg[31]_0 [9]));
  (* SOFT_HLUTNM = "soft_lutpair1806" *) 
  LUT3 #(
    .INIT(8'h9F)) 
    \vsync_sig_i[0]_i_1 
       (.I0(\stateStream_reg[1]_0 ),
        .I1(vsync_sig_to_memclk_reg_n_0),
        .I2(vsync_sig_i),
        .O(\vsync_sig_i[0]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \vsync_sig_i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(\vsync_sig_i[0]_i_1_n_0 ),
        .Q(vsync_sig_i));
  LUT3 #(
    .INIT(8'hE8)) 
    vsync_sig_memclk_i_1
       (.I0(vsync_sig_to_memclkm2),
        .I1(vsync_sig_to_memclkm1),
        .I2(vsync_sig_memclk),
        .O(vsync_sig_memclk_i_1_n_0));
  FDCE vsync_sig_memclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(vsync_sig_memclk_i_1_n_0),
        .Q(vsync_sig_memclk));
  (* SOFT_HLUTNM = "soft_lutpair1806" *) 
  LUT3 #(
    .INIT(8'hE4)) 
    vsync_sig_to_memclk_i_1
       (.I0(vsync_sig_i),
        .I1(vsync_sig_to_memclk_reg_n_0),
        .I2(\stateStream_reg[1]_0 ),
        .O(vsync_sig_to_memclk_i_1_n_0));
  FDCE vsync_sig_to_memclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\dwrRowbuf_reg[0]_0 ),
        .D(vsync_sig_to_memclk_i_1_n_0),
        .Q(vsync_sig_to_memclk_reg_n_0));
  FDCE vsync_sig_to_memclkm1_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(vsync_sig_to_memclk_reg_n_0),
        .Q(vsync_sig_to_memclkm1));
  FDCE vsync_sig_to_memclkm2_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(vsync_sig_to_memclkm1),
        .Q(vsync_sig_to_memclkm2));
  LUT6 #(
    .INIT(64'hFFFFFFF000000400)) 
    \wordEgrLast[2]_i_1 
       (.I0(ddrAXI_wlast_INST_0_i_2_n_0),
        .I1(\stateSwap_reg[3]_0 [2]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I5(\wordEgrLast_reg_n_0_[2] ),
        .O(\wordEgrLast[2]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \wordEgrLast_reg[2] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\wordEgrLast[2]_i_1_n_0 ),
        .Q(\wordEgrLast_reg_n_0_[2] ));
  (* SOFT_HLUTNM = "soft_lutpair1743" *) 
  LUT4 #(
    .INIT(16'h00EA)) 
    \wordEgrRd[0]_i_1 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I3(wordEgrRd[0]),
        .O(\wordEgrRd[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1743" *) 
  LUT5 #(
    .INIT(32'h00EAEA00)) 
    \wordEgrRd[1]_i_1 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I3(wordEgrRd[1]),
        .I4(wordEgrRd[0]),
        .O(\wordEgrRd[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00EAEA00EA00EA00)) 
    \wordEgrRd[2]_i_1 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I3(wordEgrRd[2]),
        .I4(wordEgrRd[0]),
        .I5(wordEgrRd[1]),
        .O(\wordEgrRd[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hCCCFCDCFCCCCCDCF)) 
    \wordEgrRd[3]_i_1 
       (.I0(\wordEgrRd[3]_i_3_n_0 ),
        .I1(\wordEgrRd[3]_i_4_n_0 ),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I5(p_0_in),
        .O(\wordEgrRd[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h28888888)) 
    \wordEgrRd[3]_i_2 
       (.I0(\wordEgrRd[3]_i_5_n_0 ),
        .I1(wordEgrRd[3]),
        .I2(wordEgrRd[2]),
        .I3(wordEgrRd[1]),
        .I4(wordEgrRd[0]),
        .O(\wordEgrRd[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1730" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \wordEgrRd[3]_i_3 
       (.I0(\stateSwap_reg[3]_0 [3]),
        .I1(\stateSwap_reg[3]_0 [1]),
        .I2(\stateSwap_reg[3]_0 [2]),
        .O(\wordEgrRd[3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000004000000)) 
    \wordEgrRd[3]_i_4 
       (.I0(egrAXIS_tlast),
        .I1(ddrAXI_wready),
        .I2(ddrAXI_wdata_0_sn_1),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I5(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .O(\wordEgrRd[3]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1802" *) 
  LUT3 #(
    .INIT(8'hF8)) 
    \wordEgrRd[3]_i_5 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .O(\wordEgrRd[3]_i_5_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \wordEgrRd_reg[0] 
       (.C(memclk),
        .CE(\wordEgrRd[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\wordEgrRd[0]_i_1_n_0 ),
        .Q(wordEgrRd[0]));
  FDCE #(
    .INIT(1'b0)) 
    \wordEgrRd_reg[1] 
       (.C(memclk),
        .CE(\wordEgrRd[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\wordEgrRd[1]_i_1_n_0 ),
        .Q(wordEgrRd[1]));
  FDCE #(
    .INIT(1'b0)) 
    \wordEgrRd_reg[2] 
       (.C(memclk),
        .CE(\wordEgrRd[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\wordEgrRd[2]_i_1_n_0 ),
        .Q(wordEgrRd[2]));
  FDCE #(
    .INIT(1'b0)) 
    \wordEgrRd_reg[3] 
       (.C(memclk),
        .CE(\wordEgrRd[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\wordEgrRd[3]_i_2_n_0 ),
        .Q(wordEgrRd[3]));
  (* SOFT_HLUTNM = "soft_lutpair1738" *) 
  LUT4 #(
    .INIT(16'h5750)) 
    \wordEgrWr[0]_i_1 
       (.I0(wordEgrWr__0[0]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .O(\wordEgrWr[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1738" *) 
  LUT5 #(
    .INIT(32'h666F6600)) 
    \wordEgrWr[1]_i_1 
       (.I0(wordEgrWr__0[0]),
        .I1(wordEgrWr__0[1]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .O(\wordEgrWr[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00EAEA00EA00EA00)) 
    \wordEgrWr[2]_i_1 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I3(wordEgrWr__0[2]),
        .I4(wordEgrWr__0[0]),
        .I5(wordEgrWr__0[1]),
        .O(\wordEgrWr[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFAAEFAAEFAAEF)) 
    \wordEgrWr[3]_i_1 
       (.I0(\wordEgrWr[3]_i_3_n_0 ),
        .I1(p_0_in),
        .I2(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .I3(\wordEgrWr[3]_i_4_n_0 ),
        .I4(\wordEgrWr[3]_i_5_n_0 ),
        .I5(\wordEgrRd[3]_i_4_n_0 ),
        .O(\wordEgrWr[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h28888888)) 
    \wordEgrWr[3]_i_2 
       (.I0(\wordEgrRd[3]_i_5_n_0 ),
        .I1(wordEgrWr__0[3]),
        .I2(wordEgrWr__0[2]),
        .I3(wordEgrWr__0[1]),
        .I4(wordEgrWr__0[0]),
        .O(\wordEgrWr[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1730" *) 
  LUT5 #(
    .INIT(32'h00000002)) 
    \wordEgrWr[3]_i_3 
       (.I0(\stateSwap_reg[3]_0 [2]),
        .I1(\stateSwap_reg[3]_0 [1]),
        .I2(\stateSwap_reg[3]_0 [3]),
        .I3(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .I4(\FSM_sequential_stateEgrstr_reg[2]_0 [1]),
        .O(\wordEgrWr[3]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair1803" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \wordEgrWr[3]_i_4 
       (.I0(\FSM_sequential_stateEgrstr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateEgrstr_reg[2]_0 [2]),
        .O(\wordEgrWr[3]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFE)) 
    \wordEgrWr[3]_i_5 
       (.I0(wordEgrWr__0[0]),
        .I1(wordEgrWr__0[3]),
        .I2(\wordEgrLast_reg_n_0_[2] ),
        .I3(wordEgrWr__0[2]),
        .I4(wordEgrWr__0[1]),
        .O(\wordEgrWr[3]_i_5_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \wordEgrWr_reg[0] 
       (.C(memclk),
        .CE(\wordEgrWr[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\wordEgrWr[0]_i_1_n_0 ),
        .Q(wordEgrWr__0[0]));
  FDCE #(
    .INIT(1'b0)) 
    \wordEgrWr_reg[1] 
       (.C(memclk),
        .CE(\wordEgrWr[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\wordEgrWr[1]_i_1_n_0 ),
        .Q(wordEgrWr__0[1]));
  FDCE #(
    .INIT(1'b0)) 
    \wordEgrWr_reg[2] 
       (.C(memclk),
        .CE(\wordEgrWr[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\wordEgrWr[2]_i_1_n_0 ),
        .Q(wordEgrWr__0[2]));
  FDCE #(
    .INIT(1'b0)) 
    \wordEgrWr_reg[3] 
       (.C(memclk),
        .CE(\wordEgrWr[3]_i_1_n_0 ),
        .CLR(AR),
        .D(\wordEgrWr[3]_i_2_n_0 ),
        .Q(wordEgrWr__0[3]));
  (* SOFT_HLUTNM = "soft_lutpair1717" *) 
  LUT5 #(
    .INIT(32'h01000000)) 
    \wrmutex[0]_i_1 
       (.I0(\stateSwap_reg[3]_0 [0]),
        .I1(\stateSwap_reg[3]_0 [3]),
        .I2(\stateSwap_reg[3]_0 [1]),
        .I3(\stateSwap_reg[3]_0 [2]),
        .I4(\stateSwap[3]_i_5_0 [0]),
        .O(\FSM_onehot_stateWrite_reg[1] [0]));
  (* SOFT_HLUTNM = "soft_lutpair1717" *) 
  LUT5 #(
    .INIT(32'hAAA8AAAA)) 
    \wrmutex[1]_i_1 
       (.I0(\stateSwap[3]_i_5_0 [0]),
        .I1(\stateSwap_reg[3]_0 [0]),
        .I2(\stateSwap_reg[3]_0 [3]),
        .I3(\stateSwap_reg[3]_0 [1]),
        .I4(\stateSwap_reg[3]_0 [2]),
        .O(\FSM_onehot_stateWrite_reg[1] [1]));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Hostif
   (commok,
    rng_reg,
    hdrNotFix,
    reqInvDecimConfig,
    reqInvDecimAcquire,
    reqInvDecimSet,
    tixVState1,
    stateOp_reg,
    reqInvHdrengSet,
    reqInvAssign,
    stateOp_reg_0,
    rng_reg_0,
    reqInvMemtrackSet,
    reqInvMemtrackClearMask,
    reqInvMemtrackSelect,
    stateOp_reg_1,
    reqInvStepmuxSet,
    reqReset_sig_reg_0,
    \i_reg[2]__0 ,
    \tixVController_reg[1]_0 ,
    reqInvTkclksrcSetTkst,
    \stateOp_reg[5]_0 ,
    apuAXIL_rdata,
    \tixVCommand_reg[0]_0 ,
    reqInvDirectorConfig,
    rng_reg_1,
    reqInvRotaryMoveto,
    step1__6,
    reqInvRotaryConfig,
    S,
    \invbuf_reg[0][7]_0 ,
    \invbuf_reg[1][7]_0 ,
    D,
    rng_reg_2,
    reqInvHshktrackSet,
    reqInvHshktrackClearMask,
    reqInvHshktrackSelect,
    \mask_reg[5] ,
    \mask_reg[4] ,
    \invbuf_reg[0][0]_0 ,
    \invbuf_reg[0][0]_1 ,
    \mask_reg[1] ,
    \mask_reg[0] ,
    rng_reg_3,
    rng_reg_4,
    reqInvDecimUnlock,
    \stateOp_reg[0]_0 ,
    \stateOp_reg[0]_1 ,
    E,
    \tixVCommand_reg[0]_1 ,
    ackInvSet_sig,
    stateOp47_out,
    reqInvConfigSynth,
    reqInvConfig,
    stateOp_reg_2,
    \stateLive_reg[2] ,
    reqInvSetReg,
    reqInvGetReg,
    reqInvModReg,
    \invbuf_reg[0][7]_1 ,
    \i2cRegaddr[15]_i_6_0 ,
    ackInvModReg_sig_reg,
    \invbuf_reg[0][5]_0 ,
    \invbuf_reg[0][4]_0 ,
    \invbuf_reg[1][6]_0 ,
    \invbuf_reg[1][4]_0 ,
    \invbuf_reg[1][3]_0 ,
    \invbuf_reg[1][0]_0 ,
    stateCorecfg0,
    reqInvGetCorereg,
    reqInvSetCorereg,
    \invbuf_reg[0][7]_2 ,
    \invbuf_reg[0][7]_3 ,
    \stateCorecfg[2]_i_4_0 ,
    \invbuf_reg[2][7]_0 ,
    \invbuf_reg[5][7]_0 ,
    \invbuf_reg[4][7]_0 ,
    \tixVController_reg[1]_1 ,
    reqInvVidtrackSelect,
    reqInvVidtrackSet,
    \mask_reg[7] ,
    \mask_reg[6] ,
    \mask_reg[5]_0 ,
    \mask_reg[4]_0 ,
    \invbuf_reg[0][1]_0 ,
    \mask_reg[3] ,
    \mask_reg[2] ,
    \mask_reg[1]_0 ,
    \mask_reg[0]_0 ,
    \stateOp_reg[2]_0 ,
    \stateOp_reg[2]_1 ,
    \tixVController_reg[2]_0 ,
    reqInvMemtrackSetMask,
    ackInvSetMask_sig_reg,
    stateOp5_out,
    reqInvTraceConfig,
    reqInvTraceAcquire,
    ackInvAcquire_sig3_out,
    ackInvConfig_sig,
    stateOp_reg_3,
    reqInvDirectorSet,
    stateOp0_out,
    reqReset_sig_reg_1,
    \stateOp_reg[1]_0 ,
    reqInvRotaryZero,
    ccwNotCw5_in,
    \stateOp_reg[0]_2 ,
    tkclk_sig_reg,
    ackInvConfig_sig0__6,
    \stateOp_reg[1]_1 ,
    \stateOp_reg[1]_2 ,
    \invbuf_reg[0][5]_1 ,
    \invbuf_reg[0][5]_2 ,
    DI,
    \invbuf_reg[0][5]_3 ,
    \invbuf_reg[0][5]_4 ,
    ccwNotCw0,
    \mask_reg[3]_0 ,
    targetNotSteady,
    \stateOp_reg[1]_3 ,
    ackInvSet_sig_0,
    \stateOp_reg[0]_3 ,
    \stateOp_reg[0]_4 ,
    reqInvHshktrackSetMask,
    ackInvSetMask_sig_i_2__0_0,
    \staTixVTrigger[7]_i_3__0_0 ,
    ackInvClearMask_sig_reg,
    ackInvSelect_sig_reg,
    ackInvSelect_sig_reg_0,
    reqInvSelect,
    reqInvCputrackSet,
    \tixVController_reg[0]_0 ,
    \stateOp_reg[1]_4 ,
    reqInvAcquire,
    reqInvCornerConfig,
    \tixVState_reg[1] ,
    ackInvUnlock_sig0_in,
    \stateOp_reg[0]_5 ,
    \stateOp_reg[0]_6 ,
    \stateOp_reg[1]_5 ,
    ackInvSet_sig_i_8_0,
    ackInvSet_sig_1,
    rng_reg_5,
    rng_reg_6,
    ackInvAssign_sig,
    \invbuf_reg[0][7]_4 ,
    stateOp_reg_4,
    reqCoobufCornerToHostif,
    reqFlgbufTraceToHostif,
    reqSeqbufHshktrackToHostif,
    reqSeqbufMemtrackToHostif,
    reqSeqbufVidtrackToHostif,
    reqSeqbufCputrackToHostif,
    reqPvwbufDecimToHostif,
    dnePvwbufDecimToHostif,
    dneSeqbufCputrackToHostif,
    dneSeqbufMemtrackToHostif,
    dneSeqbufVidtrackToHostif,
    dneSeqbufHshktrackToHostif,
    dneFlgbufTraceToHostif,
    dneCoobufCornerToHostif,
    reqInvLaserSet,
    pvwbufDecimToHostifAXIS_tready,
    seqbufCputrackToHostifAXIS_tready,
    seqbufMemtrackToHostifAXIS_tready,
    seqbufVidtrackToHostifAXIS_tready,
    seqbufHshktrackToHostifAXIS_tready,
    flgbufTraceToHostifAXIS_tready,
    coobufCornerToHostifAXIS_tready,
    \invbuf_reg[6][2]_0 ,
    \invbuf_reg[8][2]_0 ,
    commok_sig_reg_0,
    \seq[1]_2 ,
    \invbuf_reg[0][7]_5 ,
    synthNotLive,
    AXIL_wready_sig_reg,
    AXIL_awready_sig_reg,
    AXIL_arready,
    AXIL_bvalid_sig_reg,
    apuAXIL_rvalid,
    aclk_sig,
    \stateOp_reg[1]_6 ,
    rng_reg_7,
    rng_reg_8,
    \mask_reg[7]_0 ,
    rng_reg_9,
    ackInvStepmuxSet,
    linNotRot_reg,
    stateMclk,
    reset_reg,
    Q,
    tkclk,
    \retbuf_reg[1][7]_0 ,
    rng_reg_10,
    ccwNotCw2_carry__0,
    \mask_reg[5]_1 ,
    rng_reg_11,
    \mask_reg[5]_2 ,
    \mask_reg[4]_1 ,
    \mask_reg[3]_1 ,
    \mask_reg[2]_0 ,
    \mask_reg[1]_1 ,
    \mask_reg[0]_1 ,
    \tixVState_reg[1]_0 ,
    \stateOp_reg[0]_7 ,
    \tixVState_reg[1]_1 ,
    stateOp_reg_5,
    i2cReadNotWrite_reg,
    \i2cRegaddr_reg[15] ,
    DO,
    ackInvCamifModReg,
    ackInvCamifGetReg,
    ackInvCamifSetReg,
    \i2cRegaddr_reg[13] ,
    ackInvCamifGetCorereg,
    ackInvCamifSetCorereg,
    \mask_reg[7]_1 ,
    \mask_reg[6]_0 ,
    \mask_reg[5]_3 ,
    \mask_reg[4]_2 ,
    \mask_reg[3]_2 ,
    \mask_reg[2]_1 ,
    \mask_reg[1]_2 ,
    \mask_reg[0]_2 ,
    ackInvMemtrackSetMask,
    ackInvMemtrackSet,
    ackInvMemtrackSelect,
    ackInvMemtrackClearMask,
    stateOp_reg_6,
    rng_sig_reg,
    rng,
    ackInvSet_sig_reg,
    \stateOp_reg[0]_8 ,
    ackInvRotarySet,
    ackInvRotaryMoveto,
    ackInvRotaryZero,
    ackInvRotaryConfig,
    CO,
    O,
    ccwNotCw_reg,
    ccwNotCw_reg_0,
    ccwNotCw_reg_1,
    ackInvHshktrackClearMask,
    ackInvHshktrackSet,
    ackInvHshktrackSelect,
    ackInvHshktrackSetMask,
    ackInvCputrackSelect,
    ackInvCputrackSet,
    \stateOp_reg[0]_9 ,
    \tixVState_reg[1]_2 ,
    \tixVState_reg[1]_3 ,
    ackInvCornerUnlock,
    ackInvCornerAcquire,
    ackInvCornerSet,
    ackInvCornerConfig,
    rng_reg_12,
    rng_reg_13,
    \retbuf[4][7]_i_12_0 ,
    vidtrackGetInfoPtr0Seqbuf,
    vidtrackGetInfoTixVState,
    \retbuf_reg[12][7]_0 ,
    \retbuf_reg[8][7]_0 ,
    \pollbuf_reg[2][7]_0 ,
    ackSeqbufHshktrackToHostif,
    \pollbuf_reg[2][4]_0 ,
    seqbufHshktrackToHostifAXIS_tvalid,
    \pollbuf[2][7]_i_2_0 ,
    \pollbuf[2][3]_i_2_0 ,
    ackCoobufCornerToHostif,
    ackFlgbufTraceToHostif,
    ackSeqbufVidtrackToHostif,
    ackSeqbufCputrackToHostif,
    ackSeqbufMemtrackToHostif,
    ackPvwbufDecimToHostif,
    ackInvTraceAcquire,
    ackInvTkclksrcSetTkst,
    \retbuf[0][7]_i_20_0 ,
    \retbuf_reg[1][7]_i_13_0 ,
    ackInvTraceConfig,
    \retbuf_reg[1][7]_i_13_1 ,
    \retbuf_reg[1][7]_i_13_2 ,
    \retbuf[0][7]_i_10 ,
    \retbuf[1][7]_i_8_0 ,
    \retbuf[1][7]_i_8_1 ,
    \retbuf[1][7]_i_8_2 ,
    \retbuf[0][7]_i_20_1 ,
    ackInvCamifConfigSynth,
    ackInvCamifConfig,
    ackInvDecimUnlock,
    ackInvDirectorSet,
    ackInvDirectorConfig,
    ackInvVidtrackSet,
    ackInvVidtrackSelect,
    ackInvLaserSet,
    ackInvHdrengSet,
    ackInvHdrengAssign,
    ackInvDecimConfig,
    ackInvDecimSet,
    ackInvDecimAcquire,
    \retbuf[0][7]_i_10_0 ,
    \retbuf[0][7]_i_20_2 ,
    \retbuf[0][6]_i_4_0 ,
    \retbuf[0][5]_i_3_0 ,
    \retbuf[0][4]_i_3_0 ,
    \retbuf[0][3]_i_3_0 ,
    \retbuf_reg[0][1]_i_5_0 ,
    \retbuf[0][0]_i_2_0 ,
    \retbuf[5][7]_i_5_0 ,
    \retbuf[5][7]_i_5_1 ,
    \retbuf[6][7]_i_4_0 ,
    \retbuf[6][7]_i_4_1 ,
    memtrackGetInfoTixVState,
    hshktrackGetInfoTixVState,
    cputrackGetInfoTixVState,
    traceGetInfoTixVState,
    cputrackGetInfoPtr0Seqbuf,
    hshktrackGetInfoPtr0Seqbuf,
    \retbuf[5][1]_i_2_0 ,
    seqbufVidtrackToHostifAXIS_tvalid,
    seqbufCputrackToHostifAXIS_tvalid,
    seqbufMemtrackToHostifAXIS_tvalid,
    \pollbuf[2][4]_i_2_0 ,
    \pollbuf[2][4]_i_2_1 ,
    avllenSeqbufMemtrackToHostif,
    doutb,
    \txAXIS_tdata[63]_i_8_0 ,
    \txAXIS_tdata[63]_i_8_1 ,
    \txAXIS_tdata[63]_i_8_2 ,
    \txAXIS_tdata[63]_i_8_3 ,
    \txAXIS_tdata[63]_i_8_4 ,
    \txAXIS_tdata[63]_i_8_5 ,
    apuAXIL_wvalid,
    apuAXIL_awvalid,
    apuAXIL_wdata,
    apuAXIL_awaddr,
    apuAXIL_araddr,
    apuAXIL_bready,
    apuAXIL_wstrb,
    apuAXIL_arvalid,
    apuAXIL_rready);
  output commok;
  output rng_reg;
  output hdrNotFix;
  output reqInvDecimConfig;
  output reqInvDecimAcquire;
  output reqInvDecimSet;
  output tixVState1;
  output stateOp_reg;
  output reqInvHdrengSet;
  output reqInvAssign;
  output stateOp_reg_0;
  output rng_reg_0;
  output reqInvMemtrackSet;
  output reqInvMemtrackClearMask;
  output reqInvMemtrackSelect;
  output stateOp_reg_1;
  output reqInvStepmuxSet;
  output reqReset_sig_reg_0;
  output \i_reg[2]__0 ;
  output \tixVController_reg[1]_0 ;
  output reqInvTkclksrcSetTkst;
  output [5:0]\stateOp_reg[5]_0 ;
  output [63:0]apuAXIL_rdata;
  output \tixVCommand_reg[0]_0 ;
  output reqInvDirectorConfig;
  output rng_reg_1;
  output reqInvRotaryMoveto;
  output step1__6;
  output reqInvRotaryConfig;
  output [5:0]S;
  output [7:0]\invbuf_reg[0][7]_0 ;
  output [7:0]\invbuf_reg[1][7]_0 ;
  output [23:0]D;
  output rng_reg_2;
  output reqInvHshktrackSet;
  output reqInvHshktrackClearMask;
  output reqInvHshktrackSelect;
  output \mask_reg[5] ;
  output \mask_reg[4] ;
  output \invbuf_reg[0][0]_0 ;
  output \invbuf_reg[0][0]_1 ;
  output \mask_reg[1] ;
  output \mask_reg[0] ;
  output [0:0]rng_reg_3;
  output [1:0]rng_reg_4;
  output reqInvDecimUnlock;
  output \stateOp_reg[0]_0 ;
  output [0:0]\stateOp_reg[0]_1 ;
  output [0:0]E;
  output \tixVCommand_reg[0]_1 ;
  output ackInvSet_sig;
  output stateOp47_out;
  output reqInvConfigSynth;
  output reqInvConfig;
  output [0:0]stateOp_reg_2;
  output \stateLive_reg[2] ;
  output reqInvSetReg;
  output reqInvGetReg;
  output reqInvModReg;
  output [9:0]\invbuf_reg[0][7]_1 ;
  output \i2cRegaddr[15]_i_6_0 ;
  output ackInvModReg_sig_reg;
  output \invbuf_reg[0][5]_0 ;
  output \invbuf_reg[0][4]_0 ;
  output \invbuf_reg[1][6]_0 ;
  output \invbuf_reg[1][4]_0 ;
  output \invbuf_reg[1][3]_0 ;
  output \invbuf_reg[1][0]_0 ;
  output stateCorecfg0;
  output reqInvGetCorereg;
  output reqInvSetCorereg;
  output [6:0]\invbuf_reg[0][7]_2 ;
  output [6:0]\invbuf_reg[0][7]_3 ;
  output \stateCorecfg[2]_i_4_0 ;
  output [31:0]\invbuf_reg[2][7]_0 ;
  output [7:0]\invbuf_reg[5][7]_0 ;
  output [7:0]\invbuf_reg[4][7]_0 ;
  output \tixVController_reg[1]_1 ;
  output reqInvVidtrackSelect;
  output reqInvVidtrackSet;
  output \mask_reg[7] ;
  output \mask_reg[6] ;
  output \mask_reg[5]_0 ;
  output \mask_reg[4]_0 ;
  output \invbuf_reg[0][1]_0 ;
  output \mask_reg[3] ;
  output \mask_reg[2] ;
  output \mask_reg[1]_0 ;
  output \mask_reg[0]_0 ;
  output [0:0]\stateOp_reg[2]_0 ;
  output [0:0]\stateOp_reg[2]_1 ;
  output \tixVController_reg[2]_0 ;
  output reqInvMemtrackSetMask;
  output ackInvSetMask_sig_reg;
  output stateOp5_out;
  output reqInvTraceConfig;
  output reqInvTraceAcquire;
  output ackInvAcquire_sig3_out;
  output ackInvConfig_sig;
  output stateOp_reg_3;
  output reqInvDirectorSet;
  output stateOp0_out;
  output [0:0]reqReset_sig_reg_1;
  output [0:0]\stateOp_reg[1]_0 ;
  output reqInvRotaryZero;
  output ccwNotCw5_in;
  output \stateOp_reg[0]_2 ;
  output [0:0]tkclk_sig_reg;
  output ackInvConfig_sig0__6;
  output \stateOp_reg[1]_1 ;
  output \stateOp_reg[1]_2 ;
  output [3:0]\invbuf_reg[0][5]_1 ;
  output [2:0]\invbuf_reg[0][5]_2 ;
  output [2:0]DI;
  output [2:0]\invbuf_reg[0][5]_3 ;
  output [0:0]\invbuf_reg[0][5]_4 ;
  output ccwNotCw0;
  output [0:0]\mask_reg[3]_0 ;
  output targetNotSteady;
  output [0:0]\stateOp_reg[1]_3 ;
  output ackInvSet_sig_0;
  output [0:0]\stateOp_reg[0]_3 ;
  output [0:0]\stateOp_reg[0]_4 ;
  output reqInvHshktrackSetMask;
  output ackInvSetMask_sig_i_2__0_0;
  output \staTixVTrigger[7]_i_3__0_0 ;
  output ackInvClearMask_sig_reg;
  output ackInvSelect_sig_reg;
  output ackInvSelect_sig_reg_0;
  output reqInvSelect;
  output reqInvCputrackSet;
  output \tixVController_reg[0]_0 ;
  output [0:0]\stateOp_reg[1]_4 ;
  output reqInvAcquire;
  output reqInvCornerConfig;
  output [0:0]\tixVState_reg[1] ;
  output ackInvUnlock_sig0_in;
  output [0:0]\stateOp_reg[0]_5 ;
  output [0:0]\stateOp_reg[0]_6 ;
  output \stateOp_reg[1]_5 ;
  output ackInvSet_sig_i_8_0;
  output ackInvSet_sig_1;
  output rng_reg_5;
  output [0:0]rng_reg_6;
  output ackInvAssign_sig;
  output [7:0]\invbuf_reg[0][7]_4 ;
  output stateOp_reg_4;
  output reqCoobufCornerToHostif;
  output reqFlgbufTraceToHostif;
  output reqSeqbufHshktrackToHostif;
  output reqSeqbufMemtrackToHostif;
  output reqSeqbufVidtrackToHostif;
  output reqSeqbufCputrackToHostif;
  output reqPvwbufDecimToHostif;
  output dnePvwbufDecimToHostif;
  output dneSeqbufCputrackToHostif;
  output dneSeqbufMemtrackToHostif;
  output dneSeqbufVidtrackToHostif;
  output dneSeqbufHshktrackToHostif;
  output dneFlgbufTraceToHostif;
  output dneCoobufCornerToHostif;
  output reqInvLaserSet;
  output pvwbufDecimToHostifAXIS_tready;
  output seqbufCputrackToHostifAXIS_tready;
  output seqbufMemtrackToHostifAXIS_tready;
  output seqbufVidtrackToHostifAXIS_tready;
  output seqbufHshktrackToHostifAXIS_tready;
  output flgbufTraceToHostifAXIS_tready;
  output coobufCornerToHostifAXIS_tready;
  output [10:0]\invbuf_reg[6][2]_0 ;
  output [10:0]\invbuf_reg[8][2]_0 ;
  output [1:0]commok_sig_reg_0;
  output [0:0]\seq[1]_2 ;
  output [1:0]\invbuf_reg[0][7]_5 ;
  output synthNotLive;
  output AXIL_wready_sig_reg;
  output AXIL_awready_sig_reg;
  output AXIL_arready;
  output AXIL_bvalid_sig_reg;
  output apuAXIL_rvalid;
  input aclk_sig;
  input [0:0]\stateOp_reg[1]_6 ;
  input rng_reg_7;
  input rng_reg_8;
  input \mask_reg[7]_0 ;
  input rng_reg_9;
  input ackInvStepmuxSet;
  input linNotRot_reg;
  input stateMclk;
  input reset_reg;
  input [3:0]Q;
  input tkclk;
  input [31:0]\retbuf_reg[1][7]_0 ;
  input rng_reg_10;
  input [13:0]ccwNotCw2_carry__0;
  input \mask_reg[5]_1 ;
  input rng_reg_11;
  input \mask_reg[5]_2 ;
  input \mask_reg[4]_1 ;
  input \mask_reg[3]_1 ;
  input \mask_reg[2]_0 ;
  input \mask_reg[1]_1 ;
  input \mask_reg[0]_1 ;
  input \tixVState_reg[1]_0 ;
  input [1:0]\stateOp_reg[0]_7 ;
  input [1:0]\tixVState_reg[1]_1 ;
  input stateOp_reg_5;
  input [2:0]i2cReadNotWrite_reg;
  input \i2cRegaddr_reg[15] ;
  input [6:0]DO;
  input ackInvCamifModReg;
  input ackInvCamifGetReg;
  input ackInvCamifSetReg;
  input [1:0]\i2cRegaddr_reg[13] ;
  input ackInvCamifGetCorereg;
  input ackInvCamifSetCorereg;
  input \mask_reg[7]_1 ;
  input \mask_reg[6]_0 ;
  input \mask_reg[5]_3 ;
  input \mask_reg[4]_2 ;
  input \mask_reg[3]_2 ;
  input \mask_reg[2]_1 ;
  input \mask_reg[1]_2 ;
  input \mask_reg[0]_2 ;
  input ackInvMemtrackSetMask;
  input ackInvMemtrackSet;
  input ackInvMemtrackSelect;
  input ackInvMemtrackClearMask;
  input stateOp_reg_6;
  input rng_sig_reg;
  input rng;
  input [1:0]ackInvSet_sig_reg;
  input \stateOp_reg[0]_8 ;
  input ackInvRotarySet;
  input ackInvRotaryMoveto;
  input ackInvRotaryZero;
  input ackInvRotaryConfig;
  input [0:0]CO;
  input [5:0]O;
  input [0:0]ccwNotCw_reg;
  input [0:0]ccwNotCw_reg_0;
  input [0:0]ccwNotCw_reg_1;
  input ackInvHshktrackClearMask;
  input ackInvHshktrackSet;
  input ackInvHshktrackSelect;
  input ackInvHshktrackSetMask;
  input ackInvCputrackSelect;
  input ackInvCputrackSet;
  input [1:0]\stateOp_reg[0]_9 ;
  input [1:0]\tixVState_reg[1]_2 ;
  input \tixVState_reg[1]_3 ;
  input ackInvCornerUnlock;
  input ackInvCornerAcquire;
  input ackInvCornerSet;
  input ackInvCornerConfig;
  input rng_reg_12;
  input rng_reg_13;
  input [27:0]\retbuf[4][7]_i_12_0 ;
  input [9:0]vidtrackGetInfoPtr0Seqbuf;
  input [1:0]vidtrackGetInfoTixVState;
  input [27:0]\retbuf_reg[12][7]_0 ;
  input [27:0]\retbuf_reg[8][7]_0 ;
  input [1:0]\pollbuf_reg[2][7]_0 ;
  input ackSeqbufHshktrackToHostif;
  input [0:0]\pollbuf_reg[2][4]_0 ;
  input seqbufHshktrackToHostifAXIS_tvalid;
  input [1:0]\pollbuf[2][7]_i_2_0 ;
  input [1:0]\pollbuf[2][3]_i_2_0 ;
  input ackCoobufCornerToHostif;
  input ackFlgbufTraceToHostif;
  input ackSeqbufVidtrackToHostif;
  input ackSeqbufCputrackToHostif;
  input ackSeqbufMemtrackToHostif;
  input ackPvwbufDecimToHostif;
  input ackInvTraceAcquire;
  input ackInvTkclksrcSetTkst;
  input [25:0]\retbuf[0][7]_i_20_0 ;
  input [31:0]\retbuf_reg[1][7]_i_13_0 ;
  input ackInvTraceConfig;
  input [31:0]\retbuf_reg[1][7]_i_13_1 ;
  input [31:0]\retbuf_reg[1][7]_i_13_2 ;
  input [31:0]\retbuf[0][7]_i_10 ;
  input [31:0]\retbuf[1][7]_i_8_0 ;
  input [31:0]\retbuf[1][7]_i_8_1 ;
  input [31:0]\retbuf[1][7]_i_8_2 ;
  input [27:0]\retbuf[0][7]_i_20_1 ;
  input ackInvCamifConfigSynth;
  input ackInvCamifConfig;
  input ackInvDecimUnlock;
  input ackInvDirectorSet;
  input ackInvDirectorConfig;
  input ackInvVidtrackSet;
  input ackInvVidtrackSelect;
  input ackInvLaserSet;
  input ackInvHdrengSet;
  input ackInvHdrengAssign;
  input ackInvDecimConfig;
  input ackInvDecimSet;
  input ackInvDecimAcquire;
  input [2:0]\retbuf[0][7]_i_10_0 ;
  input [1:0]\retbuf[0][7]_i_20_2 ;
  input \retbuf[0][6]_i_4_0 ;
  input \retbuf[0][5]_i_3_0 ;
  input \retbuf[0][4]_i_3_0 ;
  input \retbuf[0][3]_i_3_0 ;
  input \retbuf_reg[0][1]_i_5_0 ;
  input \retbuf[0][0]_i_2_0 ;
  input [7:0]\retbuf[5][7]_i_5_0 ;
  input [7:0]\retbuf[5][7]_i_5_1 ;
  input [7:0]\retbuf[6][7]_i_4_0 ;
  input [7:0]\retbuf[6][7]_i_4_1 ;
  input [1:0]memtrackGetInfoTixVState;
  input [1:0]hshktrackGetInfoTixVState;
  input [1:0]cputrackGetInfoTixVState;
  input [0:0]traceGetInfoTixVState;
  input [9:0]cputrackGetInfoPtr0Seqbuf;
  input [9:0]hshktrackGetInfoPtr0Seqbuf;
  input [9:0]\retbuf[5][1]_i_2_0 ;
  input seqbufVidtrackToHostifAXIS_tvalid;
  input seqbufCputrackToHostifAXIS_tvalid;
  input seqbufMemtrackToHostifAXIS_tvalid;
  input [0:0]\pollbuf[2][4]_i_2_0 ;
  input [0:0]\pollbuf[2][4]_i_2_1 ;
  input [0:0]avllenSeqbufMemtrackToHostif;
  input [63:0]doutb;
  input [63:0]\txAXIS_tdata[63]_i_8_0 ;
  input [63:0]\txAXIS_tdata[63]_i_8_1 ;
  input [63:0]\txAXIS_tdata[63]_i_8_2 ;
  input [63:0]\txAXIS_tdata[63]_i_8_3 ;
  input [63:0]\txAXIS_tdata[63]_i_8_4 ;
  input [63:0]\txAXIS_tdata[63]_i_8_5 ;
  input apuAXIL_wvalid;
  input apuAXIL_awvalid;
  input [63:0]apuAXIL_wdata;
  input [1:0]apuAXIL_awaddr;
  input [1:0]apuAXIL_araddr;
  input apuAXIL_bready;
  input [7:0]apuAXIL_wstrb;
  input apuAXIL_arvalid;
  input apuAXIL_rready;

  wire AXIL_arready;
  wire AXIL_awready_sig_reg;
  wire AXIL_bvalid_sig_reg;
  wire AXIL_wready_sig_reg;
  wire [15:0]AXIS_tdata;
  wire [7:0]AXIS_tkeep;
  wire AXIS_tlast;
  wire AXIS_tvalid;
  wire [0:0]CO;
  wire [23:0]D;
  wire [2:0]DI;
  wire [6:0]DO;
  wire [0:0]E;
  wire \FSM_onehot_stateCoobufB[0]_i_3_n_0 ;
  wire \FSM_onehot_stateCoobufB[3]_i_4_n_0 ;
  wire \FSM_onehot_stateCoobufB[5]_i_4_n_0 ;
  wire [5:0]O;
  wire [3:0]Q;
  wire [5:0]S;
  wire ackCoobufCornerToHostif;
  wire ackFlgbufTraceToHostif;
  wire ackInvAcquire_sig3_out;
  wire ackInvAssign_sig;
  wire ackInvCamifConfig;
  wire ackInvCamifConfigSynth;
  wire ackInvCamifGetCorereg;
  wire ackInvCamifGetReg;
  wire ackInvCamifModReg;
  wire ackInvCamifSetCorereg;
  wire ackInvCamifSetReg;
  wire ackInvClearMask_sig_reg;
  wire ackInvConfigSynth_sig_i_5_n_0;
  wire ackInvConfig_sig;
  wire ackInvConfig_sig0__6;
  wire ackInvConfig_sig_i_7_n_0;
  wire ackInvCornerAcquire;
  wire ackInvCornerConfig;
  wire ackInvCornerSet;
  wire ackInvCornerUnlock;
  wire ackInvCputrackSelect;
  wire ackInvCputrackSet;
  wire ackInvDecimAcquire;
  wire ackInvDecimConfig;
  wire ackInvDecimSet;
  wire ackInvDecimUnlock;
  wire ackInvDirectorConfig;
  wire ackInvDirectorSet;
  wire ackInvHdrengAssign;
  wire ackInvHdrengSet;
  wire ackInvHshktrackClearMask;
  wire ackInvHshktrackSelect;
  wire ackInvHshktrackSet;
  wire ackInvHshktrackSetMask;
  wire ackInvLaserSet;
  wire ackInvMemtrackClearMask;
  wire ackInvMemtrackSelect;
  wire ackInvMemtrackSet;
  wire ackInvMemtrackSetMask;
  wire ackInvModReg_sig_reg;
  wire ackInvMoveto_sig_i_6_n_0;
  wire ackInvRotaryConfig;
  wire ackInvRotaryMoveto;
  wire ackInvRotarySet;
  wire ackInvRotaryZero;
  wire ackInvSelect_sig_reg;
  wire ackInvSelect_sig_reg_0;
  wire ackInvSetMask_sig_i_2__0_0;
  wire ackInvSetMask_sig_reg;
  wire ackInvSet_sig;
  wire ackInvSet_sig_0;
  wire ackInvSet_sig_1;
  wire ackInvSet_sig_i_3_n_0;
  wire ackInvSet_sig_i_4_n_0;
  wire ackInvSet_sig_i_8_0;
  wire ackInvSet_sig_i_9_n_0;
  wire [1:0]ackInvSet_sig_reg;
  wire ackInvStepmuxSet;
  wire ackInvTkclksrcSetTkst;
  wire ackInvTraceAcquire;
  wire ackInvTraceConfig;
  wire ackInvUnlock_sig0_in;
  wire ackInvUnlock_sig_i_3_n_0;
  wire ackInvUnlock_sig_i_4_n_0;
  wire ackInvVidtrackSelect;
  wire ackInvVidtrackSet;
  wire ackPvwbufDecimToHostif;
  wire ackSeqbufCputrackToHostif;
  wire ackSeqbufHshktrackToHostif;
  wire ackSeqbufMemtrackToHostif;
  wire ackSeqbufVidtrackToHostif;
  wire aclk_sig;
  wire [1:0]apuAXIL_araddr;
  wire apuAXIL_arvalid;
  wire [1:0]apuAXIL_awaddr;
  wire apuAXIL_awvalid;
  wire apuAXIL_bready;
  wire [63:0]apuAXIL_rdata;
  wire apuAXIL_rready;
  wire apuAXIL_rvalid;
  wire [63:0]apuAXIL_wdata;
  wire [7:0]apuAXIL_wstrb;
  wire apuAXIL_wvalid;
  wire [0:0]avllenSeqbufMemtrackToHostif;
  wire ccwNotCw0;
  wire [13:0]ccwNotCw2_carry__0;
  wire ccwNotCw5_in;
  wire ccwNotCw_i_2_n_0;
  wire ccwNotCw_i_3_n_0;
  wire [0:0]ccwNotCw_reg;
  wire [0:0]ccwNotCw_reg_0;
  wire [0:0]ccwNotCw_reg_1;
  wire commok;
  wire [1:0]commok_sig_reg_0;
  wire coobufCornerToHostifAXIS_tready;
  wire [9:0]cputrackGetInfoPtr0Seqbuf;
  wire [1:0]cputrackGetInfoTixVState;
  wire \crcAXIS_tkeep[0]_i_2__0_n_0 ;
  wire \crcAXIS_tkeep[1]_i_10_n_0 ;
  wire \crcAXIS_tkeep[1]_i_11_n_0 ;
  wire \crcAXIS_tkeep[1]_i_12_n_0 ;
  wire \crcAXIS_tkeep[1]_i_13_n_0 ;
  wire \crcAXIS_tkeep[1]_i_14_n_0 ;
  wire \crcAXIS_tkeep[1]_i_4_n_0 ;
  wire \crcAXIS_tkeep[1]_i_5_n_0 ;
  wire \crcAXIS_tkeep[1]_i_6_n_0 ;
  wire \crcAXIS_tkeep[1]_i_7_n_0 ;
  wire \crcAXIS_tkeep[1]_i_8_n_0 ;
  wire \crcAXIS_tkeep[1]_i_9_n_0 ;
  wire \crcAXIS_tkeep[3]_i_2_n_0 ;
  wire \crcAXIS_tkeep[3]_i_3_n_0 ;
  wire \crcAXIS_tkeep[7]_i_10_n_0 ;
  wire \crcAXIS_tkeep[7]_i_12_n_0 ;
  wire \crcAXIS_tkeep[7]_i_13_n_0 ;
  wire \crcAXIS_tkeep[7]_i_15_n_0 ;
  wire \crcAXIS_tkeep[7]_i_16_n_0 ;
  wire \crcAXIS_tkeep[7]_i_17_n_0 ;
  wire \crcAXIS_tkeep[7]_i_18_n_0 ;
  wire \crcAXIS_tkeep[7]_i_19_n_0 ;
  wire \crcAXIS_tkeep[7]_i_20_n_0 ;
  wire \crcAXIS_tkeep[7]_i_21_n_0 ;
  wire \crcAXIS_tkeep[7]_i_22_n_0 ;
  wire \crcAXIS_tkeep[7]_i_23_n_0 ;
  wire \crcAXIS_tkeep[7]_i_24_n_0 ;
  wire \crcAXIS_tkeep[7]_i_25_n_0 ;
  wire \crcAXIS_tkeep[7]_i_5_n_0 ;
  wire \crcAXIS_tkeep[7]_i_6_n_0 ;
  wire \crcAXIS_tkeep[7]_i_8_n_0 ;
  wire \crcAXIS_tkeep[7]_i_9_n_0 ;
  wire \crcAXIS_tkeep_reg[1]_i_2_n_5 ;
  wire \crcAXIS_tkeep_reg[1]_i_2_n_6 ;
  wire \crcAXIS_tkeep_reg[1]_i_2_n_7 ;
  wire \crcAXIS_tkeep_reg[1]_i_3_n_0 ;
  wire \crcAXIS_tkeep_reg[1]_i_3_n_1 ;
  wire \crcAXIS_tkeep_reg[1]_i_3_n_2 ;
  wire \crcAXIS_tkeep_reg[1]_i_3_n_3 ;
  wire \crcAXIS_tkeep_reg[1]_i_3_n_4 ;
  wire \crcAXIS_tkeep_reg[1]_i_3_n_5 ;
  wire \crcAXIS_tkeep_reg[1]_i_3_n_6 ;
  wire \crcAXIS_tkeep_reg[1]_i_3_n_7 ;
  wire \crcAXIS_tkeep_reg[7]_i_11_n_12 ;
  wire \crcAXIS_tkeep_reg[7]_i_11_n_6 ;
  wire \crcAXIS_tkeep_reg[7]_i_11_n_7 ;
  wire \crcAXIS_tkeep_reg[7]_i_14_n_0 ;
  wire \crcAXIS_tkeep_reg[7]_i_14_n_1 ;
  wire \crcAXIS_tkeep_reg[7]_i_14_n_2 ;
  wire \crcAXIS_tkeep_reg[7]_i_14_n_3 ;
  wire \crcAXIS_tkeep_reg[7]_i_14_n_4 ;
  wire \crcAXIS_tkeep_reg[7]_i_14_n_5 ;
  wire \crcAXIS_tkeep_reg[7]_i_14_n_6 ;
  wire \crcAXIS_tkeep_reg[7]_i_14_n_7 ;
  wire crcAXIS_tlast_sig0;
  wire [28:1]crcAXIS_tlast_sig2;
  wire crcAXIS_tlast_sig_i_13_n_0;
  wire crcAXIS_tlast_sig_i_14_n_0;
  wire crcAXIS_tlast_sig_i_15_n_0;
  wire crcAXIS_tlast_sig_i_2_n_0;
  wire crcAXIS_tlast_sig_i_4_n_0;
  wire crcAXIS_tlast_sig_i_5_n_0;
  wire crcAXIS_tlast_sig_i_7_n_0;
  wire crcAXIS_tlast_sig_i_9_n_0;
  wire crcAXIS_tlast_sig_reg_n_0;
  wire crc_imd0100_out;
  wire crc_imd0112_out;
  wire crc_imd0115_out;
  wire crc_imd0118_out;
  wire crc_imd0121_out;
  wire crc_imd0124_out;
  wire crc_imd0148_out;
  wire crc_imd0149_out;
  wire crc_imd0150_out;
  wire crc_imd0151_out;
  wire crc_imd0152_out;
  wire crc_imd0165_out;
  wire crc_imd0172_out;
  wire crc_imd0173_out;
  wire crc_imd0174_out;
  wire crc_imd0175_out;
  wire crc_imd0176_out;
  wire crc_imd0198_out;
  wire crc_imd0200_out;
  wire crc_imd0202_out;
  wire crc_imd041_out;
  wire crc_imd042_out;
  wire crc_imd043_out;
  wire crc_imd065_out;
  wire crc_imd066_out;
  wire crc_imd067_out;
  wire crc_imd068_out;
  wire crc_imd069_out;
  wire crc_imd081_out;
  wire crc_imd083_out;
  wire crc_imd085_out;
  wire crc_imd086_out;
  wire crc_imd087_out;
  wire dneCoobufCornerToHostif;
  wire dneFlgbufTraceToHostif;
  wire dnePvwbufDecimToHostif;
  wire dneSeqbufCputrackToHostif;
  wire dneSeqbufHshktrackToHostif;
  wire dneSeqbufMemtrackToHostif;
  wire dneSeqbufVidtrackToHostif;
  wire [63:0]doutb;
  wire flgbufTraceToHostifAXIS_tready;
  wire hdrNotFix;
  wire hdrNotFix_i_2_n_0;
  wire [9:0]hshktrackGetInfoPtr0Seqbuf;
  wire [1:0]hshktrackGetInfoTixVState;
  wire [2:0]i2cReadNotWrite_reg;
  wire \i2cRegaddr[15]_i_11_n_0 ;
  wire \i2cRegaddr[15]_i_6_0 ;
  wire [1:0]\i2cRegaddr_reg[13] ;
  wire \i2cRegaddr_reg[15] ;
  wire i__i_3_n_0;
  wire i__i_4_n_0;
  wire i__i_5_n_0;
  wire \i_reg[2]__0 ;
  wire \invbuf[0][7]_i_2_n_0 ;
  wire \invbuf[9][7]_i_10_n_0 ;
  wire \invbuf[9][7]_i_11_n_0 ;
  wire \invbuf[9][7]_i_13_n_0 ;
  wire \invbuf[9][7]_i_14_n_0 ;
  wire \invbuf[9][7]_i_15_n_0 ;
  wire \invbuf[9][7]_i_16_n_0 ;
  wire \invbuf[9][7]_i_17_n_0 ;
  wire \invbuf[9][7]_i_18_n_0 ;
  wire \invbuf[9][7]_i_19_n_0 ;
  wire \invbuf[9][7]_i_20_n_0 ;
  wire \invbuf[9][7]_i_21_n_0 ;
  wire \invbuf[9][7]_i_22_n_0 ;
  wire \invbuf[9][7]_i_24_n_0 ;
  wire \invbuf[9][7]_i_25_n_0 ;
  wire \invbuf[9][7]_i_26_n_0 ;
  wire \invbuf[9][7]_i_27_n_0 ;
  wire \invbuf[9][7]_i_28_n_0 ;
  wire \invbuf[9][7]_i_29_n_0 ;
  wire \invbuf[9][7]_i_30_n_0 ;
  wire \invbuf[9][7]_i_31_n_0 ;
  wire \invbuf[9][7]_i_32_n_0 ;
  wire \invbuf[9][7]_i_3_n_0 ;
  wire \invbuf[9][7]_i_5_n_0 ;
  wire \invbuf[9][7]_i_6_n_0 ;
  wire \invbuf[9][7]_i_7_n_0 ;
  wire \invbuf[9][7]_i_8_n_0 ;
  wire \invbuf[9][7]_i_9_n_0 ;
  wire \invbuf_reg[0][0]_0 ;
  wire \invbuf_reg[0][0]_1 ;
  wire \invbuf_reg[0][1]_0 ;
  wire \invbuf_reg[0][4]_0 ;
  wire \invbuf_reg[0][5]_0 ;
  wire [3:0]\invbuf_reg[0][5]_1 ;
  wire [2:0]\invbuf_reg[0][5]_2 ;
  wire [2:0]\invbuf_reg[0][5]_3 ;
  wire [0:0]\invbuf_reg[0][5]_4 ;
  wire [7:0]\invbuf_reg[0][7]_0 ;
  wire [9:0]\invbuf_reg[0][7]_1 ;
  wire [6:0]\invbuf_reg[0][7]_2 ;
  wire [6:0]\invbuf_reg[0][7]_3 ;
  wire [7:0]\invbuf_reg[0][7]_4 ;
  wire [1:0]\invbuf_reg[0][7]_5 ;
  wire \invbuf_reg[1][0]_0 ;
  wire \invbuf_reg[1][3]_0 ;
  wire \invbuf_reg[1][4]_0 ;
  wire \invbuf_reg[1][6]_0 ;
  wire [7:0]\invbuf_reg[1][7]_0 ;
  wire [31:0]\invbuf_reg[2][7]_0 ;
  wire [7:0]\invbuf_reg[4][7]_0 ;
  wire [7:0]\invbuf_reg[5][7]_0 ;
  wire [10:0]\invbuf_reg[6][2]_0 ;
  wire [10:0]\invbuf_reg[8][2]_0 ;
  wire \invbuf_reg[9][7]_i_12_n_0 ;
  wire \invbuf_reg[9][7]_i_12_n_1 ;
  wire \invbuf_reg[9][7]_i_12_n_2 ;
  wire \invbuf_reg[9][7]_i_12_n_3 ;
  wire \invbuf_reg[9][7]_i_12_n_4 ;
  wire \invbuf_reg[9][7]_i_12_n_5 ;
  wire \invbuf_reg[9][7]_i_12_n_6 ;
  wire \invbuf_reg[9][7]_i_12_n_7 ;
  wire \ixMemNext[7]_i_4_n_0 ;
  wire [5:0]ixRetbufCrc;
  wire \ixRetbufCrc[4]_i_2_n_0 ;
  wire \ixRetbufCrc[4]_i_3_n_0 ;
  wire \ixRetbufCrc[4]_i_4_n_0 ;
  wire \ixRetbufCrc[4]_i_5_n_0 ;
  wire \ixRetbufCrc[5]_i_3_n_0 ;
  wire \ixRetbufCrc[5]_i_4_n_0 ;
  wire \lastAXIS_tkeep[3]_i_2_n_0 ;
  wire \lastAXIS_tkeep[6]_i_2_n_0 ;
  wire \lastAXIS_tkeep[7]_i_2_n_0 ;
  wire \lastAXIS_tkeep_reg_n_0_[1] ;
  wire \lastAXIS_tkeep_reg_n_0_[2] ;
  wire \lastAXIS_tkeep_reg_n_0_[3] ;
  wire \lastAXIS_tkeep_reg_n_0_[4] ;
  wire \lastAXIS_tkeep_reg_n_0_[5] ;
  wire \lastAXIS_tkeep_reg_n_0_[6] ;
  wire \lastAXIS_tkeep_reg_n_0_[7] ;
  wire \len_reg_n_0_[0] ;
  wire \len_reg_n_0_[10] ;
  wire \len_reg_n_0_[11] ;
  wire \len_reg_n_0_[12] ;
  wire \len_reg_n_0_[13] ;
  wire \len_reg_n_0_[14] ;
  wire \len_reg_n_0_[15] ;
  wire \len_reg_n_0_[16] ;
  wire \len_reg_n_0_[17] ;
  wire \len_reg_n_0_[18] ;
  wire \len_reg_n_0_[19] ;
  wire \len_reg_n_0_[1] ;
  wire \len_reg_n_0_[20] ;
  wire \len_reg_n_0_[21] ;
  wire \len_reg_n_0_[22] ;
  wire \len_reg_n_0_[23] ;
  wire \len_reg_n_0_[24] ;
  wire \len_reg_n_0_[25] ;
  wire \len_reg_n_0_[26] ;
  wire \len_reg_n_0_[27] ;
  wire \len_reg_n_0_[28] ;
  wire \len_reg_n_0_[29] ;
  wire \len_reg_n_0_[2] ;
  wire \len_reg_n_0_[30] ;
  wire \len_reg_n_0_[31] ;
  wire \len_reg_n_0_[3] ;
  wire \len_reg_n_0_[4] ;
  wire \len_reg_n_0_[5] ;
  wire \len_reg_n_0_[6] ;
  wire \len_reg_n_0_[7] ;
  wire \len_reg_n_0_[8] ;
  wire \len_reg_n_0_[9] ;
  wire linNotRot_i_2_n_0;
  wire linNotRot_reg;
  wire \lsb[1]_i_2_n_0 ;
  wire \mask[1]_i_2_n_0 ;
  wire \mask[3]_i_2__0_n_0 ;
  wire \mask[3]_i_2_n_0 ;
  wire \mask[4]_i_2_n_0 ;
  wire \mask[5]_i_2__0_n_0 ;
  wire \mask[5]_i_2_n_0 ;
  wire \mask[5]_i_3_n_0 ;
  wire \mask[6]_i_2_n_0 ;
  wire \mask[7]_i_2_n_0 ;
  wire \mask[7]_i_3_n_0 ;
  wire \mask_reg[0] ;
  wire \mask_reg[0]_0 ;
  wire \mask_reg[0]_1 ;
  wire \mask_reg[0]_2 ;
  wire \mask_reg[1] ;
  wire \mask_reg[1]_0 ;
  wire \mask_reg[1]_1 ;
  wire \mask_reg[1]_2 ;
  wire \mask_reg[2] ;
  wire \mask_reg[2]_0 ;
  wire \mask_reg[2]_1 ;
  wire \mask_reg[3] ;
  wire [0:0]\mask_reg[3]_0 ;
  wire \mask_reg[3]_1 ;
  wire \mask_reg[3]_2 ;
  wire \mask_reg[4] ;
  wire \mask_reg[4]_0 ;
  wire \mask_reg[4]_1 ;
  wire \mask_reg[4]_2 ;
  wire \mask_reg[5] ;
  wire \mask_reg[5]_0 ;
  wire \mask_reg[5]_1 ;
  wire \mask_reg[5]_2 ;
  wire \mask_reg[5]_3 ;
  wire \mask_reg[6] ;
  wire \mask_reg[6]_0 ;
  wire \mask_reg[7] ;
  wire \mask_reg[7]_0 ;
  wire \mask_reg[7]_1 ;
  wire [1:0]memtrackGetInfoTixVState;
  wire myCrc_n_0;
  wire myCrc_n_1;
  wire myCrc_n_10;
  wire myCrc_n_100;
  wire myCrc_n_101;
  wire myCrc_n_102;
  wire myCrc_n_103;
  wire myCrc_n_104;
  wire myCrc_n_105;
  wire myCrc_n_106;
  wire myCrc_n_107;
  wire myCrc_n_108;
  wire myCrc_n_109;
  wire myCrc_n_110;
  wire myCrc_n_111;
  wire myCrc_n_112;
  wire myCrc_n_113;
  wire myCrc_n_114;
  wire myCrc_n_115;
  wire myCrc_n_116;
  wire myCrc_n_117;
  wire myCrc_n_118;
  wire myCrc_n_119;
  wire myCrc_n_120;
  wire myCrc_n_121;
  wire myCrc_n_122;
  wire myCrc_n_123;
  wire myCrc_n_124;
  wire myCrc_n_125;
  wire myCrc_n_126;
  wire myCrc_n_127;
  wire myCrc_n_128;
  wire myCrc_n_129;
  wire myCrc_n_130;
  wire myCrc_n_131;
  wire myCrc_n_132;
  wire myCrc_n_133;
  wire myCrc_n_134;
  wire myCrc_n_135;
  wire myCrc_n_136;
  wire myCrc_n_137;
  wire myCrc_n_138;
  wire myCrc_n_139;
  wire myCrc_n_140;
  wire myCrc_n_141;
  wire myCrc_n_142;
  wire myCrc_n_143;
  wire myCrc_n_144;
  wire myCrc_n_145;
  wire myCrc_n_146;
  wire myCrc_n_147;
  wire myCrc_n_148;
  wire myCrc_n_149;
  wire myCrc_n_150;
  wire myCrc_n_151;
  wire myCrc_n_152;
  wire myCrc_n_153;
  wire myCrc_n_154;
  wire myCrc_n_155;
  wire myCrc_n_156;
  wire myCrc_n_157;
  wire myCrc_n_158;
  wire myCrc_n_159;
  wire myCrc_n_160;
  wire myCrc_n_161;
  wire myCrc_n_162;
  wire myCrc_n_163;
  wire myCrc_n_164;
  wire myCrc_n_165;
  wire myCrc_n_166;
  wire myCrc_n_167;
  wire myCrc_n_168;
  wire myCrc_n_169;
  wire myCrc_n_170;
  wire myCrc_n_171;
  wire myCrc_n_172;
  wire myCrc_n_173;
  wire myCrc_n_174;
  wire myCrc_n_175;
  wire myCrc_n_176;
  wire myCrc_n_177;
  wire myCrc_n_178;
  wire myCrc_n_179;
  wire myCrc_n_180;
  wire myCrc_n_181;
  wire myCrc_n_182;
  wire myCrc_n_183;
  wire myCrc_n_184;
  wire myCrc_n_185;
  wire myCrc_n_186;
  wire myCrc_n_187;
  wire myCrc_n_188;
  wire myCrc_n_189;
  wire myCrc_n_19;
  wire myCrc_n_190;
  wire myCrc_n_191;
  wire myCrc_n_192;
  wire myCrc_n_193;
  wire myCrc_n_194;
  wire myCrc_n_195;
  wire myCrc_n_196;
  wire myCrc_n_197;
  wire myCrc_n_198;
  wire myCrc_n_199;
  wire myCrc_n_2;
  wire myCrc_n_20;
  wire myCrc_n_200;
  wire myCrc_n_201;
  wire myCrc_n_202;
  wire myCrc_n_203;
  wire myCrc_n_204;
  wire myCrc_n_205;
  wire myCrc_n_206;
  wire myCrc_n_207;
  wire myCrc_n_208;
  wire myCrc_n_209;
  wire myCrc_n_21;
  wire myCrc_n_210;
  wire myCrc_n_211;
  wire myCrc_n_212;
  wire myCrc_n_213;
  wire myCrc_n_214;
  wire myCrc_n_215;
  wire myCrc_n_216;
  wire myCrc_n_217;
  wire myCrc_n_218;
  wire myCrc_n_219;
  wire myCrc_n_22;
  wire myCrc_n_220;
  wire myCrc_n_221;
  wire myCrc_n_222;
  wire myCrc_n_223;
  wire myCrc_n_224;
  wire myCrc_n_225;
  wire myCrc_n_226;
  wire myCrc_n_227;
  wire myCrc_n_228;
  wire myCrc_n_229;
  wire myCrc_n_23;
  wire myCrc_n_230;
  wire myCrc_n_231;
  wire myCrc_n_232;
  wire myCrc_n_233;
  wire myCrc_n_234;
  wire myCrc_n_235;
  wire myCrc_n_236;
  wire myCrc_n_237;
  wire myCrc_n_238;
  wire myCrc_n_239;
  wire myCrc_n_24;
  wire myCrc_n_240;
  wire myCrc_n_241;
  wire myCrc_n_242;
  wire myCrc_n_243;
  wire myCrc_n_244;
  wire myCrc_n_245;
  wire myCrc_n_246;
  wire myCrc_n_247;
  wire myCrc_n_248;
  wire myCrc_n_249;
  wire myCrc_n_25;
  wire myCrc_n_250;
  wire myCrc_n_251;
  wire myCrc_n_252;
  wire myCrc_n_253;
  wire myCrc_n_254;
  wire myCrc_n_255;
  wire myCrc_n_256;
  wire myCrc_n_257;
  wire myCrc_n_258;
  wire myCrc_n_259;
  wire myCrc_n_26;
  wire myCrc_n_260;
  wire myCrc_n_261;
  wire myCrc_n_262;
  wire myCrc_n_263;
  wire myCrc_n_264;
  wire myCrc_n_265;
  wire myCrc_n_266;
  wire myCrc_n_267;
  wire myCrc_n_268;
  wire myCrc_n_269;
  wire myCrc_n_27;
  wire myCrc_n_270;
  wire myCrc_n_271;
  wire myCrc_n_272;
  wire myCrc_n_273;
  wire myCrc_n_274;
  wire myCrc_n_275;
  wire myCrc_n_276;
  wire myCrc_n_277;
  wire myCrc_n_278;
  wire myCrc_n_279;
  wire myCrc_n_28;
  wire myCrc_n_280;
  wire myCrc_n_281;
  wire myCrc_n_282;
  wire myCrc_n_283;
  wire myCrc_n_284;
  wire myCrc_n_285;
  wire myCrc_n_286;
  wire myCrc_n_287;
  wire myCrc_n_288;
  wire myCrc_n_289;
  wire myCrc_n_29;
  wire myCrc_n_290;
  wire myCrc_n_291;
  wire myCrc_n_292;
  wire myCrc_n_293;
  wire myCrc_n_294;
  wire myCrc_n_295;
  wire myCrc_n_296;
  wire myCrc_n_297;
  wire myCrc_n_298;
  wire myCrc_n_299;
  wire myCrc_n_3;
  wire myCrc_n_30;
  wire myCrc_n_300;
  wire myCrc_n_301;
  wire myCrc_n_302;
  wire myCrc_n_303;
  wire myCrc_n_304;
  wire myCrc_n_305;
  wire myCrc_n_306;
  wire myCrc_n_307;
  wire myCrc_n_308;
  wire myCrc_n_309;
  wire myCrc_n_31;
  wire myCrc_n_310;
  wire myCrc_n_311;
  wire myCrc_n_312;
  wire myCrc_n_313;
  wire myCrc_n_314;
  wire myCrc_n_315;
  wire myCrc_n_316;
  wire myCrc_n_317;
  wire myCrc_n_318;
  wire myCrc_n_319;
  wire myCrc_n_32;
  wire myCrc_n_320;
  wire myCrc_n_321;
  wire myCrc_n_322;
  wire myCrc_n_323;
  wire myCrc_n_324;
  wire myCrc_n_325;
  wire myCrc_n_326;
  wire myCrc_n_327;
  wire myCrc_n_328;
  wire myCrc_n_329;
  wire myCrc_n_33;
  wire myCrc_n_330;
  wire myCrc_n_331;
  wire myCrc_n_332;
  wire myCrc_n_333;
  wire myCrc_n_334;
  wire myCrc_n_335;
  wire myCrc_n_336;
  wire myCrc_n_337;
  wire myCrc_n_338;
  wire myCrc_n_339;
  wire myCrc_n_34;
  wire myCrc_n_340;
  wire myCrc_n_341;
  wire myCrc_n_342;
  wire myCrc_n_343;
  wire myCrc_n_344;
  wire myCrc_n_345;
  wire myCrc_n_346;
  wire myCrc_n_347;
  wire myCrc_n_348;
  wire myCrc_n_349;
  wire myCrc_n_350;
  wire myCrc_n_351;
  wire myCrc_n_352;
  wire myCrc_n_353;
  wire myCrc_n_354;
  wire myCrc_n_355;
  wire myCrc_n_356;
  wire myCrc_n_357;
  wire myCrc_n_358;
  wire myCrc_n_359;
  wire myCrc_n_36;
  wire myCrc_n_360;
  wire myCrc_n_361;
  wire myCrc_n_362;
  wire myCrc_n_363;
  wire myCrc_n_364;
  wire myCrc_n_365;
  wire myCrc_n_37;
  wire myCrc_n_38;
  wire myCrc_n_39;
  wire myCrc_n_4;
  wire myCrc_n_40;
  wire myCrc_n_41;
  wire myCrc_n_42;
  wire myCrc_n_43;
  wire myCrc_n_44;
  wire myCrc_n_45;
  wire myCrc_n_46;
  wire myCrc_n_47;
  wire myCrc_n_48;
  wire myCrc_n_49;
  wire myCrc_n_5;
  wire myCrc_n_50;
  wire myCrc_n_51;
  wire myCrc_n_52;
  wire myCrc_n_53;
  wire myCrc_n_54;
  wire myCrc_n_55;
  wire myCrc_n_56;
  wire myCrc_n_57;
  wire myCrc_n_58;
  wire myCrc_n_59;
  wire myCrc_n_6;
  wire myCrc_n_60;
  wire myCrc_n_61;
  wire myCrc_n_62;
  wire myCrc_n_63;
  wire myCrc_n_64;
  wire myCrc_n_65;
  wire myCrc_n_66;
  wire myCrc_n_67;
  wire myCrc_n_68;
  wire myCrc_n_69;
  wire myCrc_n_7;
  wire myCrc_n_70;
  wire myCrc_n_71;
  wire myCrc_n_72;
  wire myCrc_n_73;
  wire myCrc_n_74;
  wire myCrc_n_75;
  wire myCrc_n_76;
  wire myCrc_n_77;
  wire myCrc_n_78;
  wire myCrc_n_79;
  wire myCrc_n_8;
  wire myCrc_n_80;
  wire myCrc_n_81;
  wire myCrc_n_82;
  wire myCrc_n_83;
  wire myCrc_n_84;
  wire myCrc_n_85;
  wire myCrc_n_86;
  wire myCrc_n_87;
  wire myCrc_n_88;
  wire myCrc_n_89;
  wire myCrc_n_9;
  wire myCrc_n_90;
  wire myCrc_n_91;
  wire myCrc_n_92;
  wire myCrc_n_93;
  wire myCrc_n_94;
  wire myCrc_n_95;
  wire myCrc_n_96;
  wire myCrc_n_97;
  wire myCrc_n_98;
  wire myCrc_n_99;
  wire \myHdreng/rng ;
  wire myRxtx_n_0;
  wire myRxtx_n_1;
  wire myRxtx_n_10;
  wire myRxtx_n_11;
  wire myRxtx_n_12;
  wire myRxtx_n_129;
  wire myRxtx_n_13;
  wire myRxtx_n_130;
  wire myRxtx_n_131;
  wire myRxtx_n_132;
  wire myRxtx_n_133;
  wire myRxtx_n_134;
  wire myRxtx_n_135;
  wire myRxtx_n_136;
  wire myRxtx_n_137;
  wire myRxtx_n_138;
  wire myRxtx_n_139;
  wire myRxtx_n_140;
  wire myRxtx_n_141;
  wire myRxtx_n_142;
  wire myRxtx_n_143;
  wire myRxtx_n_144;
  wire myRxtx_n_145;
  wire myRxtx_n_146;
  wire myRxtx_n_147;
  wire myRxtx_n_148;
  wire myRxtx_n_149;
  wire myRxtx_n_150;
  wire myRxtx_n_151;
  wire myRxtx_n_152;
  wire myRxtx_n_153;
  wire myRxtx_n_154;
  wire myRxtx_n_155;
  wire myRxtx_n_156;
  wire myRxtx_n_157;
  wire myRxtx_n_158;
  wire myRxtx_n_159;
  wire myRxtx_n_160;
  wire myRxtx_n_161;
  wire myRxtx_n_162;
  wire myRxtx_n_163;
  wire myRxtx_n_164;
  wire myRxtx_n_165;
  wire myRxtx_n_166;
  wire myRxtx_n_167;
  wire myRxtx_n_168;
  wire myRxtx_n_169;
  wire myRxtx_n_170;
  wire myRxtx_n_171;
  wire myRxtx_n_172;
  wire myRxtx_n_173;
  wire myRxtx_n_174;
  wire myRxtx_n_175;
  wire myRxtx_n_176;
  wire myRxtx_n_177;
  wire myRxtx_n_178;
  wire myRxtx_n_179;
  wire myRxtx_n_180;
  wire myRxtx_n_181;
  wire myRxtx_n_182;
  wire myRxtx_n_183;
  wire myRxtx_n_184;
  wire myRxtx_n_185;
  wire myRxtx_n_186;
  wire myRxtx_n_187;
  wire myRxtx_n_188;
  wire myRxtx_n_189;
  wire myRxtx_n_190;
  wire myRxtx_n_191;
  wire myRxtx_n_192;
  wire myRxtx_n_193;
  wire myRxtx_n_194;
  wire myRxtx_n_195;
  wire myRxtx_n_196;
  wire myRxtx_n_197;
  wire myRxtx_n_198;
  wire myRxtx_n_199;
  wire myRxtx_n_2;
  wire myRxtx_n_20;
  wire myRxtx_n_200;
  wire myRxtx_n_201;
  wire myRxtx_n_202;
  wire myRxtx_n_203;
  wire myRxtx_n_204;
  wire myRxtx_n_205;
  wire myRxtx_n_206;
  wire myRxtx_n_207;
  wire myRxtx_n_208;
  wire myRxtx_n_209;
  wire myRxtx_n_21;
  wire myRxtx_n_210;
  wire myRxtx_n_211;
  wire myRxtx_n_212;
  wire myRxtx_n_213;
  wire myRxtx_n_214;
  wire myRxtx_n_215;
  wire myRxtx_n_216;
  wire myRxtx_n_217;
  wire myRxtx_n_218;
  wire myRxtx_n_219;
  wire myRxtx_n_22;
  wire myRxtx_n_220;
  wire myRxtx_n_221;
  wire myRxtx_n_222;
  wire myRxtx_n_223;
  wire myRxtx_n_224;
  wire myRxtx_n_225;
  wire myRxtx_n_226;
  wire myRxtx_n_227;
  wire myRxtx_n_228;
  wire myRxtx_n_229;
  wire myRxtx_n_23;
  wire myRxtx_n_230;
  wire myRxtx_n_231;
  wire myRxtx_n_232;
  wire myRxtx_n_233;
  wire myRxtx_n_234;
  wire myRxtx_n_235;
  wire myRxtx_n_236;
  wire myRxtx_n_237;
  wire myRxtx_n_238;
  wire myRxtx_n_239;
  wire myRxtx_n_24;
  wire myRxtx_n_240;
  wire myRxtx_n_241;
  wire myRxtx_n_242;
  wire myRxtx_n_243;
  wire myRxtx_n_244;
  wire myRxtx_n_245;
  wire myRxtx_n_246;
  wire myRxtx_n_247;
  wire myRxtx_n_248;
  wire myRxtx_n_249;
  wire myRxtx_n_25;
  wire myRxtx_n_250;
  wire myRxtx_n_251;
  wire myRxtx_n_252;
  wire myRxtx_n_253;
  wire myRxtx_n_254;
  wire myRxtx_n_255;
  wire myRxtx_n_256;
  wire myRxtx_n_257;
  wire myRxtx_n_258;
  wire myRxtx_n_259;
  wire myRxtx_n_26;
  wire myRxtx_n_260;
  wire myRxtx_n_261;
  wire myRxtx_n_262;
  wire myRxtx_n_263;
  wire myRxtx_n_264;
  wire myRxtx_n_265;
  wire myRxtx_n_266;
  wire myRxtx_n_267;
  wire myRxtx_n_268;
  wire myRxtx_n_269;
  wire myRxtx_n_27;
  wire myRxtx_n_270;
  wire myRxtx_n_271;
  wire myRxtx_n_272;
  wire myRxtx_n_273;
  wire myRxtx_n_274;
  wire myRxtx_n_275;
  wire myRxtx_n_276;
  wire myRxtx_n_277;
  wire myRxtx_n_278;
  wire myRxtx_n_279;
  wire myRxtx_n_280;
  wire myRxtx_n_281;
  wire myRxtx_n_282;
  wire myRxtx_n_283;
  wire myRxtx_n_284;
  wire myRxtx_n_285;
  wire myRxtx_n_286;
  wire myRxtx_n_287;
  wire myRxtx_n_288;
  wire myRxtx_n_289;
  wire myRxtx_n_29;
  wire myRxtx_n_290;
  wire myRxtx_n_291;
  wire myRxtx_n_292;
  wire myRxtx_n_293;
  wire myRxtx_n_294;
  wire myRxtx_n_295;
  wire myRxtx_n_296;
  wire myRxtx_n_297;
  wire myRxtx_n_298;
  wire myRxtx_n_299;
  wire myRxtx_n_3;
  wire myRxtx_n_30;
  wire myRxtx_n_300;
  wire myRxtx_n_301;
  wire myRxtx_n_302;
  wire myRxtx_n_303;
  wire myRxtx_n_304;
  wire myRxtx_n_305;
  wire myRxtx_n_306;
  wire myRxtx_n_307;
  wire myRxtx_n_308;
  wire myRxtx_n_309;
  wire myRxtx_n_31;
  wire myRxtx_n_310;
  wire myRxtx_n_311;
  wire myRxtx_n_312;
  wire myRxtx_n_313;
  wire myRxtx_n_314;
  wire myRxtx_n_315;
  wire myRxtx_n_316;
  wire myRxtx_n_317;
  wire myRxtx_n_318;
  wire myRxtx_n_319;
  wire myRxtx_n_32;
  wire myRxtx_n_320;
  wire myRxtx_n_321;
  wire myRxtx_n_322;
  wire myRxtx_n_323;
  wire myRxtx_n_324;
  wire myRxtx_n_325;
  wire myRxtx_n_326;
  wire myRxtx_n_327;
  wire myRxtx_n_328;
  wire myRxtx_n_329;
  wire myRxtx_n_330;
  wire myRxtx_n_331;
  wire myRxtx_n_332;
  wire myRxtx_n_333;
  wire myRxtx_n_334;
  wire myRxtx_n_335;
  wire myRxtx_n_336;
  wire myRxtx_n_337;
  wire myRxtx_n_338;
  wire myRxtx_n_339;
  wire myRxtx_n_34;
  wire myRxtx_n_340;
  wire myRxtx_n_341;
  wire myRxtx_n_342;
  wire myRxtx_n_343;
  wire myRxtx_n_344;
  wire myRxtx_n_345;
  wire myRxtx_n_346;
  wire myRxtx_n_347;
  wire myRxtx_n_348;
  wire myRxtx_n_349;
  wire myRxtx_n_35;
  wire myRxtx_n_350;
  wire myRxtx_n_351;
  wire myRxtx_n_352;
  wire myRxtx_n_353;
  wire myRxtx_n_354;
  wire myRxtx_n_355;
  wire myRxtx_n_356;
  wire myRxtx_n_357;
  wire myRxtx_n_358;
  wire myRxtx_n_359;
  wire myRxtx_n_36;
  wire myRxtx_n_360;
  wire myRxtx_n_361;
  wire myRxtx_n_362;
  wire myRxtx_n_363;
  wire myRxtx_n_364;
  wire myRxtx_n_365;
  wire myRxtx_n_366;
  wire myRxtx_n_367;
  wire myRxtx_n_368;
  wire myRxtx_n_369;
  wire myRxtx_n_37;
  wire myRxtx_n_370;
  wire myRxtx_n_371;
  wire myRxtx_n_372;
  wire myRxtx_n_373;
  wire myRxtx_n_374;
  wire myRxtx_n_375;
  wire myRxtx_n_376;
  wire myRxtx_n_377;
  wire myRxtx_n_378;
  wire myRxtx_n_379;
  wire myRxtx_n_38;
  wire myRxtx_n_380;
  wire myRxtx_n_381;
  wire myRxtx_n_382;
  wire myRxtx_n_383;
  wire myRxtx_n_384;
  wire myRxtx_n_385;
  wire myRxtx_n_386;
  wire myRxtx_n_387;
  wire myRxtx_n_388;
  wire myRxtx_n_389;
  wire myRxtx_n_39;
  wire myRxtx_n_390;
  wire myRxtx_n_391;
  wire myRxtx_n_392;
  wire myRxtx_n_393;
  wire myRxtx_n_394;
  wire myRxtx_n_395;
  wire myRxtx_n_396;
  wire myRxtx_n_397;
  wire myRxtx_n_398;
  wire myRxtx_n_399;
  wire myRxtx_n_4;
  wire myRxtx_n_40;
  wire myRxtx_n_400;
  wire myRxtx_n_401;
  wire myRxtx_n_402;
  wire myRxtx_n_403;
  wire myRxtx_n_404;
  wire myRxtx_n_405;
  wire myRxtx_n_406;
  wire myRxtx_n_407;
  wire myRxtx_n_408;
  wire myRxtx_n_409;
  wire myRxtx_n_41;
  wire myRxtx_n_410;
  wire myRxtx_n_411;
  wire myRxtx_n_412;
  wire myRxtx_n_413;
  wire myRxtx_n_414;
  wire myRxtx_n_415;
  wire myRxtx_n_416;
  wire myRxtx_n_417;
  wire myRxtx_n_418;
  wire myRxtx_n_419;
  wire myRxtx_n_42;
  wire myRxtx_n_420;
  wire myRxtx_n_421;
  wire myRxtx_n_422;
  wire myRxtx_n_423;
  wire myRxtx_n_424;
  wire myRxtx_n_425;
  wire myRxtx_n_426;
  wire myRxtx_n_427;
  wire myRxtx_n_428;
  wire myRxtx_n_429;
  wire myRxtx_n_43;
  wire myRxtx_n_430;
  wire myRxtx_n_431;
  wire myRxtx_n_432;
  wire myRxtx_n_433;
  wire myRxtx_n_434;
  wire myRxtx_n_435;
  wire myRxtx_n_436;
  wire myRxtx_n_437;
  wire myRxtx_n_438;
  wire myRxtx_n_439;
  wire myRxtx_n_44;
  wire myRxtx_n_440;
  wire myRxtx_n_441;
  wire myRxtx_n_442;
  wire myRxtx_n_443;
  wire myRxtx_n_444;
  wire myRxtx_n_445;
  wire myRxtx_n_446;
  wire myRxtx_n_447;
  wire myRxtx_n_448;
  wire myRxtx_n_449;
  wire myRxtx_n_45;
  wire myRxtx_n_450;
  wire myRxtx_n_451;
  wire myRxtx_n_452;
  wire myRxtx_n_453;
  wire myRxtx_n_454;
  wire myRxtx_n_455;
  wire myRxtx_n_456;
  wire myRxtx_n_457;
  wire myRxtx_n_458;
  wire myRxtx_n_459;
  wire myRxtx_n_46;
  wire myRxtx_n_460;
  wire myRxtx_n_461;
  wire myRxtx_n_462;
  wire myRxtx_n_463;
  wire myRxtx_n_464;
  wire myRxtx_n_465;
  wire myRxtx_n_466;
  wire myRxtx_n_467;
  wire myRxtx_n_468;
  wire myRxtx_n_469;
  wire myRxtx_n_47;
  wire myRxtx_n_470;
  wire myRxtx_n_471;
  wire myRxtx_n_472;
  wire myRxtx_n_473;
  wire myRxtx_n_474;
  wire myRxtx_n_475;
  wire myRxtx_n_476;
  wire myRxtx_n_477;
  wire myRxtx_n_478;
  wire myRxtx_n_479;
  wire myRxtx_n_48;
  wire myRxtx_n_480;
  wire myRxtx_n_481;
  wire myRxtx_n_482;
  wire myRxtx_n_483;
  wire myRxtx_n_484;
  wire myRxtx_n_485;
  wire myRxtx_n_486;
  wire myRxtx_n_487;
  wire myRxtx_n_488;
  wire myRxtx_n_489;
  wire myRxtx_n_49;
  wire myRxtx_n_490;
  wire myRxtx_n_491;
  wire myRxtx_n_492;
  wire myRxtx_n_493;
  wire myRxtx_n_5;
  wire myRxtx_n_50;
  wire myRxtx_n_51;
  wire myRxtx_n_52;
  wire myRxtx_n_53;
  wire myRxtx_n_534;
  wire myRxtx_n_535;
  wire myRxtx_n_536;
  wire myRxtx_n_54;
  wire myRxtx_n_55;
  wire myRxtx_n_552;
  wire myRxtx_n_553;
  wire myRxtx_n_554;
  wire myRxtx_n_555;
  wire myRxtx_n_556;
  wire myRxtx_n_557;
  wire myRxtx_n_558;
  wire myRxtx_n_559;
  wire myRxtx_n_56;
  wire myRxtx_n_560;
  wire myRxtx_n_561;
  wire myRxtx_n_562;
  wire myRxtx_n_563;
  wire myRxtx_n_564;
  wire myRxtx_n_567;
  wire myRxtx_n_568;
  wire myRxtx_n_569;
  wire myRxtx_n_57;
  wire myRxtx_n_570;
  wire myRxtx_n_571;
  wire myRxtx_n_572;
  wire myRxtx_n_575;
  wire myRxtx_n_58;
  wire myRxtx_n_581;
  wire myRxtx_n_59;
  wire myRxtx_n_598;
  wire myRxtx_n_6;
  wire myRxtx_n_60;
  wire myRxtx_n_608;
  wire myRxtx_n_61;
  wire myRxtx_n_62;
  wire myRxtx_n_63;
  wire myRxtx_n_7;
  wire myRxtx_n_8;
  wire myRxtx_n_9;
  wire myWordto_n_0;
  wire myWordto_n_1;
  wire myWordto_n_2;
  wire myXferto_n_0;
  wire myXferto_n_1;
  wire myXferto_n_2;
  wire myXferto_n_3;
  wire myXferto_n_4;
  wire \opbuf[0][7]_i_10_n_0 ;
  wire \opbuf[0][7]_i_11_n_0 ;
  wire \opbuf[0][7]_i_14_n_0 ;
  wire \opbuf[0][7]_i_15_n_0 ;
  wire \opbuf[0][7]_i_18_n_0 ;
  wire \opbuf[0][7]_i_19_n_0 ;
  wire \opbuf[0][7]_i_20_n_0 ;
  wire \opbuf[0][7]_i_21_n_0 ;
  wire \opbuf[0][7]_i_22_n_0 ;
  wire \opbuf[0][7]_i_23_n_0 ;
  wire \opbuf[0][7]_i_24_n_0 ;
  wire \opbuf[0][7]_i_25_n_0 ;
  wire \opbuf[0][7]_i_26_n_0 ;
  wire \opbuf[0][7]_i_27_n_0 ;
  wire \opbuf[0][7]_i_28_n_0 ;
  wire \opbuf[0][7]_i_29_n_0 ;
  wire \opbuf[0][7]_i_30_n_0 ;
  wire \opbuf[0][7]_i_31_n_0 ;
  wire \opbuf[0][7]_i_32_n_0 ;
  wire \opbuf[0][7]_i_33_n_0 ;
  wire \opbuf[0][7]_i_34_n_0 ;
  wire \opbuf[0][7]_i_35_n_0 ;
  wire \opbuf[0][7]_i_36_n_0 ;
  wire \opbuf[0][7]_i_37_n_0 ;
  wire \opbuf[0][7]_i_38_n_0 ;
  wire \opbuf[0][7]_i_39_n_0 ;
  wire \opbuf[0][7]_i_3_n_0 ;
  wire \opbuf[0][7]_i_40_n_0 ;
  wire \opbuf[0][7]_i_41_n_0 ;
  wire \opbuf[0][7]_i_42_n_0 ;
  wire \opbuf[0][7]_i_43_n_0 ;
  wire \opbuf[0][7]_i_44_n_0 ;
  wire \opbuf[0][7]_i_45_n_0 ;
  wire \opbuf[0][7]_i_46_n_0 ;
  wire \opbuf[0][7]_i_4_n_0 ;
  wire \opbuf[0][7]_i_50_n_0 ;
  wire \opbuf[0][7]_i_51_n_0 ;
  wire \opbuf[0][7]_i_52_n_0 ;
  wire \opbuf[0][7]_i_53_n_0 ;
  wire \opbuf[0][7]_i_54_n_0 ;
  wire \opbuf[0][7]_i_55_n_0 ;
  wire \opbuf[0][7]_i_56_n_0 ;
  wire \opbuf[0][7]_i_57_n_0 ;
  wire \opbuf[0][7]_i_58_n_0 ;
  wire \opbuf[0][7]_i_59_n_0 ;
  wire \opbuf[0][7]_i_60_n_0 ;
  wire \opbuf[0][7]_i_61_n_0 ;
  wire \opbuf[0][7]_i_62_n_0 ;
  wire \opbuf[0][7]_i_63_n_0 ;
  wire \opbuf[0][7]_i_64_n_0 ;
  wire \opbuf[0][7]_i_65_n_0 ;
  wire \opbuf[0][7]_i_66_n_0 ;
  wire \opbuf[0][7]_i_67_n_0 ;
  wire \opbuf[0][7]_i_6_n_0 ;
  wire \opbuf[0][7]_i_7_n_0 ;
  wire \opbuf[0][7]_i_8_n_0 ;
  wire \opbuf[0][7]_i_9_n_0 ;
  wire [7:0]\opbuf[1]_75 ;
  wire [7:0]\opbuf[2]_72 ;
  wire [6:1]\opbuf[3]_70 ;
  wire [7:0]\opbuf[4]_73 ;
  wire [7:0]\opbuf[5]_71 ;
  wire [7:0]\opbuf[6]_74 ;
  wire [27:4]\opbuf_reg[0]3 ;
  wire [30:6]\opbuf_reg[0]5 ;
  wire [30:6]\opbuf_reg[0]51_in ;
  wire \opbuf_reg[0][7]_i_12_n_0 ;
  wire \opbuf_reg[0][7]_i_12_n_1 ;
  wire \opbuf_reg[0][7]_i_12_n_2 ;
  wire \opbuf_reg[0][7]_i_12_n_3 ;
  wire \opbuf_reg[0][7]_i_12_n_4 ;
  wire \opbuf_reg[0][7]_i_12_n_5 ;
  wire \opbuf_reg[0][7]_i_12_n_6 ;
  wire \opbuf_reg[0][7]_i_12_n_7 ;
  wire \opbuf_reg[0][7]_i_13_n_0 ;
  wire \opbuf_reg[0][7]_i_13_n_1 ;
  wire \opbuf_reg[0][7]_i_13_n_2 ;
  wire \opbuf_reg[0][7]_i_13_n_3 ;
  wire \opbuf_reg[0][7]_i_13_n_4 ;
  wire \opbuf_reg[0][7]_i_13_n_5 ;
  wire \opbuf_reg[0][7]_i_13_n_6 ;
  wire \opbuf_reg[0][7]_i_13_n_7 ;
  wire \opbuf_reg[0][7]_i_16_n_7 ;
  wire \opbuf_reg[0][7]_i_17_n_0 ;
  wire \opbuf_reg[0][7]_i_17_n_1 ;
  wire \opbuf_reg[0][7]_i_17_n_2 ;
  wire \opbuf_reg[0][7]_i_17_n_3 ;
  wire \opbuf_reg[0][7]_i_17_n_4 ;
  wire \opbuf_reg[0][7]_i_17_n_5 ;
  wire \opbuf_reg[0][7]_i_17_n_6 ;
  wire \opbuf_reg[0][7]_i_17_n_7 ;
  wire \opbuf_reg[0][7]_i_47_n_0 ;
  wire \opbuf_reg[0][7]_i_47_n_1 ;
  wire \opbuf_reg[0][7]_i_47_n_2 ;
  wire \opbuf_reg[0][7]_i_47_n_3 ;
  wire \opbuf_reg[0][7]_i_47_n_4 ;
  wire \opbuf_reg[0][7]_i_47_n_5 ;
  wire \opbuf_reg[0][7]_i_47_n_6 ;
  wire \opbuf_reg[0][7]_i_47_n_7 ;
  wire \opbuf_reg[0][7]_i_48_n_0 ;
  wire \opbuf_reg[0][7]_i_48_n_1 ;
  wire \opbuf_reg[0][7]_i_48_n_2 ;
  wire \opbuf_reg[0][7]_i_48_n_3 ;
  wire \opbuf_reg[0][7]_i_48_n_4 ;
  wire \opbuf_reg[0][7]_i_48_n_5 ;
  wire \opbuf_reg[0][7]_i_48_n_6 ;
  wire \opbuf_reg[0][7]_i_48_n_7 ;
  wire \opbuf_reg[0][7]_i_49_n_7 ;
  wire [7:0]\opbuf_reg[1]_60 ;
  wire [7:0]\opbuf_reg[3]_64 ;
  wire [7:0]\opbuf_reg[4]_63 ;
  wire [7:0]\opbuf_reg[5]_62 ;
  wire [7:0]\opbuf_reg[6]_61 ;
  wire \opbuf_reg_n_0_[0][0] ;
  wire \opbuf_reg_n_0_[0][1] ;
  wire \opbuf_reg_n_0_[0][2] ;
  wire \opbuf_reg_n_0_[0][3] ;
  wire \opbuf_reg_n_0_[0][4] ;
  wire \opbuf_reg_n_0_[0][5] ;
  wire \opbuf_reg_n_0_[0][6] ;
  wire \opbuf_reg_n_0_[0][7] ;
  wire \opbuf_reg_n_0_[2][0] ;
  wire \opbuf_reg_n_0_[2][1] ;
  wire \opbuf_reg_n_0_[2][2] ;
  wire \opbuf_reg_n_0_[2][3] ;
  wire \opbuf_reg_n_0_[2][4] ;
  wire \opbuf_reg_n_0_[2][5] ;
  wire \opbuf_reg_n_0_[2][6] ;
  wire \opbuf_reg_n_0_[2][7] ;
  wire p_0_in0;
  wire [9:9]p_10_out;
  wire p_136_in;
  wire [7:0]p_1_in;
  wire [31:3]plusOp;
  wire \pollbuf[0][7]_i_3_n_0 ;
  wire \pollbuf[0][7]_i_4_n_0 ;
  wire \pollbuf[0][7]_i_5_n_0 ;
  wire \pollbuf[0][7]_i_6_n_0 ;
  wire \pollbuf[0][7]_i_7_n_0 ;
  wire [1:0]\pollbuf[2][3]_i_2_0 ;
  wire \pollbuf[2][3]_i_2_n_0 ;
  wire \pollbuf[2][3]_i_3_n_0 ;
  wire [0:0]\pollbuf[2][4]_i_2_0 ;
  wire [0:0]\pollbuf[2][4]_i_2_1 ;
  wire \pollbuf[2][4]_i_2_n_0 ;
  wire \pollbuf[2][4]_i_3_n_0 ;
  wire [1:0]\pollbuf[2][7]_i_2_0 ;
  wire \pollbuf[2][7]_i_2_n_0 ;
  wire \pollbuf[2][7]_i_3_n_0 ;
  wire [7:0]\pollbuf_reg[0]_66 ;
  wire [7:0]\pollbuf_reg[1]_67 ;
  wire [0:0]\pollbuf_reg[2][4]_0 ;
  wire [1:0]\pollbuf_reg[2][7]_0 ;
  wire [7:3]\pollbuf_reg[2]_68 ;
  wire [5:0]\pollbuf_reg[3]_69 ;
  wire pvwbufDecimToHostifAXIS_tready;
  wire recvAXIS_tlast;
  wire reqCoobufCornerToHostif;
  wire reqFlgbufTraceToHostif;
  wire reqInvAcquire;
  wire reqInvAssign;
  wire reqInvConfig;
  wire reqInvConfigSynth;
  wire reqInvCornerConfig;
  wire reqInvCputrackSet;
  wire reqInvDecimAcquire;
  wire reqInvDecimConfig;
  wire reqInvDecimSet;
  wire reqInvDecimUnlock;
  wire reqInvDirectorConfig;
  wire reqInvDirectorSet;
  wire reqInvGetCorereg;
  wire reqInvGetReg;
  wire reqInvHdrengSet;
  wire reqInvHshktrackClearMask;
  wire reqInvHshktrackSelect;
  wire reqInvHshktrackSet;
  wire reqInvHshktrackSetMask;
  wire reqInvLaserSet;
  wire reqInvMemtrackClearMask;
  wire reqInvMemtrackSelect;
  wire reqInvMemtrackSet;
  wire reqInvMemtrackSetMask;
  wire reqInvModReg;
  wire reqInvRotaryConfig;
  wire reqInvRotaryMoveto;
  wire reqInvRotarySet;
  wire reqInvRotaryZero;
  wire reqInvSelect;
  wire reqInvSet;
  wire reqInvSetCorereg;
  wire reqInvSetReg;
  wire reqInvStepmuxSet;
  wire reqInvTkclksrcSetTkst;
  wire reqInvTraceAcquire;
  wire reqInvTraceConfig;
  wire reqInvTraceUnlock;
  wire reqInvUnlock;
  wire reqInvVidtrackSelect;
  wire reqInvVidtrackSet;
  wire reqPvwbufDecimToHostif;
  wire reqResetFromHostif;
  wire reqReset_sig_i_2_n_0;
  wire reqReset_sig_reg_0;
  wire [0:0]reqReset_sig_reg_1;
  wire reqSeqbufCputrackToHostif;
  wire reqSeqbufHshktrackToHostif;
  wire reqSeqbufMemtrackToHostif;
  wire reqSeqbufVidtrackToHostif;
  wire reset_reg;
  wire [2:0]resid;
  wire \resid[0]_i_2_n_0 ;
  wire \resid[0]_i_3_n_0 ;
  wire \resid[0]_i_4_n_0 ;
  wire \resid[0]_i_5_n_0 ;
  wire \resid[0]_i_6_n_0 ;
  wire \resid[1]_i_10_n_0 ;
  wire \resid[1]_i_11_n_0 ;
  wire \resid[1]_i_12_n_0 ;
  wire \resid[1]_i_13_n_0 ;
  wire \resid[1]_i_14_n_0 ;
  wire \resid[1]_i_15_n_0 ;
  wire \resid[1]_i_16_n_0 ;
  wire \resid[1]_i_17_n_0 ;
  wire \resid[1]_i_18_n_0 ;
  wire \resid[1]_i_19_n_0 ;
  wire \resid[1]_i_20_n_0 ;
  wire \resid[1]_i_21_n_0 ;
  wire \resid[1]_i_22_n_0 ;
  wire \resid[1]_i_2_n_0 ;
  wire \resid[1]_i_3_n_0 ;
  wire \resid[1]_i_4_n_0 ;
  wire \resid[1]_i_5_n_0 ;
  wire \resid[1]_i_6_n_0 ;
  wire \resid[1]_i_7_n_0 ;
  wire \resid[1]_i_8_n_0 ;
  wire \resid[1]_i_9_n_0 ;
  wire \resid[2]_i_10_n_0 ;
  wire \resid[2]_i_11_n_0 ;
  wire \resid[2]_i_12_n_0 ;
  wire \resid[2]_i_13_n_0 ;
  wire \resid[2]_i_14_n_0 ;
  wire \resid[2]_i_15_n_0 ;
  wire \resid[2]_i_16_n_0 ;
  wire \resid[2]_i_17_n_0 ;
  wire \resid[2]_i_18_n_0 ;
  wire \resid[2]_i_19_n_0 ;
  wire \resid[2]_i_20_n_0 ;
  wire \resid[2]_i_21_n_0 ;
  wire \resid[2]_i_22_n_0 ;
  wire \resid[2]_i_23_n_0 ;
  wire \resid[2]_i_24_n_0 ;
  wire \resid[2]_i_25_n_0 ;
  wire \resid[2]_i_26_n_0 ;
  wire \resid[2]_i_27_n_0 ;
  wire \resid[2]_i_28_n_0 ;
  wire \resid[2]_i_29_n_0 ;
  wire \resid[2]_i_30_n_0 ;
  wire \resid[2]_i_31_n_0 ;
  wire \resid[2]_i_32_n_0 ;
  wire \resid[2]_i_3_n_0 ;
  wire \resid[2]_i_4_n_0 ;
  wire \resid[2]_i_5_n_0 ;
  wire \resid[2]_i_6_n_0 ;
  wire \resid[2]_i_7_n_0 ;
  wire \resid[2]_i_8_n_0 ;
  wire \resid[2]_i_9_n_0 ;
  wire restart_i_3_n_0;
  wire \retbuf[0][0]_i_2_0 ;
  wire \retbuf[0][0]_i_2_n_0 ;
  wire \retbuf[0][0]_i_3_n_0 ;
  wire \retbuf[0][0]_i_6_n_0 ;
  wire \retbuf[0][0]_i_7_n_0 ;
  wire \retbuf[0][0]_i_8_n_0 ;
  wire \retbuf[0][1]_i_2_n_0 ;
  wire \retbuf[0][1]_i_3_n_0 ;
  wire \retbuf[0][1]_i_4_n_0 ;
  wire \retbuf[0][1]_i_6_n_0 ;
  wire \retbuf[0][1]_i_7_n_0 ;
  wire \retbuf[0][2]_i_3_n_0 ;
  wire \retbuf[0][2]_i_4_n_0 ;
  wire \retbuf[0][3]_i_2_n_0 ;
  wire \retbuf[0][3]_i_3_0 ;
  wire \retbuf[0][3]_i_3_n_0 ;
  wire \retbuf[0][3]_i_4_n_0 ;
  wire \retbuf[0][4]_i_2__0_n_0 ;
  wire \retbuf[0][4]_i_3_0 ;
  wire \retbuf[0][4]_i_3_n_0 ;
  wire \retbuf[0][4]_i_4_n_0 ;
  wire \retbuf[0][5]_i_2_n_0 ;
  wire \retbuf[0][5]_i_3_0 ;
  wire \retbuf[0][5]_i_3_n_0 ;
  wire \retbuf[0][5]_i_4_n_0 ;
  wire \retbuf[0][6]_i_2__0_n_0 ;
  wire \retbuf[0][6]_i_3__0_n_0 ;
  wire \retbuf[0][6]_i_4_0 ;
  wire \retbuf[0][6]_i_4_n_0 ;
  wire \retbuf[0][6]_i_5_n_0 ;
  wire [31:0]\retbuf[0][7]_i_10 ;
  wire [2:0]\retbuf[0][7]_i_10_0 ;
  wire \retbuf[0][7]_i_11_n_0 ;
  wire \retbuf[0][7]_i_12_n_0 ;
  wire \retbuf[0][7]_i_13_n_0 ;
  wire \retbuf[0][7]_i_14_n_0 ;
  wire \retbuf[0][7]_i_15_n_0 ;
  wire \retbuf[0][7]_i_16_n_0 ;
  wire \retbuf[0][7]_i_17_n_0 ;
  wire \retbuf[0][7]_i_18_n_0 ;
  wire \retbuf[0][7]_i_19_n_0 ;
  wire [25:0]\retbuf[0][7]_i_20_0 ;
  wire [27:0]\retbuf[0][7]_i_20_1 ;
  wire [1:0]\retbuf[0][7]_i_20_2 ;
  wire \retbuf[0][7]_i_20_n_0 ;
  wire \retbuf[0][7]_i_21_n_0 ;
  wire \retbuf[0][7]_i_22_n_0 ;
  wire \retbuf[0][7]_i_23_n_0 ;
  wire \retbuf[0][7]_i_24_n_0 ;
  wire \retbuf[0][7]_i_25_n_0 ;
  wire \retbuf[0][7]_i_26_n_0 ;
  wire \retbuf[0][7]_i_27_n_0 ;
  wire \retbuf[0][7]_i_28_n_0 ;
  wire \retbuf[0][7]_i_29_n_0 ;
  wire \retbuf[0][7]_i_30_n_0 ;
  wire \retbuf[0][7]_i_3_n_0 ;
  wire \retbuf[0][7]_i_4_n_0 ;
  wire \retbuf[0][7]_i_5_n_0 ;
  wire \retbuf[0][7]_i_6_n_0 ;
  wire \retbuf[0][7]_i_7_n_0 ;
  wire \retbuf[0][7]_i_8_n_0 ;
  wire \retbuf[10][7]_i_3_n_0 ;
  wire \retbuf[10][7]_i_4_n_0 ;
  wire \retbuf[10][7]_i_5_n_0 ;
  wire \retbuf[10][7]_i_6_n_0 ;
  wire \retbuf[11][7]_i_3_n_0 ;
  wire \retbuf[11][7]_i_4_n_0 ;
  wire \retbuf[11][7]_i_5_n_0 ;
  wire \retbuf[11][7]_i_6_n_0 ;
  wire \retbuf[12][7]_i_3_n_0 ;
  wire \retbuf[12][7]_i_4_n_0 ;
  wire \retbuf[12][7]_i_5_n_0 ;
  wire \retbuf[12][7]_i_6_n_0 ;
  wire \retbuf[12][7]_i_7_n_0 ;
  wire \retbuf[13][7]_i_3_n_0 ;
  wire \retbuf[13][7]_i_4_n_0 ;
  wire \retbuf[14][7]_i_3_n_0 ;
  wire \retbuf[14][7]_i_4_n_0 ;
  wire \retbuf[14][7]_i_5_n_0 ;
  wire \retbuf[15][7]_i_3_n_0 ;
  wire \retbuf[15][7]_i_4_n_0 ;
  wire \retbuf[16][5]_i_2_n_0 ;
  wire \retbuf[16][7]_i_4_n_0 ;
  wire \retbuf[16][7]_i_5_n_0 ;
  wire \retbuf[16][7]_i_6_n_0 ;
  wire \retbuf[16][7]_i_7_n_0 ;
  wire \retbuf[17][5]_i_2_n_0 ;
  wire \retbuf[17][7]_i_3_n_0 ;
  wire \retbuf[17][7]_i_4_n_0 ;
  wire \retbuf[18][7]_i_3_n_0 ;
  wire \retbuf[18][7]_i_4_n_0 ;
  wire \retbuf[19][7]_i_3_n_0 ;
  wire \retbuf[19][7]_i_4_n_0 ;
  wire \retbuf[1][0]_i_2_n_0 ;
  wire \retbuf[1][0]_i_3_n_0 ;
  wire \retbuf[1][0]_i_5_n_0 ;
  wire \retbuf[1][0]_i_6_n_0 ;
  wire \retbuf[1][1]_i_2_n_0 ;
  wire \retbuf[1][1]_i_3_n_0 ;
  wire \retbuf[1][1]_i_5_n_0 ;
  wire \retbuf[1][1]_i_6_n_0 ;
  wire \retbuf[1][2]_i_2_n_0 ;
  wire \retbuf[1][2]_i_3_n_0 ;
  wire \retbuf[1][2]_i_5_n_0 ;
  wire \retbuf[1][2]_i_6_n_0 ;
  wire \retbuf[1][3]_i_2_n_0 ;
  wire \retbuf[1][3]_i_4_n_0 ;
  wire \retbuf[1][3]_i_5_n_0 ;
  wire \retbuf[1][3]_i_6_n_0 ;
  wire \retbuf[1][4]_i_2_n_0 ;
  wire \retbuf[1][4]_i_3_n_0 ;
  wire \retbuf[1][4]_i_5_n_0 ;
  wire \retbuf[1][4]_i_6_n_0 ;
  wire \retbuf[1][5]_i_2_n_0 ;
  wire \retbuf[1][5]_i_3_n_0 ;
  wire \retbuf[1][5]_i_5_n_0 ;
  wire \retbuf[1][5]_i_6_n_0 ;
  wire \retbuf[1][6]_i_2_n_0 ;
  wire \retbuf[1][6]_i_3_n_0 ;
  wire \retbuf[1][6]_i_5_n_0 ;
  wire \retbuf[1][6]_i_6_n_0 ;
  wire \retbuf[1][7]_i_10_n_0 ;
  wire \retbuf[1][7]_i_11_n_0 ;
  wire \retbuf[1][7]_i_12_n_0 ;
  wire \retbuf[1][7]_i_14_n_0 ;
  wire \retbuf[1][7]_i_15_n_0 ;
  wire \retbuf[1][7]_i_16_n_0 ;
  wire \retbuf[1][7]_i_3_n_0 ;
  wire \retbuf[1][7]_i_4_n_0 ;
  wire \retbuf[1][7]_i_5_n_0 ;
  wire \retbuf[1][7]_i_6_n_0 ;
  wire \retbuf[1][7]_i_7_n_0 ;
  wire [31:0]\retbuf[1][7]_i_8_0 ;
  wire [31:0]\retbuf[1][7]_i_8_1 ;
  wire [31:0]\retbuf[1][7]_i_8_2 ;
  wire \retbuf[1][7]_i_8_n_0 ;
  wire \retbuf[20][7]_i_3_n_0 ;
  wire \retbuf[20][7]_i_4_n_0 ;
  wire \retbuf[21][7]_i_3_n_0 ;
  wire \retbuf[21][7]_i_4_n_0 ;
  wire \retbuf[22][7]_i_3_n_0 ;
  wire \retbuf[22][7]_i_4_n_0 ;
  wire \retbuf[23][7]_i_3_n_0 ;
  wire \retbuf[23][7]_i_4_n_0 ;
  wire \retbuf[24][7]_i_3_n_0 ;
  wire \retbuf[24][7]_i_4_n_0 ;
  wire \retbuf[25][7]_i_3_n_0 ;
  wire \retbuf[25][7]_i_4_n_0 ;
  wire \retbuf[26][7]_i_3_n_0 ;
  wire \retbuf[26][7]_i_4_n_0 ;
  wire \retbuf[27][7]_i_3_n_0 ;
  wire \retbuf[27][7]_i_4_n_0 ;
  wire \retbuf[28][7]_i_3_n_0 ;
  wire \retbuf[28][7]_i_4_n_0 ;
  wire \retbuf[29][7]_i_3_n_0 ;
  wire \retbuf[29][7]_i_4_n_0 ;
  wire \retbuf[2][0]_i_2_n_0 ;
  wire \retbuf[2][0]_i_3_n_0 ;
  wire \retbuf[2][0]_i_5_n_0 ;
  wire \retbuf[2][0]_i_6_n_0 ;
  wire \retbuf[2][1]_i_2_n_0 ;
  wire \retbuf[2][1]_i_3_n_0 ;
  wire \retbuf[2][1]_i_5_n_0 ;
  wire \retbuf[2][1]_i_6_n_0 ;
  wire \retbuf[2][2]_i_2_n_0 ;
  wire \retbuf[2][2]_i_3_n_0 ;
  wire \retbuf[2][2]_i_5_n_0 ;
  wire \retbuf[2][2]_i_6_n_0 ;
  wire \retbuf[2][3]_i_2_n_0 ;
  wire \retbuf[2][3]_i_3_n_0 ;
  wire \retbuf[2][3]_i_5_n_0 ;
  wire \retbuf[2][3]_i_6_n_0 ;
  wire \retbuf[2][4]_i_2_n_0 ;
  wire \retbuf[2][4]_i_3_n_0 ;
  wire \retbuf[2][4]_i_5_n_0 ;
  wire \retbuf[2][4]_i_6_n_0 ;
  wire \retbuf[2][5]_i_2_n_0 ;
  wire \retbuf[2][5]_i_3_n_0 ;
  wire \retbuf[2][5]_i_5_n_0 ;
  wire \retbuf[2][5]_i_6_n_0 ;
  wire \retbuf[2][6]_i_2_n_0 ;
  wire \retbuf[2][6]_i_3_n_0 ;
  wire \retbuf[2][6]_i_5_n_0 ;
  wire \retbuf[2][6]_i_6_n_0 ;
  wire \retbuf[2][7]_i_10_n_0 ;
  wire \retbuf[2][7]_i_11_n_0 ;
  wire \retbuf[2][7]_i_3_n_0 ;
  wire \retbuf[2][7]_i_4__0_n_0 ;
  wire \retbuf[2][7]_i_5_n_0 ;
  wire \retbuf[2][7]_i_6_n_0 ;
  wire \retbuf[2][7]_i_7_n_0 ;
  wire \retbuf[2][7]_i_9_n_0 ;
  wire \retbuf[30][7]_i_3_n_0 ;
  wire \retbuf[30][7]_i_4_n_0 ;
  wire \retbuf[30][7]_i_5_n_0 ;
  wire \retbuf[31][7]_i_3_n_0 ;
  wire \retbuf[32][6]_i_3_n_0 ;
  wire \retbuf[32][7]_i_3_n_0 ;
  wire \retbuf[32][7]_i_4_n_0 ;
  wire \retbuf[33][7]_i_3_n_0 ;
  wire \retbuf[34][7]_i_3_n_0 ;
  wire \retbuf[34][7]_i_4_n_0 ;
  wire \retbuf[34][7]_i_5_n_0 ;
  wire \retbuf[35][7]_i_3_n_0 ;
  wire \retbuf[35][7]_i_4_n_0 ;
  wire \retbuf[36][7]_i_3_n_0 ;
  wire \retbuf[36][7]_i_4_n_0 ;
  wire \retbuf[36][7]_i_5_n_0 ;
  wire \retbuf[37][7]_i_3_n_0 ;
  wire \retbuf[37][7]_i_4_n_0 ;
  wire \retbuf[38][7]_i_3_n_0 ;
  wire \retbuf[38][7]_i_4_n_0 ;
  wire \retbuf[38][7]_i_5_n_0 ;
  wire \retbuf[38][7]_i_6_n_0 ;
  wire \retbuf[39][7]_i_3_n_0 ;
  wire \retbuf[39][7]_i_4_n_0 ;
  wire \retbuf[39][7]_i_5_n_0 ;
  wire \retbuf[39][7]_i_6_n_0 ;
  wire \retbuf[3][0]_i_2_n_0 ;
  wire \retbuf[3][0]_i_3_n_0 ;
  wire \retbuf[3][0]_i_4_n_0 ;
  wire \retbuf[3][0]_i_5_n_0 ;
  wire \retbuf[3][0]_i_6_n_0 ;
  wire \retbuf[3][1]_i_2_n_0 ;
  wire \retbuf[3][1]_i_3_n_0 ;
  wire \retbuf[3][1]_i_4_n_0 ;
  wire \retbuf[3][1]_i_5_n_0 ;
  wire \retbuf[3][1]_i_6_n_0 ;
  wire \retbuf[3][2]_i_2_n_0 ;
  wire \retbuf[3][2]_i_4_n_0 ;
  wire \retbuf[3][2]_i_5_n_0 ;
  wire \retbuf[3][2]_i_6_n_0 ;
  wire \retbuf[3][3]_i_2_n_0 ;
  wire \retbuf[3][3]_i_4_n_0 ;
  wire \retbuf[3][3]_i_5_n_0 ;
  wire \retbuf[3][3]_i_6_n_0 ;
  wire \retbuf[3][4]_i_2_n_0 ;
  wire \retbuf[3][4]_i_3_n_0 ;
  wire \retbuf[3][4]_i_4_n_0 ;
  wire \retbuf[3][4]_i_5_n_0 ;
  wire \retbuf[3][4]_i_6_n_0 ;
  wire \retbuf[3][5]_i_2_n_0 ;
  wire \retbuf[3][5]_i_3_n_0 ;
  wire \retbuf[3][5]_i_4_n_0 ;
  wire \retbuf[3][5]_i_5_n_0 ;
  wire \retbuf[3][5]_i_6_n_0 ;
  wire \retbuf[3][5]_i_7_n_0 ;
  wire \retbuf[3][5]_i_8_n_0 ;
  wire \retbuf[3][6]_i_2_n_0 ;
  wire \retbuf[3][6]_i_4_n_0 ;
  wire \retbuf[3][6]_i_5_n_0 ;
  wire \retbuf[3][6]_i_6_n_0 ;
  wire \retbuf[3][7]_i_10_n_0 ;
  wire \retbuf[3][7]_i_11_n_0 ;
  wire \retbuf[3][7]_i_12_n_0 ;
  wire \retbuf[3][7]_i_13_n_0 ;
  wire \retbuf[3][7]_i_14_n_0 ;
  wire \retbuf[3][7]_i_15_n_0 ;
  wire \retbuf[3][7]_i_16_n_0 ;
  wire \retbuf[3][7]_i_17_n_0 ;
  wire \retbuf[3][7]_i_18_n_0 ;
  wire \retbuf[3][7]_i_19_n_0 ;
  wire \retbuf[3][7]_i_20_n_0 ;
  wire \retbuf[3][7]_i_3_n_0 ;
  wire \retbuf[3][7]_i_4_n_0 ;
  wire \retbuf[3][7]_i_5_n_0 ;
  wire \retbuf[3][7]_i_6_n_0 ;
  wire \retbuf[3][7]_i_8_n_0 ;
  wire \retbuf[3][7]_i_9_n_0 ;
  wire \retbuf[4][0]_i_3_n_0 ;
  wire \retbuf[4][0]_i_4_n_0 ;
  wire \retbuf[4][0]_i_5_n_0 ;
  wire \retbuf[4][0]_i_6_n_0 ;
  wire \retbuf[4][1]_i_3_n_0 ;
  wire \retbuf[4][1]_i_4_n_0 ;
  wire \retbuf[4][1]_i_5_n_0 ;
  wire \retbuf[4][1]_i_6_n_0 ;
  wire \retbuf[4][2]_i_3_n_0 ;
  wire \retbuf[4][2]_i_4_n_0 ;
  wire \retbuf[4][2]_i_5_n_0 ;
  wire \retbuf[4][2]_i_6_n_0 ;
  wire \retbuf[4][3]_i_3_n_0 ;
  wire \retbuf[4][3]_i_4_n_0 ;
  wire \retbuf[4][3]_i_5_n_0 ;
  wire \retbuf[4][3]_i_6_n_0 ;
  wire \retbuf[4][4]_i_2_n_0 ;
  wire \retbuf[4][4]_i_3_n_0 ;
  wire \retbuf[4][4]_i_4_n_0 ;
  wire \retbuf[4][4]_i_5_n_0 ;
  wire \retbuf[4][4]_i_6_n_0 ;
  wire \retbuf[4][4]_i_7_n_0 ;
  wire \retbuf[4][4]_i_8_n_0 ;
  wire \retbuf[4][5]_i_2_n_0 ;
  wire \retbuf[4][5]_i_3_n_0 ;
  wire \retbuf[4][5]_i_4_n_0 ;
  wire \retbuf[4][5]_i_5_n_0 ;
  wire \retbuf[4][5]_i_6_n_0 ;
  wire \retbuf[4][5]_i_7_n_0 ;
  wire \retbuf[4][5]_i_8_n_0 ;
  wire \retbuf[4][6]_i_10_n_0 ;
  wire \retbuf[4][6]_i_2_n_0 ;
  wire \retbuf[4][6]_i_3_n_0 ;
  wire \retbuf[4][6]_i_4_n_0 ;
  wire \retbuf[4][6]_i_5_n_0 ;
  wire \retbuf[4][6]_i_6_n_0 ;
  wire \retbuf[4][6]_i_7_n_0 ;
  wire \retbuf[4][6]_i_8_n_0 ;
  wire \retbuf[4][6]_i_9_n_0 ;
  wire \retbuf[4][7]_i_10_n_0 ;
  wire \retbuf[4][7]_i_11_n_0 ;
  wire [27:0]\retbuf[4][7]_i_12_0 ;
  wire \retbuf[4][7]_i_12_n_0 ;
  wire \retbuf[4][7]_i_13_n_0 ;
  wire \retbuf[4][7]_i_14_n_0 ;
  wire \retbuf[4][7]_i_15_n_0 ;
  wire \retbuf[4][7]_i_16_n_0 ;
  wire \retbuf[4][7]_i_17_n_0 ;
  wire \retbuf[4][7]_i_18_n_0 ;
  wire \retbuf[4][7]_i_3_n_0 ;
  wire \retbuf[4][7]_i_4_n_0 ;
  wire \retbuf[4][7]_i_5_n_0 ;
  wire \retbuf[4][7]_i_6_n_0 ;
  wire \retbuf[4][7]_i_7_n_0 ;
  wire \retbuf[4][7]_i_9_n_0 ;
  wire \retbuf[5][0]_i_2_n_0 ;
  wire \retbuf[5][0]_i_3_n_0 ;
  wire \retbuf[5][0]_i_4_n_0 ;
  wire [9:0]\retbuf[5][1]_i_2_0 ;
  wire \retbuf[5][1]_i_2_n_0 ;
  wire \retbuf[5][1]_i_3_n_0 ;
  wire \retbuf[5][1]_i_4_n_0 ;
  wire \retbuf[5][2]_i_2_n_0 ;
  wire \retbuf[5][2]_i_3_n_0 ;
  wire \retbuf[5][3]_i_2_n_0 ;
  wire \retbuf[5][3]_i_3_n_0 ;
  wire \retbuf[5][4]_i_2_n_0 ;
  wire \retbuf[5][4]_i_3_n_0 ;
  wire \retbuf[5][5]_i_2__0_n_0 ;
  wire \retbuf[5][5]_i_3_n_0 ;
  wire \retbuf[5][5]_i_4_n_0 ;
  wire \retbuf[5][6]_i_2_n_0 ;
  wire \retbuf[5][6]_i_3_n_0 ;
  wire \retbuf[5][7]_i_10_n_0 ;
  wire \retbuf[5][7]_i_11_n_0 ;
  wire \retbuf[5][7]_i_12_n_0 ;
  wire \retbuf[5][7]_i_13_n_0 ;
  wire \retbuf[5][7]_i_14_n_0 ;
  wire \retbuf[5][7]_i_15_n_0 ;
  wire \retbuf[5][7]_i_16_n_0 ;
  wire \retbuf[5][7]_i_17_n_0 ;
  wire \retbuf[5][7]_i_18_n_0 ;
  wire \retbuf[5][7]_i_3_n_0 ;
  wire \retbuf[5][7]_i_4_n_0 ;
  wire [7:0]\retbuf[5][7]_i_5_0 ;
  wire [7:0]\retbuf[5][7]_i_5_1 ;
  wire \retbuf[5][7]_i_5_n_0 ;
  wire \retbuf[5][7]_i_6_n_0 ;
  wire \retbuf[5][7]_i_7_n_0 ;
  wire \retbuf[5][7]_i_8_n_0 ;
  wire \retbuf[5][7]_i_9_n_0 ;
  wire \retbuf[6][0]_i_2_n_0 ;
  wire \retbuf[6][0]_i_3_n_0 ;
  wire \retbuf[6][0]_i_4_n_0 ;
  wire \retbuf[6][1]_i_2_n_0 ;
  wire \retbuf[6][1]_i_3_n_0 ;
  wire \retbuf[6][1]_i_4_n_0 ;
  wire \retbuf[6][2]_i_2_n_0 ;
  wire \retbuf[6][2]_i_3_n_0 ;
  wire \retbuf[6][2]_i_4_n_0 ;
  wire \retbuf[6][3]_i_2_n_0 ;
  wire \retbuf[6][3]_i_3_n_0 ;
  wire \retbuf[6][3]_i_4_n_0 ;
  wire \retbuf[6][4]_i_2_n_0 ;
  wire \retbuf[6][4]_i_3_n_0 ;
  wire \retbuf[6][4]_i_4_n_0 ;
  wire \retbuf[6][5]_i_5_n_0 ;
  wire \retbuf[6][5]_i_6_n_0 ;
  wire \retbuf[6][6]_i_2_n_0 ;
  wire \retbuf[6][6]_i_3_n_0 ;
  wire \retbuf[6][6]_i_4_n_0 ;
  wire \retbuf[6][7]_i_3_n_0 ;
  wire [7:0]\retbuf[6][7]_i_4_0 ;
  wire [7:0]\retbuf[6][7]_i_4_1 ;
  wire \retbuf[6][7]_i_4_n_0 ;
  wire \retbuf[6][7]_i_5_n_0 ;
  wire \retbuf[6][7]_i_6_n_0 ;
  wire \retbuf[6][7]_i_7_n_0 ;
  wire \retbuf[6][7]_i_8_n_0 ;
  wire \retbuf[7][3]_i_2_n_0 ;
  wire \retbuf[7][7]_i_3_n_0 ;
  wire \retbuf[7][7]_i_4_n_0 ;
  wire \retbuf[7][7]_i_6_n_0 ;
  wire \retbuf[7][7]_i_7_n_0 ;
  wire \retbuf[8][7]_i_10_n_0 ;
  wire \retbuf[8][7]_i_11_n_0 ;
  wire \retbuf[8][7]_i_12_n_0 ;
  wire \retbuf[8][7]_i_13_n_0 ;
  wire \retbuf[8][7]_i_14_n_0 ;
  wire \retbuf[8][7]_i_15_n_0 ;
  wire \retbuf[8][7]_i_16_n_0 ;
  wire \retbuf[8][7]_i_17_n_0 ;
  wire \retbuf[8][7]_i_18_n_0 ;
  wire \retbuf[8][7]_i_19_n_0 ;
  wire \retbuf[8][7]_i_20_n_0 ;
  wire \retbuf[8][7]_i_21_n_0 ;
  wire \retbuf[8][7]_i_22_n_0 ;
  wire \retbuf[8][7]_i_23_n_0 ;
  wire \retbuf[8][7]_i_24_n_0 ;
  wire \retbuf[8][7]_i_25_n_0 ;
  wire \retbuf[8][7]_i_4_n_0 ;
  wire \retbuf[8][7]_i_5_n_0 ;
  wire \retbuf[8][7]_i_6_n_0 ;
  wire \retbuf[8][7]_i_7_n_0 ;
  wire \retbuf[8][7]_i_8_n_0 ;
  wire \retbuf[8][7]_i_9_n_0 ;
  wire \retbuf[9][7]_i_3_n_0 ;
  wire \retbuf[9][7]_i_4_n_0 ;
  wire \retbuf_reg[0][1]_i_5_0 ;
  wire \retbuf_reg[0][1]_i_5_n_0 ;
  wire [27:0]\retbuf_reg[12][7]_0 ;
  wire [7:0]\retbuf_reg[16]_65 ;
  wire \retbuf_reg[1][0]_i_4_n_0 ;
  wire \retbuf_reg[1][1]_i_4_n_0 ;
  wire \retbuf_reg[1][2]_i_4_n_0 ;
  wire \retbuf_reg[1][3]_i_3_n_0 ;
  wire \retbuf_reg[1][4]_i_4_n_0 ;
  wire \retbuf_reg[1][5]_i_4_n_0 ;
  wire \retbuf_reg[1][6]_i_4_n_0 ;
  wire [31:0]\retbuf_reg[1][7]_0 ;
  wire [31:0]\retbuf_reg[1][7]_i_13_0 ;
  wire [31:0]\retbuf_reg[1][7]_i_13_1 ;
  wire [31:0]\retbuf_reg[1][7]_i_13_2 ;
  wire \retbuf_reg[1][7]_i_13_n_0 ;
  wire \retbuf_reg[2][0]_i_4_n_0 ;
  wire \retbuf_reg[2][1]_i_4_n_0 ;
  wire \retbuf_reg[2][2]_i_4_n_0 ;
  wire \retbuf_reg[2][3]_i_4_n_0 ;
  wire \retbuf_reg[2][4]_i_4_n_0 ;
  wire \retbuf_reg[2][5]_i_4_n_0 ;
  wire \retbuf_reg[2][6]_i_4_n_0 ;
  wire \retbuf_reg[2][7]_i_8_n_0 ;
  wire \retbuf_reg[6][5]_i_2_n_0 ;
  wire [27:0]\retbuf_reg[8][7]_0 ;
  wire \retbuf_reg_n_0_[0][0] ;
  wire \retbuf_reg_n_0_[0][1] ;
  wire \retbuf_reg_n_0_[0][2] ;
  wire \retbuf_reg_n_0_[0][3] ;
  wire \retbuf_reg_n_0_[0][4] ;
  wire \retbuf_reg_n_0_[0][5] ;
  wire \retbuf_reg_n_0_[0][6] ;
  wire \retbuf_reg_n_0_[0][7] ;
  wire \retbuf_reg_n_0_[10][0] ;
  wire \retbuf_reg_n_0_[10][1] ;
  wire \retbuf_reg_n_0_[10][2] ;
  wire \retbuf_reg_n_0_[10][3] ;
  wire \retbuf_reg_n_0_[10][4] ;
  wire \retbuf_reg_n_0_[10][5] ;
  wire \retbuf_reg_n_0_[10][6] ;
  wire \retbuf_reg_n_0_[10][7] ;
  wire \retbuf_reg_n_0_[11][0] ;
  wire \retbuf_reg_n_0_[11][1] ;
  wire \retbuf_reg_n_0_[11][2] ;
  wire \retbuf_reg_n_0_[11][3] ;
  wire \retbuf_reg_n_0_[11][4] ;
  wire \retbuf_reg_n_0_[11][5] ;
  wire \retbuf_reg_n_0_[11][6] ;
  wire \retbuf_reg_n_0_[11][7] ;
  wire \retbuf_reg_n_0_[12][0] ;
  wire \retbuf_reg_n_0_[12][1] ;
  wire \retbuf_reg_n_0_[12][2] ;
  wire \retbuf_reg_n_0_[12][3] ;
  wire \retbuf_reg_n_0_[12][4] ;
  wire \retbuf_reg_n_0_[12][5] ;
  wire \retbuf_reg_n_0_[12][6] ;
  wire \retbuf_reg_n_0_[12][7] ;
  wire \retbuf_reg_n_0_[13][0] ;
  wire \retbuf_reg_n_0_[13][1] ;
  wire \retbuf_reg_n_0_[13][2] ;
  wire \retbuf_reg_n_0_[13][3] ;
  wire \retbuf_reg_n_0_[13][4] ;
  wire \retbuf_reg_n_0_[13][5] ;
  wire \retbuf_reg_n_0_[13][6] ;
  wire \retbuf_reg_n_0_[13][7] ;
  wire \retbuf_reg_n_0_[14][0] ;
  wire \retbuf_reg_n_0_[14][1] ;
  wire \retbuf_reg_n_0_[14][2] ;
  wire \retbuf_reg_n_0_[14][3] ;
  wire \retbuf_reg_n_0_[14][4] ;
  wire \retbuf_reg_n_0_[14][5] ;
  wire \retbuf_reg_n_0_[14][6] ;
  wire \retbuf_reg_n_0_[14][7] ;
  wire \retbuf_reg_n_0_[15][0] ;
  wire \retbuf_reg_n_0_[15][1] ;
  wire \retbuf_reg_n_0_[15][2] ;
  wire \retbuf_reg_n_0_[15][3] ;
  wire \retbuf_reg_n_0_[15][4] ;
  wire \retbuf_reg_n_0_[15][5] ;
  wire \retbuf_reg_n_0_[15][6] ;
  wire \retbuf_reg_n_0_[15][7] ;
  wire \retbuf_reg_n_0_[17][0] ;
  wire \retbuf_reg_n_0_[17][1] ;
  wire \retbuf_reg_n_0_[17][2] ;
  wire \retbuf_reg_n_0_[17][3] ;
  wire \retbuf_reg_n_0_[17][4] ;
  wire \retbuf_reg_n_0_[17][5] ;
  wire \retbuf_reg_n_0_[17][6] ;
  wire \retbuf_reg_n_0_[17][7] ;
  wire \retbuf_reg_n_0_[18][0] ;
  wire \retbuf_reg_n_0_[18][1] ;
  wire \retbuf_reg_n_0_[18][2] ;
  wire \retbuf_reg_n_0_[18][3] ;
  wire \retbuf_reg_n_0_[18][4] ;
  wire \retbuf_reg_n_0_[18][5] ;
  wire \retbuf_reg_n_0_[18][6] ;
  wire \retbuf_reg_n_0_[18][7] ;
  wire \retbuf_reg_n_0_[19][0] ;
  wire \retbuf_reg_n_0_[19][1] ;
  wire \retbuf_reg_n_0_[19][2] ;
  wire \retbuf_reg_n_0_[19][3] ;
  wire \retbuf_reg_n_0_[19][4] ;
  wire \retbuf_reg_n_0_[19][5] ;
  wire \retbuf_reg_n_0_[19][6] ;
  wire \retbuf_reg_n_0_[19][7] ;
  wire \retbuf_reg_n_0_[1][0] ;
  wire \retbuf_reg_n_0_[1][1] ;
  wire \retbuf_reg_n_0_[1][2] ;
  wire \retbuf_reg_n_0_[1][3] ;
  wire \retbuf_reg_n_0_[1][4] ;
  wire \retbuf_reg_n_0_[1][5] ;
  wire \retbuf_reg_n_0_[1][6] ;
  wire \retbuf_reg_n_0_[1][7] ;
  wire \retbuf_reg_n_0_[20][0] ;
  wire \retbuf_reg_n_0_[20][1] ;
  wire \retbuf_reg_n_0_[20][2] ;
  wire \retbuf_reg_n_0_[20][3] ;
  wire \retbuf_reg_n_0_[20][4] ;
  wire \retbuf_reg_n_0_[20][5] ;
  wire \retbuf_reg_n_0_[20][6] ;
  wire \retbuf_reg_n_0_[20][7] ;
  wire \retbuf_reg_n_0_[21][0] ;
  wire \retbuf_reg_n_0_[21][1] ;
  wire \retbuf_reg_n_0_[21][2] ;
  wire \retbuf_reg_n_0_[21][3] ;
  wire \retbuf_reg_n_0_[21][4] ;
  wire \retbuf_reg_n_0_[21][5] ;
  wire \retbuf_reg_n_0_[21][6] ;
  wire \retbuf_reg_n_0_[21][7] ;
  wire \retbuf_reg_n_0_[22][0] ;
  wire \retbuf_reg_n_0_[22][1] ;
  wire \retbuf_reg_n_0_[22][2] ;
  wire \retbuf_reg_n_0_[22][3] ;
  wire \retbuf_reg_n_0_[22][4] ;
  wire \retbuf_reg_n_0_[22][5] ;
  wire \retbuf_reg_n_0_[22][6] ;
  wire \retbuf_reg_n_0_[22][7] ;
  wire \retbuf_reg_n_0_[23][0] ;
  wire \retbuf_reg_n_0_[23][1] ;
  wire \retbuf_reg_n_0_[23][2] ;
  wire \retbuf_reg_n_0_[23][3] ;
  wire \retbuf_reg_n_0_[23][4] ;
  wire \retbuf_reg_n_0_[23][5] ;
  wire \retbuf_reg_n_0_[23][6] ;
  wire \retbuf_reg_n_0_[23][7] ;
  wire \retbuf_reg_n_0_[24][0] ;
  wire \retbuf_reg_n_0_[24][1] ;
  wire \retbuf_reg_n_0_[24][2] ;
  wire \retbuf_reg_n_0_[24][3] ;
  wire \retbuf_reg_n_0_[24][4] ;
  wire \retbuf_reg_n_0_[24][5] ;
  wire \retbuf_reg_n_0_[24][6] ;
  wire \retbuf_reg_n_0_[24][7] ;
  wire \retbuf_reg_n_0_[25][0] ;
  wire \retbuf_reg_n_0_[25][1] ;
  wire \retbuf_reg_n_0_[25][2] ;
  wire \retbuf_reg_n_0_[25][3] ;
  wire \retbuf_reg_n_0_[25][4] ;
  wire \retbuf_reg_n_0_[25][5] ;
  wire \retbuf_reg_n_0_[25][6] ;
  wire \retbuf_reg_n_0_[25][7] ;
  wire \retbuf_reg_n_0_[26][0] ;
  wire \retbuf_reg_n_0_[26][1] ;
  wire \retbuf_reg_n_0_[26][2] ;
  wire \retbuf_reg_n_0_[26][3] ;
  wire \retbuf_reg_n_0_[26][4] ;
  wire \retbuf_reg_n_0_[26][5] ;
  wire \retbuf_reg_n_0_[26][6] ;
  wire \retbuf_reg_n_0_[26][7] ;
  wire \retbuf_reg_n_0_[27][0] ;
  wire \retbuf_reg_n_0_[27][1] ;
  wire \retbuf_reg_n_0_[27][2] ;
  wire \retbuf_reg_n_0_[27][3] ;
  wire \retbuf_reg_n_0_[27][4] ;
  wire \retbuf_reg_n_0_[27][5] ;
  wire \retbuf_reg_n_0_[27][6] ;
  wire \retbuf_reg_n_0_[27][7] ;
  wire \retbuf_reg_n_0_[28][0] ;
  wire \retbuf_reg_n_0_[28][1] ;
  wire \retbuf_reg_n_0_[28][2] ;
  wire \retbuf_reg_n_0_[28][3] ;
  wire \retbuf_reg_n_0_[28][4] ;
  wire \retbuf_reg_n_0_[28][5] ;
  wire \retbuf_reg_n_0_[28][6] ;
  wire \retbuf_reg_n_0_[28][7] ;
  wire \retbuf_reg_n_0_[29][0] ;
  wire \retbuf_reg_n_0_[29][1] ;
  wire \retbuf_reg_n_0_[29][2] ;
  wire \retbuf_reg_n_0_[29][3] ;
  wire \retbuf_reg_n_0_[29][4] ;
  wire \retbuf_reg_n_0_[29][5] ;
  wire \retbuf_reg_n_0_[29][6] ;
  wire \retbuf_reg_n_0_[29][7] ;
  wire \retbuf_reg_n_0_[2][0] ;
  wire \retbuf_reg_n_0_[2][1] ;
  wire \retbuf_reg_n_0_[2][2] ;
  wire \retbuf_reg_n_0_[2][3] ;
  wire \retbuf_reg_n_0_[2][4] ;
  wire \retbuf_reg_n_0_[2][5] ;
  wire \retbuf_reg_n_0_[2][6] ;
  wire \retbuf_reg_n_0_[2][7] ;
  wire \retbuf_reg_n_0_[30][0] ;
  wire \retbuf_reg_n_0_[30][1] ;
  wire \retbuf_reg_n_0_[30][2] ;
  wire \retbuf_reg_n_0_[30][3] ;
  wire \retbuf_reg_n_0_[30][4] ;
  wire \retbuf_reg_n_0_[30][5] ;
  wire \retbuf_reg_n_0_[30][6] ;
  wire \retbuf_reg_n_0_[30][7] ;
  wire \retbuf_reg_n_0_[31][0] ;
  wire \retbuf_reg_n_0_[31][1] ;
  wire \retbuf_reg_n_0_[31][2] ;
  wire \retbuf_reg_n_0_[31][3] ;
  wire \retbuf_reg_n_0_[31][4] ;
  wire \retbuf_reg_n_0_[31][5] ;
  wire \retbuf_reg_n_0_[31][6] ;
  wire \retbuf_reg_n_0_[31][7] ;
  wire \retbuf_reg_n_0_[32][0] ;
  wire \retbuf_reg_n_0_[32][1] ;
  wire \retbuf_reg_n_0_[32][2] ;
  wire \retbuf_reg_n_0_[32][3] ;
  wire \retbuf_reg_n_0_[32][4] ;
  wire \retbuf_reg_n_0_[32][5] ;
  wire \retbuf_reg_n_0_[32][6] ;
  wire \retbuf_reg_n_0_[32][7] ;
  wire \retbuf_reg_n_0_[33][0] ;
  wire \retbuf_reg_n_0_[33][1] ;
  wire \retbuf_reg_n_0_[33][2] ;
  wire \retbuf_reg_n_0_[33][3] ;
  wire \retbuf_reg_n_0_[33][4] ;
  wire \retbuf_reg_n_0_[33][5] ;
  wire \retbuf_reg_n_0_[33][6] ;
  wire \retbuf_reg_n_0_[33][7] ;
  wire \retbuf_reg_n_0_[34][0] ;
  wire \retbuf_reg_n_0_[34][1] ;
  wire \retbuf_reg_n_0_[34][2] ;
  wire \retbuf_reg_n_0_[34][3] ;
  wire \retbuf_reg_n_0_[34][4] ;
  wire \retbuf_reg_n_0_[34][5] ;
  wire \retbuf_reg_n_0_[34][6] ;
  wire \retbuf_reg_n_0_[34][7] ;
  wire \retbuf_reg_n_0_[35][0] ;
  wire \retbuf_reg_n_0_[35][1] ;
  wire \retbuf_reg_n_0_[35][2] ;
  wire \retbuf_reg_n_0_[35][3] ;
  wire \retbuf_reg_n_0_[35][4] ;
  wire \retbuf_reg_n_0_[35][5] ;
  wire \retbuf_reg_n_0_[35][6] ;
  wire \retbuf_reg_n_0_[35][7] ;
  wire \retbuf_reg_n_0_[36][0] ;
  wire \retbuf_reg_n_0_[36][1] ;
  wire \retbuf_reg_n_0_[36][2] ;
  wire \retbuf_reg_n_0_[36][3] ;
  wire \retbuf_reg_n_0_[36][4] ;
  wire \retbuf_reg_n_0_[36][5] ;
  wire \retbuf_reg_n_0_[36][6] ;
  wire \retbuf_reg_n_0_[36][7] ;
  wire \retbuf_reg_n_0_[37][0] ;
  wire \retbuf_reg_n_0_[37][1] ;
  wire \retbuf_reg_n_0_[37][2] ;
  wire \retbuf_reg_n_0_[37][3] ;
  wire \retbuf_reg_n_0_[37][4] ;
  wire \retbuf_reg_n_0_[37][5] ;
  wire \retbuf_reg_n_0_[37][6] ;
  wire \retbuf_reg_n_0_[37][7] ;
  wire \retbuf_reg_n_0_[38][0] ;
  wire \retbuf_reg_n_0_[38][1] ;
  wire \retbuf_reg_n_0_[38][2] ;
  wire \retbuf_reg_n_0_[38][3] ;
  wire \retbuf_reg_n_0_[38][4] ;
  wire \retbuf_reg_n_0_[38][5] ;
  wire \retbuf_reg_n_0_[38][6] ;
  wire \retbuf_reg_n_0_[38][7] ;
  wire \retbuf_reg_n_0_[39][0] ;
  wire \retbuf_reg_n_0_[39][1] ;
  wire \retbuf_reg_n_0_[39][2] ;
  wire \retbuf_reg_n_0_[39][3] ;
  wire \retbuf_reg_n_0_[39][4] ;
  wire \retbuf_reg_n_0_[39][5] ;
  wire \retbuf_reg_n_0_[39][6] ;
  wire \retbuf_reg_n_0_[39][7] ;
  wire \retbuf_reg_n_0_[3][0] ;
  wire \retbuf_reg_n_0_[3][1] ;
  wire \retbuf_reg_n_0_[3][2] ;
  wire \retbuf_reg_n_0_[3][3] ;
  wire \retbuf_reg_n_0_[3][4] ;
  wire \retbuf_reg_n_0_[3][5] ;
  wire \retbuf_reg_n_0_[3][6] ;
  wire \retbuf_reg_n_0_[3][7] ;
  wire \retbuf_reg_n_0_[4][0] ;
  wire \retbuf_reg_n_0_[4][1] ;
  wire \retbuf_reg_n_0_[4][2] ;
  wire \retbuf_reg_n_0_[4][3] ;
  wire \retbuf_reg_n_0_[4][4] ;
  wire \retbuf_reg_n_0_[4][5] ;
  wire \retbuf_reg_n_0_[4][6] ;
  wire \retbuf_reg_n_0_[4][7] ;
  wire \retbuf_reg_n_0_[5][0] ;
  wire \retbuf_reg_n_0_[5][1] ;
  wire \retbuf_reg_n_0_[5][2] ;
  wire \retbuf_reg_n_0_[5][3] ;
  wire \retbuf_reg_n_0_[5][4] ;
  wire \retbuf_reg_n_0_[5][5] ;
  wire \retbuf_reg_n_0_[5][6] ;
  wire \retbuf_reg_n_0_[5][7] ;
  wire \retbuf_reg_n_0_[6][0] ;
  wire \retbuf_reg_n_0_[6][1] ;
  wire \retbuf_reg_n_0_[6][2] ;
  wire \retbuf_reg_n_0_[6][3] ;
  wire \retbuf_reg_n_0_[6][4] ;
  wire \retbuf_reg_n_0_[6][5] ;
  wire \retbuf_reg_n_0_[6][6] ;
  wire \retbuf_reg_n_0_[6][7] ;
  wire \retbuf_reg_n_0_[7][0] ;
  wire \retbuf_reg_n_0_[7][1] ;
  wire \retbuf_reg_n_0_[7][2] ;
  wire \retbuf_reg_n_0_[7][3] ;
  wire \retbuf_reg_n_0_[7][4] ;
  wire \retbuf_reg_n_0_[7][5] ;
  wire \retbuf_reg_n_0_[7][6] ;
  wire \retbuf_reg_n_0_[7][7] ;
  wire \retbuf_reg_n_0_[8][0] ;
  wire \retbuf_reg_n_0_[8][1] ;
  wire \retbuf_reg_n_0_[8][2] ;
  wire \retbuf_reg_n_0_[8][3] ;
  wire \retbuf_reg_n_0_[8][4] ;
  wire \retbuf_reg_n_0_[8][5] ;
  wire \retbuf_reg_n_0_[8][6] ;
  wire \retbuf_reg_n_0_[8][7] ;
  wire \retbuf_reg_n_0_[9][0] ;
  wire \retbuf_reg_n_0_[9][1] ;
  wire \retbuf_reg_n_0_[9][2] ;
  wire \retbuf_reg_n_0_[9][3] ;
  wire \retbuf_reg_n_0_[9][4] ;
  wire \retbuf_reg_n_0_[9][5] ;
  wire \retbuf_reg_n_0_[9][6] ;
  wire \retbuf_reg_n_0_[9][7] ;
  wire rng;
  wire rng_reg;
  wire rng_reg_0;
  wire rng_reg_1;
  wire rng_reg_10;
  wire rng_reg_11;
  wire rng_reg_12;
  wire rng_reg_13;
  wire rng_reg_2;
  wire [0:0]rng_reg_3;
  wire [1:0]rng_reg_4;
  wire rng_reg_5;
  wire [0:0]rng_reg_6;
  wire rng_reg_7;
  wire rng_reg_8;
  wire rng_reg_9;
  wire rng_sig_reg;
  wire [15:0]rxAXIS_tdata;
  wire \rxlen[0]_i_3_n_0 ;
  wire \rxlen[0]_i_5_n_0 ;
  wire \rxlen[0]_i_6_n_0 ;
  wire \rxlen_reg_n_0_[0] ;
  wire [0:0]\seq[1]_2 ;
  wire seqbufCputrackToHostifAXIS_tready;
  wire seqbufCputrackToHostifAXIS_tvalid;
  wire seqbufHshktrackToHostifAXIS_tready;
  wire seqbufHshktrackToHostifAXIS_tvalid;
  wire seqbufMemtrackToHostifAXIS_tready;
  wire seqbufMemtrackToHostifAXIS_tvalid;
  wire seqbufVidtrackToHostifAXIS_tready;
  wire seqbufVidtrackToHostifAXIS_tvalid;
  wire \staTixVTrigger[7]_i_3__0_0 ;
  wire \staTixVTrigger[7]_i_3__1_n_0 ;
  wire \staTixVTrigger[7]_i_4__1_n_0 ;
  wire \staTixVTrigger[7]_i_5_n_0 ;
  wire stateCorecfg0;
  wire \stateCorecfg[2]_i_4_0 ;
  wire \stateCorecfg[2]_i_6_n_0 ;
  wire \stateCorecfg[2]_i_7_n_0 ;
  wire \stateCorecfg[2]_i_8_n_0 ;
  wire \stateCorecfg[2]_i_9_n_0 ;
  wire \stateLive_reg[2] ;
  wire stateMclk;
  wire stateOp0_out;
  wire stateOp47_out;
  wire stateOp5_out;
  wire \stateOp[0]_i_7_n_0 ;
  wire \stateOp[0]_i_8_n_0 ;
  wire \stateOp[1]_i_10__1_n_0 ;
  wire \stateOp[1]_i_12_n_0 ;
  wire \stateOp[1]_i_13_n_0 ;
  wire \stateOp[1]_i_14_n_0 ;
  wire \stateOp[1]_i_15_n_0 ;
  wire \stateOp[1]_i_16_n_0 ;
  wire \stateOp[1]_i_17_n_0 ;
  wire \stateOp[1]_i_18_n_0 ;
  wire \stateOp[1]_i_19_n_0 ;
  wire \stateOp[1]_i_20_n_0 ;
  wire \stateOp[1]_i_21_n_0 ;
  wire \stateOp[1]_i_22_n_0 ;
  wire \stateOp[1]_i_23_n_0 ;
  wire \stateOp[1]_i_24_n_0 ;
  wire \stateOp[1]_i_25_n_0 ;
  wire \stateOp[1]_i_26_n_0 ;
  wire \stateOp[1]_i_27_n_0 ;
  wire \stateOp[1]_i_28_n_0 ;
  wire \stateOp[1]_i_29_n_0 ;
  wire \stateOp[1]_i_2__4_n_0 ;
  wire \stateOp[1]_i_30_n_0 ;
  wire \stateOp[1]_i_31_n_0 ;
  wire \stateOp[1]_i_32_n_0 ;
  wire \stateOp[1]_i_33_n_0 ;
  wire \stateOp[1]_i_34_n_0 ;
  wire \stateOp[1]_i_35_n_0 ;
  wire \stateOp[1]_i_36_n_0 ;
  wire \stateOp[1]_i_37_n_0 ;
  wire \stateOp[1]_i_38_n_0 ;
  wire \stateOp[1]_i_39_n_0 ;
  wire \stateOp[1]_i_3__4_n_0 ;
  wire \stateOp[1]_i_40_n_0 ;
  wire \stateOp[1]_i_41_n_0 ;
  wire \stateOp[1]_i_42_n_0 ;
  wire \stateOp[1]_i_5__1_n_0 ;
  wire \stateOp[1]_i_6__1_n_0 ;
  wire \stateOp[1]_i_8__1_n_0 ;
  wire \stateOp[1]_i_9__0_n_0 ;
  wire \stateOp[2]_i_10__1_n_0 ;
  wire \stateOp[2]_i_11__1_n_0 ;
  wire \stateOp[2]_i_12__0_n_0 ;
  wire \stateOp[2]_i_13__1_n_0 ;
  wire \stateOp[2]_i_14__0_n_0 ;
  wire \stateOp[2]_i_15__1_n_0 ;
  wire \stateOp[2]_i_16__1_n_0 ;
  wire \stateOp[2]_i_17__1_n_0 ;
  wire \stateOp[2]_i_18__1_n_0 ;
  wire \stateOp[2]_i_19__1_n_0 ;
  wire \stateOp[2]_i_20__1_n_0 ;
  wire \stateOp[2]_i_25__1_n_0 ;
  wire \stateOp[2]_i_26__1_n_0 ;
  wire \stateOp[2]_i_27__1_n_0 ;
  wire \stateOp[2]_i_28__1_n_0 ;
  wire \stateOp[2]_i_29__1_n_0 ;
  wire \stateOp[2]_i_30__1_n_0 ;
  wire \stateOp[2]_i_31__1_n_0 ;
  wire \stateOp[2]_i_32__1_n_0 ;
  wire \stateOp[2]_i_33__1_n_0 ;
  wire \stateOp[2]_i_34__1_n_0 ;
  wire \stateOp[2]_i_35__1_n_0 ;
  wire \stateOp[2]_i_36__1_n_0 ;
  wire \stateOp[2]_i_37__1_n_0 ;
  wire \stateOp[2]_i_38__1_n_0 ;
  wire \stateOp[2]_i_39__1_n_0 ;
  wire \stateOp[2]_i_40__1_n_0 ;
  wire \stateOp[2]_i_41__1_n_0 ;
  wire \stateOp[2]_i_42__1_n_0 ;
  wire \stateOp[2]_i_43__1_n_0 ;
  wire \stateOp[2]_i_44__1_n_0 ;
  wire \stateOp[2]_i_45__1_n_0 ;
  wire \stateOp[2]_i_46__1_n_0 ;
  wire \stateOp[2]_i_47__1_n_0 ;
  wire \stateOp[2]_i_48__1_n_0 ;
  wire \stateOp[2]_i_49__1_n_0 ;
  wire \stateOp[2]_i_50__1_n_0 ;
  wire \stateOp[2]_i_51__1_n_0 ;
  wire \stateOp[2]_i_52__1_n_0 ;
  wire \stateOp[3]_i_5_n_0 ;
  wire \stateOp[4]_i_4_n_0 ;
  wire \stateOp[4]_i_5_n_0 ;
  wire \stateOp[5]_i_12_n_0 ;
  wire \stateOp[5]_i_13_n_0 ;
  wire \stateOp[5]_i_14_n_0 ;
  wire \stateOp[5]_i_15_n_0 ;
  wire \stateOp[5]_i_16_n_0 ;
  wire \stateOp[5]_i_17_n_0 ;
  wire \stateOp[5]_i_19_n_0 ;
  wire \stateOp[5]_i_20_n_0 ;
  wire \stateOp[5]_i_21_n_0 ;
  wire \stateOp[5]_i_22_n_0 ;
  wire \stateOp[5]_i_23_n_0 ;
  wire \stateOp[5]_i_24_n_0 ;
  wire \stateOp[5]_i_25_n_0 ;
  wire \stateOp[5]_i_26_n_0 ;
  wire \stateOp[5]_i_27_n_0 ;
  wire \stateOp[5]_i_28_n_0 ;
  wire \stateOp[5]_i_29_n_0 ;
  wire \stateOp[5]_i_30_n_0 ;
  wire \stateOp[5]_i_31_n_0 ;
  wire \stateOp[5]_i_32_n_0 ;
  wire \stateOp[5]_i_33_n_0 ;
  wire \stateOp[5]_i_34_n_0 ;
  wire \stateOp[5]_i_35_n_0 ;
  wire \stateOp[5]_i_36_n_0 ;
  wire \stateOp[5]_i_37_n_0 ;
  wire \stateOp[5]_i_38_n_0 ;
  wire \stateOp[5]_i_39_n_0 ;
  wire \stateOp[5]_i_3_n_0 ;
  wire \stateOp[5]_i_40_n_0 ;
  wire \stateOp[5]_i_41_n_0 ;
  wire \stateOp[5]_i_42_n_0 ;
  wire \stateOp[5]_i_43_n_0 ;
  wire \stateOp[5]_i_44_n_0 ;
  wire \stateOp[5]_i_45_n_0 ;
  wire \stateOp[5]_i_46_n_0 ;
  wire \stateOp[5]_i_47_n_0 ;
  wire \stateOp[5]_i_48_n_0 ;
  wire \stateOp[5]_i_49_n_0 ;
  wire \stateOp[5]_i_50_n_0 ;
  wire \stateOp[5]_i_51_n_0 ;
  wire \stateOp[5]_i_52_n_0 ;
  wire \stateOp[5]_i_53_n_0 ;
  wire \stateOp[5]_i_54_n_0 ;
  wire \stateOp[5]_i_55_n_0 ;
  wire \stateOp[5]_i_56_n_0 ;
  wire \stateOp[5]_i_57_n_0 ;
  wire \stateOp[5]_i_58_n_0 ;
  wire \stateOp[5]_i_59_n_0 ;
  wire \stateOp[5]_i_60_n_0 ;
  wire \stateOp[5]_i_61_n_0 ;
  wire \stateOp[5]_i_62_n_0 ;
  wire \stateOp[5]_i_63_n_0 ;
  wire \stateOp[5]_i_64_n_0 ;
  wire \stateOp[5]_i_65_n_0 ;
  wire \stateOp[5]_i_66_n_0 ;
  wire \stateOp[5]_i_68_n_0 ;
  wire \stateOp[5]_i_69_n_0 ;
  wire \stateOp[5]_i_70_n_0 ;
  wire \stateOp[5]_i_71_n_0 ;
  wire \stateOp[5]_i_72_n_0 ;
  wire \stateOp[5]_i_73_n_0 ;
  wire \stateOp[5]_i_75_n_0 ;
  wire \stateOp[5]_i_76_n_0 ;
  wire \stateOp[5]_i_77_n_0 ;
  wire \stateOp[5]_i_7_n_0 ;
  wire \stateOp[5]_i_8_n_0 ;
  wire stateOp_i_2__0_n_0;
  wire stateOp_i_3__1_n_0;
  wire stateOp_i_4__1_n_0;
  wire stateOp_i_5__0_n_0;
  wire stateOp_i_5__1_n_0;
  wire stateOp_next3144_in;
  wire \stateOp_next[1]_i_2_n_0 ;
  wire \stateOp_next[4]_i_11_n_0 ;
  wire \stateOp_next[4]_i_13_n_0 ;
  wire \stateOp_next[4]_i_14_n_0 ;
  wire \stateOp_next[4]_i_15_n_0 ;
  wire \stateOp_next[4]_i_16_n_0 ;
  wire \stateOp_next[4]_i_17_n_0 ;
  wire \stateOp_next[4]_i_18_n_0 ;
  wire \stateOp_next[4]_i_19_n_0 ;
  wire \stateOp_next[4]_i_20_n_0 ;
  wire \stateOp_next[4]_i_21_n_0 ;
  wire \stateOp_next[4]_i_22_n_0 ;
  wire \stateOp_next[4]_i_23_n_0 ;
  wire \stateOp_next[4]_i_2_n_0 ;
  wire \stateOp_next[4]_i_3_n_0 ;
  wire \stateOp_next[4]_i_4_n_0 ;
  wire \stateOp_next[4]_i_5_n_0 ;
  wire \stateOp_next[4]_i_6_n_0 ;
  wire \stateOp_next[4]_i_7_n_0 ;
  wire \stateOp_next[4]_i_8_n_0 ;
  wire \stateOp_next[4]_i_9_n_0 ;
  wire \stateOp_next[5]_i_10_n_0 ;
  wire \stateOp_next[5]_i_11_n_0 ;
  wire \stateOp_next[5]_i_12_n_0 ;
  wire \stateOp_next[5]_i_13_n_0 ;
  wire \stateOp_next[5]_i_14_n_0 ;
  wire \stateOp_next[5]_i_15_n_0 ;
  wire \stateOp_next[5]_i_16_n_0 ;
  wire \stateOp_next[5]_i_17_n_0 ;
  wire \stateOp_next[5]_i_18_n_0 ;
  wire \stateOp_next[5]_i_19_n_0 ;
  wire \stateOp_next[5]_i_20_n_0 ;
  wire \stateOp_next[5]_i_21_n_0 ;
  wire \stateOp_next[5]_i_22_n_0 ;
  wire \stateOp_next[5]_i_23_n_0 ;
  wire \stateOp_next[5]_i_3_n_0 ;
  wire \stateOp_next[5]_i_4_n_0 ;
  wire \stateOp_next[5]_i_5_n_0 ;
  wire \stateOp_next[5]_i_6_n_0 ;
  wire \stateOp_next[5]_i_7_n_0 ;
  wire \stateOp_next[5]_i_8_n_0 ;
  wire \stateOp_next[5]_i_9_n_0 ;
  wire \stateOp_next_reg[4]_i_10_n_6 ;
  wire \stateOp_next_reg[4]_i_10_n_7 ;
  wire \stateOp_next_reg[4]_i_12_n_0 ;
  wire \stateOp_next_reg[4]_i_12_n_1 ;
  wire \stateOp_next_reg[4]_i_12_n_2 ;
  wire \stateOp_next_reg[4]_i_12_n_3 ;
  wire \stateOp_next_reg[4]_i_12_n_4 ;
  wire \stateOp_next_reg[4]_i_12_n_5 ;
  wire \stateOp_next_reg[4]_i_12_n_6 ;
  wire \stateOp_next_reg[4]_i_12_n_7 ;
  wire \stateOp_next_reg_n_0_[0] ;
  wire \stateOp_next_reg_n_0_[1] ;
  wire \stateOp_next_reg_n_0_[3] ;
  wire \stateOp_next_reg_n_0_[4] ;
  wire \stateOp_next_reg_n_0_[5] ;
  wire stateOp_reg;
  wire \stateOp_reg[0]_0 ;
  wire [0:0]\stateOp_reg[0]_1 ;
  wire \stateOp_reg[0]_2 ;
  wire [0:0]\stateOp_reg[0]_3 ;
  wire [0:0]\stateOp_reg[0]_4 ;
  wire [0:0]\stateOp_reg[0]_5 ;
  wire [0:0]\stateOp_reg[0]_6 ;
  wire [1:0]\stateOp_reg[0]_7 ;
  wire \stateOp_reg[0]_8 ;
  wire [1:0]\stateOp_reg[0]_9 ;
  wire [0:0]\stateOp_reg[1]_0 ;
  wire \stateOp_reg[1]_1 ;
  wire \stateOp_reg[1]_2 ;
  wire [0:0]\stateOp_reg[1]_3 ;
  wire [0:0]\stateOp_reg[1]_4 ;
  wire \stateOp_reg[1]_5 ;
  wire [0:0]\stateOp_reg[1]_6 ;
  wire \stateOp_reg[1]_i_11_n_0 ;
  wire \stateOp_reg[1]_i_11_n_1 ;
  wire \stateOp_reg[1]_i_11_n_2 ;
  wire \stateOp_reg[1]_i_11_n_3 ;
  wire \stateOp_reg[1]_i_11_n_4 ;
  wire \stateOp_reg[1]_i_11_n_5 ;
  wire \stateOp_reg[1]_i_11_n_6 ;
  wire \stateOp_reg[1]_i_11_n_7 ;
  wire \stateOp_reg[1]_i_7_n_0 ;
  wire \stateOp_reg[1]_i_7_n_1 ;
  wire \stateOp_reg[1]_i_7_n_2 ;
  wire \stateOp_reg[1]_i_7_n_3 ;
  wire \stateOp_reg[1]_i_7_n_4 ;
  wire \stateOp_reg[1]_i_7_n_5 ;
  wire \stateOp_reg[1]_i_7_n_6 ;
  wire \stateOp_reg[1]_i_7_n_7 ;
  wire [0:0]\stateOp_reg[2]_0 ;
  wire [0:0]\stateOp_reg[2]_1 ;
  wire \stateOp_reg[2]_i_21_n_3 ;
  wire \stateOp_reg[2]_i_21_n_5 ;
  wire \stateOp_reg[2]_i_21_n_6 ;
  wire \stateOp_reg[2]_i_21_n_7 ;
  wire \stateOp_reg[2]_i_22_n_0 ;
  wire \stateOp_reg[2]_i_22_n_1 ;
  wire \stateOp_reg[2]_i_22_n_2 ;
  wire \stateOp_reg[2]_i_22_n_3 ;
  wire \stateOp_reg[2]_i_22_n_4 ;
  wire \stateOp_reg[2]_i_22_n_5 ;
  wire \stateOp_reg[2]_i_22_n_6 ;
  wire \stateOp_reg[2]_i_22_n_7 ;
  wire \stateOp_reg[2]_i_23_n_0 ;
  wire \stateOp_reg[2]_i_23_n_1 ;
  wire \stateOp_reg[2]_i_23_n_2 ;
  wire \stateOp_reg[2]_i_23_n_3 ;
  wire \stateOp_reg[2]_i_23_n_4 ;
  wire \stateOp_reg[2]_i_23_n_5 ;
  wire \stateOp_reg[2]_i_23_n_6 ;
  wire \stateOp_reg[2]_i_23_n_7 ;
  wire \stateOp_reg[2]_i_24_n_0 ;
  wire \stateOp_reg[2]_i_24_n_1 ;
  wire \stateOp_reg[2]_i_24_n_2 ;
  wire \stateOp_reg[2]_i_24_n_3 ;
  wire \stateOp_reg[2]_i_24_n_4 ;
  wire \stateOp_reg[2]_i_24_n_5 ;
  wire \stateOp_reg[2]_i_24_n_6 ;
  wire \stateOp_reg[2]_i_24_n_7 ;
  wire \stateOp_reg[2]_i_6__0_n_5 ;
  wire \stateOp_reg[2]_i_6__0_n_6 ;
  wire \stateOp_reg[2]_i_6__0_n_7 ;
  wire \stateOp_reg[2]_i_9__0_n_0 ;
  wire \stateOp_reg[2]_i_9__0_n_1 ;
  wire \stateOp_reg[2]_i_9__0_n_2 ;
  wire \stateOp_reg[2]_i_9__0_n_3 ;
  wire \stateOp_reg[2]_i_9__0_n_4 ;
  wire \stateOp_reg[2]_i_9__0_n_5 ;
  wire \stateOp_reg[2]_i_9__0_n_6 ;
  wire \stateOp_reg[2]_i_9__0_n_7 ;
  wire [5:0]\stateOp_reg[5]_0 ;
  wire stateOp_reg_0;
  wire stateOp_reg_1;
  wire [0:0]stateOp_reg_2;
  wire stateOp_reg_3;
  wire stateOp_reg_4;
  wire stateOp_reg_5;
  wire stateOp_reg_6;
  wire \stateSeqbufB[2]_i_10_n_0 ;
  wire \stateSeqbufB[2]_i_8_n_0 ;
  wire \stateSeqbufB[2]_i_9_n_0 ;
  wire step1__6;
  wire synthNotLive;
  wire synthNotLive_i_2_n_0;
  wire targetNotSteady;
  wire targetNotSteady_i_3_n_0;
  wire targetNotSteady_i_4_n_0;
  wire \tixVBuffer[7]_i_3_n_0 ;
  wire \tixVBuffer[7]_i_4_n_0 ;
  wire \tixVBuffer_reg_n_0_[0] ;
  wire \tixVBuffer_reg_n_0_[1] ;
  wire \tixVBuffer_reg_n_0_[2] ;
  wire \tixVBuffer_reg_n_0_[3] ;
  wire \tixVBuffer_reg_n_0_[5] ;
  wire \tixVBuffer_reg_n_0_[6] ;
  wire \tixVBuffer_reg_n_0_[7] ;
  wire [7:0]tixVBufxfop;
  wire tixVCommand;
  wire \tixVCommand_reg[0]_0 ;
  wire \tixVCommand_reg[0]_1 ;
  wire \tixVCommand_reg_n_0_[0] ;
  wire \tixVCommand_reg_n_0_[1] ;
  wire \tixVCommand_reg_n_0_[2] ;
  wire \tixVCommand_reg_n_0_[3] ;
  wire \tixVCommand_reg_n_0_[4] ;
  wire \tixVCommand_reg_n_0_[5] ;
  wire \tixVCommand_reg_n_0_[6] ;
  wire \tixVCommand_reg_n_0_[7] ;
  wire \tixVController[7]_i_3_n_0 ;
  wire \tixVController[7]_i_4_n_0 ;
  wire \tixVController[7]_i_5_n_0 ;
  wire \tixVController[7]_i_6_n_0 ;
  wire \tixVController_reg[0]_0 ;
  wire \tixVController_reg[1]_0 ;
  wire \tixVController_reg[1]_1 ;
  wire \tixVController_reg[2]_0 ;
  wire \tixVController_reg_n_0_[0] ;
  wire \tixVController_reg_n_0_[1] ;
  wire \tixVController_reg_n_0_[2] ;
  wire \tixVController_reg_n_0_[3] ;
  wire \tixVController_reg_n_0_[4] ;
  wire \tixVController_reg_n_0_[5] ;
  wire \tixVController_reg_n_0_[6] ;
  wire \tixVController_reg_n_0_[7] ;
  wire tixVState1;
  wire \tixVState[1]_i_4_n_0 ;
  wire [0:0]\tixVState_reg[1] ;
  wire \tixVState_reg[1]_0 ;
  wire [1:0]\tixVState_reg[1]_1 ;
  wire [1:0]\tixVState_reg[1]_2 ;
  wire \tixVState_reg[1]_3 ;
  wire tkclk;
  wire [0:0]tkclk_sig_reg;
  wire [0:0]traceGetInfoTixVState;
  wire \txAXIS_tdata[0]_i_3_n_0 ;
  wire \txAXIS_tdata[0]_i_5__0_n_0 ;
  wire \txAXIS_tdata[0]_i_6_n_0 ;
  wire \txAXIS_tdata[0]_i_7_n_0 ;
  wire \txAXIS_tdata[10]_i_3_n_0 ;
  wire \txAXIS_tdata[10]_i_4_n_0 ;
  wire \txAXIS_tdata[10]_i_5_n_0 ;
  wire \txAXIS_tdata[10]_i_7_n_0 ;
  wire \txAXIS_tdata[11]_i_3_n_0 ;
  wire \txAXIS_tdata[11]_i_4_n_0 ;
  wire \txAXIS_tdata[11]_i_5_n_0 ;
  wire \txAXIS_tdata[11]_i_7_n_0 ;
  wire \txAXIS_tdata[12]_i_3_n_0 ;
  wire \txAXIS_tdata[12]_i_4_n_0 ;
  wire \txAXIS_tdata[12]_i_5_n_0 ;
  wire \txAXIS_tdata[12]_i_7_n_0 ;
  wire \txAXIS_tdata[13]_i_3_n_0 ;
  wire \txAXIS_tdata[13]_i_4_n_0 ;
  wire \txAXIS_tdata[13]_i_5_n_0 ;
  wire \txAXIS_tdata[13]_i_7_n_0 ;
  wire \txAXIS_tdata[14]_i_3_n_0 ;
  wire \txAXIS_tdata[14]_i_4_n_0 ;
  wire \txAXIS_tdata[14]_i_5_n_0 ;
  wire \txAXIS_tdata[14]_i_7_n_0 ;
  wire \txAXIS_tdata[15]_i_10_n_0 ;
  wire \txAXIS_tdata[15]_i_11_n_0 ;
  wire \txAXIS_tdata[15]_i_12_n_0 ;
  wire \txAXIS_tdata[15]_i_14_n_0 ;
  wire \txAXIS_tdata[15]_i_15_n_0 ;
  wire \txAXIS_tdata[15]_i_17_n_0 ;
  wire \txAXIS_tdata[15]_i_3_n_0 ;
  wire \txAXIS_tdata[15]_i_4_n_0 ;
  wire \txAXIS_tdata[15]_i_5_n_0 ;
  wire \txAXIS_tdata[15]_i_7_n_0 ;
  wire \txAXIS_tdata[15]_i_8_n_0 ;
  wire \txAXIS_tdata[15]_i_9_n_0 ;
  wire \txAXIS_tdata[16]_i_2_n_0 ;
  wire \txAXIS_tdata[16]_i_4_n_0 ;
  wire \txAXIS_tdata[16]_i_5_n_0 ;
  wire \txAXIS_tdata[16]_i_6_n_0 ;
  wire \txAXIS_tdata[16]_i_7_n_0 ;
  wire \txAXIS_tdata[17]_i_2_n_0 ;
  wire \txAXIS_tdata[17]_i_4_n_0 ;
  wire \txAXIS_tdata[17]_i_5_n_0 ;
  wire \txAXIS_tdata[17]_i_6_n_0 ;
  wire \txAXIS_tdata[17]_i_7_n_0 ;
  wire \txAXIS_tdata[18]_i_2_n_0 ;
  wire \txAXIS_tdata[18]_i_4_n_0 ;
  wire \txAXIS_tdata[18]_i_5_n_0 ;
  wire \txAXIS_tdata[18]_i_6_n_0 ;
  wire \txAXIS_tdata[18]_i_7_n_0 ;
  wire \txAXIS_tdata[19]_i_2_n_0 ;
  wire \txAXIS_tdata[19]_i_4_n_0 ;
  wire \txAXIS_tdata[19]_i_5_n_0 ;
  wire \txAXIS_tdata[19]_i_6_n_0 ;
  wire \txAXIS_tdata[19]_i_7_n_0 ;
  wire \txAXIS_tdata[1]_i_4_n_0 ;
  wire \txAXIS_tdata[1]_i_5_n_0 ;
  wire \txAXIS_tdata[1]_i_7_n_0 ;
  wire \txAXIS_tdata[1]_i_8_n_0 ;
  wire \txAXIS_tdata[20]_i_2_n_0 ;
  wire \txAXIS_tdata[20]_i_4_n_0 ;
  wire \txAXIS_tdata[20]_i_5_n_0 ;
  wire \txAXIS_tdata[20]_i_6_n_0 ;
  wire \txAXIS_tdata[20]_i_7_n_0 ;
  wire \txAXIS_tdata[21]_i_2_n_0 ;
  wire \txAXIS_tdata[21]_i_4_n_0 ;
  wire \txAXIS_tdata[21]_i_5_n_0 ;
  wire \txAXIS_tdata[21]_i_6_n_0 ;
  wire \txAXIS_tdata[21]_i_7_n_0 ;
  wire \txAXIS_tdata[22]_i_2_n_0 ;
  wire \txAXIS_tdata[22]_i_4_n_0 ;
  wire \txAXIS_tdata[22]_i_5_n_0 ;
  wire \txAXIS_tdata[22]_i_6_n_0 ;
  wire \txAXIS_tdata[22]_i_7_n_0 ;
  wire \txAXIS_tdata[22]_i_8_n_0 ;
  wire \txAXIS_tdata[23]_i_10_n_0 ;
  wire \txAXIS_tdata[23]_i_3_n_0 ;
  wire \txAXIS_tdata[23]_i_4_n_0 ;
  wire \txAXIS_tdata[23]_i_5_n_0 ;
  wire \txAXIS_tdata[23]_i_7_n_0 ;
  wire \txAXIS_tdata[23]_i_8_n_0 ;
  wire \txAXIS_tdata[23]_i_9_n_0 ;
  wire \txAXIS_tdata[24]_i_2_n_0 ;
  wire \txAXIS_tdata[24]_i_4_n_0 ;
  wire \txAXIS_tdata[24]_i_5_n_0 ;
  wire \txAXIS_tdata[24]_i_6_n_0 ;
  wire \txAXIS_tdata[24]_i_7_n_0 ;
  wire \txAXIS_tdata[25]_i_2_n_0 ;
  wire \txAXIS_tdata[25]_i_4_n_0 ;
  wire \txAXIS_tdata[25]_i_5_n_0 ;
  wire \txAXIS_tdata[25]_i_6_n_0 ;
  wire \txAXIS_tdata[25]_i_7_n_0 ;
  wire \txAXIS_tdata[26]_i_2_n_0 ;
  wire \txAXIS_tdata[26]_i_4_n_0 ;
  wire \txAXIS_tdata[26]_i_5_n_0 ;
  wire \txAXIS_tdata[26]_i_6_n_0 ;
  wire \txAXIS_tdata[26]_i_7_n_0 ;
  wire \txAXIS_tdata[27]_i_2_n_0 ;
  wire \txAXIS_tdata[27]_i_4_n_0 ;
  wire \txAXIS_tdata[27]_i_5_n_0 ;
  wire \txAXIS_tdata[27]_i_6_n_0 ;
  wire \txAXIS_tdata[27]_i_7_n_0 ;
  wire \txAXIS_tdata[28]_i_2_n_0 ;
  wire \txAXIS_tdata[28]_i_4_n_0 ;
  wire \txAXIS_tdata[28]_i_5_n_0 ;
  wire \txAXIS_tdata[28]_i_6_n_0 ;
  wire \txAXIS_tdata[28]_i_7_n_0 ;
  wire \txAXIS_tdata[29]_i_2_n_0 ;
  wire \txAXIS_tdata[29]_i_3_n_0 ;
  wire \txAXIS_tdata[29]_i_5_n_0 ;
  wire \txAXIS_tdata[29]_i_6_n_0 ;
  wire \txAXIS_tdata[29]_i_7_n_0 ;
  wire \txAXIS_tdata[29]_i_8_n_0 ;
  wire \txAXIS_tdata[29]_i_9_n_0 ;
  wire \txAXIS_tdata[2]_i_10_n_0 ;
  wire \txAXIS_tdata[2]_i_2_n_0 ;
  wire \txAXIS_tdata[2]_i_4_n_0 ;
  wire \txAXIS_tdata[2]_i_5_n_0 ;
  wire \txAXIS_tdata[2]_i_6_n_0 ;
  wire \txAXIS_tdata[2]_i_8_n_0 ;
  wire \txAXIS_tdata[2]_i_9_n_0 ;
  wire \txAXIS_tdata[30]_i_2_n_0 ;
  wire \txAXIS_tdata[30]_i_4_n_0 ;
  wire \txAXIS_tdata[30]_i_5_n_0 ;
  wire \txAXIS_tdata[30]_i_6_n_0 ;
  wire \txAXIS_tdata[30]_i_7_n_0 ;
  wire \txAXIS_tdata[31]_i_10_n_0 ;
  wire \txAXIS_tdata[31]_i_3_n_0 ;
  wire \txAXIS_tdata[31]_i_4_n_0 ;
  wire \txAXIS_tdata[31]_i_6_n_0 ;
  wire \txAXIS_tdata[31]_i_7_n_0 ;
  wire \txAXIS_tdata[31]_i_8_n_0 ;
  wire \txAXIS_tdata[31]_i_9_n_0 ;
  wire \txAXIS_tdata[32]_i_2_n_0 ;
  wire \txAXIS_tdata[32]_i_4_n_0 ;
  wire \txAXIS_tdata[32]_i_5_n_0 ;
  wire \txAXIS_tdata[32]_i_6_n_0 ;
  wire \txAXIS_tdata[32]_i_7_n_0 ;
  wire \txAXIS_tdata[33]_i_2_n_0 ;
  wire \txAXIS_tdata[33]_i_4_n_0 ;
  wire \txAXIS_tdata[33]_i_5_n_0 ;
  wire \txAXIS_tdata[33]_i_6_n_0 ;
  wire \txAXIS_tdata[33]_i_7_n_0 ;
  wire \txAXIS_tdata[34]_i_2_n_0 ;
  wire \txAXIS_tdata[34]_i_4_n_0 ;
  wire \txAXIS_tdata[34]_i_5_n_0 ;
  wire \txAXIS_tdata[34]_i_6_n_0 ;
  wire \txAXIS_tdata[34]_i_7_n_0 ;
  wire \txAXIS_tdata[35]_i_2_n_0 ;
  wire \txAXIS_tdata[35]_i_4_n_0 ;
  wire \txAXIS_tdata[35]_i_5_n_0 ;
  wire \txAXIS_tdata[35]_i_6_n_0 ;
  wire \txAXIS_tdata[35]_i_7_n_0 ;
  wire \txAXIS_tdata[36]_i_2_n_0 ;
  wire \txAXIS_tdata[36]_i_4_n_0 ;
  wire \txAXIS_tdata[36]_i_5_n_0 ;
  wire \txAXIS_tdata[36]_i_6_n_0 ;
  wire \txAXIS_tdata[36]_i_7_n_0 ;
  wire \txAXIS_tdata[37]_i_2_n_0 ;
  wire \txAXIS_tdata[37]_i_4_n_0 ;
  wire \txAXIS_tdata[37]_i_5_n_0 ;
  wire \txAXIS_tdata[37]_i_6_n_0 ;
  wire \txAXIS_tdata[37]_i_7_n_0 ;
  wire \txAXIS_tdata[38]_i_2_n_0 ;
  wire \txAXIS_tdata[38]_i_4_n_0 ;
  wire \txAXIS_tdata[38]_i_5_n_0 ;
  wire \txAXIS_tdata[38]_i_6_n_0 ;
  wire \txAXIS_tdata[38]_i_7_n_0 ;
  wire \txAXIS_tdata[39]_i_10_n_0 ;
  wire \txAXIS_tdata[39]_i_11_n_0 ;
  wire \txAXIS_tdata[39]_i_3_n_0 ;
  wire \txAXIS_tdata[39]_i_4_n_0 ;
  wire \txAXIS_tdata[39]_i_5_n_0 ;
  wire \txAXIS_tdata[39]_i_7_n_0 ;
  wire \txAXIS_tdata[39]_i_8_n_0 ;
  wire \txAXIS_tdata[39]_i_9_n_0 ;
  wire \txAXIS_tdata[3]_i_4_n_0 ;
  wire \txAXIS_tdata[3]_i_5_n_0 ;
  wire \txAXIS_tdata[3]_i_7_n_0 ;
  wire \txAXIS_tdata[3]_i_8_n_0 ;
  wire \txAXIS_tdata[3]_i_9_n_0 ;
  wire \txAXIS_tdata[40]_i_2_n_0 ;
  wire \txAXIS_tdata[40]_i_4_n_0 ;
  wire \txAXIS_tdata[40]_i_5_n_0 ;
  wire \txAXIS_tdata[40]_i_6_n_0 ;
  wire \txAXIS_tdata[41]_i_2_n_0 ;
  wire \txAXIS_tdata[41]_i_4_n_0 ;
  wire \txAXIS_tdata[41]_i_5_n_0 ;
  wire \txAXIS_tdata[41]_i_6_n_0 ;
  wire \txAXIS_tdata[42]_i_2_n_0 ;
  wire \txAXIS_tdata[42]_i_4_n_0 ;
  wire \txAXIS_tdata[42]_i_5_n_0 ;
  wire \txAXIS_tdata[42]_i_6_n_0 ;
  wire \txAXIS_tdata[43]_i_2_n_0 ;
  wire \txAXIS_tdata[43]_i_4_n_0 ;
  wire \txAXIS_tdata[43]_i_5_n_0 ;
  wire \txAXIS_tdata[43]_i_6_n_0 ;
  wire \txAXIS_tdata[44]_i_2_n_0 ;
  wire \txAXIS_tdata[44]_i_4_n_0 ;
  wire \txAXIS_tdata[44]_i_5_n_0 ;
  wire \txAXIS_tdata[44]_i_6_n_0 ;
  wire \txAXIS_tdata[45]_i_2_n_0 ;
  wire \txAXIS_tdata[45]_i_4_n_0 ;
  wire \txAXIS_tdata[45]_i_5_n_0 ;
  wire \txAXIS_tdata[45]_i_6_n_0 ;
  wire \txAXIS_tdata[46]_i_2_n_0 ;
  wire \txAXIS_tdata[46]_i_4_n_0 ;
  wire \txAXIS_tdata[46]_i_5_n_0 ;
  wire \txAXIS_tdata[46]_i_6_n_0 ;
  wire \txAXIS_tdata[47]_i_10_n_0 ;
  wire \txAXIS_tdata[47]_i_3_n_0 ;
  wire \txAXIS_tdata[47]_i_4_n_0 ;
  wire \txAXIS_tdata[47]_i_6_n_0 ;
  wire \txAXIS_tdata[47]_i_7_n_0 ;
  wire \txAXIS_tdata[47]_i_8_n_0 ;
  wire \txAXIS_tdata[48]_i_2_n_0 ;
  wire \txAXIS_tdata[48]_i_3_n_0 ;
  wire \txAXIS_tdata[48]_i_5_n_0 ;
  wire \txAXIS_tdata[48]_i_6_n_0 ;
  wire \txAXIS_tdata[49]_i_2_n_0 ;
  wire \txAXIS_tdata[49]_i_3_n_0 ;
  wire \txAXIS_tdata[49]_i_5_n_0 ;
  wire \txAXIS_tdata[49]_i_6_n_0 ;
  wire \txAXIS_tdata[4]_i_2_n_0 ;
  wire \txAXIS_tdata[4]_i_4_n_0 ;
  wire \txAXIS_tdata[4]_i_5_n_0 ;
  wire \txAXIS_tdata[4]_i_6_n_0 ;
  wire \txAXIS_tdata[4]_i_7_n_0 ;
  wire \txAXIS_tdata[50]_i_2_n_0 ;
  wire \txAXIS_tdata[50]_i_3_n_0 ;
  wire \txAXIS_tdata[50]_i_5_n_0 ;
  wire \txAXIS_tdata[50]_i_6_n_0 ;
  wire \txAXIS_tdata[51]_i_2_n_0 ;
  wire \txAXIS_tdata[51]_i_3_n_0 ;
  wire \txAXIS_tdata[51]_i_5_n_0 ;
  wire \txAXIS_tdata[51]_i_6_n_0 ;
  wire \txAXIS_tdata[52]_i_2_n_0 ;
  wire \txAXIS_tdata[52]_i_3_n_0 ;
  wire \txAXIS_tdata[52]_i_5_n_0 ;
  wire \txAXIS_tdata[52]_i_6_n_0 ;
  wire \txAXIS_tdata[53]_i_2_n_0 ;
  wire \txAXIS_tdata[53]_i_3_n_0 ;
  wire \txAXIS_tdata[53]_i_5_n_0 ;
  wire \txAXIS_tdata[53]_i_6_n_0 ;
  wire \txAXIS_tdata[54]_i_2_n_0 ;
  wire \txAXIS_tdata[54]_i_3_n_0 ;
  wire \txAXIS_tdata[54]_i_5_n_0 ;
  wire \txAXIS_tdata[54]_i_6_n_0 ;
  wire \txAXIS_tdata[55]_i_10_n_0 ;
  wire \txAXIS_tdata[55]_i_11_n_0 ;
  wire \txAXIS_tdata[55]_i_13_n_0 ;
  wire \txAXIS_tdata[55]_i_3_n_0 ;
  wire \txAXIS_tdata[55]_i_4_n_0 ;
  wire \txAXIS_tdata[55]_i_5_n_0 ;
  wire \txAXIS_tdata[55]_i_6_n_0 ;
  wire \txAXIS_tdata[55]_i_7_n_0 ;
  wire \txAXIS_tdata[55]_i_8_n_0 ;
  wire \txAXIS_tdata[56]_i_3_n_0 ;
  wire \txAXIS_tdata[56]_i_4_n_0 ;
  wire \txAXIS_tdata[56]_i_5_n_0 ;
  wire \txAXIS_tdata[56]_i_6_n_0 ;
  wire \txAXIS_tdata[56]_i_7_n_0 ;
  wire \txAXIS_tdata[57]_i_3_n_0 ;
  wire \txAXIS_tdata[57]_i_4_n_0 ;
  wire \txAXIS_tdata[57]_i_5_n_0 ;
  wire \txAXIS_tdata[57]_i_6_n_0 ;
  wire \txAXIS_tdata[57]_i_7_n_0 ;
  wire \txAXIS_tdata[58]_i_2_n_0 ;
  wire \txAXIS_tdata[58]_i_4_n_0 ;
  wire \txAXIS_tdata[58]_i_5_n_0 ;
  wire \txAXIS_tdata[58]_i_6_n_0 ;
  wire \txAXIS_tdata[59]_i_2_n_0 ;
  wire \txAXIS_tdata[59]_i_4_n_0 ;
  wire \txAXIS_tdata[59]_i_5_n_0 ;
  wire \txAXIS_tdata[59]_i_6_n_0 ;
  wire \txAXIS_tdata[5]_i_10_n_0 ;
  wire \txAXIS_tdata[5]_i_11_n_0 ;
  wire \txAXIS_tdata[5]_i_3_n_0 ;
  wire \txAXIS_tdata[5]_i_5_n_0 ;
  wire \txAXIS_tdata[5]_i_6_n_0 ;
  wire \txAXIS_tdata[5]_i_8_n_0 ;
  wire \txAXIS_tdata[5]_i_9_n_0 ;
  wire \txAXIS_tdata[60]_i_3_n_0 ;
  wire \txAXIS_tdata[60]_i_4_n_0 ;
  wire \txAXIS_tdata[60]_i_5_n_0 ;
  wire \txAXIS_tdata[60]_i_6_n_0 ;
  wire \txAXIS_tdata[60]_i_7_n_0 ;
  wire \txAXIS_tdata[61]_i_3_n_0 ;
  wire \txAXIS_tdata[61]_i_4_n_0 ;
  wire \txAXIS_tdata[61]_i_5_n_0 ;
  wire \txAXIS_tdata[61]_i_6_n_0 ;
  wire \txAXIS_tdata[61]_i_7_n_0 ;
  wire \txAXIS_tdata[62]_i_2_n_0 ;
  wire \txAXIS_tdata[62]_i_4_n_0 ;
  wire \txAXIS_tdata[62]_i_5_n_0 ;
  wire \txAXIS_tdata[62]_i_6_n_0 ;
  wire \txAXIS_tdata[63]_i_10_n_0 ;
  wire \txAXIS_tdata[63]_i_11_n_0 ;
  wire \txAXIS_tdata[63]_i_12_n_0 ;
  wire \txAXIS_tdata[63]_i_13_n_0 ;
  wire \txAXIS_tdata[63]_i_14_n_0 ;
  wire \txAXIS_tdata[63]_i_15_n_0 ;
  wire \txAXIS_tdata[63]_i_16_n_0 ;
  wire \txAXIS_tdata[63]_i_3_n_0 ;
  wire \txAXIS_tdata[63]_i_4_n_0 ;
  wire \txAXIS_tdata[63]_i_5_n_0 ;
  wire \txAXIS_tdata[63]_i_7_n_0 ;
  wire [63:0]\txAXIS_tdata[63]_i_8_0 ;
  wire [63:0]\txAXIS_tdata[63]_i_8_1 ;
  wire [63:0]\txAXIS_tdata[63]_i_8_2 ;
  wire [63:0]\txAXIS_tdata[63]_i_8_3 ;
  wire [63:0]\txAXIS_tdata[63]_i_8_4 ;
  wire [63:0]\txAXIS_tdata[63]_i_8_5 ;
  wire \txAXIS_tdata[63]_i_8_n_0 ;
  wire \txAXIS_tdata[63]_i_9_n_0 ;
  wire \txAXIS_tdata[6]_i_10_n_0 ;
  wire \txAXIS_tdata[6]_i_11_n_0 ;
  wire \txAXIS_tdata[6]_i_12_n_0 ;
  wire \txAXIS_tdata[6]_i_2_n_0 ;
  wire \txAXIS_tdata[6]_i_3_n_0 ;
  wire \txAXIS_tdata[6]_i_5_n_0 ;
  wire \txAXIS_tdata[6]_i_6__0_n_0 ;
  wire \txAXIS_tdata[6]_i_7__0_n_0 ;
  wire \txAXIS_tdata[6]_i_8_n_0 ;
  wire \txAXIS_tdata[6]_i_9_n_0 ;
  wire \txAXIS_tdata[7]_i_10__0_n_0 ;
  wire \txAXIS_tdata[7]_i_11_n_0 ;
  wire \txAXIS_tdata[7]_i_13_n_0 ;
  wire \txAXIS_tdata[7]_i_14_n_0 ;
  wire \txAXIS_tdata[7]_i_15_n_0 ;
  wire \txAXIS_tdata[7]_i_16_n_0 ;
  wire \txAXIS_tdata[7]_i_3_n_0 ;
  wire \txAXIS_tdata[7]_i_4_n_0 ;
  wire \txAXIS_tdata[7]_i_7_n_0 ;
  wire \txAXIS_tdata[7]_i_8_n_0 ;
  wire \txAXIS_tdata[7]_i_9__0_n_0 ;
  wire \txAXIS_tdata[8]_i_3_n_0 ;
  wire \txAXIS_tdata[8]_i_4_n_0 ;
  wire \txAXIS_tdata[8]_i_5_n_0 ;
  wire \txAXIS_tdata[8]_i_7_n_0 ;
  wire \txAXIS_tdata[9]_i_3_n_0 ;
  wire \txAXIS_tdata[9]_i_4_n_0 ;
  wire \txAXIS_tdata[9]_i_5_n_0 ;
  wire \txAXIS_tdata[9]_i_7_n_0 ;
  wire \txAXIS_tdata_reg[1]_i_6_n_0 ;
  wire \txAXIS_tdata_reg[3]_i_6_n_0 ;
  wire \txAXIS_tdata_reg[5]_i_4_n_0 ;
  wire \txAXIS_tdata_reg_n_0_[0] ;
  wire \txAXIS_tdata_reg_n_0_[10] ;
  wire \txAXIS_tdata_reg_n_0_[11] ;
  wire \txAXIS_tdata_reg_n_0_[12] ;
  wire \txAXIS_tdata_reg_n_0_[13] ;
  wire \txAXIS_tdata_reg_n_0_[14] ;
  wire \txAXIS_tdata_reg_n_0_[15] ;
  wire \txAXIS_tdata_reg_n_0_[16] ;
  wire \txAXIS_tdata_reg_n_0_[17] ;
  wire \txAXIS_tdata_reg_n_0_[18] ;
  wire \txAXIS_tdata_reg_n_0_[19] ;
  wire \txAXIS_tdata_reg_n_0_[1] ;
  wire \txAXIS_tdata_reg_n_0_[20] ;
  wire \txAXIS_tdata_reg_n_0_[21] ;
  wire \txAXIS_tdata_reg_n_0_[22] ;
  wire \txAXIS_tdata_reg_n_0_[23] ;
  wire \txAXIS_tdata_reg_n_0_[24] ;
  wire \txAXIS_tdata_reg_n_0_[25] ;
  wire \txAXIS_tdata_reg_n_0_[26] ;
  wire \txAXIS_tdata_reg_n_0_[27] ;
  wire \txAXIS_tdata_reg_n_0_[28] ;
  wire \txAXIS_tdata_reg_n_0_[29] ;
  wire \txAXIS_tdata_reg_n_0_[2] ;
  wire \txAXIS_tdata_reg_n_0_[30] ;
  wire \txAXIS_tdata_reg_n_0_[31] ;
  wire \txAXIS_tdata_reg_n_0_[32] ;
  wire \txAXIS_tdata_reg_n_0_[33] ;
  wire \txAXIS_tdata_reg_n_0_[34] ;
  wire \txAXIS_tdata_reg_n_0_[35] ;
  wire \txAXIS_tdata_reg_n_0_[36] ;
  wire \txAXIS_tdata_reg_n_0_[37] ;
  wire \txAXIS_tdata_reg_n_0_[38] ;
  wire \txAXIS_tdata_reg_n_0_[39] ;
  wire \txAXIS_tdata_reg_n_0_[3] ;
  wire \txAXIS_tdata_reg_n_0_[40] ;
  wire \txAXIS_tdata_reg_n_0_[41] ;
  wire \txAXIS_tdata_reg_n_0_[42] ;
  wire \txAXIS_tdata_reg_n_0_[43] ;
  wire \txAXIS_tdata_reg_n_0_[44] ;
  wire \txAXIS_tdata_reg_n_0_[45] ;
  wire \txAXIS_tdata_reg_n_0_[46] ;
  wire \txAXIS_tdata_reg_n_0_[47] ;
  wire \txAXIS_tdata_reg_n_0_[48] ;
  wire \txAXIS_tdata_reg_n_0_[49] ;
  wire \txAXIS_tdata_reg_n_0_[4] ;
  wire \txAXIS_tdata_reg_n_0_[50] ;
  wire \txAXIS_tdata_reg_n_0_[51] ;
  wire \txAXIS_tdata_reg_n_0_[52] ;
  wire \txAXIS_tdata_reg_n_0_[53] ;
  wire \txAXIS_tdata_reg_n_0_[54] ;
  wire \txAXIS_tdata_reg_n_0_[55] ;
  wire \txAXIS_tdata_reg_n_0_[56] ;
  wire \txAXIS_tdata_reg_n_0_[57] ;
  wire \txAXIS_tdata_reg_n_0_[58] ;
  wire \txAXIS_tdata_reg_n_0_[59] ;
  wire \txAXIS_tdata_reg_n_0_[5] ;
  wire \txAXIS_tdata_reg_n_0_[60] ;
  wire \txAXIS_tdata_reg_n_0_[61] ;
  wire \txAXIS_tdata_reg_n_0_[62] ;
  wire \txAXIS_tdata_reg_n_0_[63] ;
  wire \txAXIS_tdata_reg_n_0_[6] ;
  wire \txAXIS_tdata_reg_n_0_[7] ;
  wire \txAXIS_tdata_reg_n_0_[8] ;
  wire \txAXIS_tdata_reg_n_0_[9] ;
  wire [30:0]txlast1;
  wire [28:0]txlen;
  wire \txlen[0]_i_2_n_0 ;
  wire \txlen[28]_i_4_n_0 ;
  wire [9:0]vidtrackGetInfoPtr0Seqbuf;
  wire [1:0]vidtrackGetInfoTixVState;
  wire \wordcntCrcLast[0]_i_2_n_0 ;
  wire \wordcntCrcLast[16]_i_10_n_0 ;
  wire \wordcntCrcLast[16]_i_3_n_0 ;
  wire \wordcntCrcLast[16]_i_4_n_0 ;
  wire \wordcntCrcLast[16]_i_5_n_0 ;
  wire \wordcntCrcLast[16]_i_6_n_0 ;
  wire \wordcntCrcLast[16]_i_7_n_0 ;
  wire \wordcntCrcLast[16]_i_8_n_0 ;
  wire \wordcntCrcLast[16]_i_9_n_0 ;
  wire \wordcntCrcLast[24]_i_10_n_0 ;
  wire \wordcntCrcLast[24]_i_11_n_0 ;
  wire \wordcntCrcLast[24]_i_12_n_0 ;
  wire \wordcntCrcLast[24]_i_13_n_0 ;
  wire \wordcntCrcLast[24]_i_14_n_0 ;
  wire \wordcntCrcLast[24]_i_3_n_0 ;
  wire \wordcntCrcLast[24]_i_4_n_0 ;
  wire \wordcntCrcLast[24]_i_6_n_0 ;
  wire \wordcntCrcLast[24]_i_7_n_0 ;
  wire \wordcntCrcLast[24]_i_8_n_0 ;
  wire \wordcntCrcLast[24]_i_9_n_0 ;
  wire \wordcntCrcLast[8]_i_10_n_0 ;
  wire \wordcntCrcLast[8]_i_3_n_0 ;
  wire \wordcntCrcLast[8]_i_4_n_0 ;
  wire \wordcntCrcLast[8]_i_5_n_0 ;
  wire \wordcntCrcLast[8]_i_6_n_0 ;
  wire \wordcntCrcLast[8]_i_7_n_0 ;
  wire \wordcntCrcLast[8]_i_8_n_0 ;
  wire \wordcntCrcLast[8]_i_9_n_0 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_0 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_1 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_10 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_11 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_12 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_13 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_14 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_15 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_2 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_3 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_4 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_5 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_6 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_7 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_8 ;
  wire \wordcntCrcLast_reg[16]_i_2_n_9 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_1 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_10 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_11 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_12 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_13 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_14 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_15 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_2 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_3 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_4 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_5 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_6 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_7 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_8 ;
  wire \wordcntCrcLast_reg[24]_i_5_n_9 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_0 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_1 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_10 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_11 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_12 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_13 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_14 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_15 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_2 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_3 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_4 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_5 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_6 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_7 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_8 ;
  wire \wordcntCrcLast_reg[8]_i_2_n_9 ;
  wire \wordcntCrcLast_reg_n_0_[0] ;
  wire \wordcntCrcLast_reg_n_0_[10] ;
  wire \wordcntCrcLast_reg_n_0_[11] ;
  wire \wordcntCrcLast_reg_n_0_[12] ;
  wire \wordcntCrcLast_reg_n_0_[13] ;
  wire \wordcntCrcLast_reg_n_0_[14] ;
  wire \wordcntCrcLast_reg_n_0_[15] ;
  wire \wordcntCrcLast_reg_n_0_[16] ;
  wire \wordcntCrcLast_reg_n_0_[17] ;
  wire \wordcntCrcLast_reg_n_0_[18] ;
  wire \wordcntCrcLast_reg_n_0_[19] ;
  wire \wordcntCrcLast_reg_n_0_[1] ;
  wire \wordcntCrcLast_reg_n_0_[20] ;
  wire \wordcntCrcLast_reg_n_0_[21] ;
  wire \wordcntCrcLast_reg_n_0_[22] ;
  wire \wordcntCrcLast_reg_n_0_[23] ;
  wire \wordcntCrcLast_reg_n_0_[24] ;
  wire \wordcntCrcLast_reg_n_0_[2] ;
  wire \wordcntCrcLast_reg_n_0_[3] ;
  wire \wordcntCrcLast_reg_n_0_[4] ;
  wire \wordcntCrcLast_reg_n_0_[5] ;
  wire \wordcntCrcLast_reg_n_0_[6] ;
  wire \wordcntCrcLast_reg_n_0_[7] ;
  wire \wordcntCrcLast_reg_n_0_[8] ;
  wire \wordcntCrcLast_reg_n_0_[9] ;
  wire [28:0]wordcntLast;
  wire \wordcntLast[0]_i_10_n_0 ;
  wire \wordcntLast[0]_i_11_n_0 ;
  wire \wordcntLast[0]_i_12_n_0 ;
  wire \wordcntLast[0]_i_2_n_0 ;
  wire \wordcntLast[0]_i_3_n_0 ;
  wire \wordcntLast[0]_i_4_n_0 ;
  wire \wordcntLast[0]_i_5_n_0 ;
  wire \wordcntLast[0]_i_6_n_0 ;
  wire \wordcntLast[0]_i_7_n_0 ;
  wire \wordcntLast[0]_i_8_n_0 ;
  wire \wordcntLast[0]_i_9_n_0 ;
  wire \wordcntLast[28]_i_10_n_0 ;
  wire \wordcntLast[28]_i_12_n_0 ;
  wire \wordcntLast[28]_i_19_n_0 ;
  wire \wordcntLast[28]_i_3_n_0 ;
  wire \wordcntLast[28]_i_4_n_0 ;
  wire \wordcntLast[28]_i_5_n_0 ;
  wire \wordcntLast[28]_i_6_n_0 ;
  wire \wordcntLast[28]_i_8_n_0 ;
  wire \wordcntLast[28]_i_9_n_0 ;
  wire \wordcntLast[2]_i_2_n_0 ;
  wire \wordcntLast_reg[13]_i_2_n_0 ;
  wire \wordcntLast_reg[13]_i_2_n_1 ;
  wire \wordcntLast_reg[13]_i_2_n_2 ;
  wire \wordcntLast_reg[13]_i_2_n_3 ;
  wire \wordcntLast_reg[13]_i_2_n_4 ;
  wire \wordcntLast_reg[13]_i_2_n_5 ;
  wire \wordcntLast_reg[13]_i_2_n_6 ;
  wire \wordcntLast_reg[13]_i_2_n_7 ;
  wire \wordcntLast_reg[21]_i_2_n_0 ;
  wire \wordcntLast_reg[21]_i_2_n_1 ;
  wire \wordcntLast_reg[21]_i_2_n_2 ;
  wire \wordcntLast_reg[21]_i_2_n_3 ;
  wire \wordcntLast_reg[21]_i_2_n_4 ;
  wire \wordcntLast_reg[21]_i_2_n_5 ;
  wire \wordcntLast_reg[21]_i_2_n_6 ;
  wire \wordcntLast_reg[21]_i_2_n_7 ;
  wire \wordcntLast_reg[28]_i_7_n_2 ;
  wire \wordcntLast_reg[28]_i_7_n_3 ;
  wire \wordcntLast_reg[28]_i_7_n_4 ;
  wire \wordcntLast_reg[28]_i_7_n_5 ;
  wire \wordcntLast_reg[28]_i_7_n_6 ;
  wire \wordcntLast_reg[28]_i_7_n_7 ;
  wire \wordcntLast_reg[5]_i_2_n_0 ;
  wire \wordcntLast_reg[5]_i_2_n_1 ;
  wire \wordcntLast_reg[5]_i_2_n_2 ;
  wire \wordcntLast_reg[5]_i_2_n_3 ;
  wire \wordcntLast_reg[5]_i_2_n_4 ;
  wire \wordcntLast_reg[5]_i_2_n_5 ;
  wire \wordcntLast_reg[5]_i_2_n_6 ;
  wire \wordcntLast_reg[5]_i_2_n_7 ;
  wire \wordcnt[30]_i_11_n_0 ;
  wire \wordcnt[30]_i_6_n_0 ;
  wire \wordcnt[30]_i_7_n_0 ;
  wire \wordcnt[30]_i_9_n_0 ;
  wire \wordcnt_reg[16]_i_2_n_0 ;
  wire \wordcnt_reg[16]_i_2_n_1 ;
  wire \wordcnt_reg[16]_i_2_n_2 ;
  wire \wordcnt_reg[16]_i_2_n_3 ;
  wire \wordcnt_reg[16]_i_2_n_4 ;
  wire \wordcnt_reg[16]_i_2_n_5 ;
  wire \wordcnt_reg[16]_i_2_n_6 ;
  wire \wordcnt_reg[16]_i_2_n_7 ;
  wire \wordcnt_reg[24]_i_2_n_0 ;
  wire \wordcnt_reg[24]_i_2_n_1 ;
  wire \wordcnt_reg[24]_i_2_n_2 ;
  wire \wordcnt_reg[24]_i_2_n_3 ;
  wire \wordcnt_reg[24]_i_2_n_4 ;
  wire \wordcnt_reg[24]_i_2_n_5 ;
  wire \wordcnt_reg[24]_i_2_n_6 ;
  wire \wordcnt_reg[24]_i_2_n_7 ;
  wire \wordcnt_reg[30]_i_10_n_3 ;
  wire \wordcnt_reg[30]_i_10_n_4 ;
  wire \wordcnt_reg[30]_i_10_n_5 ;
  wire \wordcnt_reg[30]_i_10_n_6 ;
  wire \wordcnt_reg[30]_i_10_n_7 ;
  wire \wordcnt_reg[8]_i_2_n_0 ;
  wire \wordcnt_reg[8]_i_2_n_1 ;
  wire \wordcnt_reg[8]_i_2_n_2 ;
  wire \wordcnt_reg[8]_i_2_n_3 ;
  wire \wordcnt_reg[8]_i_2_n_4 ;
  wire \wordcnt_reg[8]_i_2_n_5 ;
  wire \wordcnt_reg[8]_i_2_n_6 ;
  wire \wordcnt_reg[8]_i_2_n_7 ;
  wire \wordcnt_reg_n_0_[25] ;
  wire \wordcnt_reg_n_0_[26] ;
  wire \wordcnt_reg_n_0_[27] ;
  wire \wordcnt_reg_n_0_[28] ;
  wire \wordcnt_reg_n_0_[29] ;
  wire \wordcnt_reg_n_0_[30] ;
  wire [7:3]\NLW_crcAXIS_tkeep_reg[1]_i_2_CO_UNCONNECTED ;
  wire [7:0]\NLW_crcAXIS_tkeep_reg[1]_i_2_O_UNCONNECTED ;
  wire [7:0]\NLW_crcAXIS_tkeep_reg[1]_i_3_O_UNCONNECTED ;
  wire [7:3]\NLW_crcAXIS_tkeep_reg[7]_i_11_CO_UNCONNECTED ;
  wire [7:0]\NLW_crcAXIS_tkeep_reg[7]_i_11_O_UNCONNECTED ;
  wire [7:0]\NLW_crcAXIS_tkeep_reg[7]_i_14_O_UNCONNECTED ;
  wire [0:0]\NLW_invbuf_reg[9][7]_i_12_O_UNCONNECTED ;
  wire [7:1]\NLW_opbuf_reg[0][7]_i_16_CO_UNCONNECTED ;
  wire [7:0]\NLW_opbuf_reg[0][7]_i_16_O_UNCONNECTED ;
  wire [7:1]\NLW_opbuf_reg[0][7]_i_49_CO_UNCONNECTED ;
  wire [7:2]\NLW_opbuf_reg[0][7]_i_49_O_UNCONNECTED ;
  wire [7:3]\NLW_stateOp_next_reg[4]_i_10_CO_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_next_reg[4]_i_10_O_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_next_reg[4]_i_12_O_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_reg[1]_i_11_O_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_reg[1]_i_7_O_UNCONNECTED ;
  wire [7:3]\NLW_stateOp_reg[2]_i_21_CO_UNCONNECTED ;
  wire [7:4]\NLW_stateOp_reg[2]_i_21_O_UNCONNECTED ;
  wire [7:3]\NLW_stateOp_reg[2]_i_6__0_CO_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_reg[2]_i_6__0_O_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_reg[2]_i_9__0_O_UNCONNECTED ;
  wire [7:7]\NLW_wordcntCrcLast_reg[24]_i_5_CO_UNCONNECTED ;
  wire [7:6]\NLW_wordcntLast_reg[28]_i_7_CO_UNCONNECTED ;
  wire [7:7]\NLW_wordcntLast_reg[28]_i_7_O_UNCONNECTED ;
  wire [1:0]\NLW_wordcntLast_reg[5]_i_2_O_UNCONNECTED ;
  wire [7:5]\NLW_wordcnt_reg[30]_i_10_CO_UNCONNECTED ;
  wire [7:6]\NLW_wordcnt_reg[30]_i_10_O_UNCONNECTED ;

  LUT6 #(
    .INIT(64'h0000000000010000)) 
    \FSM_onehot_stateCoobufB[0]_i_2 
       (.I0(\FSM_onehot_stateCoobufB[0]_i_3_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\tixVBuffer_reg_n_0_[3] ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\tixVBuffer_reg_n_0_[1] ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(reqCoobufCornerToHostif));
  LUT6 #(
    .INIT(64'hFFA5FF95FFFFFFFF)) 
    \FSM_onehot_stateCoobufB[0]_i_3 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [5]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\FSM_onehot_stateCoobufB[0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000001000000000)) 
    \FSM_onehot_stateCoobufB[3]_i_3 
       (.I0(\tixVBuffer_reg_n_0_[3] ),
        .I1(\pollbuf[0][7]_i_7_n_0 ),
        .I2(\tixVBuffer_reg_n_0_[1] ),
        .I3(\tixVBuffer_reg_n_0_[0] ),
        .I4(\tixVBuffer_reg_n_0_[2] ),
        .I5(\FSM_onehot_stateCoobufB[3]_i_4_n_0 ),
        .O(coobufCornerToHostifAXIS_tready));
  LUT6 #(
    .INIT(64'h0010000000000000)) 
    \FSM_onehot_stateCoobufB[3]_i_4 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [5]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\FSM_onehot_stateCoobufB[3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000001000000000)) 
    \FSM_onehot_stateCoobufB[5]_i_2 
       (.I0(\tixVBuffer_reg_n_0_[3] ),
        .I1(\pollbuf[0][7]_i_7_n_0 ),
        .I2(\tixVBuffer_reg_n_0_[1] ),
        .I3(\tixVBuffer_reg_n_0_[0] ),
        .I4(\tixVBuffer_reg_n_0_[2] ),
        .I5(\FSM_onehot_stateCoobufB[5]_i_4_n_0 ),
        .O(dneCoobufCornerToHostif));
  LUT6 #(
    .INIT(64'h0000004000000000)) 
    \FSM_onehot_stateCoobufB[5]_i_4 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\stateOp_reg[5]_0 [1]),
        .I4(\stateOp_reg[5]_0 [5]),
        .I5(\stateOp_reg[5]_0 [3]),
        .O(\FSM_onehot_stateCoobufB[5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000001000)) 
    \FSM_onehot_stateFlgbufB[0]_i_2 
       (.I0(\FSM_onehot_stateCoobufB[0]_i_3_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\tixVBuffer_reg_n_0_[0] ),
        .I3(\tixVBuffer_reg_n_0_[1] ),
        .I4(\tixVBuffer_reg_n_0_[3] ),
        .I5(\pollbuf[0][7]_i_7_n_0 ),
        .O(reqFlgbufTraceToHostif));
  LUT6 #(
    .INIT(64'h0000000000004000)) 
    \FSM_onehot_stateFlgbufB[5]_i_2 
       (.I0(\tixVBuffer_reg_n_0_[2] ),
        .I1(\FSM_onehot_stateCoobufB[3]_i_4_n_0 ),
        .I2(\tixVBuffer_reg_n_0_[0] ),
        .I3(\tixVBuffer_reg_n_0_[1] ),
        .I4(\tixVBuffer_reg_n_0_[3] ),
        .I5(\pollbuf[0][7]_i_7_n_0 ),
        .O(flgbufTraceToHostifAXIS_tready));
  LUT6 #(
    .INIT(64'h0000000000004000)) 
    \FSM_onehot_stateFlgbufB[5]_i_4 
       (.I0(\tixVBuffer_reg_n_0_[2] ),
        .I1(\FSM_onehot_stateCoobufB[5]_i_4_n_0 ),
        .I2(\tixVBuffer_reg_n_0_[0] ),
        .I3(\tixVBuffer_reg_n_0_[1] ),
        .I4(\tixVBuffer_reg_n_0_[3] ),
        .I5(\pollbuf[0][7]_i_7_n_0 ),
        .O(dneFlgbufTraceToHostif));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    \FSM_onehot_statePvwbufB[5]_i_2 
       (.I0(\pollbuf[0][7]_i_7_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[3] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[1] ),
        .I4(\FSM_onehot_stateCoobufB[0]_i_3_n_0 ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(reqPvwbufDecimToHostif));
  LUT6 #(
    .INIT(64'h0000000000100000)) 
    \FSM_onehot_statePvwbufB[5]_i_3 
       (.I0(\pollbuf[0][7]_i_7_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[3] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[1] ),
        .I4(\FSM_onehot_stateCoobufB[3]_i_4_n_0 ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(pvwbufDecimToHostifAXIS_tready));
  LUT6 #(
    .INIT(64'h0000000000100000)) 
    \FSM_onehot_statePvwbufB[5]_i_5 
       (.I0(\pollbuf[0][7]_i_7_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[3] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[1] ),
        .I4(\FSM_onehot_stateCoobufB[5]_i_4_n_0 ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(dnePvwbufDecimToHostif));
  LUT6 #(
    .INIT(64'h0000000000000080)) 
    \FSM_sequential_stateOp[2]_i_5 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(stateOp_i_3__1_n_0),
        .I3(stateOp_i_5__0_n_0),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(reqInvLaserSet));
  (* SOFT_HLUTNM = "soft_lutpair2316" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \TCaptMax[31]_i_1__0 
       (.I0(\mask_reg[7]_0 ),
        .I1(reqInvMemtrackSet),
        .I2(reqInvMemtrackClearMask),
        .I3(reqInvMemtrackSelect),
        .O(\stateOp_reg[2]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2320" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \TCaptMax[31]_i_1__1 
       (.I0(\mask_reg[5]_1 ),
        .I1(reqInvHshktrackSet),
        .I2(reqInvHshktrackClearMask),
        .I3(reqInvHshktrackSelect),
        .O(\stateOp_reg[0]_3 ));
  LUT6 #(
    .INIT(64'h0000000000800000)) 
    \TCaptMax[31]_i_2 
       (.I0(stateOp_i_2__0_n_0),
        .I1(targetNotSteady_i_3_n_0),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\staTixVTrigger[7]_i_3__1_n_0 ),
        .O(reqInvVidtrackSet));
  LUT6 #(
    .INIT(64'h0000200000000000)) 
    \TCaptMax[31]_i_2__0 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(\tixVCommand_reg[0]_0 ),
        .O(reqInvMemtrackSet));
  (* SOFT_HLUTNM = "soft_lutpair2361" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \TCaptMax[31]_i_2__1 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVCommand_reg[0]_0 ),
        .I2(\staTixVTrigger[7]_i_5_n_0 ),
        .O(reqInvHshktrackSet));
  LUT6 #(
    .INIT(64'h0000008000000000)) 
    \TCaptMax[31]_i_2__2 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(targetNotSteady_i_3_n_0),
        .O(reqInvCputrackSet));
  (* SOFT_HLUTNM = "soft_lutpair2319" *) 
  LUT4 #(
    .INIT(16'h5504)) 
    ackInvAcquire_sig_i_1__1
       (.I0(stateOp_reg_6),
        .I1(reqInvTraceUnlock),
        .I2(reqInvTraceConfig),
        .I3(reqInvTraceAcquire),
        .O(ackInvAcquire_sig3_out));
  (* SOFT_HLUTNM = "soft_lutpair2359" *) 
  LUT2 #(
    .INIT(4'h2)) 
    ackInvAssign_sig_i_1
       (.I0(reqInvAssign),
        .I1(rng_reg_8),
        .O(ackInvAssign_sig));
  (* SOFT_HLUTNM = "soft_lutpair2353" *) 
  LUT3 #(
    .INIT(8'h10)) 
    ackInvConfigSynth_sig_i_2
       (.I0(stateOp_reg_5),
        .I1(reqInvConfig),
        .I2(reqInvConfigSynth),
        .O(stateOp_reg_2));
  (* SOFT_HLUTNM = "soft_lutpair2326" *) 
  LUT4 #(
    .INIT(16'h0200)) 
    ackInvConfigSynth_sig_i_3
       (.I0(stateOp_i_2__0_n_0),
        .I1(\ixRetbufCrc[5]_i_4_n_0 ),
        .I2(ackInvConfigSynth_sig_i_5_n_0),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .O(reqInvConfigSynth));
  (* SOFT_HLUTNM = "soft_lutpair2327" *) 
  LUT4 #(
    .INIT(16'h0002)) 
    ackInvConfigSynth_sig_i_4
       (.I0(stateOp_i_2__0_n_0),
        .I1(\ixRetbufCrc[5]_i_4_n_0 ),
        .I2(ackInvConfigSynth_sig_i_5_n_0),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .O(reqInvConfig));
  LUT6 #(
    .INIT(64'hFFFFFFFFFEFFFFFF)) 
    ackInvConfigSynth_sig_i_5
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\tixVController_reg_n_0_[3] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(\retbuf[0][0]_i_3_n_0 ),
        .O(ackInvConfigSynth_sig_i_5_n_0));
  LUT3 #(
    .INIT(8'h10)) 
    ackInvConfig_sig_i_1__2
       (.I0(reqInvTraceAcquire),
        .I1(stateOp_reg_6),
        .I2(reqInvTraceConfig),
        .O(ackInvConfig_sig));
  (* SOFT_HLUTNM = "soft_lutpair2326" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    ackInvConfig_sig_i_3
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(\ixRetbufCrc[5]_i_4_n_0 ),
        .I3(ackInvConfig_sig_i_7_n_0),
        .O(reqInvDecimConfig));
  (* SOFT_HLUTNM = "soft_lutpair2366" *) 
  LUT3 #(
    .INIT(8'h20)) 
    ackInvConfig_sig_i_6
       (.I0(stateOp_i_2__0_n_0),
        .I1(ackInvConfig_sig_i_7_n_0),
        .I2(stateOp_i_3__1_n_0),
        .O(reqInvDecimAcquire));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEFFFFF)) 
    ackInvConfig_sig_i_7
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[3] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\tixVController_reg_n_0_[4] ),
        .O(ackInvConfig_sig_i_7_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2315" *) 
  LUT4 #(
    .INIT(16'h4F44)) 
    ackInvGetCorereg_sig_i_2
       (.I0(reqInvGetCorereg),
        .I1(ackInvCamifGetCorereg),
        .I2(reqInvSetCorereg),
        .I3(ackInvCamifSetCorereg),
        .O(stateCorecfg0));
  (* SOFT_HLUTNM = "soft_lutpair2315" *) 
  LUT2 #(
    .INIT(4'h1)) 
    ackInvGetCorereg_sig_i_3
       (.I0(reqInvSetCorereg),
        .I1(reqInvGetCorereg),
        .O(\stateCorecfg[2]_i_4_0 ));
  LUT6 #(
    .INIT(64'h44F444F4FFFF44F4)) 
    ackInvGetReg_sig_i_4
       (.I0(reqInvModReg),
        .I1(ackInvCamifModReg),
        .I2(ackInvCamifGetReg),
        .I3(reqInvGetReg),
        .I4(ackInvCamifSetReg),
        .I5(reqInvSetReg),
        .O(ackInvModReg_sig_reg));
  LUT4 #(
    .INIT(16'h4044)) 
    ackInvMoveto_sig_i_2
       (.I0(reqInvRotaryConfig),
        .I1(reqInvRotaryMoveto),
        .I2(ackInvSet_sig_reg[1]),
        .I3(ackInvSet_sig_reg[0]),
        .O(\stateOp_reg[1]_3 ));
  (* SOFT_HLUTNM = "soft_lutpair2271" *) 
  LUT5 #(
    .INIT(32'hFFFF22F2)) 
    ackInvMoveto_sig_i_3
       (.I0(ackInvRotarySet),
        .I1(reqInvRotarySet),
        .I2(ackInvRotaryMoveto),
        .I3(reqInvRotaryMoveto),
        .I4(ackInvMoveto_sig_i_6_n_0),
        .O(ackInvConfig_sig0__6));
  LUT6 #(
    .INIT(64'hFFFE0000FFFEFFFF)) 
    ackInvMoveto_sig_i_4
       (.I0(reqInvRotaryZero),
        .I1(reqInvRotaryConfig),
        .I2(reqInvRotaryMoveto),
        .I3(reqInvRotarySet),
        .I4(ackInvSet_sig_reg[1]),
        .I5(ackInvSet_sig_reg[0]),
        .O(step1__6));
  (* SOFT_HLUTNM = "soft_lutpair2363" *) 
  LUT3 #(
    .INIT(8'h08)) 
    ackInvMoveto_sig_i_5
       (.I0(stateOp_i_2__0_n_0),
        .I1(stateOp_i_3__1_n_0),
        .I2(targetNotSteady_i_4_n_0),
        .O(reqInvRotaryConfig));
  LUT4 #(
    .INIT(16'h4F44)) 
    ackInvMoveto_sig_i_6
       (.I0(reqInvRotaryZero),
        .I1(ackInvRotaryZero),
        .I2(reqInvRotaryConfig),
        .I3(ackInvRotaryConfig),
        .O(ackInvMoveto_sig_i_6_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2323" *) 
  LUT4 #(
    .INIT(16'hB0BB)) 
    ackInvSelect_sig_i_2__0
       (.I0(reqInvSelect),
        .I1(ackInvCputrackSelect),
        .I2(reqInvCputrackSet),
        .I3(ackInvCputrackSet),
        .O(ackInvSelect_sig_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair2330" *) 
  LUT3 #(
    .INIT(8'h80)) 
    ackInvSetMask_sig_i_2__0
       (.I0(stateOp_i_2__0_n_0),
        .I1(\i2cRegaddr[15]_i_11_n_0 ),
        .I2(\staTixVTrigger[7]_i_5_n_0 ),
        .O(reqInvHshktrackSetMask));
  (* SOFT_HLUTNM = "soft_lutpair2322" *) 
  LUT2 #(
    .INIT(4'h1)) 
    ackInvSetMask_sig_i_3
       (.I0(reqInvHshktrackSet),
        .I1(reqInvHshktrackSelect),
        .O(\staTixVTrigger[7]_i_3__0_0 ));
  LUT5 #(
    .INIT(32'h0000FFFD)) 
    ackInvSet_sig_i_1
       (.I0(\stateOp_reg[0]_9 [0]),
        .I1(\stateOp_reg[0]_9 [1]),
        .I2(ackInvSet_sig_i_3_n_0),
        .I3(ackInvSet_sig_i_4_n_0),
        .I4(\stateOp_reg[1]_5 ),
        .O(\stateOp_reg[0]_6 ));
  LUT5 #(
    .INIT(32'h000D0000)) 
    ackInvSet_sig_i_1__1
       (.I0(\stateOp_reg[0]_7 [0]),
        .I1(\stateOp_reg[0]_7 [1]),
        .I2(reqInvDecimAcquire),
        .I3(reqInvDecimConfig),
        .I4(reqInvDecimSet),
        .O(ackInvSet_sig));
  (* SOFT_HLUTNM = "soft_lutpair2349" *) 
  LUT3 #(
    .INIT(8'h04)) 
    ackInvSet_sig_i_1__3
       (.I0(rng_reg_8),
        .I1(reqInvHdrengSet),
        .I2(reqInvAssign),
        .O(stateOp_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair2272" *) 
  LUT5 #(
    .INIT(32'h10001010)) 
    ackInvSet_sig_i_1__5
       (.I0(reqInvRotaryConfig),
        .I1(reqInvRotaryMoveto),
        .I2(reqInvRotarySet),
        .I3(ackInvSet_sig_reg[1]),
        .I4(ackInvSet_sig_reg[0]),
        .O(ackInvSet_sig_0));
  LUT5 #(
    .INIT(32'h03000100)) 
    ackInvSet_sig_i_2
       (.I0(\stateOp_reg[0]_9 [0]),
        .I1(reqInvCornerConfig),
        .I2(reqInvAcquire),
        .I3(reqInvSet),
        .I4(\stateOp_reg[0]_9 [1]),
        .O(ackInvSet_sig_1));
  (* SOFT_HLUTNM = "soft_lutpair2361" *) 
  LUT3 #(
    .INIT(8'h20)) 
    ackInvSet_sig_i_2__1
       (.I0(stateOp_i_2__0_n_0),
        .I1(targetNotSteady_i_4_n_0),
        .I2(\tixVCommand_reg[0]_0 ),
        .O(reqInvRotarySet));
  (* SOFT_HLUTNM = "soft_lutpair2365" *) 
  LUT3 #(
    .INIT(8'h08)) 
    ackInvSet_sig_i_2__2
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVCommand_reg[0]_0 ),
        .I2(ackInvConfig_sig_i_7_n_0),
        .O(reqInvDecimSet));
  LUT4 #(
    .INIT(16'h4F44)) 
    ackInvSet_sig_i_3
       (.I0(reqInvSet),
        .I1(ackInvCornerSet),
        .I2(reqInvCornerConfig),
        .I3(ackInvCornerConfig),
        .O(ackInvSet_sig_i_3_n_0));
  LUT4 #(
    .INIT(16'h4F44)) 
    ackInvSet_sig_i_4
       (.I0(reqInvUnlock),
        .I1(ackInvCornerUnlock),
        .I2(reqInvAcquire),
        .I3(ackInvCornerAcquire),
        .O(ackInvSet_sig_i_4_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2273" *) 
  LUT5 #(
    .INIT(32'h00000002)) 
    ackInvSet_sig_i_5
       (.I0(\stateOp_reg[0]_9 [1]),
        .I1(reqInvSet),
        .I2(reqInvUnlock),
        .I3(reqInvAcquire),
        .I4(reqInvCornerConfig),
        .O(\stateOp_reg[1]_5 ));
  (* SOFT_HLUTNM = "soft_lutpair2403" *) 
  LUT2 #(
    .INIT(4'h8)) 
    ackInvSet_sig_i_6
       (.I0(stateOp_i_2__0_n_0),
        .I1(\wordcntLast[0]_i_5_n_0 ),
        .O(reqInvCornerConfig));
  (* SOFT_HLUTNM = "soft_lutpair2366" *) 
  LUT3 #(
    .INIT(8'h80)) 
    ackInvSet_sig_i_7
       (.I0(stateOp_i_2__0_n_0),
        .I1(stateOp_i_3__1_n_0),
        .I2(ackInvSet_sig_i_9_n_0),
        .O(reqInvAcquire));
  (* SOFT_HLUTNM = "soft_lutpair2333" *) 
  LUT3 #(
    .INIT(8'h80)) 
    ackInvSet_sig_i_8
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVCommand_reg[0]_0 ),
        .I2(ackInvSet_sig_i_9_n_0),
        .O(reqInvSet));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    ackInvSet_sig_i_9
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[4] ),
        .I5(\retbuf[0][0]_i_3_n_0 ),
        .O(ackInvSet_sig_i_9_n_0));
  LUT6 #(
    .INIT(64'h0000000003010000)) 
    ackInvUnlock_sig_i_1
       (.I0(\stateOp_reg[0]_9 [0]),
        .I1(reqInvCornerConfig),
        .I2(reqInvAcquire),
        .I3(\stateOp_reg[0]_9 [1]),
        .I4(reqInvUnlock),
        .I5(reqInvSet),
        .O(ackInvUnlock_sig0_in));
  LUT6 #(
    .INIT(64'h00000000000000D0)) 
    ackInvUnlock_sig_i_1__0
       (.I0(\stateOp_reg[0]_7 [0]),
        .I1(\stateOp_reg[0]_7 [1]),
        .I2(reqInvDecimUnlock),
        .I3(reqInvDecimAcquire),
        .I4(reqInvDecimConfig),
        .I5(reqInvDecimSet),
        .O(\stateOp_reg[0]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2364" *) 
  LUT3 #(
    .INIT(8'h20)) 
    ackInvUnlock_sig_i_2
       (.I0(stateOp_i_2__0_n_0),
        .I1(ackInvConfig_sig_i_7_n_0),
        .I2(\i2cRegaddr[15]_i_11_n_0 ),
        .O(reqInvDecimUnlock));
  (* SOFT_HLUTNM = "soft_lutpair2367" *) 
  LUT2 #(
    .INIT(4'h2)) 
    ackInvUnlock_sig_i_2__0
       (.I0(stateOp_i_2__0_n_0),
        .I1(ackInvUnlock_sig_i_3_n_0),
        .O(reqInvUnlock));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFD)) 
    ackInvUnlock_sig_i_3
       (.I0(\i2cRegaddr[15]_i_11_n_0 ),
        .I1(\retbuf[0][0]_i_3_n_0 ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(ackInvUnlock_sig_i_4_n_0),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\tixVController_reg_n_0_[0] ),
        .O(ackInvUnlock_sig_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2411" *) 
  LUT2 #(
    .INIT(4'hB)) 
    ackInvUnlock_sig_i_4
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .O(ackInvUnlock_sig_i_4_n_0));
  LUT6 #(
    .INIT(64'h0002000000020002)) 
    ackInvZero_sig_i_1
       (.I0(reqInvRotaryZero),
        .I1(reqInvRotaryConfig),
        .I2(reqInvRotaryMoveto),
        .I3(reqInvRotarySet),
        .I4(ackInvSet_sig_reg[1]),
        .I5(ackInvSet_sig_reg[0]),
        .O(\stateOp_reg[1]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair2364" *) 
  LUT3 #(
    .INIT(8'h20)) 
    ackInvZero_sig_i_2
       (.I0(stateOp_i_2__0_n_0),
        .I1(targetNotSteady_i_4_n_0),
        .I2(\i2cRegaddr[15]_i_11_n_0 ),
        .O(reqInvRotaryZero));
  LUT2 #(
    .INIT(4'h2)) 
    \capt[3]_i_1 
       (.I0(reqInvRotarySet),
        .I1(\mask_reg[3]_1 ),
        .O(\mask_reg[3]_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    ccwNotCw1_carry_i_2
       (.I0(O[4]),
        .I1(O[5]),
        .O(\invbuf_reg[0][5]_2 [2]));
  LUT2 #(
    .INIT(4'h8)) 
    ccwNotCw1_carry_i_3
       (.I0(O[2]),
        .I1(O[3]),
        .O(\invbuf_reg[0][5]_2 [1]));
  LUT2 #(
    .INIT(4'h8)) 
    ccwNotCw1_carry_i_4
       (.I0(O[0]),
        .I1(O[1]),
        .O(\invbuf_reg[0][5]_2 [0]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry__0_i_1
       (.I0(\invbuf_reg[0][7]_0 [5]),
        .I1(ccwNotCw2_carry__0[13]),
        .O(S[5]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry__0_i_2
       (.I0(\invbuf_reg[0][7]_0 [4]),
        .I1(ccwNotCw2_carry__0[12]),
        .O(S[4]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry__0_i_3
       (.I0(\invbuf_reg[0][7]_0 [3]),
        .I1(ccwNotCw2_carry__0[11]),
        .O(S[3]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry__0_i_4
       (.I0(\invbuf_reg[0][7]_0 [2]),
        .I1(ccwNotCw2_carry__0[10]),
        .O(S[2]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry__0_i_5
       (.I0(\invbuf_reg[0][7]_0 [1]),
        .I1(ccwNotCw2_carry__0[9]),
        .O(S[1]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry__0_i_6
       (.I0(\invbuf_reg[0][7]_0 [0]),
        .I1(ccwNotCw2_carry__0[8]),
        .O(S[0]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry_i_1
       (.I0(D[23]),
        .I1(ccwNotCw2_carry__0[7]),
        .O(\invbuf_reg[1][7]_0 [7]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry_i_2
       (.I0(D[22]),
        .I1(ccwNotCw2_carry__0[6]),
        .O(\invbuf_reg[1][7]_0 [6]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry_i_3
       (.I0(D[21]),
        .I1(ccwNotCw2_carry__0[5]),
        .O(\invbuf_reg[1][7]_0 [5]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry_i_4
       (.I0(D[20]),
        .I1(ccwNotCw2_carry__0[4]),
        .O(\invbuf_reg[1][7]_0 [4]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry_i_5
       (.I0(D[19]),
        .I1(ccwNotCw2_carry__0[3]),
        .O(\invbuf_reg[1][7]_0 [3]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry_i_6
       (.I0(D[18]),
        .I1(ccwNotCw2_carry__0[2]),
        .O(\invbuf_reg[1][7]_0 [2]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry_i_7
       (.I0(D[17]),
        .I1(ccwNotCw2_carry__0[1]),
        .O(\invbuf_reg[1][7]_0 [1]));
  LUT2 #(
    .INIT(4'h9)) 
    ccwNotCw2_carry_i_8
       (.I0(D[16]),
        .I1(ccwNotCw2_carry__0[0]),
        .O(\invbuf_reg[1][7]_0 [0]));
  LUT5 #(
    .INIT(32'hEAEAEAFA)) 
    ccwNotCw_i_1
       (.I0(ccwNotCw_i_2_n_0),
        .I1(ccwNotCw_reg),
        .I2(reqInvRotaryMoveto),
        .I3(ccwNotCw_reg_0),
        .I4(ccwNotCw_reg_1),
        .O(ccwNotCw0));
  LUT4 #(
    .INIT(16'h0020)) 
    ccwNotCw_i_2
       (.I0(ccwNotCw_i_3_n_0),
        .I1(reqInvRotaryMoveto),
        .I2(D[16]),
        .I3(D[17]),
        .O(ccwNotCw_i_2_n_0));
  LUT6 #(
    .INIT(64'h0000002000000000)) 
    ccwNotCw_i_3
       (.I0(D[18]),
        .I1(D[19]),
        .I2(D[20]),
        .I3(D[21]),
        .I4(D[23]),
        .I5(D[22]),
        .O(ccwNotCw_i_3_n_0));
  FDPE commok_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(myRxtx_n_554),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(commok));
  LUT6 #(
    .INIT(64'h0000000000000002)) 
    \corecfgAXIL_araddr[12]_i_2 
       (.I0(reqInvGetCorereg),
        .I1(hdrNotFix_i_2_n_0),
        .I2(\invbuf_reg[0][7]_0 [7]),
        .I3(\invbuf_reg[0][7]_0 [3]),
        .I4(\invbuf_reg[0][7]_0 [1]),
        .I5(\invbuf_reg[0][7]_0 [5]),
        .O(\invbuf_reg[0][7]_2 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2385" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_araddr[2]_i_1 
       (.I0(reqInvGetCorereg),
        .I1(D[18]),
        .O(\invbuf_reg[0][7]_2 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2385" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_araddr[3]_i_1 
       (.I0(reqInvGetCorereg),
        .I1(D[19]),
        .O(\invbuf_reg[0][7]_2 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2386" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_araddr[4]_i_1 
       (.I0(reqInvGetCorereg),
        .I1(D[20]),
        .O(\invbuf_reg[0][7]_2 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2386" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_araddr[5]_i_1 
       (.I0(reqInvGetCorereg),
        .I1(D[21]),
        .O(\invbuf_reg[0][7]_2 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2387" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_araddr[6]_i_1 
       (.I0(reqInvGetCorereg),
        .I1(D[22]),
        .O(\invbuf_reg[0][7]_2 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2387" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_araddr[7]_i_1 
       (.I0(reqInvGetCorereg),
        .I1(D[23]),
        .O(\invbuf_reg[0][7]_2 [5]));
  LUT6 #(
    .INIT(64'h0000000000000002)) 
    \corecfgAXIL_awaddr[12]_i_2 
       (.I0(reqInvSetCorereg),
        .I1(hdrNotFix_i_2_n_0),
        .I2(\invbuf_reg[0][7]_0 [7]),
        .I3(\invbuf_reg[0][7]_0 [3]),
        .I4(\invbuf_reg[0][7]_0 [1]),
        .I5(\invbuf_reg[0][7]_0 [5]),
        .O(\invbuf_reg[0][7]_3 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2348" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_awaddr[2]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[18]),
        .O(\invbuf_reg[0][7]_3 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2382" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_awaddr[3]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[19]),
        .O(\invbuf_reg[0][7]_3 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2382" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_awaddr[4]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[20]),
        .O(\invbuf_reg[0][7]_3 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2383" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_awaddr[5]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[21]),
        .O(\invbuf_reg[0][7]_3 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2383" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_awaddr[6]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[22]),
        .O(\invbuf_reg[0][7]_3 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2384" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_awaddr[7]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[23]),
        .O(\invbuf_reg[0][7]_3 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2384" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[0]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[5][7]_0 [0]),
        .O(\invbuf_reg[2][7]_0 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2392" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[10]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[4][7]_0 [2]),
        .O(\invbuf_reg[2][7]_0 [10]));
  (* SOFT_HLUTNM = "soft_lutpair2393" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[11]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[4][7]_0 [3]),
        .O(\invbuf_reg[2][7]_0 [11]));
  (* SOFT_HLUTNM = "soft_lutpair2393" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[12]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[4][7]_0 [4]),
        .O(\invbuf_reg[2][7]_0 [12]));
  (* SOFT_HLUTNM = "soft_lutpair2394" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[13]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[4][7]_0 [5]),
        .O(\invbuf_reg[2][7]_0 [13]));
  (* SOFT_HLUTNM = "soft_lutpair2394" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[14]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[4][7]_0 [6]),
        .O(\invbuf_reg[2][7]_0 [14]));
  (* SOFT_HLUTNM = "soft_lutpair2395" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[15]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[4][7]_0 [7]),
        .O(\invbuf_reg[2][7]_0 [15]));
  (* SOFT_HLUTNM = "soft_lutpair2395" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[16]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[0]),
        .O(\invbuf_reg[2][7]_0 [16]));
  (* SOFT_HLUTNM = "soft_lutpair2396" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[17]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[1]),
        .O(\invbuf_reg[2][7]_0 [17]));
  (* SOFT_HLUTNM = "soft_lutpair2396" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[18]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[2]),
        .O(\invbuf_reg[2][7]_0 [18]));
  (* SOFT_HLUTNM = "soft_lutpair2397" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[19]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[3]),
        .O(\invbuf_reg[2][7]_0 [19]));
  (* SOFT_HLUTNM = "soft_lutpair2388" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[1]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[5][7]_0 [1]),
        .O(\invbuf_reg[2][7]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2397" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[20]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[4]),
        .O(\invbuf_reg[2][7]_0 [20]));
  (* SOFT_HLUTNM = "soft_lutpair2398" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[21]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[5]),
        .O(\invbuf_reg[2][7]_0 [21]));
  (* SOFT_HLUTNM = "soft_lutpair2398" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[22]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[6]),
        .O(\invbuf_reg[2][7]_0 [22]));
  (* SOFT_HLUTNM = "soft_lutpair2399" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[23]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[7]),
        .O(\invbuf_reg[2][7]_0 [23]));
  (* SOFT_HLUTNM = "soft_lutpair2399" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[24]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[8]),
        .O(\invbuf_reg[2][7]_0 [24]));
  (* SOFT_HLUTNM = "soft_lutpair2400" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[25]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[9]),
        .O(\invbuf_reg[2][7]_0 [25]));
  (* SOFT_HLUTNM = "soft_lutpair2400" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[26]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[10]),
        .O(\invbuf_reg[2][7]_0 [26]));
  (* SOFT_HLUTNM = "soft_lutpair2401" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[27]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[11]),
        .O(\invbuf_reg[2][7]_0 [27]));
  (* SOFT_HLUTNM = "soft_lutpair2401" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[28]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[12]),
        .O(\invbuf_reg[2][7]_0 [28]));
  (* SOFT_HLUTNM = "soft_lutpair2402" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[29]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[13]),
        .O(\invbuf_reg[2][7]_0 [29]));
  (* SOFT_HLUTNM = "soft_lutpair2388" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[2]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[5][7]_0 [2]),
        .O(\invbuf_reg[2][7]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2402" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[30]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[14]),
        .O(\invbuf_reg[2][7]_0 [30]));
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[31]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(D[15]),
        .O(\invbuf_reg[2][7]_0 [31]));
  (* SOFT_HLUTNM = "soft_lutpair2389" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[3]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[5][7]_0 [3]),
        .O(\invbuf_reg[2][7]_0 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2389" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[4]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[5][7]_0 [4]),
        .O(\invbuf_reg[2][7]_0 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2390" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[5]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[5][7]_0 [5]),
        .O(\invbuf_reg[2][7]_0 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2390" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[6]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[5][7]_0 [6]),
        .O(\invbuf_reg[2][7]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2391" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[7]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[5][7]_0 [7]),
        .O(\invbuf_reg[2][7]_0 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2391" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[8]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[4][7]_0 [0]),
        .O(\invbuf_reg[2][7]_0 [8]));
  (* SOFT_HLUTNM = "soft_lutpair2392" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \corecfgAXIL_wdata[9]_i_1 
       (.I0(reqInvSetCorereg),
        .I1(\invbuf_reg[4][7]_0 [1]),
        .O(\invbuf_reg[2][7]_0 [9]));
  LUT6 #(
    .INIT(64'hFFFFFFEFDFFEFEBF)) 
    \crcAXIS_tkeep[0]_i_2__0 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [5]),
        .I2(\stateOp_reg[5]_0 [1]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [4]),
        .I5(\stateOp_reg[5]_0 [0]),
        .O(\crcAXIS_tkeep[0]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[1]_i_10 
       (.I0(wordcntLast[12]),
        .I1(\opbuf_reg[0]51_in [18]),
        .I2(\opbuf_reg[0]51_in [20]),
        .I3(wordcntLast[14]),
        .I4(\opbuf_reg[0]51_in [19]),
        .I5(wordcntLast[13]),
        .O(\crcAXIS_tkeep[1]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[1]_i_11 
       (.I0(wordcntLast[10]),
        .I1(\opbuf_reg[0]51_in [16]),
        .I2(\opbuf_reg[0]51_in [17]),
        .I3(wordcntLast[11]),
        .I4(\opbuf_reg[0]51_in [15]),
        .I5(wordcntLast[9]),
        .O(\crcAXIS_tkeep[1]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[1]_i_12 
       (.I0(wordcntLast[7]),
        .I1(\opbuf_reg[0]51_in [13]),
        .I2(\opbuf_reg[0]51_in [14]),
        .I3(wordcntLast[8]),
        .I4(\opbuf_reg[0]51_in [12]),
        .I5(wordcntLast[6]),
        .O(\crcAXIS_tkeep[1]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[1]_i_13 
       (.I0(wordcntLast[3]),
        .I1(\opbuf_reg[0]51_in [9]),
        .I2(\opbuf_reg[0]51_in [11]),
        .I3(wordcntLast[5]),
        .I4(\opbuf_reg[0]51_in [10]),
        .I5(wordcntLast[4]),
        .O(\crcAXIS_tkeep[1]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[1]_i_14 
       (.I0(\opbuf_reg[0]51_in [7]),
        .I1(wordcntLast[1]),
        .I2(\opbuf_reg[0]51_in [8]),
        .I3(wordcntLast[2]),
        .I4(wordcntLast[0]),
        .I5(\opbuf_reg[0]51_in [6]),
        .O(\crcAXIS_tkeep[1]_i_14_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \crcAXIS_tkeep[1]_i_4 
       (.I0(\wordcnt_reg_n_0_[30] ),
        .O(\crcAXIS_tkeep[1]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h00009009)) 
    \crcAXIS_tkeep[1]_i_5 
       (.I0(wordcntLast[27]),
        .I1(\wordcnt_reg_n_0_[27] ),
        .I2(\wordcnt_reg_n_0_[28] ),
        .I3(wordcntLast[28]),
        .I4(\wordcnt_reg_n_0_[29] ),
        .O(\crcAXIS_tkeep[1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[1]_i_6 
       (.I0(wordcntLast[25]),
        .I1(\wordcnt_reg_n_0_[25] ),
        .I2(\wordcnt_reg_n_0_[26] ),
        .I3(wordcntLast[26]),
        .I4(\opbuf_reg[0]51_in [30]),
        .I5(wordcntLast[24]),
        .O(\crcAXIS_tkeep[1]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[1]_i_7 
       (.I0(wordcntLast[21]),
        .I1(\opbuf_reg[0]51_in [27]),
        .I2(\opbuf_reg[0]51_in [29]),
        .I3(wordcntLast[23]),
        .I4(\opbuf_reg[0]51_in [28]),
        .I5(wordcntLast[22]),
        .O(\crcAXIS_tkeep[1]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[1]_i_8 
       (.I0(wordcntLast[18]),
        .I1(\opbuf_reg[0]51_in [24]),
        .I2(\opbuf_reg[0]51_in [26]),
        .I3(wordcntLast[20]),
        .I4(\opbuf_reg[0]51_in [25]),
        .I5(wordcntLast[19]),
        .O(\crcAXIS_tkeep[1]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[1]_i_9 
       (.I0(wordcntLast[15]),
        .I1(\opbuf_reg[0]51_in [21]),
        .I2(\opbuf_reg[0]51_in [23]),
        .I3(wordcntLast[17]),
        .I4(\opbuf_reg[0]51_in [22]),
        .I5(wordcntLast[16]),
        .O(\crcAXIS_tkeep[1]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h0600020008000024)) 
    \crcAXIS_tkeep[3]_i_2 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(\stateOp_reg[5]_0 [5]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [2]),
        .I5(\stateOp_reg[5]_0 [0]),
        .O(\crcAXIS_tkeep[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0200080000010828)) 
    \crcAXIS_tkeep[3]_i_3 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [5]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [4]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\crcAXIS_tkeep[3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000640400008000)) 
    \crcAXIS_tkeep[7]_i_10 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [5]),
        .I5(\stateOp_reg[5]_0 [0]),
        .O(\crcAXIS_tkeep[7]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \crcAXIS_tkeep[7]_i_12 
       (.I0(\tixVCommand_reg_n_0_[6] ),
        .I1(\tixVCommand_reg_n_0_[7] ),
        .I2(\tixVCommand_reg_n_0_[4] ),
        .I3(\tixVCommand_reg_n_0_[5] ),
        .I4(\tixVCommand_reg_n_0_[3] ),
        .I5(\tixVCommand_reg_n_0_[2] ),
        .O(\crcAXIS_tkeep[7]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \crcAXIS_tkeep[7]_i_13 
       (.I0(\tixVCommand_reg_n_0_[1] ),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .O(\crcAXIS_tkeep[7]_i_13_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \crcAXIS_tkeep[7]_i_15 
       (.I0(\wordcnt_reg_n_0_[30] ),
        .O(\crcAXIS_tkeep[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \crcAXIS_tkeep[7]_i_16 
       (.I0(\wordcnt_reg_n_0_[28] ),
        .I1(\wordcnt_reg_n_0_[27] ),
        .I2(\wordcnt_reg_n_0_[29] ),
        .O(\crcAXIS_tkeep[7]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'h1001)) 
    \crcAXIS_tkeep[7]_i_17 
       (.I0(\wordcnt_reg_n_0_[26] ),
        .I1(\wordcnt_reg_n_0_[25] ),
        .I2(\wordcntCrcLast_reg_n_0_[24] ),
        .I3(\opbuf_reg[0]51_in [30]),
        .O(\crcAXIS_tkeep[7]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[7]_i_18 
       (.I0(\wordcntCrcLast_reg_n_0_[23] ),
        .I1(\opbuf_reg[0]51_in [29]),
        .I2(\opbuf_reg[0]51_in [27]),
        .I3(\wordcntCrcLast_reg_n_0_[21] ),
        .I4(\opbuf_reg[0]51_in [28]),
        .I5(\wordcntCrcLast_reg_n_0_[22] ),
        .O(\crcAXIS_tkeep[7]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[7]_i_19 
       (.I0(\wordcntCrcLast_reg_n_0_[20] ),
        .I1(\opbuf_reg[0]51_in [26]),
        .I2(\opbuf_reg[0]51_in [24]),
        .I3(\wordcntCrcLast_reg_n_0_[18] ),
        .I4(\opbuf_reg[0]51_in [25]),
        .I5(\wordcntCrcLast_reg_n_0_[19] ),
        .O(\crcAXIS_tkeep[7]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[7]_i_20 
       (.I0(\wordcntCrcLast_reg_n_0_[16] ),
        .I1(\opbuf_reg[0]51_in [22]),
        .I2(\opbuf_reg[0]51_in [23]),
        .I3(\wordcntCrcLast_reg_n_0_[17] ),
        .I4(\opbuf_reg[0]51_in [21]),
        .I5(\wordcntCrcLast_reg_n_0_[15] ),
        .O(\crcAXIS_tkeep[7]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[7]_i_21 
       (.I0(\wordcntCrcLast_reg_n_0_[13] ),
        .I1(\opbuf_reg[0]51_in [19]),
        .I2(\opbuf_reg[0]51_in [20]),
        .I3(\wordcntCrcLast_reg_n_0_[14] ),
        .I4(\opbuf_reg[0]51_in [18]),
        .I5(\wordcntCrcLast_reg_n_0_[12] ),
        .O(\crcAXIS_tkeep[7]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[7]_i_22 
       (.I0(\wordcntCrcLast_reg_n_0_[10] ),
        .I1(\opbuf_reg[0]51_in [16]),
        .I2(\opbuf_reg[0]51_in [17]),
        .I3(\wordcntCrcLast_reg_n_0_[11] ),
        .I4(\opbuf_reg[0]51_in [15]),
        .I5(\wordcntCrcLast_reg_n_0_[9] ),
        .O(\crcAXIS_tkeep[7]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[7]_i_23 
       (.I0(\wordcntCrcLast_reg_n_0_[7] ),
        .I1(\opbuf_reg[0]51_in [13]),
        .I2(\opbuf_reg[0]51_in [14]),
        .I3(\wordcntCrcLast_reg_n_0_[8] ),
        .I4(\opbuf_reg[0]51_in [12]),
        .I5(\wordcntCrcLast_reg_n_0_[6] ),
        .O(\crcAXIS_tkeep[7]_i_23_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[7]_i_24 
       (.I0(\wordcntCrcLast_reg_n_0_[5] ),
        .I1(\opbuf_reg[0]51_in [11]),
        .I2(\opbuf_reg[0]51_in [9]),
        .I3(\wordcntCrcLast_reg_n_0_[3] ),
        .I4(\opbuf_reg[0]51_in [10]),
        .I5(\wordcntCrcLast_reg_n_0_[4] ),
        .O(\crcAXIS_tkeep[7]_i_24_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[7]_i_25 
       (.I0(\opbuf_reg[0]51_in [7]),
        .I1(\wordcntCrcLast_reg_n_0_[1] ),
        .I2(\opbuf_reg[0]51_in [8]),
        .I3(\wordcntCrcLast_reg_n_0_[2] ),
        .I4(\wordcntCrcLast_reg_n_0_[0] ),
        .I5(\opbuf_reg[0]51_in [6]),
        .O(\crcAXIS_tkeep[7]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hBBFFBFFCFFEDFFFB)) 
    \crcAXIS_tkeep[7]_i_5 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [0]),
        .I3(\stateOp_reg[5]_0 [4]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\crcAXIS_tkeep[7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFB7F7FFFDFFEF)) 
    \crcAXIS_tkeep[7]_i_6 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\stateOp_reg[5]_0 [5]),
        .I5(\stateOp_reg[5]_0 [3]),
        .O(\crcAXIS_tkeep[7]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'h80AA)) 
    \crcAXIS_tkeep[7]_i_8 
       (.I0(\crcAXIS_tkeep[0]_i_2__0_n_0 ),
        .I1(\crcAXIS_tkeep_reg[1]_i_2_n_5 ),
        .I2(\crcAXIS_tkeep[3]_i_2_n_0 ),
        .I3(\crcAXIS_tkeep[3]_i_3_n_0 ),
        .O(\crcAXIS_tkeep[7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h0040010000010000)) 
    \crcAXIS_tkeep[7]_i_9 
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_reg[5]_0 [2]),
        .I2(\stateOp_reg[5]_0 [3]),
        .I3(\stateOp_reg[5]_0 [5]),
        .I4(\stateOp_reg[5]_0 [4]),
        .I5(\stateOp_reg[5]_0 [1]),
        .O(\crcAXIS_tkeep[7]_i_9_n_0 ));
  FDPE \crcAXIS_tkeep_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_205),
        .D(myRxtx_n_277),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(AXIS_tkeep[0]));
  FDPE \crcAXIS_tkeep_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_205),
        .D(myRxtx_n_276),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(AXIS_tkeep[1]));
  CARRY8 \crcAXIS_tkeep_reg[1]_i_2 
       (.CI(\crcAXIS_tkeep_reg[1]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_crcAXIS_tkeep_reg[1]_i_2_CO_UNCONNECTED [7:3],\crcAXIS_tkeep_reg[1]_i_2_n_5 ,\crcAXIS_tkeep_reg[1]_i_2_n_6 ,\crcAXIS_tkeep_reg[1]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_crcAXIS_tkeep_reg[1]_i_2_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,\crcAXIS_tkeep[1]_i_4_n_0 ,\crcAXIS_tkeep[1]_i_5_n_0 ,\crcAXIS_tkeep[1]_i_6_n_0 }));
  CARRY8 \crcAXIS_tkeep_reg[1]_i_3 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\crcAXIS_tkeep_reg[1]_i_3_n_0 ,\crcAXIS_tkeep_reg[1]_i_3_n_1 ,\crcAXIS_tkeep_reg[1]_i_3_n_2 ,\crcAXIS_tkeep_reg[1]_i_3_n_3 ,\crcAXIS_tkeep_reg[1]_i_3_n_4 ,\crcAXIS_tkeep_reg[1]_i_3_n_5 ,\crcAXIS_tkeep_reg[1]_i_3_n_6 ,\crcAXIS_tkeep_reg[1]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_crcAXIS_tkeep_reg[1]_i_3_O_UNCONNECTED [7:0]),
        .S({\crcAXIS_tkeep[1]_i_7_n_0 ,\crcAXIS_tkeep[1]_i_8_n_0 ,\crcAXIS_tkeep[1]_i_9_n_0 ,\crcAXIS_tkeep[1]_i_10_n_0 ,\crcAXIS_tkeep[1]_i_11_n_0 ,\crcAXIS_tkeep[1]_i_12_n_0 ,\crcAXIS_tkeep[1]_i_13_n_0 ,\crcAXIS_tkeep[1]_i_14_n_0 }));
  FDPE \crcAXIS_tkeep_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_205),
        .D(myRxtx_n_275),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(AXIS_tkeep[2]));
  FDPE \crcAXIS_tkeep_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_205),
        .D(myRxtx_n_274),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(AXIS_tkeep[3]));
  FDPE \crcAXIS_tkeep_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_205),
        .D(myRxtx_n_273),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(AXIS_tkeep[4]));
  FDPE \crcAXIS_tkeep_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_205),
        .D(myRxtx_n_272),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(AXIS_tkeep[5]));
  FDPE \crcAXIS_tkeep_reg[6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_205),
        .D(myRxtx_n_271),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(AXIS_tkeep[6]));
  FDPE \crcAXIS_tkeep_reg[7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_205),
        .D(myRxtx_n_270),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(AXIS_tkeep[7]));
  CARRY8 \crcAXIS_tkeep_reg[7]_i_11 
       (.CI(\crcAXIS_tkeep_reg[7]_i_14_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_crcAXIS_tkeep_reg[7]_i_11_CO_UNCONNECTED [7:3],crcAXIS_tlast_sig0,\crcAXIS_tkeep_reg[7]_i_11_n_6 ,\crcAXIS_tkeep_reg[7]_i_11_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_crcAXIS_tkeep_reg[7]_i_11_O_UNCONNECTED [7:4],\crcAXIS_tkeep_reg[7]_i_11_n_12 ,\NLW_crcAXIS_tkeep_reg[7]_i_11_O_UNCONNECTED [2:0]}),
        .S({1'b0,1'b0,1'b0,1'b0,1'b1,\crcAXIS_tkeep[7]_i_15_n_0 ,\crcAXIS_tkeep[7]_i_16_n_0 ,\crcAXIS_tkeep[7]_i_17_n_0 }));
  CARRY8 \crcAXIS_tkeep_reg[7]_i_14 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\crcAXIS_tkeep_reg[7]_i_14_n_0 ,\crcAXIS_tkeep_reg[7]_i_14_n_1 ,\crcAXIS_tkeep_reg[7]_i_14_n_2 ,\crcAXIS_tkeep_reg[7]_i_14_n_3 ,\crcAXIS_tkeep_reg[7]_i_14_n_4 ,\crcAXIS_tkeep_reg[7]_i_14_n_5 ,\crcAXIS_tkeep_reg[7]_i_14_n_6 ,\crcAXIS_tkeep_reg[7]_i_14_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_crcAXIS_tkeep_reg[7]_i_14_O_UNCONNECTED [7:0]),
        .S({\crcAXIS_tkeep[7]_i_18_n_0 ,\crcAXIS_tkeep[7]_i_19_n_0 ,\crcAXIS_tkeep[7]_i_20_n_0 ,\crcAXIS_tkeep[7]_i_21_n_0 ,\crcAXIS_tkeep[7]_i_22_n_0 ,\crcAXIS_tkeep[7]_i_23_n_0 ,\crcAXIS_tkeep[7]_i_24_n_0 ,\crcAXIS_tkeep[7]_i_25_n_0 }));
  (* SOFT_HLUTNM = "soft_lutpair2406" *) 
  LUT2 #(
    .INIT(4'h2)) 
    crcAXIS_tlast_sig_i_13
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_reg[5]_0 [5]),
        .O(crcAXIS_tlast_sig_i_13_n_0));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAA8)) 
    crcAXIS_tlast_sig_i_14
       (.I0(\stateOp_next[5]_i_3_n_0 ),
        .I1(\stateOp_next_reg_n_0_[5] ),
        .I2(\stateOp_next_reg_n_0_[4] ),
        .I3(\stateOp_next_reg_n_0_[3] ),
        .I4(\stateOp_next_reg_n_0_[0] ),
        .I5(\stateOp_next_reg_n_0_[1] ),
        .O(crcAXIS_tlast_sig_i_14_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2368" *) 
  LUT3 #(
    .INIT(8'h04)) 
    crcAXIS_tlast_sig_i_15
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(\crcAXIS_tkeep_reg[7]_i_11_n_12 ),
        .O(crcAXIS_tlast_sig_i_15_n_0));
  LUT6 #(
    .INIT(64'h000000000000F7FF)) 
    crcAXIS_tlast_sig_i_2
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\wordcntLast[0]_i_5_n_0 ),
        .I3(\txAXIS_tdata[7]_i_15_n_0 ),
        .I4(crcAXIS_tlast_sig_i_4_n_0),
        .I5(crcAXIS_tlast_sig_i_5_n_0),
        .O(crcAXIS_tlast_sig_i_2_n_0));
  LUT6 #(
    .INIT(64'h0000010000090100)) 
    crcAXIS_tlast_sig_i_4
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [0]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [4]),
        .I5(\crcAXIS_tkeep_reg[7]_i_11_n_12 ),
        .O(crcAXIS_tlast_sig_i_4_n_0));
  LUT6 #(
    .INIT(64'hAAAA0AA8AA0AAAA2)) 
    crcAXIS_tlast_sig_i_5
       (.I0(\crcAXIS_tkeep_reg[1]_i_2_n_5 ),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [0]),
        .O(crcAXIS_tlast_sig_i_5_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFD9)) 
    crcAXIS_tlast_sig_i_7
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(\crcAXIS_tkeep_reg[7]_i_11_n_12 ),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\stateOp_reg[5]_0 [0]),
        .I5(\stateOp_reg[5]_0 [1]),
        .O(crcAXIS_tlast_sig_i_7_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2381" *) 
  LUT2 #(
    .INIT(4'h2)) 
    crcAXIS_tlast_sig_i_9
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [0]),
        .O(crcAXIS_tlast_sig_i_9_n_0));
  FDPE crcAXIS_tlast_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(myRxtx_n_553),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(crcAXIS_tlast_sig_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2268" *) 
  LUT5 #(
    .INIT(32'h00000001)) 
    hdrNotFix_i_1
       (.I0(\invbuf_reg[0][7]_0 [5]),
        .I1(\invbuf_reg[0][7]_0 [1]),
        .I2(\invbuf_reg[0][7]_0 [3]),
        .I3(\invbuf_reg[0][7]_0 [7]),
        .I4(hdrNotFix_i_2_n_0),
        .O(hdrNotFix));
  LUT4 #(
    .INIT(16'h7FFF)) 
    hdrNotFix_i_2
       (.I0(\invbuf_reg[0][7]_0 [2]),
        .I1(\invbuf_reg[0][7]_0 [6]),
        .I2(\invbuf_reg[0][7]_0 [0]),
        .I3(\invbuf_reg[0][7]_0 [4]),
        .O(hdrNotFix_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2270" *) 
  LUT3 #(
    .INIT(8'h54)) 
    i2cReadNotWrite_i_2
       (.I0(reqInvSetReg),
        .I1(reqInvModReg),
        .I2(reqInvGetReg),
        .O(\i2cRegaddr[15]_i_6_0 ));
  LUT6 #(
    .INIT(64'h0101010101010001)) 
    i2cReadNotWrite_i_3
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(reqInvModReg),
        .I3(i2cReadNotWrite_reg[2]),
        .I4(i2cReadNotWrite_reg[0]),
        .I5(i2cReadNotWrite_reg[1]),
        .O(\stateLive_reg[2] ));
  LUT5 #(
    .INIT(32'hF0F1F0E0)) 
    \i2cRegaddr[0]_i_2 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(D[16]),
        .I3(reqInvModReg),
        .I4(\i2cRegaddr_reg[13] [0]),
        .O(\invbuf_reg[1][0]_0 ));
  LUT6 #(
    .INIT(64'hFE00FFFFFE000000)) 
    \i2cRegaddr[10]_i_1 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(reqInvModReg),
        .I3(\invbuf_reg[0][7]_0 [2]),
        .I4(\i2cRegaddr_reg[15] ),
        .I5(DO[2]),
        .O(\invbuf_reg[0][7]_1 [6]));
  LUT6 #(
    .INIT(64'hFE00FFFFFE000000)) 
    \i2cRegaddr[11]_i_1 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(reqInvModReg),
        .I3(\invbuf_reg[0][7]_0 [3]),
        .I4(\i2cRegaddr_reg[15] ),
        .I5(DO[3]),
        .O(\invbuf_reg[0][7]_1 [7]));
  LUT5 #(
    .INIT(32'hF0F1F0E0)) 
    \i2cRegaddr[12]_i_2 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(\invbuf_reg[0][7]_0 [4]),
        .I3(reqInvModReg),
        .I4(\i2cRegaddr_reg[13] [1]),
        .O(\invbuf_reg[0][4]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2270" *) 
  LUT5 #(
    .INIT(32'hF0F1F0E0)) 
    \i2cRegaddr[13]_i_2 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(\invbuf_reg[0][7]_0 [5]),
        .I3(reqInvModReg),
        .I4(\i2cRegaddr_reg[13] [1]),
        .O(\invbuf_reg[0][5]_0 ));
  LUT6 #(
    .INIT(64'hFE00FFFFFE000000)) 
    \i2cRegaddr[14]_i_1 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(reqInvModReg),
        .I3(\invbuf_reg[0][7]_0 [6]),
        .I4(\i2cRegaddr_reg[15] ),
        .I5(DO[5]),
        .O(\invbuf_reg[0][7]_1 [8]));
  LUT5 #(
    .INIT(32'h00040000)) 
    \i2cRegaddr[15]_i_10 
       (.I0(stateOp_i_5__1_n_0),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(\tixVCommand_reg_n_0_[4] ),
        .I3(\tixVCommand_reg_n_0_[5] ),
        .I4(\tixVCommand_reg_n_0_[1] ),
        .O(\tixVCommand_reg[0]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2291" *) 
  LUT5 #(
    .INIT(32'h00000001)) 
    \i2cRegaddr[15]_i_11 
       (.I0(\tixVCommand_reg_n_0_[1] ),
        .I1(\tixVCommand_reg_n_0_[4] ),
        .I2(\tixVCommand_reg_n_0_[5] ),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .I4(\stateCorecfg[2]_i_8_n_0 ),
        .O(\i2cRegaddr[15]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hFE00FFFFFE000000)) 
    \i2cRegaddr[15]_i_2 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(reqInvModReg),
        .I3(\invbuf_reg[0][7]_0 [7]),
        .I4(\i2cRegaddr_reg[15] ),
        .I5(DO[6]),
        .O(\invbuf_reg[0][7]_1 [9]));
  (* SOFT_HLUTNM = "soft_lutpair2403" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \i2cRegaddr[15]_i_5 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\resid[2]_i_5_n_0 ),
        .O(reqInvSetReg));
  (* SOFT_HLUTNM = "soft_lutpair2365" *) 
  LUT3 #(
    .INIT(8'h20)) 
    \i2cRegaddr[15]_i_6 
       (.I0(stateOp_i_2__0_n_0),
        .I1(ackInvConfigSynth_sig_i_5_n_0),
        .I2(\tixVCommand_reg[0]_0 ),
        .O(reqInvGetReg));
  (* SOFT_HLUTNM = "soft_lutpair2367" *) 
  LUT3 #(
    .INIT(8'h20)) 
    \i2cRegaddr[15]_i_7 
       (.I0(stateOp_i_2__0_n_0),
        .I1(ackInvConfigSynth_sig_i_5_n_0),
        .I2(\i2cRegaddr[15]_i_11_n_0 ),
        .O(reqInvModReg));
  LUT6 #(
    .INIT(64'hFE00FFFFFE000000)) 
    \i2cRegaddr[1]_i_1 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(reqInvModReg),
        .I3(D[17]),
        .I4(\i2cRegaddr_reg[15] ),
        .I5(DO[1]),
        .O(\invbuf_reg[0][7]_1 [0]));
  LUT6 #(
    .INIT(64'hFE00FFFFFE000000)) 
    \i2cRegaddr[2]_i_1 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(reqInvModReg),
        .I3(D[18]),
        .I4(\i2cRegaddr_reg[15] ),
        .I5(DO[2]),
        .O(\invbuf_reg[0][7]_1 [1]));
  LUT5 #(
    .INIT(32'hF0F1F0E0)) 
    \i2cRegaddr[3]_i_2 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(D[19]),
        .I3(reqInvModReg),
        .I4(\i2cRegaddr_reg[13] [1]),
        .O(\invbuf_reg[1][3]_0 ));
  LUT5 #(
    .INIT(32'hF0F1F0E0)) 
    \i2cRegaddr[4]_i_2 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(D[20]),
        .I3(reqInvModReg),
        .I4(\i2cRegaddr_reg[13] [1]),
        .O(\invbuf_reg[1][4]_0 ));
  LUT6 #(
    .INIT(64'hFE00FFFFFE000000)) 
    \i2cRegaddr[5]_i_1 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(reqInvModReg),
        .I3(D[21]),
        .I4(\i2cRegaddr_reg[15] ),
        .I5(DO[4]),
        .O(\invbuf_reg[0][7]_1 [2]));
  LUT5 #(
    .INIT(32'hF0F1F0E0)) 
    \i2cRegaddr[6]_i_2 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(D[22]),
        .I3(reqInvModReg),
        .I4(\i2cRegaddr_reg[13] [1]),
        .O(\invbuf_reg[1][6]_0 ));
  LUT6 #(
    .INIT(64'hFE00FFFFFE000000)) 
    \i2cRegaddr[7]_i_2 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(reqInvModReg),
        .I3(D[23]),
        .I4(\i2cRegaddr_reg[15] ),
        .I5(DO[6]),
        .O(\invbuf_reg[0][7]_1 [3]));
  LUT6 #(
    .INIT(64'hFE00FFFFFE000000)) 
    \i2cRegaddr[8]_i_1 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(reqInvModReg),
        .I3(\invbuf_reg[0][7]_0 [0]),
        .I4(\i2cRegaddr_reg[15] ),
        .I5(DO[0]),
        .O(\invbuf_reg[0][7]_1 [4]));
  LUT6 #(
    .INIT(64'hFE00FFFFFE000000)) 
    \i2cRegaddr[9]_i_1 
       (.I0(reqInvSetReg),
        .I1(reqInvGetReg),
        .I2(reqInvModReg),
        .I3(\invbuf_reg[0][7]_0 [1]),
        .I4(\i2cRegaddr_reg[15] ),
        .I5(DO[1]),
        .O(\invbuf_reg[0][7]_1 [5]));
  LUT6 #(
    .INIT(64'hBBBBBBBBBBB8BBBB)) 
    \i[3]__0_i_1__1 
       (.I0(reqResetFromHostif),
        .I1(stateMclk),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(reqReset_sig_reg_1));
  LUT6 #(
    .INIT(64'hDDDDDDDDDDDDDDD5)) 
    \i[4]_i_2__1 
       (.I0(ackInvSet_sig_reg[0]),
        .I1(ackInvSet_sig_reg[1]),
        .I2(reqInvRotarySet),
        .I3(reqInvRotaryMoveto),
        .I4(reqInvRotaryConfig),
        .I5(reqInvRotaryZero),
        .O(\stateOp_reg[0]_2 ));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_10__2
       (.I0(O[1]),
        .I1(O[0]),
        .O(\invbuf_reg[0][5]_3 [0]));
  LUT1 #(
    .INIT(2'h1)) 
    i__carry_i_1__3
       (.I0(O[5]),
        .O(\invbuf_reg[0][5]_4 ));
  LUT2 #(
    .INIT(4'hE)) 
    i__carry_i_2__4
       (.I0(O[5]),
        .I1(O[4]),
        .O(DI[2]));
  LUT2 #(
    .INIT(4'hE)) 
    i__carry_i_3__4
       (.I0(O[2]),
        .I1(O[3]),
        .O(DI[1]));
  LUT1 #(
    .INIT(2'h1)) 
    i__carry_i_4__3
       (.I0(CO),
        .O(\invbuf_reg[0][5]_1 [3]));
  LUT2 #(
    .INIT(4'hE)) 
    i__carry_i_4__4
       (.I0(O[0]),
        .I1(O[1]),
        .O(DI[0]));
  LUT2 #(
    .INIT(4'h2)) 
    i__carry_i_5__3
       (.I0(O[5]),
        .I1(O[4]),
        .O(\invbuf_reg[0][5]_1 [2]));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_6__4
       (.I0(O[3]),
        .I1(O[2]),
        .O(\invbuf_reg[0][5]_1 [1]));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_7__3
       (.I0(O[1]),
        .I1(O[0]),
        .O(\invbuf_reg[0][5]_1 [0]));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_8__3
       (.I0(O[4]),
        .I1(O[5]),
        .O(\invbuf_reg[0][5]_3 [2]));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_9__2
       (.I0(O[3]),
        .I1(O[2]),
        .O(\invbuf_reg[0][5]_3 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2352" *) 
  LUT3 #(
    .INIT(8'h20)) 
    i__i_1
       (.I0(i__i_3_n_0),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(stateOp_i_2__0_n_0),
        .O(reqInvDirectorConfig));
  (* SOFT_HLUTNM = "soft_lutpair2352" *) 
  LUT3 #(
    .INIT(8'h80)) 
    i__i_2
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(i__i_3_n_0),
        .O(reqInvDirectorSet));
  LUT6 #(
    .INIT(64'h0000100000000000)) 
    i__i_3
       (.I0(\ixRetbufCrc[4]_i_5_n_0 ),
        .I1(stateOp_i_5__1_n_0),
        .I2(i__i_4_n_0),
        .I3(i__i_5_n_0),
        .I4(\retbuf[0][0]_i_3_n_0 ),
        .I5(\tixVController_reg_n_0_[0] ),
        .O(i__i_3_n_0));
  LUT2 #(
    .INIT(4'h2)) 
    i__i_4
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .O(i__i_4_n_0));
  LUT2 #(
    .INIT(4'h2)) 
    i__i_5
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .O(i__i_5_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2324" *) 
  LUT4 #(
    .INIT(16'hF7FF)) 
    \invbuf[0][7]_i_2 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [5]),
        .I3(\stateOp_reg[5]_0 [4]),
        .O(\invbuf[0][7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFEFEFFFFAEFEA)) 
    \invbuf[9][7]_i_10 
       (.I0(\invbuf[9][7]_i_22_n_0 ),
        .I1(\opbuf_reg[0]3 [27]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .I3(\opbuf_reg[0]51_in [30]),
        .I4(\opbuf_reg[0]3 [26]),
        .I5(\opbuf_reg[0]51_in [29]),
        .O(\invbuf[9][7]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2298" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \invbuf[9][7]_i_11 
       (.I0(\wordcnt_reg_n_0_[25] ),
        .I1(\opbuf_reg[0][7]_i_16_n_7 ),
        .O(\invbuf[9][7]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFDDFAD8)) 
    \invbuf[9][7]_i_13 
       (.I0(\wordcnt_reg_n_0_[25] ),
        .I1(\opbuf_reg[0]3 [13]),
        .I2(\opbuf_reg[0]51_in [16]),
        .I3(\opbuf_reg[0]3 [12]),
        .I4(\opbuf_reg[0]51_in [15]),
        .I5(\invbuf[9][7]_i_30_n_0 ),
        .O(\invbuf[9][7]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFDDFAD8)) 
    \invbuf[9][7]_i_14 
       (.I0(\wordcnt_reg_n_0_[25] ),
        .I1(\opbuf_reg[0]3 [17]),
        .I2(\opbuf_reg[0]51_in [20]),
        .I3(\opbuf_reg[0]3 [16]),
        .I4(\opbuf_reg[0]51_in [19]),
        .I5(\invbuf[9][7]_i_31_n_0 ),
        .O(\invbuf[9][7]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \invbuf[9][7]_i_15 
       (.I0(\opbuf_reg[0]51_in [9]),
        .I1(\opbuf_reg[0]3 [6]),
        .I2(\opbuf_reg[0]51_in [10]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [7]),
        .O(\invbuf[9][7]_i_15_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \invbuf[9][7]_i_16 
       (.I0(\opbuf_reg[0]51_in [7]),
        .I1(\opbuf_reg[0]3 [4]),
        .I2(\opbuf_reg[0]51_in [8]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [5]),
        .O(\invbuf[9][7]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFDDFAD8)) 
    \invbuf[9][7]_i_17 
       (.I0(\wordcnt_reg_n_0_[25] ),
        .I1(\opbuf_reg[0]3 [8]),
        .I2(\opbuf_reg[0]51_in [11]),
        .I3(\opbuf_reg[0]3 [9]),
        .I4(\opbuf_reg[0]51_in [12]),
        .I5(\invbuf[9][7]_i_20_n_0 ),
        .O(\invbuf[9][7]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2298" *) 
  LUT5 #(
    .INIT(32'hFFFFFFF4)) 
    \invbuf[9][7]_i_18 
       (.I0(\opbuf_reg[0][7]_i_16_n_7 ),
        .I1(\wordcnt_reg_n_0_[25] ),
        .I2(\invbuf[9][7]_i_10_n_0 ),
        .I3(\invbuf[9][7]_i_32_n_0 ),
        .I4(\invbuf[9][7]_i_21_n_0 ),
        .O(\invbuf[9][7]_i_18_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \invbuf[9][7]_i_19 
       (.I0(\opbuf_reg[0]51_in [12]),
        .I1(\opbuf_reg[0]3 [9]),
        .I2(\opbuf_reg[0]51_in [11]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [8]),
        .O(\invbuf[9][7]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \invbuf[9][7]_i_20 
       (.I0(\opbuf_reg[0]51_in [13]),
        .I1(\opbuf_reg[0]3 [10]),
        .I2(\opbuf_reg[0]51_in [14]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [11]),
        .O(\invbuf[9][7]_i_20_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \invbuf[9][7]_i_21 
       (.I0(\opbuf_reg[0]51_in [25]),
        .I1(\opbuf_reg[0]3 [22]),
        .I2(\opbuf_reg[0]51_in [26]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [23]),
        .O(\invbuf[9][7]_i_21_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \invbuf[9][7]_i_22 
       (.I0(\opbuf_reg[0]51_in [27]),
        .I1(\opbuf_reg[0]3 [24]),
        .I2(\opbuf_reg[0]51_in [28]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [25]),
        .O(\invbuf[9][7]_i_22_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \invbuf[9][7]_i_23 
       (.I0(\opbuf_reg[0]51_in [6]),
        .O(txlast1[0]));
  LUT1 #(
    .INIT(2'h1)) 
    \invbuf[9][7]_i_24 
       (.I0(\opbuf_reg[0]51_in [12]),
        .O(\invbuf[9][7]_i_24_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \invbuf[9][7]_i_25 
       (.I0(\opbuf_reg[0]51_in [11]),
        .O(\invbuf[9][7]_i_25_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \invbuf[9][7]_i_26 
       (.I0(\opbuf_reg[0]51_in [10]),
        .O(\invbuf[9][7]_i_26_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \invbuf[9][7]_i_27 
       (.I0(\opbuf_reg[0]51_in [9]),
        .O(\invbuf[9][7]_i_27_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \invbuf[9][7]_i_28 
       (.I0(\opbuf_reg[0]51_in [8]),
        .O(\invbuf[9][7]_i_28_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \invbuf[9][7]_i_29 
       (.I0(\opbuf_reg[0]51_in [7]),
        .O(\invbuf[9][7]_i_29_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2413" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \invbuf[9][7]_i_3 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [0]),
        .O(\invbuf[9][7]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \invbuf[9][7]_i_30 
       (.I0(\opbuf_reg[0]51_in [17]),
        .I1(\opbuf_reg[0]3 [14]),
        .I2(\opbuf_reg[0]51_in [18]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [15]),
        .O(\invbuf[9][7]_i_30_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \invbuf[9][7]_i_31 
       (.I0(\opbuf_reg[0]51_in [21]),
        .I1(\opbuf_reg[0]3 [18]),
        .I2(\opbuf_reg[0]51_in [22]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [19]),
        .O(\invbuf[9][7]_i_31_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \invbuf[9][7]_i_32 
       (.I0(\opbuf_reg[0]51_in [23]),
        .I1(\opbuf_reg[0]3 [20]),
        .I2(\opbuf_reg[0]51_in [24]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [21]),
        .O(\invbuf[9][7]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2410" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \invbuf[9][7]_i_5 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [2]),
        .O(\invbuf[9][7]_i_5_n_0 ));
  LUT3 #(
    .INIT(8'hB8)) 
    \invbuf[9][7]_i_6 
       (.I0(\opbuf_reg[0]5 [6]),
        .I1(\wordcnt_reg_n_0_[25] ),
        .I2(\opbuf_reg[0]51_in [6]),
        .O(\invbuf[9][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \invbuf[9][7]_i_7 
       (.I0(\invbuf[9][7]_i_13_n_0 ),
        .I1(\invbuf[9][7]_i_14_n_0 ),
        .I2(\invbuf[9][7]_i_15_n_0 ),
        .I3(\invbuf[9][7]_i_16_n_0 ),
        .I4(\invbuf[9][7]_i_17_n_0 ),
        .I5(\invbuf[9][7]_i_18_n_0 ),
        .O(\invbuf[9][7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \invbuf[9][7]_i_8 
       (.I0(\invbuf[9][7]_i_19_n_0 ),
        .I1(\invbuf[9][7]_i_20_n_0 ),
        .I2(\invbuf[9][7]_i_16_n_0 ),
        .I3(\invbuf[9][7]_i_15_n_0 ),
        .I4(\invbuf[9][7]_i_14_n_0 ),
        .I5(\invbuf[9][7]_i_13_n_0 ),
        .O(\invbuf[9][7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFDDFAD8)) 
    \invbuf[9][7]_i_9 
       (.I0(\wordcnt_reg_n_0_[25] ),
        .I1(\opbuf_reg[0]3 [21]),
        .I2(\opbuf_reg[0]51_in [24]),
        .I3(\opbuf_reg[0]3 [20]),
        .I4(\opbuf_reg[0]51_in [23]),
        .I5(\invbuf[9][7]_i_21_n_0 ),
        .O(\invbuf[9][7]_i_9_n_0 ));
  FDCE \invbuf_reg[0][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_12),
        .Q(\invbuf_reg[0][7]_0 [0]));
  FDCE \invbuf_reg[0][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_11),
        .Q(\invbuf_reg[0][7]_0 [1]));
  FDCE \invbuf_reg[0][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_10),
        .Q(\invbuf_reg[0][7]_0 [2]));
  FDCE \invbuf_reg[0][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_9),
        .Q(\invbuf_reg[0][7]_0 [3]));
  FDCE \invbuf_reg[0][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_8),
        .Q(\invbuf_reg[0][7]_0 [4]));
  FDCE \invbuf_reg[0][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_7),
        .Q(\invbuf_reg[0][7]_0 [5]));
  FDCE \invbuf_reg[0][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_6),
        .Q(\invbuf_reg[0][7]_0 [6]));
  FDCE \invbuf_reg[0][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_5),
        .Q(\invbuf_reg[0][7]_0 [7]));
  FDCE \invbuf_reg[1][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [0]),
        .Q(D[16]));
  FDCE \invbuf_reg[1][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [1]),
        .Q(D[17]));
  FDCE \invbuf_reg[1][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [2]),
        .Q(D[18]));
  FDCE \invbuf_reg[1][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [3]),
        .Q(D[19]));
  FDCE \invbuf_reg[1][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [4]),
        .Q(D[20]));
  FDCE \invbuf_reg[1][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [5]),
        .Q(D[21]));
  FDCE \invbuf_reg[1][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [6]),
        .Q(D[22]));
  FDCE \invbuf_reg[1][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [7]),
        .Q(D[23]));
  FDCE \invbuf_reg[2][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [0]),
        .Q(D[8]));
  FDCE \invbuf_reg[2][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [1]),
        .Q(D[9]));
  FDCE \invbuf_reg[2][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [2]),
        .Q(D[10]));
  FDCE \invbuf_reg[2][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [3]),
        .Q(D[11]));
  FDCE \invbuf_reg[2][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [4]),
        .Q(D[12]));
  FDCE \invbuf_reg[2][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [5]),
        .Q(D[13]));
  FDCE \invbuf_reg[2][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [6]),
        .Q(D[14]));
  FDCE \invbuf_reg[2][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [7]),
        .Q(D[15]));
  FDCE \invbuf_reg[3][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_34),
        .Q(D[0]));
  FDCE \invbuf_reg[3][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[3]_70 [1]),
        .Q(D[1]));
  FDCE \invbuf_reg[3][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_32),
        .Q(D[2]));
  FDCE \invbuf_reg[3][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_31),
        .Q(D[3]));
  FDCE \invbuf_reg[3][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_30),
        .Q(D[4]));
  FDCE \invbuf_reg[3][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_29),
        .Q(D[5]));
  FDCE \invbuf_reg[3][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[3]_70 [6]),
        .Q(D[6]));
  FDCE \invbuf_reg[3][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_27),
        .Q(D[7]));
  FDCE \invbuf_reg[4][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [0]),
        .Q(\invbuf_reg[4][7]_0 [0]));
  FDCE \invbuf_reg[4][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [1]),
        .Q(\invbuf_reg[4][7]_0 [1]));
  FDCE \invbuf_reg[4][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [2]),
        .Q(\invbuf_reg[4][7]_0 [2]));
  FDCE \invbuf_reg[4][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [3]),
        .Q(\invbuf_reg[4][7]_0 [3]));
  FDCE \invbuf_reg[4][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [4]),
        .Q(\invbuf_reg[4][7]_0 [4]));
  FDCE \invbuf_reg[4][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [5]),
        .Q(\invbuf_reg[4][7]_0 [5]));
  FDCE \invbuf_reg[4][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [6]),
        .Q(\invbuf_reg[4][7]_0 [6]));
  FDCE \invbuf_reg[4][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [7]),
        .Q(\invbuf_reg[4][7]_0 [7]));
  FDCE \invbuf_reg[5][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [0]),
        .Q(\invbuf_reg[5][7]_0 [0]));
  FDCE \invbuf_reg[5][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [1]),
        .Q(\invbuf_reg[5][7]_0 [1]));
  FDCE \invbuf_reg[5][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [2]),
        .Q(\invbuf_reg[5][7]_0 [2]));
  FDCE \invbuf_reg[5][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [3]),
        .Q(\invbuf_reg[5][7]_0 [3]));
  FDCE \invbuf_reg[5][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [4]),
        .Q(\invbuf_reg[5][7]_0 [4]));
  FDCE \invbuf_reg[5][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [5]),
        .Q(\invbuf_reg[5][7]_0 [5]));
  FDCE \invbuf_reg[5][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [6]),
        .Q(\invbuf_reg[5][7]_0 [6]));
  FDCE \invbuf_reg[5][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [7]),
        .Q(\invbuf_reg[5][7]_0 [7]));
  FDCE \invbuf_reg[6][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[6]_74 [0]),
        .Q(\invbuf_reg[6][2]_0 [8]));
  FDCE \invbuf_reg[6][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[6]_74 [1]),
        .Q(\invbuf_reg[6][2]_0 [9]));
  FDCE \invbuf_reg[6][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[6]_74 [2]),
        .Q(\invbuf_reg[6][2]_0 [10]));
  FDCE \invbuf_reg[7][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_46),
        .Q(\invbuf_reg[6][2]_0 [0]));
  FDCE \invbuf_reg[7][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_45),
        .Q(\invbuf_reg[6][2]_0 [1]));
  FDCE \invbuf_reg[7][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_44),
        .Q(\invbuf_reg[6][2]_0 [2]));
  FDCE \invbuf_reg[7][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_43),
        .Q(\invbuf_reg[6][2]_0 [3]));
  FDCE \invbuf_reg[7][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_42),
        .Q(\invbuf_reg[6][2]_0 [4]));
  FDCE \invbuf_reg[7][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_41),
        .Q(\invbuf_reg[6][2]_0 [5]));
  FDCE \invbuf_reg[7][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_40),
        .Q(\invbuf_reg[6][2]_0 [6]));
  FDCE \invbuf_reg[7][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_24),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_39),
        .Q(\invbuf_reg[6][2]_0 [7]));
  FDCE \invbuf_reg[8][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_0),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_12),
        .Q(\invbuf_reg[8][2]_0 [8]));
  FDCE \invbuf_reg[8][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_0),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_11),
        .Q(\invbuf_reg[8][2]_0 [9]));
  FDCE \invbuf_reg[8][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_0),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_10),
        .Q(\invbuf_reg[8][2]_0 [10]));
  FDCE \invbuf_reg[9][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_0),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_435),
        .Q(\invbuf_reg[8][2]_0 [0]));
  FDCE \invbuf_reg[9][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_0),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_434),
        .Q(\invbuf_reg[8][2]_0 [1]));
  FDCE \invbuf_reg[9][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_0),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_433),
        .Q(\invbuf_reg[8][2]_0 [2]));
  FDCE \invbuf_reg[9][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_0),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_432),
        .Q(\invbuf_reg[8][2]_0 [3]));
  FDCE \invbuf_reg[9][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_0),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_431),
        .Q(\invbuf_reg[8][2]_0 [4]));
  FDCE \invbuf_reg[9][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_0),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_430),
        .Q(\invbuf_reg[8][2]_0 [5]));
  FDCE \invbuf_reg[9][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_0),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_429),
        .Q(\invbuf_reg[8][2]_0 [6]));
  FDCE \invbuf_reg[9][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_0),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_428),
        .Q(\invbuf_reg[8][2]_0 [7]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \invbuf_reg[9][7]_i_12 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\invbuf_reg[9][7]_i_12_n_0 ,\invbuf_reg[9][7]_i_12_n_1 ,\invbuf_reg[9][7]_i_12_n_2 ,\invbuf_reg[9][7]_i_12_n_3 ,\invbuf_reg[9][7]_i_12_n_4 ,\invbuf_reg[9][7]_i_12_n_5 ,\invbuf_reg[9][7]_i_12_n_6 ,\invbuf_reg[9][7]_i_12_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,txlast1[0],1'b0}),
        .O({\opbuf_reg[0]5 [12:6],\NLW_invbuf_reg[9][7]_i_12_O_UNCONNECTED [0]}),
        .S({\invbuf[9][7]_i_24_n_0 ,\invbuf[9][7]_i_25_n_0 ,\invbuf[9][7]_i_26_n_0 ,\invbuf[9][7]_i_27_n_0 ,\invbuf[9][7]_i_28_n_0 ,\invbuf[9][7]_i_29_n_0 ,\opbuf_reg[0]51_in [6],1'b0}));
  (* SOFT_HLUTNM = "soft_lutpair2359" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \ixMemNext[0]_i_1 
       (.I0(\invbuf_reg[0][7]_0 [0]),
        .I1(reqInvAssign),
        .I2(reqInvHdrengSet),
        .O(\invbuf_reg[0][7]_4 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2358" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \ixMemNext[1]_i_1 
       (.I0(\invbuf_reg[0][7]_0 [1]),
        .I1(reqInvAssign),
        .I2(reqInvHdrengSet),
        .O(\invbuf_reg[0][7]_4 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2355" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \ixMemNext[2]_i_1 
       (.I0(\invbuf_reg[0][7]_0 [2]),
        .I1(reqInvAssign),
        .I2(reqInvHdrengSet),
        .O(\invbuf_reg[0][7]_4 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2358" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \ixMemNext[3]_i_1 
       (.I0(\invbuf_reg[0][7]_0 [3]),
        .I1(reqInvAssign),
        .I2(reqInvHdrengSet),
        .O(\invbuf_reg[0][7]_4 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2357" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \ixMemNext[4]_i_1 
       (.I0(\invbuf_reg[0][7]_0 [4]),
        .I1(reqInvAssign),
        .I2(reqInvHdrengSet),
        .O(\invbuf_reg[0][7]_4 [4]));
  (* SOFT_HLUTNM = "soft_lutpair2357" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \ixMemNext[5]_i_1 
       (.I0(\invbuf_reg[0][7]_0 [5]),
        .I1(reqInvAssign),
        .I2(reqInvHdrengSet),
        .O(\invbuf_reg[0][7]_4 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2356" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \ixMemNext[6]_i_1 
       (.I0(\invbuf_reg[0][7]_0 [6]),
        .I1(reqInvAssign),
        .I2(reqInvHdrengSet),
        .O(\invbuf_reg[0][7]_4 [6]));
  (* SOFT_HLUTNM = "soft_lutpair2274" *) 
  LUT5 #(
    .INIT(32'h0A0A0300)) 
    \ixMemNext[7]_i_1 
       (.I0(rng_reg_13),
        .I1(\myHdreng/rng ),
        .I2(rng_reg_8),
        .I3(reqInvHdrengSet),
        .I4(reqInvAssign),
        .O(rng_reg_6));
  (* SOFT_HLUTNM = "soft_lutpair2356" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \ixMemNext[7]_i_2 
       (.I0(\invbuf_reg[0][7]_0 [7]),
        .I1(reqInvAssign),
        .I2(reqInvHdrengSet),
        .O(\invbuf_reg[0][7]_4 [7]));
  LUT5 #(
    .INIT(32'h00000008)) 
    \ixMemNext[7]_i_3 
       (.I0(\invbuf_reg[0][7]_0 [4]),
        .I1(\invbuf_reg[0][7]_0 [6]),
        .I2(\invbuf_reg[0][7]_0 [3]),
        .I3(\invbuf_reg[0][7]_0 [5]),
        .I4(\ixMemNext[7]_i_4_n_0 ),
        .O(\myHdreng/rng ));
  LUT4 #(
    .INIT(16'hFFF7)) 
    \ixMemNext[7]_i_4 
       (.I0(\invbuf_reg[0][7]_0 [2]),
        .I1(\invbuf_reg[0][7]_0 [0]),
        .I2(\invbuf_reg[0][7]_0 [1]),
        .I3(\invbuf_reg[0][7]_0 [7]),
        .O(\ixMemNext[7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000100000000)) 
    \ixRetbufCrc[4]_i_2 
       (.I0(\ixRetbufCrc[4]_i_3_n_0 ),
        .I1(\ixRetbufCrc[4]_i_4_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(\ixRetbufCrc[4]_i_5_n_0 ),
        .I4(stateOp_i_5__1_n_0),
        .I5(\tixVController_reg_n_0_[0] ),
        .O(\ixRetbufCrc[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2338" *) 
  LUT3 #(
    .INIT(8'hFB)) 
    \ixRetbufCrc[4]_i_3 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .O(\ixRetbufCrc[4]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2304" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \ixRetbufCrc[4]_i_4 
       (.I0(\tixVController_reg_n_0_[4] ),
        .I1(\tixVController_reg_n_0_[6] ),
        .I2(\tixVController_reg_n_0_[5] ),
        .I3(\tixVController_reg_n_0_[7] ),
        .O(\ixRetbufCrc[4]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2377" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \ixRetbufCrc[4]_i_5 
       (.I0(\tixVCommand_reg_n_0_[1] ),
        .I1(\tixVCommand_reg_n_0_[4] ),
        .I2(\tixVCommand_reg_n_0_[5] ),
        .O(\ixRetbufCrc[4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000010000)) 
    \ixRetbufCrc[5]_i_3 
       (.I0(\tixVController_reg_n_0_[4] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(\tixVController_reg_n_0_[0] ),
        .O(\ixRetbufCrc[5]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \ixRetbufCrc[5]_i_4 
       (.I0(stateOp_i_5__1_n_0),
        .I1(\tixVCommand_reg_n_0_[5] ),
        .I2(\tixVCommand_reg_n_0_[4] ),
        .I3(\tixVCommand_reg_n_0_[1] ),
        .O(\ixRetbufCrc[5]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \ixRetbufCrc_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_3),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_63),
        .Q(ixRetbufCrc[0]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRetbufCrc_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_3),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_62),
        .Q(ixRetbufCrc[1]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRetbufCrc_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_3),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_61),
        .Q(ixRetbufCrc[2]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRetbufCrc_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_3),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_60),
        .Q(ixRetbufCrc[3]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRetbufCrc_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_3),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_59),
        .Q(ixRetbufCrc[4]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRetbufCrc_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_3),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_58),
        .Q(ixRetbufCrc[5]));
  (* SOFT_HLUTNM = "soft_lutpair2269" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \ixTExp_lcl[3]_i_1 
       (.I0(reqInvDecimAcquire),
        .I1(tixVState1),
        .I2(rng_reg_7),
        .O(E));
  (* SOFT_HLUTNM = "soft_lutpair2314" *) 
  LUT4 #(
    .INIT(16'h1101)) 
    \lastAXIS_tkeep[3]_i_2 
       (.I0(\resid[2]_i_5_n_0 ),
        .I1(\resid[2]_i_6_n_0 ),
        .I2(\resid[1]_i_2_n_0 ),
        .I3(\resid[1]_i_3_n_0 ),
        .O(\lastAXIS_tkeep[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2314" *) 
  LUT4 #(
    .INIT(16'h0070)) 
    \lastAXIS_tkeep[6]_i_2 
       (.I0(\resid[1]_i_2_n_0 ),
        .I1(\resid[1]_i_3_n_0 ),
        .I2(\resid[2]_i_6_n_0 ),
        .I3(\resid[2]_i_5_n_0 ),
        .O(\lastAXIS_tkeep[6]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2351" *) 
  LUT3 #(
    .INIT(8'hDF)) 
    \lastAXIS_tkeep[7]_i_2 
       (.I0(\resid[1]_i_2_n_0 ),
        .I1(\resid[1]_i_3_n_0 ),
        .I2(\resid[2]_i_6_n_0 ),
        .O(\lastAXIS_tkeep[7]_i_2_n_0 ));
  FDPE \lastAXIS_tkeep_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_188),
        .D(myRxtx_n_135),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(\lastAXIS_tkeep_reg_n_0_[1] ));
  FDPE \lastAXIS_tkeep_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_188),
        .D(myRxtx_n_134),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(\lastAXIS_tkeep_reg_n_0_[2] ));
  FDPE \lastAXIS_tkeep_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_188),
        .D(myRxtx_n_133),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(\lastAXIS_tkeep_reg_n_0_[3] ));
  FDPE \lastAXIS_tkeep_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_188),
        .D(myRxtx_n_132),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(\lastAXIS_tkeep_reg_n_0_[4] ));
  FDPE \lastAXIS_tkeep_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_188),
        .D(myRxtx_n_131),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(\lastAXIS_tkeep_reg_n_0_[5] ));
  FDPE \lastAXIS_tkeep_reg[6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_188),
        .D(myRxtx_n_130),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(\lastAXIS_tkeep_reg_n_0_[6] ));
  FDPE \lastAXIS_tkeep_reg[7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_188),
        .D(myRxtx_n_129),
        .PRE(\stateOp_reg[1]_6 ),
        .Q(\lastAXIS_tkeep_reg_n_0_[7] ));
  FDCE \len_reg[0] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_467),
        .Q(\len_reg_n_0_[0] ));
  FDCE \len_reg[10] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_457),
        .Q(\len_reg_n_0_[10] ));
  FDCE \len_reg[11] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_456),
        .Q(\len_reg_n_0_[11] ));
  FDCE \len_reg[12] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_455),
        .Q(\len_reg_n_0_[12] ));
  FDCE \len_reg[13] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_454),
        .Q(\len_reg_n_0_[13] ));
  FDCE \len_reg[14] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_453),
        .Q(\len_reg_n_0_[14] ));
  FDCE \len_reg[15] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_452),
        .Q(\len_reg_n_0_[15] ));
  FDCE \len_reg[16] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_451),
        .Q(\len_reg_n_0_[16] ));
  FDCE \len_reg[17] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_450),
        .Q(\len_reg_n_0_[17] ));
  FDCE \len_reg[18] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_449),
        .Q(\len_reg_n_0_[18] ));
  FDCE \len_reg[19] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_448),
        .Q(\len_reg_n_0_[19] ));
  FDCE \len_reg[1] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_466),
        .Q(\len_reg_n_0_[1] ));
  FDCE \len_reg[20] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_447),
        .Q(\len_reg_n_0_[20] ));
  FDCE \len_reg[21] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_446),
        .Q(\len_reg_n_0_[21] ));
  FDCE \len_reg[22] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_445),
        .Q(\len_reg_n_0_[22] ));
  FDCE \len_reg[23] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_444),
        .Q(\len_reg_n_0_[23] ));
  FDCE \len_reg[24] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_443),
        .Q(\len_reg_n_0_[24] ));
  FDCE \len_reg[25] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_442),
        .Q(\len_reg_n_0_[25] ));
  FDCE \len_reg[26] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_441),
        .Q(\len_reg_n_0_[26] ));
  FDCE \len_reg[27] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_440),
        .Q(\len_reg_n_0_[27] ));
  FDCE \len_reg[28] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_439),
        .Q(\len_reg_n_0_[28] ));
  FDCE \len_reg[29] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_438),
        .Q(\len_reg_n_0_[29] ));
  FDCE \len_reg[2] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_465),
        .Q(\len_reg_n_0_[2] ));
  FDCE \len_reg[30] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_437),
        .Q(\len_reg_n_0_[30] ));
  FDCE \len_reg[31] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_436),
        .Q(\len_reg_n_0_[31] ));
  FDCE \len_reg[3] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_464),
        .Q(\len_reg_n_0_[3] ));
  FDCE \len_reg[4] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_463),
        .Q(\len_reg_n_0_[4] ));
  FDCE \len_reg[5] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_462),
        .Q(\len_reg_n_0_[5] ));
  FDCE \len_reg[6] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_461),
        .Q(\len_reg_n_0_[6] ));
  FDCE \len_reg[7] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_460),
        .Q(\len_reg_n_0_[7] ));
  FDCE \len_reg[8] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_459),
        .Q(\len_reg_n_0_[8] ));
  FDCE \len_reg[9] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_458),
        .Q(\len_reg_n_0_[9] ));
  LUT5 #(
    .INIT(32'hF1FF0100)) 
    linNotRot_i_1
       (.I0(linNotRot_i_2_n_0),
        .I1(hdrNotFix_i_2_n_0),
        .I2(ackInvStepmuxSet),
        .I3(reqInvStepmuxSet),
        .I4(linNotRot_reg),
        .O(stateOp_reg_1));
  (* SOFT_HLUTNM = "soft_lutpair2268" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    linNotRot_i_2
       (.I0(\invbuf_reg[0][7]_0 [7]),
        .I1(\invbuf_reg[0][7]_0 [3]),
        .I2(\invbuf_reg[0][7]_0 [1]),
        .I3(\invbuf_reg[0][7]_0 [5]),
        .O(linNotRot_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2300" *) 
  LUT5 #(
    .INIT(32'h00000002)) 
    \lsb[0]_i_1 
       (.I0(\invbuf_reg[0][7]_0 [0]),
        .I1(\lsb[1]_i_2_n_0 ),
        .I2(\invbuf_reg[0][7]_0 [7]),
        .I3(\invbuf_reg[0][7]_0 [5]),
        .I4(\invbuf_reg[0][7]_0 [6]),
        .O(\invbuf_reg[0][7]_5 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2300" *) 
  LUT5 #(
    .INIT(32'h00000001)) 
    \lsb[1]_i_1 
       (.I0(\lsb[1]_i_2_n_0 ),
        .I1(\invbuf_reg[0][7]_0 [7]),
        .I2(\invbuf_reg[0][7]_0 [5]),
        .I3(\invbuf_reg[0][7]_0 [6]),
        .I4(\invbuf_reg[0][7]_0 [0]),
        .O(\invbuf_reg[0][7]_5 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2347" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \lsb[1]_i_2 
       (.I0(\invbuf_reg[0][7]_0 [3]),
        .I1(\invbuf_reg[0][7]_0 [4]),
        .I2(\invbuf_reg[0][7]_0 [1]),
        .I3(\invbuf_reg[0][7]_0 [2]),
        .O(\lsb[1]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h55FF0008)) 
    \mask[0]_i_1 
       (.I0(\mask_reg[7]_0 ),
        .I1(\invbuf_reg[0][1]_0 ),
        .I2(\mask[3]_i_2_n_0 ),
        .I3(reqInvMemtrackClearMask),
        .I4(\mask_reg[0]_2 ),
        .O(\mask_reg[0]_0 ));
  LUT5 #(
    .INIT(32'h55FF0008)) 
    \mask[0]_i_1__0 
       (.I0(\mask_reg[5]_1 ),
        .I1(\mask[4]_i_2_n_0 ),
        .I2(\mask[1]_i_2_n_0 ),
        .I3(reqInvHshktrackClearMask),
        .I4(\mask_reg[0]_1 ),
        .O(\mask_reg[0] ));
  LUT5 #(
    .INIT(32'h55FF0008)) 
    \mask[1]_i_1 
       (.I0(\mask_reg[7]_0 ),
        .I1(\mask[5]_i_2_n_0 ),
        .I2(\mask[3]_i_2_n_0 ),
        .I3(reqInvMemtrackClearMask),
        .I4(\mask_reg[1]_2 ),
        .O(\mask_reg[1]_0 ));
  LUT5 #(
    .INIT(32'h55FF0008)) 
    \mask[1]_i_1__0 
       (.I0(\mask_reg[5]_1 ),
        .I1(\mask[5]_i_3_n_0 ),
        .I2(\mask[1]_i_2_n_0 ),
        .I3(reqInvHshktrackClearMask),
        .I4(\mask_reg[1]_1 ),
        .O(\mask_reg[1] ));
  (* SOFT_HLUTNM = "soft_lutpair2354" *) 
  LUT3 #(
    .INIT(8'hFB)) 
    \mask[1]_i_2 
       (.I0(\invbuf_reg[0][7]_0 [2]),
        .I1(reqInvHshktrackSetMask),
        .I2(\invbuf_reg[0][7]_0 [3]),
        .O(\mask[1]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h55FF0008)) 
    \mask[2]_i_1 
       (.I0(\mask_reg[7]_0 ),
        .I1(\mask[6]_i_2_n_0 ),
        .I2(\mask[3]_i_2_n_0 ),
        .I3(reqInvMemtrackClearMask),
        .I4(\mask_reg[2]_1 ),
        .O(\mask_reg[2] ));
  LUT5 #(
    .INIT(32'h55FF0002)) 
    \mask[2]_i_1__0 
       (.I0(\mask_reg[5]_1 ),
        .I1(\invbuf_reg[0][7]_0 [0]),
        .I2(\mask[3]_i_2__0_n_0 ),
        .I3(reqInvHshktrackClearMask),
        .I4(\mask_reg[2]_0 ),
        .O(\invbuf_reg[0][0]_1 ));
  LUT5 #(
    .INIT(32'h55FF0008)) 
    \mask[3]_i_1 
       (.I0(\mask_reg[7]_0 ),
        .I1(\mask[7]_i_3_n_0 ),
        .I2(\mask[3]_i_2_n_0 ),
        .I3(reqInvMemtrackClearMask),
        .I4(\mask_reg[3]_2 ),
        .O(\mask_reg[3] ));
  LUT5 #(
    .INIT(32'h55FF0008)) 
    \mask[3]_i_1__0 
       (.I0(\mask_reg[5]_1 ),
        .I1(\invbuf_reg[0][7]_0 [0]),
        .I2(\mask[3]_i_2__0_n_0 ),
        .I3(reqInvHshktrackClearMask),
        .I4(\mask_reg[3]_1 ),
        .O(\invbuf_reg[0][0]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2347" *) 
  LUT3 #(
    .INIT(8'hFB)) 
    \mask[3]_i_2 
       (.I0(\invbuf_reg[0][7]_0 [2]),
        .I1(reqInvMemtrackSetMask),
        .I2(\invbuf_reg[0][7]_0 [3]),
        .O(\mask[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFBFFFFFFFF)) 
    \mask[3]_i_2__0 
       (.I0(\invbuf_reg[0][7]_0 [3]),
        .I1(reqInvHshktrackSetMask),
        .I2(\invbuf_reg[0][7]_0 [2]),
        .I3(reqInvHshktrackSet),
        .I4(reqInvHshktrackSelect),
        .I5(\invbuf_reg[0][7]_0 [1]),
        .O(\mask[3]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'h55FF0080)) 
    \mask[4]_i_1 
       (.I0(\mask_reg[7]_0 ),
        .I1(\invbuf_reg[0][1]_0 ),
        .I2(\mask[7]_i_2_n_0 ),
        .I3(reqInvMemtrackClearMask),
        .I4(\mask_reg[4]_2 ),
        .O(\mask_reg[4]_0 ));
  LUT5 #(
    .INIT(32'h55FF4000)) 
    \mask[4]_i_1__0 
       (.I0(reqInvHshktrackClearMask),
        .I1(\mask[5]_i_2__0_n_0 ),
        .I2(\mask[4]_i_2_n_0 ),
        .I3(\mask_reg[5]_1 ),
        .I4(\mask_reg[4]_1 ),
        .O(\mask_reg[4] ));
  (* SOFT_HLUTNM = "soft_lutpair2321" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \mask[4]_i_2 
       (.I0(reqInvHshktrackSelect),
        .I1(reqInvHshktrackSet),
        .I2(\invbuf_reg[0][7]_0 [1]),
        .I3(\invbuf_reg[0][7]_0 [0]),
        .O(\mask[4]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h55FF4000)) 
    \mask[5]_i_1 
       (.I0(reqInvMemtrackClearMask),
        .I1(\mask[7]_i_2_n_0 ),
        .I2(\mask[5]_i_2_n_0 ),
        .I3(\mask_reg[7]_0 ),
        .I4(\mask_reg[5]_3 ),
        .O(\mask_reg[5]_0 ));
  LUT5 #(
    .INIT(32'h55FF0080)) 
    \mask[5]_i_1__0 
       (.I0(\mask_reg[5]_1 ),
        .I1(\mask[5]_i_2__0_n_0 ),
        .I2(\mask[5]_i_3_n_0 ),
        .I3(reqInvHshktrackClearMask),
        .I4(\mask_reg[5]_2 ),
        .O(\mask_reg[5] ));
  (* SOFT_HLUTNM = "soft_lutpair2317" *) 
  LUT4 #(
    .INIT(16'h0010)) 
    \mask[5]_i_2 
       (.I0(reqInvMemtrackSelect),
        .I1(reqInvMemtrackSet),
        .I2(\invbuf_reg[0][7]_0 [0]),
        .I3(\invbuf_reg[0][7]_0 [1]),
        .O(\mask[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2355" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \mask[5]_i_2__0 
       (.I0(\invbuf_reg[0][7]_0 [2]),
        .I1(reqInvHshktrackSetMask),
        .I2(\invbuf_reg[0][7]_0 [3]),
        .O(\mask[5]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2321" *) 
  LUT4 #(
    .INIT(16'h0010)) 
    \mask[5]_i_3 
       (.I0(reqInvHshktrackSelect),
        .I1(reqInvHshktrackSet),
        .I2(\invbuf_reg[0][7]_0 [0]),
        .I3(\invbuf_reg[0][7]_0 [1]),
        .O(\mask[5]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h55FF0080)) 
    \mask[6]_i_1 
       (.I0(\mask_reg[7]_0 ),
        .I1(\mask[6]_i_2_n_0 ),
        .I2(\mask[7]_i_2_n_0 ),
        .I3(reqInvMemtrackClearMask),
        .I4(\mask_reg[6]_0 ),
        .O(\mask_reg[6] ));
  (* SOFT_HLUTNM = "soft_lutpair2318" *) 
  LUT4 #(
    .INIT(16'h0002)) 
    \mask[6]_i_2 
       (.I0(\invbuf_reg[0][7]_0 [1]),
        .I1(reqInvMemtrackSet),
        .I2(reqInvMemtrackSelect),
        .I3(\invbuf_reg[0][7]_0 [0]),
        .O(\mask[6]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h55FF0080)) 
    \mask[7]_i_1 
       (.I0(\mask_reg[7]_0 ),
        .I1(\mask[7]_i_2_n_0 ),
        .I2(\mask[7]_i_3_n_0 ),
        .I3(reqInvMemtrackClearMask),
        .I4(\mask_reg[7]_1 ),
        .O(\mask_reg[7] ));
  (* SOFT_HLUTNM = "soft_lutpair2354" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \mask[7]_i_2 
       (.I0(\invbuf_reg[0][7]_0 [2]),
        .I1(reqInvMemtrackSetMask),
        .I2(\invbuf_reg[0][7]_0 [3]),
        .O(\mask[7]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2317" *) 
  LUT4 #(
    .INIT(16'h1000)) 
    \mask[7]_i_3 
       (.I0(reqInvMemtrackSelect),
        .I1(reqInvMemtrackSet),
        .I2(\invbuf_reg[0][7]_0 [1]),
        .I3(\invbuf_reg[0][7]_0 [0]),
        .O(\mask[7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2318" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \mask[8]_i_3 
       (.I0(\invbuf_reg[0][7]_0 [1]),
        .I1(reqInvMemtrackSet),
        .I2(reqInvMemtrackSelect),
        .I3(\invbuf_reg[0][7]_0 [0]),
        .O(\invbuf_reg[0][1]_0 ));
  LUT6 #(
    .INIT(64'h0000200000000000)) 
    \mask[8]_i_4 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(\i2cRegaddr[15]_i_11_n_0 ),
        .O(reqInvMemtrackSetMask));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Crc8005_64 myCrc
       (.AXIS_tdata({AXIS_tdata[15:11],AXIS_tdata[7:0]}),
        .AXIS_tlast(AXIS_tlast),
        .AXIS_tvalid(AXIS_tvalid),
        .CO(\stateOp_reg[2]_i_6__0_n_5 ),
        .D({myCrc_n_3,myCrc_n_4,myCrc_n_5,myCrc_n_6,myCrc_n_7,myCrc_n_8,myCrc_n_9,myCrc_n_10}),
        .E(myCrc_n_1),
        .Q(\stateOp_reg[5]_0 ),
        .aclk_sig(aclk_sig),
        .\crcAXIS_tkeep_reg[2] (myCrc_n_347),
        .\crcAXIS_tkeep_reg[2]_0 (myCrc_n_348),
        .\crcAXIS_tkeep_reg[4] (myCrc_n_352),
        .\crcAXIS_tkeep_reg[4]_0 (myCrc_n_353),
        .\crcAXIS_tkeep_reg[6] (myCrc_n_350),
        .\crcAXIS_tkeep_reg[6]_0 (myCrc_n_351),
        .\crcAXIS_tkeep_reg[6]_1 (myCrc_n_354),
        .\crcAXIS_tkeep_reg[6]_2 (myCrc_n_355),
        .\crcAXIS_tkeep_reg[6]_3 (myCrc_n_356),
        .\crcAXIS_tkeep_reg[6]_4 (myCrc_n_357),
        .crc_imd0100_out(crc_imd0100_out),
        .crc_imd0112_out(crc_imd0112_out),
        .crc_imd0115_out(crc_imd0115_out),
        .crc_imd0118_out(crc_imd0118_out),
        .crc_imd0121_out(crc_imd0121_out),
        .crc_imd0124_out(crc_imd0124_out),
        .crc_imd0148_out(crc_imd0148_out),
        .crc_imd0149_out(crc_imd0149_out),
        .crc_imd0150_out(crc_imd0150_out),
        .crc_imd0151_out(crc_imd0151_out),
        .crc_imd0152_out(crc_imd0152_out),
        .crc_imd0165_out(crc_imd0165_out),
        .crc_imd0172_out(crc_imd0172_out),
        .crc_imd0173_out(crc_imd0173_out),
        .crc_imd0174_out(crc_imd0174_out),
        .crc_imd0175_out(crc_imd0175_out),
        .crc_imd0176_out(crc_imd0176_out),
        .crc_imd0198_out(crc_imd0198_out),
        .crc_imd0200_out(crc_imd0200_out),
        .crc_imd0202_out(crc_imd0202_out),
        .crc_imd041_out(crc_imd041_out),
        .crc_imd042_out(crc_imd042_out),
        .crc_imd043_out(crc_imd043_out),
        .crc_imd065_out(crc_imd065_out),
        .crc_imd066_out(crc_imd066_out),
        .crc_imd067_out(crc_imd067_out),
        .crc_imd068_out(crc_imd068_out),
        .crc_imd069_out(crc_imd069_out),
        .crc_imd081_out(crc_imd081_out),
        .crc_imd083_out(crc_imd083_out),
        .crc_imd085_out(crc_imd085_out),
        .crc_imd086_out(crc_imd086_out),
        .crc_imd087_out(crc_imd087_out),
        .\crc_imd[15]_i_18 (myRxtx_n_572),
        .\crc_imd[15]_i_21 ({\txAXIS_tdata_reg_n_0_[15] ,\txAXIS_tdata_reg_n_0_[12] ,\txAXIS_tdata_reg_n_0_[11] ,\txAXIS_tdata_reg_n_0_[10] ,\txAXIS_tdata_reg_n_0_[7] ,\txAXIS_tdata_reg_n_0_[0] }),
        .\crc_imd[15]_i_21_0 ({rxAXIS_tdata[15],rxAXIS_tdata[12:10],rxAXIS_tdata[7],rxAXIS_tdata[0]}),
        .\crc_imd_reg[0]_0 (myCrc_n_303),
        .\crc_imd_reg[0]_1 (\stateOp_reg[1]_6 ),
        .\crc_imd_reg[0]_2 (myRxtx_n_2),
        .\crc_imd_reg[0]_3 (AXIS_tkeep[7:1]),
        .\crc_imd_reg[0]_4 (crcAXIS_tlast_sig_reg_n_0),
        .\crc_imd_reg[0]_5 (myRxtx_n_581),
        .\crc_imd_reg[10]_0 (myCrc_n_316),
        .\crc_imd_reg[10]_1 (myCrc_n_320),
        .\crc_imd_reg[11]_0 ({myCrc_n_233,myCrc_n_234,myCrc_n_235,myCrc_n_236}),
        .\crc_imd_reg[11]_1 ({myCrc_n_263,myCrc_n_264,myCrc_n_265,myCrc_n_266}),
        .\crc_imd_reg[12]_0 (myCrc_n_333),
        .\crc_imd_reg[13]_0 ({myCrc_n_237,myCrc_n_238,myCrc_n_239,myCrc_n_240}),
        .\crc_imd_reg[13]_1 (myCrc_n_312),
        .\crc_imd_reg[13]_2 (myCrc_n_332),
        .\crc_imd_reg[14]_0 ({myCrc_n_36,myCrc_n_37,myCrc_n_38,myCrc_n_39,myCrc_n_40}),
        .\crc_imd_reg[14]_1 ({myCrc_n_241,myCrc_n_242,myCrc_n_243,myCrc_n_244,myCrc_n_245,myCrc_n_246,myCrc_n_247}),
        .\crc_imd_reg[14]_2 (myCrc_n_310),
        .\crc_imd_reg[14]_3 (myCrc_n_345),
        .\crc_imd_reg[15]_0 ({p_1_in,myCrc_n_19,myCrc_n_20,myCrc_n_21,myCrc_n_22,myCrc_n_23,myCrc_n_24,myCrc_n_25,myCrc_n_26}),
        .\crc_imd_reg[15]_1 ({myCrc_n_27,myCrc_n_28,myCrc_n_29,myCrc_n_30,myCrc_n_31,myCrc_n_32,myCrc_n_33}),
        .\crc_imd_reg[15]_10 (myCrc_n_323),
        .\crc_imd_reg[15]_11 (myCrc_n_331),
        .\crc_imd_reg[15]_12 (myCrc_n_346),
        .\crc_imd_reg[15]_13 (myCrc_n_359),
        .\crc_imd_reg[15]_14 ({myRxtx_n_557,myRxtx_n_558,myRxtx_n_559,myRxtx_n_560,myRxtx_n_561,myRxtx_n_562,myRxtx_n_563}),
        .\crc_imd_reg[15]_2 ({myCrc_n_41,myCrc_n_42,myCrc_n_43,myCrc_n_44,myCrc_n_45,myCrc_n_46,myCrc_n_47,myCrc_n_48}),
        .\crc_imd_reg[15]_3 ({myCrc_n_49,myCrc_n_50,myCrc_n_51,myCrc_n_52,myCrc_n_53,myCrc_n_54,myCrc_n_55,myCrc_n_56}),
        .\crc_imd_reg[15]_4 ({myCrc_n_57,myCrc_n_58,myCrc_n_59,myCrc_n_60,myCrc_n_61,myCrc_n_62,myCrc_n_63,myCrc_n_64}),
        .\crc_imd_reg[15]_5 ({myCrc_n_65,myCrc_n_66,myCrc_n_67,myCrc_n_68,myCrc_n_69,myCrc_n_70,myCrc_n_71,myCrc_n_72}),
        .\crc_imd_reg[15]_6 ({myCrc_n_81,myCrc_n_82,myCrc_n_83,myCrc_n_84,myCrc_n_85,myCrc_n_86,myCrc_n_87,myCrc_n_88}),
        .\crc_imd_reg[15]_7 ({myCrc_n_89,myCrc_n_90,myCrc_n_91,myCrc_n_92,myCrc_n_93,myCrc_n_94,myCrc_n_95,myCrc_n_96}),
        .\crc_imd_reg[15]_8 ({myCrc_n_209,myCrc_n_210,myCrc_n_211,myCrc_n_212,myCrc_n_213,myCrc_n_214,myCrc_n_215,myCrc_n_216}),
        .\crc_imd_reg[15]_9 ({myCrc_n_217,myCrc_n_218,myCrc_n_219,myCrc_n_220,myCrc_n_221,myCrc_n_222,myCrc_n_223,myCrc_n_224}),
        .\crc_imd_reg[2]_0 (myCrc_n_301),
        .\crc_imd_reg[2]_1 (myCrc_n_365),
        .\crc_imd_reg[3]_0 (myCrc_n_300),
        .\crc_imd_reg[3]_1 (myCrc_n_361),
        .\crc_imd_reg[3]_2 (myCrc_n_362),
        .\crc_imd_reg[3]_3 (myRxtx_n_564),
        .\crc_imd_reg[3]_4 (myRxtx_n_575),
        .\crc_imd_reg[4]_0 (myCrc_n_299),
        .\crc_imd_reg[4]_1 (myCrc_n_363),
        .\crc_imd_reg[5]_0 (myRxtx_n_567),
        .\crc_imd_reg[6]_0 (myCrc_n_297),
        .\crc_imd_reg[6]_1 (myCrc_n_358),
        .\crc_imd_reg[6]_2 (myRxtx_n_568),
        .\crc_imd_reg[7]_0 ({myCrc_n_73,myCrc_n_74,myCrc_n_75,myCrc_n_76,myCrc_n_77,myCrc_n_78,myCrc_n_79,myCrc_n_80}),
        .\crc_imd_reg[7]_1 ({myCrc_n_97,myCrc_n_98,myCrc_n_99,myCrc_n_100,myCrc_n_101,myCrc_n_102,myCrc_n_103,myCrc_n_104}),
        .\crc_imd_reg[7]_10 ({myCrc_n_169,myCrc_n_170,myCrc_n_171,myCrc_n_172,myCrc_n_173,myCrc_n_174,myCrc_n_175,myCrc_n_176}),
        .\crc_imd_reg[7]_11 ({myCrc_n_177,myCrc_n_178,myCrc_n_179,myCrc_n_180,myCrc_n_181,myCrc_n_182,myCrc_n_183,myCrc_n_184}),
        .\crc_imd_reg[7]_12 ({myCrc_n_185,myCrc_n_186,myCrc_n_187,myCrc_n_188,myCrc_n_189,myCrc_n_190,myCrc_n_191,myCrc_n_192}),
        .\crc_imd_reg[7]_13 ({myCrc_n_193,myCrc_n_194,myCrc_n_195,myCrc_n_196,myCrc_n_197,myCrc_n_198,myCrc_n_199,myCrc_n_200}),
        .\crc_imd_reg[7]_14 ({myCrc_n_201,myCrc_n_202,myCrc_n_203,myCrc_n_204,myCrc_n_205,myCrc_n_206,myCrc_n_207,myCrc_n_208}),
        .\crc_imd_reg[7]_15 ({myCrc_n_225,myCrc_n_226,myCrc_n_227,myCrc_n_228,myCrc_n_229,myCrc_n_230,myCrc_n_231,myCrc_n_232}),
        .\crc_imd_reg[7]_16 ({myCrc_n_248,myCrc_n_249,myCrc_n_250,myCrc_n_251,myCrc_n_252,myCrc_n_253,myCrc_n_254,myCrc_n_255}),
        .\crc_imd_reg[7]_17 ({myCrc_n_256,myCrc_n_257,myCrc_n_258,myCrc_n_259,myCrc_n_260,myCrc_n_261}),
        .\crc_imd_reg[7]_18 (myCrc_n_296),
        .\crc_imd_reg[7]_19 (myCrc_n_364),
        .\crc_imd_reg[7]_2 ({myCrc_n_105,myCrc_n_106,myCrc_n_107,myCrc_n_108,myCrc_n_109,myCrc_n_110,myCrc_n_111,myCrc_n_112}),
        .\crc_imd_reg[7]_20 (myRxtx_n_571),
        .\crc_imd_reg[7]_21 (myRxtx_n_570),
        .\crc_imd_reg[7]_22 (myRxtx_n_598),
        .\crc_imd_reg[7]_23 (myRxtx_n_569),
        .\crc_imd_reg[7]_3 ({myCrc_n_113,myCrc_n_114,myCrc_n_115,myCrc_n_116,myCrc_n_117,myCrc_n_118,myCrc_n_119,myCrc_n_120}),
        .\crc_imd_reg[7]_4 ({myCrc_n_121,myCrc_n_122,myCrc_n_123,myCrc_n_124,myCrc_n_125,myCrc_n_126,myCrc_n_127,myCrc_n_128}),
        .\crc_imd_reg[7]_5 ({myCrc_n_129,myCrc_n_130,myCrc_n_131,myCrc_n_132,myCrc_n_133,myCrc_n_134,myCrc_n_135,myCrc_n_136}),
        .\crc_imd_reg[7]_6 ({myCrc_n_137,myCrc_n_138,myCrc_n_139,myCrc_n_140,myCrc_n_141,myCrc_n_142,myCrc_n_143,myCrc_n_144}),
        .\crc_imd_reg[7]_7 ({myCrc_n_145,myCrc_n_146,myCrc_n_147,myCrc_n_148,myCrc_n_149,myCrc_n_150,myCrc_n_151,myCrc_n_152}),
        .\crc_imd_reg[7]_8 ({myCrc_n_153,myCrc_n_154,myCrc_n_155,myCrc_n_156,myCrc_n_157,myCrc_n_158,myCrc_n_159,myCrc_n_160}),
        .\crc_imd_reg[7]_9 ({myCrc_n_161,myCrc_n_162,myCrc_n_163,myCrc_n_164,myCrc_n_165,myCrc_n_166,myCrc_n_167,myCrc_n_168}),
        .\crc_imd_reg[8]_0 (myCrc_n_262),
        .\crc_imd_reg[8]_1 (myCrc_n_319),
        .\crc_imd_reg[8]_2 (myCrc_n_335),
        .\crc_imd_reg[8]_3 (myCrc_n_360),
        .\crc_imd_reg[9]_0 (myCrc_n_304),
        .\crc_imd_reg[9]_1 (myCrc_n_334),
        .\len_reg[0] (\tixVBuffer[7]_i_3_n_0 ),
        .\len_reg[0]_0 (\tixVBuffer[7]_i_4_n_0 ),
        .\opbuf_reg[2][0] (tixVCommand),
        .p_10_out(p_10_out),
        .p_136_in(p_136_in),
        .\pollbuf_reg[0][4] (myCrc_n_321),
        .\pollbuf_reg[0][6] (myCrc_n_322),
        .\recvAXIS_tdata_sig_reg[11] (myCrc_n_349),
        .recvAXIS_tlast(recvAXIS_tlast),
        .\resid_reg[0] (myCrc_n_324),
        .\resid_reg[0]_0 (myCrc_n_325),
        .\resid_reg[0]_1 (myCrc_n_326),
        .\resid_reg[0]_2 (myCrc_n_327),
        .\resid_reg[0]_3 (myCrc_n_328),
        .\resid_reg[0]_4 (myCrc_n_329),
        .\resid_reg[0]_5 (myCrc_n_330),
        .\resid_reg[1] (myCrc_n_336),
        .\resid_reg[1]_0 (myCrc_n_337),
        .\resid_reg[1]_1 (myCrc_n_338),
        .\resid_reg[2] (myCrc_n_339),
        .\resid_reg[2]_0 (myCrc_n_340),
        .\resid_reg[2]_1 (myCrc_n_341),
        .\resid_reg[2]_2 (myCrc_n_342),
        .\resid_reg[2]_3 (myCrc_n_343),
        .\resid_reg[2]_4 (myCrc_n_344),
        .\retbuf_reg[0][0] (resid),
        .\retbuf_reg[0][0]_0 (\retbuf[0][7]_i_11_n_0 ),
        .\retbuf_reg[0][1] (\retbuf[0][7]_i_8_n_0 ),
        .\retbuf_reg[0][1]_0 (\retbuf[0][1]_i_2_n_0 ),
        .\retbuf_reg[0][3] (\retbuf[0][3]_i_2_n_0 ),
        .\retbuf_reg[0][4] (\retbuf[0][4]_i_2__0_n_0 ),
        .\retbuf_reg[0][5] (\retbuf[0][5]_i_2_n_0 ),
        .\retbuf_reg[0][6] (myRxtx_n_4),
        .\retbuf_reg[0][6]_0 (\retbuf[0][6]_i_3__0_n_0 ),
        .\retbuf_reg[0][7] (myRxtx_n_402),
        .\retbuf_reg[11][0] (\retbuf[11][7]_i_4_n_0 ),
        .\retbuf_reg[15][0] (\retbuf[15][7]_i_4_n_0 ),
        .\retbuf_reg[16][0] (\retbuf[16][7]_i_4_n_0 ),
        .\retbuf_reg[16][1] (\retbuf[16][7]_i_7_n_0 ),
        .\retbuf_reg[17][0] (\retbuf[17][5]_i_2_n_0 ),
        .\retbuf_reg[17][1] (\retbuf[17][7]_i_4_n_0 ),
        .\retbuf_reg[18][0] (\retbuf[18][7]_i_4_n_0 ),
        .\retbuf_reg[18][5] (\retbuf[17][7]_i_3_n_0 ),
        .\retbuf_reg[19][0] (\retbuf[19][7]_i_4_n_0 ),
        .\retbuf_reg[19][5] (\retbuf[18][7]_i_3_n_0 ),
        .\retbuf_reg[1][0] (\retbuf[1][7]_i_7_n_0 ),
        .\retbuf_reg[1][0]_0 (\retbuf[1][0]_i_2_n_0 ),
        .\retbuf_reg[1][1] (\retbuf[1][1]_i_2_n_0 ),
        .\retbuf_reg[1][2] (\retbuf[1][2]_i_2_n_0 ),
        .\retbuf_reg[1][3] (\retbuf[1][3]_i_2_n_0 ),
        .\retbuf_reg[1][4] (\retbuf[1][4]_i_2_n_0 ),
        .\retbuf_reg[1][5] (\retbuf[1][5]_i_2_n_0 ),
        .\retbuf_reg[1][6] (\retbuf[1][6]_i_2_n_0 ),
        .\retbuf_reg[1][7] (myRxtx_n_346),
        .\retbuf_reg[1][7]_0 (\retbuf[1][7]_i_8_n_0 ),
        .\retbuf_reg[1][7]_1 (myRxtx_n_345),
        .\retbuf_reg[20][0] (\retbuf[19][7]_i_3_n_0 ),
        .\retbuf_reg[20][1] (\retbuf[20][7]_i_4_n_0 ),
        .\retbuf_reg[21][0] (\retbuf[21][7]_i_4_n_0 ),
        .\retbuf_reg[21][3] (\retbuf[20][7]_i_3_n_0 ),
        .\retbuf_reg[22][0] (\retbuf[21][7]_i_3_n_0 ),
        .\retbuf_reg[22][1] (\retbuf[22][7]_i_4_n_0 ),
        .\retbuf_reg[23][0] (\retbuf[23][7]_i_4_n_0 ),
        .\retbuf_reg[23][1] (\retbuf[22][7]_i_3_n_0 ),
        .\retbuf_reg[24][0] (\retbuf[23][7]_i_3_n_0 ),
        .\retbuf_reg[24][1] (\retbuf[24][7]_i_4_n_0 ),
        .\retbuf_reg[25][0] (\retbuf[24][7]_i_3_n_0 ),
        .\retbuf_reg[25][1] (\retbuf[25][7]_i_4_n_0 ),
        .\retbuf_reg[26][0] (\retbuf[26][7]_i_4_n_0 ),
        .\retbuf_reg[26][1] (\retbuf[25][7]_i_3_n_0 ),
        .\retbuf_reg[27][0] (\retbuf[27][7]_i_4_n_0 ),
        .\retbuf_reg[27][5] (\retbuf[26][7]_i_3_n_0 ),
        .\retbuf_reg[28][0] (\retbuf[27][7]_i_3_n_0 ),
        .\retbuf_reg[28][1] (\retbuf[28][7]_i_4_n_0 ),
        .\retbuf_reg[29][0] (\retbuf[28][7]_i_3_n_0 ),
        .\retbuf_reg[2][0] (\retbuf[2][7]_i_4__0_n_0 ),
        .\retbuf_reg[2][0]_0 (\retbuf[2][0]_i_2_n_0 ),
        .\retbuf_reg[2][1] (\retbuf[2][1]_i_2_n_0 ),
        .\retbuf_reg[2][2] (\retbuf[2][2]_i_2_n_0 ),
        .\retbuf_reg[2][3] (\retbuf[2][3]_i_2_n_0 ),
        .\retbuf_reg[2][4] (\retbuf[2][4]_i_2_n_0 ),
        .\retbuf_reg[2][5] (\retbuf[2][5]_i_2_n_0 ),
        .\retbuf_reg[2][6] (\retbuf[2][6]_i_2_n_0 ),
        .\retbuf_reg[30][0] (\retbuf[30][7]_i_5_n_0 ),
        .\retbuf_reg[30][1] (myRxtx_n_36),
        .\retbuf_reg[30][1]_0 (\retbuf[30][7]_i_3_n_0 ),
        .\retbuf_reg[31][0] (\retbuf[30][7]_i_4_n_0 ),
        .\retbuf_reg[32][0] (\retbuf[32][7]_i_4_n_0 ),
        .\retbuf_reg[32][4] (\retbuf[32][6]_i_3_n_0 ),
        .\retbuf_reg[32][6] (myRxtx_n_54),
        .\retbuf_reg[33][0] (\retbuf[32][7]_i_3_n_0 ),
        .\retbuf_reg[34][0] (\retbuf[34][7]_i_4_n_0 ),
        .\retbuf_reg[34][7] (\retbuf[34][7]_i_5_n_0 ),
        .\retbuf_reg[35][0] (\retbuf[35][7]_i_4_n_0 ),
        .\retbuf_reg[35][5] (\retbuf[16][5]_i_2_n_0 ),
        .\retbuf_reg[35][5]_0 (\retbuf[34][7]_i_3_n_0 ),
        .\retbuf_reg[36][0] (\retbuf[36][7]_i_5_n_0 ),
        .\retbuf_reg[37][0] (\retbuf[37][7]_i_4_n_0 ),
        .\retbuf_reg[38][0] (\retbuf[38][7]_i_6_n_0 ),
        .\retbuf_reg[39][0] (\retbuf[39][7]_i_6_n_0 ),
        .\retbuf_reg[3][0] (\retbuf[3][5]_i_2_n_0 ),
        .\retbuf_reg[3][0]_0 (\retbuf[3][0]_i_2_n_0 ),
        .\retbuf_reg[3][1] (\retbuf[3][1]_i_2_n_0 ),
        .\retbuf_reg[3][4] (\retbuf[3][4]_i_2_n_0 ),
        .\retbuf_reg[3][5] (myRxtx_n_13),
        .\retbuf_reg[3][5]_0 (\retbuf[3][5]_i_3_n_0 ),
        .\retbuf_reg[3][7] (\retbuf[3][7]_i_15_n_0 ),
        .\retbuf_reg[4][1] (myRxtx_n_400),
        .\retbuf_reg[4][2] (myRxtx_n_401),
        .\retbuf_reg[4][4] (\retbuf[4][4]_i_2_n_0 ),
        .\retbuf_reg[4][5] (\retbuf[4][5]_i_2_n_0 ),
        .\retbuf_reg[4][6] (\retbuf[0][6]_i_2__0_n_0 ),
        .\retbuf_reg[4][6]_0 (\retbuf[4][6]_i_2_n_0 ),
        .\retbuf_reg[4][6]_1 (\retbuf[4][6]_i_3_n_0 ),
        .\retbuf_reg[5][0] (\retbuf[5][0]_i_2_n_0 ),
        .\retbuf_reg[5][1] (\retbuf[5][1]_i_2_n_0 ),
        .\retbuf_reg[5][2] (\retbuf[5][2]_i_2_n_0 ),
        .\retbuf_reg[5][3] (\retbuf[5][3]_i_2_n_0 ),
        .\retbuf_reg[5][4] (\retbuf[5][4]_i_2_n_0 ),
        .\retbuf_reg[5][5] (\retbuf[5][5]_i_2__0_n_0 ),
        .\retbuf_reg[5][6] (\retbuf[5][6]_i_2_n_0 ),
        .\retbuf_reg[5][7] (\retbuf[5][7]_i_5_n_0 ),
        .\retbuf_reg[5][7]_0 (\retbuf[5][7]_i_6_n_0 ),
        .\retbuf_reg[6][0] (myRxtx_n_1),
        .\retbuf_reg[6][0]_0 (\retbuf[6][0]_i_2_n_0 ),
        .\retbuf_reg[6][1] (\retbuf[6][1]_i_2_n_0 ),
        .\retbuf_reg[6][2] (\retbuf[6][2]_i_2_n_0 ),
        .\retbuf_reg[6][3] (\retbuf[6][3]_i_2_n_0 ),
        .\retbuf_reg[6][4] (\retbuf[6][4]_i_2_n_0 ),
        .\retbuf_reg[6][5] (\retbuf[5][7]_i_11_n_0 ),
        .\retbuf_reg[6][6] (\retbuf[6][6]_i_2_n_0 ),
        .\retbuf_reg[6][7] (\retbuf[6][7]_i_4_n_0 ),
        .\retbuf_reg[6][7]_0 (\retbuf[6][7]_i_5_n_0 ),
        .\retbuf_reg[7][3] (\retbuf[7][3]_i_2_n_0 ),
        .\retbuf_reg[7][3]_0 (\retbuf[7][7]_i_6_n_0 ),
        .\retbuf_reg[7][5] (\retbuf[6][7]_i_6_n_0 ),
        .\stateOp_reg[0] (myCrc_n_34),
        .\stateOp_reg[0]_0 (\stateOp[0]_i_8_n_0 ),
        .\stateOp_reg[0]_1 (\stateOp[0]_i_7_n_0 ),
        .\stateOp_reg[1] ({myCrc_n_267,myCrc_n_268,myCrc_n_269,myCrc_n_270,myCrc_n_271,myCrc_n_272,myCrc_n_273,myCrc_n_274,myCrc_n_275,myCrc_n_276,myCrc_n_277,myCrc_n_278,myCrc_n_279,myCrc_n_280,myCrc_n_281,myCrc_n_282,myCrc_n_283,myCrc_n_284}),
        .\stateOp_reg[1]_0 (myCrc_n_289),
        .\stateOp_reg[1]_1 (myCrc_n_290),
        .\stateOp_reg[1]_2 (myCrc_n_295),
        .\stateOp_reg[2] (myCrc_n_288),
        .\stateOp_reg[2]_0 (\crcAXIS_tkeep_reg[1]_i_2_n_5 ),
        .\stateOp_reg[2]_1 (myRxtx_n_552),
        .\stateOp_reg[3] (myCrc_n_287),
        .\stateOp_reg[3]_0 (myCrc_n_291),
        .\stateOp_reg[3]_1 (myCrc_n_292),
        .\stateOp_reg[3]_2 (myCrc_n_298),
        .\stateOp_reg[3]_3 (myCrc_n_302),
        .\stateOp_reg[4] (myCrc_n_2),
        .\stateOp_reg[4]_0 (myCrc_n_293),
        .\stateOp_reg[4]_1 (myCrc_n_294),
        .\stateOp_reg[5] (myCrc_n_285),
        .\stateOp_reg[5]_0 (myCrc_n_286),
        .\stateOp_reg[5]_1 ({\stateOp_next_reg_n_0_[5] ,\stateOp_next_reg_n_0_[0] }),
        .\stateOp_reg[5]_2 (\stateOp[5]_i_19_n_0 ),
        .\stateOp_reg[5]_3 (\stateOp[5]_i_20_n_0 ),
        .\stateOp_reg[5]_4 (\stateOp[5]_i_21_n_0 ),
        .\stateOp_reg[5]_5 (\stateOp[5]_i_22_n_0 ),
        .stateOp_reg_0(myCrc_n_0),
        .stateOp_reg_1(myRxtx_n_608),
        .\tixVBuffer_reg[7] (myCrc_n_305),
        .\tixVBuffer_reg[7]_0 (myCrc_n_306),
        .\tixVBuffer_reg[7]_1 (myCrc_n_307),
        .\tixVBuffer_reg[7]_2 (myCrc_n_308),
        .\tixVBuffer_reg[7]_3 (myCrc_n_309),
        .\tixVBuffer_reg[7]_4 (myCrc_n_311),
        .\tixVBuffer_reg[7]_5 (myCrc_n_313),
        .\tixVBuffer_reg[7]_6 (myCrc_n_314),
        .\tixVBuffer_reg[7]_7 (myCrc_n_315),
        .\tixVBuffer_reg[7]_8 (myCrc_n_317),
        .\tixVBuffer_reg[7]_9 (myCrc_n_318),
        .\tixVCommand_reg[0] (\tixVController[7]_i_3_n_0 ),
        .\tixVCommand_reg[0]_0 (\opbuf_reg_n_0_[2][0] ),
        .\txAXIS_tdata[0]_i_2_0 (\txAXIS_tdata[0]_i_5__0_n_0 ),
        .\txAXIS_tdata[0]_i_2_1 (\txAXIS_tdata[0]_i_6_n_0 ),
        .\txAXIS_tdata[0]_i_2_2 (\txAXIS_tdata[0]_i_7_n_0 ),
        .\txAXIS_tdata[15]_i_6_0 (\pollbuf_reg[1]_67 ),
        .\txAXIS_tdata[2]_i_3_0 (\txAXIS_tdata[2]_i_10_n_0 ),
        .\txAXIS_tdata_reg[0] (\txAXIS_tdata[55]_i_6_n_0 ),
        .\txAXIS_tdata_reg[0]_0 (\txAXIS_tdata[0]_i_3_n_0 ),
        .\txAXIS_tdata_reg[0]_1 (\txAXIS_tdata[6]_i_7__0_n_0 ),
        .\txAXIS_tdata_reg[10] (\txAXIS_tdata[10]_i_3_n_0 ),
        .\txAXIS_tdata_reg[10]_0 (\txAXIS_tdata[10]_i_4_n_0 ),
        .\txAXIS_tdata_reg[10]_1 (\txAXIS_tdata[10]_i_5_n_0 ),
        .\txAXIS_tdata_reg[11] (\txAXIS_tdata[11]_i_3_n_0 ),
        .\txAXIS_tdata_reg[11]_0 (\txAXIS_tdata[11]_i_4_n_0 ),
        .\txAXIS_tdata_reg[11]_1 (\txAXIS_tdata[11]_i_5_n_0 ),
        .\txAXIS_tdata_reg[12] (\txAXIS_tdata[12]_i_3_n_0 ),
        .\txAXIS_tdata_reg[12]_0 (\txAXIS_tdata[12]_i_4_n_0 ),
        .\txAXIS_tdata_reg[12]_1 (\txAXIS_tdata[12]_i_5_n_0 ),
        .\txAXIS_tdata_reg[13] (\txAXIS_tdata[13]_i_3_n_0 ),
        .\txAXIS_tdata_reg[13]_0 (\txAXIS_tdata[13]_i_4_n_0 ),
        .\txAXIS_tdata_reg[13]_1 (\txAXIS_tdata[13]_i_5_n_0 ),
        .\txAXIS_tdata_reg[14] (\txAXIS_tdata[14]_i_3_n_0 ),
        .\txAXIS_tdata_reg[14]_0 (\txAXIS_tdata[14]_i_4_n_0 ),
        .\txAXIS_tdata_reg[14]_1 (\txAXIS_tdata[14]_i_5_n_0 ),
        .\txAXIS_tdata_reg[15] (\txAXIS_tdata[15]_i_7_n_0 ),
        .\txAXIS_tdata_reg[15]_0 (\txAXIS_tdata[15]_i_14_n_0 ),
        .\txAXIS_tdata_reg[15]_1 (\txAXIS_tdata[15]_i_15_n_0 ),
        .\txAXIS_tdata_reg[1] (\txAXIS_tdata[1]_i_5_n_0 ),
        .\txAXIS_tdata_reg[1]_0 (myRxtx_n_484),
        .\txAXIS_tdata_reg[1]_1 (\txAXIS_tdata[5]_i_3_n_0 ),
        .\txAXIS_tdata_reg[1]_2 (\txAXIS_tdata[1]_i_4_n_0 ),
        .\txAXIS_tdata_reg[1]_3 (\txAXIS_tdata[7]_i_8_n_0 ),
        .\txAXIS_tdata_reg[1]_4 (\retbuf[36][7]_i_4_n_0 ),
        .\txAXIS_tdata_reg[2] (\txAXIS_tdata[29]_i_7_n_0 ),
        .\txAXIS_tdata_reg[32] (\txAXIS_tdata[32]_i_5_n_0 ),
        .\txAXIS_tdata_reg[33] (\txAXIS_tdata[33]_i_5_n_0 ),
        .\txAXIS_tdata_reg[34] (\txAXIS_tdata[34]_i_5_n_0 ),
        .\txAXIS_tdata_reg[35] (\txAXIS_tdata[35]_i_5_n_0 ),
        .\txAXIS_tdata_reg[36] (\txAXIS_tdata[36]_i_5_n_0 ),
        .\txAXIS_tdata_reg[37] (\txAXIS_tdata[37]_i_5_n_0 ),
        .\txAXIS_tdata_reg[38] (\txAXIS_tdata[38]_i_5_n_0 ),
        .\txAXIS_tdata_reg[39] (\txAXIS_tdata[39]_i_8_n_0 ),
        .\txAXIS_tdata_reg[39]_0 (\txAXIS_tdata[39]_i_9_n_0 ),
        .\txAXIS_tdata_reg[3] ({\retbuf_reg_n_0_[32][3] ,\retbuf_reg_n_0_[32][1] ,\retbuf_reg_n_0_[32][0] }),
        .\txAXIS_tdata_reg[3]_0 (\txAXIS_tdata[3]_i_5_n_0 ),
        .\txAXIS_tdata_reg[3]_1 (\txAXIS_tdata[3]_i_4_n_0 ),
        .\txAXIS_tdata_reg[40] (\txAXIS_tdata[40]_i_2_n_0 ),
        .\txAXIS_tdata_reg[40]_0 (\txAXIS_tdata[40]_i_5_n_0 ),
        .\txAXIS_tdata_reg[40]_1 (\txAXIS_tdata[40]_i_6_n_0 ),
        .\txAXIS_tdata_reg[41] (\txAXIS_tdata[41]_i_2_n_0 ),
        .\txAXIS_tdata_reg[41]_0 (\txAXIS_tdata[41]_i_5_n_0 ),
        .\txAXIS_tdata_reg[41]_1 (\txAXIS_tdata[41]_i_6_n_0 ),
        .\txAXIS_tdata_reg[42] (\txAXIS_tdata[42]_i_2_n_0 ),
        .\txAXIS_tdata_reg[42]_0 (\txAXIS_tdata[42]_i_5_n_0 ),
        .\txAXIS_tdata_reg[42]_1 (\txAXIS_tdata[42]_i_6_n_0 ),
        .\txAXIS_tdata_reg[43] (\txAXIS_tdata[43]_i_2_n_0 ),
        .\txAXIS_tdata_reg[43]_0 (\txAXIS_tdata[43]_i_5_n_0 ),
        .\txAXIS_tdata_reg[43]_1 (\txAXIS_tdata[43]_i_6_n_0 ),
        .\txAXIS_tdata_reg[44] (\txAXIS_tdata[44]_i_2_n_0 ),
        .\txAXIS_tdata_reg[44]_0 (\txAXIS_tdata[44]_i_5_n_0 ),
        .\txAXIS_tdata_reg[44]_1 (\txAXIS_tdata[44]_i_6_n_0 ),
        .\txAXIS_tdata_reg[45] (\txAXIS_tdata[45]_i_2_n_0 ),
        .\txAXIS_tdata_reg[45]_0 (\txAXIS_tdata[45]_i_5_n_0 ),
        .\txAXIS_tdata_reg[45]_1 (\txAXIS_tdata[45]_i_6_n_0 ),
        .\txAXIS_tdata_reg[46] (\txAXIS_tdata[46]_i_2_n_0 ),
        .\txAXIS_tdata_reg[46]_0 (\txAXIS_tdata[46]_i_5_n_0 ),
        .\txAXIS_tdata_reg[46]_1 (\txAXIS_tdata[46]_i_6_n_0 ),
        .\txAXIS_tdata_reg[47] (\txAXIS_tdata[47]_i_4_n_0 ),
        .\txAXIS_tdata_reg[47]_0 (\pollbuf[0][7]_i_7_n_0 ),
        .\txAXIS_tdata_reg[47]_1 (\txAXIS_tdata[47]_i_7_n_0 ),
        .\txAXIS_tdata_reg[47]_2 (\txAXIS_tdata[47]_i_8_n_0 ),
        .\txAXIS_tdata_reg[48] (\txAXIS_tdata[48]_i_5_n_0 ),
        .\txAXIS_tdata_reg[48]_0 (\txAXIS_tdata[48]_i_6_n_0 ),
        .\txAXIS_tdata_reg[49] (\txAXIS_tdata[49]_i_5_n_0 ),
        .\txAXIS_tdata_reg[49]_0 (\txAXIS_tdata[49]_i_6_n_0 ),
        .\txAXIS_tdata_reg[4] (\txAXIS_tdata[6]_i_9_n_0 ),
        .\txAXIS_tdata_reg[4]_0 (\txAXIS_tdata[6]_i_10_n_0 ),
        .\txAXIS_tdata_reg[50] (\txAXIS_tdata[50]_i_5_n_0 ),
        .\txAXIS_tdata_reg[50]_0 (\txAXIS_tdata[50]_i_6_n_0 ),
        .\txAXIS_tdata_reg[51] (\txAXIS_tdata[51]_i_5_n_0 ),
        .\txAXIS_tdata_reg[51]_0 (\txAXIS_tdata[51]_i_6_n_0 ),
        .\txAXIS_tdata_reg[52] (\txAXIS_tdata[52]_i_5_n_0 ),
        .\txAXIS_tdata_reg[52]_0 (\txAXIS_tdata[52]_i_6_n_0 ),
        .\txAXIS_tdata_reg[53] (\txAXIS_tdata[53]_i_5_n_0 ),
        .\txAXIS_tdata_reg[53]_0 (\txAXIS_tdata[53]_i_6_n_0 ),
        .\txAXIS_tdata_reg[54] (\txAXIS_tdata[54]_i_5_n_0 ),
        .\txAXIS_tdata_reg[54]_0 (\txAXIS_tdata[54]_i_6_n_0 ),
        .\txAXIS_tdata_reg[55] (\txAXIS_tdata[55]_i_10_n_0 ),
        .\txAXIS_tdata_reg[55]_0 (\txAXIS_tdata[55]_i_11_n_0 ),
        .\txAXIS_tdata_reg[55]_1 (\txAXIS_tdata[55]_i_13_n_0 ),
        .\txAXIS_tdata_reg[58] (\txAXIS_tdata[58]_i_5_n_0 ),
        .\txAXIS_tdata_reg[58]_0 (\txAXIS_tdata[58]_i_6_n_0 ),
        .\txAXIS_tdata_reg[59] (\txAXIS_tdata[59]_i_5_n_0 ),
        .\txAXIS_tdata_reg[59]_0 (\txAXIS_tdata[59]_i_6_n_0 ),
        .\txAXIS_tdata_reg[5] (\txAXIS_tdata[5]_i_6_n_0 ),
        .\txAXIS_tdata_reg[62] (\txAXIS_tdata[63]_i_13_n_0 ),
        .\txAXIS_tdata_reg[62]_0 (\txAXIS_tdata[63]_i_12_n_0 ),
        .\txAXIS_tdata_reg[62]_1 (\txAXIS_tdata[62]_i_5_n_0 ),
        .\txAXIS_tdata_reg[62]_2 (\txAXIS_tdata[62]_i_6_n_0 ),
        .\txAXIS_tdata_reg[7] (\txAXIS_tdata[7]_i_3_n_0 ),
        .\txAXIS_tdata_reg[7]_0 (\stateOp_next[5]_i_3_n_0 ),
        .\txAXIS_tdata_reg[7]_1 (\txAXIS_tdata[7]_i_4_n_0 ),
        .\txAXIS_tdata_reg[7]_2 (myRxtx_n_485),
        .\txAXIS_tdata_reg[7]_3 (\txAXIS_tdata[7]_i_9__0_n_0 ),
        .\txAXIS_tdata_reg[7]_4 (\txAXIS_tdata[7]_i_10__0_n_0 ),
        .\txAXIS_tdata_reg[7]_5 (\txAXIS_tdata[7]_i_11_n_0 ),
        .\txAXIS_tdata_reg[7]_6 (\pollbuf_reg[0]_66 ),
        .\txAXIS_tdata_reg[8] (\txAXIS_tdata[15]_i_8_n_0 ),
        .\txAXIS_tdata_reg[8]_0 (\txAXIS_tdata[8]_i_3_n_0 ),
        .\txAXIS_tdata_reg[8]_1 (\txAXIS_tdata[8]_i_4_n_0 ),
        .\txAXIS_tdata_reg[8]_2 (\txAXIS_tdata[8]_i_5_n_0 ),
        .\txAXIS_tdata_reg[9] (\txAXIS_tdata[9]_i_3_n_0 ),
        .\txAXIS_tdata_reg[9]_0 (\txAXIS_tdata[9]_i_4_n_0 ),
        .\txAXIS_tdata_reg[9]_1 (\txAXIS_tdata[9]_i_5_n_0 ),
        .\txlen_reg[28] (\wordcntLast[28]_i_5_n_0 ),
        .\txlen_reg[28]_0 (\txlen[28]_i_4_n_0 ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Axislave_v1_0 myRxtx
       (.AXIL_arready(AXIL_arready),
        .AXIL_awready_sig_reg_0(AXIL_awready_sig_reg),
        .AXIL_bvalid_sig_reg_0(AXIL_bvalid_sig_reg),
        .AXIL_rvalid_sig_reg_0(\stateOp_reg[1]_6 ),
        .AXIL_wready_sig_reg_0(AXIL_wready_sig_reg),
        .AXIS_tlast(AXIS_tlast),
        .AXIS_tvalid(AXIS_tvalid),
        .CO(\stateOp_reg[2]_i_6__0_n_5 ),
        .D({myRxtx_n_5,myRxtx_n_6,myRxtx_n_7,myRxtx_n_8,myRxtx_n_9,myRxtx_n_10,myRxtx_n_11,myRxtx_n_12}),
        .E(myRxtx_n_0),
        .\NWrA_reg[15] ({myRxtx_n_375,myRxtx_n_376,myRxtx_n_377,myRxtx_n_378,myRxtx_n_379,myRxtx_n_380,myRxtx_n_381,myRxtx_n_382}),
        .\NWrA_reg[23] ({myRxtx_n_383,myRxtx_n_384,myRxtx_n_385,myRxtx_n_386,myRxtx_n_387,myRxtx_n_388,myRxtx_n_389,myRxtx_n_390}),
        .\NWrA_reg[31] ({myRxtx_n_391,myRxtx_n_392,myRxtx_n_393,myRxtx_n_394,myRxtx_n_395,myRxtx_n_396,myRxtx_n_397,myRxtx_n_398}),
        .\NWrA_reg[7] ({myRxtx_n_371,myRxtx_n_372,myRxtx_n_373,myRxtx_n_374}),
        .\NWrB_reg[15] ({myRxtx_n_347,myRxtx_n_348,myRxtx_n_349,myRxtx_n_350,myRxtx_n_351,myRxtx_n_352,myRxtx_n_353,myRxtx_n_354}),
        .\NWrB_reg[23] ({myRxtx_n_355,myRxtx_n_356,myRxtx_n_357,myRxtx_n_358,myRxtx_n_359,myRxtx_n_360,myRxtx_n_361,myRxtx_n_362}),
        .\NWrB_reg[31] ({myRxtx_n_363,myRxtx_n_364,myRxtx_n_365,myRxtx_n_366,myRxtx_n_367,myRxtx_n_368,myRxtx_n_369,myRxtx_n_370}),
        .\NWrB_reg[7] ({myRxtx_n_338,myRxtx_n_339,myRxtx_n_340,myRxtx_n_341,myRxtx_n_342,myRxtx_n_343,myRxtx_n_344}),
        .O({\wordcntCrcLast_reg[8]_i_2_n_8 ,\wordcntCrcLast_reg[8]_i_2_n_9 ,\wordcntCrcLast_reg[8]_i_2_n_10 ,\wordcntCrcLast_reg[8]_i_2_n_11 ,\wordcntCrcLast_reg[8]_i_2_n_12 ,\wordcntCrcLast_reg[8]_i_2_n_13 ,\wordcntCrcLast_reg[8]_i_2_n_14 ,\wordcntCrcLast_reg[8]_i_2_n_15 }),
        .Q(\stateOp_reg[5]_0 ),
        .\TCapt_reg[15] ({myRxtx_n_332,myRxtx_n_333,myRxtx_n_334,myRxtx_n_335}),
        .\TCapt_reg[7] ({myRxtx_n_267,myRxtx_n_268,myRxtx_n_269}),
        .aclk_sig(aclk_sig),
        .apuAXIL_araddr(apuAXIL_araddr),
        .apuAXIL_arvalid(apuAXIL_arvalid),
        .apuAXIL_awaddr(apuAXIL_awaddr),
        .apuAXIL_awvalid(apuAXIL_awvalid),
        .apuAXIL_bready(apuAXIL_bready),
        .apuAXIL_rdata(apuAXIL_rdata),
        .apuAXIL_rready(apuAXIL_rready),
        .apuAXIL_rvalid(apuAXIL_rvalid),
        .apuAXIL_wdata(apuAXIL_wdata),
        .apuAXIL_wstrb(apuAXIL_wstrb),
        .apuAXIL_wvalid(apuAXIL_wvalid),
        .commok_sig_reg(myRxtx_n_554),
        .commok_sig_reg_0(\opbuf[0][7]_i_4_n_0 ),
        .commok_sig_reg_1(\tixVBuffer[7]_i_4_n_0 ),
        .commok_sig_reg_2(myCrc_n_287),
        .commok_sig_reg_3(commok),
        .\crcAXIS_tkeep_reg[0] (myRxtx_n_581),
        .\crcAXIS_tkeep_reg[0]_0 (\crcAXIS_tkeep[0]_i_2__0_n_0 ),
        .\crcAXIS_tkeep_reg[0]_1 (\crcAXIS_tkeep[7]_i_5_n_0 ),
        .\crcAXIS_tkeep_reg[0]_2 (\crcAXIS_tkeep[7]_i_6_n_0 ),
        .\crcAXIS_tkeep_reg[0]_3 (ackInvSet_sig_i_9_n_0),
        .\crcAXIS_tkeep_reg[0]_4 (\crcAXIS_tkeep[7]_i_12_n_0 ),
        .\crcAXIS_tkeep_reg[0]_5 (\crcAXIS_tkeep[7]_i_13_n_0 ),
        .\crcAXIS_tkeep_reg[0]_6 (\crcAXIS_tkeep[7]_i_10_n_0 ),
        .\crcAXIS_tkeep_reg[0]_7 (\crcAXIS_tkeep_reg[7]_i_11_n_12 ),
        .\crcAXIS_tkeep_reg[3] (\crcAXIS_tkeep[3]_i_2_n_0 ),
        .\crcAXIS_tkeep_reg[3]_0 (\crcAXIS_tkeep[3]_i_3_n_0 ),
        .\crcAXIS_tkeep_reg[3]_1 (\lastAXIS_tkeep[3]_i_2_n_0 ),
        .\crcAXIS_tkeep_reg[4] (\resid[2]_i_5_n_0 ),
        .\crcAXIS_tkeep_reg[6] (\lastAXIS_tkeep[6]_i_2_n_0 ),
        .\crcAXIS_tkeep_reg[7] (\crcAXIS_tkeep[7]_i_8_n_0 ),
        .\crcAXIS_tkeep_reg[7]_0 (\lastAXIS_tkeep[7]_i_2_n_0 ),
        .\crcAXIS_tkeep_reg[7]_1 ({\lastAXIS_tkeep_reg_n_0_[7] ,\lastAXIS_tkeep_reg_n_0_[6] ,\lastAXIS_tkeep_reg_n_0_[5] ,\lastAXIS_tkeep_reg_n_0_[4] ,\lastAXIS_tkeep_reg_n_0_[3] ,\lastAXIS_tkeep_reg_n_0_[2] ,\lastAXIS_tkeep_reg_n_0_[1] }),
        .\crcAXIS_tkeep_reg[7]_2 (\crcAXIS_tkeep[7]_i_9_n_0 ),
        .crcAXIS_tlast_sig_i_6_0(crcAXIS_tlast_sig_i_13_n_0),
        .crcAXIS_tlast_sig_i_6_1({\tixVBuffer_reg_n_0_[3] ,\tixVBuffer_reg_n_0_[2] ,\tixVBuffer_reg_n_0_[1] ,\tixVBuffer_reg_n_0_[0] }),
        .crcAXIS_tlast_sig_i_8_0(crcAXIS_tlast_sig_i_14_n_0),
        .crcAXIS_tlast_sig_i_8_1(crcAXIS_tlast_sig_i_15_n_0),
        .crcAXIS_tlast_sig_i_8_2(\stateOp[5]_i_22_n_0 ),
        .crcAXIS_tlast_sig_reg(myRxtx_n_608),
        .crcAXIS_tlast_sig_reg_0(\crcAXIS_tkeep_reg[1]_i_2_n_5 ),
        .crcAXIS_tlast_sig_reg_1(crcAXIS_tlast_sig_i_7_n_0),
        .crcAXIS_tlast_sig_reg_2(crcAXIS_tlast_sig_i_9_n_0),
        .crcAXIS_tlast_sig_reg_3(crcAXIS_tlast_sig_reg_n_0),
        .crcAXIS_tlast_sig_reg_4(crcAXIS_tlast_sig_i_2_n_0),
        .crc_imd0100_out(crc_imd0100_out),
        .crc_imd0112_out(crc_imd0112_out),
        .crc_imd0115_out(crc_imd0115_out),
        .crc_imd0118_out(crc_imd0118_out),
        .crc_imd0121_out(crc_imd0121_out),
        .crc_imd0124_out(crc_imd0124_out),
        .crc_imd0148_out(crc_imd0148_out),
        .crc_imd0149_out(crc_imd0149_out),
        .crc_imd0150_out(crc_imd0150_out),
        .crc_imd0151_out(crc_imd0151_out),
        .crc_imd0152_out(crc_imd0152_out),
        .crc_imd0165_out(crc_imd0165_out),
        .crc_imd0172_out(crc_imd0172_out),
        .crc_imd0173_out(crc_imd0173_out),
        .crc_imd0174_out(crc_imd0174_out),
        .crc_imd0175_out(crc_imd0175_out),
        .crc_imd0176_out(crc_imd0176_out),
        .crc_imd0198_out(crc_imd0198_out),
        .crc_imd0200_out(crc_imd0200_out),
        .crc_imd0202_out(crc_imd0202_out),
        .crc_imd041_out(crc_imd041_out),
        .crc_imd042_out(crc_imd042_out),
        .crc_imd043_out(crc_imd043_out),
        .crc_imd065_out(crc_imd065_out),
        .crc_imd066_out(crc_imd066_out),
        .crc_imd067_out(crc_imd067_out),
        .crc_imd068_out(crc_imd068_out),
        .crc_imd069_out(crc_imd069_out),
        .crc_imd081_out(crc_imd081_out),
        .crc_imd083_out(crc_imd083_out),
        .crc_imd085_out(crc_imd085_out),
        .crc_imd086_out(crc_imd086_out),
        .crc_imd087_out(crc_imd087_out),
        .\crc_imd[12]_i_3 (myCrc_n_360),
        .\crc_imd[12]_i_3_0 (myCrc_n_365),
        .\crc_imd[14]_i_5 (myCrc_n_363),
        .\crc_imd[14]_i_5_0 (myCrc_n_362),
        .\crc_imd[15]_i_41_0 (myCrc_n_364),
        .\crc_imd[1]_i_4_0 (myCrc_n_349),
        .\crc_imd_reg[0] (AXIS_tkeep[2:0]),
        .\crc_imd_reg[0]_0 (myCrc_n_0),
        .\crc_imd_reg[0]_1 (myCrc_n_352),
        .\crc_imd_reg[0]_2 (myCrc_n_357),
        .\crc_imd_reg[11] (myRxtx_n_570),
        .\crc_imd_reg[12] (myRxtx_n_567),
        .\crc_imd_reg[12]_0 (myRxtx_n_568),
        .\crc_imd_reg[13] (myRxtx_n_569),
        .\crc_imd_reg[15] (myRxtx_n_575),
        .\crc_imd_reg[1] (myCrc_n_350),
        .\crc_imd_reg[1]_0 (myCrc_n_353),
        .\crc_imd_reg[1]_1 (myCrc_n_361),
        .\crc_imd_reg[2] ({myRxtx_n_336,myRxtx_n_337}),
        .\crc_imd_reg[2]_0 (myCrc_n_348),
        .\crc_imd_reg[2]_1 (myCrc_n_351),
        .\crc_imd_reg[2]_2 (myCrc_n_355),
        .\crc_imd_reg[3] (myRxtx_n_571),
        .\crc_imd_reg[4] (myCrc_n_288),
        .\crc_imd_reg[4]_0 (myCrc_n_354),
        .\crc_imd_reg[7] ({myRxtx_n_327,myRxtx_n_328,myRxtx_n_329,myRxtx_n_330}),
        .\crc_imd_reg[7]_0 (myRxtx_n_399),
        .\crc_imd_reg[7]_1 ({myRxtx_n_557,myRxtx_n_558,myRxtx_n_559,myRxtx_n_560,myRxtx_n_561,myRxtx_n_562,myRxtx_n_563}),
        .\crc_imd_reg[8] (myCrc_n_359),
        .\crc_imd_reg[8]_0 (myCrc_n_358),
        .\crc_imd_reg[8]_1 (myCrc_n_356),
        .\crc_imd_reg[9] (myCrc_n_347),
        .\invbuf_reg[7][0] (\opbuf[0][7]_i_3_n_0 ),
        .\invbuf_reg[7][0]_0 (\invbuf[0][7]_i_2_n_0 ),
        .\invbuf_reg[9][0] (\invbuf[9][7]_i_3_n_0 ),
        .\invbuf_reg[9][0]_0 (\invbuf[9][7]_i_5_n_0 ),
        .\invbuf_reg[9][0]_1 (\invbuf[9][7]_i_6_n_0 ),
        .\invbuf_reg[9][0]_2 (\invbuf[9][7]_i_8_n_0 ),
        .\invbuf_reg[9][0]_3 (\invbuf[9][7]_i_9_n_0 ),
        .\invbuf_reg[9][0]_4 (\invbuf[9][7]_i_10_n_0 ),
        .\invbuf_reg[9][0]_5 (\invbuf[9][7]_i_11_n_0 ),
        .\invbuf_reg[9][0]_6 (\invbuf[9][7]_i_7_n_0 ),
        .\ixRetbufCrc_reg[0] (myRxtx_n_264),
        .\ixRetbufCrc_reg[0]_0 (\resid[0]_i_2_n_0 ),
        .\ixRetbufCrc_reg[2] (\resid[2]_i_7_n_0 ),
        .\ixRetbufCrc_reg[3] (myRxtx_n_260),
        .\ixRetbufCrc_reg[4] (myRxtx_n_21),
        .\ixRetbufCrc_reg[4]_0 (myRxtx_n_37),
        .\lastAXIS_tkeep_reg[1] (\resid[2]_i_4_n_0 ),
        .\lastAXIS_tkeep_reg[1]_0 (\resid[2]_i_3_n_0 ),
        .\lastAXIS_tkeep_reg[2] (\resid[1]_i_4_n_0 ),
        .\lastAXIS_tkeep_reg[5] (\resid[2]_i_6_n_0 ),
        .\lastAXIS_tkeep_reg[7] ({myRxtx_n_270,myRxtx_n_271,myRxtx_n_272,myRxtx_n_273,myRxtx_n_274,myRxtx_n_275,myRxtx_n_276,myRxtx_n_277}),
        .\len_reg[15] (\opbuf_reg[5]_62 ),
        .\len_reg[23] (\opbuf_reg[4]_63 ),
        .\len_reg[2] ({myRxtx_n_142,myRxtx_n_143,myRxtx_n_144,myRxtx_n_145,myRxtx_n_146}),
        .\len_reg[31] (\opbuf_reg[3]_64 ),
        .\len_reg[7] (\opbuf_reg[6]_61 ),
        .\opbuf_reg[0][7] ({myRxtx_n_476,myRxtx_n_477,myRxtx_n_478,myRxtx_n_479,myRxtx_n_480,myRxtx_n_481,myRxtx_n_482,myRxtx_n_483}),
        .\opbuf_reg[1][7] ({myRxtx_n_468,myRxtx_n_469,myRxtx_n_470,myRxtx_n_471,myRxtx_n_472,myRxtx_n_473,myRxtx_n_474,myRxtx_n_475}),
        .\opbuf_reg[2][7] ({myRxtx_n_486,myRxtx_n_487,myRxtx_n_488,myRxtx_n_489,myRxtx_n_490,myRxtx_n_491,myRxtx_n_492,myRxtx_n_493}),
        .\opbuf_reg[3][7] ({myRxtx_n_436,myRxtx_n_437,myRxtx_n_438,myRxtx_n_439,myRxtx_n_440,myRxtx_n_441,myRxtx_n_442,myRxtx_n_443,myRxtx_n_444,myRxtx_n_445,myRxtx_n_446,myRxtx_n_447,myRxtx_n_448,myRxtx_n_449,myRxtx_n_450,myRxtx_n_451,myRxtx_n_452,myRxtx_n_453,myRxtx_n_454,myRxtx_n_455,myRxtx_n_456,myRxtx_n_457,myRxtx_n_458,myRxtx_n_459,myRxtx_n_460,myRxtx_n_461,myRxtx_n_462,myRxtx_n_463,myRxtx_n_464,myRxtx_n_465,myRxtx_n_466,myRxtx_n_467}),
        .p_10_out(p_10_out),
        .p_136_in(p_136_in),
        .plusOp(plusOp),
        .\pollbuf_reg[0][7] (\pollbuf[0][7]_i_6_n_0 ),
        .\pollbuf_reg[0][7]_0 ({\tixVController_reg_n_0_[7] ,\tixVController_reg_n_0_[6] ,\tixVController_reg_n_0_[5] ,\tixVController_reg_n_0_[4] ,\tixVController_reg_n_0_[3] ,\tixVController_reg_n_0_[2] ,\tixVController_reg_n_0_[1] ,\tixVController_reg_n_0_[0] }),
        .\pollbuf_reg[0][7]_1 (\pollbuf[0][7]_i_7_n_0 ),
        .\pollbuf_reg[1][7] ({\tixVCommand_reg_n_0_[7] ,\tixVCommand_reg_n_0_[6] ,\tixVCommand_reg_n_0_[5] ,\tixVCommand_reg_n_0_[4] ,\tixVCommand_reg_n_0_[3] ,\tixVCommand_reg_n_0_[2] ,\tixVCommand_reg_n_0_[1] ,\tixVCommand_reg_n_0_[0] }),
        .\pollbuf_reg[2][3] (\pollbuf[0][7]_i_3_n_0 ),
        .\pollbuf_reg[2][3]_0 (\pollbuf[0][7]_i_4_n_0 ),
        .\pollbuf_reg[2][3]_1 (\pollbuf[0][7]_i_5_n_0 ),
        .\pollbuf_reg[2][3]_2 (\pollbuf[2][3]_i_2_n_0 ),
        .\pollbuf_reg[2][4] (\pollbuf[2][4]_i_2_n_0 ),
        .\pollbuf_reg[2][7] (\pollbuf[2][7]_i_2_n_0 ),
        .\pollbuf_reg[3][1] (\resid[2]_i_8_n_0 ),
        .\pollbuf_reg[3][5] (\ixRetbufCrc[5]_i_4_n_0 ),
        .\pollbuf_reg[3][5]_0 (\ixRetbufCrc[5]_i_3_n_0 ),
        .recvAXIS_tdata({rxAXIS_tdata[15],rxAXIS_tdata[12:10],rxAXIS_tdata[7],rxAXIS_tdata[0]}),
        .\recvAXIS_tdata_sig_reg[15]_0 ({AXIS_tdata[15:11],AXIS_tdata[7:0]}),
        .\recvAXIS_tdata_sig_reg[47]_0 (\opbuf[5]_71 ),
        .\recvAXIS_tdata_sig_reg[7]_0 ({myRxtx_n_27,\opbuf[3]_70 [6],myRxtx_n_29,myRxtx_n_30,myRxtx_n_31,myRxtx_n_32,\opbuf[3]_70 [1],myRxtx_n_34}),
        .\recvAXIS_tdata_sig_reg[7]_1 ({myRxtx_n_39,myRxtx_n_40,myRxtx_n_41,myRxtx_n_42,myRxtx_n_43,myRxtx_n_44,myRxtx_n_45,myRxtx_n_46}),
        .\recvAXIS_tdata_sig_reg[7]_2 ({myRxtx_n_428,myRxtx_n_429,myRxtx_n_430,myRxtx_n_431,myRxtx_n_432,myRxtx_n_433,myRxtx_n_434,myRxtx_n_435}),
        .\recvAXIS_tdata_sig_reg[7]_3 (\opbuf[2]_72 ),
        .\recvAXIS_tdata_sig_reg[7]_4 (\opbuf[4]_73 ),
        .\recvAXIS_tdata_sig_reg[7]_5 (\opbuf[6]_74 ),
        .\recvAXIS_tdata_sig_reg[7]_6 (\opbuf[1]_75 ),
        .recvAXIS_tlast(recvAXIS_tlast),
        .recvAXIS_tlast_sig_reg_0(myRxtx_n_564),
        .recvAXIS_tlast_sig_reg_i_2_0(txlen),
        .reqResetFromHostif(reqResetFromHostif),
        .reqReset_sig_reg(myRxtx_n_555),
        .reqReset_sig_reg_0(stateOp_i_2__0_n_0),
        .reqReset_sig_reg_1(reqReset_sig_i_2_n_0),
        .\resid_reg[0] (myRxtx_n_20),
        .\resid_reg[0]_0 (myRxtx_n_55),
        .\resid_reg[0]_1 (myRxtx_n_56),
        .\resid_reg[0]_10 (myRxtx_n_254),
        .\resid_reg[0]_11 (myRxtx_n_255),
        .\resid_reg[0]_12 (myRxtx_n_256),
        .\resid_reg[0]_13 (myRxtx_n_257),
        .\resid_reg[0]_14 (myRxtx_n_258),
        .\resid_reg[0]_15 (myRxtx_n_259),
        .\resid_reg[0]_16 (myRxtx_n_261),
        .\resid_reg[0]_17 (myRxtx_n_262),
        .\resid_reg[0]_18 (myRxtx_n_263),
        .\resid_reg[0]_19 (myRxtx_n_265),
        .\resid_reg[0]_2 (myRxtx_n_57),
        .\resid_reg[0]_20 (myRxtx_n_266),
        .\resid_reg[0]_21 (\resid[1]_i_2_n_0 ),
        .\resid_reg[0]_3 (myRxtx_n_247),
        .\resid_reg[0]_4 (myRxtx_n_248),
        .\resid_reg[0]_5 (myRxtx_n_249),
        .\resid_reg[0]_6 (myRxtx_n_250),
        .\resid_reg[0]_7 (myRxtx_n_251),
        .\resid_reg[0]_8 (myRxtx_n_252),
        .\resid_reg[0]_9 (myRxtx_n_253),
        .\resid_reg[1] (\resid[1]_i_3_n_0 ),
        .\retbuf_reg[0][0] (\retbuf[0][0]_i_2_n_0 ),
        .\retbuf_reg[0][0]_0 (myCrc_n_324),
        .\retbuf_reg[0][2] (\retbuf[0][7]_i_8_n_0 ),
        .\retbuf_reg[0][2]_0 (\retbuf[0][2]_i_3_n_0 ),
        .\retbuf_reg[0][2]_1 (\retbuf[0][7]_i_19_n_0 ),
        .\retbuf_reg[0][7] (\retbuf[0][7]_i_3_n_0 ),
        .\retbuf_reg[0][7]_0 (\retbuf[0][7]_i_4_n_0 ),
        .\retbuf_reg[0][7]_1 (\retbuf[0][7]_i_5_n_0 ),
        .\retbuf_reg[0][7]_2 (\retbuf[0][7]_i_6_n_0 ),
        .\retbuf_reg[0][7]_3 (\retbuf[0][7]_i_7_n_0 ),
        .\retbuf_reg[0][7]_4 (\retbuf[0][7]_i_20_n_0 ),
        .\retbuf_reg[10][0] (\retbuf[10][7]_i_3_n_0 ),
        .\retbuf_reg[10][0]_0 (\retbuf[10][7]_i_4_n_0 ),
        .\retbuf_reg[11][0] (\retbuf[11][7]_i_3_n_0 ),
        .\retbuf_reg[11][4] (\retbuf[11][7]_i_4_n_0 ),
        .\retbuf_reg[12][0] (\retbuf[12][7]_i_3_n_0 ),
        .\retbuf_reg[12][0]_0 (\retbuf[12][7]_i_4_n_0 ),
        .\retbuf_reg[12][7] (\retbuf_reg[12][7]_0 ),
        .\retbuf_reg[13][0] (\retbuf[13][7]_i_3_n_0 ),
        .\retbuf_reg[13][0]_0 (\retbuf[13][7]_i_4_n_0 ),
        .\retbuf_reg[14][0] (\retbuf[14][7]_i_3_n_0 ),
        .\retbuf_reg[14][0]_0 (\retbuf[14][7]_i_4_n_0 ),
        .\retbuf_reg[15][0] (\retbuf[8][7]_i_6_n_0 ),
        .\retbuf_reg[15][0]_0 (\retbuf[8][7]_i_7_n_0 ),
        .\retbuf_reg[15][0]_1 (\retbuf[8][7]_i_8_n_0 ),
        .\retbuf_reg[15][0]_2 (\retbuf[15][7]_i_3_n_0 ),
        .\retbuf_reg[15][1] (\retbuf[15][7]_i_4_n_0 ),
        .\retbuf_reg[15][7] ({p_1_in,myCrc_n_19,myCrc_n_20,myCrc_n_21,myCrc_n_22,myCrc_n_23,myCrc_n_24,myCrc_n_25,myCrc_n_26}),
        .\retbuf_reg[16][0] (\retbuf[16][7]_i_4_n_0 ),
        .\retbuf_reg[16][0]_0 (\retbuf[16][7]_i_5_n_0 ),
        .\retbuf_reg[16][0]_1 (\retbuf[16][7]_i_6_n_0 ),
        .\retbuf_reg[17][0] (\retbuf[17][7]_i_3_n_0 ),
        .\retbuf_reg[18][0] (\retbuf[18][7]_i_3_n_0 ),
        .\retbuf_reg[19][0] (\retbuf[19][7]_i_3_n_0 ),
        .\retbuf_reg[1][0] (\retbuf[1][7]_i_3_n_0 ),
        .\retbuf_reg[1][0]_0 (\retbuf[1][7]_i_4_n_0 ),
        .\retbuf_reg[1][0]_1 (\retbuf[1][7]_i_5_n_0 ),
        .\retbuf_reg[1][0]_2 (\retbuf[1][7]_i_6_n_0 ),
        .\retbuf_reg[20][0] (\retbuf[20][7]_i_3_n_0 ),
        .\retbuf_reg[21][0] (\retbuf[21][7]_i_3_n_0 ),
        .\retbuf_reg[22][0] (\retbuf[22][7]_i_3_n_0 ),
        .\retbuf_reg[23][0] (\retbuf[23][7]_i_3_n_0 ),
        .\retbuf_reg[24][0] (\retbuf[24][7]_i_3_n_0 ),
        .\retbuf_reg[25][0] (\retbuf[25][7]_i_3_n_0 ),
        .\retbuf_reg[26][0] (\retbuf[26][7]_i_3_n_0 ),
        .\retbuf_reg[27][0] (\retbuf[27][7]_i_3_n_0 ),
        .\retbuf_reg[28][0] (\retbuf[28][7]_i_3_n_0 ),
        .\retbuf_reg[29][0] (\retbuf[29][7]_i_3_n_0 ),
        .\retbuf_reg[29][0]_0 (\retbuf[29][7]_i_4_n_0 ),
        .\retbuf_reg[2][0] (\retbuf[2][7]_i_3_n_0 ),
        .\retbuf_reg[2][7] (\retbuf[2][7]_i_4__0_n_0 ),
        .\retbuf_reg[2][7]_0 (\retbuf[2][7]_i_5_n_0 ),
        .\retbuf_reg[30][0] (\retbuf[30][7]_i_3_n_0 ),
        .\retbuf_reg[30][0]_0 (\retbuf[30][7]_i_4_n_0 ),
        .\retbuf_reg[31][0] (\retbuf[31][7]_i_3_n_0 ),
        .\retbuf_reg[32][0] (\retbuf[32][7]_i_3_n_0 ),
        .\retbuf_reg[33][0] (\retbuf[33][7]_i_3_n_0 ),
        .\retbuf_reg[34][0] (\retbuf[34][7]_i_3_n_0 ),
        .\retbuf_reg[34][0]_0 (\retbuf[34][7]_i_4_n_0 ),
        .\retbuf_reg[35][0] (\retbuf[35][7]_i_3_n_0 ),
        .\retbuf_reg[36][7] (\retbuf[36][7]_i_3_n_0 ),
        .\retbuf_reg[36][7]_0 (\retbuf[36][7]_i_4_n_0 ),
        .\retbuf_reg[37][7] (\retbuf[37][7]_i_3_n_0 ),
        .\retbuf_reg[38][7] (\retbuf[38][7]_i_3_n_0 ),
        .\retbuf_reg[38][7]_0 (\retbuf[38][7]_i_5_n_0 ),
        .\retbuf_reg[39][7] (\retbuf[39][7]_i_3_n_0 ),
        .\retbuf_reg[39][7]_0 (\retbuf[39][7]_i_4_n_0 ),
        .\retbuf_reg[39][7]_1 (\retbuf[39][7]_i_5_n_0 ),
        .\retbuf_reg[39][7]_2 ({ixRetbufCrc[4:3],ixRetbufCrc[0]}),
        .\retbuf_reg[39][7]_3 (\retbuf[38][7]_i_4_n_0 ),
        .\retbuf_reg[3][2] (\retbuf[3][2]_i_2_n_0 ),
        .\retbuf_reg[3][2]_0 (myCrc_n_328),
        .\retbuf_reg[3][3] (\retbuf[3][3]_i_2_n_0 ),
        .\retbuf_reg[3][3]_0 (myCrc_n_327),
        .\retbuf_reg[3][6] (\retbuf[3][6]_i_2_n_0 ),
        .\retbuf_reg[3][6]_0 (myCrc_n_326),
        .\retbuf_reg[3][7] (\retbuf[3][7]_i_3_n_0 ),
        .\retbuf_reg[3][7]_0 (\retbuf[3][7]_i_4_n_0 ),
        .\retbuf_reg[3][7]_1 (\retbuf[3][7]_i_5_n_0 ),
        .\retbuf_reg[3][7]_2 ({\retbuf_reg[1][7]_0 [15:14],\retbuf_reg[1][7]_0 [11:10],\retbuf_reg[1][7]_0 [7]}),
        .\retbuf_reg[3][7]_3 (\retbuf[3][7]_i_6_n_0 ),
        .\retbuf_reg[3][7]_4 (myCrc_n_325),
        .\retbuf_reg[4][0] (\retbuf[4][6]_i_3_n_0 ),
        .\retbuf_reg[4][0]_0 (\retbuf[4][0]_i_3_n_0 ),
        .\retbuf_reg[4][0]_1 (\retbuf[4][0]_i_4_n_0 ),
        .\retbuf_reg[4][1] (\retbuf[4][1]_i_3_n_0 ),
        .\retbuf_reg[4][1]_0 (\retbuf[4][1]_i_4_n_0 ),
        .\retbuf_reg[4][2] (\retbuf[4][2]_i_3_n_0 ),
        .\retbuf_reg[4][2]_0 (\retbuf[4][2]_i_4_n_0 ),
        .\retbuf_reg[4][3] (\retbuf[4][3]_i_3_n_0 ),
        .\retbuf_reg[4][3]_0 (\retbuf[4][3]_i_4_n_0 ),
        .\retbuf_reg[4][7] (\retbuf[4][7]_i_3_n_0 ),
        .\retbuf_reg[4][7]_0 (\retbuf[4][7]_i_4_n_0 ),
        .\retbuf_reg[4][7]_1 (\retbuf[4][7]_i_5_n_0 ),
        .\retbuf_reg[4][7]_2 (\retbuf[0][6]_i_2__0_n_0 ),
        .\retbuf_reg[4][7]_3 (\retbuf[4][7]_i_6_n_0 ),
        .\retbuf_reg[4][7]_4 (\retbuf[4][7]_i_7_n_0 ),
        .\retbuf_reg[4][7]_5 (myCrc_n_323),
        .\retbuf_reg[5][0] (\retbuf[5][7]_i_3_n_0 ),
        .\retbuf_reg[5][0]_0 (\retbuf[5][7]_i_4_n_0 ),
        .\retbuf_reg[6][0] (\retbuf[6][7]_i_3_n_0 ),
        .\retbuf_reg[6][5] (\retbuf[0][0]_i_3_n_0 ),
        .\retbuf_reg[6][5]_0 (\retbuf_reg[6][5]_i_2_n_0 ),
        .\retbuf_reg[6][5]_1 (myCrc_n_329),
        .\retbuf_reg[7][4] (\retbuf[7][7]_i_6_n_0 ),
        .\retbuf_reg[7][5] (stateOp_i_3__1_n_0),
        .\retbuf_reg[7][5]_0 (myCrc_n_330),
        .\retbuf_reg[7][7] (\retbuf[7][7]_i_3_n_0 ),
        .\retbuf_reg[7][7]_0 (\ixRetbufCrc[4]_i_2_n_0 ),
        .\retbuf_reg[7][7]_1 (\retbuf[7][7]_i_4_n_0 ),
        .\retbuf_reg[7][7]_2 (\retbuf[4][7]_i_12_0 [3:0]),
        .\retbuf_reg[8][0] (\retbuf[8][7]_i_4_n_0 ),
        .\retbuf_reg[8][0]_0 (\retbuf[8][7]_i_5_n_0 ),
        .\retbuf_reg[8][7] (\retbuf_reg[8][7]_0 ),
        .\retbuf_reg[9][0] (\retbuf[9][7]_i_3_n_0 ),
        .\retbuf_reg[9][0]_0 (\retbuf[9][7]_i_4_n_0 ),
        .\rxlen_reg[0] (myRxtx_n_556),
        .\rxlen_reg[0]_0 (\rxlen[0]_i_5_n_0 ),
        .\rxlen_reg[0]_1 (\stateOp[5]_i_20_n_0 ),
        .\rxlen_reg[0]_2 (\rxlen[0]_i_6_n_0 ),
        .\rxlen_reg[0]_3 (\rxlen[0]_i_3_n_0 ),
        .\rxlen_reg[0]_4 (\rxlen_reg_n_0_[0] ),
        .\sendAXIL_rdata_reg[63]_0 ({\txAXIS_tdata_reg_n_0_[63] ,\txAXIS_tdata_reg_n_0_[62] ,\txAXIS_tdata_reg_n_0_[61] ,\txAXIS_tdata_reg_n_0_[60] ,\txAXIS_tdata_reg_n_0_[59] ,\txAXIS_tdata_reg_n_0_[58] ,\txAXIS_tdata_reg_n_0_[57] ,\txAXIS_tdata_reg_n_0_[56] ,\txAXIS_tdata_reg_n_0_[55] ,\txAXIS_tdata_reg_n_0_[54] ,\txAXIS_tdata_reg_n_0_[53] ,\txAXIS_tdata_reg_n_0_[52] ,\txAXIS_tdata_reg_n_0_[51] ,\txAXIS_tdata_reg_n_0_[50] ,\txAXIS_tdata_reg_n_0_[49] ,\txAXIS_tdata_reg_n_0_[48] ,\txAXIS_tdata_reg_n_0_[47] ,\txAXIS_tdata_reg_n_0_[46] ,\txAXIS_tdata_reg_n_0_[45] ,\txAXIS_tdata_reg_n_0_[44] ,\txAXIS_tdata_reg_n_0_[43] ,\txAXIS_tdata_reg_n_0_[42] ,\txAXIS_tdata_reg_n_0_[41] ,\txAXIS_tdata_reg_n_0_[40] ,\txAXIS_tdata_reg_n_0_[39] ,\txAXIS_tdata_reg_n_0_[38] ,\txAXIS_tdata_reg_n_0_[37] ,\txAXIS_tdata_reg_n_0_[36] ,\txAXIS_tdata_reg_n_0_[35] ,\txAXIS_tdata_reg_n_0_[34] ,\txAXIS_tdata_reg_n_0_[33] ,\txAXIS_tdata_reg_n_0_[32] ,\txAXIS_tdata_reg_n_0_[31] ,\txAXIS_tdata_reg_n_0_[30] ,\txAXIS_tdata_reg_n_0_[29] ,\txAXIS_tdata_reg_n_0_[28] ,\txAXIS_tdata_reg_n_0_[27] ,\txAXIS_tdata_reg_n_0_[26] ,\txAXIS_tdata_reg_n_0_[25] ,\txAXIS_tdata_reg_n_0_[24] ,\txAXIS_tdata_reg_n_0_[23] ,\txAXIS_tdata_reg_n_0_[22] ,\txAXIS_tdata_reg_n_0_[21] ,\txAXIS_tdata_reg_n_0_[20] ,\txAXIS_tdata_reg_n_0_[19] ,\txAXIS_tdata_reg_n_0_[18] ,\txAXIS_tdata_reg_n_0_[17] ,\txAXIS_tdata_reg_n_0_[16] ,\txAXIS_tdata_reg_n_0_[15] ,\txAXIS_tdata_reg_n_0_[14] ,\txAXIS_tdata_reg_n_0_[13] ,\txAXIS_tdata_reg_n_0_[12] ,\txAXIS_tdata_reg_n_0_[11] ,\txAXIS_tdata_reg_n_0_[10] ,\txAXIS_tdata_reg_n_0_[9] ,\txAXIS_tdata_reg_n_0_[8] ,\txAXIS_tdata_reg_n_0_[7] ,\txAXIS_tdata_reg_n_0_[6] ,\txAXIS_tdata_reg_n_0_[5] ,\txAXIS_tdata_reg_n_0_[4] ,\txAXIS_tdata_reg_n_0_[3] ,\txAXIS_tdata_reg_n_0_[2] ,\txAXIS_tdata_reg_n_0_[1] ,\txAXIS_tdata_reg_n_0_[0] }),
        .\stateOp[3]_i_3_0 (\stateOp_reg[1]_i_7_n_0 ),
        .\stateOp_next_reg[0] (\stateOp_next[5]_i_3_n_0 ),
        .\stateOp_next_reg[1] (\stateOp_next[1]_i_2_n_0 ),
        .\stateOp_next_reg[4] (\stateOp_next[4]_i_2_n_0 ),
        .\stateOp_next_reg[5] (\stateOp_next[5]_i_5_n_0 ),
        .\stateOp_next_reg[5]_0 (\stateOp_next[5]_i_4_n_0 ),
        .\stateOp_next_reg[5]_1 (\stateOp_next[5]_i_6_n_0 ),
        .stateOp_reg(myCrc_n_34),
        .\stateOp_reg[0] (myRxtx_n_24),
        .\stateOp_reg[0]_0 (myRxtx_n_535),
        .\stateOp_reg[0]_1 (\stateOp[5]_i_16_n_0 ),
        .\stateOp_reg[0]_10 (myWordto_n_2),
        .\stateOp_reg[0]_11 (myXferto_n_2),
        .\stateOp_reg[0]_12 (myXferto_n_4),
        .\stateOp_reg[0]_13 (myXferto_n_3),
        .\stateOp_reg[0]_2 (\stateOp[5]_i_8_n_0 ),
        .\stateOp_reg[0]_3 (\stateOp[5]_i_17_n_0 ),
        .\stateOp_reg[0]_4 (\stateOp[5]_i_3_n_0 ),
        .\stateOp_reg[0]_5 (\stateOp[5]_i_7_n_0 ),
        .\stateOp_reg[0]_6 (myCrc_n_292),
        .\stateOp_reg[0]_7 (myCrc_n_290),
        .\stateOp_reg[0]_8 ({myXferto_n_0,myXferto_n_1}),
        .\stateOp_reg[0]_9 ({myWordto_n_0,myWordto_n_1}),
        .\stateOp_reg[1] (myRxtx_n_237),
        .\stateOp_reg[1]_0 (myRxtx_n_238),
        .\stateOp_reg[1]_1 (myRxtx_n_239),
        .\stateOp_reg[1]_10 (\stateOp[1]_i_2__4_n_0 ),
        .\stateOp_reg[1]_11 (\stateOp[1]_i_3__4_n_0 ),
        .\stateOp_reg[1]_12 (\stateOp[1]_i_5__1_n_0 ),
        .\stateOp_reg[1]_13 (\stateOp[1]_i_9__0_n_0 ),
        .\stateOp_reg[1]_2 (myRxtx_n_240),
        .\stateOp_reg[1]_3 (myRxtx_n_241),
        .\stateOp_reg[1]_4 (myRxtx_n_242),
        .\stateOp_reg[1]_5 (myRxtx_n_243),
        .\stateOp_reg[1]_6 (myRxtx_n_244),
        .\stateOp_reg[1]_7 (myRxtx_n_245),
        .\stateOp_reg[1]_8 (myRxtx_n_246),
        .\stateOp_reg[1]_9 ({myRxtx_n_278,myRxtx_n_279,myRxtx_n_280,myRxtx_n_281,myRxtx_n_282,myRxtx_n_283,myRxtx_n_284,myRxtx_n_285,myRxtx_n_286,myRxtx_n_287,myRxtx_n_288,myRxtx_n_289,myRxtx_n_290,myRxtx_n_291,myRxtx_n_292,myRxtx_n_293,myRxtx_n_294,myRxtx_n_295,myRxtx_n_296,myRxtx_n_297,myRxtx_n_298,myRxtx_n_299,myRxtx_n_300,myRxtx_n_301,myRxtx_n_302,myRxtx_n_303,myRxtx_n_304,myRxtx_n_305,myRxtx_n_306,myRxtx_n_307,myRxtx_n_308,myRxtx_n_309,myRxtx_n_310,myRxtx_n_311,myRxtx_n_312,myRxtx_n_313,myRxtx_n_314,myRxtx_n_315,myRxtx_n_316,myRxtx_n_317,myRxtx_n_318,myRxtx_n_319,myRxtx_n_320,myRxtx_n_321,myRxtx_n_322,myRxtx_n_323}),
        .\stateOp_reg[2] (myRxtx_n_38),
        .\stateOp_reg[2]_0 (myRxtx_n_485),
        .\stateOp_reg[2]_1 (myRxtx_n_552),
        .\stateOp_reg[2]_2 (myCrc_n_289),
        .\stateOp_reg[2]_3 (myCrc_n_291),
        .\stateOp_reg[3] ({myRxtx_n_47,myRxtx_n_48,myRxtx_n_49,myRxtx_n_50,myRxtx_n_51,myRxtx_n_52,myRxtx_n_53}),
        .\stateOp_reg[3]_0 (myRxtx_n_181),
        .\stateOp_reg[3]_1 (\stateOp[3]_i_5_n_0 ),
        .\stateOp_reg[3]_2 (\txlen[28]_i_4_n_0 ),
        .\stateOp_reg[4] (myRxtx_n_1),
        .\stateOp_reg[4]_0 (myRxtx_n_4),
        .\stateOp_reg[4]_1 (myRxtx_n_13),
        .\stateOp_reg[4]_10 (myRxtx_n_331),
        .\stateOp_reg[4]_11 (myRxtx_n_345),
        .\stateOp_reg[4]_12 (myRxtx_n_346),
        .\stateOp_reg[4]_13 ({myRxtx_n_403,myRxtx_n_404,myRxtx_n_405,myRxtx_n_406,myRxtx_n_407,myRxtx_n_408,myRxtx_n_409,myRxtx_n_410,myRxtx_n_411,myRxtx_n_412,myRxtx_n_413,myRxtx_n_414,myRxtx_n_415,myRxtx_n_416,myRxtx_n_417,myRxtx_n_418,myRxtx_n_419,myRxtx_n_420,myRxtx_n_421,myRxtx_n_422,myRxtx_n_423,myRxtx_n_424,myRxtx_n_425,myRxtx_n_426,myRxtx_n_427}),
        .\stateOp_reg[4]_14 (myRxtx_n_534),
        .\stateOp_reg[4]_15 (\stateOp[4]_i_4_n_0 ),
        .\stateOp_reg[4]_16 (\stateOp[4]_i_5_n_0 ),
        .\stateOp_reg[4]_2 (myRxtx_n_35),
        .\stateOp_reg[4]_3 (myRxtx_n_36),
        .\stateOp_reg[4]_4 (myRxtx_n_54),
        .\stateOp_reg[4]_5 ({myRxtx_n_129,myRxtx_n_130,myRxtx_n_131,myRxtx_n_132,myRxtx_n_133,myRxtx_n_134,myRxtx_n_135}),
        .\stateOp_reg[4]_6 ({myRxtx_n_150,myRxtx_n_151,myRxtx_n_152,myRxtx_n_153,myRxtx_n_154,myRxtx_n_155,myRxtx_n_156,myRxtx_n_157,myRxtx_n_158,myRxtx_n_159,myRxtx_n_160,myRxtx_n_161,myRxtx_n_162,myRxtx_n_163,myRxtx_n_164,myRxtx_n_165,myRxtx_n_166,myRxtx_n_167,myRxtx_n_168,myRxtx_n_169,myRxtx_n_170,myRxtx_n_171,myRxtx_n_172,myRxtx_n_173,myRxtx_n_174,myRxtx_n_175,myRxtx_n_176,myRxtx_n_177,myRxtx_n_178,myRxtx_n_179,myRxtx_n_180}),
        .\stateOp_reg[4]_7 ({myRxtx_n_206,myRxtx_n_207,myRxtx_n_208,myRxtx_n_209,myRxtx_n_210,myRxtx_n_211,myRxtx_n_212,myRxtx_n_213,myRxtx_n_214,myRxtx_n_215,myRxtx_n_216,myRxtx_n_217,myRxtx_n_218,myRxtx_n_219,myRxtx_n_220,myRxtx_n_221,myRxtx_n_222,myRxtx_n_223,myRxtx_n_224,myRxtx_n_225,myRxtx_n_226,myRxtx_n_227,myRxtx_n_228,myRxtx_n_229,myRxtx_n_230,myRxtx_n_231,myRxtx_n_232,myRxtx_n_233,myRxtx_n_234}),
        .\stateOp_reg[4]_8 (myRxtx_n_235),
        .\stateOp_reg[4]_9 (myRxtx_n_236),
        .\stateOp_reg[5] (myRxtx_n_3),
        .\stateOp_reg[5]_0 (myRxtx_n_22),
        .\stateOp_reg[5]_1 (myRxtx_n_23),
        .\stateOp_reg[5]_2 (myRxtx_n_26),
        .\stateOp_reg[5]_3 ({myRxtx_n_147,myRxtx_n_148,myRxtx_n_149}),
        .\stateOp_reg[5]_4 ({myRxtx_n_183,myRxtx_n_184,myRxtx_n_185,myRxtx_n_186,myRxtx_n_187}),
        .\stateOp_reg[5]_5 (myRxtx_n_188),
        .\stateOp_reg[5]_6 (myRxtx_n_484),
        .\stateOp_reg[5]_7 (myRxtx_n_553),
        .\stateRecv_reg[0]_0 (myRxtx_n_2),
        .\stateRecv_reg[0]_1 (myRxtx_n_536),
        .\stateRecv_reg[1]_0 (myRxtx_n_25),
        .\stateSend_reg[2]_0 (myRxtx_n_182),
        .\stateSend_reg[2]_1 (myRxtx_n_205),
        .\tixVBuffer_reg[1] ({myRxtx_n_324,myRxtx_n_325,myRxtx_n_326}),
        .\tixVBuffer_reg[7] ({\opbuf_reg_n_0_[0][7] ,\opbuf_reg_n_0_[0][6] ,\opbuf_reg_n_0_[0][5] ,\opbuf_reg_n_0_[0][4] ,\opbuf_reg_n_0_[0][3] ,\opbuf_reg_n_0_[0][2] ,\opbuf_reg_n_0_[0][1] ,\opbuf_reg_n_0_[0][0] }),
        .\tixVBufxfop_reg[7] ({\opbuf_reg_n_0_[2][7] ,\opbuf_reg_n_0_[2][6] ,\opbuf_reg_n_0_[2][5] ,\opbuf_reg_n_0_[2][4] ,\opbuf_reg_n_0_[2][3] ,\opbuf_reg_n_0_[2][2] ,\opbuf_reg_n_0_[2][1] ,\opbuf_reg_n_0_[2][0] }),
        .\tixVCommand_reg[0] ({myRxtx_n_58,myRxtx_n_59,myRxtx_n_60,myRxtx_n_61,myRxtx_n_62,myRxtx_n_63}),
        .\tixVCommand_reg[0]_0 ({myRxtx_n_136,myRxtx_n_137,myRxtx_n_138,myRxtx_n_139,myRxtx_n_140,myRxtx_n_141}),
        .\tixVCommand_reg[7] ({myRxtx_n_197,myRxtx_n_198,myRxtx_n_199,myRxtx_n_200,myRxtx_n_201,myRxtx_n_202,myRxtx_n_203,myRxtx_n_204}),
        .\tixVController_reg[3] (myRxtx_n_400),
        .\tixVController_reg[3]_0 (myRxtx_n_401),
        .\tixVController_reg[7] ({myRxtx_n_189,myRxtx_n_190,myRxtx_n_191,myRxtx_n_192,myRxtx_n_193,myRxtx_n_194,myRxtx_n_195,myRxtx_n_196}),
        .\tixVController_reg[7]_0 (myRxtx_n_402),
        .\tixVController_reg[7]_1 (\opbuf_reg[1]_60 ),
        .\txAXIS_tdata_reg[0] (myCrc_n_293),
        .\txAXIS_tdata_reg[0]_0 (\txAXIS_tdata[6]_i_6__0_n_0 ),
        .\txAXIS_tdata_reg[0]_1 (\txAXIS_tdata[2]_i_5_n_0 ),
        .\txAXIS_tdata_reg[13] (myRxtx_n_572),
        .\txAXIS_tdata_reg[16] (\txAXIS_tdata[23]_i_3_n_0 ),
        .\txAXIS_tdata_reg[16]_0 (\txAXIS_tdata[23]_i_4_n_0 ),
        .\txAXIS_tdata_reg[16]_1 (\txAXIS_tdata[16]_i_2_n_0 ),
        .\txAXIS_tdata_reg[16]_2 (myCrc_n_319),
        .\txAXIS_tdata_reg[16]_3 (\txAXIS_tdata[22]_i_4_n_0 ),
        .\txAXIS_tdata_reg[16]_4 (\txAXIS_tdata[16]_i_4_n_0 ),
        .\txAXIS_tdata_reg[17] (\txAXIS_tdata[17]_i_2_n_0 ),
        .\txAXIS_tdata_reg[17]_0 (myCrc_n_304),
        .\txAXIS_tdata_reg[17]_1 (\txAXIS_tdata[17]_i_4_n_0 ),
        .\txAXIS_tdata_reg[18] (\txAXIS_tdata[18]_i_2_n_0 ),
        .\txAXIS_tdata_reg[18]_0 (myCrc_n_316),
        .\txAXIS_tdata_reg[18]_1 (\txAXIS_tdata[18]_i_4_n_0 ),
        .\txAXIS_tdata_reg[19] (\txAXIS_tdata[19]_i_2_n_0 ),
        .\txAXIS_tdata_reg[19]_0 (myCrc_n_336),
        .\txAXIS_tdata_reg[19]_1 (\txAXIS_tdata[29]_i_3_n_0 ),
        .\txAXIS_tdata_reg[19]_2 (\txAXIS_tdata[19]_i_4_n_0 ),
        .\txAXIS_tdata_reg[20] (\txAXIS_tdata[20]_i_2_n_0 ),
        .\txAXIS_tdata_reg[20]_0 (myCrc_n_337),
        .\txAXIS_tdata_reg[20]_1 (\txAXIS_tdata[20]_i_4_n_0 ),
        .\txAXIS_tdata_reg[21] (\txAXIS_tdata[21]_i_2_n_0 ),
        .\txAXIS_tdata_reg[21]_0 (myCrc_n_312),
        .\txAXIS_tdata_reg[21]_1 (\txAXIS_tdata[21]_i_4_n_0 ),
        .\txAXIS_tdata_reg[22] (\txAXIS_tdata[22]_i_2_n_0 ),
        .\txAXIS_tdata_reg[22]_0 (myCrc_n_310),
        .\txAXIS_tdata_reg[22]_1 (\txAXIS_tdata[22]_i_5_n_0 ),
        .\txAXIS_tdata_reg[23] ({\pollbuf_reg[2]_68 [7],\pollbuf_reg[2]_68 [4:3]}),
        .\txAXIS_tdata_reg[23]_0 (\txAXIS_tdata[23]_i_5_n_0 ),
        .\txAXIS_tdata_reg[23]_1 (myCrc_n_338),
        .\txAXIS_tdata_reg[23]_2 (\txAXIS_tdata[23]_i_7_n_0 ),
        .\txAXIS_tdata_reg[24] (\txAXIS_tdata[31]_i_3_n_0 ),
        .\txAXIS_tdata_reg[24]_0 (\txAXIS_tdata[24]_i_2_n_0 ),
        .\txAXIS_tdata_reg[24]_1 (myCrc_n_339),
        .\txAXIS_tdata_reg[24]_2 (\txAXIS_tdata[24]_i_4_n_0 ),
        .\txAXIS_tdata_reg[25] (\txAXIS_tdata[25]_i_2_n_0 ),
        .\txAXIS_tdata_reg[25]_0 (myCrc_n_340),
        .\txAXIS_tdata_reg[25]_1 (\txAXIS_tdata[25]_i_4_n_0 ),
        .\txAXIS_tdata_reg[26] (\txAXIS_tdata[26]_i_2_n_0 ),
        .\txAXIS_tdata_reg[26]_0 (myCrc_n_341),
        .\txAXIS_tdata_reg[26]_1 (\txAXIS_tdata[26]_i_4_n_0 ),
        .\txAXIS_tdata_reg[27] (\txAXIS_tdata[27]_i_2_n_0 ),
        .\txAXIS_tdata_reg[27]_0 (myCrc_n_342),
        .\txAXIS_tdata_reg[27]_1 (\txAXIS_tdata[27]_i_4_n_0 ),
        .\txAXIS_tdata_reg[28] (\txAXIS_tdata[28]_i_2_n_0 ),
        .\txAXIS_tdata_reg[28]_0 (myCrc_n_343),
        .\txAXIS_tdata_reg[28]_1 (\txAXIS_tdata[28]_i_4_n_0 ),
        .\txAXIS_tdata_reg[29] (\pollbuf_reg[3]_69 ),
        .\txAXIS_tdata_reg[29]_0 (\txAXIS_tdata[29]_i_2_n_0 ),
        .\txAXIS_tdata_reg[29]_1 (myCrc_n_344),
        .\txAXIS_tdata_reg[29]_2 (\txAXIS_tdata[29]_i_5_n_0 ),
        .\txAXIS_tdata_reg[2] (\txAXIS_tdata[2]_i_2_n_0 ),
        .\txAXIS_tdata_reg[2]_0 (myCrc_n_320),
        .\txAXIS_tdata_reg[2]_1 (\txAXIS_tdata[2]_i_4_n_0 ),
        .\txAXIS_tdata_reg[30] (\txAXIS_tdata[30]_i_2_n_0 ),
        .\txAXIS_tdata_reg[30]_0 (myCrc_n_345),
        .\txAXIS_tdata_reg[30]_1 (\txAXIS_tdata[30]_i_4_n_0 ),
        .\txAXIS_tdata_reg[31] (\txAXIS_tdata[31]_i_4_n_0 ),
        .\txAXIS_tdata_reg[31]_0 (myCrc_n_346),
        .\txAXIS_tdata_reg[31]_1 (\txAXIS_tdata[31]_i_6_n_0 ),
        .\txAXIS_tdata_reg[32] (\txAXIS_tdata[39]_i_3_n_0 ),
        .\txAXIS_tdata_reg[32]_0 (resid),
        .\txAXIS_tdata_reg[32]_1 (\txAXIS_tdata[39]_i_4_n_0 ),
        .\txAXIS_tdata_reg[32]_2 (\txAXIS_tdata[32]_i_2_n_0 ),
        .\txAXIS_tdata_reg[32]_3 (myCrc_n_303),
        .\txAXIS_tdata_reg[33] (\txAXIS_tdata[33]_i_2_n_0 ),
        .\txAXIS_tdata_reg[33]_0 (myCrc_n_302),
        .\txAXIS_tdata_reg[34] (\txAXIS_tdata[34]_i_2_n_0 ),
        .\txAXIS_tdata_reg[34]_0 (myCrc_n_301),
        .\txAXIS_tdata_reg[35] (\txAXIS_tdata[35]_i_2_n_0 ),
        .\txAXIS_tdata_reg[35]_0 (myCrc_n_300),
        .\txAXIS_tdata_reg[36] (\txAXIS_tdata[36]_i_2_n_0 ),
        .\txAXIS_tdata_reg[36]_0 (myCrc_n_299),
        .\txAXIS_tdata_reg[37] (\txAXIS_tdata[37]_i_2_n_0 ),
        .\txAXIS_tdata_reg[37]_0 (myCrc_n_298),
        .\txAXIS_tdata_reg[38] (\txAXIS_tdata[38]_i_2_n_0 ),
        .\txAXIS_tdata_reg[38]_0 (myCrc_n_297),
        .\txAXIS_tdata_reg[39] (\txAXIS_tdata[39]_i_5_n_0 ),
        .\txAXIS_tdata_reg[39]_0 (myCrc_n_296),
        .\txAXIS_tdata_reg[40] (\txAXIS_tdata[47]_i_3_n_0 ),
        .\txAXIS_tdata_reg[48] (\txAXIS_tdata[55]_i_3_n_0 ),
        .\txAXIS_tdata_reg[48]_0 (\txAXIS_tdata[55]_i_4_n_0 ),
        .\txAXIS_tdata_reg[48]_1 (\txAXIS_tdata[55]_i_5_n_0 ),
        .\txAXIS_tdata_reg[48]_2 (\txAXIS_tdata[55]_i_6_n_0 ),
        .\txAXIS_tdata_reg[48]_3 (\txAXIS_tdata[48]_i_2_n_0 ),
        .\txAXIS_tdata_reg[48]_4 (\txAXIS_tdata[48]_i_3_n_0 ),
        .\txAXIS_tdata_reg[48]_5 (myCrc_n_318),
        .\txAXIS_tdata_reg[49] (\txAXIS_tdata[49]_i_2_n_0 ),
        .\txAXIS_tdata_reg[49]_0 (\txAXIS_tdata[49]_i_3_n_0 ),
        .\txAXIS_tdata_reg[49]_1 (myCrc_n_317),
        .\txAXIS_tdata_reg[4] (\txAXIS_tdata[4]_i_2_n_0 ),
        .\txAXIS_tdata_reg[4]_0 (\txAXIS_tdata[6]_i_3_n_0 ),
        .\txAXIS_tdata_reg[4]_1 (myCrc_n_321),
        .\txAXIS_tdata_reg[4]_2 (\txAXIS_tdata[4]_i_4_n_0 ),
        .\txAXIS_tdata_reg[50] (\txAXIS_tdata[50]_i_2_n_0 ),
        .\txAXIS_tdata_reg[50]_0 (\txAXIS_tdata[50]_i_3_n_0 ),
        .\txAXIS_tdata_reg[50]_1 (myCrc_n_315),
        .\txAXIS_tdata_reg[51] (\txAXIS_tdata[51]_i_2_n_0 ),
        .\txAXIS_tdata_reg[51]_0 (\txAXIS_tdata[51]_i_3_n_0 ),
        .\txAXIS_tdata_reg[51]_1 (myCrc_n_314),
        .\txAXIS_tdata_reg[52] (\txAXIS_tdata[52]_i_2_n_0 ),
        .\txAXIS_tdata_reg[52]_0 (\txAXIS_tdata[52]_i_3_n_0 ),
        .\txAXIS_tdata_reg[52]_1 (myCrc_n_313),
        .\txAXIS_tdata_reg[53] (\txAXIS_tdata[53]_i_2_n_0 ),
        .\txAXIS_tdata_reg[53]_0 (\txAXIS_tdata[53]_i_3_n_0 ),
        .\txAXIS_tdata_reg[53]_1 (myCrc_n_311),
        .\txAXIS_tdata_reg[54] (\txAXIS_tdata[54]_i_2_n_0 ),
        .\txAXIS_tdata_reg[54]_0 (\txAXIS_tdata[54]_i_3_n_0 ),
        .\txAXIS_tdata_reg[54]_1 (myCrc_n_309),
        .\txAXIS_tdata_reg[55] (\txAXIS_tdata[55]_i_7_n_0 ),
        .\txAXIS_tdata_reg[55]_0 (\txAXIS_tdata[55]_i_8_n_0 ),
        .\txAXIS_tdata_reg[55]_1 (myCrc_n_308),
        .\txAXIS_tdata_reg[56] (\txAXIS_tdata[63]_i_3_n_0 ),
        .\txAXIS_tdata_reg[56]_0 (\txAXIS_tdata[63]_i_4_n_0 ),
        .\txAXIS_tdata_reg[56]_1 (\txAXIS_tdata[63]_i_5_n_0 ),
        .\txAXIS_tdata_reg[56]_2 (myCrc_n_335),
        .\txAXIS_tdata_reg[56]_3 (\txAXIS_tdata[56]_i_3_n_0 ),
        .\txAXIS_tdata_reg[56]_4 (\txAXIS_tdata[56]_i_4_n_0 ),
        .\txAXIS_tdata_reg[57] (myCrc_n_334),
        .\txAXIS_tdata_reg[57]_0 (\txAXIS_tdata[57]_i_3_n_0 ),
        .\txAXIS_tdata_reg[57]_1 (\txAXIS_tdata[57]_i_4_n_0 ),
        .\txAXIS_tdata_reg[58] (\txAXIS_tdata[58]_i_2_n_0 ),
        .\txAXIS_tdata_reg[58]_0 (myCrc_n_307),
        .\txAXIS_tdata_reg[59] (\txAXIS_tdata[59]_i_2_n_0 ),
        .\txAXIS_tdata_reg[59]_0 (myCrc_n_306),
        .\txAXIS_tdata_reg[5] (myCrc_n_295),
        .\txAXIS_tdata_reg[5]_0 (\txAXIS_tdata[5]_i_3_n_0 ),
        .\txAXIS_tdata_reg[5]_1 (\txAXIS_tdata_reg[5]_i_4_n_0 ),
        .\txAXIS_tdata_reg[5]_2 (\txAXIS_tdata[5]_i_5_n_0 ),
        .\txAXIS_tdata_reg[5]_3 (\txAXIS_tdata[7]_i_8_n_0 ),
        .\txAXIS_tdata_reg[60] (myCrc_n_333),
        .\txAXIS_tdata_reg[60]_0 (\txAXIS_tdata[60]_i_3_n_0 ),
        .\txAXIS_tdata_reg[60]_1 (\txAXIS_tdata[60]_i_4_n_0 ),
        .\txAXIS_tdata_reg[61] (myCrc_n_332),
        .\txAXIS_tdata_reg[61]_0 (\txAXIS_tdata[61]_i_3_n_0 ),
        .\txAXIS_tdata_reg[61]_1 (\txAXIS_tdata[61]_i_4_n_0 ),
        .\txAXIS_tdata_reg[62] (\txAXIS_tdata[62]_i_2_n_0 ),
        .\txAXIS_tdata_reg[62]_0 (myCrc_n_305),
        .\txAXIS_tdata_reg[63] (myCrc_n_331),
        .\txAXIS_tdata_reg[63]_0 (\txAXIS_tdata[63]_i_7_n_0 ),
        .\txAXIS_tdata_reg[63]_1 (\txAXIS_tdata[63]_i_8_n_0 ),
        .\txAXIS_tdata_reg[6] (\txAXIS_tdata[6]_i_2_n_0 ),
        .\txAXIS_tdata_reg[6]_0 (myCrc_n_322),
        .\txAXIS_tdata_reg[6]_1 (\txAXIS_tdata[6]_i_5_n_0 ),
        .\txAXIS_tdata_reg[7] (myRxtx_n_598),
        .\txAXIS_tdata_reg[7]_0 (myCrc_n_294),
        .\txAXIS_tdata_reg[7]_1 (\txAXIS_tdata[7]_i_7_n_0 ),
        .\txAXIS_tdata_reg[8] (\txAXIS_tdata[15]_i_3_n_0 ),
        .\txAXIS_tdata_reg[8]_0 (\txAXIS_tdata[15]_i_4_n_0 ),
        .\txAXIS_tdata_reg[8]_1 (\txAXIS_tdata[15]_i_5_n_0 ),
        .txlast1(txlast1[30:1]),
        .\txlen_reg[0] (\txlen[0]_i_2_n_0 ),
        .vidtrackGetInfoPtr0Seqbuf(vidtrackGetInfoPtr0Seqbuf[5]),
        .vidtrackGetInfoTixVState(vidtrackGetInfoTixVState[0]),
        .\wordcntCrcLast_reg[0] (\wordcntCrcLast[0]_i_2_n_0 ),
        .\wordcntCrcLast_reg[16] ({\wordcntCrcLast_reg[16]_i_2_n_8 ,\wordcntCrcLast_reg[16]_i_2_n_9 ,\wordcntCrcLast_reg[16]_i_2_n_10 ,\wordcntCrcLast_reg[16]_i_2_n_11 ,\wordcntCrcLast_reg[16]_i_2_n_12 ,\wordcntCrcLast_reg[16]_i_2_n_13 ,\wordcntCrcLast_reg[16]_i_2_n_14 ,\wordcntCrcLast_reg[16]_i_2_n_15 }),
        .\wordcntCrcLast_reg[1] (\wordcntCrcLast[24]_i_4_n_0 ),
        .\wordcntCrcLast_reg[24] (\wordcntCrcLast[24]_i_3_n_0 ),
        .\wordcntCrcLast_reg[24]_0 ({\wordcntCrcLast_reg[24]_i_5_n_8 ,\wordcntCrcLast_reg[24]_i_5_n_9 ,\wordcntCrcLast_reg[24]_i_5_n_10 ,\wordcntCrcLast_reg[24]_i_5_n_11 ,\wordcntCrcLast_reg[24]_i_5_n_12 ,\wordcntCrcLast_reg[24]_i_5_n_13 ,\wordcntCrcLast_reg[24]_i_5_n_14 ,\wordcntCrcLast_reg[24]_i_5_n_15 }),
        .\wordcntCrcLast_reg[2] (\wordcntLast[2]_i_2_n_0 ),
        .\wordcntLast_reg[0] (\wordcntLast[0]_i_2_n_0 ),
        .\wordcntLast_reg[0]_0 (\wordcntLast[0]_i_3_n_0 ),
        .\wordcntLast_reg[0]_1 (\wordcntLast[0]_i_4_n_0 ),
        .\wordcntLast_reg[0]_2 (\wordcntLast[0]_i_5_n_0 ),
        .\wordcntLast_reg[28] (\wordcntLast[28]_i_5_n_0 ),
        .\wordcntLast_reg[28]_0 (\wordcntLast[28]_i_3_n_0 ),
        .\wordcntLast_reg[28]_1 (\wordcntLast[28]_i_4_n_0 ),
        .\wordcntLast_reg[3] (\wordcntLast[28]_i_6_n_0 ),
        .\wordcnt_reg[0]_0 (\opbuf_reg[0]51_in [6]),
        .\wordcnt_reg[0]_1 (\wordcnt[30]_i_6_n_0 ),
        .\wordcnt_reg[0]_2 (\wordcnt[30]_i_7_n_0 ),
        .\wordcnt_reg[0]_3 (\wordcnt[30]_i_11_n_0 ),
        .\wordcnt_reg[1]_0 (\wordcnt[30]_i_9_n_0 ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Timeout_v1_0_56 myWordto
       (.Q({myWordto_n_0,myWordto_n_1}),
        .aclk_sig(aclk_sig),
        .\stateOp[1]_i_3 (\stateOp_reg[5]_0 ),
        .\stateOp_reg[0]_0 (\stateOp_reg[1]_6 ),
        .\stateOp_reg[0]_1 (myRxtx_n_536),
        .\stateOp_reg[2] (myWordto_n_2),
        .tkclk(tkclk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Timeout_v1_0__parameterized1_57 myXferto
       (.Q({myXferto_n_0,myXferto_n_1}),
        .aclk_sig(aclk_sig),
        .\stateOp[1]_i_3__0 (\stateOp_reg[5]_0 ),
        .\stateOp_reg[0]_0 (myXferto_n_2),
        .\stateOp_reg[0]_1 (myRxtx_n_535),
        .\stateOp_reg[1]_0 (\stateOp_reg[1]_6 ),
        .\stateOp_reg[2] (myXferto_n_3),
        .\stateOp_reg[3] (myXferto_n_4),
        .tkclk(tkclk));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \opbuf[0][7]_i_10 
       (.I0(\opbuf_reg[0]51_in [13]),
        .I1(\opbuf_reg[0]3 [10]),
        .I2(\opbuf_reg[0]51_in [12]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [9]),
        .O(\opbuf[0][7]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFEE2E)) 
    \opbuf[0][7]_i_11 
       (.I0(\opbuf_reg[0]51_in [30]),
        .I1(\wordcnt_reg_n_0_[25] ),
        .I2(\opbuf_reg[0][7]_i_16_n_7 ),
        .I3(\opbuf_reg[0]3 [27]),
        .I4(\opbuf[0][7]_i_18_n_0 ),
        .I5(\opbuf[0][7]_i_19_n_0 ),
        .O(\opbuf[0][7]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \opbuf[0][7]_i_14 
       (.I0(\opbuf_reg[0]51_in [17]),
        .I1(\opbuf_reg[0]3 [14]),
        .I2(\opbuf_reg[0]51_in [16]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [13]),
        .O(\opbuf[0][7]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \opbuf[0][7]_i_15 
       (.I0(\opbuf_reg[0]51_in [19]),
        .I1(\opbuf_reg[0]3 [16]),
        .I2(\opbuf_reg[0]51_in [18]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [15]),
        .O(\opbuf[0][7]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFDDFAD8)) 
    \opbuf[0][7]_i_18 
       (.I0(\wordcnt_reg_n_0_[25] ),
        .I1(\opbuf_reg[0]3 [25]),
        .I2(\opbuf_reg[0]51_in [28]),
        .I3(\opbuf_reg[0]3 [26]),
        .I4(\opbuf_reg[0]51_in [29]),
        .I5(\opbuf[0][7]_i_45_n_0 ),
        .O(\opbuf[0][7]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFDDFAD8)) 
    \opbuf[0][7]_i_19 
       (.I0(\wordcnt_reg_n_0_[25] ),
        .I1(\opbuf_reg[0]3 [19]),
        .I2(\opbuf_reg[0]51_in [22]),
        .I3(\opbuf_reg[0]3 [20]),
        .I4(\opbuf_reg[0]51_in [23]),
        .I5(\opbuf[0][7]_i_46_n_0 ),
        .O(\opbuf[0][7]_i_19_n_0 ));
  LUT3 #(
    .INIT(8'h1D)) 
    \opbuf[0][7]_i_20 
       (.I0(\opbuf_reg[0]51_in [6]),
        .I1(\wordcnt_reg_n_0_[25] ),
        .I2(\opbuf_reg[0]5 [6]),
        .O(\opbuf[0][7]_i_20_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_21 
       (.I0(\opbuf_reg[0]51_in [14]),
        .I1(\opbuf_reg[0]5 [14]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_21_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_22 
       (.I0(\opbuf_reg[0]51_in [13]),
        .I1(\opbuf_reg[0]5 [13]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_22_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_23 
       (.I0(\opbuf_reg[0]51_in [12]),
        .I1(\opbuf_reg[0]5 [12]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_24 
       (.I0(\opbuf_reg[0]51_in [11]),
        .I1(\opbuf_reg[0]5 [11]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_24_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_25 
       (.I0(\opbuf_reg[0]51_in [10]),
        .I1(\opbuf_reg[0]5 [10]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_25_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_26 
       (.I0(\opbuf_reg[0]51_in [9]),
        .I1(\opbuf_reg[0]5 [9]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_26_n_0 ));
  LUT3 #(
    .INIT(8'h47)) 
    \opbuf[0][7]_i_27 
       (.I0(\opbuf_reg[0]5 [8]),
        .I1(\wordcnt_reg_n_0_[25] ),
        .I2(\opbuf_reg[0]51_in [8]),
        .O(\opbuf[0][7]_i_27_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_28 
       (.I0(\opbuf_reg[0]51_in [7]),
        .I1(\opbuf_reg[0]5 [7]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_28_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_29 
       (.I0(\opbuf_reg[0]51_in [22]),
        .I1(\opbuf_reg[0]5 [22]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    \opbuf[0][7]_i_3 
       (.I0(\opbuf[0][7]_i_6_n_0 ),
        .I1(\opbuf[0][7]_i_7_n_0 ),
        .I2(\opbuf[0][7]_i_8_n_0 ),
        .I3(\opbuf[0][7]_i_9_n_0 ),
        .I4(\opbuf[0][7]_i_10_n_0 ),
        .I5(\opbuf[0][7]_i_11_n_0 ),
        .O(\opbuf[0][7]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_30 
       (.I0(\opbuf_reg[0]51_in [21]),
        .I1(\opbuf_reg[0]5 [21]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_30_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_31 
       (.I0(\opbuf_reg[0]51_in [20]),
        .I1(\opbuf_reg[0]5 [20]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_31_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_32 
       (.I0(\opbuf_reg[0]51_in [19]),
        .I1(\opbuf_reg[0]5 [19]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_32_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_33 
       (.I0(\opbuf_reg[0]51_in [18]),
        .I1(\opbuf_reg[0]5 [18]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_33_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_34 
       (.I0(\opbuf_reg[0]51_in [17]),
        .I1(\opbuf_reg[0]5 [17]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_34_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_35 
       (.I0(\opbuf_reg[0]51_in [16]),
        .I1(\opbuf_reg[0]5 [16]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_35_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_36 
       (.I0(\opbuf_reg[0]51_in [15]),
        .I1(\opbuf_reg[0]5 [15]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_36_n_0 ));
  LUT3 #(
    .INIT(8'h47)) 
    \opbuf[0][7]_i_37 
       (.I0(\opbuf_reg[0]5 [30]),
        .I1(\wordcnt_reg_n_0_[25] ),
        .I2(\opbuf_reg[0]51_in [30]),
        .O(\opbuf[0][7]_i_37_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_38 
       (.I0(\opbuf_reg[0]51_in [29]),
        .I1(\opbuf_reg[0]5 [29]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_38_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_39 
       (.I0(\opbuf_reg[0]51_in [28]),
        .I1(\opbuf_reg[0]5 [28]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_39_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000040)) 
    \opbuf[0][7]_i_4 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [1]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [5]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\opbuf[0][7]_i_4_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_40 
       (.I0(\opbuf_reg[0]51_in [27]),
        .I1(\opbuf_reg[0]5 [27]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_40_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_41 
       (.I0(\opbuf_reg[0]51_in [26]),
        .I1(\opbuf_reg[0]5 [26]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_41_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_42 
       (.I0(\opbuf_reg[0]51_in [25]),
        .I1(\opbuf_reg[0]5 [25]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_42_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_43 
       (.I0(\opbuf_reg[0]51_in [24]),
        .I1(\opbuf_reg[0]5 [24]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_43_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[0][7]_i_44 
       (.I0(\opbuf_reg[0]51_in [23]),
        .I1(\opbuf_reg[0]5 [23]),
        .I2(\wordcnt_reg_n_0_[25] ),
        .O(\opbuf[0][7]_i_44_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \opbuf[0][7]_i_45 
       (.I0(\opbuf_reg[0]51_in [27]),
        .I1(\opbuf_reg[0]3 [24]),
        .I2(\opbuf_reg[0]51_in [26]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [23]),
        .O(\opbuf[0][7]_i_45_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \opbuf[0][7]_i_46 
       (.I0(\opbuf_reg[0]51_in [25]),
        .I1(\opbuf_reg[0]3 [22]),
        .I2(\opbuf_reg[0]51_in [24]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [21]),
        .O(\opbuf[0][7]_i_46_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_50 
       (.I0(\opbuf_reg[0]51_in [20]),
        .O(\opbuf[0][7]_i_50_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_51 
       (.I0(\opbuf_reg[0]51_in [19]),
        .O(\opbuf[0][7]_i_51_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_52 
       (.I0(\opbuf_reg[0]51_in [18]),
        .O(\opbuf[0][7]_i_52_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_53 
       (.I0(\opbuf_reg[0]51_in [17]),
        .O(\opbuf[0][7]_i_53_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_54 
       (.I0(\opbuf_reg[0]51_in [16]),
        .O(\opbuf[0][7]_i_54_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_55 
       (.I0(\opbuf_reg[0]51_in [15]),
        .O(\opbuf[0][7]_i_55_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_56 
       (.I0(\opbuf_reg[0]51_in [14]),
        .O(\opbuf[0][7]_i_56_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_57 
       (.I0(\opbuf_reg[0]51_in [13]),
        .O(\opbuf[0][7]_i_57_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_58 
       (.I0(\opbuf_reg[0]51_in [28]),
        .O(\opbuf[0][7]_i_58_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_59 
       (.I0(\opbuf_reg[0]51_in [27]),
        .O(\opbuf[0][7]_i_59_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFDDFAD8)) 
    \opbuf[0][7]_i_6 
       (.I0(\wordcnt_reg_n_0_[25] ),
        .I1(\opbuf_reg[0]3 [11]),
        .I2(\opbuf_reg[0]51_in [14]),
        .I3(\opbuf_reg[0]3 [12]),
        .I4(\opbuf_reg[0]51_in [15]),
        .I5(\opbuf[0][7]_i_14_n_0 ),
        .O(\opbuf[0][7]_i_6_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_60 
       (.I0(\opbuf_reg[0]51_in [26]),
        .O(\opbuf[0][7]_i_60_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_61 
       (.I0(\opbuf_reg[0]51_in [25]),
        .O(\opbuf[0][7]_i_61_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_62 
       (.I0(\opbuf_reg[0]51_in [24]),
        .O(\opbuf[0][7]_i_62_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_63 
       (.I0(\opbuf_reg[0]51_in [23]),
        .O(\opbuf[0][7]_i_63_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_64 
       (.I0(\opbuf_reg[0]51_in [22]),
        .O(\opbuf[0][7]_i_64_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_65 
       (.I0(\opbuf_reg[0]51_in [21]),
        .O(\opbuf[0][7]_i_65_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_66 
       (.I0(\opbuf_reg[0]51_in [30]),
        .O(\opbuf[0][7]_i_66_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[0][7]_i_67 
       (.I0(\opbuf_reg[0]51_in [29]),
        .O(\opbuf[0][7]_i_67_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFDDFAD8)) 
    \opbuf[0][7]_i_7 
       (.I0(\wordcnt_reg_n_0_[25] ),
        .I1(\opbuf_reg[0]3 [17]),
        .I2(\opbuf_reg[0]51_in [20]),
        .I3(\opbuf_reg[0]3 [18]),
        .I4(\opbuf_reg[0]51_in [21]),
        .I5(\opbuf[0][7]_i_15_n_0 ),
        .O(\opbuf[0][7]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h01000111)) 
    \opbuf[0][7]_i_8 
       (.I0(\invbuf[9][7]_i_6_n_0 ),
        .I1(\invbuf[9][7]_i_16_n_0 ),
        .I2(\opbuf_reg[0]3 [6]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]51_in [9]),
        .O(\opbuf[0][7]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \opbuf[0][7]_i_9 
       (.I0(\opbuf_reg[0]51_in [11]),
        .I1(\opbuf_reg[0]3 [8]),
        .I2(\opbuf_reg[0]51_in [10]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .I4(\opbuf_reg[0]3 [7]),
        .O(\opbuf[0][7]_i_9_n_0 ));
  FDCE \opbuf_reg[0][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_12),
        .Q(\opbuf_reg_n_0_[0][0] ));
  FDCE \opbuf_reg[0][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_11),
        .Q(\opbuf_reg_n_0_[0][1] ));
  FDCE \opbuf_reg[0][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_10),
        .Q(\opbuf_reg_n_0_[0][2] ));
  FDCE \opbuf_reg[0][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_9),
        .Q(\opbuf_reg_n_0_[0][3] ));
  FDCE \opbuf_reg[0][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_8),
        .Q(\opbuf_reg_n_0_[0][4] ));
  FDCE \opbuf_reg[0][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_7),
        .Q(\opbuf_reg_n_0_[0][5] ));
  FDCE \opbuf_reg[0][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_6),
        .Q(\opbuf_reg_n_0_[0][6] ));
  FDCE \opbuf_reg[0][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_5),
        .Q(\opbuf_reg_n_0_[0][7] ));
  CARRY8 \opbuf_reg[0][7]_i_12 
       (.CI(\opbuf[0][7]_i_20_n_0 ),
        .CI_TOP(1'b0),
        .CO({\opbuf_reg[0][7]_i_12_n_0 ,\opbuf_reg[0][7]_i_12_n_1 ,\opbuf_reg[0][7]_i_12_n_2 ,\opbuf_reg[0][7]_i_12_n_3 ,\opbuf_reg[0][7]_i_12_n_4 ,\opbuf_reg[0][7]_i_12_n_5 ,\opbuf_reg[0][7]_i_12_n_6 ,\opbuf_reg[0][7]_i_12_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\opbuf_reg[0]3 [11:4]),
        .S({\opbuf[0][7]_i_21_n_0 ,\opbuf[0][7]_i_22_n_0 ,\opbuf[0][7]_i_23_n_0 ,\opbuf[0][7]_i_24_n_0 ,\opbuf[0][7]_i_25_n_0 ,\opbuf[0][7]_i_26_n_0 ,\opbuf[0][7]_i_27_n_0 ,\opbuf[0][7]_i_28_n_0 }));
  CARRY8 \opbuf_reg[0][7]_i_13 
       (.CI(\opbuf_reg[0][7]_i_12_n_0 ),
        .CI_TOP(1'b0),
        .CO({\opbuf_reg[0][7]_i_13_n_0 ,\opbuf_reg[0][7]_i_13_n_1 ,\opbuf_reg[0][7]_i_13_n_2 ,\opbuf_reg[0][7]_i_13_n_3 ,\opbuf_reg[0][7]_i_13_n_4 ,\opbuf_reg[0][7]_i_13_n_5 ,\opbuf_reg[0][7]_i_13_n_6 ,\opbuf_reg[0][7]_i_13_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\opbuf_reg[0]3 [19:12]),
        .S({\opbuf[0][7]_i_29_n_0 ,\opbuf[0][7]_i_30_n_0 ,\opbuf[0][7]_i_31_n_0 ,\opbuf[0][7]_i_32_n_0 ,\opbuf[0][7]_i_33_n_0 ,\opbuf[0][7]_i_34_n_0 ,\opbuf[0][7]_i_35_n_0 ,\opbuf[0][7]_i_36_n_0 }));
  CARRY8 \opbuf_reg[0][7]_i_16 
       (.CI(\opbuf_reg[0][7]_i_17_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_opbuf_reg[0][7]_i_16_CO_UNCONNECTED [7:1],\opbuf_reg[0][7]_i_16_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_opbuf_reg[0][7]_i_16_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1}));
  CARRY8 \opbuf_reg[0][7]_i_17 
       (.CI(\opbuf_reg[0][7]_i_13_n_0 ),
        .CI_TOP(1'b0),
        .CO({\opbuf_reg[0][7]_i_17_n_0 ,\opbuf_reg[0][7]_i_17_n_1 ,\opbuf_reg[0][7]_i_17_n_2 ,\opbuf_reg[0][7]_i_17_n_3 ,\opbuf_reg[0][7]_i_17_n_4 ,\opbuf_reg[0][7]_i_17_n_5 ,\opbuf_reg[0][7]_i_17_n_6 ,\opbuf_reg[0][7]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\opbuf_reg[0]3 [27:20]),
        .S({\opbuf[0][7]_i_37_n_0 ,\opbuf[0][7]_i_38_n_0 ,\opbuf[0][7]_i_39_n_0 ,\opbuf[0][7]_i_40_n_0 ,\opbuf[0][7]_i_41_n_0 ,\opbuf[0][7]_i_42_n_0 ,\opbuf[0][7]_i_43_n_0 ,\opbuf[0][7]_i_44_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \opbuf_reg[0][7]_i_47 
       (.CI(\invbuf_reg[9][7]_i_12_n_0 ),
        .CI_TOP(1'b0),
        .CO({\opbuf_reg[0][7]_i_47_n_0 ,\opbuf_reg[0][7]_i_47_n_1 ,\opbuf_reg[0][7]_i_47_n_2 ,\opbuf_reg[0][7]_i_47_n_3 ,\opbuf_reg[0][7]_i_47_n_4 ,\opbuf_reg[0][7]_i_47_n_5 ,\opbuf_reg[0][7]_i_47_n_6 ,\opbuf_reg[0][7]_i_47_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\opbuf_reg[0]5 [20:13]),
        .S({\opbuf[0][7]_i_50_n_0 ,\opbuf[0][7]_i_51_n_0 ,\opbuf[0][7]_i_52_n_0 ,\opbuf[0][7]_i_53_n_0 ,\opbuf[0][7]_i_54_n_0 ,\opbuf[0][7]_i_55_n_0 ,\opbuf[0][7]_i_56_n_0 ,\opbuf[0][7]_i_57_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \opbuf_reg[0][7]_i_48 
       (.CI(\opbuf_reg[0][7]_i_47_n_0 ),
        .CI_TOP(1'b0),
        .CO({\opbuf_reg[0][7]_i_48_n_0 ,\opbuf_reg[0][7]_i_48_n_1 ,\opbuf_reg[0][7]_i_48_n_2 ,\opbuf_reg[0][7]_i_48_n_3 ,\opbuf_reg[0][7]_i_48_n_4 ,\opbuf_reg[0][7]_i_48_n_5 ,\opbuf_reg[0][7]_i_48_n_6 ,\opbuf_reg[0][7]_i_48_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\opbuf_reg[0]5 [28:21]),
        .S({\opbuf[0][7]_i_58_n_0 ,\opbuf[0][7]_i_59_n_0 ,\opbuf[0][7]_i_60_n_0 ,\opbuf[0][7]_i_61_n_0 ,\opbuf[0][7]_i_62_n_0 ,\opbuf[0][7]_i_63_n_0 ,\opbuf[0][7]_i_64_n_0 ,\opbuf[0][7]_i_65_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \opbuf_reg[0][7]_i_49 
       (.CI(\opbuf_reg[0][7]_i_48_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_opbuf_reg[0][7]_i_49_CO_UNCONNECTED [7:1],\opbuf_reg[0][7]_i_49_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_opbuf_reg[0][7]_i_49_O_UNCONNECTED [7:2],\opbuf_reg[0]5 [30:29]}),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\opbuf[0][7]_i_66_n_0 ,\opbuf[0][7]_i_67_n_0 }));
  FDCE \opbuf_reg[1][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [0]),
        .Q(\opbuf_reg[1]_60 [0]));
  FDCE \opbuf_reg[1][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [1]),
        .Q(\opbuf_reg[1]_60 [1]));
  FDCE \opbuf_reg[1][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [2]),
        .Q(\opbuf_reg[1]_60 [2]));
  FDCE \opbuf_reg[1][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [3]),
        .Q(\opbuf_reg[1]_60 [3]));
  FDCE \opbuf_reg[1][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [4]),
        .Q(\opbuf_reg[1]_60 [4]));
  FDCE \opbuf_reg[1][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [5]),
        .Q(\opbuf_reg[1]_60 [5]));
  FDCE \opbuf_reg[1][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [6]),
        .Q(\opbuf_reg[1]_60 [6]));
  FDCE \opbuf_reg[1][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[1]_75 [7]),
        .Q(\opbuf_reg[1]_60 [7]));
  FDCE \opbuf_reg[2][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [0]),
        .Q(\opbuf_reg_n_0_[2][0] ));
  FDCE \opbuf_reg[2][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [1]),
        .Q(\opbuf_reg_n_0_[2][1] ));
  FDCE \opbuf_reg[2][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [2]),
        .Q(\opbuf_reg_n_0_[2][2] ));
  FDCE \opbuf_reg[2][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [3]),
        .Q(\opbuf_reg_n_0_[2][3] ));
  FDCE \opbuf_reg[2][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [4]),
        .Q(\opbuf_reg_n_0_[2][4] ));
  FDCE \opbuf_reg[2][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [5]),
        .Q(\opbuf_reg_n_0_[2][5] ));
  FDCE \opbuf_reg[2][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [6]),
        .Q(\opbuf_reg_n_0_[2][6] ));
  FDCE \opbuf_reg[2][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[2]_72 [7]),
        .Q(\opbuf_reg_n_0_[2][7] ));
  FDCE \opbuf_reg[3][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_34),
        .Q(\opbuf_reg[3]_64 [0]));
  FDCE \opbuf_reg[3][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[3]_70 [1]),
        .Q(\opbuf_reg[3]_64 [1]));
  FDCE \opbuf_reg[3][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_32),
        .Q(\opbuf_reg[3]_64 [2]));
  FDCE \opbuf_reg[3][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_31),
        .Q(\opbuf_reg[3]_64 [3]));
  FDCE \opbuf_reg[3][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_30),
        .Q(\opbuf_reg[3]_64 [4]));
  FDCE \opbuf_reg[3][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_29),
        .Q(\opbuf_reg[3]_64 [5]));
  FDCE \opbuf_reg[3][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[3]_70 [6]),
        .Q(\opbuf_reg[3]_64 [6]));
  FDCE \opbuf_reg[3][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_27),
        .Q(\opbuf_reg[3]_64 [7]));
  FDCE \opbuf_reg[4][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [0]),
        .Q(\opbuf_reg[4]_63 [0]));
  FDCE \opbuf_reg[4][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [1]),
        .Q(\opbuf_reg[4]_63 [1]));
  FDCE \opbuf_reg[4][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [2]),
        .Q(\opbuf_reg[4]_63 [2]));
  FDCE \opbuf_reg[4][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [3]),
        .Q(\opbuf_reg[4]_63 [3]));
  FDCE \opbuf_reg[4][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [4]),
        .Q(\opbuf_reg[4]_63 [4]));
  FDCE \opbuf_reg[4][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [5]),
        .Q(\opbuf_reg[4]_63 [5]));
  FDCE \opbuf_reg[4][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [6]),
        .Q(\opbuf_reg[4]_63 [6]));
  FDCE \opbuf_reg[4][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[4]_73 [7]),
        .Q(\opbuf_reg[4]_63 [7]));
  FDCE \opbuf_reg[5][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [0]),
        .Q(\opbuf_reg[5]_62 [0]));
  FDCE \opbuf_reg[5][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [1]),
        .Q(\opbuf_reg[5]_62 [1]));
  FDCE \opbuf_reg[5][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [2]),
        .Q(\opbuf_reg[5]_62 [2]));
  FDCE \opbuf_reg[5][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [3]),
        .Q(\opbuf_reg[5]_62 [3]));
  FDCE \opbuf_reg[5][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [4]),
        .Q(\opbuf_reg[5]_62 [4]));
  FDCE \opbuf_reg[5][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [5]),
        .Q(\opbuf_reg[5]_62 [5]));
  FDCE \opbuf_reg[5][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [6]),
        .Q(\opbuf_reg[5]_62 [6]));
  FDCE \opbuf_reg[5][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[5]_71 [7]),
        .Q(\opbuf_reg[5]_62 [7]));
  FDCE \opbuf_reg[6][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[6]_74 [0]),
        .Q(\opbuf_reg[6]_61 [0]));
  FDCE \opbuf_reg[6][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[6]_74 [1]),
        .Q(\opbuf_reg[6]_61 [1]));
  FDCE \opbuf_reg[6][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[6]_74 [2]),
        .Q(\opbuf_reg[6]_61 [2]));
  FDCE \opbuf_reg[6][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[6]_74 [3]),
        .Q(\opbuf_reg[6]_61 [3]));
  FDCE \opbuf_reg[6][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[6]_74 [4]),
        .Q(\opbuf_reg[6]_61 [4]));
  FDCE \opbuf_reg[6][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[6]_74 [5]),
        .Q(\opbuf_reg[6]_61 [5]));
  FDCE \opbuf_reg[6][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[6]_74 [6]),
        .Q(\opbuf_reg[6]_61 [6]));
  FDCE \opbuf_reg[6][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_25),
        .CLR(\stateOp_reg[1]_6 ),
        .D(\opbuf[6]_74 [7]),
        .Q(\opbuf_reg[6]_61 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2264" *) 
  LUT5 #(
    .INIT(32'hFFFEAAAF)) 
    \pollbuf[0][7]_i_3 
       (.I0(\pollbuf[0][7]_i_7_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[0] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[1] ),
        .I4(\tixVBuffer_reg_n_0_[3] ),
        .O(\pollbuf[0][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2264" *) 
  LUT5 #(
    .INIT(32'h00000001)) 
    \pollbuf[0][7]_i_4 
       (.I0(\tixVBuffer_reg_n_0_[0] ),
        .I1(\tixVBuffer_reg_n_0_[1] ),
        .I2(\pollbuf[0][7]_i_7_n_0 ),
        .I3(\tixVBuffer_reg_n_0_[2] ),
        .I4(\tixVBuffer_reg_n_0_[3] ),
        .O(\pollbuf[0][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2324" *) 
  LUT4 #(
    .INIT(16'h0100)) 
    \pollbuf[0][7]_i_5 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [5]),
        .I2(\stateOp_reg[5]_0 [3]),
        .I3(\stateOp_reg[5]_0 [1]),
        .O(\pollbuf[0][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000001010001)) 
    \pollbuf[0][7]_i_6 
       (.I0(\tixVBuffer_reg_n_0_[0] ),
        .I1(\tixVBuffer_reg_n_0_[1] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[3] ),
        .I4(p_0_in0),
        .I5(\tixVBuffer_reg_n_0_[5] ),
        .O(\pollbuf[0][7]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \pollbuf[0][7]_i_7 
       (.I0(p_0_in0),
        .I1(\tixVBuffer_reg_n_0_[5] ),
        .I2(\tixVBuffer_reg_n_0_[6] ),
        .I3(\tixVBuffer_reg_n_0_[7] ),
        .O(\pollbuf[0][7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFEFFFFF)) 
    \pollbuf[2][3]_i_2 
       (.I0(\pollbuf[0][7]_i_7_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[1] ),
        .I2(\pollbuf_reg[2][7]_0 [1]),
        .I3(\tixVBuffer_reg_n_0_[0] ),
        .I4(\wordcntLast[28]_i_9_n_0 ),
        .I5(\pollbuf[2][3]_i_3_n_0 ),
        .O(\pollbuf[2][3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000022200020)) 
    \pollbuf[2][3]_i_3 
       (.I0(\tixVBuffer_reg_n_0_[1] ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\pollbuf[2][3]_i_2_0 [1]),
        .I3(\tixVBuffer_reg_n_0_[0] ),
        .I4(\pollbuf[2][7]_i_2_0 [1]),
        .I5(\wordcntLast[28]_i_19_n_0 ),
        .O(\pollbuf[2][3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFFF0DDD)) 
    \pollbuf[2][4]_i_2 
       (.I0(\pollbuf_reg[2][4]_0 ),
        .I1(\wordcntLast[28]_i_10_n_0 ),
        .I2(\wordcntLast[28]_i_9_n_0 ),
        .I3(\pollbuf[2][4]_i_3_n_0 ),
        .I4(\pollbuf[0][7]_i_7_n_0 ),
        .I5(\pollbuf[2][7]_i_3_n_0 ),
        .O(\pollbuf[2][4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \pollbuf[2][4]_i_3 
       (.I0(\pollbuf[2][4]_i_2_0 ),
        .I1(\pollbuf[2][4]_i_2_1 ),
        .I2(\tixVBuffer_reg_n_0_[1] ),
        .I3(avllenSeqbufMemtrackToHostif),
        .I4(\tixVBuffer_reg_n_0_[0] ),
        .I5(\pollbuf_reg[2][7]_0 [1]),
        .O(\pollbuf[2][4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00000020)) 
    \pollbuf[2][7]_i_2 
       (.I0(\wordcntLast[28]_i_9_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[1] ),
        .I2(\pollbuf_reg[2][7]_0 [1]),
        .I3(\tixVBuffer_reg_n_0_[0] ),
        .I4(\pollbuf[0][7]_i_7_n_0 ),
        .I5(\pollbuf[2][7]_i_3_n_0 ),
        .O(\pollbuf[2][7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000002000)) 
    \pollbuf[2][7]_i_3 
       (.I0(\tixVBuffer_reg_n_0_[1] ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\pollbuf[2][7]_i_2_0 [1]),
        .I3(\tixVBuffer_reg_n_0_[0] ),
        .I4(\pollbuf[0][7]_i_7_n_0 ),
        .I5(\tixVBuffer_reg_n_0_[3] ),
        .O(\pollbuf[2][7]_i_3_n_0 ));
  FDCE \pollbuf_reg[0][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_196),
        .Q(\pollbuf_reg[0]_66 [0]));
  FDCE \pollbuf_reg[0][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_195),
        .Q(\pollbuf_reg[0]_66 [1]));
  FDCE \pollbuf_reg[0][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_194),
        .Q(\pollbuf_reg[0]_66 [2]));
  FDCE \pollbuf_reg[0][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_193),
        .Q(\pollbuf_reg[0]_66 [3]));
  FDCE \pollbuf_reg[0][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_192),
        .Q(\pollbuf_reg[0]_66 [4]));
  FDCE \pollbuf_reg[0][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_191),
        .Q(\pollbuf_reg[0]_66 [5]));
  FDCE \pollbuf_reg[0][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_190),
        .Q(\pollbuf_reg[0]_66 [6]));
  FDCE \pollbuf_reg[0][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_189),
        .Q(\pollbuf_reg[0]_66 [7]));
  FDCE \pollbuf_reg[1][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_204),
        .Q(\pollbuf_reg[1]_67 [0]));
  FDCE \pollbuf_reg[1][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_203),
        .Q(\pollbuf_reg[1]_67 [1]));
  FDCE \pollbuf_reg[1][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_202),
        .Q(\pollbuf_reg[1]_67 [2]));
  FDCE \pollbuf_reg[1][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_201),
        .Q(\pollbuf_reg[1]_67 [3]));
  FDCE \pollbuf_reg[1][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_200),
        .Q(\pollbuf_reg[1]_67 [4]));
  FDCE \pollbuf_reg[1][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_199),
        .Q(\pollbuf_reg[1]_67 [5]));
  FDCE \pollbuf_reg[1][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_198),
        .Q(\pollbuf_reg[1]_67 [6]));
  FDCE \pollbuf_reg[1][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_197),
        .Q(\pollbuf_reg[1]_67 [7]));
  FDCE \pollbuf_reg[2][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_326),
        .Q(\pollbuf_reg[2]_68 [3]));
  FDCE \pollbuf_reg[2][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_325),
        .Q(\pollbuf_reg[2]_68 [4]));
  FDCE \pollbuf_reg[2][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_324),
        .Q(\pollbuf_reg[2]_68 [7]));
  FDCE \pollbuf_reg[3][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_141),
        .Q(\pollbuf_reg[3]_69 [0]));
  FDCE \pollbuf_reg[3][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_140),
        .Q(\pollbuf_reg[3]_69 [1]));
  FDCE \pollbuf_reg[3][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_139),
        .Q(\pollbuf_reg[3]_69 [2]));
  FDCE \pollbuf_reg[3][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_138),
        .Q(\pollbuf_reg[3]_69 [3]));
  FDCE \pollbuf_reg[3][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_137),
        .Q(\pollbuf_reg[3]_69 [4]));
  FDCE \pollbuf_reg[3][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_38),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_136),
        .Q(\pollbuf_reg[3]_69 [5]));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    reqReset_sig_i_2
       (.I0(stateOp_i_5__1_n_0),
        .I1(\ixRetbufCrc[4]_i_5_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(\retbuf[1][7]_i_10_n_0 ),
        .O(reqReset_sig_i_2_n_0));
  FDCE reqReset_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_555),
        .Q(reqResetFromHostif));
  LUT4 #(
    .INIT(16'hFC88)) 
    reset_i_1
       (.I0(reqResetFromHostif),
        .I1(stateMclk),
        .I2(reset_reg),
        .I3(\stateOp_reg[1]_6 ),
        .O(reqReset_sig_reg_0));
  LUT6 #(
    .INIT(64'h000000FF10101010)) 
    \resid[0]_i_2 
       (.I0(\resid[0]_i_3_n_0 ),
        .I1(\resid[2]_i_22_n_0 ),
        .I2(\resid[0]_i_4_n_0 ),
        .I3(\resid[0]_i_5_n_0 ),
        .I4(\resid[2]_i_20_n_0 ),
        .I5(\resid[0]_i_6_n_0 ),
        .O(\resid[0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2289" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \resid[0]_i_3 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(ackInvConfig_sig_i_7_n_0),
        .O(\resid[0]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \resid[0]_i_4 
       (.I0(\resid[2]_i_32_n_0 ),
        .I1(\resid[2]_i_17_n_0 ),
        .O(\resid[0]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2286" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \resid[0]_i_5 
       (.I0(\tixVCommand_reg[0]_0 ),
        .I1(ackInvConfigSynth_sig_i_5_n_0),
        .O(\resid[0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFAFAE)) 
    \resid[0]_i_6 
       (.I0(\resid[2]_i_20_n_0 ),
        .I1(\stateCorecfg[2]_i_6_n_0 ),
        .I2(ackInvConfigSynth_sig_i_5_n_0),
        .I3(\tixVCommand_reg[0]_0 ),
        .I4(\retbuf[7][7]_i_4_n_0 ),
        .I5(\ixRetbufCrc[4]_i_2_n_0 ),
        .O(\resid[0]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2284" *) 
  LUT3 #(
    .INIT(8'h32)) 
    \resid[1]_i_10 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(ackInvConfigSynth_sig_i_5_n_0),
        .I2(\tixVCommand_reg[0]_0 ),
        .O(\resid[1]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000010100)) 
    \resid[1]_i_11 
       (.I0(\stateCorecfg[2]_i_9_n_0 ),
        .I1(\resid[1]_i_17_n_0 ),
        .I2(\resid[1]_i_18_n_0 ),
        .I3(\tixVCommand_reg_n_0_[1] ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .I5(\stateCorecfg[2]_i_8_n_0 ),
        .O(\resid[1]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFEFFFFFFFF)) 
    \resid[1]_i_12 
       (.I0(\resid[1]_i_19_n_0 ),
        .I1(\retbuf[0][0]_i_3_n_0 ),
        .I2(stateOp_i_5__1_n_0),
        .I3(\resid[1]_i_18_n_0 ),
        .I4(\tixVCommand_reg_n_0_[1] ),
        .I5(\tixVCommand_reg_n_0_[0] ),
        .O(\resid[1]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h0000000D00000000)) 
    \resid[1]_i_13 
       (.I0(\tixVCommand_reg_n_0_[0] ),
        .I1(\tixVCommand_reg_n_0_[1] ),
        .I2(\resid[1]_i_18_n_0 ),
        .I3(stateOp_i_5__1_n_0),
        .I4(stateOp_i_4__1_n_0),
        .I5(\resid[2]_i_25_n_0 ),
        .O(\resid[1]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000110)) 
    \resid[1]_i_14 
       (.I0(stateOp_i_5__1_n_0),
        .I1(\resid[1]_i_18_n_0 ),
        .I2(\tixVCommand_reg_n_0_[1] ),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .I4(\resid[1]_i_20_n_0 ),
        .I5(\resid[1]_i_21_n_0 ),
        .O(\resid[1]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h0000000200000000)) 
    \resid[1]_i_15 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\retbuf[0][0]_i_3_n_0 ),
        .I2(\resid[1]_i_22_n_0 ),
        .I3(stateOp_i_5__1_n_0),
        .I4(\ixRetbufCrc[4]_i_5_n_0 ),
        .I5(\tixVCommand_reg_n_0_[0] ),
        .O(\resid[1]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEFFFFF)) 
    \resid[1]_i_16 
       (.I0(\resid[1]_i_19_n_0 ),
        .I1(\retbuf[0][0]_i_3_n_0 ),
        .I2(\tixVCommand_reg_n_0_[1] ),
        .I3(\resid[1]_i_18_n_0 ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .I5(stateOp_i_5__1_n_0),
        .O(\resid[1]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2304" *) 
  LUT4 #(
    .INIT(16'hFEFF)) 
    \resid[1]_i_17 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .O(\resid[1]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2377" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \resid[1]_i_18 
       (.I0(\tixVCommand_reg_n_0_[5] ),
        .I1(\tixVCommand_reg_n_0_[4] ),
        .O(\resid[1]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2293" *) 
  LUT5 #(
    .INIT(32'hFFFFFBFF)) 
    \resid[1]_i_19 
       (.I0(\tixVController_reg_n_0_[4] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[3] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .O(\resid[1]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000100)) 
    \resid[1]_i_2 
       (.I0(\resid[1]_i_5_n_0 ),
        .I1(\resid[2]_i_9_n_0 ),
        .I2(\resid[2]_i_5_n_0 ),
        .I3(\resid[1]_i_6_n_0 ),
        .I4(\resid[1]_i_7_n_0 ),
        .I5(\resid[1]_i_8_n_0 ),
        .O(\resid[1]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2412" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \resid[1]_i_20 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[1] ),
        .O(\resid[1]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFBFFFFFFFF)) 
    \resid[1]_i_21 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\tixVController_reg_n_0_[5] ),
        .I4(\tixVController_reg_n_0_[6] ),
        .I5(\tixVController_reg_n_0_[2] ),
        .O(\resid[1]_i_21_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2338" *) 
  LUT4 #(
    .INIT(16'hFBFF)) 
    \resid[1]_i_22 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .O(\resid[1]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000020000)) 
    \resid[1]_i_3 
       (.I0(\resid[1]_i_9_n_0 ),
        .I1(\resid[1]_i_10_n_0 ),
        .I2(\resid[1]_i_11_n_0 ),
        .I3(\wordcntLast[0]_i_5_n_0 ),
        .I4(\resid[1]_i_12_n_0 ),
        .I5(\resid[1]_i_13_n_0 ),
        .O(\resid[1]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \resid[1]_i_4 
       (.I0(\resid[0]_i_2_n_0 ),
        .I1(\resid[2]_i_8_n_0 ),
        .O(\resid[1]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hFFBBFFB0)) 
    \resid[1]_i_5 
       (.I0(\staTixVTrigger[7]_i_5_n_0 ),
        .I1(\resid[2]_i_28_n_0 ),
        .I2(\i2cRegaddr[15]_i_11_n_0 ),
        .I3(\resid[1]_i_14_n_0 ),
        .I4(\tixVCommand_reg[0]_0 ),
        .O(\resid[1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFB)) 
    \resid[1]_i_6 
       (.I0(stateOp_i_4__1_n_0),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(stateOp_i_5__1_n_0),
        .I3(\ixRetbufCrc[4]_i_5_n_0 ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(\resid[1]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2333" *) 
  LUT4 #(
    .INIT(16'h8F88)) 
    \resid[1]_i_7 
       (.I0(\tixVCommand_reg[0]_0 ),
        .I1(ackInvSet_sig_i_9_n_0),
        .I2(ackInvConfig_sig_i_7_n_0),
        .I3(stateOp_i_3__1_n_0),
        .O(\resid[1]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hBBBBBBBBBBFFBBFB)) 
    \resid[1]_i_8 
       (.I0(\resid[1]_i_15_n_0 ),
        .I1(\resid[1]_i_16_n_0 ),
        .I2(stateOp_i_3__1_n_0),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(targetNotSteady_i_3_n_0),
        .I5(\resid[2]_i_26_n_0 ),
        .O(\resid[1]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2287" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \resid[1]_i_9 
       (.I0(\tixVCommand_reg_n_0_[0] ),
        .I1(ackInvConfigSynth_sig_i_5_n_0),
        .I2(\ixRetbufCrc[5]_i_4_n_0 ),
        .O(\resid[1]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000002000)) 
    \resid[2]_i_10 
       (.I0(\tixVCommand_reg_n_0_[0] ),
        .I1(stateOp_i_4__1_n_0),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(stateOp_i_5__1_n_0),
        .I5(\ixRetbufCrc[4]_i_5_n_0 ),
        .O(\resid[2]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'h00001000)) 
    \resid[2]_i_11 
       (.I0(stateOp_i_5__1_n_0),
        .I1(\resid[2]_i_24_n_0 ),
        .I2(\resid[2]_i_25_n_0 ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\staTixVTrigger[7]_i_3__1_n_0 ),
        .O(\resid[2]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h000FFFFF000F0022)) 
    \resid[2]_i_12 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\resid[2]_i_26_n_0 ),
        .I2(ackInvConfig_sig_i_7_n_0),
        .I3(\ixRetbufCrc[5]_i_4_n_0 ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .I5(i__i_3_n_0),
        .O(\resid[2]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h5555FFFF1010FF10)) 
    \resid[2]_i_13 
       (.I0(\resid[2]_i_27_n_0 ),
        .I1(\ixRetbufCrc[5]_i_4_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(\tixVCommand_reg[0]_0 ),
        .I4(\resid[2]_i_28_n_0 ),
        .I5(targetNotSteady_i_3_n_0),
        .O(\resid[2]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000110010)) 
    \resid[2]_i_14 
       (.I0(ackInvConfigSynth_sig_i_5_n_0),
        .I1(\tixVCommand_reg_n_0_[3] ),
        .I2(\tixVCommand_reg_n_0_[2] ),
        .I3(\resid[2]_i_29_n_0 ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .I5(\ixRetbufCrc[4]_i_5_n_0 ),
        .O(\resid[2]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2289" *) 
  LUT5 #(
    .INIT(32'h44444F44)) 
    \resid[2]_i_15 
       (.I0(ackInvConfig_sig_i_7_n_0),
        .I1(targetNotSteady_i_3_n_0),
        .I2(\resid[2]_i_30_n_0 ),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .I4(\ixRetbufCrc[5]_i_4_n_0 ),
        .O(\resid[2]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h5F00004400000044)) 
    \resid[2]_i_16 
       (.I0(\resid[2]_i_31_n_0 ),
        .I1(targetNotSteady_i_3_n_0),
        .I2(stateOp_i_4__1_n_0),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(stateOp_i_3__1_n_0),
        .O(\resid[2]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h00000000000C0040)) 
    \resid[2]_i_17 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\ixRetbufCrc[5]_i_4_n_0 ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .I5(\staTixVTrigger[7]_i_3__1_n_0 ),
        .O(\resid[2]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2374" *) 
  LUT3 #(
    .INIT(8'hF4)) 
    \resid[2]_i_18 
       (.I0(ackInvConfigSynth_sig_i_5_n_0),
        .I1(\stateCorecfg[2]_i_6_n_0 ),
        .I2(\resid[2]_i_20_n_0 ),
        .O(\resid[2]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2283" *) 
  LUT5 #(
    .INIT(32'hAEAEFFAE)) 
    \resid[2]_i_19 
       (.I0(\ixRetbufCrc[4]_i_2_n_0 ),
        .I1(\ixRetbufCrc[5]_i_3_n_0 ),
        .I2(\ixRetbufCrc[5]_i_4_n_0 ),
        .I3(\tixVCommand_reg[0]_0 ),
        .I4(ackInvConfigSynth_sig_i_5_n_0),
        .O(\resid[2]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000010000)) 
    \resid[2]_i_20 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(ackInvUnlock_sig_i_4_n_0),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(targetNotSteady_i_3_n_0),
        .I5(\tixVController_reg_n_0_[0] ),
        .O(\resid[2]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFF7FF)) 
    \resid[2]_i_21 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\retbuf[0][0]_i_3_n_0 ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\tixVController_reg_n_0_[2] ),
        .O(\resid[2]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'h0000001000000000)) 
    \resid[2]_i_22 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\tixVController_reg_n_0_[3] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(\staTixVTrigger[7]_i_4__1_n_0 ),
        .O(\resid[2]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h00000000AAAA2AAA)) 
    \resid[2]_i_23 
       (.I0(\resid[2]_i_17_n_0 ),
        .I1(stateOp_i_3__1_n_0),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(stateOp_i_4__1_n_0),
        .I5(\resid[2]_i_32_n_0 ),
        .O(\resid[2]_i_23_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2335" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \resid[2]_i_24 
       (.I0(\tixVCommand_reg_n_0_[4] ),
        .I1(\tixVCommand_reg_n_0_[5] ),
        .I2(\tixVCommand_reg_n_0_[1] ),
        .O(\resid[2]_i_24_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2276" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \resid[2]_i_25 
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .O(\resid[2]_i_25_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2265" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFD)) 
    \resid[2]_i_26 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\retbuf[0][0]_i_3_n_0 ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .O(\resid[2]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFDFFFFF)) 
    \resid[2]_i_27 
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(\tixVController_reg_n_0_[4] ),
        .I5(\tixVController_reg_n_0_[3] ),
        .O(\resid[2]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFBFFFFFF)) 
    \resid[2]_i_28 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\retbuf[0][0]_i_3_n_0 ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(\resid[2]_i_28_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2336" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \resid[2]_i_29 
       (.I0(\tixVCommand_reg_n_0_[7] ),
        .I1(\tixVCommand_reg_n_0_[6] ),
        .O(\resid[2]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h0040000000000000)) 
    \resid[2]_i_3 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(\stateOp_reg[5]_0 [0]),
        .I3(\stateOp_reg[5]_0 [1]),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\resid[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFEFFFFFFFF)) 
    \resid[2]_i_30 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(\tixVController_reg_n_0_[4] ),
        .I5(\tixVController_reg_n_0_[3] ),
        .O(\resid[2]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFEF)) 
    \resid[2]_i_31 
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[7] ),
        .I4(\tixVController_reg_n_0_[5] ),
        .I5(\tixVController_reg_n_0_[6] ),
        .O(\resid[2]_i_31_n_0 ));
  LUT6 #(
    .INIT(64'h000000C200000002)) 
    \resid[2]_i_32 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(stateOp_i_3__1_n_0),
        .O(\resid[2]_i_32_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000400000)) 
    \resid[2]_i_4 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [4]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [0]),
        .O(\resid[2]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2331" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \resid[2]_i_5 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(ackInvConfigSynth_sig_i_5_n_0),
        .O(\resid[2]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \resid[2]_i_6 
       (.I0(\resid[2]_i_9_n_0 ),
        .I1(\resid[2]_i_10_n_0 ),
        .I2(\resid[2]_i_11_n_0 ),
        .I3(\resid[2]_i_12_n_0 ),
        .I4(\resid[2]_i_13_n_0 ),
        .I5(\resid[2]_i_14_n_0 ),
        .O(\resid[2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h000000FF00000101)) 
    \resid[2]_i_7 
       (.I0(\resid[2]_i_15_n_0 ),
        .I1(\resid[2]_i_16_n_0 ),
        .I2(\resid[2]_i_17_n_0 ),
        .I3(\wordcntLast[2]_i_2_n_0 ),
        .I4(\resid[2]_i_18_n_0 ),
        .I5(\resid[2]_i_19_n_0 ),
        .O(\resid[2]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h00000045)) 
    \resid[2]_i_8 
       (.I0(\resid[2]_i_20_n_0 ),
        .I1(\resid[2]_i_21_n_0 ),
        .I2(stateOp_i_3__1_n_0),
        .I3(\resid[2]_i_22_n_0 ),
        .I4(\resid[2]_i_23_n_0 ),
        .O(\resid[2]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h000000000000C380)) 
    \resid[2]_i_9 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\staTixVTrigger[7]_i_4__1_n_0 ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\staTixVTrigger[7]_i_3__1_n_0 ),
        .O(\resid[2]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \resid_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_188),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_149),
        .Q(resid[0]));
  FDCE #(
    .INIT(1'b0)) 
    \resid_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_188),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_148),
        .Q(resid[1]));
  FDCE #(
    .INIT(1'b0)) 
    \resid_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_188),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_147),
        .Q(resid[2]));
  LUT5 #(
    .INIT(32'h0000DD0D)) 
    restart_i_2__0
       (.I0(ackInvMemtrackSetMask),
        .I1(reqInvMemtrackSetMask),
        .I2(ackInvMemtrackSet),
        .I3(reqInvMemtrackSet),
        .I4(restart_i_3_n_0),
        .O(ackInvSetMask_sig_reg));
  LUT5 #(
    .INIT(32'h0000DD0D)) 
    restart_i_2__1
       (.I0(ackInvHshktrackClearMask),
        .I1(reqInvHshktrackClearMask),
        .I2(ackInvHshktrackSet),
        .I3(reqInvHshktrackSet),
        .I4(ackInvSelect_sig_reg),
        .O(ackInvClearMask_sig_reg));
  LUT4 #(
    .INIT(16'h4F44)) 
    restart_i_3
       (.I0(reqInvMemtrackSelect),
        .I1(ackInvMemtrackSelect),
        .I2(reqInvMemtrackClearMask),
        .I3(ackInvMemtrackClearMask),
        .O(restart_i_3_n_0));
  LUT4 #(
    .INIT(16'h4F44)) 
    restart_i_3__0
       (.I0(reqInvHshktrackSelect),
        .I1(ackInvHshktrackSelect),
        .I2(reqInvHshktrackSetMask),
        .I3(ackInvHshktrackSetMask),
        .O(ackInvSelect_sig_reg));
  LUT6 #(
    .INIT(64'hA0AFCFCFA0AFC0C0)) 
    \retbuf[0][0]_i_2 
       (.I0(\retbuf[0][0]_i_6_n_0 ),
        .I1(\retbuf[0][0]_i_7_n_0 ),
        .I2(\retbuf[0][7]_i_19_n_0 ),
        .I3(vidtrackGetInfoTixVState[0]),
        .I4(\retbuf[0][1]_i_3_n_0 ),
        .I5(\retbuf[0][0]_i_8_n_0 ),
        .O(\retbuf[0][0]_i_2_n_0 ));
  LUT3 #(
    .INIT(8'hFE)) 
    \retbuf[0][0]_i_3 
       (.I0(\tixVController_reg_n_0_[7] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[6] ),
        .O(\retbuf[0][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[0][0]_i_6 
       (.I0(\retbuf[0][7]_i_10 [24]),
        .I1(ackInvSet_sig_reg[1]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_10_0 [0]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\tixVState_reg[1]_1 [0]),
        .O(\retbuf[0][0]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h503F5F3F)) 
    \retbuf[0][0]_i_7 
       (.I0(\retbuf[0][7]_i_20_1 [20]),
        .I1(\tixVState_reg[1]_2 [0]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][0]_i_2_0 ),
        .O(\retbuf[0][0]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[0][0]_i_8 
       (.I0(memtrackGetInfoTixVState[0]),
        .I1(hshktrackGetInfoTixVState[0]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(cputrackGetInfoTixVState[0]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(traceGetInfoTixVState),
        .O(\retbuf[0][0]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[0][1]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(vidtrackGetInfoTixVState[1]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[0][1]_i_4_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[0][1]_i_5_n_0 ),
        .O(\retbuf[0][1]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hFFAEAAFB)) 
    \retbuf[0][1]_i_3 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .O(\retbuf[0][1]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[0][1]_i_4 
       (.I0(memtrackGetInfoTixVState[1]),
        .I1(hshktrackGetInfoTixVState[1]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(cputrackGetInfoTixVState[1]),
        .O(\retbuf[0][1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \retbuf[0][1]_i_6 
       (.I0(\retbuf_reg[0][1]_i_5_0 ),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [21]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\tixVState_reg[1]_2 [1]),
        .O(\retbuf[0][1]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h47CC47FF)) 
    \retbuf[0][1]_i_7 
       (.I0(\retbuf[0][7]_i_10 [25]),
        .I1(\retbuf[0][7]_i_27_n_0 ),
        .I2(\retbuf[0][7]_i_10_0 [1]),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\tixVState_reg[1]_1 [1]),
        .O(\retbuf[0][1]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h47FFFFFF47FF0000)) 
    \retbuf[0][2]_i_3 
       (.I0(\retbuf[0][7]_i_10 [26]),
        .I1(\retbuf[0][7]_i_27_n_0 ),
        .I2(\retbuf[0][7]_i_10_0 [2]),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][1]_i_3_n_0 ),
        .I5(\retbuf[0][2]_i_4_n_0 ),
        .O(\retbuf[0][2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h4F4F4F7F7F7F4F7F)) 
    \retbuf[0][2]_i_4 
       (.I0(\retbuf[0][7]_i_20_1 [22]),
        .I1(\retbuf[0][7]_i_27_n_0 ),
        .I2(\retbuf[0][7]_i_28_n_0 ),
        .I3(\retbuf[0][7]_i_20_0 [24]),
        .I4(\tixVCommand_reg[0]_0 ),
        .I5(\retbuf[0][7]_i_20_2 [0]),
        .O(\retbuf[0][2]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h00000100)) 
    \retbuf[0][3]_i_2 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\retbuf[0][7]_i_19_n_0 ),
        .I4(\retbuf[0][3]_i_3_n_0 ),
        .O(\retbuf[0][3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h47FFFFFF47FF0000)) 
    \retbuf[0][3]_i_3 
       (.I0(\retbuf[0][7]_i_10 [27]),
        .I1(\retbuf[0][7]_i_27_n_0 ),
        .I2(\retbuf[0][7]_i_10_0 [2]),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][1]_i_3_n_0 ),
        .I5(\retbuf[0][3]_i_4_n_0 ),
        .O(\retbuf[0][3]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h05F3F5F3)) 
    \retbuf[0][3]_i_4 
       (.I0(\retbuf[0][3]_i_3_0 ),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][7]_i_20_1 [23]),
        .O(\retbuf[0][3]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h00000100)) 
    \retbuf[0][4]_i_2__0 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\retbuf[0][7]_i_19_n_0 ),
        .I4(\retbuf[0][4]_i_3_n_0 ),
        .O(\retbuf[0][4]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h47FFFFFF47FF0000)) 
    \retbuf[0][4]_i_3 
       (.I0(\retbuf[0][7]_i_10 [28]),
        .I1(\retbuf[0][7]_i_27_n_0 ),
        .I2(\retbuf[0][7]_i_10_0 [2]),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][1]_i_3_n_0 ),
        .I5(\retbuf[0][4]_i_4_n_0 ),
        .O(\retbuf[0][4]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h05F3F5F3)) 
    \retbuf[0][4]_i_4 
       (.I0(\retbuf[0][4]_i_3_0 ),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][7]_i_20_1 [24]),
        .O(\retbuf[0][4]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h00000100)) 
    \retbuf[0][5]_i_2 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\retbuf[0][7]_i_19_n_0 ),
        .I4(\retbuf[0][5]_i_3_n_0 ),
        .O(\retbuf[0][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h47FFFFFF47FF0000)) 
    \retbuf[0][5]_i_3 
       (.I0(\retbuf[0][7]_i_10 [29]),
        .I1(\retbuf[0][7]_i_27_n_0 ),
        .I2(\retbuf[0][7]_i_10_0 [2]),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][1]_i_3_n_0 ),
        .I5(\retbuf[0][5]_i_4_n_0 ),
        .O(\retbuf[0][5]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h05F3F5F3)) 
    \retbuf[0][5]_i_4 
       (.I0(\retbuf[0][5]_i_3_0 ),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][7]_i_20_1 [25]),
        .O(\retbuf[0][5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000100000)) 
    \retbuf[0][6]_i_2__0 
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\stateOp_reg[5]_0 [5]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\retbuf[0][6]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'h00000100)) 
    \retbuf[0][6]_i_3__0 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\retbuf[0][7]_i_19_n_0 ),
        .I4(\retbuf[0][6]_i_4_n_0 ),
        .O(\retbuf[0][6]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h47FFFFFF47FF0000)) 
    \retbuf[0][6]_i_4 
       (.I0(\retbuf[0][7]_i_10 [30]),
        .I1(\retbuf[0][7]_i_27_n_0 ),
        .I2(\retbuf[0][7]_i_10_0 [2]),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][1]_i_3_n_0 ),
        .I5(\retbuf[0][6]_i_5_n_0 ),
        .O(\retbuf[0][6]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h03F5F3F5)) 
    \retbuf[0][6]_i_5 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\retbuf[0][6]_i_4_0 ),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][7]_i_20_1 [26]),
        .O(\retbuf[0][6]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \retbuf[0][7]_i_11 
       (.I0(ixRetbufCrc[3]),
        .I1(ixRetbufCrc[4]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[5]),
        .I5(ixRetbufCrc[2]),
        .O(\retbuf[0][7]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \retbuf[0][7]_i_12 
       (.I0(ixRetbufCrc[0]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[5]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[2]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[0][7]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2265" *) 
  LUT5 #(
    .INIT(32'hFFFEFFFF)) 
    \retbuf[0][7]_i_13 
       (.I0(\tixVController_reg_n_0_[4] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(\tixVController_reg_n_0_[1] ),
        .O(\retbuf[0][7]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h0000FF51FFFFFFFF)) 
    \retbuf[0][7]_i_14 
       (.I0(\retbuf[0][7]_i_21_n_0 ),
        .I1(\retbuf[0][7]_i_22_n_0 ),
        .I2(\retbuf[0][7]_i_23_n_0 ),
        .I3(\retbuf[0][7]_i_24_n_0 ),
        .I4(\ixRetbufCrc[4]_i_4_n_0 ),
        .I5(\resid[0]_i_4_n_0 ),
        .O(\retbuf[0][7]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h220F2200220F22FF)) 
    \retbuf[0][7]_i_15 
       (.I0(\retbuf[0][7]_i_25_n_0 ),
        .I1(\stateOp[5]_i_32_n_0 ),
        .I2(ackInvCamifConfigSynth),
        .I3(\stateOp[5]_i_34_n_0 ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .I5(ackInvCamifConfig),
        .O(\retbuf[0][7]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2284" *) 
  LUT5 #(
    .INIT(32'h0F0F0F0B)) 
    \retbuf[0][7]_i_16 
       (.I0(\i2cRegaddr[15]_i_11_n_0 ),
        .I1(\ixRetbufCrc[5]_i_4_n_0 ),
        .I2(ackInvConfigSynth_sig_i_5_n_0),
        .I3(targetNotSteady_i_3_n_0),
        .I4(\tixVCommand_reg[0]_0 ),
        .O(\retbuf[0][7]_i_16_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \retbuf[0][7]_i_17 
       (.I0(\stateOp[5]_i_24_n_0 ),
        .I1(\stateOp[5]_i_23_n_0 ),
        .O(\retbuf[0][7]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2416" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \retbuf[0][7]_i_18 
       (.I0(ixRetbufCrc[3]),
        .I1(ixRetbufCrc[4]),
        .O(\retbuf[0][7]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2292" *) 
  LUT5 #(
    .INIT(32'h00970034)) 
    \retbuf[0][7]_i_19 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .O(\retbuf[0][7]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hCFC0000055555555)) 
    \retbuf[0][7]_i_20 
       (.I0(\retbuf[0][7]_i_26_n_0 ),
        .I1(\retbuf[0][7]_i_10 [31]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_10_0 [2]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf[0][1]_i_3_n_0 ),
        .O(\retbuf[0][7]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2282" *) 
  LUT5 #(
    .INIT(32'h0322032A)) 
    \retbuf[0][7]_i_21 
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[3] ),
        .I4(stateOp_i_3__1_n_0),
        .O(\retbuf[0][7]_i_21_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2282" *) 
  LUT4 #(
    .INIT(16'hFCF7)) 
    \retbuf[0][7]_i_22 
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[3] ),
        .O(\retbuf[0][7]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'hEEEEEFFFEEEEEEEE)) 
    \retbuf[0][7]_i_23 
       (.I0(\retbuf[5][7]_i_14_n_0 ),
        .I1(\resid[2]_i_32_n_0 ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\retbuf[0][7]_i_29_n_0 ),
        .I4(\retbuf[0][7]_i_30_n_0 ),
        .I5(stateOp_i_3__1_n_0),
        .O(\retbuf[0][7]_i_23_n_0 ));
  LUT6 #(
    .INIT(64'h000800F800080008)) 
    \retbuf[0][7]_i_24 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[3] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(\staTixVTrigger[7]_i_4__1_n_0 ),
        .O(\retbuf[0][7]_i_24_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2285" *) 
  LUT5 #(
    .INIT(32'h0000EFEE)) 
    \retbuf[0][7]_i_25 
       (.I0(\tixVCommand_reg[0]_0 ),
        .I1(targetNotSteady_i_3_n_0),
        .I2(ackInvCamifModReg),
        .I3(\i2cRegaddr[15]_i_11_n_0 ),
        .I4(ackInvConfigSynth_sig_i_5_n_0),
        .O(\retbuf[0][7]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h44477747FFFFFFFF)) 
    \retbuf[0][7]_i_26 
       (.I0(\retbuf[0][7]_i_20_1 [27]),
        .I1(\retbuf[0][7]_i_27_n_0 ),
        .I2(\retbuf[0][7]_i_20_0 [25]),
        .I3(\tixVCommand_reg[0]_0 ),
        .I4(\retbuf[0][7]_i_20_2 [1]),
        .I5(\retbuf[0][7]_i_28_n_0 ),
        .O(\retbuf[0][7]_i_26_n_0 ));
  LUT5 #(
    .INIT(32'h400400CC)) 
    \retbuf[0][7]_i_27 
       (.I0(\tixVController_reg_n_0_[4] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .O(\retbuf[0][7]_i_27_n_0 ));
  LUT5 #(
    .INIT(32'h403C0100)) 
    \retbuf[0][7]_i_28 
       (.I0(\tixVController_reg_n_0_[4] ),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[3] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .O(\retbuf[0][7]_i_28_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2412" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \retbuf[0][7]_i_29 
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .O(\retbuf[0][7]_i_29_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF15FF)) 
    \retbuf[0][7]_i_3 
       (.I0(\retbuf[0][7]_i_11_n_0 ),
        .I1(resid[0]),
        .I2(\retbuf[0][7]_i_12_n_0 ),
        .I3(\retbuf[4][7]_i_4_n_0 ),
        .I4(\stateOp_reg[5]_0 [5]),
        .O(\retbuf[0][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFBFBFFFFFBFFF)) 
    \retbuf[0][7]_i_30 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[5] ),
        .I4(\tixVController_reg_n_0_[4] ),
        .I5(\tixVController_reg_n_0_[3] ),
        .O(\retbuf[0][7]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFFF1F10)) 
    \retbuf[0][7]_i_4 
       (.I0(\tixVCommand_reg[0]_0 ),
        .I1(\stateCorecfg[2]_i_6_n_0 ),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\ixRetbufCrc[5]_i_4_n_0 ),
        .I4(\retbuf[0][7]_i_13_n_0 ),
        .I5(\retbuf[0][7]_i_14_n_0 ),
        .O(\retbuf[0][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2406" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \retbuf[0][7]_i_5 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [4]),
        .O(\retbuf[0][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h4544454445444555)) 
    \retbuf[0][7]_i_6 
       (.I0(reqReset_sig_i_2_n_0),
        .I1(\stateOp[5]_i_15_n_0 ),
        .I2(\retbuf[0][7]_i_15_n_0 ),
        .I3(\retbuf[0][7]_i_16_n_0 ),
        .I4(\stateOp[5]_i_13_n_0 ),
        .I5(\retbuf[0][7]_i_17_n_0 ),
        .O(\retbuf[0][7]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2277" *) 
  LUT5 #(
    .INIT(32'h00200200)) 
    \retbuf[0][7]_i_7 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [4]),
        .I4(\stateOp_reg[5]_0 [0]),
        .O(\retbuf[0][7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h5555555515555555)) 
    \retbuf[0][7]_i_8 
       (.I0(\retbuf[16][5]_i_2_n_0 ),
        .I1(ixRetbufCrc[2]),
        .I2(ixRetbufCrc[5]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[1]),
        .I5(\retbuf[0][7]_i_18_n_0 ),
        .O(\retbuf[0][7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h1010100010001000)) 
    \retbuf[10][7]_i_3 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\retbuf[10][7]_i_5_n_0 ),
        .I4(resid[0]),
        .I5(\retbuf[10][7]_i_6_n_0 ),
        .O(\retbuf[10][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF01000000)) 
    \retbuf[10][7]_i_4 
       (.I0(\retbuf[5][7]_i_13_n_0 ),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[3]),
        .I5(\retbuf[16][5]_i_2_n_0 ),
        .O(\retbuf[10][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    \retbuf[10][7]_i_5 
       (.I0(ixRetbufCrc[3]),
        .I1(ixRetbufCrc[0]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[1]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[10][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000001000)) 
    \retbuf[10][7]_i_6 
       (.I0(ixRetbufCrc[0]),
        .I1(ixRetbufCrc[2]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[5]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[10][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFDFFFFFFFCFF)) 
    \retbuf[11][7]_i_3 
       (.I0(resid[0]),
        .I1(ixRetbufCrc[4]),
        .I2(ixRetbufCrc[5]),
        .I3(\retbuf[11][7]_i_5_n_0 ),
        .I4(ixRetbufCrc[2]),
        .I5(ixRetbufCrc[0]),
        .O(\retbuf[11][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00001000)) 
    \retbuf[11][7]_i_4 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[3]),
        .I3(ixRetbufCrc[1]),
        .I4(\retbuf[11][7]_i_6_n_0 ),
        .I5(\retbuf[16][5]_i_2_n_0 ),
        .O(\retbuf[11][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2419" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[11][7]_i_5 
       (.I0(ixRetbufCrc[1]),
        .I1(ixRetbufCrc[3]),
        .O(\retbuf[11][7]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2417" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \retbuf[11][7]_i_6 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[0]),
        .O(\retbuf[11][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h1010100010001000)) 
    \retbuf[12][7]_i_3 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\retbuf[12][7]_i_5_n_0 ),
        .I4(resid[0]),
        .I5(\retbuf[12][7]_i_6_n_0 ),
        .O(\retbuf[12][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF01000000)) 
    \retbuf[12][7]_i_4 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[2]),
        .I2(\retbuf[12][7]_i_7_n_0 ),
        .I3(ixRetbufCrc[1]),
        .I4(ixRetbufCrc[3]),
        .I5(\retbuf[16][5]_i_2_n_0 ),
        .O(\retbuf[12][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000800)) 
    \retbuf[12][7]_i_5 
       (.I0(ixRetbufCrc[3]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[5]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[2]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[12][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    \retbuf[12][7]_i_6 
       (.I0(ixRetbufCrc[3]),
        .I1(ixRetbufCrc[2]),
        .I2(ixRetbufCrc[0]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[1]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[12][7]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2418" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \retbuf[12][7]_i_7 
       (.I0(ixRetbufCrc[5]),
        .I1(ixRetbufCrc[0]),
        .O(\retbuf[12][7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFDFCFFFFFFFFFFFF)) 
    \retbuf[13][7]_i_3 
       (.I0(resid[0]),
        .I1(\retbuf[5][7]_i_13_n_0 ),
        .I2(ixRetbufCrc[5]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[2]),
        .I5(ixRetbufCrc[3]),
        .O(\retbuf[13][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF01000000)) 
    \retbuf[13][7]_i_4 
       (.I0(\retbuf[5][7]_i_13_n_0 ),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[0]),
        .I3(ixRetbufCrc[2]),
        .I4(ixRetbufCrc[3]),
        .I5(\retbuf[16][5]_i_2_n_0 ),
        .O(\retbuf[13][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000001400000004)) 
    \retbuf[14][7]_i_3 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[0]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[5]),
        .I4(\retbuf[14][7]_i_5_n_0 ),
        .I5(resid[0]),
        .O(\retbuf[14][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00004000)) 
    \retbuf[14][7]_i_4 
       (.I0(\retbuf[5][7]_i_13_n_0 ),
        .I1(ixRetbufCrc[3]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[5]),
        .I5(\retbuf[16][5]_i_2_n_0 ),
        .O(\retbuf[14][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2419" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \retbuf[14][7]_i_5 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[3]),
        .O(\retbuf[14][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFF7FFFF)) 
    \retbuf[15][7]_i_3 
       (.I0(ixRetbufCrc[1]),
        .I1(ixRetbufCrc[3]),
        .I2(ixRetbufCrc[5]),
        .I3(ixRetbufCrc[4]),
        .I4(ixRetbufCrc[2]),
        .I5(\retbuf[29][7]_i_4_n_0 ),
        .O(\retbuf[15][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00000010)) 
    \retbuf[15][7]_i_4 
       (.I0(\retbuf[14][7]_i_5_n_0 ),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[4]),
        .I5(\retbuf[16][5]_i_2_n_0 ),
        .O(\retbuf[15][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2340" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \retbuf[16][5]_i_2 
       (.I0(resid[0]),
        .I1(resid[2]),
        .I2(resid[1]),
        .O(\retbuf[16][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000008000)) 
    \retbuf[16][7]_i_4 
       (.I0(ixRetbufCrc[0]),
        .I1(ixRetbufCrc[2]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[5]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[16][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFD)) 
    \retbuf[16][7]_i_5 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[3]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[2]),
        .I5(ixRetbufCrc[0]),
        .O(\retbuf[16][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFEAFFFFFF)) 
    \retbuf[16][7]_i_6 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\retbuf[4][7]_i_4_n_0 ),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [0]),
        .O(\retbuf[16][7]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2306" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[16][7]_i_7 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[16][7]_i_4_n_0 ),
        .O(\retbuf[16][7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000010000)) 
    \retbuf[17][5]_i_2 
       (.I0(ixRetbufCrc[1]),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[4]),
        .I5(ixRetbufCrc[0]),
        .O(\retbuf[17][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000200000000)) 
    \retbuf[17][7]_i_3 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[5]),
        .I5(ixRetbufCrc[0]),
        .O(\retbuf[17][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2307" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[17][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[17][5]_i_2_n_0 ),
        .O(\retbuf[17][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    \retbuf[18][7]_i_3 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[3]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[2]),
        .I5(ixRetbufCrc[0]),
        .O(\retbuf[18][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h5555555455555555)) 
    \retbuf[18][7]_i_4 
       (.I0(\retbuf[16][5]_i_2_n_0 ),
        .I1(\retbuf[12][7]_i_7_n_0 ),
        .I2(ixRetbufCrc[3]),
        .I3(ixRetbufCrc[2]),
        .I4(ixRetbufCrc[1]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[18][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800000000)) 
    \retbuf[19][7]_i_3 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[5]),
        .I5(ixRetbufCrc[0]),
        .O(\retbuf[19][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h5455555555555555)) 
    \retbuf[19][7]_i_4 
       (.I0(\retbuf[16][5]_i_2_n_0 ),
        .I1(ixRetbufCrc[0]),
        .I2(ixRetbufCrc[2]),
        .I3(\retbuf[1][7]_i_12_n_0 ),
        .I4(ixRetbufCrc[1]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[19][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[1][0]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [24]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[1][0]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][0]_i_4_n_0 ),
        .O(\retbuf[1][0]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[1][0]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [24]),
        .I1(\retbuf[1][7]_i_8_1 [24]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [24]),
        .O(\retbuf[1][0]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h50305F30)) 
    \retbuf[1][0]_i_5 
       (.I0(\retbuf[0][7]_i_20_1 [12]),
        .I1(\retbuf_reg[1][7]_i_13_0 [24]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][7]_i_20_0 [16]),
        .O(\retbuf[1][0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[1][0]_i_6 
       (.I0(\retbuf[0][7]_i_10 [16]),
        .I1(ccwNotCw2_carry__0[8]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [24]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [24]),
        .O(\retbuf[1][0]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[1][1]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [25]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[1][1]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][1]_i_4_n_0 ),
        .O(\retbuf[1][1]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[1][1]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [25]),
        .I1(\retbuf[1][7]_i_8_1 [25]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [25]),
        .O(\retbuf[1][1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F50C0C05F5FCFC)) 
    \retbuf[1][1]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [17]),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [13]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [25]),
        .O(\retbuf[1][1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[1][1]_i_6 
       (.I0(\retbuf[0][7]_i_10 [17]),
        .I1(ccwNotCw2_carry__0[9]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [25]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [25]),
        .O(\retbuf[1][1]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[1][2]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [26]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[1][2]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][2]_i_4_n_0 ),
        .O(\retbuf[1][2]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[1][2]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [26]),
        .I1(\retbuf[1][7]_i_8_1 [26]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [26]),
        .O(\retbuf[1][2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \retbuf[1][2]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [18]),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [14]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [26]),
        .O(\retbuf[1][2]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[1][2]_i_6 
       (.I0(\retbuf[0][7]_i_10 [18]),
        .I1(ccwNotCw2_carry__0[10]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [26]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [26]),
        .O(\retbuf[1][2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h40EF45EF40EF40EA)) 
    \retbuf[1][3]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][3]_i_3_n_0 ),
        .I2(\retbuf[0][7]_i_19_n_0 ),
        .I3(\retbuf_reg[1][7]_0 [27]),
        .I4(\retbuf[0][1]_i_3_n_0 ),
        .I5(\retbuf[1][3]_i_4_n_0 ),
        .O(\retbuf[1][3]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h505F3F3F)) 
    \retbuf[1][3]_i_4 
       (.I0(\retbuf[1][7]_i_8_2 [27]),
        .I1(\retbuf[1][7]_i_8_1 [27]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[1][7]_i_8_0 [27]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .O(\retbuf[1][3]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h505F3F3F)) 
    \retbuf[1][3]_i_5 
       (.I0(\retbuf[0][7]_i_20_1 [15]),
        .I1(\retbuf_reg[1][7]_i_13_0 [27]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_0 [19]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .O(\retbuf[1][3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[1][3]_i_6 
       (.I0(\retbuf[0][7]_i_10 [19]),
        .I1(ccwNotCw2_carry__0[11]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [27]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [27]),
        .O(\retbuf[1][3]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[1][4]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [28]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[1][4]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][4]_i_4_n_0 ),
        .O(\retbuf[1][4]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[1][4]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [28]),
        .I1(\retbuf[1][7]_i_8_1 [28]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [28]),
        .O(\retbuf[1][4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \retbuf[1][4]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [20]),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [16]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [28]),
        .O(\retbuf[1][4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[1][4]_i_6 
       (.I0(\retbuf[0][7]_i_10 [20]),
        .I1(ccwNotCw2_carry__0[12]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [28]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [28]),
        .O(\retbuf[1][4]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[1][5]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [29]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[1][5]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][5]_i_4_n_0 ),
        .O(\retbuf[1][5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[1][5]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [29]),
        .I1(\retbuf[1][7]_i_8_1 [29]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [29]),
        .O(\retbuf[1][5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \retbuf[1][5]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [21]),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [17]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [29]),
        .O(\retbuf[1][5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[1][5]_i_6 
       (.I0(\retbuf[0][7]_i_10 [21]),
        .I1(ccwNotCw2_carry__0[13]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [29]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [29]),
        .O(\retbuf[1][5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[1][6]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [30]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[1][6]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][6]_i_4_n_0 ),
        .O(\retbuf[1][6]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[1][6]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [30]),
        .I1(\retbuf[1][7]_i_8_1 [30]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [30]),
        .O(\retbuf[1][6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \retbuf[1][6]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [22]),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [18]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [30]),
        .O(\retbuf[1][6]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h47CC47FF)) 
    \retbuf[1][6]_i_6 
       (.I0(\retbuf[0][7]_i_10 [22]),
        .I1(\retbuf[0][7]_i_27_n_0 ),
        .I2(\retbuf_reg[1][7]_i_13_2 [30]),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf_reg[1][7]_i_13_1 [30]),
        .O(\retbuf[1][6]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \retbuf[1][7]_i_10 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\tixVController_reg_n_0_[4] ),
        .O(\retbuf[1][7]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2295" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \retbuf[1][7]_i_11 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[2]),
        .I2(ixRetbufCrc[3]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[1]),
        .O(\retbuf[1][7]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2416" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \retbuf[1][7]_i_12 
       (.I0(ixRetbufCrc[3]),
        .I1(ixRetbufCrc[5]),
        .O(\retbuf[1][7]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'h505F3F3F)) 
    \retbuf[1][7]_i_14 
       (.I0(\retbuf[1][7]_i_8_2 [31]),
        .I1(\retbuf[1][7]_i_8_1 [31]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[1][7]_i_8_0 [31]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .O(\retbuf[1][7]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'h505F3F3F)) 
    \retbuf[1][7]_i_15 
       (.I0(\retbuf[0][7]_i_20_1 [19]),
        .I1(\retbuf_reg[1][7]_i_13_0 [31]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_0 [23]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .O(\retbuf[1][7]_i_15_n_0 ));
  LUT5 #(
    .INIT(32'h47CC47FF)) 
    \retbuf[1][7]_i_16 
       (.I0(\retbuf[0][7]_i_10 [23]),
        .I1(\retbuf[0][7]_i_27_n_0 ),
        .I2(\retbuf_reg[1][7]_i_13_2 [31]),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf_reg[1][7]_i_13_1 [31]),
        .O(\retbuf[1][7]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h4555555545554545)) 
    \retbuf[1][7]_i_3 
       (.I0(\retbuf[0][7]_i_14_n_0 ),
        .I1(\retbuf[1][7]_i_10_n_0 ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\stateCorecfg[2]_i_6_n_0 ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(\ixRetbufCrc[5]_i_4_n_0 ),
        .O(\retbuf[1][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2275" *) 
  LUT5 #(
    .INIT(32'hFFFFEAEE)) 
    \retbuf[1][7]_i_4 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\stateOp_reg[5]_0 [1]),
        .I4(\stateOp_reg[5]_0 [0]),
        .O(\retbuf[1][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAA88A8AAAAAAAA)) 
    \retbuf[1][7]_i_5 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\retbuf[1][7]_i_11_n_0 ),
        .I2(ixRetbufCrc[0]),
        .I3(resid[0]),
        .I4(\retbuf[36][7]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\retbuf[1][7]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \retbuf[1][7]_i_6 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [5]),
        .O(\retbuf[1][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h5555555555555455)) 
    \retbuf[1][7]_i_7 
       (.I0(\retbuf[16][5]_i_2_n_0 ),
        .I1(ixRetbufCrc[4]),
        .I2(ixRetbufCrc[2]),
        .I3(\retbuf[1][7]_i_12_n_0 ),
        .I4(ixRetbufCrc[1]),
        .I5(ixRetbufCrc[0]),
        .O(\retbuf[1][7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h40EF45EF40EF40EA)) 
    \retbuf[1][7]_i_8 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_i_13_n_0 ),
        .I2(\retbuf[0][7]_i_19_n_0 ),
        .I3(\retbuf_reg[1][7]_0 [31]),
        .I4(\retbuf[0][1]_i_3_n_0 ),
        .I5(\retbuf[1][7]_i_14_n_0 ),
        .O(\retbuf[1][7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    \retbuf[20][7]_i_3 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[2]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[3]),
        .I5(ixRetbufCrc[5]),
        .O(\retbuf[20][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2307" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[20][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[19][7]_i_3_n_0 ),
        .O(\retbuf[20][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0100000000000000)) 
    \retbuf[21][7]_i_3 
       (.I0(ixRetbufCrc[5]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[3]),
        .I3(ixRetbufCrc[4]),
        .I4(ixRetbufCrc[2]),
        .I5(ixRetbufCrc[0]),
        .O(\retbuf[21][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2308" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[21][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[20][7]_i_3_n_0 ),
        .O(\retbuf[21][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800000000)) 
    \retbuf[22][7]_i_3 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[0]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[3]),
        .I5(ixRetbufCrc[2]),
        .O(\retbuf[22][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2308" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[22][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[21][7]_i_3_n_0 ),
        .O(\retbuf[22][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0400000000000000)) 
    \retbuf[23][7]_i_3 
       (.I0(ixRetbufCrc[5]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[3]),
        .I3(ixRetbufCrc[4]),
        .I4(ixRetbufCrc[2]),
        .I5(ixRetbufCrc[0]),
        .O(\retbuf[23][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2309" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[23][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[22][7]_i_3_n_0 ),
        .O(\retbuf[23][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0001000000000000)) 
    \retbuf[24][7]_i_3 
       (.I0(ixRetbufCrc[5]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[3]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[24][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2309" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[24][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[23][7]_i_3_n_0 ),
        .O(\retbuf[24][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0100000000000000)) 
    \retbuf[25][7]_i_3 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[5]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[3]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[25][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2310" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[25][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[24][7]_i_3_n_0 ),
        .O(\retbuf[25][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0010000000000000)) 
    \retbuf[26][7]_i_3 
       (.I0(ixRetbufCrc[0]),
        .I1(ixRetbufCrc[2]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[3]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[26][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2310" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[26][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[25][7]_i_3_n_0 ),
        .O(\retbuf[26][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000008000)) 
    \retbuf[27][7]_i_3 
       (.I0(ixRetbufCrc[3]),
        .I1(ixRetbufCrc[4]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[5]),
        .I5(ixRetbufCrc[2]),
        .O(\retbuf[27][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2311" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[27][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[26][7]_i_3_n_0 ),
        .O(\retbuf[27][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800000000)) 
    \retbuf[28][7]_i_3 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[2]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[0]),
        .I5(ixRetbufCrc[3]),
        .O(\retbuf[28][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2311" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[28][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[27][7]_i_3_n_0 ),
        .O(\retbuf[28][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2346" *) 
  LUT4 #(
    .INIT(16'hEFFF)) 
    \retbuf[29][7]_i_3 
       (.I0(ixRetbufCrc[5]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[4]),
        .I3(ixRetbufCrc[2]),
        .O(\retbuf[29][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2418" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \retbuf[29][7]_i_4 
       (.I0(ixRetbufCrc[0]),
        .I1(resid[0]),
        .O(\retbuf[29][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[2][0]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [16]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[2][0]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[2][0]_i_4_n_0 ),
        .O(\retbuf[2][0]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[2][0]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [16]),
        .I1(\retbuf[1][7]_i_8_1 [16]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [16]),
        .O(\retbuf[2][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F50C0C05F5FCFC)) 
    \retbuf[2][0]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [8]),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [4]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [16]),
        .O(\retbuf[2][0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[2][0]_i_6 
       (.I0(\retbuf[0][7]_i_10 [8]),
        .I1(ccwNotCw2_carry__0[0]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [16]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [16]),
        .O(\retbuf[2][0]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[2][1]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [17]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[2][1]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[2][1]_i_4_n_0 ),
        .O(\retbuf[2][1]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[2][1]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [17]),
        .I1(\retbuf[1][7]_i_8_1 [17]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [17]),
        .O(\retbuf[2][1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \retbuf[2][1]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [9]),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [5]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [17]),
        .O(\retbuf[2][1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[2][1]_i_6 
       (.I0(\retbuf[0][7]_i_10 [9]),
        .I1(ccwNotCw2_carry__0[1]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [17]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [17]),
        .O(\retbuf[2][1]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[2][2]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [18]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[2][2]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[2][2]_i_4_n_0 ),
        .O(\retbuf[2][2]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[2][2]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [18]),
        .I1(\retbuf[1][7]_i_8_1 [18]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [18]),
        .O(\retbuf[2][2]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h50305F30)) 
    \retbuf[2][2]_i_5 
       (.I0(\retbuf[0][7]_i_20_1 [6]),
        .I1(\retbuf_reg[1][7]_i_13_0 [18]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[0][7]_i_20_0 [10]),
        .O(\retbuf[2][2]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[2][2]_i_6 
       (.I0(\retbuf[0][7]_i_10 [10]),
        .I1(ccwNotCw2_carry__0[2]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [18]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [18]),
        .O(\retbuf[2][2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[2][3]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [19]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[2][3]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[2][3]_i_4_n_0 ),
        .O(\retbuf[2][3]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[2][3]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [19]),
        .I1(\retbuf[1][7]_i_8_1 [19]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [19]),
        .O(\retbuf[2][3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F50C0C05F5FCFC)) 
    \retbuf[2][3]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [11]),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [7]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [19]),
        .O(\retbuf[2][3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[2][3]_i_6 
       (.I0(\retbuf[0][7]_i_10 [11]),
        .I1(ccwNotCw2_carry__0[3]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [19]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [19]),
        .O(\retbuf[2][3]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[2][4]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [20]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[2][4]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[2][4]_i_4_n_0 ),
        .O(\retbuf[2][4]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[2][4]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [20]),
        .I1(\retbuf[1][7]_i_8_1 [20]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [20]),
        .O(\retbuf[2][4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \retbuf[2][4]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [12]),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [8]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [20]),
        .O(\retbuf[2][4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[2][4]_i_6 
       (.I0(\retbuf[0][7]_i_10 [12]),
        .I1(ccwNotCw2_carry__0[4]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [20]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [20]),
        .O(\retbuf[2][4]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[2][5]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [21]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[2][5]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[2][5]_i_4_n_0 ),
        .O(\retbuf[2][5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[2][5]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [21]),
        .I1(\retbuf[1][7]_i_8_1 [21]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [21]),
        .O(\retbuf[2][5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \retbuf[2][5]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [13]),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [9]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [21]),
        .O(\retbuf[2][5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[2][5]_i_6 
       (.I0(\retbuf[0][7]_i_10 [13]),
        .I1(ccwNotCw2_carry__0[5]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [21]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [21]),
        .O(\retbuf[2][5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8888CDC8DDDDCDC8)) 
    \retbuf[2][6]_i_2 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [22]),
        .I2(\retbuf[0][1]_i_3_n_0 ),
        .I3(\retbuf[2][6]_i_3_n_0 ),
        .I4(\retbuf[0][7]_i_19_n_0 ),
        .I5(\retbuf_reg[2][6]_i_4_n_0 ),
        .O(\retbuf[2][6]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[2][6]_i_3 
       (.I0(\retbuf[1][7]_i_8_2 [22]),
        .I1(\retbuf[1][7]_i_8_1 [22]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_28_n_0 ),
        .I4(\retbuf[1][7]_i_8_0 [22]),
        .O(\retbuf[2][6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h05F5030305F5F3F3)) 
    \retbuf[2][6]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [14]),
        .I1(stateOp_i_3__1_n_0),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_1 [10]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [22]),
        .O(\retbuf[2][6]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[2][6]_i_6 
       (.I0(\retbuf[0][7]_i_10 [14]),
        .I1(ccwNotCw2_carry__0[6]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [22]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [22]),
        .O(\retbuf[2][6]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h505F3F3F)) 
    \retbuf[2][7]_i_10 
       (.I0(\retbuf[0][7]_i_20_1 [11]),
        .I1(\retbuf_reg[1][7]_i_13_0 [23]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[0][7]_i_20_0 [15]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .O(\retbuf[2][7]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[2][7]_i_11 
       (.I0(\retbuf[0][7]_i_10 [15]),
        .I1(ccwNotCw2_carry__0[7]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf_reg[1][7]_i_13_2 [23]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_1 [23]),
        .O(\retbuf[2][7]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hA02AAAAAAAAAAAAA)) 
    \retbuf[2][7]_i_3 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(resid[0]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[0]),
        .I4(\retbuf[2][7]_i_6_n_0 ),
        .I5(\retbuf[4][7]_i_4_n_0 ),
        .O(\retbuf[2][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h5555555555555545)) 
    \retbuf[2][7]_i_4__0 
       (.I0(\retbuf[16][5]_i_2_n_0 ),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[0]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[3]),
        .I5(\retbuf[2][7]_i_7_n_0 ),
        .O(\retbuf[2][7]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'h40EF45EF40EF40EA)) 
    \retbuf[2][7]_i_5 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf_reg[2][7]_i_8_n_0 ),
        .I2(\retbuf[0][7]_i_19_n_0 ),
        .I3(\retbuf_reg[1][7]_0 [23]),
        .I4(\retbuf[0][1]_i_3_n_0 ),
        .I5(\retbuf[2][7]_i_9_n_0 ),
        .O(\retbuf[2][7]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2343" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \retbuf[2][7]_i_6 
       (.I0(ixRetbufCrc[5]),
        .I1(ixRetbufCrc[3]),
        .I2(ixRetbufCrc[4]),
        .I3(ixRetbufCrc[2]),
        .O(\retbuf[2][7]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2417" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \retbuf[2][7]_i_7 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[4]),
        .O(\retbuf[2][7]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h505F3F3F)) 
    \retbuf[2][7]_i_9 
       (.I0(\retbuf[1][7]_i_8_2 [23]),
        .I1(\retbuf[1][7]_i_8_1 [23]),
        .I2(\retbuf[0][7]_i_27_n_0 ),
        .I3(\retbuf[1][7]_i_8_0 [23]),
        .I4(\retbuf[0][7]_i_28_n_0 ),
        .O(\retbuf[2][7]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000008000)) 
    \retbuf[30][7]_i_3 
       (.I0(ixRetbufCrc[3]),
        .I1(ixRetbufCrc[0]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[4]),
        .I4(ixRetbufCrc[1]),
        .I5(ixRetbufCrc[5]),
        .O(\retbuf[30][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h1000000000000000)) 
    \retbuf[30][7]_i_4 
       (.I0(ixRetbufCrc[5]),
        .I1(ixRetbufCrc[0]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[1]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[30][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2312" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[30][7]_i_5 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[30][7]_i_3_n_0 ),
        .O(\retbuf[30][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hF7FFFFFFFFFFFFFF)) 
    \retbuf[31][7]_i_3 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[4]),
        .I2(ixRetbufCrc[5]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[3]),
        .I5(ixRetbufCrc[1]),
        .O(\retbuf[31][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h2000000000000000)) 
    \retbuf[32][6]_i_3 
       (.I0(ixRetbufCrc[0]),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[1]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[32][6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000100000000)) 
    \retbuf[32][7]_i_3 
       (.I0(ixRetbufCrc[0]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[4]),
        .I3(ixRetbufCrc[2]),
        .I4(ixRetbufCrc[3]),
        .I5(ixRetbufCrc[5]),
        .O(\retbuf[32][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h5555555515555555)) 
    \retbuf[32][7]_i_4 
       (.I0(\retbuf[16][5]_i_2_n_0 ),
        .I1(ixRetbufCrc[4]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[2]),
        .I5(\retbuf[12][7]_i_7_n_0 ),
        .O(\retbuf[32][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2295" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFD)) 
    \retbuf[33][7]_i_3 
       (.I0(ixRetbufCrc[5]),
        .I1(ixRetbufCrc[3]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[4]),
        .I4(ixRetbufCrc[1]),
        .O(\retbuf[33][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000001000)) 
    \retbuf[34][7]_i_3 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[2]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[0]),
        .I5(ixRetbufCrc[3]),
        .O(\retbuf[34][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000200000000)) 
    \retbuf[34][7]_i_4 
       (.I0(ixRetbufCrc[0]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[4]),
        .I3(ixRetbufCrc[2]),
        .I4(ixRetbufCrc[3]),
        .I5(ixRetbufCrc[5]),
        .O(\retbuf[34][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2312" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[34][7]_i_5 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[34][7]_i_4_n_0 ),
        .O(\retbuf[34][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000002000)) 
    \retbuf[35][7]_i_3 
       (.I0(ixRetbufCrc[5]),
        .I1(ixRetbufCrc[3]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[2]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[35][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h5555555554555555)) 
    \retbuf[35][7]_i_4 
       (.I0(\retbuf[16][5]_i_2_n_0 ),
        .I1(ixRetbufCrc[3]),
        .I2(ixRetbufCrc[0]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[1]),
        .I5(\retbuf[2][7]_i_7_n_0 ),
        .O(\retbuf[35][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0001000000000000)) 
    \retbuf[36][7]_i_3 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[0]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[2]),
        .I5(ixRetbufCrc[5]),
        .O(\retbuf[36][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2369" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \retbuf[36][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .O(\retbuf[36][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00400000)) 
    \retbuf[36][7]_i_5 
       (.I0(\retbuf[2][7]_i_7_n_0 ),
        .I1(ixRetbufCrc[0]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[5]),
        .I5(\retbuf[16][5]_i_2_n_0 ),
        .O(\retbuf[36][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0100000000000000)) 
    \retbuf[37][7]_i_3 
       (.I0(ixRetbufCrc[4]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[3]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[2]),
        .I5(ixRetbufCrc[0]),
        .O(\retbuf[37][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAAEA)) 
    \retbuf[37][7]_i_4 
       (.I0(\retbuf[16][5]_i_2_n_0 ),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[0]),
        .I5(\retbuf[5][7]_i_13_n_0 ),
        .O(\retbuf[37][7]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \retbuf[38][7]_i_3 
       (.I0(ixRetbufCrc[0]),
        .I1(ixRetbufCrc[4]),
        .O(\retbuf[38][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2343" *) 
  LUT4 #(
    .INIT(16'hDFFF)) 
    \retbuf[38][7]_i_4 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[3]),
        .I2(ixRetbufCrc[5]),
        .I3(ixRetbufCrc[1]),
        .O(\retbuf[38][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2369" *) 
  LUT3 #(
    .INIT(8'h02)) 
    \retbuf[38][7]_i_5 
       (.I0(\retbuf[0][6]_i_2__0_n_0 ),
        .I1(resid[2]),
        .I2(resid[1]),
        .O(\retbuf[38][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAEAAA)) 
    \retbuf[38][7]_i_6 
       (.I0(\retbuf[16][5]_i_2_n_0 ),
        .I1(ixRetbufCrc[0]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[3]),
        .I5(\retbuf[5][7]_i_13_n_0 ),
        .O(\retbuf[38][7]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2262" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \retbuf[39][7]_i_3 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [5]),
        .I2(\stateOp_reg[5]_0 [0]),
        .O(\retbuf[39][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2342" *) 
  LUT4 #(
    .INIT(16'hEFEE)) 
    \retbuf[39][7]_i_4 
       (.I0(resid[2]),
        .I1(resid[1]),
        .I2(resid[0]),
        .I3(ixRetbufCrc[0]),
        .O(\retbuf[39][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2277" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \retbuf[39][7]_i_5 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [3]),
        .O(\retbuf[39][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h01010101010101FF)) 
    \retbuf[39][7]_i_6 
       (.I0(\retbuf[38][7]_i_4_n_0 ),
        .I1(ixRetbufCrc[0]),
        .I2(ixRetbufCrc[4]),
        .I3(resid[1]),
        .I4(resid[2]),
        .I5(resid[0]),
        .O(\retbuf[39][7]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAAABAAA8)) 
    \retbuf[3][0]_i_2 
       (.I0(\retbuf_reg[1][7]_0 [8]),
        .I1(\tixVController_reg_n_0_[7] ),
        .I2(\tixVController_reg_n_0_[5] ),
        .I3(\tixVController_reg_n_0_[6] ),
        .I4(\retbuf[3][0]_i_3_n_0 ),
        .O(\retbuf[3][0]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h88CCBBFC)) 
    \retbuf[3][0]_i_3 
       (.I0(\retbuf[3][0]_i_4_n_0 ),
        .I1(\retbuf[3][7]_i_11_n_0 ),
        .I2(\retbuf[3][0]_i_5_n_0 ),
        .I3(\retbuf[3][7]_i_13_n_0 ),
        .I4(\retbuf[3][0]_i_6_n_0 ),
        .O(\retbuf[3][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \retbuf[3][0]_i_4 
       (.I0(\retbuf[1][7]_i_8_0 [8]),
        .I1(\retbuf[1][7]_i_8_1 [8]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[1][7]_i_8_2 [8]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [8]),
        .O(\retbuf[3][0]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[3][0]_i_5 
       (.I0(\retbuf_reg[1][7]_i_13_1 [8]),
        .I1(\retbuf_reg[1][7]_i_13_2 [8]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[3][7]_i_19_n_0 ),
        .I4(\retbuf[0][7]_i_10 [0]),
        .O(\retbuf[3][0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h44000CCC44CC0CCC)) 
    \retbuf[3][0]_i_6 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\retbuf[3][7]_i_13_n_0 ),
        .I2(\retbuf[0][7]_i_20_0 [0]),
        .I3(\retbuf[3][7]_i_18_n_0 ),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [8]),
        .O(\retbuf[3][0]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAAABAAA8)) 
    \retbuf[3][1]_i_2 
       (.I0(\retbuf_reg[1][7]_0 [9]),
        .I1(\tixVController_reg_n_0_[7] ),
        .I2(\tixVController_reg_n_0_[5] ),
        .I3(\tixVController_reg_n_0_[6] ),
        .I4(\retbuf[3][1]_i_3_n_0 ),
        .O(\retbuf[3][1]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h88CCBBFC)) 
    \retbuf[3][1]_i_3 
       (.I0(\retbuf[3][1]_i_4_n_0 ),
        .I1(\retbuf[3][7]_i_11_n_0 ),
        .I2(\retbuf[3][1]_i_5_n_0 ),
        .I3(\retbuf[3][7]_i_13_n_0 ),
        .I4(\retbuf[3][1]_i_6_n_0 ),
        .O(\retbuf[3][1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \retbuf[3][1]_i_4 
       (.I0(\retbuf[1][7]_i_8_0 [9]),
        .I1(\retbuf[1][7]_i_8_1 [9]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[1][7]_i_8_2 [9]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [9]),
        .O(\retbuf[3][1]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[3][1]_i_5 
       (.I0(\retbuf_reg[1][7]_i_13_1 [9]),
        .I1(\retbuf_reg[1][7]_i_13_2 [9]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[3][7]_i_19_n_0 ),
        .I4(\retbuf[0][7]_i_10 [1]),
        .O(\retbuf[3][1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h44000CCC44CC0CCC)) 
    \retbuf[3][1]_i_6 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\retbuf[3][7]_i_13_n_0 ),
        .I2(\retbuf[0][7]_i_20_0 [1]),
        .I3(\retbuf[3][7]_i_18_n_0 ),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][7]_i_13_0 [9]),
        .O(\retbuf[3][1]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA03F3FAFA03030)) 
    \retbuf[3][2]_i_2 
       (.I0(\retbuf[3][2]_i_4_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [10]),
        .I2(\retbuf[3][7]_i_11_n_0 ),
        .I3(\retbuf[3][2]_i_5_n_0 ),
        .I4(\retbuf[3][7]_i_13_n_0 ),
        .I5(\retbuf[3][2]_i_6_n_0 ),
        .O(\retbuf[3][2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[3][2]_i_4 
       (.I0(\retbuf[1][7]_i_8_0 [10]),
        .I1(\retbuf[1][7]_i_8_1 [10]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[1][7]_i_8_2 [10]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [10]),
        .O(\retbuf[3][2]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'hCF77)) 
    \retbuf[3][2]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [2]),
        .I1(\retbuf[3][7]_i_18_n_0 ),
        .I2(\retbuf_reg[1][7]_i_13_0 [10]),
        .I3(\retbuf[3][7]_i_19_n_0 ),
        .O(\retbuf[3][2]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h505F3F3F)) 
    \retbuf[3][2]_i_6 
       (.I0(\retbuf_reg[1][7]_i_13_1 [10]),
        .I1(\retbuf_reg[1][7]_i_13_2 [10]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[0][7]_i_10 [2]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .O(\retbuf[3][2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA03F3FAFA03030)) 
    \retbuf[3][3]_i_2 
       (.I0(\retbuf[3][3]_i_4_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [11]),
        .I2(\retbuf[3][7]_i_11_n_0 ),
        .I3(\retbuf[3][3]_i_5_n_0 ),
        .I4(\retbuf[3][7]_i_13_n_0 ),
        .I5(\retbuf[3][3]_i_6_n_0 ),
        .O(\retbuf[3][3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[3][3]_i_4 
       (.I0(\retbuf[1][7]_i_8_0 [11]),
        .I1(\retbuf[1][7]_i_8_1 [11]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[1][7]_i_8_2 [11]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [11]),
        .O(\retbuf[3][3]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'hCF77)) 
    \retbuf[3][3]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [3]),
        .I1(\retbuf[3][7]_i_18_n_0 ),
        .I2(\retbuf_reg[1][7]_i_13_0 [11]),
        .I3(\retbuf[3][7]_i_19_n_0 ),
        .O(\retbuf[3][3]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h505F3F3F)) 
    \retbuf[3][3]_i_6 
       (.I0(\retbuf_reg[1][7]_i_13_1 [11]),
        .I1(\retbuf_reg[1][7]_i_13_2 [11]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[0][7]_i_10 [3]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .O(\retbuf[3][3]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAAABAAA8)) 
    \retbuf[3][4]_i_2 
       (.I0(\retbuf_reg[1][7]_0 [12]),
        .I1(\tixVController_reg_n_0_[7] ),
        .I2(\tixVController_reg_n_0_[5] ),
        .I3(\tixVController_reg_n_0_[6] ),
        .I4(\retbuf[3][4]_i_3_n_0 ),
        .O(\retbuf[3][4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hBBFCBBFC88CCBBFC)) 
    \retbuf[3][4]_i_3 
       (.I0(\retbuf[3][4]_i_4_n_0 ),
        .I1(\retbuf[3][7]_i_11_n_0 ),
        .I2(\retbuf[3][4]_i_5_n_0 ),
        .I3(\retbuf[3][7]_i_13_n_0 ),
        .I4(\retbuf[3][5]_i_7_n_0 ),
        .I5(\retbuf[3][4]_i_6_n_0 ),
        .O(\retbuf[3][4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \retbuf[3][4]_i_4 
       (.I0(\retbuf[1][7]_i_8_0 [12]),
        .I1(\retbuf[1][7]_i_8_1 [12]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[1][7]_i_8_2 [12]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [12]),
        .O(\retbuf[3][4]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[3][4]_i_5 
       (.I0(\retbuf_reg[1][7]_i_13_1 [12]),
        .I1(\retbuf_reg[1][7]_i_13_2 [12]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[3][7]_i_19_n_0 ),
        .I4(\retbuf[0][7]_i_10 [4]),
        .O(\retbuf[3][4]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h0FAC00AC)) 
    \retbuf[3][4]_i_6 
       (.I0(\retbuf_reg[1][7]_i_13_0 [12]),
        .I1(\retbuf[0][7]_i_20_1 [0]),
        .I2(\retbuf[3][7]_i_19_n_0 ),
        .I3(\retbuf[3][7]_i_18_n_0 ),
        .I4(\retbuf[0][7]_i_20_0 [4]),
        .O(\retbuf[3][4]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2306" *) 
  LUT4 #(
    .INIT(16'h00FE)) 
    \retbuf[3][5]_i_2 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(resid[0]),
        .I3(\retbuf[3][7]_i_15_n_0 ),
        .O(\retbuf[3][5]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAAABAAA8)) 
    \retbuf[3][5]_i_3 
       (.I0(\retbuf_reg[1][7]_0 [13]),
        .I1(\tixVController_reg_n_0_[7] ),
        .I2(\tixVController_reg_n_0_[5] ),
        .I3(\tixVController_reg_n_0_[6] ),
        .I4(\retbuf[3][5]_i_4_n_0 ),
        .O(\retbuf[3][5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hBBFCBBFC88CCBBFC)) 
    \retbuf[3][5]_i_4 
       (.I0(\retbuf[3][5]_i_5_n_0 ),
        .I1(\retbuf[3][7]_i_11_n_0 ),
        .I2(\retbuf[3][5]_i_6_n_0 ),
        .I3(\retbuf[3][7]_i_13_n_0 ),
        .I4(\retbuf[3][5]_i_7_n_0 ),
        .I5(\retbuf[3][5]_i_8_n_0 ),
        .O(\retbuf[3][5]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \retbuf[3][5]_i_5 
       (.I0(\retbuf[1][7]_i_8_0 [13]),
        .I1(\retbuf[1][7]_i_8_1 [13]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[1][7]_i_8_2 [13]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [13]),
        .O(\retbuf[3][5]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hAFC0A0C0)) 
    \retbuf[3][5]_i_6 
       (.I0(\retbuf_reg[1][7]_i_13_1 [13]),
        .I1(\retbuf_reg[1][7]_i_13_2 [13]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[3][7]_i_19_n_0 ),
        .I4(\retbuf[0][7]_i_10 [5]),
        .O(\retbuf[3][5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFDFFC3FFCF1FF)) 
    \retbuf[3][5]_i_7 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\tixVController_reg_n_0_[4] ),
        .O(\retbuf[3][5]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h0FAC00AC)) 
    \retbuf[3][5]_i_8 
       (.I0(\retbuf_reg[1][7]_i_13_0 [13]),
        .I1(\retbuf[0][7]_i_20_1 [1]),
        .I2(\retbuf[3][7]_i_19_n_0 ),
        .I3(\retbuf[3][7]_i_18_n_0 ),
        .I4(\retbuf[0][7]_i_20_0 [5]),
        .O(\retbuf[3][5]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAFA03F3FAFA03030)) 
    \retbuf[3][6]_i_2 
       (.I0(\retbuf[3][6]_i_4_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [14]),
        .I2(\retbuf[3][7]_i_11_n_0 ),
        .I3(\retbuf[3][6]_i_5_n_0 ),
        .I4(\retbuf[3][7]_i_13_n_0 ),
        .I5(\retbuf[3][6]_i_6_n_0 ),
        .O(\retbuf[3][6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[3][6]_i_4 
       (.I0(\retbuf[1][7]_i_8_0 [14]),
        .I1(\retbuf[1][7]_i_8_1 [14]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[1][7]_i_8_2 [14]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [14]),
        .O(\retbuf[3][6]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h03440377)) 
    \retbuf[3][6]_i_5 
       (.I0(\retbuf[0][7]_i_20_0 [6]),
        .I1(\retbuf[3][7]_i_18_n_0 ),
        .I2(\retbuf_reg[1][7]_i_13_0 [14]),
        .I3(\retbuf[3][7]_i_19_n_0 ),
        .I4(\retbuf[0][7]_i_20_1 [2]),
        .O(\retbuf[3][6]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h505F3F3F)) 
    \retbuf[3][6]_i_6 
       (.I0(\retbuf_reg[1][7]_i_13_1 [14]),
        .I1(\retbuf_reg[1][7]_i_13_2 [14]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[0][7]_i_10 [6]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .O(\retbuf[3][6]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[3][7]_i_10 
       (.I0(\retbuf[1][7]_i_8_0 [15]),
        .I1(\retbuf[1][7]_i_8_1 [15]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[1][7]_i_8_2 [15]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [15]),
        .O(\retbuf[3][7]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2281" *) 
  LUT5 #(
    .INIT(32'hF6FBFAE9)) 
    \retbuf[3][7]_i_11 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .O(\retbuf[3][7]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'hF053FF53)) 
    \retbuf[3][7]_i_12 
       (.I0(\retbuf_reg[1][7]_i_13_0 [15]),
        .I1(\retbuf[0][7]_i_20_1 [3]),
        .I2(\retbuf[3][7]_i_19_n_0 ),
        .I3(\retbuf[3][7]_i_18_n_0 ),
        .I4(\retbuf[0][7]_i_20_0 [7]),
        .O(\retbuf[3][7]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2267" *) 
  LUT5 #(
    .INIT(32'hDFEFFFF9)) 
    \retbuf[3][7]_i_13 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .O(\retbuf[3][7]_i_13_n_0 ));
  LUT5 #(
    .INIT(32'h505F3F3F)) 
    \retbuf[3][7]_i_14 
       (.I0(\retbuf_reg[1][7]_i_13_1 [15]),
        .I1(\retbuf_reg[1][7]_i_13_2 [15]),
        .I2(\retbuf[3][7]_i_18_n_0 ),
        .I3(\retbuf[0][7]_i_10 [7]),
        .I4(\retbuf[3][7]_i_19_n_0 ),
        .O(\retbuf[3][7]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000010000)) 
    \retbuf[3][7]_i_15 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[4]),
        .I2(ixRetbufCrc[3]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[1]),
        .I5(ixRetbufCrc[0]),
        .O(\retbuf[3][7]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAEAAAFAFFFFA)) 
    \retbuf[3][7]_i_16 
       (.I0(\retbuf[3][7]_i_20_n_0 ),
        .I1(stateOp_i_3__1_n_0),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\tixVController_reg_n_0_[0] ),
        .O(\retbuf[3][7]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2376" *) 
  LUT3 #(
    .INIT(8'hCE)) 
    \retbuf[3][7]_i_17 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\ixRetbufCrc[5]_i_4_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .O(\retbuf[3][7]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2281" *) 
  LUT5 #(
    .INIT(32'h000A0162)) 
    \retbuf[3][7]_i_18 
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[3] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .O(\retbuf[3][7]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2293" *) 
  LUT5 #(
    .INIT(32'h42112010)) 
    \retbuf[3][7]_i_19 
       (.I0(\tixVController_reg_n_0_[4] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .O(\retbuf[3][7]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h0010000000000000)) 
    \retbuf[3][7]_i_20 
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(\resid[2]_i_25_n_0 ),
        .I5(targetNotSteady_i_3_n_0),
        .O(\retbuf[3][7]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFDFDFFFDF)) 
    \retbuf[3][7]_i_3 
       (.I0(\retbuf[1][7]_i_12_n_0 ),
        .I1(ixRetbufCrc[4]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[0]),
        .I4(resid[0]),
        .I5(ixRetbufCrc[2]),
        .O(\retbuf[3][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2313" *) 
  LUT4 #(
    .INIT(16'hFEFF)) 
    \retbuf[3][7]_i_4 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(resid[1]),
        .I2(resid[2]),
        .I3(\stateOp_reg[5]_0 [4]),
        .O(\retbuf[3][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFD00FFFFFFFF)) 
    \retbuf[3][7]_i_5 
       (.I0(\retbuf[3][7]_i_8_n_0 ),
        .I1(\retbuf[3][7]_i_9_n_0 ),
        .I2(\ixRetbufCrc[4]_i_4_n_0 ),
        .I3(\resid[0]_i_4_n_0 ),
        .I4(\stateOp_reg[5]_0 [4]),
        .I5(\stateOp_reg[5]_0 [5]),
        .O(\retbuf[3][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA03F3FAFA03030)) 
    \retbuf[3][7]_i_6 
       (.I0(\retbuf[3][7]_i_10_n_0 ),
        .I1(\retbuf_reg[1][7]_0 [15]),
        .I2(\retbuf[3][7]_i_11_n_0 ),
        .I3(\retbuf[3][7]_i_12_n_0 ),
        .I4(\retbuf[3][7]_i_13_n_0 ),
        .I5(\retbuf[3][7]_i_14_n_0 ),
        .O(\retbuf[3][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFE000200)) 
    \retbuf[3][7]_i_8 
       (.I0(\stateCorecfg[2]_i_6_n_0 ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[3] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\retbuf[0][7]_i_23_n_0 ),
        .I5(\retbuf[3][7]_i_16_n_0 ),
        .O(\retbuf[3][7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h0002320000323230)) 
    \retbuf[3][7]_i_9 
       (.I0(\retbuf[3][7]_i_17_n_0 ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[3] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(targetNotSteady_i_3_n_0),
        .O(\retbuf[3][7]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h5DFF0C0055550000)) 
    \retbuf[4][0]_i_3 
       (.I0(\retbuf[4][7]_i_6_n_0 ),
        .I1(\retbuf_reg[1][7]_i_13_2 [0]),
        .I2(\retbuf[0][0]_i_3_n_0 ),
        .I3(\retbuf[4][7]_i_13_n_0 ),
        .I4(\retbuf_reg[1][7]_0 [0]),
        .I5(\tixVController_reg_n_0_[3] ),
        .O(\retbuf[4][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h3320332333233323)) 
    \retbuf[4][0]_i_4 
       (.I0(\retbuf[4][0]_i_5_n_0 ),
        .I1(\retbuf[4][0]_i_6_n_0 ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\retbuf[4][7]_i_16_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [0]),
        .O(\retbuf[4][0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h3355000F3355FF0F)) 
    \retbuf[4][0]_i_5 
       (.I0(\retbuf[4][7]_i_12_0 [20]),
        .I1(\retbuf[1][7]_i_8_2 [0]),
        .I2(\retbuf_reg[1][7]_i_13_0 [0]),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(\retbuf[1][7]_i_8_1 [0]),
        .O(\retbuf[4][0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0020C00000200000)) 
    \retbuf[4][0]_i_6 
       (.I0(\retbuf_reg[1][7]_i_13_1 [0]),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\retbuf[1][7]_i_8_0 [0]),
        .O(\retbuf[4][0]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h7300FFFF40004000)) 
    \retbuf[4][1]_i_3 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf[4][7]_i_13_n_0 ),
        .I2(\retbuf_reg[1][7]_i_13_2 [1]),
        .I3(\tixVController_reg_n_0_[3] ),
        .I4(\retbuf[4][7]_i_6_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [1]),
        .O(\retbuf[4][1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h3333333322220333)) 
    \retbuf[4][1]_i_4 
       (.I0(\retbuf[4][1]_i_5_n_0 ),
        .I1(\retbuf[4][1]_i_6_n_0 ),
        .I2(\retbuf_reg[1][7]_0 [1]),
        .I3(\retbuf[4][7]_i_16_n_0 ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(\retbuf[4][1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h3355000F3355FF0F)) 
    \retbuf[4][1]_i_5 
       (.I0(\retbuf[4][7]_i_12_0 [21]),
        .I1(\retbuf[1][7]_i_8_2 [1]),
        .I2(\retbuf_reg[1][7]_i_13_0 [1]),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(\retbuf[1][7]_i_8_1 [1]),
        .O(\retbuf[4][1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0020C00000200000)) 
    \retbuf[4][1]_i_6 
       (.I0(\retbuf_reg[1][7]_i_13_1 [1]),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\retbuf[1][7]_i_8_0 [1]),
        .O(\retbuf[4][1]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h7300FFFF40004000)) 
    \retbuf[4][2]_i_3 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf[4][7]_i_13_n_0 ),
        .I2(\retbuf_reg[1][7]_i_13_2 [2]),
        .I3(\tixVController_reg_n_0_[3] ),
        .I4(\retbuf[4][7]_i_6_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [2]),
        .O(\retbuf[4][2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h3333333322220333)) 
    \retbuf[4][2]_i_4 
       (.I0(\retbuf[4][2]_i_5_n_0 ),
        .I1(\retbuf[4][2]_i_6_n_0 ),
        .I2(\retbuf_reg[1][7]_0 [2]),
        .I3(\retbuf[4][7]_i_16_n_0 ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(\retbuf[4][2]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h3355000F3355FF0F)) 
    \retbuf[4][2]_i_5 
       (.I0(\retbuf[4][7]_i_12_0 [22]),
        .I1(\retbuf[1][7]_i_8_2 [2]),
        .I2(\retbuf_reg[1][7]_i_13_0 [2]),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(\retbuf[1][7]_i_8_1 [2]),
        .O(\retbuf[4][2]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0020C00000200000)) 
    \retbuf[4][2]_i_6 
       (.I0(\retbuf_reg[1][7]_i_13_1 [2]),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\retbuf[1][7]_i_8_0 [2]),
        .O(\retbuf[4][2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h7300FFFF40004000)) 
    \retbuf[4][3]_i_3 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\retbuf[4][7]_i_13_n_0 ),
        .I2(\retbuf_reg[1][7]_i_13_2 [3]),
        .I3(\tixVController_reg_n_0_[3] ),
        .I4(\retbuf[4][7]_i_6_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [3]),
        .O(\retbuf[4][3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h3333333322220333)) 
    \retbuf[4][3]_i_4 
       (.I0(\retbuf[4][3]_i_5_n_0 ),
        .I1(\retbuf[4][3]_i_6_n_0 ),
        .I2(\retbuf_reg[1][7]_0 [3]),
        .I3(\retbuf[4][7]_i_16_n_0 ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(\retbuf[4][3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h3355000F3355FF0F)) 
    \retbuf[4][3]_i_5 
       (.I0(\retbuf[4][7]_i_12_0 [23]),
        .I1(\retbuf[1][7]_i_8_2 [3]),
        .I2(\retbuf_reg[1][7]_i_13_0 [3]),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(\retbuf[1][7]_i_8_1 [3]),
        .O(\retbuf[4][3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0020C00000200000)) 
    \retbuf[4][3]_i_6 
       (.I0(\retbuf_reg[1][7]_i_13_1 [3]),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\retbuf[1][7]_i_8_0 [3]),
        .O(\retbuf[4][3]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFF00F1F1)) 
    \retbuf[4][4]_i_2 
       (.I0(\retbuf[4][4]_i_3_n_0 ),
        .I1(\retbuf[4][6]_i_5_n_0 ),
        .I2(\retbuf[4][4]_i_4_n_0 ),
        .I3(\retbuf_reg[1][7]_0 [4]),
        .I4(\retbuf[0][0]_i_3_n_0 ),
        .I5(\retbuf[0][6]_i_2__0_n_0 ),
        .O(\retbuf[4][4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFFFFF47)) 
    \retbuf[4][4]_i_3 
       (.I0(\retbuf_reg[1][7]_i_13_1 [4]),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(stateOp_i_3__1_n_0),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[4] ),
        .I5(\retbuf[4][4]_i_5_n_0 ),
        .O(\retbuf[4][4]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFB080)) 
    \retbuf[4][4]_i_4 
       (.I0(\retbuf_reg[1][7]_i_13_2 [4]),
        .I1(\retbuf[4][7]_i_13_n_0 ),
        .I2(\tixVController_reg_n_0_[3] ),
        .I3(\retbuf_reg[1][7]_0 [4]),
        .I4(\retbuf[4][4]_i_6_n_0 ),
        .O(\retbuf[4][4]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hA8E8A828)) 
    \retbuf[4][4]_i_5 
       (.I0(\retbuf_reg[1][7]_0 [4]),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\retbuf[1][7]_i_8_0 [4]),
        .O(\retbuf[4][4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EAFAEAAA)) 
    \retbuf[4][4]_i_6 
       (.I0(\retbuf[4][4]_i_7_n_0 ),
        .I1(\retbuf[1][7]_i_8_2 [4]),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\retbuf[4][7]_i_12_0 [24]),
        .I5(\retbuf[4][4]_i_8_n_0 ),
        .O(\retbuf[4][4]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2296" *) 
  LUT5 #(
    .INIT(32'h3333BBF3)) 
    \retbuf[4][4]_i_7 
       (.I0(\retbuf[1][7]_i_8_1 [4]),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\retbuf_reg[1][7]_i_13_0 [4]),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .O(\retbuf[4][4]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF002F)) 
    \retbuf[4][4]_i_8 
       (.I0(\tixVController_reg_n_0_[4] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\retbuf_reg[1][7]_0 [4]),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(\retbuf[4][4]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFF00F1F1)) 
    \retbuf[4][5]_i_2 
       (.I0(\retbuf[4][5]_i_3_n_0 ),
        .I1(\retbuf[4][6]_i_5_n_0 ),
        .I2(\retbuf[4][5]_i_4_n_0 ),
        .I3(\retbuf_reg[1][7]_0 [5]),
        .I4(\retbuf[0][0]_i_3_n_0 ),
        .I5(\retbuf[0][6]_i_2__0_n_0 ),
        .O(\retbuf[4][5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFFFFF47)) 
    \retbuf[4][5]_i_3 
       (.I0(\retbuf_reg[1][7]_i_13_1 [5]),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(stateOp_i_3__1_n_0),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[4] ),
        .I5(\retbuf[4][5]_i_5_n_0 ),
        .O(\retbuf[4][5]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFB080)) 
    \retbuf[4][5]_i_4 
       (.I0(\retbuf_reg[1][7]_i_13_2 [5]),
        .I1(\retbuf[4][7]_i_13_n_0 ),
        .I2(\tixVController_reg_n_0_[3] ),
        .I3(\retbuf_reg[1][7]_0 [5]),
        .I4(\retbuf[4][5]_i_6_n_0 ),
        .O(\retbuf[4][5]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hA8E8A828)) 
    \retbuf[4][5]_i_5 
       (.I0(\retbuf_reg[1][7]_0 [5]),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\retbuf[1][7]_i_8_0 [5]),
        .O(\retbuf[4][5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EAFAEAAA)) 
    \retbuf[4][5]_i_6 
       (.I0(\retbuf[4][5]_i_7_n_0 ),
        .I1(\retbuf[1][7]_i_8_2 [5]),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\retbuf[4][7]_i_12_0 [25]),
        .I5(\retbuf[4][5]_i_8_n_0 ),
        .O(\retbuf[4][5]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2297" *) 
  LUT5 #(
    .INIT(32'h3333F3BB)) 
    \retbuf[4][5]_i_7 
       (.I0(\retbuf_reg[1][7]_i_13_0 [5]),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\retbuf[1][7]_i_8_1 [5]),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .O(\retbuf[4][5]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF002F)) 
    \retbuf[4][5]_i_8 
       (.I0(\tixVController_reg_n_0_[4] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\retbuf_reg[1][7]_0 [5]),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(\retbuf[4][5]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF002F)) 
    \retbuf[4][6]_i_10 
       (.I0(\tixVController_reg_n_0_[4] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\retbuf_reg[1][7]_0 [6]),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(\retbuf[4][6]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFF00F1F1)) 
    \retbuf[4][6]_i_2 
       (.I0(\retbuf[4][6]_i_4_n_0 ),
        .I1(\retbuf[4][6]_i_5_n_0 ),
        .I2(\retbuf[4][6]_i_6_n_0 ),
        .I3(\retbuf_reg[1][7]_0 [6]),
        .I4(\retbuf[0][0]_i_3_n_0 ),
        .I5(\retbuf[0][6]_i_2__0_n_0 ),
        .O(\retbuf[4][6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h5555555555555515)) 
    \retbuf[4][6]_i_3 
       (.I0(\retbuf[16][5]_i_2_n_0 ),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[0]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[3]),
        .I5(\retbuf[2][7]_i_7_n_0 ),
        .O(\retbuf[4][6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFFFFF47)) 
    \retbuf[4][6]_i_4 
       (.I0(\retbuf_reg[1][7]_i_13_1 [6]),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(stateOp_i_3__1_n_0),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[4] ),
        .I5(\retbuf[4][6]_i_7_n_0 ),
        .O(\retbuf[4][6]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2376" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \retbuf[4][6]_i_5 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[1] ),
        .O(\retbuf[4][6]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFB080)) 
    \retbuf[4][6]_i_6 
       (.I0(\retbuf_reg[1][7]_i_13_2 [6]),
        .I1(\retbuf[4][7]_i_13_n_0 ),
        .I2(\tixVController_reg_n_0_[3] ),
        .I3(\retbuf_reg[1][7]_0 [6]),
        .I4(\retbuf[4][6]_i_8_n_0 ),
        .O(\retbuf[4][6]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hEFF02000)) 
    \retbuf[4][6]_i_7 
       (.I0(\retbuf[1][7]_i_8_0 [6]),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\retbuf_reg[1][7]_0 [6]),
        .O(\retbuf[4][6]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EAFAEAAA)) 
    \retbuf[4][6]_i_8 
       (.I0(\retbuf[4][6]_i_9_n_0 ),
        .I1(\retbuf[1][7]_i_8_2 [6]),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\retbuf[4][7]_i_12_0 [26]),
        .I5(\retbuf[4][6]_i_10_n_0 ),
        .O(\retbuf[4][6]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h3333F3BB)) 
    \retbuf[4][6]_i_9 
       (.I0(\retbuf_reg[1][7]_i_13_0 [6]),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\retbuf[1][7]_i_8_1 [6]),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .O(\retbuf[4][6]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h0322000000220000)) 
    \retbuf[4][7]_i_10 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(stateOp_i_3__1_n_0),
        .O(\retbuf[4][7]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h1330001113350511)) 
    \retbuf[4][7]_i_11 
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\resid[0]_i_4_n_0 ),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\retbuf[3][7]_i_17_n_0 ),
        .O(\retbuf[4][7]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hCDCFCDCCCDCCCDCC)) 
    \retbuf[4][7]_i_12 
       (.I0(\retbuf[4][7]_i_14_n_0 ),
        .I1(\retbuf[4][7]_i_15_n_0 ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\retbuf[4][7]_i_16_n_0 ),
        .I5(\retbuf_reg[1][7]_0 [7]),
        .O(\retbuf[4][7]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2337" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \retbuf[4][7]_i_13 
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .O(\retbuf[4][7]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h3355000F3355FF0F)) 
    \retbuf[4][7]_i_14 
       (.I0(\retbuf[4][7]_i_12_0 [27]),
        .I1(\retbuf[1][7]_i_8_2 [7]),
        .I2(\retbuf_reg[1][7]_i_13_0 [7]),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(\retbuf[1][7]_i_8_1 [7]),
        .O(\retbuf[4][7]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF44F4)) 
    \retbuf[4][7]_i_15 
       (.I0(\retbuf[4][7]_i_17_n_0 ),
        .I1(\retbuf[1][7]_i_8_0 [7]),
        .I2(\retbuf_reg[1][7]_i_13_1 [7]),
        .I3(\retbuf[4][7]_i_18_n_0 ),
        .I4(\tixVController_reg_n_0_[3] ),
        .O(\retbuf[4][7]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2297" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \retbuf[4][7]_i_16 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .O(\retbuf[4][7]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2339" *) 
  LUT4 #(
    .INIT(16'hFF7F)) 
    \retbuf[4][7]_i_17 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .O(\retbuf[4][7]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2337" *) 
  LUT4 #(
    .INIT(16'hFFDF)) 
    \retbuf[4][7]_i_18 
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .O(\retbuf[4][7]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h7777777707777777)) 
    \retbuf[4][7]_i_3 
       (.I0(\retbuf[4][7]_i_9_n_0 ),
        .I1(resid[0]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[0]),
        .I4(\retbuf[1][7]_i_12_n_0 ),
        .I5(\retbuf[2][7]_i_7_n_0 ),
        .O(\retbuf[4][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2313" *) 
  LUT3 #(
    .INIT(8'h02)) 
    \retbuf[4][7]_i_4 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(resid[2]),
        .I2(resid[1]),
        .O(\retbuf[4][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h000000F000E000E0)) 
    \retbuf[4][7]_i_5 
       (.I0(\retbuf[4][7]_i_10_n_0 ),
        .I1(\retbuf[4][7]_i_11_n_0 ),
        .I2(\stateOp_reg[5]_0 [5]),
        .I3(\stateOp_reg[5]_0 [4]),
        .I4(\resid[0]_i_4_n_0 ),
        .I5(\ixRetbufCrc[4]_i_4_n_0 ),
        .O(\retbuf[4][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h5555555501415555)) 
    \retbuf[4][7]_i_6 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(\tixVController_reg_n_0_[3] ),
        .O(\retbuf[4][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h00000000AAA222A2)) 
    \retbuf[4][7]_i_7 
       (.I0(\retbuf[4][7]_i_12_n_0 ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\retbuf_reg[1][7]_0 [7]),
        .I3(\retbuf[4][7]_i_13_n_0 ),
        .I4(\retbuf_reg[1][7]_i_13_2 [7]),
        .I5(\retbuf[0][0]_i_3_n_0 ),
        .O(\retbuf[4][7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000002)) 
    \retbuf[4][7]_i_9 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[3]),
        .I2(ixRetbufCrc[0]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[1]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[4][7]_i_9_n_0 ));
  LUT5 #(
    .INIT(32'hFF470047)) 
    \retbuf[5][0]_i_2 
       (.I0(\retbuf[5][0]_i_3_n_0 ),
        .I1(\retbuf[5][5]_i_4_n_0 ),
        .I2(\retbuf[5][0]_i_4_n_0 ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(vidtrackGetInfoPtr0Seqbuf[8]),
        .O(\retbuf[5][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[5][0]_i_3 
       (.I0(cputrackGetInfoPtr0Seqbuf[8]),
        .I1(hshktrackGetInfoPtr0Seqbuf[8]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[5][1]_i_2_0 [8]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(vidtrackGetInfoPtr0Seqbuf[8]),
        .O(\retbuf[5][0]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hCF44CF77)) 
    \retbuf[5][0]_i_4 
       (.I0(\retbuf[5][7]_i_5_0 [0]),
        .I1(\retbuf[5][7]_i_18_n_0 ),
        .I2(\retbuf[4][7]_i_12_0 [12]),
        .I3(\retbuf[5][7]_i_17_n_0 ),
        .I4(\retbuf[5][7]_i_5_1 [0]),
        .O(\retbuf[5][0]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hFF470047)) 
    \retbuf[5][1]_i_2 
       (.I0(\retbuf[5][1]_i_3_n_0 ),
        .I1(\retbuf[5][5]_i_4_n_0 ),
        .I2(\retbuf[5][1]_i_4_n_0 ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(vidtrackGetInfoPtr0Seqbuf[9]),
        .O(\retbuf[5][1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[5][1]_i_3 
       (.I0(cputrackGetInfoPtr0Seqbuf[9]),
        .I1(hshktrackGetInfoPtr0Seqbuf[9]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[5][1]_i_2_0 [9]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(vidtrackGetInfoPtr0Seqbuf[9]),
        .O(\retbuf[5][1]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hCF44CF77)) 
    \retbuf[5][1]_i_4 
       (.I0(\retbuf[5][7]_i_5_0 [1]),
        .I1(\retbuf[5][7]_i_18_n_0 ),
        .I2(\retbuf[4][7]_i_12_0 [13]),
        .I3(\retbuf[5][7]_i_17_n_0 ),
        .I4(\retbuf[5][7]_i_5_1 [1]),
        .O(\retbuf[5][1]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h00000001)) 
    \retbuf[5][2]_i_2 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\retbuf[5][2]_i_3_n_0 ),
        .I4(\retbuf[5][5]_i_4_n_0 ),
        .O(\retbuf[5][2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hA0AF3030A0AF3F3F)) 
    \retbuf[5][2]_i_3 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\retbuf[5][7]_i_5_0 [2]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[4][7]_i_12_0 [14]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(\retbuf[5][7]_i_5_1 [2]),
        .O(\retbuf[5][2]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2303" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \retbuf[5][3]_i_2 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\retbuf[5][3]_i_3_n_0 ),
        .O(\retbuf[5][3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFAFAABFBFFFFABFB)) 
    \retbuf[5][3]_i_3 
       (.I0(\retbuf[5][5]_i_4_n_0 ),
        .I1(\retbuf[5][7]_i_5_1 [3]),
        .I2(\retbuf[5][7]_i_17_n_0 ),
        .I3(\retbuf[4][7]_i_12_0 [15]),
        .I4(\retbuf[5][7]_i_18_n_0 ),
        .I5(\retbuf[5][7]_i_5_0 [3]),
        .O(\retbuf[5][3]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2303" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \retbuf[5][4]_i_2 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\retbuf[5][4]_i_3_n_0 ),
        .O(\retbuf[5][4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFAFAABFBFFFFABFB)) 
    \retbuf[5][4]_i_3 
       (.I0(\retbuf[5][5]_i_4_n_0 ),
        .I1(\retbuf[5][7]_i_5_1 [4]),
        .I2(\retbuf[5][7]_i_17_n_0 ),
        .I3(\retbuf[4][7]_i_12_0 [16]),
        .I4(\retbuf[5][7]_i_18_n_0 ),
        .I5(\retbuf[5][7]_i_5_0 [4]),
        .O(\retbuf[5][4]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h00000001)) 
    \retbuf[5][5]_i_2__0 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\retbuf[5][5]_i_3_n_0 ),
        .I4(\retbuf[5][5]_i_4_n_0 ),
        .O(\retbuf[5][5]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[5][5]_i_3 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\retbuf[5][7]_i_5_0 [5]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[4][7]_i_12_0 [17]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(\retbuf[5][7]_i_5_1 [5]),
        .O(\retbuf[5][5]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFCEB)) 
    \retbuf[5][5]_i_4 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\tixVController_reg_n_0_[4] ),
        .O(\retbuf[5][5]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2302" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \retbuf[5][6]_i_2 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\retbuf[5][6]_i_3_n_0 ),
        .O(\retbuf[5][6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFAFAABFBFFFFABFB)) 
    \retbuf[5][6]_i_3 
       (.I0(\retbuf[5][5]_i_4_n_0 ),
        .I1(\retbuf[5][7]_i_5_1 [6]),
        .I2(\retbuf[5][7]_i_17_n_0 ),
        .I3(\retbuf[4][7]_i_12_0 [18]),
        .I4(\retbuf[5][7]_i_18_n_0 ),
        .I5(\retbuf[5][7]_i_5_0 [6]),
        .O(\retbuf[5][6]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2294" *) 
  LUT5 #(
    .INIT(32'h00000118)) 
    \retbuf[5][7]_i_10 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[3] ),
        .I4(\tixVController_reg_n_0_[4] ),
        .O(\retbuf[5][7]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h0001000000000000)) 
    \retbuf[5][7]_i_11 
       (.I0(ixRetbufCrc[1]),
        .I1(ixRetbufCrc[4]),
        .I2(ixRetbufCrc[3]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[0]),
        .I5(ixRetbufCrc[2]),
        .O(\retbuf[5][7]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hFAFAABFBFFFFABFB)) 
    \retbuf[5][7]_i_12 
       (.I0(\retbuf[5][5]_i_4_n_0 ),
        .I1(\retbuf[5][7]_i_5_1 [7]),
        .I2(\retbuf[5][7]_i_17_n_0 ),
        .I3(\retbuf[4][7]_i_12_0 [19]),
        .I4(\retbuf[5][7]_i_18_n_0 ),
        .I5(\retbuf[5][7]_i_5_0 [7]),
        .O(\retbuf[5][7]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2346" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \retbuf[5][7]_i_13 
       (.I0(ixRetbufCrc[1]),
        .I1(ixRetbufCrc[4]),
        .O(\retbuf[5][7]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h0000000040F04000)) 
    \retbuf[5][7]_i_14 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(stateOp_i_3__1_n_0),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\retbuf[5][7]_i_16_n_0 ),
        .I5(\staTixVTrigger[7]_i_3__1_n_0 ),
        .O(\retbuf[5][7]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2266" *) 
  LUT5 #(
    .INIT(32'h00010110)) 
    \retbuf[5][7]_i_15 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[3] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .O(\retbuf[5][7]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2290" *) 
  LUT5 #(
    .INIT(32'h00000010)) 
    \retbuf[5][7]_i_16 
       (.I0(stateOp_i_5__1_n_0),
        .I1(\tixVCommand_reg_n_0_[1] ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(\tixVCommand_reg_n_0_[5] ),
        .I4(\tixVCommand_reg_n_0_[4] ),
        .O(\retbuf[5][7]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2266" *) 
  LUT5 #(
    .INIT(32'h00444100)) 
    \retbuf[5][7]_i_17 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .O(\retbuf[5][7]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2267" *) 
  LUT5 #(
    .INIT(32'h00114100)) 
    \retbuf[5][7]_i_18 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .O(\retbuf[5][7]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFEE2E222E)) 
    \retbuf[5][7]_i_3 
       (.I0(\retbuf[5][7]_i_7_n_0 ),
        .I1(\retbuf[5][7]_i_8_n_0 ),
        .I2(\retbuf[5][7]_i_9_n_0 ),
        .I3(\retbuf[5][7]_i_10_n_0 ),
        .I4(\ixRetbufCrc[5]_i_4_n_0 ),
        .I5(\retbuf[0][0]_i_3_n_0 ),
        .O(\retbuf[5][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hBBBFBFBFAAAAAAAA)) 
    \retbuf[5][7]_i_4 
       (.I0(\retbuf[1][7]_i_4_n_0 ),
        .I1(\retbuf[4][7]_i_4_n_0 ),
        .I2(\retbuf[4][7]_i_9_n_0 ),
        .I3(resid[0]),
        .I4(\retbuf[5][7]_i_11_n_0 ),
        .I5(\stateOp_reg[5]_0 [1]),
        .O(\retbuf[5][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2302" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \retbuf[5][7]_i_5 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\retbuf[5][7]_i_12_n_0 ),
        .O(\retbuf[5][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00010000)) 
    \retbuf[5][7]_i_6 
       (.I0(\retbuf[5][7]_i_13_n_0 ),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[0]),
        .I3(ixRetbufCrc[3]),
        .I4(ixRetbufCrc[2]),
        .I5(\retbuf[16][5]_i_2_n_0 ),
        .O(\retbuf[5][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h0404055544045555)) 
    \retbuf[5][7]_i_7 
       (.I0(\retbuf[5][7]_i_14_n_0 ),
        .I1(\resid[2]_i_21_n_0 ),
        .I2(\retbuf[5][7]_i_10_n_0 ),
        .I3(\retbuf[5][7]_i_15_n_0 ),
        .I4(stateOp_i_3__1_n_0),
        .I5(\retbuf[5][7]_i_16_n_0 ),
        .O(\retbuf[5][7]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2292" *) 
  LUT5 #(
    .INIT(32'h40151012)) 
    \retbuf[5][7]_i_8 
       (.I0(\tixVController_reg_n_0_[4] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[2] ),
        .O(\retbuf[5][7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h0000000200020200)) 
    \retbuf[5][7]_i_9 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\tixVController_reg_n_0_[2] ),
        .O(\retbuf[5][7]_i_9_n_0 ));
  LUT5 #(
    .INIT(32'hFF470047)) 
    \retbuf[6][0]_i_2 
       (.I0(\retbuf[6][0]_i_3_n_0 ),
        .I1(\retbuf[5][5]_i_4_n_0 ),
        .I2(\retbuf[6][0]_i_4_n_0 ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(vidtrackGetInfoPtr0Seqbuf[0]),
        .O(\retbuf[6][0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[6][0]_i_3 
       (.I0(cputrackGetInfoPtr0Seqbuf[0]),
        .I1(hshktrackGetInfoPtr0Seqbuf[0]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[5][1]_i_2_0 [0]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(vidtrackGetInfoPtr0Seqbuf[0]),
        .O(\retbuf[6][0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hA0AF3030A0AF3F3F)) 
    \retbuf[6][0]_i_4 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\retbuf[6][7]_i_4_0 [0]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[4][7]_i_12_0 [4]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(\retbuf[6][7]_i_4_1 [0]),
        .O(\retbuf[6][0]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hFF470047)) 
    \retbuf[6][1]_i_2 
       (.I0(\retbuf[6][1]_i_3_n_0 ),
        .I1(\retbuf[5][5]_i_4_n_0 ),
        .I2(\retbuf[6][1]_i_4_n_0 ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(vidtrackGetInfoPtr0Seqbuf[1]),
        .O(\retbuf[6][1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[6][1]_i_3 
       (.I0(cputrackGetInfoPtr0Seqbuf[1]),
        .I1(hshktrackGetInfoPtr0Seqbuf[1]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[5][1]_i_2_0 [1]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(vidtrackGetInfoPtr0Seqbuf[1]),
        .O(\retbuf[6][1]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hCF44CF77)) 
    \retbuf[6][1]_i_4 
       (.I0(\retbuf[6][7]_i_4_0 [1]),
        .I1(\retbuf[5][7]_i_18_n_0 ),
        .I2(\retbuf[4][7]_i_12_0 [5]),
        .I3(\retbuf[5][7]_i_17_n_0 ),
        .I4(\retbuf[6][7]_i_4_1 [1]),
        .O(\retbuf[6][1]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hFF470047)) 
    \retbuf[6][2]_i_2 
       (.I0(\retbuf[6][2]_i_3_n_0 ),
        .I1(\retbuf[5][5]_i_4_n_0 ),
        .I2(\retbuf[6][2]_i_4_n_0 ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(vidtrackGetInfoPtr0Seqbuf[2]),
        .O(\retbuf[6][2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[6][2]_i_3 
       (.I0(cputrackGetInfoPtr0Seqbuf[2]),
        .I1(hshktrackGetInfoPtr0Seqbuf[2]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[5][1]_i_2_0 [2]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(vidtrackGetInfoPtr0Seqbuf[2]),
        .O(\retbuf[6][2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hA0AF3030A0AF3F3F)) 
    \retbuf[6][2]_i_4 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\retbuf[6][7]_i_4_0 [2]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[4][7]_i_12_0 [6]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(\retbuf[6][7]_i_4_1 [2]),
        .O(\retbuf[6][2]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hFF470047)) 
    \retbuf[6][3]_i_2 
       (.I0(\retbuf[6][3]_i_3_n_0 ),
        .I1(\retbuf[5][5]_i_4_n_0 ),
        .I2(\retbuf[6][3]_i_4_n_0 ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(vidtrackGetInfoPtr0Seqbuf[3]),
        .O(\retbuf[6][3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[6][3]_i_3 
       (.I0(cputrackGetInfoPtr0Seqbuf[3]),
        .I1(hshktrackGetInfoPtr0Seqbuf[3]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[5][1]_i_2_0 [3]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(vidtrackGetInfoPtr0Seqbuf[3]),
        .O(\retbuf[6][3]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hCF44CF77)) 
    \retbuf[6][3]_i_4 
       (.I0(\retbuf[6][7]_i_4_0 [3]),
        .I1(\retbuf[5][7]_i_18_n_0 ),
        .I2(\retbuf[4][7]_i_12_0 [7]),
        .I3(\retbuf[5][7]_i_17_n_0 ),
        .I4(\retbuf[6][7]_i_4_1 [3]),
        .O(\retbuf[6][3]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hFF470047)) 
    \retbuf[6][4]_i_2 
       (.I0(\retbuf[6][4]_i_3_n_0 ),
        .I1(\retbuf[5][5]_i_4_n_0 ),
        .I2(\retbuf[6][4]_i_4_n_0 ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(vidtrackGetInfoPtr0Seqbuf[4]),
        .O(\retbuf[6][4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[6][4]_i_3 
       (.I0(cputrackGetInfoPtr0Seqbuf[4]),
        .I1(hshktrackGetInfoPtr0Seqbuf[4]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[5][1]_i_2_0 [4]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(vidtrackGetInfoPtr0Seqbuf[4]),
        .O(\retbuf[6][4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hA0AF3030A0AF3F3F)) 
    \retbuf[6][4]_i_4 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\retbuf[6][7]_i_4_0 [4]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[4][7]_i_12_0 [8]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(\retbuf[6][7]_i_4_1 [4]),
        .O(\retbuf[6][4]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h03440377)) 
    \retbuf[6][5]_i_5 
       (.I0(\retbuf[6][7]_i_4_0 [5]),
        .I1(\retbuf[5][7]_i_18_n_0 ),
        .I2(\retbuf[4][7]_i_12_0 [9]),
        .I3(\retbuf[5][7]_i_17_n_0 ),
        .I4(\retbuf[6][7]_i_4_1 [5]),
        .O(\retbuf[6][5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[6][5]_i_6 
       (.I0(cputrackGetInfoPtr0Seqbuf[5]),
        .I1(hshktrackGetInfoPtr0Seqbuf[5]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[5][1]_i_2_0 [5]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(vidtrackGetInfoPtr0Seqbuf[5]),
        .O(\retbuf[6][5]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hFF470047)) 
    \retbuf[6][6]_i_2 
       (.I0(\retbuf[6][6]_i_3_n_0 ),
        .I1(\retbuf[5][5]_i_4_n_0 ),
        .I2(\retbuf[6][6]_i_4_n_0 ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(vidtrackGetInfoPtr0Seqbuf[6]),
        .O(\retbuf[6][6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[6][6]_i_3 
       (.I0(cputrackGetInfoPtr0Seqbuf[6]),
        .I1(hshktrackGetInfoPtr0Seqbuf[6]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[5][1]_i_2_0 [6]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(vidtrackGetInfoPtr0Seqbuf[6]),
        .O(\retbuf[6][6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hA0AF3030A0AF3F3F)) 
    \retbuf[6][6]_i_4 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\retbuf[6][7]_i_4_0 [6]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[4][7]_i_12_0 [10]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(\retbuf[6][7]_i_4_1 [6]),
        .O(\retbuf[6][6]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hBBBFBFBFAAAAAAAA)) 
    \retbuf[6][7]_i_3 
       (.I0(\retbuf[1][7]_i_4_n_0 ),
        .I1(\retbuf[4][7]_i_4_n_0 ),
        .I2(\retbuf[5][7]_i_11_n_0 ),
        .I3(resid[0]),
        .I4(\retbuf[6][7]_i_6_n_0 ),
        .I5(\stateOp_reg[5]_0 [1]),
        .O(\retbuf[6][7]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hFF470047)) 
    \retbuf[6][7]_i_4 
       (.I0(\retbuf[6][7]_i_7_n_0 ),
        .I1(\retbuf[5][5]_i_4_n_0 ),
        .I2(\retbuf[6][7]_i_8_n_0 ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(vidtrackGetInfoPtr0Seqbuf[7]),
        .O(\retbuf[6][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00000008)) 
    \retbuf[6][7]_i_5 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[0]),
        .I2(ixRetbufCrc[5]),
        .I3(ixRetbufCrc[3]),
        .I4(\retbuf[5][7]_i_13_n_0 ),
        .I5(\retbuf[16][5]_i_2_n_0 ),
        .O(\retbuf[6][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000200000000)) 
    \retbuf[6][7]_i_6 
       (.I0(ixRetbufCrc[1]),
        .I1(ixRetbufCrc[4]),
        .I2(ixRetbufCrc[0]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[3]),
        .I5(ixRetbufCrc[2]),
        .O(\retbuf[6][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \retbuf[6][7]_i_7 
       (.I0(cputrackGetInfoPtr0Seqbuf[7]),
        .I1(hshktrackGetInfoPtr0Seqbuf[7]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[5][1]_i_2_0 [7]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(vidtrackGetInfoPtr0Seqbuf[7]),
        .O(\retbuf[6][7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hA0AF3030A0AF3F3F)) 
    \retbuf[6][7]_i_8 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\retbuf[6][7]_i_4_0 [7]),
        .I2(\retbuf[5][7]_i_18_n_0 ),
        .I3(\retbuf[4][7]_i_12_0 [11]),
        .I4(\retbuf[5][7]_i_17_n_0 ),
        .I5(\retbuf[6][7]_i_4_1 [7]),
        .O(\retbuf[6][7]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2332" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \retbuf[7][3]_i_2 
       (.I0(stateOp_i_3__1_n_0),
        .I1(\ixRetbufCrc[5]_i_3_n_0 ),
        .O(\retbuf[7][3]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hDDDFDFDF)) 
    \retbuf[7][7]_i_3 
       (.I0(\retbuf[4][7]_i_4_n_0 ),
        .I1(\stateOp_reg[5]_0 [5]),
        .I2(\retbuf[6][7]_i_6_n_0 ),
        .I3(resid[0]),
        .I4(\retbuf[7][7]_i_7_n_0 ),
        .O(\retbuf[7][7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2283" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \retbuf[7][7]_i_4 
       (.I0(\ixRetbufCrc[5]_i_3_n_0 ),
        .I1(\ixRetbufCrc[5]_i_4_n_0 ),
        .O(\retbuf[7][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2340" *) 
  LUT4 #(
    .INIT(16'hAAAB)) 
    \retbuf[7][7]_i_6 
       (.I0(\retbuf[6][7]_i_6_n_0 ),
        .I1(resid[1]),
        .I2(resid[2]),
        .I3(resid[0]),
        .O(\retbuf[7][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h0100000000000000)) 
    \retbuf[7][7]_i_7 
       (.I0(ixRetbufCrc[3]),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[4]),
        .I3(ixRetbufCrc[1]),
        .I4(ixRetbufCrc[0]),
        .I5(ixRetbufCrc[2]),
        .O(\retbuf[7][7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hEEEFEFEFEEEFEEEF)) 
    \retbuf[8][7]_i_10 
       (.I0(\retbuf[8][7]_i_12_n_0 ),
        .I1(\stateOp[5]_i_43_n_0 ),
        .I2(\retbuf[8][7]_i_13_n_0 ),
        .I3(\stateOp[5]_i_40_n_0 ),
        .I4(\stateOp[5]_i_39_n_0 ),
        .I5(\retbuf[8][7]_i_14_n_0 ),
        .O(\retbuf[8][7]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2375" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \retbuf[8][7]_i_11 
       (.I0(\stateOp[5]_i_36_n_0 ),
        .I1(\stateOp[5]_i_24_n_0 ),
        .I2(\stateOp[5]_i_23_n_0 ),
        .O(\retbuf[8][7]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hA0A0A0A0A0A0A0A3)) 
    \retbuf[8][7]_i_12 
       (.I0(ackInvHshktrackSelect),
        .I1(\retbuf[8][7]_i_15_n_0 ),
        .I2(\retbuf[8][7]_i_16_n_0 ),
        .I3(\retbuf[8][7]_i_17_n_0 ),
        .I4(\stateOp[5]_i_66_n_0 ),
        .I5(\resid[1]_i_14_n_0 ),
        .O(\retbuf[8][7]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hF4F4F4F4F4F4F444)) 
    \retbuf[8][7]_i_13 
       (.I0(ackInvMemtrackClearMask),
        .I1(\retbuf[8][7]_i_18_n_0 ),
        .I2(\staTixVTrigger[7]_i_5_n_0 ),
        .I3(\i2cRegaddr[15]_i_11_n_0 ),
        .I4(\tixVCommand_reg[0]_0 ),
        .I5(targetNotSteady_i_3_n_0),
        .O(\retbuf[8][7]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFF005454)) 
    \retbuf[8][7]_i_14 
       (.I0(\retbuf[8][7]_i_19_n_0 ),
        .I1(\retbuf[8][7]_i_20_n_0 ),
        .I2(\retbuf[8][7]_i_21_n_0 ),
        .I3(ackInvMemtrackSetMask),
        .I4(\stateOp[5]_i_66_n_0 ),
        .I5(\retbuf[8][7]_i_22_n_0 ),
        .O(\retbuf[8][7]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h0040004000404444)) 
    \retbuf[8][7]_i_15 
       (.I0(\resid[1]_i_21_n_0 ),
        .I1(\resid[2]_i_25_n_0 ),
        .I2(\retbuf[8][7]_i_23_n_0 ),
        .I3(\stateCorecfg[2]_i_8_n_0 ),
        .I4(stateOp_i_5__1_n_0),
        .I5(\retbuf[8][7]_i_24_n_0 ),
        .O(\retbuf[8][7]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000004)) 
    \retbuf[8][7]_i_16 
       (.I0(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\stateOp[5]_i_76_n_0 ),
        .I5(stateOp_i_5__1_n_0),
        .O(\retbuf[8][7]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000023)) 
    \retbuf[8][7]_i_17 
       (.I0(\tixVCommand_reg_n_0_[1] ),
        .I1(\resid[1]_i_18_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(stateOp_i_5__1_n_0),
        .I4(\retbuf[8][7]_i_25_n_0 ),
        .I5(\staTixVTrigger[7]_i_3__1_n_0 ),
        .O(\retbuf[8][7]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \retbuf[8][7]_i_18 
       (.I0(stateOp_i_5__1_n_0),
        .I1(\ixRetbufCrc[4]_i_5_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\stateOp[5]_i_77_n_0 ),
        .I5(\staTixVTrigger[7]_i_3__1_n_0 ),
        .O(\retbuf[8][7]_i_18_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    \retbuf[8][7]_i_19 
       (.I0(\resid[1]_i_20_n_0 ),
        .I1(\resid[1]_i_21_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(\ixRetbufCrc[4]_i_5_n_0 ),
        .I4(stateOp_i_5__1_n_0),
        .I5(ackInvVidtrackSelect),
        .O(\retbuf[8][7]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFBFF)) 
    \retbuf[8][7]_i_20 
       (.I0(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\stateOp[5]_i_76_n_0 ),
        .I5(stateOp_i_5__1_n_0),
        .O(\retbuf[8][7]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAABAAAAAAAA)) 
    \retbuf[8][7]_i_21 
       (.I0(ackInvVidtrackSet),
        .I1(stateOp_i_5__1_n_0),
        .I2(\tixVCommand_reg_n_0_[5] ),
        .I3(\tixVCommand_reg_n_0_[4] ),
        .I4(\tixVCommand_reg_n_0_[1] ),
        .I5(\tixVCommand_reg_n_0_[0] ),
        .O(\retbuf[8][7]_i_21_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000004)) 
    \retbuf[8][7]_i_22 
       (.I0(\resid[2]_i_24_n_0 ),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(stateOp_i_5__1_n_0),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\stateOp[5]_i_77_n_0 ),
        .I5(\staTixVTrigger[7]_i_3__1_n_0 ),
        .O(\retbuf[8][7]_i_22_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2305" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \retbuf[8][7]_i_23 
       (.I0(\tixVCommand_reg_n_0_[0] ),
        .I1(\tixVCommand_reg_n_0_[5] ),
        .I2(\tixVCommand_reg_n_0_[4] ),
        .I3(\tixVCommand_reg_n_0_[1] ),
        .O(\retbuf[8][7]_i_23_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2305" *) 
  LUT4 #(
    .INIT(16'hFDFF)) 
    \retbuf[8][7]_i_24 
       (.I0(\tixVCommand_reg_n_0_[1] ),
        .I1(\tixVCommand_reg_n_0_[5] ),
        .I2(\tixVCommand_reg_n_0_[4] ),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .O(\retbuf[8][7]_i_24_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2339" *) 
  LUT3 #(
    .INIT(8'hBF)) 
    \retbuf[8][7]_i_25 
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .O(\retbuf[8][7]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'h1010100010001000)) 
    \retbuf[8][7]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\retbuf[7][7]_i_7_n_0 ),
        .I4(resid[0]),
        .I5(\retbuf[8][7]_i_9_n_0 ),
        .O(\retbuf[8][7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00800000)) 
    \retbuf[8][7]_i_5 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[0]),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[4]),
        .I4(\retbuf[1][7]_i_12_n_0 ),
        .I5(\retbuf[16][5]_i_2_n_0 ),
        .O(\retbuf[8][7]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2325" *) 
  LUT4 #(
    .INIT(16'h5545)) 
    \retbuf[8][7]_i_6 
       (.I0(\ixRetbufCrc[4]_i_2_n_0 ),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(\ixRetbufCrc[5]_i_3_n_0 ),
        .I3(\ixRetbufCrc[5]_i_4_n_0 ),
        .O(\retbuf[8][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF0B030B0B)) 
    \retbuf[8][7]_i_7 
       (.I0(\stateOp[5]_i_30_n_0 ),
        .I1(\stateOp[5]_i_29_n_0 ),
        .I2(\stateOp[5]_i_28_n_0 ),
        .I3(\stateOp[5]_i_27_n_0 ),
        .I4(\retbuf[8][7]_i_10_n_0 ),
        .I5(\stateOp[5]_i_12_n_0 ),
        .O(\retbuf[8][7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF55555044)) 
    \retbuf[8][7]_i_8 
       (.I0(\retbuf[8][7]_i_11_n_0 ),
        .I1(\stateOp[5]_i_35_n_0 ),
        .I2(ackInvCornerConfig),
        .I3(\wordcntLast[0]_i_5_n_0 ),
        .I4(\stateOp[5]_i_24_n_0 ),
        .I5(\stateOp[5]_i_14_n_0 ),
        .O(\retbuf[8][7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000002)) 
    \retbuf[8][7]_i_9 
       (.I0(ixRetbufCrc[3]),
        .I1(ixRetbufCrc[0]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[5]),
        .I4(ixRetbufCrc[1]),
        .I5(ixRetbufCrc[4]),
        .O(\retbuf[8][7]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFFFDFFFCFFFFFFFF)) 
    \retbuf[9][7]_i_3 
       (.I0(resid[0]),
        .I1(\retbuf[5][7]_i_13_n_0 ),
        .I2(ixRetbufCrc[5]),
        .I3(ixRetbufCrc[2]),
        .I4(ixRetbufCrc[0]),
        .I5(ixRetbufCrc[3]),
        .O(\retbuf[9][7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00010000)) 
    \retbuf[9][7]_i_4 
       (.I0(\retbuf[5][7]_i_13_n_0 ),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[2]),
        .I3(ixRetbufCrc[0]),
        .I4(ixRetbufCrc[3]),
        .I5(\retbuf[16][5]_i_2_n_0 ),
        .O(\retbuf[9][7]_i_4_n_0 ));
  FDCE \retbuf_reg[0][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_20),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_337),
        .Q(\retbuf_reg_n_0_[0][0] ));
  FDCE \retbuf_reg[0][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_20),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_261),
        .Q(\retbuf_reg_n_0_[0][1] ));
  MUXF7 \retbuf_reg[0][1]_i_5 
       (.I0(\retbuf[0][1]_i_6_n_0 ),
        .I1(\retbuf[0][1]_i_7_n_0 ),
        .O(\retbuf_reg[0][1]_i_5_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[0][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_20),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_336),
        .Q(\retbuf_reg_n_0_[0][2] ));
  FDCE \retbuf_reg[0][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_20),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_260),
        .Q(\retbuf_reg_n_0_[0][3] ));
  FDCE \retbuf_reg[0][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_20),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_259),
        .Q(\retbuf_reg_n_0_[0][4] ));
  FDCE \retbuf_reg[0][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_20),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_258),
        .Q(\retbuf_reg_n_0_[0][5] ));
  FDCE \retbuf_reg[0][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_20),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_257),
        .Q(\retbuf_reg_n_0_[0][6] ));
  FDCE \retbuf_reg[0][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_20),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_256),
        .Q(\retbuf_reg_n_0_[0][7] ));
  FDCE \retbuf_reg[10][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_241),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_382),
        .Q(\retbuf_reg_n_0_[10][0] ));
  FDCE \retbuf_reg[10][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_241),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_381),
        .Q(\retbuf_reg_n_0_[10][1] ));
  FDCE \retbuf_reg[10][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_241),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_380),
        .Q(\retbuf_reg_n_0_[10][2] ));
  FDCE \retbuf_reg[10][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_241),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_379),
        .Q(\retbuf_reg_n_0_[10][3] ));
  FDCE \retbuf_reg[10][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_241),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_378),
        .Q(\retbuf_reg_n_0_[10][4] ));
  FDCE \retbuf_reg[10][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_241),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_377),
        .Q(\retbuf_reg_n_0_[10][5] ));
  FDCE \retbuf_reg[10][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_241),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_376),
        .Q(\retbuf_reg_n_0_[10][6] ));
  FDCE \retbuf_reg[10][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_241),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_375),
        .Q(\retbuf_reg_n_0_[10][7] ));
  FDCE \retbuf_reg[11][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_242),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_266),
        .Q(\retbuf_reg_n_0_[11][0] ));
  FDCE \retbuf_reg[11][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_242),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_265),
        .Q(\retbuf_reg_n_0_[11][1] ));
  FDCE \retbuf_reg[11][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_242),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_264),
        .Q(\retbuf_reg_n_0_[11][2] ));
  FDCE \retbuf_reg[11][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_242),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_263),
        .Q(\retbuf_reg_n_0_[11][3] ));
  FDCE \retbuf_reg[11][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_242),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_374),
        .Q(\retbuf_reg_n_0_[11][4] ));
  FDCE \retbuf_reg[11][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_242),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_373),
        .Q(\retbuf_reg_n_0_[11][5] ));
  FDCE \retbuf_reg[11][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_242),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_372),
        .Q(\retbuf_reg_n_0_[11][6] ));
  FDCE \retbuf_reg[11][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_242),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_371),
        .Q(\retbuf_reg_n_0_[11][7] ));
  FDCE \retbuf_reg[12][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_243),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_370),
        .Q(\retbuf_reg_n_0_[12][0] ));
  FDCE \retbuf_reg[12][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_243),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_369),
        .Q(\retbuf_reg_n_0_[12][1] ));
  FDCE \retbuf_reg[12][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_243),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_368),
        .Q(\retbuf_reg_n_0_[12][2] ));
  FDCE \retbuf_reg[12][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_243),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_367),
        .Q(\retbuf_reg_n_0_[12][3] ));
  FDCE \retbuf_reg[12][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_243),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_366),
        .Q(\retbuf_reg_n_0_[12][4] ));
  FDCE \retbuf_reg[12][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_243),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_365),
        .Q(\retbuf_reg_n_0_[12][5] ));
  FDCE \retbuf_reg[12][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_243),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_364),
        .Q(\retbuf_reg_n_0_[12][6] ));
  FDCE \retbuf_reg[12][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_243),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_363),
        .Q(\retbuf_reg_n_0_[12][7] ));
  FDCE \retbuf_reg[13][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_244),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_362),
        .Q(\retbuf_reg_n_0_[13][0] ));
  FDCE \retbuf_reg[13][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_244),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_361),
        .Q(\retbuf_reg_n_0_[13][1] ));
  FDCE \retbuf_reg[13][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_244),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_360),
        .Q(\retbuf_reg_n_0_[13][2] ));
  FDCE \retbuf_reg[13][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_244),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_359),
        .Q(\retbuf_reg_n_0_[13][3] ));
  FDCE \retbuf_reg[13][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_244),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_358),
        .Q(\retbuf_reg_n_0_[13][4] ));
  FDCE \retbuf_reg[13][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_244),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_357),
        .Q(\retbuf_reg_n_0_[13][5] ));
  FDCE \retbuf_reg[13][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_244),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_356),
        .Q(\retbuf_reg_n_0_[13][6] ));
  FDCE \retbuf_reg[13][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_244),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_355),
        .Q(\retbuf_reg_n_0_[13][7] ));
  FDCE \retbuf_reg[14][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_245),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_354),
        .Q(\retbuf_reg_n_0_[14][0] ));
  FDCE \retbuf_reg[14][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_245),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_353),
        .Q(\retbuf_reg_n_0_[14][1] ));
  FDCE \retbuf_reg[14][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_245),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_352),
        .Q(\retbuf_reg_n_0_[14][2] ));
  FDCE \retbuf_reg[14][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_245),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_351),
        .Q(\retbuf_reg_n_0_[14][3] ));
  FDCE \retbuf_reg[14][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_245),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_350),
        .Q(\retbuf_reg_n_0_[14][4] ));
  FDCE \retbuf_reg[14][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_245),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_349),
        .Q(\retbuf_reg_n_0_[14][5] ));
  FDCE \retbuf_reg[14][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_245),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_348),
        .Q(\retbuf_reg_n_0_[14][6] ));
  FDCE \retbuf_reg[14][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_245),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_347),
        .Q(\retbuf_reg_n_0_[14][7] ));
  FDCE \retbuf_reg[15][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_246),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_262),
        .Q(\retbuf_reg_n_0_[15][0] ));
  FDCE \retbuf_reg[15][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_246),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_344),
        .Q(\retbuf_reg_n_0_[15][1] ));
  FDCE \retbuf_reg[15][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_246),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_343),
        .Q(\retbuf_reg_n_0_[15][2] ));
  FDCE \retbuf_reg[15][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_246),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_342),
        .Q(\retbuf_reg_n_0_[15][3] ));
  FDCE \retbuf_reg[15][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_246),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_341),
        .Q(\retbuf_reg_n_0_[15][4] ));
  FDCE \retbuf_reg[15][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_246),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_340),
        .Q(\retbuf_reg_n_0_[15][5] ));
  FDCE \retbuf_reg[15][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_246),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_339),
        .Q(\retbuf_reg_n_0_[15][6] ));
  FDCE \retbuf_reg[15][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_246),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_338),
        .Q(\retbuf_reg_n_0_[15][7] ));
  FDCE \retbuf_reg[16][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_247),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_232),
        .Q(\retbuf_reg[16]_65 [0]));
  FDCE \retbuf_reg[16][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_247),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_231),
        .Q(\retbuf_reg[16]_65 [1]));
  FDCE \retbuf_reg[16][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_247),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_230),
        .Q(\retbuf_reg[16]_65 [2]));
  FDCE \retbuf_reg[16][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_247),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_229),
        .Q(\retbuf_reg[16]_65 [3]));
  FDCE \retbuf_reg[16][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_247),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_228),
        .Q(\retbuf_reg[16]_65 [4]));
  FDCE \retbuf_reg[16][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_247),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_227),
        .Q(\retbuf_reg[16]_65 [5]));
  FDCE \retbuf_reg[16][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_247),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_226),
        .Q(\retbuf_reg[16]_65 [6]));
  FDCE \retbuf_reg[16][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_247),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_225),
        .Q(\retbuf_reg[16]_65 [7]));
  FDCE \retbuf_reg[17][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_248),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_224),
        .Q(\retbuf_reg_n_0_[17][0] ));
  FDCE \retbuf_reg[17][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_248),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_223),
        .Q(\retbuf_reg_n_0_[17][1] ));
  FDCE \retbuf_reg[17][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_248),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_222),
        .Q(\retbuf_reg_n_0_[17][2] ));
  FDCE \retbuf_reg[17][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_248),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_221),
        .Q(\retbuf_reg_n_0_[17][3] ));
  FDCE \retbuf_reg[17][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_248),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_220),
        .Q(\retbuf_reg_n_0_[17][4] ));
  FDCE \retbuf_reg[17][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_248),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_219),
        .Q(\retbuf_reg_n_0_[17][5] ));
  FDCE \retbuf_reg[17][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_248),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_218),
        .Q(\retbuf_reg_n_0_[17][6] ));
  FDCE \retbuf_reg[17][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_248),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_217),
        .Q(\retbuf_reg_n_0_[17][7] ));
  FDCE \retbuf_reg[18][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_249),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_216),
        .Q(\retbuf_reg_n_0_[18][0] ));
  FDCE \retbuf_reg[18][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_249),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_215),
        .Q(\retbuf_reg_n_0_[18][1] ));
  FDCE \retbuf_reg[18][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_249),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_214),
        .Q(\retbuf_reg_n_0_[18][2] ));
  FDCE \retbuf_reg[18][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_249),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_213),
        .Q(\retbuf_reg_n_0_[18][3] ));
  FDCE \retbuf_reg[18][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_249),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_212),
        .Q(\retbuf_reg_n_0_[18][4] ));
  FDCE \retbuf_reg[18][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_249),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_211),
        .Q(\retbuf_reg_n_0_[18][5] ));
  FDCE \retbuf_reg[18][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_249),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_210),
        .Q(\retbuf_reg_n_0_[18][6] ));
  FDCE \retbuf_reg[18][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_249),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_209),
        .Q(\retbuf_reg_n_0_[18][7] ));
  FDCE \retbuf_reg[19][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_250),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_208),
        .Q(\retbuf_reg_n_0_[19][0] ));
  FDCE \retbuf_reg[19][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_250),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_207),
        .Q(\retbuf_reg_n_0_[19][1] ));
  FDCE \retbuf_reg[19][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_250),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_206),
        .Q(\retbuf_reg_n_0_[19][2] ));
  FDCE \retbuf_reg[19][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_250),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_205),
        .Q(\retbuf_reg_n_0_[19][3] ));
  FDCE \retbuf_reg[19][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_250),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_204),
        .Q(\retbuf_reg_n_0_[19][4] ));
  FDCE \retbuf_reg[19][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_250),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_203),
        .Q(\retbuf_reg_n_0_[19][5] ));
  FDCE \retbuf_reg[19][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_250),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_202),
        .Q(\retbuf_reg_n_0_[19][6] ));
  FDCE \retbuf_reg[19][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_250),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_201),
        .Q(\retbuf_reg_n_0_[19][7] ));
  FDCE \retbuf_reg[1][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_235),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_255),
        .Q(\retbuf_reg_n_0_[1][0] ));
  MUXF7 \retbuf_reg[1][0]_i_4 
       (.I0(\retbuf[1][0]_i_5_n_0 ),
        .I1(\retbuf[1][0]_i_6_n_0 ),
        .O(\retbuf_reg[1][0]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[1][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_235),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_254),
        .Q(\retbuf_reg_n_0_[1][1] ));
  MUXF7 \retbuf_reg[1][1]_i_4 
       (.I0(\retbuf[1][1]_i_5_n_0 ),
        .I1(\retbuf[1][1]_i_6_n_0 ),
        .O(\retbuf_reg[1][1]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[1][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_235),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_253),
        .Q(\retbuf_reg_n_0_[1][2] ));
  MUXF7 \retbuf_reg[1][2]_i_4 
       (.I0(\retbuf[1][2]_i_5_n_0 ),
        .I1(\retbuf[1][2]_i_6_n_0 ),
        .O(\retbuf_reg[1][2]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[1][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_235),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_252),
        .Q(\retbuf_reg_n_0_[1][3] ));
  MUXF7 \retbuf_reg[1][3]_i_3 
       (.I0(\retbuf[1][3]_i_5_n_0 ),
        .I1(\retbuf[1][3]_i_6_n_0 ),
        .O(\retbuf_reg[1][3]_i_3_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[1][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_235),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_251),
        .Q(\retbuf_reg_n_0_[1][4] ));
  MUXF7 \retbuf_reg[1][4]_i_4 
       (.I0(\retbuf[1][4]_i_5_n_0 ),
        .I1(\retbuf[1][4]_i_6_n_0 ),
        .O(\retbuf_reg[1][4]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[1][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_235),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_250),
        .Q(\retbuf_reg_n_0_[1][5] ));
  MUXF7 \retbuf_reg[1][5]_i_4 
       (.I0(\retbuf[1][5]_i_5_n_0 ),
        .I1(\retbuf[1][5]_i_6_n_0 ),
        .O(\retbuf_reg[1][5]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[1][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_235),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_249),
        .Q(\retbuf_reg_n_0_[1][6] ));
  MUXF7 \retbuf_reg[1][6]_i_4 
       (.I0(\retbuf[1][6]_i_5_n_0 ),
        .I1(\retbuf[1][6]_i_6_n_0 ),
        .O(\retbuf_reg[1][6]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[1][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_235),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_248),
        .Q(\retbuf_reg_n_0_[1][7] ));
  MUXF7 \retbuf_reg[1][7]_i_13 
       (.I0(\retbuf[1][7]_i_15_n_0 ),
        .I1(\retbuf[1][7]_i_16_n_0 ),
        .O(\retbuf_reg[1][7]_i_13_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[20][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_251),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_200),
        .Q(\retbuf_reg_n_0_[20][0] ));
  FDCE \retbuf_reg[20][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_251),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_199),
        .Q(\retbuf_reg_n_0_[20][1] ));
  FDCE \retbuf_reg[20][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_251),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_198),
        .Q(\retbuf_reg_n_0_[20][2] ));
  FDCE \retbuf_reg[20][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_251),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_197),
        .Q(\retbuf_reg_n_0_[20][3] ));
  FDCE \retbuf_reg[20][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_251),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_196),
        .Q(\retbuf_reg_n_0_[20][4] ));
  FDCE \retbuf_reg[20][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_251),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_195),
        .Q(\retbuf_reg_n_0_[20][5] ));
  FDCE \retbuf_reg[20][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_251),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_194),
        .Q(\retbuf_reg_n_0_[20][6] ));
  FDCE \retbuf_reg[20][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_251),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_193),
        .Q(\retbuf_reg_n_0_[20][7] ));
  FDCE \retbuf_reg[21][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_252),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_192),
        .Q(\retbuf_reg_n_0_[21][0] ));
  FDCE \retbuf_reg[21][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_252),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_191),
        .Q(\retbuf_reg_n_0_[21][1] ));
  FDCE \retbuf_reg[21][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_252),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_190),
        .Q(\retbuf_reg_n_0_[21][2] ));
  FDCE \retbuf_reg[21][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_252),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_189),
        .Q(\retbuf_reg_n_0_[21][3] ));
  FDCE \retbuf_reg[21][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_252),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_188),
        .Q(\retbuf_reg_n_0_[21][4] ));
  FDCE \retbuf_reg[21][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_252),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_187),
        .Q(\retbuf_reg_n_0_[21][5] ));
  FDCE \retbuf_reg[21][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_252),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_186),
        .Q(\retbuf_reg_n_0_[21][6] ));
  FDCE \retbuf_reg[21][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_252),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_185),
        .Q(\retbuf_reg_n_0_[21][7] ));
  FDCE \retbuf_reg[22][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_253),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_184),
        .Q(\retbuf_reg_n_0_[22][0] ));
  FDCE \retbuf_reg[22][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_253),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_183),
        .Q(\retbuf_reg_n_0_[22][1] ));
  FDCE \retbuf_reg[22][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_253),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_182),
        .Q(\retbuf_reg_n_0_[22][2] ));
  FDCE \retbuf_reg[22][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_253),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_181),
        .Q(\retbuf_reg_n_0_[22][3] ));
  FDCE \retbuf_reg[22][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_253),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_180),
        .Q(\retbuf_reg_n_0_[22][4] ));
  FDCE \retbuf_reg[22][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_253),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_179),
        .Q(\retbuf_reg_n_0_[22][5] ));
  FDCE \retbuf_reg[22][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_253),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_178),
        .Q(\retbuf_reg_n_0_[22][6] ));
  FDCE \retbuf_reg[22][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_253),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_177),
        .Q(\retbuf_reg_n_0_[22][7] ));
  FDCE \retbuf_reg[23][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_254),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_176),
        .Q(\retbuf_reg_n_0_[23][0] ));
  FDCE \retbuf_reg[23][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_254),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_175),
        .Q(\retbuf_reg_n_0_[23][1] ));
  FDCE \retbuf_reg[23][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_254),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_174),
        .Q(\retbuf_reg_n_0_[23][2] ));
  FDCE \retbuf_reg[23][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_254),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_173),
        .Q(\retbuf_reg_n_0_[23][3] ));
  FDCE \retbuf_reg[23][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_254),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_172),
        .Q(\retbuf_reg_n_0_[23][4] ));
  FDCE \retbuf_reg[23][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_254),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_171),
        .Q(\retbuf_reg_n_0_[23][5] ));
  FDCE \retbuf_reg[23][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_254),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_170),
        .Q(\retbuf_reg_n_0_[23][6] ));
  FDCE \retbuf_reg[23][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_254),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_169),
        .Q(\retbuf_reg_n_0_[23][7] ));
  FDCE \retbuf_reg[24][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_255),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_168),
        .Q(\retbuf_reg_n_0_[24][0] ));
  FDCE \retbuf_reg[24][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_255),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_167),
        .Q(\retbuf_reg_n_0_[24][1] ));
  FDCE \retbuf_reg[24][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_255),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_166),
        .Q(\retbuf_reg_n_0_[24][2] ));
  FDCE \retbuf_reg[24][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_255),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_165),
        .Q(\retbuf_reg_n_0_[24][3] ));
  FDCE \retbuf_reg[24][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_255),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_164),
        .Q(\retbuf_reg_n_0_[24][4] ));
  FDCE \retbuf_reg[24][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_255),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_163),
        .Q(\retbuf_reg_n_0_[24][5] ));
  FDCE \retbuf_reg[24][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_255),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_162),
        .Q(\retbuf_reg_n_0_[24][6] ));
  FDCE \retbuf_reg[24][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_255),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_161),
        .Q(\retbuf_reg_n_0_[24][7] ));
  FDCE \retbuf_reg[25][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_256),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_160),
        .Q(\retbuf_reg_n_0_[25][0] ));
  FDCE \retbuf_reg[25][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_256),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_159),
        .Q(\retbuf_reg_n_0_[25][1] ));
  FDCE \retbuf_reg[25][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_256),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_158),
        .Q(\retbuf_reg_n_0_[25][2] ));
  FDCE \retbuf_reg[25][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_256),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_157),
        .Q(\retbuf_reg_n_0_[25][3] ));
  FDCE \retbuf_reg[25][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_256),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_156),
        .Q(\retbuf_reg_n_0_[25][4] ));
  FDCE \retbuf_reg[25][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_256),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_155),
        .Q(\retbuf_reg_n_0_[25][5] ));
  FDCE \retbuf_reg[25][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_256),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_154),
        .Q(\retbuf_reg_n_0_[25][6] ));
  FDCE \retbuf_reg[25][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_256),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_153),
        .Q(\retbuf_reg_n_0_[25][7] ));
  FDCE \retbuf_reg[26][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_257),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_152),
        .Q(\retbuf_reg_n_0_[26][0] ));
  FDCE \retbuf_reg[26][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_257),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_151),
        .Q(\retbuf_reg_n_0_[26][1] ));
  FDCE \retbuf_reg[26][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_257),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_150),
        .Q(\retbuf_reg_n_0_[26][2] ));
  FDCE \retbuf_reg[26][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_257),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_149),
        .Q(\retbuf_reg_n_0_[26][3] ));
  FDCE \retbuf_reg[26][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_257),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_148),
        .Q(\retbuf_reg_n_0_[26][4] ));
  FDCE \retbuf_reg[26][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_257),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_147),
        .Q(\retbuf_reg_n_0_[26][5] ));
  FDCE \retbuf_reg[26][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_257),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_146),
        .Q(\retbuf_reg_n_0_[26][6] ));
  FDCE \retbuf_reg[26][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_257),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_145),
        .Q(\retbuf_reg_n_0_[26][7] ));
  FDCE \retbuf_reg[27][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_258),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_144),
        .Q(\retbuf_reg_n_0_[27][0] ));
  FDCE \retbuf_reg[27][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_258),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_143),
        .Q(\retbuf_reg_n_0_[27][1] ));
  FDCE \retbuf_reg[27][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_258),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_142),
        .Q(\retbuf_reg_n_0_[27][2] ));
  FDCE \retbuf_reg[27][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_258),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_141),
        .Q(\retbuf_reg_n_0_[27][3] ));
  FDCE \retbuf_reg[27][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_258),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_140),
        .Q(\retbuf_reg_n_0_[27][4] ));
  FDCE \retbuf_reg[27][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_258),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_139),
        .Q(\retbuf_reg_n_0_[27][5] ));
  FDCE \retbuf_reg[27][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_258),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_138),
        .Q(\retbuf_reg_n_0_[27][6] ));
  FDCE \retbuf_reg[27][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_258),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_137),
        .Q(\retbuf_reg_n_0_[27][7] ));
  FDCE \retbuf_reg[28][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_259),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_136),
        .Q(\retbuf_reg_n_0_[28][0] ));
  FDCE \retbuf_reg[28][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_259),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_135),
        .Q(\retbuf_reg_n_0_[28][1] ));
  FDCE \retbuf_reg[28][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_259),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_134),
        .Q(\retbuf_reg_n_0_[28][2] ));
  FDCE \retbuf_reg[28][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_259),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_133),
        .Q(\retbuf_reg_n_0_[28][3] ));
  FDCE \retbuf_reg[28][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_259),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_132),
        .Q(\retbuf_reg_n_0_[28][4] ));
  FDCE \retbuf_reg[28][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_259),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_131),
        .Q(\retbuf_reg_n_0_[28][5] ));
  FDCE \retbuf_reg[28][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_259),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_130),
        .Q(\retbuf_reg_n_0_[28][6] ));
  FDCE \retbuf_reg[28][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_259),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_129),
        .Q(\retbuf_reg_n_0_[28][7] ));
  FDCE \retbuf_reg[29][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_260),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_128),
        .Q(\retbuf_reg_n_0_[29][0] ));
  FDCE \retbuf_reg[29][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_260),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_127),
        .Q(\retbuf_reg_n_0_[29][1] ));
  FDCE \retbuf_reg[29][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_260),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_126),
        .Q(\retbuf_reg_n_0_[29][2] ));
  FDCE \retbuf_reg[29][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_260),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_125),
        .Q(\retbuf_reg_n_0_[29][3] ));
  FDCE \retbuf_reg[29][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_260),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_124),
        .Q(\retbuf_reg_n_0_[29][4] ));
  FDCE \retbuf_reg[29][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_260),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_123),
        .Q(\retbuf_reg_n_0_[29][5] ));
  FDCE \retbuf_reg[29][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_260),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_122),
        .Q(\retbuf_reg_n_0_[29][6] ));
  FDCE \retbuf_reg[29][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_260),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_121),
        .Q(\retbuf_reg_n_0_[29][7] ));
  FDCE \retbuf_reg[2][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_236),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_247),
        .Q(\retbuf_reg_n_0_[2][0] ));
  MUXF7 \retbuf_reg[2][0]_i_4 
       (.I0(\retbuf[2][0]_i_5_n_0 ),
        .I1(\retbuf[2][0]_i_6_n_0 ),
        .O(\retbuf_reg[2][0]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[2][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_236),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_246),
        .Q(\retbuf_reg_n_0_[2][1] ));
  MUXF7 \retbuf_reg[2][1]_i_4 
       (.I0(\retbuf[2][1]_i_5_n_0 ),
        .I1(\retbuf[2][1]_i_6_n_0 ),
        .O(\retbuf_reg[2][1]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[2][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_236),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_245),
        .Q(\retbuf_reg_n_0_[2][2] ));
  MUXF7 \retbuf_reg[2][2]_i_4 
       (.I0(\retbuf[2][2]_i_5_n_0 ),
        .I1(\retbuf[2][2]_i_6_n_0 ),
        .O(\retbuf_reg[2][2]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[2][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_236),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_244),
        .Q(\retbuf_reg_n_0_[2][3] ));
  MUXF7 \retbuf_reg[2][3]_i_4 
       (.I0(\retbuf[2][3]_i_5_n_0 ),
        .I1(\retbuf[2][3]_i_6_n_0 ),
        .O(\retbuf_reg[2][3]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[2][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_236),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_243),
        .Q(\retbuf_reg_n_0_[2][4] ));
  MUXF7 \retbuf_reg[2][4]_i_4 
       (.I0(\retbuf[2][4]_i_5_n_0 ),
        .I1(\retbuf[2][4]_i_6_n_0 ),
        .O(\retbuf_reg[2][4]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[2][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_236),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_242),
        .Q(\retbuf_reg_n_0_[2][5] ));
  MUXF7 \retbuf_reg[2][5]_i_4 
       (.I0(\retbuf[2][5]_i_5_n_0 ),
        .I1(\retbuf[2][5]_i_6_n_0 ),
        .O(\retbuf_reg[2][5]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[2][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_236),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_241),
        .Q(\retbuf_reg_n_0_[2][6] ));
  MUXF7 \retbuf_reg[2][6]_i_4 
       (.I0(\retbuf[2][6]_i_5_n_0 ),
        .I1(\retbuf[2][6]_i_6_n_0 ),
        .O(\retbuf_reg[2][6]_i_4_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[2][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_236),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_399),
        .Q(\retbuf_reg_n_0_[2][7] ));
  MUXF7 \retbuf_reg[2][7]_i_8 
       (.I0(\retbuf[2][7]_i_10_n_0 ),
        .I1(\retbuf[2][7]_i_11_n_0 ),
        .O(\retbuf_reg[2][7]_i_8_n_0 ),
        .S(\retbuf[0][1]_i_3_n_0 ));
  FDCE \retbuf_reg[30][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_261),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_120),
        .Q(\retbuf_reg_n_0_[30][0] ));
  FDCE \retbuf_reg[30][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_261),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_119),
        .Q(\retbuf_reg_n_0_[30][1] ));
  FDCE \retbuf_reg[30][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_261),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_118),
        .Q(\retbuf_reg_n_0_[30][2] ));
  FDCE \retbuf_reg[30][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_261),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_117),
        .Q(\retbuf_reg_n_0_[30][3] ));
  FDCE \retbuf_reg[30][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_261),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_116),
        .Q(\retbuf_reg_n_0_[30][4] ));
  FDCE \retbuf_reg[30][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_261),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_115),
        .Q(\retbuf_reg_n_0_[30][5] ));
  FDCE \retbuf_reg[30][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_261),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_114),
        .Q(\retbuf_reg_n_0_[30][6] ));
  FDCE \retbuf_reg[30][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_261),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_113),
        .Q(\retbuf_reg_n_0_[30][7] ));
  FDCE \retbuf_reg[31][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_262),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_112),
        .Q(\retbuf_reg_n_0_[31][0] ));
  FDCE \retbuf_reg[31][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_262),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_111),
        .Q(\retbuf_reg_n_0_[31][1] ));
  FDCE \retbuf_reg[31][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_262),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_110),
        .Q(\retbuf_reg_n_0_[31][2] ));
  FDCE \retbuf_reg[31][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_262),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_109),
        .Q(\retbuf_reg_n_0_[31][3] ));
  FDCE \retbuf_reg[31][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_262),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_108),
        .Q(\retbuf_reg_n_0_[31][4] ));
  FDCE \retbuf_reg[31][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_262),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_107),
        .Q(\retbuf_reg_n_0_[31][5] ));
  FDCE \retbuf_reg[31][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_262),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_106),
        .Q(\retbuf_reg_n_0_[31][6] ));
  FDCE \retbuf_reg[31][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_262),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_105),
        .Q(\retbuf_reg_n_0_[31][7] ));
  FDCE \retbuf_reg[32][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_263),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_104),
        .Q(\retbuf_reg_n_0_[32][0] ));
  FDCE \retbuf_reg[32][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_263),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_103),
        .Q(\retbuf_reg_n_0_[32][1] ));
  FDCE \retbuf_reg[32][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_263),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_102),
        .Q(\retbuf_reg_n_0_[32][2] ));
  FDCE \retbuf_reg[32][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_263),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_101),
        .Q(\retbuf_reg_n_0_[32][3] ));
  FDCE \retbuf_reg[32][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_263),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_100),
        .Q(\retbuf_reg_n_0_[32][4] ));
  FDCE \retbuf_reg[32][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_263),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_99),
        .Q(\retbuf_reg_n_0_[32][5] ));
  FDCE \retbuf_reg[32][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_263),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_98),
        .Q(\retbuf_reg_n_0_[32][6] ));
  FDCE \retbuf_reg[32][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_263),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_97),
        .Q(\retbuf_reg_n_0_[32][7] ));
  FDCE \retbuf_reg[33][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_264),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_96),
        .Q(\retbuf_reg_n_0_[33][0] ));
  FDCE \retbuf_reg[33][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_264),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_95),
        .Q(\retbuf_reg_n_0_[33][1] ));
  FDCE \retbuf_reg[33][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_264),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_94),
        .Q(\retbuf_reg_n_0_[33][2] ));
  FDCE \retbuf_reg[33][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_264),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_93),
        .Q(\retbuf_reg_n_0_[33][3] ));
  FDCE \retbuf_reg[33][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_264),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_92),
        .Q(\retbuf_reg_n_0_[33][4] ));
  FDCE \retbuf_reg[33][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_264),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_91),
        .Q(\retbuf_reg_n_0_[33][5] ));
  FDCE \retbuf_reg[33][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_264),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_90),
        .Q(\retbuf_reg_n_0_[33][6] ));
  FDCE \retbuf_reg[33][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_264),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_89),
        .Q(\retbuf_reg_n_0_[33][7] ));
  FDCE \retbuf_reg[34][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_265),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_88),
        .Q(\retbuf_reg_n_0_[34][0] ));
  FDCE \retbuf_reg[34][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_265),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_87),
        .Q(\retbuf_reg_n_0_[34][1] ));
  FDCE \retbuf_reg[34][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_265),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_86),
        .Q(\retbuf_reg_n_0_[34][2] ));
  FDCE \retbuf_reg[34][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_265),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_85),
        .Q(\retbuf_reg_n_0_[34][3] ));
  FDCE \retbuf_reg[34][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_265),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_84),
        .Q(\retbuf_reg_n_0_[34][4] ));
  FDCE \retbuf_reg[34][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_265),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_83),
        .Q(\retbuf_reg_n_0_[34][5] ));
  FDCE \retbuf_reg[34][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_265),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_82),
        .Q(\retbuf_reg_n_0_[34][6] ));
  FDCE \retbuf_reg[34][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_265),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_81),
        .Q(\retbuf_reg_n_0_[34][7] ));
  FDCE \retbuf_reg[35][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_266),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_80),
        .Q(\retbuf_reg_n_0_[35][0] ));
  FDCE \retbuf_reg[35][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_266),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_79),
        .Q(\retbuf_reg_n_0_[35][1] ));
  FDCE \retbuf_reg[35][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_266),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_78),
        .Q(\retbuf_reg_n_0_[35][2] ));
  FDCE \retbuf_reg[35][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_266),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_77),
        .Q(\retbuf_reg_n_0_[35][3] ));
  FDCE \retbuf_reg[35][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_266),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_76),
        .Q(\retbuf_reg_n_0_[35][4] ));
  FDCE \retbuf_reg[35][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_266),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_75),
        .Q(\retbuf_reg_n_0_[35][5] ));
  FDCE \retbuf_reg[35][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_266),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_74),
        .Q(\retbuf_reg_n_0_[35][6] ));
  FDCE \retbuf_reg[35][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_266),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_73),
        .Q(\retbuf_reg_n_0_[35][7] ));
  FDCE \retbuf_reg[36][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_72),
        .Q(\retbuf_reg_n_0_[36][0] ));
  FDCE \retbuf_reg[36][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_71),
        .Q(\retbuf_reg_n_0_[36][1] ));
  FDCE \retbuf_reg[36][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_70),
        .Q(\retbuf_reg_n_0_[36][2] ));
  FDCE \retbuf_reg[36][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_69),
        .Q(\retbuf_reg_n_0_[36][3] ));
  FDCE \retbuf_reg[36][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_68),
        .Q(\retbuf_reg_n_0_[36][4] ));
  FDCE \retbuf_reg[36][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_67),
        .Q(\retbuf_reg_n_0_[36][5] ));
  FDCE \retbuf_reg[36][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_66),
        .Q(\retbuf_reg_n_0_[36][6] ));
  FDCE \retbuf_reg[36][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_65),
        .Q(\retbuf_reg_n_0_[36][7] ));
  FDCE \retbuf_reg[37][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_56),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_64),
        .Q(\retbuf_reg_n_0_[37][0] ));
  FDCE \retbuf_reg[37][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_56),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_63),
        .Q(\retbuf_reg_n_0_[37][1] ));
  FDCE \retbuf_reg[37][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_56),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_62),
        .Q(\retbuf_reg_n_0_[37][2] ));
  FDCE \retbuf_reg[37][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_56),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_61),
        .Q(\retbuf_reg_n_0_[37][3] ));
  FDCE \retbuf_reg[37][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_56),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_60),
        .Q(\retbuf_reg_n_0_[37][4] ));
  FDCE \retbuf_reg[37][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_56),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_59),
        .Q(\retbuf_reg_n_0_[37][5] ));
  FDCE \retbuf_reg[37][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_56),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_58),
        .Q(\retbuf_reg_n_0_[37][6] ));
  FDCE \retbuf_reg[37][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_56),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_57),
        .Q(\retbuf_reg_n_0_[37][7] ));
  FDCE \retbuf_reg[38][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_56),
        .Q(\retbuf_reg_n_0_[38][0] ));
  FDCE \retbuf_reg[38][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_55),
        .Q(\retbuf_reg_n_0_[38][1] ));
  FDCE \retbuf_reg[38][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_54),
        .Q(\retbuf_reg_n_0_[38][2] ));
  FDCE \retbuf_reg[38][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_53),
        .Q(\retbuf_reg_n_0_[38][3] ));
  FDCE \retbuf_reg[38][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_52),
        .Q(\retbuf_reg_n_0_[38][4] ));
  FDCE \retbuf_reg[38][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_51),
        .Q(\retbuf_reg_n_0_[38][5] ));
  FDCE \retbuf_reg[38][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_50),
        .Q(\retbuf_reg_n_0_[38][6] ));
  FDCE \retbuf_reg[38][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_49),
        .Q(\retbuf_reg_n_0_[38][7] ));
  FDCE \retbuf_reg[39][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_37),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_48),
        .Q(\retbuf_reg_n_0_[39][0] ));
  FDCE \retbuf_reg[39][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_37),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_47),
        .Q(\retbuf_reg_n_0_[39][1] ));
  FDCE \retbuf_reg[39][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_37),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_46),
        .Q(\retbuf_reg_n_0_[39][2] ));
  FDCE \retbuf_reg[39][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_37),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_45),
        .Q(\retbuf_reg_n_0_[39][3] ));
  FDCE \retbuf_reg[39][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_37),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_44),
        .Q(\retbuf_reg_n_0_[39][4] ));
  FDCE \retbuf_reg[39][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_37),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_43),
        .Q(\retbuf_reg_n_0_[39][5] ));
  FDCE \retbuf_reg[39][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_37),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_42),
        .Q(\retbuf_reg_n_0_[39][6] ));
  FDCE \retbuf_reg[39][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_37),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_41),
        .Q(\retbuf_reg_n_0_[39][7] ));
  FDCE \retbuf_reg[3][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_21),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_240),
        .Q(\retbuf_reg_n_0_[3][0] ));
  FDCE \retbuf_reg[3][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_21),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_239),
        .Q(\retbuf_reg_n_0_[3][1] ));
  FDCE \retbuf_reg[3][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_21),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_335),
        .Q(\retbuf_reg_n_0_[3][2] ));
  FDCE \retbuf_reg[3][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_21),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_334),
        .Q(\retbuf_reg_n_0_[3][3] ));
  FDCE \retbuf_reg[3][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_21),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_238),
        .Q(\retbuf_reg_n_0_[3][4] ));
  FDCE \retbuf_reg[3][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_21),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_237),
        .Q(\retbuf_reg_n_0_[3][5] ));
  FDCE \retbuf_reg[3][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_21),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_333),
        .Q(\retbuf_reg_n_0_[3][6] ));
  FDCE \retbuf_reg[3][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_21),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_332),
        .Q(\retbuf_reg_n_0_[3][7] ));
  FDCE \retbuf_reg[4][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_22),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_269),
        .Q(\retbuf_reg_n_0_[4][0] ));
  FDCE \retbuf_reg[4][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_22),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_40),
        .Q(\retbuf_reg_n_0_[4][1] ));
  FDCE \retbuf_reg[4][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_22),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_39),
        .Q(\retbuf_reg_n_0_[4][2] ));
  FDCE \retbuf_reg[4][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_22),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_268),
        .Q(\retbuf_reg_n_0_[4][3] ));
  FDCE \retbuf_reg[4][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_22),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_38),
        .Q(\retbuf_reg_n_0_[4][4] ));
  FDCE \retbuf_reg[4][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_22),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_37),
        .Q(\retbuf_reg_n_0_[4][5] ));
  FDCE \retbuf_reg[4][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_22),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_36),
        .Q(\retbuf_reg_n_0_[4][6] ));
  FDCE \retbuf_reg[4][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_22),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_267),
        .Q(\retbuf_reg_n_0_[4][7] ));
  FDCE \retbuf_reg[5][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_237),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_10),
        .Q(\retbuf_reg_n_0_[5][0] ));
  FDCE \retbuf_reg[5][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_237),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_9),
        .Q(\retbuf_reg_n_0_[5][1] ));
  FDCE \retbuf_reg[5][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_237),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_8),
        .Q(\retbuf_reg_n_0_[5][2] ));
  FDCE \retbuf_reg[5][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_237),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_7),
        .Q(\retbuf_reg_n_0_[5][3] ));
  FDCE \retbuf_reg[5][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_237),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_6),
        .Q(\retbuf_reg_n_0_[5][4] ));
  FDCE \retbuf_reg[5][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_237),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_5),
        .Q(\retbuf_reg_n_0_[5][5] ));
  FDCE \retbuf_reg[5][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_237),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_4),
        .Q(\retbuf_reg_n_0_[5][6] ));
  FDCE \retbuf_reg[5][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_237),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_3),
        .Q(\retbuf_reg_n_0_[5][7] ));
  FDCE \retbuf_reg[6][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_238),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_33),
        .Q(\retbuf_reg_n_0_[6][0] ));
  FDCE \retbuf_reg[6][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_238),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_32),
        .Q(\retbuf_reg_n_0_[6][1] ));
  FDCE \retbuf_reg[6][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_238),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_31),
        .Q(\retbuf_reg_n_0_[6][2] ));
  FDCE \retbuf_reg[6][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_238),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_30),
        .Q(\retbuf_reg_n_0_[6][3] ));
  FDCE \retbuf_reg[6][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_238),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_29),
        .Q(\retbuf_reg_n_0_[6][4] ));
  FDCE \retbuf_reg[6][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_238),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_331),
        .Q(\retbuf_reg_n_0_[6][5] ));
  MUXF7 \retbuf_reg[6][5]_i_2 
       (.I0(\retbuf[6][5]_i_5_n_0 ),
        .I1(\retbuf[6][5]_i_6_n_0 ),
        .O(\retbuf_reg[6][5]_i_2_n_0 ),
        .S(\retbuf[5][5]_i_4_n_0 ));
  FDCE \retbuf_reg[6][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_238),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_28),
        .Q(\retbuf_reg_n_0_[6][6] ));
  FDCE \retbuf_reg[6][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_238),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_27),
        .Q(\retbuf_reg_n_0_[6][7] ));
  FDCE \retbuf_reg[7][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_23),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_236),
        .Q(\retbuf_reg_n_0_[7][0] ));
  FDCE \retbuf_reg[7][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_23),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_235),
        .Q(\retbuf_reg_n_0_[7][1] ));
  FDCE \retbuf_reg[7][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_23),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_234),
        .Q(\retbuf_reg_n_0_[7][2] ));
  FDCE \retbuf_reg[7][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_23),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_233),
        .Q(\retbuf_reg_n_0_[7][3] ));
  FDCE \retbuf_reg[7][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_23),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_330),
        .Q(\retbuf_reg_n_0_[7][4] ));
  FDCE \retbuf_reg[7][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_23),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_329),
        .Q(\retbuf_reg_n_0_[7][5] ));
  FDCE \retbuf_reg[7][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_23),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_328),
        .Q(\retbuf_reg_n_0_[7][6] ));
  FDCE \retbuf_reg[7][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_23),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_327),
        .Q(\retbuf_reg_n_0_[7][7] ));
  FDCE \retbuf_reg[8][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_239),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_398),
        .Q(\retbuf_reg_n_0_[8][0] ));
  FDCE \retbuf_reg[8][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_239),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_397),
        .Q(\retbuf_reg_n_0_[8][1] ));
  FDCE \retbuf_reg[8][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_239),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_396),
        .Q(\retbuf_reg_n_0_[8][2] ));
  FDCE \retbuf_reg[8][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_239),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_395),
        .Q(\retbuf_reg_n_0_[8][3] ));
  FDCE \retbuf_reg[8][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_239),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_394),
        .Q(\retbuf_reg_n_0_[8][4] ));
  FDCE \retbuf_reg[8][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_239),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_393),
        .Q(\retbuf_reg_n_0_[8][5] ));
  FDCE \retbuf_reg[8][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_239),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_392),
        .Q(\retbuf_reg_n_0_[8][6] ));
  FDCE \retbuf_reg[8][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_239),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_391),
        .Q(\retbuf_reg_n_0_[8][7] ));
  FDCE \retbuf_reg[9][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_240),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_390),
        .Q(\retbuf_reg_n_0_[9][0] ));
  FDCE \retbuf_reg[9][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_240),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_389),
        .Q(\retbuf_reg_n_0_[9][1] ));
  FDCE \retbuf_reg[9][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_240),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_388),
        .Q(\retbuf_reg_n_0_[9][2] ));
  FDCE \retbuf_reg[9][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_240),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_387),
        .Q(\retbuf_reg_n_0_[9][3] ));
  FDCE \retbuf_reg[9][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_240),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_386),
        .Q(\retbuf_reg_n_0_[9][4] ));
  FDCE \retbuf_reg[9][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_240),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_385),
        .Q(\retbuf_reg_n_0_[9][5] ));
  FDCE \retbuf_reg[9][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_240),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_384),
        .Q(\retbuf_reg_n_0_[9][6] ));
  FDCE \retbuf_reg[9][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_240),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_383),
        .Q(\retbuf_reg_n_0_[9][7] ));
  LUT6 #(
    .INIT(64'hFFFFFFFB00000008)) 
    rng_i_1
       (.I0(hdrNotFix),
        .I1(reqInvSet),
        .I2(\stateOp_reg[0]_5 ),
        .I3(reqInvAcquire),
        .I4(reqInvCornerConfig),
        .I5(rng_reg_12),
        .O(rng_reg_5));
  LUT6 #(
    .INIT(64'hFEFFFFFF02000000)) 
    rng_i_1__0
       (.I0(hdrNotFix),
        .I1(reqInvDecimConfig),
        .I2(reqInvDecimAcquire),
        .I3(reqInvDecimSet),
        .I4(tixVState1),
        .I5(rng_reg_7),
        .O(rng_reg));
  (* SOFT_HLUTNM = "soft_lutpair2274" *) 
  LUT5 #(
    .INIT(32'hFFEF0020)) 
    rng_i_1__1
       (.I0(\myHdreng/rng ),
        .I1(rng_reg_8),
        .I2(reqInvHdrengSet),
        .I3(reqInvAssign),
        .I4(rng_reg_13),
        .O(stateOp_reg_4));
  LUT6 #(
    .INIT(64'hFFFFFFF700080000)) 
    rng_i_1__2
       (.I0(\mask_reg[7]_0 ),
        .I1(reqInvMemtrackSet),
        .I2(reqInvMemtrackClearMask),
        .I3(reqInvMemtrackSelect),
        .I4(hdrNotFix),
        .I5(rng_reg_9),
        .O(rng_reg_0));
  LUT6 #(
    .INIT(64'hFFFFEFFF00002000)) 
    rng_i_1__3
       (.I0(hdrNotFix),
        .I1(reqInvRotaryMoveto),
        .I2(reqInvRotarySet),
        .I3(step1__6),
        .I4(reqInvRotaryConfig),
        .I5(rng_reg_10),
        .O(rng_reg_1));
  LUT6 #(
    .INIT(64'hFFFFFFF700080000)) 
    rng_i_1__4
       (.I0(\mask_reg[5]_1 ),
        .I1(reqInvHshktrackSet),
        .I2(reqInvHshktrackClearMask),
        .I3(reqInvHshktrackSelect),
        .I4(hdrNotFix),
        .I5(rng_reg_11),
        .O(rng_reg_2));
  LUT6 #(
    .INIT(64'hFFF1FFFF00010000)) 
    rng_sig_i_1
       (.I0(linNotRot_i_2_n_0),
        .I1(hdrNotFix_i_2_n_0),
        .I2(rng_sig_reg),
        .I3(reqInvDirectorConfig),
        .I4(reqInvDirectorSet),
        .I5(rng),
        .O(stateOp_reg_3));
  LUT6 #(
    .INIT(64'hFBFFFEFFFFBFBFEF)) 
    \rxlen[0]_i_3 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(\stateOp_reg[5]_0 [1]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [0]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\rxlen[0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2370" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \rxlen[0]_i_5 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [2]),
        .O(\rxlen[0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFEBFFFFFFFFFBFF)) 
    \rxlen[0]_i_6 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [0]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\rxlen[0]_i_6_n_0 ));
  FDCE \rxlen_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_556),
        .Q(\rxlen_reg_n_0_[0] ));
  LUT1 #(
    .INIT(2'h1)) 
    \seq[0][21]_i_2 
       (.I0(commok),
        .O(commok_sig_reg_0[1]));
  (* SOFT_HLUTNM = "soft_lutpair2421" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \seq[0][5]_i_1 
       (.I0(commok),
        .I1(rng),
        .O(commok_sig_reg_0[0]));
  (* SOFT_HLUTNM = "soft_lutpair2421" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \seq[1][13]_i_1 
       (.I0(commok),
        .I1(rng),
        .O(\seq[1]_2 ));
  (* SOFT_HLUTNM = "soft_lutpair2316" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \staTixVTrigger[7]_i_1__0 
       (.I0(\mask_reg[7]_0 ),
        .I1(reqInvMemtrackSelect),
        .I2(reqInvMemtrackClearMask),
        .O(\stateOp_reg[2]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2320" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \staTixVTrigger[7]_i_1__1 
       (.I0(\mask_reg[5]_1 ),
        .I1(reqInvHshktrackSelect),
        .I2(reqInvHshktrackClearMask),
        .O(\stateOp_reg[0]_4 ));
  LUT6 #(
    .INIT(64'h0000080000000000)) 
    \staTixVTrigger[7]_i_2__0 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I5(\staTixVTrigger[7]_i_4__1_n_0 ),
        .O(reqInvVidtrackSelect));
  LUT6 #(
    .INIT(64'h0000008000000000)) 
    \staTixVTrigger[7]_i_2__1 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\staTixVTrigger[7]_i_4__1_n_0 ),
        .O(reqInvSelect));
  LUT6 #(
    .INIT(64'h0000200000000000)) 
    \staTixVTrigger[7]_i_3 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(targetNotSteady_i_3_n_0),
        .O(reqInvMemtrackSelect));
  (* SOFT_HLUTNM = "soft_lutpair2362" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \staTixVTrigger[7]_i_3__0 
       (.I0(stateOp_i_2__0_n_0),
        .I1(targetNotSteady_i_3_n_0),
        .I2(\staTixVTrigger[7]_i_5_n_0 ),
        .O(reqInvHshktrackSelect));
  (* SOFT_HLUTNM = "soft_lutpair2288" *) 
  LUT5 #(
    .INIT(32'hFFFFFEFF)) 
    \staTixVTrigger[7]_i_3__1 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .O(\staTixVTrigger[7]_i_3__1_n_0 ));
  LUT6 #(
    .INIT(64'h0000200000000000)) 
    \staTixVTrigger[7]_i_4 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(stateOp_i_3__1_n_0),
        .O(reqInvMemtrackClearMask));
  (* SOFT_HLUTNM = "soft_lutpair2363" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \staTixVTrigger[7]_i_4__0 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\staTixVTrigger[7]_i_5_n_0 ),
        .I2(stateOp_i_3__1_n_0),
        .O(reqInvHshktrackClearMask));
  (* SOFT_HLUTNM = "soft_lutpair2290" *) 
  LUT5 #(
    .INIT(32'h00000002)) 
    \staTixVTrigger[7]_i_4__1 
       (.I0(\tixVCommand_reg_n_0_[0] ),
        .I1(\tixVCommand_reg_n_0_[1] ),
        .I2(\tixVCommand_reg_n_0_[4] ),
        .I3(\tixVCommand_reg_n_0_[5] ),
        .I4(stateOp_i_5__1_n_0),
        .O(\staTixVTrigger[7]_i_4__1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000100000)) 
    \staTixVTrigger[7]_i_5 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(\tixVController_reg_n_0_[4] ),
        .I5(\tixVController_reg_n_0_[3] ),
        .O(\staTixVTrigger[7]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2327" *) 
  LUT3 #(
    .INIT(8'h20)) 
    \stateCorecfg[2]_i_4 
       (.I0(stateOp_i_2__0_n_0),
        .I1(ackInvConfigSynth_sig_i_5_n_0),
        .I2(\stateCorecfg[2]_i_6_n_0 ),
        .O(reqInvGetCorereg));
  LUT2 #(
    .INIT(4'h8)) 
    \stateCorecfg[2]_i_5 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\stateCorecfg[2]_i_7_n_0 ),
        .O(reqInvSetCorereg));
  (* SOFT_HLUTNM = "soft_lutpair2291" *) 
  LUT5 #(
    .INIT(32'h00000010)) 
    \stateCorecfg[2]_i_6 
       (.I0(\tixVCommand_reg_n_0_[4] ),
        .I1(\tixVCommand_reg_n_0_[5] ),
        .I2(\tixVCommand_reg_n_0_[1] ),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .I4(\stateCorecfg[2]_i_8_n_0 ),
        .O(\stateCorecfg[2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000040000)) 
    \stateCorecfg[2]_i_7 
       (.I0(\retbuf[0][0]_i_3_n_0 ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\stateCorecfg[2]_i_9_n_0 ),
        .I3(\stateCorecfg[2]_i_8_n_0 ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .I5(\ixRetbufCrc[4]_i_5_n_0 ),
        .O(\stateCorecfg[2]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2336" *) 
  LUT4 #(
    .INIT(16'hFFEF)) 
    \stateCorecfg[2]_i_8 
       (.I0(\tixVCommand_reg_n_0_[6] ),
        .I1(\tixVCommand_reg_n_0_[7] ),
        .I2(\tixVCommand_reg_n_0_[2] ),
        .I3(\tixVCommand_reg_n_0_[3] ),
        .O(\stateCorecfg[2]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2294" *) 
  LUT4 #(
    .INIT(16'hFFFD)) 
    \stateCorecfg[2]_i_9 
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .O(\stateCorecfg[2]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h0000FFFF00040004)) 
    stateMclk_i_1
       (.I0(Q[2]),
        .I1(Q[3]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(reqResetFromHostif),
        .I5(stateMclk),
        .O(\i_reg[2]__0 ));
  LUT6 #(
    .INIT(64'hBBBBBBBBBBBBBBB0)) 
    \stateOp[0]_i_1 
       (.I0(\stateOp_reg[0]_9 [1]),
        .I1(\stateOp_reg[0]_9 [0]),
        .I2(reqInvSet),
        .I3(reqInvUnlock),
        .I4(reqInvAcquire),
        .I5(reqInvCornerConfig),
        .O(\stateOp_reg[1]_4 ));
  LUT6 #(
    .INIT(64'hDDDDDDDDDDDDDDD0)) 
    \stateOp[0]_i_1__1 
       (.I0(\stateOp_reg[0]_7 [0]),
        .I1(\stateOp_reg[0]_7 [1]),
        .I2(reqInvDecimUnlock),
        .I3(reqInvDecimAcquire),
        .I4(reqInvDecimConfig),
        .I5(reqInvDecimSet),
        .O(rng_reg_4[0]));
  LUT6 #(
    .INIT(64'hFE00FFFFFE00FFFE)) 
    \stateOp[0]_i_1__10 
       (.I0(reqInvRotaryZero),
        .I1(reqInvRotaryConfig),
        .I2(ccwNotCw5_in),
        .I3(ackInvSet_sig_reg[1]),
        .I4(ackInvSet_sig_reg[0]),
        .I5(\stateOp_reg[0]_8 ),
        .O(\stateOp_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2271" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \stateOp[0]_i_2__1 
       (.I0(reqInvRotarySet),
        .I1(reqInvRotaryMoveto),
        .O(ccwNotCw5_in));
  LUT5 #(
    .INIT(32'h3EC0FEC0)) 
    \stateOp[0]_i_7 
       (.I0(crcAXIS_tlast_sig_reg_n_0),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [0]),
        .I4(\crcAXIS_tkeep_reg[1]_i_2_n_5 ),
        .O(\stateOp[0]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2278" *) 
  LUT5 #(
    .INIT(32'h000000F7)) 
    \stateOp[0]_i_8 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\crcAXIS_tkeep_reg[1]_i_2_n_5 ),
        .I2(\stateOp_reg[2]_i_6__0_n_5 ),
        .I3(\stateOp_reg[5]_0 [0]),
        .I4(\stateOp_reg[5]_0 [2]),
        .O(\stateOp[0]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2350" *) 
  LUT3 #(
    .INIT(8'h10)) 
    \stateOp[1]_i_10__1 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [5]),
        .O(\stateOp[1]_i_10__1_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \stateOp[1]_i_12 
       (.I0(txlast1[29]),
        .I1(txlast1[28]),
        .O(\stateOp[1]_i_12_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \stateOp[1]_i_13 
       (.I0(txlast1[27]),
        .I1(txlast1[26]),
        .O(\stateOp[1]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'hBA)) 
    \stateOp[1]_i_14 
       (.I0(txlast1[25]),
        .I1(\wordcntCrcLast_reg_n_0_[24] ),
        .I2(txlast1[24]),
        .O(\stateOp[1]_i_14_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[1]_i_15 
       (.I0(txlast1[23]),
        .I1(\wordcntCrcLast_reg_n_0_[23] ),
        .I2(txlast1[22]),
        .I3(\wordcntCrcLast_reg_n_0_[22] ),
        .O(\stateOp[1]_i_15_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[1]_i_16 
       (.I0(txlast1[21]),
        .I1(\wordcntCrcLast_reg_n_0_[21] ),
        .I2(txlast1[20]),
        .I3(\wordcntCrcLast_reg_n_0_[20] ),
        .O(\stateOp[1]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[1]_i_17 
       (.I0(txlast1[19]),
        .I1(\wordcntCrcLast_reg_n_0_[19] ),
        .I2(txlast1[18]),
        .I3(\wordcntCrcLast_reg_n_0_[18] ),
        .O(\stateOp[1]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[1]_i_18 
       (.I0(txlast1[17]),
        .I1(\wordcntCrcLast_reg_n_0_[17] ),
        .I2(txlast1[16]),
        .I3(\wordcntCrcLast_reg_n_0_[16] ),
        .O(\stateOp[1]_i_18_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[1]_i_19 
       (.I0(txlast1[30]),
        .O(\stateOp[1]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h0001000000000000)) 
    \stateOp[1]_i_1__1 
       (.I0(reqInvDecimSet),
        .I1(reqInvDecimConfig),
        .I2(reqInvDecimAcquire),
        .I3(reqInvDecimUnlock),
        .I4(rng_reg_7),
        .I5(tixVState1),
        .O(rng_reg_4[1]));
  LUT5 #(
    .INIT(32'hAFEEFAAA)) 
    \stateOp[1]_i_1__10 
       (.I0(step1__6),
        .I1(ackInvConfig_sig0__6),
        .I2(tkclk),
        .I3(ackInvSet_sig_reg[1]),
        .I4(ackInvSet_sig_reg[0]),
        .O(tkclk_sig_reg));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[1]_i_1__3 
       (.I0(reqInvTkclksrcSetTkst),
        .O(\tixVController_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2273" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \stateOp[1]_i_2 
       (.I0(reqInvCornerConfig),
        .I1(reqInvAcquire),
        .I2(reqInvUnlock),
        .I3(reqInvSet),
        .O(ackInvSet_sig_i_8_0));
  LUT2 #(
    .INIT(4'h1)) 
    \stateOp[1]_i_20 
       (.I0(txlast1[28]),
        .I1(txlast1[29]),
        .O(\stateOp[1]_i_20_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \stateOp[1]_i_21 
       (.I0(txlast1[26]),
        .I1(txlast1[27]),
        .O(\stateOp[1]_i_21_n_0 ));
  LUT3 #(
    .INIT(8'h41)) 
    \stateOp[1]_i_22 
       (.I0(txlast1[25]),
        .I1(\wordcntCrcLast_reg_n_0_[24] ),
        .I2(txlast1[24]),
        .O(\stateOp[1]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[1]_i_23 
       (.I0(\wordcntCrcLast_reg_n_0_[23] ),
        .I1(txlast1[23]),
        .I2(\wordcntCrcLast_reg_n_0_[22] ),
        .I3(txlast1[22]),
        .O(\stateOp[1]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[1]_i_24 
       (.I0(\wordcntCrcLast_reg_n_0_[21] ),
        .I1(txlast1[21]),
        .I2(\wordcntCrcLast_reg_n_0_[20] ),
        .I3(txlast1[20]),
        .O(\stateOp[1]_i_24_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[1]_i_25 
       (.I0(\wordcntCrcLast_reg_n_0_[19] ),
        .I1(txlast1[19]),
        .I2(\wordcntCrcLast_reg_n_0_[18] ),
        .I3(txlast1[18]),
        .O(\stateOp[1]_i_25_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[1]_i_26 
       (.I0(\wordcntCrcLast_reg_n_0_[17] ),
        .I1(txlast1[17]),
        .I2(\wordcntCrcLast_reg_n_0_[16] ),
        .I3(txlast1[16]),
        .O(\stateOp[1]_i_26_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[1]_i_27 
       (.I0(txlast1[15]),
        .I1(\wordcntCrcLast_reg_n_0_[15] ),
        .I2(txlast1[14]),
        .I3(\wordcntCrcLast_reg_n_0_[14] ),
        .O(\stateOp[1]_i_27_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[1]_i_28 
       (.I0(txlast1[13]),
        .I1(\wordcntCrcLast_reg_n_0_[13] ),
        .I2(txlast1[12]),
        .I3(\wordcntCrcLast_reg_n_0_[12] ),
        .O(\stateOp[1]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[1]_i_29 
       (.I0(txlast1[11]),
        .I1(\wordcntCrcLast_reg_n_0_[11] ),
        .I2(txlast1[10]),
        .I3(\wordcntCrcLast_reg_n_0_[10] ),
        .O(\stateOp[1]_i_29_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \stateOp[1]_i_2__0 
       (.I0(reqInvVidtrackSelect),
        .I1(reqInvVidtrackSet),
        .O(\tixVController_reg[1]_1 ));
  LUT6 #(
    .INIT(64'hFFFE0000FFFEFFFF)) 
    \stateOp[1]_i_2__1 
       (.I0(reqInvDecimSet),
        .I1(reqInvDecimConfig),
        .I2(reqInvDecimAcquire),
        .I3(reqInvDecimUnlock),
        .I4(\stateOp_reg[0]_7 [1]),
        .I5(\stateOp_reg[0]_7 [0]),
        .O(tixVState1));
  (* SOFT_HLUTNM = "soft_lutpair2322" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \stateOp[1]_i_2__11 
       (.I0(reqInvHshktrackClearMask),
        .I1(reqInvHshktrackSet),
        .I2(reqInvHshktrackSelect),
        .I3(reqInvHshktrackSetMask),
        .O(ackInvSetMask_sig_i_2__0_0));
  (* SOFT_HLUTNM = "soft_lutpair2323" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \stateOp[1]_i_2__12 
       (.I0(reqInvSelect),
        .I1(reqInvCputrackSet),
        .O(\tixVController_reg[0]_0 ));
  LUT4 #(
    .INIT(16'h0001)) 
    \stateOp[1]_i_2__2 
       (.I0(reqInvMemtrackClearMask),
        .I1(reqInvMemtrackSet),
        .I2(reqInvMemtrackSelect),
        .I3(reqInvMemtrackSetMask),
        .O(\tixVController_reg[2]_0 ));
  LUT6 #(
    .INIT(64'h0000200000000000)) 
    \stateOp[1]_i_2__3 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\ixRetbufCrc[5]_i_4_n_0 ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(stateOp_i_4__1_n_0),
        .I5(\tixVCommand_reg_n_0_[0] ),
        .O(reqInvTkclksrcSetTkst));
  LUT6 #(
    .INIT(64'h0000000055D55555)) 
    \stateOp[1]_i_2__4 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp[1]_i_6__1_n_0 ),
        .I2(\stateOp_reg[5]_0 [3]),
        .I3(\crcAXIS_tkeep_reg[1]_i_2_n_5 ),
        .I4(\stateOp_reg[1]_i_7_n_0 ),
        .I5(\stateOp[1]_i_8__1_n_0 ),
        .O(\stateOp[1]_i_2__4_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[1]_i_30 
       (.I0(txlast1[9]),
        .I1(\wordcntCrcLast_reg_n_0_[9] ),
        .I2(txlast1[8]),
        .I3(\wordcntCrcLast_reg_n_0_[8] ),
        .O(\stateOp[1]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[1]_i_31 
       (.I0(txlast1[7]),
        .I1(\wordcntCrcLast_reg_n_0_[7] ),
        .I2(txlast1[6]),
        .I3(\wordcntCrcLast_reg_n_0_[6] ),
        .O(\stateOp[1]_i_31_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[1]_i_32 
       (.I0(txlast1[5]),
        .I1(\wordcntCrcLast_reg_n_0_[5] ),
        .I2(txlast1[4]),
        .I3(\wordcntCrcLast_reg_n_0_[4] ),
        .O(\stateOp[1]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[1]_i_33 
       (.I0(txlast1[3]),
        .I1(\wordcntCrcLast_reg_n_0_[3] ),
        .I2(txlast1[2]),
        .I3(\wordcntCrcLast_reg_n_0_[2] ),
        .O(\stateOp[1]_i_33_n_0 ));
  LUT4 #(
    .INIT(16'h222B)) 
    \stateOp[1]_i_34 
       (.I0(txlast1[1]),
        .I1(\wordcntCrcLast_reg_n_0_[1] ),
        .I2(\opbuf_reg[0]51_in [6]),
        .I3(\wordcntCrcLast_reg_n_0_[0] ),
        .O(\stateOp[1]_i_34_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[1]_i_35 
       (.I0(\wordcntCrcLast_reg_n_0_[15] ),
        .I1(txlast1[15]),
        .I2(\wordcntCrcLast_reg_n_0_[14] ),
        .I3(txlast1[14]),
        .O(\stateOp[1]_i_35_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[1]_i_36 
       (.I0(\wordcntCrcLast_reg_n_0_[13] ),
        .I1(txlast1[13]),
        .I2(\wordcntCrcLast_reg_n_0_[12] ),
        .I3(txlast1[12]),
        .O(\stateOp[1]_i_36_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[1]_i_37 
       (.I0(\wordcntCrcLast_reg_n_0_[11] ),
        .I1(txlast1[11]),
        .I2(\wordcntCrcLast_reg_n_0_[10] ),
        .I3(txlast1[10]),
        .O(\stateOp[1]_i_37_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[1]_i_38 
       (.I0(\wordcntCrcLast_reg_n_0_[9] ),
        .I1(txlast1[9]),
        .I2(\wordcntCrcLast_reg_n_0_[8] ),
        .I3(txlast1[8]),
        .O(\stateOp[1]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[1]_i_39 
       (.I0(\wordcntCrcLast_reg_n_0_[7] ),
        .I1(txlast1[7]),
        .I2(\wordcntCrcLast_reg_n_0_[6] ),
        .I3(txlast1[6]),
        .O(\stateOp[1]_i_39_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2381" *) 
  LUT2 #(
    .INIT(4'h9)) 
    \stateOp[1]_i_3__4 
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_reg[5]_0 [1]),
        .O(\stateOp[1]_i_3__4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000400000000)) 
    \stateOp[1]_i_3__5 
       (.I0(reqInvRotaryConfig),
        .I1(step1__6),
        .I2(reqInvRotaryMoveto),
        .I3(reqInvRotarySet),
        .I4(reqInvRotaryZero),
        .I5(\stateOp_reg[0]_8 ),
        .O(\stateOp_reg[1]_1 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[1]_i_40 
       (.I0(\wordcntCrcLast_reg_n_0_[5] ),
        .I1(txlast1[5]),
        .I2(\wordcntCrcLast_reg_n_0_[4] ),
        .I3(txlast1[4]),
        .O(\stateOp[1]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[1]_i_41 
       (.I0(\wordcntCrcLast_reg_n_0_[3] ),
        .I1(txlast1[3]),
        .I2(\wordcntCrcLast_reg_n_0_[2] ),
        .I3(txlast1[2]),
        .O(\stateOp[1]_i_41_n_0 ));
  LUT4 #(
    .INIT(16'h6006)) 
    \stateOp[1]_i_42 
       (.I0(\wordcntCrcLast_reg_n_0_[0] ),
        .I1(\opbuf_reg[0]51_in [6]),
        .I2(\wordcntCrcLast_reg_n_0_[1] ),
        .I3(txlast1[1]),
        .O(\stateOp[1]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'hDDDDFFFFFFFF55D5)) 
    \stateOp[1]_i_5__1 
       (.I0(\stateOp[1]_i_10__1_n_0 ),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\crcAXIS_tkeep_reg[1]_i_2_n_5 ),
        .I3(\stateOp_reg[2]_i_6__0_n_5 ),
        .I4(\stateOp_reg[5]_0 [0]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\stateOp[1]_i_5__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2414" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \stateOp[1]_i_6__1 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [2]),
        .O(\stateOp[1]_i_6__1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000FFBAFF)) 
    \stateOp[1]_i_8__1 
       (.I0(\stateOp_next_reg_n_0_[1] ),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [0]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\stateOp[1]_i_8__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2413" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp[1]_i_9__0 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [4]),
        .O(\stateOp[1]_i_9__0_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp[2]_i_10__1 
       (.I0(\stateOp_reg[2]_i_21_n_3 ),
        .I1(\wordcnt_reg_n_0_[30] ),
        .O(\stateOp[2]_i_10__1_n_0 ));
  LUT6 #(
    .INIT(64'h0990000000000990)) 
    \stateOp[2]_i_11__1 
       (.I0(\wordcnt_reg_n_0_[27] ),
        .I1(crcAXIS_tlast_sig2[27]),
        .I2(\wordcnt_reg_n_0_[29] ),
        .I3(\stateOp_reg[2]_i_21_n_3 ),
        .I4(crcAXIS_tlast_sig2[28]),
        .I5(\wordcnt_reg_n_0_[28] ),
        .O(\stateOp[2]_i_11__1_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stateOp[2]_i_12__0 
       (.I0(\wordcnt_reg_n_0_[25] ),
        .I1(crcAXIS_tlast_sig2[25]),
        .I2(\opbuf_reg[0]51_in [30]),
        .I3(crcAXIS_tlast_sig2[24]),
        .I4(crcAXIS_tlast_sig2[26]),
        .I5(\wordcnt_reg_n_0_[26] ),
        .O(\stateOp[2]_i_12__0_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stateOp[2]_i_13__1 
       (.I0(crcAXIS_tlast_sig2[22]),
        .I1(\opbuf_reg[0]51_in [28]),
        .I2(\opbuf_reg[0]51_in [29]),
        .I3(crcAXIS_tlast_sig2[23]),
        .I4(\opbuf_reg[0]51_in [27]),
        .I5(crcAXIS_tlast_sig2[21]),
        .O(\stateOp[2]_i_13__1_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stateOp[2]_i_14__0 
       (.I0(crcAXIS_tlast_sig2[20]),
        .I1(\opbuf_reg[0]51_in [26]),
        .I2(\opbuf_reg[0]51_in [24]),
        .I3(crcAXIS_tlast_sig2[18]),
        .I4(\opbuf_reg[0]51_in [25]),
        .I5(crcAXIS_tlast_sig2[19]),
        .O(\stateOp[2]_i_14__0_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stateOp[2]_i_15__1 
       (.I0(crcAXIS_tlast_sig2[17]),
        .I1(\opbuf_reg[0]51_in [23]),
        .I2(\opbuf_reg[0]51_in [21]),
        .I3(crcAXIS_tlast_sig2[15]),
        .I4(\opbuf_reg[0]51_in [22]),
        .I5(crcAXIS_tlast_sig2[16]),
        .O(\stateOp[2]_i_15__1_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stateOp[2]_i_16__1 
       (.I0(crcAXIS_tlast_sig2[14]),
        .I1(\opbuf_reg[0]51_in [20]),
        .I2(\opbuf_reg[0]51_in [18]),
        .I3(crcAXIS_tlast_sig2[12]),
        .I4(\opbuf_reg[0]51_in [19]),
        .I5(crcAXIS_tlast_sig2[13]),
        .O(\stateOp[2]_i_16__1_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stateOp[2]_i_17__1 
       (.I0(crcAXIS_tlast_sig2[11]),
        .I1(\opbuf_reg[0]51_in [17]),
        .I2(\opbuf_reg[0]51_in [15]),
        .I3(crcAXIS_tlast_sig2[9]),
        .I4(\opbuf_reg[0]51_in [16]),
        .I5(crcAXIS_tlast_sig2[10]),
        .O(\stateOp[2]_i_17__1_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stateOp[2]_i_18__1 
       (.I0(crcAXIS_tlast_sig2[8]),
        .I1(\opbuf_reg[0]51_in [14]),
        .I2(\opbuf_reg[0]51_in [12]),
        .I3(crcAXIS_tlast_sig2[6]),
        .I4(\opbuf_reg[0]51_in [13]),
        .I5(crcAXIS_tlast_sig2[7]),
        .O(\stateOp[2]_i_18__1_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stateOp[2]_i_19__1 
       (.I0(crcAXIS_tlast_sig2[5]),
        .I1(\opbuf_reg[0]51_in [11]),
        .I2(\opbuf_reg[0]51_in [10]),
        .I3(crcAXIS_tlast_sig2[4]),
        .I4(\opbuf_reg[0]51_in [9]),
        .I5(crcAXIS_tlast_sig2[3]),
        .O(\stateOp[2]_i_19__1_n_0 ));
  LUT6 #(
    .INIT(64'h6006000000006006)) 
    \stateOp[2]_i_20__1 
       (.I0(wordcntLast[0]),
        .I1(\opbuf_reg[0]51_in [6]),
        .I2(\opbuf_reg[0]51_in [7]),
        .I3(crcAXIS_tlast_sig2[1]),
        .I4(\opbuf_reg[0]51_in [8]),
        .I5(crcAXIS_tlast_sig2[2]),
        .O(\stateOp[2]_i_20__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_25__1 
       (.I0(wordcntLast[28]),
        .O(\stateOp[2]_i_25__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_26__1 
       (.I0(wordcntLast[27]),
        .O(\stateOp[2]_i_26__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_27__1 
       (.I0(wordcntLast[26]),
        .O(\stateOp[2]_i_27__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_28__1 
       (.I0(wordcntLast[25]),
        .O(\stateOp[2]_i_28__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_29__1 
       (.I0(wordcntLast[24]),
        .O(\stateOp[2]_i_29__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_30__1 
       (.I0(wordcntLast[23]),
        .O(\stateOp[2]_i_30__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_31__1 
       (.I0(wordcntLast[22]),
        .O(\stateOp[2]_i_31__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_32__1 
       (.I0(wordcntLast[21]),
        .O(\stateOp[2]_i_32__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_33__1 
       (.I0(wordcntLast[20]),
        .O(\stateOp[2]_i_33__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_34__1 
       (.I0(wordcntLast[19]),
        .O(\stateOp[2]_i_34__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_35__1 
       (.I0(wordcntLast[18]),
        .O(\stateOp[2]_i_35__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_36__1 
       (.I0(wordcntLast[17]),
        .O(\stateOp[2]_i_36__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_37__1 
       (.I0(wordcntLast[16]),
        .O(\stateOp[2]_i_37__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_38__1 
       (.I0(wordcntLast[15]),
        .O(\stateOp[2]_i_38__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_39__1 
       (.I0(wordcntLast[14]),
        .O(\stateOp[2]_i_39__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_40__1 
       (.I0(wordcntLast[13]),
        .O(\stateOp[2]_i_40__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_41__1 
       (.I0(wordcntLast[12]),
        .O(\stateOp[2]_i_41__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_42__1 
       (.I0(wordcntLast[11]),
        .O(\stateOp[2]_i_42__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_43__1 
       (.I0(wordcntLast[10]),
        .O(\stateOp[2]_i_43__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_44__1 
       (.I0(wordcntLast[9]),
        .O(\stateOp[2]_i_44__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_45__1 
       (.I0(wordcntLast[8]),
        .O(\stateOp[2]_i_45__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_46__1 
       (.I0(wordcntLast[7]),
        .O(\stateOp[2]_i_46__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_47__1 
       (.I0(wordcntLast[6]),
        .O(\stateOp[2]_i_47__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_48__1 
       (.I0(wordcntLast[5]),
        .O(\stateOp[2]_i_48__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_49__1 
       (.I0(wordcntLast[4]),
        .O(\stateOp[2]_i_49__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_50__1 
       (.I0(wordcntLast[3]),
        .O(\stateOp[2]_i_50__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_51__1 
       (.I0(wordcntLast[2]),
        .O(\stateOp[2]_i_51__1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[2]_i_52__1 
       (.I0(wordcntLast[1]),
        .O(\stateOp[2]_i_52__1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF010F0F0F)) 
    \stateOp[3]_i_5 
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_next_reg_n_0_[3] ),
        .I2(\stateOp_reg[5]_0 [3]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\stateOp[3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000F20000000000)) 
    \stateOp[4]_i_4 
       (.I0(\stateOp_next_reg_n_0_[4] ),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [3]),
        .I3(\stateOp_reg[5]_0 [1]),
        .I4(\stateOp_reg[5]_0 [4]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\stateOp[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0C0C0C000C00080C)) 
    \stateOp[4]_i_5 
       (.I0(crcAXIS_tlast_sig_reg_n_0),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(\stateOp_reg[5]_0 [3]),
        .I3(\stateOp_reg[5]_0 [0]),
        .I4(\stateOp_reg[5]_0 [2]),
        .I5(\stateOp_reg[5]_0 [1]),
        .O(\stateOp[4]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2375" *) 
  LUT3 #(
    .INIT(8'hFB)) 
    \stateOp[5]_i_12 
       (.I0(\retbuf[0][7]_i_16_n_0 ),
        .I1(\stateOp[5]_i_23_n_0 ),
        .I2(\stateOp[5]_i_24_n_0 ),
        .O(\stateOp[5]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h00F200FF000000FF)) 
    \stateOp[5]_i_13 
       (.I0(\stateOp[5]_i_25_n_0 ),
        .I1(\stateOp[5]_i_26_n_0 ),
        .I2(\stateOp[5]_i_27_n_0 ),
        .I3(\stateOp[5]_i_28_n_0 ),
        .I4(\stateOp[5]_i_29_n_0 ),
        .I5(\stateOp[5]_i_30_n_0 ),
        .O(\stateOp[5]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hEFEEE0E0AAAAAAAA)) 
    \stateOp[5]_i_14 
       (.I0(\stateOp[5]_i_31_n_0 ),
        .I1(\stateOp[5]_i_32_n_0 ),
        .I2(\resid[1]_i_10_n_0 ),
        .I3(ackInvCamifModReg),
        .I4(\stateOp[5]_i_33_n_0 ),
        .I5(\stateOp[5]_i_34_n_0 ),
        .O(\stateOp[5]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'h000000D8FFFF00D8)) 
    \stateOp[5]_i_15 
       (.I0(\wordcntLast[0]_i_5_n_0 ),
        .I1(ackInvCornerConfig),
        .I2(\stateOp[5]_i_35_n_0 ),
        .I3(\stateOp[5]_i_23_n_0 ),
        .I4(\stateOp[5]_i_24_n_0 ),
        .I5(\stateOp[5]_i_36_n_0 ),
        .O(\stateOp[5]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h1112002000921084)) 
    \stateOp[5]_i_16 
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_reg[5]_0 [5]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\stateOp[5]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'hFBFF9FBBFFFFD77F)) 
    \stateOp[5]_i_17 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [3]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\stateOp_reg[5]_0 [5]),
        .I5(\stateOp_reg[5]_0 [1]),
        .O(\stateOp[5]_i_17_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2378" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp[5]_i_19 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [3]),
        .O(\stateOp[5]_i_19_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2279" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \stateOp[5]_i_20 
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [4]),
        .O(\stateOp[5]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2371" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    \stateOp[5]_i_21 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [2]),
        .I2(\stateOp_reg[5]_0 [0]),
        .O(\stateOp[5]_i_21_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2410" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \stateOp[5]_i_22 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [4]),
        .O(\stateOp[5]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h0500CFCC0504CFCC)) 
    \stateOp[5]_i_23 
       (.I0(\i2cRegaddr[15]_i_11_n_0 ),
        .I1(ackInvConfig_sig_i_7_n_0),
        .I2(\tixVCommand_reg[0]_0 ),
        .I3(\ixRetbufCrc[5]_i_4_n_0 ),
        .I4(ackInvSet_sig_i_9_n_0),
        .I5(\tixVCommand_reg_n_0_[0] ),
        .O(\stateOp[5]_i_23_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2372" *) 
  LUT3 #(
    .INIT(8'hF8)) 
    \stateOp[5]_i_24 
       (.I0(stateOp_i_3__1_n_0),
        .I1(ackInvSet_sig_i_9_n_0),
        .I2(\resid[1]_i_11_n_0 ),
        .O(\stateOp[5]_i_24_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFF100)) 
    \stateOp[5]_i_25 
       (.I0(\stateOp[5]_i_37_n_0 ),
        .I1(\stateOp[5]_i_38_n_0 ),
        .I2(\stateOp[5]_i_39_n_0 ),
        .I3(\stateOp[5]_i_40_n_0 ),
        .I4(\stateOp[5]_i_41_n_0 ),
        .I5(\stateOp[5]_i_42_n_0 ),
        .O(\stateOp[5]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hFFABABABABABABAB)) 
    \stateOp[5]_i_26 
       (.I0(\stateOp[5]_i_43_n_0 ),
        .I1(\stateOp[5]_i_44_n_0 ),
        .I2(\stateOp[5]_i_45_n_0 ),
        .I3(ackInvHshktrackSelect),
        .I4(targetNotSteady_i_3_n_0),
        .I5(\staTixVTrigger[7]_i_5_n_0 ),
        .O(\stateOp[5]_i_26_n_0 ));
  LUT6 #(
    .INIT(64'h8A888A888A888AAA)) 
    \stateOp[5]_i_27 
       (.I0(\stateOp[5]_i_46_n_0 ),
        .I1(\stateOp[5]_i_47_n_0 ),
        .I2(ackInvTraceAcquire),
        .I3(\stateOp[5]_i_48_n_0 ),
        .I4(\stateOp[5]_i_49_n_0 ),
        .I5(\stateOp[5]_i_50_n_0 ),
        .O(\stateOp[5]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF45454540)) 
    \stateOp[5]_i_28 
       (.I0(\stateOp[5]_i_51_n_0 ),
        .I1(\stateOp[5]_i_52_n_0 ),
        .I2(\stateOp[5]_i_53_n_0 ),
        .I3(\stateOp[5]_i_54_n_0 ),
        .I4(\stateOp[5]_i_55_n_0 ),
        .I5(\stateOp[5]_i_56_n_0 ),
        .O(\stateOp[5]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \stateOp[5]_i_29 
       (.I0(\stateOp[5]_i_57_n_0 ),
        .I1(\stateOp[5]_i_58_n_0 ),
        .I2(\stateOp[5]_i_59_n_0 ),
        .I3(\stateOp[5]_i_60_n_0 ),
        .I4(i__i_3_n_0),
        .I5(\resid[1]_i_13_n_0 ),
        .O(\stateOp[5]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h00000000AAAAAA02)) 
    \stateOp[5]_i_3 
       (.I0(stateOp_i_2__0_n_0),
        .I1(\stateOp[5]_i_12_n_0 ),
        .I2(\stateOp[5]_i_13_n_0 ),
        .I3(\stateOp[5]_i_14_n_0 ),
        .I4(\stateOp[5]_i_15_n_0 ),
        .I5(reqReset_sig_i_2_n_0),
        .O(\stateOp[5]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[5]_i_30 
       (.I0(\stateOp[5]_i_45_n_0 ),
        .I1(\stateOp[5]_i_44_n_0 ),
        .I2(\stateOp[5]_i_61_n_0 ),
        .I3(\stateOp[5]_i_62_n_0 ),
        .I4(\stateOp[5]_i_47_n_0 ),
        .O(\stateOp[5]_i_30_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2287" *) 
  LUT5 #(
    .INIT(32'h000E0002)) 
    \stateOp[5]_i_31 
       (.I0(ackInvCamifConfig),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(ackInvConfigSynth_sig_i_5_n_0),
        .I3(\ixRetbufCrc[5]_i_4_n_0 ),
        .I4(ackInvCamifConfigSynth),
        .O(\stateOp[5]_i_31_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2286" *) 
  LUT5 #(
    .INIT(32'h0000B888)) 
    \stateOp[5]_i_32 
       (.I0(ackInvCamifSetReg),
        .I1(targetNotSteady_i_3_n_0),
        .I2(ackInvCamifGetReg),
        .I3(\tixVCommand_reg[0]_0 ),
        .I4(ackInvConfigSynth_sig_i_5_n_0),
        .O(\stateOp[5]_i_32_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2285" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp[5]_i_33 
       (.I0(\i2cRegaddr[15]_i_11_n_0 ),
        .I1(ackInvConfigSynth_sig_i_5_n_0),
        .O(\stateOp[5]_i_33_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2374" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \stateOp[5]_i_34 
       (.I0(\ixRetbufCrc[5]_i_4_n_0 ),
        .I1(ackInvConfigSynth_sig_i_5_n_0),
        .O(\stateOp[5]_i_34_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFE4EE0000E4EE)) 
    \stateOp[5]_i_35 
       (.I0(ackInvUnlock_sig_i_3_n_0),
        .I1(ackInvCornerUnlock),
        .I2(\stateOp[5]_i_63_n_0 ),
        .I3(\stateOp[5]_i_64_n_0 ),
        .I4(\stateOp[5]_i_65_n_0 ),
        .I5(ackInvCornerSet),
        .O(\stateOp[5]_i_35_n_0 ));
  LUT6 #(
    .INIT(64'h0000F3FF53555355)) 
    \stateOp[5]_i_36 
       (.I0(ackInvCornerAcquire),
        .I1(ackInvCamifGetCorereg),
        .I2(ackInvConfigSynth_sig_i_5_n_0),
        .I3(\stateCorecfg[2]_i_6_n_0 ),
        .I4(ackInvCamifSetCorereg),
        .I5(\stateCorecfg[2]_i_7_n_0 ),
        .O(\stateOp[5]_i_36_n_0 ));
  LUT4 #(
    .INIT(16'h0E0A)) 
    \stateOp[5]_i_37 
       (.I0(\tixVCommand_reg[0]_0 ),
        .I1(\i2cRegaddr[15]_i_11_n_0 ),
        .I2(\resid[2]_i_28_n_0 ),
        .I3(ackInvMemtrackSetMask),
        .O(\stateOp[5]_i_37_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFFBF0FB)) 
    \stateOp[5]_i_38 
       (.I0(ackInvVidtrackSet),
        .I1(targetNotSteady_i_3_n_0),
        .I2(\resid[2]_i_27_n_0 ),
        .I3(\staTixVTrigger[7]_i_4__1_n_0 ),
        .I4(ackInvVidtrackSelect),
        .I5(\stateOp[5]_i_66_n_0 ),
        .O(\stateOp[5]_i_38_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2331" *) 
  LUT4 #(
    .INIT(16'h00BA)) 
    \stateOp[5]_i_39 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(ackInvMemtrackSet),
        .I2(\tixVCommand_reg[0]_0 ),
        .I3(\resid[2]_i_28_n_0 ),
        .O(\stateOp[5]_i_39_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2332" *) 
  LUT4 #(
    .INIT(16'hF0F7)) 
    \stateOp[5]_i_40 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(ackInvMemtrackSelect),
        .I2(\resid[2]_i_28_n_0 ),
        .I3(stateOp_i_3__1_n_0),
        .O(\stateOp[5]_i_40_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2330" *) 
  LUT4 #(
    .INIT(16'hFE00)) 
    \stateOp[5]_i_41 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(\tixVCommand_reg[0]_0 ),
        .I2(\i2cRegaddr[15]_i_11_n_0 ),
        .I3(\staTixVTrigger[7]_i_5_n_0 ),
        .O(\stateOp[5]_i_41_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000400000)) 
    \stateOp[5]_i_42 
       (.I0(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(stateOp_i_3__1_n_0),
        .I5(ackInvMemtrackClearMask),
        .O(\stateOp[5]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'h0000E0200000C000)) 
    \stateOp[5]_i_43 
       (.I0(\i2cRegaddr[15]_i_11_n_0 ),
        .I1(\tixVCommand_reg[0]_0 ),
        .I2(\staTixVTrigger[7]_i_5_n_0 ),
        .I3(ackInvHshktrackSet),
        .I4(targetNotSteady_i_3_n_0),
        .I5(ackInvHshktrackSetMask),
        .O(\stateOp[5]_i_43_n_0 ));
  LUT6 #(
    .INIT(64'h4F444F4F4F444F44)) 
    \stateOp[5]_i_44 
       (.I0(\resid[2]_i_28_n_0 ),
        .I1(\i2cRegaddr[15]_i_11_n_0 ),
        .I2(\resid[2]_i_27_n_0 ),
        .I3(targetNotSteady_i_3_n_0),
        .I4(\ixRetbufCrc[5]_i_4_n_0 ),
        .I5(\tixVCommand_reg_n_0_[0] ),
        .O(\stateOp[5]_i_44_n_0 ));
  LUT6 #(
    .INIT(64'hAAFFA8FFAAFFA8F8)) 
    \stateOp[5]_i_45 
       (.I0(\staTixVTrigger[7]_i_5_n_0 ),
        .I1(\i2cRegaddr[15]_i_11_n_0 ),
        .I2(targetNotSteady_i_3_n_0),
        .I3(\resid[2]_i_28_n_0 ),
        .I4(\tixVCommand_reg[0]_0 ),
        .I5(stateOp_i_3__1_n_0),
        .O(\stateOp[5]_i_45_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F55770F0FFF33)) 
    \stateOp[5]_i_46 
       (.I0(ackInvTkclksrcSetTkst),
        .I1(ackInvStepmuxSet),
        .I2(ackInvRotaryZero),
        .I3(\resid[1]_i_6_n_0 ),
        .I4(\stateOp[5]_i_68_n_0 ),
        .I5(\resid[2]_i_10_n_0 ),
        .O(\stateOp[5]_i_46_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000C32222)) 
    \stateOp[5]_i_47 
       (.I0(\i2cRegaddr[15]_i_11_n_0 ),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(\ixRetbufCrc[5]_i_4_n_0 ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(stateOp_i_4__1_n_0),
        .O(\stateOp[5]_i_47_n_0 ));
  LUT6 #(
    .INIT(64'h0010000000000000)) 
    \stateOp[5]_i_48 
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\tixVController_reg_n_0_[3] ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\retbuf[0][0]_i_3_n_0 ),
        .I4(\resid[2]_i_25_n_0 ),
        .I5(stateOp_i_3__1_n_0),
        .O(\stateOp[5]_i_48_n_0 ));
  LUT6 #(
    .INIT(64'h88D8000000000000)) 
    \stateOp[5]_i_49 
       (.I0(\stateOp[5]_i_69_n_0 ),
        .I1(ackInvCputrackSelect),
        .I2(\stateOp[5]_i_70_n_0 ),
        .I3(\stateOp[5]_i_71_n_0 ),
        .I4(\stateOp[5]_i_72_n_0 ),
        .I5(\stateOp[5]_i_73_n_0 ),
        .O(\stateOp[5]_i_49_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000200)) 
    \stateOp[5]_i_50 
       (.I0(ackInvTraceConfig),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\staTixVTrigger[7]_i_4__1_n_0 ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\staTixVTrigger[7]_i_3__1_n_0 ),
        .O(\stateOp[5]_i_50_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2373" *) 
  LUT3 #(
    .INIT(8'hF4)) 
    \stateOp[5]_i_51 
       (.I0(ackInvConfig_sig_i_7_n_0),
        .I1(\i2cRegaddr[15]_i_11_n_0 ),
        .I2(i__i_3_n_0),
        .O(\stateOp[5]_i_51_n_0 ));
  LUT6 #(
    .INIT(64'h22E222E2FFE200E2)) 
    \stateOp[5]_i_52 
       (.I0(ackInvLaserSet),
        .I1(\stateOp[5]_i_58_n_0 ),
        .I2(ackInvHdrengSet),
        .I3(stateOp_i_3__1_n_0),
        .I4(ackInvHdrengAssign),
        .I5(\resid[2]_i_30_n_0 ),
        .O(\stateOp[5]_i_52_n_0 ));
  LUT6 #(
    .INIT(64'h0101010100000100)) 
    \stateOp[5]_i_53 
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(stateOp_i_5__0_n_0),
        .I3(targetNotSteady_i_3_n_0),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(stateOp_i_3__1_n_0),
        .O(\stateOp[5]_i_53_n_0 ));
  LUT5 #(
    .INIT(32'h00CA00C0)) 
    \stateOp[5]_i_54 
       (.I0(\tixVCommand_reg[0]_0 ),
        .I1(ackInvRotaryMoveto),
        .I2(targetNotSteady_i_3_n_0),
        .I3(targetNotSteady_i_4_n_0),
        .I4(ackInvRotarySet),
        .O(\stateOp[5]_i_54_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2372" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \stateOp[5]_i_55 
       (.I0(ackInvRotaryConfig),
        .I1(stateOp_i_3__1_n_0),
        .I2(targetNotSteady_i_4_n_0),
        .O(\stateOp[5]_i_55_n_0 ));
  LUT6 #(
    .INIT(64'hF8FF8888F8888888)) 
    \stateOp[5]_i_56 
       (.I0(\stateOp[5]_i_60_n_0 ),
        .I1(ackInvDecimUnlock),
        .I2(ackInvDirectorSet),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .I4(i__i_3_n_0),
        .I5(ackInvDirectorConfig),
        .O(\stateOp[5]_i_56_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000010000)) 
    \stateOp[5]_i_57 
       (.I0(stateOp_i_5__1_n_0),
        .I1(\ixRetbufCrc[4]_i_5_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(stateOp_i_5__0_n_0),
        .I4(\stateOp[5]_i_75_n_0 ),
        .I5(\tixVController_reg_n_0_[0] ),
        .O(\stateOp[5]_i_57_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \stateOp[5]_i_58 
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(stateOp_i_5__0_n_0),
        .I3(stateOp_i_5__1_n_0),
        .I4(\stateOp[5]_i_76_n_0 ),
        .I5(\tixVController_reg_n_0_[0] ),
        .O(\stateOp[5]_i_58_n_0 ));
  LUT6 #(
    .INIT(64'h0000000200000000)) 
    \stateOp[5]_i_59 
       (.I0(\stateOp[5]_i_75_n_0 ),
        .I1(stateOp_i_5__0_n_0),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(\ixRetbufCrc[4]_i_5_n_0 ),
        .I4(stateOp_i_5__1_n_0),
        .I5(\tixVController_reg_n_0_[0] ),
        .O(\stateOp[5]_i_59_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \stateOp[5]_i_60 
       (.I0(\stateCorecfg[2]_i_8_n_0 ),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(\resid[1]_i_18_n_0 ),
        .I3(\tixVCommand_reg_n_0_[1] ),
        .I4(\resid[1]_i_19_n_0 ),
        .I5(\retbuf[0][0]_i_3_n_0 ),
        .O(\stateOp[5]_i_60_n_0 ));
  LUT6 #(
    .INIT(64'h000000C000000080)) 
    \stateOp[5]_i_61 
       (.I0(\staTixVTrigger[7]_i_4__1_n_0 ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(targetNotSteady_i_3_n_0),
        .O(\stateOp[5]_i_61_n_0 ));
  LUT6 #(
    .INIT(64'h00080008000C00CC)) 
    \stateOp[5]_i_62 
       (.I0(\tixVCommand_reg[0]_0 ),
        .I1(\resid[2]_i_25_n_0 ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .I5(\ixRetbufCrc[5]_i_4_n_0 ),
        .O(\stateOp[5]_i_62_n_0 ));
  LUT6 #(
    .INIT(64'hFFCFFF8AFFCFFF00)) 
    \stateOp[5]_i_63 
       (.I0(ackInvDecimConfig),
        .I1(ackInvDecimSet),
        .I2(\tixVCommand_reg[0]_0 ),
        .I3(ackInvConfig_sig_i_7_n_0),
        .I4(\ixRetbufCrc[5]_i_4_n_0 ),
        .I5(\tixVCommand_reg_n_0_[0] ),
        .O(\stateOp[5]_i_63_n_0 ));
  LUT3 #(
    .INIT(8'hDF)) 
    \stateOp[5]_i_64 
       (.I0(ackInvDecimAcquire),
        .I1(ackInvConfig_sig_i_7_n_0),
        .I2(stateOp_i_3__1_n_0),
        .O(\stateOp[5]_i_64_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000010000)) 
    \stateOp[5]_i_65 
       (.I0(\ixRetbufCrc[4]_i_4_n_0 ),
        .I1(\ixRetbufCrc[4]_i_3_n_0 ),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\resid[2]_i_24_n_0 ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .I5(stateOp_i_5__1_n_0),
        .O(\stateOp[5]_i_65_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \stateOp[5]_i_66 
       (.I0(\stateCorecfg[2]_i_8_n_0 ),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(\ixRetbufCrc[4]_i_5_n_0 ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\stateOp[5]_i_77_n_0 ),
        .I5(\staTixVTrigger[7]_i_3__1_n_0 ),
        .O(\stateOp[5]_i_66_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \stateOp[5]_i_68 
       (.I0(\stateCorecfg[2]_i_8_n_0 ),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(\ixRetbufCrc[4]_i_5_n_0 ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(stateOp_i_4__1_n_0),
        .O(\stateOp[5]_i_68_n_0 ));
  LUT6 #(
    .INIT(64'h0010000000000000)) 
    \stateOp[5]_i_69 
       (.I0(stateOp_i_5__1_n_0),
        .I1(\ixRetbufCrc[4]_i_5_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(\resid[2]_i_31_n_0 ),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(\tixVController_reg_n_0_[0] ),
        .O(\stateOp[5]_i_69_n_0 ));
  LUT6 #(
    .INIT(64'h02060A0804041000)) 
    \stateOp[5]_i_7 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(\stateOp_reg[5]_0 [5]),
        .I3(\stateOp_reg[5]_0 [1]),
        .I4(\stateOp_reg[5]_0 [2]),
        .I5(\stateOp_reg[5]_0 [0]),
        .O(\stateOp[5]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFB)) 
    \stateOp[5]_i_70 
       (.I0(ackInvHshktrackClearMask),
        .I1(\resid[2]_i_25_n_0 ),
        .I2(\resid[1]_i_21_n_0 ),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .I4(\ixRetbufCrc[4]_i_5_n_0 ),
        .I5(stateOp_i_5__1_n_0),
        .O(\stateOp[5]_i_70_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    \stateOp[5]_i_71 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\resid[2]_i_31_n_0 ),
        .I3(stateOp_i_5__1_n_0),
        .I4(\stateOp[5]_i_76_n_0 ),
        .I5(ackInvCputrackSet),
        .O(\stateOp[5]_i_71_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFDFFFFFFFFF)) 
    \stateOp[5]_i_72 
       (.I0(\tixVCommand_reg_n_0_[1] ),
        .I1(\resid[1]_i_18_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(stateOp_i_5__1_n_0),
        .I4(\resid[2]_i_31_n_0 ),
        .I5(\resid[2]_i_25_n_0 ),
        .O(\stateOp[5]_i_72_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFB)) 
    \stateOp[5]_i_73 
       (.I0(\resid[2]_i_31_n_0 ),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(\ixRetbufCrc[4]_i_5_n_0 ),
        .I3(stateOp_i_5__1_n_0),
        .I4(\tixVController_reg_n_0_[1] ),
        .I5(\tixVController_reg_n_0_[0] ),
        .O(\stateOp[5]_i_73_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2411" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \stateOp[5]_i_75 
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .O(\stateOp[5]_i_75_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2335" *) 
  LUT4 #(
    .INIT(16'hFFFB)) 
    \stateOp[5]_i_76 
       (.I0(\tixVCommand_reg_n_0_[0] ),
        .I1(\tixVCommand_reg_n_0_[1] ),
        .I2(\tixVCommand_reg_n_0_[5] ),
        .I3(\tixVCommand_reg_n_0_[4] ),
        .O(\stateOp[5]_i_76_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2296" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \stateOp[5]_i_77 
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .O(\stateOp[5]_i_77_n_0 ));
  LUT6 #(
    .INIT(64'h01011101FFFFF7FE)) 
    \stateOp[5]_i_8 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [0]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [5]),
        .O(\stateOp[5]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2353" *) 
  LUT3 #(
    .INIT(8'h54)) 
    stateOp_i_1
       (.I0(stateOp_reg_5),
        .I1(reqInvConfigSynth),
        .I2(reqInvConfig),
        .O(stateOp47_out));
  (* SOFT_HLUTNM = "soft_lutpair2276" *) 
  LUT5 #(
    .INIT(32'h00002000)) 
    stateOp_i_1__2
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(stateOp_i_3__1_n_0),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(stateOp_i_4__1_n_0),
        .O(reqInvStepmuxSet));
  LUT3 #(
    .INIT(8'h54)) 
    stateOp_i_1__5
       (.I0(rng_sig_reg),
        .I1(reqInvDirectorSet),
        .I2(reqInvDirectorConfig),
        .O(stateOp0_out));
  (* SOFT_HLUTNM = "soft_lutpair2349" *) 
  LUT3 #(
    .INIT(8'h54)) 
    stateOp_i_2
       (.I0(rng_reg_8),
        .I1(reqInvHdrengSet),
        .I2(reqInvAssign),
        .O(stateOp_reg));
  LUT6 #(
    .INIT(64'h0200000000000000)) 
    stateOp_i_2__0
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\stateOp_reg[5]_0 [0]),
        .I4(\stateOp_reg[5]_0 [2]),
        .I5(\stateOp_reg[5]_0 [1]),
        .O(stateOp_i_2__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2319" *) 
  LUT4 #(
    .INIT(16'h5554)) 
    stateOp_i_2__1
       (.I0(stateOp_reg_6),
        .I1(reqInvTraceUnlock),
        .I2(reqInvTraceConfig),
        .I3(reqInvTraceAcquire),
        .O(stateOp5_out));
  LUT6 #(
    .INIT(64'h0000000000000200)) 
    stateOp_i_3
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\staTixVTrigger[7]_i_4__1_n_0 ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\staTixVTrigger[7]_i_3__1_n_0 ),
        .O(reqInvTraceConfig));
  LUT6 #(
    .INIT(64'h0000000200000000)) 
    stateOp_i_3__0
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[2] ),
        .I4(stateOp_i_5__0_n_0),
        .I5(stateOp_i_3__1_n_0),
        .O(reqInvAssign));
  LUT5 #(
    .INIT(32'h00000001)) 
    stateOp_i_3__1
       (.I0(\tixVCommand_reg_n_0_[0] ),
        .I1(\tixVCommand_reg_n_0_[1] ),
        .I2(\tixVCommand_reg_n_0_[4] ),
        .I3(\tixVCommand_reg_n_0_[5] ),
        .I4(stateOp_i_5__1_n_0),
        .O(stateOp_i_3__1_n_0));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    stateOp_i_4
       (.I0(stateOp_i_2__0_n_0),
        .I1(stateOp_i_3__1_n_0),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(\tixVController_reg_n_0_[1] ),
        .I4(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I5(\tixVController_reg_n_0_[2] ),
        .O(reqInvTraceAcquire));
  LUT6 #(
    .INIT(64'h0000000000000020)) 
    stateOp_i_4__0
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(targetNotSteady_i_3_n_0),
        .I3(stateOp_i_5__0_n_0),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(reqInvHdrengSet));
  LUT6 #(
    .INIT(64'hFFFFFFFDFFFFFFFF)) 
    stateOp_i_4__1
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\tixVController_reg_n_0_[5] ),
        .I4(\tixVController_reg_n_0_[6] ),
        .I5(\tixVController_reg_n_0_[2] ),
        .O(stateOp_i_4__1_n_0));
  LUT6 #(
    .INIT(64'h0000000200000000)) 
    stateOp_i_5
       (.I0(stateOp_i_2__0_n_0),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\staTixVTrigger[7]_i_3__1_n_0 ),
        .I4(\tixVController_reg_n_0_[2] ),
        .I5(\tixVCommand_reg[0]_0 ),
        .O(reqInvTraceUnlock));
  (* SOFT_HLUTNM = "soft_lutpair2288" *) 
  LUT5 #(
    .INIT(32'hFFFEFFFF)) 
    stateOp_i_5__0
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[5] ),
        .I2(\tixVController_reg_n_0_[7] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .O(stateOp_i_5__0_n_0));
  LUT4 #(
    .INIT(16'hFFFE)) 
    stateOp_i_5__1
       (.I0(\tixVCommand_reg_n_0_[6] ),
        .I1(\tixVCommand_reg_n_0_[7] ),
        .I2(\tixVCommand_reg_n_0_[3] ),
        .I3(\tixVCommand_reg_n_0_[2] ),
        .O(stateOp_i_5__1_n_0));
  LUT6 #(
    .INIT(64'h0000000022202228)) 
    \stateOp_next[1]_i_2 
       (.I0(\stateOp_next[5]_i_11_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[3] ),
        .I2(\tixVBuffer_reg_n_0_[1] ),
        .I3(\tixVBuffer_reg_n_0_[2] ),
        .I4(\tixVBuffer_reg_n_0_[0] ),
        .I5(\pollbuf[0][7]_i_7_n_0 ),
        .O(\stateOp_next[1]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2345" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp_next[4]_i_11 
       (.I0(\stateOp_next[5]_i_19_n_0 ),
        .I1(\len_reg_n_0_[0] ),
        .I2(\len_reg_n_0_[1] ),
        .I3(\len_reg_n_0_[2] ),
        .O(\stateOp_next[4]_i_11_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \stateOp_next[4]_i_13 
       (.I0(\len_reg_n_0_[30] ),
        .I1(\len_reg_n_0_[31] ),
        .O(\stateOp_next[4]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp_next[4]_i_14 
       (.I0(\len_reg_n_0_[27] ),
        .I1(\len_reg_n_0_[28] ),
        .I2(\len_reg_n_0_[29] ),
        .O(\stateOp_next[4]_i_14_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp_next[4]_i_15 
       (.I0(\len_reg_n_0_[26] ),
        .I1(\len_reg_n_0_[24] ),
        .I2(\len_reg_n_0_[25] ),
        .O(\stateOp_next[4]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp_next[4]_i_16 
       (.I0(\len_reg_n_0_[21] ),
        .I1(\len_reg_n_0_[23] ),
        .I2(\len_reg_n_0_[22] ),
        .O(\stateOp_next[4]_i_16_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp_next[4]_i_17 
       (.I0(\len_reg_n_0_[19] ),
        .I1(\len_reg_n_0_[20] ),
        .I2(\len_reg_n_0_[18] ),
        .O(\stateOp_next[4]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h1001)) 
    \stateOp_next[4]_i_18 
       (.I0(\len_reg_n_0_[17] ),
        .I1(\len_reg_n_0_[16] ),
        .I2(\len_reg_n_0_[15] ),
        .I3(\pollbuf[2][7]_i_2_n_0 ),
        .O(\stateOp_next[4]_i_18_n_0 ));
  LUT4 #(
    .INIT(16'h0006)) 
    \stateOp_next[4]_i_19 
       (.I0(\pollbuf[2][4]_i_2_n_0 ),
        .I1(\len_reg_n_0_[12] ),
        .I2(\len_reg_n_0_[14] ),
        .I3(\len_reg_n_0_[13] ),
        .O(\stateOp_next[4]_i_19_n_0 ));
  LUT5 #(
    .INIT(32'h000000FE)) 
    \stateOp_next[4]_i_2 
       (.I0(\stateOp_next[4]_i_3_n_0 ),
        .I1(\stateOp_next[4]_i_4_n_0 ),
        .I2(\stateOp_next[4]_i_5_n_0 ),
        .I3(\stateOp_next[4]_i_6_n_0 ),
        .I4(\pollbuf[0][7]_i_3_n_0 ),
        .O(\stateOp_next[4]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h0006)) 
    \stateOp_next[4]_i_20 
       (.I0(\pollbuf[2][3]_i_2_n_0 ),
        .I1(\len_reg_n_0_[11] ),
        .I2(\len_reg_n_0_[10] ),
        .I3(\len_reg_n_0_[9] ),
        .O(\stateOp_next[4]_i_20_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp_next[4]_i_21 
       (.I0(\len_reg_n_0_[8] ),
        .I1(\len_reg_n_0_[7] ),
        .I2(\len_reg_n_0_[6] ),
        .O(\stateOp_next[4]_i_21_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp_next[4]_i_22 
       (.I0(\len_reg_n_0_[3] ),
        .I1(\len_reg_n_0_[5] ),
        .I2(\len_reg_n_0_[4] ),
        .O(\stateOp_next[4]_i_22_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp_next[4]_i_23 
       (.I0(\len_reg_n_0_[1] ),
        .I1(\len_reg_n_0_[0] ),
        .I2(\len_reg_n_0_[2] ),
        .O(\stateOp_next[4]_i_23_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp_next[4]_i_3 
       (.I0(\len_reg_n_0_[27] ),
        .I1(\len_reg_n_0_[20] ),
        .I2(\len_reg_n_0_[17] ),
        .I3(\len_reg_n_0_[31] ),
        .I4(\len_reg_n_0_[25] ),
        .I5(\len_reg_n_0_[28] ),
        .O(\stateOp_next[4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp_next[4]_i_4 
       (.I0(\stateOp_next[4]_i_7_n_0 ),
        .I1(\len_reg_n_0_[24] ),
        .I2(\len_reg_n_0_[23] ),
        .I3(\len_reg_n_0_[18] ),
        .I4(\len_reg_n_0_[16] ),
        .I5(\stateOp_next[4]_i_8_n_0 ),
        .O(\stateOp_next[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp_next[4]_i_5 
       (.I0(\stateOp_next[5]_i_9_n_0 ),
        .I1(\stateOp_next[4]_i_9_n_0 ),
        .I2(\len_reg_n_0_[14] ),
        .I3(\len_reg_n_0_[13] ),
        .I4(\len_reg_n_0_[15] ),
        .I5(\len_reg_n_0_[12] ),
        .O(\stateOp_next[4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFBF)) 
    \stateOp_next[4]_i_6 
       (.I0(tixVBufxfop[0]),
        .I1(tixVBufxfop[1]),
        .I2(stateOp_next3144_in),
        .I3(tixVBufxfop[2]),
        .I4(tixVBufxfop[3]),
        .I5(\stateOp_next[4]_i_11_n_0 ),
        .O(\stateOp_next[4]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp_next[4]_i_7 
       (.I0(\len_reg_n_0_[30] ),
        .I1(\len_reg_n_0_[29] ),
        .I2(\len_reg_n_0_[26] ),
        .I3(\len_reg_n_0_[21] ),
        .O(\stateOp_next[4]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp_next[4]_i_8 
       (.I0(\len_reg_n_0_[0] ),
        .I1(\len_reg_n_0_[1] ),
        .I2(\len_reg_n_0_[2] ),
        .I3(\len_reg_n_0_[19] ),
        .I4(\len_reg_n_0_[22] ),
        .I5(\len_reg_n_0_[3] ),
        .O(\stateOp_next[4]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp_next[4]_i_9 
       (.I0(\len_reg_n_0_[11] ),
        .I1(\len_reg_n_0_[8] ),
        .I2(\len_reg_n_0_[10] ),
        .I3(\len_reg_n_0_[9] ),
        .O(\stateOp_next[4]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2345" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \stateOp_next[5]_i_10 
       (.I0(\len_reg_n_0_[0] ),
        .I1(\len_reg_n_0_[1] ),
        .O(\stateOp_next[5]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'h00000010)) 
    \stateOp_next[5]_i_11 
       (.I0(\stateOp_next[5]_i_19_n_0 ),
        .I1(tixVBufxfop[1]),
        .I2(tixVBufxfop[0]),
        .I3(tixVBufxfop[2]),
        .I4(tixVBufxfop[3]),
        .O(\stateOp_next[5]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2373" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \stateOp_next[5]_i_12 
       (.I0(\crcAXIS_tkeep[7]_i_12_n_0 ),
        .I1(\i2cRegaddr[15]_i_11_n_0 ),
        .I2(\stateOp_next[5]_i_20_n_0 ),
        .O(\stateOp_next[5]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h200230022002F002)) 
    \stateOp_next[5]_i_13 
       (.I0(targetNotSteady_i_3_n_0),
        .I1(\resid[2]_i_31_n_0 ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\ixRetbufCrc[5]_i_4_n_0 ),
        .I5(stateOp_i_4__1_n_0),
        .O(\stateOp_next[5]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFDFFFFFF)) 
    \stateOp_next[5]_i_14 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\retbuf[0][0]_i_3_n_0 ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(stateOp_i_3__1_n_0),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(\stateOp_next[5]_i_14_n_0 ));
  LUT5 #(
    .INIT(32'hBFAABFBF)) 
    \stateOp_next[5]_i_15 
       (.I0(\ixRetbufCrc[4]_i_2_n_0 ),
        .I1(\resid[2]_i_30_n_0 ),
        .I2(\resid[2]_i_27_n_0 ),
        .I3(targetNotSteady_i_3_n_0),
        .I4(\ixRetbufCrc[5]_i_4_n_0 ),
        .O(\stateOp_next[5]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFBA)) 
    \stateOp_next[5]_i_16 
       (.I0(i__i_3_n_0),
        .I1(\ixRetbufCrc[5]_i_4_n_0 ),
        .I2(\ixRetbufCrc[5]_i_3_n_0 ),
        .I3(\resid[1]_i_11_n_0 ),
        .I4(\stateOp_next[5]_i_21_n_0 ),
        .I5(reqReset_sig_i_2_n_0),
        .O(\stateOp_next[5]_i_16_n_0 ));
  LUT5 #(
    .INIT(32'hFBFFFFFB)) 
    \stateOp_next[5]_i_17 
       (.I0(\stateOp_next[5]_i_22_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[0] ),
        .I2(\stateOp_next[4]_i_5_n_0 ),
        .I3(\len_reg_n_0_[3] ),
        .I4(\wordcntLast[0]_i_5_n_0 ),
        .O(\stateOp_next[5]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFEFFFF)) 
    \stateOp_next[5]_i_18 
       (.I0(\stateOp_next[5]_i_23_n_0 ),
        .I1(\stateOp[5]_i_65_n_0 ),
        .I2(\stateOp[5]_i_58_n_0 ),
        .I3(\stateOp[5]_i_57_n_0 ),
        .I4(\resid[1]_i_16_n_0 ),
        .I5(\resid[1]_i_15_n_0 ),
        .O(\stateOp_next[5]_i_18_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp_next[5]_i_19 
       (.I0(tixVBufxfop[6]),
        .I1(tixVBufxfop[4]),
        .I2(tixVBufxfop[7]),
        .I3(tixVBufxfop[5]),
        .O(\stateOp_next[5]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFAECFFFFFFF7)) 
    \stateOp_next[5]_i_20 
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\tixVController_reg_n_0_[3] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .I4(\retbuf[0][0]_i_3_n_0 ),
        .I5(\tixVController_reg_n_0_[2] ),
        .O(\stateOp_next[5]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'h0000040000000404)) 
    \stateOp_next[5]_i_21 
       (.I0(\resid[2]_i_31_n_0 ),
        .I1(\resid[2]_i_25_n_0 ),
        .I2(stateOp_i_5__1_n_0),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .I4(\resid[1]_i_18_n_0 ),
        .I5(\tixVCommand_reg_n_0_[1] ),
        .O(\stateOp_next[5]_i_21_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2328" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp_next[5]_i_22 
       (.I0(\tixVBuffer_reg_n_0_[3] ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\pollbuf[0][7]_i_7_n_0 ),
        .I3(\tixVBuffer_reg_n_0_[1] ),
        .O(\stateOp_next[5]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \stateOp_next[5]_i_23 
       (.I0(stateOp_i_5__1_n_0),
        .I1(\resid[1]_i_18_n_0 ),
        .I2(\tixVCommand_reg_n_0_[1] ),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .I4(\resid[1]_i_19_n_0 ),
        .I5(\retbuf[0][0]_i_3_n_0 ),
        .O(\stateOp_next[5]_i_23_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2350" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \stateOp_next[5]_i_3 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [4]),
        .O(\stateOp_next[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0009090000000000)) 
    \stateOp_next[5]_i_4 
       (.I0(\resid[2]_i_6_n_0 ),
        .I1(\len_reg_n_0_[2] ),
        .I2(\stateOp_next[5]_i_7_n_0 ),
        .I3(\resid[1]_i_3_n_0 ),
        .I4(\len_reg_n_0_[1] ),
        .I5(\stateOp_next[5]_i_8_n_0 ),
        .O(\stateOp_next[5]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2351" *) 
  LUT3 #(
    .INIT(8'hF7)) 
    \stateOp_next[5]_i_5 
       (.I0(\resid[1]_i_2_n_0 ),
        .I1(\resid[1]_i_3_n_0 ),
        .I2(\resid[2]_i_6_n_0 ),
        .O(\stateOp_next[5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000020000000000)) 
    \stateOp_next[5]_i_6 
       (.I0(\pollbuf[0][7]_i_4_n_0 ),
        .I1(\stateOp_next[5]_i_9_n_0 ),
        .I2(\len_reg_n_0_[3] ),
        .I3(\len_reg_n_0_[2] ),
        .I4(\stateOp_next[5]_i_10_n_0 ),
        .I5(\stateOp_next[5]_i_11_n_0 ),
        .O(\stateOp_next[5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00000010)) 
    \stateOp_next[5]_i_7 
       (.I0(\stateOp_next[5]_i_12_n_0 ),
        .I1(\stateOp_next[5]_i_13_n_0 ),
        .I2(\stateOp_next[5]_i_14_n_0 ),
        .I3(\stateOp_next[5]_i_15_n_0 ),
        .I4(\stateOp_next[5]_i_16_n_0 ),
        .I5(\stateOp_next[5]_i_17_n_0 ),
        .O(\stateOp_next[5]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAA9A)) 
    \stateOp_next[5]_i_8 
       (.I0(\len_reg_n_0_[0] ),
        .I1(\stateOp_next[5]_i_18_n_0 ),
        .I2(\resid[1]_i_6_n_0 ),
        .I3(\resid[2]_i_5_n_0 ),
        .I4(\resid[2]_i_9_n_0 ),
        .I5(\resid[1]_i_5_n_0 ),
        .O(\stateOp_next[5]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp_next[5]_i_9 
       (.I0(\len_reg_n_0_[5] ),
        .I1(\len_reg_n_0_[4] ),
        .I2(\len_reg_n_0_[7] ),
        .I3(\len_reg_n_0_[6] ),
        .O(\stateOp_next[5]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_next_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_485),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_146),
        .Q(\stateOp_next_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_next_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_485),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_145),
        .Q(\stateOp_next_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_next_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_485),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_144),
        .Q(\stateOp_next_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_next_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_485),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_143),
        .Q(\stateOp_next_reg_n_0_[4] ));
  CARRY8 \stateOp_next_reg[4]_i_10 
       (.CI(\stateOp_next_reg[4]_i_12_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_stateOp_next_reg[4]_i_10_CO_UNCONNECTED [7:3],stateOp_next3144_in,\stateOp_next_reg[4]_i_10_n_6 ,\stateOp_next_reg[4]_i_10_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_stateOp_next_reg[4]_i_10_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,\stateOp_next[4]_i_13_n_0 ,\stateOp_next[4]_i_14_n_0 ,\stateOp_next[4]_i_15_n_0 }));
  CARRY8 \stateOp_next_reg[4]_i_12 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\stateOp_next_reg[4]_i_12_n_0 ,\stateOp_next_reg[4]_i_12_n_1 ,\stateOp_next_reg[4]_i_12_n_2 ,\stateOp_next_reg[4]_i_12_n_3 ,\stateOp_next_reg[4]_i_12_n_4 ,\stateOp_next_reg[4]_i_12_n_5 ,\stateOp_next_reg[4]_i_12_n_6 ,\stateOp_next_reg[4]_i_12_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_stateOp_next_reg[4]_i_12_O_UNCONNECTED [7:0]),
        .S({\stateOp_next[4]_i_16_n_0 ,\stateOp_next[4]_i_17_n_0 ,\stateOp_next[4]_i_18_n_0 ,\stateOp_next[4]_i_19_n_0 ,\stateOp_next[4]_i_20_n_0 ,\stateOp_next[4]_i_21_n_0 ,\stateOp_next[4]_i_22_n_0 ,\stateOp_next[4]_i_23_n_0 }));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_next_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_485),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_142),
        .Q(\stateOp_next_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_181),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_187),
        .Q(\stateOp_reg[5]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_181),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_186),
        .Q(\stateOp_reg[5]_0 [1]));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \stateOp_reg[1]_i_11 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\stateOp_reg[1]_i_11_n_0 ,\stateOp_reg[1]_i_11_n_1 ,\stateOp_reg[1]_i_11_n_2 ,\stateOp_reg[1]_i_11_n_3 ,\stateOp_reg[1]_i_11_n_4 ,\stateOp_reg[1]_i_11_n_5 ,\stateOp_reg[1]_i_11_n_6 ,\stateOp_reg[1]_i_11_n_7 }),
        .DI({\stateOp[1]_i_27_n_0 ,\stateOp[1]_i_28_n_0 ,\stateOp[1]_i_29_n_0 ,\stateOp[1]_i_30_n_0 ,\stateOp[1]_i_31_n_0 ,\stateOp[1]_i_32_n_0 ,\stateOp[1]_i_33_n_0 ,\stateOp[1]_i_34_n_0 }),
        .O(\NLW_stateOp_reg[1]_i_11_O_UNCONNECTED [7:0]),
        .S({\stateOp[1]_i_35_n_0 ,\stateOp[1]_i_36_n_0 ,\stateOp[1]_i_37_n_0 ,\stateOp[1]_i_38_n_0 ,\stateOp[1]_i_39_n_0 ,\stateOp[1]_i_40_n_0 ,\stateOp[1]_i_41_n_0 ,\stateOp[1]_i_42_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \stateOp_reg[1]_i_7 
       (.CI(\stateOp_reg[1]_i_11_n_0 ),
        .CI_TOP(1'b0),
        .CO({\stateOp_reg[1]_i_7_n_0 ,\stateOp_reg[1]_i_7_n_1 ,\stateOp_reg[1]_i_7_n_2 ,\stateOp_reg[1]_i_7_n_3 ,\stateOp_reg[1]_i_7_n_4 ,\stateOp_reg[1]_i_7_n_5 ,\stateOp_reg[1]_i_7_n_6 ,\stateOp_reg[1]_i_7_n_7 }),
        .DI({txlast1[30],\stateOp[1]_i_12_n_0 ,\stateOp[1]_i_13_n_0 ,\stateOp[1]_i_14_n_0 ,\stateOp[1]_i_15_n_0 ,\stateOp[1]_i_16_n_0 ,\stateOp[1]_i_17_n_0 ,\stateOp[1]_i_18_n_0 }),
        .O(\NLW_stateOp_reg[1]_i_7_O_UNCONNECTED [7:0]),
        .S({\stateOp[1]_i_19_n_0 ,\stateOp[1]_i_20_n_0 ,\stateOp[1]_i_21_n_0 ,\stateOp[1]_i_22_n_0 ,\stateOp[1]_i_23_n_0 ,\stateOp[1]_i_24_n_0 ,\stateOp[1]_i_25_n_0 ,\stateOp[1]_i_26_n_0 }));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_181),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_185),
        .Q(\stateOp_reg[5]_0 [2]));
  CARRY8 \stateOp_reg[2]_i_21 
       (.CI(\stateOp_reg[2]_i_22_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_stateOp_reg[2]_i_21_CO_UNCONNECTED [7:5],\stateOp_reg[2]_i_21_n_3 ,\NLW_stateOp_reg[2]_i_21_CO_UNCONNECTED [3],\stateOp_reg[2]_i_21_n_5 ,\stateOp_reg[2]_i_21_n_6 ,\stateOp_reg[2]_i_21_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,wordcntLast[28:25]}),
        .O({\NLW_stateOp_reg[2]_i_21_O_UNCONNECTED [7:4],crcAXIS_tlast_sig2[28:25]}),
        .S({1'b0,1'b0,1'b0,1'b1,\stateOp[2]_i_25__1_n_0 ,\stateOp[2]_i_26__1_n_0 ,\stateOp[2]_i_27__1_n_0 ,\stateOp[2]_i_28__1_n_0 }));
  CARRY8 \stateOp_reg[2]_i_22 
       (.CI(\stateOp_reg[2]_i_23_n_0 ),
        .CI_TOP(1'b0),
        .CO({\stateOp_reg[2]_i_22_n_0 ,\stateOp_reg[2]_i_22_n_1 ,\stateOp_reg[2]_i_22_n_2 ,\stateOp_reg[2]_i_22_n_3 ,\stateOp_reg[2]_i_22_n_4 ,\stateOp_reg[2]_i_22_n_5 ,\stateOp_reg[2]_i_22_n_6 ,\stateOp_reg[2]_i_22_n_7 }),
        .DI(wordcntLast[24:17]),
        .O(crcAXIS_tlast_sig2[24:17]),
        .S({\stateOp[2]_i_29__1_n_0 ,\stateOp[2]_i_30__1_n_0 ,\stateOp[2]_i_31__1_n_0 ,\stateOp[2]_i_32__1_n_0 ,\stateOp[2]_i_33__1_n_0 ,\stateOp[2]_i_34__1_n_0 ,\stateOp[2]_i_35__1_n_0 ,\stateOp[2]_i_36__1_n_0 }));
  CARRY8 \stateOp_reg[2]_i_23 
       (.CI(\stateOp_reg[2]_i_24_n_0 ),
        .CI_TOP(1'b0),
        .CO({\stateOp_reg[2]_i_23_n_0 ,\stateOp_reg[2]_i_23_n_1 ,\stateOp_reg[2]_i_23_n_2 ,\stateOp_reg[2]_i_23_n_3 ,\stateOp_reg[2]_i_23_n_4 ,\stateOp_reg[2]_i_23_n_5 ,\stateOp_reg[2]_i_23_n_6 ,\stateOp_reg[2]_i_23_n_7 }),
        .DI(wordcntLast[16:9]),
        .O(crcAXIS_tlast_sig2[16:9]),
        .S({\stateOp[2]_i_37__1_n_0 ,\stateOp[2]_i_38__1_n_0 ,\stateOp[2]_i_39__1_n_0 ,\stateOp[2]_i_40__1_n_0 ,\stateOp[2]_i_41__1_n_0 ,\stateOp[2]_i_42__1_n_0 ,\stateOp[2]_i_43__1_n_0 ,\stateOp[2]_i_44__1_n_0 }));
  CARRY8 \stateOp_reg[2]_i_24 
       (.CI(wordcntLast[0]),
        .CI_TOP(1'b0),
        .CO({\stateOp_reg[2]_i_24_n_0 ,\stateOp_reg[2]_i_24_n_1 ,\stateOp_reg[2]_i_24_n_2 ,\stateOp_reg[2]_i_24_n_3 ,\stateOp_reg[2]_i_24_n_4 ,\stateOp_reg[2]_i_24_n_5 ,\stateOp_reg[2]_i_24_n_6 ,\stateOp_reg[2]_i_24_n_7 }),
        .DI(wordcntLast[8:1]),
        .O(crcAXIS_tlast_sig2[8:1]),
        .S({\stateOp[2]_i_45__1_n_0 ,\stateOp[2]_i_46__1_n_0 ,\stateOp[2]_i_47__1_n_0 ,\stateOp[2]_i_48__1_n_0 ,\stateOp[2]_i_49__1_n_0 ,\stateOp[2]_i_50__1_n_0 ,\stateOp[2]_i_51__1_n_0 ,\stateOp[2]_i_52__1_n_0 }));
  CARRY8 \stateOp_reg[2]_i_6__0 
       (.CI(\stateOp_reg[2]_i_9__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_stateOp_reg[2]_i_6__0_CO_UNCONNECTED [7:3],\stateOp_reg[2]_i_6__0_n_5 ,\stateOp_reg[2]_i_6__0_n_6 ,\stateOp_reg[2]_i_6__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_stateOp_reg[2]_i_6__0_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,\stateOp[2]_i_10__1_n_0 ,\stateOp[2]_i_11__1_n_0 ,\stateOp[2]_i_12__0_n_0 }));
  CARRY8 \stateOp_reg[2]_i_9__0 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\stateOp_reg[2]_i_9__0_n_0 ,\stateOp_reg[2]_i_9__0_n_1 ,\stateOp_reg[2]_i_9__0_n_2 ,\stateOp_reg[2]_i_9__0_n_3 ,\stateOp_reg[2]_i_9__0_n_4 ,\stateOp_reg[2]_i_9__0_n_5 ,\stateOp_reg[2]_i_9__0_n_6 ,\stateOp_reg[2]_i_9__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_stateOp_reg[2]_i_9__0_O_UNCONNECTED [7:0]),
        .S({\stateOp[2]_i_13__1_n_0 ,\stateOp[2]_i_14__0_n_0 ,\stateOp[2]_i_15__1_n_0 ,\stateOp[2]_i_16__1_n_0 ,\stateOp[2]_i_17__1_n_0 ,\stateOp[2]_i_18__1_n_0 ,\stateOp[2]_i_19__1_n_0 ,\stateOp[2]_i_20__1_n_0 }));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_181),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_184),
        .Q(\stateOp_reg[5]_0 [3]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_181),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_183),
        .Q(\stateOp_reg[5]_0 [4]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_181),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_285),
        .Q(\stateOp_reg[5]_0 [5]));
  (* SOFT_HLUTNM = "soft_lutpair2380" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \stateSeqbufB[2]_i_10 
       (.I0(\tixVBuffer_reg_n_0_[0] ),
        .I1(\tixVBuffer_reg_n_0_[1] ),
        .O(\stateSeqbufB[2]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2360" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \stateSeqbufB[2]_i_4 
       (.I0(\FSM_onehot_stateCoobufB[0]_i_3_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\stateSeqbufB[2]_i_8_n_0 ),
        .O(reqSeqbufHshktrackToHostif));
  LUT6 #(
    .INIT(64'h0000000000040000)) 
    \stateSeqbufB[2]_i_4__0 
       (.I0(\tixVBuffer_reg_n_0_[1] ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\tixVBuffer_reg_n_0_[3] ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\tixVBuffer_reg_n_0_[0] ),
        .I5(\FSM_onehot_stateCoobufB[0]_i_3_n_0 ),
        .O(reqSeqbufMemtrackToHostif));
  LUT6 #(
    .INIT(64'h0004000000000000)) 
    \stateSeqbufB[2]_i_4__1 
       (.I0(\FSM_onehot_stateCoobufB[0]_i_3_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\pollbuf[0][7]_i_7_n_0 ),
        .I3(\tixVBuffer_reg_n_0_[3] ),
        .I4(\tixVBuffer_reg_n_0_[1] ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(reqSeqbufVidtrackToHostif));
  LUT6 #(
    .INIT(64'h0000000000001000)) 
    \stateSeqbufB[2]_i_4__2 
       (.I0(\pollbuf[0][7]_i_7_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[3] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[1] ),
        .I4(\FSM_onehot_stateCoobufB[0]_i_3_n_0 ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(reqSeqbufCputrackToHostif));
  LUT6 #(
    .INIT(64'h0000000010000000)) 
    \stateSeqbufB[2]_i_5 
       (.I0(\pollbuf[0][7]_i_7_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[3] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[1] ),
        .I4(\FSM_onehot_stateCoobufB[3]_i_4_n_0 ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(seqbufCputrackToHostifAXIS_tready));
  LUT6 #(
    .INIT(64'h0000002000000000)) 
    \stateSeqbufB[2]_i_5__0 
       (.I0(\FSM_onehot_stateCoobufB[3]_i_4_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[1] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[3] ),
        .I4(\pollbuf[0][7]_i_7_n_0 ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(seqbufMemtrackToHostifAXIS_tready));
  LUT6 #(
    .INIT(64'h0008000000000000)) 
    \stateSeqbufB[2]_i_5__1 
       (.I0(\FSM_onehot_stateCoobufB[3]_i_4_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\pollbuf[0][7]_i_7_n_0 ),
        .I3(\tixVBuffer_reg_n_0_[3] ),
        .I4(\tixVBuffer_reg_n_0_[1] ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(seqbufVidtrackToHostifAXIS_tready));
  (* SOFT_HLUTNM = "soft_lutpair2360" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \stateSeqbufB[2]_i_5__2 
       (.I0(\tixVBuffer_reg_n_0_[2] ),
        .I1(\FSM_onehot_stateCoobufB[3]_i_4_n_0 ),
        .I2(\stateSeqbufB[2]_i_8_n_0 ),
        .O(seqbufHshktrackToHostifAXIS_tready));
  LUT6 #(
    .INIT(64'h0000000010000000)) 
    \stateSeqbufB[2]_i_6__0 
       (.I0(\pollbuf[0][7]_i_7_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[3] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[1] ),
        .I4(\FSM_onehot_stateCoobufB[5]_i_4_n_0 ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(dneSeqbufCputrackToHostif));
  LUT6 #(
    .INIT(64'h0008000000000000)) 
    \stateSeqbufB[2]_i_6__1 
       (.I0(\FSM_onehot_stateCoobufB[5]_i_4_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\pollbuf[0][7]_i_7_n_0 ),
        .I3(\tixVBuffer_reg_n_0_[3] ),
        .I4(\tixVBuffer_reg_n_0_[1] ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(dneSeqbufVidtrackToHostif));
  LUT6 #(
    .INIT(64'h0000000000400000)) 
    \stateSeqbufB[2]_i_6__2 
       (.I0(\tixVBuffer_reg_n_0_[2] ),
        .I1(\stateSeqbufB[2]_i_9_n_0 ),
        .I2(\txAXIS_tdata[15]_i_8_n_0 ),
        .I3(\stateOp_reg[5]_0 [5]),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateSeqbufB[2]_i_8_n_0 ),
        .O(dneSeqbufHshktrackToHostif));
  LUT6 #(
    .INIT(64'h0000002000000000)) 
    \stateSeqbufB[2]_i_7__0 
       (.I0(\FSM_onehot_stateCoobufB[5]_i_4_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[1] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[3] ),
        .I4(\pollbuf[0][7]_i_7_n_0 ),
        .I5(\tixVBuffer_reg_n_0_[0] ),
        .O(dneSeqbufMemtrackToHostif));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFEFF)) 
    \stateSeqbufB[2]_i_8 
       (.I0(\tixVBuffer_reg_n_0_[5] ),
        .I1(\tixVBuffer_reg_n_0_[6] ),
        .I2(\tixVBuffer_reg_n_0_[7] ),
        .I3(\tixVBuffer_reg_n_0_[3] ),
        .I4(p_0_in0),
        .I5(\stateSeqbufB[2]_i_10_n_0 ),
        .O(\stateSeqbufB[2]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2404" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateSeqbufB[2]_i_9 
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_reg[5]_0 [2]),
        .O(\stateSeqbufB[2]_i_9_n_0 ));
  LUT5 #(
    .INIT(32'h00000001)) 
    synthNotLive_i_1
       (.I0(D[21]),
        .I1(D[17]),
        .I2(D[19]),
        .I3(D[23]),
        .I4(synthNotLive_i_2_n_0),
        .O(synthNotLive));
  (* SOFT_HLUTNM = "soft_lutpair2348" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    synthNotLive_i_2
       (.I0(D[18]),
        .I1(D[22]),
        .I2(D[16]),
        .I3(D[20]),
        .O(synthNotLive_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2272" *) 
  LUT5 #(
    .INIT(32'h54005454)) 
    targetNotSteady_i_1
       (.I0(reqInvRotaryConfig),
        .I1(reqInvRotaryMoveto),
        .I2(reqInvRotarySet),
        .I3(ackInvSet_sig_reg[1]),
        .I4(ackInvSet_sig_reg[0]),
        .O(targetNotSteady));
  (* SOFT_HLUTNM = "soft_lutpair2362" *) 
  LUT3 #(
    .INIT(8'h08)) 
    targetNotSteady_i_2
       (.I0(stateOp_i_2__0_n_0),
        .I1(targetNotSteady_i_3_n_0),
        .I2(targetNotSteady_i_4_n_0),
        .O(reqInvRotaryMoveto));
  LUT5 #(
    .INIT(32'h00000100)) 
    targetNotSteady_i_3
       (.I0(stateOp_i_5__1_n_0),
        .I1(\tixVCommand_reg_n_0_[4] ),
        .I2(\tixVCommand_reg_n_0_[5] ),
        .I3(\tixVCommand_reg_n_0_[1] ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .O(targetNotSteady_i_3_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFDFF)) 
    targetNotSteady_i_4
       (.I0(\tixVController_reg_n_0_[2] ),
        .I1(\retbuf[0][0]_i_3_n_0 ),
        .I2(\tixVController_reg_n_0_[4] ),
        .I3(\tixVController_reg_n_0_[3] ),
        .I4(\tixVController_reg_n_0_[0] ),
        .I5(\tixVController_reg_n_0_[1] ),
        .O(targetNotSteady_i_4_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2404" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \tixVBuffer[7]_i_3 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [0]),
        .O(\tixVBuffer[7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2334" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \tixVBuffer[7]_i_4 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [3]),
        .O(\tixVBuffer[7]_i_4_n_0 ));
  FDCE \tixVBuffer_reg[0] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_483),
        .Q(\tixVBuffer_reg_n_0_[0] ));
  FDCE \tixVBuffer_reg[1] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_482),
        .Q(\tixVBuffer_reg_n_0_[1] ));
  FDCE \tixVBuffer_reg[2] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_481),
        .Q(\tixVBuffer_reg_n_0_[2] ));
  FDCE \tixVBuffer_reg[3] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_480),
        .Q(\tixVBuffer_reg_n_0_[3] ));
  FDCE \tixVBuffer_reg[4] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_479),
        .Q(p_0_in0));
  FDCE \tixVBuffer_reg[5] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_478),
        .Q(\tixVBuffer_reg_n_0_[5] ));
  FDCE \tixVBuffer_reg[6] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_477),
        .Q(\tixVBuffer_reg_n_0_[6] ));
  FDCE \tixVBuffer_reg[7] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_476),
        .Q(\tixVBuffer_reg_n_0_[7] ));
  FDCE \tixVBufxfop_reg[0] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_493),
        .Q(tixVBufxfop[0]));
  FDCE \tixVBufxfop_reg[1] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_492),
        .Q(tixVBufxfop[1]));
  FDCE \tixVBufxfop_reg[2] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_491),
        .Q(tixVBufxfop[2]));
  FDCE \tixVBufxfop_reg[3] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_490),
        .Q(tixVBufxfop[3]));
  FDCE \tixVBufxfop_reg[4] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_489),
        .Q(tixVBufxfop[4]));
  FDCE \tixVBufxfop_reg[5] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_488),
        .Q(tixVBufxfop[5]));
  FDCE \tixVBufxfop_reg[6] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_487),
        .Q(tixVBufxfop[6]));
  FDCE \tixVBufxfop_reg[7] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_486),
        .Q(tixVBufxfop[7]));
  FDCE \tixVCommand_reg[0] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_493),
        .Q(\tixVCommand_reg_n_0_[0] ));
  FDCE \tixVCommand_reg[1] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_492),
        .Q(\tixVCommand_reg_n_0_[1] ));
  FDCE \tixVCommand_reg[2] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_491),
        .Q(\tixVCommand_reg_n_0_[2] ));
  FDCE \tixVCommand_reg[3] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_490),
        .Q(\tixVCommand_reg_n_0_[3] ));
  FDCE \tixVCommand_reg[4] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_489),
        .Q(\tixVCommand_reg_n_0_[4] ));
  FDCE \tixVCommand_reg[5] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_488),
        .Q(\tixVCommand_reg_n_0_[5] ));
  FDCE \tixVCommand_reg[6] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_487),
        .Q(\tixVCommand_reg_n_0_[6] ));
  FDCE \tixVCommand_reg[7] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_486),
        .Q(\tixVCommand_reg_n_0_[7] ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \tixVController[7]_i_3 
       (.I0(\tixVController[7]_i_4_n_0 ),
        .I1(\tixVController[7]_i_5_n_0 ),
        .I2(\tixVController[7]_i_6_n_0 ),
        .I3(\opbuf_reg_n_0_[2][1] ),
        .I4(\opbuf_reg_n_0_[2][5] ),
        .I5(\opbuf_reg_n_0_[2][2] ),
        .O(\tixVController[7]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \tixVController[7]_i_4 
       (.I0(\opbuf_reg_n_0_[2][3] ),
        .I1(\opbuf_reg_n_0_[2][7] ),
        .I2(\opbuf_reg_n_0_[0][0] ),
        .I3(\opbuf_reg_n_0_[2][4] ),
        .O(\tixVController[7]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \tixVController[7]_i_5 
       (.I0(\opbuf_reg_n_0_[0][5] ),
        .I1(\opbuf_reg_n_0_[0][4] ),
        .I2(\opbuf_reg_n_0_[2][6] ),
        .I3(\opbuf_reg_n_0_[0][1] ),
        .O(\tixVController[7]_i_5_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \tixVController[7]_i_6 
       (.I0(\opbuf_reg_n_0_[0][6] ),
        .I1(\opbuf_reg_n_0_[0][7] ),
        .I2(\opbuf_reg_n_0_[0][3] ),
        .I3(\opbuf_reg_n_0_[0][2] ),
        .O(\tixVController[7]_i_6_n_0 ));
  FDCE \tixVController_reg[0] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_475),
        .Q(\tixVController_reg_n_0_[0] ));
  FDCE \tixVController_reg[1] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_474),
        .Q(\tixVController_reg_n_0_[1] ));
  FDCE \tixVController_reg[2] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_473),
        .Q(\tixVController_reg_n_0_[2] ));
  FDCE \tixVController_reg[3] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_472),
        .Q(\tixVController_reg_n_0_[3] ));
  FDCE \tixVController_reg[4] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_471),
        .Q(\tixVController_reg_n_0_[4] ));
  FDCE \tixVController_reg[5] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_470),
        .Q(\tixVController_reg_n_0_[5] ));
  FDCE \tixVController_reg[6] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_469),
        .Q(\tixVController_reg_n_0_[6] ));
  FDCE \tixVController_reg[7] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_468),
        .Q(\tixVController_reg_n_0_[7] ));
  LUT6 #(
    .INIT(64'h0F880F8F0F880F88)) 
    \tixVState[1]_i_1 
       (.I0(ackInvUnlock_sig0_in),
        .I1(\tixVState_reg[1]_2 [1]),
        .I2(\tixVState_reg[1]_3 ),
        .I3(\tixVState_reg[1]_2 [0]),
        .I4(\stateOp_reg[0]_5 ),
        .I5(reqInvAcquire),
        .O(\tixVState_reg[1] ));
  (* SOFT_HLUTNM = "soft_lutpair2269" *) 
  LUT5 #(
    .INIT(32'hFCAACCAA)) 
    \tixVState[1]_i_1__0 
       (.I0(\tixVState_reg[1]_0 ),
        .I1(\tixVState[1]_i_4_n_0 ),
        .I2(rng_reg_7),
        .I3(tixVState1),
        .I4(reqInvDecimAcquire),
        .O(rng_reg_3));
  LUT6 #(
    .INIT(64'h00000003AAAAAAAA)) 
    \tixVState[1]_i_2 
       (.I0(\stateOp_reg[0]_9 [0]),
        .I1(reqInvCornerConfig),
        .I2(reqInvAcquire),
        .I3(reqInvUnlock),
        .I4(reqInvSet),
        .I5(\stateOp_reg[0]_9 [1]),
        .O(\stateOp_reg[0]_5 ));
  LUT6 #(
    .INIT(64'h222222222222222E)) 
    \tixVState[1]_i_2__0 
       (.I0(\stateOp_reg[0]_7 [0]),
        .I1(\stateOp_reg[0]_7 [1]),
        .I2(reqInvDecimUnlock),
        .I3(reqInvDecimAcquire),
        .I4(reqInvDecimConfig),
        .I5(reqInvDecimSet),
        .O(\stateOp_reg[0]_1 ));
  LUT6 #(
    .INIT(64'h000000000000AAEA)) 
    \tixVState[1]_i_4 
       (.I0(reqInvDecimSet),
        .I1(reqInvDecimUnlock),
        .I2(\tixVState_reg[1]_1 [1]),
        .I3(\tixVState_reg[1]_1 [0]),
        .I4(reqInvDecimAcquire),
        .I5(reqInvDecimConfig),
        .O(\tixVState[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[0]_i_3 
       (.I0(\retbuf_reg_n_0_[24][0] ),
        .I1(\retbuf_reg[16]_65 [0]),
        .I2(\txAXIS_tdata[3]_i_7_n_0 ),
        .I3(\retbuf_reg_n_0_[8][0] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[0][0] ),
        .O(\txAXIS_tdata[0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFEFFFFFFFF)) 
    \txAXIS_tdata[0]_i_5__0 
       (.I0(\tixVBuffer_reg_n_0_[7] ),
        .I1(\tixVBuffer_reg_n_0_[6] ),
        .I2(\tixVBuffer_reg_n_0_[5] ),
        .I3(p_0_in0),
        .I4(\stateOp_reg[5]_0 [0]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[0]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[0]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [0]),
        .I1(\txAXIS_tdata[63]_i_8_4 [0]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [0]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[0]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[0]_i_7 
       (.I0(doutb[0]),
        .I1(\txAXIS_tdata[63]_i_8_0 [0]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [0]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [0]),
        .O(\txAXIS_tdata[0]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h888BBB8B)) 
    \txAXIS_tdata[10]_i_3 
       (.I0(\txAXIS_tdata[10]_i_7_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][2] ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\retbuf_reg_n_0_[33][2] ),
        .O(\txAXIS_tdata[10]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[10]_i_4 
       (.I0(\txAXIS_tdata[63]_i_8_3 [10]),
        .I1(\txAXIS_tdata[63]_i_8_4 [10]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [10]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[10]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[10]_i_5 
       (.I0(doutb[10]),
        .I1(\txAXIS_tdata[63]_i_8_0 [10]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [10]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [10]),
        .O(\txAXIS_tdata[10]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[10]_i_7 
       (.I0(\retbuf_reg_n_0_[9][2] ),
        .I1(\retbuf_reg_n_0_[1][2] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[25][2] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[17][2] ),
        .O(\txAXIS_tdata[10]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h888BBB8B)) 
    \txAXIS_tdata[11]_i_3 
       (.I0(\txAXIS_tdata[11]_i_7_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][3] ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\retbuf_reg_n_0_[33][3] ),
        .O(\txAXIS_tdata[11]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[11]_i_4 
       (.I0(\txAXIS_tdata[63]_i_8_3 [11]),
        .I1(\txAXIS_tdata[63]_i_8_4 [11]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [11]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[11]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[11]_i_5 
       (.I0(doutb[11]),
        .I1(\txAXIS_tdata[63]_i_8_0 [11]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [11]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [11]),
        .O(\txAXIS_tdata[11]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[11]_i_7 
       (.I0(\retbuf_reg_n_0_[9][3] ),
        .I1(\retbuf_reg_n_0_[1][3] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[25][3] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[17][3] ),
        .O(\txAXIS_tdata[11]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h888BBB8B)) 
    \txAXIS_tdata[12]_i_3 
       (.I0(\txAXIS_tdata[12]_i_7_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][4] ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\retbuf_reg_n_0_[33][4] ),
        .O(\txAXIS_tdata[12]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[12]_i_4 
       (.I0(\txAXIS_tdata[63]_i_8_3 [12]),
        .I1(\txAXIS_tdata[63]_i_8_4 [12]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [12]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[12]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[12]_i_5 
       (.I0(doutb[12]),
        .I1(\txAXIS_tdata[63]_i_8_0 [12]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [12]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [12]),
        .O(\txAXIS_tdata[12]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[12]_i_7 
       (.I0(\retbuf_reg_n_0_[9][4] ),
        .I1(\retbuf_reg_n_0_[1][4] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[25][4] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[17][4] ),
        .O(\txAXIS_tdata[12]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h888BBB8B)) 
    \txAXIS_tdata[13]_i_3 
       (.I0(\txAXIS_tdata[13]_i_7_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][5] ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\retbuf_reg_n_0_[33][5] ),
        .O(\txAXIS_tdata[13]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[13]_i_4 
       (.I0(\txAXIS_tdata[63]_i_8_3 [13]),
        .I1(\txAXIS_tdata[63]_i_8_4 [13]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [13]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[13]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[13]_i_5 
       (.I0(doutb[13]),
        .I1(\txAXIS_tdata[63]_i_8_0 [13]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [13]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [13]),
        .O(\txAXIS_tdata[13]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[13]_i_7 
       (.I0(\retbuf_reg_n_0_[9][5] ),
        .I1(\retbuf_reg_n_0_[1][5] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[25][5] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[17][5] ),
        .O(\txAXIS_tdata[13]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h888BBB8B)) 
    \txAXIS_tdata[14]_i_3 
       (.I0(\txAXIS_tdata[14]_i_7_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][6] ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\retbuf_reg_n_0_[33][6] ),
        .O(\txAXIS_tdata[14]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[14]_i_4 
       (.I0(\txAXIS_tdata[63]_i_8_3 [14]),
        .I1(\txAXIS_tdata[63]_i_8_4 [14]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [14]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[14]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[14]_i_5 
       (.I0(doutb[14]),
        .I1(\txAXIS_tdata[63]_i_8_0 [14]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [14]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [14]),
        .O(\txAXIS_tdata[14]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[14]_i_7 
       (.I0(\retbuf_reg_n_0_[9][6] ),
        .I1(\retbuf_reg_n_0_[1][6] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[25][6] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[17][6] ),
        .O(\txAXIS_tdata[14]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2407" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \txAXIS_tdata[15]_i_10 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [0]),
        .O(\txAXIS_tdata[15]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h0000000022200020)) 
    \txAXIS_tdata[15]_i_11 
       (.I0(\tixVBuffer_reg_n_0_[1] ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\pollbuf[2][3]_i_2_0 [0]),
        .I3(\tixVBuffer_reg_n_0_[0] ),
        .I4(\pollbuf[2][7]_i_2_0 [0]),
        .I5(\wordcntLast[28]_i_19_n_0 ),
        .O(\txAXIS_tdata[15]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[15]_i_12 
       (.I0(seqbufVidtrackToHostifAXIS_tvalid),
        .I1(seqbufCputrackToHostifAXIS_tvalid),
        .I2(\tixVBuffer_reg_n_0_[1] ),
        .I3(seqbufMemtrackToHostifAXIS_tvalid),
        .I4(\tixVBuffer_reg_n_0_[0] ),
        .I5(\pollbuf_reg[2][7]_0 [0]),
        .O(\txAXIS_tdata[15]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[15]_i_14 
       (.I0(\txAXIS_tdata[63]_i_8_3 [15]),
        .I1(\txAXIS_tdata[63]_i_8_4 [15]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [15]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[15]_i_14_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[15]_i_15 
       (.I0(doutb[15]),
        .I1(\txAXIS_tdata[63]_i_8_0 [15]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [15]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [15]),
        .O(\txAXIS_tdata[15]_i_15_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[15]_i_17 
       (.I0(\retbuf_reg_n_0_[9][7] ),
        .I1(\retbuf_reg_n_0_[1][7] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[25][7] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[17][7] ),
        .O(\txAXIS_tdata[15]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF0C080C0F)) 
    \txAXIS_tdata[15]_i_3 
       (.I0(\txAXIS_tdata[15]_i_9_n_0 ),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [4]),
        .I5(\txAXIS_tdata[15]_i_10_n_0 ),
        .O(\txAXIS_tdata[15]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2409" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \txAXIS_tdata[15]_i_4 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[15]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAEAFFEAEA)) 
    \txAXIS_tdata[15]_i_5 
       (.I0(\txAXIS_tdata[15]_i_11_n_0 ),
        .I1(\txAXIS_tdata[15]_i_12_n_0 ),
        .I2(\wordcntLast[28]_i_9_n_0 ),
        .I3(\wordcntLast[28]_i_10_n_0 ),
        .I4(seqbufHshktrackToHostifAXIS_tvalid),
        .I5(\pollbuf[0][7]_i_7_n_0 ),
        .O(\txAXIS_tdata[15]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h888BBB8B)) 
    \txAXIS_tdata[15]_i_7 
       (.I0(\txAXIS_tdata[15]_i_17_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][7] ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\retbuf_reg_n_0_[33][7] ),
        .O(\txAXIS_tdata[15]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2408" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \txAXIS_tdata[15]_i_8 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [1]),
        .O(\txAXIS_tdata[15]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2342" *) 
  LUT3 #(
    .INIT(8'hFB)) 
    \txAXIS_tdata[15]_i_9 
       (.I0(resid[2]),
        .I1(resid[1]),
        .I2(resid[0]),
        .O(\txAXIS_tdata[15]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[16]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[34][0] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][0] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[16]_i_5_n_0 ),
        .O(\txAXIS_tdata[16]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[16]_i_4 
       (.I0(\txAXIS_tdata[16]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[16]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[16]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[16]_i_5 
       (.I0(\retbuf_reg_n_0_[10][0] ),
        .I1(\retbuf_reg_n_0_[2][0] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[26][0] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[18][0] ),
        .O(\txAXIS_tdata[16]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[16]_i_6 
       (.I0(doutb[16]),
        .I1(\txAXIS_tdata[63]_i_8_0 [16]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [16]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [16]),
        .O(\txAXIS_tdata[16]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[16]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [16]),
        .I1(\txAXIS_tdata[63]_i_8_4 [16]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [16]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[16]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[17]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[34][1] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][1] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[17]_i_5_n_0 ),
        .O(\txAXIS_tdata[17]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[17]_i_4 
       (.I0(\txAXIS_tdata[17]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[17]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[17]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[17]_i_5 
       (.I0(\retbuf_reg_n_0_[10][1] ),
        .I1(\retbuf_reg_n_0_[2][1] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[26][1] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[18][1] ),
        .O(\txAXIS_tdata[17]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[17]_i_6 
       (.I0(doutb[17]),
        .I1(\txAXIS_tdata[63]_i_8_0 [17]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [17]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [17]),
        .O(\txAXIS_tdata[17]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[17]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [17]),
        .I1(\txAXIS_tdata[63]_i_8_4 [17]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [17]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[17]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[18]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[34][2] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][2] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[18]_i_5_n_0 ),
        .O(\txAXIS_tdata[18]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[18]_i_4 
       (.I0(\txAXIS_tdata[18]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[18]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[18]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[18]_i_5 
       (.I0(\retbuf_reg_n_0_[10][2] ),
        .I1(\retbuf_reg_n_0_[2][2] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[26][2] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[18][2] ),
        .O(\txAXIS_tdata[18]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[18]_i_6 
       (.I0(doutb[18]),
        .I1(\txAXIS_tdata[63]_i_8_0 [18]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [18]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [18]),
        .O(\txAXIS_tdata[18]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[18]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [18]),
        .I1(\txAXIS_tdata[63]_i_8_4 [18]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [18]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[18]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[19]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[34][3] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][3] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[19]_i_5_n_0 ),
        .O(\txAXIS_tdata[19]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[19]_i_4 
       (.I0(\txAXIS_tdata[19]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[19]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[19]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[19]_i_5 
       (.I0(\retbuf_reg_n_0_[10][3] ),
        .I1(\retbuf_reg_n_0_[2][3] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[26][3] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[18][3] ),
        .O(\txAXIS_tdata[19]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[19]_i_6 
       (.I0(doutb[19]),
        .I1(\txAXIS_tdata[63]_i_8_0 [19]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [19]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [19]),
        .O(\txAXIS_tdata[19]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[19]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [19]),
        .I1(\txAXIS_tdata[63]_i_8_4 [19]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [19]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[19]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h0000000010000000)) 
    \txAXIS_tdata[1]_i_4 
       (.I0(\pollbuf[0][7]_i_7_n_0 ),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [1]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\txlen[28]_i_4_n_0 ),
        .I5(\txAXIS_tdata_reg[1]_i_6_n_0 ),
        .O(\txAXIS_tdata[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[1]_i_5 
       (.I0(\retbuf_reg_n_0_[24][1] ),
        .I1(\retbuf_reg[16]_65 [1]),
        .I2(\txAXIS_tdata[3]_i_7_n_0 ),
        .I3(\retbuf_reg_n_0_[8][1] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[0][1] ),
        .O(\txAXIS_tdata[1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[1]_i_7 
       (.I0(doutb[1]),
        .I1(\txAXIS_tdata[63]_i_8_0 [1]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [1]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [1]),
        .O(\txAXIS_tdata[1]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h470047FF47FF47FF)) 
    \txAXIS_tdata[1]_i_8 
       (.I0(\txAXIS_tdata[63]_i_8_3 [1]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [1]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [1]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[1]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[20]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[34][4] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][4] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[20]_i_5_n_0 ),
        .O(\txAXIS_tdata[20]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[20]_i_4 
       (.I0(\txAXIS_tdata[20]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[20]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[20]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[20]_i_5 
       (.I0(\retbuf_reg_n_0_[10][4] ),
        .I1(\retbuf_reg_n_0_[2][4] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[26][4] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[18][4] ),
        .O(\txAXIS_tdata[20]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[20]_i_6 
       (.I0(doutb[20]),
        .I1(\txAXIS_tdata[63]_i_8_0 [20]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [20]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [20]),
        .O(\txAXIS_tdata[20]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[20]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [20]),
        .I1(\txAXIS_tdata[63]_i_8_4 [20]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [20]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[20]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[21]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[34][5] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][5] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[21]_i_5_n_0 ),
        .O(\txAXIS_tdata[21]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[21]_i_4 
       (.I0(\txAXIS_tdata[21]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[21]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[21]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[21]_i_5 
       (.I0(\retbuf_reg_n_0_[10][5] ),
        .I1(\retbuf_reg_n_0_[2][5] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[26][5] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[18][5] ),
        .O(\txAXIS_tdata[21]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[21]_i_6 
       (.I0(doutb[21]),
        .I1(\txAXIS_tdata[63]_i_8_0 [21]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [21]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [21]),
        .O(\txAXIS_tdata[21]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[21]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [21]),
        .I1(\txAXIS_tdata[63]_i_8_4 [21]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [21]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[21]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[22]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[34][6] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][6] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[22]_i_6_n_0 ),
        .O(\txAXIS_tdata[22]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2341" *) 
  LUT4 #(
    .INIT(16'h0400)) 
    \txAXIS_tdata[22]_i_4 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(resid[2]),
        .I3(resid[1]),
        .O(\txAXIS_tdata[22]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[22]_i_5 
       (.I0(\txAXIS_tdata[22]_i_7_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[22]_i_8_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[22]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[22]_i_6 
       (.I0(\retbuf_reg_n_0_[10][6] ),
        .I1(\retbuf_reg_n_0_[2][6] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[26][6] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[18][6] ),
        .O(\txAXIS_tdata[22]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[22]_i_7 
       (.I0(doutb[22]),
        .I1(\txAXIS_tdata[63]_i_8_0 [22]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [22]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [22]),
        .O(\txAXIS_tdata[22]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[22]_i_8 
       (.I0(\txAXIS_tdata[63]_i_8_3 [22]),
        .I1(\txAXIS_tdata[63]_i_8_4 [22]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [22]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[22]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[23]_i_10 
       (.I0(\txAXIS_tdata[63]_i_8_3 [23]),
        .I1(\txAXIS_tdata[63]_i_8_4 [23]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [23]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[23]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2405" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \txAXIS_tdata[23]_i_3 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [3]),
        .O(\txAXIS_tdata[23]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2420" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \txAXIS_tdata[23]_i_4 
       (.I0(resid[1]),
        .I1(resid[2]),
        .O(\txAXIS_tdata[23]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[23]_i_5 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[34][7] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][7] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[23]_i_8_n_0 ),
        .O(\txAXIS_tdata[23]_i_5_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[23]_i_7 
       (.I0(\txAXIS_tdata[23]_i_9_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[23]_i_10_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[23]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[23]_i_8 
       (.I0(\retbuf_reg_n_0_[10][7] ),
        .I1(\retbuf_reg_n_0_[2][7] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[26][7] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[18][7] ),
        .O(\txAXIS_tdata[23]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[23]_i_9 
       (.I0(doutb[23]),
        .I1(\txAXIS_tdata[63]_i_8_0 [23]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [23]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [23]),
        .O(\txAXIS_tdata[23]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[24]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[35][0] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][0] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[24]_i_5_n_0 ),
        .O(\txAXIS_tdata[24]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[24]_i_4 
       (.I0(\txAXIS_tdata[24]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[24]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[24]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[24]_i_5 
       (.I0(\retbuf_reg_n_0_[11][0] ),
        .I1(\retbuf_reg_n_0_[3][0] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[27][0] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[19][0] ),
        .O(\txAXIS_tdata[24]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[24]_i_6 
       (.I0(doutb[24]),
        .I1(\txAXIS_tdata[63]_i_8_0 [24]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [24]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [24]),
        .O(\txAXIS_tdata[24]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[24]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [24]),
        .I1(\txAXIS_tdata[63]_i_8_4 [24]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [24]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[24]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[25]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[35][1] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][1] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[25]_i_5_n_0 ),
        .O(\txAXIS_tdata[25]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[25]_i_4 
       (.I0(\txAXIS_tdata[25]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[25]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[25]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[25]_i_5 
       (.I0(\retbuf_reg_n_0_[11][1] ),
        .I1(\retbuf_reg_n_0_[3][1] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[27][1] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[19][1] ),
        .O(\txAXIS_tdata[25]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[25]_i_6 
       (.I0(doutb[25]),
        .I1(\txAXIS_tdata[63]_i_8_0 [25]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [25]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [25]),
        .O(\txAXIS_tdata[25]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[25]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [25]),
        .I1(\txAXIS_tdata[63]_i_8_4 [25]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [25]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[25]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[26]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[35][2] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][2] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[26]_i_5_n_0 ),
        .O(\txAXIS_tdata[26]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[26]_i_4 
       (.I0(\txAXIS_tdata[26]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[26]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[26]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[26]_i_5 
       (.I0(\retbuf_reg_n_0_[11][2] ),
        .I1(\retbuf_reg_n_0_[3][2] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[27][2] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[19][2] ),
        .O(\txAXIS_tdata[26]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[26]_i_6 
       (.I0(doutb[26]),
        .I1(\txAXIS_tdata[63]_i_8_0 [26]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [26]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [26]),
        .O(\txAXIS_tdata[26]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[26]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [26]),
        .I1(\txAXIS_tdata[63]_i_8_4 [26]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [26]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[26]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[27]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[35][3] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][3] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[27]_i_5_n_0 ),
        .O(\txAXIS_tdata[27]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[27]_i_4 
       (.I0(\txAXIS_tdata[27]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[27]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[27]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[27]_i_5 
       (.I0(\retbuf_reg_n_0_[11][3] ),
        .I1(\retbuf_reg_n_0_[3][3] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[27][3] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[19][3] ),
        .O(\txAXIS_tdata[27]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[27]_i_6 
       (.I0(doutb[27]),
        .I1(\txAXIS_tdata[63]_i_8_0 [27]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [27]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [27]),
        .O(\txAXIS_tdata[27]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[27]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [27]),
        .I1(\txAXIS_tdata[63]_i_8_4 [27]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [27]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[27]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[28]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[35][4] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][4] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[28]_i_5_n_0 ),
        .O(\txAXIS_tdata[28]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[28]_i_4 
       (.I0(\txAXIS_tdata[28]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[28]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[28]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[28]_i_5 
       (.I0(\retbuf_reg_n_0_[11][4] ),
        .I1(\retbuf_reg_n_0_[3][4] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[27][4] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[19][4] ),
        .O(\txAXIS_tdata[28]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[28]_i_6 
       (.I0(doutb[28]),
        .I1(\txAXIS_tdata[63]_i_8_0 [28]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [28]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [28]),
        .O(\txAXIS_tdata[28]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[28]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [28]),
        .I1(\txAXIS_tdata[63]_i_8_4 [28]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [28]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[28]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[29]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[35][5] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][5] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[29]_i_6_n_0 ),
        .O(\txAXIS_tdata[29]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2409" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \txAXIS_tdata[29]_i_3 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[29]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[29]_i_5 
       (.I0(\txAXIS_tdata[29]_i_8_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[29]_i_9_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[29]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[29]_i_6 
       (.I0(\retbuf_reg_n_0_[11][5] ),
        .I1(\retbuf_reg_n_0_[3][5] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[27][5] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[19][5] ),
        .O(\txAXIS_tdata[29]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2414" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \txAXIS_tdata[29]_i_7 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[29]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[29]_i_8 
       (.I0(doutb[29]),
        .I1(\txAXIS_tdata[63]_i_8_0 [29]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [29]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [29]),
        .O(\txAXIS_tdata[29]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[29]_i_9 
       (.I0(\txAXIS_tdata[63]_i_8_3 [29]),
        .I1(\txAXIS_tdata[63]_i_8_4 [29]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [29]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[29]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2263" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \txAXIS_tdata[2]_i_10 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [1]),
        .I3(\stateOp_reg[5]_0 [3]),
        .O(\txAXIS_tdata[2]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'h20AAA8AA)) 
    \txAXIS_tdata[2]_i_2 
       (.I0(\txAXIS_tdata[6]_i_7__0_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[32][2] ),
        .I3(\stateOp_reg[5]_0 [4]),
        .I4(\txAXIS_tdata[2]_i_6_n_0 ),
        .O(\txAXIS_tdata[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h000000E200000000)) 
    \txAXIS_tdata[2]_i_4 
       (.I0(\txAXIS_tdata[2]_i_8_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[2]_i_9_n_0 ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\stateOp_reg[5]_0 [0]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[2]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2279" *) 
  LUT5 #(
    .INIT(32'hFF4FFF44)) 
    \txAXIS_tdata[2]_i_5 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [5]),
        .I4(\stateOp_reg[5]_0 [0]),
        .O(\txAXIS_tdata[2]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[2]_i_6 
       (.I0(\retbuf_reg_n_0_[24][2] ),
        .I1(\retbuf_reg[16]_65 [2]),
        .I2(\txAXIS_tdata[3]_i_7_n_0 ),
        .I3(\retbuf_reg_n_0_[8][2] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[0][2] ),
        .O(\txAXIS_tdata[2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[2]_i_8 
       (.I0(doutb[2]),
        .I1(\txAXIS_tdata[63]_i_8_0 [2]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [2]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [2]),
        .O(\txAXIS_tdata[2]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[2]_i_9 
       (.I0(\txAXIS_tdata[63]_i_8_3 [2]),
        .I1(\txAXIS_tdata[63]_i_8_4 [2]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [2]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[2]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[30]_i_2 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[35][6] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][6] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[30]_i_5_n_0 ),
        .O(\txAXIS_tdata[30]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[30]_i_4 
       (.I0(\txAXIS_tdata[30]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[30]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[30]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[30]_i_5 
       (.I0(\retbuf_reg_n_0_[11][6] ),
        .I1(\retbuf_reg_n_0_[3][6] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[27][6] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[19][6] ),
        .O(\txAXIS_tdata[30]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[30]_i_6 
       (.I0(doutb[30]),
        .I1(\txAXIS_tdata[63]_i_8_0 [30]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [30]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [30]),
        .O(\txAXIS_tdata[30]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[30]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [30]),
        .I1(\txAXIS_tdata[63]_i_8_4 [30]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [30]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[30]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[31]_i_10 
       (.I0(\txAXIS_tdata[63]_i_8_3 [31]),
        .I1(\txAXIS_tdata[63]_i_8_4 [31]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [31]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[31]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h00000000E700FFFF)) 
    \txAXIS_tdata[31]_i_3 
       (.I0(resid[1]),
        .I1(resid[0]),
        .I2(resid[2]),
        .I3(\stateOp_reg[5]_0 [1]),
        .I4(\txAXIS_tdata[31]_i_7_n_0 ),
        .I5(\stateOp_reg[5]_0 [3]),
        .O(\txAXIS_tdata[31]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[31]_i_4 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[35][7] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][7] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[31]_i_8_n_0 ),
        .O(\txAXIS_tdata[31]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[31]_i_6 
       (.I0(\txAXIS_tdata[31]_i_9_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[31]_i_10_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[31]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2415" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \txAXIS_tdata[31]_i_7 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[31]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[31]_i_8 
       (.I0(\retbuf_reg_n_0_[11][7] ),
        .I1(\retbuf_reg_n_0_[3][7] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[27][7] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[19][7] ),
        .O(\txAXIS_tdata[31]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[31]_i_9 
       (.I0(doutb[31]),
        .I1(\txAXIS_tdata[63]_i_8_0 [31]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [31]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [31]),
        .O(\txAXIS_tdata[31]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[32]_i_2 
       (.I0(\retbuf_reg_n_0_[36][0] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][0] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[32]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[32]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[32]_i_4 
       (.I0(\retbuf_reg_n_0_[12][0] ),
        .I1(\retbuf_reg_n_0_[4][0] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[28][0] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[20][0] ),
        .O(\txAXIS_tdata[32]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFF1DFFFFFFFF)) 
    \txAXIS_tdata[32]_i_5 
       (.I0(\txAXIS_tdata[32]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[32]_i_7_n_0 ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[32]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[32]_i_6 
       (.I0(doutb[32]),
        .I1(\txAXIS_tdata[63]_i_8_0 [32]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [32]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [32]),
        .O(\txAXIS_tdata[32]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[32]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [32]),
        .I1(\txAXIS_tdata[63]_i_8_4 [32]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [32]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[32]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[33]_i_2 
       (.I0(\retbuf_reg_n_0_[36][1] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][1] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[33]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[33]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[33]_i_4 
       (.I0(\retbuf_reg_n_0_[12][1] ),
        .I1(\retbuf_reg_n_0_[4][1] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[28][1] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[20][1] ),
        .O(\txAXIS_tdata[33]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h000000E200000000)) 
    \txAXIS_tdata[33]_i_5 
       (.I0(\txAXIS_tdata[33]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[33]_i_7_n_0 ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[33]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[33]_i_6 
       (.I0(doutb[33]),
        .I1(\txAXIS_tdata[63]_i_8_0 [33]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [33]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [33]),
        .O(\txAXIS_tdata[33]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[33]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [33]),
        .I1(\txAXIS_tdata[63]_i_8_4 [33]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [33]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[33]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[34]_i_2 
       (.I0(\retbuf_reg_n_0_[36][2] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][2] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[34]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[34]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[34]_i_4 
       (.I0(\retbuf_reg_n_0_[12][2] ),
        .I1(\retbuf_reg_n_0_[4][2] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[28][2] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[20][2] ),
        .O(\txAXIS_tdata[34]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFF1DFFFFFFFF)) 
    \txAXIS_tdata[34]_i_5 
       (.I0(\txAXIS_tdata[34]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[34]_i_7_n_0 ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[34]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[34]_i_6 
       (.I0(doutb[34]),
        .I1(\txAXIS_tdata[63]_i_8_0 [34]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [34]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [34]),
        .O(\txAXIS_tdata[34]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[34]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [34]),
        .I1(\txAXIS_tdata[63]_i_8_4 [34]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [34]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[34]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[35]_i_2 
       (.I0(\retbuf_reg_n_0_[36][3] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][3] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[35]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[35]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[35]_i_4 
       (.I0(\retbuf_reg_n_0_[12][3] ),
        .I1(\retbuf_reg_n_0_[4][3] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[28][3] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[20][3] ),
        .O(\txAXIS_tdata[35]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFF1DFFFFFFFF)) 
    \txAXIS_tdata[35]_i_5 
       (.I0(\txAXIS_tdata[35]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[35]_i_7_n_0 ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[35]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[35]_i_6 
       (.I0(doutb[35]),
        .I1(\txAXIS_tdata[63]_i_8_0 [35]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [35]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [35]),
        .O(\txAXIS_tdata[35]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[35]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [35]),
        .I1(\txAXIS_tdata[63]_i_8_4 [35]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [35]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[35]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[36]_i_2 
       (.I0(\retbuf_reg_n_0_[36][4] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][4] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[36]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[36]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[36]_i_4 
       (.I0(\retbuf_reg_n_0_[12][4] ),
        .I1(\retbuf_reg_n_0_[4][4] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[28][4] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[20][4] ),
        .O(\txAXIS_tdata[36]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFF1DFFFFFFFF)) 
    \txAXIS_tdata[36]_i_5 
       (.I0(\txAXIS_tdata[36]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[36]_i_7_n_0 ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[36]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[36]_i_6 
       (.I0(doutb[36]),
        .I1(\txAXIS_tdata[63]_i_8_0 [36]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [36]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [36]),
        .O(\txAXIS_tdata[36]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[36]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [36]),
        .I1(\txAXIS_tdata[63]_i_8_4 [36]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [36]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[36]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[37]_i_2 
       (.I0(\retbuf_reg_n_0_[36][5] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][5] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[37]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[37]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[37]_i_4 
       (.I0(\retbuf_reg_n_0_[12][5] ),
        .I1(\retbuf_reg_n_0_[4][5] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[28][5] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[20][5] ),
        .O(\txAXIS_tdata[37]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h000000E200000000)) 
    \txAXIS_tdata[37]_i_5 
       (.I0(\txAXIS_tdata[37]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[37]_i_7_n_0 ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[37]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[37]_i_6 
       (.I0(doutb[37]),
        .I1(\txAXIS_tdata[63]_i_8_0 [37]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [37]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [37]),
        .O(\txAXIS_tdata[37]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[37]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [37]),
        .I1(\txAXIS_tdata[63]_i_8_4 [37]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [37]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[37]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[38]_i_2 
       (.I0(\retbuf_reg_n_0_[36][6] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][6] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[38]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[38]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[38]_i_4 
       (.I0(\retbuf_reg_n_0_[12][6] ),
        .I1(\retbuf_reg_n_0_[4][6] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[28][6] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[20][6] ),
        .O(\txAXIS_tdata[38]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h000000E200000000)) 
    \txAXIS_tdata[38]_i_5 
       (.I0(\txAXIS_tdata[38]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[38]_i_7_n_0 ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[38]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[38]_i_6 
       (.I0(doutb[38]),
        .I1(\txAXIS_tdata[63]_i_8_0 [38]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [38]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [38]),
        .O(\txAXIS_tdata[38]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[38]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [38]),
        .I1(\txAXIS_tdata[63]_i_8_4 [38]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [38]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[38]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[39]_i_10 
       (.I0(doutb[39]),
        .I1(\txAXIS_tdata[63]_i_8_0 [39]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [39]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [39]),
        .O(\txAXIS_tdata[39]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[39]_i_11 
       (.I0(\txAXIS_tdata[63]_i_8_3 [39]),
        .I1(\txAXIS_tdata[63]_i_8_4 [39]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [39]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[39]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2329" *) 
  LUT4 #(
    .INIT(16'h007C)) 
    \txAXIS_tdata[39]_i_3 
       (.I0(\txAXIS_tdata[15]_i_5_n_0 ),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [3]),
        .O(\txAXIS_tdata[39]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2262" *) 
  LUT5 #(
    .INIT(32'hFFFEEEFF)) 
    \txAXIS_tdata[39]_i_4 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [4]),
        .I4(\stateOp_reg[5]_0 [3]),
        .O(\txAXIS_tdata[39]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[39]_i_5 
       (.I0(\retbuf_reg_n_0_[36][7] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][7] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[39]_i_7_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[39]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[39]_i_7 
       (.I0(\retbuf_reg_n_0_[12][7] ),
        .I1(\retbuf_reg_n_0_[4][7] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[28][7] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[20][7] ),
        .O(\txAXIS_tdata[39]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFF1DFFFFFFFF)) 
    \txAXIS_tdata[39]_i_8 
       (.I0(\txAXIS_tdata[39]_i_10_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[39]_i_11_n_0 ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[39]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2344" *) 
  LUT4 #(
    .INIT(16'h0004)) 
    \txAXIS_tdata[39]_i_9 
       (.I0(resid[1]),
        .I1(resid[2]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [3]),
        .O(\txAXIS_tdata[39]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h0000000010000000)) 
    \txAXIS_tdata[3]_i_4 
       (.I0(\pollbuf[0][7]_i_7_n_0 ),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [1]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\txlen[28]_i_4_n_0 ),
        .I5(\txAXIS_tdata_reg[3]_i_6_n_0 ),
        .O(\txAXIS_tdata[3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[3]_i_5 
       (.I0(\retbuf_reg_n_0_[24][3] ),
        .I1(\retbuf_reg[16]_65 [3]),
        .I2(\txAXIS_tdata[3]_i_7_n_0 ),
        .I3(\retbuf_reg_n_0_[8][3] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[0][3] ),
        .O(\txAXIS_tdata[3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h058D8D0500888800)) 
    \txAXIS_tdata[3]_i_7 
       (.I0(\wordcnt_reg_n_0_[25] ),
        .I1(\opbuf_reg[0]5 [8]),
        .I2(\opbuf_reg[0]51_in [8]),
        .I3(\opbuf_reg[0]5 [7]),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\opbuf_reg[0]51_in [7]),
        .O(\txAXIS_tdata[3]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[3]_i_8 
       (.I0(doutb[3]),
        .I1(\txAXIS_tdata[63]_i_8_0 [3]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [3]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [3]),
        .O(\txAXIS_tdata[3]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h470047FF47FF47FF)) 
    \txAXIS_tdata[3]_i_9 
       (.I0(\txAXIS_tdata[63]_i_8_3 [3]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [3]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [3]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[3]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[40]_i_2 
       (.I0(\retbuf_reg_n_0_[37][0] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][0] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[40]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[40]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[40]_i_4 
       (.I0(\retbuf_reg_n_0_[13][0] ),
        .I1(\retbuf_reg_n_0_[5][0] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[29][0] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[21][0] ),
        .O(\txAXIS_tdata[40]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[40]_i_5 
       (.I0(doutb[40]),
        .I1(\txAXIS_tdata[63]_i_8_0 [40]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [40]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [40]),
        .O(\txAXIS_tdata[40]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hB8FFB800B800B800)) 
    \txAXIS_tdata[40]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [40]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [40]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [40]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[40]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[41]_i_2 
       (.I0(\retbuf_reg_n_0_[37][1] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][1] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[41]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[41]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[41]_i_4 
       (.I0(\retbuf_reg_n_0_[13][1] ),
        .I1(\retbuf_reg_n_0_[5][1] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[29][1] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[21][1] ),
        .O(\txAXIS_tdata[41]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[41]_i_5 
       (.I0(doutb[41]),
        .I1(\txAXIS_tdata[63]_i_8_0 [41]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [41]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [41]),
        .O(\txAXIS_tdata[41]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hB8FFB800B800B800)) 
    \txAXIS_tdata[41]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [41]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [41]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [41]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[41]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[42]_i_2 
       (.I0(\retbuf_reg_n_0_[37][2] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][2] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[42]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[42]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[42]_i_4 
       (.I0(\retbuf_reg_n_0_[13][2] ),
        .I1(\retbuf_reg_n_0_[5][2] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[29][2] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[21][2] ),
        .O(\txAXIS_tdata[42]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[42]_i_5 
       (.I0(doutb[42]),
        .I1(\txAXIS_tdata[63]_i_8_0 [42]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [42]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [42]),
        .O(\txAXIS_tdata[42]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hB8FFB800B800B800)) 
    \txAXIS_tdata[42]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [42]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [42]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [42]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[42]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[43]_i_2 
       (.I0(\retbuf_reg_n_0_[37][3] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][3] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[43]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[43]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[43]_i_4 
       (.I0(\retbuf_reg_n_0_[13][3] ),
        .I1(\retbuf_reg_n_0_[5][3] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[29][3] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[21][3] ),
        .O(\txAXIS_tdata[43]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[43]_i_5 
       (.I0(doutb[43]),
        .I1(\txAXIS_tdata[63]_i_8_0 [43]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [43]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [43]),
        .O(\txAXIS_tdata[43]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hB8FFB800B800B800)) 
    \txAXIS_tdata[43]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [43]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [43]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [43]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[43]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[44]_i_2 
       (.I0(\retbuf_reg_n_0_[37][4] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][4] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[44]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[44]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[44]_i_4 
       (.I0(\retbuf_reg_n_0_[13][4] ),
        .I1(\retbuf_reg_n_0_[5][4] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[29][4] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[21][4] ),
        .O(\txAXIS_tdata[44]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[44]_i_5 
       (.I0(doutb[44]),
        .I1(\txAXIS_tdata[63]_i_8_0 [44]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [44]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [44]),
        .O(\txAXIS_tdata[44]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hB8FFB800B800B800)) 
    \txAXIS_tdata[44]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [44]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [44]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [44]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[44]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[45]_i_2 
       (.I0(\retbuf_reg_n_0_[37][5] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][5] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[45]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[45]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[45]_i_4 
       (.I0(\retbuf_reg_n_0_[13][5] ),
        .I1(\retbuf_reg_n_0_[5][5] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[29][5] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[21][5] ),
        .O(\txAXIS_tdata[45]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[45]_i_5 
       (.I0(doutb[45]),
        .I1(\txAXIS_tdata[63]_i_8_0 [45]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [45]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [45]),
        .O(\txAXIS_tdata[45]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hB8FFB800B800B800)) 
    \txAXIS_tdata[45]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [45]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [45]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [45]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[45]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[46]_i_2 
       (.I0(\retbuf_reg_n_0_[37][6] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][6] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[46]_i_4_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[46]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[46]_i_4 
       (.I0(\retbuf_reg_n_0_[13][6] ),
        .I1(\retbuf_reg_n_0_[5][6] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[29][6] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[21][6] ),
        .O(\txAXIS_tdata[46]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[46]_i_5 
       (.I0(doutb[46]),
        .I1(\txAXIS_tdata[63]_i_8_0 [46]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [46]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [46]),
        .O(\txAXIS_tdata[46]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hB8FFB800B800B800)) 
    \txAXIS_tdata[46]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [46]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [46]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [46]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[46]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2380" *) 
  LUT3 #(
    .INIT(8'h9C)) 
    \txAXIS_tdata[47]_i_10 
       (.I0(\tixVBuffer_reg_n_0_[0] ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\tixVBuffer_reg_n_0_[1] ),
        .O(\txAXIS_tdata[47]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h0000000055757555)) 
    \txAXIS_tdata[47]_i_3 
       (.I0(\txAXIS_tdata[39]_i_3_n_0 ),
        .I1(\stateOp_reg[5]_0 [2]),
        .I2(resid[2]),
        .I3(resid[0]),
        .I4(resid[1]),
        .I5(\txAXIS_tdata[39]_i_4_n_0 ),
        .O(\txAXIS_tdata[47]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFF470047FFFFFFFF)) 
    \txAXIS_tdata[47]_i_4 
       (.I0(\retbuf_reg_n_0_[37][7] ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[0][7] ),
        .I3(\txAXIS_tdata[55]_i_6_n_0 ),
        .I4(\txAXIS_tdata[47]_i_6_n_0 ),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[47]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[47]_i_6 
       (.I0(\retbuf_reg_n_0_[13][7] ),
        .I1(\retbuf_reg_n_0_[5][7] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[29][7] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[21][7] ),
        .O(\txAXIS_tdata[47]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[47]_i_7 
       (.I0(doutb[47]),
        .I1(\txAXIS_tdata[63]_i_8_0 [47]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [47]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [47]),
        .O(\txAXIS_tdata[47]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hB8FFB800B800B800)) 
    \txAXIS_tdata[47]_i_8 
       (.I0(\txAXIS_tdata[63]_i_8_3 [47]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [47]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [47]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[47]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[48]_i_2 
       (.I0(\retbuf_reg_n_0_[14][0] ),
        .I1(\retbuf_reg_n_0_[6][0] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[30][0] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[22][0] ),
        .O(\txAXIS_tdata[48]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF0415FFFFFFFF)) 
    \txAXIS_tdata[48]_i_3 
       (.I0(\txAXIS_tdata[55]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[38][0] ),
        .I3(\retbuf_reg_n_0_[0][0] ),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[48]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[48]_i_5 
       (.I0(doutb[48]),
        .I1(\txAXIS_tdata[63]_i_8_0 [48]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [48]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [48]),
        .O(\txAXIS_tdata[48]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[48]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [48]),
        .I1(\txAXIS_tdata[63]_i_8_4 [48]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [48]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[48]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[49]_i_2 
       (.I0(\retbuf_reg_n_0_[14][1] ),
        .I1(\retbuf_reg_n_0_[6][1] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[30][1] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[22][1] ),
        .O(\txAXIS_tdata[49]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF0415FFFFFFFF)) 
    \txAXIS_tdata[49]_i_3 
       (.I0(\txAXIS_tdata[55]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[38][1] ),
        .I3(\retbuf_reg_n_0_[0][1] ),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[49]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[49]_i_5 
       (.I0(doutb[49]),
        .I1(\txAXIS_tdata[63]_i_8_0 [49]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [49]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [49]),
        .O(\txAXIS_tdata[49]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[49]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [49]),
        .I1(\txAXIS_tdata[63]_i_8_4 [49]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [49]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[49]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h20AAA8AA)) 
    \txAXIS_tdata[4]_i_2 
       (.I0(\txAXIS_tdata[6]_i_7__0_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[32][4] ),
        .I3(\stateOp_reg[5]_0 [4]),
        .I4(\txAXIS_tdata[4]_i_5_n_0 ),
        .O(\txAXIS_tdata[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h000000E200000000)) 
    \txAXIS_tdata[4]_i_4 
       (.I0(\txAXIS_tdata[4]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[4]_i_7_n_0 ),
        .I3(\pollbuf[0][7]_i_7_n_0 ),
        .I4(\stateOp_reg[5]_0 [0]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[4]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[4]_i_5 
       (.I0(\retbuf_reg_n_0_[8][4] ),
        .I1(\retbuf_reg_n_0_[0][4] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[24][4] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg[16]_65 [4]),
        .O(\txAXIS_tdata[4]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[4]_i_6 
       (.I0(doutb[4]),
        .I1(\txAXIS_tdata[63]_i_8_0 [4]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [4]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [4]),
        .O(\txAXIS_tdata[4]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[4]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [4]),
        .I1(\txAXIS_tdata[63]_i_8_4 [4]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [4]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[4]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[50]_i_2 
       (.I0(\retbuf_reg_n_0_[14][2] ),
        .I1(\retbuf_reg_n_0_[6][2] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[30][2] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[22][2] ),
        .O(\txAXIS_tdata[50]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF0415FFFFFFFF)) 
    \txAXIS_tdata[50]_i_3 
       (.I0(\txAXIS_tdata[55]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[38][2] ),
        .I3(\retbuf_reg_n_0_[0][2] ),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[50]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[50]_i_5 
       (.I0(doutb[50]),
        .I1(\txAXIS_tdata[63]_i_8_0 [50]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [50]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [50]),
        .O(\txAXIS_tdata[50]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[50]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [50]),
        .I1(\txAXIS_tdata[63]_i_8_4 [50]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [50]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[50]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[51]_i_2 
       (.I0(\retbuf_reg_n_0_[14][3] ),
        .I1(\retbuf_reg_n_0_[6][3] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[30][3] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[22][3] ),
        .O(\txAXIS_tdata[51]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF0415FFFFFFFF)) 
    \txAXIS_tdata[51]_i_3 
       (.I0(\txAXIS_tdata[55]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[38][3] ),
        .I3(\retbuf_reg_n_0_[0][3] ),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[51]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[51]_i_5 
       (.I0(doutb[51]),
        .I1(\txAXIS_tdata[63]_i_8_0 [51]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [51]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [51]),
        .O(\txAXIS_tdata[51]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[51]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [51]),
        .I1(\txAXIS_tdata[63]_i_8_4 [51]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [51]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[51]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[52]_i_2 
       (.I0(\retbuf_reg_n_0_[14][4] ),
        .I1(\retbuf_reg_n_0_[6][4] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[30][4] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[22][4] ),
        .O(\txAXIS_tdata[52]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF0415FFFFFFFF)) 
    \txAXIS_tdata[52]_i_3 
       (.I0(\txAXIS_tdata[55]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[38][4] ),
        .I3(\retbuf_reg_n_0_[0][4] ),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[52]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[52]_i_5 
       (.I0(doutb[52]),
        .I1(\txAXIS_tdata[63]_i_8_0 [52]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [52]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [52]),
        .O(\txAXIS_tdata[52]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[52]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [52]),
        .I1(\txAXIS_tdata[63]_i_8_4 [52]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [52]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[52]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[53]_i_2 
       (.I0(\retbuf_reg_n_0_[14][5] ),
        .I1(\retbuf_reg_n_0_[6][5] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[30][5] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[22][5] ),
        .O(\txAXIS_tdata[53]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF0415FFFFFFFF)) 
    \txAXIS_tdata[53]_i_3 
       (.I0(\txAXIS_tdata[55]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[38][5] ),
        .I3(\retbuf_reg_n_0_[0][5] ),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[53]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[53]_i_5 
       (.I0(doutb[53]),
        .I1(\txAXIS_tdata[63]_i_8_0 [53]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [53]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [53]),
        .O(\txAXIS_tdata[53]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[53]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [53]),
        .I1(\txAXIS_tdata[63]_i_8_4 [53]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [53]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[53]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[54]_i_2 
       (.I0(\retbuf_reg_n_0_[14][6] ),
        .I1(\retbuf_reg_n_0_[6][6] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[30][6] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[22][6] ),
        .O(\txAXIS_tdata[54]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF0415FFFFFFFF)) 
    \txAXIS_tdata[54]_i_3 
       (.I0(\txAXIS_tdata[55]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[38][6] ),
        .I3(\retbuf_reg_n_0_[0][6] ),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[54]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[54]_i_5 
       (.I0(doutb[54]),
        .I1(\txAXIS_tdata[63]_i_8_0 [54]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [54]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [54]),
        .O(\txAXIS_tdata[54]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[54]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [54]),
        .I1(\txAXIS_tdata[63]_i_8_4 [54]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [54]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[54]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[55]_i_10 
       (.I0(doutb[55]),
        .I1(\txAXIS_tdata[63]_i_8_0 [55]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [55]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [55]),
        .O(\txAXIS_tdata[55]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[55]_i_11 
       (.I0(\txAXIS_tdata[63]_i_8_3 [55]),
        .I1(\txAXIS_tdata[63]_i_8_4 [55]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [55]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[55]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2344" *) 
  LUT4 #(
    .INIT(16'h4000)) 
    \txAXIS_tdata[55]_i_13 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(resid[2]),
        .I3(resid[1]),
        .O(\txAXIS_tdata[55]_i_13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2378" *) 
  LUT3 #(
    .INIT(8'hBA)) 
    \txAXIS_tdata[55]_i_3 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [2]),
        .I2(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[55]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2405" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \txAXIS_tdata[55]_i_4 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [3]),
        .O(\txAXIS_tdata[55]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2420" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \txAXIS_tdata[55]_i_5 
       (.I0(resid[1]),
        .I1(resid[2]),
        .O(\txAXIS_tdata[55]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hF5C50535)) 
    \txAXIS_tdata[55]_i_6 
       (.I0(\opbuf_reg[0]51_in [8]),
        .I1(\invbuf[9][7]_i_6_n_0 ),
        .I2(\wordcnt_reg_n_0_[25] ),
        .I3(\opbuf_reg[0]5 [7]),
        .I4(\opbuf_reg[0]5 [8]),
        .O(\txAXIS_tdata[55]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[55]_i_7 
       (.I0(\retbuf_reg_n_0_[14][7] ),
        .I1(\retbuf_reg_n_0_[6][7] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[30][7] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[22][7] ),
        .O(\txAXIS_tdata[55]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF0415FFFFFFFF)) 
    \txAXIS_tdata[55]_i_8 
       (.I0(\txAXIS_tdata[55]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_9_n_0 ),
        .I2(\retbuf_reg_n_0_[38][7] ),
        .I3(\retbuf_reg_n_0_[0][7] ),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[55]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[56]_i_3 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[39][0] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][0] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[56]_i_5_n_0 ),
        .O(\txAXIS_tdata[56]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[56]_i_4 
       (.I0(\txAXIS_tdata[56]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[56]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[56]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[56]_i_5 
       (.I0(\retbuf_reg_n_0_[15][0] ),
        .I1(\retbuf_reg_n_0_[7][0] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[31][0] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[23][0] ),
        .O(\txAXIS_tdata[56]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[56]_i_6 
       (.I0(doutb[56]),
        .I1(\txAXIS_tdata[63]_i_8_0 [56]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [56]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [56]),
        .O(\txAXIS_tdata[56]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[56]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [56]),
        .I1(\txAXIS_tdata[63]_i_8_4 [56]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [56]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[56]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[57]_i_3 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[39][1] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][1] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[57]_i_5_n_0 ),
        .O(\txAXIS_tdata[57]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[57]_i_4 
       (.I0(\txAXIS_tdata[57]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[57]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[57]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[57]_i_5 
       (.I0(\retbuf_reg_n_0_[15][1] ),
        .I1(\retbuf_reg_n_0_[7][1] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[31][1] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[23][1] ),
        .O(\txAXIS_tdata[57]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[57]_i_6 
       (.I0(doutb[57]),
        .I1(\txAXIS_tdata[63]_i_8_0 [57]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [57]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [57]),
        .O(\txAXIS_tdata[57]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[57]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [57]),
        .I1(\txAXIS_tdata[63]_i_8_4 [57]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [57]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[57]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h888BBB8B)) 
    \txAXIS_tdata[58]_i_2 
       (.I0(\txAXIS_tdata[58]_i_4_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][2] ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\retbuf_reg_n_0_[39][2] ),
        .O(\txAXIS_tdata[58]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[58]_i_4 
       (.I0(\retbuf_reg_n_0_[15][2] ),
        .I1(\retbuf_reg_n_0_[7][2] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[31][2] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[23][2] ),
        .O(\txAXIS_tdata[58]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[58]_i_5 
       (.I0(doutb[58]),
        .I1(\txAXIS_tdata[63]_i_8_0 [58]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [58]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [58]),
        .O(\txAXIS_tdata[58]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[58]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [58]),
        .I1(\txAXIS_tdata[63]_i_8_4 [58]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [58]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[58]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h888BBB8B)) 
    \txAXIS_tdata[59]_i_2 
       (.I0(\txAXIS_tdata[59]_i_4_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][3] ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\retbuf_reg_n_0_[39][3] ),
        .O(\txAXIS_tdata[59]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[59]_i_4 
       (.I0(\retbuf_reg_n_0_[15][3] ),
        .I1(\retbuf_reg_n_0_[7][3] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[31][3] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[23][3] ),
        .O(\txAXIS_tdata[59]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[59]_i_5 
       (.I0(doutb[59]),
        .I1(\txAXIS_tdata[63]_i_8_0 [59]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [59]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [59]),
        .O(\txAXIS_tdata[59]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[59]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [59]),
        .I1(\txAXIS_tdata[63]_i_8_4 [59]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [59]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[59]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2379" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[5]_i_10 
       (.I0(\retbuf_reg_n_0_[24][5] ),
        .I1(\invbuf[9][7]_i_6_n_0 ),
        .I2(\retbuf_reg[16]_65 [5]),
        .O(\txAXIS_tdata[5]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2379" *) 
  LUT3 #(
    .INIT(8'h35)) 
    \txAXIS_tdata[5]_i_11 
       (.I0(\retbuf_reg_n_0_[0][5] ),
        .I1(\retbuf_reg_n_0_[8][5] ),
        .I2(\invbuf[9][7]_i_6_n_0 ),
        .O(\txAXIS_tdata[5]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2407" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \txAXIS_tdata[5]_i_3 
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000002000)) 
    \txAXIS_tdata[5]_i_5 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [2]),
        .I3(\stateOp_reg[5]_0 [1]),
        .I4(\stateOp_reg[5]_0 [0]),
        .I5(\pollbuf[0][7]_i_7_n_0 ),
        .O(\txAXIS_tdata[5]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h0A3AFA3A)) 
    \txAXIS_tdata[5]_i_6 
       (.I0(\retbuf_reg_n_0_[32][5] ),
        .I1(\txAXIS_tdata[5]_i_10_n_0 ),
        .I2(\txAXIS_tdata[55]_i_6_n_0 ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\txAXIS_tdata[5]_i_11_n_0 ),
        .O(\txAXIS_tdata[5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[5]_i_8 
       (.I0(doutb[5]),
        .I1(\txAXIS_tdata[63]_i_8_0 [5]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [5]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [5]),
        .O(\txAXIS_tdata[5]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h470047FF47FF47FF)) 
    \txAXIS_tdata[5]_i_9 
       (.I0(\txAXIS_tdata[63]_i_8_3 [5]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [5]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [5]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[5]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[60]_i_3 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[39][4] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][4] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[60]_i_5_n_0 ),
        .O(\txAXIS_tdata[60]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[60]_i_4 
       (.I0(\txAXIS_tdata[60]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[60]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[60]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[60]_i_5 
       (.I0(\retbuf_reg_n_0_[15][4] ),
        .I1(\retbuf_reg_n_0_[7][4] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[31][4] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[23][4] ),
        .O(\txAXIS_tdata[60]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[60]_i_6 
       (.I0(doutb[60]),
        .I1(\txAXIS_tdata[63]_i_8_0 [60]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [60]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [60]),
        .O(\txAXIS_tdata[60]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[60]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [60]),
        .I1(\txAXIS_tdata[63]_i_8_4 [60]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [60]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[60]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[61]_i_3 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[39][5] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][5] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[61]_i_5_n_0 ),
        .O(\txAXIS_tdata[61]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'hFF1D)) 
    \txAXIS_tdata[61]_i_4 
       (.I0(\txAXIS_tdata[61]_i_6_n_0 ),
        .I1(\txAXIS_tdata[63]_i_13_n_0 ),
        .I2(\txAXIS_tdata[61]_i_7_n_0 ),
        .I3(\txAXIS_tdata[63]_i_12_n_0 ),
        .O(\txAXIS_tdata[61]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[61]_i_5 
       (.I0(\retbuf_reg_n_0_[15][5] ),
        .I1(\retbuf_reg_n_0_[7][5] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[31][5] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[23][5] ),
        .O(\txAXIS_tdata[61]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[61]_i_6 
       (.I0(doutb[61]),
        .I1(\txAXIS_tdata[63]_i_8_0 [61]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [61]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [61]),
        .O(\txAXIS_tdata[61]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[61]_i_7 
       (.I0(\txAXIS_tdata[63]_i_8_3 [61]),
        .I1(\txAXIS_tdata[63]_i_8_4 [61]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [61]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[61]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h888BBB8B)) 
    \txAXIS_tdata[62]_i_2 
       (.I0(\txAXIS_tdata[62]_i_4_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][6] ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\retbuf_reg_n_0_[39][6] ),
        .O(\txAXIS_tdata[62]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[62]_i_4 
       (.I0(\retbuf_reg_n_0_[15][6] ),
        .I1(\retbuf_reg_n_0_[7][6] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[31][6] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[23][6] ),
        .O(\txAXIS_tdata[62]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[62]_i_5 
       (.I0(doutb[62]),
        .I1(\txAXIS_tdata[63]_i_8_0 [62]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [62]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [62]),
        .O(\txAXIS_tdata[62]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[62]_i_6 
       (.I0(\txAXIS_tdata[63]_i_8_3 [62]),
        .I1(\txAXIS_tdata[63]_i_8_4 [62]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [62]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[62]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[63]_i_10 
       (.I0(\retbuf_reg_n_0_[15][7] ),
        .I1(\retbuf_reg_n_0_[7][7] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[31][7] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[23][7] ),
        .O(\txAXIS_tdata[63]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[63]_i_11 
       (.I0(doutb[63]),
        .I1(\txAXIS_tdata[63]_i_8_0 [63]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [63]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [63]),
        .O(\txAXIS_tdata[63]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEFFFFFFFFFFFF)) 
    \txAXIS_tdata[63]_i_12 
       (.I0(\tixVBuffer_reg_n_0_[7] ),
        .I1(\tixVBuffer_reg_n_0_[6] ),
        .I2(\tixVBuffer_reg_n_0_[5] ),
        .I3(p_0_in0),
        .I4(\stateOp_reg[5]_0 [2]),
        .I5(\stateOp_reg[5]_0 [1]),
        .O(\txAXIS_tdata[63]_i_12_n_0 ));
  LUT4 #(
    .INIT(16'hFEE3)) 
    \txAXIS_tdata[63]_i_13 
       (.I0(\tixVBuffer_reg_n_0_[0] ),
        .I1(\tixVBuffer_reg_n_0_[1] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[3] ),
        .O(\txAXIS_tdata[63]_i_13_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[63]_i_14 
       (.I0(\txAXIS_tdata[63]_i_8_3 [63]),
        .I1(\txAXIS_tdata[63]_i_8_4 [63]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [63]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[63]_i_14_n_0 ));
  LUT4 #(
    .INIT(16'h006A)) 
    \txAXIS_tdata[63]_i_15 
       (.I0(\tixVBuffer_reg_n_0_[1] ),
        .I1(\tixVBuffer_reg_n_0_[0] ),
        .I2(\tixVBuffer_reg_n_0_[2] ),
        .I3(\tixVBuffer_reg_n_0_[3] ),
        .O(\txAXIS_tdata[63]_i_15_n_0 ));
  LUT4 #(
    .INIT(16'h00C6)) 
    \txAXIS_tdata[63]_i_16 
       (.I0(\tixVBuffer_reg_n_0_[1] ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\tixVBuffer_reg_n_0_[0] ),
        .I3(\tixVBuffer_reg_n_0_[3] ),
        .O(\txAXIS_tdata[63]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2329" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \txAXIS_tdata[63]_i_3 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\txAXIS_tdata[15]_i_5_n_0 ),
        .I2(\stateOp_reg[5]_0 [1]),
        .I3(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[63]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h4000000444444444)) 
    \txAXIS_tdata[63]_i_4 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(resid[0]),
        .I3(resid[1]),
        .I4(resid[2]),
        .I5(\stateOp_reg[5]_0 [1]),
        .O(\txAXIS_tdata[63]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000003300000133)) 
    \txAXIS_tdata[63]_i_5 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [5]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [0]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[63]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h00008A80AAAA8A80)) 
    \txAXIS_tdata[63]_i_7 
       (.I0(\txAXIS_tdata[15]_i_8_n_0 ),
        .I1(\retbuf_reg_n_0_[39][7] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[0][7] ),
        .I4(\txAXIS_tdata[55]_i_6_n_0 ),
        .I5(\txAXIS_tdata[63]_i_10_n_0 ),
        .O(\txAXIS_tdata[63]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'hCDFD)) 
    \txAXIS_tdata[63]_i_8 
       (.I0(\txAXIS_tdata[63]_i_11_n_0 ),
        .I1(\txAXIS_tdata[63]_i_12_n_0 ),
        .I2(\txAXIS_tdata[63]_i_13_n_0 ),
        .I3(\txAXIS_tdata[63]_i_14_n_0 ),
        .O(\txAXIS_tdata[63]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'hC355)) 
    \txAXIS_tdata[63]_i_9 
       (.I0(\opbuf_reg[0]51_in [7]),
        .I1(\invbuf[9][7]_i_6_n_0 ),
        .I2(\opbuf_reg[0]5 [7]),
        .I3(\wordcnt_reg_n_0_[25] ),
        .O(\txAXIS_tdata[63]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2415" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \txAXIS_tdata[6]_i_10 
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_reg[5]_0 [4]),
        .O(\txAXIS_tdata[6]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[6]_i_11 
       (.I0(doutb[6]),
        .I1(\txAXIS_tdata[63]_i_8_0 [6]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [6]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [6]),
        .O(\txAXIS_tdata[6]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[6]_i_12 
       (.I0(\txAXIS_tdata[63]_i_8_3 [6]),
        .I1(\txAXIS_tdata[63]_i_8_4 [6]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [6]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[6]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'h20AAA8AA)) 
    \txAXIS_tdata[6]_i_2 
       (.I0(\txAXIS_tdata[6]_i_7__0_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[32][6] ),
        .I3(\stateOp_reg[5]_0 [4]),
        .I4(\txAXIS_tdata[6]_i_8_n_0 ),
        .O(\txAXIS_tdata[6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFBFAFBFFFFFFFBAA)) 
    \txAXIS_tdata[6]_i_3 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(\stateOp_reg[5]_0 [3]),
        .I3(\stateOp_reg[5]_0 [1]),
        .I4(\stateOp_reg[5]_0 [0]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0300020000000200)) 
    \txAXIS_tdata[6]_i_5 
       (.I0(\txAXIS_tdata[6]_i_11_n_0 ),
        .I1(\pollbuf[0][7]_i_7_n_0 ),
        .I2(\stateOp_reg[5]_0 [0]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\txAXIS_tdata[63]_i_13_n_0 ),
        .I5(\txAXIS_tdata[6]_i_12_n_0 ),
        .O(\txAXIS_tdata[6]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h00000001FFFFFFFF)) 
    \txAXIS_tdata[6]_i_6__0 
       (.I0(\stateOp_next[5]_i_4_n_0 ),
        .I1(\stateOp_next[4]_i_2_n_0 ),
        .I2(\stateOp_next[1]_i_2_n_0 ),
        .I3(\stateOp_next[5]_i_6_n_0 ),
        .I4(\txAXIS_tdata[29]_i_3_n_0 ),
        .I5(\stateOp_reg[5]_0 [0]),
        .O(\txAXIS_tdata[6]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2301" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \txAXIS_tdata[6]_i_7__0 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [0]),
        .O(\txAXIS_tdata[6]_i_7__0_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[6]_i_8 
       (.I0(\retbuf_reg_n_0_[8][6] ),
        .I1(\retbuf_reg_n_0_[0][6] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[24][6] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg[16]_65 [6]),
        .O(\txAXIS_tdata[6]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2341" *) 
  LUT4 #(
    .INIT(16'h0004)) 
    \txAXIS_tdata[6]_i_9 
       (.I0(\stateOp_reg[5]_0 [2]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(resid[2]),
        .I3(resid[1]),
        .O(\txAXIS_tdata[6]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2301" *) 
  LUT4 #(
    .INIT(16'hFFF1)) 
    \txAXIS_tdata[7]_i_10__0 
       (.I0(\txAXIS_tdata[55]_i_6_n_0 ),
        .I1(\retbuf_reg_n_0_[32][7] ),
        .I2(\stateOp_reg[5]_0 [3]),
        .I3(\stateOp_reg[5]_0 [1]),
        .O(\txAXIS_tdata[7]_i_10__0_n_0 ));
  LUT6 #(
    .INIT(64'h2227772700000000)) 
    \txAXIS_tdata[7]_i_11 
       (.I0(\txAXIS_tdata[63]_i_9_n_0 ),
        .I1(\txAXIS_tdata[7]_i_16_n_0 ),
        .I2(\retbuf_reg[16]_65 [7]),
        .I3(\invbuf[9][7]_i_6_n_0 ),
        .I4(\retbuf_reg_n_0_[24][7] ),
        .I5(\txAXIS_tdata[55]_i_6_n_0 ),
        .O(\txAXIS_tdata[7]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[7]_i_13 
       (.I0(doutb[7]),
        .I1(\txAXIS_tdata[63]_i_8_0 [7]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [7]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [7]),
        .O(\txAXIS_tdata[7]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hB8FFB800B800B800)) 
    \txAXIS_tdata[7]_i_14 
       (.I0(\txAXIS_tdata[63]_i_8_3 [7]),
        .I1(\txAXIS_tdata[47]_i_10_n_0 ),
        .I2(\txAXIS_tdata[63]_i_8_4 [7]),
        .I3(\txAXIS_tdata[63]_i_15_n_0 ),
        .I4(\txAXIS_tdata[63]_i_8_5 [7]),
        .I5(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[7]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2278" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \txAXIS_tdata[7]_i_15 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[7]_i_15_n_0 ));
  LUT3 #(
    .INIT(8'hB8)) 
    \txAXIS_tdata[7]_i_16 
       (.I0(\retbuf_reg_n_0_[8][7] ),
        .I1(\invbuf[9][7]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][7] ),
        .O(\txAXIS_tdata[7]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2370" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \txAXIS_tdata[7]_i_3 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\txAXIS_tdata[63]_i_3_n_0 ),
        .O(\txAXIS_tdata[7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2371" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \txAXIS_tdata[7]_i_4 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[7]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'hC808)) 
    \txAXIS_tdata[7]_i_7 
       (.I0(\txAXIS_tdata[7]_i_13_n_0 ),
        .I1(\txAXIS_tdata[5]_i_5_n_0 ),
        .I2(\txAXIS_tdata[63]_i_13_n_0 ),
        .I3(\txAXIS_tdata[7]_i_14_n_0 ),
        .O(\txAXIS_tdata[7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFF7)) 
    \txAXIS_tdata[7]_i_8 
       (.I0(\txAXIS_tdata[7]_i_15_n_0 ),
        .I1(\stateOp_next[5]_i_3_n_0 ),
        .I2(\stateOp_next[5]_i_6_n_0 ),
        .I3(\stateOp_next[1]_i_2_n_0 ),
        .I4(\stateOp_next[4]_i_2_n_0 ),
        .I5(\stateOp_next[5]_i_4_n_0 ),
        .O(\txAXIS_tdata[7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hBFFFFFFDFFFFFFFF)) 
    \txAXIS_tdata[7]_i_9__0 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\stateOp_reg[5]_0 [0]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\txAXIS_tdata[7]_i_9__0_n_0 ));
  LUT5 #(
    .INIT(32'h888BBB8B)) 
    \txAXIS_tdata[8]_i_3 
       (.I0(\txAXIS_tdata[8]_i_7_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][0] ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\retbuf_reg_n_0_[33][0] ),
        .O(\txAXIS_tdata[8]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[8]_i_4 
       (.I0(\txAXIS_tdata[63]_i_8_3 [8]),
        .I1(\txAXIS_tdata[63]_i_8_4 [8]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [8]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[8]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[8]_i_5 
       (.I0(doutb[8]),
        .I1(\txAXIS_tdata[63]_i_8_0 [8]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [8]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [8]),
        .O(\txAXIS_tdata[8]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[8]_i_7 
       (.I0(\retbuf_reg_n_0_[9][0] ),
        .I1(\retbuf_reg_n_0_[1][0] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[25][0] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[17][0] ),
        .O(\txAXIS_tdata[8]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'h888BBB8B)) 
    \txAXIS_tdata[9]_i_3 
       (.I0(\txAXIS_tdata[9]_i_7_n_0 ),
        .I1(\txAXIS_tdata[55]_i_6_n_0 ),
        .I2(\retbuf_reg_n_0_[0][1] ),
        .I3(\txAXIS_tdata[63]_i_9_n_0 ),
        .I4(\retbuf_reg_n_0_[33][1] ),
        .O(\txAXIS_tdata[9]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hAFA0C0C0)) 
    \txAXIS_tdata[9]_i_4 
       (.I0(\txAXIS_tdata[63]_i_8_3 [9]),
        .I1(\txAXIS_tdata[63]_i_8_4 [9]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_5 [9]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .O(\txAXIS_tdata[9]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[9]_i_5 
       (.I0(doutb[9]),
        .I1(\txAXIS_tdata[63]_i_8_0 [9]),
        .I2(\txAXIS_tdata[63]_i_15_n_0 ),
        .I3(\txAXIS_tdata[63]_i_8_1 [9]),
        .I4(\txAXIS_tdata[63]_i_16_n_0 ),
        .I5(\txAXIS_tdata[63]_i_8_2 [9]),
        .O(\txAXIS_tdata[9]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[9]_i_7 
       (.I0(\retbuf_reg_n_0_[9][1] ),
        .I1(\retbuf_reg_n_0_[1][1] ),
        .I2(\txAXIS_tdata[63]_i_9_n_0 ),
        .I3(\retbuf_reg_n_0_[25][1] ),
        .I4(\invbuf[9][7]_i_6_n_0 ),
        .I5(\retbuf_reg_n_0_[17][1] ),
        .O(\txAXIS_tdata[9]_i_7_n_0 ));
  FDCE \txAXIS_tdata_reg[0] 
       (.C(aclk_sig),
        .CE(myCrc_n_286),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_323),
        .Q(\txAXIS_tdata_reg_n_0_[0] ));
  FDCE \txAXIS_tdata_reg[10] 
       (.C(aclk_sig),
        .CE(myRxtx_n_53),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_280),
        .Q(\txAXIS_tdata_reg_n_0_[10] ));
  FDCE \txAXIS_tdata_reg[11] 
       (.C(aclk_sig),
        .CE(myRxtx_n_53),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_279),
        .Q(\txAXIS_tdata_reg_n_0_[11] ));
  FDCE \txAXIS_tdata_reg[12] 
       (.C(aclk_sig),
        .CE(myRxtx_n_53),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_278),
        .Q(\txAXIS_tdata_reg_n_0_[12] ));
  FDCE \txAXIS_tdata_reg[13] 
       (.C(aclk_sig),
        .CE(myRxtx_n_53),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_277),
        .Q(\txAXIS_tdata_reg_n_0_[13] ));
  FDCE \txAXIS_tdata_reg[14] 
       (.C(aclk_sig),
        .CE(myRxtx_n_53),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_276),
        .Q(\txAXIS_tdata_reg_n_0_[14] ));
  FDCE \txAXIS_tdata_reg[15] 
       (.C(aclk_sig),
        .CE(myRxtx_n_53),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_275),
        .Q(\txAXIS_tdata_reg_n_0_[15] ));
  FDCE \txAXIS_tdata_reg[16] 
       (.C(aclk_sig),
        .CE(myRxtx_n_52),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_317),
        .Q(\txAXIS_tdata_reg_n_0_[16] ));
  FDCE \txAXIS_tdata_reg[17] 
       (.C(aclk_sig),
        .CE(myRxtx_n_52),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_316),
        .Q(\txAXIS_tdata_reg_n_0_[17] ));
  FDCE \txAXIS_tdata_reg[18] 
       (.C(aclk_sig),
        .CE(myRxtx_n_52),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_315),
        .Q(\txAXIS_tdata_reg_n_0_[18] ));
  FDCE \txAXIS_tdata_reg[19] 
       (.C(aclk_sig),
        .CE(myRxtx_n_52),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_314),
        .Q(\txAXIS_tdata_reg_n_0_[19] ));
  FDCE \txAXIS_tdata_reg[1] 
       (.C(aclk_sig),
        .CE(myCrc_n_286),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_284),
        .Q(\txAXIS_tdata_reg_n_0_[1] ));
  MUXF7 \txAXIS_tdata_reg[1]_i_6 
       (.I0(\txAXIS_tdata[1]_i_7_n_0 ),
        .I1(\txAXIS_tdata[1]_i_8_n_0 ),
        .O(\txAXIS_tdata_reg[1]_i_6_n_0 ),
        .S(\txAXIS_tdata[63]_i_13_n_0 ));
  FDCE \txAXIS_tdata_reg[20] 
       (.C(aclk_sig),
        .CE(myRxtx_n_52),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_313),
        .Q(\txAXIS_tdata_reg_n_0_[20] ));
  FDCE \txAXIS_tdata_reg[21] 
       (.C(aclk_sig),
        .CE(myRxtx_n_52),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_312),
        .Q(\txAXIS_tdata_reg_n_0_[21] ));
  FDCE \txAXIS_tdata_reg[22] 
       (.C(aclk_sig),
        .CE(myRxtx_n_52),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_311),
        .Q(\txAXIS_tdata_reg_n_0_[22] ));
  FDCE \txAXIS_tdata_reg[23] 
       (.C(aclk_sig),
        .CE(myRxtx_n_52),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_310),
        .Q(\txAXIS_tdata_reg_n_0_[23] ));
  FDCE \txAXIS_tdata_reg[24] 
       (.C(aclk_sig),
        .CE(myRxtx_n_51),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_309),
        .Q(\txAXIS_tdata_reg_n_0_[24] ));
  FDCE \txAXIS_tdata_reg[25] 
       (.C(aclk_sig),
        .CE(myRxtx_n_51),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_308),
        .Q(\txAXIS_tdata_reg_n_0_[25] ));
  FDCE \txAXIS_tdata_reg[26] 
       (.C(aclk_sig),
        .CE(myRxtx_n_51),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_307),
        .Q(\txAXIS_tdata_reg_n_0_[26] ));
  FDCE \txAXIS_tdata_reg[27] 
       (.C(aclk_sig),
        .CE(myRxtx_n_51),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_306),
        .Q(\txAXIS_tdata_reg_n_0_[27] ));
  FDCE \txAXIS_tdata_reg[28] 
       (.C(aclk_sig),
        .CE(myRxtx_n_51),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_305),
        .Q(\txAXIS_tdata_reg_n_0_[28] ));
  FDCE \txAXIS_tdata_reg[29] 
       (.C(aclk_sig),
        .CE(myRxtx_n_51),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_304),
        .Q(\txAXIS_tdata_reg_n_0_[29] ));
  FDCE \txAXIS_tdata_reg[2] 
       (.C(aclk_sig),
        .CE(myCrc_n_286),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_322),
        .Q(\txAXIS_tdata_reg_n_0_[2] ));
  FDCE \txAXIS_tdata_reg[30] 
       (.C(aclk_sig),
        .CE(myRxtx_n_51),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_303),
        .Q(\txAXIS_tdata_reg_n_0_[30] ));
  FDCE \txAXIS_tdata_reg[31] 
       (.C(aclk_sig),
        .CE(myRxtx_n_51),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_302),
        .Q(\txAXIS_tdata_reg_n_0_[31] ));
  FDCE \txAXIS_tdata_reg[32] 
       (.C(aclk_sig),
        .CE(myRxtx_n_50),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_301),
        .Q(\txAXIS_tdata_reg_n_0_[32] ));
  FDCE \txAXIS_tdata_reg[33] 
       (.C(aclk_sig),
        .CE(myRxtx_n_50),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_300),
        .Q(\txAXIS_tdata_reg_n_0_[33] ));
  FDCE \txAXIS_tdata_reg[34] 
       (.C(aclk_sig),
        .CE(myRxtx_n_50),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_299),
        .Q(\txAXIS_tdata_reg_n_0_[34] ));
  FDCE \txAXIS_tdata_reg[35] 
       (.C(aclk_sig),
        .CE(myRxtx_n_50),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_298),
        .Q(\txAXIS_tdata_reg_n_0_[35] ));
  FDCE \txAXIS_tdata_reg[36] 
       (.C(aclk_sig),
        .CE(myRxtx_n_50),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_297),
        .Q(\txAXIS_tdata_reg_n_0_[36] ));
  FDCE \txAXIS_tdata_reg[37] 
       (.C(aclk_sig),
        .CE(myRxtx_n_50),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_296),
        .Q(\txAXIS_tdata_reg_n_0_[37] ));
  FDCE \txAXIS_tdata_reg[38] 
       (.C(aclk_sig),
        .CE(myRxtx_n_50),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_295),
        .Q(\txAXIS_tdata_reg_n_0_[38] ));
  FDCE \txAXIS_tdata_reg[39] 
       (.C(aclk_sig),
        .CE(myRxtx_n_50),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_294),
        .Q(\txAXIS_tdata_reg_n_0_[39] ));
  FDCE \txAXIS_tdata_reg[3] 
       (.C(aclk_sig),
        .CE(myCrc_n_286),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_283),
        .Q(\txAXIS_tdata_reg_n_0_[3] ));
  MUXF7 \txAXIS_tdata_reg[3]_i_6 
       (.I0(\txAXIS_tdata[3]_i_8_n_0 ),
        .I1(\txAXIS_tdata[3]_i_9_n_0 ),
        .O(\txAXIS_tdata_reg[3]_i_6_n_0 ),
        .S(\txAXIS_tdata[63]_i_13_n_0 ));
  FDCE \txAXIS_tdata_reg[40] 
       (.C(aclk_sig),
        .CE(myRxtx_n_49),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_274),
        .Q(\txAXIS_tdata_reg_n_0_[40] ));
  FDCE \txAXIS_tdata_reg[41] 
       (.C(aclk_sig),
        .CE(myRxtx_n_49),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_273),
        .Q(\txAXIS_tdata_reg_n_0_[41] ));
  FDCE \txAXIS_tdata_reg[42] 
       (.C(aclk_sig),
        .CE(myRxtx_n_49),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_272),
        .Q(\txAXIS_tdata_reg_n_0_[42] ));
  FDCE \txAXIS_tdata_reg[43] 
       (.C(aclk_sig),
        .CE(myRxtx_n_49),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_271),
        .Q(\txAXIS_tdata_reg_n_0_[43] ));
  FDCE \txAXIS_tdata_reg[44] 
       (.C(aclk_sig),
        .CE(myRxtx_n_49),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_270),
        .Q(\txAXIS_tdata_reg_n_0_[44] ));
  FDCE \txAXIS_tdata_reg[45] 
       (.C(aclk_sig),
        .CE(myRxtx_n_49),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_269),
        .Q(\txAXIS_tdata_reg_n_0_[45] ));
  FDCE \txAXIS_tdata_reg[46] 
       (.C(aclk_sig),
        .CE(myRxtx_n_49),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_268),
        .Q(\txAXIS_tdata_reg_n_0_[46] ));
  FDCE \txAXIS_tdata_reg[47] 
       (.C(aclk_sig),
        .CE(myRxtx_n_49),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_267),
        .Q(\txAXIS_tdata_reg_n_0_[47] ));
  FDCE \txAXIS_tdata_reg[48] 
       (.C(aclk_sig),
        .CE(myRxtx_n_48),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_293),
        .Q(\txAXIS_tdata_reg_n_0_[48] ));
  FDCE \txAXIS_tdata_reg[49] 
       (.C(aclk_sig),
        .CE(myRxtx_n_48),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_292),
        .Q(\txAXIS_tdata_reg_n_0_[49] ));
  FDCE \txAXIS_tdata_reg[4] 
       (.C(aclk_sig),
        .CE(myCrc_n_286),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_321),
        .Q(\txAXIS_tdata_reg_n_0_[4] ));
  FDCE \txAXIS_tdata_reg[50] 
       (.C(aclk_sig),
        .CE(myRxtx_n_48),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_291),
        .Q(\txAXIS_tdata_reg_n_0_[50] ));
  FDCE \txAXIS_tdata_reg[51] 
       (.C(aclk_sig),
        .CE(myRxtx_n_48),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_290),
        .Q(\txAXIS_tdata_reg_n_0_[51] ));
  FDCE \txAXIS_tdata_reg[52] 
       (.C(aclk_sig),
        .CE(myRxtx_n_48),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_289),
        .Q(\txAXIS_tdata_reg_n_0_[52] ));
  FDCE \txAXIS_tdata_reg[53] 
       (.C(aclk_sig),
        .CE(myRxtx_n_48),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_288),
        .Q(\txAXIS_tdata_reg_n_0_[53] ));
  FDCE \txAXIS_tdata_reg[54] 
       (.C(aclk_sig),
        .CE(myRxtx_n_48),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_287),
        .Q(\txAXIS_tdata_reg_n_0_[54] ));
  FDCE \txAXIS_tdata_reg[55] 
       (.C(aclk_sig),
        .CE(myRxtx_n_48),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_286),
        .Q(\txAXIS_tdata_reg_n_0_[55] ));
  FDCE \txAXIS_tdata_reg[56] 
       (.C(aclk_sig),
        .CE(myRxtx_n_47),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_285),
        .Q(\txAXIS_tdata_reg_n_0_[56] ));
  FDCE \txAXIS_tdata_reg[57] 
       (.C(aclk_sig),
        .CE(myRxtx_n_47),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_284),
        .Q(\txAXIS_tdata_reg_n_0_[57] ));
  FDCE \txAXIS_tdata_reg[58] 
       (.C(aclk_sig),
        .CE(myRxtx_n_47),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_283),
        .Q(\txAXIS_tdata_reg_n_0_[58] ));
  FDCE \txAXIS_tdata_reg[59] 
       (.C(aclk_sig),
        .CE(myRxtx_n_47),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_282),
        .Q(\txAXIS_tdata_reg_n_0_[59] ));
  FDCE \txAXIS_tdata_reg[5] 
       (.C(aclk_sig),
        .CE(myCrc_n_286),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_320),
        .Q(\txAXIS_tdata_reg_n_0_[5] ));
  MUXF7 \txAXIS_tdata_reg[5]_i_4 
       (.I0(\txAXIS_tdata[5]_i_8_n_0 ),
        .I1(\txAXIS_tdata[5]_i_9_n_0 ),
        .O(\txAXIS_tdata_reg[5]_i_4_n_0 ),
        .S(\txAXIS_tdata[63]_i_13_n_0 ));
  FDCE \txAXIS_tdata_reg[60] 
       (.C(aclk_sig),
        .CE(myRxtx_n_47),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_281),
        .Q(\txAXIS_tdata_reg_n_0_[60] ));
  FDCE \txAXIS_tdata_reg[61] 
       (.C(aclk_sig),
        .CE(myRxtx_n_47),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_280),
        .Q(\txAXIS_tdata_reg_n_0_[61] ));
  FDCE \txAXIS_tdata_reg[62] 
       (.C(aclk_sig),
        .CE(myRxtx_n_47),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_279),
        .Q(\txAXIS_tdata_reg_n_0_[62] ));
  FDCE \txAXIS_tdata_reg[63] 
       (.C(aclk_sig),
        .CE(myRxtx_n_47),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_278),
        .Q(\txAXIS_tdata_reg_n_0_[63] ));
  FDCE \txAXIS_tdata_reg[6] 
       (.C(aclk_sig),
        .CE(myCrc_n_286),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_319),
        .Q(\txAXIS_tdata_reg_n_0_[6] ));
  FDCE \txAXIS_tdata_reg[7] 
       (.C(aclk_sig),
        .CE(myCrc_n_286),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_318),
        .Q(\txAXIS_tdata_reg_n_0_[7] ));
  FDCE \txAXIS_tdata_reg[8] 
       (.C(aclk_sig),
        .CE(myRxtx_n_53),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_282),
        .Q(\txAXIS_tdata_reg_n_0_[8] ));
  FDCE \txAXIS_tdata_reg[9] 
       (.C(aclk_sig),
        .CE(myRxtx_n_53),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myCrc_n_281),
        .Q(\txAXIS_tdata_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair2280" *) 
  LUT5 #(
    .INIT(32'h080808FF)) 
    \txlen[0]_i_2 
       (.I0(\tixVCommand_reg_n_0_[0] ),
        .I1(\ixRetbufCrc[5]_i_3_n_0 ),
        .I2(\ixRetbufCrc[5]_i_4_n_0 ),
        .I3(\resid[2]_i_7_n_0 ),
        .I4(\resid[2]_i_8_n_0 ),
        .O(\txlen[0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2368" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \txlen[28]_i_4 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [3]),
        .O(\txlen[28]_i_4_n_0 ));
  FDCE \txlen_reg[0] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_534),
        .Q(txlen[0]));
  FDCE \txlen_reg[10] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_224),
        .Q(txlen[10]));
  FDCE \txlen_reg[11] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_223),
        .Q(txlen[11]));
  FDCE \txlen_reg[12] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_222),
        .Q(txlen[12]));
  FDCE \txlen_reg[13] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_221),
        .Q(txlen[13]));
  FDCE \txlen_reg[14] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_220),
        .Q(txlen[14]));
  FDCE \txlen_reg[15] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_219),
        .Q(txlen[15]));
  FDCE \txlen_reg[16] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_218),
        .Q(txlen[16]));
  FDCE \txlen_reg[17] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_217),
        .Q(txlen[17]));
  FDCE \txlen_reg[18] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_216),
        .Q(txlen[18]));
  FDCE \txlen_reg[19] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_215),
        .Q(txlen[19]));
  FDCE \txlen_reg[1] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_233),
        .Q(txlen[1]));
  FDCE \txlen_reg[20] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_214),
        .Q(txlen[20]));
  FDCE \txlen_reg[21] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_213),
        .Q(txlen[21]));
  FDCE \txlen_reg[22] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_212),
        .Q(txlen[22]));
  FDCE \txlen_reg[23] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_211),
        .Q(txlen[23]));
  FDCE \txlen_reg[24] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_210),
        .Q(txlen[24]));
  FDCE \txlen_reg[25] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_209),
        .Q(txlen[25]));
  FDCE \txlen_reg[26] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_208),
        .Q(txlen[26]));
  FDCE \txlen_reg[27] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_207),
        .Q(txlen[27]));
  FDCE \txlen_reg[28] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_206),
        .Q(txlen[28]));
  FDCE \txlen_reg[2] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_232),
        .Q(txlen[2]));
  FDCE \txlen_reg[3] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_231),
        .Q(txlen[3]));
  FDCE \txlen_reg[4] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_230),
        .Q(txlen[4]));
  FDCE \txlen_reg[5] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_229),
        .Q(txlen[5]));
  FDCE \txlen_reg[6] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_228),
        .Q(txlen[6]));
  FDCE \txlen_reg[7] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_227),
        .Q(txlen[7]));
  FDCE \txlen_reg[8] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_226),
        .Q(txlen[8]));
  FDCE \txlen_reg[9] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_225),
        .Q(txlen[9]));
  LUT4 #(
    .INIT(16'hFFFE)) 
    vsync_last_i_2
       (.I0(reqInvDecimSet),
        .I1(reqInvDecimConfig),
        .I2(reqInvDecimAcquire),
        .I3(reqInvDecimUnlock),
        .O(\tixVCommand_reg[0]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2299" *) 
  LUT5 #(
    .INIT(32'h40FFFFFF)) 
    \wordcntCrcLast[0]_i_2 
       (.I0(\ixRetbufCrc[5]_i_4_n_0 ),
        .I1(\ixRetbufCrc[5]_i_3_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(\resid[2]_i_7_n_0 ),
        .I4(\resid[0]_i_2_n_0 ),
        .O(\wordcntCrcLast[0]_i_2_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[16]_i_10 
       (.I0(plusOp[12]),
        .O(\wordcntCrcLast[16]_i_10_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[16]_i_3 
       (.I0(plusOp[19]),
        .O(\wordcntCrcLast[16]_i_3_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[16]_i_4 
       (.I0(plusOp[18]),
        .O(\wordcntCrcLast[16]_i_4_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[16]_i_5 
       (.I0(plusOp[17]),
        .O(\wordcntCrcLast[16]_i_5_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[16]_i_6 
       (.I0(plusOp[16]),
        .O(\wordcntCrcLast[16]_i_6_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[16]_i_7 
       (.I0(plusOp[15]),
        .O(\wordcntCrcLast[16]_i_7_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[16]_i_8 
       (.I0(plusOp[14]),
        .O(\wordcntCrcLast[16]_i_8_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[16]_i_9 
       (.I0(plusOp[13]),
        .O(\wordcntCrcLast[16]_i_9_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[24]_i_10 
       (.I0(plusOp[24]),
        .O(\wordcntCrcLast[24]_i_10_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[24]_i_11 
       (.I0(plusOp[23]),
        .O(\wordcntCrcLast[24]_i_11_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[24]_i_12 
       (.I0(plusOp[22]),
        .O(\wordcntCrcLast[24]_i_12_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[24]_i_13 
       (.I0(plusOp[21]),
        .O(\wordcntCrcLast[24]_i_13_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[24]_i_14 
       (.I0(plusOp[20]),
        .O(\wordcntCrcLast[24]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2263" *) 
  LUT5 #(
    .INIT(32'hFFE7FFFF)) 
    \wordcntCrcLast[24]_i_3 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [0]),
        .I3(\stateOp_reg[5]_0 [5]),
        .I4(\stateOp_reg[5]_0 [2]),
        .O(\wordcntCrcLast[24]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h00002000)) 
    \wordcntCrcLast[24]_i_4 
       (.I0(\wordcntCrcLast[24]_i_6_n_0 ),
        .I1(\wordcntLast[0]_i_7_n_0 ),
        .I2(\resid[2]_i_7_n_0 ),
        .I3(\resid[0]_i_2_n_0 ),
        .I4(\ixRetbufCrc[4]_i_2_n_0 ),
        .O(\wordcntCrcLast[24]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2325" *) 
  LUT4 #(
    .INIT(16'hAA8A)) 
    \wordcntCrcLast[24]_i_6 
       (.I0(\resid[2]_i_4_n_0 ),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(\ixRetbufCrc[5]_i_3_n_0 ),
        .I3(\ixRetbufCrc[5]_i_4_n_0 ),
        .O(\wordcntCrcLast[24]_i_6_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[24]_i_7 
       (.I0(plusOp[27]),
        .O(\wordcntCrcLast[24]_i_7_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[24]_i_8 
       (.I0(plusOp[26]),
        .O(\wordcntCrcLast[24]_i_8_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[24]_i_9 
       (.I0(plusOp[25]),
        .O(\wordcntCrcLast[24]_i_9_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[8]_i_10 
       (.I0(plusOp[4]),
        .O(\wordcntCrcLast[8]_i_10_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[8]_i_3 
       (.I0(plusOp[11]),
        .O(\wordcntCrcLast[8]_i_3_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[8]_i_4 
       (.I0(plusOp[10]),
        .O(\wordcntCrcLast[8]_i_4_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[8]_i_5 
       (.I0(plusOp[9]),
        .O(\wordcntCrcLast[8]_i_5_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[8]_i_6 
       (.I0(plusOp[8]),
        .O(\wordcntCrcLast[8]_i_6_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[8]_i_7 
       (.I0(plusOp[7]),
        .O(\wordcntCrcLast[8]_i_7_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[8]_i_8 
       (.I0(plusOp[6]),
        .O(\wordcntCrcLast[8]_i_8_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \wordcntCrcLast[8]_i_9 
       (.I0(plusOp[5]),
        .O(\wordcntCrcLast[8]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_427),
        .Q(\wordcntCrcLast_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[10] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_417),
        .Q(\wordcntCrcLast_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[11] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_416),
        .Q(\wordcntCrcLast_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[12] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_415),
        .Q(\wordcntCrcLast_reg_n_0_[12] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[13] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_414),
        .Q(\wordcntCrcLast_reg_n_0_[13] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[14] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_413),
        .Q(\wordcntCrcLast_reg_n_0_[14] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[15] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_412),
        .Q(\wordcntCrcLast_reg_n_0_[15] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[16] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_411),
        .Q(\wordcntCrcLast_reg_n_0_[16] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcntCrcLast_reg[16]_i_2 
       (.CI(\wordcntCrcLast_reg[8]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcntCrcLast_reg[16]_i_2_n_0 ,\wordcntCrcLast_reg[16]_i_2_n_1 ,\wordcntCrcLast_reg[16]_i_2_n_2 ,\wordcntCrcLast_reg[16]_i_2_n_3 ,\wordcntCrcLast_reg[16]_i_2_n_4 ,\wordcntCrcLast_reg[16]_i_2_n_5 ,\wordcntCrcLast_reg[16]_i_2_n_6 ,\wordcntCrcLast_reg[16]_i_2_n_7 }),
        .DI(plusOp[19:12]),
        .O({\wordcntCrcLast_reg[16]_i_2_n_8 ,\wordcntCrcLast_reg[16]_i_2_n_9 ,\wordcntCrcLast_reg[16]_i_2_n_10 ,\wordcntCrcLast_reg[16]_i_2_n_11 ,\wordcntCrcLast_reg[16]_i_2_n_12 ,\wordcntCrcLast_reg[16]_i_2_n_13 ,\wordcntCrcLast_reg[16]_i_2_n_14 ,\wordcntCrcLast_reg[16]_i_2_n_15 }),
        .S({\wordcntCrcLast[16]_i_3_n_0 ,\wordcntCrcLast[16]_i_4_n_0 ,\wordcntCrcLast[16]_i_5_n_0 ,\wordcntCrcLast[16]_i_6_n_0 ,\wordcntCrcLast[16]_i_7_n_0 ,\wordcntCrcLast[16]_i_8_n_0 ,\wordcntCrcLast[16]_i_9_n_0 ,\wordcntCrcLast[16]_i_10_n_0 }));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[17] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_410),
        .Q(\wordcntCrcLast_reg_n_0_[17] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[18] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_409),
        .Q(\wordcntCrcLast_reg_n_0_[18] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[19] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_408),
        .Q(\wordcntCrcLast_reg_n_0_[19] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_426),
        .Q(\wordcntCrcLast_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[20] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_407),
        .Q(\wordcntCrcLast_reg_n_0_[20] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[21] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_406),
        .Q(\wordcntCrcLast_reg_n_0_[21] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[22] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_405),
        .Q(\wordcntCrcLast_reg_n_0_[22] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[23] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_404),
        .Q(\wordcntCrcLast_reg_n_0_[23] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[24] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_403),
        .Q(\wordcntCrcLast_reg_n_0_[24] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcntCrcLast_reg[24]_i_5 
       (.CI(\wordcntCrcLast_reg[16]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_wordcntCrcLast_reg[24]_i_5_CO_UNCONNECTED [7],\wordcntCrcLast_reg[24]_i_5_n_1 ,\wordcntCrcLast_reg[24]_i_5_n_2 ,\wordcntCrcLast_reg[24]_i_5_n_3 ,\wordcntCrcLast_reg[24]_i_5_n_4 ,\wordcntCrcLast_reg[24]_i_5_n_5 ,\wordcntCrcLast_reg[24]_i_5_n_6 ,\wordcntCrcLast_reg[24]_i_5_n_7 }),
        .DI({1'b0,plusOp[26:20]}),
        .O({\wordcntCrcLast_reg[24]_i_5_n_8 ,\wordcntCrcLast_reg[24]_i_5_n_9 ,\wordcntCrcLast_reg[24]_i_5_n_10 ,\wordcntCrcLast_reg[24]_i_5_n_11 ,\wordcntCrcLast_reg[24]_i_5_n_12 ,\wordcntCrcLast_reg[24]_i_5_n_13 ,\wordcntCrcLast_reg[24]_i_5_n_14 ,\wordcntCrcLast_reg[24]_i_5_n_15 }),
        .S({\wordcntCrcLast[24]_i_7_n_0 ,\wordcntCrcLast[24]_i_8_n_0 ,\wordcntCrcLast[24]_i_9_n_0 ,\wordcntCrcLast[24]_i_10_n_0 ,\wordcntCrcLast[24]_i_11_n_0 ,\wordcntCrcLast[24]_i_12_n_0 ,\wordcntCrcLast[24]_i_13_n_0 ,\wordcntCrcLast[24]_i_14_n_0 }));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_425),
        .Q(\wordcntCrcLast_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_424),
        .Q(\wordcntCrcLast_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_423),
        .Q(\wordcntCrcLast_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_422),
        .Q(\wordcntCrcLast_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_421),
        .Q(\wordcntCrcLast_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_420),
        .Q(\wordcntCrcLast_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[8] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_419),
        .Q(\wordcntCrcLast_reg_n_0_[8] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcntCrcLast_reg[8]_i_2 
       (.CI(plusOp[3]),
        .CI_TOP(1'b0),
        .CO({\wordcntCrcLast_reg[8]_i_2_n_0 ,\wordcntCrcLast_reg[8]_i_2_n_1 ,\wordcntCrcLast_reg[8]_i_2_n_2 ,\wordcntCrcLast_reg[8]_i_2_n_3 ,\wordcntCrcLast_reg[8]_i_2_n_4 ,\wordcntCrcLast_reg[8]_i_2_n_5 ,\wordcntCrcLast_reg[8]_i_2_n_6 ,\wordcntCrcLast_reg[8]_i_2_n_7 }),
        .DI(plusOp[11:4]),
        .O({\wordcntCrcLast_reg[8]_i_2_n_8 ,\wordcntCrcLast_reg[8]_i_2_n_9 ,\wordcntCrcLast_reg[8]_i_2_n_10 ,\wordcntCrcLast_reg[8]_i_2_n_11 ,\wordcntCrcLast_reg[8]_i_2_n_12 ,\wordcntCrcLast_reg[8]_i_2_n_13 ,\wordcntCrcLast_reg[8]_i_2_n_14 ,\wordcntCrcLast_reg[8]_i_2_n_15 }),
        .S({\wordcntCrcLast[8]_i_3_n_0 ,\wordcntCrcLast[8]_i_4_n_0 ,\wordcntCrcLast[8]_i_5_n_0 ,\wordcntCrcLast[8]_i_6_n_0 ,\wordcntCrcLast[8]_i_7_n_0 ,\wordcntCrcLast[8]_i_8_n_0 ,\wordcntCrcLast[8]_i_9_n_0 ,\wordcntCrcLast[8]_i_10_n_0 }));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[9] 
       (.C(aclk_sig),
        .CE(myRxtx_n_35),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_418),
        .Q(\wordcntCrcLast_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'h000F000E0000000E)) 
    \wordcntLast[0]_i_10 
       (.I0(\resid[0]_i_5_n_0 ),
        .I1(\ixRetbufCrc[4]_i_2_n_0 ),
        .I2(\wordcntLast[0]_i_12_n_0 ),
        .I3(\resid[2]_i_20_n_0 ),
        .I4(\retbuf[7][7]_i_4_n_0 ),
        .I5(\tixVCommand_reg_n_0_[0] ),
        .O(\wordcntLast[0]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hAABAAABAFFFFAABA)) 
    \wordcntLast[0]_i_11 
       (.I0(\resid[2]_i_16_n_0 ),
        .I1(\ixRetbufCrc[5]_i_4_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .I3(\resid[2]_i_30_n_0 ),
        .I4(targetNotSteady_i_3_n_0),
        .I5(ackInvConfig_sig_i_7_n_0),
        .O(\wordcntLast[0]_i_11_n_0 ));
  LUT5 #(
    .INIT(32'h00000100)) 
    \wordcntLast[0]_i_12 
       (.I0(\stateCorecfg[2]_i_8_n_0 ),
        .I1(\stateOp[5]_i_76_n_0 ),
        .I2(\retbuf[0][0]_i_3_n_0 ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\stateCorecfg[2]_i_9_n_0 ),
        .O(\wordcntLast[0]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2334" *) 
  LUT4 #(
    .INIT(16'h0DDD)) 
    \wordcntLast[0]_i_2 
       (.I0(plusOp[3]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [3]),
        .I3(\wordcntLast[0]_i_5_n_0 ),
        .O(\wordcntLast[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0A2000000A200A00)) 
    \wordcntLast[0]_i_3 
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\stateOp_reg[5]_0 [1]),
        .I4(\stateOp_reg[5]_0 [2]),
        .I5(\wordcntLast[0]_i_5_n_0 ),
        .O(\wordcntLast[0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h080000007F77BBBB)) 
    \wordcntLast[0]_i_4 
       (.I0(\stateOp_reg[5]_0 [3]),
        .I1(\wordcntLast[0]_i_6_n_0 ),
        .I2(\wordcntLast[0]_i_7_n_0 ),
        .I3(\wordcntLast[0]_i_8_n_0 ),
        .I4(\stateOp_reg[5]_0 [2]),
        .I5(\wordcntLast[0]_i_5_n_0 ),
        .O(\wordcntLast[0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000100000000)) 
    \wordcntLast[0]_i_5 
       (.I0(\ixRetbufCrc[4]_i_4_n_0 ),
        .I1(\ixRetbufCrc[4]_i_3_n_0 ),
        .I2(\tixVController_reg_n_0_[0] ),
        .I3(stateOp_i_5__1_n_0),
        .I4(\ixRetbufCrc[4]_i_5_n_0 ),
        .I5(\tixVCommand_reg_n_0_[0] ),
        .O(\wordcntLast[0]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2408" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcntLast[0]_i_6 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [4]),
        .O(\wordcntLast[0]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2280" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \wordcntLast[0]_i_7 
       (.I0(\ixRetbufCrc[5]_i_4_n_0 ),
        .I1(\ixRetbufCrc[5]_i_3_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .O(\wordcntLast[0]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hF0F1F0F1F0F1F0FF)) 
    \wordcntLast[0]_i_8 
       (.I0(\wordcntLast[0]_i_9_n_0 ),
        .I1(\resid[2]_i_20_n_0 ),
        .I2(\wordcntLast[0]_i_10_n_0 ),
        .I3(\resid[2]_i_23_n_0 ),
        .I4(\wordcntLast[0]_i_11_n_0 ),
        .I5(\resid[0]_i_6_n_0 ),
        .O(\wordcntLast[0]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h010101010D010101)) 
    \wordcntLast[0]_i_9 
       (.I0(\resid[2]_i_21_n_0 ),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(\ixRetbufCrc[5]_i_4_n_0 ),
        .I3(\resid[2]_i_25_n_0 ),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\ixRetbufCrc[4]_i_4_n_0 ),
        .O(\wordcntLast[0]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2328" *) 
  LUT4 #(
    .INIT(16'hFFFD)) 
    \wordcntLast[28]_i_10 
       (.I0(\tixVBuffer_reg_n_0_[3] ),
        .I1(\tixVBuffer_reg_n_0_[0] ),
        .I2(\tixVBuffer_reg_n_0_[1] ),
        .I3(\tixVBuffer_reg_n_0_[2] ),
        .O(\wordcntLast[28]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h0000000022200020)) 
    \wordcntLast[28]_i_12 
       (.I0(\tixVBuffer_reg_n_0_[1] ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(ackCoobufCornerToHostif),
        .I3(\tixVBuffer_reg_n_0_[0] ),
        .I4(ackFlgbufTraceToHostif),
        .I5(\wordcntLast[28]_i_19_n_0 ),
        .O(\wordcntLast[28]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \wordcntLast[28]_i_19 
       (.I0(\tixVBuffer_reg_n_0_[3] ),
        .I1(\tixVBuffer_reg_n_0_[7] ),
        .I2(\tixVBuffer_reg_n_0_[6] ),
        .I3(\tixVBuffer_reg_n_0_[5] ),
        .I4(p_0_in0),
        .O(\wordcntLast[28]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hFCF3FFFCBFFFFFFF)) 
    \wordcntLast[28]_i_3 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [0]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [2]),
        .I5(\stateOp_reg[5]_0 [1]),
        .O(\wordcntLast[28]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2275" *) 
  LUT5 #(
    .INIT(32'hFBD7FFFB)) 
    \wordcntLast[28]_i_4 
       (.I0(\stateOp_reg[5]_0 [0]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [4]),
        .I3(\stateOp_reg[5]_0 [3]),
        .I4(\stateOp_reg[5]_0 [2]),
        .O(\wordcntLast[28]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00008F88)) 
    \wordcntLast[28]_i_5 
       (.I0(\wordcntLast[28]_i_8_n_0 ),
        .I1(\wordcntLast[28]_i_9_n_0 ),
        .I2(\wordcntLast[28]_i_10_n_0 ),
        .I3(ackSeqbufHshktrackToHostif),
        .I4(\pollbuf[0][7]_i_7_n_0 ),
        .I5(\wordcntLast[28]_i_12_n_0 ),
        .O(\wordcntLast[28]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000004000000)) 
    \wordcntLast[28]_i_6 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(\stateOp_reg[5]_0 [3]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\stateOp_reg[5]_0 [0]),
        .I5(\stateOp_reg[5]_0 [1]),
        .O(\wordcntLast[28]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \wordcntLast[28]_i_8 
       (.I0(ackSeqbufVidtrackToHostif),
        .I1(ackSeqbufCputrackToHostif),
        .I2(\tixVBuffer_reg_n_0_[1] ),
        .I3(ackSeqbufMemtrackToHostif),
        .I4(\tixVBuffer_reg_n_0_[0] ),
        .I5(ackPvwbufDecimToHostif),
        .O(\wordcntLast[28]_i_8_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \wordcntLast[28]_i_9 
       (.I0(\tixVBuffer_reg_n_0_[2] ),
        .I1(\tixVBuffer_reg_n_0_[3] ),
        .O(\wordcntLast[28]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2299" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \wordcntLast[2]_i_2 
       (.I0(\ixRetbufCrc[5]_i_4_n_0 ),
        .I1(\ixRetbufCrc[5]_i_3_n_0 ),
        .I2(\tixVCommand_reg_n_0_[0] ),
        .O(\wordcntLast[2]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_234),
        .Q(wordcntLast[0]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[10] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_224),
        .Q(wordcntLast[10]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[11] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_223),
        .Q(wordcntLast[11]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[12] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_222),
        .Q(wordcntLast[12]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[13] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_221),
        .Q(wordcntLast[13]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcntLast_reg[13]_i_2 
       (.CI(\wordcntLast_reg[5]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcntLast_reg[13]_i_2_n_0 ,\wordcntLast_reg[13]_i_2_n_1 ,\wordcntLast_reg[13]_i_2_n_2 ,\wordcntLast_reg[13]_i_2_n_3 ,\wordcntLast_reg[13]_i_2_n_4 ,\wordcntLast_reg[13]_i_2_n_5 ,\wordcntLast_reg[13]_i_2_n_6 ,\wordcntLast_reg[13]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(plusOp[16:9]),
        .S({\len_reg_n_0_[16] ,\len_reg_n_0_[15] ,\len_reg_n_0_[14] ,\len_reg_n_0_[13] ,\len_reg_n_0_[12] ,\len_reg_n_0_[11] ,\len_reg_n_0_[10] ,\len_reg_n_0_[9] }));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[14] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_220),
        .Q(wordcntLast[14]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[15] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_219),
        .Q(wordcntLast[15]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[16] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_218),
        .Q(wordcntLast[16]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[17] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_217),
        .Q(wordcntLast[17]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[18] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_216),
        .Q(wordcntLast[18]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[19] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_215),
        .Q(wordcntLast[19]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_233),
        .Q(wordcntLast[1]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[20] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_214),
        .Q(wordcntLast[20]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[21] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_213),
        .Q(wordcntLast[21]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcntLast_reg[21]_i_2 
       (.CI(\wordcntLast_reg[13]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcntLast_reg[21]_i_2_n_0 ,\wordcntLast_reg[21]_i_2_n_1 ,\wordcntLast_reg[21]_i_2_n_2 ,\wordcntLast_reg[21]_i_2_n_3 ,\wordcntLast_reg[21]_i_2_n_4 ,\wordcntLast_reg[21]_i_2_n_5 ,\wordcntLast_reg[21]_i_2_n_6 ,\wordcntLast_reg[21]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(plusOp[24:17]),
        .S({\len_reg_n_0_[24] ,\len_reg_n_0_[23] ,\len_reg_n_0_[22] ,\len_reg_n_0_[21] ,\len_reg_n_0_[20] ,\len_reg_n_0_[19] ,\len_reg_n_0_[18] ,\len_reg_n_0_[17] }));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[22] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_212),
        .Q(wordcntLast[22]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[23] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_211),
        .Q(wordcntLast[23]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[24] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_210),
        .Q(wordcntLast[24]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[25] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_209),
        .Q(wordcntLast[25]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[26] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_208),
        .Q(wordcntLast[26]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[27] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_207),
        .Q(wordcntLast[27]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[28] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_206),
        .Q(wordcntLast[28]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcntLast_reg[28]_i_7 
       (.CI(\wordcntLast_reg[21]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_wordcntLast_reg[28]_i_7_CO_UNCONNECTED [7:6],\wordcntLast_reg[28]_i_7_n_2 ,\wordcntLast_reg[28]_i_7_n_3 ,\wordcntLast_reg[28]_i_7_n_4 ,\wordcntLast_reg[28]_i_7_n_5 ,\wordcntLast_reg[28]_i_7_n_6 ,\wordcntLast_reg[28]_i_7_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_wordcntLast_reg[28]_i_7_O_UNCONNECTED [7],plusOp[31:25]}),
        .S({1'b0,\len_reg_n_0_[31] ,\len_reg_n_0_[30] ,\len_reg_n_0_[29] ,\len_reg_n_0_[28] ,\len_reg_n_0_[27] ,\len_reg_n_0_[26] ,\len_reg_n_0_[25] }));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_232),
        .Q(wordcntLast[2]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_231),
        .Q(wordcntLast[3]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_230),
        .Q(wordcntLast[4]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_229),
        .Q(wordcntLast[5]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcntLast_reg[5]_i_2 
       (.CI(\len_reg_n_0_[0] ),
        .CI_TOP(1'b0),
        .CO({\wordcntLast_reg[5]_i_2_n_0 ,\wordcntLast_reg[5]_i_2_n_1 ,\wordcntLast_reg[5]_i_2_n_2 ,\wordcntLast_reg[5]_i_2_n_3 ,\wordcntLast_reg[5]_i_2_n_4 ,\wordcntLast_reg[5]_i_2_n_5 ,\wordcntLast_reg[5]_i_2_n_6 ,\wordcntLast_reg[5]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({plusOp[8:3],\NLW_wordcntLast_reg[5]_i_2_O_UNCONNECTED [1:0]}),
        .S({\len_reg_n_0_[8] ,\len_reg_n_0_[7] ,\len_reg_n_0_[6] ,\len_reg_n_0_[5] ,\len_reg_n_0_[4] ,\len_reg_n_0_[3] ,\len_reg_n_0_[2] ,\len_reg_n_0_[1] }));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_228),
        .Q(wordcntLast[6]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_227),
        .Q(wordcntLast[7]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[8] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_226),
        .Q(wordcntLast[8]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[9] 
       (.C(aclk_sig),
        .CE(myRxtx_n_26),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_225),
        .Q(wordcntLast[9]));
  LUT6 #(
    .INIT(64'h0000404054430000)) 
    \wordcnt[30]_i_11 
       (.I0(\stateOp_reg[5]_0 [5]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [0]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\stateOp_reg[5]_0 [1]),
        .I5(\stateOp_reg[5]_0 [4]),
        .O(\wordcnt[30]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hFDF9FFFFFBFFFFDF)) 
    \wordcnt[30]_i_6 
       (.I0(\stateOp_reg[5]_0 [1]),
        .I1(\stateOp_reg[5]_0 [4]),
        .I2(\stateOp_reg[5]_0 [5]),
        .I3(\stateOp_reg[5]_0 [2]),
        .I4(\stateOp_reg[5]_0 [0]),
        .I5(\stateOp_reg[5]_0 [3]),
        .O(\wordcnt[30]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFDF3FBFFFFFFFBBB)) 
    \wordcnt[30]_i_7 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [1]),
        .I2(\stateOp_reg[5]_0 [5]),
        .I3(\stateOp_reg[5]_0 [0]),
        .I4(\stateOp_reg[5]_0 [3]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\wordcnt[30]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h000014A000000100)) 
    \wordcnt[30]_i_9 
       (.I0(\stateOp_reg[5]_0 [4]),
        .I1(\stateOp_reg[5]_0 [3]),
        .I2(\stateOp_reg[5]_0 [0]),
        .I3(\stateOp_reg[5]_0 [1]),
        .I4(\stateOp_reg[5]_0 [5]),
        .I5(\stateOp_reg[5]_0 [2]),
        .O(\wordcnt[30]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_180),
        .Q(\opbuf_reg[0]51_in [6]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[10] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_170),
        .Q(\opbuf_reg[0]51_in [16]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[11] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_169),
        .Q(\opbuf_reg[0]51_in [17]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[12] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_168),
        .Q(\opbuf_reg[0]51_in [18]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[13] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_167),
        .Q(\opbuf_reg[0]51_in [19]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[14] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_166),
        .Q(\opbuf_reg[0]51_in [20]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[15] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_165),
        .Q(\opbuf_reg[0]51_in [21]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[16] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_164),
        .Q(\opbuf_reg[0]51_in [22]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcnt_reg[16]_i_2 
       (.CI(\wordcnt_reg[8]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[16]_i_2_n_0 ,\wordcnt_reg[16]_i_2_n_1 ,\wordcnt_reg[16]_i_2_n_2 ,\wordcnt_reg[16]_i_2_n_3 ,\wordcnt_reg[16]_i_2_n_4 ,\wordcnt_reg[16]_i_2_n_5 ,\wordcnt_reg[16]_i_2_n_6 ,\wordcnt_reg[16]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(txlast1[16:9]),
        .S(\opbuf_reg[0]51_in [22:15]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[17] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_163),
        .Q(\opbuf_reg[0]51_in [23]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[18] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_162),
        .Q(\opbuf_reg[0]51_in [24]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[19] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_161),
        .Q(\opbuf_reg[0]51_in [25]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_179),
        .Q(\opbuf_reg[0]51_in [7]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[20] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_160),
        .Q(\opbuf_reg[0]51_in [26]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[21] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_159),
        .Q(\opbuf_reg[0]51_in [27]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[22] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_158),
        .Q(\opbuf_reg[0]51_in [28]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[23] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_157),
        .Q(\opbuf_reg[0]51_in [29]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[24] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_156),
        .Q(\opbuf_reg[0]51_in [30]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcnt_reg[24]_i_2 
       (.CI(\wordcnt_reg[16]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[24]_i_2_n_0 ,\wordcnt_reg[24]_i_2_n_1 ,\wordcnt_reg[24]_i_2_n_2 ,\wordcnt_reg[24]_i_2_n_3 ,\wordcnt_reg[24]_i_2_n_4 ,\wordcnt_reg[24]_i_2_n_5 ,\wordcnt_reg[24]_i_2_n_6 ,\wordcnt_reg[24]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(txlast1[24:17]),
        .S(\opbuf_reg[0]51_in [30:23]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[25] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_155),
        .Q(\wordcnt_reg_n_0_[25] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[26] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_154),
        .Q(\wordcnt_reg_n_0_[26] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[27] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_153),
        .Q(\wordcnt_reg_n_0_[27] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[28] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_152),
        .Q(\wordcnt_reg_n_0_[28] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[29] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_151),
        .Q(\wordcnt_reg_n_0_[29] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_178),
        .Q(\opbuf_reg[0]51_in [8]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[30] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_150),
        .Q(\wordcnt_reg_n_0_[30] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcnt_reg[30]_i_10 
       (.CI(\wordcnt_reg[24]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_wordcnt_reg[30]_i_10_CO_UNCONNECTED [7:5],\wordcnt_reg[30]_i_10_n_3 ,\wordcnt_reg[30]_i_10_n_4 ,\wordcnt_reg[30]_i_10_n_5 ,\wordcnt_reg[30]_i_10_n_6 ,\wordcnt_reg[30]_i_10_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_wordcnt_reg[30]_i_10_O_UNCONNECTED [7:6],txlast1[30:25]}),
        .S({1'b0,1'b0,\wordcnt_reg_n_0_[30] ,\wordcnt_reg_n_0_[29] ,\wordcnt_reg_n_0_[28] ,\wordcnt_reg_n_0_[27] ,\wordcnt_reg_n_0_[26] ,\wordcnt_reg_n_0_[25] }));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_177),
        .Q(\opbuf_reg[0]51_in [9]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_176),
        .Q(\opbuf_reg[0]51_in [10]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_175),
        .Q(\opbuf_reg[0]51_in [11]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_174),
        .Q(\opbuf_reg[0]51_in [12]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_173),
        .Q(\opbuf_reg[0]51_in [13]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[8] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_172),
        .Q(\opbuf_reg[0]51_in [14]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcnt_reg[8]_i_2 
       (.CI(\opbuf_reg[0]51_in [6]),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[8]_i_2_n_0 ,\wordcnt_reg[8]_i_2_n_1 ,\wordcnt_reg[8]_i_2_n_2 ,\wordcnt_reg[8]_i_2_n_3 ,\wordcnt_reg[8]_i_2_n_4 ,\wordcnt_reg[8]_i_2_n_5 ,\wordcnt_reg[8]_i_2_n_6 ,\wordcnt_reg[8]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(txlast1[8:1]),
        .S(\opbuf_reg[0]51_in [14:7]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[9] 
       (.C(aclk_sig),
        .CE(myRxtx_n_182),
        .CLR(\stateOp_reg[1]_6 ),
        .D(myRxtx_n_171),
        .Q(\opbuf_reg[0]51_in [15]));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Hshktrack
   (doutb,
    ackInvHshktrackSet,
    ackInvHshktrackSelect,
    ackInvHshktrackSetMask,
    rng_reg_0,
    ackInvHshktrackClearMask,
    \mask_reg[5]_0 ,
    \mask_reg[4]_0 ,
    \mask_reg[3]_0 ,
    \mask_reg[2]_0 ,
    \mask_reg[1]_0 ,
    \mask_reg[0]_0 ,
    Q,
    \stateOp_reg[0]_0 ,
    \FSM_onehot_stateSeq_reg[3]_0 ,
    seqbufHshktrackToHostifAXIS_tvalid,
    hshktrackGetInfoTixVState,
    ackSeqbufHshktrackToHostif,
    hshktrackGetInfoPtr0Seqbuf,
    aclk_sig,
    enSeqbuf_reg_0,
    rng_reg_1,
    \mask_reg[5]_1 ,
    \mask_reg[4]_1 ,
    \mask_reg[3]_1 ,
    \mask_reg[2]_1 ,
    \mask_reg[1]_1 ,
    \mask_reg[0]_1 ,
    reqInvHshktrackSelect,
    reqInvHshktrackClearMask,
    reqInvHshktrackSet,
    reqInvHshktrackSetMask,
    ackInvSetMask_sig_reg_0,
    restart_reg_0,
    restart_reg_1,
    ackInvSet_sig_i_2__3_0,
    dneSeqbufHshktrackToHostif,
    seqbufHshktrackToHostifAXIS_tready,
    reqSeqbufHshktrackToHostif,
    E,
    D,
    \capt_reg[5]_0 ,
    \TCaptMax_reg[31]_0 ,
    \TCaptMax_reg[31]_1 ,
    \TCaptMax_reg[7]_0 );
  output [63:0]doutb;
  output ackInvHshktrackSet;
  output ackInvHshktrackSelect;
  output ackInvHshktrackSetMask;
  output rng_reg_0;
  output ackInvHshktrackClearMask;
  output \mask_reg[5]_0 ;
  output \mask_reg[4]_0 ;
  output \mask_reg[3]_0 ;
  output \mask_reg[2]_0 ;
  output \mask_reg[1]_0 ;
  output \mask_reg[0]_0 ;
  output [31:0]Q;
  output \stateOp_reg[0]_0 ;
  output [0:0]\FSM_onehot_stateSeq_reg[3]_0 ;
  output seqbufHshktrackToHostifAXIS_tvalid;
  output [1:0]hshktrackGetInfoTixVState;
  output ackSeqbufHshktrackToHostif;
  output [9:0]hshktrackGetInfoPtr0Seqbuf;
  input aclk_sig;
  input [0:0]enSeqbuf_reg_0;
  input rng_reg_1;
  input \mask_reg[5]_1 ;
  input \mask_reg[4]_1 ;
  input \mask_reg[3]_1 ;
  input \mask_reg[2]_1 ;
  input \mask_reg[1]_1 ;
  input \mask_reg[0]_1 ;
  input reqInvHshktrackSelect;
  input reqInvHshktrackClearMask;
  input reqInvHshktrackSet;
  input reqInvHshktrackSetMask;
  input ackInvSetMask_sig_reg_0;
  input restart_reg_0;
  input restart_reg_1;
  input ackInvSet_sig_i_2__3_0;
  input dneSeqbufHshktrackToHostif;
  input seqbufHshktrackToHostifAXIS_tready;
  input reqSeqbufHshktrackToHostif;
  input [0:0]E;
  input [7:0]D;
  input [5:0]\capt_reg[5]_0 ;
  input [23:0]\TCaptMax_reg[31]_0 ;
  input [0:0]\TCaptMax_reg[31]_1 ;
  input [7:0]\TCaptMax_reg[7]_0 ;

  wire [7:0]D;
  wire [0:0]E;
  wire \FSM_onehot_stateSeq[0]_i_1__1_n_0 ;
  wire \FSM_onehot_stateSeq[0]_i_2__0_n_0 ;
  wire \FSM_onehot_stateSeq[2]_i_1__1_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_1__1_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_2__2_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_1__1_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_2__1_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_3__2_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_4__1_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_5__1_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_6__1_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_7__1_n_0 ;
  wire [0:0]\FSM_onehot_stateSeq_reg[3]_0 ;
  wire \FSM_onehot_stateSeq_reg_n_0_[4] ;
  wire [31:0]Q;
  wire TCapt;
  wire [23:0]\TCaptMax_reg[31]_0 ;
  wire [0:0]\TCaptMax_reg[31]_1 ;
  wire [7:0]\TCaptMax_reg[7]_0 ;
  wire \TCaptMax_reg_n_0_[0] ;
  wire \TCaptMax_reg_n_0_[10] ;
  wire \TCaptMax_reg_n_0_[11] ;
  wire \TCaptMax_reg_n_0_[12] ;
  wire \TCaptMax_reg_n_0_[13] ;
  wire \TCaptMax_reg_n_0_[14] ;
  wire \TCaptMax_reg_n_0_[15] ;
  wire \TCaptMax_reg_n_0_[16] ;
  wire \TCaptMax_reg_n_0_[17] ;
  wire \TCaptMax_reg_n_0_[18] ;
  wire \TCaptMax_reg_n_0_[19] ;
  wire \TCaptMax_reg_n_0_[1] ;
  wire \TCaptMax_reg_n_0_[20] ;
  wire \TCaptMax_reg_n_0_[21] ;
  wire \TCaptMax_reg_n_0_[22] ;
  wire \TCaptMax_reg_n_0_[23] ;
  wire \TCaptMax_reg_n_0_[24] ;
  wire \TCaptMax_reg_n_0_[25] ;
  wire \TCaptMax_reg_n_0_[26] ;
  wire \TCaptMax_reg_n_0_[27] ;
  wire \TCaptMax_reg_n_0_[28] ;
  wire \TCaptMax_reg_n_0_[29] ;
  wire \TCaptMax_reg_n_0_[2] ;
  wire \TCaptMax_reg_n_0_[30] ;
  wire \TCaptMax_reg_n_0_[31] ;
  wire \TCaptMax_reg_n_0_[3] ;
  wire \TCaptMax_reg_n_0_[4] ;
  wire \TCaptMax_reg_n_0_[5] ;
  wire \TCaptMax_reg_n_0_[6] ;
  wire \TCaptMax_reg_n_0_[7] ;
  wire \TCaptMax_reg_n_0_[8] ;
  wire \TCaptMax_reg_n_0_[9] ;
  wire [31:0]TCapt__0;
  wire \aSeqbufB[0]_i_1__1_n_0 ;
  wire \aSeqbufB[1]_i_1__1_n_0 ;
  wire \aSeqbufB[2]_i_1__1_n_0 ;
  wire \aSeqbufB[3]_i_1__1_n_0 ;
  wire \aSeqbufB[4]_i_1__1_n_0 ;
  wire \aSeqbufB[5]_i_1__1_n_0 ;
  wire \aSeqbufB[5]_i_2__1_n_0 ;
  wire \aSeqbufB[6]_i_1__1_n_0 ;
  wire \aSeqbufB[7]_i_1__1_n_0 ;
  wire \aSeqbufB[8]_i_1__1_n_0 ;
  wire \aSeqbufB[8]_i_2__1_n_0 ;
  wire \aSeqbufB[8]_i_3__1_n_0 ;
  wire \aSeqbufB[8]_i_4__1_n_0 ;
  wire \aSeqbufB_reg_n_0_[0] ;
  wire \aSeqbufB_reg_n_0_[1] ;
  wire \aSeqbufB_reg_n_0_[2] ;
  wire \aSeqbufB_reg_n_0_[3] ;
  wire \aSeqbufB_reg_n_0_[4] ;
  wire \aSeqbufB_reg_n_0_[5] ;
  wire \aSeqbufB_reg_n_0_[6] ;
  wire \aSeqbufB_reg_n_0_[7] ;
  wire \aSeqbufB_reg_n_0_[8] ;
  wire \aSeqbuf[0]_i_1__1_n_0 ;
  wire \aSeqbuf[1]_i_1__1_n_0 ;
  wire \aSeqbuf[2]_i_1__1_n_0 ;
  wire \aSeqbuf[3]_i_1__1_n_0 ;
  wire \aSeqbuf[4]_i_1__1_n_0 ;
  wire \aSeqbuf[5]_i_1__1_n_0 ;
  wire \aSeqbuf[5]_i_2__1_n_0 ;
  wire \aSeqbuf[6]_i_1__1_n_0 ;
  wire \aSeqbuf[7]_i_1__1_n_0 ;
  wire \aSeqbuf[7]_i_2__0_n_0 ;
  wire \aSeqbuf[7]_i_3__0_n_0 ;
  wire \aSeqbuf[8]_i_1__1_n_0 ;
  wire \aSeqbuf[8]_i_2__1_n_0 ;
  wire \aSeqbuf[8]_i_3__2_n_0 ;
  wire \aSeqbuf[8]_i_4__2_n_0 ;
  wire \aSeqbuf[8]_i_5__1_n_0 ;
  wire \aSeqbuf[9]_i_1__1_n_0 ;
  wire \aSeqbuf[9]_i_2__1_n_0 ;
  wire \aSeqbuf[9]_i_3__1_n_0 ;
  wire \aSeqbuf[9]_i_4__2_n_0 ;
  wire \aSeqbuf[9]_i_5__1_n_0 ;
  wire \aSeqbuf[9]_i_6__1_n_0 ;
  wire \aSeqbuf[9]_i_7__0_n_0 ;
  wire \aSeqbuf_reg_n_0_[0] ;
  wire \aSeqbuf_reg_n_0_[1] ;
  wire \aSeqbuf_reg_n_0_[2] ;
  wire \aSeqbuf_reg_n_0_[3] ;
  wire \aSeqbuf_reg_n_0_[4] ;
  wire \aSeqbuf_reg_n_0_[5] ;
  wire \aSeqbuf_reg_n_0_[6] ;
  wire \aSeqbuf_reg_n_0_[7] ;
  wire \aSeqbuf_reg_n_0_[8] ;
  wire \aSeqbuf_reg_n_0_[9] ;
  wire ackInvClearMask_sig_i_1__0_n_0;
  wire ackInvHshktrackClearMask;
  wire ackInvHshktrackSelect;
  wire ackInvHshktrackSet;
  wire ackInvHshktrackSetMask;
  wire ackInvSelect_sig_i_1__1_n_0;
  wire ackInvSetMask_sig_i_1__0_n_0;
  wire ackInvSetMask_sig_reg_0;
  wire ackInvSet_sig_i_1__6_n_0;
  wire ackInvSet_sig_i_2__3_0;
  wire ackInvSet_sig_i_2__3_n_0;
  wire ackSeqbufBToSeqClear;
  wire ackSeqbufHshktrackToHostif;
  wire aclk_sig;
  wire [5:0]burstCapt;
  wire \burstCapt_reg_n_0_[0] ;
  wire \burstCapt_reg_n_0_[1] ;
  wire \burstCapt_reg_n_0_[2] ;
  wire \burstCapt_reg_n_0_[3] ;
  wire \burstCapt_reg_n_0_[4] ;
  wire \burstCapt_reg_n_0_[5] ;
  wire [7:0]burstCnt;
  wire \burstCnt[10]_i_1__1_n_0 ;
  wire \burstCnt[10]_i_2__2_n_0 ;
  wire \burstCnt[11]_i_1__1_n_0 ;
  wire \burstCnt[11]_i_2__1_n_0 ;
  wire \burstCnt[12]_i_1__1_n_0 ;
  wire \burstCnt[13]_i_1__1_n_0 ;
  wire \burstCnt[14]_i_1__1_n_0 ;
  wire \burstCnt[14]_i_2__1_n_0 ;
  wire \burstCnt[15]_i_10__1_n_0 ;
  wire \burstCnt[15]_i_11__1_n_0 ;
  wire \burstCnt[15]_i_12__1_n_0 ;
  wire \burstCnt[15]_i_13__2_n_0 ;
  wire \burstCnt[15]_i_1__1_n_0 ;
  wire \burstCnt[15]_i_2__1_n_0 ;
  wire \burstCnt[15]_i_3__2_n_0 ;
  wire \burstCnt[15]_i_4__1_n_0 ;
  wire \burstCnt[15]_i_5__1_n_0 ;
  wire \burstCnt[15]_i_6__1_n_0 ;
  wire \burstCnt[15]_i_7__1_n_0 ;
  wire \burstCnt[15]_i_8__1_n_0 ;
  wire \burstCnt[15]_i_9__1_n_0 ;
  wire \burstCnt[1]_i_1__1_n_0 ;
  wire \burstCnt[2]_i_1__1_n_0 ;
  wire \burstCnt[2]_i_2_n_0 ;
  wire \burstCnt[4]_i_1__1_n_0 ;
  wire \burstCnt[4]_i_2__1_n_0 ;
  wire \burstCnt[5]_i_2__1_n_0 ;
  wire \burstCnt[5]_i_3_n_0 ;
  wire \burstCnt[6]_i_1__1_n_0 ;
  wire \burstCnt[7]_i_2__2_n_0 ;
  wire \burstCnt[8]_i_1__1_n_0 ;
  wire \burstCnt[8]_i_2__2_n_0 ;
  wire \burstCnt[9]_i_1__1_n_0 ;
  wire \burstCnt[9]_i_2__1_n_0 ;
  wire \burstCnt_reg_n_0_[0] ;
  wire \burstCnt_reg_n_0_[10] ;
  wire \burstCnt_reg_n_0_[11] ;
  wire \burstCnt_reg_n_0_[12] ;
  wire \burstCnt_reg_n_0_[13] ;
  wire \burstCnt_reg_n_0_[14] ;
  wire \burstCnt_reg_n_0_[15] ;
  wire \burstCnt_reg_n_0_[1] ;
  wire \burstCnt_reg_n_0_[2] ;
  wire \burstCnt_reg_n_0_[3] ;
  wire \burstCnt_reg_n_0_[4] ;
  wire \burstCnt_reg_n_0_[5] ;
  wire \burstCnt_reg_n_0_[6] ;
  wire \burstCnt_reg_n_0_[7] ;
  wire \burstCnt_reg_n_0_[8] ;
  wire \burstCnt_reg_n_0_[9] ;
  wire [5:0]capt;
  wire [5:0]\capt_reg[5]_0 ;
  wire dneSeqbufHshktrackToHostif;
  wire [63:0]doutb;
  wire [31:0]dwrSeqbuf;
  wire \dwrSeqbuf[0]_i_1__1_n_0 ;
  wire \dwrSeqbuf[0]_i_2__1_n_0 ;
  wire \dwrSeqbuf[10]_i_1__1_n_0 ;
  wire \dwrSeqbuf[11]_i_1__1_n_0 ;
  wire \dwrSeqbuf[12]_i_1__1_n_0 ;
  wire \dwrSeqbuf[13]_i_1__1_n_0 ;
  wire \dwrSeqbuf[14]_i_1__1_n_0 ;
  wire \dwrSeqbuf[15]_i_1__1_n_0 ;
  wire \dwrSeqbuf[16]_i_1__1_n_0 ;
  wire \dwrSeqbuf[17]_i_1__1_n_0 ;
  wire \dwrSeqbuf[18]_i_1__1_n_0 ;
  wire \dwrSeqbuf[19]_i_1__1_n_0 ;
  wire \dwrSeqbuf[1]_i_1__1_n_0 ;
  wire \dwrSeqbuf[1]_i_2__1_n_0 ;
  wire \dwrSeqbuf[1]_i_3__1_n_0 ;
  wire \dwrSeqbuf[20]_i_1__1_n_0 ;
  wire \dwrSeqbuf[20]_i_2_n_0 ;
  wire \dwrSeqbuf[20]_i_3_n_0 ;
  wire \dwrSeqbuf[20]_i_4_n_0 ;
  wire \dwrSeqbuf[21]_i_1__1_n_0 ;
  wire \dwrSeqbuf[2]_i_1__1_n_0 ;
  wire \dwrSeqbuf[2]_i_2__1_n_0 ;
  wire \dwrSeqbuf[2]_i_3__1_n_0 ;
  wire \dwrSeqbuf[30]_i_1__1_n_0 ;
  wire \dwrSeqbuf[30]_i_2_n_0 ;
  wire \dwrSeqbuf[31]_i_1__1_n_0 ;
  wire \dwrSeqbuf[31]_i_2__1_n_0 ;
  wire \dwrSeqbuf[31]_i_3__1_n_0 ;
  wire \dwrSeqbuf[31]_i_4__1_n_0 ;
  wire \dwrSeqbuf[3]_i_1__1_n_0 ;
  wire \dwrSeqbuf[3]_i_2__1_n_0 ;
  wire \dwrSeqbuf[3]_i_3__1_n_0 ;
  wire \dwrSeqbuf[4]_i_1__1_n_0 ;
  wire \dwrSeqbuf[4]_i_2__1_n_0 ;
  wire \dwrSeqbuf[5]_i_1__1_n_0 ;
  wire \dwrSeqbuf[5]_i_2__1_n_0 ;
  wire \dwrSeqbuf[6]_i_1__1_n_0 ;
  wire \dwrSeqbuf[7]_i_1__1_n_0 ;
  wire \dwrSeqbuf[7]_i_2__1_n_0 ;
  wire \dwrSeqbuf[8]_i_1__1_n_0 ;
  wire \dwrSeqbuf[9]_i_1__1_n_0 ;
  wire enSeqbuf;
  wire [0:0]enSeqbuf_reg_0;
  wire enSeqbuf_reg_n_0;
  wire first;
  wire first__0;
  wire [9:0]hshktrackGetInfoPtr0Seqbuf;
  wire [1:0]hshktrackGetInfoTixVState;
  wire \i[0]_i_1__20_n_0 ;
  wire i__carry__0_i_10_n_0;
  wire i__carry__0_i_11_n_0;
  wire i__carry__0_i_12_n_0;
  wire i__carry__0_i_13_n_0;
  wire i__carry__0_i_14_n_0;
  wire i__carry__0_i_15_n_0;
  wire i__carry__0_i_16_n_0;
  wire i__carry__0_i_1_n_0;
  wire i__carry__0_i_2_n_0;
  wire i__carry__0_i_3_n_0;
  wire i__carry__0_i_4_n_0;
  wire i__carry__0_i_5_n_0;
  wire i__carry__0_i_6_n_0;
  wire i__carry__0_i_7_n_0;
  wire i__carry__0_i_8_n_0;
  wire i__carry__0_i_9_n_0;
  wire i__carry_i_10__4_n_0;
  wire i__carry_i_11__3_n_0;
  wire i__carry_i_12__1_n_0;
  wire i__carry_i_13__0_n_0;
  wire i__carry_i_14_n_0;
  wire i__carry_i_15_n_0;
  wire i__carry_i_16_n_0;
  wire i__carry_i_1__5_n_0;
  wire i__carry_i_2__5_n_0;
  wire i__carry_i_3__5_n_0;
  wire i__carry_i_4__5_n_0;
  wire i__carry_i_5__5_n_0;
  wire i__carry_i_6__5_n_0;
  wire i__carry_i_7__4_n_0;
  wire i__carry_i_8__4_n_0;
  wire i__carry_i_9__4_n_0;
  wire \i_reg_n_0_[0] ;
  wire [31:1]in12;
  wire \mask_reg[0]_0 ;
  wire \mask_reg[0]_1 ;
  wire \mask_reg[1]_0 ;
  wire \mask_reg[1]_1 ;
  wire \mask_reg[2]_0 ;
  wire \mask_reg[2]_1 ;
  wire \mask_reg[3]_0 ;
  wire \mask_reg[3]_1 ;
  wire \mask_reg[4]_0 ;
  wire \mask_reg[4]_1 ;
  wire \mask_reg[5]_0 ;
  wire \mask_reg[5]_1 ;
  wire [2:0]p_0_in__0;
  wire plusOp_carry__0_n_0;
  wire plusOp_carry__0_n_1;
  wire plusOp_carry__0_n_2;
  wire plusOp_carry__0_n_3;
  wire plusOp_carry__0_n_4;
  wire plusOp_carry__0_n_5;
  wire plusOp_carry__0_n_6;
  wire plusOp_carry__0_n_7;
  wire plusOp_carry__1_n_0;
  wire plusOp_carry__1_n_1;
  wire plusOp_carry__1_n_2;
  wire plusOp_carry__1_n_3;
  wire plusOp_carry__1_n_4;
  wire plusOp_carry__1_n_5;
  wire plusOp_carry__1_n_6;
  wire plusOp_carry__1_n_7;
  wire plusOp_carry__2_n_2;
  wire plusOp_carry__2_n_3;
  wire plusOp_carry__2_n_4;
  wire plusOp_carry__2_n_5;
  wire plusOp_carry__2_n_6;
  wire plusOp_carry__2_n_7;
  wire plusOp_carry_n_0;
  wire plusOp_carry_n_1;
  wire plusOp_carry_n_2;
  wire plusOp_carry_n_3;
  wire plusOp_carry_n_4;
  wire plusOp_carry_n_5;
  wire plusOp_carry_n_6;
  wire plusOp_carry_n_7;
  wire ptr0SeqbufTrackNotFixed_i_1__1_n_0;
  wire ptr0SeqbufTrackNotFixed_reg_n_0;
  wire [20:0]quad;
  wire \quad[5]_i_1__1_n_0 ;
  wire \quad_reg_n_0_[0] ;
  wire \quad_reg_n_0_[1] ;
  wire \quad_reg_n_0_[20] ;
  wire \quad_reg_n_0_[2] ;
  wire \quad_reg_n_0_[3] ;
  wire \quad_reg_n_0_[4] ;
  wire \quad_reg_n_0_[5] ;
  wire rdySeq;
  wire reqInvHshktrackClearMask;
  wire reqInvHshktrackSelect;
  wire reqInvHshktrackSet;
  wire reqInvHshktrackSetMask;
  wire reqSeqbufHshktrackToHostif;
  wire restart_i_1__1_n_0;
  wire restart_reg_0;
  wire restart_reg_1;
  wire restart_reg_n_0;
  wire rng_reg_0;
  wire rng_reg_1;
  wire seqbufHshktrackToHostifAXIS_tready;
  wire seqbufHshktrackToHostifAXIS_tvalid;
  wire \staTixVTrigger_reg_n_0_[0] ;
  wire \staTixVTrigger_reg_n_0_[1] ;
  wire \staTixVTrigger_reg_n_0_[2] ;
  wire \staTixVTrigger_reg_n_0_[3] ;
  wire \staTixVTrigger_reg_n_0_[4] ;
  wire \staTixVTrigger_reg_n_0_[5] ;
  wire \staTixVTrigger_reg_n_0_[6] ;
  wire \staTixVTrigger_reg_n_0_[7] ;
  wire [2:0]stateOp;
  wire \stateOp[0]_i_1__11_n_0 ;
  wire \stateOp[1]_i_1__11_n_0 ;
  wire \stateOp[2]_i_10__2_n_0 ;
  wire \stateOp[2]_i_11__3_n_0 ;
  wire \stateOp[2]_i_12__1_n_0 ;
  wire \stateOp[2]_i_13__2_n_0 ;
  wire \stateOp[2]_i_14__1_n_0 ;
  wire \stateOp[2]_i_15__2_n_0 ;
  wire \stateOp[2]_i_16__2_n_0 ;
  wire \stateOp[2]_i_17__2_n_0 ;
  wire \stateOp[2]_i_18__2_n_0 ;
  wire \stateOp[2]_i_19__2_n_0 ;
  wire \stateOp[2]_i_1__4_n_0 ;
  wire \stateOp[2]_i_20__2_n_0 ;
  wire \stateOp[2]_i_21__1_n_0 ;
  wire \stateOp[2]_i_22__1_n_0 ;
  wire \stateOp[2]_i_2__3_n_0 ;
  wire \stateOp[2]_i_3__3_n_0 ;
  wire \stateOp[2]_i_5__3_n_0 ;
  wire \stateOp[2]_i_6__1_n_0 ;
  wire \stateOp[2]_i_7__2_n_0 ;
  wire \stateOp[2]_i_8__2_n_0 ;
  wire \stateOp[2]_i_9__0_n_0 ;
  wire \stateOp_reg[0]_0 ;
  wire \stateSeqbufB[1]_i_2__1_n_0 ;
  wire \stateSeqbufB[2]_i_1__1_n_0 ;
  wire \stateSeqbufB[2]_i_3__1_n_0 ;
  wire \stateSeqbufB[2]_i_7__1_n_0 ;
  wire [2:0]stateSeqbufB_reg;
  wire [7:0]stoTixVTrigger;
  wire stop_lcl_i_1__1_n_0;
  wire stop_lcl_i_2__2_n_0;
  wire stop_lcl_i_3_n_0;
  wire stop_lcl_i_4_n_0;
  wire stop_lcl_reg_n_0;
  wire \strbStop5_inferred__0/i__carry__0_n_0 ;
  wire \strbStop5_inferred__0/i__carry__0_n_1 ;
  wire \strbStop5_inferred__0/i__carry__0_n_2 ;
  wire \strbStop5_inferred__0/i__carry__0_n_3 ;
  wire \strbStop5_inferred__0/i__carry__0_n_4 ;
  wire \strbStop5_inferred__0/i__carry__0_n_5 ;
  wire \strbStop5_inferred__0/i__carry__0_n_6 ;
  wire \strbStop5_inferred__0/i__carry__0_n_7 ;
  wire \strbStop5_inferred__0/i__carry_n_0 ;
  wire \strbStop5_inferred__0/i__carry_n_1 ;
  wire \strbStop5_inferred__0/i__carry_n_2 ;
  wire \strbStop5_inferred__0/i__carry_n_3 ;
  wire \strbStop5_inferred__0/i__carry_n_4 ;
  wire \strbStop5_inferred__0/i__carry_n_5 ;
  wire \strbStop5_inferred__0/i__carry_n_6 ;
  wire \strbStop5_inferred__0/i__carry_n_7 ;
  wire strbStop_i_1__1_n_0;
  wire strbStop_i_2__1_n_0;
  wire strbStop_reg_n_0;
  wire [7:6]NLW_plusOp_carry__2_CO_UNCONNECTED;
  wire [7:7]NLW_plusOp_carry__2_O_UNCONNECTED;
  wire [7:0]\NLW_strbStop5_inferred__0/i__carry_O_UNCONNECTED ;
  wire [7:0]\NLW_strbStop5_inferred__0/i__carry__0_O_UNCONNECTED ;

  LUT6 #(
    .INIT(64'h0000FFFF00010001)) 
    \FSM_onehot_stateSeq[0]_i_1__1 
       (.I0(TCapt),
        .I1(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I2(first),
        .I3(rdySeq),
        .I4(\FSM_onehot_stateSeq[0]_i_2__0_n_0 ),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\FSM_onehot_stateSeq[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2441" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \FSM_onehot_stateSeq[0]_i_2__0 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(stateSeqbufB_reg[2]),
        .O(\FSM_onehot_stateSeq[0]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2454" *) 
  LUT3 #(
    .INIT(8'hBA)) 
    \FSM_onehot_stateSeq[2]_i_1__1 
       (.I0(rdySeq),
        .I1(\FSM_onehot_stateSeq[3]_i_2__2_n_0 ),
        .I2(TCapt),
        .O(\FSM_onehot_stateSeq[2]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2454" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \FSM_onehot_stateSeq[3]_i_1__1 
       (.I0(\FSM_onehot_stateSeq[3]_i_2__2_n_0 ),
        .I1(TCapt),
        .O(\FSM_onehot_stateSeq[3]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h55555510)) 
    \FSM_onehot_stateSeq[3]_i_2__2 
       (.I0(\i_reg_n_0_[0] ),
        .I1(stop_lcl_i_3_n_0),
        .I2(\aSeqbuf[9]_i_4__2_n_0 ),
        .I3(strbStop_reg_n_0),
        .I4(stop_lcl_reg_n_0),
        .O(\FSM_onehot_stateSeq[3]_i_2__2_n_0 ));
  LUT6 #(
    .INIT(64'h505050505050FF53)) 
    \FSM_onehot_stateSeq[5]_i_1__1 
       (.I0(\FSM_onehot_stateSeq[5]_i_3__2_n_0 ),
        .I1(\FSM_onehot_stateSeq[5]_i_4__1_n_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_5__1_n_0 ),
        .I3(\FSM_onehot_stateSeq[5]_i_6__1_n_0 ),
        .I4(ackSeqbufBToSeqClear),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\FSM_onehot_stateSeq[5]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2450" *) 
  LUT4 #(
    .INIT(16'h0080)) 
    \FSM_onehot_stateSeq[5]_i_2__1 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[0]),
        .I3(stateSeqbufB_reg[1]),
        .O(\FSM_onehot_stateSeq[5]_i_2__1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAA2AAAA)) 
    \FSM_onehot_stateSeq[5]_i_3__2 
       (.I0(\FSM_onehot_stateSeq[5]_i_7__1_n_0 ),
        .I1(stateOp[0]),
        .I2(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I3(ackSeqbufBToSeqClear),
        .I4(stateOp[1]),
        .I5(stateOp[2]),
        .O(\FSM_onehot_stateSeq[5]_i_3__2_n_0 ));
  LUT6 #(
    .INIT(64'hF7F7F7F700F7F7F7)) 
    \FSM_onehot_stateSeq[5]_i_4__1 
       (.I0(stateOp[1]),
        .I1(stateOp[2]),
        .I2(stateOp[0]),
        .I3(stateSeqbufB_reg[2]),
        .I4(stateSeqbufB_reg[0]),
        .I5(stateSeqbufB_reg[1]),
        .O(\FSM_onehot_stateSeq[5]_i_4__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2460" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \FSM_onehot_stateSeq[5]_i_5__1 
       (.I0(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I1(TCapt),
        .O(\FSM_onehot_stateSeq[5]_i_5__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2460" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \FSM_onehot_stateSeq[5]_i_6__1 
       (.I0(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I1(rdySeq),
        .I2(ackSeqbufBToSeqClear),
        .O(\FSM_onehot_stateSeq[5]_i_6__1_n_0 ));
  LUT6 #(
    .INIT(64'hFFF31113FFFF11FF)) 
    \FSM_onehot_stateSeq[5]_i_7__1 
       (.I0(\FSM_onehot_stateSeq[5]_i_5__1_n_0 ),
        .I1(\aSeqbuf[9]_i_4__2_n_0 ),
        .I2(rdySeq),
        .I3(ackSeqbufBToSeqClear),
        .I4(\FSM_onehot_stateSeq[0]_i_2__0_n_0 ),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\FSM_onehot_stateSeq[5]_i_7__1_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDPE #(
    .INIT(1'b1)) 
    \FSM_onehot_stateSeq_reg[0] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__1_n_0 ),
        .D(\FSM_onehot_stateSeq[0]_i_1__1_n_0 ),
        .PRE(enSeqbuf_reg_0),
        .Q(first));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[1] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(first),
        .Q(rdySeq));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[2] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\FSM_onehot_stateSeq[2]_i_1__1_n_0 ),
        .Q(TCapt));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[3] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\FSM_onehot_stateSeq[3]_i_1__1_n_0 ),
        .Q(\FSM_onehot_stateSeq_reg[3]_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[4] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\FSM_onehot_stateSeq_reg[3]_0 ),
        .Q(\FSM_onehot_stateSeq_reg_n_0_[4] ));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[5] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\FSM_onehot_stateSeq[5]_i_2__1_n_0 ),
        .Q(ackSeqbufBToSeqClear));
  FDCE \TCaptMax_reg[0] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[7]_0 [0]),
        .Q(\TCaptMax_reg_n_0_[0] ));
  FDCE \TCaptMax_reg[10] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [2]),
        .Q(\TCaptMax_reg_n_0_[10] ));
  FDCE \TCaptMax_reg[11] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [3]),
        .Q(\TCaptMax_reg_n_0_[11] ));
  FDCE \TCaptMax_reg[12] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [4]),
        .Q(\TCaptMax_reg_n_0_[12] ));
  FDCE \TCaptMax_reg[13] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [5]),
        .Q(\TCaptMax_reg_n_0_[13] ));
  FDCE \TCaptMax_reg[14] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [6]),
        .Q(\TCaptMax_reg_n_0_[14] ));
  FDCE \TCaptMax_reg[15] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [7]),
        .Q(\TCaptMax_reg_n_0_[15] ));
  FDCE \TCaptMax_reg[16] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [8]),
        .Q(\TCaptMax_reg_n_0_[16] ));
  FDCE \TCaptMax_reg[17] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [9]),
        .Q(\TCaptMax_reg_n_0_[17] ));
  FDCE \TCaptMax_reg[18] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [10]),
        .Q(\TCaptMax_reg_n_0_[18] ));
  FDCE \TCaptMax_reg[19] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [11]),
        .Q(\TCaptMax_reg_n_0_[19] ));
  FDCE \TCaptMax_reg[1] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[7]_0 [1]),
        .Q(\TCaptMax_reg_n_0_[1] ));
  FDCE \TCaptMax_reg[20] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [12]),
        .Q(\TCaptMax_reg_n_0_[20] ));
  FDCE \TCaptMax_reg[21] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [13]),
        .Q(\TCaptMax_reg_n_0_[21] ));
  FDCE \TCaptMax_reg[22] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [14]),
        .Q(\TCaptMax_reg_n_0_[22] ));
  FDCE \TCaptMax_reg[23] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [15]),
        .Q(\TCaptMax_reg_n_0_[23] ));
  FDCE \TCaptMax_reg[24] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [16]),
        .Q(\TCaptMax_reg_n_0_[24] ));
  FDCE \TCaptMax_reg[25] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [17]),
        .Q(\TCaptMax_reg_n_0_[25] ));
  FDCE \TCaptMax_reg[26] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [18]),
        .Q(\TCaptMax_reg_n_0_[26] ));
  FDCE \TCaptMax_reg[27] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [19]),
        .Q(\TCaptMax_reg_n_0_[27] ));
  FDCE \TCaptMax_reg[28] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [20]),
        .Q(\TCaptMax_reg_n_0_[28] ));
  FDCE \TCaptMax_reg[29] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [21]),
        .Q(\TCaptMax_reg_n_0_[29] ));
  FDCE \TCaptMax_reg[2] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[7]_0 [2]),
        .Q(\TCaptMax_reg_n_0_[2] ));
  FDCE \TCaptMax_reg[30] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [22]),
        .Q(\TCaptMax_reg_n_0_[30] ));
  FDCE \TCaptMax_reg[31] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [23]),
        .Q(\TCaptMax_reg_n_0_[31] ));
  FDCE \TCaptMax_reg[3] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[7]_0 [3]),
        .Q(\TCaptMax_reg_n_0_[3] ));
  FDCE \TCaptMax_reg[4] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[7]_0 [4]),
        .Q(\TCaptMax_reg_n_0_[4] ));
  FDCE \TCaptMax_reg[5] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[7]_0 [5]),
        .Q(\TCaptMax_reg_n_0_[5] ));
  FDCE \TCaptMax_reg[6] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[7]_0 [6]),
        .Q(\TCaptMax_reg_n_0_[6] ));
  FDCE \TCaptMax_reg[7] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[7]_0 [7]),
        .Q(\TCaptMax_reg_n_0_[7] ));
  FDCE \TCaptMax_reg[8] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [0]),
        .Q(\TCaptMax_reg_n_0_[8] ));
  FDCE \TCaptMax_reg[9] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_1 ),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [1]),
        .Q(\TCaptMax_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair2481" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \TCapt[0]_i_1__1 
       (.I0(Q[0]),
        .I1(first),
        .O(TCapt__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair2476" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[10]_i_1__1 
       (.I0(in12[10]),
        .I1(first),
        .O(TCapt__0[10]));
  (* SOFT_HLUTNM = "soft_lutpair2476" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[11]_i_1__1 
       (.I0(in12[11]),
        .I1(first),
        .O(TCapt__0[11]));
  (* SOFT_HLUTNM = "soft_lutpair2475" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[12]_i_1__1 
       (.I0(in12[12]),
        .I1(first),
        .O(TCapt__0[12]));
  (* SOFT_HLUTNM = "soft_lutpair2475" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[13]_i_1__1 
       (.I0(in12[13]),
        .I1(first),
        .O(TCapt__0[13]));
  (* SOFT_HLUTNM = "soft_lutpair2474" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[14]_i_1__1 
       (.I0(in12[14]),
        .I1(first),
        .O(TCapt__0[14]));
  (* SOFT_HLUTNM = "soft_lutpair2474" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[15]_i_1__1 
       (.I0(in12[15]),
        .I1(first),
        .O(TCapt__0[15]));
  (* SOFT_HLUTNM = "soft_lutpair2473" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[16]_i_1__1 
       (.I0(in12[16]),
        .I1(first),
        .O(TCapt__0[16]));
  (* SOFT_HLUTNM = "soft_lutpair2473" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[17]_i_1__1 
       (.I0(in12[17]),
        .I1(first),
        .O(TCapt__0[17]));
  (* SOFT_HLUTNM = "soft_lutpair2472" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[18]_i_1__1 
       (.I0(in12[18]),
        .I1(first),
        .O(TCapt__0[18]));
  (* SOFT_HLUTNM = "soft_lutpair2472" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[19]_i_1__1 
       (.I0(in12[19]),
        .I1(first),
        .O(TCapt__0[19]));
  (* SOFT_HLUTNM = "soft_lutpair2481" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[1]_i_1__1 
       (.I0(in12[1]),
        .I1(first),
        .O(TCapt__0[1]));
  (* SOFT_HLUTNM = "soft_lutpair2471" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[20]_i_1__1 
       (.I0(in12[20]),
        .I1(first),
        .O(TCapt__0[20]));
  (* SOFT_HLUTNM = "soft_lutpair2471" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[21]_i_1__1 
       (.I0(in12[21]),
        .I1(first),
        .O(TCapt__0[21]));
  (* SOFT_HLUTNM = "soft_lutpair2470" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[22]_i_1__1 
       (.I0(in12[22]),
        .I1(first),
        .O(TCapt__0[22]));
  (* SOFT_HLUTNM = "soft_lutpair2470" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[23]_i_1__1 
       (.I0(in12[23]),
        .I1(first),
        .O(TCapt__0[23]));
  (* SOFT_HLUTNM = "soft_lutpair2469" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[24]_i_1__1 
       (.I0(in12[24]),
        .I1(first),
        .O(TCapt__0[24]));
  (* SOFT_HLUTNM = "soft_lutpair2469" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[25]_i_1__1 
       (.I0(in12[25]),
        .I1(first),
        .O(TCapt__0[25]));
  (* SOFT_HLUTNM = "soft_lutpair2468" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[26]_i_1__1 
       (.I0(in12[26]),
        .I1(first),
        .O(TCapt__0[26]));
  (* SOFT_HLUTNM = "soft_lutpair2468" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[27]_i_1__1 
       (.I0(in12[27]),
        .I1(first),
        .O(TCapt__0[27]));
  (* SOFT_HLUTNM = "soft_lutpair2467" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[28]_i_1__1 
       (.I0(in12[28]),
        .I1(first),
        .O(TCapt__0[28]));
  (* SOFT_HLUTNM = "soft_lutpair2467" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[29]_i_1__1 
       (.I0(in12[29]),
        .I1(first),
        .O(TCapt__0[29]));
  (* SOFT_HLUTNM = "soft_lutpair2480" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[2]_i_1__1 
       (.I0(in12[2]),
        .I1(first),
        .O(TCapt__0[2]));
  (* SOFT_HLUTNM = "soft_lutpair2466" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[30]_i_1__1 
       (.I0(in12[30]),
        .I1(first),
        .O(TCapt__0[30]));
  (* SOFT_HLUTNM = "soft_lutpair2466" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[31]_i_1__1 
       (.I0(in12[31]),
        .I1(first),
        .O(TCapt__0[31]));
  (* SOFT_HLUTNM = "soft_lutpair2480" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[3]_i_1__1 
       (.I0(in12[3]),
        .I1(first),
        .O(TCapt__0[3]));
  (* SOFT_HLUTNM = "soft_lutpair2479" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[4]_i_1__1 
       (.I0(in12[4]),
        .I1(first),
        .O(TCapt__0[4]));
  (* SOFT_HLUTNM = "soft_lutpair2479" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[5]_i_1__1 
       (.I0(in12[5]),
        .I1(first),
        .O(TCapt__0[5]));
  (* SOFT_HLUTNM = "soft_lutpair2478" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[6]_i_1__1 
       (.I0(in12[6]),
        .I1(first),
        .O(TCapt__0[6]));
  (* SOFT_HLUTNM = "soft_lutpair2478" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[7]_i_1__1 
       (.I0(in12[7]),
        .I1(first),
        .O(TCapt__0[7]));
  (* SOFT_HLUTNM = "soft_lutpair2477" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[8]_i_1__1 
       (.I0(in12[8]),
        .I1(first),
        .O(TCapt__0[8]));
  (* SOFT_HLUTNM = "soft_lutpair2477" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[9]_i_1__1 
       (.I0(in12[9]),
        .I1(first),
        .O(TCapt__0[9]));
  FDCE \TCapt_reg[0] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[0]),
        .Q(Q[0]));
  FDCE \TCapt_reg[10] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[10]),
        .Q(Q[10]));
  FDCE \TCapt_reg[11] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[11]),
        .Q(Q[11]));
  FDCE \TCapt_reg[12] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[12]),
        .Q(Q[12]));
  FDCE \TCapt_reg[13] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[13]),
        .Q(Q[13]));
  FDCE \TCapt_reg[14] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[14]),
        .Q(Q[14]));
  FDCE \TCapt_reg[15] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[15]),
        .Q(Q[15]));
  FDCE \TCapt_reg[16] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[16]),
        .Q(Q[16]));
  FDCE \TCapt_reg[17] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[17]),
        .Q(Q[17]));
  FDCE \TCapt_reg[18] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[18]),
        .Q(Q[18]));
  FDCE \TCapt_reg[19] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[19]),
        .Q(Q[19]));
  FDCE \TCapt_reg[1] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[1]),
        .Q(Q[1]));
  FDCE \TCapt_reg[20] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[20]),
        .Q(Q[20]));
  FDCE \TCapt_reg[21] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[21]),
        .Q(Q[21]));
  FDCE \TCapt_reg[22] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[22]),
        .Q(Q[22]));
  FDCE \TCapt_reg[23] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[23]),
        .Q(Q[23]));
  FDCE \TCapt_reg[24] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[24]),
        .Q(Q[24]));
  FDCE \TCapt_reg[25] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[25]),
        .Q(Q[25]));
  FDCE \TCapt_reg[26] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[26]),
        .Q(Q[26]));
  FDCE \TCapt_reg[27] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[27]),
        .Q(Q[27]));
  FDCE \TCapt_reg[28] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[28]),
        .Q(Q[28]));
  FDCE \TCapt_reg[29] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[29]),
        .Q(Q[29]));
  FDCE \TCapt_reg[2] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[2]),
        .Q(Q[2]));
  FDCE \TCapt_reg[30] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[30]),
        .Q(Q[30]));
  FDCE \TCapt_reg[31] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[31]),
        .Q(Q[31]));
  FDCE \TCapt_reg[3] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[3]),
        .Q(Q[3]));
  FDCE \TCapt_reg[4] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[4]),
        .Q(Q[4]));
  FDCE \TCapt_reg[5] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[5]),
        .Q(Q[5]));
  FDCE \TCapt_reg[6] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[6]),
        .Q(Q[6]));
  FDCE \TCapt_reg[7] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[7]),
        .Q(Q[7]));
  FDCE \TCapt_reg[8] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[8]),
        .Q(Q[8]));
  FDCE \TCapt_reg[9] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(TCapt__0[9]),
        .Q(Q[9]));
  LUT3 #(
    .INIT(8'h54)) 
    \aSeqbufB[0]_i_1__1 
       (.I0(\aSeqbufB_reg_n_0_[0] ),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2437" *) 
  LUT4 #(
    .INIT(16'h6660)) 
    \aSeqbufB[1]_i_1__1 
       (.I0(\aSeqbufB_reg_n_0_[1] ),
        .I1(\aSeqbufB_reg_n_0_[0] ),
        .I2(stateSeqbufB_reg[1]),
        .I3(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2437" *) 
  LUT5 #(
    .INIT(32'h78787800)) 
    \aSeqbufB[2]_i_1__1 
       (.I0(\aSeqbufB_reg_n_0_[0] ),
        .I1(\aSeqbufB_reg_n_0_[1] ),
        .I2(\aSeqbufB_reg_n_0_[2] ),
        .I3(stateSeqbufB_reg[1]),
        .I4(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[2]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h00007F80)) 
    \aSeqbufB[3]_i_1__1 
       (.I0(\aSeqbufB_reg_n_0_[2] ),
        .I1(\aSeqbufB_reg_n_0_[1] ),
        .I2(\aSeqbufB_reg_n_0_[0] ),
        .I3(\aSeqbufB_reg_n_0_[3] ),
        .I4(\aSeqbufB[8]_i_3__1_n_0 ),
        .O(\aSeqbufB[3]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \aSeqbufB[4]_i_1__1 
       (.I0(\aSeqbufB[8]_i_3__1_n_0 ),
        .I1(\aSeqbufB_reg_n_0_[3] ),
        .I2(\aSeqbufB_reg_n_0_[0] ),
        .I3(\aSeqbufB_reg_n_0_[1] ),
        .I4(\aSeqbufB_reg_n_0_[2] ),
        .I5(\aSeqbufB_reg_n_0_[4] ),
        .O(\aSeqbufB[4]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2438" *) 
  LUT4 #(
    .INIT(16'h0EE0)) 
    \aSeqbufB[5]_i_1__1 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(\aSeqbufB[5]_i_2__1_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[5] ),
        .O(\aSeqbufB[5]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aSeqbufB[5]_i_2__1 
       (.I0(\aSeqbufB_reg_n_0_[4] ),
        .I1(\aSeqbufB_reg_n_0_[2] ),
        .I2(\aSeqbufB_reg_n_0_[1] ),
        .I3(\aSeqbufB_reg_n_0_[0] ),
        .I4(\aSeqbufB_reg_n_0_[3] ),
        .O(\aSeqbufB[5]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2426" *) 
  LUT4 #(
    .INIT(16'h0EE0)) 
    \aSeqbufB[6]_i_1__1 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(\aSeqbufB[8]_i_4__1_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[6] ),
        .O(\aSeqbufB[6]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2426" *) 
  LUT5 #(
    .INIT(32'h0EEEE000)) 
    \aSeqbufB[7]_i_1__1 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(\aSeqbufB[8]_i_4__1_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[6] ),
        .I4(\aSeqbufB_reg_n_0_[7] ),
        .O(\aSeqbufB[7]_i_1__1_n_0 ));
  LUT4 #(
    .INIT(16'h4101)) 
    \aSeqbufB[8]_i_1__1 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(\stateSeqbufB[1]_i_2__1_n_0 ),
        .O(\aSeqbufB[8]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2423" *) 
  LUT5 #(
    .INIT(32'h15554000)) 
    \aSeqbufB[8]_i_2__1 
       (.I0(\aSeqbufB[8]_i_3__1_n_0 ),
        .I1(\aSeqbufB_reg_n_0_[6] ),
        .I2(\aSeqbufB[8]_i_4__1_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[7] ),
        .I4(\aSeqbufB_reg_n_0_[8] ),
        .O(\aSeqbufB[8]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2450" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \aSeqbufB[8]_i_3__1 
       (.I0(stateSeqbufB_reg[0]),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[1]),
        .O(\aSeqbufB[8]_i_3__1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aSeqbufB[8]_i_4__1 
       (.I0(\aSeqbufB_reg_n_0_[3] ),
        .I1(\aSeqbufB_reg_n_0_[0] ),
        .I2(\aSeqbufB_reg_n_0_[1] ),
        .I3(\aSeqbufB_reg_n_0_[2] ),
        .I4(\aSeqbufB_reg_n_0_[4] ),
        .I5(\aSeqbufB_reg_n_0_[5] ),
        .O(\aSeqbufB[8]_i_4__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbufB[0]_i_1__1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbufB[1]_i_1__1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbufB[2]_i_1__1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[3] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbufB[3]_i_1__1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[4] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbufB[4]_i_1__1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[5] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbufB[5]_i_1__1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[6] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbufB[6]_i_1__1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[7] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbufB[7]_i_1__1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[8] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbufB[8]_i_2__1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[8] ));
  LUT6 #(
    .INIT(64'h5555555544454454)) 
    \aSeqbuf[0]_i_1__1 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(ackSeqbufBToSeqClear),
        .I2(rdySeq),
        .I3(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I4(TCapt),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\aSeqbuf[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2459" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \aSeqbuf[1]_i_1__1 
       (.I0(\aSeqbuf_reg_n_0_[1] ),
        .I1(\aSeqbuf_reg_n_0_[0] ),
        .I2(\aSeqbuf[9]_i_6__1_n_0 ),
        .O(\aSeqbuf[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2430" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \aSeqbuf[2]_i_1__1 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(\aSeqbuf_reg_n_0_[1] ),
        .I2(\aSeqbuf_reg_n_0_[2] ),
        .I3(\aSeqbuf[9]_i_6__1_n_0 ),
        .O(\aSeqbuf[2]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2430" *) 
  LUT5 #(
    .INIT(32'h00007F80)) 
    \aSeqbuf[3]_i_1__1 
       (.I0(\aSeqbuf_reg_n_0_[2] ),
        .I1(\aSeqbuf_reg_n_0_[1] ),
        .I2(\aSeqbuf_reg_n_0_[0] ),
        .I3(\aSeqbuf_reg_n_0_[3] ),
        .I4(\aSeqbuf[9]_i_6__1_n_0 ),
        .O(\aSeqbuf[3]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h000000007FFF8000)) 
    \aSeqbuf[4]_i_1__1 
       (.I0(\aSeqbuf_reg_n_0_[3] ),
        .I1(\aSeqbuf_reg_n_0_[0] ),
        .I2(\aSeqbuf_reg_n_0_[1] ),
        .I3(\aSeqbuf_reg_n_0_[2] ),
        .I4(\aSeqbuf_reg_n_0_[4] ),
        .I5(\aSeqbuf[9]_i_6__1_n_0 ),
        .O(\aSeqbuf[4]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2459" *) 
  LUT3 #(
    .INIT(8'h14)) 
    \aSeqbuf[5]_i_1__1 
       (.I0(\aSeqbuf[9]_i_6__1_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[5] ),
        .I2(\aSeqbuf[5]_i_2__1_n_0 ),
        .O(\aSeqbuf[5]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aSeqbuf[5]_i_2__1 
       (.I0(\aSeqbuf_reg_n_0_[4] ),
        .I1(\aSeqbuf_reg_n_0_[2] ),
        .I2(\aSeqbuf_reg_n_0_[1] ),
        .I3(\aSeqbuf_reg_n_0_[0] ),
        .I4(\aSeqbuf_reg_n_0_[3] ),
        .O(\aSeqbuf[5]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2458" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \aSeqbuf[6]_i_1__1 
       (.I0(\aSeqbuf[7]_i_2__0_n_0 ),
        .I1(\aSeqbuf[9]_i_7__0_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[6] ),
        .O(\aSeqbuf[6]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2440" *) 
  LUT4 #(
    .INIT(16'h7800)) 
    \aSeqbuf[7]_i_1__1 
       (.I0(\aSeqbuf[9]_i_7__0_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[6] ),
        .I2(\aSeqbuf_reg_n_0_[7] ),
        .I3(\aSeqbuf[7]_i_2__0_n_0 ),
        .O(\aSeqbuf[7]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h1500555555555555)) 
    \aSeqbuf[7]_i_2__0 
       (.I0(\aSeqbuf[9]_i_6__1_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[7] ),
        .I2(\aSeqbuf_reg_n_0_[6] ),
        .I3(\aSeqbuf_reg_n_0_[8] ),
        .I4(\aSeqbuf[8]_i_2__1_n_0 ),
        .I5(\aSeqbuf[7]_i_3__0_n_0 ),
        .O(\aSeqbuf[7]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2436" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \aSeqbuf[7]_i_3__0 
       (.I0(\aSeqbuf[9]_i_7__0_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[9] ),
        .I2(\aSeqbuf_reg_n_0_[7] ),
        .I3(\aSeqbuf_reg_n_0_[8] ),
        .O(\aSeqbuf[7]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hF0F070FF50505050)) 
    \aSeqbuf[8]_i_1__1 
       (.I0(\aSeqbuf[8]_i_2__1_n_0 ),
        .I1(\aSeqbuf[9]_i_7__0_n_0 ),
        .I2(\aSeqbuf[8]_i_3__2_n_0 ),
        .I3(\aSeqbuf_reg_n_0_[6] ),
        .I4(\aSeqbuf[8]_i_4__2_n_0 ),
        .I5(\aSeqbuf[8]_i_5__1_n_0 ),
        .O(\aSeqbuf[8]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2431" *) 
  LUT5 #(
    .INIT(32'h00540055)) 
    \aSeqbuf[8]_i_2__1 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I2(TCapt),
        .I3(ackSeqbufBToSeqClear),
        .I4(rdySeq),
        .O(\aSeqbuf[8]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2440" *) 
  LUT4 #(
    .INIT(16'h6AAA)) 
    \aSeqbuf[8]_i_3__2 
       (.I0(\aSeqbuf_reg_n_0_[8] ),
        .I1(\aSeqbuf[9]_i_7__0_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[6] ),
        .I3(\aSeqbuf_reg_n_0_[7] ),
        .O(\aSeqbuf[8]_i_3__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2452" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    \aSeqbuf[8]_i_4__2 
       (.I0(\aSeqbuf_reg_n_0_[8] ),
        .I1(\aSeqbuf_reg_n_0_[7] ),
        .I2(\aSeqbuf_reg_n_0_[9] ),
        .O(\aSeqbuf[8]_i_4__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2422" *) 
  LUT5 #(
    .INIT(32'h00000002)) 
    \aSeqbuf[8]_i_5__1 
       (.I0(TCapt),
        .I1(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I2(rdySeq),
        .I3(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I4(ackSeqbufBToSeqClear),
        .O(\aSeqbuf[8]_i_5__1_n_0 ));
  LUT4 #(
    .INIT(16'hFFAE)) 
    \aSeqbuf[9]_i_1__1 
       (.I0(\aSeqbuf[9]_i_3__1_n_0 ),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I2(\aSeqbuf[9]_i_4__2_n_0 ),
        .I3(\aSeqbuf[9]_i_5__1_n_0 ),
        .O(\aSeqbuf[9]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \aSeqbuf[9]_i_2__1 
       (.I0(\aSeqbuf[9]_i_6__1_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[6] ),
        .I2(\aSeqbuf[9]_i_7__0_n_0 ),
        .I3(\aSeqbuf_reg_n_0_[8] ),
        .I4(\aSeqbuf_reg_n_0_[7] ),
        .I5(\aSeqbuf_reg_n_0_[9] ),
        .O(\aSeqbuf[9]_i_2__1_n_0 ));
  LUT6 #(
    .INIT(64'h008000800080AAAA)) 
    \aSeqbuf[9]_i_3__1 
       (.I0(\dwrSeqbuf[30]_i_2_n_0 ),
        .I1(\burstCnt[2]_i_2_n_0 ),
        .I2(\i_reg_n_0_[0] ),
        .I3(first__0),
        .I4(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I5(TCapt),
        .O(\aSeqbuf[9]_i_3__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2436" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \aSeqbuf[9]_i_4__2 
       (.I0(\aSeqbuf_reg_n_0_[6] ),
        .I1(\aSeqbuf[9]_i_7__0_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[9] ),
        .I3(\aSeqbuf_reg_n_0_[7] ),
        .I4(\aSeqbuf_reg_n_0_[8] ),
        .O(\aSeqbuf[9]_i_4__2_n_0 ));
  LUT6 #(
    .INIT(64'h0003000200030000)) 
    \aSeqbuf[9]_i_5__1 
       (.I0(rdySeq),
        .I1(ackSeqbufBToSeqClear),
        .I2(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I3(\FSM_onehot_stateSeq[5]_i_4__1_n_0 ),
        .I4(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I5(TCapt),
        .O(\aSeqbuf[9]_i_5__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2422" *) 
  LUT5 #(
    .INIT(32'h00005451)) 
    \aSeqbuf[9]_i_6__1 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(TCapt),
        .I2(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I3(rdySeq),
        .I4(ackSeqbufBToSeqClear),
        .O(\aSeqbuf[9]_i_6__1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aSeqbuf[9]_i_7__0 
       (.I0(\aSeqbuf_reg_n_0_[3] ),
        .I1(\aSeqbuf_reg_n_0_[0] ),
        .I2(\aSeqbuf_reg_n_0_[1] ),
        .I3(\aSeqbuf_reg_n_0_[2] ),
        .I4(\aSeqbuf_reg_n_0_[4] ),
        .I5(\aSeqbuf_reg_n_0_[5] ),
        .O(\aSeqbuf[9]_i_7__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbuf[0]_i_1__1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbuf[1]_i_1__1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbuf[2]_i_1__1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbuf[3]_i_1__1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbuf[4]_i_1__1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbuf[5]_i_1__1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbuf[6]_i_1__1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbuf[7]_i_1__1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[8] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbuf[8]_i_1__1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[9] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\aSeqbuf[9]_i_2__1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[9] ));
  LUT4 #(
    .INIT(16'hD5C0)) 
    ackInvClearMask_sig_i_1__0
       (.I0(ackInvSet_sig_i_2__3_n_0),
        .I1(reqInvHshktrackClearMask),
        .I2(\stateOp_reg[0]_0 ),
        .I3(ackInvHshktrackClearMask),
        .O(ackInvClearMask_sig_i_1__0_n_0));
  FDCE ackInvClearMask_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(ackInvClearMask_sig_i_1__0_n_0),
        .Q(ackInvHshktrackClearMask));
  LUT5 #(
    .INIT(32'hF555B000)) 
    ackInvSelect_sig_i_1__1
       (.I0(ackInvSet_sig_i_2__3_n_0),
        .I1(reqInvHshktrackClearMask),
        .I2(reqInvHshktrackSelect),
        .I3(\stateOp_reg[0]_0 ),
        .I4(ackInvHshktrackSelect),
        .O(ackInvSelect_sig_i_1__1_n_0));
  FDCE ackInvSelect_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(ackInvSelect_sig_i_1__1_n_0),
        .Q(ackInvHshktrackSelect));
  LUT6 #(
    .INIT(64'hD5D5D5D58080C080)) 
    ackInvSetMask_sig_i_1__0
       (.I0(ackInvSet_sig_i_2__3_n_0),
        .I1(reqInvHshktrackSetMask),
        .I2(\stateOp_reg[0]_0 ),
        .I3(ackInvSetMask_sig_reg_0),
        .I4(reqInvHshktrackClearMask),
        .I5(ackInvHshktrackSetMask),
        .O(ackInvSetMask_sig_i_1__0_n_0));
  FDCE ackInvSetMask_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(ackInvSetMask_sig_i_1__0_n_0),
        .Q(ackInvHshktrackSetMask));
  LUT6 #(
    .INIT(64'hFF555555AB000000)) 
    ackInvSet_sig_i_1__6
       (.I0(ackInvSet_sig_i_2__3_n_0),
        .I1(reqInvHshktrackSelect),
        .I2(reqInvHshktrackClearMask),
        .I3(reqInvHshktrackSet),
        .I4(\stateOp_reg[0]_0 ),
        .I5(ackInvHshktrackSet),
        .O(ackInvSet_sig_i_1__6_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2453" *) 
  LUT3 #(
    .INIT(8'h10)) 
    ackInvSet_sig_i_2__3
       (.I0(stateOp[2]),
        .I1(stateOp[1]),
        .I2(\stateOp[2]_i_10__2_n_0 ),
        .O(ackInvSet_sig_i_2__3_n_0));
  FDCE ackInvSet_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(ackInvSet_sig_i_1__6_n_0),
        .Q(ackInvHshktrackSet));
  (* SOFT_HLUTNM = "soft_lutpair2464" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[0]_i_1__0 
       (.I0(capt[0]),
        .I1(\burstCnt[15]_i_5__1_n_0 ),
        .O(burstCapt[0]));
  (* SOFT_HLUTNM = "soft_lutpair2464" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[1]_i_1__0 
       (.I0(capt[1]),
        .I1(\burstCnt[15]_i_5__1_n_0 ),
        .O(burstCapt[1]));
  (* SOFT_HLUTNM = "soft_lutpair2465" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[2]_i_1__0 
       (.I0(capt[2]),
        .I1(\burstCnt[15]_i_5__1_n_0 ),
        .O(burstCapt[2]));
  (* SOFT_HLUTNM = "soft_lutpair2465" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[3]_i_1__0 
       (.I0(capt[3]),
        .I1(\burstCnt[15]_i_5__1_n_0 ),
        .O(burstCapt[3]));
  (* SOFT_HLUTNM = "soft_lutpair2451" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[4]_i_1__0 
       (.I0(capt[4]),
        .I1(\burstCnt[15]_i_5__1_n_0 ),
        .O(burstCapt[4]));
  (* SOFT_HLUTNM = "soft_lutpair2448" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[5]_i_1__0 
       (.I0(capt[5]),
        .I1(\burstCnt[15]_i_5__1_n_0 ),
        .O(burstCapt[5]));
  FDCE \burstCapt_reg[0] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(burstCapt[0]),
        .Q(\burstCapt_reg_n_0_[0] ));
  FDCE \burstCapt_reg[1] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(burstCapt[1]),
        .Q(\burstCapt_reg_n_0_[1] ));
  FDCE \burstCapt_reg[2] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(burstCapt[2]),
        .Q(\burstCapt_reg_n_0_[2] ));
  FDCE \burstCapt_reg[3] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(burstCapt[3]),
        .Q(\burstCapt_reg_n_0_[3] ));
  FDCE \burstCapt_reg[4] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(burstCapt[4]),
        .Q(\burstCapt_reg_n_0_[4] ));
  FDCE \burstCapt_reg[5] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(burstCapt[5]),
        .Q(\burstCapt_reg_n_0_[5] ));
  (* SOFT_HLUTNM = "soft_lutpair2461" *) 
  LUT3 #(
    .INIT(8'hA2)) 
    \burstCnt[0]_i_1__1 
       (.I0(\burstCnt[15]_i_5__1_n_0 ),
        .I1(\burstCnt_reg_n_0_[0] ),
        .I2(\burstCnt[15]_i_3__2_n_0 ),
        .O(burstCnt[0]));
  (* SOFT_HLUTNM = "soft_lutpair2463" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCnt[10]_i_1__1 
       (.I0(\burstCnt[10]_i_2__2_n_0 ),
        .I1(\burstCnt[15]_i_5__1_n_0 ),
        .O(\burstCnt[10]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h00A600AA)) 
    \burstCnt[10]_i_2__2 
       (.I0(\burstCnt_reg_n_0_[10] ),
        .I1(\burstCnt_reg_n_0_[9] ),
        .I2(\burstCnt[9]_i_2__1_n_0 ),
        .I3(\burstCnt[15]_i_3__2_n_0 ),
        .I4(\burstCnt_reg_n_0_[8] ),
        .O(\burstCnt[10]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2461" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCnt[11]_i_1__1 
       (.I0(\burstCnt[11]_i_2__1_n_0 ),
        .I1(\burstCnt[15]_i_5__1_n_0 ),
        .O(\burstCnt[11]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h2212222222222222)) 
    \burstCnt[11]_i_2__1 
       (.I0(\burstCnt_reg_n_0_[11] ),
        .I1(\burstCnt[15]_i_3__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[9] ),
        .I3(\burstCnt[9]_i_2__1_n_0 ),
        .I4(\burstCnt_reg_n_0_[8] ),
        .I5(\burstCnt_reg_n_0_[10] ),
        .O(\burstCnt[11]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2424" *) 
  LUT4 #(
    .INIT(16'hA600)) 
    \burstCnt[12]_i_1__1 
       (.I0(\burstCnt[14]_i_2__1_n_0 ),
        .I1(\burstCnt_reg_n_0_[12] ),
        .I2(\burstCnt[15]_i_3__2_n_0 ),
        .I3(\burstCnt[15]_i_5__1_n_0 ),
        .O(\burstCnt[12]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2424" *) 
  LUT5 #(
    .INIT(32'h07080000)) 
    \burstCnt[13]_i_1__1 
       (.I0(\burstCnt[14]_i_2__1_n_0 ),
        .I1(\burstCnt_reg_n_0_[12] ),
        .I2(\burstCnt[15]_i_3__2_n_0 ),
        .I3(\burstCnt_reg_n_0_[13] ),
        .I4(\burstCnt[15]_i_5__1_n_0 ),
        .O(\burstCnt[13]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h007F008000000000)) 
    \burstCnt[14]_i_1__1 
       (.I0(\burstCnt_reg_n_0_[13] ),
        .I1(\burstCnt[14]_i_2__1_n_0 ),
        .I2(\burstCnt_reg_n_0_[12] ),
        .I3(\burstCnt[15]_i_3__2_n_0 ),
        .I4(\burstCnt_reg_n_0_[14] ),
        .I5(\burstCnt[15]_i_5__1_n_0 ),
        .O(\burstCnt[14]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h0000080000000000)) 
    \burstCnt[14]_i_2__1 
       (.I0(\burstCnt_reg_n_0_[11] ),
        .I1(\burstCnt_reg_n_0_[10] ),
        .I2(\burstCnt[15]_i_3__2_n_0 ),
        .I3(\burstCnt_reg_n_0_[8] ),
        .I4(\burstCnt[9]_i_2__1_n_0 ),
        .I5(\burstCnt_reg_n_0_[9] ),
        .O(\burstCnt[14]_i_2__1_n_0 ));
  LUT4 #(
    .INIT(16'h8000)) 
    \burstCnt[15]_i_10__1 
       (.I0(\burstCnt_reg_n_0_[5] ),
        .I1(\burstCnt_reg_n_0_[2] ),
        .I2(\burstCnt_reg_n_0_[12] ),
        .I3(\burstCnt_reg_n_0_[9] ),
        .O(\burstCnt[15]_i_10__1_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \burstCnt[15]_i_11__1 
       (.I0(\burstCnt_reg_n_0_[1] ),
        .I1(\burstCnt_reg_n_0_[0] ),
        .I2(\burstCnt_reg_n_0_[13] ),
        .I3(\burstCnt_reg_n_0_[6] ),
        .O(\burstCnt[15]_i_11__1_n_0 ));
  LUT6 #(
    .INIT(64'hFFDFFFFFFFFFFFFF)) 
    \burstCnt[15]_i_12__1 
       (.I0(\burstCnt_reg_n_0_[8] ),
        .I1(\burstCnt[15]_i_3__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[7] ),
        .I3(\burstCnt[15]_i_13__2_n_0 ),
        .I4(\burstCnt_reg_n_0_[6] ),
        .I5(\burstCnt_reg_n_0_[9] ),
        .O(\burstCnt[15]_i_12__1_n_0 ));
  LUT6 #(
    .INIT(64'hFFF7FFFFFFFFFFFF)) 
    \burstCnt[15]_i_13__2 
       (.I0(\burstCnt_reg_n_0_[4] ),
        .I1(\burstCnt_reg_n_0_[2] ),
        .I2(\burstCnt[5]_i_3_n_0 ),
        .I3(\burstCnt[15]_i_3__2_n_0 ),
        .I4(\burstCnt_reg_n_0_[3] ),
        .I5(\burstCnt_reg_n_0_[5] ),
        .O(\burstCnt[15]_i_13__2_n_0 ));
  LUT6 #(
    .INIT(64'h0001000100000001)) 
    \burstCnt[15]_i_1__1 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(rdySeq),
        .I2(ackSeqbufBToSeqClear),
        .I3(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I4(TCapt),
        .I5(\i_reg_n_0_[0] ),
        .O(\burstCnt[15]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h55400000)) 
    \burstCnt[15]_i_2__1 
       (.I0(\burstCnt[15]_i_3__2_n_0 ),
        .I1(\burstCnt_reg_n_0_[14] ),
        .I2(\burstCnt[15]_i_4__1_n_0 ),
        .I3(\burstCnt_reg_n_0_[15] ),
        .I4(\burstCnt[15]_i_5__1_n_0 ),
        .O(\burstCnt[15]_i_2__1_n_0 ));
  LUT6 #(
    .INIT(64'hEEEEEEEEEEEFEEEE)) 
    \burstCnt[15]_i_3__2 
       (.I0(\burstCnt[15]_i_6__1_n_0 ),
        .I1(\burstCnt[15]_i_7__1_n_0 ),
        .I2(\burstCnt[15]_i_8__1_n_0 ),
        .I3(\burstCnt[15]_i_9__1_n_0 ),
        .I4(\burstCnt[15]_i_10__1_n_0 ),
        .I5(\burstCnt[15]_i_11__1_n_0 ),
        .O(\burstCnt[15]_i_3__2_n_0 ));
  LUT6 #(
    .INIT(64'h0000008000000000)) 
    \burstCnt[15]_i_4__1 
       (.I0(\burstCnt_reg_n_0_[13] ),
        .I1(\burstCnt_reg_n_0_[11] ),
        .I2(\burstCnt_reg_n_0_[10] ),
        .I3(\burstCnt[15]_i_3__2_n_0 ),
        .I4(\burstCnt[15]_i_12__1_n_0 ),
        .I5(\burstCnt_reg_n_0_[12] ),
        .O(\burstCnt[15]_i_4__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2462" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \burstCnt[15]_i_5__1 
       (.I0(\dwrSeqbuf[20]_i_2_n_0 ),
        .I1(first),
        .O(\burstCnt[15]_i_5__1_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \burstCnt[15]_i_6__1 
       (.I0(\burstCapt_reg_n_0_[0] ),
        .I1(capt[0]),
        .I2(capt[1]),
        .I3(\burstCapt_reg_n_0_[1] ),
        .I4(capt[2]),
        .I5(\burstCapt_reg_n_0_[2] ),
        .O(\burstCnt[15]_i_6__1_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \burstCnt[15]_i_7__1 
       (.I0(\burstCapt_reg_n_0_[3] ),
        .I1(capt[3]),
        .I2(capt[5]),
        .I3(\burstCapt_reg_n_0_[5] ),
        .I4(capt[4]),
        .I5(\burstCapt_reg_n_0_[4] ),
        .O(\burstCnt[15]_i_7__1_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \burstCnt[15]_i_8__1 
       (.I0(\burstCnt_reg_n_0_[10] ),
        .I1(\burstCnt_reg_n_0_[4] ),
        .I2(\burstCnt_reg_n_0_[15] ),
        .I3(\burstCnt_reg_n_0_[11] ),
        .O(\burstCnt[15]_i_8__1_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \burstCnt[15]_i_9__1 
       (.I0(\burstCnt_reg_n_0_[8] ),
        .I1(\burstCnt_reg_n_0_[7] ),
        .I2(\burstCnt_reg_n_0_[14] ),
        .I3(\burstCnt_reg_n_0_[3] ),
        .O(\burstCnt[15]_i_9__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2425" *) 
  LUT4 #(
    .INIT(16'h0014)) 
    \burstCnt[1]_i_1__1 
       (.I0(first),
        .I1(\burstCnt_reg_n_0_[0] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt[2]_i_2_n_0 ),
        .O(\burstCnt[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2425" *) 
  LUT5 #(
    .INIT(32'h00001444)) 
    \burstCnt[2]_i_1__1 
       (.I0(first),
        .I1(\burstCnt_reg_n_0_[2] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt[2]_i_2_n_0 ),
        .O(\burstCnt[2]_i_1__1_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \burstCnt[2]_i_2 
       (.I0(\burstCnt[15]_i_3__2_n_0 ),
        .I1(\dwrSeqbuf[20]_i_2_n_0 ),
        .O(\burstCnt[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000028888888)) 
    \burstCnt[3]_i_1__1 
       (.I0(\burstCnt[15]_i_5__1_n_0 ),
        .I1(\burstCnt_reg_n_0_[3] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt_reg_n_0_[2] ),
        .I5(\burstCnt[15]_i_3__2_n_0 ),
        .O(burstCnt[3]));
  (* SOFT_HLUTNM = "soft_lutpair2462" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[4]_i_1__1 
       (.I0(first),
        .I1(\burstCnt[4]_i_2__1_n_0 ),
        .O(\burstCnt[4]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF20DFFFFFFFFF)) 
    \burstCnt[4]_i_2__1 
       (.I0(\burstCnt_reg_n_0_[3] ),
        .I1(\burstCnt[5]_i_3_n_0 ),
        .I2(\burstCnt_reg_n_0_[2] ),
        .I3(\burstCnt_reg_n_0_[4] ),
        .I4(\burstCnt[15]_i_3__2_n_0 ),
        .I5(\dwrSeqbuf[20]_i_2_n_0 ),
        .O(\burstCnt[4]_i_2__1_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \burstCnt[5]_i_1__1 
       (.I0(\burstCnt[15]_i_5__1_n_0 ),
        .I1(\burstCnt[5]_i_2__1_n_0 ),
        .O(burstCnt[5]));
  LUT6 #(
    .INIT(64'hCECCCCCCFDFFFFFF)) 
    \burstCnt[5]_i_2__1 
       (.I0(\burstCnt_reg_n_0_[3] ),
        .I1(\burstCnt[15]_i_3__2_n_0 ),
        .I2(\burstCnt[5]_i_3_n_0 ),
        .I3(\burstCnt_reg_n_0_[2] ),
        .I4(\burstCnt_reg_n_0_[4] ),
        .I5(\burstCnt_reg_n_0_[5] ),
        .O(\burstCnt[5]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2434" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \burstCnt[5]_i_3 
       (.I0(\burstCnt_reg_n_0_[0] ),
        .I1(\burstCnt_reg_n_0_[1] ),
        .O(\burstCnt[5]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h4B440000)) 
    \burstCnt[6]_i_1__1 
       (.I0(\burstCnt[7]_i_2__2_n_0 ),
        .I1(\burstCnt_reg_n_0_[5] ),
        .I2(\burstCnt[15]_i_3__2_n_0 ),
        .I3(\burstCnt_reg_n_0_[6] ),
        .I4(\burstCnt[15]_i_5__1_n_0 ),
        .O(\burstCnt[6]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h00008AAA00002000)) 
    \burstCnt[7]_i_1__1 
       (.I0(\burstCnt[15]_i_5__1_n_0 ),
        .I1(\burstCnt[7]_i_2__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[5] ),
        .I3(\burstCnt_reg_n_0_[6] ),
        .I4(\burstCnt[15]_i_3__2_n_0 ),
        .I5(\burstCnt_reg_n_0_[7] ),
        .O(burstCnt[7]));
  LUT6 #(
    .INIT(64'hDFFFFFFFFFFFFFFF)) 
    \burstCnt[7]_i_2__2 
       (.I0(\burstCnt_reg_n_0_[3] ),
        .I1(\burstCnt[15]_i_3__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt_reg_n_0_[2] ),
        .I5(\burstCnt_reg_n_0_[4] ),
        .O(\burstCnt[7]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2463" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCnt[8]_i_1__1 
       (.I0(\burstCnt[8]_i_2__2_n_0 ),
        .I1(\burstCnt[15]_i_5__1_n_0 ),
        .O(\burstCnt[8]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h0A0A060A0A0A0A0A)) 
    \burstCnt[8]_i_2__2 
       (.I0(\burstCnt_reg_n_0_[8] ),
        .I1(\burstCnt_reg_n_0_[6] ),
        .I2(\burstCnt[15]_i_3__2_n_0 ),
        .I3(\burstCnt_reg_n_0_[5] ),
        .I4(\burstCnt[7]_i_2__2_n_0 ),
        .I5(\burstCnt_reg_n_0_[7] ),
        .O(\burstCnt[8]_i_2__2_n_0 ));
  LUT5 #(
    .INIT(32'h23100000)) 
    \burstCnt[9]_i_1__1 
       (.I0(\burstCnt[9]_i_2__1_n_0 ),
        .I1(\burstCnt[15]_i_3__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[8] ),
        .I3(\burstCnt_reg_n_0_[9] ),
        .I4(\burstCnt[15]_i_5__1_n_0 ),
        .O(\burstCnt[9]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2435" *) 
  LUT5 #(
    .INIT(32'hFFDFFFFF)) 
    \burstCnt[9]_i_2__1 
       (.I0(\burstCnt_reg_n_0_[7] ),
        .I1(\burstCnt[7]_i_2__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[5] ),
        .I3(\burstCnt[15]_i_3__2_n_0 ),
        .I4(\burstCnt_reg_n_0_[6] ),
        .O(\burstCnt[9]_i_2__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[0] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(burstCnt[0]),
        .Q(\burstCnt_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[10] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[10]_i_1__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[11] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[11]_i_1__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[12] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[12]_i_1__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[12] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[13] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[13]_i_1__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[13] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[14] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[14]_i_1__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[14] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[15] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[15]_i_2__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[15] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[1] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[1]_i_1__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[2] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[2]_i_1__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[3] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(burstCnt[3]),
        .Q(\burstCnt_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[4] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[4]_i_1__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[5] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(burstCnt[5]),
        .Q(\burstCnt_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[6] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[6]_i_1__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[7] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(burstCnt[7]),
        .Q(\burstCnt_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[8] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[8]_i_1__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[9] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\burstCnt[9]_i_1__1_n_0 ),
        .Q(\burstCnt_reg_n_0_[9] ));
  FDCE \capt_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\capt_reg[5]_0 [0]),
        .Q(capt[0]));
  FDCE \capt_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\capt_reg[5]_0 [1]),
        .Q(capt[1]));
  FDCE \capt_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\capt_reg[5]_0 [2]),
        .Q(capt[2]));
  FDCE \capt_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\capt_reg[5]_0 [3]),
        .Q(capt[3]));
  FDCE \capt_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\capt_reg[5]_0 [4]),
        .Q(capt[4]));
  FDCE \capt_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\capt_reg[5]_0 [5]),
        .Q(capt[5]));
  LUT6 #(
    .INIT(64'hFEAAFEAABAAAFEAA)) 
    \dwrSeqbuf[0]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[20]_i_2_n_0 ),
        .I2(\dwrSeqbuf[0]_i_2__1_n_0 ),
        .I3(\aSeqbuf[8]_i_5__1_n_0 ),
        .I4(\burstCnt_reg_n_0_[0] ),
        .I5(\burstCnt[15]_i_3__2_n_0 ),
        .O(\dwrSeqbuf[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2446" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[0]_i_2__1 
       (.I0(\quad_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[0]),
        .O(\dwrSeqbuf[0]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2457" *) 
  LUT3 #(
    .INIT(8'hEA)) 
    \dwrSeqbuf[10]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[31]_i_4__1_n_0 ),
        .I2(\burstCnt[10]_i_2__2_n_0 ),
        .O(\dwrSeqbuf[10]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2456" *) 
  LUT3 #(
    .INIT(8'hEA)) 
    \dwrSeqbuf[11]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[31]_i_4__1_n_0 ),
        .I2(\burstCnt[11]_i_2__1_n_0 ),
        .O(\dwrSeqbuf[11]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'hEAEEAEAA)) 
    \dwrSeqbuf[12]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[31]_i_4__1_n_0 ),
        .I2(\burstCnt[15]_i_3__2_n_0 ),
        .I3(\burstCnt_reg_n_0_[12] ),
        .I4(\burstCnt[14]_i_2__1_n_0 ),
        .O(\dwrSeqbuf[12]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAEAAEAAAEAAAEA)) 
    \dwrSeqbuf[13]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[31]_i_4__1_n_0 ),
        .I2(\burstCnt_reg_n_0_[13] ),
        .I3(\burstCnt[15]_i_3__2_n_0 ),
        .I4(\burstCnt_reg_n_0_[12] ),
        .I5(\burstCnt[14]_i_2__1_n_0 ),
        .O(\dwrSeqbuf[13]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2428" *) 
  LUT5 #(
    .INIT(32'hEAEEAEAA)) 
    \dwrSeqbuf[14]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[31]_i_4__1_n_0 ),
        .I2(\burstCnt[15]_i_3__2_n_0 ),
        .I3(\burstCnt_reg_n_0_[14] ),
        .I4(\burstCnt[15]_i_4__1_n_0 ),
        .O(\dwrSeqbuf[14]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAEEEAEAEA)) 
    \dwrSeqbuf[15]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[31]_i_4__1_n_0 ),
        .I2(\burstCnt_reg_n_0_[15] ),
        .I3(\burstCnt[15]_i_4__1_n_0 ),
        .I4(\burstCnt_reg_n_0_[14] ),
        .I5(\burstCnt[15]_i_3__2_n_0 ),
        .O(\dwrSeqbuf[15]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAEAA)) 
    \dwrSeqbuf[16]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\FSM_onehot_stateSeq[5]_i_6__1_n_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_5__1_n_0 ),
        .I3(capt[0]),
        .I4(ackSeqbufBToSeqClear),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\dwrSeqbuf[16]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2456" *) 
  LUT3 #(
    .INIT(8'hEA)) 
    \dwrSeqbuf[17]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\aSeqbuf[8]_i_5__1_n_0 ),
        .I2(capt[1]),
        .O(\dwrSeqbuf[17]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAAAAEAA)) 
    \dwrSeqbuf[18]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\FSM_onehot_stateSeq[5]_i_6__1_n_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_5__1_n_0 ),
        .I3(capt[2]),
        .I4(ackSeqbufBToSeqClear),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\dwrSeqbuf[18]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2455" *) 
  LUT3 #(
    .INIT(8'hEA)) 
    \dwrSeqbuf[19]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\aSeqbuf[8]_i_5__1_n_0 ),
        .I2(capt[3]),
        .O(\dwrSeqbuf[19]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[1]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[1]_i_2__1_n_0 ),
        .I2(\dwrSeqbuf[20]_i_2_n_0 ),
        .I3(\dwrSeqbuf[1]_i_3__1_n_0 ),
        .I4(\aSeqbuf[8]_i_5__1_n_0 ),
        .O(\dwrSeqbuf[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2444" *) 
  LUT3 #(
    .INIT(8'hEB)) 
    \dwrSeqbuf[1]_i_2__1 
       (.I0(\burstCnt[2]_i_2_n_0 ),
        .I1(\burstCnt_reg_n_0_[1] ),
        .I2(\burstCnt_reg_n_0_[0] ),
        .O(\dwrSeqbuf[1]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2443" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[1]_i_3__1 
       (.I0(\quad_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[1]),
        .O(\dwrSeqbuf[1]_i_3__1_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[20]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(capt[4]),
        .I2(\dwrSeqbuf[20]_i_2_n_0 ),
        .I3(\aSeqbuf[8]_i_5__1_n_0 ),
        .I4(\quad_reg_n_0_[20] ),
        .I5(\i_reg_n_0_[0] ),
        .O(\dwrSeqbuf[20]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h0041000000000041)) 
    \dwrSeqbuf[20]_i_2 
       (.I0(\dwrSeqbuf[20]_i_3_n_0 ),
        .I1(capt[3]),
        .I2(\dwrSeqbuf[3]_i_2__1_n_0 ),
        .I3(\dwrSeqbuf[20]_i_4_n_0 ),
        .I4(capt[0]),
        .I5(\dwrSeqbuf[0]_i_2__1_n_0 ),
        .O(\dwrSeqbuf[20]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2433" *) 
  LUT5 #(
    .INIT(32'h6F00F600)) 
    \dwrSeqbuf[20]_i_3 
       (.I0(\quad_reg_n_0_[5] ),
        .I1(capt[5]),
        .I2(\quad_reg_n_0_[4] ),
        .I3(\i_reg_n_0_[0] ),
        .I4(capt[4]),
        .O(\dwrSeqbuf[20]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2432" *) 
  LUT5 #(
    .INIT(32'h6F00F600)) 
    \dwrSeqbuf[20]_i_4 
       (.I0(\quad_reg_n_0_[2] ),
        .I1(capt[2]),
        .I2(\quad_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[0] ),
        .I4(capt[1]),
        .O(\dwrSeqbuf[20]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2455" *) 
  LUT3 #(
    .INIT(8'hEA)) 
    \dwrSeqbuf[21]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\aSeqbuf[8]_i_5__1_n_0 ),
        .I2(capt[5]),
        .O(\dwrSeqbuf[21]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[2]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[2]_i_2__1_n_0 ),
        .I2(\dwrSeqbuf[20]_i_2_n_0 ),
        .I3(\dwrSeqbuf[2]_i_3__1_n_0 ),
        .I4(\aSeqbuf[8]_i_5__1_n_0 ),
        .O(\dwrSeqbuf[2]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2444" *) 
  LUT4 #(
    .INIT(16'hEABF)) 
    \dwrSeqbuf[2]_i_2__1 
       (.I0(\burstCnt[2]_i_2_n_0 ),
        .I1(\burstCnt_reg_n_0_[0] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[2] ),
        .O(\dwrSeqbuf[2]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2432" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[2]_i_3__1 
       (.I0(\quad_reg_n_0_[2] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[2]),
        .O(\dwrSeqbuf[2]_i_3__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2429" *) 
  LUT5 #(
    .INIT(32'h45444444)) 
    \dwrSeqbuf[30]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_2_n_0 ),
        .I1(\FSM_onehot_stateSeq[0]_i_2__0_n_0 ),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .I4(stateOp[1]),
        .O(\dwrSeqbuf[30]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2431" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \dwrSeqbuf[30]_i_2 
       (.I0(ackSeqbufBToSeqClear),
        .I1(rdySeq),
        .I2(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I3(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\dwrSeqbuf[30]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAAABAAABAAABAAAA)) 
    \dwrSeqbuf[31]_i_1__1 
       (.I0(\burstCnt[15]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[31]_i_3__1_n_0 ),
        .I2(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I3(ackSeqbufBToSeqClear),
        .I4(rdySeq),
        .I5(\FSM_onehot_stateSeq_reg[3]_0 ),
        .O(\dwrSeqbuf[31]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2428" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \dwrSeqbuf[31]_i_2__1 
       (.I0(\dwrSeqbuf[31]_i_4__1_n_0 ),
        .I1(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .O(\dwrSeqbuf[31]_i_2__1_n_0 ));
  LUT6 #(
    .INIT(64'h1F111F1F1F1F1F1F)) 
    \dwrSeqbuf[31]_i_3__1 
       (.I0(TCapt),
        .I1(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I2(\FSM_onehot_stateSeq[0]_i_2__0_n_0 ),
        .I3(stateOp[0]),
        .I4(stateOp[2]),
        .I5(stateOp[1]),
        .O(\dwrSeqbuf[31]_i_3__1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000200000000)) 
    \dwrSeqbuf[31]_i_4__1 
       (.I0(\dwrSeqbuf[20]_i_2_n_0 ),
        .I1(ackSeqbufBToSeqClear),
        .I2(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I3(rdySeq),
        .I4(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I5(TCapt),
        .O(\dwrSeqbuf[31]_i_4__1_n_0 ));
  LUT5 #(
    .INIT(32'hBAAAFEAA)) 
    \dwrSeqbuf[3]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[20]_i_2_n_0 ),
        .I2(\dwrSeqbuf[3]_i_2__1_n_0 ),
        .I3(\aSeqbuf[8]_i_5__1_n_0 ),
        .I4(\dwrSeqbuf[3]_i_3__1_n_0 ),
        .O(\dwrSeqbuf[3]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2449" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[3]_i_2__1 
       (.I0(\quad_reg_n_0_[3] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[3]),
        .O(\dwrSeqbuf[3]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2434" *) 
  LUT5 #(
    .INIT(32'hEAAABFFF)) 
    \dwrSeqbuf[3]_i_3__1 
       (.I0(\burstCnt[15]_i_3__2_n_0 ),
        .I1(\burstCnt_reg_n_0_[2] ),
        .I2(\burstCnt_reg_n_0_[0] ),
        .I3(\burstCnt_reg_n_0_[1] ),
        .I4(\burstCnt_reg_n_0_[3] ),
        .O(\dwrSeqbuf[3]_i_3__1_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[4]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\burstCnt[4]_i_2__1_n_0 ),
        .I2(\dwrSeqbuf[20]_i_2_n_0 ),
        .I3(\dwrSeqbuf[4]_i_2__1_n_0 ),
        .I4(\aSeqbuf[8]_i_5__1_n_0 ),
        .O(\dwrSeqbuf[4]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2447" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[4]_i_2__1 
       (.I0(\quad_reg_n_0_[4] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[4]),
        .O(\dwrSeqbuf[4]_i_2__1_n_0 ));
  LUT5 #(
    .INIT(32'hBAAAFEAA)) 
    \dwrSeqbuf[5]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[20]_i_2_n_0 ),
        .I2(\dwrSeqbuf[5]_i_2__1_n_0 ),
        .I3(\aSeqbuf[8]_i_5__1_n_0 ),
        .I4(\burstCnt[5]_i_2__1_n_0 ),
        .O(\dwrSeqbuf[5]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2433" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[5]_i_2__1 
       (.I0(\quad_reg_n_0_[5] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[5]),
        .O(\dwrSeqbuf[5]_i_2__1_n_0 ));
  LUT6 #(
    .INIT(64'hAAEAAAEAEEAEAAEA)) 
    \dwrSeqbuf[6]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[31]_i_4__1_n_0 ),
        .I2(\burstCnt_reg_n_0_[6] ),
        .I3(\burstCnt[15]_i_3__2_n_0 ),
        .I4(\burstCnt_reg_n_0_[5] ),
        .I5(\burstCnt[7]_i_2__2_n_0 ),
        .O(\dwrSeqbuf[6]_i_1__1_n_0 ));
  LUT3 #(
    .INIT(8'hBA)) 
    \dwrSeqbuf[7]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[7]_i_2__1_n_0 ),
        .I2(\dwrSeqbuf[31]_i_4__1_n_0 ),
        .O(\dwrSeqbuf[7]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2435" *) 
  LUT5 #(
    .INIT(32'hDDDDEDDD)) 
    \dwrSeqbuf[7]_i_2__1 
       (.I0(\burstCnt_reg_n_0_[7] ),
        .I1(\burstCnt[15]_i_3__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[6] ),
        .I3(\burstCnt_reg_n_0_[5] ),
        .I4(\burstCnt[7]_i_2__2_n_0 ),
        .O(\dwrSeqbuf[7]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2457" *) 
  LUT3 #(
    .INIT(8'hEA)) 
    \dwrSeqbuf[8]_i_1__1 
       (.I0(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I1(\dwrSeqbuf[31]_i_4__1_n_0 ),
        .I2(\burstCnt[8]_i_2__2_n_0 ),
        .O(\dwrSeqbuf[8]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF2310FFFF0000)) 
    \dwrSeqbuf[9]_i_1__1 
       (.I0(\burstCnt[9]_i_2__1_n_0 ),
        .I1(\burstCnt[15]_i_3__2_n_0 ),
        .I2(\burstCnt_reg_n_0_[8] ),
        .I3(\burstCnt_reg_n_0_[9] ),
        .I4(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .I5(\dwrSeqbuf[31]_i_4__1_n_0 ),
        .O(\dwrSeqbuf[9]_i_1__1_n_0 ));
  FDCE \dwrSeqbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[0]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[0]));
  FDCE \dwrSeqbuf_reg[10] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[10]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[10]));
  FDCE \dwrSeqbuf_reg[11] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[11]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[11]));
  FDCE \dwrSeqbuf_reg[12] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[12]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[12]));
  FDCE \dwrSeqbuf_reg[13] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[13]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[13]));
  FDCE \dwrSeqbuf_reg[14] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[14]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[14]));
  FDCE \dwrSeqbuf_reg[15] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[15]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[15]));
  FDCE \dwrSeqbuf_reg[16] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[16]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[16]));
  FDCE \dwrSeqbuf_reg[17] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[17]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[17]));
  FDCE \dwrSeqbuf_reg[18] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[18]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[18]));
  FDCE \dwrSeqbuf_reg[19] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[19]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[19]));
  FDCE \dwrSeqbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[1]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[1]));
  FDCE \dwrSeqbuf_reg[20] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[20]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[20]));
  FDCE \dwrSeqbuf_reg[21] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[21]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[21]));
  FDCE \dwrSeqbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[2]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[2]));
  FDCE \dwrSeqbuf_reg[30] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[30]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[30]));
  FDCE \dwrSeqbuf_reg[31] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[31]_i_2__1_n_0 ),
        .Q(dwrSeqbuf[31]));
  FDCE \dwrSeqbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[3]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[3]));
  FDCE \dwrSeqbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[4]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[4]));
  FDCE \dwrSeqbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[5]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[5]));
  FDCE \dwrSeqbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[6]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[6]));
  FDCE \dwrSeqbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[7]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[7]));
  FDCE \dwrSeqbuf_reg[8] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[8]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[8]));
  FDCE \dwrSeqbuf_reg[9] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\dwrSeqbuf[9]_i_1__1_n_0 ),
        .Q(dwrSeqbuf[9]));
  (* SOFT_HLUTNM = "soft_lutpair2445" *) 
  LUT2 #(
    .INIT(4'h2)) 
    enSeqbuf_i_1__2
       (.I0(\i_reg_n_0_[0] ),
        .I1(first),
        .O(enSeqbuf));
  FDCE enSeqbuf_reg
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(enSeqbuf),
        .Q(enSeqbuf_reg_n_0));
  FDPE first_reg
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .D(first),
        .PRE(enSeqbuf_reg_0),
        .Q(first__0));
  LUT5 #(
    .INIT(32'h88FF0700)) 
    \i[0]_i_1__20 
       (.I0(\FSM_onehot_stateSeq[3]_i_2__2_n_0 ),
        .I1(TCapt),
        .I2(first),
        .I3(\dwrSeqbuf[30]_i_2_n_0 ),
        .I4(\i_reg_n_0_[0] ),
        .O(\i[0]_i_1__20_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_1
       (.I0(Q[31]),
        .I1(\TCaptMax_reg_n_0_[31] ),
        .I2(Q[30]),
        .I3(\TCaptMax_reg_n_0_[30] ),
        .O(i__carry__0_i_1_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_10
       (.I0(\TCaptMax_reg_n_0_[29] ),
        .I1(Q[29]),
        .I2(\TCaptMax_reg_n_0_[28] ),
        .I3(Q[28]),
        .O(i__carry__0_i_10_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_11
       (.I0(\TCaptMax_reg_n_0_[27] ),
        .I1(Q[27]),
        .I2(\TCaptMax_reg_n_0_[26] ),
        .I3(Q[26]),
        .O(i__carry__0_i_11_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_12
       (.I0(\TCaptMax_reg_n_0_[25] ),
        .I1(Q[25]),
        .I2(\TCaptMax_reg_n_0_[24] ),
        .I3(Q[24]),
        .O(i__carry__0_i_12_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_13
       (.I0(\TCaptMax_reg_n_0_[23] ),
        .I1(Q[23]),
        .I2(\TCaptMax_reg_n_0_[22] ),
        .I3(Q[22]),
        .O(i__carry__0_i_13_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_14
       (.I0(\TCaptMax_reg_n_0_[21] ),
        .I1(Q[21]),
        .I2(\TCaptMax_reg_n_0_[20] ),
        .I3(Q[20]),
        .O(i__carry__0_i_14_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_15
       (.I0(\TCaptMax_reg_n_0_[19] ),
        .I1(Q[19]),
        .I2(\TCaptMax_reg_n_0_[18] ),
        .I3(Q[18]),
        .O(i__carry__0_i_15_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_16
       (.I0(\TCaptMax_reg_n_0_[17] ),
        .I1(Q[17]),
        .I2(\TCaptMax_reg_n_0_[16] ),
        .I3(Q[16]),
        .O(i__carry__0_i_16_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_2
       (.I0(Q[29]),
        .I1(\TCaptMax_reg_n_0_[29] ),
        .I2(Q[28]),
        .I3(\TCaptMax_reg_n_0_[28] ),
        .O(i__carry__0_i_2_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_3
       (.I0(Q[27]),
        .I1(\TCaptMax_reg_n_0_[27] ),
        .I2(Q[26]),
        .I3(\TCaptMax_reg_n_0_[26] ),
        .O(i__carry__0_i_3_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_4
       (.I0(Q[25]),
        .I1(\TCaptMax_reg_n_0_[25] ),
        .I2(Q[24]),
        .I3(\TCaptMax_reg_n_0_[24] ),
        .O(i__carry__0_i_4_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_5
       (.I0(Q[23]),
        .I1(\TCaptMax_reg_n_0_[23] ),
        .I2(Q[22]),
        .I3(\TCaptMax_reg_n_0_[22] ),
        .O(i__carry__0_i_5_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_6
       (.I0(Q[21]),
        .I1(\TCaptMax_reg_n_0_[21] ),
        .I2(Q[20]),
        .I3(\TCaptMax_reg_n_0_[20] ),
        .O(i__carry__0_i_6_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_7
       (.I0(Q[19]),
        .I1(\TCaptMax_reg_n_0_[19] ),
        .I2(Q[18]),
        .I3(\TCaptMax_reg_n_0_[18] ),
        .O(i__carry__0_i_7_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry__0_i_8
       (.I0(Q[17]),
        .I1(\TCaptMax_reg_n_0_[17] ),
        .I2(Q[16]),
        .I3(\TCaptMax_reg_n_0_[16] ),
        .O(i__carry__0_i_8_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry__0_i_9
       (.I0(\TCaptMax_reg_n_0_[31] ),
        .I1(Q[31]),
        .I2(\TCaptMax_reg_n_0_[30] ),
        .I3(Q[30]),
        .O(i__carry__0_i_9_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_10__4
       (.I0(\TCaptMax_reg_n_0_[13] ),
        .I1(Q[13]),
        .I2(\TCaptMax_reg_n_0_[12] ),
        .I3(Q[12]),
        .O(i__carry_i_10__4_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_11__3
       (.I0(\TCaptMax_reg_n_0_[11] ),
        .I1(Q[11]),
        .I2(\TCaptMax_reg_n_0_[10] ),
        .I3(Q[10]),
        .O(i__carry_i_11__3_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_12__1
       (.I0(\TCaptMax_reg_n_0_[9] ),
        .I1(Q[9]),
        .I2(\TCaptMax_reg_n_0_[8] ),
        .I3(Q[8]),
        .O(i__carry_i_12__1_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_13__0
       (.I0(\TCaptMax_reg_n_0_[7] ),
        .I1(Q[7]),
        .I2(\TCaptMax_reg_n_0_[6] ),
        .I3(Q[6]),
        .O(i__carry_i_13__0_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_14
       (.I0(\TCaptMax_reg_n_0_[5] ),
        .I1(Q[5]),
        .I2(\TCaptMax_reg_n_0_[4] ),
        .I3(Q[4]),
        .O(i__carry_i_14_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_15
       (.I0(\TCaptMax_reg_n_0_[3] ),
        .I1(Q[3]),
        .I2(\TCaptMax_reg_n_0_[2] ),
        .I3(Q[2]),
        .O(i__carry_i_15_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_16
       (.I0(\TCaptMax_reg_n_0_[1] ),
        .I1(Q[1]),
        .I2(\TCaptMax_reg_n_0_[0] ),
        .I3(Q[0]),
        .O(i__carry_i_16_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_1__5
       (.I0(Q[15]),
        .I1(\TCaptMax_reg_n_0_[15] ),
        .I2(Q[14]),
        .I3(\TCaptMax_reg_n_0_[14] ),
        .O(i__carry_i_1__5_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_2__5
       (.I0(Q[13]),
        .I1(\TCaptMax_reg_n_0_[13] ),
        .I2(Q[12]),
        .I3(\TCaptMax_reg_n_0_[12] ),
        .O(i__carry_i_2__5_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_3__5
       (.I0(Q[11]),
        .I1(\TCaptMax_reg_n_0_[11] ),
        .I2(Q[10]),
        .I3(\TCaptMax_reg_n_0_[10] ),
        .O(i__carry_i_3__5_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_4__5
       (.I0(Q[9]),
        .I1(\TCaptMax_reg_n_0_[9] ),
        .I2(Q[8]),
        .I3(\TCaptMax_reg_n_0_[8] ),
        .O(i__carry_i_4__5_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_5__5
       (.I0(Q[7]),
        .I1(\TCaptMax_reg_n_0_[7] ),
        .I2(Q[6]),
        .I3(\TCaptMax_reg_n_0_[6] ),
        .O(i__carry_i_5__5_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_6__5
       (.I0(Q[5]),
        .I1(\TCaptMax_reg_n_0_[5] ),
        .I2(Q[4]),
        .I3(\TCaptMax_reg_n_0_[4] ),
        .O(i__carry_i_6__5_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_7__4
       (.I0(Q[3]),
        .I1(\TCaptMax_reg_n_0_[3] ),
        .I2(Q[2]),
        .I3(\TCaptMax_reg_n_0_[2] ),
        .O(i__carry_i_7__4_n_0));
  LUT4 #(
    .INIT(16'h22B2)) 
    i__carry_i_8__4
       (.I0(Q[1]),
        .I1(\TCaptMax_reg_n_0_[1] ),
        .I2(Q[0]),
        .I3(\TCaptMax_reg_n_0_[0] ),
        .O(i__carry_i_8__4_n_0));
  LUT4 #(
    .INIT(16'h9009)) 
    i__carry_i_9__4
       (.I0(\TCaptMax_reg_n_0_[15] ),
        .I1(Q[15]),
        .I2(\TCaptMax_reg_n_0_[14] ),
        .I3(Q[14]),
        .O(i__carry_i_9__4_n_0));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\i[0]_i_1__20_n_0 ),
        .Q(\i_reg_n_0_[0] ));
  FDCE \mask_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\mask_reg[0]_1 ),
        .Q(\mask_reg[0]_0 ));
  FDCE \mask_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\mask_reg[1]_1 ),
        .Q(\mask_reg[1]_0 ));
  FDCE \mask_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\mask_reg[2]_1 ),
        .Q(\mask_reg[2]_0 ));
  FDCE \mask_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\mask_reg[3]_1 ),
        .Q(\mask_reg[3]_0 ));
  FDCE \mask_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\mask_reg[4]_1 ),
        .Q(\mask_reg[4]_0 ));
  FDCE \mask_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(\mask_reg[5]_1 ),
        .Q(\mask_reg[5]_0 ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a32b64__xdcDup__2 mySeqbuf
       (.\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ({dwrSeqbuf[31:30],dwrSeqbuf[21:0]}),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\aSeqbufB_reg_n_0_[8] ,\aSeqbufB_reg_n_0_[7] ,\aSeqbufB_reg_n_0_[6] ,\aSeqbufB_reg_n_0_[5] ,\aSeqbufB_reg_n_0_[4] ,\aSeqbufB_reg_n_0_[3] ,\aSeqbufB_reg_n_0_[2] ,\aSeqbufB_reg_n_0_[1] ,\aSeqbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 (stateSeqbufB_reg),
        .Q({\aSeqbuf_reg_n_0_[9] ,\aSeqbuf_reg_n_0_[8] ,\aSeqbuf_reg_n_0_[7] ,\aSeqbuf_reg_n_0_[6] ,\aSeqbuf_reg_n_0_[5] ,\aSeqbuf_reg_n_0_[4] ,\aSeqbuf_reg_n_0_[3] ,\aSeqbuf_reg_n_0_[2] ,\aSeqbuf_reg_n_0_[1] ,\aSeqbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .doutb(doutb),
        .ena(enSeqbuf_reg_n_0));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry
       (.CI(Q[0]),
        .CI_TOP(1'b0),
        .CO({plusOp_carry_n_0,plusOp_carry_n_1,plusOp_carry_n_2,plusOp_carry_n_3,plusOp_carry_n_4,plusOp_carry_n_5,plusOp_carry_n_6,plusOp_carry_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in12[8:1]),
        .S(Q[8:1]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry__0
       (.CI(plusOp_carry_n_0),
        .CI_TOP(1'b0),
        .CO({plusOp_carry__0_n_0,plusOp_carry__0_n_1,plusOp_carry__0_n_2,plusOp_carry__0_n_3,plusOp_carry__0_n_4,plusOp_carry__0_n_5,plusOp_carry__0_n_6,plusOp_carry__0_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in12[16:9]),
        .S(Q[16:9]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry__1
       (.CI(plusOp_carry__0_n_0),
        .CI_TOP(1'b0),
        .CO({plusOp_carry__1_n_0,plusOp_carry__1_n_1,plusOp_carry__1_n_2,plusOp_carry__1_n_3,plusOp_carry__1_n_4,plusOp_carry__1_n_5,plusOp_carry__1_n_6,plusOp_carry__1_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in12[24:17]),
        .S(Q[24:17]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry__2
       (.CI(plusOp_carry__1_n_0),
        .CI_TOP(1'b0),
        .CO({NLW_plusOp_carry__2_CO_UNCONNECTED[7:6],plusOp_carry__2_n_2,plusOp_carry__2_n_3,plusOp_carry__2_n_4,plusOp_carry__2_n_5,plusOp_carry__2_n_6,plusOp_carry__2_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({NLW_plusOp_carry__2_O_UNCONNECTED[7],in12[31:25]}),
        .S({1'b0,Q[31:25]}));
  LUT6 #(
    .INIT(64'h2F2F2FFF20202000)) 
    ptr0SeqbufTrackNotFixed_i_1__1
       (.I0(\burstCnt[2]_i_2_n_0 ),
        .I1(first),
        .I2(\aSeqbuf[9]_i_3__1_n_0 ),
        .I3(\aSeqbuf[9]_i_4__2_n_0 ),
        .I4(\FSM_onehot_stateSeq[5]_i_5__1_n_0 ),
        .I5(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0SeqbufTrackNotFixed_i_1__1_n_0));
  FDCE ptr0SeqbufTrackNotFixed_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(ptr0SeqbufTrackNotFixed_i_1__1_n_0),
        .Q(ptr0SeqbufTrackNotFixed_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2446" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[0]_i_1__1 
       (.I0(capt[0]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[0] ),
        .I3(first),
        .O(quad[0]));
  (* SOFT_HLUTNM = "soft_lutpair2443" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[1]_i_1__1 
       (.I0(capt[1]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[1] ),
        .I3(first),
        .O(quad[1]));
  (* SOFT_HLUTNM = "soft_lutpair2451" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[20]_i_1__0 
       (.I0(\quad_reg_n_0_[20] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[4]),
        .I3(first),
        .O(quad[20]));
  (* SOFT_HLUTNM = "soft_lutpair2445" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[2]_i_1__1 
       (.I0(capt[2]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[2] ),
        .I3(first),
        .O(quad[2]));
  (* SOFT_HLUTNM = "soft_lutpair2449" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[3]_i_1__1 
       (.I0(capt[3]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[3] ),
        .I3(first),
        .O(quad[3]));
  (* SOFT_HLUTNM = "soft_lutpair2447" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[4]_i_1__1 
       (.I0(capt[4]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[4] ),
        .I3(first),
        .O(quad[4]));
  LUT6 #(
    .INIT(64'h0000000100010001)) 
    \quad[5]_i_1__1 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(rdySeq),
        .I2(ackSeqbufBToSeqClear),
        .I3(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I4(TCapt),
        .I5(\i_reg_n_0_[0] ),
        .O(\quad[5]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2448" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[5]_i_2 
       (.I0(capt[5]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[5] ),
        .I3(first),
        .O(quad[5]));
  FDCE \quad_reg[0] 
       (.C(aclk_sig),
        .CE(\quad[5]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(quad[0]),
        .Q(\quad_reg_n_0_[0] ));
  FDCE \quad_reg[1] 
       (.C(aclk_sig),
        .CE(\quad[5]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(quad[1]),
        .Q(\quad_reg_n_0_[1] ));
  FDCE \quad_reg[20] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(quad[20]),
        .Q(\quad_reg_n_0_[20] ));
  FDCE \quad_reg[2] 
       (.C(aclk_sig),
        .CE(\quad[5]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(quad[2]),
        .Q(\quad_reg_n_0_[2] ));
  FDCE \quad_reg[3] 
       (.C(aclk_sig),
        .CE(\quad[5]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(quad[3]),
        .Q(\quad_reg_n_0_[3] ));
  FDCE \quad_reg[4] 
       (.C(aclk_sig),
        .CE(\quad[5]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(quad[4]),
        .Q(\quad_reg_n_0_[4] ));
  FDCE \quad_reg[5] 
       (.C(aclk_sig),
        .CE(\quad[5]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(quad[5]),
        .Q(\quad_reg_n_0_[5] ));
  LUT6 #(
    .INIT(64'hFFFFFFF300000050)) 
    restart_i_1__1
       (.I0(restart_reg_0),
        .I1(restart_reg_1),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .I4(stateOp[2]),
        .I5(restart_reg_n_0),
        .O(restart_i_1__1_n_0));
  FDCE restart_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(restart_i_1__1_n_0),
        .Q(restart_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2429" *) 
  LUT3 #(
    .INIT(8'h24)) 
    \retbuf[0][0]_i_11 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .O(hshktrackGetInfoTixVState[0]));
  (* SOFT_HLUTNM = "soft_lutpair2452" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[5][0]_i_7 
       (.I0(\aSeqbuf_reg_n_0_[8] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(hshktrackGetInfoPtr0Seqbuf[8]));
  (* SOFT_HLUTNM = "soft_lutpair2482" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[5][1]_i_7 
       (.I0(\aSeqbuf_reg_n_0_[9] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(hshktrackGetInfoPtr0Seqbuf[9]));
  (* SOFT_HLUTNM = "soft_lutpair2485" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][0]_i_7 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(hshktrackGetInfoPtr0Seqbuf[0]));
  (* SOFT_HLUTNM = "soft_lutpair2485" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][1]_i_7 
       (.I0(\aSeqbuf_reg_n_0_[1] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(hshktrackGetInfoPtr0Seqbuf[1]));
  (* SOFT_HLUTNM = "soft_lutpair2484" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][2]_i_7 
       (.I0(\aSeqbuf_reg_n_0_[2] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(hshktrackGetInfoPtr0Seqbuf[2]));
  (* SOFT_HLUTNM = "soft_lutpair2484" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][3]_i_7 
       (.I0(\aSeqbuf_reg_n_0_[3] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(hshktrackGetInfoPtr0Seqbuf[3]));
  (* SOFT_HLUTNM = "soft_lutpair2483" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][4]_i_7 
       (.I0(\aSeqbuf_reg_n_0_[4] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(hshktrackGetInfoPtr0Seqbuf[4]));
  (* SOFT_HLUTNM = "soft_lutpair2483" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][5]_i_8 
       (.I0(\aSeqbuf_reg_n_0_[5] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(hshktrackGetInfoPtr0Seqbuf[5]));
  (* SOFT_HLUTNM = "soft_lutpair2458" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][6]_i_7 
       (.I0(\aSeqbuf_reg_n_0_[6] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(hshktrackGetInfoPtr0Seqbuf[6]));
  (* SOFT_HLUTNM = "soft_lutpair2482" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][7]_i_11 
       (.I0(\aSeqbuf_reg_n_0_[7] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(hshktrackGetInfoPtr0Seqbuf[7]));
  FDCE rng_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(rng_reg_1),
        .Q(rng_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair2439" *) 
  LUT4 #(
    .INIT(16'h01FD)) 
    \staTixVTrigger[7]_i_2__2 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .I3(restart_reg_1),
        .O(\stateOp_reg[0]_0 ));
  FDCE \staTixVTrigger_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(D[0]),
        .Q(\staTixVTrigger_reg_n_0_[0] ));
  FDCE \staTixVTrigger_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(D[1]),
        .Q(\staTixVTrigger_reg_n_0_[1] ));
  FDCE \staTixVTrigger_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(D[2]),
        .Q(\staTixVTrigger_reg_n_0_[2] ));
  FDCE \staTixVTrigger_reg[3] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(D[3]),
        .Q(\staTixVTrigger_reg_n_0_[3] ));
  FDCE \staTixVTrigger_reg[4] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(D[4]),
        .Q(\staTixVTrigger_reg_n_0_[4] ));
  FDCE \staTixVTrigger_reg[5] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(D[5]),
        .Q(\staTixVTrigger_reg_n_0_[5] ));
  FDCE \staTixVTrigger_reg[6] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(D[6]),
        .Q(\staTixVTrigger_reg_n_0_[6] ));
  FDCE \staTixVTrigger_reg[7] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(D[7]),
        .Q(\staTixVTrigger_reg_n_0_[7] ));
  (* SOFT_HLUTNM = "soft_lutpair2439" *) 
  LUT4 #(
    .INIT(16'h577D)) 
    \stateOp[0]_i_1__11 
       (.I0(restart_reg_1),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .I3(stateOp[0]),
        .O(\stateOp[0]_i_1__11_n_0 ));
  LUT6 #(
    .INIT(64'h0C32000000320000)) 
    \stateOp[1]_i_1__11 
       (.I0(rng_reg_0),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(stateOp[2]),
        .I4(restart_reg_1),
        .I5(restart_reg_n_0),
        .O(\stateOp[1]_i_1__11_n_0 ));
  LUT6 #(
    .INIT(64'h8A88AAAA8A888A88)) 
    \stateOp[2]_i_10__2 
       (.I0(stateOp[0]),
        .I1(ackInvSet_sig_i_2__3_0),
        .I2(reqInvHshktrackSet),
        .I3(ackInvHshktrackSet),
        .I4(reqInvHshktrackClearMask),
        .I5(ackInvHshktrackClearMask),
        .O(\stateOp[2]_i_10__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2427" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \stateOp[2]_i_11__3 
       (.I0(stateOp[0]),
        .I1(stateOp[2]),
        .I2(stateOp[1]),
        .O(\stateOp[2]_i_11__3_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_12__1 
       (.I0(\TCaptMax_reg_n_0_[21] ),
        .I1(\TCaptMax_reg_n_0_[20] ),
        .I2(\TCaptMax_reg_n_0_[23] ),
        .I3(\TCaptMax_reg_n_0_[22] ),
        .O(\stateOp[2]_i_12__1_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[2]_i_13__2 
       (.I0(\TCaptMax_reg_n_0_[24] ),
        .I1(\TCaptMax_reg_n_0_[27] ),
        .I2(\TCaptMax_reg_n_0_[25] ),
        .I3(\TCaptMax_reg_n_0_[26] ),
        .I4(\stateOp[2]_i_21__1_n_0 ),
        .O(\stateOp[2]_i_13__2_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_14__1 
       (.I0(\TCaptMax_reg_n_0_[5] ),
        .I1(\TCaptMax_reg_n_0_[4] ),
        .I2(\TCaptMax_reg_n_0_[7] ),
        .I3(\TCaptMax_reg_n_0_[6] ),
        .O(\stateOp[2]_i_14__1_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[2]_i_15__2 
       (.I0(\TCaptMax_reg_n_0_[8] ),
        .I1(\TCaptMax_reg_n_0_[11] ),
        .I2(\TCaptMax_reg_n_0_[9] ),
        .I3(\TCaptMax_reg_n_0_[10] ),
        .I4(\stateOp[2]_i_22__1_n_0 ),
        .O(\stateOp[2]_i_15__2_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \stateOp[2]_i_16__2 
       (.I0(Q[30]),
        .I1(Q[31]),
        .I2(Q[28]),
        .I3(Q[29]),
        .I4(Q[27]),
        .I5(Q[24]),
        .O(\stateOp[2]_i_16__2_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \stateOp[2]_i_17__2 
       (.I0(Q[20]),
        .I1(Q[23]),
        .I2(Q[21]),
        .I3(Q[22]),
        .I4(Q[19]),
        .I5(Q[16]),
        .O(\stateOp[2]_i_17__2_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \stateOp[2]_i_18__2 
       (.I0(Q[10]),
        .I1(Q[9]),
        .I2(Q[17]),
        .I3(Q[18]),
        .I4(Q[25]),
        .I5(Q[26]),
        .O(\stateOp[2]_i_18__2_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \stateOp[2]_i_19__2 
       (.I0(Q[14]),
        .I1(Q[15]),
        .I2(Q[12]),
        .I3(Q[13]),
        .I4(Q[11]),
        .I5(Q[8]),
        .O(\stateOp[2]_i_19__2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFE0E0E040)) 
    \stateOp[2]_i_1__4 
       (.I0(stateOp[0]),
        .I1(\stateOp[2]_i_3__3_n_0 ),
        .I2(hshktrackGetInfoTixVState[1]),
        .I3(rdySeq),
        .I4(restart_reg_n_0),
        .I5(\stateOp[2]_i_5__3_n_0 ),
        .O(\stateOp[2]_i_1__4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp[2]_i_20__2 
       (.I0(\staTixVTrigger_reg_n_0_[5] ),
        .I1(\staTixVTrigger_reg_n_0_[2] ),
        .I2(\staTixVTrigger_reg_n_0_[1] ),
        .I3(\staTixVTrigger_reg_n_0_[6] ),
        .I4(\staTixVTrigger_reg_n_0_[3] ),
        .I5(\staTixVTrigger_reg_n_0_[4] ),
        .O(\stateOp[2]_i_20__2_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_21__1 
       (.I0(\TCaptMax_reg_n_0_[29] ),
        .I1(\TCaptMax_reg_n_0_[28] ),
        .I2(\TCaptMax_reg_n_0_[31] ),
        .I3(\TCaptMax_reg_n_0_[30] ),
        .O(\stateOp[2]_i_21__1_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_22__1 
       (.I0(\TCaptMax_reg_n_0_[13] ),
        .I1(\TCaptMax_reg_n_0_[12] ),
        .I2(\TCaptMax_reg_n_0_[15] ),
        .I3(\TCaptMax_reg_n_0_[14] ),
        .O(\stateOp[2]_i_22__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2427" *) 
  LUT5 #(
    .INIT(32'h00004E46)) 
    \stateOp[2]_i_2__3 
       (.I0(stateOp[2]),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(restart_reg_n_0),
        .I4(\stateOp_reg[0]_0 ),
        .O(\stateOp[2]_i_2__3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF54545400)) 
    \stateOp[2]_i_3__3 
       (.I0(stop_lcl_i_3_n_0),
        .I1(\strbStop5_inferred__0/i__carry__0_n_0 ),
        .I2(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I3(\stateOp[2]_i_6__1_n_0 ),
        .I4(\stateOp[2]_i_7__2_n_0 ),
        .I5(\stateOp[2]_i_8__2_n_0 ),
        .O(\stateOp[2]_i_3__3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp[2]_i_4__2 
       (.I0(stateOp[2]),
        .I1(stateOp[1]),
        .O(hshktrackGetInfoTixVState[1]));
  LUT6 #(
    .INIT(64'hFFFFFFFFFF545454)) 
    \stateOp[2]_i_5__3 
       (.I0(\stateOp[2]_i_9__0_n_0 ),
        .I1(stateOp[1]),
        .I2(\stateOp[2]_i_10__2_n_0 ),
        .I3(rdySeq),
        .I4(\stateOp[2]_i_11__3_n_0 ),
        .I5(\stateOp_reg[0]_0 ),
        .O(\stateOp[2]_i_5__3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp[2]_i_6__1 
       (.I0(\stateOp[2]_i_12__1_n_0 ),
        .I1(\TCaptMax_reg_n_0_[19] ),
        .I2(\TCaptMax_reg_n_0_[18] ),
        .I3(\TCaptMax_reg_n_0_[17] ),
        .I4(\TCaptMax_reg_n_0_[16] ),
        .I5(\stateOp[2]_i_13__2_n_0 ),
        .O(\stateOp[2]_i_6__1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp[2]_i_7__2 
       (.I0(\stateOp[2]_i_14__1_n_0 ),
        .I1(\TCaptMax_reg_n_0_[2] ),
        .I2(\TCaptMax_reg_n_0_[1] ),
        .I3(\TCaptMax_reg_n_0_[3] ),
        .I4(\TCaptMax_reg_n_0_[0] ),
        .I5(\stateOp[2]_i_15__2_n_0 ),
        .O(\stateOp[2]_i_7__2_n_0 ));
  LUT4 #(
    .INIT(16'h0004)) 
    \stateOp[2]_i_8__2 
       (.I0(\stateOp[2]_i_16__2_n_0 ),
        .I1(\stateOp[2]_i_17__2_n_0 ),
        .I2(\stateOp[2]_i_18__2_n_0 ),
        .I3(\stateOp[2]_i_19__2_n_0 ),
        .O(\stateOp[2]_i_8__2_n_0 ));
  LUT5 #(
    .INIT(32'hFF55FF54)) 
    \stateOp[2]_i_9__0 
       (.I0(stateOp[0]),
        .I1(\stateOp[2]_i_20__2_n_0 ),
        .I2(\staTixVTrigger_reg_n_0_[7] ),
        .I3(stateOp[2]),
        .I4(\staTixVTrigger_reg_n_0_[0] ),
        .O(\stateOp[2]_i_9__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1__4_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\stateOp[0]_i_1__11_n_0 ),
        .Q(stateOp[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1__4_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\stateOp[1]_i_1__11_n_0 ),
        .Q(stateOp[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[2] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1__4_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(\stateOp[2]_i_2__3_n_0 ),
        .Q(stateOp[2]));
  (* SOFT_HLUTNM = "soft_lutpair2441" *) 
  LUT4 #(
    .INIT(16'h0705)) 
    \stateSeqbufB[0]_i_1__1 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(dneSeqbufHshktrackToHostif),
        .O(p_0_in__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair2442" *) 
  LUT4 #(
    .INIT(16'h00BC)) 
    \stateSeqbufB[1]_i_1__1 
       (.I0(\stateSeqbufB[1]_i_2__1_n_0 ),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(stateSeqbufB_reg[2]),
        .O(p_0_in__0[1]));
  LUT5 #(
    .INIT(32'h2AAAAAAA)) 
    \stateSeqbufB[1]_i_2__1 
       (.I0(seqbufHshktrackToHostifAXIS_tready),
        .I1(\aSeqbufB_reg_n_0_[8] ),
        .I2(\aSeqbufB_reg_n_0_[6] ),
        .I3(\aSeqbufB[8]_i_4__1_n_0 ),
        .I4(\aSeqbufB_reg_n_0_[7] ),
        .O(\stateSeqbufB[1]_i_2__1_n_0 ));
  LUT6 #(
    .INIT(64'hBBBBBABBABBBBABB)) 
    \stateSeqbufB[2]_i_1__1 
       (.I0(\stateSeqbufB[2]_i_3__1_n_0 ),
        .I1(stateSeqbufB_reg[2]),
        .I2(reqSeqbufHshktrackToHostif),
        .I3(stateSeqbufB_reg[0]),
        .I4(stateSeqbufB_reg[1]),
        .I5(seqbufHshktrackToHostifAXIS_tready),
        .O(\stateSeqbufB[2]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h000AC000000A0000)) 
    \stateSeqbufB[2]_i_2__1 
       (.I0(dneSeqbufHshktrackToHostif),
        .I1(\stateSeqbufB[2]_i_7__1_n_0 ),
        .I2(stateSeqbufB_reg[1]),
        .I3(stateSeqbufB_reg[0]),
        .I4(stateSeqbufB_reg[2]),
        .I5(seqbufHshktrackToHostifAXIS_tready),
        .O(p_0_in__0[2]));
  LUT6 #(
    .INIT(64'h0000000000C088CC)) 
    \stateSeqbufB[2]_i_3__1 
       (.I0(dneSeqbufHshktrackToHostif),
        .I1(stateSeqbufB_reg[2]),
        .I2(ackSeqbufBToSeqClear),
        .I3(reqSeqbufHshktrackToHostif),
        .I4(stateSeqbufB_reg[0]),
        .I5(stateSeqbufB_reg[1]),
        .O(\stateSeqbufB[2]_i_3__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2423" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \stateSeqbufB[2]_i_7__1 
       (.I0(\aSeqbufB_reg_n_0_[7] ),
        .I1(\aSeqbufB[8]_i_4__1_n_0 ),
        .I2(\aSeqbufB_reg_n_0_[6] ),
        .I3(\aSeqbufB_reg_n_0_[8] ),
        .O(\stateSeqbufB[2]_i_7__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(p_0_in__0[0]),
        .Q(stateSeqbufB_reg[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(p_0_in__0[1]),
        .Q(stateSeqbufB_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1__1_n_0 ),
        .CLR(enSeqbuf_reg_0),
        .D(p_0_in__0[2]),
        .Q(stateSeqbufB_reg[2]));
  FDCE \stoTixVTrigger_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [8]),
        .Q(stoTixVTrigger[0]));
  FDCE \stoTixVTrigger_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [9]),
        .Q(stoTixVTrigger[1]));
  FDCE \stoTixVTrigger_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [10]),
        .Q(stoTixVTrigger[2]));
  FDCE \stoTixVTrigger_reg[3] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [11]),
        .Q(stoTixVTrigger[3]));
  FDCE \stoTixVTrigger_reg[4] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [12]),
        .Q(stoTixVTrigger[4]));
  FDCE \stoTixVTrigger_reg[5] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [13]),
        .Q(stoTixVTrigger[5]));
  FDCE \stoTixVTrigger_reg[6] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [14]),
        .Q(stoTixVTrigger[6]));
  FDCE \stoTixVTrigger_reg[7] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enSeqbuf_reg_0),
        .D(\TCaptMax_reg[31]_0 [15]),
        .Q(stoTixVTrigger[7]));
  LUT5 #(
    .INIT(32'hAAAAAAAB)) 
    stop_lcl_i_1__1
       (.I0(TCapt),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I2(\FSM_onehot_stateSeq_reg[3]_0 ),
        .I3(rdySeq),
        .I4(ackSeqbufBToSeqClear),
        .O(stop_lcl_i_1__1_n_0));
  LUT6 #(
    .INIT(64'h00000000FFFFFF10)) 
    stop_lcl_i_2__2
       (.I0(\i_reg_n_0_[0] ),
        .I1(stop_lcl_i_3_n_0),
        .I2(\aSeqbuf[9]_i_4__2_n_0 ),
        .I3(strbStop_reg_n_0),
        .I4(stop_lcl_reg_n_0),
        .I5(first),
        .O(stop_lcl_i_2__2_n_0));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    stop_lcl_i_3
       (.I0(stoTixVTrigger[3]),
        .I1(stoTixVTrigger[1]),
        .I2(stoTixVTrigger[4]),
        .I3(stoTixVTrigger[7]),
        .I4(stop_lcl_i_4_n_0),
        .O(stop_lcl_i_3_n_0));
  LUT4 #(
    .INIT(16'hFFFE)) 
    stop_lcl_i_4
       (.I0(stoTixVTrigger[0]),
        .I1(stoTixVTrigger[2]),
        .I2(stoTixVTrigger[6]),
        .I3(stoTixVTrigger[5]),
        .O(stop_lcl_i_4_n_0));
  FDCE stop_lcl_reg
       (.C(aclk_sig),
        .CE(stop_lcl_i_1__1_n_0),
        .CLR(enSeqbuf_reg_0),
        .D(stop_lcl_i_2__2_n_0),
        .Q(stop_lcl_reg_n_0));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \strbStop5_inferred__0/i__carry 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\strbStop5_inferred__0/i__carry_n_0 ,\strbStop5_inferred__0/i__carry_n_1 ,\strbStop5_inferred__0/i__carry_n_2 ,\strbStop5_inferred__0/i__carry_n_3 ,\strbStop5_inferred__0/i__carry_n_4 ,\strbStop5_inferred__0/i__carry_n_5 ,\strbStop5_inferred__0/i__carry_n_6 ,\strbStop5_inferred__0/i__carry_n_7 }),
        .DI({i__carry_i_1__5_n_0,i__carry_i_2__5_n_0,i__carry_i_3__5_n_0,i__carry_i_4__5_n_0,i__carry_i_5__5_n_0,i__carry_i_6__5_n_0,i__carry_i_7__4_n_0,i__carry_i_8__4_n_0}),
        .O(\NLW_strbStop5_inferred__0/i__carry_O_UNCONNECTED [7:0]),
        .S({i__carry_i_9__4_n_0,i__carry_i_10__4_n_0,i__carry_i_11__3_n_0,i__carry_i_12__1_n_0,i__carry_i_13__0_n_0,i__carry_i_14_n_0,i__carry_i_15_n_0,i__carry_i_16_n_0}));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \strbStop5_inferred__0/i__carry__0 
       (.CI(\strbStop5_inferred__0/i__carry_n_0 ),
        .CI_TOP(1'b0),
        .CO({\strbStop5_inferred__0/i__carry__0_n_0 ,\strbStop5_inferred__0/i__carry__0_n_1 ,\strbStop5_inferred__0/i__carry__0_n_2 ,\strbStop5_inferred__0/i__carry__0_n_3 ,\strbStop5_inferred__0/i__carry__0_n_4 ,\strbStop5_inferred__0/i__carry__0_n_5 ,\strbStop5_inferred__0/i__carry__0_n_6 ,\strbStop5_inferred__0/i__carry__0_n_7 }),
        .DI({i__carry__0_i_1_n_0,i__carry__0_i_2_n_0,i__carry__0_i_3_n_0,i__carry__0_i_4_n_0,i__carry__0_i_5_n_0,i__carry__0_i_6_n_0,i__carry__0_i_7_n_0,i__carry__0_i_8_n_0}),
        .O(\NLW_strbStop5_inferred__0/i__carry__0_O_UNCONNECTED [7:0]),
        .S({i__carry__0_i_9_n_0,i__carry__0_i_10_n_0,i__carry__0_i_11_n_0,i__carry__0_i_12_n_0,i__carry__0_i_13_n_0,i__carry__0_i_14_n_0,i__carry__0_i_15_n_0,i__carry__0_i_16_n_0}));
  LUT6 #(
    .INIT(64'h3333131300001310)) 
    strbStop_i_1__1
       (.I0(stateOp[2]),
        .I1(\stateOp_reg[0]_0 ),
        .I2(stateOp[0]),
        .I3(\stateOp[2]_i_3__3_n_0 ),
        .I4(strbStop_i_2__1_n_0),
        .I5(strbStop_reg_n_0),
        .O(strbStop_i_1__1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2453" *) 
  LUT3 #(
    .INIT(8'hCD)) 
    strbStop_i_2__1
       (.I0(\stateOp[2]_i_10__2_n_0 ),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .O(strbStop_i_2__1_n_0));
  FDCE strbStop_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enSeqbuf_reg_0),
        .D(strbStop_i_1__1_n_0),
        .Q(strbStop_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2438" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \txAXIS_tdata[15]_i_13 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[0]),
        .I2(stateSeqbufB_reg[1]),
        .O(seqbufHshktrackToHostifAXIS_tvalid));
  (* SOFT_HLUTNM = "soft_lutpair2442" *) 
  LUT3 #(
    .INIT(8'h34)) 
    \wordcntLast[28]_i_11 
       (.I0(stateSeqbufB_reg[0]),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[1]),
        .O(ackSeqbufHshktrackToHostif));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_I2cmaster_v1_0
   (E,
    D,
    \recv_sig_reg[7]_0 ,
    scl,
    sda,
    \stateConfig_reg[0] ,
    \stateConfig_reg[0]_0 ,
    \stateConfig_reg[0]_1 ,
    \stateConfig_reg[0]_2 ,
    \stateConfig_reg[0]_3 ,
    \i2cSend_reg[0] ,
    \i2cSend_reg[7] ,
    \i2cSend_reg[0]_0 ,
    Q,
    \i2cSend_reg[1] ,
    \i2cSend_reg[2] ,
    \i2cSend_reg[3] ,
    \i2cSend_reg[4] ,
    \i2cSend_reg[5] ,
    \i2cSend_reg[6] ,
    \i2cSend_reg[7]_0 ,
    \stateConfig_reg[0]_4 ,
    tkclk,
    aclk_sig,
    sda_sig_reg_0,
    i2cReadNotWrite,
    sda_sig_i_16_0,
    sda_sig_i_12_0);
  output [0:0]E;
  output [7:0]D;
  output [7:0]\recv_sig_reg[7]_0 ;
  inout scl;
  inout sda;
  input \stateConfig_reg[0] ;
  input \stateConfig_reg[0]_0 ;
  input \stateConfig_reg[0]_1 ;
  input \stateConfig_reg[0]_2 ;
  input \stateConfig_reg[0]_3 ;
  input \i2cSend_reg[0] ;
  input [15:0]\i2cSend_reg[7] ;
  input \i2cSend_reg[0]_0 ;
  input [3:0]Q;
  input \i2cSend_reg[1] ;
  input \i2cSend_reg[2] ;
  input \i2cSend_reg[3] ;
  input \i2cSend_reg[4] ;
  input \i2cSend_reg[5] ;
  input \i2cSend_reg[6] ;
  input \i2cSend_reg[7]_0 ;
  input [1:0]\stateConfig_reg[0]_4 ;
  input tkclk;
  input aclk_sig;
  input sda_sig_reg_0;
  input i2cReadNotWrite;
  input [15:0]sda_sig_i_16_0;
  input [7:0]sda_sig_i_12_0;

  wire [7:0]D;
  wire [0:0]E;
  wire \FSM_sequential_elem[0]_i_1_n_0 ;
  wire \FSM_sequential_elem[1]_i_1_n_0 ;
  wire \FSM_sequential_elem[2]_i_1_n_0 ;
  wire \FSM_sequential_elem[2]_i_2_n_0 ;
  wire \FSM_sequential_elem[2]_i_3_n_0 ;
  wire \FSM_sequential_elem[2]_i_5_n_0 ;
  wire \FSM_sequential_elem[2]_i_6_n_0 ;
  wire \FSM_sequential_elem[2]_i_7_n_0 ;
  wire \FSM_sequential_elem[2]_i_8_n_0 ;
  wire \FSM_sequential_elem[2]_i_9_n_0 ;
  wire [3:0]Q;
  wire T;
  wire aclk_sig;
  wire [3:0]bitcnt;
  wire \bitcnt[0]_i_1_n_0 ;
  wire \bitcnt[1]_i_1_n_0 ;
  wire \bitcnt[1]_i_2_n_0 ;
  wire \bitcnt[2]_i_1_n_0 ;
  wire \bitcnt[3]_i_1_n_0 ;
  wire \bitcnt[3]_i_2_n_0 ;
  wire \bitcnt[3]_i_3_n_0 ;
  wire dne;
  wire [2:0]elem__0;
  wire [9:0]i;
  wire i2cReadNotWrite;
  wire [7:0]i2cRecv;
  wire \i2cSend_reg[0] ;
  wire \i2cSend_reg[0]_0 ;
  wire \i2cSend_reg[1] ;
  wire \i2cSend_reg[2] ;
  wire \i2cSend_reg[3] ;
  wire \i2cSend_reg[4] ;
  wire \i2cSend_reg[5] ;
  wire \i2cSend_reg[6] ;
  wire [15:0]\i2cSend_reg[7] ;
  wire \i2cSend_reg[7]_0 ;
  wire \i[3]_i_2_n_0 ;
  wire \i[4]_i_2_n_0 ;
  wire \i[4]_i_3_n_0 ;
  wire \i[5]_i_2_n_0 ;
  wire \i[6]_i_2_n_0 ;
  wire \i[7]_i_2_n_0 ;
  wire \i[8]_i_2_n_0 ;
  wire \i[9]_i_1_n_0 ;
  wire \i[9]_i_3_n_0 ;
  wire \i[9]_i_4_n_0 ;
  wire [8:4]imax;
  wire [9:0]p_1_in;
  wire recv_sig1;
  wire \recv_sig[0]_i_1_n_0 ;
  wire \recv_sig[1]_i_1_n_0 ;
  wire \recv_sig[2]_i_1_n_0 ;
  wire \recv_sig[3]_i_1_n_0 ;
  wire \recv_sig[4]_i_1_n_0 ;
  wire \recv_sig[5]_i_1_n_0 ;
  wire \recv_sig[6]_i_1_n_0 ;
  wire \recv_sig[7]_i_1_n_0 ;
  wire \recv_sig[7]_i_2_n_0 ;
  wire \recv_sig[7]_i_3_n_0 ;
  wire [7:0]\recv_sig_reg[7]_0 ;
  wire [7:0]recvraw;
  wire \recvraw[0]_i_1_n_0 ;
  wire \recvraw[1]_i_1_n_0 ;
  wire \recvraw[2]_i_1_n_0 ;
  wire \recvraw[3]_i_1_n_0 ;
  wire \recvraw[3]_i_2_n_0 ;
  wire \recvraw[3]_i_3_n_0 ;
  wire \recvraw[4]_i_1_n_0 ;
  wire \recvraw[4]_i_2_n_0 ;
  wire \recvraw[5]_i_1_n_0 ;
  wire \recvraw[5]_i_2_n_0 ;
  wire \recvraw[6]_i_1_n_0 ;
  wire \recvraw[6]_i_2_n_0 ;
  wire \recvraw[7]_i_1_n_0 ;
  wire \recvraw[7]_i_2_n_0 ;
  wire \recvraw[7]_i_3_n_0 ;
  wire \recvraw[7]_i_4_n_0 ;
  wire req;
  wire scl;
  wire sda;
  wire sda_in;
  wire sda_sig_i_10_n_0;
  wire sda_sig_i_11_n_0;
  wire [7:0]sda_sig_i_12_0;
  wire sda_sig_i_12_n_0;
  wire sda_sig_i_13_n_0;
  wire sda_sig_i_14_n_0;
  wire sda_sig_i_15_n_0;
  wire [15:0]sda_sig_i_16_0;
  wire sda_sig_i_16_n_0;
  wire sda_sig_i_17_n_0;
  wire sda_sig_i_18_n_0;
  wire sda_sig_i_19_n_0;
  wire sda_sig_i_1_n_0;
  wire sda_sig_i_20_n_0;
  wire sda_sig_i_21_n_0;
  wire sda_sig_i_22_n_0;
  wire sda_sig_i_23_n_0;
  wire sda_sig_i_24_n_0;
  wire sda_sig_i_25_n_0;
  wire sda_sig_i_26_n_0;
  wire sda_sig_i_27_n_0;
  wire sda_sig_i_28_n_0;
  wire sda_sig_i_29_n_0;
  wire sda_sig_i_2_n_0;
  wire sda_sig_i_30_n_0;
  wire sda_sig_i_31_n_0;
  wire sda_sig_i_34_n_0;
  wire sda_sig_i_35_n_0;
  wire sda_sig_i_36_n_0;
  wire sda_sig_i_37_n_0;
  wire sda_sig_i_38_n_0;
  wire sda_sig_i_39_n_0;
  wire sda_sig_i_3_n_0;
  wire sda_sig_i_40_n_0;
  wire sda_sig_i_41_n_0;
  wire sda_sig_i_42_n_0;
  wire sda_sig_i_43_n_0;
  wire sda_sig_i_44_n_0;
  wire sda_sig_i_45_n_0;
  wire sda_sig_i_46_n_0;
  wire sda_sig_i_47_n_0;
  wire sda_sig_i_4_n_0;
  wire sda_sig_i_5_n_0;
  wire sda_sig_i_6_n_0;
  wire sda_sig_i_7_n_0;
  wire sda_sig_i_8_n_0;
  wire sda_sig_i_9_n_0;
  wire sda_sig_reg_0;
  wire sda_sig_reg_i_32_n_0;
  wire sda_sig_reg_i_33_n_0;
  wire sda_sig_reg_n_0;
  wire \stateConfig[3]_i_4_n_0 ;
  wire \stateConfig_reg[0] ;
  wire \stateConfig_reg[0]_0 ;
  wire \stateConfig_reg[0]_1 ;
  wire \stateConfig_reg[0]_2 ;
  wire \stateConfig_reg[0]_3 ;
  wire [1:0]\stateConfig_reg[0]_4 ;
  wire \stateXfer[0]_i_1_n_0 ;
  wire \stateXfer[1]_i_1_n_0 ;
  wire \stateXfer[1]_i_2_n_0 ;
  wire \stateXfer[2]_i_1_n_0 ;
  wire \stateXfer[2]_i_2_n_0 ;
  wire \stateXfer[2]_i_3_n_0 ;
  wire \stateXfer[2]_i_4_n_0 ;
  wire \stateXfer[3]_i_1_n_0 ;
  wire \stateXfer[3]_i_2_n_0 ;
  wire \stateXfer[3]_i_3_n_0 ;
  wire \stateXfer_reg_n_0_[0] ;
  wire \stateXfer_reg_n_0_[1] ;
  wire \stateXfer_reg_n_0_[2] ;
  wire \stateXfer_reg_n_0_[3] ;
  wire tkclk;
  wire NLW_myIobufScl_O_UNCONNECTED;

  (* SOFT_HLUTNM = "soft_lutpair594" *) 
  LUT5 #(
    .INIT(32'h82028002)) 
    \FSM_sequential_elem[0]_i_1 
       (.I0(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I1(elem__0[1]),
        .I2(elem__0[0]),
        .I3(elem__0[2]),
        .I4(i2cReadNotWrite),
        .O(\FSM_sequential_elem[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair602" *) 
  LUT5 #(
    .INIT(32'hA82AAA2A)) 
    \FSM_sequential_elem[1]_i_1 
       (.I0(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I1(elem__0[1]),
        .I2(elem__0[0]),
        .I3(elem__0[2]),
        .I4(i2cReadNotWrite),
        .O(\FSM_sequential_elem[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000043FFFFFFFF)) 
    \FSM_sequential_elem[2]_i_1 
       (.I0(\FSM_sequential_elem[2]_i_3_n_0 ),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(\FSM_sequential_elem[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair594" *) 
  LUT5 #(
    .INIT(32'hAAAA0080)) 
    \FSM_sequential_elem[2]_i_2 
       (.I0(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I1(elem__0[2]),
        .I2(i2cReadNotWrite),
        .I3(elem__0[0]),
        .I4(elem__0[1]),
        .O(\FSM_sequential_elem[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFE7)) 
    \FSM_sequential_elem[2]_i_3 
       (.I0(\i[8]_i_2_n_0 ),
        .I1(imax[8]),
        .I2(\i[9]_i_3_n_0 ),
        .I3(\FSM_sequential_elem[2]_i_6_n_0 ),
        .I4(\FSM_sequential_elem[2]_i_7_n_0 ),
        .I5(\FSM_sequential_elem[2]_i_8_n_0 ),
        .O(\FSM_sequential_elem[2]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair603" *) 
  LUT4 #(
    .INIT(16'h4000)) 
    \FSM_sequential_elem[2]_i_4 
       (.I0(Q[3]),
        .I1(Q[2]),
        .I2(Q[0]),
        .I3(Q[1]),
        .O(req));
  (* SOFT_HLUTNM = "soft_lutpair595" *) 
  LUT5 #(
    .INIT(32'hAAAAAAA8)) 
    \FSM_sequential_elem[2]_i_5 
       (.I0(req),
        .I1(\stateXfer_reg_n_0_[3] ),
        .I2(\stateXfer_reg_n_0_[0] ),
        .I3(\stateXfer_reg_n_0_[2] ),
        .I4(\stateXfer_reg_n_0_[1] ),
        .O(\FSM_sequential_elem[2]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h426A6A6AAAAAAAAA)) 
    \FSM_sequential_elem[2]_i_6 
       (.I0(i[7]),
        .I1(\FSM_sequential_elem[2]_i_9_n_0 ),
        .I2(i[5]),
        .I3(\i[3]_i_2_n_0 ),
        .I4(imax[7]),
        .I5(i[6]),
        .O(\FSM_sequential_elem[2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFF6FFFFFFFFF5FFF)) 
    \FSM_sequential_elem[2]_i_7 
       (.I0(i[4]),
        .I1(i[3]),
        .I2(i[0]),
        .I3(imax[4]),
        .I4(i[1]),
        .I5(i[2]),
        .O(\FSM_sequential_elem[2]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hE00000000FFFFFFE)) 
    \FSM_sequential_elem[2]_i_8 
       (.I0(\i[3]_i_2_n_0 ),
        .I1(imax[7]),
        .I2(i[6]),
        .I3(\FSM_sequential_elem[2]_i_9_n_0 ),
        .I4(i[5]),
        .I5(i[7]),
        .O(\FSM_sequential_elem[2]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair597" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \FSM_sequential_elem[2]_i_9 
       (.I0(i[4]),
        .I1(i[1]),
        .I2(i[0]),
        .I3(i[2]),
        .I4(i[3]),
        .O(\FSM_sequential_elem[2]_i_9_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:110,iSTATE0:000,iSTATE1:100,iSTATE2:011,iSTATE3:101,iSTATE4:010,iSTATE5:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_elem_reg[0] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_elem[2]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\FSM_sequential_elem[0]_i_1_n_0 ),
        .Q(elem__0[0]));
  (* FSM_ENCODED_STATES = "iSTATE:110,iSTATE0:000,iSTATE1:100,iSTATE2:011,iSTATE3:101,iSTATE4:010,iSTATE5:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_elem_reg[1] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_elem[2]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\FSM_sequential_elem[1]_i_1_n_0 ),
        .Q(elem__0[1]));
  (* FSM_ENCODED_STATES = "iSTATE:110,iSTATE0:000,iSTATE1:100,iSTATE2:011,iSTATE3:101,iSTATE4:010,iSTATE5:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_elem_reg[2] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_elem[2]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\FSM_sequential_elem[2]_i_2_n_0 ),
        .Q(elem__0[2]));
  LUT6 #(
    .INIT(64'h0000000001000000)) 
    \bitcnt[0]_i_1 
       (.I0(\stateXfer_reg_n_0_[1] ),
        .I1(\stateXfer_reg_n_0_[0] ),
        .I2(\stateXfer_reg_n_0_[3] ),
        .I3(\stateXfer_reg_n_0_[2] ),
        .I4(req),
        .I5(bitcnt[0]),
        .O(\bitcnt[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0100000000000000)) 
    \bitcnt[1]_i_1 
       (.I0(\stateXfer_reg_n_0_[1] ),
        .I1(\stateXfer_reg_n_0_[0] ),
        .I2(\stateXfer_reg_n_0_[3] ),
        .I3(\stateXfer_reg_n_0_[2] ),
        .I4(req),
        .I5(\bitcnt[1]_i_2_n_0 ),
        .O(\bitcnt[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair600" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \bitcnt[1]_i_2 
       (.I0(bitcnt[0]),
        .I1(bitcnt[1]),
        .O(\bitcnt[1]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair599" *) 
  LUT5 #(
    .INIT(32'h04444000)) 
    \bitcnt[2]_i_1 
       (.I0(\bitcnt[3]_i_3_n_0 ),
        .I1(req),
        .I2(bitcnt[0]),
        .I3(bitcnt[1]),
        .I4(bitcnt[2]),
        .O(\bitcnt[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000057FFFFFFFF)) 
    \bitcnt[3]_i_1 
       (.I0(\FSM_sequential_elem[2]_i_3_n_0 ),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(\bitcnt[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0444444440000000)) 
    \bitcnt[3]_i_2 
       (.I0(\bitcnt[3]_i_3_n_0 ),
        .I1(req),
        .I2(bitcnt[1]),
        .I3(bitcnt[0]),
        .I4(bitcnt[2]),
        .I5(bitcnt[3]),
        .O(\bitcnt[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair606" *) 
  LUT4 #(
    .INIT(16'hFEFF)) 
    \bitcnt[3]_i_3 
       (.I0(\stateXfer_reg_n_0_[1] ),
        .I1(\stateXfer_reg_n_0_[0] ),
        .I2(\stateXfer_reg_n_0_[3] ),
        .I3(\stateXfer_reg_n_0_[2] ),
        .O(\bitcnt[3]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \bitcnt_reg[0] 
       (.C(aclk_sig),
        .CE(\bitcnt[3]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\bitcnt[0]_i_1_n_0 ),
        .Q(bitcnt[0]));
  FDCE #(
    .INIT(1'b0)) 
    \bitcnt_reg[1] 
       (.C(aclk_sig),
        .CE(\bitcnt[3]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\bitcnt[1]_i_1_n_0 ),
        .Q(bitcnt[1]));
  FDCE #(
    .INIT(1'b0)) 
    \bitcnt_reg[2] 
       (.C(aclk_sig),
        .CE(\bitcnt[3]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\bitcnt[2]_i_1_n_0 ),
        .Q(bitcnt[2]));
  FDCE #(
    .INIT(1'b0)) 
    \bitcnt_reg[3] 
       (.C(aclk_sig),
        .CE(\bitcnt[3]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\bitcnt[3]_i_2_n_0 ),
        .Q(bitcnt[3]));
  LUT6 #(
    .INIT(64'h454045404540FFFF)) 
    \i2cSend[0]_i_1 
       (.I0(\i2cSend_reg[0] ),
        .I1(\i2cSend_reg[7] [0]),
        .I2(\i2cSend_reg[7] [8]),
        .I3(i2cRecv[0]),
        .I4(\i2cSend_reg[0]_0 ),
        .I5(Q[3]),
        .O(D[0]));
  LUT6 #(
    .INIT(64'h454045404540FFFF)) 
    \i2cSend[1]_i_1 
       (.I0(\i2cSend_reg[0] ),
        .I1(\i2cSend_reg[7] [1]),
        .I2(\i2cSend_reg[7] [9]),
        .I3(i2cRecv[1]),
        .I4(\i2cSend_reg[1] ),
        .I5(Q[3]),
        .O(D[1]));
  LUT6 #(
    .INIT(64'h454045404540FFFF)) 
    \i2cSend[2]_i_1 
       (.I0(\i2cSend_reg[0] ),
        .I1(\i2cSend_reg[7] [2]),
        .I2(\i2cSend_reg[7] [10]),
        .I3(i2cRecv[2]),
        .I4(\i2cSend_reg[2] ),
        .I5(Q[3]),
        .O(D[2]));
  LUT6 #(
    .INIT(64'h454045404540FFFF)) 
    \i2cSend[3]_i_1 
       (.I0(\i2cSend_reg[0] ),
        .I1(\i2cSend_reg[7] [3]),
        .I2(\i2cSend_reg[7] [11]),
        .I3(i2cRecv[3]),
        .I4(\i2cSend_reg[3] ),
        .I5(Q[3]),
        .O(D[3]));
  LUT6 #(
    .INIT(64'h454045404540FFFF)) 
    \i2cSend[4]_i_1 
       (.I0(\i2cSend_reg[0] ),
        .I1(\i2cSend_reg[7] [4]),
        .I2(\i2cSend_reg[7] [12]),
        .I3(i2cRecv[4]),
        .I4(\i2cSend_reg[4] ),
        .I5(Q[3]),
        .O(D[4]));
  LUT6 #(
    .INIT(64'h454045404540FFFF)) 
    \i2cSend[5]_i_1 
       (.I0(\i2cSend_reg[0] ),
        .I1(\i2cSend_reg[7] [5]),
        .I2(\i2cSend_reg[7] [13]),
        .I3(i2cRecv[5]),
        .I4(\i2cSend_reg[5] ),
        .I5(Q[3]),
        .O(D[5]));
  LUT6 #(
    .INIT(64'h454045404540FFFF)) 
    \i2cSend[6]_i_1 
       (.I0(\i2cSend_reg[0] ),
        .I1(\i2cSend_reg[7] [6]),
        .I2(\i2cSend_reg[7] [14]),
        .I3(i2cRecv[6]),
        .I4(\i2cSend_reg[6] ),
        .I5(Q[3]),
        .O(D[6]));
  LUT6 #(
    .INIT(64'h454045404540FFFF)) 
    \i2cSend[7]_i_2 
       (.I0(\i2cSend_reg[0] ),
        .I1(\i2cSend_reg[7] [7]),
        .I2(\i2cSend_reg[7] [15]),
        .I3(i2cRecv[7]),
        .I4(\i2cSend_reg[7]_0 ),
        .I5(Q[3]),
        .O(D[7]));
  LUT6 #(
    .INIT(64'h00000000FFFE0000)) 
    \i[0]_i_1 
       (.I0(\stateXfer_reg_n_0_[1] ),
        .I1(\stateXfer_reg_n_0_[2] ),
        .I2(\stateXfer_reg_n_0_[0] ),
        .I3(\stateXfer_reg_n_0_[3] ),
        .I4(req),
        .I5(i[0]),
        .O(p_1_in[0]));
  LUT6 #(
    .INIT(64'h6060606000600000)) 
    \i[1]_i_1 
       (.I0(i[1]),
        .I1(i[0]),
        .I2(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I3(\i[4]_i_3_n_0 ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(\FSM_sequential_elem[2]_i_3_n_0 ),
        .O(p_1_in[1]));
  (* SOFT_HLUTNM = "soft_lutpair604" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \i[2]_i_1 
       (.I0(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I1(i[0]),
        .I2(i[1]),
        .I3(i[2]),
        .O(p_1_in[2]));
  LUT6 #(
    .INIT(64'h8888888888800000)) 
    \i[3]_i_1 
       (.I0(\i[3]_i_2_n_0 ),
        .I1(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[1] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(\FSM_sequential_elem[2]_i_3_n_0 ),
        .O(p_1_in[3]));
  (* SOFT_HLUTNM = "soft_lutpair597" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \i[3]_i_2 
       (.I0(i[1]),
        .I1(i[0]),
        .I2(i[2]),
        .I3(i[3]),
        .O(\i[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h6060606000600000)) 
    \i[4]_i_1 
       (.I0(\i[4]_i_2_n_0 ),
        .I1(i[4]),
        .I2(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I3(\i[4]_i_3_n_0 ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(\FSM_sequential_elem[2]_i_3_n_0 ),
        .O(p_1_in[4]));
  (* SOFT_HLUTNM = "soft_lutpair598" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \i[4]_i_2 
       (.I0(i[3]),
        .I1(i[2]),
        .I2(i[0]),
        .I3(i[1]),
        .O(\i[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair616" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \i[4]_i_3 
       (.I0(\stateXfer_reg_n_0_[2] ),
        .I1(\stateXfer_reg_n_0_[1] ),
        .O(\i[4]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8888888888800000)) 
    \i[5]_i_1 
       (.I0(\i[5]_i_2_n_0 ),
        .I1(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[1] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(\FSM_sequential_elem[2]_i_3_n_0 ),
        .O(p_1_in[5]));
  LUT6 #(
    .INIT(64'h6AAAAAAAAAAAAAAA)) 
    \i[5]_i_2 
       (.I0(i[5]),
        .I1(i[3]),
        .I2(i[2]),
        .I3(i[0]),
        .I4(i[1]),
        .I5(i[4]),
        .O(\i[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8888888888800000)) 
    \i[6]_i_1 
       (.I0(\i[6]_i_2_n_0 ),
        .I1(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[1] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(\FSM_sequential_elem[2]_i_3_n_0 ),
        .O(p_1_in[6]));
  (* SOFT_HLUTNM = "soft_lutpair596" *) 
  LUT4 #(
    .INIT(16'h6AAA)) 
    \i[6]_i_2 
       (.I0(i[6]),
        .I1(i[4]),
        .I2(\i[4]_i_2_n_0 ),
        .I3(i[5]),
        .O(\i[6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8888888888800000)) 
    \i[7]_i_1 
       (.I0(\i[7]_i_2_n_0 ),
        .I1(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[1] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(\FSM_sequential_elem[2]_i_3_n_0 ),
        .O(p_1_in[7]));
  (* SOFT_HLUTNM = "soft_lutpair596" *) 
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \i[7]_i_2 
       (.I0(i[7]),
        .I1(i[5]),
        .I2(\i[4]_i_2_n_0 ),
        .I3(i[4]),
        .I4(i[6]),
        .O(\i[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8888888888800000)) 
    \i[8]_i_1 
       (.I0(\i[8]_i_2_n_0 ),
        .I1(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[1] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(\FSM_sequential_elem[2]_i_3_n_0 ),
        .O(p_1_in[8]));
  LUT6 #(
    .INIT(64'h6AAAAAAAAAAAAAAA)) 
    \i[8]_i_2 
       (.I0(i[8]),
        .I1(i[6]),
        .I2(i[4]),
        .I3(\i[4]_i_2_n_0 ),
        .I4(i[5]),
        .I5(i[7]),
        .O(\i[8]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h5777FFFF)) 
    \i[9]_i_1 
       (.I0(\stateXfer_reg_n_0_[3] ),
        .I1(\stateXfer_reg_n_0_[2] ),
        .I2(\stateXfer_reg_n_0_[1] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(req),
        .O(\i[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h4444444444400000)) 
    \i[9]_i_2 
       (.I0(\i[9]_i_3_n_0 ),
        .I1(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[1] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(\FSM_sequential_elem[2]_i_3_n_0 ),
        .O(p_1_in[9]));
  LUT5 #(
    .INIT(32'h95555555)) 
    \i[9]_i_3 
       (.I0(i[9]),
        .I1(i[7]),
        .I2(\i[9]_i_4_n_0 ),
        .I3(i[6]),
        .I4(i[8]),
        .O(\i[9]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \i[9]_i_4 
       (.I0(i[5]),
        .I1(i[3]),
        .I2(i[2]),
        .I3(i[0]),
        .I4(i[1]),
        .I5(i[4]),
        .O(\i[9]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[9]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(p_1_in[0]),
        .Q(i[0]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[9]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(p_1_in[1]),
        .Q(i[1]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(\i[9]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(p_1_in[2]),
        .Q(i[2]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(\i[9]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(p_1_in[3]),
        .Q(i[3]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(\i[9]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(p_1_in[4]),
        .Q(i[4]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(\i[9]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(p_1_in[5]),
        .Q(i[5]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(\i[9]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(p_1_in[6]),
        .Q(i[6]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(\i[9]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(p_1_in[7]),
        .Q(i[7]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[8] 
       (.C(aclk_sig),
        .CE(\i[9]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(p_1_in[8]),
        .Q(i[8]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[9] 
       (.C(aclk_sig),
        .CE(\i[9]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(p_1_in[9]),
        .Q(i[9]));
  LUT5 #(
    .INIT(32'h0001FFFF)) 
    \imax[8]_i_1 
       (.I0(\stateXfer_reg_n_0_[1] ),
        .I1(\stateXfer_reg_n_0_[2] ),
        .I2(\stateXfer_reg_n_0_[0] ),
        .I3(\stateXfer_reg_n_0_[3] ),
        .I4(req),
        .O(recv_sig1));
  FDCE #(
    .INIT(1'b0)) 
    \imax_reg[4] 
       (.C(aclk_sig),
        .CE(recv_sig1),
        .CLR(sda_sig_reg_0),
        .D(1'b1),
        .Q(imax[4]));
  FDPE #(
    .INIT(1'b0)) 
    \imax_reg[7] 
       (.C(aclk_sig),
        .CE(recv_sig1),
        .D(1'b1),
        .PRE(sda_sig_reg_0),
        .Q(imax[7]));
  FDPE #(
    .INIT(1'b0)) 
    \imax_reg[8] 
       (.C(aclk_sig),
        .CE(recv_sig1),
        .D(1'b0),
        .PRE(sda_sig_reg_0),
        .Q(imax[8]));
  (* box_type = "PRIMITIVE" *) 
  IOBUF #(
    .IOSTANDARD("DEFAULT")) 
    myIobufScl
       (.I(1'b0),
        .IO(scl),
        .O(NLW_myIobufScl_O_UNCONNECTED),
        .T(T));
  (* SOFT_HLUTNM = "soft_lutpair595" *) 
  LUT4 #(
    .INIT(16'hBBBD)) 
    myIobufScl_i_1
       (.I0(\stateXfer_reg_n_0_[3] ),
        .I1(\stateXfer_reg_n_0_[0] ),
        .I2(\stateXfer_reg_n_0_[1] ),
        .I3(\stateXfer_reg_n_0_[2] ),
        .O(T));
  (* box_type = "PRIMITIVE" *) 
  IOBUF #(
    .IOSTANDARD("DEFAULT")) 
    myIobufSda
       (.I(1'b0),
        .IO(sda),
        .O(sda_in),
        .T(sda_sig_reg_n_0));
  LUT6 #(
    .INIT(64'hAAAAAAA800000000)) 
    \recv_sig[0]_i_1 
       (.I0(recvraw[0]),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(\recv_sig[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAA800000000)) 
    \recv_sig[1]_i_1 
       (.I0(recvraw[1]),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(\recv_sig[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAA800000000)) 
    \recv_sig[2]_i_1 
       (.I0(recvraw[2]),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(\recv_sig[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAA800000000)) 
    \recv_sig[3]_i_1 
       (.I0(recvraw[3]),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(\recv_sig[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAA800000000)) 
    \recv_sig[4]_i_1 
       (.I0(recvraw[4]),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(\recv_sig[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAA800000000)) 
    \recv_sig[5]_i_1 
       (.I0(recvraw[5]),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(\recv_sig[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAA800000000)) 
    \recv_sig[6]_i_1 
       (.I0(recvraw[6]),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(\recv_sig[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000040FFFFFFFF)) 
    \recv_sig[7]_i_1 
       (.I0(\stateXfer_reg_n_0_[2] ),
        .I1(\stateXfer_reg_n_0_[3] ),
        .I2(i2cReadNotWrite),
        .I3(\recv_sig[7]_i_3_n_0 ),
        .I4(\FSM_sequential_elem[2]_i_3_n_0 ),
        .I5(\FSM_sequential_elem[2]_i_5_n_0 ),
        .O(\recv_sig[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAA800000000)) 
    \recv_sig[7]_i_2 
       (.I0(recvraw[7]),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(\recv_sig[7]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair616" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \recv_sig[7]_i_3 
       (.I0(\stateXfer_reg_n_0_[0] ),
        .I1(\stateXfer_reg_n_0_[1] ),
        .O(\recv_sig[7]_i_3_n_0 ));
  FDCE \recv_sig_reg[0] 
       (.C(aclk_sig),
        .CE(\recv_sig[7]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\recv_sig[0]_i_1_n_0 ),
        .Q(i2cRecv[0]));
  FDCE \recv_sig_reg[1] 
       (.C(aclk_sig),
        .CE(\recv_sig[7]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\recv_sig[1]_i_1_n_0 ),
        .Q(i2cRecv[1]));
  FDCE \recv_sig_reg[2] 
       (.C(aclk_sig),
        .CE(\recv_sig[7]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\recv_sig[2]_i_1_n_0 ),
        .Q(i2cRecv[2]));
  FDCE \recv_sig_reg[3] 
       (.C(aclk_sig),
        .CE(\recv_sig[7]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\recv_sig[3]_i_1_n_0 ),
        .Q(i2cRecv[3]));
  FDCE \recv_sig_reg[4] 
       (.C(aclk_sig),
        .CE(\recv_sig[7]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\recv_sig[4]_i_1_n_0 ),
        .Q(i2cRecv[4]));
  FDCE \recv_sig_reg[5] 
       (.C(aclk_sig),
        .CE(\recv_sig[7]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\recv_sig[5]_i_1_n_0 ),
        .Q(i2cRecv[5]));
  FDCE \recv_sig_reg[6] 
       (.C(aclk_sig),
        .CE(\recv_sig[7]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\recv_sig[6]_i_1_n_0 ),
        .Q(i2cRecv[6]));
  FDCE \recv_sig_reg[7] 
       (.C(aclk_sig),
        .CE(\recv_sig[7]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\recv_sig[7]_i_2_n_0 ),
        .Q(i2cRecv[7]));
  LUT6 #(
    .INIT(64'hFEFF000002000000)) 
    \recvraw[0]_i_1 
       (.I0(sda_in),
        .I1(\recvraw[4]_i_2_n_0 ),
        .I2(\recvraw[3]_i_2_n_0 ),
        .I3(\recvraw[3]_i_3_n_0 ),
        .I4(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I5(recvraw[0]),
        .O(\recvraw[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFEFF000002000000)) 
    \recvraw[1]_i_1 
       (.I0(sda_in),
        .I1(\recvraw[5]_i_2_n_0 ),
        .I2(\recvraw[3]_i_2_n_0 ),
        .I3(\recvraw[3]_i_3_n_0 ),
        .I4(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I5(recvraw[1]),
        .O(\recvraw[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFEFF000002000000)) 
    \recvraw[2]_i_1 
       (.I0(sda_in),
        .I1(\recvraw[6]_i_2_n_0 ),
        .I2(\recvraw[3]_i_2_n_0 ),
        .I3(\recvraw[3]_i_3_n_0 ),
        .I4(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I5(recvraw[2]),
        .O(\recvraw[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFEFF000002000000)) 
    \recvraw[3]_i_1 
       (.I0(sda_in),
        .I1(\recvraw[7]_i_3_n_0 ),
        .I2(\recvraw[3]_i_2_n_0 ),
        .I3(\recvraw[3]_i_3_n_0 ),
        .I4(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I5(recvraw[3]),
        .O(\recvraw[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000100010001000)) 
    \recvraw[3]_i_2 
       (.I0(elem__0[1]),
        .I1(elem__0[2]),
        .I2(elem__0[0]),
        .I3(i2cReadNotWrite),
        .I4(bitcnt[2]),
        .I5(bitcnt[3]),
        .O(\recvraw[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h1000100012001000)) 
    \recvraw[3]_i_3 
       (.I0(elem__0[1]),
        .I1(elem__0[2]),
        .I2(elem__0[0]),
        .I3(i2cReadNotWrite),
        .I4(bitcnt[2]),
        .I5(bitcnt[3]),
        .O(\recvraw[3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFEFF000002000000)) 
    \recvraw[4]_i_1 
       (.I0(sda_in),
        .I1(\recvraw[7]_i_2_n_0 ),
        .I2(\recvraw[4]_i_2_n_0 ),
        .I3(\recvraw[7]_i_4_n_0 ),
        .I4(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I5(recvraw[4]),
        .O(\recvraw[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFDFFFFFFFFFFFF)) 
    \recvraw[4]_i_2 
       (.I0(\stateXfer_reg_n_0_[2] ),
        .I1(\stateXfer_reg_n_0_[3] ),
        .I2(\stateXfer_reg_n_0_[0] ),
        .I3(\stateXfer_reg_n_0_[1] ),
        .I4(bitcnt[1]),
        .I5(bitcnt[0]),
        .O(\recvraw[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFEFF000002000000)) 
    \recvraw[5]_i_1 
       (.I0(sda_in),
        .I1(\recvraw[7]_i_2_n_0 ),
        .I2(\recvraw[5]_i_2_n_0 ),
        .I3(\recvraw[7]_i_4_n_0 ),
        .I4(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I5(recvraw[5]),
        .O(\recvraw[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFBFFFFFFFF)) 
    \recvraw[5]_i_2 
       (.I0(bitcnt[0]),
        .I1(bitcnt[1]),
        .I2(\stateXfer_reg_n_0_[1] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(\stateXfer_reg_n_0_[2] ),
        .O(\recvraw[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFEFF000002000000)) 
    \recvraw[6]_i_1 
       (.I0(sda_in),
        .I1(\recvraw[7]_i_2_n_0 ),
        .I2(\recvraw[6]_i_2_n_0 ),
        .I3(\recvraw[7]_i_4_n_0 ),
        .I4(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I5(recvraw[6]),
        .O(\recvraw[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFDFFFFFFFF)) 
    \recvraw[6]_i_2 
       (.I0(\stateXfer_reg_n_0_[2] ),
        .I1(\stateXfer_reg_n_0_[3] ),
        .I2(\stateXfer_reg_n_0_[0] ),
        .I3(\stateXfer_reg_n_0_[1] ),
        .I4(bitcnt[1]),
        .I5(bitcnt[0]),
        .O(\recvraw[6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFEFF000002000000)) 
    \recvraw[7]_i_1 
       (.I0(sda_in),
        .I1(\recvraw[7]_i_2_n_0 ),
        .I2(\recvraw[7]_i_3_n_0 ),
        .I3(\recvraw[7]_i_4_n_0 ),
        .I4(\FSM_sequential_elem[2]_i_5_n_0 ),
        .I5(recvraw[7]),
        .O(\recvraw[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h000D000000000000)) 
    \recvraw[7]_i_2 
       (.I0(bitcnt[3]),
        .I1(bitcnt[2]),
        .I2(elem__0[1]),
        .I3(elem__0[2]),
        .I4(elem__0[0]),
        .I5(i2cReadNotWrite),
        .O(\recvraw[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFD)) 
    \recvraw[7]_i_3 
       (.I0(\stateXfer_reg_n_0_[2] ),
        .I1(\stateXfer_reg_n_0_[3] ),
        .I2(\stateXfer_reg_n_0_[0] ),
        .I3(\stateXfer_reg_n_0_[1] ),
        .I4(bitcnt[1]),
        .I5(bitcnt[0]),
        .O(\recvraw[7]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h1000100010001200)) 
    \recvraw[7]_i_4 
       (.I0(elem__0[1]),
        .I1(elem__0[2]),
        .I2(elem__0[0]),
        .I3(i2cReadNotWrite),
        .I4(bitcnt[3]),
        .I5(bitcnt[2]),
        .O(\recvraw[7]_i_4_n_0 ));
  FDCE \recvraw_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg_0),
        .D(\recvraw[0]_i_1_n_0 ),
        .Q(recvraw[0]));
  FDCE \recvraw_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg_0),
        .D(\recvraw[1]_i_1_n_0 ),
        .Q(recvraw[1]));
  FDCE \recvraw_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg_0),
        .D(\recvraw[2]_i_1_n_0 ),
        .Q(recvraw[2]));
  FDCE \recvraw_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg_0),
        .D(\recvraw[3]_i_1_n_0 ),
        .Q(recvraw[3]));
  FDCE \recvraw_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg_0),
        .D(\recvraw[4]_i_1_n_0 ),
        .Q(recvraw[4]));
  FDCE \recvraw_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg_0),
        .D(\recvraw[5]_i_1_n_0 ),
        .Q(recvraw[5]));
  FDCE \recvraw_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg_0),
        .D(\recvraw[6]_i_1_n_0 ),
        .Q(recvraw[6]));
  FDCE \recvraw_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(sda_sig_reg_0),
        .D(\recvraw[7]_i_1_n_0 ),
        .Q(recvraw[7]));
  LUT2 #(
    .INIT(4'h8)) 
    \regVal[0]_i_1 
       (.I0(i2cRecv[0]),
        .I1(Q[3]),
        .O(\recv_sig_reg[7]_0 [0]));
  (* SOFT_HLUTNM = "soft_lutpair615" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \regVal[1]_i_1 
       (.I0(i2cRecv[1]),
        .I1(Q[3]),
        .O(\recv_sig_reg[7]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair615" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \regVal[2]_i_1 
       (.I0(i2cRecv[2]),
        .I1(Q[3]),
        .O(\recv_sig_reg[7]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair614" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \regVal[3]_i_1 
       (.I0(i2cRecv[3]),
        .I1(Q[3]),
        .O(\recv_sig_reg[7]_0 [3]));
  (* SOFT_HLUTNM = "soft_lutpair614" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \regVal[4]_i_1 
       (.I0(i2cRecv[4]),
        .I1(Q[3]),
        .O(\recv_sig_reg[7]_0 [4]));
  (* SOFT_HLUTNM = "soft_lutpair613" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \regVal[5]_i_1 
       (.I0(i2cRecv[5]),
        .I1(Q[3]),
        .O(\recv_sig_reg[7]_0 [5]));
  (* SOFT_HLUTNM = "soft_lutpair613" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \regVal[6]_i_1 
       (.I0(i2cRecv[6]),
        .I1(Q[3]),
        .O(\recv_sig_reg[7]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair603" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \regVal[7]_i_2 
       (.I0(i2cRecv[7]),
        .I1(Q[3]),
        .O(\recv_sig_reg[7]_0 [7]));
  LUT6 #(
    .INIT(64'hFEFEFEFFFEFEFE00)) 
    sda_sig_i_1
       (.I0(sda_sig_i_2_n_0),
        .I1(sda_sig_i_3_n_0),
        .I2(sda_sig_i_4_n_0),
        .I3(sda_sig_i_5_n_0),
        .I4(sda_sig_i_6_n_0),
        .I5(sda_sig_reg_n_0),
        .O(sda_sig_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair610" *) 
  LUT4 #(
    .INIT(16'h1540)) 
    sda_sig_i_10
       (.I0(\stateXfer_reg_n_0_[3] ),
        .I1(\stateXfer_reg_n_0_[2] ),
        .I2(\stateXfer_reg_n_0_[1] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .O(sda_sig_i_10_n_0));
  (* SOFT_HLUTNM = "soft_lutpair602" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    sda_sig_i_11
       (.I0(i2cReadNotWrite),
        .I1(elem__0[0]),
        .I2(elem__0[2]),
        .I3(elem__0[1]),
        .O(sda_sig_i_11_n_0));
  LUT6 #(
    .INIT(64'h5555DDFD5555DFFF)) 
    sda_sig_i_12
       (.I0(sda_sig_i_22_n_0),
        .I1(bitcnt[3]),
        .I2(bitcnt[2]),
        .I3(sda_sig_i_23_n_0),
        .I4(sda_sig_i_24_n_0),
        .I5(sda_sig_i_25_n_0),
        .O(sda_sig_i_12_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF8A80)) 
    sda_sig_i_13
       (.I0(sda_sig_i_26_n_0),
        .I1(sda_sig_i_27_n_0),
        .I2(sda_sig_i_28_n_0),
        .I3(sda_sig_i_29_n_0),
        .I4(sda_sig_i_30_n_0),
        .I5(sda_sig_i_31_n_0),
        .O(sda_sig_i_13_n_0));
  LUT6 #(
    .INIT(64'h1010100000001000)) 
    sda_sig_i_14
       (.I0(elem__0[1]),
        .I1(elem__0[0]),
        .I2(elem__0[2]),
        .I3(sda_sig_reg_i_32_n_0),
        .I4(bitcnt[3]),
        .I5(sda_sig_reg_i_33_n_0),
        .O(sda_sig_i_14_n_0));
  (* SOFT_HLUTNM = "soft_lutpair611" *) 
  LUT3 #(
    .INIT(8'h08)) 
    sda_sig_i_15
       (.I0(elem__0[0]),
        .I1(elem__0[1]),
        .I2(elem__0[2]),
        .O(sda_sig_i_15_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    sda_sig_i_16
       (.I0(sda_sig_i_34_n_0),
        .I1(sda_sig_i_35_n_0),
        .I2(sda_sig_i_26_n_0),
        .I3(sda_sig_i_36_n_0),
        .I4(sda_sig_i_28_n_0),
        .I5(sda_sig_i_37_n_0),
        .O(sda_sig_i_16_n_0));
  LUT6 #(
    .INIT(64'h5D5D5D555D5D5DDD)) 
    sda_sig_i_17
       (.I0(sda_sig_i_38_n_0),
        .I1(sda_sig_i_39_n_0),
        .I2(sda_sig_i_40_n_0),
        .I3(bitcnt[3]),
        .I4(sda_sig_i_41_n_0),
        .I5(sda_sig_i_42_n_0),
        .O(sda_sig_i_17_n_0));
  (* SOFT_HLUTNM = "soft_lutpair605" *) 
  LUT4 #(
    .INIT(16'hFBB3)) 
    sda_sig_i_18
       (.I0(\stateXfer_reg_n_0_[3] ),
        .I1(\stateXfer_reg_n_0_[0] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[1] ),
        .O(sda_sig_i_18_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFF577FA000)) 
    sda_sig_i_19
       (.I0(i[6]),
        .I1(sda_sig_i_43_n_0),
        .I2(i[5]),
        .I3(\FSM_sequential_elem[2]_i_9_n_0 ),
        .I4(i[7]),
        .I5(\FSM_sequential_elem[2]_i_7_n_0 ),
        .O(sda_sig_i_19_n_0));
  LUT6 #(
    .INIT(64'h0000000000003101)) 
    sda_sig_i_2
       (.I0(sda_sig_i_7_n_0),
        .I1(\FSM_sequential_elem[2]_i_7_n_0 ),
        .I2(\i[7]_i_2_n_0 ),
        .I3(sda_sig_i_8_n_0),
        .I4(sda_sig_i_9_n_0),
        .I5(sda_sig_i_10_n_0),
        .O(sda_sig_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair610" *) 
  LUT2 #(
    .INIT(4'h2)) 
    sda_sig_i_20
       (.I0(\stateXfer_reg_n_0_[2] ),
        .I1(\stateXfer_reg_n_0_[3] ),
        .O(sda_sig_i_20_n_0));
  (* SOFT_HLUTNM = "soft_lutpair604" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    sda_sig_i_21
       (.I0(i[1]),
        .I1(i[0]),
        .I2(i[2]),
        .O(sda_sig_i_21_n_0));
  (* SOFT_HLUTNM = "soft_lutpair608" *) 
  LUT3 #(
    .INIT(8'hE7)) 
    sda_sig_i_22
       (.I0(elem__0[1]),
        .I1(elem__0[0]),
        .I2(elem__0[2]),
        .O(sda_sig_i_22_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    sda_sig_i_23
       (.I0(sda_sig_i_12_0[0]),
        .I1(sda_sig_i_12_0[1]),
        .I2(bitcnt[1]),
        .I3(sda_sig_i_12_0[2]),
        .I4(bitcnt[0]),
        .I5(sda_sig_i_12_0[3]),
        .O(sda_sig_i_23_n_0));
  (* SOFT_HLUTNM = "soft_lutpair608" *) 
  LUT4 #(
    .INIT(16'hFFFB)) 
    sda_sig_i_24
       (.I0(i2cReadNotWrite),
        .I1(elem__0[1]),
        .I2(elem__0[2]),
        .I3(elem__0[0]),
        .O(sda_sig_i_24_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    sda_sig_i_25
       (.I0(sda_sig_i_12_0[4]),
        .I1(sda_sig_i_12_0[5]),
        .I2(bitcnt[1]),
        .I3(sda_sig_i_12_0[6]),
        .I4(bitcnt[0]),
        .I5(sda_sig_i_12_0[7]),
        .O(sda_sig_i_25_n_0));
  (* SOFT_HLUTNM = "soft_lutpair609" *) 
  LUT4 #(
    .INIT(16'hAAA9)) 
    sda_sig_i_26
       (.I0(bitcnt[3]),
        .I1(bitcnt[2]),
        .I2(bitcnt[0]),
        .I3(bitcnt[1]),
        .O(sda_sig_i_26_n_0));
  LUT6 #(
    .INIT(64'hFCAF0CAFFCA00CA0)) 
    sda_sig_i_27
       (.I0(sda_sig_i_12_0[6]),
        .I1(sda_sig_i_12_0[5]),
        .I2(bitcnt[0]),
        .I3(bitcnt[1]),
        .I4(sda_sig_i_12_0[4]),
        .I5(sda_sig_i_12_0[3]),
        .O(sda_sig_i_27_n_0));
  LUT3 #(
    .INIT(8'h56)) 
    sda_sig_i_28
       (.I0(bitcnt[2]),
        .I1(bitcnt[1]),
        .I2(bitcnt[0]),
        .O(sda_sig_i_28_n_0));
  (* SOFT_HLUTNM = "soft_lutpair600" *) 
  LUT5 #(
    .INIT(32'hFCA00CA0)) 
    sda_sig_i_29
       (.I0(sda_sig_i_12_0[2]),
        .I1(sda_sig_i_12_0[1]),
        .I2(bitcnt[0]),
        .I3(bitcnt[1]),
        .I4(sda_sig_i_12_0[0]),
        .O(sda_sig_i_29_n_0));
  LUT6 #(
    .INIT(64'h00001003FFFFFFFF)) 
    sda_sig_i_3
       (.I0(sda_sig_i_11_n_0),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(sda_sig_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair601" *) 
  LUT5 #(
    .INIT(32'h00001000)) 
    sda_sig_i_30
       (.I0(bitcnt[0]),
        .I1(bitcnt[1]),
        .I2(sda_sig_i_12_0[7]),
        .I3(bitcnt[3]),
        .I4(bitcnt[2]),
        .O(sda_sig_i_30_n_0));
  (* SOFT_HLUTNM = "soft_lutpair607" *) 
  LUT4 #(
    .INIT(16'hFFFB)) 
    sda_sig_i_31
       (.I0(i2cReadNotWrite),
        .I1(elem__0[0]),
        .I2(elem__0[2]),
        .I3(elem__0[1]),
        .O(sda_sig_i_31_n_0));
  LUT6 #(
    .INIT(64'hFCAF0CAFFCA00CA0)) 
    sda_sig_i_34
       (.I0(sda_sig_i_16_0[6]),
        .I1(sda_sig_i_16_0[5]),
        .I2(bitcnt[0]),
        .I3(bitcnt[1]),
        .I4(sda_sig_i_16_0[4]),
        .I5(sda_sig_i_16_0[3]),
        .O(sda_sig_i_34_n_0));
  LUT6 #(
    .INIT(64'hFCAF0CAFFCA00CA0)) 
    sda_sig_i_35
       (.I0(sda_sig_i_16_0[2]),
        .I1(sda_sig_i_16_0[1]),
        .I2(bitcnt[0]),
        .I3(bitcnt[1]),
        .I4(sda_sig_i_16_0[0]),
        .I5(sda_sig_i_16_0[15]),
        .O(sda_sig_i_35_n_0));
  LUT6 #(
    .INIT(64'hFACF0ACFFAC00AC0)) 
    sda_sig_i_36
       (.I0(sda_sig_i_16_0[13]),
        .I1(sda_sig_i_16_0[14]),
        .I2(bitcnt[0]),
        .I3(bitcnt[1]),
        .I4(sda_sig_i_16_0[12]),
        .I5(sda_sig_i_16_0[11]),
        .O(sda_sig_i_36_n_0));
  LUT6 #(
    .INIT(64'hFCAF0CAFFCA00CA0)) 
    sda_sig_i_37
       (.I0(sda_sig_i_16_0[10]),
        .I1(sda_sig_i_16_0[9]),
        .I2(bitcnt[0]),
        .I3(bitcnt[1]),
        .I4(sda_sig_i_16_0[8]),
        .I5(sda_sig_i_16_0[7]),
        .O(sda_sig_i_37_n_0));
  (* SOFT_HLUTNM = "soft_lutpair605" *) 
  LUT4 #(
    .INIT(16'h1000)) 
    sda_sig_i_38
       (.I0(\stateXfer_reg_n_0_[2] ),
        .I1(\stateXfer_reg_n_0_[3] ),
        .I2(\stateXfer_reg_n_0_[1] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .O(sda_sig_i_38_n_0));
  (* SOFT_HLUTNM = "soft_lutpair612" *) 
  LUT3 #(
    .INIT(8'h41)) 
    sda_sig_i_39
       (.I0(elem__0[1]),
        .I1(elem__0[0]),
        .I2(elem__0[2]),
        .O(sda_sig_i_39_n_0));
  LUT6 #(
    .INIT(64'h00000000FFF4F4F4)) 
    sda_sig_i_4
       (.I0(sda_sig_i_12_n_0),
        .I1(sda_sig_i_13_n_0),
        .I2(sda_sig_i_14_n_0),
        .I3(sda_sig_i_15_n_0),
        .I4(sda_sig_i_16_n_0),
        .I5(sda_sig_i_17_n_0),
        .O(sda_sig_i_4_n_0));
  (* SOFT_HLUTNM = "soft_lutpair607" *) 
  LUT4 #(
    .INIT(16'hAAA8)) 
    sda_sig_i_40
       (.I0(i2cReadNotWrite),
        .I1(elem__0[2]),
        .I2(elem__0[1]),
        .I3(elem__0[0]),
        .O(sda_sig_i_40_n_0));
  (* SOFT_HLUTNM = "soft_lutpair609" *) 
  LUT3 #(
    .INIT(8'h80)) 
    sda_sig_i_41
       (.I0(bitcnt[1]),
        .I1(bitcnt[0]),
        .I2(bitcnt[2]),
        .O(sda_sig_i_41_n_0));
  (* SOFT_HLUTNM = "soft_lutpair599" *) 
  LUT3 #(
    .INIT(8'h38)) 
    sda_sig_i_42
       (.I0(bitcnt[0]),
        .I1(bitcnt[2]),
        .I2(bitcnt[1]),
        .O(sda_sig_i_42_n_0));
  (* SOFT_HLUTNM = "soft_lutpair598" *) 
  LUT5 #(
    .INIT(32'h28888888)) 
    sda_sig_i_43
       (.I0(imax[7]),
        .I1(i[3]),
        .I2(i[2]),
        .I3(i[0]),
        .I4(i[1]),
        .O(sda_sig_i_43_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    sda_sig_i_44
       (.I0(sda_sig_i_16_0[4]),
        .I1(sda_sig_i_16_0[5]),
        .I2(bitcnt[1]),
        .I3(sda_sig_i_16_0[6]),
        .I4(bitcnt[0]),
        .I5(sda_sig_i_16_0[7]),
        .O(sda_sig_i_44_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    sda_sig_i_45
       (.I0(sda_sig_i_16_0[0]),
        .I1(sda_sig_i_16_0[1]),
        .I2(bitcnt[1]),
        .I3(sda_sig_i_16_0[2]),
        .I4(bitcnt[0]),
        .I5(sda_sig_i_16_0[3]),
        .O(sda_sig_i_45_n_0));
  LUT6 #(
    .INIT(64'hCFCFC0C0AFA0AFA0)) 
    sda_sig_i_46
       (.I0(sda_sig_i_16_0[13]),
        .I1(sda_sig_i_16_0[12]),
        .I2(bitcnt[1]),
        .I3(sda_sig_i_16_0[15]),
        .I4(sda_sig_i_16_0[14]),
        .I5(bitcnt[0]),
        .O(sda_sig_i_46_n_0));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    sda_sig_i_47
       (.I0(sda_sig_i_16_0[8]),
        .I1(sda_sig_i_16_0[9]),
        .I2(bitcnt[1]),
        .I3(sda_sig_i_16_0[10]),
        .I4(bitcnt[0]),
        .I5(sda_sig_i_16_0[11]),
        .O(sda_sig_i_47_n_0));
  LUT6 #(
    .INIT(64'h11111115FFFFFFFF)) 
    sda_sig_i_5
       (.I0(sda_sig_i_18_n_0),
        .I1(\i[4]_i_3_n_0 ),
        .I2(\FSM_sequential_elem[2]_i_8_n_0 ),
        .I3(sda_sig_i_19_n_0),
        .I4(sda_sig_i_9_n_0),
        .I5(\FSM_sequential_elem[2]_i_5_n_0 ),
        .O(sda_sig_i_5_n_0));
  LUT6 #(
    .INIT(64'h0001000000000000)) 
    sda_sig_i_6
       (.I0(\recv_sig[7]_i_3_n_0 ),
        .I1(\FSM_sequential_elem[2]_i_8_n_0 ),
        .I2(sda_sig_i_19_n_0),
        .I3(sda_sig_i_9_n_0),
        .I4(sda_sig_i_20_n_0),
        .I5(\stateXfer[3]_i_3_n_0 ),
        .O(sda_sig_i_6_n_0));
  LUT6 #(
    .INIT(64'hFFDFFEFFFFFFFEEF)) 
    sda_sig_i_7
       (.I0(i[6]),
        .I1(imax[7]),
        .I2(i[3]),
        .I3(sda_sig_i_21_n_0),
        .I4(i[5]),
        .I5(i[4]),
        .O(sda_sig_i_7_n_0));
  LUT5 #(
    .INIT(32'h80080000)) 
    sda_sig_i_8
       (.I0(i[6]),
        .I1(imax[7]),
        .I2(i[3]),
        .I3(sda_sig_i_21_n_0),
        .I4(i[5]),
        .O(sda_sig_i_8_n_0));
  LUT6 #(
    .INIT(64'hD5557FFF7FFFEAAA)) 
    sda_sig_i_9
       (.I0(i[9]),
        .I1(i[7]),
        .I2(\i[9]_i_4_n_0 ),
        .I3(i[6]),
        .I4(i[8]),
        .I5(imax[8]),
        .O(sda_sig_i_9_n_0));
  FDPE sda_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(sda_sig_i_1_n_0),
        .PRE(sda_sig_reg_0),
        .Q(sda_sig_reg_n_0));
  MUXF7 sda_sig_reg_i_32
       (.I0(sda_sig_i_44_n_0),
        .I1(sda_sig_i_45_n_0),
        .O(sda_sig_reg_i_32_n_0),
        .S(bitcnt[2]));
  MUXF7 sda_sig_reg_i_33
       (.I0(sda_sig_i_46_n_0),
        .I1(sda_sig_i_47_n_0),
        .O(sda_sig_reg_i_33_n_0),
        .S(bitcnt[2]));
  LUT6 #(
    .INIT(64'hFFFFFFFFEAEEEAEA)) 
    \stateConfig[3]_i_1 
       (.I0(\stateConfig_reg[0] ),
        .I1(\stateConfig_reg[0]_0 ),
        .I2(\stateConfig[3]_i_4_n_0 ),
        .I3(\stateConfig_reg[0]_1 ),
        .I4(\stateConfig_reg[0]_2 ),
        .I5(\stateConfig_reg[0]_3 ),
        .O(E));
  LUT6 #(
    .INIT(64'h8080B0808383B383)) 
    \stateConfig[3]_i_4 
       (.I0(dne),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(\stateConfig_reg[0]_4 [0]),
        .I4(\stateConfig_reg[0]_4 [1]),
        .I5(tkclk),
        .O(\stateConfig[3]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair606" *) 
  LUT4 #(
    .INIT(16'h0080)) 
    \stateConfig[3]_i_8 
       (.I0(\stateXfer_reg_n_0_[1] ),
        .I1(\stateXfer_reg_n_0_[0] ),
        .I2(\stateXfer_reg_n_0_[3] ),
        .I3(\stateXfer_reg_n_0_[2] ),
        .O(dne));
  LUT6 #(
    .INIT(64'hA88A8A0AAA8A8A0A)) 
    \stateXfer[0]_i_1 
       (.I0(req),
        .I1(\stateXfer_reg_n_0_[3] ),
        .I2(\stateXfer_reg_n_0_[0] ),
        .I3(\stateXfer_reg_n_0_[2] ),
        .I4(\stateXfer_reg_n_0_[1] ),
        .I5(\stateXfer[3]_i_3_n_0 ),
        .O(\stateXfer[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hA8A8A8A8A8AAAA00)) 
    \stateXfer[1]_i_1 
       (.I0(req),
        .I1(\stateXfer[1]_i_2_n_0 ),
        .I2(\stateXfer_reg_n_0_[3] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[1] ),
        .I5(\stateXfer_reg_n_0_[2] ),
        .O(\stateXfer[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h3D0031003D003D00)) 
    \stateXfer[1]_i_2 
       (.I0(\stateXfer[2]_i_3_n_0 ),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[0] ),
        .I3(\stateXfer_reg_n_0_[2] ),
        .I4(elem__0[0]),
        .I5(elem__0[1]),
        .O(\stateXfer[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000088808800)) 
    \stateXfer[2]_i_1 
       (.I0(\stateXfer[2]_i_2_n_0 ),
        .I1(req),
        .I2(\stateXfer_reg_n_0_[0] ),
        .I3(\stateXfer_reg_n_0_[2] ),
        .I4(\stateXfer_reg_n_0_[1] ),
        .I5(\stateXfer_reg_n_0_[3] ),
        .O(\stateXfer[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h3333F333FFFFBBBB)) 
    \stateXfer[2]_i_2 
       (.I0(\stateXfer[2]_i_3_n_0 ),
        .I1(\stateXfer_reg_n_0_[2] ),
        .I2(\stateXfer[2]_i_4_n_0 ),
        .I3(i2cReadNotWrite),
        .I4(\stateXfer_reg_n_0_[0] ),
        .I5(\stateXfer_reg_n_0_[1] ),
        .O(\stateXfer[2]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair601" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \stateXfer[2]_i_3 
       (.I0(bitcnt[1]),
        .I1(bitcnt[0]),
        .I2(bitcnt[3]),
        .I3(bitcnt[2]),
        .O(\stateXfer[2]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair611" *) 
  LUT3 #(
    .INIT(8'h02)) 
    \stateXfer[2]_i_4 
       (.I0(elem__0[2]),
        .I1(elem__0[0]),
        .I2(elem__0[1]),
        .O(\stateXfer[2]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h01055557FFFFFFFF)) 
    \stateXfer[3]_i_1 
       (.I0(\FSM_sequential_elem[2]_i_3_n_0 ),
        .I1(\stateXfer_reg_n_0_[1] ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[3] ),
        .I5(req),
        .O(\stateXfer[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAA00800000)) 
    \stateXfer[3]_i_2 
       (.I0(req),
        .I1(\stateXfer[3]_i_3_n_0 ),
        .I2(\stateXfer_reg_n_0_[2] ),
        .I3(\stateXfer_reg_n_0_[0] ),
        .I4(\stateXfer_reg_n_0_[1] ),
        .I5(\stateXfer_reg_n_0_[3] ),
        .O(\stateXfer[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair612" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateXfer[3]_i_3 
       (.I0(elem__0[1]),
        .I1(elem__0[0]),
        .O(\stateXfer[3]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateXfer_reg[0] 
       (.C(aclk_sig),
        .CE(\stateXfer[3]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\stateXfer[0]_i_1_n_0 ),
        .Q(\stateXfer_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateXfer_reg[1] 
       (.C(aclk_sig),
        .CE(\stateXfer[3]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\stateXfer[1]_i_1_n_0 ),
        .Q(\stateXfer_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateXfer_reg[2] 
       (.C(aclk_sig),
        .CE(\stateXfer[3]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\stateXfer[2]_i_1_n_0 ),
        .Q(\stateXfer_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateXfer_reg[3] 
       (.C(aclk_sig),
        .CE(\stateXfer[3]_i_1_n_0 ),
        .CLR(sda_sig_reg_0),
        .D(\stateXfer[3]_i_2_n_0 ),
        .Q(\stateXfer_reg_n_0_[3] ));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Laser
   (cs,
    sclk,
    ackInvLaserSet,
    mosi,
    aclk_sig,
    \FSM_sequential_stateXfer_reg[2] ,
    D,
    reqInvLaserSet,
    \txbuf_reg[0][3]_0 );
  output cs;
  output sclk;
  output ackInvLaserSet;
  output mosi;
  input aclk_sig;
  input [0:0]\FSM_sequential_stateXfer_reg[2] ;
  input [17:0]D;
  input reqInvLaserSet;
  input [1:0]\txbuf_reg[0][3]_0 ;

  wire [17:0]D;
  wire \FSM_sequential_stateOp[0]_i_3_n_0 ;
  wire \FSM_sequential_stateOp[2]_i_10_n_0 ;
  wire \FSM_sequential_stateOp[2]_i_11_n_0 ;
  wire \FSM_sequential_stateOp[2]_i_12_n_0 ;
  wire \FSM_sequential_stateOp[2]_i_6_n_0 ;
  wire \FSM_sequential_stateOp[2]_i_8_n_0 ;
  wire [0:0]\FSM_sequential_stateXfer_reg[2] ;
  wire ackInvLaserSet;
  wire aclk_sig;
  wire [0:0]bytecnt;
  wire \bytecnt[0]_i_2__0_n_0 ;
  wire cs;
  wire [10:0]i;
  wire \i[10]_i_4_n_0 ;
  wire \i[8]_i_2__0_n_0 ;
  wire \i_reg_n_0_[0] ;
  wire \i_reg_n_0_[10] ;
  wire \i_reg_n_0_[1] ;
  wire \i_reg_n_0_[2] ;
  wire \i_reg_n_0_[3] ;
  wire \i_reg_n_0_[4] ;
  wire \i_reg_n_0_[5] ;
  wire \i_reg_n_0_[6] ;
  wire \i_reg_n_0_[7] ;
  wire \i_reg_n_0_[8] ;
  wire \i_reg_n_0_[9] ;
  wire [3:0]in9;
  wire [7:0]j;
  wire \j[6]_i_2_n_0 ;
  wire \j[6]_i_3_n_0 ;
  wire \j[7]_i_3__0_n_0 ;
  wire \j_reg_n_0_[0] ;
  wire \j_reg_n_0_[1] ;
  wire \j_reg_n_0_[2] ;
  wire \j_reg_n_0_[3] ;
  wire \j_reg_n_0_[4] ;
  wire \j_reg_n_0_[5] ;
  wire \j_reg_n_0_[6] ;
  wire \j_reg_n_0_[7] ;
  wire [1:1]len;
  wire mosi;
  wire mySpi_n_10;
  wire mySpi_n_3;
  wire mySpi_n_4;
  wire mySpi_n_5;
  wire mySpi_n_6;
  wire mySpi_n_7;
  wire [7:2]p_1_in;
  wire [2:0]p_4_out;
  wire rNotL;
  wire rNotL_reg_n_0;
  wire \r_lcl[9]_i_1__0_n_0 ;
  wire \r_lcl_reg_n_0_[0] ;
  wire \r_lcl_reg_n_0_[1] ;
  wire \r_lcl_reg_n_0_[2] ;
  wire \r_lcl_reg_n_0_[3] ;
  wire \r_lcl_reg_n_0_[4] ;
  wire \r_lcl_reg_n_0_[5] ;
  wire reqInvLaserSet;
  wire sclk;
  wire [7:0]send;
  wire spilen;
  wire \spilen[1]_i_1_n_0 ;
  wire \spisend[0]_i_1_n_0 ;
  wire \spisend[1]_i_1_n_0 ;
  wire \spisend[1]_i_2_n_0 ;
  wire \spisend[1]_i_3_n_0 ;
  wire \spisend[2]_i_1_n_0 ;
  wire \spisend[2]_i_2_n_0 ;
  wire \spisend[3]_i_1_n_0 ;
  wire \spisend[3]_i_2_n_0 ;
  wire \spisend[3]_i_3_n_0 ;
  wire \spisend[4]_i_1_n_0 ;
  wire \spisend[5]_i_1_n_0 ;
  wire \spisend[6]_i_1_n_0 ;
  wire \spisend[7]_i_1_n_0 ;
  wire [2:0]stateOp;
  wire [3:0]\txbuf[0]_59 ;
  wire [1:0]\txbuf_reg[0][3]_0 ;
  wire [7:0]\txbuf_reg[0]_58 ;
  wire [7:2]\txbuf_reg[1]_57 ;
  wire updNotPrep_i_1_n_0;
  wire updNotPrep_reg_n_0;

  LUT2 #(
    .INIT(4'hB)) 
    \FSM_sequential_stateOp[0]_i_3 
       (.I0(rNotL_reg_n_0),
        .I1(updNotPrep_reg_n_0),
        .O(\FSM_sequential_stateOp[0]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h08CC0BCC)) 
    \FSM_sequential_stateOp[1]_i_1 
       (.I0(\FSM_sequential_stateOp[2]_i_8_n_0 ),
        .I1(stateOp[0]),
        .I2(stateOp[2]),
        .I3(stateOp[1]),
        .I4(updNotPrep_reg_n_0),
        .O(p_4_out[1]));
  LUT4 #(
    .INIT(16'hFFEF)) 
    \FSM_sequential_stateOp[2]_i_10 
       (.I0(\j_reg_n_0_[2] ),
        .I1(\j_reg_n_0_[0] ),
        .I2(\j_reg_n_0_[3] ),
        .I3(\j_reg_n_0_[4] ),
        .O(\FSM_sequential_stateOp[2]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFEFFF)) 
    \FSM_sequential_stateOp[2]_i_11 
       (.I0(\i_reg_n_0_[8] ),
        .I1(\i_reg_n_0_[7] ),
        .I2(\i_reg_n_0_[9] ),
        .I3(\i_reg_n_0_[10] ),
        .I4(\i_reg_n_0_[0] ),
        .I5(\FSM_sequential_stateOp[2]_i_12_n_0 ),
        .O(\FSM_sequential_stateOp[2]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2506" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \FSM_sequential_stateOp[2]_i_12 
       (.I0(\i_reg_n_0_[5] ),
        .I1(\i_reg_n_0_[6] ),
        .O(\FSM_sequential_stateOp[2]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFBFF)) 
    \FSM_sequential_stateOp[2]_i_6 
       (.I0(\j_reg_n_0_[1] ),
        .I1(\j_reg_n_0_[6] ),
        .I2(\j_reg_n_0_[5] ),
        .I3(\j_reg_n_0_[7] ),
        .I4(\FSM_sequential_stateOp[2]_i_10_n_0 ),
        .O(\FSM_sequential_stateOp[2]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \FSM_sequential_stateOp[2]_i_8 
       (.I0(\FSM_sequential_stateOp[2]_i_11_n_0 ),
        .I1(\i_reg_n_0_[3] ),
        .I2(\i_reg_n_0_[4] ),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[2] ),
        .O(\FSM_sequential_stateOp[2]_i_8_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:000,iSTATE0:110,iSTATE1:111,iSTATE2:010,iSTATE3:011,iSTATE4:101,iSTATE5:100,iSTATE6:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(mySpi_n_4),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(p_4_out[0]),
        .Q(stateOp[0]));
  (* FSM_ENCODED_STATES = "iSTATE:000,iSTATE0:110,iSTATE1:111,iSTATE2:010,iSTATE3:011,iSTATE4:101,iSTATE5:100,iSTATE6:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(mySpi_n_4),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(p_4_out[1]),
        .Q(stateOp[1]));
  (* FSM_ENCODED_STATES = "iSTATE:000,iSTATE0:110,iSTATE1:111,iSTATE2:010,iSTATE3:011,iSTATE4:101,iSTATE5:100,iSTATE6:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateOp_reg[2] 
       (.C(aclk_sig),
        .CE(mySpi_n_4),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(p_4_out[2]),
        .Q(stateOp[2]));
  (* SOFT_HLUTNM = "soft_lutpair2498" *) 
  LUT5 #(
    .INIT(32'hCCCC0C50)) 
    \bytecnt[0]_i_2__0 
       (.I0(bytecnt),
        .I1(rNotL_reg_n_0),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .I4(stateOp[1]),
        .O(\bytecnt[0]_i_2__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \bytecnt_reg[0] 
       (.C(aclk_sig),
        .CE(mySpi_n_6),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\bytecnt[0]_i_2__0_n_0 ),
        .Q(bytecnt));
  (* SOFT_HLUTNM = "soft_lutpair2505" *) 
  LUT4 #(
    .INIT(16'h00FB)) 
    \i[0]_i_1__17 
       (.I0(stateOp[2]),
        .I1(stateOp[1]),
        .I2(stateOp[0]),
        .I3(\i_reg_n_0_[0] ),
        .O(i[0]));
  LUT6 #(
    .INIT(64'hBBBBB0BB44444044)) 
    \i[10]_i_2__2 
       (.I0(\i[10]_i_4_n_0 ),
        .I1(\i_reg_n_0_[9] ),
        .I2(stateOp[2]),
        .I3(stateOp[1]),
        .I4(stateOp[0]),
        .I5(\i_reg_n_0_[10] ),
        .O(i[10]));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \i[10]_i_4 
       (.I0(\i_reg_n_0_[7] ),
        .I1(\i_reg_n_0_[6] ),
        .I2(\i_reg_n_0_[5] ),
        .I3(\i[8]_i_2__0_n_0 ),
        .I4(\i_reg_n_0_[8] ),
        .O(\i[10]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2505" *) 
  LUT5 #(
    .INIT(32'h00FBFB00)) 
    \i[1]_i_1__17 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[1] ),
        .O(i[1]));
  LUT6 #(
    .INIT(64'h00FBFBFBFB000000)) 
    \i[2]_i_1__13 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[0] ),
        .I5(\i_reg_n_0_[2] ),
        .O(i[2]));
  LUT5 #(
    .INIT(32'h007F0080)) 
    \i[3]_i_1__13 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[2] ),
        .I3(\j[6]_i_3_n_0 ),
        .I4(\i_reg_n_0_[3] ),
        .O(i[3]));
  LUT6 #(
    .INIT(64'h00007FFF00008000)) 
    \i[4]_i_1__13 
       (.I0(\i_reg_n_0_[2] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[3] ),
        .I4(\j[6]_i_3_n_0 ),
        .I5(\i_reg_n_0_[4] ),
        .O(i[4]));
  LUT5 #(
    .INIT(32'h5545AA8A)) 
    \i[5]_i_1__12 
       (.I0(\i[8]_i_2__0_n_0 ),
        .I1(stateOp[2]),
        .I2(stateOp[1]),
        .I3(stateOp[0]),
        .I4(\i_reg_n_0_[5] ),
        .O(i[5]));
  LUT6 #(
    .INIT(64'h5545FFCFAA8A0000)) 
    \i[6]_i_1__11 
       (.I0(\i[8]_i_2__0_n_0 ),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(stateOp[2]),
        .I4(\i_reg_n_0_[5] ),
        .I5(\i_reg_n_0_[6] ),
        .O(i[6]));
  (* SOFT_HLUTNM = "soft_lutpair2506" *) 
  LUT5 #(
    .INIT(32'h007F0080)) 
    \i[7]_i_1__9 
       (.I0(\i_reg_n_0_[6] ),
        .I1(\i_reg_n_0_[5] ),
        .I2(\i[8]_i_2__0_n_0 ),
        .I3(\j[6]_i_3_n_0 ),
        .I4(\i_reg_n_0_[7] ),
        .O(i[7]));
  LUT6 #(
    .INIT(64'h00007FFF00008000)) 
    \i[8]_i_1__8 
       (.I0(\i[8]_i_2__0_n_0 ),
        .I1(\i_reg_n_0_[5] ),
        .I2(\i_reg_n_0_[6] ),
        .I3(\i_reg_n_0_[7] ),
        .I4(\j[6]_i_3_n_0 ),
        .I5(\i_reg_n_0_[8] ),
        .O(i[8]));
  LUT5 #(
    .INIT(32'h80000000)) 
    \i[8]_i_2__0 
       (.I0(\i_reg_n_0_[4] ),
        .I1(\i_reg_n_0_[3] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[2] ),
        .O(\i[8]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'hAA8A5545)) 
    \i[9]_i_1__7 
       (.I0(\i[10]_i_4_n_0 ),
        .I1(stateOp[2]),
        .I2(stateOp[1]),
        .I3(stateOp[0]),
        .I4(\i_reg_n_0_[9] ),
        .O(i[9]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(mySpi_n_5),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(i[0]),
        .Q(\i_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[10] 
       (.C(aclk_sig),
        .CE(mySpi_n_5),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(i[10]),
        .Q(\i_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(mySpi_n_5),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(i[1]),
        .Q(\i_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(mySpi_n_5),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(i[2]),
        .Q(\i_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(mySpi_n_5),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(i[3]),
        .Q(\i_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(mySpi_n_5),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(i[4]),
        .Q(\i_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(mySpi_n_5),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(i[5]),
        .Q(\i_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(mySpi_n_5),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(i[6]),
        .Q(\i_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(mySpi_n_5),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(i[7]),
        .Q(\i_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[8] 
       (.C(aclk_sig),
        .CE(mySpi_n_5),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(i[8]),
        .Q(\i_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[9] 
       (.C(aclk_sig),
        .CE(mySpi_n_5),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(i[9]),
        .Q(\i_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair2507" *) 
  LUT4 #(
    .INIT(16'h00FB)) 
    \j[0]_i_1__2 
       (.I0(stateOp[2]),
        .I1(stateOp[1]),
        .I2(stateOp[0]),
        .I3(\j_reg_n_0_[0] ),
        .O(j[0]));
  (* SOFT_HLUTNM = "soft_lutpair2507" *) 
  LUT5 #(
    .INIT(32'h00FBFB00)) 
    \j[1]_i_1__1 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .I3(\j_reg_n_0_[0] ),
        .I4(\j_reg_n_0_[1] ),
        .O(j[1]));
  LUT6 #(
    .INIT(64'h00FBFBFBFB000000)) 
    \j[2]_i_1__1 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .I3(\j_reg_n_0_[0] ),
        .I4(\j_reg_n_0_[1] ),
        .I5(\j_reg_n_0_[2] ),
        .O(j[2]));
  (* SOFT_HLUTNM = "soft_lutpair2508" *) 
  LUT5 #(
    .INIT(32'h007F0080)) 
    \j[3]_i_1__1 
       (.I0(\j_reg_n_0_[0] ),
        .I1(\j_reg_n_0_[1] ),
        .I2(\j_reg_n_0_[2] ),
        .I3(\j[6]_i_3_n_0 ),
        .I4(\j_reg_n_0_[3] ),
        .O(j[3]));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \j[4]_i_1__1 
       (.I0(\j[6]_i_3_n_0 ),
        .I1(\j_reg_n_0_[2] ),
        .I2(\j_reg_n_0_[1] ),
        .I3(\j_reg_n_0_[0] ),
        .I4(\j_reg_n_0_[3] ),
        .I5(\j_reg_n_0_[4] ),
        .O(j[4]));
  LUT5 #(
    .INIT(32'h00F70008)) 
    \j[5]_i_1__1 
       (.I0(\j_reg_n_0_[4] ),
        .I1(\j_reg_n_0_[3] ),
        .I2(\j[6]_i_2_n_0 ),
        .I3(\j[6]_i_3_n_0 ),
        .I4(\j_reg_n_0_[5] ),
        .O(j[5]));
  LUT6 #(
    .INIT(64'h0000BFFF00004000)) 
    \j[6]_i_1__1 
       (.I0(\j[6]_i_2_n_0 ),
        .I1(\j_reg_n_0_[3] ),
        .I2(\j_reg_n_0_[4] ),
        .I3(\j_reg_n_0_[5] ),
        .I4(\j[6]_i_3_n_0 ),
        .I5(\j_reg_n_0_[6] ),
        .O(j[6]));
  (* SOFT_HLUTNM = "soft_lutpair2508" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    \j[6]_i_2 
       (.I0(\j_reg_n_0_[0] ),
        .I1(\j_reg_n_0_[1] ),
        .I2(\j_reg_n_0_[2] ),
        .O(\j[6]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2502" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \j[6]_i_3 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .O(\j[6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hBBBBB0BB44444044)) 
    \j[7]_i_2__1 
       (.I0(\j[7]_i_3__0_n_0 ),
        .I1(\j_reg_n_0_[6] ),
        .I2(stateOp[2]),
        .I3(stateOp[1]),
        .I4(stateOp[0]),
        .I5(\j_reg_n_0_[7] ),
        .O(j[7]));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \j[7]_i_3__0 
       (.I0(\j_reg_n_0_[2] ),
        .I1(\j_reg_n_0_[1] ),
        .I2(\j_reg_n_0_[0] ),
        .I3(\j_reg_n_0_[3] ),
        .I4(\j_reg_n_0_[4] ),
        .I5(\j_reg_n_0_[5] ),
        .O(\j[7]_i_3__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[0] 
       (.C(aclk_sig),
        .CE(mySpi_n_7),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(j[0]),
        .Q(\j_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[1] 
       (.C(aclk_sig),
        .CE(mySpi_n_7),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(j[1]),
        .Q(\j_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[2] 
       (.C(aclk_sig),
        .CE(mySpi_n_7),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(j[2]),
        .Q(\j_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[3] 
       (.C(aclk_sig),
        .CE(mySpi_n_7),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(j[3]),
        .Q(\j_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[4] 
       (.C(aclk_sig),
        .CE(mySpi_n_7),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(j[4]),
        .Q(\j_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[5] 
       (.C(aclk_sig),
        .CE(mySpi_n_7),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(j[5]),
        .Q(\j_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[6] 
       (.C(aclk_sig),
        .CE(mySpi_n_7),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(j[6]),
        .Q(\j_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[7] 
       (.C(aclk_sig),
        .CE(mySpi_n_7),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(j[7]),
        .Q(\j_reg_n_0_[7] ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Spimaster_v1_0 mySpi
       (.D({p_4_out[2],p_4_out[0]}),
        .E(mySpi_n_3),
        .\FSM_sequential_stateOp_reg[0] (mySpi_n_10),
        .\FSM_sequential_stateOp_reg[0]_0 (\FSM_sequential_stateOp[2]_i_6_n_0 ),
        .\FSM_sequential_stateOp_reg[0]_1 (\FSM_sequential_stateOp[0]_i_3_n_0 ),
        .\FSM_sequential_stateOp_reg[1] (mySpi_n_4),
        .\FSM_sequential_stateOp_reg[1]_0 (mySpi_n_5),
        .\FSM_sequential_stateOp_reg[1]_1 (mySpi_n_7),
        .\FSM_sequential_stateOp_reg[2] (mySpi_n_6),
        .\FSM_sequential_stateXfer_reg[2]_0 (\FSM_sequential_stateXfer_reg[2] ),
        .Q(stateOp),
        .aclk_sig(aclk_sig),
        .cs(cs),
        .\i_reg[0]_0 (\FSM_sequential_stateOp[2]_i_8_n_0 ),
        .\i_reg[0]_1 (updNotPrep_reg_n_0),
        .len(len),
        .mosi(mosi),
        .rNotL_reg(rNotL_reg_n_0),
        .reqInvLaserSet(reqInvLaserSet),
        .sclk(sclk),
        .\send_var_reg[7]_0 (send));
  FDCE rNotL_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(mySpi_n_10),
        .Q(rNotL_reg_n_0));
  LUT4 #(
    .INIT(16'h0800)) 
    \r_lcl[9]_i_1__0 
       (.I0(reqInvLaserSet),
        .I1(stateOp[2]),
        .I2(stateOp[1]),
        .I3(stateOp[0]),
        .O(\r_lcl[9]_i_1__0_n_0 ));
  FDCE \r_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\r_lcl[9]_i_1__0_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(D[0]),
        .Q(\r_lcl_reg_n_0_[0] ));
  FDCE \r_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\r_lcl[9]_i_1__0_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(D[1]),
        .Q(\r_lcl_reg_n_0_[1] ));
  FDCE \r_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\r_lcl[9]_i_1__0_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(D[2]),
        .Q(\r_lcl_reg_n_0_[2] ));
  FDCE \r_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\r_lcl[9]_i_1__0_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(D[3]),
        .Q(\r_lcl_reg_n_0_[3] ));
  FDCE \r_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\r_lcl[9]_i_1__0_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(D[4]),
        .Q(\r_lcl_reg_n_0_[4] ));
  FDCE \r_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\r_lcl[9]_i_1__0_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(D[5]),
        .Q(\r_lcl_reg_n_0_[5] ));
  FDCE \r_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\r_lcl[9]_i_1__0_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(D[6]),
        .Q(in9[0]));
  FDCE \r_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\r_lcl[9]_i_1__0_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(D[7]),
        .Q(in9[1]));
  FDCE \r_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\r_lcl[9]_i_1__0_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(D[8]),
        .Q(in9[2]));
  FDCE \r_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\r_lcl[9]_i_1__0_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(D[9]),
        .Q(in9[3]));
  LUT4 #(
    .INIT(16'hAAAB)) 
    \spilen[1]_i_1 
       (.I0(len),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(stateOp[2]),
        .O(\spilen[1]_i_1_n_0 ));
  FDCE \spilen_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\spilen[1]_i_1_n_0 ),
        .Q(len));
  LUT6 #(
    .INIT(64'hF888FFFFF888F888)) 
    \spisend[0]_i_1 
       (.I0(\spisend[1]_i_2_n_0 ),
        .I1(in9[0]),
        .I2(\spisend[1]_i_3_n_0 ),
        .I3(\txbuf_reg[0]_58 [0]),
        .I4(rNotL),
        .I5(D[16]),
        .O(\spisend[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hF888FFFFF888F888)) 
    \spisend[1]_i_1 
       (.I0(\spisend[1]_i_2_n_0 ),
        .I1(in9[1]),
        .I2(\spisend[1]_i_3_n_0 ),
        .I3(\txbuf_reg[0]_58 [1]),
        .I4(rNotL),
        .I5(D[17]),
        .O(\spisend[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2499" *) 
  LUT3 #(
    .INIT(8'hF4)) 
    \spisend[1]_i_2 
       (.I0(stateOp[0]),
        .I1(stateOp[2]),
        .I2(stateOp[1]),
        .O(\spisend[1]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2498" *) 
  LUT4 #(
    .INIT(16'h1000)) 
    \spisend[1]_i_3 
       (.I0(stateOp[2]),
        .I1(stateOp[1]),
        .I2(stateOp[0]),
        .I3(bytecnt),
        .O(\spisend[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF32300200)) 
    \spisend[2]_i_1 
       (.I0(bytecnt),
        .I1(\spisend[3]_i_2_n_0 ),
        .I2(stateOp[2]),
        .I3(\txbuf_reg[0]_58 [2]),
        .I4(\txbuf_reg[0][3]_0 [0]),
        .I5(\spisend[2]_i_2_n_0 ),
        .O(\spisend[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0F0F000F02200)) 
    \spisend[2]_i_2 
       (.I0(\txbuf_reg[1]_57 [2]),
        .I1(bytecnt),
        .I2(in9[2]),
        .I3(stateOp[0]),
        .I4(stateOp[2]),
        .I5(stateOp[1]),
        .O(\spisend[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF32300200)) 
    \spisend[3]_i_1 
       (.I0(bytecnt),
        .I1(\spisend[3]_i_2_n_0 ),
        .I2(stateOp[2]),
        .I3(\txbuf_reg[0]_58 [3]),
        .I4(\txbuf_reg[0][3]_0 [1]),
        .I5(\spisend[3]_i_3_n_0 ),
        .O(\spisend[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2504" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \spisend[3]_i_2 
       (.I0(stateOp[1]),
        .I1(stateOp[0]),
        .O(\spisend[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0F0F000F02200)) 
    \spisend[3]_i_3 
       (.I0(\txbuf_reg[1]_57 [3]),
        .I1(bytecnt),
        .I2(in9[3]),
        .I3(stateOp[0]),
        .I4(stateOp[2]),
        .I5(stateOp[1]),
        .O(\spisend[3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hBBFFBBFBBBBBBBFB)) 
    \spisend[4]_i_1 
       (.I0(stateOp[1]),
        .I1(stateOp[0]),
        .I2(\txbuf_reg[1]_57 [4]),
        .I3(stateOp[2]),
        .I4(bytecnt),
        .I5(\txbuf_reg[0]_58 [4]),
        .O(\spisend[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h000B000B000F0003)) 
    \spisend[5]_i_1 
       (.I0(\txbuf_reg[0]_58 [7]),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(stateOp[2]),
        .I4(\txbuf_reg[1]_57 [5]),
        .I5(bytecnt),
        .O(\spisend[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h000B000B000F0003)) 
    \spisend[6]_i_1 
       (.I0(\txbuf_reg[0]_58 [7]),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(stateOp[2]),
        .I4(\txbuf_reg[1]_57 [6]),
        .I5(bytecnt),
        .O(\spisend[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h000B000B000F0003)) 
    \spisend[7]_i_1 
       (.I0(\txbuf_reg[0]_58 [7]),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(stateOp[2]),
        .I4(\txbuf_reg[1]_57 [7]),
        .I5(bytecnt),
        .O(\spisend[7]_i_1_n_0 ));
  FDCE \spisend_reg[0] 
       (.C(aclk_sig),
        .CE(mySpi_n_6),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\spisend[0]_i_1_n_0 ),
        .Q(send[0]));
  FDCE \spisend_reg[1] 
       (.C(aclk_sig),
        .CE(mySpi_n_6),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\spisend[1]_i_1_n_0 ),
        .Q(send[1]));
  FDCE \spisend_reg[2] 
       (.C(aclk_sig),
        .CE(mySpi_n_6),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\spisend[2]_i_1_n_0 ),
        .Q(send[2]));
  FDCE \spisend_reg[3] 
       (.C(aclk_sig),
        .CE(mySpi_n_6),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\spisend[3]_i_1_n_0 ),
        .Q(send[3]));
  FDCE \spisend_reg[4] 
       (.C(aclk_sig),
        .CE(mySpi_n_6),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\spisend[4]_i_1_n_0 ),
        .Q(send[4]));
  FDCE \spisend_reg[5] 
       (.C(aclk_sig),
        .CE(mySpi_n_6),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\spisend[5]_i_1_n_0 ),
        .Q(send[5]));
  FDCE \spisend_reg[6] 
       (.C(aclk_sig),
        .CE(mySpi_n_6),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\spisend[6]_i_1_n_0 ),
        .Q(send[6]));
  FDCE \spisend_reg[7] 
       (.C(aclk_sig),
        .CE(mySpi_n_6),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\spisend[7]_i_1_n_0 ),
        .Q(send[7]));
  (* SOFT_HLUTNM = "soft_lutpair2503" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \stateOp[5]_i_74 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .O(ackInvLaserSet));
  (* SOFT_HLUTNM = "soft_lutpair2502" *) 
  LUT5 #(
    .INIT(32'hAAAACAA0)) 
    \txbuf[0][0]_i_1 
       (.I0(in9[0]),
        .I1(D[16]),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .I4(stateOp[1]),
        .O(\txbuf[0]_59 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2501" *) 
  LUT5 #(
    .INIT(32'hAAAACAA0)) 
    \txbuf[0][1]_i_1 
       (.I0(in9[1]),
        .I1(D[17]),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .I4(stateOp[1]),
        .O(\txbuf[0]_59 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2500" *) 
  LUT5 #(
    .INIT(32'hAAAACAA0)) 
    \txbuf[0][2]_i_1 
       (.I0(in9[2]),
        .I1(\txbuf_reg[0][3]_0 [0]),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .I4(stateOp[1]),
        .O(\txbuf[0]_59 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2499" *) 
  LUT5 #(
    .INIT(32'hAAAACAA0)) 
    \txbuf[0][3]_i_1 
       (.I0(in9[3]),
        .I1(\txbuf_reg[0][3]_0 [1]),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .I4(stateOp[1]),
        .O(\txbuf[0]_59 [3]));
  (* SOFT_HLUTNM = "soft_lutpair2501" *) 
  LUT3 #(
    .INIT(8'hDF)) 
    \txbuf[0][4]_i_1 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .O(rNotL));
  (* SOFT_HLUTNM = "soft_lutpair2500" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \txbuf[0][7]_i_1 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .O(spilen));
  (* SOFT_HLUTNM = "soft_lutpair2503" *) 
  LUT5 #(
    .INIT(32'hCCACCCC0)) 
    \txbuf[1][2]_i_1 
       (.I0(D[10]),
        .I1(\r_lcl_reg_n_0_[0] ),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .I4(stateOp[2]),
        .O(p_1_in[2]));
  (* SOFT_HLUTNM = "soft_lutpair2504" *) 
  LUT5 #(
    .INIT(32'hCCACCCC0)) 
    \txbuf[1][3]_i_1 
       (.I0(D[11]),
        .I1(\r_lcl_reg_n_0_[1] ),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .I4(stateOp[2]),
        .O(p_1_in[3]));
  LUT5 #(
    .INIT(32'hAEABA2AB)) 
    \txbuf[1][4]_i_1 
       (.I0(\r_lcl_reg_n_0_[2] ),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(stateOp[2]),
        .I4(D[12]),
        .O(p_1_in[4]));
  LUT5 #(
    .INIT(32'hCCACCCC0)) 
    \txbuf[1][5]_i_1 
       (.I0(D[13]),
        .I1(\r_lcl_reg_n_0_[3] ),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .I4(stateOp[2]),
        .O(p_1_in[5]));
  LUT5 #(
    .INIT(32'hCCACCCC0)) 
    \txbuf[1][6]_i_1 
       (.I0(D[14]),
        .I1(\r_lcl_reg_n_0_[4] ),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .I4(stateOp[2]),
        .O(p_1_in[6]));
  LUT5 #(
    .INIT(32'hCCACCCC0)) 
    \txbuf[1][7]_i_2 
       (.I0(D[15]),
        .I1(\r_lcl_reg_n_0_[5] ),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .I4(stateOp[2]),
        .O(p_1_in[7]));
  FDCE \txbuf_reg[0][0] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\txbuf[0]_59 [0]),
        .Q(\txbuf_reg[0]_58 [0]));
  FDCE \txbuf_reg[0][1] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\txbuf[0]_59 [1]),
        .Q(\txbuf_reg[0]_58 [1]));
  FDCE \txbuf_reg[0][2] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\txbuf[0]_59 [2]),
        .Q(\txbuf_reg[0]_58 [2]));
  FDCE \txbuf_reg[0][3] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(\txbuf[0]_59 [3]),
        .Q(\txbuf_reg[0]_58 [3]));
  FDCE \txbuf_reg[0][4] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(rNotL),
        .Q(\txbuf_reg[0]_58 [4]));
  FDCE \txbuf_reg[0][7] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(spilen),
        .Q(\txbuf_reg[0]_58 [7]));
  FDCE \txbuf_reg[1][2] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(p_1_in[2]),
        .Q(\txbuf_reg[1]_57 [2]));
  FDCE \txbuf_reg[1][3] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(p_1_in[3]),
        .Q(\txbuf_reg[1]_57 [3]));
  FDCE \txbuf_reg[1][4] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(p_1_in[4]),
        .Q(\txbuf_reg[1]_57 [4]));
  FDCE \txbuf_reg[1][5] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(p_1_in[5]),
        .Q(\txbuf_reg[1]_57 [5]));
  FDCE \txbuf_reg[1][6] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(p_1_in[6]),
        .Q(\txbuf_reg[1]_57 [6]));
  FDCE \txbuf_reg[1][7] 
       (.C(aclk_sig),
        .CE(mySpi_n_3),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(p_1_in[7]),
        .Q(\txbuf_reg[1]_57 [7]));
  LUT5 #(
    .INIT(32'hFFFC0800)) 
    updNotPrep_i_1
       (.I0(reqInvLaserSet),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(stateOp[2]),
        .I4(updNotPrep_reg_n_0),
        .O(updNotPrep_i_1_n_0));
  FDCE updNotPrep_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\FSM_sequential_stateXfer_reg[2] ),
        .D(updNotPrep_i_1_n_0),
        .Q(updNotPrep_reg_n_0));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Memtrack
   (doutb,
    \mask_reg[7]_0 ,
    \mask_reg[6]_0 ,
    \mask_reg[5]_0 ,
    \mask_reg[4]_0 ,
    \mask_reg[3]_0 ,
    \mask_reg[2]_0 ,
    \mask_reg[1]_0 ,
    \mask_reg[0]_0 ,
    ackInvMemtrackSet,
    ackInvMemtrackSelect,
    ackInvMemtrackSetMask,
    avllenSeqbufMemtrackToHostif,
    rng_reg_0,
    ackInvMemtrackClearMask,
    seqbufMemtrackToHostifAXIS_tvalid,
    memtrackGetInfoTixVState,
    \stateOp_reg[2]_0 ,
    Q,
    ackSeqbufMemtrackToHostif,
    \ptr0Seqbuf_mclk_reg[9]_0 ,
    memclk,
    aclk_sig,
    \ptr0Seqbuf_to_mclkm2_reg[0]_0 ,
    AR,
    E,
    \mask_reg[7]_1 ,
    \mask_reg[6]_1 ,
    \mask_reg[5]_1 ,
    \mask_reg[4]_1 ,
    \mask_reg[3]_1 ,
    \mask_reg[2]_1 ,
    \mask_reg[1]_1 ,
    \mask_reg[0]_1 ,
    rng_reg_1,
    restart_reg_0,
    reqInvMemtrackClearMask,
    \mask_reg[8]_0 ,
    strb_last_reg_0,
    reqInvMemtrackSetMask,
    \staTixVTrigger_reg[7]_0 ,
    reqSeqbufMemtrackToHostif,
    seqbufMemtrackToHostifAXIS_tready,
    dneSeqbufMemtrackToHostif,
    reqInvMemtrackSelect,
    reqInvMemtrackSet,
    \capt_reg[1]_0 ,
    \capt_reg[1]_1 ,
    \capt_reg[3]_0 ,
    \capt_reg[3]_1 ,
    \capt_reg[8]_0 ,
    \capt_reg[0]_0 ,
    ddrAXI_rvalid,
    ddrAXI_wready,
    ddrAXI_bvalid,
    D,
    \capt_reg[5]_0 ,
    \TCaptMax_reg[31]_0 ,
    \TCaptMax_reg[7]_0 ,
    start_reg_0,
    stop_reg_0);
  output [63:0]doutb;
  output \mask_reg[7]_0 ;
  output \mask_reg[6]_0 ;
  output \mask_reg[5]_0 ;
  output \mask_reg[4]_0 ;
  output \mask_reg[3]_0 ;
  output \mask_reg[2]_0 ;
  output \mask_reg[1]_0 ;
  output \mask_reg[0]_0 ;
  output ackInvMemtrackSet;
  output ackInvMemtrackSelect;
  output ackInvMemtrackSetMask;
  output [0:0]avllenSeqbufMemtrackToHostif;
  output rng_reg_0;
  output ackInvMemtrackClearMask;
  output seqbufMemtrackToHostifAXIS_tvalid;
  output [1:0]memtrackGetInfoTixVState;
  output \stateOp_reg[2]_0 ;
  output [31:0]Q;
  output ackSeqbufMemtrackToHostif;
  output [9:0]\ptr0Seqbuf_mclk_reg[9]_0 ;
  input memclk;
  input aclk_sig;
  input [0:0]\ptr0Seqbuf_to_mclkm2_reg[0]_0 ;
  input [0:0]AR;
  input [0:0]E;
  input \mask_reg[7]_1 ;
  input \mask_reg[6]_1 ;
  input \mask_reg[5]_1 ;
  input \mask_reg[4]_1 ;
  input \mask_reg[3]_1 ;
  input \mask_reg[2]_1 ;
  input \mask_reg[1]_1 ;
  input \mask_reg[0]_1 ;
  input rng_reg_1;
  input restart_reg_0;
  input reqInvMemtrackClearMask;
  input \mask_reg[8]_0 ;
  input strb_last_reg_0;
  input reqInvMemtrackSetMask;
  input [7:0]\staTixVTrigger_reg[7]_0 ;
  input reqSeqbufMemtrackToHostif;
  input seqbufMemtrackToHostifAXIS_tready;
  input dneSeqbufMemtrackToHostif;
  input reqInvMemtrackSelect;
  input reqInvMemtrackSet;
  input [1:0]\capt_reg[1]_0 ;
  input [0:0]\capt_reg[1]_1 ;
  input \capt_reg[3]_0 ;
  input [0:0]\capt_reg[3]_1 ;
  input [2:0]\capt_reg[8]_0 ;
  input [3:0]\capt_reg[0]_0 ;
  input ddrAXI_rvalid;
  input ddrAXI_wready;
  input ddrAXI_bvalid;
  input [23:0]D;
  input [0:0]\capt_reg[5]_0 ;
  input [0:0]\TCaptMax_reg[31]_0 ;
  input [7:0]\TCaptMax_reg[7]_0 ;
  input start_reg_0;
  input stop_reg_0;

  wire [0:0]AR;
  wire [23:0]D;
  wire [0:0]E;
  wire \FSM_onehot_stateSeq[0]_i_1__0_n_0 ;
  wire \FSM_onehot_stateSeq[2]_i_1__0_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_1__0_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_2__0_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_3__0_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_4__0_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_1__0_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_2__0_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_3__0_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_4__0_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_5__0_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_6__0_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_7__0_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_8_n_0 ;
  wire \FSM_onehot_stateSeq_reg_n_0_[4] ;
  wire [31:0]Q;
  wire TCapt;
  wire [0:0]\TCaptMax_reg[31]_0 ;
  wire [7:0]\TCaptMax_reg[7]_0 ;
  wire \TCaptMax_reg_n_0_[0] ;
  wire \TCaptMax_reg_n_0_[10] ;
  wire \TCaptMax_reg_n_0_[11] ;
  wire \TCaptMax_reg_n_0_[12] ;
  wire \TCaptMax_reg_n_0_[13] ;
  wire \TCaptMax_reg_n_0_[14] ;
  wire \TCaptMax_reg_n_0_[15] ;
  wire \TCaptMax_reg_n_0_[16] ;
  wire \TCaptMax_reg_n_0_[17] ;
  wire \TCaptMax_reg_n_0_[18] ;
  wire \TCaptMax_reg_n_0_[19] ;
  wire \TCaptMax_reg_n_0_[1] ;
  wire \TCaptMax_reg_n_0_[20] ;
  wire \TCaptMax_reg_n_0_[21] ;
  wire \TCaptMax_reg_n_0_[22] ;
  wire \TCaptMax_reg_n_0_[23] ;
  wire \TCaptMax_reg_n_0_[24] ;
  wire \TCaptMax_reg_n_0_[25] ;
  wire \TCaptMax_reg_n_0_[26] ;
  wire \TCaptMax_reg_n_0_[27] ;
  wire \TCaptMax_reg_n_0_[28] ;
  wire \TCaptMax_reg_n_0_[29] ;
  wire \TCaptMax_reg_n_0_[2] ;
  wire \TCaptMax_reg_n_0_[30] ;
  wire \TCaptMax_reg_n_0_[31] ;
  wire \TCaptMax_reg_n_0_[3] ;
  wire \TCaptMax_reg_n_0_[4] ;
  wire \TCaptMax_reg_n_0_[5] ;
  wire \TCaptMax_reg_n_0_[6] ;
  wire \TCaptMax_reg_n_0_[7] ;
  wire \TCaptMax_reg_n_0_[8] ;
  wire \TCaptMax_reg_n_0_[9] ;
  wire [31:0]TCapt__0;
  wire [1:0]TCapt_i;
  wire \TCapt_i[0]_i_1_n_0 ;
  wire \TCapt_i[1]_i_10_n_0 ;
  wire \TCapt_i[1]_i_11_n_0 ;
  wire \TCapt_i[1]_i_12_n_0 ;
  wire \TCapt_i[1]_i_13_n_0 ;
  wire \TCapt_i[1]_i_14_n_0 ;
  wire \TCapt_i[1]_i_1_n_0 ;
  wire \TCapt_i[1]_i_4_n_0 ;
  wire \TCapt_i[1]_i_5_n_0 ;
  wire \TCapt_i[1]_i_6_n_0 ;
  wire \TCapt_i[1]_i_7_n_0 ;
  wire \TCapt_i[1]_i_8_n_0 ;
  wire \TCapt_i[1]_i_9_n_0 ;
  wire \TCapt_i_reg[1]_i_2_n_5 ;
  wire \TCapt_i_reg[1]_i_2_n_6 ;
  wire \TCapt_i_reg[1]_i_2_n_7 ;
  wire \TCapt_i_reg[1]_i_3_n_0 ;
  wire \TCapt_i_reg[1]_i_3_n_1 ;
  wire \TCapt_i_reg[1]_i_3_n_2 ;
  wire \TCapt_i_reg[1]_i_3_n_3 ;
  wire \TCapt_i_reg[1]_i_3_n_4 ;
  wire \TCapt_i_reg[1]_i_3_n_5 ;
  wire \TCapt_i_reg[1]_i_3_n_6 ;
  wire \TCapt_i_reg[1]_i_3_n_7 ;
  wire \TCapt_mclk[31]_i_10_n_0 ;
  wire \TCapt_mclk[31]_i_11_n_0 ;
  wire \TCapt_mclk[31]_i_12_n_0 ;
  wire \TCapt_mclk[31]_i_13_n_0 ;
  wire \TCapt_mclk[31]_i_1_n_0 ;
  wire \TCapt_mclk[31]_i_2_n_0 ;
  wire \TCapt_mclk[31]_i_3_n_0 ;
  wire \TCapt_mclk[31]_i_4_n_0 ;
  wire \TCapt_mclk[31]_i_5_n_0 ;
  wire \TCapt_mclk[31]_i_6_n_0 ;
  wire \TCapt_mclk[31]_i_7_n_0 ;
  wire \TCapt_mclk[31]_i_8_n_0 ;
  wire \TCapt_mclk[31]_i_9_n_0 ;
  wire \TCapt_reg[16]_i_2__0_n_0 ;
  wire \TCapt_reg[16]_i_2__0_n_1 ;
  wire \TCapt_reg[16]_i_2__0_n_2 ;
  wire \TCapt_reg[16]_i_2__0_n_3 ;
  wire \TCapt_reg[16]_i_2__0_n_4 ;
  wire \TCapt_reg[16]_i_2__0_n_5 ;
  wire \TCapt_reg[16]_i_2__0_n_6 ;
  wire \TCapt_reg[16]_i_2__0_n_7 ;
  wire \TCapt_reg[24]_i_2__0_n_0 ;
  wire \TCapt_reg[24]_i_2__0_n_1 ;
  wire \TCapt_reg[24]_i_2__0_n_2 ;
  wire \TCapt_reg[24]_i_2__0_n_3 ;
  wire \TCapt_reg[24]_i_2__0_n_4 ;
  wire \TCapt_reg[24]_i_2__0_n_5 ;
  wire \TCapt_reg[24]_i_2__0_n_6 ;
  wire \TCapt_reg[24]_i_2__0_n_7 ;
  wire \TCapt_reg[31]_i_2__0_n_2 ;
  wire \TCapt_reg[31]_i_2__0_n_3 ;
  wire \TCapt_reg[31]_i_2__0_n_4 ;
  wire \TCapt_reg[31]_i_2__0_n_5 ;
  wire \TCapt_reg[31]_i_2__0_n_6 ;
  wire \TCapt_reg[31]_i_2__0_n_7 ;
  wire \TCapt_reg[8]_i_2__0_n_0 ;
  wire \TCapt_reg[8]_i_2__0_n_1 ;
  wire \TCapt_reg[8]_i_2__0_n_2 ;
  wire \TCapt_reg[8]_i_2__0_n_3 ;
  wire \TCapt_reg[8]_i_2__0_n_4 ;
  wire \TCapt_reg[8]_i_2__0_n_5 ;
  wire \TCapt_reg[8]_i_2__0_n_6 ;
  wire \TCapt_reg[8]_i_2__0_n_7 ;
  wire \TCapt_reg_n_0_[0] ;
  wire \TCapt_reg_n_0_[10] ;
  wire \TCapt_reg_n_0_[11] ;
  wire \TCapt_reg_n_0_[12] ;
  wire \TCapt_reg_n_0_[13] ;
  wire \TCapt_reg_n_0_[14] ;
  wire \TCapt_reg_n_0_[15] ;
  wire \TCapt_reg_n_0_[16] ;
  wire \TCapt_reg_n_0_[17] ;
  wire \TCapt_reg_n_0_[18] ;
  wire \TCapt_reg_n_0_[19] ;
  wire \TCapt_reg_n_0_[1] ;
  wire \TCapt_reg_n_0_[20] ;
  wire \TCapt_reg_n_0_[21] ;
  wire \TCapt_reg_n_0_[22] ;
  wire \TCapt_reg_n_0_[23] ;
  wire \TCapt_reg_n_0_[24] ;
  wire \TCapt_reg_n_0_[25] ;
  wire \TCapt_reg_n_0_[26] ;
  wire \TCapt_reg_n_0_[27] ;
  wire \TCapt_reg_n_0_[28] ;
  wire \TCapt_reg_n_0_[29] ;
  wire \TCapt_reg_n_0_[2] ;
  wire \TCapt_reg_n_0_[30] ;
  wire \TCapt_reg_n_0_[31] ;
  wire \TCapt_reg_n_0_[3] ;
  wire \TCapt_reg_n_0_[4] ;
  wire \TCapt_reg_n_0_[5] ;
  wire \TCapt_reg_n_0_[6] ;
  wire \TCapt_reg_n_0_[7] ;
  wire \TCapt_reg_n_0_[8] ;
  wire \TCapt_reg_n_0_[9] ;
  wire [31:0]TCapt_to_mclk;
  wire \TCapt_to_mclk[31]_i_1_n_0 ;
  wire [31:0]TCapt_to_mclkm1;
  wire [31:0]TCapt_to_mclkm2;
  wire \aSeqbufB[0]_i_1__0_n_0 ;
  wire \aSeqbufB[1]_i_1__0_n_0 ;
  wire \aSeqbufB[2]_i_1__0_n_0 ;
  wire \aSeqbufB[3]_i_1__0_n_0 ;
  wire \aSeqbufB[4]_i_1__0_n_0 ;
  wire \aSeqbufB[5]_i_1__0_n_0 ;
  wire \aSeqbufB[5]_i_2__0_n_0 ;
  wire \aSeqbufB[6]_i_1__0_n_0 ;
  wire \aSeqbufB[7]_i_1__0_n_0 ;
  wire \aSeqbufB[8]_i_1__0_n_0 ;
  wire \aSeqbufB[8]_i_2__0_n_0 ;
  wire \aSeqbufB[8]_i_3__0_n_0 ;
  wire \aSeqbufB[8]_i_4__0_n_0 ;
  wire \aSeqbufB_reg_n_0_[0] ;
  wire \aSeqbufB_reg_n_0_[1] ;
  wire \aSeqbufB_reg_n_0_[2] ;
  wire \aSeqbufB_reg_n_0_[3] ;
  wire \aSeqbufB_reg_n_0_[4] ;
  wire \aSeqbufB_reg_n_0_[5] ;
  wire \aSeqbufB_reg_n_0_[6] ;
  wire \aSeqbufB_reg_n_0_[7] ;
  wire \aSeqbufB_reg_n_0_[8] ;
  wire \aSeqbuf[0]_i_1__0_n_0 ;
  wire \aSeqbuf[1]_i_1__0_n_0 ;
  wire \aSeqbuf[2]_i_1__0_n_0 ;
  wire \aSeqbuf[3]_i_1__0_n_0 ;
  wire \aSeqbuf[3]_i_2__0_n_0 ;
  wire \aSeqbuf[4]_i_1__0_n_0 ;
  wire \aSeqbuf[5]_i_1__0_n_0 ;
  wire \aSeqbuf[5]_i_2__0_n_0 ;
  wire \aSeqbuf[6]_i_1__0_n_0 ;
  wire \aSeqbuf[7]_i_1__0_n_0 ;
  wire \aSeqbuf[8]_i_1__0_n_0 ;
  wire \aSeqbuf[8]_i_2__0_n_0 ;
  wire \aSeqbuf[8]_i_3__0_n_0 ;
  wire \aSeqbuf[8]_i_4__0_n_0 ;
  wire \aSeqbuf[8]_i_5_n_0 ;
  wire \aSeqbuf[9]_i_1__0_n_0 ;
  wire \aSeqbuf[9]_i_2__0_n_0 ;
  wire \aSeqbuf[9]_i_3__0_n_0 ;
  wire \aSeqbuf[9]_i_4__0_n_0 ;
  wire \aSeqbuf[9]_i_5__0_n_0 ;
  wire \aSeqbuf[9]_i_6__0_n_0 ;
  wire \aSeqbuf_reg_n_0_[0] ;
  wire \aSeqbuf_reg_n_0_[1] ;
  wire \aSeqbuf_reg_n_0_[2] ;
  wire \aSeqbuf_reg_n_0_[3] ;
  wire \aSeqbuf_reg_n_0_[4] ;
  wire \aSeqbuf_reg_n_0_[5] ;
  wire \aSeqbuf_reg_n_0_[6] ;
  wire \aSeqbuf_reg_n_0_[7] ;
  wire \aSeqbuf_reg_n_0_[8] ;
  wire \aSeqbuf_reg_n_0_[9] ;
  wire ackInvClearMask_sig_i_1_n_0;
  wire ackInvMemtrackClearMask;
  wire ackInvMemtrackSelect;
  wire ackInvMemtrackSet;
  wire ackInvMemtrackSetMask;
  wire ackInvSelect_sig_i_1__0_n_0;
  wire ackInvSetMask_sig;
  wire ackInvSetMask_sig_i_1_n_0;
  wire ackInvSet_sig_i_1__2_n_0;
  wire ackInvSet_sig_i_2__0_n_0;
  wire ackSeqbufBToSeqClear;
  wire ackSeqbufMemtrackToHostif;
  wire aclk_sig;
  wire [0:0]avllenSeqbufMemtrackToHostif;
  wire [8:0]burstCapt;
  wire \burstCapt_reg_n_0_[0] ;
  wire \burstCapt_reg_n_0_[1] ;
  wire \burstCapt_reg_n_0_[2] ;
  wire \burstCapt_reg_n_0_[3] ;
  wire \burstCapt_reg_n_0_[4] ;
  wire \burstCapt_reg_n_0_[5] ;
  wire \burstCapt_reg_n_0_[6] ;
  wire \burstCapt_reg_n_0_[7] ;
  wire \burstCapt_reg_n_0_[8] ;
  wire [15:0]burstCnt;
  wire \burstCnt[10]_i_2__0_n_0 ;
  wire \burstCnt[11]_i_2__0_n_0 ;
  wire \burstCnt[12]_i_2__0_n_0 ;
  wire \burstCnt[14]_i_2__0_n_0 ;
  wire \burstCnt[14]_i_3__0_n_0 ;
  wire \burstCnt[15]_i_10__0_n_0 ;
  wire \burstCnt[15]_i_11__0_n_0 ;
  wire \burstCnt[15]_i_12__0_n_0 ;
  wire \burstCnt[15]_i_13__0_n_0 ;
  wire \burstCnt[15]_i_1__0_n_0 ;
  wire \burstCnt[15]_i_3__0_n_0 ;
  wire \burstCnt[15]_i_4__0_n_0 ;
  wire \burstCnt[15]_i_5__0_n_0 ;
  wire \burstCnt[15]_i_6_n_0 ;
  wire \burstCnt[15]_i_7__0_n_0 ;
  wire \burstCnt[15]_i_8__0_n_0 ;
  wire \burstCnt[15]_i_9__0_n_0 ;
  wire \burstCnt[1]_i_1__0_n_0 ;
  wire \burstCnt[2]_i_1__0_n_0 ;
  wire \burstCnt[4]_i_1__0_n_0 ;
  wire \burstCnt[4]_i_2__0_n_0 ;
  wire \burstCnt[5]_i_1__0_n_0 ;
  wire \burstCnt[5]_i_2__0_n_0 ;
  wire \burstCnt[6]_i_1__0_n_0 ;
  wire \burstCnt[6]_i_2__0_n_0 ;
  wire \burstCnt[7]_i_1__0_n_0 ;
  wire \burstCnt[7]_i_2__0_n_0 ;
  wire \burstCnt[8]_i_1__0_n_0 ;
  wire \burstCnt[8]_i_2__0_n_0 ;
  wire \burstCnt[9]_i_2__0_n_0 ;
  wire \burstCnt[9]_i_3_n_0 ;
  wire \burstCnt_reg_n_0_[0] ;
  wire \burstCnt_reg_n_0_[10] ;
  wire \burstCnt_reg_n_0_[11] ;
  wire \burstCnt_reg_n_0_[12] ;
  wire \burstCnt_reg_n_0_[13] ;
  wire \burstCnt_reg_n_0_[14] ;
  wire \burstCnt_reg_n_0_[15] ;
  wire \burstCnt_reg_n_0_[1] ;
  wire \burstCnt_reg_n_0_[2] ;
  wire \burstCnt_reg_n_0_[3] ;
  wire \burstCnt_reg_n_0_[4] ;
  wire \burstCnt_reg_n_0_[5] ;
  wire \burstCnt_reg_n_0_[6] ;
  wire \burstCnt_reg_n_0_[7] ;
  wire \burstCnt_reg_n_0_[8] ;
  wire \burstCnt_reg_n_0_[9] ;
  wire [8:0]capt;
  wire \capt[0]_i_1_n_0 ;
  wire \capt[1]_i_1_n_0 ;
  wire \capt[2]_i_1_n_0 ;
  wire \capt[3]_i_1_n_0 ;
  wire \capt[4]_i_1_n_0 ;
  wire \capt[6]_i_1_n_0 ;
  wire \capt[7]_i_1_n_0 ;
  wire \capt[8]_i_1_n_0 ;
  wire [3:0]\capt_reg[0]_0 ;
  wire [1:0]\capt_reg[1]_0 ;
  wire [0:0]\capt_reg[1]_1 ;
  wire \capt_reg[3]_0 ;
  wire [0:0]\capt_reg[3]_1 ;
  wire [0:0]\capt_reg[5]_0 ;
  wire [2:0]\capt_reg[8]_0 ;
  wire ddrAXI_bvalid;
  wire ddrAXI_rvalid;
  wire ddrAXI_wready;
  wire dneSeq;
  wire [1:0]dneSeq_i;
  wire \dneSeq_i[0]_i_1_n_0 ;
  wire \dneSeq_i[1]_i_1_n_0 ;
  wire dneSeq_mclk_i_1_n_0;
  wire dneSeq_to_mclk;
  wire dneSeq_to_mclk_i_1_n_0;
  wire dneSeq_to_mclkm1;
  wire dneSeq_to_mclkm2;
  wire dneSeqbufMemtrackToHostif;
  wire [63:0]doutb;
  wire [31:0]dwrSeqbuf;
  wire \dwrSeqbuf[0]_i_1__0_n_0 ;
  wire \dwrSeqbuf[0]_i_2__0_n_0 ;
  wire \dwrSeqbuf[10]_i_1__0_n_0 ;
  wire \dwrSeqbuf[11]_i_1__0_n_0 ;
  wire \dwrSeqbuf[12]_i_1__0_n_0 ;
  wire \dwrSeqbuf[13]_i_1__0_n_0 ;
  wire \dwrSeqbuf[14]_i_1__0_n_0 ;
  wire \dwrSeqbuf[15]_i_1__0_n_0 ;
  wire \dwrSeqbuf[15]_i_2__0_n_0 ;
  wire \dwrSeqbuf[15]_i_3__0_n_0 ;
  wire \dwrSeqbuf[16]_i_1__0_n_0 ;
  wire \dwrSeqbuf[17]_i_1__0_n_0 ;
  wire \dwrSeqbuf[18]_i_1__0_n_0 ;
  wire \dwrSeqbuf[19]_i_1__0_n_0 ;
  wire \dwrSeqbuf[1]_i_1__0_n_0 ;
  wire \dwrSeqbuf[1]_i_2__0_n_0 ;
  wire \dwrSeqbuf[1]_i_3__0_n_0 ;
  wire \dwrSeqbuf[20]_i_1__0_n_0 ;
  wire \dwrSeqbuf[21]_i_1__0_n_0 ;
  wire \dwrSeqbuf[22]_i_1__0_n_0 ;
  wire \dwrSeqbuf[23]_i_1__0_n_0 ;
  wire \dwrSeqbuf[24]_i_1__0_n_0 ;
  wire \dwrSeqbuf[2]_i_1__0_n_0 ;
  wire \dwrSeqbuf[2]_i_2__0_n_0 ;
  wire \dwrSeqbuf[2]_i_3__0_n_0 ;
  wire \dwrSeqbuf[30]_i_1__0_n_0 ;
  wire \dwrSeqbuf[31]_i_1__0_n_0 ;
  wire \dwrSeqbuf[31]_i_2__0_n_0 ;
  wire \dwrSeqbuf[31]_i_3_n_0 ;
  wire \dwrSeqbuf[31]_i_4__0_n_0 ;
  wire \dwrSeqbuf[31]_i_5_n_0 ;
  wire \dwrSeqbuf[31]_i_6_n_0 ;
  wire \dwrSeqbuf[31]_i_7_n_0 ;
  wire \dwrSeqbuf[3]_i_1__0_n_0 ;
  wire \dwrSeqbuf[3]_i_2__0_n_0 ;
  wire \dwrSeqbuf[3]_i_3__0_n_0 ;
  wire \dwrSeqbuf[4]_i_1__0_n_0 ;
  wire \dwrSeqbuf[4]_i_2__0_n_0 ;
  wire \dwrSeqbuf[5]_i_1__0_n_0 ;
  wire \dwrSeqbuf[5]_i_2__0_n_0 ;
  wire \dwrSeqbuf[5]_i_3__0_n_0 ;
  wire \dwrSeqbuf[6]_i_1__0_n_0 ;
  wire \dwrSeqbuf[6]_i_2__0_n_0 ;
  wire \dwrSeqbuf[7]_i_1__0_n_0 ;
  wire \dwrSeqbuf[7]_i_2__0_n_0 ;
  wire \dwrSeqbuf[8]_i_1__0_n_0 ;
  wire \dwrSeqbuf[8]_i_2__0_n_0 ;
  wire \dwrSeqbuf[8]_i_3_n_0 ;
  wire \dwrSeqbuf[9]_i_1__0_n_0 ;
  wire enSeqbuf;
  wire enSeqbuf_reg_n_0;
  wire first;
  wire first__0;
  wire \i[0]_i_1__6_n_0 ;
  wire \i_reg_n_0_[0] ;
  wire [31:1]in15;
  wire \mask[8]_i_1_n_0 ;
  wire \mask[8]_i_2_n_0 ;
  wire \mask_reg[0]_0 ;
  wire \mask_reg[0]_1 ;
  wire \mask_reg[1]_0 ;
  wire \mask_reg[1]_1 ;
  wire \mask_reg[2]_0 ;
  wire \mask_reg[2]_1 ;
  wire \mask_reg[3]_0 ;
  wire \mask_reg[3]_1 ;
  wire \mask_reg[4]_0 ;
  wire \mask_reg[4]_1 ;
  wire \mask_reg[5]_0 ;
  wire \mask_reg[5]_1 ;
  wire \mask_reg[6]_0 ;
  wire \mask_reg[6]_1 ;
  wire \mask_reg[7]_0 ;
  wire \mask_reg[7]_1 ;
  wire \mask_reg[8]_0 ;
  wire \mask_reg_n_0_[8] ;
  wire memclk;
  wire [1:0]memtrackGetInfoTixVState;
  wire [2:0]p_0_in__0;
  wire [9:0]ptr0Seqbuf;
  wire ptr0SeqbufTrackNotFixed_i_1__0_n_0;
  wire ptr0SeqbufTrackNotFixed_i_2_n_0;
  wire ptr0SeqbufTrackNotFixed_reg_n_0;
  wire [1:0]ptr0Seqbuf_i;
  wire \ptr0Seqbuf_i[0]_i_1_n_0 ;
  wire \ptr0Seqbuf_i[1]_i_1_n_0 ;
  wire \ptr0Seqbuf_i[1]_i_2_n_0 ;
  wire \ptr0Seqbuf_i[1]_i_3_n_0 ;
  wire \ptr0Seqbuf_i[1]_i_4_n_0 ;
  wire \ptr0Seqbuf_i[1]_i_5_n_0 ;
  wire \ptr0Seqbuf_i[1]_i_6_n_0 ;
  wire \ptr0Seqbuf_i[1]_i_7_n_0 ;
  wire \ptr0Seqbuf_mclk[9]_i_1_n_0 ;
  wire \ptr0Seqbuf_mclk[9]_i_2_n_0 ;
  wire \ptr0Seqbuf_mclk[9]_i_3_n_0 ;
  wire \ptr0Seqbuf_mclk[9]_i_4_n_0 ;
  wire [9:0]\ptr0Seqbuf_mclk_reg[9]_0 ;
  wire [9:0]ptr0Seqbuf_to_mclk;
  wire \ptr0Seqbuf_to_mclk[9]_i_1_n_0 ;
  wire [9:0]ptr0Seqbuf_to_mclkm1;
  wire [9:0]ptr0Seqbuf_to_mclkm2;
  wire [0:0]\ptr0Seqbuf_to_mclkm2_reg[0]_0 ;
  wire [8:0]quad;
  wire \quad[8]_i_1__0_n_0 ;
  wire \quad_reg_n_0_[0] ;
  wire \quad_reg_n_0_[1] ;
  wire \quad_reg_n_0_[2] ;
  wire \quad_reg_n_0_[3] ;
  wire \quad_reg_n_0_[4] ;
  wire \quad_reg_n_0_[5] ;
  wire \quad_reg_n_0_[6] ;
  wire \quad_reg_n_0_[7] ;
  wire \quad_reg_n_0_[8] ;
  wire rdySeq;
  wire [1:0]rdySeq_i;
  wire \rdySeq_i[0]_i_1_n_0 ;
  wire \rdySeq_i[1]_i_1_n_0 ;
  wire rdySeq_mclk;
  wire rdySeq_mclk_i_1_n_0;
  wire rdySeq_to_mclk;
  wire rdySeq_to_mclk_i_1_n_0;
  wire rdySeq_to_mclkm1;
  wire rdySeq_to_mclkm2;
  wire reqInvMemtrackClearMask;
  wire reqInvMemtrackSelect;
  wire reqInvMemtrackSet;
  wire reqInvMemtrackSetMask;
  wire reqOpToSeqClear_i;
  wire \reqOpToSeqClear_i[0]_i_1_n_0 ;
  wire reqOpToSeqClear_memclk;
  wire reqOpToSeqClear_memclk_i_1_n_0;
  wire reqOpToSeqClear_to_memclk_i_1_n_0;
  wire reqOpToSeqClear_to_memclk_reg_n_0;
  wire reqOpToSeqClear_to_memclkm1;
  wire reqOpToSeqClear_to_memclkm2;
  wire reqSeqbufBToSeqClear_i;
  wire \reqSeqbufBToSeqClear_i[0]_i_1_n_0 ;
  wire reqSeqbufBToSeqClear_memclk;
  wire reqSeqbufBToSeqClear_memclk_i_1_n_0;
  wire reqSeqbufBToSeqClear_to_memclk_i_1_n_0;
  wire reqSeqbufBToSeqClear_to_memclk_reg_n_0;
  wire reqSeqbufBToSeqClear_to_memclkm1;
  wire reqSeqbufBToSeqClear_to_memclkm2;
  wire reqSeqbufMemtrackToHostif;
  wire restart_i_1__0_n_0;
  wire restart_reg_0;
  wire restart_reg_n_0;
  wire rng_reg_0;
  wire rng_reg_1;
  wire seqbufMemtrackToHostifAXIS_tready;
  wire seqbufMemtrackToHostifAXIS_tvalid;
  wire staFallingNotRising_i_1_n_0;
  wire staFallingNotRising_i_2_n_0;
  wire staFallingNotRising_reg_n_0;
  wire staTixVTrigger_i;
  wire \staTixVTrigger_i[0]_i_1_n_0 ;
  wire [1:0]staTixVTrigger_memclk;
  wire staTixVTrigger_memclk0;
  wire \staTixVTrigger_memclk[7]_i_2_n_0 ;
  wire \staTixVTrigger_memclk[7]_i_3_n_0 ;
  wire [7:2]staTixVTrigger_memclk__0;
  wire [7:0]\staTixVTrigger_reg[7]_0 ;
  wire \staTixVTrigger_reg_n_0_[0] ;
  wire \staTixVTrigger_reg_n_0_[1] ;
  wire \staTixVTrigger_reg_n_0_[2] ;
  wire \staTixVTrigger_reg_n_0_[3] ;
  wire \staTixVTrigger_reg_n_0_[4] ;
  wire \staTixVTrigger_reg_n_0_[5] ;
  wire \staTixVTrigger_reg_n_0_[6] ;
  wire \staTixVTrigger_reg_n_0_[7] ;
  wire staTixVTrigger_to_memclk;
  wire \staTixVTrigger_to_memclk[7]_i_2_n_0 ;
  wire \staTixVTrigger_to_memclk[7]_i_3_n_0 ;
  wire \staTixVTrigger_to_memclk[7]_i_4_n_0 ;
  wire \staTixVTrigger_to_memclk_reg_n_0_[0] ;
  wire \staTixVTrigger_to_memclk_reg_n_0_[1] ;
  wire \staTixVTrigger_to_memclk_reg_n_0_[2] ;
  wire \staTixVTrigger_to_memclk_reg_n_0_[3] ;
  wire \staTixVTrigger_to_memclk_reg_n_0_[4] ;
  wire \staTixVTrigger_to_memclk_reg_n_0_[5] ;
  wire \staTixVTrigger_to_memclk_reg_n_0_[6] ;
  wire \staTixVTrigger_to_memclk_reg_n_0_[7] ;
  wire [7:0]staTixVTrigger_to_memclkm1;
  wire [7:0]staTixVTrigger_to_memclkm2;
  wire start;
  wire [1:0]start_i;
  wire \start_i[0]_i_1_n_0 ;
  wire \start_i[1]_i_1_n_0 ;
  wire start_i_1_n_0;
  wire start_i_2_n_0;
  wire start_mclk;
  wire start_mclk_i_1_n_0;
  wire start_reg_0;
  wire start_to_mclk;
  wire start_to_mclk_i_1_n_0;
  wire start_to_mclkm1;
  wire start_to_mclkm2;
  wire [2:0]stateOp;
  wire \stateOp[0]_i_1__2_n_0 ;
  wire \stateOp[1]_i_1__2_n_0 ;
  wire \stateOp[2]_i_10__0_n_0 ;
  wire \stateOp[2]_i_11__0_n_0 ;
  wire \stateOp[2]_i_13__0_n_0 ;
  wire \stateOp[2]_i_14_n_0 ;
  wire \stateOp[2]_i_15__0_n_0 ;
  wire \stateOp[2]_i_16__0_n_0 ;
  wire \stateOp[2]_i_17__0_n_0 ;
  wire \stateOp[2]_i_18__0_n_0 ;
  wire \stateOp[2]_i_19__0_n_0 ;
  wire \stateOp[2]_i_1__0_n_0 ;
  wire \stateOp[2]_i_20__0_n_0 ;
  wire \stateOp[2]_i_21__0_n_0 ;
  wire \stateOp[2]_i_22__0_n_0 ;
  wire \stateOp[2]_i_23__0_n_0 ;
  wire \stateOp[2]_i_24__0_n_0 ;
  wire \stateOp[2]_i_25__0_n_0 ;
  wire \stateOp[2]_i_26__0_n_0 ;
  wire \stateOp[2]_i_27__0_n_0 ;
  wire \stateOp[2]_i_28__0_n_0 ;
  wire \stateOp[2]_i_29__0_n_0 ;
  wire \stateOp[2]_i_2__0_n_0 ;
  wire \stateOp[2]_i_30__0_n_0 ;
  wire \stateOp[2]_i_31__0_n_0 ;
  wire \stateOp[2]_i_32__0_n_0 ;
  wire \stateOp[2]_i_33__0_n_0 ;
  wire \stateOp[2]_i_34__0_n_0 ;
  wire \stateOp[2]_i_35__0_n_0 ;
  wire \stateOp[2]_i_36__0_n_0 ;
  wire \stateOp[2]_i_37__0_n_0 ;
  wire \stateOp[2]_i_38__0_n_0 ;
  wire \stateOp[2]_i_39__0_n_0 ;
  wire \stateOp[2]_i_3__0_n_0 ;
  wire \stateOp[2]_i_40__0_n_0 ;
  wire \stateOp[2]_i_41__0_n_0 ;
  wire \stateOp[2]_i_42__0_n_0 ;
  wire \stateOp[2]_i_43__0_n_0 ;
  wire \stateOp[2]_i_44__0_n_0 ;
  wire \stateOp[2]_i_45__0_n_0 ;
  wire \stateOp[2]_i_46__0_n_0 ;
  wire \stateOp[2]_i_47__0_n_0 ;
  wire \stateOp[2]_i_48__0_n_0 ;
  wire \stateOp[2]_i_49__0_n_0 ;
  wire \stateOp[2]_i_50__0_n_0 ;
  wire \stateOp[2]_i_51__0_n_0 ;
  wire \stateOp[2]_i_52__0_n_0 ;
  wire \stateOp[2]_i_53__0_n_0 ;
  wire \stateOp[2]_i_54__0_n_0 ;
  wire \stateOp[2]_i_55__0_n_0 ;
  wire \stateOp[2]_i_56__0_n_0 ;
  wire \stateOp[2]_i_57__0_n_0 ;
  wire \stateOp[2]_i_58_n_0 ;
  wire \stateOp[2]_i_5__0_n_0 ;
  wire \stateOp[2]_i_7_n_0 ;
  wire \stateOp[2]_i_8__0_n_0 ;
  wire \stateOp[2]_i_9_n_0 ;
  wire \stateOp_reg[2]_0 ;
  wire \stateOp_reg[2]_i_12_n_0 ;
  wire \stateOp_reg[2]_i_12_n_1 ;
  wire \stateOp_reg[2]_i_12_n_2 ;
  wire \stateOp_reg[2]_i_12_n_3 ;
  wire \stateOp_reg[2]_i_12_n_4 ;
  wire \stateOp_reg[2]_i_12_n_5 ;
  wire \stateOp_reg[2]_i_12_n_6 ;
  wire \stateOp_reg[2]_i_12_n_7 ;
  wire \stateOp_reg[2]_i_6_n_0 ;
  wire \stateOp_reg[2]_i_6_n_1 ;
  wire \stateOp_reg[2]_i_6_n_2 ;
  wire \stateOp_reg[2]_i_6_n_3 ;
  wire \stateOp_reg[2]_i_6_n_4 ;
  wire \stateOp_reg[2]_i_6_n_5 ;
  wire \stateOp_reg[2]_i_6_n_6 ;
  wire \stateOp_reg[2]_i_6_n_7 ;
  wire \stateSeqbufB[1]_i_2__0_n_0 ;
  wire \stateSeqbufB[2]_i_1__0_n_0 ;
  wire \stateSeqbufB[2]_i_3__0_n_0 ;
  wire \stateSeqbufB[2]_i_6_n_0 ;
  wire [2:0]stateSeqbufB_reg;
  wire stoFallingNotRising;
  wire stoFallingNotRising_i_1_n_0;
  wire stoFallingNotRising_i_2_n_0;
  wire [7:0]stoTixVTrigger;
  wire stoTixVTrigger_i;
  wire \stoTixVTrigger_i[0]_i_1_n_0 ;
  wire [1:0]stoTixVTrigger_memclk;
  wire stoTixVTrigger_memclk0;
  wire \stoTixVTrigger_memclk[7]_i_2_n_0 ;
  wire \stoTixVTrigger_memclk[7]_i_3_n_0 ;
  wire [7:2]stoTixVTrigger_memclk__0;
  wire stoTixVTrigger_to_memclk;
  wire \stoTixVTrigger_to_memclk[7]_i_2_n_0 ;
  wire \stoTixVTrigger_to_memclk[7]_i_3_n_0 ;
  wire \stoTixVTrigger_to_memclk[7]_i_4_n_0 ;
  wire \stoTixVTrigger_to_memclk_reg_n_0_[0] ;
  wire \stoTixVTrigger_to_memclk_reg_n_0_[1] ;
  wire \stoTixVTrigger_to_memclk_reg_n_0_[2] ;
  wire \stoTixVTrigger_to_memclk_reg_n_0_[3] ;
  wire \stoTixVTrigger_to_memclk_reg_n_0_[4] ;
  wire \stoTixVTrigger_to_memclk_reg_n_0_[5] ;
  wire \stoTixVTrigger_to_memclk_reg_n_0_[6] ;
  wire \stoTixVTrigger_to_memclk_reg_n_0_[7] ;
  wire [7:0]stoTixVTrigger_to_memclkm1;
  wire [7:0]stoTixVTrigger_to_memclkm2;
  wire stop;
  wire [1:0]stop_i;
  wire \stop_i[0]_i_1_n_0 ;
  wire \stop_i[1]_i_1_n_0 ;
  wire stop_i_1_n_0;
  wire stop_i_2_n_0;
  wire stop_lcl_i_1__0_n_0;
  wire stop_lcl_i_2__0_n_0;
  wire stop_lcl_reg_n_0;
  wire stop_mclk;
  wire stop_mclk_i_1_n_0;
  wire stop_reg_0;
  wire stop_to_mclk;
  wire stop_to_mclk_i_1_n_0;
  wire stop_to_mclkm1;
  wire stop_to_mclkm2;
  wire strbStart_i;
  wire \strbStart_i[0]_i_1_n_0 ;
  wire strbStart_memclk_i_1_n_0;
  wire strbStart_memclk_reg_n_0;
  wire strbStart_to_memclk;
  wire strbStart_to_memclk_i_1_n_0;
  wire strbStart_to_memclkm1;
  wire strbStart_to_memclkm2;
  wire strbStart_wait13_out;
  wire strbStart_wait_reg_n_0;
  wire strbStop_i;
  wire \strbStop_i[0]_i_1_n_0 ;
  wire strbStop_i_1__0_n_0;
  wire strbStop_i_2__0_n_0;
  wire strbStop_i_3__0_n_0;
  wire strbStop_memclk_i_1_n_0;
  wire strbStop_memclk_reg_n_0;
  wire strbStop_reg_n_0;
  wire strbStop_to_memclk;
  wire strbStop_to_memclk_i_1_n_0;
  wire strbStop_to_memclkm1;
  wire strbStop_to_memclkm2;
  wire strbStop_wait17_out;
  wire strbStop_wait_reg_n_0;
  wire strb_last_i_1_n_0;
  wire strb_last_i_2_n_0;
  wire strb_last_i_3_n_0;
  wire strb_last_reg_0;
  wire strb_last_reg_n_0;
  wire [7:3]\NLW_TCapt_i_reg[1]_i_2_CO_UNCONNECTED ;
  wire [7:0]\NLW_TCapt_i_reg[1]_i_2_O_UNCONNECTED ;
  wire [7:0]\NLW_TCapt_i_reg[1]_i_3_O_UNCONNECTED ;
  wire [7:6]\NLW_TCapt_reg[31]_i_2__0_CO_UNCONNECTED ;
  wire [7:7]\NLW_TCapt_reg[31]_i_2__0_O_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_reg[2]_i_12_O_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_reg[2]_i_6_O_UNCONNECTED ;

  LUT6 #(
    .INIT(64'h4444444444444447)) 
    \FSM_onehot_stateSeq[0]_i_1__0 
       (.I0(reqSeqbufBToSeqClear_memclk),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I2(TCapt),
        .I3(dneSeq),
        .I4(first),
        .I5(rdySeq),
        .O(\FSM_onehot_stateSeq[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2536" *) 
  LUT4 #(
    .INIT(16'hFEF0)) 
    \FSM_onehot_stateSeq[2]_i_1__0 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\FSM_onehot_stateSeq[3]_i_2__0_n_0 ),
        .I2(rdySeq),
        .I3(TCapt),
        .O(\FSM_onehot_stateSeq[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2536" *) 
  LUT3 #(
    .INIT(8'h10)) 
    \FSM_onehot_stateSeq[3]_i_1__0 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\FSM_onehot_stateSeq[3]_i_2__0_n_0 ),
        .I2(TCapt),
        .O(\FSM_onehot_stateSeq[3]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h11101111)) 
    \FSM_onehot_stateSeq[3]_i_2__0 
       (.I0(stop_lcl_reg_n_0),
        .I1(strbStop_memclk_reg_n_0),
        .I2(\i_reg_n_0_[0] ),
        .I3(\FSM_onehot_stateSeq[3]_i_3__0_n_0 ),
        .I4(\FSM_onehot_stateSeq[5]_i_8_n_0 ),
        .O(\FSM_onehot_stateSeq[3]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \FSM_onehot_stateSeq[3]_i_3__0 
       (.I0(stoTixVTrigger[0]),
        .I1(stoTixVTrigger[4]),
        .I2(stoTixVTrigger[2]),
        .I3(stoTixVTrigger[7]),
        .I4(\FSM_onehot_stateSeq[3]_i_4__0_n_0 ),
        .O(\FSM_onehot_stateSeq[3]_i_3__0_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \FSM_onehot_stateSeq[3]_i_4__0 
       (.I0(stoTixVTrigger[6]),
        .I1(stoTixVTrigger[5]),
        .I2(stoTixVTrigger[1]),
        .I3(stoTixVTrigger[3]),
        .O(\FSM_onehot_stateSeq[3]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFAAF3AAFFAAC0AA)) 
    \FSM_onehot_stateSeq[5]_i_1__0 
       (.I0(\FSM_onehot_stateSeq[5]_i_3__0_n_0 ),
        .I1(\FSM_onehot_stateSeq[5]_i_4__0_n_0 ),
        .I2(strbStart_memclk_reg_n_0),
        .I3(\FSM_onehot_stateSeq[5]_i_5__0_n_0 ),
        .I4(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I5(\FSM_onehot_stateSeq[5]_i_7__0_n_0 ),
        .O(\FSM_onehot_stateSeq[5]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2579" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \FSM_onehot_stateSeq[5]_i_2__0 
       (.I0(reqSeqbufBToSeqClear_memclk),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\FSM_onehot_stateSeq[5]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000000203030302)) 
    \FSM_onehot_stateSeq[5]_i_3__0 
       (.I0(\FSM_onehot_stateSeq[5]_i_8_n_0 ),
        .I1(dneSeq),
        .I2(TCapt),
        .I3(rdySeq),
        .I4(ackSeqbufBToSeqClear),
        .I5(reqSeqbufBToSeqClear_memclk),
        .O(\FSM_onehot_stateSeq[5]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2560" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \FSM_onehot_stateSeq[5]_i_4__0 
       (.I0(dneSeq),
        .I1(TCapt),
        .O(\FSM_onehot_stateSeq[5]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2579" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \FSM_onehot_stateSeq[5]_i_5__0 
       (.I0(ackSeqbufBToSeqClear),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\FSM_onehot_stateSeq[5]_i_5__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2521" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \FSM_onehot_stateSeq[5]_i_6__0 
       (.I0(dneSeq),
        .I1(rdySeq),
        .I2(ackSeqbufBToSeqClear),
        .O(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2532" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \FSM_onehot_stateSeq[5]_i_7__0 
       (.I0(reqSeqbufBToSeqClear_memclk),
        .I1(reqOpToSeqClear_memclk),
        .O(\FSM_onehot_stateSeq[5]_i_7__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2511" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \FSM_onehot_stateSeq[5]_i_8 
       (.I0(\aSeqbuf[9]_i_6__0_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[6] ),
        .I2(\aSeqbuf_reg_n_0_[7] ),
        .I3(\aSeqbuf_reg_n_0_[8] ),
        .I4(\aSeqbuf_reg_n_0_[9] ),
        .O(\FSM_onehot_stateSeq[5]_i_8_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDPE #(
    .INIT(1'b1)) 
    \FSM_onehot_stateSeq_reg[0] 
       (.C(memclk),
        .CE(\FSM_onehot_stateSeq[5]_i_1__0_n_0 ),
        .D(\FSM_onehot_stateSeq[0]_i_1__0_n_0 ),
        .PRE(AR),
        .Q(first));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[1] 
       (.C(memclk),
        .CE(\FSM_onehot_stateSeq[5]_i_1__0_n_0 ),
        .CLR(AR),
        .D(first),
        .Q(rdySeq));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[2] 
       (.C(memclk),
        .CE(\FSM_onehot_stateSeq[5]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\FSM_onehot_stateSeq[2]_i_1__0_n_0 ),
        .Q(TCapt));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[3] 
       (.C(memclk),
        .CE(\FSM_onehot_stateSeq[5]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\FSM_onehot_stateSeq[3]_i_1__0_n_0 ),
        .Q(dneSeq));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[4] 
       (.C(memclk),
        .CE(\FSM_onehot_stateSeq[5]_i_1__0_n_0 ),
        .CLR(AR),
        .D(dneSeq),
        .Q(\FSM_onehot_stateSeq_reg_n_0_[4] ));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[5] 
       (.C(memclk),
        .CE(\FSM_onehot_stateSeq[5]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\FSM_onehot_stateSeq[5]_i_2__0_n_0 ),
        .Q(ackSeqbufBToSeqClear));
  FDCE \TCaptMax_reg[0] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\TCaptMax_reg[7]_0 [0]),
        .Q(\TCaptMax_reg_n_0_[0] ));
  FDCE \TCaptMax_reg[10] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[2]),
        .Q(\TCaptMax_reg_n_0_[10] ));
  FDCE \TCaptMax_reg[11] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[3]),
        .Q(\TCaptMax_reg_n_0_[11] ));
  FDCE \TCaptMax_reg[12] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[4]),
        .Q(\TCaptMax_reg_n_0_[12] ));
  FDCE \TCaptMax_reg[13] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[5]),
        .Q(\TCaptMax_reg_n_0_[13] ));
  FDCE \TCaptMax_reg[14] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[6]),
        .Q(\TCaptMax_reg_n_0_[14] ));
  FDCE \TCaptMax_reg[15] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[7]),
        .Q(\TCaptMax_reg_n_0_[15] ));
  FDCE \TCaptMax_reg[16] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[8]),
        .Q(\TCaptMax_reg_n_0_[16] ));
  FDCE \TCaptMax_reg[17] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[9]),
        .Q(\TCaptMax_reg_n_0_[17] ));
  FDCE \TCaptMax_reg[18] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[10]),
        .Q(\TCaptMax_reg_n_0_[18] ));
  FDCE \TCaptMax_reg[19] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[11]),
        .Q(\TCaptMax_reg_n_0_[19] ));
  FDCE \TCaptMax_reg[1] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\TCaptMax_reg[7]_0 [1]),
        .Q(\TCaptMax_reg_n_0_[1] ));
  FDCE \TCaptMax_reg[20] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[12]),
        .Q(\TCaptMax_reg_n_0_[20] ));
  FDCE \TCaptMax_reg[21] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[13]),
        .Q(\TCaptMax_reg_n_0_[21] ));
  FDCE \TCaptMax_reg[22] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[14]),
        .Q(\TCaptMax_reg_n_0_[22] ));
  FDCE \TCaptMax_reg[23] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[15]),
        .Q(\TCaptMax_reg_n_0_[23] ));
  FDCE \TCaptMax_reg[24] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[16]),
        .Q(\TCaptMax_reg_n_0_[24] ));
  FDCE \TCaptMax_reg[25] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[17]),
        .Q(\TCaptMax_reg_n_0_[25] ));
  FDCE \TCaptMax_reg[26] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[18]),
        .Q(\TCaptMax_reg_n_0_[26] ));
  FDCE \TCaptMax_reg[27] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[19]),
        .Q(\TCaptMax_reg_n_0_[27] ));
  FDCE \TCaptMax_reg[28] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[20]),
        .Q(\TCaptMax_reg_n_0_[28] ));
  FDCE \TCaptMax_reg[29] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[21]),
        .Q(\TCaptMax_reg_n_0_[29] ));
  FDCE \TCaptMax_reg[2] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\TCaptMax_reg[7]_0 [2]),
        .Q(\TCaptMax_reg_n_0_[2] ));
  FDCE \TCaptMax_reg[30] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[22]),
        .Q(\TCaptMax_reg_n_0_[30] ));
  FDCE \TCaptMax_reg[31] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[23]),
        .Q(\TCaptMax_reg_n_0_[31] ));
  FDCE \TCaptMax_reg[3] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\TCaptMax_reg[7]_0 [3]),
        .Q(\TCaptMax_reg_n_0_[3] ));
  FDCE \TCaptMax_reg[4] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\TCaptMax_reg[7]_0 [4]),
        .Q(\TCaptMax_reg_n_0_[4] ));
  FDCE \TCaptMax_reg[5] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\TCaptMax_reg[7]_0 [5]),
        .Q(\TCaptMax_reg_n_0_[5] ));
  FDCE \TCaptMax_reg[6] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\TCaptMax_reg[7]_0 [6]),
        .Q(\TCaptMax_reg_n_0_[6] ));
  FDCE \TCaptMax_reg[7] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\TCaptMax_reg[7]_0 [7]),
        .Q(\TCaptMax_reg_n_0_[7] ));
  FDCE \TCaptMax_reg[8] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[0]),
        .Q(\TCaptMax_reg_n_0_[8] ));
  FDCE \TCaptMax_reg[9] 
       (.C(aclk_sig),
        .CE(\TCaptMax_reg[31]_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[1]),
        .Q(\TCaptMax_reg_n_0_[9] ));
  LUT2 #(
    .INIT(4'h1)) 
    \TCapt[0]_i_1__0 
       (.I0(\TCapt_reg_n_0_[0] ),
        .I1(first),
        .O(TCapt__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair2590" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[10]_i_1__0 
       (.I0(in15[10]),
        .I1(first),
        .O(TCapt__0[10]));
  (* SOFT_HLUTNM = "soft_lutpair2589" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[11]_i_1__0 
       (.I0(in15[11]),
        .I1(first),
        .O(TCapt__0[11]));
  (* SOFT_HLUTNM = "soft_lutpair2589" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[12]_i_1__0 
       (.I0(in15[12]),
        .I1(first),
        .O(TCapt__0[12]));
  (* SOFT_HLUTNM = "soft_lutpair2588" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[13]_i_1__0 
       (.I0(in15[13]),
        .I1(first),
        .O(TCapt__0[13]));
  (* SOFT_HLUTNM = "soft_lutpair2588" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[14]_i_1__0 
       (.I0(in15[14]),
        .I1(first),
        .O(TCapt__0[14]));
  (* SOFT_HLUTNM = "soft_lutpair2587" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[15]_i_1__0 
       (.I0(in15[15]),
        .I1(first),
        .O(TCapt__0[15]));
  (* SOFT_HLUTNM = "soft_lutpair2587" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[16]_i_1__0 
       (.I0(in15[16]),
        .I1(first),
        .O(TCapt__0[16]));
  (* SOFT_HLUTNM = "soft_lutpair2586" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[17]_i_1__0 
       (.I0(in15[17]),
        .I1(first),
        .O(TCapt__0[17]));
  (* SOFT_HLUTNM = "soft_lutpair2586" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[18]_i_1__0 
       (.I0(in15[18]),
        .I1(first),
        .O(TCapt__0[18]));
  (* SOFT_HLUTNM = "soft_lutpair2585" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[19]_i_1__0 
       (.I0(in15[19]),
        .I1(first),
        .O(TCapt__0[19]));
  (* SOFT_HLUTNM = "soft_lutpair2594" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[1]_i_1__0 
       (.I0(in15[1]),
        .I1(first),
        .O(TCapt__0[1]));
  (* SOFT_HLUTNM = "soft_lutpair2585" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[20]_i_1__0 
       (.I0(in15[20]),
        .I1(first),
        .O(TCapt__0[20]));
  (* SOFT_HLUTNM = "soft_lutpair2584" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[21]_i_1__0 
       (.I0(in15[21]),
        .I1(first),
        .O(TCapt__0[21]));
  (* SOFT_HLUTNM = "soft_lutpair2584" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[22]_i_1__0 
       (.I0(in15[22]),
        .I1(first),
        .O(TCapt__0[22]));
  (* SOFT_HLUTNM = "soft_lutpair2583" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[23]_i_1__0 
       (.I0(in15[23]),
        .I1(first),
        .O(TCapt__0[23]));
  (* SOFT_HLUTNM = "soft_lutpair2583" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[24]_i_1__0 
       (.I0(in15[24]),
        .I1(first),
        .O(TCapt__0[24]));
  (* SOFT_HLUTNM = "soft_lutpair2582" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[25]_i_1__0 
       (.I0(in15[25]),
        .I1(first),
        .O(TCapt__0[25]));
  (* SOFT_HLUTNM = "soft_lutpair2582" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[26]_i_1__0 
       (.I0(in15[26]),
        .I1(first),
        .O(TCapt__0[26]));
  (* SOFT_HLUTNM = "soft_lutpair2581" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[27]_i_1__0 
       (.I0(in15[27]),
        .I1(first),
        .O(TCapt__0[27]));
  (* SOFT_HLUTNM = "soft_lutpair2581" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[28]_i_1__0 
       (.I0(in15[28]),
        .I1(first),
        .O(TCapt__0[28]));
  (* SOFT_HLUTNM = "soft_lutpair2580" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[29]_i_1__0 
       (.I0(in15[29]),
        .I1(first),
        .O(TCapt__0[29]));
  (* SOFT_HLUTNM = "soft_lutpair2594" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[2]_i_1__0 
       (.I0(in15[2]),
        .I1(first),
        .O(TCapt__0[2]));
  (* SOFT_HLUTNM = "soft_lutpair2580" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[30]_i_1__0 
       (.I0(in15[30]),
        .I1(first),
        .O(TCapt__0[30]));
  (* SOFT_HLUTNM = "soft_lutpair2576" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[31]_i_1__0 
       (.I0(in15[31]),
        .I1(first),
        .O(TCapt__0[31]));
  (* SOFT_HLUTNM = "soft_lutpair2593" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[3]_i_1__0 
       (.I0(in15[3]),
        .I1(first),
        .O(TCapt__0[3]));
  (* SOFT_HLUTNM = "soft_lutpair2593" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[4]_i_1__0 
       (.I0(in15[4]),
        .I1(first),
        .O(TCapt__0[4]));
  (* SOFT_HLUTNM = "soft_lutpair2592" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[5]_i_1__0 
       (.I0(in15[5]),
        .I1(first),
        .O(TCapt__0[5]));
  (* SOFT_HLUTNM = "soft_lutpair2592" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[6]_i_1__0 
       (.I0(in15[6]),
        .I1(first),
        .O(TCapt__0[6]));
  (* SOFT_HLUTNM = "soft_lutpair2591" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[7]_i_1__0 
       (.I0(in15[7]),
        .I1(first),
        .O(TCapt__0[7]));
  (* SOFT_HLUTNM = "soft_lutpair2591" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[8]_i_1__0 
       (.I0(in15[8]),
        .I1(first),
        .O(TCapt__0[8]));
  (* SOFT_HLUTNM = "soft_lutpair2590" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[9]_i_1__0 
       (.I0(in15[9]),
        .I1(first),
        .O(TCapt__0[9]));
  (* SOFT_HLUTNM = "soft_lutpair2566" *) 
  LUT3 #(
    .INIT(8'h5D)) 
    \TCapt_i[0]_i_1 
       (.I0(TCapt_i[0]),
        .I1(TCapt_i[1]),
        .I2(\TCapt_i_reg[1]_i_2_n_5 ),
        .O(\TCapt_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2566" *) 
  LUT3 #(
    .INIT(8'h7C)) 
    \TCapt_i[1]_i_1 
       (.I0(\TCapt_i_reg[1]_i_2_n_5 ),
        .I1(TCapt_i[1]),
        .I2(TCapt_i[0]),
        .O(\TCapt_i[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_i[1]_i_10 
       (.I0(\TCapt_reg_n_0_[12] ),
        .I1(TCapt_to_mclk[12]),
        .I2(\TCapt_reg_n_0_[13] ),
        .I3(TCapt_to_mclk[13]),
        .I4(TCapt_to_mclk[14]),
        .I5(\TCapt_reg_n_0_[14] ),
        .O(\TCapt_i[1]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_i[1]_i_11 
       (.I0(\TCapt_reg_n_0_[10] ),
        .I1(TCapt_to_mclk[10]),
        .I2(\TCapt_reg_n_0_[9] ),
        .I3(TCapt_to_mclk[9]),
        .I4(TCapt_to_mclk[11]),
        .I5(\TCapt_reg_n_0_[11] ),
        .O(\TCapt_i[1]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_i[1]_i_12 
       (.I0(\TCapt_reg_n_0_[7] ),
        .I1(TCapt_to_mclk[7]),
        .I2(\TCapt_reg_n_0_[6] ),
        .I3(TCapt_to_mclk[6]),
        .I4(TCapt_to_mclk[8]),
        .I5(\TCapt_reg_n_0_[8] ),
        .O(\TCapt_i[1]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_i[1]_i_13 
       (.I0(\TCapt_reg_n_0_[5] ),
        .I1(TCapt_to_mclk[5]),
        .I2(\TCapt_reg_n_0_[3] ),
        .I3(TCapt_to_mclk[3]),
        .I4(TCapt_to_mclk[4]),
        .I5(\TCapt_reg_n_0_[4] ),
        .O(\TCapt_i[1]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_i[1]_i_14 
       (.I0(\TCapt_reg_n_0_[1] ),
        .I1(TCapt_to_mclk[1]),
        .I2(\TCapt_reg_n_0_[0] ),
        .I3(TCapt_to_mclk[0]),
        .I4(TCapt_to_mclk[2]),
        .I5(\TCapt_reg_n_0_[2] ),
        .O(\TCapt_i[1]_i_14_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \TCapt_i[1]_i_4 
       (.I0(TCapt_to_mclk[31]),
        .I1(\TCapt_reg_n_0_[31] ),
        .I2(TCapt_to_mclk[30]),
        .I3(\TCapt_reg_n_0_[30] ),
        .O(\TCapt_i[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_i[1]_i_5 
       (.I0(\TCapt_reg_n_0_[27] ),
        .I1(TCapt_to_mclk[27]),
        .I2(\TCapt_reg_n_0_[28] ),
        .I3(TCapt_to_mclk[28]),
        .I4(TCapt_to_mclk[29]),
        .I5(\TCapt_reg_n_0_[29] ),
        .O(\TCapt_i[1]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_i[1]_i_6 
       (.I0(\TCapt_reg_n_0_[24] ),
        .I1(TCapt_to_mclk[24]),
        .I2(\TCapt_reg_n_0_[25] ),
        .I3(TCapt_to_mclk[25]),
        .I4(TCapt_to_mclk[26]),
        .I5(\TCapt_reg_n_0_[26] ),
        .O(\TCapt_i[1]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_i[1]_i_7 
       (.I0(\TCapt_reg_n_0_[23] ),
        .I1(TCapt_to_mclk[23]),
        .I2(\TCapt_reg_n_0_[21] ),
        .I3(TCapt_to_mclk[21]),
        .I4(TCapt_to_mclk[22]),
        .I5(\TCapt_reg_n_0_[22] ),
        .O(\TCapt_i[1]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_i[1]_i_8 
       (.I0(\TCapt_reg_n_0_[18] ),
        .I1(TCapt_to_mclk[18]),
        .I2(\TCapt_reg_n_0_[19] ),
        .I3(TCapt_to_mclk[19]),
        .I4(TCapt_to_mclk[20]),
        .I5(\TCapt_reg_n_0_[20] ),
        .O(\TCapt_i[1]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_i[1]_i_9 
       (.I0(\TCapt_reg_n_0_[15] ),
        .I1(TCapt_to_mclk[15]),
        .I2(\TCapt_reg_n_0_[16] ),
        .I3(TCapt_to_mclk[16]),
        .I4(TCapt_to_mclk[17]),
        .I5(\TCapt_reg_n_0_[17] ),
        .O(\TCapt_i[1]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \TCapt_i_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\TCapt_i[0]_i_1_n_0 ),
        .Q(TCapt_i[0]));
  FDCE #(
    .INIT(1'b0)) 
    \TCapt_i_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\TCapt_i[1]_i_1_n_0 ),
        .Q(TCapt_i[1]));
  CARRY8 \TCapt_i_reg[1]_i_2 
       (.CI(\TCapt_i_reg[1]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_TCapt_i_reg[1]_i_2_CO_UNCONNECTED [7:3],\TCapt_i_reg[1]_i_2_n_5 ,\TCapt_i_reg[1]_i_2_n_6 ,\TCapt_i_reg[1]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,1'b1,1'b1}),
        .O(\NLW_TCapt_i_reg[1]_i_2_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,\TCapt_i[1]_i_4_n_0 ,\TCapt_i[1]_i_5_n_0 ,\TCapt_i[1]_i_6_n_0 }));
  CARRY8 \TCapt_i_reg[1]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\TCapt_i_reg[1]_i_3_n_0 ,\TCapt_i_reg[1]_i_3_n_1 ,\TCapt_i_reg[1]_i_3_n_2 ,\TCapt_i_reg[1]_i_3_n_3 ,\TCapt_i_reg[1]_i_3_n_4 ,\TCapt_i_reg[1]_i_3_n_5 ,\TCapt_i_reg[1]_i_3_n_6 ,\TCapt_i_reg[1]_i_3_n_7 }),
        .DI({1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1}),
        .O(\NLW_TCapt_i_reg[1]_i_3_O_UNCONNECTED [7:0]),
        .S({\TCapt_i[1]_i_7_n_0 ,\TCapt_i[1]_i_8_n_0 ,\TCapt_i[1]_i_9_n_0 ,\TCapt_i[1]_i_10_n_0 ,\TCapt_i[1]_i_11_n_0 ,\TCapt_i[1]_i_12_n_0 ,\TCapt_i[1]_i_13_n_0 ,\TCapt_i[1]_i_14_n_0 }));
  LUT4 #(
    .INIT(16'h8000)) 
    \TCapt_mclk[31]_i_1 
       (.I0(\TCapt_mclk[31]_i_2_n_0 ),
        .I1(\TCapt_mclk[31]_i_3_n_0 ),
        .I2(\TCapt_mclk[31]_i_4_n_0 ),
        .I3(\TCapt_mclk[31]_i_5_n_0 ),
        .O(\TCapt_mclk[31]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_mclk[31]_i_10 
       (.I0(TCapt_to_mclkm1[12]),
        .I1(TCapt_to_mclkm2[12]),
        .I2(TCapt_to_mclkm2[14]),
        .I3(TCapt_to_mclkm1[14]),
        .I4(TCapt_to_mclkm2[13]),
        .I5(TCapt_to_mclkm1[13]),
        .O(\TCapt_mclk[31]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_mclk[31]_i_11 
       (.I0(TCapt_to_mclkm1[15]),
        .I1(TCapt_to_mclkm2[15]),
        .I2(TCapt_to_mclkm2[17]),
        .I3(TCapt_to_mclkm1[17]),
        .I4(TCapt_to_mclkm2[16]),
        .I5(TCapt_to_mclkm1[16]),
        .O(\TCapt_mclk[31]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_mclk[31]_i_12 
       (.I0(TCapt_to_mclkm1[3]),
        .I1(TCapt_to_mclkm2[3]),
        .I2(TCapt_to_mclkm2[5]),
        .I3(TCapt_to_mclkm1[5]),
        .I4(TCapt_to_mclkm2[4]),
        .I5(TCapt_to_mclkm1[4]),
        .O(\TCapt_mclk[31]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_mclk[31]_i_13 
       (.I0(TCapt_to_mclkm1[0]),
        .I1(TCapt_to_mclkm2[0]),
        .I2(TCapt_to_mclkm2[2]),
        .I3(TCapt_to_mclkm1[2]),
        .I4(TCapt_to_mclkm2[1]),
        .I5(TCapt_to_mclkm1[1]),
        .O(\TCapt_mclk[31]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_mclk[31]_i_2 
       (.I0(TCapt_to_mclkm1[27]),
        .I1(TCapt_to_mclkm2[27]),
        .I2(TCapt_to_mclkm2[29]),
        .I3(TCapt_to_mclkm1[29]),
        .I4(TCapt_to_mclkm2[28]),
        .I5(TCapt_to_mclkm1[28]),
        .O(\TCapt_mclk[31]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_mclk[31]_i_3 
       (.I0(TCapt_to_mclkm1[24]),
        .I1(TCapt_to_mclkm2[24]),
        .I2(TCapt_to_mclkm2[26]),
        .I3(TCapt_to_mclkm1[26]),
        .I4(TCapt_to_mclkm2[25]),
        .I5(TCapt_to_mclkm1[25]),
        .O(\TCapt_mclk[31]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \TCapt_mclk[31]_i_4 
       (.I0(\TCapt_mclk[31]_i_6_n_0 ),
        .I1(\TCapt_mclk[31]_i_7_n_0 ),
        .I2(\TCapt_mclk[31]_i_8_n_0 ),
        .I3(\TCapt_mclk[31]_i_9_n_0 ),
        .I4(\TCapt_mclk[31]_i_10_n_0 ),
        .I5(\TCapt_mclk[31]_i_11_n_0 ),
        .O(\TCapt_mclk[31]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000000000)) 
    \TCapt_mclk[31]_i_5 
       (.I0(TCapt_to_mclkm2[31]),
        .I1(TCapt_to_mclkm1[31]),
        .I2(TCapt_to_mclkm2[30]),
        .I3(TCapt_to_mclkm1[30]),
        .I4(\TCapt_mclk[31]_i_12_n_0 ),
        .I5(\TCapt_mclk[31]_i_13_n_0 ),
        .O(\TCapt_mclk[31]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_mclk[31]_i_6 
       (.I0(TCapt_to_mclkm1[9]),
        .I1(TCapt_to_mclkm2[9]),
        .I2(TCapt_to_mclkm2[11]),
        .I3(TCapt_to_mclkm1[11]),
        .I4(TCapt_to_mclkm2[10]),
        .I5(TCapt_to_mclkm1[10]),
        .O(\TCapt_mclk[31]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_mclk[31]_i_7 
       (.I0(TCapt_to_mclkm1[6]),
        .I1(TCapt_to_mclkm2[6]),
        .I2(TCapt_to_mclkm2[8]),
        .I3(TCapt_to_mclkm1[8]),
        .I4(TCapt_to_mclkm2[7]),
        .I5(TCapt_to_mclkm1[7]),
        .O(\TCapt_mclk[31]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_mclk[31]_i_8 
       (.I0(TCapt_to_mclkm1[18]),
        .I1(TCapt_to_mclkm2[18]),
        .I2(TCapt_to_mclkm2[20]),
        .I3(TCapt_to_mclkm1[20]),
        .I4(TCapt_to_mclkm2[19]),
        .I5(TCapt_to_mclkm1[19]),
        .O(\TCapt_mclk[31]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \TCapt_mclk[31]_i_9 
       (.I0(TCapt_to_mclkm1[21]),
        .I1(TCapt_to_mclkm2[21]),
        .I2(TCapt_to_mclkm2[23]),
        .I3(TCapt_to_mclkm1[23]),
        .I4(TCapt_to_mclkm2[22]),
        .I5(TCapt_to_mclkm1[22]),
        .O(\TCapt_mclk[31]_i_9_n_0 ));
  FDCE \TCapt_mclk_reg[0] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[0]),
        .Q(Q[0]));
  FDCE \TCapt_mclk_reg[10] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[10]),
        .Q(Q[10]));
  FDCE \TCapt_mclk_reg[11] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[11]),
        .Q(Q[11]));
  FDCE \TCapt_mclk_reg[12] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[12]),
        .Q(Q[12]));
  FDCE \TCapt_mclk_reg[13] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[13]),
        .Q(Q[13]));
  FDCE \TCapt_mclk_reg[14] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[14]),
        .Q(Q[14]));
  FDCE \TCapt_mclk_reg[15] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[15]),
        .Q(Q[15]));
  FDCE \TCapt_mclk_reg[16] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[16]),
        .Q(Q[16]));
  FDCE \TCapt_mclk_reg[17] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[17]),
        .Q(Q[17]));
  FDCE \TCapt_mclk_reg[18] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[18]),
        .Q(Q[18]));
  FDCE \TCapt_mclk_reg[19] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[19]),
        .Q(Q[19]));
  FDCE \TCapt_mclk_reg[1] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[1]),
        .Q(Q[1]));
  FDCE \TCapt_mclk_reg[20] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[20]),
        .Q(Q[20]));
  FDCE \TCapt_mclk_reg[21] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[21]),
        .Q(Q[21]));
  FDCE \TCapt_mclk_reg[22] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[22]),
        .Q(Q[22]));
  FDCE \TCapt_mclk_reg[23] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[23]),
        .Q(Q[23]));
  FDCE \TCapt_mclk_reg[24] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[24]),
        .Q(Q[24]));
  FDCE \TCapt_mclk_reg[25] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[25]),
        .Q(Q[25]));
  FDCE \TCapt_mclk_reg[26] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[26]),
        .Q(Q[26]));
  FDCE \TCapt_mclk_reg[27] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[27]),
        .Q(Q[27]));
  FDCE \TCapt_mclk_reg[28] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[28]),
        .Q(Q[28]));
  FDCE \TCapt_mclk_reg[29] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[29]),
        .Q(Q[29]));
  FDCE \TCapt_mclk_reg[2] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[2]),
        .Q(Q[2]));
  FDCE \TCapt_mclk_reg[30] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[30]),
        .Q(Q[30]));
  FDCE \TCapt_mclk_reg[31] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[31]),
        .Q(Q[31]));
  FDCE \TCapt_mclk_reg[3] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[3]),
        .Q(Q[3]));
  FDCE \TCapt_mclk_reg[4] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[4]),
        .Q(Q[4]));
  FDCE \TCapt_mclk_reg[5] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[5]),
        .Q(Q[5]));
  FDCE \TCapt_mclk_reg[6] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[6]),
        .Q(Q[6]));
  FDCE \TCapt_mclk_reg[7] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[7]),
        .Q(Q[7]));
  FDCE \TCapt_mclk_reg[8] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[8]),
        .Q(Q[8]));
  FDCE \TCapt_mclk_reg[9] 
       (.C(aclk_sig),
        .CE(\TCapt_mclk[31]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm2[9]),
        .Q(Q[9]));
  FDCE \TCapt_reg[0] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[0]),
        .Q(\TCapt_reg_n_0_[0] ));
  FDCE \TCapt_reg[10] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[10]),
        .Q(\TCapt_reg_n_0_[10] ));
  FDCE \TCapt_reg[11] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[11]),
        .Q(\TCapt_reg_n_0_[11] ));
  FDCE \TCapt_reg[12] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[12]),
        .Q(\TCapt_reg_n_0_[12] ));
  FDCE \TCapt_reg[13] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[13]),
        .Q(\TCapt_reg_n_0_[13] ));
  FDCE \TCapt_reg[14] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[14]),
        .Q(\TCapt_reg_n_0_[14] ));
  FDCE \TCapt_reg[15] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[15]),
        .Q(\TCapt_reg_n_0_[15] ));
  FDCE \TCapt_reg[16] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[16]),
        .Q(\TCapt_reg_n_0_[16] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \TCapt_reg[16]_i_2__0 
       (.CI(\TCapt_reg[8]_i_2__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\TCapt_reg[16]_i_2__0_n_0 ,\TCapt_reg[16]_i_2__0_n_1 ,\TCapt_reg[16]_i_2__0_n_2 ,\TCapt_reg[16]_i_2__0_n_3 ,\TCapt_reg[16]_i_2__0_n_4 ,\TCapt_reg[16]_i_2__0_n_5 ,\TCapt_reg[16]_i_2__0_n_6 ,\TCapt_reg[16]_i_2__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in15[16:9]),
        .S({\TCapt_reg_n_0_[16] ,\TCapt_reg_n_0_[15] ,\TCapt_reg_n_0_[14] ,\TCapt_reg_n_0_[13] ,\TCapt_reg_n_0_[12] ,\TCapt_reg_n_0_[11] ,\TCapt_reg_n_0_[10] ,\TCapt_reg_n_0_[9] }));
  FDCE \TCapt_reg[17] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[17]),
        .Q(\TCapt_reg_n_0_[17] ));
  FDCE \TCapt_reg[18] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[18]),
        .Q(\TCapt_reg_n_0_[18] ));
  FDCE \TCapt_reg[19] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[19]),
        .Q(\TCapt_reg_n_0_[19] ));
  FDCE \TCapt_reg[1] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[1]),
        .Q(\TCapt_reg_n_0_[1] ));
  FDCE \TCapt_reg[20] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[20]),
        .Q(\TCapt_reg_n_0_[20] ));
  FDCE \TCapt_reg[21] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[21]),
        .Q(\TCapt_reg_n_0_[21] ));
  FDCE \TCapt_reg[22] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[22]),
        .Q(\TCapt_reg_n_0_[22] ));
  FDCE \TCapt_reg[23] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[23]),
        .Q(\TCapt_reg_n_0_[23] ));
  FDCE \TCapt_reg[24] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[24]),
        .Q(\TCapt_reg_n_0_[24] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \TCapt_reg[24]_i_2__0 
       (.CI(\TCapt_reg[16]_i_2__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\TCapt_reg[24]_i_2__0_n_0 ,\TCapt_reg[24]_i_2__0_n_1 ,\TCapt_reg[24]_i_2__0_n_2 ,\TCapt_reg[24]_i_2__0_n_3 ,\TCapt_reg[24]_i_2__0_n_4 ,\TCapt_reg[24]_i_2__0_n_5 ,\TCapt_reg[24]_i_2__0_n_6 ,\TCapt_reg[24]_i_2__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in15[24:17]),
        .S({\TCapt_reg_n_0_[24] ,\TCapt_reg_n_0_[23] ,\TCapt_reg_n_0_[22] ,\TCapt_reg_n_0_[21] ,\TCapt_reg_n_0_[20] ,\TCapt_reg_n_0_[19] ,\TCapt_reg_n_0_[18] ,\TCapt_reg_n_0_[17] }));
  FDCE \TCapt_reg[25] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[25]),
        .Q(\TCapt_reg_n_0_[25] ));
  FDCE \TCapt_reg[26] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[26]),
        .Q(\TCapt_reg_n_0_[26] ));
  FDCE \TCapt_reg[27] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[27]),
        .Q(\TCapt_reg_n_0_[27] ));
  FDCE \TCapt_reg[28] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[28]),
        .Q(\TCapt_reg_n_0_[28] ));
  FDCE \TCapt_reg[29] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[29]),
        .Q(\TCapt_reg_n_0_[29] ));
  FDCE \TCapt_reg[2] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[2]),
        .Q(\TCapt_reg_n_0_[2] ));
  FDCE \TCapt_reg[30] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[30]),
        .Q(\TCapt_reg_n_0_[30] ));
  FDCE \TCapt_reg[31] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[31]),
        .Q(\TCapt_reg_n_0_[31] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \TCapt_reg[31]_i_2__0 
       (.CI(\TCapt_reg[24]_i_2__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_TCapt_reg[31]_i_2__0_CO_UNCONNECTED [7:6],\TCapt_reg[31]_i_2__0_n_2 ,\TCapt_reg[31]_i_2__0_n_3 ,\TCapt_reg[31]_i_2__0_n_4 ,\TCapt_reg[31]_i_2__0_n_5 ,\TCapt_reg[31]_i_2__0_n_6 ,\TCapt_reg[31]_i_2__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_TCapt_reg[31]_i_2__0_O_UNCONNECTED [7],in15[31:25]}),
        .S({1'b0,\TCapt_reg_n_0_[31] ,\TCapt_reg_n_0_[30] ,\TCapt_reg_n_0_[29] ,\TCapt_reg_n_0_[28] ,\TCapt_reg_n_0_[27] ,\TCapt_reg_n_0_[26] ,\TCapt_reg_n_0_[25] }));
  FDCE \TCapt_reg[3] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[3]),
        .Q(\TCapt_reg_n_0_[3] ));
  FDCE \TCapt_reg[4] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[4]),
        .Q(\TCapt_reg_n_0_[4] ));
  FDCE \TCapt_reg[5] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[5]),
        .Q(\TCapt_reg_n_0_[5] ));
  FDCE \TCapt_reg[6] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[6]),
        .Q(\TCapt_reg_n_0_[6] ));
  FDCE \TCapt_reg[7] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[7]),
        .Q(\TCapt_reg_n_0_[7] ));
  FDCE \TCapt_reg[8] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[8]),
        .Q(\TCapt_reg_n_0_[8] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \TCapt_reg[8]_i_2__0 
       (.CI(\TCapt_reg_n_0_[0] ),
        .CI_TOP(1'b0),
        .CO({\TCapt_reg[8]_i_2__0_n_0 ,\TCapt_reg[8]_i_2__0_n_1 ,\TCapt_reg[8]_i_2__0_n_2 ,\TCapt_reg[8]_i_2__0_n_3 ,\TCapt_reg[8]_i_2__0_n_4 ,\TCapt_reg[8]_i_2__0_n_5 ,\TCapt_reg[8]_i_2__0_n_6 ,\TCapt_reg[8]_i_2__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in15[8:1]),
        .S({\TCapt_reg_n_0_[8] ,\TCapt_reg_n_0_[7] ,\TCapt_reg_n_0_[6] ,\TCapt_reg_n_0_[5] ,\TCapt_reg_n_0_[4] ,\TCapt_reg_n_0_[3] ,\TCapt_reg_n_0_[2] ,\TCapt_reg_n_0_[1] }));
  FDCE \TCapt_reg[9] 
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(TCapt__0[9]),
        .Q(\TCapt_reg_n_0_[9] ));
  LUT3 #(
    .INIT(8'h80)) 
    \TCapt_to_mclk[31]_i_1 
       (.I0(TCapt_i[1]),
        .I1(\TCapt_i_reg[1]_i_2_n_5 ),
        .I2(TCapt_i[0]),
        .O(\TCapt_to_mclk[31]_i_1_n_0 ));
  FDCE \TCapt_to_mclk_reg[0] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[0] ),
        .Q(TCapt_to_mclk[0]));
  FDCE \TCapt_to_mclk_reg[10] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[10] ),
        .Q(TCapt_to_mclk[10]));
  FDCE \TCapt_to_mclk_reg[11] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[11] ),
        .Q(TCapt_to_mclk[11]));
  FDCE \TCapt_to_mclk_reg[12] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[12] ),
        .Q(TCapt_to_mclk[12]));
  FDCE \TCapt_to_mclk_reg[13] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[13] ),
        .Q(TCapt_to_mclk[13]));
  FDCE \TCapt_to_mclk_reg[14] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[14] ),
        .Q(TCapt_to_mclk[14]));
  FDCE \TCapt_to_mclk_reg[15] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[15] ),
        .Q(TCapt_to_mclk[15]));
  FDCE \TCapt_to_mclk_reg[16] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[16] ),
        .Q(TCapt_to_mclk[16]));
  FDCE \TCapt_to_mclk_reg[17] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[17] ),
        .Q(TCapt_to_mclk[17]));
  FDCE \TCapt_to_mclk_reg[18] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[18] ),
        .Q(TCapt_to_mclk[18]));
  FDCE \TCapt_to_mclk_reg[19] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[19] ),
        .Q(TCapt_to_mclk[19]));
  FDCE \TCapt_to_mclk_reg[1] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[1] ),
        .Q(TCapt_to_mclk[1]));
  FDCE \TCapt_to_mclk_reg[20] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[20] ),
        .Q(TCapt_to_mclk[20]));
  FDCE \TCapt_to_mclk_reg[21] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[21] ),
        .Q(TCapt_to_mclk[21]));
  FDCE \TCapt_to_mclk_reg[22] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[22] ),
        .Q(TCapt_to_mclk[22]));
  FDCE \TCapt_to_mclk_reg[23] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[23] ),
        .Q(TCapt_to_mclk[23]));
  FDCE \TCapt_to_mclk_reg[24] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[24] ),
        .Q(TCapt_to_mclk[24]));
  FDCE \TCapt_to_mclk_reg[25] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[25] ),
        .Q(TCapt_to_mclk[25]));
  FDCE \TCapt_to_mclk_reg[26] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[26] ),
        .Q(TCapt_to_mclk[26]));
  FDCE \TCapt_to_mclk_reg[27] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[27] ),
        .Q(TCapt_to_mclk[27]));
  FDCE \TCapt_to_mclk_reg[28] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[28] ),
        .Q(TCapt_to_mclk[28]));
  FDCE \TCapt_to_mclk_reg[29] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[29] ),
        .Q(TCapt_to_mclk[29]));
  FDCE \TCapt_to_mclk_reg[2] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[2] ),
        .Q(TCapt_to_mclk[2]));
  FDCE \TCapt_to_mclk_reg[30] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[30] ),
        .Q(TCapt_to_mclk[30]));
  FDCE \TCapt_to_mclk_reg[31] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[31] ),
        .Q(TCapt_to_mclk[31]));
  FDCE \TCapt_to_mclk_reg[3] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[3] ),
        .Q(TCapt_to_mclk[3]));
  FDCE \TCapt_to_mclk_reg[4] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[4] ),
        .Q(TCapt_to_mclk[4]));
  FDCE \TCapt_to_mclk_reg[5] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[5] ),
        .Q(TCapt_to_mclk[5]));
  FDCE \TCapt_to_mclk_reg[6] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[6] ),
        .Q(TCapt_to_mclk[6]));
  FDCE \TCapt_to_mclk_reg[7] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[7] ),
        .Q(TCapt_to_mclk[7]));
  FDCE \TCapt_to_mclk_reg[8] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[8] ),
        .Q(TCapt_to_mclk[8]));
  FDCE \TCapt_to_mclk_reg[9] 
       (.C(memclk),
        .CE(\TCapt_to_mclk[31]_i_1_n_0 ),
        .CLR(AR),
        .D(\TCapt_reg_n_0_[9] ),
        .Q(TCapt_to_mclk[9]));
  FDCE \TCapt_to_mclkm1_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[0]),
        .Q(TCapt_to_mclkm1[0]));
  FDCE \TCapt_to_mclkm1_reg[10] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[10]),
        .Q(TCapt_to_mclkm1[10]));
  FDCE \TCapt_to_mclkm1_reg[11] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[11]),
        .Q(TCapt_to_mclkm1[11]));
  FDCE \TCapt_to_mclkm1_reg[12] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[12]),
        .Q(TCapt_to_mclkm1[12]));
  FDCE \TCapt_to_mclkm1_reg[13] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[13]),
        .Q(TCapt_to_mclkm1[13]));
  FDCE \TCapt_to_mclkm1_reg[14] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[14]),
        .Q(TCapt_to_mclkm1[14]));
  FDCE \TCapt_to_mclkm1_reg[15] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[15]),
        .Q(TCapt_to_mclkm1[15]));
  FDCE \TCapt_to_mclkm1_reg[16] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[16]),
        .Q(TCapt_to_mclkm1[16]));
  FDCE \TCapt_to_mclkm1_reg[17] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[17]),
        .Q(TCapt_to_mclkm1[17]));
  FDCE \TCapt_to_mclkm1_reg[18] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[18]),
        .Q(TCapt_to_mclkm1[18]));
  FDCE \TCapt_to_mclkm1_reg[19] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[19]),
        .Q(TCapt_to_mclkm1[19]));
  FDCE \TCapt_to_mclkm1_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[1]),
        .Q(TCapt_to_mclkm1[1]));
  FDCE \TCapt_to_mclkm1_reg[20] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[20]),
        .Q(TCapt_to_mclkm1[20]));
  FDCE \TCapt_to_mclkm1_reg[21] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[21]),
        .Q(TCapt_to_mclkm1[21]));
  FDCE \TCapt_to_mclkm1_reg[22] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[22]),
        .Q(TCapt_to_mclkm1[22]));
  FDCE \TCapt_to_mclkm1_reg[23] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[23]),
        .Q(TCapt_to_mclkm1[23]));
  FDCE \TCapt_to_mclkm1_reg[24] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[24]),
        .Q(TCapt_to_mclkm1[24]));
  FDCE \TCapt_to_mclkm1_reg[25] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[25]),
        .Q(TCapt_to_mclkm1[25]));
  FDCE \TCapt_to_mclkm1_reg[26] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[26]),
        .Q(TCapt_to_mclkm1[26]));
  FDCE \TCapt_to_mclkm1_reg[27] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[27]),
        .Q(TCapt_to_mclkm1[27]));
  FDCE \TCapt_to_mclkm1_reg[28] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[28]),
        .Q(TCapt_to_mclkm1[28]));
  FDCE \TCapt_to_mclkm1_reg[29] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[29]),
        .Q(TCapt_to_mclkm1[29]));
  FDCE \TCapt_to_mclkm1_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[2]),
        .Q(TCapt_to_mclkm1[2]));
  FDCE \TCapt_to_mclkm1_reg[30] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[30]),
        .Q(TCapt_to_mclkm1[30]));
  FDCE \TCapt_to_mclkm1_reg[31] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[31]),
        .Q(TCapt_to_mclkm1[31]));
  FDCE \TCapt_to_mclkm1_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[3]),
        .Q(TCapt_to_mclkm1[3]));
  FDCE \TCapt_to_mclkm1_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[4]),
        .Q(TCapt_to_mclkm1[4]));
  FDCE \TCapt_to_mclkm1_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[5]),
        .Q(TCapt_to_mclkm1[5]));
  FDCE \TCapt_to_mclkm1_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[6]),
        .Q(TCapt_to_mclkm1[6]));
  FDCE \TCapt_to_mclkm1_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[7]),
        .Q(TCapt_to_mclkm1[7]));
  FDCE \TCapt_to_mclkm1_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[8]),
        .Q(TCapt_to_mclkm1[8]));
  FDCE \TCapt_to_mclkm1_reg[9] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclk[9]),
        .Q(TCapt_to_mclkm1[9]));
  FDCE \TCapt_to_mclkm2_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[0]),
        .Q(TCapt_to_mclkm2[0]));
  FDCE \TCapt_to_mclkm2_reg[10] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[10]),
        .Q(TCapt_to_mclkm2[10]));
  FDCE \TCapt_to_mclkm2_reg[11] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[11]),
        .Q(TCapt_to_mclkm2[11]));
  FDCE \TCapt_to_mclkm2_reg[12] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[12]),
        .Q(TCapt_to_mclkm2[12]));
  FDCE \TCapt_to_mclkm2_reg[13] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[13]),
        .Q(TCapt_to_mclkm2[13]));
  FDCE \TCapt_to_mclkm2_reg[14] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[14]),
        .Q(TCapt_to_mclkm2[14]));
  FDCE \TCapt_to_mclkm2_reg[15] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[15]),
        .Q(TCapt_to_mclkm2[15]));
  FDCE \TCapt_to_mclkm2_reg[16] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[16]),
        .Q(TCapt_to_mclkm2[16]));
  FDCE \TCapt_to_mclkm2_reg[17] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[17]),
        .Q(TCapt_to_mclkm2[17]));
  FDCE \TCapt_to_mclkm2_reg[18] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[18]),
        .Q(TCapt_to_mclkm2[18]));
  FDCE \TCapt_to_mclkm2_reg[19] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[19]),
        .Q(TCapt_to_mclkm2[19]));
  FDCE \TCapt_to_mclkm2_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[1]),
        .Q(TCapt_to_mclkm2[1]));
  FDCE \TCapt_to_mclkm2_reg[20] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[20]),
        .Q(TCapt_to_mclkm2[20]));
  FDCE \TCapt_to_mclkm2_reg[21] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[21]),
        .Q(TCapt_to_mclkm2[21]));
  FDCE \TCapt_to_mclkm2_reg[22] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[22]),
        .Q(TCapt_to_mclkm2[22]));
  FDCE \TCapt_to_mclkm2_reg[23] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[23]),
        .Q(TCapt_to_mclkm2[23]));
  FDCE \TCapt_to_mclkm2_reg[24] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[24]),
        .Q(TCapt_to_mclkm2[24]));
  FDCE \TCapt_to_mclkm2_reg[25] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[25]),
        .Q(TCapt_to_mclkm2[25]));
  FDCE \TCapt_to_mclkm2_reg[26] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[26]),
        .Q(TCapt_to_mclkm2[26]));
  FDCE \TCapt_to_mclkm2_reg[27] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[27]),
        .Q(TCapt_to_mclkm2[27]));
  FDCE \TCapt_to_mclkm2_reg[28] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[28]),
        .Q(TCapt_to_mclkm2[28]));
  FDCE \TCapt_to_mclkm2_reg[29] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[29]),
        .Q(TCapt_to_mclkm2[29]));
  FDCE \TCapt_to_mclkm2_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[2]),
        .Q(TCapt_to_mclkm2[2]));
  FDCE \TCapt_to_mclkm2_reg[30] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[30]),
        .Q(TCapt_to_mclkm2[30]));
  FDCE \TCapt_to_mclkm2_reg[31] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[31]),
        .Q(TCapt_to_mclkm2[31]));
  FDCE \TCapt_to_mclkm2_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[3]),
        .Q(TCapt_to_mclkm2[3]));
  FDCE \TCapt_to_mclkm2_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[4]),
        .Q(TCapt_to_mclkm2[4]));
  FDCE \TCapt_to_mclkm2_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[5]),
        .Q(TCapt_to_mclkm2[5]));
  FDCE \TCapt_to_mclkm2_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[6]),
        .Q(TCapt_to_mclkm2[6]));
  FDCE \TCapt_to_mclkm2_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[7]),
        .Q(TCapt_to_mclkm2[7]));
  FDCE \TCapt_to_mclkm2_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[8]),
        .Q(TCapt_to_mclkm2[8]));
  FDCE \TCapt_to_mclkm2_reg[9] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(TCapt_to_mclkm1[9]),
        .Q(TCapt_to_mclkm2[9]));
  LUT3 #(
    .INIT(8'h54)) 
    \aSeqbufB[0]_i_1__0 
       (.I0(\aSeqbufB_reg_n_0_[0] ),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2531" *) 
  LUT4 #(
    .INIT(16'h6660)) 
    \aSeqbufB[1]_i_1__0 
       (.I0(\aSeqbufB_reg_n_0_[1] ),
        .I1(\aSeqbufB_reg_n_0_[0] ),
        .I2(stateSeqbufB_reg[1]),
        .I3(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2531" *) 
  LUT5 #(
    .INIT(32'h78787800)) 
    \aSeqbufB[2]_i_1__0 
       (.I0(\aSeqbufB_reg_n_0_[0] ),
        .I1(\aSeqbufB_reg_n_0_[1] ),
        .I2(\aSeqbufB_reg_n_0_[2] ),
        .I3(stateSeqbufB_reg[1]),
        .I4(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[2]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h00007F80)) 
    \aSeqbufB[3]_i_1__0 
       (.I0(\aSeqbufB_reg_n_0_[2] ),
        .I1(\aSeqbufB_reg_n_0_[1] ),
        .I2(\aSeqbufB_reg_n_0_[0] ),
        .I3(\aSeqbufB_reg_n_0_[3] ),
        .I4(\aSeqbufB[8]_i_3__0_n_0 ),
        .O(\aSeqbufB[3]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \aSeqbufB[4]_i_1__0 
       (.I0(\aSeqbufB[8]_i_3__0_n_0 ),
        .I1(\aSeqbufB_reg_n_0_[3] ),
        .I2(\aSeqbufB_reg_n_0_[0] ),
        .I3(\aSeqbufB_reg_n_0_[1] ),
        .I4(\aSeqbufB_reg_n_0_[2] ),
        .I5(\aSeqbufB_reg_n_0_[4] ),
        .O(\aSeqbufB[4]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2535" *) 
  LUT4 #(
    .INIT(16'h0EE0)) 
    \aSeqbufB[5]_i_1__0 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(\aSeqbufB[5]_i_2__0_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[5] ),
        .O(\aSeqbufB[5]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aSeqbufB[5]_i_2__0 
       (.I0(\aSeqbufB_reg_n_0_[4] ),
        .I1(\aSeqbufB_reg_n_0_[2] ),
        .I2(\aSeqbufB_reg_n_0_[1] ),
        .I3(\aSeqbufB_reg_n_0_[0] ),
        .I4(\aSeqbufB_reg_n_0_[3] ),
        .O(\aSeqbufB[5]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2530" *) 
  LUT4 #(
    .INIT(16'h0EE0)) 
    \aSeqbufB[6]_i_1__0 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(\aSeqbufB[8]_i_4__0_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[6] ),
        .O(\aSeqbufB[6]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2530" *) 
  LUT5 #(
    .INIT(32'h78787800)) 
    \aSeqbufB[7]_i_1__0 
       (.I0(\aSeqbufB[8]_i_4__0_n_0 ),
        .I1(\aSeqbufB_reg_n_0_[6] ),
        .I2(\aSeqbufB_reg_n_0_[7] ),
        .I3(stateSeqbufB_reg[1]),
        .I4(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[7]_i_1__0_n_0 ));
  LUT4 #(
    .INIT(16'h4101)) 
    \aSeqbufB[8]_i_1__0 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(\stateSeqbufB[1]_i_2__0_n_0 ),
        .O(\aSeqbufB[8]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2510" *) 
  LUT5 #(
    .INIT(32'h15554000)) 
    \aSeqbufB[8]_i_2__0 
       (.I0(\aSeqbufB[8]_i_3__0_n_0 ),
        .I1(\aSeqbufB_reg_n_0_[7] ),
        .I2(\aSeqbufB_reg_n_0_[6] ),
        .I3(\aSeqbufB[8]_i_4__0_n_0 ),
        .I4(\aSeqbufB_reg_n_0_[8] ),
        .O(\aSeqbufB[8]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2565" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \aSeqbufB[8]_i_3__0 
       (.I0(stateSeqbufB_reg[0]),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[1]),
        .O(\aSeqbufB[8]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aSeqbufB[8]_i_4__0 
       (.I0(\aSeqbufB_reg_n_0_[3] ),
        .I1(\aSeqbufB_reg_n_0_[0] ),
        .I2(\aSeqbufB_reg_n_0_[1] ),
        .I3(\aSeqbufB_reg_n_0_[2] ),
        .I4(\aSeqbufB_reg_n_0_[4] ),
        .I5(\aSeqbufB_reg_n_0_[5] ),
        .O(\aSeqbufB[8]_i_4__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\aSeqbufB[0]_i_1__0_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\aSeqbufB[1]_i_1__0_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\aSeqbufB[2]_i_1__0_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[3] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\aSeqbufB[3]_i_1__0_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[4] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\aSeqbufB[4]_i_1__0_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[5] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\aSeqbufB[5]_i_1__0_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[6] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\aSeqbufB[6]_i_1__0_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[7] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\aSeqbufB[7]_i_1__0_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[8] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\aSeqbufB[8]_i_2__0_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[8] ));
  LUT6 #(
    .INIT(64'h5555555544454454)) 
    \aSeqbuf[0]_i_1__0 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(ackSeqbufBToSeqClear),
        .I2(rdySeq),
        .I3(dneSeq),
        .I4(TCapt),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\aSeqbuf[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2562" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \aSeqbuf[1]_i_1__0 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(\aSeqbuf_reg_n_0_[1] ),
        .I2(\aSeqbuf[3]_i_2__0_n_0 ),
        .O(\aSeqbuf[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2520" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \aSeqbuf[2]_i_1__0 
       (.I0(\aSeqbuf_reg_n_0_[1] ),
        .I1(\aSeqbuf_reg_n_0_[0] ),
        .I2(\aSeqbuf_reg_n_0_[2] ),
        .I3(\aSeqbuf[3]_i_2__0_n_0 ),
        .O(\aSeqbuf[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2520" *) 
  LUT5 #(
    .INIT(32'h00007F80)) 
    \aSeqbuf[3]_i_1__0 
       (.I0(\aSeqbuf_reg_n_0_[2] ),
        .I1(\aSeqbuf_reg_n_0_[0] ),
        .I2(\aSeqbuf_reg_n_0_[1] ),
        .I3(\aSeqbuf_reg_n_0_[3] ),
        .I4(\aSeqbuf[3]_i_2__0_n_0 ),
        .O(\aSeqbuf[3]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2509" *) 
  LUT5 #(
    .INIT(32'h00005451)) 
    \aSeqbuf[3]_i_2__0 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(TCapt),
        .I2(dneSeq),
        .I3(rdySeq),
        .I4(ackSeqbufBToSeqClear),
        .O(\aSeqbuf[3]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \aSeqbuf[4]_i_1__0 
       (.I0(\aSeqbuf[9]_i_5__0_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[3] ),
        .I2(\aSeqbuf_reg_n_0_[1] ),
        .I3(\aSeqbuf_reg_n_0_[0] ),
        .I4(\aSeqbuf_reg_n_0_[2] ),
        .I5(\aSeqbuf_reg_n_0_[4] ),
        .O(\aSeqbuf[4]_i_1__0_n_0 ));
  LUT3 #(
    .INIT(8'h28)) 
    \aSeqbuf[5]_i_1__0 
       (.I0(\aSeqbuf[9]_i_5__0_n_0 ),
        .I1(\aSeqbuf[5]_i_2__0_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[5] ),
        .O(\aSeqbuf[5]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aSeqbuf[5]_i_2__0 
       (.I0(\aSeqbuf_reg_n_0_[4] ),
        .I1(\aSeqbuf_reg_n_0_[2] ),
        .I2(\aSeqbuf_reg_n_0_[0] ),
        .I3(\aSeqbuf_reg_n_0_[1] ),
        .I4(\aSeqbuf_reg_n_0_[3] ),
        .O(\aSeqbuf[5]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2540" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \aSeqbuf[6]_i_1__0 
       (.I0(\aSeqbuf[9]_i_5__0_n_0 ),
        .I1(\aSeqbuf[9]_i_6__0_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[6] ),
        .O(\aSeqbuf[6]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2540" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \aSeqbuf[7]_i_1__0 
       (.I0(\aSeqbuf[9]_i_5__0_n_0 ),
        .I1(\aSeqbuf[9]_i_6__0_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[6] ),
        .I3(\aSeqbuf_reg_n_0_[7] ),
        .O(\aSeqbuf[7]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF6AAA0000)) 
    \aSeqbuf[8]_i_1__0 
       (.I0(\aSeqbuf_reg_n_0_[8] ),
        .I1(\aSeqbuf[9]_i_6__0_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[6] ),
        .I3(\aSeqbuf_reg_n_0_[7] ),
        .I4(\aSeqbuf[8]_i_2__0_n_0 ),
        .I5(\aSeqbuf[8]_i_3__0_n_0 ),
        .O(\aSeqbuf[8]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hDF000000FFFFFFFF)) 
    \aSeqbuf[8]_i_2__0 
       (.I0(\aSeqbuf[9]_i_6__0_n_0 ),
        .I1(\aSeqbuf[8]_i_4__0_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[4] ),
        .I3(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I4(TCapt),
        .I5(\aSeqbuf[8]_i_5_n_0 ),
        .O(\aSeqbuf[8]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'h00008000)) 
    \aSeqbuf[8]_i_3__0 
       (.I0(\dwrSeqbuf[8]_i_3_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[8] ),
        .I2(\aSeqbuf_reg_n_0_[7] ),
        .I3(\aSeqbuf_reg_n_0_[9] ),
        .I4(\aSeqbuf_reg_n_0_[6] ),
        .O(\aSeqbuf[8]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2511" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    \aSeqbuf[8]_i_4__0 
       (.I0(\aSeqbuf_reg_n_0_[8] ),
        .I1(\aSeqbuf_reg_n_0_[7] ),
        .I2(\aSeqbuf_reg_n_0_[9] ),
        .O(\aSeqbuf[8]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2521" *) 
  LUT5 #(
    .INIT(32'h00540055)) 
    \aSeqbuf[8]_i_5 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(dneSeq),
        .I2(TCapt),
        .I3(ackSeqbufBToSeqClear),
        .I4(rdySeq),
        .O(\aSeqbuf[8]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF0020)) 
    \aSeqbuf[9]_i_1__0 
       (.I0(TCapt),
        .I1(\aSeqbuf[9]_i_3__0_n_0 ),
        .I2(\i_reg_n_0_[0] ),
        .I3(first__0),
        .I4(\aSeqbuf[9]_i_4__0_n_0 ),
        .O(\aSeqbuf[9]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \aSeqbuf[9]_i_2__0 
       (.I0(\aSeqbuf[9]_i_5__0_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[9] ),
        .I2(\aSeqbuf_reg_n_0_[8] ),
        .I3(\aSeqbuf_reg_n_0_[7] ),
        .I4(\aSeqbuf_reg_n_0_[6] ),
        .I5(\aSeqbuf[9]_i_6__0_n_0 ),
        .O(\aSeqbuf[9]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2544" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \aSeqbuf[9]_i_3__0 
       (.I0(\dwrSeqbuf[31]_i_3_n_0 ),
        .I1(\burstCnt[15]_i_4__0_n_0 ),
        .O(\aSeqbuf[9]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFE0FFFFFFE0FFE0)) 
    \aSeqbuf[9]_i_4__0 
       (.I0(reqOpToSeqClear_memclk),
        .I1(reqSeqbufBToSeqClear_memclk),
        .I2(dneSeq),
        .I3(first),
        .I4(\FSM_onehot_stateSeq[5]_i_8_n_0 ),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\aSeqbuf[9]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAEAAAEAAAEAAA)) 
    \aSeqbuf[9]_i_5__0 
       (.I0(\aSeqbuf[8]_i_2__0_n_0 ),
        .I1(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I2(TCapt),
        .I3(\aSeqbuf_reg_n_0_[8] ),
        .I4(\aSeqbuf_reg_n_0_[6] ),
        .I5(\aSeqbuf_reg_n_0_[7] ),
        .O(\aSeqbuf[9]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aSeqbuf[9]_i_6__0 
       (.I0(\aSeqbuf_reg_n_0_[3] ),
        .I1(\aSeqbuf_reg_n_0_[1] ),
        .I2(\aSeqbuf_reg_n_0_[0] ),
        .I3(\aSeqbuf_reg_n_0_[2] ),
        .I4(\aSeqbuf_reg_n_0_[4] ),
        .I5(\aSeqbuf_reg_n_0_[5] ),
        .O(\aSeqbuf[9]_i_6__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[0] 
       (.C(memclk),
        .CE(\aSeqbuf[9]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[0]_i_1__0_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[1] 
       (.C(memclk),
        .CE(\aSeqbuf[9]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[1]_i_1__0_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[2] 
       (.C(memclk),
        .CE(\aSeqbuf[9]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[2]_i_1__0_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[3] 
       (.C(memclk),
        .CE(\aSeqbuf[9]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[3]_i_1__0_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[4] 
       (.C(memclk),
        .CE(\aSeqbuf[9]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[4]_i_1__0_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[5] 
       (.C(memclk),
        .CE(\aSeqbuf[9]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[5]_i_1__0_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[6] 
       (.C(memclk),
        .CE(\aSeqbuf[9]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[6]_i_1__0_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[7] 
       (.C(memclk),
        .CE(\aSeqbuf[9]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[7]_i_1__0_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[8] 
       (.C(memclk),
        .CE(\aSeqbuf[9]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[8]_i_1__0_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[9] 
       (.C(memclk),
        .CE(\aSeqbuf[9]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\aSeqbuf[9]_i_2__0_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[9] ));
  LUT4 #(
    .INIT(16'hD5C0)) 
    ackInvClearMask_sig_i_1
       (.I0(ackInvSet_sig_i_2__0_n_0),
        .I1(reqInvMemtrackClearMask),
        .I2(\stateOp_reg[2]_0 ),
        .I3(ackInvMemtrackClearMask),
        .O(ackInvClearMask_sig_i_1_n_0));
  FDCE ackInvClearMask_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ackInvClearMask_sig_i_1_n_0),
        .Q(ackInvMemtrackClearMask));
  LUT5 #(
    .INIT(32'hF555B000)) 
    ackInvSelect_sig_i_1__0
       (.I0(ackInvSet_sig_i_2__0_n_0),
        .I1(reqInvMemtrackClearMask),
        .I2(reqInvMemtrackSelect),
        .I3(\stateOp_reg[2]_0 ),
        .I4(ackInvMemtrackSelect),
        .O(ackInvSelect_sig_i_1__0_n_0));
  FDCE ackInvSelect_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ackInvSelect_sig_i_1__0_n_0),
        .Q(ackInvMemtrackSelect));
  LUT6 #(
    .INIT(64'hDDDDDDDD8888888C)) 
    ackInvSetMask_sig_i_1
       (.I0(ackInvSet_sig_i_2__0_n_0),
        .I1(ackInvSetMask_sig),
        .I2(reqInvMemtrackSelect),
        .I3(reqInvMemtrackSet),
        .I4(reqInvMemtrackClearMask),
        .I5(ackInvMemtrackSetMask),
        .O(ackInvSetMask_sig_i_1_n_0));
  LUT4 #(
    .INIT(16'hAA8A)) 
    ackInvSetMask_sig_i_2
       (.I0(reqInvMemtrackSetMask),
        .I1(stateOp[2]),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .O(ackInvSetMask_sig));
  FDCE ackInvSetMask_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ackInvSetMask_sig_i_1_n_0),
        .Q(ackInvMemtrackSetMask));
  LUT6 #(
    .INIT(64'hFF555555AB000000)) 
    ackInvSet_sig_i_1__2
       (.I0(ackInvSet_sig_i_2__0_n_0),
        .I1(reqInvMemtrackSelect),
        .I2(reqInvMemtrackClearMask),
        .I3(reqInvMemtrackSet),
        .I4(\stateOp_reg[2]_0 ),
        .I5(ackInvMemtrackSet),
        .O(ackInvSet_sig_i_1__2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2514" *) 
  LUT4 #(
    .INIT(16'h0004)) 
    ackInvSet_sig_i_2__0
       (.I0(stateOp[2]),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(restart_reg_0),
        .O(ackInvSet_sig_i_2__0_n_0));
  FDCE ackInvSet_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ackInvSet_sig_i_1__2_n_0),
        .Q(ackInvMemtrackSet));
  (* SOFT_HLUTNM = "soft_lutpair2548" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[0]_i_1 
       (.I0(capt[0]),
        .I1(\burstCnt[15]_i_3__0_n_0 ),
        .O(burstCapt[0]));
  (* SOFT_HLUTNM = "soft_lutpair2573" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[1]_i_1 
       (.I0(capt[1]),
        .I1(\burstCnt[15]_i_3__0_n_0 ),
        .O(burstCapt[1]));
  (* SOFT_HLUTNM = "soft_lutpair2573" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[2]_i_1 
       (.I0(capt[2]),
        .I1(\burstCnt[15]_i_3__0_n_0 ),
        .O(burstCapt[2]));
  (* SOFT_HLUTNM = "soft_lutpair2574" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[3]_i_1 
       (.I0(capt[3]),
        .I1(\burstCnt[15]_i_3__0_n_0 ),
        .O(burstCapt[3]));
  (* SOFT_HLUTNM = "soft_lutpair2550" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[4]_i_1 
       (.I0(capt[4]),
        .I1(\burstCnt[15]_i_3__0_n_0 ),
        .O(burstCapt[4]));
  (* SOFT_HLUTNM = "soft_lutpair2574" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[5]_i_1 
       (.I0(capt[5]),
        .I1(\burstCnt[15]_i_3__0_n_0 ),
        .O(burstCapt[5]));
  (* SOFT_HLUTNM = "soft_lutpair2575" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[6]_i_1 
       (.I0(capt[6]),
        .I1(\burstCnt[15]_i_3__0_n_0 ),
        .O(burstCapt[6]));
  (* SOFT_HLUTNM = "soft_lutpair2553" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[7]_i_1 
       (.I0(capt[7]),
        .I1(\burstCnt[15]_i_3__0_n_0 ),
        .O(burstCapt[7]));
  (* SOFT_HLUTNM = "soft_lutpair2575" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCapt[8]_i_1 
       (.I0(capt[8]),
        .I1(\burstCnt[15]_i_3__0_n_0 ),
        .O(burstCapt[8]));
  FDCE \burstCapt_reg[0] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCapt[0]),
        .Q(\burstCapt_reg_n_0_[0] ));
  FDCE \burstCapt_reg[1] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCapt[1]),
        .Q(\burstCapt_reg_n_0_[1] ));
  FDCE \burstCapt_reg[2] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCapt[2]),
        .Q(\burstCapt_reg_n_0_[2] ));
  FDCE \burstCapt_reg[3] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCapt[3]),
        .Q(\burstCapt_reg_n_0_[3] ));
  FDCE \burstCapt_reg[4] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCapt[4]),
        .Q(\burstCapt_reg_n_0_[4] ));
  FDCE \burstCapt_reg[5] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCapt[5]),
        .Q(\burstCapt_reg_n_0_[5] ));
  FDCE \burstCapt_reg[6] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCapt[6]),
        .Q(\burstCapt_reg_n_0_[6] ));
  FDCE \burstCapt_reg[7] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCapt[7]),
        .Q(\burstCapt_reg_n_0_[7] ));
  FDCE \burstCapt_reg[8] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCapt[8]),
        .Q(\burstCapt_reg_n_0_[8] ));
  (* SOFT_HLUTNM = "soft_lutpair2567" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \burstCnt[0]_i_1 
       (.I0(\burstCnt[15]_i_3__0_n_0 ),
        .I1(\burstCnt[15]_i_4__0_n_0 ),
        .I2(\burstCnt_reg_n_0_[0] ),
        .O(burstCnt[0]));
  (* SOFT_HLUTNM = "soft_lutpair2572" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \burstCnt[10]_i_1 
       (.I0(\burstCnt[15]_i_3__0_n_0 ),
        .I1(\burstCnt[10]_i_2__0_n_0 ),
        .O(burstCnt[10]));
  LUT5 #(
    .INIT(32'hFF20FFDF)) 
    \burstCnt[10]_i_2__0 
       (.I0(\burstCnt_reg_n_0_[9] ),
        .I1(\burstCnt[14]_i_3__0_n_0 ),
        .I2(\burstCnt_reg_n_0_[8] ),
        .I3(\burstCnt[15]_i_4__0_n_0 ),
        .I4(\burstCnt_reg_n_0_[10] ),
        .O(\burstCnt[10]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2571" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \burstCnt[11]_i_1 
       (.I0(\burstCnt[15]_i_3__0_n_0 ),
        .I1(\burstCnt[11]_i_2__0_n_0 ),
        .O(burstCnt[11]));
  LUT6 #(
    .INIT(64'hFF20FF00FFDFFFFF)) 
    \burstCnt[11]_i_2__0 
       (.I0(\burstCnt_reg_n_0_[9] ),
        .I1(\burstCnt[14]_i_3__0_n_0 ),
        .I2(\burstCnt_reg_n_0_[8] ),
        .I3(\burstCnt[15]_i_4__0_n_0 ),
        .I4(\burstCnt_reg_n_0_[10] ),
        .I5(\burstCnt_reg_n_0_[11] ),
        .O(\burstCnt[11]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2572" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \burstCnt[12]_i_1 
       (.I0(\burstCnt[15]_i_3__0_n_0 ),
        .I1(\burstCnt[12]_i_2__0_n_0 ),
        .O(burstCnt[12]));
  LUT6 #(
    .INIT(64'hFFFF0800FFFFF7FF)) 
    \burstCnt[12]_i_2__0 
       (.I0(\burstCnt_reg_n_0_[11] ),
        .I1(\burstCnt_reg_n_0_[9] ),
        .I2(\burstCnt[15]_i_11__0_n_0 ),
        .I3(\burstCnt_reg_n_0_[10] ),
        .I4(\burstCnt[15]_i_4__0_n_0 ),
        .I5(\burstCnt_reg_n_0_[12] ),
        .O(\burstCnt[12]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'h00008288)) 
    \burstCnt[13]_i_1 
       (.I0(\burstCnt[15]_i_3__0_n_0 ),
        .I1(\burstCnt_reg_n_0_[13] ),
        .I2(\burstCnt[14]_i_2__0_n_0 ),
        .I3(\burstCnt_reg_n_0_[12] ),
        .I4(\burstCnt[15]_i_4__0_n_0 ),
        .O(burstCnt[13]));
  LUT6 #(
    .INIT(64'h0808020808080808)) 
    \burstCnt[14]_i_1 
       (.I0(\burstCnt[15]_i_3__0_n_0 ),
        .I1(\burstCnt_reg_n_0_[14] ),
        .I2(\burstCnt[15]_i_4__0_n_0 ),
        .I3(\burstCnt_reg_n_0_[13] ),
        .I4(\burstCnt[14]_i_2__0_n_0 ),
        .I5(\burstCnt_reg_n_0_[12] ),
        .O(burstCnt[14]));
  LUT6 #(
    .INIT(64'hFFDFFFFFFFFFFFFF)) 
    \burstCnt[14]_i_2__0 
       (.I0(\burstCnt_reg_n_0_[10] ),
        .I1(\burstCnt[15]_i_4__0_n_0 ),
        .I2(\burstCnt_reg_n_0_[8] ),
        .I3(\burstCnt[14]_i_3__0_n_0 ),
        .I4(\burstCnt_reg_n_0_[9] ),
        .I5(\burstCnt_reg_n_0_[11] ),
        .O(\burstCnt[14]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFBFFFFFFFFFFF)) 
    \burstCnt[14]_i_3__0 
       (.I0(\burstCnt[5]_i_2__0_n_0 ),
        .I1(\burstCnt_reg_n_0_[4] ),
        .I2(\burstCnt_reg_n_0_[5] ),
        .I3(\burstCnt_reg_n_0_[6] ),
        .I4(\burstCnt[15]_i_4__0_n_0 ),
        .I5(\burstCnt_reg_n_0_[7] ),
        .O(\burstCnt[14]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \burstCnt[15]_i_10__0 
       (.I0(\burstCapt_reg_n_0_[2] ),
        .I1(capt[2]),
        .I2(capt[0]),
        .I3(\burstCapt_reg_n_0_[0] ),
        .I4(capt[1]),
        .I5(\burstCapt_reg_n_0_[1] ),
        .O(\burstCnt[15]_i_10__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFDFFF)) 
    \burstCnt[15]_i_11__0 
       (.I0(\burstCnt_reg_n_0_[7] ),
        .I1(\burstCnt[9]_i_3_n_0 ),
        .I2(\burstCnt_reg_n_0_[6] ),
        .I3(\burstCnt_reg_n_0_[8] ),
        .I4(\burstCnt[15]_i_4__0_n_0 ),
        .O(\burstCnt[15]_i_11__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2545" *) 
  LUT4 #(
    .INIT(16'h7FFF)) 
    \burstCnt[15]_i_12__0 
       (.I0(\burstCnt_reg_n_0_[14] ),
        .I1(\burstCnt_reg_n_0_[15] ),
        .I2(\burstCnt_reg_n_0_[13] ),
        .I3(\burstCnt_reg_n_0_[12] ),
        .O(\burstCnt[15]_i_12__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2534" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \burstCnt[15]_i_13__0 
       (.I0(\burstCnt_reg_n_0_[0] ),
        .I1(\burstCnt_reg_n_0_[1] ),
        .I2(\burstCnt_reg_n_0_[2] ),
        .I3(\burstCnt_reg_n_0_[3] ),
        .O(\burstCnt[15]_i_13__0_n_0 ));
  LUT6 #(
    .INIT(64'h0001000000010001)) 
    \burstCnt[15]_i_1__0 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(dneSeq),
        .I2(rdySeq),
        .I3(ackSeqbufBToSeqClear),
        .I4(\i_reg_n_0_[0] ),
        .I5(TCapt),
        .O(\burstCnt[15]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0A08080808080808)) 
    \burstCnt[15]_i_2 
       (.I0(\burstCnt[15]_i_3__0_n_0 ),
        .I1(\burstCnt_reg_n_0_[15] ),
        .I2(\burstCnt[15]_i_4__0_n_0 ),
        .I3(\burstCnt[15]_i_5__0_n_0 ),
        .I4(\burstCnt_reg_n_0_[13] ),
        .I5(\burstCnt_reg_n_0_[14] ),
        .O(burstCnt[15]));
  (* SOFT_HLUTNM = "soft_lutpair2576" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \burstCnt[15]_i_3__0 
       (.I0(\dwrSeqbuf[31]_i_3_n_0 ),
        .I1(first),
        .O(\burstCnt[15]_i_3__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFF4)) 
    \burstCnt[15]_i_4__0 
       (.I0(\burstCnt[15]_i_6_n_0 ),
        .I1(\burstCnt[15]_i_7__0_n_0 ),
        .I2(\burstCnt[15]_i_8__0_n_0 ),
        .I3(\burstCnt[15]_i_9__0_n_0 ),
        .I4(\burstCnt[15]_i_10__0_n_0 ),
        .O(\burstCnt[15]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000008000000000)) 
    \burstCnt[15]_i_5__0 
       (.I0(\burstCnt_reg_n_0_[12] ),
        .I1(\burstCnt_reg_n_0_[11] ),
        .I2(\burstCnt_reg_n_0_[9] ),
        .I3(\burstCnt[15]_i_11__0_n_0 ),
        .I4(\burstCnt[15]_i_4__0_n_0 ),
        .I5(\burstCnt_reg_n_0_[10] ),
        .O(\burstCnt[15]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF7FFF)) 
    \burstCnt[15]_i_6 
       (.I0(\burstCnt_reg_n_0_[10] ),
        .I1(\burstCnt_reg_n_0_[11] ),
        .I2(\burstCnt_reg_n_0_[8] ),
        .I3(\burstCnt_reg_n_0_[9] ),
        .I4(\burstCnt[15]_i_12__0_n_0 ),
        .O(\burstCnt[15]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \burstCnt[15]_i_7__0 
       (.I0(\burstCnt[15]_i_13__0_n_0 ),
        .I1(\burstCnt_reg_n_0_[6] ),
        .I2(\burstCnt_reg_n_0_[7] ),
        .I3(\burstCnt_reg_n_0_[4] ),
        .I4(\burstCnt_reg_n_0_[5] ),
        .O(\burstCnt[15]_i_7__0_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \burstCnt[15]_i_8__0 
       (.I0(\burstCapt_reg_n_0_[6] ),
        .I1(capt[6]),
        .I2(capt[8]),
        .I3(\burstCapt_reg_n_0_[8] ),
        .I4(capt[7]),
        .I5(\burstCapt_reg_n_0_[7] ),
        .O(\burstCnt[15]_i_8__0_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \burstCnt[15]_i_9__0 
       (.I0(\burstCapt_reg_n_0_[3] ),
        .I1(capt[3]),
        .I2(capt[5]),
        .I3(\burstCapt_reg_n_0_[5] ),
        .I4(capt[4]),
        .I5(\burstCapt_reg_n_0_[4] ),
        .O(\burstCnt[15]_i_9__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2513" *) 
  LUT4 #(
    .INIT(16'h1400)) 
    \burstCnt[1]_i_1__0 
       (.I0(first),
        .I1(\burstCnt_reg_n_0_[0] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\aSeqbuf[9]_i_3__0_n_0 ),
        .O(\burstCnt[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2513" *) 
  LUT5 #(
    .INIT(32'h04404040)) 
    \burstCnt[2]_i_1__0 
       (.I0(first),
        .I1(\aSeqbuf[9]_i_3__0_n_0 ),
        .I2(\burstCnt_reg_n_0_[2] ),
        .I3(\burstCnt_reg_n_0_[1] ),
        .I4(\burstCnt_reg_n_0_[0] ),
        .O(\burstCnt[2]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0222222220000000)) 
    \burstCnt[3]_i_1 
       (.I0(\burstCnt[15]_i_3__0_n_0 ),
        .I1(\burstCnt[15]_i_4__0_n_0 ),
        .I2(\burstCnt_reg_n_0_[2] ),
        .I3(\burstCnt_reg_n_0_[1] ),
        .I4(\burstCnt_reg_n_0_[0] ),
        .I5(\burstCnt_reg_n_0_[3] ),
        .O(burstCnt[3]));
  (* SOFT_HLUTNM = "soft_lutpair2569" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[4]_i_1__0 
       (.I0(first),
        .I1(\burstCnt[4]_i_2__0_n_0 ),
        .O(\burstCnt[4]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2544" *) 
  LUT4 #(
    .INIT(16'hF7DD)) 
    \burstCnt[4]_i_2__0 
       (.I0(\dwrSeqbuf[31]_i_3_n_0 ),
        .I1(\burstCnt[5]_i_2__0_n_0 ),
        .I2(\burstCnt[15]_i_4__0_n_0 ),
        .I3(\burstCnt_reg_n_0_[4] ),
        .O(\burstCnt[4]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2512" *) 
  LUT5 #(
    .INIT(32'h25220000)) 
    \burstCnt[5]_i_1__0 
       (.I0(\burstCnt_reg_n_0_[5] ),
        .I1(\burstCnt[15]_i_4__0_n_0 ),
        .I2(\burstCnt[5]_i_2__0_n_0 ),
        .I3(\burstCnt_reg_n_0_[4] ),
        .I4(\burstCnt[15]_i_3__0_n_0 ),
        .O(\burstCnt[5]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2522" *) 
  LUT5 #(
    .INIT(32'hBFFFFFFF)) 
    \burstCnt[5]_i_2__0 
       (.I0(\burstCnt[15]_i_4__0_n_0 ),
        .I1(\burstCnt_reg_n_0_[3] ),
        .I2(\burstCnt_reg_n_0_[2] ),
        .I3(\burstCnt_reg_n_0_[1] ),
        .I4(\burstCnt_reg_n_0_[0] ),
        .O(\burstCnt[5]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2570" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[6]_i_1__0 
       (.I0(first),
        .I1(\burstCnt[6]_i_2__0_n_0 ),
        .O(\burstCnt[6]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hBFBF40BFFFFFFFFF)) 
    \burstCnt[6]_i_2__0 
       (.I0(\burstCnt[5]_i_2__0_n_0 ),
        .I1(\burstCnt_reg_n_0_[4] ),
        .I2(\burstCnt_reg_n_0_[5] ),
        .I3(\burstCnt_reg_n_0_[6] ),
        .I4(\burstCnt[15]_i_4__0_n_0 ),
        .I5(\dwrSeqbuf[31]_i_3_n_0 ),
        .O(\burstCnt[6]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2567" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCnt[7]_i_1__0 
       (.I0(\burstCnt[7]_i_2__0_n_0 ),
        .I1(\burstCnt[15]_i_3__0_n_0 ),
        .O(\burstCnt[7]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h2122222222222222)) 
    \burstCnt[7]_i_2__0 
       (.I0(\burstCnt_reg_n_0_[7] ),
        .I1(\burstCnt[15]_i_4__0_n_0 ),
        .I2(\burstCnt[5]_i_2__0_n_0 ),
        .I3(\burstCnt_reg_n_0_[4] ),
        .I4(\burstCnt_reg_n_0_[5] ),
        .I5(\burstCnt_reg_n_0_[6] ),
        .O(\burstCnt[7]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2570" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[8]_i_1__0 
       (.I0(first),
        .I1(\burstCnt[8]_i_2__0_n_0 ),
        .O(\burstCnt[8]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF20DFFFFFFFFF)) 
    \burstCnt[8]_i_2__0 
       (.I0(\burstCnt_reg_n_0_[7] ),
        .I1(\burstCnt[9]_i_3_n_0 ),
        .I2(\burstCnt_reg_n_0_[6] ),
        .I3(\burstCnt_reg_n_0_[8] ),
        .I4(\burstCnt[15]_i_4__0_n_0 ),
        .I5(\dwrSeqbuf[31]_i_3_n_0 ),
        .O(\burstCnt[8]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2571" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \burstCnt[9]_i_1 
       (.I0(\burstCnt[15]_i_3__0_n_0 ),
        .I1(\burstCnt[9]_i_2__0_n_0 ),
        .O(burstCnt[9]));
  LUT6 #(
    .INIT(64'hFFFF2000FFFFDFFF)) 
    \burstCnt[9]_i_2__0 
       (.I0(\burstCnt_reg_n_0_[7] ),
        .I1(\burstCnt[9]_i_3_n_0 ),
        .I2(\burstCnt_reg_n_0_[6] ),
        .I3(\burstCnt_reg_n_0_[8] ),
        .I4(\burstCnt[15]_i_4__0_n_0 ),
        .I5(\burstCnt_reg_n_0_[9] ),
        .O(\burstCnt[9]_i_2__0_n_0 ));
  LUT3 #(
    .INIT(8'hF7)) 
    \burstCnt[9]_i_3 
       (.I0(\burstCnt_reg_n_0_[5] ),
        .I1(\burstCnt_reg_n_0_[4] ),
        .I2(\burstCnt[5]_i_2__0_n_0 ),
        .O(\burstCnt[9]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[0] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCnt[0]),
        .Q(\burstCnt_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[10] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCnt[10]),
        .Q(\burstCnt_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[11] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCnt[11]),
        .Q(\burstCnt_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[12] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCnt[12]),
        .Q(\burstCnt_reg_n_0_[12] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[13] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCnt[13]),
        .Q(\burstCnt_reg_n_0_[13] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[14] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCnt[14]),
        .Q(\burstCnt_reg_n_0_[14] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[15] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCnt[15]),
        .Q(\burstCnt_reg_n_0_[15] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[1] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\burstCnt[1]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[2] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\burstCnt[2]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[3] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCnt[3]),
        .Q(\burstCnt_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[4] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\burstCnt[4]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[5] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\burstCnt[5]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[6] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\burstCnt[6]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[7] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\burstCnt[7]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[8] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\burstCnt[8]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[9] 
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .CLR(AR),
        .D(burstCnt[9]),
        .Q(\burstCnt_reg_n_0_[9] ));
  LUT5 #(
    .INIT(32'h00001000)) 
    \capt[0]_i_1 
       (.I0(\capt_reg[0]_0 [0]),
        .I1(\capt_reg[0]_0 [3]),
        .I2(\capt_reg[0]_0 [1]),
        .I3(\capt_reg[0]_0 [2]),
        .I4(\mask_reg[0]_0 ),
        .O(\capt[0]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0040)) 
    \capt[1]_i_1 
       (.I0(\capt_reg[1]_0 [1]),
        .I1(\capt_reg[1]_0 [0]),
        .I2(\capt_reg[1]_1 ),
        .I3(\mask_reg[1]_0 ),
        .O(\capt[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00000100)) 
    \capt[2]_i_1 
       (.I0(\capt_reg[0]_0 [0]),
        .I1(\capt_reg[0]_0 [3]),
        .I2(\capt_reg[0]_0 [1]),
        .I3(\capt_reg[0]_0 [2]),
        .I4(\mask_reg[2]_0 ),
        .O(\capt[2]_i_1_n_0 ));
  LUT3 #(
    .INIT(8'h04)) 
    \capt[3]_i_1 
       (.I0(\capt_reg[3]_0 ),
        .I1(\capt_reg[3]_1 ),
        .I2(\mask_reg[3]_0 ),
        .O(\capt[3]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \capt[4]_i_1 
       (.I0(ddrAXI_rvalid),
        .I1(\mask_reg[4]_0 ),
        .O(\capt[4]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \capt[6]_i_1 
       (.I0(ddrAXI_wready),
        .I1(\mask_reg[6]_0 ),
        .O(\capt[6]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \capt[7]_i_1 
       (.I0(ddrAXI_bvalid),
        .I1(\mask_reg[7]_0 ),
        .O(\capt[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00001000)) 
    \capt[8]_i_1 
       (.I0(\capt_reg[3]_0 ),
        .I1(\capt_reg[8]_0 [2]),
        .I2(\capt_reg[8]_0 [1]),
        .I3(\capt_reg[8]_0 [0]),
        .I4(\mask_reg_n_0_[8] ),
        .O(\capt[8]_i_1_n_0 ));
  FDCE \capt_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\capt[0]_i_1_n_0 ),
        .Q(capt[0]));
  FDCE \capt_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\capt[1]_i_1_n_0 ),
        .Q(capt[1]));
  FDCE \capt_reg[2] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\capt[2]_i_1_n_0 ),
        .Q(capt[2]));
  FDCE \capt_reg[3] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\capt[3]_i_1_n_0 ),
        .Q(capt[3]));
  FDCE \capt_reg[4] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\capt[4]_i_1_n_0 ),
        .Q(capt[4]));
  FDCE \capt_reg[5] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\capt_reg[5]_0 ),
        .Q(capt[5]));
  FDCE \capt_reg[6] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\capt[6]_i_1_n_0 ),
        .Q(capt[6]));
  FDCE \capt_reg[7] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\capt[7]_i_1_n_0 ),
        .Q(capt[7]));
  FDCE \capt_reg[8] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\capt[8]_i_1_n_0 ),
        .Q(capt[8]));
  (* SOFT_HLUTNM = "soft_lutpair2542" *) 
  LUT4 #(
    .INIT(16'h90FF)) 
    \dneSeq_i[0]_i_1 
       (.I0(dneSeq),
        .I1(dneSeq_to_mclk),
        .I2(dneSeq_i[1]),
        .I3(dneSeq_i[0]),
        .O(\dneSeq_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2542" *) 
  LUT4 #(
    .INIT(16'h9FF0)) 
    \dneSeq_i[1]_i_1 
       (.I0(dneSeq),
        .I1(dneSeq_to_mclk),
        .I2(dneSeq_i[1]),
        .I3(dneSeq_i[0]),
        .O(\dneSeq_i[1]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \dneSeq_i_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\dneSeq_i[0]_i_1_n_0 ),
        .Q(dneSeq_i[0]));
  FDCE #(
    .INIT(1'b0)) 
    \dneSeq_i_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\dneSeq_i[1]_i_1_n_0 ),
        .Q(dneSeq_i[1]));
  LUT3 #(
    .INIT(8'hE8)) 
    dneSeq_mclk_i_1
       (.I0(dneSeq_to_mclkm2),
        .I1(dneSeq_to_mclkm1),
        .I2(avllenSeqbufMemtrackToHostif),
        .O(dneSeq_mclk_i_1_n_0));
  FDCE dneSeq_mclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(dneSeq_mclk_i_1_n_0),
        .Q(avllenSeqbufMemtrackToHostif));
  (* SOFT_HLUTNM = "soft_lutpair2560" *) 
  LUT4 #(
    .INIT(16'hCAAA)) 
    dneSeq_to_mclk_i_1
       (.I0(dneSeq_to_mclk),
        .I1(dneSeq),
        .I2(dneSeq_i[0]),
        .I3(dneSeq_i[1]),
        .O(dneSeq_to_mclk_i_1_n_0));
  FDCE dneSeq_to_mclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(dneSeq_to_mclk_i_1_n_0),
        .Q(dneSeq_to_mclk));
  FDCE dneSeq_to_mclkm1_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(dneSeq_to_mclk),
        .Q(dneSeq_to_mclkm1));
  FDCE dneSeq_to_mclkm2_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(dneSeq_to_mclkm1),
        .Q(dneSeq_to_mclkm2));
  LUT6 #(
    .INIT(64'hFAEAAAEAFAEAFAEA)) 
    \dwrSeqbuf[0]_i_1__0 
       (.I0(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I1(\dwrSeqbuf[0]_i_2__0_n_0 ),
        .I2(\dwrSeqbuf[8]_i_3_n_0 ),
        .I3(\dwrSeqbuf[31]_i_3_n_0 ),
        .I4(\burstCnt[15]_i_4__0_n_0 ),
        .I5(\burstCnt_reg_n_0_[0] ),
        .O(\dwrSeqbuf[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2523" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[0]_i_2__0 
       (.I0(\quad_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[0]),
        .O(\dwrSeqbuf[0]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2564" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \dwrSeqbuf[10]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_2__0_n_0 ),
        .I1(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I2(\burstCnt[10]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[10]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2563" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \dwrSeqbuf[11]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_2__0_n_0 ),
        .I1(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I2(\burstCnt[11]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[11]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2563" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \dwrSeqbuf[12]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_2__0_n_0 ),
        .I1(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I2(\burstCnt[12]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[12]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h8A8A888A88888A88)) 
    \dwrSeqbuf[13]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_2__0_n_0 ),
        .I1(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I2(\burstCnt[15]_i_4__0_n_0 ),
        .I3(\burstCnt_reg_n_0_[12] ),
        .I4(\burstCnt[14]_i_2__0_n_0 ),
        .I5(\burstCnt_reg_n_0_[13] ),
        .O(\dwrSeqbuf[13]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hA8888AAAA888A888)) 
    \dwrSeqbuf[14]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_2__0_n_0 ),
        .I1(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I2(\burstCnt[15]_i_5__0_n_0 ),
        .I3(\burstCnt_reg_n_0_[13] ),
        .I4(\burstCnt[15]_i_4__0_n_0 ),
        .I5(\burstCnt_reg_n_0_[14] ),
        .O(\dwrSeqbuf[14]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAA8888888)) 
    \dwrSeqbuf[15]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_2__0_n_0 ),
        .I1(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I2(\dwrSeqbuf[15]_i_2__0_n_0 ),
        .I3(\burstCnt_reg_n_0_[13] ),
        .I4(\burstCnt[15]_i_5__0_n_0 ),
        .I5(\dwrSeqbuf[15]_i_3__0_n_0 ),
        .O(\dwrSeqbuf[15]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2545" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrSeqbuf[15]_i_2__0 
       (.I0(\burstCnt_reg_n_0_[14] ),
        .I1(\burstCnt[15]_i_4__0_n_0 ),
        .O(\dwrSeqbuf[15]_i_2__0_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \dwrSeqbuf[15]_i_3__0 
       (.I0(\burstCnt_reg_n_0_[15] ),
        .I1(\burstCnt[15]_i_4__0_n_0 ),
        .O(\dwrSeqbuf[15]_i_3__0_n_0 ));
  LUT4 #(
    .INIT(16'h2F20)) 
    \dwrSeqbuf[16]_i_1__0 
       (.I0(capt[0]),
        .I1(\FSM_onehot_stateSeq[5]_i_4__0_n_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I3(\FSM_onehot_stateSeq[5]_i_7__0_n_0 ),
        .O(\dwrSeqbuf[16]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hFE0E0E0E)) 
    \dwrSeqbuf[17]_i_1__0 
       (.I0(reqSeqbufBToSeqClear_memclk),
        .I1(reqOpToSeqClear_memclk),
        .I2(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I3(TCapt),
        .I4(capt[1]),
        .O(\dwrSeqbuf[17]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hFE0E0E0E)) 
    \dwrSeqbuf[18]_i_1__0 
       (.I0(reqSeqbufBToSeqClear_memclk),
        .I1(reqOpToSeqClear_memclk),
        .I2(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I3(TCapt),
        .I4(capt[2]),
        .O(\dwrSeqbuf[18]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2557" *) 
  LUT4 #(
    .INIT(16'h2F20)) 
    \dwrSeqbuf[19]_i_1__0 
       (.I0(capt[3]),
        .I1(\FSM_onehot_stateSeq[5]_i_4__0_n_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I3(\FSM_onehot_stateSeq[5]_i_7__0_n_0 ),
        .O(\dwrSeqbuf[19]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[1]_i_1__0 
       (.I0(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I1(\dwrSeqbuf[1]_i_2__0_n_0 ),
        .I2(\dwrSeqbuf[31]_i_3_n_0 ),
        .I3(\dwrSeqbuf[1]_i_3__0_n_0 ),
        .I4(\dwrSeqbuf[8]_i_3_n_0 ),
        .O(\dwrSeqbuf[1]_i_1__0_n_0 ));
  LUT3 #(
    .INIT(8'hD7)) 
    \dwrSeqbuf[1]_i_2__0 
       (.I0(\aSeqbuf[9]_i_3__0_n_0 ),
        .I1(\burstCnt_reg_n_0_[1] ),
        .I2(\burstCnt_reg_n_0_[0] ),
        .O(\dwrSeqbuf[1]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2524" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[1]_i_3__0 
       (.I0(\quad_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[1]),
        .O(\dwrSeqbuf[1]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2557" *) 
  LUT4 #(
    .INIT(16'h2F20)) 
    \dwrSeqbuf[20]_i_1__0 
       (.I0(capt[4]),
        .I1(\FSM_onehot_stateSeq[5]_i_4__0_n_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I3(\FSM_onehot_stateSeq[5]_i_7__0_n_0 ),
        .O(\dwrSeqbuf[20]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hFE0E0E0E)) 
    \dwrSeqbuf[21]_i_1__0 
       (.I0(reqSeqbufBToSeqClear_memclk),
        .I1(reqOpToSeqClear_memclk),
        .I2(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I3(TCapt),
        .I4(capt[5]),
        .O(\dwrSeqbuf[21]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2532" *) 
  LUT5 #(
    .INIT(32'hFE0E0E0E)) 
    \dwrSeqbuf[22]_i_1__0 
       (.I0(reqSeqbufBToSeqClear_memclk),
        .I1(reqOpToSeqClear_memclk),
        .I2(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I3(TCapt),
        .I4(capt[6]),
        .O(\dwrSeqbuf[22]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2556" *) 
  LUT4 #(
    .INIT(16'h2F20)) 
    \dwrSeqbuf[23]_i_1__0 
       (.I0(capt[7]),
        .I1(\FSM_onehot_stateSeq[5]_i_4__0_n_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I3(\FSM_onehot_stateSeq[5]_i_7__0_n_0 ),
        .O(\dwrSeqbuf[23]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2556" *) 
  LUT4 #(
    .INIT(16'h2F20)) 
    \dwrSeqbuf[24]_i_1__0 
       (.I0(capt[8]),
        .I1(\FSM_onehot_stateSeq[5]_i_4__0_n_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I3(\FSM_onehot_stateSeq[5]_i_7__0_n_0 ),
        .O(\dwrSeqbuf[24]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[2]_i_1__0 
       (.I0(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I1(\dwrSeqbuf[2]_i_2__0_n_0 ),
        .I2(\dwrSeqbuf[31]_i_3_n_0 ),
        .I3(\dwrSeqbuf[2]_i_3__0_n_0 ),
        .I4(\dwrSeqbuf[8]_i_3_n_0 ),
        .O(\dwrSeqbuf[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2534" *) 
  LUT4 #(
    .INIT(16'h87FF)) 
    \dwrSeqbuf[2]_i_2__0 
       (.I0(\burstCnt_reg_n_0_[0] ),
        .I1(\burstCnt_reg_n_0_[1] ),
        .I2(\burstCnt_reg_n_0_[2] ),
        .I3(\aSeqbuf[9]_i_3__0_n_0 ),
        .O(\dwrSeqbuf[2]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2546" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[2]_i_3__0 
       (.I0(\quad_reg_n_0_[2] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[2]),
        .O(\dwrSeqbuf[2]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hEEEEEEEEEEEEEEE0)) 
    \dwrSeqbuf[30]_i_1__0 
       (.I0(reqOpToSeqClear_memclk),
        .I1(reqSeqbufBToSeqClear_memclk),
        .I2(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I3(dneSeq),
        .I4(rdySeq),
        .I5(ackSeqbufBToSeqClear),
        .O(\dwrSeqbuf[30]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h000000000000F4A4)) 
    \dwrSeqbuf[31]_i_1__0 
       (.I0(\FSM_onehot_stateSeq[5]_i_4__0_n_0 ),
        .I1(\FSM_onehot_stateSeq[5]_i_7__0_n_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I3(\i_reg_n_0_[0] ),
        .I4(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I5(ackSeqbufBToSeqClear),
        .O(\dwrSeqbuf[31]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFF8FFF8FFF8F0080)) 
    \dwrSeqbuf[31]_i_2__0 
       (.I0(TCapt),
        .I1(\dwrSeqbuf[31]_i_3_n_0 ),
        .I2(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I3(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I4(reqSeqbufBToSeqClear_memclk),
        .I5(reqOpToSeqClear_memclk),
        .O(\dwrSeqbuf[31]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2523" *) 
  LUT5 #(
    .INIT(32'h20220222)) 
    \dwrSeqbuf[31]_i_3 
       (.I0(\dwrSeqbuf[31]_i_4__0_n_0 ),
        .I1(\dwrSeqbuf[31]_i_5_n_0 ),
        .I2(capt[0]),
        .I3(\i_reg_n_0_[0] ),
        .I4(\quad_reg_n_0_[0] ),
        .O(\dwrSeqbuf[31]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0041000000000041)) 
    \dwrSeqbuf[31]_i_4__0 
       (.I0(\dwrSeqbuf[31]_i_6_n_0 ),
        .I1(capt[8]),
        .I2(\dwrSeqbuf[8]_i_2__0_n_0 ),
        .I3(\dwrSeqbuf[31]_i_7_n_0 ),
        .I4(capt[3]),
        .I5(\dwrSeqbuf[3]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[31]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2524" *) 
  LUT5 #(
    .INIT(32'h6F00F600)) 
    \dwrSeqbuf[31]_i_5 
       (.I0(\quad_reg_n_0_[1] ),
        .I1(capt[1]),
        .I2(\quad_reg_n_0_[2] ),
        .I3(\i_reg_n_0_[0] ),
        .I4(capt[2]),
        .O(\dwrSeqbuf[31]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2526" *) 
  LUT5 #(
    .INIT(32'h6F00F600)) 
    \dwrSeqbuf[31]_i_6 
       (.I0(\quad_reg_n_0_[7] ),
        .I1(capt[7]),
        .I2(\quad_reg_n_0_[6] ),
        .I3(\i_reg_n_0_[0] ),
        .I4(capt[6]),
        .O(\dwrSeqbuf[31]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2525" *) 
  LUT5 #(
    .INIT(32'h6F00F600)) 
    \dwrSeqbuf[31]_i_7 
       (.I0(\quad_reg_n_0_[4] ),
        .I1(capt[4]),
        .I2(\quad_reg_n_0_[5] ),
        .I3(\i_reg_n_0_[0] ),
        .I4(capt[5]),
        .O(\dwrSeqbuf[31]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'hFEAABAAA)) 
    \dwrSeqbuf[3]_i_1__0 
       (.I0(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I1(\dwrSeqbuf[31]_i_3_n_0 ),
        .I2(\dwrSeqbuf[3]_i_2__0_n_0 ),
        .I3(\dwrSeqbuf[8]_i_3_n_0 ),
        .I4(\dwrSeqbuf[3]_i_3__0_n_0 ),
        .O(\dwrSeqbuf[3]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2551" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[3]_i_2__0 
       (.I0(\quad_reg_n_0_[3] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[3]),
        .O(\dwrSeqbuf[3]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2522" *) 
  LUT5 #(
    .INIT(32'h00006AAA)) 
    \dwrSeqbuf[3]_i_3__0 
       (.I0(\burstCnt_reg_n_0_[3] ),
        .I1(\burstCnt_reg_n_0_[0] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[2] ),
        .I4(\burstCnt[15]_i_4__0_n_0 ),
        .O(\dwrSeqbuf[3]_i_3__0_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[4]_i_1__0 
       (.I0(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I1(\burstCnt[4]_i_2__0_n_0 ),
        .I2(\dwrSeqbuf[31]_i_3_n_0 ),
        .I3(\dwrSeqbuf[4]_i_2__0_n_0 ),
        .I4(\dwrSeqbuf[8]_i_3_n_0 ),
        .O(\dwrSeqbuf[4]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2525" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[4]_i_2__0 
       (.I0(\quad_reg_n_0_[4] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[4]),
        .O(\dwrSeqbuf[4]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'hFEAABAAA)) 
    \dwrSeqbuf[5]_i_1__0 
       (.I0(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I1(\dwrSeqbuf[31]_i_3_n_0 ),
        .I2(\dwrSeqbuf[5]_i_2__0_n_0 ),
        .I3(\dwrSeqbuf[8]_i_3_n_0 ),
        .I4(\dwrSeqbuf[5]_i_3__0_n_0 ),
        .O(\dwrSeqbuf[5]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2549" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[5]_i_2__0 
       (.I0(\quad_reg_n_0_[5] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[5]),
        .O(\dwrSeqbuf[5]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2512" *) 
  LUT4 #(
    .INIT(16'h0D22)) 
    \dwrSeqbuf[5]_i_3__0 
       (.I0(\burstCnt_reg_n_0_[4] ),
        .I1(\burstCnt[5]_i_2__0_n_0 ),
        .I2(\burstCnt[15]_i_4__0_n_0 ),
        .I3(\burstCnt_reg_n_0_[5] ),
        .O(\dwrSeqbuf[5]_i_3__0_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[6]_i_1__0 
       (.I0(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I1(\burstCnt[6]_i_2__0_n_0 ),
        .I2(\dwrSeqbuf[31]_i_3_n_0 ),
        .I3(\dwrSeqbuf[6]_i_2__0_n_0 ),
        .I4(\dwrSeqbuf[8]_i_3_n_0 ),
        .O(\dwrSeqbuf[6]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2552" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[6]_i_2__0 
       (.I0(\quad_reg_n_0_[6] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[6]),
        .O(\dwrSeqbuf[6]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'hFEAABAAA)) 
    \dwrSeqbuf[7]_i_1__0 
       (.I0(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I1(\dwrSeqbuf[31]_i_3_n_0 ),
        .I2(\dwrSeqbuf[7]_i_2__0_n_0 ),
        .I3(\dwrSeqbuf[8]_i_3_n_0 ),
        .I4(\burstCnt[7]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[7]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2526" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[7]_i_2__0 
       (.I0(\quad_reg_n_0_[7] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[7]),
        .O(\dwrSeqbuf[7]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[8]_i_1__0 
       (.I0(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I1(\burstCnt[8]_i_2__0_n_0 ),
        .I2(\dwrSeqbuf[31]_i_3_n_0 ),
        .I3(\dwrSeqbuf[8]_i_2__0_n_0 ),
        .I4(\dwrSeqbuf[8]_i_3_n_0 ),
        .O(\dwrSeqbuf[8]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2554" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dwrSeqbuf[8]_i_2__0 
       (.I0(\quad_reg_n_0_[8] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(capt[8]),
        .O(\dwrSeqbuf[8]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2509" *) 
  LUT5 #(
    .INIT(32'h00010000)) 
    \dwrSeqbuf[8]_i_3 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(dneSeq),
        .I2(rdySeq),
        .I3(ackSeqbufBToSeqClear),
        .I4(TCapt),
        .O(\dwrSeqbuf[8]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2564" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \dwrSeqbuf[9]_i_1__0 
       (.I0(\dwrSeqbuf[31]_i_2__0_n_0 ),
        .I1(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .I2(\burstCnt[9]_i_2__0_n_0 ),
        .O(\dwrSeqbuf[9]_i_1__0_n_0 ));
  FDCE \dwrSeqbuf_reg[0] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[0]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[0]));
  FDCE \dwrSeqbuf_reg[10] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[10]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[10]));
  FDCE \dwrSeqbuf_reg[11] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[11]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[11]));
  FDCE \dwrSeqbuf_reg[12] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[12]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[12]));
  FDCE \dwrSeqbuf_reg[13] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[13]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[13]));
  FDCE \dwrSeqbuf_reg[14] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[14]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[14]));
  FDCE \dwrSeqbuf_reg[15] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[15]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[15]));
  FDCE \dwrSeqbuf_reg[16] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[16]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[16]));
  FDCE \dwrSeqbuf_reg[17] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[17]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[17]));
  FDCE \dwrSeqbuf_reg[18] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[18]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[18]));
  FDCE \dwrSeqbuf_reg[19] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[19]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[19]));
  FDCE \dwrSeqbuf_reg[1] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[1]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[1]));
  FDCE \dwrSeqbuf_reg[20] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[20]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[20]));
  FDCE \dwrSeqbuf_reg[21] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[21]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[21]));
  FDCE \dwrSeqbuf_reg[22] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[22]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[22]));
  FDCE \dwrSeqbuf_reg[23] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[23]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[23]));
  FDCE \dwrSeqbuf_reg[24] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[24]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[24]));
  FDCE \dwrSeqbuf_reg[2] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[2]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[2]));
  FDCE \dwrSeqbuf_reg[30] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[30]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[30]));
  FDCE \dwrSeqbuf_reg[31] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[31]_i_2__0_n_0 ),
        .Q(dwrSeqbuf[31]));
  FDCE \dwrSeqbuf_reg[3] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[3]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[3]));
  FDCE \dwrSeqbuf_reg[4] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[4]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[4]));
  FDCE \dwrSeqbuf_reg[5] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[5]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[5]));
  FDCE \dwrSeqbuf_reg[6] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[6]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[6]));
  FDCE \dwrSeqbuf_reg[7] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[7]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[7]));
  FDCE \dwrSeqbuf_reg[8] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[8]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[8]));
  FDCE \dwrSeqbuf_reg[9] 
       (.C(memclk),
        .CE(\dwrSeqbuf[31]_i_1__0_n_0 ),
        .CLR(AR),
        .D(\dwrSeqbuf[9]_i_1__0_n_0 ),
        .Q(dwrSeqbuf[9]));
  (* SOFT_HLUTNM = "soft_lutpair2547" *) 
  LUT2 #(
    .INIT(4'h2)) 
    enSeqbuf_i_1__0
       (.I0(\i_reg_n_0_[0] ),
        .I1(first),
        .O(enSeqbuf));
  FDCE enSeqbuf_reg
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(enSeqbuf),
        .Q(enSeqbuf_reg_n_0));
  FDPE first_reg
       (.C(memclk),
        .CE(\burstCnt[15]_i_1__0_n_0 ),
        .D(first),
        .PRE(AR),
        .Q(first__0));
  LUT6 #(
    .INIT(64'hAAAA0045AAAAAAAA)) 
    \i[0]_i_1__6 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\FSM_onehot_stateSeq[3]_i_2__0_n_0 ),
        .I2(TCapt),
        .I3(first),
        .I4(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I5(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .O(\i[0]_i_1__6_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\i[0]_i_1__6_n_0 ),
        .Q(\i_reg_n_0_[0] ));
  LUT5 #(
    .INIT(32'h75770500)) 
    \mask[8]_i_1 
       (.I0(reqInvMemtrackClearMask),
        .I1(\stateOp_reg[2]_0 ),
        .I2(\mask[8]_i_2_n_0 ),
        .I3(\mask_reg[8]_0 ),
        .I4(\mask_reg_n_0_[8] ),
        .O(\mask[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF04FFFFFFFFFF)) 
    \mask[8]_i_2 
       (.I0(stateOp[1]),
        .I1(stateOp[0]),
        .I2(stateOp[2]),
        .I3(reqInvMemtrackSetMask),
        .I4(\staTixVTrigger_reg[7]_0 [2]),
        .I5(\staTixVTrigger_reg[7]_0 [3]),
        .O(\mask[8]_i_2_n_0 ));
  FDCE \mask_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\mask_reg[0]_1 ),
        .Q(\mask_reg[0]_0 ));
  FDCE \mask_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\mask_reg[1]_1 ),
        .Q(\mask_reg[1]_0 ));
  FDCE \mask_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\mask_reg[2]_1 ),
        .Q(\mask_reg[2]_0 ));
  FDCE \mask_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\mask_reg[3]_1 ),
        .Q(\mask_reg[3]_0 ));
  FDCE \mask_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\mask_reg[4]_1 ),
        .Q(\mask_reg[4]_0 ));
  FDCE \mask_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\mask_reg[5]_1 ),
        .Q(\mask_reg[5]_0 ));
  FDCE \mask_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\mask_reg[6]_1 ),
        .Q(\mask_reg[6]_0 ));
  FDCE \mask_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\mask_reg[7]_1 ),
        .Q(\mask_reg[7]_0 ));
  FDCE \mask_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\mask[8]_i_1_n_0 ),
        .Q(\mask_reg_n_0_[8] ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a32b64__xdcDup__3 mySeqbuf
       (.\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram ({dwrSeqbuf[31:30],dwrSeqbuf[24:0]}),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\aSeqbufB_reg_n_0_[8] ,\aSeqbufB_reg_n_0_[7] ,\aSeqbufB_reg_n_0_[6] ,\aSeqbufB_reg_n_0_[5] ,\aSeqbufB_reg_n_0_[4] ,\aSeqbufB_reg_n_0_[3] ,\aSeqbufB_reg_n_0_[2] ,\aSeqbufB_reg_n_0_[1] ,\aSeqbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 (stateSeqbufB_reg),
        .Q({\aSeqbuf_reg_n_0_[9] ,\aSeqbuf_reg_n_0_[8] ,\aSeqbuf_reg_n_0_[7] ,\aSeqbuf_reg_n_0_[6] ,\aSeqbuf_reg_n_0_[5] ,\aSeqbuf_reg_n_0_[4] ,\aSeqbuf_reg_n_0_[3] ,\aSeqbuf_reg_n_0_[2] ,\aSeqbuf_reg_n_0_[1] ,\aSeqbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .doutb(doutb),
        .ena(enSeqbuf_reg_n_0),
        .memclk(memclk));
  LUT6 #(
    .INIT(64'hFFFFF1FF00000100)) 
    ptr0SeqbufTrackNotFixed_i_1__0
       (.I0(first),
        .I1(\aSeqbuf[9]_i_3__0_n_0 ),
        .I2(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I3(\FSM_onehot_stateSeq[5]_i_6__0_n_0 ),
        .I4(ptr0SeqbufTrackNotFixed_i_2_n_0),
        .I5(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0SeqbufTrackNotFixed_i_1__0_n_0));
  LUT6 #(
    .INIT(64'hEEEEEEEEEE0EEEEE)) 
    ptr0SeqbufTrackNotFixed_i_2
       (.I0(TCapt),
        .I1(dneSeq),
        .I2(\FSM_onehot_stateSeq[5]_i_8_n_0 ),
        .I3(\aSeqbuf[9]_i_3__0_n_0 ),
        .I4(\i_reg_n_0_[0] ),
        .I5(first__0),
        .O(ptr0SeqbufTrackNotFixed_i_2_n_0));
  FDCE ptr0SeqbufTrackNotFixed_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(ptr0SeqbufTrackNotFixed_i_1__0_n_0),
        .Q(ptr0SeqbufTrackNotFixed_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2561" *) 
  LUT3 #(
    .INIT(8'hB3)) 
    \ptr0Seqbuf_i[0]_i_1 
       (.I0(\ptr0Seqbuf_i[1]_i_2_n_0 ),
        .I1(ptr0Seqbuf_i[0]),
        .I2(ptr0Seqbuf_i[1]),
        .O(\ptr0Seqbuf_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2561" *) 
  LUT3 #(
    .INIT(8'hBC)) 
    \ptr0Seqbuf_i[1]_i_1 
       (.I0(\ptr0Seqbuf_i[1]_i_2_n_0 ),
        .I1(ptr0Seqbuf_i[0]),
        .I2(ptr0Seqbuf_i[1]),
        .O(\ptr0Seqbuf_i[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0200000000020202)) 
    \ptr0Seqbuf_i[1]_i_2 
       (.I0(\ptr0Seqbuf_i[1]_i_3_n_0 ),
        .I1(\ptr0Seqbuf_i[1]_i_4_n_0 ),
        .I2(\ptr0Seqbuf_i[1]_i_5_n_0 ),
        .I3(\aSeqbuf_reg_n_0_[6] ),
        .I4(ptr0SeqbufTrackNotFixed_reg_n_0),
        .I5(ptr0Seqbuf_to_mclk[6]),
        .O(\ptr0Seqbuf_i[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000084110095)) 
    \ptr0Seqbuf_i[1]_i_3 
       (.I0(ptr0Seqbuf_to_mclk[1]),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .I2(\aSeqbuf_reg_n_0_[1] ),
        .I3(ptr0Seqbuf_to_mclk[2]),
        .I4(\aSeqbuf_reg_n_0_[2] ),
        .I5(\ptr0Seqbuf_i[1]_i_6_n_0 ),
        .O(\ptr0Seqbuf_i[1]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2555" *) 
  LUT4 #(
    .INIT(16'hFF78)) 
    \ptr0Seqbuf_i[1]_i_4 
       (.I0(\aSeqbuf_reg_n_0_[3] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .I2(ptr0Seqbuf_to_mclk[3]),
        .I3(\ptr0Seqbuf_i[1]_i_7_n_0 ),
        .O(\ptr0Seqbuf_i[1]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2528" *) 
  LUT5 #(
    .INIT(32'h6FFFF6CC)) 
    \ptr0Seqbuf_i[1]_i_5 
       (.I0(\aSeqbuf_reg_n_0_[7] ),
        .I1(ptr0Seqbuf_to_mclk[7]),
        .I2(\aSeqbuf_reg_n_0_[8] ),
        .I3(ptr0SeqbufTrackNotFixed_reg_n_0),
        .I4(ptr0Seqbuf_to_mclk[8]),
        .O(\ptr0Seqbuf_i[1]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2529" *) 
  LUT5 #(
    .INIT(32'h6FFFF6CC)) 
    \ptr0Seqbuf_i[1]_i_6 
       (.I0(\aSeqbuf_reg_n_0_[9] ),
        .I1(ptr0Seqbuf_to_mclk[9]),
        .I2(\aSeqbuf_reg_n_0_[0] ),
        .I3(ptr0SeqbufTrackNotFixed_reg_n_0),
        .I4(ptr0Seqbuf_to_mclk[0]),
        .O(\ptr0Seqbuf_i[1]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2527" *) 
  LUT5 #(
    .INIT(32'h6FFFF6CC)) 
    \ptr0Seqbuf_i[1]_i_7 
       (.I0(\aSeqbuf_reg_n_0_[4] ),
        .I1(ptr0Seqbuf_to_mclk[4]),
        .I2(\aSeqbuf_reg_n_0_[5] ),
        .I3(ptr0SeqbufTrackNotFixed_reg_n_0),
        .I4(ptr0Seqbuf_to_mclk[5]),
        .O(\ptr0Seqbuf_i[1]_i_7_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_i_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\ptr0Seqbuf_i[0]_i_1_n_0 ),
        .Q(ptr0Seqbuf_i[0]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_i_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\ptr0Seqbuf_i[1]_i_1_n_0 ),
        .Q(ptr0Seqbuf_i[1]));
  LUT5 #(
    .INIT(32'h82000000)) 
    \ptr0Seqbuf_mclk[9]_i_1 
       (.I0(\ptr0Seqbuf_mclk[9]_i_2_n_0 ),
        .I1(ptr0Seqbuf_to_mclkm2[9]),
        .I2(ptr0Seqbuf_to_mclkm1[9]),
        .I3(\ptr0Seqbuf_mclk[9]_i_3_n_0 ),
        .I4(\ptr0Seqbuf_mclk[9]_i_4_n_0 ),
        .O(\ptr0Seqbuf_mclk[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \ptr0Seqbuf_mclk[9]_i_2 
       (.I0(ptr0Seqbuf_to_mclkm1[0]),
        .I1(ptr0Seqbuf_to_mclkm2[0]),
        .I2(ptr0Seqbuf_to_mclkm2[2]),
        .I3(ptr0Seqbuf_to_mclkm1[2]),
        .I4(ptr0Seqbuf_to_mclkm2[1]),
        .I5(ptr0Seqbuf_to_mclkm1[1]),
        .O(\ptr0Seqbuf_mclk[9]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \ptr0Seqbuf_mclk[9]_i_3 
       (.I0(ptr0Seqbuf_to_mclkm1[6]),
        .I1(ptr0Seqbuf_to_mclkm2[6]),
        .I2(ptr0Seqbuf_to_mclkm2[8]),
        .I3(ptr0Seqbuf_to_mclkm1[8]),
        .I4(ptr0Seqbuf_to_mclkm2[7]),
        .I5(ptr0Seqbuf_to_mclkm1[7]),
        .O(\ptr0Seqbuf_mclk[9]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \ptr0Seqbuf_mclk[9]_i_4 
       (.I0(ptr0Seqbuf_to_mclkm1[3]),
        .I1(ptr0Seqbuf_to_mclkm2[3]),
        .I2(ptr0Seqbuf_to_mclkm2[5]),
        .I3(ptr0Seqbuf_to_mclkm1[5]),
        .I4(ptr0Seqbuf_to_mclkm2[4]),
        .I5(ptr0Seqbuf_to_mclkm1[4]),
        .O(\ptr0Seqbuf_mclk[9]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_mclk_reg[0] 
       (.C(aclk_sig),
        .CE(\ptr0Seqbuf_mclk[9]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm2[0]),
        .Q(\ptr0Seqbuf_mclk_reg[9]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_mclk_reg[1] 
       (.C(aclk_sig),
        .CE(\ptr0Seqbuf_mclk[9]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm2[1]),
        .Q(\ptr0Seqbuf_mclk_reg[9]_0 [1]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_mclk_reg[2] 
       (.C(aclk_sig),
        .CE(\ptr0Seqbuf_mclk[9]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm2[2]),
        .Q(\ptr0Seqbuf_mclk_reg[9]_0 [2]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_mclk_reg[3] 
       (.C(aclk_sig),
        .CE(\ptr0Seqbuf_mclk[9]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm2[3]),
        .Q(\ptr0Seqbuf_mclk_reg[9]_0 [3]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_mclk_reg[4] 
       (.C(aclk_sig),
        .CE(\ptr0Seqbuf_mclk[9]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm2[4]),
        .Q(\ptr0Seqbuf_mclk_reg[9]_0 [4]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_mclk_reg[5] 
       (.C(aclk_sig),
        .CE(\ptr0Seqbuf_mclk[9]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm2[5]),
        .Q(\ptr0Seqbuf_mclk_reg[9]_0 [5]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_mclk_reg[6] 
       (.C(aclk_sig),
        .CE(\ptr0Seqbuf_mclk[9]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm2[6]),
        .Q(\ptr0Seqbuf_mclk_reg[9]_0 [6]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_mclk_reg[7] 
       (.C(aclk_sig),
        .CE(\ptr0Seqbuf_mclk[9]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm2[7]),
        .Q(\ptr0Seqbuf_mclk_reg[9]_0 [7]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_mclk_reg[8] 
       (.C(aclk_sig),
        .CE(\ptr0Seqbuf_mclk[9]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm2[8]),
        .Q(\ptr0Seqbuf_mclk_reg[9]_0 [8]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_mclk_reg[9] 
       (.C(aclk_sig),
        .CE(\ptr0Seqbuf_mclk[9]_i_1_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm2[9]),
        .Q(\ptr0Seqbuf_mclk_reg[9]_0 [9]));
  (* SOFT_HLUTNM = "soft_lutpair2529" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ptr0Seqbuf_to_mclk[0]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0Seqbuf[0]));
  (* SOFT_HLUTNM = "soft_lutpair2562" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ptr0Seqbuf_to_mclk[1]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[1] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0Seqbuf[1]));
  LUT2 #(
    .INIT(4'h8)) 
    \ptr0Seqbuf_to_mclk[2]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[2] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0Seqbuf[2]));
  (* SOFT_HLUTNM = "soft_lutpair2555" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ptr0Seqbuf_to_mclk[3]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[3] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0Seqbuf[3]));
  (* SOFT_HLUTNM = "soft_lutpair2577" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ptr0Seqbuf_to_mclk[4]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[4] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0Seqbuf[4]));
  (* SOFT_HLUTNM = "soft_lutpair2527" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ptr0Seqbuf_to_mclk[5]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[5] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0Seqbuf[5]));
  (* SOFT_HLUTNM = "soft_lutpair2577" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ptr0Seqbuf_to_mclk[6]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[6] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0Seqbuf[6]));
  (* SOFT_HLUTNM = "soft_lutpair2578" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ptr0Seqbuf_to_mclk[7]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[7] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0Seqbuf[7]));
  (* SOFT_HLUTNM = "soft_lutpair2528" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ptr0Seqbuf_to_mclk[8]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[8] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0Seqbuf[8]));
  LUT3 #(
    .INIT(8'h40)) 
    \ptr0Seqbuf_to_mclk[9]_i_1 
       (.I0(\ptr0Seqbuf_i[1]_i_2_n_0 ),
        .I1(ptr0Seqbuf_i[0]),
        .I2(ptr0Seqbuf_i[1]),
        .O(\ptr0Seqbuf_to_mclk[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2578" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \ptr0Seqbuf_to_mclk[9]_i_2 
       (.I0(\aSeqbuf_reg_n_0_[9] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0Seqbuf[9]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclk_reg[0] 
       (.C(memclk),
        .CE(\ptr0Seqbuf_to_mclk[9]_i_1_n_0 ),
        .CLR(AR),
        .D(ptr0Seqbuf[0]),
        .Q(ptr0Seqbuf_to_mclk[0]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclk_reg[1] 
       (.C(memclk),
        .CE(\ptr0Seqbuf_to_mclk[9]_i_1_n_0 ),
        .CLR(AR),
        .D(ptr0Seqbuf[1]),
        .Q(ptr0Seqbuf_to_mclk[1]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclk_reg[2] 
       (.C(memclk),
        .CE(\ptr0Seqbuf_to_mclk[9]_i_1_n_0 ),
        .CLR(AR),
        .D(ptr0Seqbuf[2]),
        .Q(ptr0Seqbuf_to_mclk[2]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclk_reg[3] 
       (.C(memclk),
        .CE(\ptr0Seqbuf_to_mclk[9]_i_1_n_0 ),
        .CLR(AR),
        .D(ptr0Seqbuf[3]),
        .Q(ptr0Seqbuf_to_mclk[3]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclk_reg[4] 
       (.C(memclk),
        .CE(\ptr0Seqbuf_to_mclk[9]_i_1_n_0 ),
        .CLR(AR),
        .D(ptr0Seqbuf[4]),
        .Q(ptr0Seqbuf_to_mclk[4]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclk_reg[5] 
       (.C(memclk),
        .CE(\ptr0Seqbuf_to_mclk[9]_i_1_n_0 ),
        .CLR(AR),
        .D(ptr0Seqbuf[5]),
        .Q(ptr0Seqbuf_to_mclk[5]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclk_reg[6] 
       (.C(memclk),
        .CE(\ptr0Seqbuf_to_mclk[9]_i_1_n_0 ),
        .CLR(AR),
        .D(ptr0Seqbuf[6]),
        .Q(ptr0Seqbuf_to_mclk[6]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclk_reg[7] 
       (.C(memclk),
        .CE(\ptr0Seqbuf_to_mclk[9]_i_1_n_0 ),
        .CLR(AR),
        .D(ptr0Seqbuf[7]),
        .Q(ptr0Seqbuf_to_mclk[7]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclk_reg[8] 
       (.C(memclk),
        .CE(\ptr0Seqbuf_to_mclk[9]_i_1_n_0 ),
        .CLR(AR),
        .D(ptr0Seqbuf[8]),
        .Q(ptr0Seqbuf_to_mclk[8]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclk_reg[9] 
       (.C(memclk),
        .CE(\ptr0Seqbuf_to_mclk[9]_i_1_n_0 ),
        .CLR(AR),
        .D(ptr0Seqbuf[9]),
        .Q(ptr0Seqbuf_to_mclk[9]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm1_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclk[0]),
        .Q(ptr0Seqbuf_to_mclkm1[0]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm1_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclk[1]),
        .Q(ptr0Seqbuf_to_mclkm1[1]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm1_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclk[2]),
        .Q(ptr0Seqbuf_to_mclkm1[2]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm1_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclk[3]),
        .Q(ptr0Seqbuf_to_mclkm1[3]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm1_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclk[4]),
        .Q(ptr0Seqbuf_to_mclkm1[4]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm1_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclk[5]),
        .Q(ptr0Seqbuf_to_mclkm1[5]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm1_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclk[6]),
        .Q(ptr0Seqbuf_to_mclkm1[6]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm1_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclk[7]),
        .Q(ptr0Seqbuf_to_mclkm1[7]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm1_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclk[8]),
        .Q(ptr0Seqbuf_to_mclkm1[8]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm1_reg[9] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclk[9]),
        .Q(ptr0Seqbuf_to_mclkm1[9]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm2_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm1[0]),
        .Q(ptr0Seqbuf_to_mclkm2[0]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm2_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm1[1]),
        .Q(ptr0Seqbuf_to_mclkm2[1]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm2_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm1[2]),
        .Q(ptr0Seqbuf_to_mclkm2[2]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm2_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm1[3]),
        .Q(ptr0Seqbuf_to_mclkm2[3]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm2_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm1[4]),
        .Q(ptr0Seqbuf_to_mclkm2[4]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm2_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm1[5]),
        .Q(ptr0Seqbuf_to_mclkm2[5]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm2_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm1[6]),
        .Q(ptr0Seqbuf_to_mclkm2[6]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm2_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm1[7]),
        .Q(ptr0Seqbuf_to_mclkm2[7]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm2_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm1[8]),
        .Q(ptr0Seqbuf_to_mclkm2[8]));
  FDCE #(
    .INIT(1'b0)) 
    \ptr0Seqbuf_to_mclkm2_reg[9] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(ptr0Seqbuf_to_mclkm1[9]),
        .Q(ptr0Seqbuf_to_mclkm2[9]));
  (* SOFT_HLUTNM = "soft_lutpair2548" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[0]_i_1__0 
       (.I0(capt[0]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[0] ),
        .I3(first),
        .O(quad[0]));
  (* SOFT_HLUTNM = "soft_lutpair2547" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[1]_i_1__0 
       (.I0(capt[1]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[1] ),
        .I3(first),
        .O(quad[1]));
  (* SOFT_HLUTNM = "soft_lutpair2546" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[2]_i_1__0 
       (.I0(capt[2]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[2] ),
        .I3(first),
        .O(quad[2]));
  (* SOFT_HLUTNM = "soft_lutpair2551" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[3]_i_1__0 
       (.I0(capt[3]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[3] ),
        .I3(first),
        .O(quad[3]));
  (* SOFT_HLUTNM = "soft_lutpair2550" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[4]_i_1__0 
       (.I0(capt[4]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[4] ),
        .I3(first),
        .O(quad[4]));
  (* SOFT_HLUTNM = "soft_lutpair2549" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[5]_i_1__0 
       (.I0(capt[5]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[5] ),
        .I3(first),
        .O(quad[5]));
  (* SOFT_HLUTNM = "soft_lutpair2552" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[6]_i_1__0 
       (.I0(capt[6]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[6] ),
        .I3(first),
        .O(quad[6]));
  (* SOFT_HLUTNM = "soft_lutpair2553" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[7]_i_1__0 
       (.I0(capt[7]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[7] ),
        .I3(first),
        .O(quad[7]));
  LUT6 #(
    .INIT(64'h0000000100010001)) 
    \quad[8]_i_1__0 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(rdySeq),
        .I2(ackSeqbufBToSeqClear),
        .I3(dneSeq),
        .I4(TCapt),
        .I5(\i_reg_n_0_[0] ),
        .O(\quad[8]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2554" *) 
  LUT4 #(
    .INIT(16'h00E2)) 
    \quad[8]_i_2 
       (.I0(capt[8]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\quad_reg_n_0_[8] ),
        .I3(first),
        .O(quad[8]));
  FDCE \quad_reg[0] 
       (.C(memclk),
        .CE(\quad[8]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[0]),
        .Q(\quad_reg_n_0_[0] ));
  FDCE \quad_reg[1] 
       (.C(memclk),
        .CE(\quad[8]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[1]),
        .Q(\quad_reg_n_0_[1] ));
  FDCE \quad_reg[2] 
       (.C(memclk),
        .CE(\quad[8]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[2]),
        .Q(\quad_reg_n_0_[2] ));
  FDCE \quad_reg[3] 
       (.C(memclk),
        .CE(\quad[8]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[3]),
        .Q(\quad_reg_n_0_[3] ));
  FDCE \quad_reg[4] 
       (.C(memclk),
        .CE(\quad[8]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[4]),
        .Q(\quad_reg_n_0_[4] ));
  FDCE \quad_reg[5] 
       (.C(memclk),
        .CE(\quad[8]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[5]),
        .Q(\quad_reg_n_0_[5] ));
  FDCE \quad_reg[6] 
       (.C(memclk),
        .CE(\quad[8]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[6]),
        .Q(\quad_reg_n_0_[6] ));
  FDCE \quad_reg[7] 
       (.C(memclk),
        .CE(\quad[8]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[7]),
        .Q(\quad_reg_n_0_[7] ));
  FDCE \quad_reg[8] 
       (.C(memclk),
        .CE(\quad[8]_i_1__0_n_0 ),
        .CLR(AR),
        .D(quad[8]),
        .Q(\quad_reg_n_0_[8] ));
  (* SOFT_HLUTNM = "soft_lutpair2543" *) 
  LUT4 #(
    .INIT(16'h90FF)) 
    \rdySeq_i[0]_i_1 
       (.I0(rdySeq),
        .I1(rdySeq_to_mclk),
        .I2(rdySeq_i[1]),
        .I3(rdySeq_i[0]),
        .O(\rdySeq_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2543" *) 
  LUT4 #(
    .INIT(16'h9FF0)) 
    \rdySeq_i[1]_i_1 
       (.I0(rdySeq),
        .I1(rdySeq_to_mclk),
        .I2(rdySeq_i[1]),
        .I3(rdySeq_i[0]),
        .O(\rdySeq_i[1]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \rdySeq_i_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\rdySeq_i[0]_i_1_n_0 ),
        .Q(rdySeq_i[0]));
  FDCE #(
    .INIT(1'b0)) 
    \rdySeq_i_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\rdySeq_i[1]_i_1_n_0 ),
        .Q(rdySeq_i[1]));
  LUT3 #(
    .INIT(8'hE8)) 
    rdySeq_mclk_i_1
       (.I0(rdySeq_to_mclkm2),
        .I1(rdySeq_to_mclkm1),
        .I2(rdySeq_mclk),
        .O(rdySeq_mclk_i_1_n_0));
  FDCE rdySeq_mclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(rdySeq_mclk_i_1_n_0),
        .Q(rdySeq_mclk));
  LUT4 #(
    .INIT(16'hCAAA)) 
    rdySeq_to_mclk_i_1
       (.I0(rdySeq_to_mclk),
        .I1(rdySeq),
        .I2(rdySeq_i[0]),
        .I3(rdySeq_i[1]),
        .O(rdySeq_to_mclk_i_1_n_0));
  FDCE rdySeq_to_mclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(rdySeq_to_mclk_i_1_n_0),
        .Q(rdySeq_to_mclk));
  FDCE rdySeq_to_mclkm1_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(rdySeq_to_mclk),
        .Q(rdySeq_to_mclkm1));
  FDCE rdySeq_to_mclkm2_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(rdySeq_to_mclkm1),
        .Q(rdySeq_to_mclkm2));
  (* SOFT_HLUTNM = "soft_lutpair2519" *) 
  LUT5 #(
    .INIT(32'h5595FFFF)) 
    \reqOpToSeqClear_i[0]_i_1 
       (.I0(reqOpToSeqClear_to_memclk_reg_n_0),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .I3(stateOp[0]),
        .I4(reqOpToSeqClear_i),
        .O(\reqOpToSeqClear_i[0]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \reqOpToSeqClear_i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\reqOpToSeqClear_i[0]_i_1_n_0 ),
        .Q(reqOpToSeqClear_i));
  LUT3 #(
    .INIT(8'hE8)) 
    reqOpToSeqClear_memclk_i_1
       (.I0(reqOpToSeqClear_to_memclkm2),
        .I1(reqOpToSeqClear_to_memclkm1),
        .I2(reqOpToSeqClear_memclk),
        .O(reqOpToSeqClear_memclk_i_1_n_0));
  FDCE reqOpToSeqClear_memclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(reqOpToSeqClear_memclk_i_1_n_0),
        .Q(reqOpToSeqClear_memclk));
  (* SOFT_HLUTNM = "soft_lutpair2519" *) 
  LUT5 #(
    .INIT(32'h75552000)) 
    reqOpToSeqClear_to_memclk_i_1
       (.I0(reqOpToSeqClear_i),
        .I1(stateOp[0]),
        .I2(stateOp[2]),
        .I3(stateOp[1]),
        .I4(reqOpToSeqClear_to_memclk_reg_n_0),
        .O(reqOpToSeqClear_to_memclk_i_1_n_0));
  FDCE reqOpToSeqClear_to_memclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(reqOpToSeqClear_to_memclk_i_1_n_0),
        .Q(reqOpToSeqClear_to_memclk_reg_n_0));
  FDCE reqOpToSeqClear_to_memclkm1_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(reqOpToSeqClear_to_memclk_reg_n_0),
        .Q(reqOpToSeqClear_to_memclkm1));
  FDCE reqOpToSeqClear_to_memclkm2_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(reqOpToSeqClear_to_memclkm1),
        .Q(reqOpToSeqClear_to_memclkm2));
  (* SOFT_HLUTNM = "soft_lutpair2518" *) 
  LUT5 #(
    .INIT(32'h5595FFFF)) 
    \reqSeqbufBToSeqClear_i[0]_i_1 
       (.I0(reqSeqbufBToSeqClear_to_memclk_reg_n_0),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[0]),
        .I3(stateSeqbufB_reg[1]),
        .I4(reqSeqbufBToSeqClear_i),
        .O(\reqSeqbufBToSeqClear_i[0]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \reqSeqbufBToSeqClear_i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\reqSeqbufBToSeqClear_i[0]_i_1_n_0 ),
        .Q(reqSeqbufBToSeqClear_i));
  LUT3 #(
    .INIT(8'hE8)) 
    reqSeqbufBToSeqClear_memclk_i_1
       (.I0(reqSeqbufBToSeqClear_to_memclkm2),
        .I1(reqSeqbufBToSeqClear_to_memclkm1),
        .I2(reqSeqbufBToSeqClear_memclk),
        .O(reqSeqbufBToSeqClear_memclk_i_1_n_0));
  FDCE reqSeqbufBToSeqClear_memclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(reqSeqbufBToSeqClear_memclk_i_1_n_0),
        .Q(reqSeqbufBToSeqClear_memclk));
  (* SOFT_HLUTNM = "soft_lutpair2518" *) 
  LUT5 #(
    .INIT(32'h75552000)) 
    reqSeqbufBToSeqClear_to_memclk_i_1
       (.I0(reqSeqbufBToSeqClear_i),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(stateSeqbufB_reg[2]),
        .I4(reqSeqbufBToSeqClear_to_memclk_reg_n_0),
        .O(reqSeqbufBToSeqClear_to_memclk_i_1_n_0));
  FDCE reqSeqbufBToSeqClear_to_memclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(reqSeqbufBToSeqClear_to_memclk_i_1_n_0),
        .Q(reqSeqbufBToSeqClear_to_memclk_reg_n_0));
  FDCE reqSeqbufBToSeqClear_to_memclkm1_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(reqSeqbufBToSeqClear_to_memclk_reg_n_0),
        .Q(reqSeqbufBToSeqClear_to_memclkm1));
  FDCE reqSeqbufBToSeqClear_to_memclkm2_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(reqSeqbufBToSeqClear_to_memclkm1),
        .Q(reqSeqbufBToSeqClear_to_memclkm2));
  LUT6 #(
    .INIT(64'hFFFFFFF300000500)) 
    restart_i_1__0
       (.I0(restart_reg_0),
        .I1(strb_last_reg_0),
        .I2(stateOp[2]),
        .I3(stateOp[0]),
        .I4(stateOp[1]),
        .I5(restart_reg_n_0),
        .O(restart_i_1__0_n_0));
  FDCE restart_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(restart_i_1__0_n_0),
        .Q(restart_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2516" *) 
  LUT3 #(
    .INIT(8'h42)) 
    \retbuf[0][0]_i_10 
       (.I0(stateOp[1]),
        .I1(stateOp[2]),
        .I2(stateOp[0]),
        .O(memtrackGetInfoTixVState[0]));
  FDCE rng_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(rng_reg_1),
        .Q(rng_reg_0));
  LUT5 #(
    .INIT(32'h00000001)) 
    staFallingNotRising_i_1
       (.I0(D[17]),
        .I1(D[19]),
        .I2(D[21]),
        .I3(D[23]),
        .I4(staFallingNotRising_i_2_n_0),
        .O(staFallingNotRising_i_1_n_0));
  LUT4 #(
    .INIT(16'h7FFF)) 
    staFallingNotRising_i_2
       (.I0(D[18]),
        .I1(D[16]),
        .I2(D[22]),
        .I3(D[20]),
        .O(staFallingNotRising_i_2_n_0));
  FDCE staFallingNotRising_reg
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(staFallingNotRising_i_1_n_0),
        .Q(staFallingNotRising_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2537" *) 
  LUT4 #(
    .INIT(16'h5547)) 
    \staTixVTrigger[7]_i_2 
       (.I0(strb_last_reg_0),
        .I1(stateOp[2]),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .O(\stateOp_reg[2]_0 ));
  LUT4 #(
    .INIT(16'h5755)) 
    \staTixVTrigger_i[0]_i_1 
       (.I0(staTixVTrigger_i),
        .I1(\staTixVTrigger_to_memclk[7]_i_2_n_0 ),
        .I2(\staTixVTrigger_to_memclk[7]_i_3_n_0 ),
        .I3(\staTixVTrigger_to_memclk[7]_i_4_n_0 ),
        .O(\staTixVTrigger_i[0]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \staTixVTrigger_i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_i[0]_i_1_n_0 ),
        .Q(staTixVTrigger_i));
  LUT6 #(
    .INIT(64'h9009000000000000)) 
    \staTixVTrigger_memclk[7]_i_1 
       (.I0(staTixVTrigger_to_memclkm2[7]),
        .I1(staTixVTrigger_to_memclkm1[7]),
        .I2(staTixVTrigger_to_memclkm2[6]),
        .I3(staTixVTrigger_to_memclkm1[6]),
        .I4(\staTixVTrigger_memclk[7]_i_2_n_0 ),
        .I5(\staTixVTrigger_memclk[7]_i_3_n_0 ),
        .O(staTixVTrigger_memclk0));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \staTixVTrigger_memclk[7]_i_2 
       (.I0(staTixVTrigger_to_memclkm1[3]),
        .I1(staTixVTrigger_to_memclkm2[3]),
        .I2(staTixVTrigger_to_memclkm2[5]),
        .I3(staTixVTrigger_to_memclkm1[5]),
        .I4(staTixVTrigger_to_memclkm2[4]),
        .I5(staTixVTrigger_to_memclkm1[4]),
        .O(\staTixVTrigger_memclk[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \staTixVTrigger_memclk[7]_i_3 
       (.I0(staTixVTrigger_to_memclkm1[0]),
        .I1(staTixVTrigger_to_memclkm2[0]),
        .I2(staTixVTrigger_to_memclkm2[2]),
        .I3(staTixVTrigger_to_memclkm1[2]),
        .I4(staTixVTrigger_to_memclkm2[1]),
        .I5(staTixVTrigger_to_memclkm1[1]),
        .O(\staTixVTrigger_memclk[7]_i_3_n_0 ));
  FDCE \staTixVTrigger_memclk_reg[0] 
       (.C(memclk),
        .CE(staTixVTrigger_memclk0),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm2[0]),
        .Q(staTixVTrigger_memclk[0]));
  FDCE \staTixVTrigger_memclk_reg[1] 
       (.C(memclk),
        .CE(staTixVTrigger_memclk0),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm2[1]),
        .Q(staTixVTrigger_memclk[1]));
  FDCE \staTixVTrigger_memclk_reg[2] 
       (.C(memclk),
        .CE(staTixVTrigger_memclk0),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm2[2]),
        .Q(staTixVTrigger_memclk__0[2]));
  FDCE \staTixVTrigger_memclk_reg[3] 
       (.C(memclk),
        .CE(staTixVTrigger_memclk0),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm2[3]),
        .Q(staTixVTrigger_memclk__0[3]));
  FDCE \staTixVTrigger_memclk_reg[4] 
       (.C(memclk),
        .CE(staTixVTrigger_memclk0),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm2[4]),
        .Q(staTixVTrigger_memclk__0[4]));
  FDCE \staTixVTrigger_memclk_reg[5] 
       (.C(memclk),
        .CE(staTixVTrigger_memclk0),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm2[5]),
        .Q(staTixVTrigger_memclk__0[5]));
  FDCE \staTixVTrigger_memclk_reg[6] 
       (.C(memclk),
        .CE(staTixVTrigger_memclk0),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm2[6]),
        .Q(staTixVTrigger_memclk__0[6]));
  FDCE \staTixVTrigger_memclk_reg[7] 
       (.C(memclk),
        .CE(staTixVTrigger_memclk0),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm2[7]),
        .Q(staTixVTrigger_memclk__0[7]));
  FDCE \staTixVTrigger_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg[7]_0 [0]),
        .Q(\staTixVTrigger_reg_n_0_[0] ));
  FDCE \staTixVTrigger_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg[7]_0 [1]),
        .Q(\staTixVTrigger_reg_n_0_[1] ));
  FDCE \staTixVTrigger_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg[7]_0 [2]),
        .Q(\staTixVTrigger_reg_n_0_[2] ));
  FDCE \staTixVTrigger_reg[3] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg[7]_0 [3]),
        .Q(\staTixVTrigger_reg_n_0_[3] ));
  FDCE \staTixVTrigger_reg[4] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg[7]_0 [4]),
        .Q(\staTixVTrigger_reg_n_0_[4] ));
  FDCE \staTixVTrigger_reg[5] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg[7]_0 [5]),
        .Q(\staTixVTrigger_reg_n_0_[5] ));
  FDCE \staTixVTrigger_reg[6] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg[7]_0 [6]),
        .Q(\staTixVTrigger_reg_n_0_[6] ));
  FDCE \staTixVTrigger_reg[7] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg[7]_0 [7]),
        .Q(\staTixVTrigger_reg_n_0_[7] ));
  LUT4 #(
    .INIT(16'hA8AA)) 
    \staTixVTrigger_to_memclk[7]_i_1 
       (.I0(staTixVTrigger_i),
        .I1(\staTixVTrigger_to_memclk[7]_i_2_n_0 ),
        .I2(\staTixVTrigger_to_memclk[7]_i_3_n_0 ),
        .I3(\staTixVTrigger_to_memclk[7]_i_4_n_0 ),
        .O(staTixVTrigger_to_memclk));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \staTixVTrigger_to_memclk[7]_i_2 
       (.I0(\staTixVTrigger_to_memclk_reg_n_0_[3] ),
        .I1(\staTixVTrigger_reg_n_0_[3] ),
        .I2(\staTixVTrigger_reg_n_0_[5] ),
        .I3(\staTixVTrigger_to_memclk_reg_n_0_[5] ),
        .I4(\staTixVTrigger_reg_n_0_[4] ),
        .I5(\staTixVTrigger_to_memclk_reg_n_0_[4] ),
        .O(\staTixVTrigger_to_memclk[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \staTixVTrigger_to_memclk[7]_i_3 
       (.I0(\staTixVTrigger_to_memclk_reg_n_0_[0] ),
        .I1(\staTixVTrigger_reg_n_0_[0] ),
        .I2(\staTixVTrigger_reg_n_0_[1] ),
        .I3(\staTixVTrigger_to_memclk_reg_n_0_[1] ),
        .I4(\staTixVTrigger_reg_n_0_[2] ),
        .I5(\staTixVTrigger_to_memclk_reg_n_0_[2] ),
        .O(\staTixVTrigger_to_memclk[7]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \staTixVTrigger_to_memclk[7]_i_4 
       (.I0(\staTixVTrigger_to_memclk_reg_n_0_[7] ),
        .I1(\staTixVTrigger_reg_n_0_[7] ),
        .I2(\staTixVTrigger_to_memclk_reg_n_0_[6] ),
        .I3(\staTixVTrigger_reg_n_0_[6] ),
        .O(\staTixVTrigger_to_memclk[7]_i_4_n_0 ));
  FDCE \staTixVTrigger_to_memclk_reg[0] 
       (.C(aclk_sig),
        .CE(staTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg_n_0_[0] ),
        .Q(\staTixVTrigger_to_memclk_reg_n_0_[0] ));
  FDCE \staTixVTrigger_to_memclk_reg[1] 
       (.C(aclk_sig),
        .CE(staTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg_n_0_[1] ),
        .Q(\staTixVTrigger_to_memclk_reg_n_0_[1] ));
  FDCE \staTixVTrigger_to_memclk_reg[2] 
       (.C(aclk_sig),
        .CE(staTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg_n_0_[2] ),
        .Q(\staTixVTrigger_to_memclk_reg_n_0_[2] ));
  FDCE \staTixVTrigger_to_memclk_reg[3] 
       (.C(aclk_sig),
        .CE(staTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg_n_0_[3] ),
        .Q(\staTixVTrigger_to_memclk_reg_n_0_[3] ));
  FDCE \staTixVTrigger_to_memclk_reg[4] 
       (.C(aclk_sig),
        .CE(staTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg_n_0_[4] ),
        .Q(\staTixVTrigger_to_memclk_reg_n_0_[4] ));
  FDCE \staTixVTrigger_to_memclk_reg[5] 
       (.C(aclk_sig),
        .CE(staTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg_n_0_[5] ),
        .Q(\staTixVTrigger_to_memclk_reg_n_0_[5] ));
  FDCE \staTixVTrigger_to_memclk_reg[6] 
       (.C(aclk_sig),
        .CE(staTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg_n_0_[6] ),
        .Q(\staTixVTrigger_to_memclk_reg_n_0_[6] ));
  FDCE \staTixVTrigger_to_memclk_reg[7] 
       (.C(aclk_sig),
        .CE(staTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\staTixVTrigger_reg_n_0_[7] ),
        .Q(\staTixVTrigger_to_memclk_reg_n_0_[7] ));
  FDCE \staTixVTrigger_to_memclkm1_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\staTixVTrigger_to_memclk_reg_n_0_[0] ),
        .Q(staTixVTrigger_to_memclkm1[0]));
  FDCE \staTixVTrigger_to_memclkm1_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\staTixVTrigger_to_memclk_reg_n_0_[1] ),
        .Q(staTixVTrigger_to_memclkm1[1]));
  FDCE \staTixVTrigger_to_memclkm1_reg[2] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\staTixVTrigger_to_memclk_reg_n_0_[2] ),
        .Q(staTixVTrigger_to_memclkm1[2]));
  FDCE \staTixVTrigger_to_memclkm1_reg[3] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\staTixVTrigger_to_memclk_reg_n_0_[3] ),
        .Q(staTixVTrigger_to_memclkm1[3]));
  FDCE \staTixVTrigger_to_memclkm1_reg[4] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\staTixVTrigger_to_memclk_reg_n_0_[4] ),
        .Q(staTixVTrigger_to_memclkm1[4]));
  FDCE \staTixVTrigger_to_memclkm1_reg[5] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\staTixVTrigger_to_memclk_reg_n_0_[5] ),
        .Q(staTixVTrigger_to_memclkm1[5]));
  FDCE \staTixVTrigger_to_memclkm1_reg[6] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\staTixVTrigger_to_memclk_reg_n_0_[6] ),
        .Q(staTixVTrigger_to_memclkm1[6]));
  FDCE \staTixVTrigger_to_memclkm1_reg[7] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\staTixVTrigger_to_memclk_reg_n_0_[7] ),
        .Q(staTixVTrigger_to_memclkm1[7]));
  FDCE \staTixVTrigger_to_memclkm2_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm1[0]),
        .Q(staTixVTrigger_to_memclkm2[0]));
  FDCE \staTixVTrigger_to_memclkm2_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm1[1]),
        .Q(staTixVTrigger_to_memclkm2[1]));
  FDCE \staTixVTrigger_to_memclkm2_reg[2] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm1[2]),
        .Q(staTixVTrigger_to_memclkm2[2]));
  FDCE \staTixVTrigger_to_memclkm2_reg[3] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm1[3]),
        .Q(staTixVTrigger_to_memclkm2[3]));
  FDCE \staTixVTrigger_to_memclkm2_reg[4] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm1[4]),
        .Q(staTixVTrigger_to_memclkm2[4]));
  FDCE \staTixVTrigger_to_memclkm2_reg[5] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm1[5]),
        .Q(staTixVTrigger_to_memclkm2[5]));
  FDCE \staTixVTrigger_to_memclkm2_reg[6] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm1[6]),
        .Q(staTixVTrigger_to_memclkm2[6]));
  FDCE \staTixVTrigger_to_memclkm2_reg[7] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(staTixVTrigger_to_memclkm1[7]),
        .Q(staTixVTrigger_to_memclkm2[7]));
  LUT4 #(
    .INIT(16'h9F0F)) 
    \start_i[0]_i_1 
       (.I0(start_to_mclk),
        .I1(start),
        .I2(start_i[0]),
        .I3(start_i[1]),
        .O(\start_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2558" *) 
  LUT4 #(
    .INIT(16'h9FF0)) 
    \start_i[1]_i_1 
       (.I0(start_to_mclk),
        .I1(start),
        .I2(start_i[0]),
        .I3(start_i[1]),
        .O(\start_i[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00003808)) 
    start_i_1
       (.I0(start_reg_0),
        .I1(staTixVTrigger_memclk[1]),
        .I2(staTixVTrigger_memclk[0]),
        .I3(stop_reg_0),
        .I4(start_i_2_n_0),
        .O(start_i_1_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    start_i_2
       (.I0(staTixVTrigger_memclk__0[6]),
        .I1(staTixVTrigger_memclk__0[7]),
        .I2(staTixVTrigger_memclk__0[3]),
        .I3(staTixVTrigger_memclk__0[2]),
        .I4(staTixVTrigger_memclk__0[5]),
        .I5(staTixVTrigger_memclk__0[4]),
        .O(start_i_2_n_0));
  FDCE #(
    .INIT(1'b0)) 
    \start_i_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\start_i[0]_i_1_n_0 ),
        .Q(start_i[0]));
  FDCE #(
    .INIT(1'b0)) 
    \start_i_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\start_i[1]_i_1_n_0 ),
        .Q(start_i[1]));
  LUT3 #(
    .INIT(8'hE8)) 
    start_mclk_i_1
       (.I0(start_to_mclkm2),
        .I1(start_to_mclkm1),
        .I2(start_mclk),
        .O(start_mclk_i_1_n_0));
  FDCE start_mclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(start_mclk_i_1_n_0),
        .Q(start_mclk));
  FDCE start_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(start_i_1_n_0),
        .Q(start));
  (* SOFT_HLUTNM = "soft_lutpair2558" *) 
  LUT4 #(
    .INIT(16'hE4CC)) 
    start_to_mclk_i_1
       (.I0(start_i[1]),
        .I1(start_to_mclk),
        .I2(start),
        .I3(start_i[0]),
        .O(start_to_mclk_i_1_n_0));
  FDCE start_to_mclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(start_to_mclk_i_1_n_0),
        .Q(start_to_mclk));
  FDCE start_to_mclkm1_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(start_to_mclk),
        .Q(start_to_mclkm1));
  FDCE start_to_mclkm2_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(start_to_mclkm1),
        .Q(start_to_mclkm2));
  (* SOFT_HLUTNM = "soft_lutpair2537" *) 
  LUT4 #(
    .INIT(16'h577D)) 
    \stateOp[0]_i_1__2 
       (.I0(strb_last_reg_0),
        .I1(stateOp[1]),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .O(\stateOp[0]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h0C0000FA00000000)) 
    \stateOp[1]_i_1__2 
       (.I0(rng_reg_0),
        .I1(restart_reg_n_0),
        .I2(stateOp[1]),
        .I3(stateOp[2]),
        .I4(stateOp[0]),
        .I5(strb_last_reg_0),
        .O(\stateOp[1]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'hBB0BB0BB)) 
    \stateOp[2]_i_10__0 
       (.I0(\stateOp[2]_i_36__0_n_0 ),
        .I1(\stateOp[2]_i_37__0_n_0 ),
        .I2(staFallingNotRising_reg_n_0),
        .I3(start_mclk),
        .I4(strb_last_reg_n_0),
        .O(\stateOp[2]_i_10__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2516" *) 
  LUT5 #(
    .INIT(32'hBAAAAAAA)) 
    \stateOp[2]_i_11__0 
       (.I0(\stateOp_reg[2]_0 ),
        .I1(stateOp[0]),
        .I2(stateOp[2]),
        .I3(stateOp[1]),
        .I4(rdySeq_mclk),
        .O(\stateOp[2]_i_11__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_13__0 
       (.I0(Q[31]),
        .I1(\TCaptMax_reg_n_0_[31] ),
        .I2(Q[30]),
        .I3(\TCaptMax_reg_n_0_[30] ),
        .O(\stateOp[2]_i_13__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_14 
       (.I0(Q[29]),
        .I1(\TCaptMax_reg_n_0_[29] ),
        .I2(Q[28]),
        .I3(\TCaptMax_reg_n_0_[28] ),
        .O(\stateOp[2]_i_14_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_15__0 
       (.I0(Q[27]),
        .I1(\TCaptMax_reg_n_0_[27] ),
        .I2(Q[26]),
        .I3(\TCaptMax_reg_n_0_[26] ),
        .O(\stateOp[2]_i_15__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_16__0 
       (.I0(Q[25]),
        .I1(\TCaptMax_reg_n_0_[25] ),
        .I2(Q[24]),
        .I3(\TCaptMax_reg_n_0_[24] ),
        .O(\stateOp[2]_i_16__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_17__0 
       (.I0(Q[23]),
        .I1(\TCaptMax_reg_n_0_[23] ),
        .I2(Q[22]),
        .I3(\TCaptMax_reg_n_0_[22] ),
        .O(\stateOp[2]_i_17__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_18__0 
       (.I0(Q[21]),
        .I1(\TCaptMax_reg_n_0_[21] ),
        .I2(Q[20]),
        .I3(\TCaptMax_reg_n_0_[20] ),
        .O(\stateOp[2]_i_18__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_19__0 
       (.I0(Q[19]),
        .I1(\TCaptMax_reg_n_0_[19] ),
        .I2(Q[18]),
        .I3(\TCaptMax_reg_n_0_[18] ),
        .O(\stateOp[2]_i_19__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFEEE40000)) 
    \stateOp[2]_i_1__0 
       (.I0(stateOp[0]),
        .I1(\stateOp[2]_i_3__0_n_0 ),
        .I2(rdySeq_mclk),
        .I3(restart_reg_n_0),
        .I4(memtrackGetInfoTixVState[1]),
        .I5(\stateOp[2]_i_5__0_n_0 ),
        .O(\stateOp[2]_i_1__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_20__0 
       (.I0(Q[17]),
        .I1(\TCaptMax_reg_n_0_[17] ),
        .I2(Q[16]),
        .I3(\TCaptMax_reg_n_0_[16] ),
        .O(\stateOp[2]_i_20__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_21__0 
       (.I0(\TCaptMax_reg_n_0_[31] ),
        .I1(Q[31]),
        .I2(\TCaptMax_reg_n_0_[30] ),
        .I3(Q[30]),
        .O(\stateOp[2]_i_21__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_22__0 
       (.I0(\TCaptMax_reg_n_0_[29] ),
        .I1(Q[29]),
        .I2(\TCaptMax_reg_n_0_[28] ),
        .I3(Q[28]),
        .O(\stateOp[2]_i_22__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_23__0 
       (.I0(\TCaptMax_reg_n_0_[27] ),
        .I1(Q[27]),
        .I2(\TCaptMax_reg_n_0_[26] ),
        .I3(Q[26]),
        .O(\stateOp[2]_i_23__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_24__0 
       (.I0(\TCaptMax_reg_n_0_[25] ),
        .I1(Q[25]),
        .I2(\TCaptMax_reg_n_0_[24] ),
        .I3(Q[24]),
        .O(\stateOp[2]_i_24__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_25__0 
       (.I0(\TCaptMax_reg_n_0_[23] ),
        .I1(Q[23]),
        .I2(\TCaptMax_reg_n_0_[22] ),
        .I3(Q[22]),
        .O(\stateOp[2]_i_25__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_26__0 
       (.I0(\TCaptMax_reg_n_0_[21] ),
        .I1(Q[21]),
        .I2(\TCaptMax_reg_n_0_[20] ),
        .I3(Q[20]),
        .O(\stateOp[2]_i_26__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_27__0 
       (.I0(\TCaptMax_reg_n_0_[19] ),
        .I1(Q[19]),
        .I2(\TCaptMax_reg_n_0_[18] ),
        .I3(Q[18]),
        .O(\stateOp[2]_i_27__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_28__0 
       (.I0(\TCaptMax_reg_n_0_[17] ),
        .I1(Q[17]),
        .I2(\TCaptMax_reg_n_0_[16] ),
        .I3(Q[16]),
        .O(\stateOp[2]_i_28__0_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_29__0 
       (.I0(\TCaptMax_reg_n_0_[5] ),
        .I1(\TCaptMax_reg_n_0_[4] ),
        .I2(\TCaptMax_reg_n_0_[7] ),
        .I3(\TCaptMax_reg_n_0_[6] ),
        .O(\stateOp[2]_i_29__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2515" *) 
  LUT5 #(
    .INIT(32'h00004E46)) 
    \stateOp[2]_i_2__0 
       (.I0(stateOp[2]),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(restart_reg_n_0),
        .I4(\stateOp_reg[2]_0 ),
        .O(\stateOp[2]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[2]_i_30__0 
       (.I0(\TCaptMax_reg_n_0_[8] ),
        .I1(\TCaptMax_reg_n_0_[11] ),
        .I2(\TCaptMax_reg_n_0_[9] ),
        .I3(\TCaptMax_reg_n_0_[10] ),
        .I4(\stateOp[2]_i_54__0_n_0 ),
        .O(\stateOp[2]_i_30__0_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_31__0 
       (.I0(\TCaptMax_reg_n_0_[21] ),
        .I1(\TCaptMax_reg_n_0_[20] ),
        .I2(\TCaptMax_reg_n_0_[23] ),
        .I3(\TCaptMax_reg_n_0_[22] ),
        .O(\stateOp[2]_i_31__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[2]_i_32__0 
       (.I0(\TCaptMax_reg_n_0_[24] ),
        .I1(\TCaptMax_reg_n_0_[27] ),
        .I2(\TCaptMax_reg_n_0_[25] ),
        .I3(\TCaptMax_reg_n_0_[26] ),
        .I4(\stateOp[2]_i_55__0_n_0 ),
        .O(\stateOp[2]_i_32__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF7FFF)) 
    \stateOp[2]_i_33__0 
       (.I0(Q[8]),
        .I1(Q[29]),
        .I2(Q[9]),
        .I3(Q[13]),
        .I4(\stateOp[2]_i_56__0_n_0 ),
        .O(\stateOp[2]_i_33__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF7FFF)) 
    \stateOp[2]_i_34__0 
       (.I0(Q[17]),
        .I1(Q[20]),
        .I2(Q[18]),
        .I3(Q[19]),
        .I4(\stateOp[2]_i_57__0_n_0 ),
        .O(\stateOp[2]_i_34__0_n_0 ));
  LUT5 #(
    .INIT(32'h00008000)) 
    \stateOp[2]_i_35__0 
       (.I0(Q[25]),
        .I1(Q[31]),
        .I2(Q[27]),
        .I3(Q[28]),
        .I4(\stateOp[2]_i_58_n_0 ),
        .O(\stateOp[2]_i_35__0_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_36__0 
       (.I0(\staTixVTrigger_reg_n_0_[6] ),
        .I1(\staTixVTrigger_reg_n_0_[5] ),
        .I2(\staTixVTrigger_reg_n_0_[7] ),
        .I3(\staTixVTrigger_reg_n_0_[4] ),
        .O(\stateOp[2]_i_36__0_n_0 ));
  LUT4 #(
    .INIT(16'h0001)) 
    \stateOp[2]_i_37__0 
       (.I0(\staTixVTrigger_reg_n_0_[3] ),
        .I1(\staTixVTrigger_reg_n_0_[0] ),
        .I2(\staTixVTrigger_reg_n_0_[2] ),
        .I3(\staTixVTrigger_reg_n_0_[1] ),
        .O(\stateOp[2]_i_37__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_38__0 
       (.I0(Q[15]),
        .I1(\TCaptMax_reg_n_0_[15] ),
        .I2(Q[14]),
        .I3(\TCaptMax_reg_n_0_[14] ),
        .O(\stateOp[2]_i_38__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_39__0 
       (.I0(Q[13]),
        .I1(\TCaptMax_reg_n_0_[13] ),
        .I2(Q[12]),
        .I3(\TCaptMax_reg_n_0_[12] ),
        .O(\stateOp[2]_i_39__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF54545400)) 
    \stateOp[2]_i_3__0 
       (.I0(\FSM_onehot_stateSeq[3]_i_3__0_n_0 ),
        .I1(\stateOp_reg[2]_i_6_n_0 ),
        .I2(avllenSeqbufMemtrackToHostif),
        .I3(\stateOp[2]_i_7_n_0 ),
        .I4(\stateOp[2]_i_8__0_n_0 ),
        .I5(\stateOp[2]_i_9_n_0 ),
        .O(\stateOp[2]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2533" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp[2]_i_4 
       (.I0(stateOp[2]),
        .I1(stateOp[1]),
        .O(memtrackGetInfoTixVState[1]));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_40__0 
       (.I0(Q[11]),
        .I1(\TCaptMax_reg_n_0_[11] ),
        .I2(Q[10]),
        .I3(\TCaptMax_reg_n_0_[10] ),
        .O(\stateOp[2]_i_40__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_41__0 
       (.I0(Q[9]),
        .I1(\TCaptMax_reg_n_0_[9] ),
        .I2(Q[8]),
        .I3(\TCaptMax_reg_n_0_[8] ),
        .O(\stateOp[2]_i_41__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_42__0 
       (.I0(Q[7]),
        .I1(\TCaptMax_reg_n_0_[7] ),
        .I2(Q[6]),
        .I3(\TCaptMax_reg_n_0_[6] ),
        .O(\stateOp[2]_i_42__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_43__0 
       (.I0(Q[5]),
        .I1(\TCaptMax_reg_n_0_[5] ),
        .I2(Q[4]),
        .I3(\TCaptMax_reg_n_0_[4] ),
        .O(\stateOp[2]_i_43__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_44__0 
       (.I0(Q[3]),
        .I1(\TCaptMax_reg_n_0_[3] ),
        .I2(Q[2]),
        .I3(\TCaptMax_reg_n_0_[2] ),
        .O(\stateOp[2]_i_44__0_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_45__0 
       (.I0(Q[1]),
        .I1(\TCaptMax_reg_n_0_[1] ),
        .I2(Q[0]),
        .I3(\TCaptMax_reg_n_0_[0] ),
        .O(\stateOp[2]_i_45__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_46__0 
       (.I0(\TCaptMax_reg_n_0_[15] ),
        .I1(Q[15]),
        .I2(\TCaptMax_reg_n_0_[14] ),
        .I3(Q[14]),
        .O(\stateOp[2]_i_46__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_47__0 
       (.I0(\TCaptMax_reg_n_0_[13] ),
        .I1(Q[13]),
        .I2(\TCaptMax_reg_n_0_[12] ),
        .I3(Q[12]),
        .O(\stateOp[2]_i_47__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_48__0 
       (.I0(\TCaptMax_reg_n_0_[11] ),
        .I1(Q[11]),
        .I2(\TCaptMax_reg_n_0_[10] ),
        .I3(Q[10]),
        .O(\stateOp[2]_i_48__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_49__0 
       (.I0(\TCaptMax_reg_n_0_[9] ),
        .I1(Q[9]),
        .I2(\TCaptMax_reg_n_0_[8] ),
        .I3(Q[8]),
        .O(\stateOp[2]_i_49__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_50__0 
       (.I0(\TCaptMax_reg_n_0_[7] ),
        .I1(Q[7]),
        .I2(\TCaptMax_reg_n_0_[6] ),
        .I3(Q[6]),
        .O(\stateOp[2]_i_50__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_51__0 
       (.I0(\TCaptMax_reg_n_0_[5] ),
        .I1(Q[5]),
        .I2(\TCaptMax_reg_n_0_[4] ),
        .I3(Q[4]),
        .O(\stateOp[2]_i_51__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_52__0 
       (.I0(\TCaptMax_reg_n_0_[3] ),
        .I1(Q[3]),
        .I2(\TCaptMax_reg_n_0_[2] ),
        .I3(Q[2]),
        .O(\stateOp[2]_i_52__0_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_53__0 
       (.I0(\TCaptMax_reg_n_0_[1] ),
        .I1(Q[1]),
        .I2(\TCaptMax_reg_n_0_[0] ),
        .I3(Q[0]),
        .O(\stateOp[2]_i_53__0_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_54__0 
       (.I0(\TCaptMax_reg_n_0_[13] ),
        .I1(\TCaptMax_reg_n_0_[12] ),
        .I2(\TCaptMax_reg_n_0_[15] ),
        .I3(\TCaptMax_reg_n_0_[14] ),
        .O(\stateOp[2]_i_54__0_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_55__0 
       (.I0(\TCaptMax_reg_n_0_[29] ),
        .I1(\TCaptMax_reg_n_0_[28] ),
        .I2(\TCaptMax_reg_n_0_[31] ),
        .I3(\TCaptMax_reg_n_0_[30] ),
        .O(\stateOp[2]_i_55__0_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateOp[2]_i_56__0 
       (.I0(Q[23]),
        .I1(Q[10]),
        .I2(Q[24]),
        .I3(Q[22]),
        .O(\stateOp[2]_i_56__0_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateOp[2]_i_57__0 
       (.I0(Q[26]),
        .I1(Q[11]),
        .I2(Q[21]),
        .I3(Q[12]),
        .O(\stateOp[2]_i_57__0_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateOp[2]_i_58 
       (.I0(Q[15]),
        .I1(Q[14]),
        .I2(Q[30]),
        .I3(Q[16]),
        .O(\stateOp[2]_i_58_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF0000AF22)) 
    \stateOp[2]_i_5__0 
       (.I0(stateOp[1]),
        .I1(\stateOp[2]_i_10__0_n_0 ),
        .I2(restart_reg_0),
        .I3(stateOp[0]),
        .I4(stateOp[2]),
        .I5(\stateOp[2]_i_11__0_n_0 ),
        .O(\stateOp[2]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp[2]_i_7 
       (.I0(\stateOp[2]_i_29__0_n_0 ),
        .I1(\TCaptMax_reg_n_0_[3] ),
        .I2(\TCaptMax_reg_n_0_[2] ),
        .I3(\TCaptMax_reg_n_0_[1] ),
        .I4(\TCaptMax_reg_n_0_[0] ),
        .I5(\stateOp[2]_i_30__0_n_0 ),
        .O(\stateOp[2]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp[2]_i_8__0 
       (.I0(\stateOp[2]_i_31__0_n_0 ),
        .I1(\TCaptMax_reg_n_0_[17] ),
        .I2(\TCaptMax_reg_n_0_[16] ),
        .I3(\TCaptMax_reg_n_0_[19] ),
        .I4(\TCaptMax_reg_n_0_[18] ),
        .I5(\stateOp[2]_i_32__0_n_0 ),
        .O(\stateOp[2]_i_8__0_n_0 ));
  LUT6 #(
    .INIT(64'h242424FF24242424)) 
    \stateOp[2]_i_9 
       (.I0(stoFallingNotRising),
        .I1(stop_mclk),
        .I2(strb_last_reg_n_0),
        .I3(\stateOp[2]_i_33__0_n_0 ),
        .I4(\stateOp[2]_i_34__0_n_0 ),
        .I5(\stateOp[2]_i_35__0_n_0 ),
        .O(\stateOp[2]_i_9_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\stateOp[0]_i_1__2_n_0 ),
        .Q(stateOp[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\stateOp[1]_i_1__2_n_0 ),
        .Q(stateOp[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[2] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\stateOp[2]_i_2__0_n_0 ),
        .Q(stateOp[2]));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \stateOp_reg[2]_i_12 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\stateOp_reg[2]_i_12_n_0 ,\stateOp_reg[2]_i_12_n_1 ,\stateOp_reg[2]_i_12_n_2 ,\stateOp_reg[2]_i_12_n_3 ,\stateOp_reg[2]_i_12_n_4 ,\stateOp_reg[2]_i_12_n_5 ,\stateOp_reg[2]_i_12_n_6 ,\stateOp_reg[2]_i_12_n_7 }),
        .DI({\stateOp[2]_i_38__0_n_0 ,\stateOp[2]_i_39__0_n_0 ,\stateOp[2]_i_40__0_n_0 ,\stateOp[2]_i_41__0_n_0 ,\stateOp[2]_i_42__0_n_0 ,\stateOp[2]_i_43__0_n_0 ,\stateOp[2]_i_44__0_n_0 ,\stateOp[2]_i_45__0_n_0 }),
        .O(\NLW_stateOp_reg[2]_i_12_O_UNCONNECTED [7:0]),
        .S({\stateOp[2]_i_46__0_n_0 ,\stateOp[2]_i_47__0_n_0 ,\stateOp[2]_i_48__0_n_0 ,\stateOp[2]_i_49__0_n_0 ,\stateOp[2]_i_50__0_n_0 ,\stateOp[2]_i_51__0_n_0 ,\stateOp[2]_i_52__0_n_0 ,\stateOp[2]_i_53__0_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \stateOp_reg[2]_i_6 
       (.CI(\stateOp_reg[2]_i_12_n_0 ),
        .CI_TOP(1'b0),
        .CO({\stateOp_reg[2]_i_6_n_0 ,\stateOp_reg[2]_i_6_n_1 ,\stateOp_reg[2]_i_6_n_2 ,\stateOp_reg[2]_i_6_n_3 ,\stateOp_reg[2]_i_6_n_4 ,\stateOp_reg[2]_i_6_n_5 ,\stateOp_reg[2]_i_6_n_6 ,\stateOp_reg[2]_i_6_n_7 }),
        .DI({\stateOp[2]_i_13__0_n_0 ,\stateOp[2]_i_14_n_0 ,\stateOp[2]_i_15__0_n_0 ,\stateOp[2]_i_16__0_n_0 ,\stateOp[2]_i_17__0_n_0 ,\stateOp[2]_i_18__0_n_0 ,\stateOp[2]_i_19__0_n_0 ,\stateOp[2]_i_20__0_n_0 }),
        .O(\NLW_stateOp_reg[2]_i_6_O_UNCONNECTED [7:0]),
        .S({\stateOp[2]_i_21__0_n_0 ,\stateOp[2]_i_22__0_n_0 ,\stateOp[2]_i_23__0_n_0 ,\stateOp[2]_i_24__0_n_0 ,\stateOp[2]_i_25__0_n_0 ,\stateOp[2]_i_26__0_n_0 ,\stateOp[2]_i_27__0_n_0 ,\stateOp[2]_i_28__0_n_0 }));
  (* SOFT_HLUTNM = "soft_lutpair2541" *) 
  LUT4 #(
    .INIT(16'h0705)) 
    \stateSeqbufB[0]_i_1__0 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(dneSeqbufMemtrackToHostif),
        .O(p_0_in__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair2541" *) 
  LUT4 #(
    .INIT(16'h00BC)) 
    \stateSeqbufB[1]_i_1__0 
       (.I0(\stateSeqbufB[1]_i_2__0_n_0 ),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(stateSeqbufB_reg[2]),
        .O(p_0_in__0[1]));
  LUT5 #(
    .INIT(32'h2AAAAAAA)) 
    \stateSeqbufB[1]_i_2__0 
       (.I0(seqbufMemtrackToHostifAXIS_tready),
        .I1(\aSeqbufB_reg_n_0_[7] ),
        .I2(\aSeqbufB_reg_n_0_[6] ),
        .I3(\aSeqbufB[8]_i_4__0_n_0 ),
        .I4(\aSeqbufB_reg_n_0_[8] ),
        .O(\stateSeqbufB[1]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'hBBBBBABBABBBBABB)) 
    \stateSeqbufB[2]_i_1__0 
       (.I0(\stateSeqbufB[2]_i_3__0_n_0 ),
        .I1(stateSeqbufB_reg[2]),
        .I2(reqSeqbufMemtrackToHostif),
        .I3(stateSeqbufB_reg[0]),
        .I4(stateSeqbufB_reg[1]),
        .I5(seqbufMemtrackToHostifAXIS_tready),
        .O(\stateSeqbufB[2]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h00800F0000800000)) 
    \stateSeqbufB[2]_i_2__0 
       (.I0(\stateSeqbufB[2]_i_6_n_0 ),
        .I1(seqbufMemtrackToHostifAXIS_tready),
        .I2(stateSeqbufB_reg[1]),
        .I3(stateSeqbufB_reg[2]),
        .I4(stateSeqbufB_reg[0]),
        .I5(dneSeqbufMemtrackToHostif),
        .O(p_0_in__0[2]));
  LUT6 #(
    .INIT(64'h0000000000C088CC)) 
    \stateSeqbufB[2]_i_3__0 
       (.I0(dneSeqbufMemtrackToHostif),
        .I1(stateSeqbufB_reg[2]),
        .I2(ackSeqbufBToSeqClear),
        .I3(reqSeqbufMemtrackToHostif),
        .I4(stateSeqbufB_reg[0]),
        .I5(stateSeqbufB_reg[1]),
        .O(\stateSeqbufB[2]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2510" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \stateSeqbufB[2]_i_6 
       (.I0(\aSeqbufB_reg_n_0_[8] ),
        .I1(\aSeqbufB[8]_i_4__0_n_0 ),
        .I2(\aSeqbufB_reg_n_0_[6] ),
        .I3(\aSeqbufB_reg_n_0_[7] ),
        .O(\stateSeqbufB[2]_i_6_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(p_0_in__0[0]),
        .Q(stateSeqbufB_reg[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(p_0_in__0[1]),
        .Q(stateSeqbufB_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1__0_n_0 ),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(p_0_in__0[2]),
        .Q(stateSeqbufB_reg[2]));
  LUT5 #(
    .INIT(32'h00000001)) 
    stoFallingNotRising_i_1
       (.I0(D[1]),
        .I1(D[3]),
        .I2(D[5]),
        .I3(D[7]),
        .I4(stoFallingNotRising_i_2_n_0),
        .O(stoFallingNotRising_i_1_n_0));
  LUT4 #(
    .INIT(16'h7FFF)) 
    stoFallingNotRising_i_2
       (.I0(D[2]),
        .I1(D[0]),
        .I2(D[6]),
        .I3(D[4]),
        .O(stoFallingNotRising_i_2_n_0));
  FDCE stoFallingNotRising_reg
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stoFallingNotRising_i_1_n_0),
        .Q(stoFallingNotRising));
  LUT4 #(
    .INIT(16'h5755)) 
    \stoTixVTrigger_i[0]_i_1 
       (.I0(stoTixVTrigger_i),
        .I1(\stoTixVTrigger_to_memclk[7]_i_2_n_0 ),
        .I2(\stoTixVTrigger_to_memclk[7]_i_3_n_0 ),
        .I3(\stoTixVTrigger_to_memclk[7]_i_4_n_0 ),
        .O(\stoTixVTrigger_i[0]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stoTixVTrigger_i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\stoTixVTrigger_i[0]_i_1_n_0 ),
        .Q(stoTixVTrigger_i));
  LUT6 #(
    .INIT(64'h9009000000000000)) 
    \stoTixVTrigger_memclk[7]_i_1 
       (.I0(stoTixVTrigger_to_memclkm2[7]),
        .I1(stoTixVTrigger_to_memclkm1[7]),
        .I2(stoTixVTrigger_to_memclkm2[6]),
        .I3(stoTixVTrigger_to_memclkm1[6]),
        .I4(\stoTixVTrigger_memclk[7]_i_2_n_0 ),
        .I5(\stoTixVTrigger_memclk[7]_i_3_n_0 ),
        .O(stoTixVTrigger_memclk0));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stoTixVTrigger_memclk[7]_i_2 
       (.I0(stoTixVTrigger_to_memclkm1[3]),
        .I1(stoTixVTrigger_to_memclkm2[3]),
        .I2(stoTixVTrigger_to_memclkm2[5]),
        .I3(stoTixVTrigger_to_memclkm1[5]),
        .I4(stoTixVTrigger_to_memclkm2[4]),
        .I5(stoTixVTrigger_to_memclkm1[4]),
        .O(\stoTixVTrigger_memclk[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stoTixVTrigger_memclk[7]_i_3 
       (.I0(stoTixVTrigger_to_memclkm1[0]),
        .I1(stoTixVTrigger_to_memclkm2[0]),
        .I2(stoTixVTrigger_to_memclkm2[2]),
        .I3(stoTixVTrigger_to_memclkm1[2]),
        .I4(stoTixVTrigger_to_memclkm2[1]),
        .I5(stoTixVTrigger_to_memclkm1[1]),
        .O(\stoTixVTrigger_memclk[7]_i_3_n_0 ));
  FDCE \stoTixVTrigger_memclk_reg[0] 
       (.C(memclk),
        .CE(stoTixVTrigger_memclk0),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm2[0]),
        .Q(stoTixVTrigger_memclk[0]));
  FDCE \stoTixVTrigger_memclk_reg[1] 
       (.C(memclk),
        .CE(stoTixVTrigger_memclk0),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm2[1]),
        .Q(stoTixVTrigger_memclk[1]));
  FDCE \stoTixVTrigger_memclk_reg[2] 
       (.C(memclk),
        .CE(stoTixVTrigger_memclk0),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm2[2]),
        .Q(stoTixVTrigger_memclk__0[2]));
  FDCE \stoTixVTrigger_memclk_reg[3] 
       (.C(memclk),
        .CE(stoTixVTrigger_memclk0),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm2[3]),
        .Q(stoTixVTrigger_memclk__0[3]));
  FDCE \stoTixVTrigger_memclk_reg[4] 
       (.C(memclk),
        .CE(stoTixVTrigger_memclk0),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm2[4]),
        .Q(stoTixVTrigger_memclk__0[4]));
  FDCE \stoTixVTrigger_memclk_reg[5] 
       (.C(memclk),
        .CE(stoTixVTrigger_memclk0),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm2[5]),
        .Q(stoTixVTrigger_memclk__0[5]));
  FDCE \stoTixVTrigger_memclk_reg[6] 
       (.C(memclk),
        .CE(stoTixVTrigger_memclk0),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm2[6]),
        .Q(stoTixVTrigger_memclk__0[6]));
  FDCE \stoTixVTrigger_memclk_reg[7] 
       (.C(memclk),
        .CE(stoTixVTrigger_memclk0),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm2[7]),
        .Q(stoTixVTrigger_memclk__0[7]));
  FDCE \stoTixVTrigger_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[8]),
        .Q(stoTixVTrigger[0]));
  FDCE \stoTixVTrigger_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[9]),
        .Q(stoTixVTrigger[1]));
  FDCE \stoTixVTrigger_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[10]),
        .Q(stoTixVTrigger[2]));
  FDCE \stoTixVTrigger_reg[3] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[11]),
        .Q(stoTixVTrigger[3]));
  FDCE \stoTixVTrigger_reg[4] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[12]),
        .Q(stoTixVTrigger[4]));
  FDCE \stoTixVTrigger_reg[5] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[13]),
        .Q(stoTixVTrigger[5]));
  FDCE \stoTixVTrigger_reg[6] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[14]),
        .Q(stoTixVTrigger[6]));
  FDCE \stoTixVTrigger_reg[7] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(D[15]),
        .Q(stoTixVTrigger[7]));
  LUT4 #(
    .INIT(16'hA8AA)) 
    \stoTixVTrigger_to_memclk[7]_i_1 
       (.I0(stoTixVTrigger_i),
        .I1(\stoTixVTrigger_to_memclk[7]_i_2_n_0 ),
        .I2(\stoTixVTrigger_to_memclk[7]_i_3_n_0 ),
        .I3(\stoTixVTrigger_to_memclk[7]_i_4_n_0 ),
        .O(stoTixVTrigger_to_memclk));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \stoTixVTrigger_to_memclk[7]_i_2 
       (.I0(\stoTixVTrigger_to_memclk_reg_n_0_[3] ),
        .I1(stoTixVTrigger[3]),
        .I2(stoTixVTrigger[5]),
        .I3(\stoTixVTrigger_to_memclk_reg_n_0_[5] ),
        .I4(stoTixVTrigger[4]),
        .I5(\stoTixVTrigger_to_memclk_reg_n_0_[4] ),
        .O(\stoTixVTrigger_to_memclk[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \stoTixVTrigger_to_memclk[7]_i_3 
       (.I0(\stoTixVTrigger_to_memclk_reg_n_0_[0] ),
        .I1(stoTixVTrigger[0]),
        .I2(stoTixVTrigger[1]),
        .I3(\stoTixVTrigger_to_memclk_reg_n_0_[1] ),
        .I4(stoTixVTrigger[2]),
        .I5(\stoTixVTrigger_to_memclk_reg_n_0_[2] ),
        .O(\stoTixVTrigger_to_memclk[7]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stoTixVTrigger_to_memclk[7]_i_4 
       (.I0(\stoTixVTrigger_to_memclk_reg_n_0_[7] ),
        .I1(stoTixVTrigger[7]),
        .I2(\stoTixVTrigger_to_memclk_reg_n_0_[6] ),
        .I3(stoTixVTrigger[6]),
        .O(\stoTixVTrigger_to_memclk[7]_i_4_n_0 ));
  FDCE \stoTixVTrigger_to_memclk_reg[0] 
       (.C(aclk_sig),
        .CE(stoTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stoTixVTrigger[0]),
        .Q(\stoTixVTrigger_to_memclk_reg_n_0_[0] ));
  FDCE \stoTixVTrigger_to_memclk_reg[1] 
       (.C(aclk_sig),
        .CE(stoTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stoTixVTrigger[1]),
        .Q(\stoTixVTrigger_to_memclk_reg_n_0_[1] ));
  FDCE \stoTixVTrigger_to_memclk_reg[2] 
       (.C(aclk_sig),
        .CE(stoTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stoTixVTrigger[2]),
        .Q(\stoTixVTrigger_to_memclk_reg_n_0_[2] ));
  FDCE \stoTixVTrigger_to_memclk_reg[3] 
       (.C(aclk_sig),
        .CE(stoTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stoTixVTrigger[3]),
        .Q(\stoTixVTrigger_to_memclk_reg_n_0_[3] ));
  FDCE \stoTixVTrigger_to_memclk_reg[4] 
       (.C(aclk_sig),
        .CE(stoTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stoTixVTrigger[4]),
        .Q(\stoTixVTrigger_to_memclk_reg_n_0_[4] ));
  FDCE \stoTixVTrigger_to_memclk_reg[5] 
       (.C(aclk_sig),
        .CE(stoTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stoTixVTrigger[5]),
        .Q(\stoTixVTrigger_to_memclk_reg_n_0_[5] ));
  FDCE \stoTixVTrigger_to_memclk_reg[6] 
       (.C(aclk_sig),
        .CE(stoTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stoTixVTrigger[6]),
        .Q(\stoTixVTrigger_to_memclk_reg_n_0_[6] ));
  FDCE \stoTixVTrigger_to_memclk_reg[7] 
       (.C(aclk_sig),
        .CE(stoTixVTrigger_to_memclk),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stoTixVTrigger[7]),
        .Q(\stoTixVTrigger_to_memclk_reg_n_0_[7] ));
  FDCE \stoTixVTrigger_to_memclkm1_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\stoTixVTrigger_to_memclk_reg_n_0_[0] ),
        .Q(stoTixVTrigger_to_memclkm1[0]));
  FDCE \stoTixVTrigger_to_memclkm1_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\stoTixVTrigger_to_memclk_reg_n_0_[1] ),
        .Q(stoTixVTrigger_to_memclkm1[1]));
  FDCE \stoTixVTrigger_to_memclkm1_reg[2] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\stoTixVTrigger_to_memclk_reg_n_0_[2] ),
        .Q(stoTixVTrigger_to_memclkm1[2]));
  FDCE \stoTixVTrigger_to_memclkm1_reg[3] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\stoTixVTrigger_to_memclk_reg_n_0_[3] ),
        .Q(stoTixVTrigger_to_memclkm1[3]));
  FDCE \stoTixVTrigger_to_memclkm1_reg[4] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\stoTixVTrigger_to_memclk_reg_n_0_[4] ),
        .Q(stoTixVTrigger_to_memclkm1[4]));
  FDCE \stoTixVTrigger_to_memclkm1_reg[5] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\stoTixVTrigger_to_memclk_reg_n_0_[5] ),
        .Q(stoTixVTrigger_to_memclkm1[5]));
  FDCE \stoTixVTrigger_to_memclkm1_reg[6] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\stoTixVTrigger_to_memclk_reg_n_0_[6] ),
        .Q(stoTixVTrigger_to_memclkm1[6]));
  FDCE \stoTixVTrigger_to_memclkm1_reg[7] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\stoTixVTrigger_to_memclk_reg_n_0_[7] ),
        .Q(stoTixVTrigger_to_memclkm1[7]));
  FDCE \stoTixVTrigger_to_memclkm2_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm1[0]),
        .Q(stoTixVTrigger_to_memclkm2[0]));
  FDCE \stoTixVTrigger_to_memclkm2_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm1[1]),
        .Q(stoTixVTrigger_to_memclkm2[1]));
  FDCE \stoTixVTrigger_to_memclkm2_reg[2] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm1[2]),
        .Q(stoTixVTrigger_to_memclkm2[2]));
  FDCE \stoTixVTrigger_to_memclkm2_reg[3] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm1[3]),
        .Q(stoTixVTrigger_to_memclkm2[3]));
  FDCE \stoTixVTrigger_to_memclkm2_reg[4] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm1[4]),
        .Q(stoTixVTrigger_to_memclkm2[4]));
  FDCE \stoTixVTrigger_to_memclkm2_reg[5] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm1[5]),
        .Q(stoTixVTrigger_to_memclkm2[5]));
  FDCE \stoTixVTrigger_to_memclkm2_reg[6] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm1[6]),
        .Q(stoTixVTrigger_to_memclkm2[6]));
  FDCE \stoTixVTrigger_to_memclkm2_reg[7] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(stoTixVTrigger_to_memclkm1[7]),
        .Q(stoTixVTrigger_to_memclkm2[7]));
  LUT4 #(
    .INIT(16'h9F0F)) 
    \stop_i[0]_i_1 
       (.I0(stop_to_mclk),
        .I1(stop),
        .I2(stop_i[0]),
        .I3(stop_i[1]),
        .O(\stop_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2559" *) 
  LUT4 #(
    .INIT(16'h9FF0)) 
    \stop_i[1]_i_1 
       (.I0(stop_to_mclk),
        .I1(stop),
        .I2(stop_i[0]),
        .I3(stop_i[1]),
        .O(\stop_i[1]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00003808)) 
    stop_i_1
       (.I0(start_reg_0),
        .I1(stoTixVTrigger_memclk[1]),
        .I2(stoTixVTrigger_memclk[0]),
        .I3(stop_reg_0),
        .I4(stop_i_2_n_0),
        .O(stop_i_1_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    stop_i_2
       (.I0(stoTixVTrigger_memclk__0[6]),
        .I1(stoTixVTrigger_memclk__0[7]),
        .I2(stoTixVTrigger_memclk__0[3]),
        .I3(stoTixVTrigger_memclk__0[2]),
        .I4(stoTixVTrigger_memclk__0[5]),
        .I5(stoTixVTrigger_memclk__0[4]),
        .O(stop_i_2_n_0));
  FDCE #(
    .INIT(1'b0)) 
    \stop_i_reg[0] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\stop_i[0]_i_1_n_0 ),
        .Q(stop_i[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stop_i_reg[1] 
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(\stop_i[1]_i_1_n_0 ),
        .Q(stop_i[1]));
  LUT5 #(
    .INIT(32'hAAAAAAAB)) 
    stop_lcl_i_1__0
       (.I0(TCapt),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I2(dneSeq),
        .I3(rdySeq),
        .I4(ackSeqbufBToSeqClear),
        .O(stop_lcl_i_1__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2569" *) 
  LUT2 #(
    .INIT(4'h1)) 
    stop_lcl_i_2__0
       (.I0(first),
        .I1(\FSM_onehot_stateSeq[3]_i_2__0_n_0 ),
        .O(stop_lcl_i_2__0_n_0));
  FDCE stop_lcl_reg
       (.C(memclk),
        .CE(stop_lcl_i_1__0_n_0),
        .CLR(AR),
        .D(stop_lcl_i_2__0_n_0),
        .Q(stop_lcl_reg_n_0));
  LUT3 #(
    .INIT(8'hE8)) 
    stop_mclk_i_1
       (.I0(stop_to_mclkm2),
        .I1(stop_to_mclkm1),
        .I2(stop_mclk),
        .O(stop_mclk_i_1_n_0));
  FDCE stop_mclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stop_mclk_i_1_n_0),
        .Q(stop_mclk));
  FDCE stop_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(stop_i_1_n_0),
        .Q(stop));
  (* SOFT_HLUTNM = "soft_lutpair2559" *) 
  LUT4 #(
    .INIT(16'hE4CC)) 
    stop_to_mclk_i_1
       (.I0(stop_i[1]),
        .I1(stop_to_mclk),
        .I2(stop),
        .I3(stop_i[0]),
        .O(stop_to_mclk_i_1_n_0));
  FDCE stop_to_mclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(stop_to_mclk_i_1_n_0),
        .Q(stop_to_mclk));
  FDCE stop_to_mclkm1_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stop_to_mclk),
        .Q(stop_to_mclkm1));
  FDCE stop_to_mclkm2_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(stop_to_mclkm1),
        .Q(stop_to_mclkm2));
  (* SOFT_HLUTNM = "soft_lutpair2517" *) 
  LUT3 #(
    .INIT(8'hBF)) 
    \strbStart_i[0]_i_1 
       (.I0(stateOp[2]),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .O(\strbStart_i[0]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \strbStart_i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\strbStart_i[0]_i_1_n_0 ),
        .Q(strbStart_i));
  (* SOFT_HLUTNM = "soft_lutpair2539" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    strbStart_memclk_i_1
       (.I0(strbStart_memclk_reg_n_0),
        .I1(strbStart_to_memclkm2),
        .I2(strbStart_to_memclkm1),
        .I3(strbStart_wait_reg_n_0),
        .O(strbStart_memclk_i_1_n_0));
  FDCE strbStart_memclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(strbStart_memclk_i_1_n_0),
        .Q(strbStart_memclk_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2533" *) 
  LUT5 #(
    .INIT(32'h75553000)) 
    strbStart_to_memclk_i_1
       (.I0(strbStart_i),
        .I1(stateOp[2]),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .I4(strbStart_to_memclk),
        .O(strbStart_to_memclk_i_1_n_0));
  FDCE strbStart_to_memclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(strbStart_to_memclk_i_1_n_0),
        .Q(strbStart_to_memclk));
  FDCE strbStart_to_memclkm1_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(strbStart_to_memclk),
        .Q(strbStart_to_memclkm1));
  FDCE strbStart_to_memclkm2_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(strbStart_to_memclkm1),
        .Q(strbStart_to_memclkm2));
  (* SOFT_HLUTNM = "soft_lutpair2539" *) 
  LUT4 #(
    .INIT(16'hBAA0)) 
    strbStart_wait_i_1
       (.I0(strbStart_wait_reg_n_0),
        .I1(strbStart_memclk_reg_n_0),
        .I2(strbStart_to_memclkm1),
        .I3(strbStart_to_memclkm2),
        .O(strbStart_wait13_out));
  FDCE strbStart_wait_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(strbStart_wait13_out),
        .Q(strbStart_wait_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2568" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \strbStop_i[0]_i_1 
       (.I0(strbStop_reg_n_0),
        .O(\strbStop_i[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAABAAAFFAABAAA00)) 
    strbStop_i_1__0
       (.I0(ackInvSet_sig_i_2__0_n_0),
        .I1(strbStop_i_2__0_n_0),
        .I2(\stateOp[2]_i_3__0_n_0 ),
        .I3(\stateOp_reg[2]_0 ),
        .I4(strbStop_i_3__0_n_0),
        .I5(strbStop_reg_n_0),
        .O(strbStop_i_1__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2515" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    strbStop_i_2__0
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .O(strbStop_i_2__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2514" *) 
  LUT5 #(
    .INIT(32'h0000E0EA)) 
    strbStop_i_3__0
       (.I0(stateOp[0]),
        .I1(\stateOp[2]_i_3__0_n_0 ),
        .I2(stateOp[2]),
        .I3(restart_reg_0),
        .I4(stateOp[1]),
        .O(strbStop_i_3__0_n_0));
  FDCE #(
    .INIT(1'b0)) 
    \strbStop_i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(\strbStop_i[0]_i_1_n_0 ),
        .Q(strbStop_i));
  (* SOFT_HLUTNM = "soft_lutpair2538" *) 
  LUT4 #(
    .INIT(16'h0040)) 
    strbStop_memclk_i_1
       (.I0(strbStop_memclk_reg_n_0),
        .I1(strbStop_to_memclkm1),
        .I2(strbStop_to_memclkm2),
        .I3(strbStop_wait_reg_n_0),
        .O(strbStop_memclk_i_1_n_0));
  FDCE strbStop_memclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(strbStop_memclk_i_1_n_0),
        .Q(strbStop_memclk_reg_n_0));
  FDCE strbStop_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(strbStop_i_1__0_n_0),
        .Q(strbStop_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2568" *) 
  LUT3 #(
    .INIT(8'hBA)) 
    strbStop_to_memclk_i_1
       (.I0(strbStop_reg_n_0),
        .I1(strbStop_i),
        .I2(strbStop_to_memclk),
        .O(strbStop_to_memclk_i_1_n_0));
  FDCE strbStop_to_memclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(strbStop_to_memclk_i_1_n_0),
        .Q(strbStop_to_memclk));
  FDCE strbStop_to_memclkm1_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(strbStop_to_memclk),
        .Q(strbStop_to_memclkm1));
  FDCE strbStop_to_memclkm2_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(strbStop_to_memclkm1),
        .Q(strbStop_to_memclkm2));
  (* SOFT_HLUTNM = "soft_lutpair2538" *) 
  LUT4 #(
    .INIT(16'hBAA0)) 
    strbStop_wait_i_1
       (.I0(strbStop_wait_reg_n_0),
        .I1(strbStop_memclk_reg_n_0),
        .I2(strbStop_to_memclkm2),
        .I3(strbStop_to_memclkm1),
        .O(strbStop_wait17_out));
  FDCE strbStop_wait_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(AR),
        .D(strbStop_wait17_out),
        .Q(strbStop_wait_reg_n_0));
  LUT6 #(
    .INIT(64'hAFBBFFBBA0880088)) 
    strb_last_i_1
       (.I0(strb_last_i_2_n_0),
        .I1(strb_last_i_3_n_0),
        .I2(strb_last_reg_0),
        .I3(\stateOp_reg[2]_0 ),
        .I4(rng_reg_0),
        .I5(strb_last_reg_n_0),
        .O(strb_last_i_1_n_0));
  LUT6 #(
    .INIT(64'hFFFFAAAE0000AAA2)) 
    strb_last_i_2
       (.I0(stop_mclk),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .I3(stateOp[0]),
        .I4(\stateOp_reg[2]_0 ),
        .I5(start_mclk),
        .O(strb_last_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2517" *) 
  LUT5 #(
    .INIT(32'h00E003E0)) 
    strb_last_i_3
       (.I0(\stateOp[2]_i_10__0_n_0 ),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(stateOp[2]),
        .I4(\stateOp[2]_i_3__0_n_0 ),
        .O(strb_last_i_3_n_0));
  FDCE strb_last_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\ptr0Seqbuf_to_mclkm2_reg[0]_0 ),
        .D(strb_last_i_1_n_0),
        .Q(strb_last_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2535" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \txAXIS_tdata[15]_i_20 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[0]),
        .I2(stateSeqbufB_reg[1]),
        .O(seqbufMemtrackToHostifAXIS_tvalid));
  (* SOFT_HLUTNM = "soft_lutpair2565" *) 
  LUT3 #(
    .INIT(8'h34)) 
    \wordcntLast[28]_i_15 
       (.I0(stateSeqbufB_reg[0]),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[1]),
        .O(ackSeqbufMemtrackToHostif));
endmodule

(* CHECK_LICENSE_TYPE = "Mipirx_xlnx_comb_w4_r1188,bd_7289,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "bd_7289,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Mipirx_xlnx_comb_w4_r1188
   (lite_aclk,
    lite_aresetn,
    dphy_clk_200M,
    rxbyteclkhs,
    clkoutphy_out,
    system_rst_out,
    pll_lock_out,
    csirxss_csi_irq,
    video_aclk,
    video_aresetn,
    frame_rcvd_pulse_out,
    csirxss_s_axi_awaddr,
    csirxss_s_axi_awprot,
    csirxss_s_axi_awvalid,
    csirxss_s_axi_awready,
    csirxss_s_axi_wdata,
    csirxss_s_axi_wstrb,
    csirxss_s_axi_wvalid,
    csirxss_s_axi_wready,
    csirxss_s_axi_bresp,
    csirxss_s_axi_bvalid,
    csirxss_s_axi_bready,
    csirxss_s_axi_araddr,
    csirxss_s_axi_arprot,
    csirxss_s_axi_arvalid,
    csirxss_s_axi_arready,
    csirxss_s_axi_rdata,
    csirxss_s_axi_rresp,
    csirxss_s_axi_rvalid,
    csirxss_s_axi_rready,
    video_out_tdata,
    video_out_tdest,
    video_out_tlast,
    video_out_tready,
    video_out_tuser,
    video_out_tvalid,
    mipi_phy_if_clk_n,
    mipi_phy_if_clk_p,
    mipi_phy_if_data_n,
    mipi_phy_if_data_p);
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLK.lite_aclk CLK" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME CLK.lite_aclk, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, CLK_DOMAIN bd_90ba_lite_aclk, ASSOCIATED_BUSIF csirxss_s_axi, ASSOCIATED_RESET lite_aresetn, INSERT_VIP 0" *) input lite_aclk;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 RST.lite_aresetn RST" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME RST.lite_aresetn, POLARITY ACTIVE_LOW, INSERT_VIP 0, TYPE INTERCONNECT" *) input lite_aresetn;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLK.dphy_clk_200M CLK" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME CLK.dphy_clk_200M, FREQ_HZ 200000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, CLK_DOMAIN bd_90ba_dphy_clk_200M, INSERT_VIP 0" *) input dphy_clk_200M;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLK.rxbyteclkhs CLK" *) (* x_interface_mode = "master" *) (* x_interface_parameter = "XIL_INTERFACENAME CLK.rxbyteclkhs, FREQ_HZ 148500000.0, FREQ_TOLERANCE_HZ 0, PHASE 0, CLK_DOMAIN bd_90ba_phy_0_rxbyteclkhs, INSERT_VIP 0" *) output rxbyteclkhs;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLK.clkoutphy_out CLK" *) (* x_interface_mode = "master" *) (* x_interface_parameter = "XIL_INTERFACENAME CLK.clkoutphy_out, FREQ_HZ 1500000000.0, FREQ_TOLERANCE_HZ 0, PHASE 0.0, CLK_DOMAIN bd_90ba_phy_0_clkoutphy_out, INSERT_VIP 0" *) output clkoutphy_out;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 RST.system_rst_out RST" *) (* x_interface_mode = "master" *) (* x_interface_parameter = "XIL_INTERFACENAME RST.system_rst_out, POLARITY ACTIVE_LOW, INSERT_VIP 0" *) output system_rst_out;
  output pll_lock_out;
  (* x_interface_info = "xilinx.com:signal:interrupt:1.0 INTR.csirxss_csi_irq INTERRUPT" *) (* x_interface_mode = "master" *) (* x_interface_parameter = "XIL_INTERFACENAME INTR.csirxss_csi_irq, SENSITIVITY LEVEL_HIGH, PortWidth 1" *) output csirxss_csi_irq;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLK.video_aclk CLK" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME CLK.video_aclk, FREQ_HZ 150000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, CLK_DOMAIN bd_90ba_video_aclk, ASSOCIATED_BUSIF video_out, ASSOCIATED_RESET video_aresetn, INSERT_VIP 0" *) input video_aclk;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 RST.video_aresetn RST" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME RST.video_aresetn, POLARITY ACTIVE_LOW, INSERT_VIP 0" *) input video_aresetn;
  output frame_rcvd_pulse_out;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi AWADDR" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME csirxss_s_axi, DATA_WIDTH 32, PROTOCOL AXI4LITE, FREQ_HZ 100000000, ID_WIDTH 0, ADDR_WIDTH 13, AWUSER_WIDTH 0, ARUSER_WIDTH 0, WUSER_WIDTH 0, RUSER_WIDTH 0, BUSER_WIDTH 0, READ_WRITE_MODE READ_WRITE, HAS_BURST 0, HAS_LOCK 0, HAS_PROT 1, HAS_CACHE 0, HAS_QOS 0, HAS_REGION 0, HAS_WSTRB 1, HAS_BRESP 1, HAS_RRESP 1, SUPPORTS_NARROW_BURST 0, NUM_READ_OUTSTANDING 1, NUM_WRITE_OUTSTANDING 1, MAX_BURST_LENGTH 1, PHASE 0.0, CLK_DOMAIN bd_90ba_lite_aclk, NUM_READ_THREADS 1, NUM_WRITE_THREADS 1, RUSER_BITS_PER_BYTE 0, WUSER_BITS_PER_BYTE 0, INSERT_VIP 0" *) input [12:0]csirxss_s_axi_awaddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi AWPROT" *) input [2:0]csirxss_s_axi_awprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi AWVALID" *) input [0:0]csirxss_s_axi_awvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi AWREADY" *) output [0:0]csirxss_s_axi_awready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi WDATA" *) input [31:0]csirxss_s_axi_wdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi WSTRB" *) input [3:0]csirxss_s_axi_wstrb;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi WVALID" *) input [0:0]csirxss_s_axi_wvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi WREADY" *) output [0:0]csirxss_s_axi_wready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi BRESP" *) output [1:0]csirxss_s_axi_bresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi BVALID" *) output [0:0]csirxss_s_axi_bvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi BREADY" *) input [0:0]csirxss_s_axi_bready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi ARADDR" *) input [12:0]csirxss_s_axi_araddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi ARPROT" *) input [2:0]csirxss_s_axi_arprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi ARVALID" *) input [0:0]csirxss_s_axi_arvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi ARREADY" *) output [0:0]csirxss_s_axi_arready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi RDATA" *) output [31:0]csirxss_s_axi_rdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi RRESP" *) output [1:0]csirxss_s_axi_rresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi RVALID" *) output [0:0]csirxss_s_axi_rvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi RREADY" *) input [0:0]csirxss_s_axi_rready;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TDATA" *) (* x_interface_mode = "master" *) (* x_interface_parameter = "XIL_INTERFACENAME video_out, TDATA_NUM_BYTES 3, TDEST_WIDTH 10, TID_WIDTH 0, TUSER_WIDTH 96, HAS_TREADY 1, HAS_TSTRB 0, HAS_TKEEP 0, HAS_TLAST 1, FREQ_HZ 150000000, PHASE 0.0, CLK_DOMAIN bd_90ba_video_aclk, LAYERED_METADATA undef, INSERT_VIP 0" *) output [23:0]video_out_tdata;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TDEST" *) output [9:0]video_out_tdest;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TLAST" *) output video_out_tlast;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TREADY" *) input video_out_tready;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TUSER" *) output [95:0]video_out_tuser;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TVALID" *) output video_out_tvalid;
  (* x_interface_info = "xilinx.com:interface:mipi_phy:1.0 mipi_phy_if CLK_N" *) (* x_interface_mode = "slave" *) input mipi_phy_if_clk_n;
  (* x_interface_info = "xilinx.com:interface:mipi_phy:1.0 mipi_phy_if CLK_P" *) input mipi_phy_if_clk_p;
  (* x_interface_info = "xilinx.com:interface:mipi_phy:1.0 mipi_phy_if DATA_N" *) input [3:0]mipi_phy_if_data_n;
  (* x_interface_info = "xilinx.com:interface:mipi_phy:1.0 mipi_phy_if DATA_P" *) input [3:0]mipi_phy_if_data_p;

  wire \<const0> ;
  wire [12:0]csirxss_s_axi_araddr;
  wire [0:0]csirxss_s_axi_arready;
  wire [0:0]csirxss_s_axi_arvalid;
  wire [12:0]csirxss_s_axi_awaddr;
  wire [0:0]csirxss_s_axi_awready;
  wire [0:0]csirxss_s_axi_awvalid;
  wire [0:0]csirxss_s_axi_bready;
  wire [0:0]csirxss_s_axi_bvalid;
  wire [31:0]csirxss_s_axi_rdata;
  wire [0:0]csirxss_s_axi_rready;
  wire [0:0]csirxss_s_axi_rvalid;
  wire [31:0]csirxss_s_axi_wdata;
  wire [0:0]csirxss_s_axi_wready;
  wire [0:0]csirxss_s_axi_wvalid;
  wire dphy_clk_200M;
  wire mipi_phy_if_clk_n;
  wire mipi_phy_if_clk_p;
  wire [3:0]mipi_phy_if_data_n;
  wire [3:0]mipi_phy_if_data_p;
  wire video_aresetn;
  wire [23:0]video_out_tdata;
  wire video_out_tlast;
  wire [69:0]\^video_out_tuser ;
  wire video_out_tvalid;
  wire NLW_inst_clkoutphy_out_UNCONNECTED;
  wire NLW_inst_csirxss_csi_irq_UNCONNECTED;
  wire NLW_inst_frame_rcvd_pulse_out_UNCONNECTED;
  wire NLW_inst_pll_lock_out_UNCONNECTED;
  wire NLW_inst_rxbyteclkhs_UNCONNECTED;
  wire NLW_inst_system_rst_out_UNCONNECTED;
  wire [1:0]NLW_inst_csirxss_s_axi_bresp_UNCONNECTED;
  wire [1:0]NLW_inst_csirxss_s_axi_rresp_UNCONNECTED;
  wire [9:0]NLW_inst_video_out_tdest_UNCONNECTED;
  wire [95:1]NLW_inst_video_out_tuser_UNCONNECTED;

  assign clkoutphy_out = \<const0> ;
  assign csirxss_csi_irq = \<const0> ;
  assign csirxss_s_axi_bresp[1] = \<const0> ;
  assign csirxss_s_axi_bresp[0] = \<const0> ;
  assign csirxss_s_axi_rresp[1] = \<const0> ;
  assign csirxss_s_axi_rresp[0] = \<const0> ;
  assign frame_rcvd_pulse_out = \<const0> ;
  assign pll_lock_out = \<const0> ;
  assign rxbyteclkhs = \<const0> ;
  assign system_rst_out = \<const0> ;
  assign video_out_tdest[9] = \<const0> ;
  assign video_out_tdest[8] = \<const0> ;
  assign video_out_tdest[7] = \<const0> ;
  assign video_out_tdest[6] = \<const0> ;
  assign video_out_tdest[5] = \<const0> ;
  assign video_out_tdest[4] = \<const0> ;
  assign video_out_tdest[3] = \<const0> ;
  assign video_out_tdest[2] = \<const0> ;
  assign video_out_tdest[1] = \<const0> ;
  assign video_out_tdest[0] = \<const0> ;
  assign video_out_tuser[95] = \<const0> ;
  assign video_out_tuser[94] = \<const0> ;
  assign video_out_tuser[93] = \<const0> ;
  assign video_out_tuser[92] = \<const0> ;
  assign video_out_tuser[91] = \<const0> ;
  assign video_out_tuser[90] = \<const0> ;
  assign video_out_tuser[89] = \<const0> ;
  assign video_out_tuser[88] = \<const0> ;
  assign video_out_tuser[87] = \<const0> ;
  assign video_out_tuser[86] = \<const0> ;
  assign video_out_tuser[85] = \<const0> ;
  assign video_out_tuser[84] = \<const0> ;
  assign video_out_tuser[83] = \<const0> ;
  assign video_out_tuser[82] = \<const0> ;
  assign video_out_tuser[81] = \<const0> ;
  assign video_out_tuser[80] = \<const0> ;
  assign video_out_tuser[79] = \<const0> ;
  assign video_out_tuser[78] = \<const0> ;
  assign video_out_tuser[77] = \<const0> ;
  assign video_out_tuser[76] = \<const0> ;
  assign video_out_tuser[75] = \<const0> ;
  assign video_out_tuser[74] = \<const0> ;
  assign video_out_tuser[73] = \<const0> ;
  assign video_out_tuser[72] = \<const0> ;
  assign video_out_tuser[71] = \<const0> ;
  assign video_out_tuser[70] = \<const0> ;
  assign video_out_tuser[69:64] = \^video_out_tuser [69:64];
  assign video_out_tuser[63] = \<const0> ;
  assign video_out_tuser[62] = \<const0> ;
  assign video_out_tuser[61] = \<const0> ;
  assign video_out_tuser[60] = \<const0> ;
  assign video_out_tuser[59] = \<const0> ;
  assign video_out_tuser[58] = \<const0> ;
  assign video_out_tuser[57] = \<const0> ;
  assign video_out_tuser[56] = \<const0> ;
  assign video_out_tuser[55] = \<const0> ;
  assign video_out_tuser[54] = \<const0> ;
  assign video_out_tuser[53] = \<const0> ;
  assign video_out_tuser[52] = \<const0> ;
  assign video_out_tuser[51] = \<const0> ;
  assign video_out_tuser[50] = \<const0> ;
  assign video_out_tuser[49] = \<const0> ;
  assign video_out_tuser[48] = \<const0> ;
  assign video_out_tuser[47] = \<const0> ;
  assign video_out_tuser[46] = \<const0> ;
  assign video_out_tuser[45] = \<const0> ;
  assign video_out_tuser[44] = \<const0> ;
  assign video_out_tuser[43] = \<const0> ;
  assign video_out_tuser[42] = \<const0> ;
  assign video_out_tuser[41] = \<const0> ;
  assign video_out_tuser[40] = \<const0> ;
  assign video_out_tuser[39] = \<const0> ;
  assign video_out_tuser[38] = \<const0> ;
  assign video_out_tuser[37] = \<const0> ;
  assign video_out_tuser[36] = \<const0> ;
  assign video_out_tuser[35] = \<const0> ;
  assign video_out_tuser[34] = \<const0> ;
  assign video_out_tuser[33] = \<const0> ;
  assign video_out_tuser[32] = \<const0> ;
  assign video_out_tuser[31] = \<const0> ;
  assign video_out_tuser[30] = \<const0> ;
  assign video_out_tuser[29] = \<const0> ;
  assign video_out_tuser[28] = \<const0> ;
  assign video_out_tuser[27] = \<const0> ;
  assign video_out_tuser[26] = \<const0> ;
  assign video_out_tuser[25] = \<const0> ;
  assign video_out_tuser[24] = \<const0> ;
  assign video_out_tuser[23] = \<const0> ;
  assign video_out_tuser[22] = \<const0> ;
  assign video_out_tuser[21] = \<const0> ;
  assign video_out_tuser[20] = \<const0> ;
  assign video_out_tuser[19] = \<const0> ;
  assign video_out_tuser[18] = \<const0> ;
  assign video_out_tuser[17] = \<const0> ;
  assign video_out_tuser[16] = \<const0> ;
  assign video_out_tuser[15] = \<const0> ;
  assign video_out_tuser[14] = \<const0> ;
  assign video_out_tuser[13] = \<const0> ;
  assign video_out_tuser[12] = \<const0> ;
  assign video_out_tuser[11] = \<const0> ;
  assign video_out_tuser[10] = \<const0> ;
  assign video_out_tuser[9] = \<const0> ;
  assign video_out_tuser[8] = \<const0> ;
  assign video_out_tuser[7] = \<const0> ;
  assign video_out_tuser[6] = \<const0> ;
  assign video_out_tuser[5] = \<const0> ;
  assign video_out_tuser[4] = \<const0> ;
  assign video_out_tuser[3] = \<const0> ;
  assign video_out_tuser[2] = \<const0> ;
  assign video_out_tuser[1] = \<const0> ;
  assign video_out_tuser[0] = \^video_out_tuser [0];
  GND GND
       (.G(\<const0> ));
  (* HW_HANDOFF = "Mipirx_xlnx_comb_w4_r1188.hwdef" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289 inst
       (.clkoutphy_out(NLW_inst_clkoutphy_out_UNCONNECTED),
        .csirxss_csi_irq(NLW_inst_csirxss_csi_irq_UNCONNECTED),
        .csirxss_s_axi_araddr({csirxss_s_axi_araddr[12],1'b0,1'b0,1'b0,1'b0,csirxss_s_axi_araddr[7:2],1'b0,1'b0}),
        .csirxss_s_axi_arprot({1'b0,1'b0,1'b0}),
        .csirxss_s_axi_arready(csirxss_s_axi_arready),
        .csirxss_s_axi_arvalid(csirxss_s_axi_arvalid),
        .csirxss_s_axi_awaddr({csirxss_s_axi_awaddr[12],1'b0,1'b0,1'b0,1'b0,csirxss_s_axi_awaddr[7:2],1'b0,1'b0}),
        .csirxss_s_axi_awprot({1'b0,1'b0,1'b0}),
        .csirxss_s_axi_awready(csirxss_s_axi_awready),
        .csirxss_s_axi_awvalid(csirxss_s_axi_awvalid),
        .csirxss_s_axi_bready(csirxss_s_axi_bready),
        .csirxss_s_axi_bresp(NLW_inst_csirxss_s_axi_bresp_UNCONNECTED[1:0]),
        .csirxss_s_axi_bvalid(csirxss_s_axi_bvalid),
        .csirxss_s_axi_rdata(csirxss_s_axi_rdata),
        .csirxss_s_axi_rready(csirxss_s_axi_rready),
        .csirxss_s_axi_rresp(NLW_inst_csirxss_s_axi_rresp_UNCONNECTED[1:0]),
        .csirxss_s_axi_rvalid(csirxss_s_axi_rvalid),
        .csirxss_s_axi_wdata(csirxss_s_axi_wdata),
        .csirxss_s_axi_wready(csirxss_s_axi_wready),
        .csirxss_s_axi_wstrb({1'b1,1'b1,1'b1,1'b1}),
        .csirxss_s_axi_wvalid(csirxss_s_axi_wvalid),
        .dphy_clk_200M(dphy_clk_200M),
        .frame_rcvd_pulse_out(NLW_inst_frame_rcvd_pulse_out_UNCONNECTED),
        .lite_aclk(1'b0),
        .lite_aresetn(1'b0),
        .mipi_phy_if_clk_n(mipi_phy_if_clk_n),
        .mipi_phy_if_clk_p(mipi_phy_if_clk_p),
        .mipi_phy_if_data_n(mipi_phy_if_data_n),
        .mipi_phy_if_data_p(mipi_phy_if_data_p),
        .pll_lock_out(NLW_inst_pll_lock_out_UNCONNECTED),
        .rxbyteclkhs(NLW_inst_rxbyteclkhs_UNCONNECTED),
        .system_rst_out(NLW_inst_system_rst_out_UNCONNECTED),
        .video_aclk(1'b0),
        .video_aresetn(video_aresetn),
        .video_out_tdata(video_out_tdata),
        .video_out_tdest(NLW_inst_video_out_tdest_UNCONNECTED[9:0]),
        .video_out_tlast(video_out_tlast),
        .video_out_tready(1'b1),
        .video_out_tuser({NLW_inst_video_out_tuser_UNCONNECTED[95:70],\^video_out_tuser }),
        .video_out_tvalid(video_out_tvalid));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Parrom
   (DO,
    \stateConfig_reg[3] ,
    E,
    \invbuf_reg[2][0] ,
    \invbuf_reg[2][1] ,
    \invbuf_reg[2][2] ,
    \invbuf_reg[2][3] ,
    \invbuf_reg[2][4] ,
    \invbuf_reg[2][5] ,
    \invbuf_reg[2][6] ,
    \invbuf_reg[2][7] ,
    \stateConfig_reg[3]_0 ,
    \stateConfig_reg[0] ,
    \stateConfig_reg[1] ,
    prepdone_reg,
    specNotGnr_reg,
    SR,
    \stateConfig_reg[3]_1 ,
    reset_reg,
    specNotGnr_reg_0,
    aclk_sig,
    Q,
    specNotGnr_reg_1,
    \j_reg[1] ,
    \j_reg[7] ,
    specNotGnr,
    specNotGnr_reg_2,
    \i2cRegaddr_reg[15] ,
    prepdone_reg_0,
    \i2cRegaddr_reg[15]_0 ,
    D,
    reqInvSetReg,
    \i2cSend_reg[7] ,
    \aParrom_reg[10] ,
    \i2cRegaddr_reg[13] ,
    \i2cRegaddr_reg[12] ,
    \i2cRegaddr_reg[6] ,
    \i2cRegaddr_reg[4] ,
    \i2cRegaddr_reg[3] ,
    \i2cRegaddr_reg[0] ,
    \stateConfig_reg[0]_0 ,
    \aParrom_reg[5] ,
    \aParrom_reg[6] ,
    \aParrom_reg[9] ,
    \aParrom_reg[9]_0 ,
    \stateConfig_reg[2] ,
    \stateConfig_reg[2]_0 ,
    \stateConfig_reg[2]_1 ,
    \bytecnt_reg[0] ,
    prepdone,
    \bytecnt_reg[0]_0 ,
    \k[1]_i_4_0 ,
    \stateConfig_reg[1]_0 ,
    \stateConfig_reg[1]_1 ,
    \stateConfig_reg[1]_2 ,
    i2cReadNotWrite,
    ackLiveToConfigSetReg,
    \aParrom_reg[10]_0 ,
    \j_reg[7]_0 ,
    \j_reg[7]_1 ,
    \j_reg[7]_2 ,
    \aParrom_reg[10]_1 ,
    \k_reg[1] );
  output [6:0]DO;
  output \stateConfig_reg[3] ;
  output [0:0]E;
  output \invbuf_reg[2][0] ;
  output \invbuf_reg[2][1] ;
  output \invbuf_reg[2][2] ;
  output \invbuf_reg[2][3] ;
  output \invbuf_reg[2][4] ;
  output \invbuf_reg[2][5] ;
  output \invbuf_reg[2][6] ;
  output \invbuf_reg[2][7] ;
  output [5:0]\stateConfig_reg[3]_0 ;
  output [3:0]\stateConfig_reg[0] ;
  output [10:0]\stateConfig_reg[1] ;
  output [0:0]prepdone_reg;
  output specNotGnr_reg;
  output [0:0]SR;
  output [0:0]\stateConfig_reg[3]_1 ;
  output reset_reg;
  output specNotGnr_reg_0;
  input aclk_sig;
  input [10:0]Q;
  input specNotGnr_reg_1;
  input [3:0]\j_reg[1] ;
  input \j_reg[7] ;
  input specNotGnr;
  input specNotGnr_reg_2;
  input \i2cRegaddr_reg[15] ;
  input prepdone_reg_0;
  input \i2cRegaddr_reg[15]_0 ;
  input [7:0]D;
  input reqInvSetReg;
  input [6:0]\i2cSend_reg[7] ;
  input \aParrom_reg[10] ;
  input \i2cRegaddr_reg[13] ;
  input \i2cRegaddr_reg[12] ;
  input \i2cRegaddr_reg[6] ;
  input \i2cRegaddr_reg[4] ;
  input \i2cRegaddr_reg[3] ;
  input \i2cRegaddr_reg[0] ;
  input \stateConfig_reg[0]_0 ;
  input \aParrom_reg[5] ;
  input \aParrom_reg[6] ;
  input \aParrom_reg[9] ;
  input \aParrom_reg[9]_0 ;
  input \stateConfig_reg[2] ;
  input \stateConfig_reg[2]_0 ;
  input \stateConfig_reg[2]_1 ;
  input \bytecnt_reg[0] ;
  input prepdone;
  input \bytecnt_reg[0]_0 ;
  input [2:0]\k[1]_i_4_0 ;
  input \stateConfig_reg[1]_0 ;
  input \stateConfig_reg[1]_1 ;
  input \stateConfig_reg[1]_2 ;
  input i2cReadNotWrite;
  input ackLiveToConfigSetReg;
  input \aParrom_reg[10]_0 ;
  input \j_reg[7]_0 ;
  input \j_reg[7]_1 ;
  input \j_reg[7]_2 ;
  input \aParrom_reg[10]_1 ;
  input \k_reg[1] ;

  wire [7:0]D;
  wire [6:0]DO;
  wire [0:0]E;
  wire [10:0]Q;
  wire [0:0]SR;
  wire aParrom1;
  wire \aParrom[8]_i_2_n_0 ;
  wire \aParrom_reg[10] ;
  wire \aParrom_reg[10]_0 ;
  wire \aParrom_reg[10]_1 ;
  wire \aParrom_reg[5] ;
  wire \aParrom_reg[6] ;
  wire \aParrom_reg[9] ;
  wire \aParrom_reg[9]_0 ;
  wire ackLiveToConfigSetReg;
  wire aclk_sig;
  wire \bytecnt_reg[0] ;
  wire \bytecnt_reg[0]_0 ;
  wire [4:4]drdParrom;
  wire en;
  wire i2cReadNotWrite;
  wire \i2cRegaddr_reg[0] ;
  wire \i2cRegaddr_reg[12] ;
  wire \i2cRegaddr_reg[13] ;
  wire \i2cRegaddr_reg[15] ;
  wire \i2cRegaddr_reg[15]_0 ;
  wire \i2cRegaddr_reg[3] ;
  wire \i2cRegaddr_reg[4] ;
  wire \i2cRegaddr_reg[6] ;
  wire [6:0]\i2cSend_reg[7] ;
  wire \invbuf_reg[2][0] ;
  wire \invbuf_reg[2][1] ;
  wire \invbuf_reg[2][2] ;
  wire \invbuf_reg[2][3] ;
  wire \invbuf_reg[2][4] ;
  wire \invbuf_reg[2][5] ;
  wire \invbuf_reg[2][6] ;
  wire \invbuf_reg[2][7] ;
  wire \j[7]_i_6_n_0 ;
  wire [3:0]\j_reg[1] ;
  wire \j_reg[7] ;
  wire \j_reg[7]_0 ;
  wire \j_reg[7]_1 ;
  wire \j_reg[7]_2 ;
  wire [2:0]\k[1]_i_4_0 ;
  wire \k[1]_i_4_n_0 ;
  wire \k[1]_i_7_n_0 ;
  wire \k_reg[1] ;
  wire prepdone;
  wire [0:0]prepdone_reg;
  wire prepdone_reg_0;
  wire reqInvSetReg;
  wire reset_reg;
  wire specNotGnr;
  wire specNotGnr_reg;
  wire specNotGnr_reg_0;
  wire specNotGnr_reg_1;
  wire specNotGnr_reg_2;
  wire \stateConfig[1]_i_2_n_0 ;
  wire \stateConfig[2]_i_4_n_0 ;
  wire [3:0]\stateConfig_reg[0] ;
  wire \stateConfig_reg[0]_0 ;
  wire [10:0]\stateConfig_reg[1] ;
  wire \stateConfig_reg[1]_0 ;
  wire \stateConfig_reg[1]_1 ;
  wire \stateConfig_reg[1]_2 ;
  wire \stateConfig_reg[2] ;
  wire \stateConfig_reg[2]_0 ;
  wire \stateConfig_reg[2]_1 ;
  wire \stateConfig_reg[3] ;
  wire [5:0]\stateConfig_reg[3]_0 ;
  wire [0:0]\stateConfig_reg[3]_1 ;
  wire [15:0]NLW_myBram_CASDINA_UNCONNECTED;
  wire [15:0]NLW_myBram_CASDINB_UNCONNECTED;
  wire [1:0]NLW_myBram_CASDINPA_UNCONNECTED;
  wire [1:0]NLW_myBram_CASDINPB_UNCONNECTED;
  wire [15:0]NLW_myBram_CASDOUTA_UNCONNECTED;
  wire [15:0]NLW_myBram_CASDOUTB_UNCONNECTED;
  wire [1:0]NLW_myBram_CASDOUTPA_UNCONNECTED;
  wire [1:0]NLW_myBram_CASDOUTPB_UNCONNECTED;
  wire [15:8]NLW_myBram_DINADIN_UNCONNECTED;
  wire [15:0]NLW_myBram_DINBDIN_UNCONNECTED;
  wire [1:1]NLW_myBram_DINPADINP_UNCONNECTED;
  wire [1:0]NLW_myBram_DINPBDINP_UNCONNECTED;
  wire [15:8]NLW_myBram_DOUTADOUT_UNCONNECTED;
  wire [15:0]NLW_myBram_DOUTBDOUT_UNCONNECTED;
  wire [1:0]NLW_myBram_DOUTPADOUTP_UNCONNECTED;
  wire [1:0]NLW_myBram_DOUTPBDOUTP_UNCONNECTED;

  (* SOFT_HLUTNM = "soft_lutpair620" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \aParrom[0]_i_1 
       (.I0(\aParrom[8]_i_2_n_0 ),
        .I1(Q[0]),
        .O(\stateConfig_reg[1] [0]));
  LUT6 #(
    .INIT(64'h5454545554555455)) 
    \aParrom[10]_i_1 
       (.I0(\j_reg[1] [3]),
        .I1(\aParrom_reg[10] ),
        .I2(\aParrom_reg[10]_0 ),
        .I3(specNotGnr_reg_1),
        .I4(aParrom1),
        .I5(specNotGnr),
        .O(\stateConfig_reg[3]_1 ));
  LUT5 #(
    .INIT(32'hAAE8FFFC)) 
    \aParrom[10]_i_2 
       (.I0(aParrom1),
        .I1(\j_reg[1] [1]),
        .I2(\j_reg[1] [0]),
        .I3(\j_reg[1] [2]),
        .I4(\aParrom_reg[10]_1 ),
        .O(\stateConfig_reg[1] [10]));
  (* SOFT_HLUTNM = "soft_lutpair620" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \aParrom[1]_i_1 
       (.I0(\aParrom[8]_i_2_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .O(\stateConfig_reg[1] [1]));
  (* SOFT_HLUTNM = "soft_lutpair617" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \aParrom[2]_i_1 
       (.I0(\aParrom[8]_i_2_n_0 ),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[2]),
        .O(\stateConfig_reg[1] [2]));
  (* SOFT_HLUTNM = "soft_lutpair617" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \aParrom[3]_i_1 
       (.I0(\aParrom[8]_i_2_n_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[2]),
        .I4(Q[3]),
        .O(\stateConfig_reg[1] [3]));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \aParrom[4]_i_1 
       (.I0(\aParrom[8]_i_2_n_0 ),
        .I1(Q[2]),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[3]),
        .I5(Q[4]),
        .O(\stateConfig_reg[1] [4]));
  (* SOFT_HLUTNM = "soft_lutpair621" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \aParrom[5]_i_1 
       (.I0(\aParrom[8]_i_2_n_0 ),
        .I1(Q[5]),
        .I2(\aParrom_reg[5] ),
        .O(\stateConfig_reg[1] [5]));
  (* SOFT_HLUTNM = "soft_lutpair621" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \aParrom[6]_i_1 
       (.I0(\aParrom[8]_i_2_n_0 ),
        .I1(Q[6]),
        .I2(\aParrom_reg[6] ),
        .O(\stateConfig_reg[1] [6]));
  (* SOFT_HLUTNM = "soft_lutpair618" *) 
  LUT4 #(
    .INIT(16'h2888)) 
    \aParrom[7]_i_1 
       (.I0(\aParrom[8]_i_2_n_0 ),
        .I1(Q[7]),
        .I2(Q[6]),
        .I3(\aParrom_reg[6] ),
        .O(\stateConfig_reg[1] [7]));
  (* SOFT_HLUTNM = "soft_lutpair618" *) 
  LUT5 #(
    .INIT(32'h28888888)) 
    \aParrom[8]_i_1 
       (.I0(\aParrom[8]_i_2_n_0 ),
        .I1(Q[8]),
        .I2(\aParrom_reg[6] ),
        .I3(Q[6]),
        .I4(Q[7]),
        .O(\stateConfig_reg[1] [8]));
  (* SOFT_HLUTNM = "soft_lutpair619" *) 
  LUT5 #(
    .INIT(32'h55555514)) 
    \aParrom[8]_i_2 
       (.I0(aParrom1),
        .I1(\j_reg[1] [0]),
        .I2(\j_reg[1] [1]),
        .I3(\j_reg[1] [3]),
        .I4(\j_reg[1] [2]),
        .O(\aParrom[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00F6F600F6F6F6F6)) 
    \aParrom[9]_i_1 
       (.I0(Q[9]),
        .I1(\aParrom_reg[9] ),
        .I2(aParrom1),
        .I3(\j_reg[1] [0]),
        .I4(\j_reg[1] [1]),
        .I5(\aParrom_reg[9]_0 ),
        .O(\stateConfig_reg[1] [9]));
  LUT6 #(
    .INIT(64'hAAEEAFEEAAAAAAAA)) 
    \bytecnt[0]_i_1 
       (.I0(\bytecnt_reg[0] ),
        .I1(prepdone),
        .I2(\j[7]_i_6_n_0 ),
        .I3(\bytecnt_reg[0]_0 ),
        .I4(\k[1]_i_4_0 [0]),
        .I5(prepdone_reg_0),
        .O(prepdone_reg));
  LUT6 #(
    .INIT(64'hFFFFFFFE00000002)) 
    \i2cRegaddr[0]_i_1 
       (.I0(\i2cRegaddr_reg[0] ),
        .I1(\j_reg[1] [3]),
        .I2(\j_reg[1] [2]),
        .I3(\j_reg[1] [0]),
        .I4(\j_reg[1] [1]),
        .I5(DO[0]),
        .O(\stateConfig_reg[3]_0 [0]));
  LUT6 #(
    .INIT(64'hFFFFFFFE00000002)) 
    \i2cRegaddr[12]_i_1 
       (.I0(\i2cRegaddr_reg[12] ),
        .I1(\j_reg[1] [3]),
        .I2(\j_reg[1] [2]),
        .I3(\j_reg[1] [0]),
        .I4(\j_reg[1] [1]),
        .I5(drdParrom),
        .O(\stateConfig_reg[3]_0 [4]));
  LUT6 #(
    .INIT(64'hFFFFFFFE00000002)) 
    \i2cRegaddr[13]_i_1 
       (.I0(\i2cRegaddr_reg[13] ),
        .I1(\j_reg[1] [3]),
        .I2(\j_reg[1] [2]),
        .I3(\j_reg[1] [0]),
        .I4(\j_reg[1] [1]),
        .I5(DO[4]),
        .O(\stateConfig_reg[3]_0 [5]));
  LUT6 #(
    .INIT(64'h00C0040400000404)) 
    \i2cRegaddr[15]_i_1 
       (.I0(\i2cRegaddr_reg[15] ),
        .I1(prepdone_reg_0),
        .I2(\j_reg[1] [1]),
        .I3(aParrom1),
        .I4(\j_reg[1] [2]),
        .I5(\i2cRegaddr_reg[15]_0 ),
        .O(E));
  LUT6 #(
    .INIT(64'hFFFFFFFE00000002)) 
    \i2cRegaddr[3]_i_1 
       (.I0(\i2cRegaddr_reg[3] ),
        .I1(\j_reg[1] [3]),
        .I2(\j_reg[1] [2]),
        .I3(\j_reg[1] [0]),
        .I4(\j_reg[1] [1]),
        .I5(DO[3]),
        .O(\stateConfig_reg[3]_0 [1]));
  LUT6 #(
    .INIT(64'hFFFFFFFE00000002)) 
    \i2cRegaddr[4]_i_1 
       (.I0(\i2cRegaddr_reg[4] ),
        .I1(\j_reg[1] [3]),
        .I2(\j_reg[1] [2]),
        .I3(\j_reg[1] [0]),
        .I4(\j_reg[1] [1]),
        .I5(drdParrom),
        .O(\stateConfig_reg[3]_0 [2]));
  LUT6 #(
    .INIT(64'hFFFFFFFE00000002)) 
    \i2cRegaddr[6]_i_1 
       (.I0(\i2cRegaddr_reg[6] ),
        .I1(\j_reg[1] [3]),
        .I2(\j_reg[1] [2]),
        .I3(\j_reg[1] [0]),
        .I4(\j_reg[1] [1]),
        .I5(DO[5]),
        .O(\stateConfig_reg[3]_0 [3]));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \i2cSend[0]_i_2 
       (.I0(D[0]),
        .I1(reqInvSetReg),
        .I2(\i2cSend_reg[7] [0]),
        .I3(\aParrom_reg[10] ),
        .I4(specNotGnr_reg_1),
        .I5(DO[0]),
        .O(\invbuf_reg[2][0] ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \i2cSend[1]_i_2 
       (.I0(D[1]),
        .I1(reqInvSetReg),
        .I2(\i2cSend_reg[7] [1]),
        .I3(\aParrom_reg[10] ),
        .I4(specNotGnr_reg_1),
        .I5(DO[1]),
        .O(\invbuf_reg[2][1] ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \i2cSend[2]_i_2 
       (.I0(D[2]),
        .I1(reqInvSetReg),
        .I2(\i2cSend_reg[7] [2]),
        .I3(\aParrom_reg[10] ),
        .I4(specNotGnr_reg_1),
        .I5(DO[2]),
        .O(\invbuf_reg[2][2] ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \i2cSend[3]_i_2 
       (.I0(D[3]),
        .I1(reqInvSetReg),
        .I2(\i2cSend_reg[7] [3]),
        .I3(\aParrom_reg[10] ),
        .I4(specNotGnr_reg_1),
        .I5(DO[3]),
        .O(\invbuf_reg[2][3] ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \i2cSend[4]_i_2 
       (.I0(D[4]),
        .I1(reqInvSetReg),
        .I2(\i2cSend_reg[7] [4]),
        .I3(\aParrom_reg[10] ),
        .I4(specNotGnr_reg_1),
        .I5(drdParrom),
        .O(\invbuf_reg[2][4] ));
  LUT6 #(
    .INIT(64'hFF0FFFF7FFFFFFF7)) 
    \i2cSend[5]_i_2 
       (.I0(reqInvSetReg),
        .I1(D[5]),
        .I2(\j_reg[1] [2]),
        .I3(\j_reg[1] [0]),
        .I4(\j_reg[1] [1]),
        .I5(DO[4]),
        .O(\invbuf_reg[2][5] ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \i2cSend[6]_i_2 
       (.I0(D[6]),
        .I1(reqInvSetReg),
        .I2(\i2cSend_reg[7] [5]),
        .I3(\aParrom_reg[10] ),
        .I4(specNotGnr_reg_1),
        .I5(DO[5]),
        .O(\invbuf_reg[2][6] ));
  LUT6 #(
    .INIT(64'h47FF000047FF47FF)) 
    \i2cSend[7]_i_6 
       (.I0(D[7]),
        .I1(reqInvSetReg),
        .I2(\i2cSend_reg[7] [6]),
        .I3(\aParrom_reg[10] ),
        .I4(specNotGnr_reg_1),
        .I5(DO[6]),
        .O(\invbuf_reg[2][7] ));
  LUT6 #(
    .INIT(64'h0000008000000000)) 
    \j[7]_i_1 
       (.I0(specNotGnr),
        .I1(\j_reg[1] [1]),
        .I2(\j_reg[1] [2]),
        .I3(\j_reg[1] [3]),
        .I4(\j_reg[1] [0]),
        .I5(reset_reg),
        .O(specNotGnr_reg_0));
  LUT6 #(
    .INIT(64'h5554545444444444)) 
    \j[7]_i_2 
       (.I0(\j_reg[7] ),
        .I1(\j_reg[7]_0 ),
        .I2(\j_reg[7]_1 ),
        .I3(\j[7]_i_6_n_0 ),
        .I4(\stateConfig_reg[2]_1 ),
        .I5(\j_reg[7]_2 ),
        .O(reset_reg));
  LUT2 #(
    .INIT(4'h2)) 
    \j[7]_i_6 
       (.I0(aParrom1),
        .I1(specNotGnr),
        .O(\j[7]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'h44454444)) 
    \k[1]_i_1 
       (.I0(\j_reg[7] ),
        .I1(\k[1]_i_4_n_0 ),
        .I2(i2cReadNotWrite),
        .I3(prepdone),
        .I4(ackLiveToConfigSetReg),
        .O(SR));
  LUT6 #(
    .INIT(64'h0022302000000000)) 
    \k[1]_i_4 
       (.I0(\k_reg[1] ),
        .I1(\j_reg[1] [3]),
        .I2(\k[1]_i_7_n_0 ),
        .I3(\j_reg[1] [2]),
        .I4(\j_reg[1] [0]),
        .I5(\j_reg[1] [1]),
        .O(\k[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000044404440444)) 
    \k[1]_i_7 
       (.I0(\k[1]_i_4_0 [2]),
        .I1(\j_reg[1] [2]),
        .I2(\k[1]_i_4_0 [0]),
        .I3(\k[1]_i_4_0 [1]),
        .I4(aParrom1),
        .I5(specNotGnr),
        .O(\k[1]_i_7_n_0 ));
  (* XILINX_LEGACY_PRIM = "RAMB16_S9" *) 
  (* XILINX_TRANSFORM_PINMAP = "ADDR[0]:ADDRARDADDR[3] ADDR[10]:ADDRARDADDR[13] ADDR[1]:ADDRARDADDR[4] ADDR[2]:ADDRARDADDR[5] ADDR[3]:ADDRARDADDR[6] ADDR[4]:ADDRARDADDR[7] ADDR[5]:ADDRARDADDR[8] ADDR[6]:ADDRARDADDR[9] ADDR[7]:ADDRARDADDR[10] ADDR[8]:ADDRARDADDR[11] ADDR[9]:ADDRARDADDR[12] CLK:CLKARDCLK DI[0]:DINADIN[0] DI[1]:DINADIN[1] DI[2]:DINADIN[2] DI[3]:DINADIN[3] DI[4]:DINADIN[4] DI[5]:DINADIN[5] DI[6]:DINADIN[6] DI[7]:DINADIN[7] DIP[0]:DINPADINP[0] DO[0]:DOUTADOUT[0] DO[1]:DOUTADOUT[1] DO[2]:DOUTADOUT[2] DO[3]:DOUTADOUT[3] DO[4]:DOUTADOUT[4] DO[5]:DOUTADOUT[5] DO[6]:DOUTADOUT[6] DO[7]:DOUTADOUT[7] DOP[0]:DOUTPADOUTP[0] EN:ENARDEN SSR:RSTRAMARSTRAM WE:WEA[0] GND:SLEEP,CASOREGIMUXB,CASOREGIMUXA,CASDOMUXB,CASDOMUXA,CASDIMUXB,CASDIMUXA,WEBWE[3],WEBWE[2],WEBWE[1],WEBWE[0],RSTREGB,RSTREGARSTREG,RSTRAMB,ENBWREN,CLKBWRCLK VCC:CASOREGIMUXEN_B,CASOREGIMUXEN_A,CASDOMUXEN_B,CASDOMUXEN_A,ADDRENB,ADDRENA,ADDRBWRADDR[9],ADDRBWRADDR[8],ADDRBWRADDR[7],ADDRBWRADDR[6],ADDRBWRADDR[5],ADDRBWRADDR[4],ADDRBWRADDR[3],ADDRBWRADDR[2],ADDRBWRADDR[1],ADDRBWRADDR[13],ADDRBWRADDR[12],ADDRBWRADDR[11],ADDRBWRADDR[10],ADDRBWRADDR[0],ADDRARDADDR[2],ADDRARDADDR[1],ADDRARDADDR[0] DIADI[10]:DINADIN[10] DIADI[11]:DINADIN[11] DIADI[12]:DINADIN[12] DIADI[13]:DINADIN[13] DIADI[14]:DINADIN[14] DIADI[15]:DINADIN[15] DIADI[8]:DINADIN[8] DIADI[9]:DINADIN[9] DIBDI[0]:DINBDIN[0] DIBDI[10]:DINBDIN[10] DIBDI[11]:DINBDIN[11] DIBDI[12]:DINBDIN[12] DIBDI[13]:DINBDIN[13] DIBDI[14]:DINBDIN[14] DIBDI[15]:DINBDIN[15] DIBDI[1]:DINBDIN[1] DIBDI[2]:DINBDIN[2] DIBDI[3]:DINBDIN[3] DIBDI[4]:DINBDIN[4] DIBDI[5]:DINBDIN[5] DIBDI[6]:DINBDIN[6] DIBDI[7]:DINBDIN[7] DIBDI[8]:DINBDIN[8] DIBDI[9]:DINBDIN[9] DIPADIP[1]:DINPADINP[1] DIPBDIP[0]:DINPBDINP[0] DIPBDIP[1]:DINPBDINP[1] DOADO[10]:DOUTADOUT[10] DOADO[11]:DOUTADOUT[11] DOADO[12]:DOUTADOUT[12] DOADO[13]:DOUTADOUT[13] DOADO[14]:DOUTADOUT[14] DOADO[15]:DOUTADOUT[15] DOADO[8]:DOUTADOUT[8] DOADO[9]:DOUTADOUT[9] DOBDO[0]:DOUTBDOUT[0] DOBDO[10]:DOUTBDOUT[10] DOBDO[11]:DOUTBDOUT[11] DOBDO[12]:DOUTBDOUT[12] DOBDO[13]:DOUTBDOUT[13] DOBDO[14]:DOUTBDOUT[14] DOBDO[15]:DOUTBDOUT[15] DOBDO[1]:DOUTBDOUT[1] DOBDO[2]:DOUTBDOUT[2] DOBDO[3]:DOUTBDOUT[3] DOBDO[4]:DOUTBDOUT[4] DOBDO[5]:DOUTBDOUT[5] DOBDO[6]:DOUTBDOUT[6] DOBDO[7]:DOUTBDOUT[7] DOBDO[8]:DOUTBDOUT[8] DOBDO[9]:DOUTBDOUT[9] DOPADOP[1]:DOUTPADOUTP[1] DOPBDOP[0]:DOUTPBDOUTP[0] DOPBDOP[1]:DOUTPBDOUTP[1]" *) 
  (* box_type = "PRIMITIVE" *) 
  RAMB18E2 #(
    .DOA_REG(0),
    .DOB_REG(0),
    .INITP_00(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_01(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_02(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_03(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_04(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_05(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_06(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_07(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_00(256'h000114010009EB300005EB3000FF0B3000FF0A30000CEB300005EB3000000001),
    .INIT_01(256'h0001640100786301000D6201005961010004600100002B0100182A0100002801),
    .INIT_02(256'h00076C0100906B0100086A01000F69010001680100776701000B660100586501),
    .INIT_03(256'h000A8C010000750100007401000171010001700100386F0100046E0100806D01),
    .INIT_04(256'h000A0903006007030000060300030503000304030001030300050103000A8D01),
    .INIT_05(256'h0040570100720D0300000C0300010B03000A090300720D0300000C0300010B03),
    .INIT_06(256'h00545B0100045A0100786301000D620100E36101000660010000590100025801),
    .INIT_07(256'h00F09A0100F09901000098010000950100009401000193010000910100019001),
    .INIT_08(256'h000CA2010000A1010008A00100009F0100089E0100009D01000A9C0100009B01),
    .INIT_09(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_10(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_11(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_12(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_13(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_14(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_15(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_16(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_17(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_18(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_19(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_20(256'h008F183A0003013A00019D3100001D3400471C34000150300001023000010030),
    .INIT_21(256'h007F263A004F243A0087223A004F203A00011F3A00371E3A00471C3A004F1A3A),
    .INIT_22(256'h00302C30000235300026343000003230001131300094303000001830003F283A),
    .INIT_23(256'h005876300000753000B074300097573000AC5630000A2F3000382E3000002D30),
    .INIT_24(256'h00840C300010D930004CD8300000CF300000CE300000C7300000C630000F7730),
    .INIT_25(256'h002188320000A13100019E31007F6A31008F683100035A3100B04C31005D0D30),
    .INIT_26(256'h00317C360001783600044C3600044A3600014836001816340005143400028A32),
    .INIT_27(256'h003D1C3700031737000116370002153700021437000308370010063700317E36),
    .INIT_28(256'h00083237000031370089303700002F3700462E3700002D3700002C37003F1D37),
    .INIT_29(256'h0001603700115F3700005E3700005D37000240370005353700FE343700013337),
    .INIT_2A(256'h00007637000F6E3700176D37001A6C37001B6B37001B6A37001B6937001B6837),
    .INIT_2B(256'h00237E3700017D3700087C3700007B3700897A37000079370046783700007737),
    .INIT_2C(256'h00D98A37000F883700A584370006833700F582370003813700D9803700027F37),
    .INIT_2D(256'h007A94370043923700F5903700068F3700878E3700058D3700EB8C3700038B37),
    .INIT_2E(256'h00000000000000000000000000000000000000300001003A0036B03700A19637),
    .INIT_2F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_30(256'h0000000000000000000000000000000000000000000000000000000000000230),
    .INIT_31(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_32(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_33(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_34(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_35(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_36(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_37(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_38(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_39(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_A(18'h00000),
    .INIT_B(18'h00000),
    .READ_WIDTH_A(9),
    .READ_WIDTH_B(0),
    .RSTREG_PRIORITY_A("REGCE"),
    .RSTREG_PRIORITY_B("REGCE"),
    .SIM_COLLISION_CHECK("ALL"),
    .SRVAL_A(18'h00000),
    .SRVAL_B(18'h00000),
    .WRITE_MODE_A("WRITE_FIRST"),
    .WRITE_MODE_B("WRITE_FIRST"),
    .WRITE_WIDTH_A(9),
    .WRITE_WIDTH_B(0)) 
    myBram
       (.ADDRARDADDR({Q,1'b1,1'b1,1'b1}),
        .ADDRBWRADDR({1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1}),
        .ADDRENA(1'b1),
        .ADDRENB(1'b1),
        .CASDIMUXA(1'b0),
        .CASDIMUXB(1'b0),
        .CASDINA(NLW_myBram_CASDINA_UNCONNECTED[15:0]),
        .CASDINB(NLW_myBram_CASDINB_UNCONNECTED[15:0]),
        .CASDINPA(NLW_myBram_CASDINPA_UNCONNECTED[1:0]),
        .CASDINPB(NLW_myBram_CASDINPB_UNCONNECTED[1:0]),
        .CASDOMUXA(1'b0),
        .CASDOMUXB(1'b0),
        .CASDOMUXEN_A(1'b1),
        .CASDOMUXEN_B(1'b1),
        .CASDOUTA(NLW_myBram_CASDOUTA_UNCONNECTED[15:0]),
        .CASDOUTB(NLW_myBram_CASDOUTB_UNCONNECTED[15:0]),
        .CASDOUTPA(NLW_myBram_CASDOUTPA_UNCONNECTED[1:0]),
        .CASDOUTPB(NLW_myBram_CASDOUTPB_UNCONNECTED[1:0]),
        .CASOREGIMUXA(1'b0),
        .CASOREGIMUXB(1'b0),
        .CASOREGIMUXEN_A(1'b1),
        .CASOREGIMUXEN_B(1'b1),
        .CLKARDCLK(aclk_sig),
        .CLKBWRCLK(1'b0),
        .DINADIN({NLW_myBram_DINADIN_UNCONNECTED[15:8],1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .DINBDIN(NLW_myBram_DINBDIN_UNCONNECTED[15:0]),
        .DINPADINP({NLW_myBram_DINPADINP_UNCONNECTED[1],1'b0}),
        .DINPBDINP(NLW_myBram_DINPBDINP_UNCONNECTED[1:0]),
        .DOUTADOUT({NLW_myBram_DOUTADOUT_UNCONNECTED[15:8],DO[6:4],drdParrom,DO[3:0]}),
        .DOUTBDOUT(NLW_myBram_DOUTBDOUT_UNCONNECTED[15:0]),
        .DOUTPADOUTP(NLW_myBram_DOUTPADOUTP_UNCONNECTED[1:0]),
        .DOUTPBDOUTP(NLW_myBram_DOUTPBDOUTP_UNCONNECTED[1:0]),
        .ENARDEN(en),
        .ENBWREN(1'b0),
        .REGCEAREGCE(1'b0),
        .REGCEB(1'b0),
        .RSTRAMARSTRAM(1'b0),
        .RSTRAMB(1'b0),
        .RSTREGARSTREG(1'b0),
        .RSTREGB(1'b0),
        .SLEEP(1'b0),
        .WEA({1'b0,1'b0}),
        .WEBWE({1'b0,1'b0,1'b0,1'b0}));
  (* SOFT_HLUTNM = "soft_lutpair619" *) 
  LUT4 #(
    .INIT(16'h0400)) 
    myBram_i_1
       (.I0(\j_reg[1] [3]),
        .I1(\j_reg[1] [2]),
        .I2(\j_reg[1] [1]),
        .I3(\j_reg[1] [0]),
        .O(en));
  LUT6 #(
    .INIT(64'hFFFFFFFF80000000)) 
    prepdone_i_1
       (.I0(aParrom1),
        .I1(specNotGnr),
        .I2(\j_reg[1] [1]),
        .I3(\j_reg[1] [2]),
        .I4(prepdone_reg_0),
        .I5(prepdone),
        .O(specNotGnr_reg));
  LUT6 #(
    .INIT(64'h00000000FFFF0100)) 
    specNotGnr_i_1
       (.I0(specNotGnr_reg_1),
        .I1(\j_reg[1] [3]),
        .I2(\j_reg[7] ),
        .I3(aParrom1),
        .I4(specNotGnr),
        .I5(specNotGnr_reg_2),
        .O(\stateConfig_reg[3] ));
  LUT6 #(
    .INIT(64'hAAAAABAAABAAABAA)) 
    \stateConfig[0]_i_1 
       (.I0(\stateConfig_reg[0]_0 ),
        .I1(\j_reg[1] [0]),
        .I2(\j_reg[1] [3]),
        .I3(\j_reg[1] [2]),
        .I4(\j_reg[1] [1]),
        .I5(aParrom1),
        .O(\stateConfig_reg[0] [0]));
  LUT6 #(
    .INIT(64'h3F053F053F050F05)) 
    \stateConfig[1]_i_2 
       (.I0(\stateConfig_reg[1]_1 ),
        .I1(\j_reg[1] [0]),
        .I2(\j_reg[1] [1]),
        .I3(\j_reg[1] [2]),
        .I4(\j[7]_i_6_n_0 ),
        .I5(\stateConfig_reg[1]_2 ),
        .O(\stateConfig[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hCDCCCDCCCDFCCDCC)) 
    \stateConfig[2]_i_1 
       (.I0(\stateConfig_reg[2] ),
        .I1(\stateConfig_reg[2]_0 ),
        .I2(\j_reg[1] [2]),
        .I3(\j_reg[1] [3]),
        .I4(\stateConfig_reg[2]_1 ),
        .I5(aParrom1),
        .O(\stateConfig_reg[0] [2]));
  LUT6 #(
    .INIT(64'h0000000000000002)) 
    \stateConfig[2]_i_3 
       (.I0(\i2cRegaddr_reg[15]_0 ),
        .I1(\stateConfig[2]_i_4_n_0 ),
        .I2(DO[3]),
        .I3(DO[2]),
        .I4(DO[1]),
        .I5(DO[0]),
        .O(aParrom1));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateConfig[2]_i_4 
       (.I0(DO[4]),
        .I1(drdParrom),
        .I2(DO[5]),
        .I3(DO[6]),
        .O(\stateConfig[2]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h00FC22000000AA00)) 
    \stateConfig[3]_i_2 
       (.I0(\stateConfig_reg[2] ),
        .I1(\j_reg[1] [0]),
        .I2(\j[7]_i_6_n_0 ),
        .I3(\j_reg[1] [3]),
        .I4(\j_reg[1] [2]),
        .I5(\j_reg[1] [1]),
        .O(\stateConfig_reg[0] [3]));
  MUXF7 \stateConfig_reg[1]_i_1 
       (.I0(\stateConfig[1]_i_2_n_0 ),
        .I1(\stateConfig_reg[1]_0 ),
        .O(\stateConfig_reg[0] [1]),
        .S(\j_reg[1] [3]));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Rgbled_v1_0
   (rgb0_r,
    rgb0_g,
    rgb0_b,
    \i_reg[6]_0 ,
    \i_reg[7]_0 ,
    D,
    \i_reg[7]__1_0 ,
    aclk_sig,
    \i_reg[0]__1_0 ,
    DI,
    S,
    stateGreen_reg_0,
    stateGreen_reg_1,
    stateBlue_i_2_0,
    rgb0,
    \seq_reg[1]_0 ,
    \stateGreen0_inferred__0/i__carry_0 ,
    Q);
  output rgb0_r;
  output rgb0_g;
  output rgb0_b;
  output [3:0]\i_reg[6]_0 ;
  output \i_reg[7]_0 ;
  output [3:0]D;
  output \i_reg[7]__1_0 ;
  input aclk_sig;
  input [0:0]\i_reg[0]__1_0 ;
  input [1:0]DI;
  input [1:0]S;
  input [1:0]stateGreen_reg_0;
  input [1:0]stateGreen_reg_1;
  input [0:0]stateBlue_i_2_0;
  input [1:0]rgb0;
  input [0:0]\seq_reg[1]_0 ;
  input \stateGreen0_inferred__0/i__carry_0 ;
  input [0:0]Q;

  wire [3:0]D;
  wire [1:0]DI;
  wire [0:0]Q;
  wire [1:0]S;
  wire aclk_sig;
  wire data0;
  wire \i[0]__0_i_1__1_n_0 ;
  wire \i[0]__1_i_1__0_n_0 ;
  wire \i[1]__0_i_1__1_n_0 ;
  wire \i[1]__1_i_1_n_0 ;
  wire \i[2]__0_i_1__0_n_0 ;
  wire \i[2]__1_i_1_n_0 ;
  wire \i[3]__0_i_1__0_n_0 ;
  wire \i[3]__1_i_1_n_0 ;
  wire \i[4]__1_i_1_n_0 ;
  wire \i[5]__1_i_1_n_0 ;
  wire \i[6]__1_i_1_n_0 ;
  wire \i[7]__0_i_2_n_0 ;
  wire \i[7]__1_i_1_n_0 ;
  wire \i[7]__1_i_2_n_0 ;
  wire \i[7]_i_2__1_n_0 ;
  wire \i[8]__0_i_1_n_0 ;
  wire \i[8]__0_i_2_n_0 ;
  wire \i[8]__1_i_1_n_0 ;
  wire i__carry_i_11__0_n_0;
  wire i__carry_i_2_n_0;
  wire i__carry_i_3__0_n_0;
  wire i__carry_i_3__1_n_0;
  wire i__carry_i_3_n_0;
  wire i__carry_i_4__0_n_0;
  wire i__carry_i_4__1_n_0;
  wire i__carry_i_4_n_0;
  wire i__carry_i_5__0_n_0;
  wire i__carry_i_5__1_n_0;
  wire i__carry_i_5_n_0;
  wire i__carry_i_6__0_n_0;
  wire i__carry_i_7_n_0;
  wire i__carry_i_8__0_n_0;
  wire i__carry_i_8__1_n_0;
  wire i__carry_i_8_n_0;
  wire i__carry_i_9__0_n_0;
  wire i__carry_i_9__1_n_0;
  wire i__carry_i_9_n_0;
  wire \i_reg[0]__0_n_0 ;
  wire [0:0]\i_reg[0]__1_0 ;
  wire \i_reg[0]__1_n_0 ;
  wire \i_reg[1]__0_n_0 ;
  wire \i_reg[1]__1_n_0 ;
  wire \i_reg[2]__0_n_0 ;
  wire \i_reg[2]__1_n_0 ;
  wire \i_reg[3]__0_n_0 ;
  wire \i_reg[3]__1_n_0 ;
  wire \i_reg[4]__0_n_0 ;
  wire \i_reg[4]__1_n_0 ;
  wire \i_reg[5]__0_n_0 ;
  wire \i_reg[5]__1_n_0 ;
  wire [3:0]\i_reg[6]_0 ;
  wire \i_reg[6]__0_n_0 ;
  wire \i_reg[6]__1_n_0 ;
  wire \i_reg[7]_0 ;
  wire \i_reg[7]__0_n_0 ;
  wire \i_reg[7]__1_0 ;
  wire \i_reg[7]__1_n_0 ;
  wire \i_reg[8]__0_n_0 ;
  wire \i_reg[8]__1_n_0 ;
  wire \i_reg_n_0_[0] ;
  wire \i_reg_n_0_[1] ;
  wire \i_reg_n_0_[2] ;
  wire \i_reg_n_0_[3] ;
  wire \i_reg_n_0_[4] ;
  wire \i_reg_n_0_[5] ;
  wire \i_reg_n_0_[6] ;
  wire \i_reg_n_0_[7] ;
  wire \i_reg_n_0_[8] ;
  wire [9:0]j;
  wire \j[0]__0_i_1__0_n_0 ;
  wire \j[0]_i_1__0_n_0 ;
  wire \j[1]__0_i_1_n_0 ;
  wire \j[1]_i_1__0_n_0 ;
  wire \j[2]__0_i_1_n_0 ;
  wire \j[2]_i_1__0_n_0 ;
  wire \j[3]__0_i_1_n_0 ;
  wire \j[3]_i_1__0_n_0 ;
  wire \j[4]__0_i_1_n_0 ;
  wire \j[4]_i_1__0_n_0 ;
  wire \j[5]__0_i_1_n_0 ;
  wire \j[5]_i_1__0_n_0 ;
  wire \j[6]__0_i_1_n_0 ;
  wire \j[6]_i_1__0_n_0 ;
  wire \j[7]__0_i_1_n_0 ;
  wire \j[7]__0_i_2_n_0 ;
  wire \j[7]__1_i_2_n_0 ;
  wire \j[7]_i_1__0_n_0 ;
  wire \j[7]_i_2__0_n_0 ;
  wire \j[8]__0_i_1_n_0 ;
  wire \j[8]__0_i_2_n_0 ;
  wire \j[8]__1_i_2_n_0 ;
  wire \j[8]_i_1_n_0 ;
  wire \j[8]_i_2_n_0 ;
  wire \j[9]__0_i_1_n_0 ;
  wire \j[9]__0_i_2_n_0 ;
  wire \j[9]__0_i_3_n_0 ;
  wire \j[9]__0_i_4_n_0 ;
  wire \j[9]__1_i_2_n_0 ;
  wire \j[9]__1_i_3_n_0 ;
  wire \j[9]__1_i_4_n_0 ;
  wire \j[9]_i_1_n_0 ;
  wire \j[9]_i_2_n_0 ;
  wire \j[9]_i_3_n_0 ;
  wire \j[9]_i_4_n_0 ;
  wire \j_reg[0]__0_n_0 ;
  wire \j_reg[0]__1_n_0 ;
  wire \j_reg[1]__0_n_0 ;
  wire \j_reg[1]__1_n_0 ;
  wire \j_reg[2]__0_n_0 ;
  wire \j_reg[2]__1_n_0 ;
  wire \j_reg[3]__0_n_0 ;
  wire \j_reg[3]__1_n_0 ;
  wire \j_reg[4]__0_n_0 ;
  wire \j_reg[4]__1_n_0 ;
  wire \j_reg[5]__0_n_0 ;
  wire \j_reg[5]__1_n_0 ;
  wire \j_reg[6]__0_n_0 ;
  wire \j_reg[6]__1_n_0 ;
  wire \j_reg[7]__0_n_0 ;
  wire \j_reg[7]__1_n_0 ;
  wire \j_reg[8]__0_n_0 ;
  wire \j_reg[8]__1_n_0 ;
  wire \j_reg[9]__0_n_0 ;
  wire \j_reg[9]__1_n_0 ;
  wire \j_reg_n_0_[0] ;
  wire \j_reg_n_0_[1] ;
  wire \j_reg_n_0_[2] ;
  wire \j_reg_n_0_[3] ;
  wire \j_reg_n_0_[4] ;
  wire \j_reg_n_0_[5] ;
  wire \j_reg_n_0_[6] ;
  wire \j_reg_n_0_[7] ;
  wire \j_reg_n_0_[8] ;
  wire \j_reg_n_0_[9] ;
  wire [8:6]p_0_in;
  wire p_2_in;
  wire [1:0]rgb0;
  wire rgb0_b;
  wire rgb0_g;
  wire rgb0_r;
  wire [8:8]sel0;
  wire [3:0]sel0__0;
  wire [0:0]\seq_reg[1]_0 ;
  wire \stateBlue0_inferred__0/i__carry_n_3 ;
  wire \stateBlue0_inferred__0/i__carry_n_4 ;
  wire \stateBlue0_inferred__0/i__carry_n_5 ;
  wire \stateBlue0_inferred__0/i__carry_n_6 ;
  wire \stateBlue0_inferred__0/i__carry_n_7 ;
  wire stateBlue_i_1_n_0;
  wire [0:0]stateBlue_i_2_0;
  wire stateBlue_i_2_n_0;
  wire stateBlue_i_3_n_0;
  wire stateBlue_i_4_n_0;
  wire stateBlue_i_5_n_0;
  wire stateBlue_i_7_n_0;
  wire stateBlue_i_8_n_0;
  wire stateBlue_i_9_n_0;
  wire \stateGreen0_inferred__0/i__carry_0 ;
  wire \stateGreen0_inferred__0/i__carry_n_3 ;
  wire \stateGreen0_inferred__0/i__carry_n_4 ;
  wire \stateGreen0_inferred__0/i__carry_n_5 ;
  wire \stateGreen0_inferred__0/i__carry_n_6 ;
  wire \stateGreen0_inferred__0/i__carry_n_7 ;
  wire stateGreen_i_1_n_0;
  wire stateGreen_i_2_n_0;
  wire stateGreen_i_3_n_0;
  wire stateGreen_i_4_n_0;
  wire stateGreen_i_5_n_0;
  wire stateGreen_i_6_n_0;
  wire [1:0]stateGreen_reg_0;
  wire [1:0]stateGreen_reg_1;
  wire \stateRed0_inferred__0/i__carry_n_4 ;
  wire \stateRed0_inferred__0/i__carry_n_5 ;
  wire \stateRed0_inferred__0/i__carry_n_6 ;
  wire \stateRed0_inferred__0/i__carry_n_7 ;
  wire stateRed_i_1_n_0;
  wire stateRed_i_2_n_0;
  wire stateRed_i_3_n_0;
  wire stateRed_i_4_n_0;
  wire stateRed_i_7_n_0;
  wire stateRed_i_8_n_0;
  wire [7:5]\NLW_stateBlue0_inferred__0/i__carry_CO_UNCONNECTED ;
  wire [7:0]\NLW_stateBlue0_inferred__0/i__carry_O_UNCONNECTED ;
  wire [7:5]\NLW_stateGreen0_inferred__0/i__carry_CO_UNCONNECTED ;
  wire [7:0]\NLW_stateGreen0_inferred__0/i__carry_O_UNCONNECTED ;
  wire [7:5]\NLW_stateRed0_inferred__0/i__carry_CO_UNCONNECTED ;
  wire [7:0]\NLW_stateRed0_inferred__0/i__carry_O_UNCONNECTED ;

  (* SOFT_HLUTNM = "soft_lutpair2616" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \i[0]__0_i_1__1 
       (.I0(\i_reg[0]__0_n_0 ),
        .I1(\j[9]__0_i_3_n_0 ),
        .O(\i[0]__0_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2617" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \i[0]__1_i_1__0 
       (.I0(\i_reg[0]__1_n_0 ),
        .I1(\j[9]__1_i_3_n_0 ),
        .O(\i[0]__1_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2615" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \i[0]_i_1__7 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\j[9]_i_3_n_0 ),
        .O(sel0__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair2616" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[1]__0_i_1__1 
       (.I0(\i_reg[0]__0_n_0 ),
        .I1(\j[9]__0_i_3_n_0 ),
        .I2(\i_reg[1]__0_n_0 ),
        .O(\i[1]__0_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2612" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[1]__1_i_1 
       (.I0(\i_reg[0]__1_n_0 ),
        .I1(\j[9]__1_i_3_n_0 ),
        .I2(\i_reg[1]__1_n_0 ),
        .O(\i[1]__1_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2615" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[1]_i_1__6 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\j[9]_i_3_n_0 ),
        .I2(\i_reg_n_0_[1] ),
        .O(sel0__0[1]));
  (* SOFT_HLUTNM = "soft_lutpair2601" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \i[2]__0_i_1__0 
       (.I0(\i_reg[1]__0_n_0 ),
        .I1(\j[9]__0_i_3_n_0 ),
        .I2(\i_reg[0]__0_n_0 ),
        .I3(\i_reg[2]__0_n_0 ),
        .O(\i[2]__0_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2612" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \i[2]__1_i_1 
       (.I0(\i_reg[1]__1_n_0 ),
        .I1(\j[9]__1_i_3_n_0 ),
        .I2(\i_reg[0]__1_n_0 ),
        .I3(\i_reg[2]__1_n_0 ),
        .O(\i[2]__1_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2597" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \i[2]_i_1__3 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\j[9]_i_3_n_0 ),
        .I2(\i_reg_n_0_[0] ),
        .I3(\i_reg_n_0_[2] ),
        .O(sel0__0[2]));
  (* SOFT_HLUTNM = "soft_lutpair2601" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \i[3]__0_i_1__0 
       (.I0(\i_reg[2]__0_n_0 ),
        .I1(\i_reg[0]__0_n_0 ),
        .I2(\j[9]__0_i_3_n_0 ),
        .I3(\i_reg[1]__0_n_0 ),
        .I4(\i_reg[3]__0_n_0 ),
        .O(\i[3]__0_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2604" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \i[3]__1_i_1 
       (.I0(\i_reg[2]__1_n_0 ),
        .I1(\i_reg[0]__1_n_0 ),
        .I2(\j[9]__1_i_3_n_0 ),
        .I3(\i_reg[1]__1_n_0 ),
        .I4(\i_reg[3]__1_n_0 ),
        .O(\i[3]__1_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2597" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \i[3]_i_1__3 
       (.I0(\i_reg_n_0_[2] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\j[9]_i_3_n_0 ),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[3] ),
        .O(sel0__0[3]));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \i[4]__0_i_1 
       (.I0(\i_reg[1]__0_n_0 ),
        .I1(\j[9]__0_i_3_n_0 ),
        .I2(\i_reg[0]__0_n_0 ),
        .I3(\i_reg[2]__0_n_0 ),
        .I4(\i_reg[3]__0_n_0 ),
        .I5(\i_reg[4]__0_n_0 ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \i[4]__1_i_1 
       (.I0(\i_reg[1]__1_n_0 ),
        .I1(\j[9]__1_i_3_n_0 ),
        .I2(\i_reg[0]__1_n_0 ),
        .I3(\i_reg[2]__1_n_0 ),
        .I4(\i_reg[3]__1_n_0 ),
        .I5(\i_reg[4]__1_n_0 ),
        .O(\i[4]__1_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \i[4]_i_1__3 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\j[9]_i_3_n_0 ),
        .I2(\i_reg_n_0_[0] ),
        .I3(\i_reg_n_0_[2] ),
        .I4(\i_reg_n_0_[3] ),
        .I5(\i_reg_n_0_[4] ),
        .O(\i_reg[6]_0 [0]));
  LUT2 #(
    .INIT(4'h9)) 
    \i[5]__0_i_1 
       (.I0(\i[7]__0_i_2_n_0 ),
        .I1(\i_reg[5]__0_n_0 ),
        .O(D[1]));
  LUT2 #(
    .INIT(4'h9)) 
    \i[5]__1_i_1 
       (.I0(\i[7]__1_i_2_n_0 ),
        .I1(\i_reg[5]__1_n_0 ),
        .O(\i[5]__1_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \i[5]_i_1__2 
       (.I0(\i[7]_i_2__1_n_0 ),
        .I1(\i_reg_n_0_[5] ),
        .O(\i_reg[6]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2606" *) 
  LUT3 #(
    .INIT(8'hD2)) 
    \i[6]__0_i_1 
       (.I0(\i_reg[5]__0_n_0 ),
        .I1(\i[7]__0_i_2_n_0 ),
        .I2(\i_reg[6]__0_n_0 ),
        .O(D[2]));
  (* SOFT_HLUTNM = "soft_lutpair2613" *) 
  LUT3 #(
    .INIT(8'hB4)) 
    \i[6]__1_i_1 
       (.I0(\i[7]__1_i_2_n_0 ),
        .I1(\i_reg[5]__1_n_0 ),
        .I2(\i_reg[6]__1_n_0 ),
        .O(\i[6]__1_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2614" *) 
  LUT3 #(
    .INIT(8'hB4)) 
    \i[6]_i_1__4 
       (.I0(\i[7]_i_2__1_n_0 ),
        .I1(\i_reg_n_0_[5] ),
        .I2(\i_reg_n_0_[6] ),
        .O(p_0_in[6]));
  (* SOFT_HLUTNM = "soft_lutpair2600" *) 
  LUT4 #(
    .INIT(16'hDF20)) 
    \i[7]__0_i_1 
       (.I0(\i_reg[6]__0_n_0 ),
        .I1(\i[7]__0_i_2_n_0 ),
        .I2(\i_reg[5]__0_n_0 ),
        .I3(\i_reg[7]__0_n_0 ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \i[7]__0_i_2 
       (.I0(\i_reg[4]__0_n_0 ),
        .I1(\i_reg[1]__0_n_0 ),
        .I2(\j[9]__0_i_3_n_0 ),
        .I3(\i_reg[0]__0_n_0 ),
        .I4(\i_reg[2]__0_n_0 ),
        .I5(\i_reg[3]__0_n_0 ),
        .O(\i[7]__0_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2607" *) 
  LUT4 #(
    .INIT(16'hB4F0)) 
    \i[7]__1_i_1 
       (.I0(\i[7]__1_i_2_n_0 ),
        .I1(\i_reg[5]__1_n_0 ),
        .I2(\i_reg[7]__1_n_0 ),
        .I3(\i_reg[6]__1_n_0 ),
        .O(\i[7]__1_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \i[7]__1_i_2 
       (.I0(\i_reg[4]__1_n_0 ),
        .I1(\i_reg[1]__1_n_0 ),
        .I2(\j[9]__1_i_3_n_0 ),
        .I3(\i_reg[0]__1_n_0 ),
        .I4(\i_reg[2]__1_n_0 ),
        .I5(\i_reg[3]__1_n_0 ),
        .O(\i[7]__1_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2605" *) 
  LUT4 #(
    .INIT(16'hB4F0)) 
    \i[7]_i_1__4 
       (.I0(\i[7]_i_2__1_n_0 ),
        .I1(\i_reg_n_0_[5] ),
        .I2(\i_reg_n_0_[7] ),
        .I3(\i_reg_n_0_[6] ),
        .O(p_0_in[7]));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \i[7]_i_2__1 
       (.I0(\i_reg_n_0_[4] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\j[9]_i_3_n_0 ),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[2] ),
        .I5(\i_reg_n_0_[3] ),
        .O(\i[7]_i_2__1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \i[8]__0_i_1 
       (.I0(\i[8]__0_i_2_n_0 ),
        .I1(stateGreen_i_4_n_0),
        .O(\i[8]__0_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFBFFEFF)) 
    \i[8]__0_i_2 
       (.I0(stateGreen_i_5_n_0),
        .I1(\i_reg[7]__0_n_0 ),
        .I2(\i_reg[6]__0_n_0 ),
        .I3(\i[7]__0_i_2_n_0 ),
        .I4(\i_reg[5]__0_n_0 ),
        .I5(stateGreen_i_3_n_0),
        .O(\i[8]__0_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \i[8]__1_i_1 
       (.I0(stateBlue_i_4_n_0),
        .I1(stateBlue_i_5_n_0),
        .O(\i[8]__1_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \i[8]_i_1__1 
       (.I0(stateRed_i_4_n_0),
        .I1(sel0),
        .O(p_0_in[8]));
  (* SOFT_HLUTNM = "soft_lutpair2609" *) 
  LUT4 #(
    .INIT(16'hF7AE)) 
    i__carry_i_10__0
       (.I0(\i_reg_n_0_[7] ),
        .I1(\i_reg_n_0_[5] ),
        .I2(\i[7]_i_2__1_n_0 ),
        .I3(\i_reg_n_0_[6] ),
        .O(\i_reg[7]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2613" *) 
  LUT4 #(
    .INIT(16'hF7AE)) 
    i__carry_i_10__1
       (.I0(\i_reg[7]__1_n_0 ),
        .I1(\i_reg[5]__1_n_0 ),
        .I2(\i[7]__1_i_2_n_0 ),
        .I3(\i_reg[6]__1_n_0 ),
        .O(\i_reg[7]__1_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2614" *) 
  LUT3 #(
    .INIT(8'hD2)) 
    i__carry_i_11
       (.I0(\i_reg_n_0_[5] ),
        .I1(\i[7]_i_2__1_n_0 ),
        .I2(\i_reg_n_0_[6] ),
        .O(\i_reg[6]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2604" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    i__carry_i_11__0
       (.I0(\i_reg[3]__1_n_0 ),
        .I1(\i_reg[2]__1_n_0 ),
        .I2(\i_reg[0]__1_n_0 ),
        .I3(\j[9]__1_i_3_n_0 ),
        .I4(\i_reg[1]__1_n_0 ),
        .O(i__carry_i_11__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2609" *) 
  LUT4 #(
    .INIT(16'hDF20)) 
    i__carry_i_12
       (.I0(\i_reg_n_0_[6] ),
        .I1(\i[7]_i_2__1_n_0 ),
        .I2(\i_reg_n_0_[5] ),
        .I3(\i_reg_n_0_[7] ),
        .O(\i_reg[6]_0 [3]));
  LUT4 #(
    .INIT(16'h007E)) 
    i__carry_i_2
       (.I0(i__carry_i_11__0_n_0),
        .I1(\i_reg[4]__1_n_0 ),
        .I2(\i_reg[5]__1_n_0 ),
        .I3(rgb0[0]),
        .O(i__carry_i_2_n_0));
  LUT6 #(
    .INIT(64'h000000007FFFEAAA)) 
    i__carry_i_3
       (.I0(\i_reg[2]__1_n_0 ),
        .I1(\i_reg[0]__1_n_0 ),
        .I2(\j[9]__1_i_3_n_0 ),
        .I3(\i_reg[1]__1_n_0 ),
        .I4(\i_reg[3]__1_n_0 ),
        .I5(rgb0[0]),
        .O(i__carry_i_3_n_0));
  LUT6 #(
    .INIT(64'h000000007FFFEAAA)) 
    i__carry_i_3__0
       (.I0(\i_reg_n_0_[2] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\j[9]_i_3_n_0 ),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[3] ),
        .I5(rgb0[1]),
        .O(i__carry_i_3__0_n_0));
  LUT6 #(
    .INIT(64'h7FFFEAAA00000000)) 
    i__carry_i_3__1
       (.I0(\i_reg[2]__0_n_0 ),
        .I1(\i_reg[0]__0_n_0 ),
        .I2(\j[9]__0_i_3_n_0 ),
        .I3(\i_reg[1]__0_n_0 ),
        .I4(\i_reg[3]__0_n_0 ),
        .I5(\stateGreen0_inferred__0/i__carry_0 ),
        .O(i__carry_i_3__1_n_0));
  LUT4 #(
    .INIT(16'h007E)) 
    i__carry_i_4
       (.I0(\i_reg[0]__1_n_0 ),
        .I1(\j[9]__1_i_3_n_0 ),
        .I2(\i_reg[1]__1_n_0 ),
        .I3(rgb0[0]),
        .O(i__carry_i_4_n_0));
  LUT4 #(
    .INIT(16'h007E)) 
    i__carry_i_4__0
       (.I0(\i_reg_n_0_[0] ),
        .I1(\j[9]_i_3_n_0 ),
        .I2(\i_reg_n_0_[1] ),
        .I3(rgb0[1]),
        .O(i__carry_i_4__0_n_0));
  LUT5 #(
    .INIT(32'h007E7E7E)) 
    i__carry_i_4__1
       (.I0(\i_reg[0]__0_n_0 ),
        .I1(\j[9]__0_i_3_n_0 ),
        .I2(\i_reg[1]__0_n_0 ),
        .I3(Q),
        .I4(\seq_reg[1]_0 ),
        .O(i__carry_i_4__1_n_0));
  LUT1 #(
    .INIT(2'h1)) 
    i__carry_i_5
       (.I0(sel0),
        .O(i__carry_i_5_n_0));
  LUT1 #(
    .INIT(2'h1)) 
    i__carry_i_5__0
       (.I0(stateGreen_i_4_n_0),
        .O(i__carry_i_5__0_n_0));
  LUT1 #(
    .INIT(2'h1)) 
    i__carry_i_5__1
       (.I0(stateBlue_i_5_n_0),
        .O(i__carry_i_5__1_n_0));
  LUT5 #(
    .INIT(32'h88481181)) 
    i__carry_i_6__0
       (.I0(rgb0[0]),
        .I1(\i_reg[7]__1_n_0 ),
        .I2(\i_reg[5]__1_n_0 ),
        .I3(\i[7]__1_i_2_n_0 ),
        .I4(\i_reg[6]__1_n_0 ),
        .O(i__carry_i_6__0_n_0));
  LUT4 #(
    .INIT(16'h4881)) 
    i__carry_i_7
       (.I0(rgb0[0]),
        .I1(\i_reg[5]__1_n_0 ),
        .I2(\i_reg[4]__1_n_0 ),
        .I3(i__carry_i_11__0_n_0),
        .O(i__carry_i_7_n_0));
  LUT6 #(
    .INIT(64'h4888888881111111)) 
    i__carry_i_8
       (.I0(rgb0[0]),
        .I1(\i_reg[3]__1_n_0 ),
        .I2(\i_reg[1]__1_n_0 ),
        .I3(\j[9]__1_i_3_n_0 ),
        .I4(\i_reg[0]__1_n_0 ),
        .I5(\i_reg[2]__1_n_0 ),
        .O(i__carry_i_8_n_0));
  LUT6 #(
    .INIT(64'h4888888881111111)) 
    i__carry_i_8__0
       (.I0(rgb0[1]),
        .I1(\i_reg_n_0_[3] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\j[9]_i_3_n_0 ),
        .I4(\i_reg_n_0_[0] ),
        .I5(\i_reg_n_0_[2] ),
        .O(i__carry_i_8__0_n_0));
  LUT6 #(
    .INIT(64'h800015552AAA8000)) 
    i__carry_i_8__1
       (.I0(\i_reg[3]__0_n_0 ),
        .I1(\i_reg[1]__0_n_0 ),
        .I2(\j[9]__0_i_3_n_0 ),
        .I3(\i_reg[0]__0_n_0 ),
        .I4(\i_reg[2]__0_n_0 ),
        .I5(\stateGreen0_inferred__0/i__carry_0 ),
        .O(i__carry_i_8__1_n_0));
  LUT4 #(
    .INIT(16'h4881)) 
    i__carry_i_9
       (.I0(rgb0[0]),
        .I1(\i_reg[1]__1_n_0 ),
        .I2(\j[9]__1_i_3_n_0 ),
        .I3(\i_reg[0]__1_n_0 ),
        .O(i__carry_i_9_n_0));
  LUT4 #(
    .INIT(16'h4881)) 
    i__carry_i_9__0
       (.I0(rgb0[1]),
        .I1(\i_reg_n_0_[1] ),
        .I2(\j[9]_i_3_n_0 ),
        .I3(\i_reg_n_0_[0] ),
        .O(i__carry_i_9__0_n_0));
  LUT5 #(
    .INIT(32'h28818181)) 
    i__carry_i_9__1
       (.I0(\i_reg[1]__0_n_0 ),
        .I1(\j[9]__0_i_3_n_0 ),
        .I2(\i_reg[0]__0_n_0 ),
        .I3(\seq_reg[1]_0 ),
        .I4(Q),
        .O(i__carry_i_9__1_n_0));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(sel0__0[0]),
        .Q(\i_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[0]__0_i_1__1_n_0 ),
        .Q(\i_reg[0]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[0]__1_i_1__0_n_0 ),
        .Q(\i_reg[0]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(sel0__0[1]),
        .Q(\i_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[1]__0_i_1__1_n_0 ),
        .Q(\i_reg[1]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[1]__1_i_1_n_0 ),
        .Q(\i_reg[1]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(sel0__0[2]),
        .Q(\i_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[2]__0_i_1__0_n_0 ),
        .Q(\i_reg[2]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[2]__1_i_1_n_0 ),
        .Q(\i_reg[2]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(sel0__0[3]),
        .Q(\i_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[3]__0_i_1__0_n_0 ),
        .Q(\i_reg[3]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[3]__1_i_1_n_0 ),
        .Q(\i_reg[3]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i_reg[6]_0 [0]),
        .Q(\i_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(D[0]),
        .Q(\i_reg[4]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[4]__1_i_1_n_0 ),
        .Q(\i_reg[4]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i_reg[6]_0 [1]),
        .Q(\i_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[5]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(D[1]),
        .Q(\i_reg[5]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[5]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[5]__1_i_1_n_0 ),
        .Q(\i_reg[5]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(p_0_in[6]),
        .Q(\i_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[6]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(D[2]),
        .Q(\i_reg[6]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[6]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[6]__1_i_1_n_0 ),
        .Q(\i_reg[6]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(p_0_in[7]),
        .Q(\i_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[7]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(D[3]),
        .Q(\i_reg[7]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[7]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[7]__1_i_1_n_0 ),
        .Q(\i_reg[7]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(p_0_in[8]),
        .Q(\i_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[8]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[8]__0_i_1_n_0 ),
        .Q(\i_reg[8]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[8]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\i[8]__1_i_1_n_0 ),
        .Q(\i_reg[8]__1_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \j[0]__0_i_1__0 
       (.I0(\j[9]__0_i_3_n_0 ),
        .I1(\j_reg[0]__0_n_0 ),
        .O(\j[0]__0_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2617" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \j[0]__1_i_1 
       (.I0(\j[9]__1_i_3_n_0 ),
        .I1(\j_reg[0]__1_n_0 ),
        .O(j[0]));
  LUT2 #(
    .INIT(4'h1)) 
    \j[0]_i_1__0 
       (.I0(\j[9]_i_3_n_0 ),
        .I1(\j_reg_n_0_[0] ),
        .O(\j[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2610" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \j[1]__0_i_1 
       (.I0(\j_reg[1]__0_n_0 ),
        .I1(\j_reg[0]__0_n_0 ),
        .I2(\j[9]__0_i_3_n_0 ),
        .O(\j[1]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2611" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \j[1]__1_i_1 
       (.I0(\j_reg[1]__1_n_0 ),
        .I1(\j_reg[0]__1_n_0 ),
        .I2(\j[9]__1_i_3_n_0 ),
        .O(j[1]));
  (* SOFT_HLUTNM = "soft_lutpair2608" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \j[1]_i_1__0 
       (.I0(\j_reg_n_0_[1] ),
        .I1(\j_reg_n_0_[0] ),
        .I2(\j[9]_i_3_n_0 ),
        .O(\j[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2610" *) 
  LUT4 #(
    .INIT(16'h006A)) 
    \j[2]__0_i_1 
       (.I0(\j_reg[2]__0_n_0 ),
        .I1(\j_reg[1]__0_n_0 ),
        .I2(\j_reg[0]__0_n_0 ),
        .I3(\j[9]__0_i_3_n_0 ),
        .O(\j[2]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2611" *) 
  LUT4 #(
    .INIT(16'h006A)) 
    \j[2]__1_i_1 
       (.I0(\j_reg[2]__1_n_0 ),
        .I1(\j_reg[1]__1_n_0 ),
        .I2(\j_reg[0]__1_n_0 ),
        .I3(\j[9]__1_i_3_n_0 ),
        .O(j[2]));
  (* SOFT_HLUTNM = "soft_lutpair2608" *) 
  LUT4 #(
    .INIT(16'h006A)) 
    \j[2]_i_1__0 
       (.I0(\j_reg_n_0_[2] ),
        .I1(\j_reg_n_0_[1] ),
        .I2(\j_reg_n_0_[0] ),
        .I3(\j[9]_i_3_n_0 ),
        .O(\j[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2598" *) 
  LUT5 #(
    .INIT(32'h00006AAA)) 
    \j[3]__0_i_1 
       (.I0(\j_reg[3]__0_n_0 ),
        .I1(\j_reg[0]__0_n_0 ),
        .I2(\j_reg[1]__0_n_0 ),
        .I3(\j_reg[2]__0_n_0 ),
        .I4(\j[9]__0_i_3_n_0 ),
        .O(\j[3]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2602" *) 
  LUT5 #(
    .INIT(32'h00006AAA)) 
    \j[3]__1_i_1 
       (.I0(\j_reg[3]__1_n_0 ),
        .I1(\j_reg[0]__1_n_0 ),
        .I2(\j_reg[1]__1_n_0 ),
        .I3(\j_reg[2]__1_n_0 ),
        .I4(\j[9]__1_i_3_n_0 ),
        .O(j[3]));
  (* SOFT_HLUTNM = "soft_lutpair2595" *) 
  LUT5 #(
    .INIT(32'h00006AAA)) 
    \j[3]_i_1__0 
       (.I0(\j_reg_n_0_[3] ),
        .I1(\j_reg_n_0_[0] ),
        .I2(\j_reg_n_0_[1] ),
        .I3(\j_reg_n_0_[2] ),
        .I4(\j[9]_i_3_n_0 ),
        .O(\j[3]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \j[4]__0_i_1 
       (.I0(\j[9]__0_i_3_n_0 ),
        .I1(\j_reg[0]__0_n_0 ),
        .I2(\j_reg[1]__0_n_0 ),
        .I3(\j_reg[2]__0_n_0 ),
        .I4(\j_reg[3]__0_n_0 ),
        .I5(\j_reg[4]__0_n_0 ),
        .O(\j[4]__0_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \j[4]__1_i_1 
       (.I0(\j[9]__1_i_3_n_0 ),
        .I1(\j_reg[0]__1_n_0 ),
        .I2(\j_reg[1]__1_n_0 ),
        .I3(\j_reg[2]__1_n_0 ),
        .I4(\j_reg[3]__1_n_0 ),
        .I5(\j_reg[4]__1_n_0 ),
        .O(j[4]));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \j[4]_i_1__0 
       (.I0(\j[9]_i_3_n_0 ),
        .I1(\j_reg_n_0_[0] ),
        .I2(\j_reg_n_0_[1] ),
        .I3(\j_reg_n_0_[2] ),
        .I4(\j_reg_n_0_[3] ),
        .I5(\j_reg_n_0_[4] ),
        .O(\j[4]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2599" *) 
  LUT4 #(
    .INIT(16'h006A)) 
    \j[5]__0_i_1 
       (.I0(\j_reg[5]__0_n_0 ),
        .I1(\j_reg[4]__0_n_0 ),
        .I2(\j[7]__0_i_2_n_0 ),
        .I3(\j[9]__0_i_3_n_0 ),
        .O(\j[5]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2603" *) 
  LUT4 #(
    .INIT(16'h006A)) 
    \j[5]__1_i_1 
       (.I0(\j_reg[5]__1_n_0 ),
        .I1(\j_reg[4]__1_n_0 ),
        .I2(\j[7]__1_i_2_n_0 ),
        .I3(\j[9]__1_i_3_n_0 ),
        .O(j[5]));
  (* SOFT_HLUTNM = "soft_lutpair2596" *) 
  LUT4 #(
    .INIT(16'h006A)) 
    \j[5]_i_1__0 
       (.I0(\j_reg_n_0_[5] ),
        .I1(\j_reg_n_0_[4] ),
        .I2(\j[7]_i_2__0_n_0 ),
        .I3(\j[9]_i_3_n_0 ),
        .O(\j[5]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2599" *) 
  LUT5 #(
    .INIT(32'h00006AAA)) 
    \j[6]__0_i_1 
       (.I0(\j_reg[6]__0_n_0 ),
        .I1(\j[7]__0_i_2_n_0 ),
        .I2(\j_reg[4]__0_n_0 ),
        .I3(\j_reg[5]__0_n_0 ),
        .I4(\j[9]__0_i_3_n_0 ),
        .O(\j[6]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2603" *) 
  LUT5 #(
    .INIT(32'h00006AAA)) 
    \j[6]__1_i_1 
       (.I0(\j_reg[6]__1_n_0 ),
        .I1(\j[7]__1_i_2_n_0 ),
        .I2(\j_reg[4]__1_n_0 ),
        .I3(\j_reg[5]__1_n_0 ),
        .I4(\j[9]__1_i_3_n_0 ),
        .O(j[6]));
  (* SOFT_HLUTNM = "soft_lutpair2596" *) 
  LUT5 #(
    .INIT(32'h00006AAA)) 
    \j[6]_i_1__0 
       (.I0(\j_reg_n_0_[6] ),
        .I1(\j[7]_i_2__0_n_0 ),
        .I2(\j_reg_n_0_[4] ),
        .I3(\j_reg_n_0_[5] ),
        .I4(\j[9]_i_3_n_0 ),
        .O(\j[6]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h000000006AAAAAAA)) 
    \j[7]__0_i_1 
       (.I0(\j_reg[7]__0_n_0 ),
        .I1(\j_reg[5]__0_n_0 ),
        .I2(\j_reg[4]__0_n_0 ),
        .I3(\j[7]__0_i_2_n_0 ),
        .I4(\j_reg[6]__0_n_0 ),
        .I5(\j[9]__0_i_3_n_0 ),
        .O(\j[7]__0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2598" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \j[7]__0_i_2 
       (.I0(\j_reg[3]__0_n_0 ),
        .I1(\j_reg[2]__0_n_0 ),
        .I2(\j_reg[1]__0_n_0 ),
        .I3(\j_reg[0]__0_n_0 ),
        .O(\j[7]__0_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h000000006AAAAAAA)) 
    \j[7]__1_i_1 
       (.I0(\j_reg[7]__1_n_0 ),
        .I1(\j_reg[5]__1_n_0 ),
        .I2(\j_reg[4]__1_n_0 ),
        .I3(\j[7]__1_i_2_n_0 ),
        .I4(\j_reg[6]__1_n_0 ),
        .I5(\j[9]__1_i_3_n_0 ),
        .O(j[7]));
  (* SOFT_HLUTNM = "soft_lutpair2602" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \j[7]__1_i_2 
       (.I0(\j_reg[3]__1_n_0 ),
        .I1(\j_reg[2]__1_n_0 ),
        .I2(\j_reg[1]__1_n_0 ),
        .I3(\j_reg[0]__1_n_0 ),
        .O(\j[7]__1_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h000000006AAAAAAA)) 
    \j[7]_i_1__0 
       (.I0(\j_reg_n_0_[7] ),
        .I1(\j_reg_n_0_[5] ),
        .I2(\j_reg_n_0_[4] ),
        .I3(\j[7]_i_2__0_n_0 ),
        .I4(\j_reg_n_0_[6] ),
        .I5(\j[9]_i_3_n_0 ),
        .O(\j[7]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2595" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \j[7]_i_2__0 
       (.I0(\j_reg_n_0_[3] ),
        .I1(\j_reg_n_0_[2] ),
        .I2(\j_reg_n_0_[1] ),
        .I3(\j_reg_n_0_[0] ),
        .O(\j[7]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h00000000A6AAAAAA)) 
    \j[8]__0_i_1 
       (.I0(\j_reg[8]__0_n_0 ),
        .I1(\j_reg[6]__0_n_0 ),
        .I2(\j[8]__0_i_2_n_0 ),
        .I3(\j_reg[5]__0_n_0 ),
        .I4(\j_reg[7]__0_n_0 ),
        .I5(\j[9]__0_i_3_n_0 ),
        .O(\j[8]__0_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \j[8]__0_i_2 
       (.I0(\j_reg[4]__0_n_0 ),
        .I1(\j_reg[0]__0_n_0 ),
        .I2(\j_reg[1]__0_n_0 ),
        .I3(\j_reg[2]__0_n_0 ),
        .I4(\j_reg[3]__0_n_0 ),
        .O(\j[8]__0_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000A6AAAAAA)) 
    \j[8]__1_i_1 
       (.I0(\j_reg[8]__1_n_0 ),
        .I1(\j_reg[6]__1_n_0 ),
        .I2(\j[8]__1_i_2_n_0 ),
        .I3(\j_reg[5]__1_n_0 ),
        .I4(\j_reg[7]__1_n_0 ),
        .I5(\j[9]__1_i_3_n_0 ),
        .O(j[8]));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \j[8]__1_i_2 
       (.I0(\j_reg[4]__1_n_0 ),
        .I1(\j_reg[0]__1_n_0 ),
        .I2(\j_reg[1]__1_n_0 ),
        .I3(\j_reg[2]__1_n_0 ),
        .I4(\j_reg[3]__1_n_0 ),
        .O(\j[8]__1_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000A6AAAAAA)) 
    \j[8]_i_1 
       (.I0(\j_reg_n_0_[8] ),
        .I1(\j_reg_n_0_[6] ),
        .I2(\j[8]_i_2_n_0 ),
        .I3(\j_reg_n_0_[5] ),
        .I4(\j_reg_n_0_[7] ),
        .I5(\j[9]_i_3_n_0 ),
        .O(\j[8]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \j[8]_i_2 
       (.I0(\j_reg_n_0_[4] ),
        .I1(\j_reg_n_0_[0] ),
        .I2(\j_reg_n_0_[1] ),
        .I3(\j_reg_n_0_[2] ),
        .I4(\j_reg_n_0_[3] ),
        .O(\j[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000A6AAAAAA)) 
    \j[9]__0_i_1 
       (.I0(\j_reg[9]__0_n_0 ),
        .I1(\j_reg[7]__0_n_0 ),
        .I2(\j[9]__0_i_2_n_0 ),
        .I3(\j_reg[6]__0_n_0 ),
        .I4(\j_reg[8]__0_n_0 ),
        .I5(\j[9]__0_i_3_n_0 ),
        .O(\j[9]__0_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \j[9]__0_i_2 
       (.I0(\j_reg[3]__0_n_0 ),
        .I1(\j_reg[2]__0_n_0 ),
        .I2(\j_reg[1]__0_n_0 ),
        .I3(\j_reg[0]__0_n_0 ),
        .I4(\j_reg[4]__0_n_0 ),
        .I5(\j_reg[5]__0_n_0 ),
        .O(\j[9]__0_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8000008000000000)) 
    \j[9]__0_i_3 
       (.I0(\j[9]__0_i_4_n_0 ),
        .I1(\j_reg[9]__0_n_0 ),
        .I2(\j_reg[7]__0_n_0 ),
        .I3(\j[9]__0_i_2_n_0 ),
        .I4(\j_reg[6]__0_n_0 ),
        .I5(\j_reg[8]__0_n_0 ),
        .O(\j[9]__0_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000020000000)) 
    \j[9]__0_i_4 
       (.I0(\j_reg[5]__0_n_0 ),
        .I1(\j_reg[4]__0_n_0 ),
        .I2(\j_reg[0]__0_n_0 ),
        .I3(\j_reg[1]__0_n_0 ),
        .I4(\j_reg[2]__0_n_0 ),
        .I5(\j_reg[3]__0_n_0 ),
        .O(\j[9]__0_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h00000000A6AAAAAA)) 
    \j[9]__1_i_1 
       (.I0(\j_reg[9]__1_n_0 ),
        .I1(\j_reg[7]__1_n_0 ),
        .I2(\j[9]__1_i_2_n_0 ),
        .I3(\j_reg[6]__1_n_0 ),
        .I4(\j_reg[8]__1_n_0 ),
        .I5(\j[9]__1_i_3_n_0 ),
        .O(j[9]));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \j[9]__1_i_2 
       (.I0(\j_reg[3]__1_n_0 ),
        .I1(\j_reg[2]__1_n_0 ),
        .I2(\j_reg[1]__1_n_0 ),
        .I3(\j_reg[0]__1_n_0 ),
        .I4(\j_reg[4]__1_n_0 ),
        .I5(\j_reg[5]__1_n_0 ),
        .O(\j[9]__1_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8000008000000000)) 
    \j[9]__1_i_3 
       (.I0(\j[9]__1_i_4_n_0 ),
        .I1(\j_reg[9]__1_n_0 ),
        .I2(\j_reg[7]__1_n_0 ),
        .I3(\j[9]__1_i_2_n_0 ),
        .I4(\j_reg[6]__1_n_0 ),
        .I5(\j_reg[8]__1_n_0 ),
        .O(\j[9]__1_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000020000000)) 
    \j[9]__1_i_4 
       (.I0(\j_reg[5]__1_n_0 ),
        .I1(\j_reg[4]__1_n_0 ),
        .I2(\j_reg[0]__1_n_0 ),
        .I3(\j_reg[1]__1_n_0 ),
        .I4(\j_reg[2]__1_n_0 ),
        .I5(\j_reg[3]__1_n_0 ),
        .O(\j[9]__1_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h00000000A6AAAAAA)) 
    \j[9]_i_1 
       (.I0(\j_reg_n_0_[9] ),
        .I1(\j_reg_n_0_[7] ),
        .I2(\j[9]_i_2_n_0 ),
        .I3(\j_reg_n_0_[6] ),
        .I4(\j_reg_n_0_[8] ),
        .I5(\j[9]_i_3_n_0 ),
        .O(\j[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \j[9]_i_2 
       (.I0(\j_reg_n_0_[3] ),
        .I1(\j_reg_n_0_[2] ),
        .I2(\j_reg_n_0_[1] ),
        .I3(\j_reg_n_0_[0] ),
        .I4(\j_reg_n_0_[4] ),
        .I5(\j_reg_n_0_[5] ),
        .O(\j[9]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8000008000000000)) 
    \j[9]_i_3 
       (.I0(\j[9]_i_4_n_0 ),
        .I1(\j_reg_n_0_[9] ),
        .I2(\j_reg_n_0_[7] ),
        .I3(\j[9]_i_2_n_0 ),
        .I4(\j_reg_n_0_[6] ),
        .I5(\j_reg_n_0_[8] ),
        .O(\j[9]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000020000000)) 
    \j[9]_i_4 
       (.I0(\j_reg_n_0_[5] ),
        .I1(\j_reg_n_0_[4] ),
        .I2(\j_reg_n_0_[0] ),
        .I3(\j_reg_n_0_[1] ),
        .I4(\j_reg_n_0_[2] ),
        .I5(\j_reg_n_0_[3] ),
        .O(\j[9]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[0]_i_1__0_n_0 ),
        .Q(\j_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[0]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[0]__0_i_1__0_n_0 ),
        .Q(\j_reg[0]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[0]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(j[0]),
        .Q(\j_reg[0]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[1]_i_1__0_n_0 ),
        .Q(\j_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[1]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[1]__0_i_1_n_0 ),
        .Q(\j_reg[1]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[1]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(j[1]),
        .Q(\j_reg[1]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[2] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[2]_i_1__0_n_0 ),
        .Q(\j_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[2]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[2]__0_i_1_n_0 ),
        .Q(\j_reg[2]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[2]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(j[2]),
        .Q(\j_reg[2]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[3]_i_1__0_n_0 ),
        .Q(\j_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[3]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[3]__0_i_1_n_0 ),
        .Q(\j_reg[3]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[3]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(j[3]),
        .Q(\j_reg[3]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[4]_i_1__0_n_0 ),
        .Q(\j_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[4]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[4]__0_i_1_n_0 ),
        .Q(\j_reg[4]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[4]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(j[4]),
        .Q(\j_reg[4]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[5]_i_1__0_n_0 ),
        .Q(\j_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[5]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[5]__0_i_1_n_0 ),
        .Q(\j_reg[5]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[5]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(j[5]),
        .Q(\j_reg[5]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[6]_i_1__0_n_0 ),
        .Q(\j_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[6]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[6]__0_i_1_n_0 ),
        .Q(\j_reg[6]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[6]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(j[6]),
        .Q(\j_reg[6]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[7]_i_1__0_n_0 ),
        .Q(\j_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[7]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[7]__0_i_1_n_0 ),
        .Q(\j_reg[7]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[7]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(j[7]),
        .Q(\j_reg[7]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[8] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[8]_i_1_n_0 ),
        .Q(\j_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[8]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[8]__0_i_1_n_0 ),
        .Q(\j_reg[8]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[8]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(j[8]),
        .Q(\j_reg[8]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[9] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[9]_i_1_n_0 ),
        .Q(\j_reg_n_0_[9] ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[9]__0 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(\j[9]__0_i_1_n_0 ),
        .Q(\j_reg[9]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \j_reg[9]__1 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(j[9]),
        .Q(\j_reg[9]__1_n_0 ));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \stateBlue0_inferred__0/i__carry 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\NLW_stateBlue0_inferred__0/i__carry_CO_UNCONNECTED [7:5],\stateBlue0_inferred__0/i__carry_n_3 ,\stateBlue0_inferred__0/i__carry_n_4 ,\stateBlue0_inferred__0/i__carry_n_5 ,\stateBlue0_inferred__0/i__carry_n_6 ,\stateBlue0_inferred__0/i__carry_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b1,stateBlue_i_2_0,i__carry_i_2_n_0,i__carry_i_3_n_0,i__carry_i_4_n_0}),
        .O(\NLW_stateBlue0_inferred__0/i__carry_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,i__carry_i_5__1_n_0,i__carry_i_6__0_n_0,i__carry_i_7_n_0,i__carry_i_8_n_0,i__carry_i_9_n_0}));
  LUT6 #(
    .INIT(64'h770F770077007700)) 
    stateBlue_i_1
       (.I0(stateBlue_i_2_n_0),
        .I1(stateBlue_i_3_n_0),
        .I2(stateBlue_i_4_n_0),
        .I3(rgb0_b),
        .I4(stateBlue_i_5_n_0),
        .I5(rgb0[0]),
        .O(stateBlue_i_1_n_0));
  LUT2 #(
    .INIT(4'h2)) 
    stateBlue_i_2
       (.I0(\stateBlue0_inferred__0/i__carry_n_3 ),
        .I1(stateBlue_i_7_n_0),
        .O(stateBlue_i_2_n_0));
  LUT6 #(
    .INIT(64'hFFFFEFFFFFFDFFFF)) 
    stateBlue_i_3
       (.I0(\i_reg[8]__1_n_0 ),
        .I1(stateBlue_i_8_n_0),
        .I2(\i_reg[7]__1_n_0 ),
        .I3(\i_reg[5]__1_n_0 ),
        .I4(\i[7]__1_i_2_n_0 ),
        .I5(\i_reg[6]__1_n_0 ),
        .O(stateBlue_i_3_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFBFFEFF)) 
    stateBlue_i_4
       (.I0(stateBlue_i_8_n_0),
        .I1(\i_reg[7]__1_n_0 ),
        .I2(\i_reg[6]__1_n_0 ),
        .I3(\i[7]__1_i_2_n_0 ),
        .I4(\i_reg[5]__1_n_0 ),
        .I5(stateBlue_i_7_n_0),
        .O(stateBlue_i_4_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2607" *) 
  LUT5 #(
    .INIT(32'hDFFF2000)) 
    stateBlue_i_5
       (.I0(\i_reg[5]__1_n_0 ),
        .I1(\i[7]__1_i_2_n_0 ),
        .I2(\i_reg[6]__1_n_0 ),
        .I3(\i_reg[7]__1_n_0 ),
        .I4(\i_reg[8]__1_n_0 ),
        .O(stateBlue_i_5_n_0));
  LUT6 #(
    .INIT(64'hF6FFFFFFFFFFFFFF)) 
    stateBlue_i_7
       (.I0(\j_reg[3]__1_n_0 ),
        .I1(\j_reg[4]__1_n_0 ),
        .I2(stateBlue_i_9_n_0),
        .I3(\j_reg[2]__1_n_0 ),
        .I4(\j_reg[1]__1_n_0 ),
        .I5(\j_reg[0]__1_n_0 ),
        .O(stateBlue_i_7_n_0));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFE)) 
    stateBlue_i_8
       (.I0(\i_reg[4]__1_n_0 ),
        .I1(\i_reg[2]__1_n_0 ),
        .I2(\i_reg[0]__1_n_0 ),
        .I3(\j[9]__1_i_3_n_0 ),
        .I4(\i_reg[1]__1_n_0 ),
        .I5(\i_reg[3]__1_n_0 ),
        .O(stateBlue_i_8_n_0));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    stateBlue_i_9
       (.I0(\j_reg[5]__1_n_0 ),
        .I1(\j_reg[8]__1_n_0 ),
        .I2(\j_reg[9]__1_n_0 ),
        .I3(\j_reg[7]__1_n_0 ),
        .I4(\j_reg[6]__1_n_0 ),
        .O(stateBlue_i_9_n_0));
  FDCE stateBlue_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(stateBlue_i_1_n_0),
        .Q(rgb0_b));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \stateGreen0_inferred__0/i__carry 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\NLW_stateGreen0_inferred__0/i__carry_CO_UNCONNECTED [7:5],\stateGreen0_inferred__0/i__carry_n_3 ,\stateGreen0_inferred__0/i__carry_n_4 ,\stateGreen0_inferred__0/i__carry_n_5 ,\stateGreen0_inferred__0/i__carry_n_6 ,\stateGreen0_inferred__0/i__carry_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b1,stateGreen_reg_0,i__carry_i_3__1_n_0,i__carry_i_4__1_n_0}),
        .O(\NLW_stateGreen0_inferred__0/i__carry_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,i__carry_i_5__0_n_0,stateGreen_reg_1,i__carry_i_8__1_n_0,i__carry_i_9__1_n_0}));
  LUT6 #(
    .INIT(64'hFF3F000AFF330000)) 
    stateGreen_i_1
       (.I0(\seq_reg[1]_0 ),
        .I1(\stateGreen0_inferred__0/i__carry_n_3 ),
        .I2(stateGreen_i_2_n_0),
        .I3(stateGreen_i_3_n_0),
        .I4(rgb0_g),
        .I5(stateGreen_i_4_n_0),
        .O(stateGreen_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2600" *) 
  LUT5 #(
    .INIT(32'hFFFFDFFB)) 
    stateGreen_i_2
       (.I0(\i_reg[5]__0_n_0 ),
        .I1(\i[7]__0_i_2_n_0 ),
        .I2(\i_reg[6]__0_n_0 ),
        .I3(\i_reg[7]__0_n_0 ),
        .I4(stateGreen_i_5_n_0),
        .O(stateGreen_i_2_n_0));
  LUT6 #(
    .INIT(64'hF6FFFFFFFFFFFFFF)) 
    stateGreen_i_3
       (.I0(\j_reg[3]__0_n_0 ),
        .I1(\j_reg[4]__0_n_0 ),
        .I2(stateGreen_i_6_n_0),
        .I3(\j_reg[2]__0_n_0 ),
        .I4(\j_reg[1]__0_n_0 ),
        .I5(\j_reg[0]__0_n_0 ),
        .O(stateGreen_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2606" *) 
  LUT5 #(
    .INIT(32'hDFFF2000)) 
    stateGreen_i_4
       (.I0(\i_reg[5]__0_n_0 ),
        .I1(\i[7]__0_i_2_n_0 ),
        .I2(\i_reg[6]__0_n_0 ),
        .I3(\i_reg[7]__0_n_0 ),
        .I4(\i_reg[8]__0_n_0 ),
        .O(stateGreen_i_4_n_0));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFE)) 
    stateGreen_i_5
       (.I0(\i_reg[4]__0_n_0 ),
        .I1(\i_reg[2]__0_n_0 ),
        .I2(\i_reg[0]__0_n_0 ),
        .I3(\j[9]__0_i_3_n_0 ),
        .I4(\i_reg[1]__0_n_0 ),
        .I5(\i_reg[3]__0_n_0 ),
        .O(stateGreen_i_5_n_0));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    stateGreen_i_6
       (.I0(\j_reg[5]__0_n_0 ),
        .I1(\j_reg[8]__0_n_0 ),
        .I2(\j_reg[9]__0_n_0 ),
        .I3(\j_reg[7]__0_n_0 ),
        .I4(\j_reg[6]__0_n_0 ),
        .O(stateGreen_i_6_n_0));
  FDCE stateGreen_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(stateGreen_i_1_n_0),
        .Q(rgb0_g));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \stateRed0_inferred__0/i__carry 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\NLW_stateRed0_inferred__0/i__carry_CO_UNCONNECTED [7:5],data0,\stateRed0_inferred__0/i__carry_n_4 ,\stateRed0_inferred__0/i__carry_n_5 ,\stateRed0_inferred__0/i__carry_n_6 ,\stateRed0_inferred__0/i__carry_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b1,DI,i__carry_i_3__0_n_0,i__carry_i_4__0_n_0}),
        .O(\NLW_stateRed0_inferred__0/i__carry_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,i__carry_i_5_n_0,S,i__carry_i_8__0_n_0,i__carry_i_9__0_n_0}));
  LUT6 #(
    .INIT(64'h770F770077007700)) 
    stateRed_i_1
       (.I0(stateRed_i_2_n_0),
        .I1(stateRed_i_3_n_0),
        .I2(stateRed_i_4_n_0),
        .I3(rgb0_r),
        .I4(sel0),
        .I5(rgb0[1]),
        .O(stateRed_i_1_n_0));
  LUT2 #(
    .INIT(4'h2)) 
    stateRed_i_2
       (.I0(data0),
        .I1(stateRed_i_7_n_0),
        .O(stateRed_i_2_n_0));
  LUT6 #(
    .INIT(64'hFFFFEFFFFFFDFFFF)) 
    stateRed_i_3
       (.I0(\i_reg_n_0_[8] ),
        .I1(stateRed_i_8_n_0),
        .I2(\i_reg_n_0_[7] ),
        .I3(\i_reg_n_0_[5] ),
        .I4(\i[7]_i_2__1_n_0 ),
        .I5(\i_reg_n_0_[6] ),
        .O(stateRed_i_3_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFBFFEFF)) 
    stateRed_i_4
       (.I0(stateRed_i_8_n_0),
        .I1(\i_reg_n_0_[7] ),
        .I2(\i_reg_n_0_[6] ),
        .I3(\i[7]_i_2__1_n_0 ),
        .I4(\i_reg_n_0_[5] ),
        .I5(stateRed_i_7_n_0),
        .O(stateRed_i_4_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2605" *) 
  LUT5 #(
    .INIT(32'hDFFF2000)) 
    stateRed_i_5
       (.I0(\i_reg_n_0_[5] ),
        .I1(\i[7]_i_2__1_n_0 ),
        .I2(\i_reg_n_0_[6] ),
        .I3(\i_reg_n_0_[7] ),
        .I4(\i_reg_n_0_[8] ),
        .O(sel0));
  LUT6 #(
    .INIT(64'hF6FFFFFFFFFFFFFF)) 
    stateRed_i_7
       (.I0(\j_reg_n_0_[3] ),
        .I1(\j_reg_n_0_[4] ),
        .I2(p_2_in),
        .I3(\j_reg_n_0_[2] ),
        .I4(\j_reg_n_0_[1] ),
        .I5(\j_reg_n_0_[0] ),
        .O(stateRed_i_7_n_0));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFE)) 
    stateRed_i_8
       (.I0(\i_reg_n_0_[4] ),
        .I1(\i_reg_n_0_[2] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(\j[9]_i_3_n_0 ),
        .I4(\i_reg_n_0_[1] ),
        .I5(\i_reg_n_0_[3] ),
        .O(stateRed_i_8_n_0));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    stateRed_i_9
       (.I0(\j_reg_n_0_[5] ),
        .I1(\j_reg_n_0_[8] ),
        .I2(\j_reg_n_0_[9] ),
        .I3(\j_reg_n_0_[7] ),
        .I4(\j_reg_n_0_[6] ),
        .O(p_2_in));
  FDCE stateRed_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\i_reg[0]__1_0 ),
        .D(stateRed_i_1_n_0),
        .Q(rgb0_r));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Rotary
   (ackInvRotaryMoveto,
    ackInvRotarySet,
    ackInvRotaryZero,
    ackInvRotaryConfig,
    rng_reg_0,
    O,
    CO,
    \invbuf_reg[0][5] ,
    i__carry_i_11__1_0,
    \invbuf_reg[0][5]_0 ,
    dir,
    step,
    m0z,
    m0,
    Q,
    \stateOp_reg[1]_0 ,
    rng_reg_1,
    step_reg_0,
    E,
    aclk_sig,
    \tixVStepmode_reg[0]_0 ,
    ackInvSet_sig,
    ackInvZero_sig_reg_0,
    targetNotSteady,
    reqInvRotaryMoveto,
    ccwNotCw0,
    rng_reg_2,
    ccwNotCw_reg_0,
    D,
    i__carry_i_11__1_1,
    \tixVStepmode_reg[7]_0 ,
    S,
    ccwNotCw_reg_1,
    ccwNotCw_reg_2,
    DI,
    ccwNotCw_reg_3,
    dir_0,
    tkclk,
    step1__6,
    \i_reg[3]_0 ,
    \stateOp_reg[1]_1 ,
    ccwNotCw5_in,
    reqInvRotaryConfig,
    reqInvRotaryZero,
    ackInvConfig_sig0__6,
    \capt_reg[5] ,
    \lsb_reg[1]_0 ,
    \stateOp_reg[1]_2 ,
    \stateOp_reg[0]_0 );
  output ackInvRotaryMoveto;
  output ackInvRotarySet;
  output ackInvRotaryZero;
  output ackInvRotaryConfig;
  output rng_reg_0;
  output [5:0]O;
  output [0:0]CO;
  output [0:0]\invbuf_reg[0][5] ;
  output [0:0]i__carry_i_11__1_0;
  output [0:0]\invbuf_reg[0][5]_0 ;
  output dir;
  output step;
  output m0z;
  output m0;
  output [13:0]Q;
  output [1:0]\stateOp_reg[1]_0 ;
  output rng_reg_1;
  output [0:0]step_reg_0;
  input [0:0]E;
  input aclk_sig;
  input [0:0]\tixVStepmode_reg[0]_0 ;
  input ackInvSet_sig;
  input ackInvZero_sig_reg_0;
  input targetNotSteady;
  input reqInvRotaryMoveto;
  input ccwNotCw0;
  input rng_reg_2;
  input [3:0]ccwNotCw_reg_0;
  input [7:0]D;
  input [7:0]i__carry_i_11__1_1;
  input [7:0]\tixVStepmode_reg[7]_0 ;
  input [5:0]S;
  input [2:0]ccwNotCw_reg_1;
  input [0:0]ccwNotCw_reg_2;
  input [2:0]DI;
  input [2:0]ccwNotCw_reg_3;
  input dir_0;
  input tkclk;
  input step1__6;
  input \i_reg[3]_0 ;
  input \stateOp_reg[1]_1 ;
  input ccwNotCw5_in;
  input reqInvRotaryConfig;
  input reqInvRotaryZero;
  input ackInvConfig_sig0__6;
  input \capt_reg[5] ;
  input [1:0]\lsb_reg[1]_0 ;
  input [0:0]\stateOp_reg[1]_2 ;
  input [0:0]\stateOp_reg[0]_0 ;

  wire [0:0]CO;
  wire [7:0]D;
  wire [2:0]DI;
  wire [0:0]E;
  wire [5:0]O;
  wire [13:0]Q;
  wire [5:0]S;
  wire [7:0]TStep;
  wire ackInvConfig_sig0__6;
  wire ackInvRotaryConfig;
  wire ackInvRotaryMoveto;
  wire ackInvRotarySet;
  wire ackInvRotaryZero;
  wire ackInvSet_sig;
  wire ackInvZero_sig;
  wire ackInvZero_sig_reg_0;
  wire aclk_sig;
  wire angle1__15;
  wire \angle[0]_i_1_n_0 ;
  wire \angle[10]_i_1_n_0 ;
  wire \angle[10]_i_2_n_0 ;
  wire \angle[10]_i_3_n_0 ;
  wire \angle[11]_i_1_n_0 ;
  wire \angle[11]_i_3_n_0 ;
  wire \angle[12]_i_1_n_0 ;
  wire \angle[12]_i_2_n_0 ;
  wire \angle[12]_i_3_n_0 ;
  wire \angle[12]_i_4_n_0 ;
  wire \angle[12]_i_5_n_0 ;
  wire \angle[12]_i_7_n_0 ;
  wire \angle[13]_i_1_n_0 ;
  wire \angle[13]_i_2_n_0 ;
  wire \angle[13]_i_3_n_0 ;
  wire \angle[13]_i_4_n_0 ;
  wire \angle[13]_i_5_n_0 ;
  wire \angle[13]_i_7_n_0 ;
  wire \angle[13]_i_8_n_0 ;
  wire \angle[13]_i_9_n_0 ;
  wire \angle[1]_i_1_n_0 ;
  wire \angle[1]_i_2_n_0 ;
  wire \angle[2]_i_1_n_0 ;
  wire \angle[2]_i_3_n_0 ;
  wire \angle[3]_i_1_n_0 ;
  wire \angle[3]_i_3_n_0 ;
  wire \angle[4]_i_1_n_0 ;
  wire \angle[5]_i_1_n_0 ;
  wire \angle[5]_i_2_n_0 ;
  wire \angle[5]_i_3_n_0 ;
  wire \angle[6]_i_1_n_0 ;
  wire \angle[6]_i_2_n_0 ;
  wire \angle[6]_i_3_n_0 ;
  wire \angle[6]_i_4_n_0 ;
  wire \angle[7]_i_1_n_0 ;
  wire \angle[7]_i_2_n_0 ;
  wire \angle[7]_i_3_n_0 ;
  wire \angle[7]_i_4_n_0 ;
  wire \angle[8]_i_1_n_0 ;
  wire \angle[8]_i_2_n_0 ;
  wire \angle[8]_i_3_n_0 ;
  wire \angle[8]_i_4_n_0 ;
  wire \angle[9]_i_1_n_0 ;
  wire \angle[9]_i_2_n_0 ;
  wire [11:2]angle__2;
  wire \capt_reg[5] ;
  wire ccwNotCw0;
  wire ccwNotCw1_carry_i_1_n_0;
  wire ccwNotCw1_carry_n_5;
  wire ccwNotCw1_carry_n_6;
  wire ccwNotCw1_carry_n_7;
  wire \ccwNotCw1_inferred__0/i__carry_n_1 ;
  wire \ccwNotCw1_inferred__0/i__carry_n_2 ;
  wire \ccwNotCw1_inferred__0/i__carry_n_3 ;
  wire \ccwNotCw1_inferred__0/i__carry_n_4 ;
  wire \ccwNotCw1_inferred__0/i__carry_n_5 ;
  wire \ccwNotCw1_inferred__0/i__carry_n_6 ;
  wire \ccwNotCw1_inferred__0/i__carry_n_7 ;
  wire \ccwNotCw1_inferred__1/i__carry_n_2 ;
  wire \ccwNotCw1_inferred__1/i__carry_n_3 ;
  wire \ccwNotCw1_inferred__1/i__carry_n_4 ;
  wire \ccwNotCw1_inferred__1/i__carry_n_5 ;
  wire \ccwNotCw1_inferred__1/i__carry_n_6 ;
  wire \ccwNotCw1_inferred__1/i__carry_n_7 ;
  wire [7:0]ccwNotCw2;
  wire ccwNotCw2_carry__0_n_3;
  wire ccwNotCw2_carry__0_n_4;
  wire ccwNotCw2_carry__0_n_5;
  wire ccwNotCw2_carry__0_n_6;
  wire ccwNotCw2_carry__0_n_7;
  wire ccwNotCw2_carry_n_0;
  wire ccwNotCw2_carry_n_1;
  wire ccwNotCw2_carry_n_2;
  wire ccwNotCw2_carry_n_3;
  wire ccwNotCw2_carry_n_4;
  wire ccwNotCw2_carry_n_5;
  wire ccwNotCw2_carry_n_6;
  wire ccwNotCw2_carry_n_7;
  wire ccwNotCw5_in;
  wire [3:0]ccwNotCw_reg_0;
  wire [2:0]ccwNotCw_reg_1;
  wire [0:0]ccwNotCw_reg_2;
  wire [2:0]ccwNotCw_reg_3;
  wire dir;
  wire dir_0;
  wire [7:0]i;
  wire \i[5]_i_2__6_n_0 ;
  wire \i[7]_i_1__10_n_0 ;
  wire \i[7]_i_4__0_n_0 ;
  wire i__3;
  wire i__carry_i_10__3_n_0;
  wire [0:0]i__carry_i_11__1_0;
  wire [7:0]i__carry_i_11__1_1;
  wire i__carry_i_11__1_n_0;
  wire i__carry_i_11__2_n_0;
  wire i__carry_i_12__0_n_0;
  wire i__carry_i_13_n_0;
  wire i__carry_i_1__4_n_0;
  wire i__carry_i_2__3_n_0;
  wire i__carry_i_3__3_n_0;
  wire i__carry_i_5__4_n_0;
  wire i__carry_i_6__3_n_0;
  wire i__carry_i_7__2_n_0;
  wire i__carry_i_8__2_n_0;
  wire i__carry_i_9__3_n_0;
  wire \i_reg[3]_0 ;
  wire [0:0]\invbuf_reg[0][5] ;
  wire [0:0]\invbuf_reg[0][5]_0 ;
  wire [1:0]lsb;
  wire [1:0]\lsb_reg[1]_0 ;
  wire m0;
  wire m0_INST_0_i_1_n_0;
  wire m0z;
  wire [7:0]p_1_in;
  wire reqInvRotaryConfig;
  wire reqInvRotaryMoveto;
  wire reqInvRotaryZero;
  wire rng_reg_0;
  wire rng_reg_1;
  wire rng_reg_2;
  wire rotaryToStepmuxDir;
  wire rotaryToStepmuxStep;
  wire stateOp121_in;
  wire stateOp4__26;
  wire [2:0]stateOp50_out;
  wire [0:0]stateOp6__2;
  wire \stateOp[0]_i_5__1_n_0 ;
  wire \stateOp[1]_i_10__2_n_0 ;
  wire \stateOp[1]_i_2__10_n_0 ;
  wire \stateOp[1]_i_5__4_n_0 ;
  wire \stateOp[1]_i_6__3_n_0 ;
  wire \stateOp[1]_i_7__2_n_0 ;
  wire \stateOp[1]_i_8__3_n_0 ;
  wire \stateOp[1]_i_9__2_n_0 ;
  wire [0:0]\stateOp_reg[0]_0 ;
  wire [1:0]\stateOp_reg[1]_0 ;
  wire \stateOp_reg[1]_1 ;
  wire [0:0]\stateOp_reg[1]_2 ;
  wire step;
  wire step1__6;
  wire step_i_1_n_0;
  wire step_i_2_n_0;
  wire step_i_3_n_0;
  wire step_i_4_n_0;
  wire step_i_5_n_0;
  wire step_i_6_n_0;
  wire [0:0]step_reg_0;
  wire targetNotSteady;
  wire targetNotSteady_reg_n_0;
  wire \target_reg_n_0_[0] ;
  wire \target_reg_n_0_[10] ;
  wire \target_reg_n_0_[11] ;
  wire \target_reg_n_0_[12] ;
  wire \target_reg_n_0_[13] ;
  wire \target_reg_n_0_[1] ;
  wire \target_reg_n_0_[2] ;
  wire \target_reg_n_0_[3] ;
  wire \target_reg_n_0_[4] ;
  wire \target_reg_n_0_[5] ;
  wire \target_reg_n_0_[6] ;
  wire \target_reg_n_0_[7] ;
  wire \target_reg_n_0_[8] ;
  wire \target_reg_n_0_[9] ;
  wire tixVStepmode;
  wire [0:0]\tixVStepmode_reg[0]_0 ;
  wire [7:0]\tixVStepmode_reg[7]_0 ;
  wire \tixVStepmode_reg_n_0_[0] ;
  wire \tixVStepmode_reg_n_0_[1] ;
  wire \tixVStepmode_reg_n_0_[2] ;
  wire \tixVStepmode_reg_n_0_[3] ;
  wire \tixVStepmode_reg_n_0_[4] ;
  wire \tixVStepmode_reg_n_0_[5] ;
  wire \tixVStepmode_reg_n_0_[6] ;
  wire \tixVStepmode_reg_n_0_[7] ;
  wire tkclk;
  wire [7:4]NLW_ccwNotCw1_carry_CO_UNCONNECTED;
  wire [7:0]NLW_ccwNotCw1_carry_O_UNCONNECTED;
  wire [7:0]\NLW_ccwNotCw1_inferred__0/i__carry_O_UNCONNECTED ;
  wire [7:7]\NLW_ccwNotCw1_inferred__1/i__carry_CO_UNCONNECTED ;
  wire [7:0]\NLW_ccwNotCw1_inferred__1/i__carry_O_UNCONNECTED ;
  wire [7:5]NLW_ccwNotCw2_carry__0_CO_UNCONNECTED;
  wire [7:6]NLW_ccwNotCw2_carry__0_O_UNCONNECTED;

  FDPE #(
    .INIT(1'b0)) 
    \TStep_reg[0] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .D(D[0]),
        .PRE(\tixVStepmode_reg[0]_0 ),
        .Q(TStep[0]));
  FDPE #(
    .INIT(1'b0)) 
    \TStep_reg[1] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .D(D[1]),
        .PRE(\tixVStepmode_reg[0]_0 ),
        .Q(TStep[1]));
  FDCE #(
    .INIT(1'b0)) 
    \TStep_reg[2] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[2]),
        .Q(TStep[2]));
  FDPE #(
    .INIT(1'b0)) 
    \TStep_reg[3] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .D(D[3]),
        .PRE(\tixVStepmode_reg[0]_0 ),
        .Q(TStep[3]));
  FDCE #(
    .INIT(1'b0)) 
    \TStep_reg[4] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[4]),
        .Q(TStep[4]));
  FDCE #(
    .INIT(1'b0)) 
    \TStep_reg[5] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[5]),
        .Q(TStep[5]));
  FDPE #(
    .INIT(1'b0)) 
    \TStep_reg[6] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .D(D[6]),
        .PRE(\tixVStepmode_reg[0]_0 ),
        .Q(TStep[6]));
  FDCE #(
    .INIT(1'b0)) 
    \TStep_reg[7] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[7]),
        .Q(TStep[7]));
  LUT3 #(
    .INIT(8'hD0)) 
    ackInvConfig_sig_i_1__4
       (.I0(\stateOp_reg[1]_0 [0]),
        .I1(\stateOp_reg[1]_0 [1]),
        .I2(reqInvRotaryConfig),
        .O(tixVStepmode));
  FDCE ackInvConfig_sig_reg
       (.C(aclk_sig),
        .CE(ackInvZero_sig),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(tixVStepmode),
        .Q(ackInvRotaryConfig));
  LUT4 #(
    .INIT(16'hFF40)) 
    ackInvMoveto_sig_i_1
       (.I0(\stateOp_reg[1]_0 [1]),
        .I1(\stateOp_reg[1]_0 [0]),
        .I2(ackInvConfig_sig0__6),
        .I3(step1__6),
        .O(ackInvZero_sig));
  FDCE ackInvMoveto_sig_reg
       (.C(aclk_sig),
        .CE(ackInvZero_sig),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(E),
        .Q(ackInvRotaryMoveto));
  FDCE ackInvSet_sig_reg
       (.C(aclk_sig),
        .CE(ackInvZero_sig),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(ackInvSet_sig),
        .Q(ackInvRotarySet));
  FDCE ackInvZero_sig_reg
       (.C(aclk_sig),
        .CE(ackInvZero_sig),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(ackInvZero_sig_reg_0),
        .Q(ackInvRotaryZero));
  LUT6 #(
    .INIT(64'h00000000BC3CBC30)) 
    \angle[0]_i_1 
       (.I0(\angle[12]_i_2_n_0 ),
        .I1(stateOp6__2),
        .I2(Q[0]),
        .I3(rotaryToStepmuxDir),
        .I4(\angle[13]_i_5_n_0 ),
        .I5(step1__6),
        .O(\angle[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2627" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \angle[0]_i_2 
       (.I0(lsb[1]),
        .I1(lsb[0]),
        .O(stateOp6__2));
  LUT6 #(
    .INIT(64'h00000000BFAAEAAA)) 
    \angle[10]_i_1 
       (.I0(\angle[10]_i_2_n_0 ),
        .I1(Q[9]),
        .I2(\angle[10]_i_3_n_0 ),
        .I3(\angle[13]_i_5_n_0 ),
        .I4(Q[10]),
        .I5(step1__6),
        .O(\angle[10]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEAAAB00000000)) 
    \angle[10]_i_2 
       (.I0(\angle[12]_i_2_n_0 ),
        .I1(Q[9]),
        .I2(\angle[8]_i_2_n_0 ),
        .I3(Q[8]),
        .I4(Q[10]),
        .I5(rotaryToStepmuxDir),
        .O(\angle[10]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \angle[10]_i_3 
       (.I0(Q[8]),
        .I1(Q[6]),
        .I2(Q[4]),
        .I3(\angle[5]_i_3_n_0 ),
        .I4(Q[5]),
        .I5(Q[7]),
        .O(\angle[10]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h000000008F88F888)) 
    \angle[11]_i_1 
       (.I0(angle__2[11]),
        .I1(rotaryToStepmuxDir),
        .I2(\angle[11]_i_3_n_0 ),
        .I3(\angle[13]_i_5_n_0 ),
        .I4(Q[11]),
        .I5(step1__6),
        .O(\angle[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFAAAAAAA9)) 
    \angle[11]_i_2 
       (.I0(Q[11]),
        .I1(Q[9]),
        .I2(\angle[8]_i_2_n_0 ),
        .I3(Q[8]),
        .I4(Q[10]),
        .I5(\angle[12]_i_2_n_0 ),
        .O(angle__2[11]));
  (* SOFT_HLUTNM = "soft_lutpair2625" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \angle[11]_i_3 
       (.I0(Q[10]),
        .I1(\angle[10]_i_3_n_0 ),
        .I2(Q[9]),
        .O(\angle[11]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFFFEB00)) 
    \angle[12]_i_1 
       (.I0(\angle[12]_i_2_n_0 ),
        .I1(\angle[12]_i_3_n_0 ),
        .I2(Q[12]),
        .I3(rotaryToStepmuxDir),
        .I4(\angle[12]_i_4_n_0 ),
        .I5(step1__6),
        .O(\angle[12]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000002)) 
    \angle[12]_i_2 
       (.I0(\angle[12]_i_5_n_0 ),
        .I1(stateOp50_out[1]),
        .I2(Q[13]),
        .I3(Q[12]),
        .I4(Q[11]),
        .I5(Q[10]),
        .O(\angle[12]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \angle[12]_i_3 
       (.I0(Q[10]),
        .I1(Q[8]),
        .I2(\angle[7]_i_2_n_0 ),
        .I3(Q[7]),
        .I4(Q[9]),
        .I5(Q[11]),
        .O(\angle[12]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h7FFF000080000000)) 
    \angle[12]_i_4 
       (.I0(Q[11]),
        .I1(Q[9]),
        .I2(\angle[10]_i_3_n_0 ),
        .I3(Q[10]),
        .I4(\angle[13]_i_5_n_0 ),
        .I5(Q[12]),
        .O(\angle[12]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    \angle[12]_i_5 
       (.I0(stateOp50_out[0]),
        .I1(stateOp50_out[2]),
        .I2(\angle[12]_i_7_n_0 ),
        .I3(Q[5]),
        .I4(Q[4]),
        .I5(Q[3]),
        .O(\angle[12]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \angle[12]_i_6 
       (.I0(Q[1]),
        .I1(lsb[1]),
        .O(stateOp50_out[1]));
  (* SOFT_HLUTNM = "soft_lutpair2626" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \angle[12]_i_7 
       (.I0(Q[9]),
        .I1(Q[8]),
        .I2(Q[7]),
        .I3(Q[6]),
        .O(\angle[12]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h000000F300000020)) 
    \angle[13]_i_1 
       (.I0(i__3),
        .I1(\stateOp_reg[1]_0 [0]),
        .I2(\stateOp_reg[1]_0 [1]),
        .I3(ccwNotCw5_in),
        .I4(reqInvRotaryConfig),
        .I5(reqInvRotaryZero),
        .O(\angle[13]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BFAAEAAA)) 
    \angle[13]_i_2 
       (.I0(\angle[13]_i_3_n_0 ),
        .I1(Q[12]),
        .I2(\angle[13]_i_4_n_0 ),
        .I3(\angle[13]_i_5_n_0 ),
        .I4(Q[13]),
        .I5(step1__6),
        .O(\angle[13]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hFEAB0000)) 
    \angle[13]_i_3 
       (.I0(\angle[12]_i_2_n_0 ),
        .I1(Q[12]),
        .I2(\angle[12]_i_3_n_0 ),
        .I3(Q[13]),
        .I4(rotaryToStepmuxDir),
        .O(\angle[13]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2625" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \angle[13]_i_4 
       (.I0(Q[11]),
        .I1(Q[9]),
        .I2(\angle[10]_i_3_n_0 ),
        .I3(Q[10]),
        .O(\angle[13]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2628" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \angle[13]_i_5 
       (.I0(rotaryToStepmuxDir),
        .I1(angle1__15),
        .O(\angle[13]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000080000000)) 
    \angle[13]_i_6 
       (.I0(\angle[13]_i_7_n_0 ),
        .I1(Q[13]),
        .I2(Q[12]),
        .I3(Q[11]),
        .I4(Q[10]),
        .I5(\angle[13]_i_8_n_0 ),
        .O(angle1__15));
  (* SOFT_HLUTNM = "soft_lutpair2626" *) 
  LUT4 #(
    .INIT(16'h0400)) 
    \angle[13]_i_7 
       (.I0(Q[7]),
        .I1(Q[6]),
        .I2(Q[8]),
        .I3(Q[9]),
        .O(\angle[13]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2620" *) 
  LUT5 #(
    .INIT(32'hAAABBBBB)) 
    \angle[13]_i_8 
       (.I0(\angle[13]_i_9_n_0 ),
        .I1(lsb[1]),
        .I2(lsb[0]),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\angle[13]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h7F7F7FFF7FFF7FFF)) 
    \angle[13]_i_9 
       (.I0(Q[3]),
        .I1(Q[4]),
        .I2(Q[5]),
        .I3(Q[2]),
        .I4(lsb[0]),
        .I5(lsb[1]),
        .O(\angle[13]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2624" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \angle[1]_i_1 
       (.I0(\angle[1]_i_2_n_0 ),
        .I1(step1__6),
        .O(\angle[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hF0F0CEECF0F0CAAC)) 
    \angle[1]_i_2 
       (.I0(\angle[13]_i_5_n_0 ),
        .I1(rotaryToStepmuxDir),
        .I2(Q[1]),
        .I3(stateOp50_out[0]),
        .I4(lsb[1]),
        .I5(\angle[12]_i_2_n_0 ),
        .O(\angle[1]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2624" *) 
  LUT4 #(
    .INIT(16'h0A0C)) 
    \angle[2]_i_1 
       (.I0(angle__2[2]),
        .I1(\angle[2]_i_3_n_0 ),
        .I2(step1__6),
        .I3(rotaryToStepmuxDir),
        .O(\angle[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAFFFFFFAA9955A9)) 
    \angle[2]_i_2 
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(lsb[1]),
        .I4(lsb[0]),
        .I5(\angle[12]_i_2_n_0 ),
        .O(angle__2[2]));
  LUT6 #(
    .INIT(64'hFF55551500000040)) 
    \angle[2]_i_3 
       (.I0(angle1__15),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(lsb[1]),
        .I4(lsb[0]),
        .I5(Q[2]),
        .O(\angle[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000088F8F888)) 
    \angle[3]_i_1 
       (.I0(angle__2[3]),
        .I1(rotaryToStepmuxDir),
        .I2(\angle[13]_i_5_n_0 ),
        .I3(\angle[3]_i_3_n_0 ),
        .I4(Q[3]),
        .I5(step1__6),
        .O(\angle[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFAAAAAA59)) 
    \angle[3]_i_2 
       (.I0(Q[3]),
        .I1(Q[1]),
        .I2(lsb[1]),
        .I3(stateOp50_out[0]),
        .I4(stateOp50_out[2]),
        .I5(\angle[12]_i_2_n_0 ),
        .O(angle__2[3]));
  (* SOFT_HLUTNM = "soft_lutpair2622" *) 
  LUT5 #(
    .INIT(32'h00080000)) 
    \angle[3]_i_3 
       (.I0(Q[2]),
        .I1(Q[0]),
        .I2(lsb[0]),
        .I3(lsb[1]),
        .I4(Q[1]),
        .O(\angle[3]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000088F8F888)) 
    \angle[4]_i_1 
       (.I0(angle__2[4]),
        .I1(rotaryToStepmuxDir),
        .I2(\angle[13]_i_5_n_0 ),
        .I3(\angle[5]_i_3_n_0 ),
        .I4(Q[4]),
        .I5(step1__6),
        .O(\angle[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFAAAAAAA9)) 
    \angle[4]_i_2 
       (.I0(Q[4]),
        .I1(stateOp50_out[2]),
        .I2(stateOp50_out[0]),
        .I3(stateOp50_out[1]),
        .I4(Q[3]),
        .I5(\angle[12]_i_2_n_0 ),
        .O(angle__2[4]));
  LUT6 #(
    .INIT(64'h00000000BFAAEAAA)) 
    \angle[5]_i_1 
       (.I0(\angle[5]_i_2_n_0 ),
        .I1(Q[4]),
        .I2(\angle[5]_i_3_n_0 ),
        .I3(\angle[13]_i_5_n_0 ),
        .I4(Q[5]),
        .I5(step1__6),
        .O(\angle[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2623" *) 
  LUT5 #(
    .INIT(32'hFEAB0000)) 
    \angle[5]_i_2 
       (.I0(\angle[12]_i_2_n_0 ),
        .I1(Q[4]),
        .I2(\angle[6]_i_4_n_0 ),
        .I3(Q[5]),
        .I4(rotaryToStepmuxDir),
        .O(\angle[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0008000000000000)) 
    \angle[5]_i_3 
       (.I0(Q[3]),
        .I1(Q[1]),
        .I2(lsb[1]),
        .I3(lsb[0]),
        .I4(Q[0]),
        .I5(Q[2]),
        .O(\angle[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h00000000BFAAEAAA)) 
    \angle[6]_i_1 
       (.I0(\angle[6]_i_2_n_0 ),
        .I1(Q[5]),
        .I2(\angle[6]_i_3_n_0 ),
        .I3(\angle[13]_i_5_n_0 ),
        .I4(Q[6]),
        .I5(step1__6),
        .O(\angle[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEAAAB00000000)) 
    \angle[6]_i_2 
       (.I0(\angle[12]_i_2_n_0 ),
        .I1(Q[5]),
        .I2(\angle[6]_i_4_n_0 ),
        .I3(Q[4]),
        .I4(Q[6]),
        .I5(rotaryToStepmuxDir),
        .O(\angle[6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000800000000000)) 
    \angle[6]_i_3 
       (.I0(Q[4]),
        .I1(stateOp50_out[2]),
        .I2(stateOp50_out[0]),
        .I3(Q[1]),
        .I4(lsb[1]),
        .I5(Q[3]),
        .O(\angle[6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF2F2F2B2A)) 
    \angle[6]_i_4 
       (.I0(Q[2]),
        .I1(lsb[0]),
        .I2(lsb[1]),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\angle[6]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2627" *) 
  LUT3 #(
    .INIT(8'h02)) 
    \angle[6]_i_5 
       (.I0(Q[0]),
        .I1(lsb[0]),
        .I2(lsb[1]),
        .O(stateOp50_out[0]));
  LUT6 #(
    .INIT(64'h000000008F88F444)) 
    \angle[7]_i_1 
       (.I0(\angle[7]_i_2_n_0 ),
        .I1(\angle[8]_i_3_n_0 ),
        .I2(\angle[7]_i_3_n_0 ),
        .I3(\angle[13]_i_5_n_0 ),
        .I4(Q[7]),
        .I5(step1__6),
        .O(\angle[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \angle[7]_i_2 
       (.I0(Q[5]),
        .I1(Q[3]),
        .I2(\angle[7]_i_4_n_0 ),
        .I3(stateOp50_out[2]),
        .I4(Q[4]),
        .I5(Q[6]),
        .O(\angle[7]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2621" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \angle[7]_i_3 
       (.I0(Q[6]),
        .I1(Q[4]),
        .I2(\angle[5]_i_3_n_0 ),
        .I3(Q[5]),
        .O(\angle[7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2620" *) 
  LUT4 #(
    .INIT(16'h0F04)) 
    \angle[7]_i_4 
       (.I0(lsb[0]),
        .I1(Q[0]),
        .I2(lsb[1]),
        .I3(Q[1]),
        .O(\angle[7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2622" *) 
  LUT3 #(
    .INIT(8'h2A)) 
    \angle[7]_i_5 
       (.I0(Q[2]),
        .I1(lsb[0]),
        .I2(lsb[1]),
        .O(stateOp50_out[2]));
  LUT6 #(
    .INIT(64'h000000008F88F444)) 
    \angle[8]_i_1 
       (.I0(\angle[8]_i_2_n_0 ),
        .I1(\angle[8]_i_3_n_0 ),
        .I2(\angle[8]_i_4_n_0 ),
        .I3(\angle[13]_i_5_n_0 ),
        .I4(Q[8]),
        .I5(step1__6),
        .O(\angle[8]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \angle[8]_i_2 
       (.I0(\angle[7]_i_2_n_0 ),
        .I1(Q[7]),
        .O(\angle[8]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2623" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \angle[8]_i_3 
       (.I0(rotaryToStepmuxDir),
        .I1(\angle[12]_i_2_n_0 ),
        .O(\angle[8]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2621" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \angle[8]_i_4 
       (.I0(Q[7]),
        .I1(Q[5]),
        .I2(\angle[5]_i_3_n_0 ),
        .I3(Q[4]),
        .I4(Q[6]),
        .O(\angle[8]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h0000BAEA)) 
    \angle[9]_i_1 
       (.I0(\angle[9]_i_2_n_0 ),
        .I1(\angle[10]_i_3_n_0 ),
        .I2(\angle[13]_i_5_n_0 ),
        .I3(Q[9]),
        .I4(step1__6),
        .O(\angle[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEAAAB00000000)) 
    \angle[9]_i_2 
       (.I0(\angle[12]_i_2_n_0 ),
        .I1(Q[8]),
        .I2(\angle[7]_i_2_n_0 ),
        .I3(Q[7]),
        .I4(Q[9]),
        .I5(rotaryToStepmuxDir),
        .O(\angle[9]_i_2_n_0 ));
  FDCE \angle_reg[0] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[0]_i_1_n_0 ),
        .Q(Q[0]));
  FDCE \angle_reg[10] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[10]_i_1_n_0 ),
        .Q(Q[10]));
  FDCE \angle_reg[11] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[11]_i_1_n_0 ),
        .Q(Q[11]));
  FDCE \angle_reg[12] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[12]_i_1_n_0 ),
        .Q(Q[12]));
  FDCE \angle_reg[13] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[13]_i_2_n_0 ),
        .Q(Q[13]));
  FDCE \angle_reg[1] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[1]_i_1_n_0 ),
        .Q(Q[1]));
  FDCE \angle_reg[2] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[2]_i_1_n_0 ),
        .Q(Q[2]));
  FDCE \angle_reg[3] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[3]_i_1_n_0 ),
        .Q(Q[3]));
  FDCE \angle_reg[4] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[4]_i_1_n_0 ),
        .Q(Q[4]));
  FDCE \angle_reg[5] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[5]_i_1_n_0 ),
        .Q(Q[5]));
  FDCE \angle_reg[6] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[6]_i_1_n_0 ),
        .Q(Q[6]));
  FDCE \angle_reg[7] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[7]_i_1_n_0 ),
        .Q(Q[7]));
  FDCE \angle_reg[8] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[8]_i_1_n_0 ),
        .Q(Q[8]));
  FDCE \angle_reg[9] 
       (.C(aclk_sig),
        .CE(\angle[13]_i_1_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\angle[9]_i_1_n_0 ),
        .Q(Q[9]));
  (* SOFT_HLUTNM = "soft_lutpair2629" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \capt[5]_i_1__0 
       (.I0(rotaryToStepmuxStep),
        .I1(\capt_reg[5] ),
        .O(step_reg_0));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 ccwNotCw1_carry
       (.CI(ccwNotCw1_carry_i_1_n_0),
        .CI_TOP(1'b0),
        .CO({NLW_ccwNotCw1_carry_CO_UNCONNECTED[7:4],\invbuf_reg[0][5] ,ccwNotCw1_carry_n_5,ccwNotCw1_carry_n_6,ccwNotCw1_carry_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,O[5],1'b0,1'b0}),
        .O(NLW_ccwNotCw1_carry_O_UNCONNECTED[7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,CO,ccwNotCw_reg_1}));
  LUT2 #(
    .INIT(4'hE)) 
    ccwNotCw1_carry_i_1
       (.I0(ccwNotCw2[6]),
        .I1(ccwNotCw2[7]),
        .O(ccwNotCw1_carry_i_1_n_0));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \ccwNotCw1_inferred__0/i__carry 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({i__carry_i_11__1_0,\ccwNotCw1_inferred__0/i__carry_n_1 ,\ccwNotCw1_inferred__0/i__carry_n_2 ,\ccwNotCw1_inferred__0/i__carry_n_3 ,\ccwNotCw1_inferred__0/i__carry_n_4 ,\ccwNotCw1_inferred__0/i__carry_n_5 ,\ccwNotCw1_inferred__0/i__carry_n_6 ,\ccwNotCw1_inferred__0/i__carry_n_7 }),
        .DI({1'b0,ccwNotCw_reg_2,1'b0,1'b0,i__carry_i_2__3_n_0,1'b0,1'b0,i__carry_i_3__3_n_0}),
        .O(\NLW_ccwNotCw1_inferred__0/i__carry_O_UNCONNECTED [7:0]),
        .S({ccwNotCw_reg_0,i__carry_i_8__2_n_0,i__carry_i_9__3_n_0,i__carry_i_10__3_n_0,i__carry_i_11__1_n_0}));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \ccwNotCw1_inferred__1/i__carry 
       (.CI(i__carry_i_1__4_n_0),
        .CI_TOP(1'b0),
        .CO({\NLW_ccwNotCw1_inferred__1/i__carry_CO_UNCONNECTED [7],\invbuf_reg[0][5]_0 ,\ccwNotCw1_inferred__1/i__carry_n_2 ,\ccwNotCw1_inferred__1/i__carry_n_3 ,\ccwNotCw1_inferred__1/i__carry_n_4 ,\ccwNotCw1_inferred__1/i__carry_n_5 ,\ccwNotCw1_inferred__1/i__carry_n_6 ,\ccwNotCw1_inferred__1/i__carry_n_7 }),
        .DI({1'b0,1'b0,DI,i__carry_i_5__4_n_0,i__carry_i_6__3_n_0,i__carry_i_7__2_n_0}),
        .O(\NLW_ccwNotCw1_inferred__1/i__carry_O_UNCONNECTED [7:0]),
        .S({1'b0,CO,ccwNotCw_reg_3,i__carry_i_11__2_n_0,i__carry_i_12__0_n_0,i__carry_i_13_n_0}));
  CARRY8 ccwNotCw2_carry
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({ccwNotCw2_carry_n_0,ccwNotCw2_carry_n_1,ccwNotCw2_carry_n_2,ccwNotCw2_carry_n_3,ccwNotCw2_carry_n_4,ccwNotCw2_carry_n_5,ccwNotCw2_carry_n_6,ccwNotCw2_carry_n_7}),
        .DI(D),
        .O(ccwNotCw2),
        .S(i__carry_i_11__1_1));
  CARRY8 ccwNotCw2_carry__0
       (.CI(ccwNotCw2_carry_n_0),
        .CI_TOP(1'b0),
        .CO({NLW_ccwNotCw2_carry__0_CO_UNCONNECTED[7],CO,NLW_ccwNotCw2_carry__0_CO_UNCONNECTED[5],ccwNotCw2_carry__0_n_3,ccwNotCw2_carry__0_n_4,ccwNotCw2_carry__0_n_5,ccwNotCw2_carry__0_n_6,ccwNotCw2_carry__0_n_7}),
        .DI({1'b0,1'b0,\tixVStepmode_reg[7]_0 [5:0]}),
        .O({NLW_ccwNotCw2_carry__0_O_UNCONNECTED[7:6],O}),
        .S({1'b0,1'b1,S}));
  FDCE ccwNotCw_reg
       (.C(aclk_sig),
        .CE(targetNotSteady),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(ccwNotCw0),
        .Q(rotaryToStepmuxDir));
  (* SOFT_HLUTNM = "soft_lutpair2628" *) 
  LUT2 #(
    .INIT(4'h2)) 
    dir_INST_0
       (.I0(rotaryToStepmuxDir),
        .I1(dir_0),
        .O(dir));
  (* SOFT_HLUTNM = "soft_lutpair2618" *) 
  LUT4 #(
    .INIT(16'h0051)) 
    \i[0]_i_1__18 
       (.I0(step1__6),
        .I1(\stateOp_reg[1]_0 [1]),
        .I2(\stateOp_reg[1]_0 [0]),
        .I3(i[0]),
        .O(p_1_in[0]));
  (* SOFT_HLUTNM = "soft_lutpair2618" *) 
  LUT5 #(
    .INIT(32'h000B0B00)) 
    \i[1]_i_1__18 
       (.I0(\stateOp_reg[1]_0 [0]),
        .I1(\stateOp_reg[1]_0 [1]),
        .I2(step1__6),
        .I3(i[0]),
        .I4(i[1]),
        .O(p_1_in[1]));
  LUT6 #(
    .INIT(64'h000B0B0B0B000000)) 
    \i[2]_i_1__14 
       (.I0(\stateOp_reg[1]_0 [0]),
        .I1(\stateOp_reg[1]_0 [1]),
        .I2(step1__6),
        .I3(i[0]),
        .I4(i[1]),
        .I5(i[2]),
        .O(p_1_in[2]));
  LUT5 #(
    .INIT(32'h15554000)) 
    \i[3]_i_1__14 
       (.I0(\i_reg[3]_0 ),
        .I1(i[1]),
        .I2(i[0]),
        .I3(i[2]),
        .I4(i[3]),
        .O(p_1_in[3]));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \i[4]_i_1__14 
       (.I0(\i_reg[3]_0 ),
        .I1(i[2]),
        .I2(i[0]),
        .I3(i[1]),
        .I4(i[3]),
        .I5(i[4]),
        .O(p_1_in[4]));
  (* SOFT_HLUTNM = "soft_lutpair2619" *) 
  LUT5 #(
    .INIT(32'h11012202)) 
    \i[5]_i_1__13 
       (.I0(\i[5]_i_2__6_n_0 ),
        .I1(step1__6),
        .I2(\stateOp_reg[1]_0 [1]),
        .I3(\stateOp_reg[1]_0 [0]),
        .I4(i[5]),
        .O(p_1_in[5]));
  LUT5 #(
    .INIT(32'h80000000)) 
    \i[5]_i_2__6 
       (.I0(i[4]),
        .I1(i[2]),
        .I2(i[0]),
        .I3(i[1]),
        .I4(i[3]),
        .O(\i[5]_i_2__6_n_0 ));
  LUT5 #(
    .INIT(32'h11012202)) 
    \i[6]_i_1__12 
       (.I0(\i[7]_i_4__0_n_0 ),
        .I1(step1__6),
        .I2(\stateOp_reg[1]_0 [1]),
        .I3(\stateOp_reg[1]_0 [0]),
        .I4(i[6]),
        .O(p_1_in[6]));
  LUT5 #(
    .INIT(32'hCECCFECC)) 
    \i[7]_i_1__10 
       (.I0(i__3),
        .I1(step1__6),
        .I2(\stateOp_reg[1]_0 [0]),
        .I3(\stateOp_reg[1]_0 [1]),
        .I4(tkclk),
        .O(\i[7]_i_1__10_n_0 ));
  LUT6 #(
    .INIT(64'h0707000708080008)) 
    \i[7]_i_2__2 
       (.I0(i[6]),
        .I1(\i[7]_i_4__0_n_0 ),
        .I2(step1__6),
        .I3(\stateOp_reg[1]_0 [1]),
        .I4(\stateOp_reg[1]_0 [0]),
        .I5(i[7]),
        .O(p_1_in[7]));
  LUT6 #(
    .INIT(64'h0000000090090000)) 
    \i[7]_i_3__0 
       (.I0(i[7]),
        .I1(TStep[7]),
        .I2(i[6]),
        .I3(TStep[6]),
        .I4(tkclk),
        .I5(step_i_2_n_0),
        .O(i__3));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \i[7]_i_4__0 
       (.I0(i[5]),
        .I1(i[3]),
        .I2(i[1]),
        .I3(i[0]),
        .I4(i[2]),
        .I5(i[4]),
        .O(\i[7]_i_4__0_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_10__3
       (.I0(ccwNotCw2[3]),
        .I1(ccwNotCw2[2]),
        .O(i__carry_i_10__3_n_0));
  LUT2 #(
    .INIT(4'h2)) 
    i__carry_i_11__1
       (.I0(ccwNotCw2[0]),
        .I1(ccwNotCw2[1]),
        .O(i__carry_i_11__1_n_0));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_11__2
       (.I0(ccwNotCw2[7]),
        .I1(ccwNotCw2[6]),
        .O(i__carry_i_11__2_n_0));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_12__0
       (.I0(ccwNotCw2[5]),
        .I1(ccwNotCw2[4]),
        .O(i__carry_i_12__0_n_0));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_13
       (.I0(ccwNotCw2[3]),
        .I1(ccwNotCw2[2]),
        .O(i__carry_i_13_n_0));
  LUT2 #(
    .INIT(4'hE)) 
    i__carry_i_1__4
       (.I0(ccwNotCw2[0]),
        .I1(ccwNotCw2[1]),
        .O(i__carry_i_1__4_n_0));
  LUT2 #(
    .INIT(4'h7)) 
    i__carry_i_2__3
       (.I0(ccwNotCw2[7]),
        .I1(ccwNotCw2[6]),
        .O(i__carry_i_2__3_n_0));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_3__3
       (.I0(ccwNotCw2[1]),
        .I1(ccwNotCw2[0]),
        .O(i__carry_i_3__3_n_0));
  LUT2 #(
    .INIT(4'hE)) 
    i__carry_i_5__4
       (.I0(ccwNotCw2[6]),
        .I1(ccwNotCw2[7]),
        .O(i__carry_i_5__4_n_0));
  LUT2 #(
    .INIT(4'hE)) 
    i__carry_i_6__3
       (.I0(ccwNotCw2[4]),
        .I1(ccwNotCw2[5]),
        .O(i__carry_i_6__3_n_0));
  LUT2 #(
    .INIT(4'hE)) 
    i__carry_i_7__2
       (.I0(ccwNotCw2[2]),
        .I1(ccwNotCw2[3]),
        .O(i__carry_i_7__2_n_0));
  LUT2 #(
    .INIT(4'h8)) 
    i__carry_i_8__2
       (.I0(ccwNotCw2[6]),
        .I1(ccwNotCw2[7]),
        .O(i__carry_i_8__2_n_0));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_9__3
       (.I0(ccwNotCw2[5]),
        .I1(ccwNotCw2[4]),
        .O(i__carry_i_9__3_n_0));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__10_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(p_1_in[0]),
        .Q(i[0]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__10_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(p_1_in[1]),
        .Q(i[1]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__10_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(p_1_in[2]),
        .Q(i[2]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__10_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(p_1_in[3]),
        .Q(i[3]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__10_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(p_1_in[4]),
        .Q(i[4]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__10_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(p_1_in[5]),
        .Q(i[5]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__10_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(p_1_in[6]),
        .Q(i[6]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(\i[7]_i_1__10_n_0 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(p_1_in[7]),
        .Q(i[7]));
  FDCE #(
    .INIT(1'b0)) 
    \lsb_reg[0] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\lsb_reg[1]_0 [0]),
        .Q(lsb[0]));
  FDPE #(
    .INIT(1'b0)) 
    \lsb_reg[1] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .D(\lsb_reg[1]_0 [1]),
        .PRE(\tixVStepmode_reg[0]_0 ),
        .Q(lsb[1]));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    m0_INST_0
       (.I0(m0_INST_0_i_1_n_0),
        .I1(\tixVStepmode_reg_n_0_[1] ),
        .I2(\tixVStepmode_reg_n_0_[0] ),
        .I3(\tixVStepmode_reg_n_0_[3] ),
        .I4(\tixVStepmode_reg_n_0_[2] ),
        .I5(dir_0),
        .O(m0));
  LUT4 #(
    .INIT(16'hFFFE)) 
    m0_INST_0_i_1
       (.I0(\tixVStepmode_reg_n_0_[7] ),
        .I1(\tixVStepmode_reg_n_0_[6] ),
        .I2(\tixVStepmode_reg_n_0_[4] ),
        .I3(\tixVStepmode_reg_n_0_[5] ),
        .O(m0_INST_0_i_1_n_0));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    m0z_INST_0
       (.I0(m0_INST_0_i_1_n_0),
        .I1(\tixVStepmode_reg_n_0_[0] ),
        .I2(\tixVStepmode_reg_n_0_[1] ),
        .I3(\tixVStepmode_reg_n_0_[3] ),
        .I4(\tixVStepmode_reg_n_0_[2] ),
        .I5(dir_0),
        .O(m0z));
  FDCE rng_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(rng_reg_2),
        .Q(rng_reg_0));
  LUT4 #(
    .INIT(16'h44C0)) 
    \stateOp[0]_i_3__0 
       (.I0(stateOp4__26),
        .I1(stateOp121_in),
        .I2(rng_reg_0),
        .I3(targetNotSteady_reg_n_0),
        .O(rng_reg_1));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[0]_i_4__1 
       (.I0(TStep[3]),
        .I1(TStep[2]),
        .I2(TStep[1]),
        .I3(TStep[0]),
        .I4(\stateOp[0]_i_5__1_n_0 ),
        .O(stateOp121_in));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[0]_i_5__1 
       (.I0(TStep[4]),
        .I1(TStep[5]),
        .I2(TStep[7]),
        .I3(TStep[6]),
        .O(\stateOp[0]_i_5__1_n_0 ));
  LUT4 #(
    .INIT(16'h6FF6)) 
    \stateOp[1]_i_10__2 
       (.I0(Q[4]),
        .I1(\target_reg_n_0_[4] ),
        .I2(Q[3]),
        .I3(\target_reg_n_0_[3] ),
        .O(\stateOp[1]_i_10__2_n_0 ));
  LUT6 #(
    .INIT(64'hABBBBBBBAAAAABBB)) 
    \stateOp[1]_i_2__10 
       (.I0(\stateOp_reg[1]_1 ),
        .I1(step1__6),
        .I2(stateOp4__26),
        .I3(targetNotSteady_reg_n_0),
        .I4(\stateOp_reg[1]_0 [0]),
        .I5(\stateOp_reg[1]_0 [1]),
        .O(\stateOp[1]_i_2__10_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    \stateOp[1]_i_4__5 
       (.I0(\stateOp[1]_i_5__4_n_0 ),
        .I1(\stateOp[1]_i_6__3_n_0 ),
        .I2(\stateOp[1]_i_7__2_n_0 ),
        .I3(\stateOp[1]_i_8__3_n_0 ),
        .I4(\stateOp[1]_i_9__2_n_0 ),
        .I5(\stateOp[1]_i_10__2_n_0 ),
        .O(stateOp4__26));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stateOp[1]_i_5__4 
       (.I0(\target_reg_n_0_[7] ),
        .I1(Q[7]),
        .I2(\target_reg_n_0_[6] ),
        .I3(Q[6]),
        .I4(Q[8]),
        .I5(\target_reg_n_0_[8] ),
        .O(\stateOp[1]_i_5__4_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \stateOp[1]_i_6__3 
       (.I0(\target_reg_n_0_[10] ),
        .I1(Q[10]),
        .I2(\target_reg_n_0_[9] ),
        .I3(Q[9]),
        .I4(Q[11]),
        .I5(\target_reg_n_0_[11] ),
        .O(\stateOp[1]_i_6__3_n_0 ));
  LUT4 #(
    .INIT(16'h6FF6)) 
    \stateOp[1]_i_7__2 
       (.I0(Q[13]),
        .I1(\target_reg_n_0_[13] ),
        .I2(Q[12]),
        .I3(\target_reg_n_0_[12] ),
        .O(\stateOp[1]_i_7__2_n_0 ));
  LUT6 #(
    .INIT(64'h666F6F6F66F6F6F6)) 
    \stateOp[1]_i_8__3 
       (.I0(Q[5]),
        .I1(\target_reg_n_0_[5] ),
        .I2(Q[2]),
        .I3(lsb[0]),
        .I4(lsb[1]),
        .I5(\target_reg_n_0_[2] ),
        .O(\stateOp[1]_i_8__3_n_0 ));
  LUT6 #(
    .INIT(64'h0000666F000066F6)) 
    \stateOp[1]_i_9__2 
       (.I0(Q[1]),
        .I1(\target_reg_n_0_[1] ),
        .I2(Q[0]),
        .I3(lsb[0]),
        .I4(lsb[1]),
        .I5(\target_reg_n_0_[0] ),
        .O(\stateOp[1]_i_9__2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(\stateOp_reg[1]_2 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\stateOp_reg[0]_0 ),
        .Q(\stateOp_reg[1]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(\stateOp_reg[1]_2 ),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\stateOp[1]_i_2__10_n_0 ),
        .Q(\stateOp_reg[1]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2629" *) 
  LUT2 #(
    .INIT(4'h2)) 
    step_INST_0
       (.I0(rotaryToStepmuxStep),
        .I1(dir_0),
        .O(step));
  LUT6 #(
    .INIT(64'h0000FFBF00000040)) 
    step_i_1
       (.I0(step_i_2_n_0),
        .I1(tkclk),
        .I2(step_i_3_n_0),
        .I3(step_i_4_n_0),
        .I4(step1__6),
        .I5(rotaryToStepmuxStep),
        .O(step_i_1_n_0));
  LUT6 #(
    .INIT(64'hFFFFFFFFBEFFFFBE)) 
    step_i_2
       (.I0(step_i_5_n_0),
        .I1(i[1]),
        .I2(TStep[1]),
        .I3(i[0]),
        .I4(TStep[0]),
        .I5(step_i_6_n_0),
        .O(step_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2619" *) 
  LUT2 #(
    .INIT(4'h2)) 
    step_i_3
       (.I0(\stateOp_reg[1]_0 [1]),
        .I1(\stateOp_reg[1]_0 [0]),
        .O(step_i_3_n_0));
  LUT4 #(
    .INIT(16'h6FF6)) 
    step_i_4
       (.I0(i[7]),
        .I1(TStep[7]),
        .I2(i[6]),
        .I3(TStep[6]),
        .O(step_i_4_n_0));
  LUT4 #(
    .INIT(16'h6FF6)) 
    step_i_5
       (.I0(i[4]),
        .I1(TStep[4]),
        .I2(i[3]),
        .I3(TStep[3]),
        .O(step_i_5_n_0));
  LUT4 #(
    .INIT(16'h6FF6)) 
    step_i_6
       (.I0(i[5]),
        .I1(TStep[5]),
        .I2(i[2]),
        .I3(TStep[2]),
        .O(step_i_6_n_0));
  FDCE step_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(step_i_1_n_0),
        .Q(rotaryToStepmuxStep));
  FDCE targetNotSteady_reg
       (.C(aclk_sig),
        .CE(targetNotSteady),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(reqInvRotaryMoveto),
        .Q(targetNotSteady_reg_n_0));
  FDCE \target_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[0]),
        .Q(\target_reg_n_0_[0] ));
  FDCE \target_reg[10] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [2]),
        .Q(\target_reg_n_0_[10] ));
  FDCE \target_reg[11] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [3]),
        .Q(\target_reg_n_0_[11] ));
  FDCE \target_reg[12] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [4]),
        .Q(\target_reg_n_0_[12] ));
  FDCE \target_reg[13] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [5]),
        .Q(\target_reg_n_0_[13] ));
  FDCE \target_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[1]),
        .Q(\target_reg_n_0_[1] ));
  FDCE \target_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[2]),
        .Q(\target_reg_n_0_[2] ));
  FDCE \target_reg[3] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[3]),
        .Q(\target_reg_n_0_[3] ));
  FDCE \target_reg[4] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[4]),
        .Q(\target_reg_n_0_[4] ));
  FDCE \target_reg[5] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[5]),
        .Q(\target_reg_n_0_[5] ));
  FDCE \target_reg[6] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[6]),
        .Q(\target_reg_n_0_[6] ));
  FDCE \target_reg[7] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(D[7]),
        .Q(\target_reg_n_0_[7] ));
  FDCE \target_reg[8] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [0]),
        .Q(\target_reg_n_0_[8] ));
  FDCE \target_reg[9] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [1]),
        .Q(\target_reg_n_0_[9] ));
  FDCE \tixVStepmode_reg[0] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [0]),
        .Q(\tixVStepmode_reg_n_0_[0] ));
  FDCE \tixVStepmode_reg[1] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [1]),
        .Q(\tixVStepmode_reg_n_0_[1] ));
  FDCE \tixVStepmode_reg[2] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [2]),
        .Q(\tixVStepmode_reg_n_0_[2] ));
  FDCE \tixVStepmode_reg[3] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [3]),
        .Q(\tixVStepmode_reg_n_0_[3] ));
  FDCE \tixVStepmode_reg[4] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [4]),
        .Q(\tixVStepmode_reg_n_0_[4] ));
  FDCE \tixVStepmode_reg[5] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [5]),
        .Q(\tixVStepmode_reg_n_0_[5] ));
  FDCE \tixVStepmode_reg[6] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [6]),
        .Q(\tixVStepmode_reg_n_0_[6] ));
  FDCE \tixVStepmode_reg[7] 
       (.C(aclk_sig),
        .CE(tixVStepmode),
        .CLR(\tixVStepmode_reg[0]_0 ),
        .D(\tixVStepmode_reg[7]_0 [7]),
        .Q(\tixVStepmode_reg_n_0_[7] ));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Rpuif
   (Q,
    rpuAXIL_rdata,
    \mask_reg[4] ,
    AXIL_wready_sig_reg,
    AXIL_awready_sig_reg,
    AXIL_arready,
    AXIL_bvalid_sig_reg,
    rpuAXIL_rvalid,
    aclk_sig,
    \stateOp_reg[0]_0 ,
    tkclk,
    \capt_reg[4] ,
    \retbuf_reg[5][7]_0 ,
    \retbuf_reg[1][7]_0 ,
    \retbuf_reg[0][1]_0 ,
    \retbuf_reg[6][7]_0 ,
    rpuAXIL_wvalid,
    rpuAXIL_awvalid,
    rpuAXIL_wdata,
    rpuAXIL_awaddr,
    rpuAXIL_araddr,
    rpuAXIL_bready,
    rpuAXIL_wstrb,
    rpuAXIL_arvalid,
    rpuAXIL_rready);
  output [4:0]Q;
  output [31:0]rpuAXIL_rdata;
  output [0:0]\mask_reg[4] ;
  output AXIL_wready_sig_reg;
  output AXIL_awready_sig_reg;
  output AXIL_arready;
  output AXIL_bvalid_sig_reg;
  output rpuAXIL_rvalid;
  input aclk_sig;
  input [0:0]\stateOp_reg[0]_0 ;
  input tkclk;
  input \capt_reg[4] ;
  input [7:0]\retbuf_reg[5][7]_0 ;
  input [31:0]\retbuf_reg[1][7]_0 ;
  input [1:0]\retbuf_reg[0][1]_0 ;
  input [7:0]\retbuf_reg[6][7]_0 ;
  input rpuAXIL_wvalid;
  input rpuAXIL_awvalid;
  input [31:0]rpuAXIL_wdata;
  input [1:0]rpuAXIL_awaddr;
  input [1:0]rpuAXIL_araddr;
  input rpuAXIL_bready;
  input [3:0]rpuAXIL_wstrb;
  input rpuAXIL_arvalid;
  input rpuAXIL_rready;

  wire AXIL_arready;
  wire AXIL_awready_sig_reg;
  wire AXIL_bvalid_sig_reg;
  wire AXIL_wready_sig_reg;
  wire [30:0]AXIS_tdata;
  wire [3:0]AXIS_tkeep;
  wire AXIS_tlast;
  wire AXIS_tvalid;
  wire [4:0]Q;
  wire aclk_sig;
  wire \capt_reg[4] ;
  wire [3:3]crcAXIS_tkeep1;
  wire \crcAXIS_tkeep[0]_i_2_n_0 ;
  wire \crcAXIS_tkeep[1]_i_2_n_0 ;
  wire \crcAXIS_tkeep[3]_i_12_n_0 ;
  wire \crcAXIS_tkeep[3]_i_13_n_0 ;
  wire \crcAXIS_tkeep[3]_i_14_n_0 ;
  wire \crcAXIS_tkeep[3]_i_15_n_0 ;
  wire \crcAXIS_tkeep[3]_i_16_n_0 ;
  wire \crcAXIS_tkeep[3]_i_17_n_0 ;
  wire \crcAXIS_tkeep[3]_i_18_n_0 ;
  wire \crcAXIS_tkeep[3]_i_20_n_0 ;
  wire \crcAXIS_tkeep[3]_i_21_n_0 ;
  wire \crcAXIS_tkeep[3]_i_22_n_0 ;
  wire \crcAXIS_tkeep[3]_i_24_n_0 ;
  wire \crcAXIS_tkeep[3]_i_25_n_0 ;
  wire \crcAXIS_tkeep[3]_i_26_n_0 ;
  wire \crcAXIS_tkeep[3]_i_27_n_0 ;
  wire \crcAXIS_tkeep[3]_i_28_n_0 ;
  wire \crcAXIS_tkeep[3]_i_29_n_0 ;
  wire \crcAXIS_tkeep[3]_i_30_n_0 ;
  wire \crcAXIS_tkeep[3]_i_31_n_0 ;
  wire \crcAXIS_tkeep[3]_i_32_n_0 ;
  wire \crcAXIS_tkeep[3]_i_33_n_0 ;
  wire \crcAXIS_tkeep[3]_i_34_n_0 ;
  wire \crcAXIS_tkeep[3]_i_35_n_0 ;
  wire \crcAXIS_tkeep[3]_i_36_n_0 ;
  wire \crcAXIS_tkeep[3]_i_37_n_0 ;
  wire \crcAXIS_tkeep[3]_i_38_n_0 ;
  wire \crcAXIS_tkeep[3]_i_39_n_0 ;
  wire \crcAXIS_tkeep[3]_i_40_n_0 ;
  wire \crcAXIS_tkeep[3]_i_41_n_0 ;
  wire \crcAXIS_tkeep[3]_i_42_n_0 ;
  wire \crcAXIS_tkeep[3]_i_43_n_0 ;
  wire \crcAXIS_tkeep[3]_i_44_n_0 ;
  wire \crcAXIS_tkeep[3]_i_45_n_0 ;
  wire \crcAXIS_tkeep[3]_i_47_n_0 ;
  wire \crcAXIS_tkeep[3]_i_48_n_0 ;
  wire \crcAXIS_tkeep[3]_i_7_n_0 ;
  wire \crcAXIS_tkeep_reg[3]_i_10_n_5 ;
  wire \crcAXIS_tkeep_reg[3]_i_10_n_6 ;
  wire \crcAXIS_tkeep_reg[3]_i_10_n_7 ;
  wire \crcAXIS_tkeep_reg[3]_i_11_n_5 ;
  wire \crcAXIS_tkeep_reg[3]_i_11_n_6 ;
  wire \crcAXIS_tkeep_reg[3]_i_11_n_7 ;
  wire \crcAXIS_tkeep_reg[3]_i_19_n_0 ;
  wire \crcAXIS_tkeep_reg[3]_i_19_n_1 ;
  wire \crcAXIS_tkeep_reg[3]_i_19_n_2 ;
  wire \crcAXIS_tkeep_reg[3]_i_19_n_3 ;
  wire \crcAXIS_tkeep_reg[3]_i_19_n_4 ;
  wire \crcAXIS_tkeep_reg[3]_i_19_n_5 ;
  wire \crcAXIS_tkeep_reg[3]_i_19_n_6 ;
  wire \crcAXIS_tkeep_reg[3]_i_19_n_7 ;
  wire \crcAXIS_tkeep_reg[3]_i_23_n_0 ;
  wire \crcAXIS_tkeep_reg[3]_i_23_n_1 ;
  wire \crcAXIS_tkeep_reg[3]_i_23_n_2 ;
  wire \crcAXIS_tkeep_reg[3]_i_23_n_3 ;
  wire \crcAXIS_tkeep_reg[3]_i_23_n_4 ;
  wire \crcAXIS_tkeep_reg[3]_i_23_n_5 ;
  wire \crcAXIS_tkeep_reg[3]_i_23_n_6 ;
  wire \crcAXIS_tkeep_reg[3]_i_23_n_7 ;
  wire \crcAXIS_tkeep_reg[3]_i_46_n_5 ;
  wire \crcAXIS_tkeep_reg[3]_i_46_n_7 ;
  wire crcAXIS_tlast_sig_i_10__0_n_0;
  wire crcAXIS_tlast_sig_i_3__0_n_0;
  wire crcAXIS_tlast_sig_i_6__0_n_0;
  wire crcAXIS_tlast_sig_i_7__0_n_0;
  wire crcAXIS_tlast_sig_reg_n_0;
  wire crc_imd013_out;
  wire crc_imd015_out;
  wire crc_imd017_out;
  wire crc_imd019_out;
  wire crc_imd020_out;
  wire crc_imd032_out;
  wire crc_imd033_out;
  wire crc_imd059_out;
  wire crc_imd060_out;
  wire [5:1]ixRetbufCrc;
  wire \ixRetbufCrc[2]_i_2_n_0 ;
  wire [3:2]lastAXIS_tkeep__0;
  wire lenRet1;
  wire \len_reg_n_0_[0] ;
  wire \len_reg_n_0_[10] ;
  wire \len_reg_n_0_[11] ;
  wire \len_reg_n_0_[12] ;
  wire \len_reg_n_0_[13] ;
  wire \len_reg_n_0_[14] ;
  wire \len_reg_n_0_[15] ;
  wire \len_reg_n_0_[1] ;
  wire \len_reg_n_0_[2] ;
  wire \len_reg_n_0_[3] ;
  wire \len_reg_n_0_[4] ;
  wire \len_reg_n_0_[5] ;
  wire \len_reg_n_0_[6] ;
  wire \len_reg_n_0_[7] ;
  wire \len_reg_n_0_[8] ;
  wire \len_reg_n_0_[9] ;
  wire [0:0]\mask_reg[4] ;
  wire myCrc_n_0;
  wire myCrc_n_1;
  wire myCrc_n_10;
  wire myCrc_n_100;
  wire myCrc_n_101;
  wire myCrc_n_102;
  wire myCrc_n_103;
  wire myCrc_n_104;
  wire myCrc_n_105;
  wire myCrc_n_106;
  wire myCrc_n_107;
  wire myCrc_n_108;
  wire myCrc_n_109;
  wire myCrc_n_11;
  wire myCrc_n_110;
  wire myCrc_n_111;
  wire myCrc_n_112;
  wire myCrc_n_113;
  wire myCrc_n_114;
  wire myCrc_n_115;
  wire myCrc_n_116;
  wire myCrc_n_117;
  wire myCrc_n_118;
  wire myCrc_n_119;
  wire myCrc_n_12;
  wire myCrc_n_120;
  wire myCrc_n_121;
  wire myCrc_n_122;
  wire myCrc_n_123;
  wire myCrc_n_124;
  wire myCrc_n_125;
  wire myCrc_n_126;
  wire myCrc_n_127;
  wire myCrc_n_128;
  wire myCrc_n_129;
  wire myCrc_n_13;
  wire myCrc_n_130;
  wire myCrc_n_131;
  wire myCrc_n_132;
  wire myCrc_n_133;
  wire myCrc_n_134;
  wire myCrc_n_135;
  wire myCrc_n_136;
  wire myCrc_n_137;
  wire myCrc_n_138;
  wire myCrc_n_139;
  wire myCrc_n_14;
  wire myCrc_n_140;
  wire myCrc_n_141;
  wire myCrc_n_142;
  wire myCrc_n_143;
  wire myCrc_n_144;
  wire myCrc_n_145;
  wire myCrc_n_146;
  wire myCrc_n_147;
  wire myCrc_n_148;
  wire myCrc_n_149;
  wire myCrc_n_15;
  wire myCrc_n_150;
  wire myCrc_n_151;
  wire myCrc_n_152;
  wire myCrc_n_153;
  wire myCrc_n_154;
  wire myCrc_n_155;
  wire myCrc_n_156;
  wire myCrc_n_157;
  wire myCrc_n_158;
  wire myCrc_n_159;
  wire myCrc_n_16;
  wire myCrc_n_160;
  wire myCrc_n_161;
  wire myCrc_n_162;
  wire myCrc_n_163;
  wire myCrc_n_164;
  wire myCrc_n_165;
  wire myCrc_n_166;
  wire myCrc_n_167;
  wire myCrc_n_168;
  wire myCrc_n_169;
  wire myCrc_n_17;
  wire myCrc_n_170;
  wire myCrc_n_171;
  wire myCrc_n_172;
  wire myCrc_n_173;
  wire myCrc_n_18;
  wire myCrc_n_19;
  wire myCrc_n_2;
  wire myCrc_n_20;
  wire myCrc_n_21;
  wire myCrc_n_22;
  wire myCrc_n_23;
  wire myCrc_n_24;
  wire myCrc_n_25;
  wire myCrc_n_26;
  wire myCrc_n_27;
  wire myCrc_n_28;
  wire myCrc_n_29;
  wire myCrc_n_3;
  wire myCrc_n_30;
  wire myCrc_n_32;
  wire myCrc_n_34;
  wire myCrc_n_35;
  wire myCrc_n_36;
  wire myCrc_n_37;
  wire myCrc_n_4;
  wire myCrc_n_41;
  wire myCrc_n_42;
  wire myCrc_n_43;
  wire myCrc_n_44;
  wire myCrc_n_45;
  wire myCrc_n_46;
  wire myCrc_n_47;
  wire myCrc_n_48;
  wire myCrc_n_49;
  wire myCrc_n_5;
  wire myCrc_n_50;
  wire myCrc_n_51;
  wire myCrc_n_53;
  wire myCrc_n_54;
  wire myCrc_n_55;
  wire myCrc_n_57;
  wire myCrc_n_58;
  wire myCrc_n_59;
  wire myCrc_n_6;
  wire myCrc_n_60;
  wire myCrc_n_61;
  wire myCrc_n_62;
  wire myCrc_n_63;
  wire myCrc_n_64;
  wire myCrc_n_65;
  wire myCrc_n_66;
  wire myCrc_n_67;
  wire myCrc_n_68;
  wire myCrc_n_69;
  wire myCrc_n_7;
  wire myCrc_n_70;
  wire myCrc_n_71;
  wire myCrc_n_72;
  wire myCrc_n_73;
  wire myCrc_n_74;
  wire myCrc_n_75;
  wire myCrc_n_76;
  wire myCrc_n_77;
  wire myCrc_n_78;
  wire myCrc_n_79;
  wire myCrc_n_8;
  wire myCrc_n_80;
  wire myCrc_n_81;
  wire myCrc_n_82;
  wire myCrc_n_83;
  wire myCrc_n_84;
  wire myCrc_n_85;
  wire myCrc_n_86;
  wire myCrc_n_87;
  wire myCrc_n_88;
  wire myCrc_n_89;
  wire myCrc_n_9;
  wire myCrc_n_90;
  wire myCrc_n_91;
  wire myCrc_n_92;
  wire myCrc_n_93;
  wire myCrc_n_94;
  wire myCrc_n_95;
  wire myCrc_n_96;
  wire myCrc_n_97;
  wire myCrc_n_98;
  wire myCrc_n_99;
  wire myRxtx_n_0;
  wire myRxtx_n_1;
  wire myRxtx_n_125;
  wire myRxtx_n_126;
  wire myRxtx_n_127;
  wire myRxtx_n_128;
  wire myRxtx_n_129;
  wire myRxtx_n_130;
  wire myRxtx_n_131;
  wire myRxtx_n_132;
  wire myRxtx_n_133;
  wire myRxtx_n_134;
  wire myRxtx_n_135;
  wire myRxtx_n_136;
  wire myRxtx_n_137;
  wire myRxtx_n_138;
  wire myRxtx_n_141;
  wire myRxtx_n_142;
  wire myRxtx_n_143;
  wire myRxtx_n_144;
  wire myRxtx_n_145;
  wire myRxtx_n_158;
  wire myRxtx_n_161;
  wire myRxtx_n_162;
  wire myRxtx_n_163;
  wire myRxtx_n_164;
  wire myRxtx_n_165;
  wire myRxtx_n_166;
  wire myRxtx_n_167;
  wire myRxtx_n_168;
  wire myRxtx_n_169;
  wire myRxtx_n_170;
  wire myRxtx_n_171;
  wire myRxtx_n_172;
  wire myRxtx_n_173;
  wire myRxtx_n_174;
  wire myRxtx_n_175;
  wire myRxtx_n_177;
  wire myRxtx_n_178;
  wire myRxtx_n_179;
  wire myRxtx_n_18;
  wire myRxtx_n_180;
  wire myRxtx_n_181;
  wire myRxtx_n_182;
  wire myRxtx_n_183;
  wire myRxtx_n_184;
  wire myRxtx_n_185;
  wire myRxtx_n_186;
  wire myRxtx_n_187;
  wire myRxtx_n_188;
  wire myRxtx_n_189;
  wire myRxtx_n_19;
  wire myRxtx_n_190;
  wire myRxtx_n_191;
  wire myRxtx_n_192;
  wire myRxtx_n_193;
  wire myRxtx_n_194;
  wire myRxtx_n_195;
  wire myRxtx_n_196;
  wire myRxtx_n_197;
  wire myRxtx_n_198;
  wire myRxtx_n_199;
  wire myRxtx_n_2;
  wire myRxtx_n_20;
  wire myRxtx_n_200;
  wire myRxtx_n_201;
  wire myRxtx_n_202;
  wire myRxtx_n_203;
  wire myRxtx_n_204;
  wire myRxtx_n_205;
  wire myRxtx_n_206;
  wire myRxtx_n_207;
  wire myRxtx_n_208;
  wire myRxtx_n_209;
  wire myRxtx_n_21;
  wire myRxtx_n_210;
  wire myRxtx_n_211;
  wire myRxtx_n_212;
  wire myRxtx_n_213;
  wire myRxtx_n_214;
  wire myRxtx_n_215;
  wire myRxtx_n_216;
  wire myRxtx_n_217;
  wire myRxtx_n_218;
  wire myRxtx_n_219;
  wire myRxtx_n_22;
  wire myRxtx_n_220;
  wire myRxtx_n_221;
  wire myRxtx_n_222;
  wire myRxtx_n_223;
  wire myRxtx_n_224;
  wire myRxtx_n_225;
  wire myRxtx_n_226;
  wire myRxtx_n_227;
  wire myRxtx_n_228;
  wire myRxtx_n_229;
  wire myRxtx_n_23;
  wire myRxtx_n_230;
  wire myRxtx_n_231;
  wire myRxtx_n_232;
  wire myRxtx_n_233;
  wire myRxtx_n_234;
  wire myRxtx_n_235;
  wire myRxtx_n_236;
  wire myRxtx_n_237;
  wire myRxtx_n_238;
  wire myRxtx_n_239;
  wire myRxtx_n_24;
  wire myRxtx_n_240;
  wire myRxtx_n_241;
  wire myRxtx_n_242;
  wire myRxtx_n_243;
  wire myRxtx_n_244;
  wire myRxtx_n_245;
  wire myRxtx_n_246;
  wire myRxtx_n_247;
  wire myRxtx_n_248;
  wire myRxtx_n_249;
  wire myRxtx_n_25;
  wire myRxtx_n_250;
  wire myRxtx_n_251;
  wire myRxtx_n_252;
  wire myRxtx_n_253;
  wire myRxtx_n_254;
  wire myRxtx_n_255;
  wire myRxtx_n_256;
  wire myRxtx_n_257;
  wire myRxtx_n_258;
  wire myRxtx_n_259;
  wire myRxtx_n_26;
  wire myRxtx_n_260;
  wire myRxtx_n_261;
  wire myRxtx_n_262;
  wire myRxtx_n_263;
  wire myRxtx_n_264;
  wire myRxtx_n_265;
  wire myRxtx_n_266;
  wire myRxtx_n_267;
  wire myRxtx_n_268;
  wire myRxtx_n_269;
  wire myRxtx_n_27;
  wire myRxtx_n_270;
  wire myRxtx_n_271;
  wire myRxtx_n_272;
  wire myRxtx_n_273;
  wire myRxtx_n_274;
  wire myRxtx_n_275;
  wire myRxtx_n_276;
  wire myRxtx_n_277;
  wire myRxtx_n_278;
  wire myRxtx_n_279;
  wire myRxtx_n_28;
  wire myRxtx_n_280;
  wire myRxtx_n_281;
  wire myRxtx_n_282;
  wire myRxtx_n_283;
  wire myRxtx_n_284;
  wire myRxtx_n_285;
  wire myRxtx_n_286;
  wire myRxtx_n_287;
  wire myRxtx_n_288;
  wire myRxtx_n_289;
  wire myRxtx_n_29;
  wire myRxtx_n_290;
  wire myRxtx_n_291;
  wire myRxtx_n_292;
  wire myRxtx_n_293;
  wire myRxtx_n_294;
  wire myRxtx_n_295;
  wire myRxtx_n_296;
  wire myRxtx_n_297;
  wire myRxtx_n_298;
  wire myRxtx_n_299;
  wire myRxtx_n_3;
  wire myRxtx_n_30;
  wire myRxtx_n_300;
  wire myRxtx_n_301;
  wire myRxtx_n_302;
  wire myRxtx_n_303;
  wire myRxtx_n_304;
  wire myRxtx_n_305;
  wire myRxtx_n_306;
  wire myRxtx_n_307;
  wire myRxtx_n_308;
  wire myRxtx_n_309;
  wire myRxtx_n_31;
  wire myRxtx_n_310;
  wire myRxtx_n_311;
  wire myRxtx_n_312;
  wire myRxtx_n_313;
  wire myRxtx_n_314;
  wire myRxtx_n_315;
  wire myRxtx_n_316;
  wire myRxtx_n_317;
  wire myRxtx_n_318;
  wire myRxtx_n_319;
  wire myRxtx_n_32;
  wire myRxtx_n_320;
  wire myRxtx_n_321;
  wire myRxtx_n_322;
  wire myRxtx_n_323;
  wire myRxtx_n_326;
  wire myRxtx_n_327;
  wire myRxtx_n_328;
  wire myRxtx_n_329;
  wire myRxtx_n_33;
  wire myRxtx_n_330;
  wire myRxtx_n_331;
  wire myRxtx_n_332;
  wire myRxtx_n_333;
  wire myRxtx_n_334;
  wire myRxtx_n_335;
  wire myRxtx_n_34;
  wire myRxtx_n_344;
  wire myRxtx_n_347;
  wire myRxtx_n_348;
  wire myRxtx_n_35;
  wire myRxtx_n_351;
  wire myRxtx_n_352;
  wire myRxtx_n_353;
  wire myRxtx_n_354;
  wire myRxtx_n_355;
  wire myRxtx_n_356;
  wire myRxtx_n_357;
  wire myRxtx_n_358;
  wire myRxtx_n_359;
  wire myRxtx_n_36;
  wire myRxtx_n_360;
  wire myRxtx_n_361;
  wire myRxtx_n_362;
  wire myRxtx_n_363;
  wire myRxtx_n_364;
  wire myRxtx_n_365;
  wire myRxtx_n_366;
  wire myRxtx_n_367;
  wire myRxtx_n_368;
  wire myRxtx_n_369;
  wire myRxtx_n_37;
  wire myRxtx_n_370;
  wire myRxtx_n_371;
  wire myRxtx_n_372;
  wire myRxtx_n_373;
  wire myRxtx_n_374;
  wire myRxtx_n_375;
  wire myRxtx_n_38;
  wire myRxtx_n_39;
  wire myRxtx_n_4;
  wire myRxtx_n_40;
  wire myRxtx_n_41;
  wire myRxtx_n_42;
  wire myRxtx_n_43;
  wire myRxtx_n_44;
  wire myRxtx_n_45;
  wire myRxtx_n_46;
  wire myRxtx_n_47;
  wire myRxtx_n_48;
  wire myRxtx_n_49;
  wire myRxtx_n_5;
  wire myRxtx_n_50;
  wire myRxtx_n_51;
  wire myRxtx_n_52;
  wire myRxtx_n_53;
  wire myRxtx_n_55;
  wire myRxtx_n_57;
  wire myRxtx_n_58;
  wire myRxtx_n_59;
  wire myRxtx_n_6;
  wire myRxtx_n_60;
  wire myRxtx_n_61;
  wire myRxtx_n_62;
  wire myRxtx_n_63;
  wire myRxtx_n_64;
  wire myRxtx_n_65;
  wire myRxtx_n_66;
  wire myRxtx_n_67;
  wire myRxtx_n_68;
  wire myRxtx_n_69;
  wire myRxtx_n_7;
  wire myRxtx_n_70;
  wire myRxtx_n_71;
  wire myRxtx_n_72;
  wire myRxtx_n_73;
  wire myRxtx_n_74;
  wire myRxtx_n_75;
  wire myRxtx_n_76;
  wire myRxtx_n_77;
  wire myRxtx_n_78;
  wire myRxtx_n_79;
  wire myRxtx_n_8;
  wire myRxtx_n_80;
  wire myRxtx_n_81;
  wire myRxtx_n_82;
  wire myRxtx_n_83;
  wire myRxtx_n_84;
  wire myRxtx_n_85;
  wire myRxtx_n_86;
  wire myRxtx_n_87;
  wire myRxtx_n_88;
  wire myRxtx_n_89;
  wire myRxtx_n_90;
  wire myRxtx_n_91;
  wire myWordto_n_0;
  wire myWordto_n_1;
  wire myWordto_n_2;
  wire myXferto_n_0;
  wire myXferto_n_1;
  wire \opbuf[0]1 ;
  wire \opbuf[1][7]_i_10_n_0 ;
  wire \opbuf[1][7]_i_11_n_0 ;
  wire \opbuf[1][7]_i_12_n_0 ;
  wire \opbuf[1][7]_i_13_n_0 ;
  wire \opbuf[1][7]_i_14_n_0 ;
  wire \opbuf[1][7]_i_15_n_0 ;
  wire \opbuf[1][7]_i_16_n_0 ;
  wire \opbuf[1][7]_i_18_n_0 ;
  wire \opbuf[1][7]_i_19_n_0 ;
  wire \opbuf[1][7]_i_20_n_0 ;
  wire \opbuf[1][7]_i_21_n_0 ;
  wire \opbuf[1][7]_i_22_n_0 ;
  wire \opbuf[1][7]_i_24_n_0 ;
  wire \opbuf[1][7]_i_25_n_0 ;
  wire \opbuf[1][7]_i_26_n_0 ;
  wire \opbuf[1][7]_i_27_n_0 ;
  wire \opbuf[1][7]_i_28_n_0 ;
  wire \opbuf[1][7]_i_29_n_0 ;
  wire \opbuf[1][7]_i_30_n_0 ;
  wire \opbuf[1][7]_i_31_n_0 ;
  wire \opbuf[1][7]_i_32_n_0 ;
  wire \opbuf[1][7]_i_33_n_0 ;
  wire \opbuf[1][7]_i_34_n_0 ;
  wire \opbuf[1][7]_i_35_n_0 ;
  wire \opbuf[1][7]_i_36_n_0 ;
  wire \opbuf[1][7]_i_37_n_0 ;
  wire \opbuf[1][7]_i_38_n_0 ;
  wire \opbuf[1][7]_i_39_n_0 ;
  wire \opbuf[1][7]_i_3_n_0 ;
  wire \opbuf[1][7]_i_40_n_0 ;
  wire \opbuf[1][7]_i_43_n_0 ;
  wire \opbuf[1][7]_i_44_n_0 ;
  wire \opbuf[1][7]_i_45_n_0 ;
  wire \opbuf[1][7]_i_46_n_0 ;
  wire \opbuf[1][7]_i_47_n_0 ;
  wire \opbuf[1][7]_i_48_n_0 ;
  wire \opbuf[1][7]_i_49_n_0 ;
  wire \opbuf[1][7]_i_4_n_0 ;
  wire \opbuf[1][7]_i_50_n_0 ;
  wire \opbuf[1][7]_i_51_n_0 ;
  wire \opbuf[1][7]_i_52_n_0 ;
  wire \opbuf[1][7]_i_53_n_0 ;
  wire \opbuf[1][7]_i_5_n_0 ;
  wire \opbuf[1][7]_i_6_n_0 ;
  wire \opbuf[1][7]_i_7_n_0 ;
  wire \opbuf[1][7]_i_8_n_0 ;
  wire \opbuf[1][7]_i_9_n_0 ;
  wire [7:0]\opbuf[1]_56 ;
  wire \opbuf[6][7]_i_10_n_0 ;
  wire \opbuf[6][7]_i_11_n_0 ;
  wire \opbuf[6][7]_i_13_n_0 ;
  wire \opbuf[6][7]_i_14_n_0 ;
  wire \opbuf[6][7]_i_15_n_0 ;
  wire \opbuf[6][7]_i_17_n_0 ;
  wire \opbuf[6][7]_i_18_n_0 ;
  wire \opbuf[6][7]_i_19_n_0 ;
  wire \opbuf[6][7]_i_20_n_0 ;
  wire \opbuf[6][7]_i_21_n_0 ;
  wire \opbuf[6][7]_i_22_n_0 ;
  wire \opbuf[6][7]_i_23_n_0 ;
  wire \opbuf[6][7]_i_24_n_0 ;
  wire \opbuf[6][7]_i_25_n_0 ;
  wire \opbuf[6][7]_i_26_n_0 ;
  wire \opbuf[6][7]_i_27_n_0 ;
  wire \opbuf[6][7]_i_28_n_0 ;
  wire \opbuf[6][7]_i_29_n_0 ;
  wire \opbuf[6][7]_i_30_n_0 ;
  wire \opbuf[6][7]_i_31_n_0 ;
  wire \opbuf[6][7]_i_32_n_0 ;
  wire \opbuf[6][7]_i_33_n_0 ;
  wire \opbuf[6][7]_i_35_n_0 ;
  wire \opbuf[6][7]_i_36_n_0 ;
  wire \opbuf[6][7]_i_37_n_0 ;
  wire \opbuf[6][7]_i_38_n_0 ;
  wire \opbuf[6][7]_i_39_n_0 ;
  wire \opbuf[6][7]_i_3_n_0 ;
  wire \opbuf[6][7]_i_40_n_0 ;
  wire \opbuf[6][7]_i_41_n_0 ;
  wire \opbuf[6][7]_i_42_n_0 ;
  wire \opbuf[6][7]_i_4_n_0 ;
  wire \opbuf[6][7]_i_5_n_0 ;
  wire \opbuf[6][7]_i_6_n_0 ;
  wire \opbuf[6][7]_i_7_n_0 ;
  wire \opbuf[6][7]_i_8_n_0 ;
  wire \opbuf[6][7]_i_9_n_0 ;
  wire [27:3]\opbuf_reg[0]3 ;
  wire [30:5]\opbuf_reg[0]5 ;
  wire [30:5]\opbuf_reg[0]51_in ;
  wire \opbuf_reg[1][7]_i_17_n_0 ;
  wire \opbuf_reg[1][7]_i_17_n_1 ;
  wire \opbuf_reg[1][7]_i_17_n_2 ;
  wire \opbuf_reg[1][7]_i_17_n_3 ;
  wire \opbuf_reg[1][7]_i_17_n_4 ;
  wire \opbuf_reg[1][7]_i_17_n_5 ;
  wire \opbuf_reg[1][7]_i_17_n_6 ;
  wire \opbuf_reg[1][7]_i_17_n_7 ;
  wire \opbuf_reg[1][7]_i_23_n_6 ;
  wire \opbuf_reg[1][7]_i_41_n_0 ;
  wire \opbuf_reg[1][7]_i_41_n_1 ;
  wire \opbuf_reg[1][7]_i_41_n_2 ;
  wire \opbuf_reg[1][7]_i_41_n_3 ;
  wire \opbuf_reg[1][7]_i_41_n_4 ;
  wire \opbuf_reg[1][7]_i_41_n_5 ;
  wire \opbuf_reg[1][7]_i_41_n_6 ;
  wire \opbuf_reg[1][7]_i_41_n_7 ;
  wire \opbuf_reg[1][7]_i_42_n_6 ;
  wire \opbuf_reg[1][7]_i_42_n_7 ;
  wire [7:0]\opbuf_reg[1]_45 ;
  wire [7:0]\opbuf_reg[5]_47 ;
  wire \opbuf_reg[6][7]_i_12_n_0 ;
  wire \opbuf_reg[6][7]_i_12_n_1 ;
  wire \opbuf_reg[6][7]_i_12_n_2 ;
  wire \opbuf_reg[6][7]_i_12_n_3 ;
  wire \opbuf_reg[6][7]_i_12_n_4 ;
  wire \opbuf_reg[6][7]_i_12_n_5 ;
  wire \opbuf_reg[6][7]_i_12_n_6 ;
  wire \opbuf_reg[6][7]_i_12_n_7 ;
  wire \opbuf_reg[6][7]_i_16_n_0 ;
  wire \opbuf_reg[6][7]_i_16_n_1 ;
  wire \opbuf_reg[6][7]_i_16_n_2 ;
  wire \opbuf_reg[6][7]_i_16_n_3 ;
  wire \opbuf_reg[6][7]_i_16_n_4 ;
  wire \opbuf_reg[6][7]_i_16_n_5 ;
  wire \opbuf_reg[6][7]_i_16_n_6 ;
  wire \opbuf_reg[6][7]_i_16_n_7 ;
  wire \opbuf_reg[6][7]_i_34_n_0 ;
  wire \opbuf_reg[6][7]_i_34_n_1 ;
  wire \opbuf_reg[6][7]_i_34_n_2 ;
  wire \opbuf_reg[6][7]_i_34_n_3 ;
  wire \opbuf_reg[6][7]_i_34_n_4 ;
  wire \opbuf_reg[6][7]_i_34_n_5 ;
  wire \opbuf_reg[6][7]_i_34_n_6 ;
  wire \opbuf_reg[6][7]_i_34_n_7 ;
  wire [7:0]\opbuf_reg[6]_46 ;
  wire \opbuf_reg_n_0_[0][0] ;
  wire \opbuf_reg_n_0_[0][1] ;
  wire \opbuf_reg_n_0_[0][2] ;
  wire \opbuf_reg_n_0_[0][3] ;
  wire \opbuf_reg_n_0_[0][4] ;
  wire \opbuf_reg_n_0_[0][5] ;
  wire \opbuf_reg_n_0_[0][6] ;
  wire \opbuf_reg_n_0_[0][7] ;
  wire \opbuf_reg_n_0_[2][0] ;
  wire \opbuf_reg_n_0_[2][1] ;
  wire \opbuf_reg_n_0_[2][2] ;
  wire \opbuf_reg_n_0_[2][3] ;
  wire \opbuf_reg_n_0_[2][4] ;
  wire \opbuf_reg_n_0_[2][5] ;
  wire \opbuf_reg_n_0_[2][6] ;
  wire \opbuf_reg_n_0_[2][7] ;
  wire [0:0]p_10_out;
  wire p_24_in;
  wire \pollbuf[3]_55 ;
  wire \pollbuf[5]_54 ;
  wire [7:0]\pollbuf_reg[0]_49 ;
  wire [7:0]\pollbuf_reg[1]_50 ;
  wire [5:1]\pollbuf_reg[3]_51 ;
  wire [7:0]\pollbuf_reg[4]_52 ;
  wire [7:0]\pollbuf_reg[5]_53 ;
  wire recvAXIS_tlast;
  wire reqInvRpuifToRotarySet;
  wire \resid[0]_i_2__0_n_0 ;
  wire \resid_reg_n_0_[0] ;
  wire \resid_reg_n_0_[1] ;
  wire \retbuf[0][4]_i_2_n_0 ;
  wire \retbuf[0][6]_i_2_n_0 ;
  wire \retbuf[0][6]_i_3_n_0 ;
  wire \retbuf[0][7]_i_3__0_n_0 ;
  wire \retbuf[0][7]_i_4__0_n_0 ;
  wire \retbuf[1][7]_i_3__0_n_0 ;
  wire \retbuf[2][7]_i_3__0_n_0 ;
  wire \retbuf[2][7]_i_4_n_0 ;
  wire \retbuf[2][7]_i_5__0_n_0 ;
  wire \retbuf[2][7]_i_6__0_n_0 ;
  wire \retbuf[33][7]_i_3__0_n_0 ;
  wire \retbuf[36][7]_i_3__0_n_0 ;
  wire \retbuf[37][7]_i_3__0_n_0 ;
  wire \retbuf[39][7]_i_2__0_n_0 ;
  wire \retbuf[4][7]_i_3__0_n_0 ;
  wire \retbuf[5][7]_i_3__0_n_0 ;
  wire \retbuf[8][5]_i_2__0_n_0 ;
  wire \retbuf[8][7]_i_3_n_0 ;
  wire [1:0]\retbuf_reg[0][1]_0 ;
  wire [31:0]\retbuf_reg[1][7]_0 ;
  wire [7:0]\retbuf_reg[5][7]_0 ;
  wire [7:0]\retbuf_reg[6][7]_0 ;
  wire [7:0]\retbuf_reg[7]_48 ;
  wire \retbuf_reg_n_0_[0][0] ;
  wire \retbuf_reg_n_0_[0][1] ;
  wire \retbuf_reg_n_0_[0][2] ;
  wire \retbuf_reg_n_0_[0][3] ;
  wire \retbuf_reg_n_0_[0][4] ;
  wire \retbuf_reg_n_0_[0][5] ;
  wire \retbuf_reg_n_0_[0][6] ;
  wire \retbuf_reg_n_0_[0][7] ;
  wire \retbuf_reg_n_0_[11][0] ;
  wire \retbuf_reg_n_0_[11][1] ;
  wire \retbuf_reg_n_0_[11][2] ;
  wire \retbuf_reg_n_0_[11][3] ;
  wire \retbuf_reg_n_0_[11][4] ;
  wire \retbuf_reg_n_0_[11][5] ;
  wire \retbuf_reg_n_0_[11][6] ;
  wire \retbuf_reg_n_0_[11][7] ;
  wire \retbuf_reg_n_0_[14][4] ;
  wire \retbuf_reg_n_0_[15][1] ;
  wire \retbuf_reg_n_0_[15][2] ;
  wire \retbuf_reg_n_0_[15][3] ;
  wire \retbuf_reg_n_0_[1][0] ;
  wire \retbuf_reg_n_0_[1][1] ;
  wire \retbuf_reg_n_0_[1][2] ;
  wire \retbuf_reg_n_0_[1][3] ;
  wire \retbuf_reg_n_0_[1][4] ;
  wire \retbuf_reg_n_0_[1][5] ;
  wire \retbuf_reg_n_0_[1][6] ;
  wire \retbuf_reg_n_0_[1][7] ;
  wire \retbuf_reg_n_0_[23][6] ;
  wire \retbuf_reg_n_0_[2][0] ;
  wire \retbuf_reg_n_0_[2][1] ;
  wire \retbuf_reg_n_0_[2][2] ;
  wire \retbuf_reg_n_0_[2][3] ;
  wire \retbuf_reg_n_0_[2][4] ;
  wire \retbuf_reg_n_0_[2][5] ;
  wire \retbuf_reg_n_0_[2][6] ;
  wire \retbuf_reg_n_0_[2][7] ;
  wire \retbuf_reg_n_0_[31][0] ;
  wire \retbuf_reg_n_0_[32][0] ;
  wire \retbuf_reg_n_0_[32][1] ;
  wire \retbuf_reg_n_0_[32][2] ;
  wire \retbuf_reg_n_0_[32][3] ;
  wire \retbuf_reg_n_0_[32][4] ;
  wire \retbuf_reg_n_0_[32][5] ;
  wire \retbuf_reg_n_0_[32][6] ;
  wire \retbuf_reg_n_0_[32][7] ;
  wire \retbuf_reg_n_0_[33][0] ;
  wire \retbuf_reg_n_0_[33][1] ;
  wire \retbuf_reg_n_0_[33][2] ;
  wire \retbuf_reg_n_0_[33][3] ;
  wire \retbuf_reg_n_0_[33][4] ;
  wire \retbuf_reg_n_0_[33][5] ;
  wire \retbuf_reg_n_0_[33][6] ;
  wire \retbuf_reg_n_0_[33][7] ;
  wire \retbuf_reg_n_0_[35][0] ;
  wire \retbuf_reg_n_0_[35][1] ;
  wire \retbuf_reg_n_0_[35][2] ;
  wire \retbuf_reg_n_0_[35][3] ;
  wire \retbuf_reg_n_0_[35][4] ;
  wire \retbuf_reg_n_0_[35][5] ;
  wire \retbuf_reg_n_0_[35][6] ;
  wire \retbuf_reg_n_0_[35][7] ;
  wire \retbuf_reg_n_0_[36][0] ;
  wire \retbuf_reg_n_0_[36][1] ;
  wire \retbuf_reg_n_0_[36][2] ;
  wire \retbuf_reg_n_0_[36][3] ;
  wire \retbuf_reg_n_0_[36][4] ;
  wire \retbuf_reg_n_0_[36][5] ;
  wire \retbuf_reg_n_0_[36][6] ;
  wire \retbuf_reg_n_0_[36][7] ;
  wire \retbuf_reg_n_0_[37][0] ;
  wire \retbuf_reg_n_0_[37][1] ;
  wire \retbuf_reg_n_0_[37][2] ;
  wire \retbuf_reg_n_0_[37][3] ;
  wire \retbuf_reg_n_0_[37][4] ;
  wire \retbuf_reg_n_0_[37][5] ;
  wire \retbuf_reg_n_0_[37][6] ;
  wire \retbuf_reg_n_0_[37][7] ;
  wire \retbuf_reg_n_0_[38][0] ;
  wire \retbuf_reg_n_0_[38][1] ;
  wire \retbuf_reg_n_0_[38][2] ;
  wire \retbuf_reg_n_0_[38][3] ;
  wire \retbuf_reg_n_0_[38][4] ;
  wire \retbuf_reg_n_0_[38][5] ;
  wire \retbuf_reg_n_0_[38][6] ;
  wire \retbuf_reg_n_0_[38][7] ;
  wire \retbuf_reg_n_0_[39][0] ;
  wire \retbuf_reg_n_0_[39][1] ;
  wire \retbuf_reg_n_0_[39][2] ;
  wire \retbuf_reg_n_0_[39][3] ;
  wire \retbuf_reg_n_0_[39][4] ;
  wire \retbuf_reg_n_0_[39][5] ;
  wire \retbuf_reg_n_0_[39][6] ;
  wire \retbuf_reg_n_0_[39][7] ;
  wire \retbuf_reg_n_0_[3][0] ;
  wire \retbuf_reg_n_0_[3][1] ;
  wire \retbuf_reg_n_0_[3][2] ;
  wire \retbuf_reg_n_0_[3][3] ;
  wire \retbuf_reg_n_0_[3][4] ;
  wire \retbuf_reg_n_0_[3][5] ;
  wire \retbuf_reg_n_0_[3][6] ;
  wire \retbuf_reg_n_0_[3][7] ;
  wire \retbuf_reg_n_0_[4][0] ;
  wire \retbuf_reg_n_0_[4][1] ;
  wire \retbuf_reg_n_0_[4][2] ;
  wire \retbuf_reg_n_0_[4][3] ;
  wire \retbuf_reg_n_0_[4][4] ;
  wire \retbuf_reg_n_0_[4][5] ;
  wire \retbuf_reg_n_0_[4][6] ;
  wire \retbuf_reg_n_0_[4][7] ;
  wire \retbuf_reg_n_0_[5][0] ;
  wire \retbuf_reg_n_0_[5][1] ;
  wire \retbuf_reg_n_0_[5][2] ;
  wire \retbuf_reg_n_0_[5][3] ;
  wire \retbuf_reg_n_0_[5][4] ;
  wire \retbuf_reg_n_0_[5][5] ;
  wire \retbuf_reg_n_0_[5][6] ;
  wire \retbuf_reg_n_0_[5][7] ;
  wire \retbuf_reg_n_0_[6][0] ;
  wire \retbuf_reg_n_0_[6][1] ;
  wire \retbuf_reg_n_0_[6][2] ;
  wire \retbuf_reg_n_0_[6][3] ;
  wire \retbuf_reg_n_0_[6][4] ;
  wire \retbuf_reg_n_0_[6][5] ;
  wire \retbuf_reg_n_0_[6][6] ;
  wire \retbuf_reg_n_0_[6][7] ;
  wire \retbuf_reg_n_0_[8][0] ;
  wire \retbuf_reg_n_0_[8][1] ;
  wire \retbuf_reg_n_0_[8][2] ;
  wire \retbuf_reg_n_0_[8][3] ;
  wire \retbuf_reg_n_0_[8][4] ;
  wire \retbuf_reg_n_0_[8][5] ;
  wire \retbuf_reg_n_0_[8][6] ;
  wire \retbuf_reg_n_0_[8][7] ;
  wire [1:0]rpuAXIL_araddr;
  wire rpuAXIL_arvalid;
  wire [1:0]rpuAXIL_awaddr;
  wire rpuAXIL_awvalid;
  wire rpuAXIL_bready;
  wire [31:0]rpuAXIL_rdata;
  wire rpuAXIL_rready;
  wire rpuAXIL_rvalid;
  wire [31:0]rpuAXIL_wdata;
  wire [3:0]rpuAXIL_wstrb;
  wire rpuAXIL_wvalid;
  wire [15:0]rxAXIS_tdata;
  wire rxAXIS_tvalid;
  wire [1:1]rxlen;
  wire \rxlen[1]_i_3_n_0 ;
  wire \stateOp[0]_i_5__0_n_0 ;
  wire \stateOp[0]_i_7__0_n_0 ;
  wire \stateOp[1]_i_3__3_n_0 ;
  wire \stateOp[1]_i_4__4_n_0 ;
  wire \stateOp[2]_i_4__1_n_0 ;
  wire \stateOp[2]_i_6__0_n_0 ;
  wire \stateOp[3]_i_3__0_n_0 ;
  wire \stateOp[3]_i_5__0_n_0 ;
  wire \stateOp[3]_i_6__0_n_0 ;
  wire \stateOp[3]_i_7__0_n_0 ;
  wire \stateOp[3]_i_9_n_0 ;
  wire \stateOp[4]_i_12_n_0 ;
  wire \stateOp[4]_i_13_n_0 ;
  wire \stateOp[4]_i_14_n_0 ;
  wire \stateOp[4]_i_15_n_0 ;
  wire \stateOp[4]_i_16_n_0 ;
  wire \stateOp[4]_i_17_n_0 ;
  wire \stateOp[4]_i_18_n_0 ;
  wire \stateOp[4]_i_20_n_0 ;
  wire \stateOp[4]_i_21_n_0 ;
  wire \stateOp[4]_i_22_n_0 ;
  wire \stateOp[4]_i_23_n_0 ;
  wire \stateOp[4]_i_24_n_0 ;
  wire \stateOp[4]_i_25_n_0 ;
  wire \stateOp[4]_i_26_n_0 ;
  wire \stateOp[4]_i_27_n_0 ;
  wire \stateOp[4]_i_3_n_0 ;
  wire \stateOp[4]_i_4__0_n_0 ;
  wire \stateOp[4]_i_6__0_n_0 ;
  wire \stateOp[4]_i_9_n_0 ;
  wire [4:0]stateOp_next;
  wire \stateOp_next[0]_i_2_n_0 ;
  wire \stateOp_next[2]_i_2_n_0 ;
  wire \stateOp_next[2]_i_3_n_0 ;
  wire \stateOp_next[2]_i_4_n_0 ;
  wire \stateOp_next[2]_i_5_n_0 ;
  wire \stateOp_next[2]_i_6_n_0 ;
  wire \stateOp_next[2]_i_7_n_0 ;
  wire \stateOp_next[2]_i_8_n_0 ;
  wire \stateOp_next[2]_i_9_n_0 ;
  wire \stateOp_next[3]_i_2_n_0 ;
  wire \stateOp_next[3]_i_3_n_0 ;
  wire \stateOp_next[3]_i_4_n_0 ;
  wire \stateOp_next[3]_i_5_n_0 ;
  wire \stateOp_next[4]_i_3__0_n_0 ;
  wire \stateOp_next[4]_i_4__0_n_0 ;
  wire \stateOp_next[4]_i_5__0_n_0 ;
  wire \stateOp_next[4]_i_6__0_n_0 ;
  wire [0:0]\stateOp_reg[0]_0 ;
  wire \stateOp_reg[4]_i_11_n_0 ;
  wire \stateOp_reg[4]_i_11_n_1 ;
  wire \stateOp_reg[4]_i_11_n_2 ;
  wire \stateOp_reg[4]_i_11_n_3 ;
  wire \stateOp_reg[4]_i_11_n_4 ;
  wire \stateOp_reg[4]_i_11_n_5 ;
  wire \stateOp_reg[4]_i_11_n_6 ;
  wire \stateOp_reg[4]_i_11_n_7 ;
  wire \stateOp_reg[4]_i_5_n_5 ;
  wire \stateOp_reg[4]_i_5_n_6 ;
  wire \stateOp_reg[4]_i_5_n_7 ;
  wire \tixVBuffer_reg_n_0_[0] ;
  wire \tixVBuffer_reg_n_0_[1] ;
  wire \tixVBuffer_reg_n_0_[2] ;
  wire \tixVBuffer_reg_n_0_[3] ;
  wire \tixVBuffer_reg_n_0_[4] ;
  wire \tixVBuffer_reg_n_0_[5] ;
  wire \tixVBuffer_reg_n_0_[6] ;
  wire \tixVBuffer_reg_n_0_[7] ;
  wire [7:0]tixVBufxfop;
  wire tixVCommand;
  wire \tixVCommand_reg_n_0_[0] ;
  wire \tixVCommand_reg_n_0_[1] ;
  wire \tixVCommand_reg_n_0_[2] ;
  wire \tixVCommand_reg_n_0_[3] ;
  wire \tixVCommand_reg_n_0_[4] ;
  wire \tixVCommand_reg_n_0_[5] ;
  wire \tixVCommand_reg_n_0_[6] ;
  wire \tixVCommand_reg_n_0_[7] ;
  wire \tixVController[7]_i_4__0_n_0 ;
  wire \tixVController[7]_i_5__0_n_0 ;
  wire \tixVController[7]_i_6__0_n_0 ;
  wire \tixVController[7]_i_7_n_0 ;
  wire \tixVController_reg_n_0_[0] ;
  wire \tixVController_reg_n_0_[1] ;
  wire \tixVController_reg_n_0_[2] ;
  wire \tixVController_reg_n_0_[3] ;
  wire \tixVController_reg_n_0_[4] ;
  wire \tixVController_reg_n_0_[5] ;
  wire \tixVController_reg_n_0_[6] ;
  wire \tixVController_reg_n_0_[7] ;
  wire tkclk;
  wire \txAXIS_tdata[0]_i_2__0_n_0 ;
  wire \txAXIS_tdata[0]_i_4__0_n_0 ;
  wire \txAXIS_tdata[0]_i_5_n_0 ;
  wire \txAXIS_tdata[10]_i_3__0_n_0 ;
  wire \txAXIS_tdata[10]_i_4__0_n_0 ;
  wire \txAXIS_tdata[10]_i_6__0_n_0 ;
  wire \txAXIS_tdata[11]_i_2__0_n_0 ;
  wire \txAXIS_tdata[11]_i_5__0_n_0 ;
  wire \txAXIS_tdata[11]_i_6__0_n_0 ;
  wire \txAXIS_tdata[11]_i_7__0_n_0 ;
  wire \txAXIS_tdata[12]_i_2__0_n_0 ;
  wire \txAXIS_tdata[12]_i_3__0_n_0 ;
  wire \txAXIS_tdata[12]_i_5__0_n_0 ;
  wire \txAXIS_tdata[12]_i_6__0_n_0 ;
  wire \txAXIS_tdata[13]_i_3__0_n_0 ;
  wire \txAXIS_tdata[13]_i_5__0_n_0 ;
  wire \txAXIS_tdata[13]_i_6__0_n_0 ;
  wire \txAXIS_tdata[14]_i_2__0_n_0 ;
  wire \txAXIS_tdata[14]_i_5__0_n_0 ;
  wire \txAXIS_tdata[14]_i_6__0_n_0 ;
  wire \txAXIS_tdata[14]_i_7__0_n_0 ;
  wire \txAXIS_tdata[15]_i_4__0_n_0 ;
  wire \txAXIS_tdata[15]_i_6__0_n_0 ;
  wire \txAXIS_tdata[15]_i_7__0_n_0 ;
  wire \txAXIS_tdata[16]_i_2__0_n_0 ;
  wire \txAXIS_tdata[16]_i_3__0_n_0 ;
  wire \txAXIS_tdata[16]_i_4__0_n_0 ;
  wire \txAXIS_tdata[16]_i_5__0_n_0 ;
  wire \txAXIS_tdata[17]_i_2__0_n_0 ;
  wire \txAXIS_tdata[17]_i_3__0_n_0 ;
  wire \txAXIS_tdata[17]_i_5__0_n_0 ;
  wire \txAXIS_tdata[18]_i_2__0_n_0 ;
  wire \txAXIS_tdata[18]_i_3__0_n_0 ;
  wire \txAXIS_tdata[18]_i_4__0_n_0 ;
  wire \txAXIS_tdata[18]_i_5__0_n_0 ;
  wire \txAXIS_tdata[19]_i_2__0_n_0 ;
  wire \txAXIS_tdata[19]_i_3__0_n_0 ;
  wire \txAXIS_tdata[1]_i_3__0_n_0 ;
  wire \txAXIS_tdata[1]_i_4__0_n_0 ;
  wire \txAXIS_tdata[1]_i_5__0_n_0 ;
  wire \txAXIS_tdata[1]_i_6_n_0 ;
  wire \txAXIS_tdata[20]_i_3__0_n_0 ;
  wire \txAXIS_tdata[20]_i_4__0_n_0 ;
  wire \txAXIS_tdata[20]_i_5__0_n_0 ;
  wire \txAXIS_tdata[21]_i_2__0_n_0 ;
  wire \txAXIS_tdata[21]_i_3__0_n_0 ;
  wire \txAXIS_tdata[22]_i_2__0_n_0 ;
  wire \txAXIS_tdata[22]_i_3__0_n_0 ;
  wire \txAXIS_tdata[23]_i_3__0_n_0 ;
  wire \txAXIS_tdata[23]_i_4__0_n_0 ;
  wire \txAXIS_tdata[23]_i_5__0_n_0 ;
  wire \txAXIS_tdata[24]_i_4__0_n_0 ;
  wire \txAXIS_tdata[24]_i_5__0_n_0 ;
  wire \txAXIS_tdata[24]_i_6__0_n_0 ;
  wire \txAXIS_tdata[25]_i_2__0_n_0 ;
  wire \txAXIS_tdata[25]_i_5__0_n_0 ;
  wire \txAXIS_tdata[25]_i_6__0_n_0 ;
  wire \txAXIS_tdata[25]_i_7__0_n_0 ;
  wire \txAXIS_tdata[26]_i_3__0_n_0 ;
  wire \txAXIS_tdata[26]_i_4__0_n_0 ;
  wire \txAXIS_tdata[26]_i_5__0_n_0 ;
  wire \txAXIS_tdata[27]_i_2__0_n_0 ;
  wire \txAXIS_tdata[27]_i_3__0_n_0 ;
  wire \txAXIS_tdata[27]_i_4__0_n_0 ;
  wire \txAXIS_tdata[27]_i_6__0_n_0 ;
  wire \txAXIS_tdata[28]_i_2__0_n_0 ;
  wire \txAXIS_tdata[28]_i_3__0_n_0 ;
  wire \txAXIS_tdata[28]_i_5__0_n_0 ;
  wire \txAXIS_tdata[29]_i_3__0_n_0 ;
  wire \txAXIS_tdata[29]_i_4__0_n_0 ;
  wire \txAXIS_tdata[29]_i_5__0_n_0 ;
  wire \txAXIS_tdata[2]_i_2__0_n_0 ;
  wire \txAXIS_tdata[2]_i_4__0_n_0 ;
  wire \txAXIS_tdata[2]_i_5__0_n_0 ;
  wire \txAXIS_tdata[30]_i_2__0_n_0 ;
  wire \txAXIS_tdata[30]_i_3__0_n_0 ;
  wire \txAXIS_tdata[30]_i_5__0_n_0 ;
  wire \txAXIS_tdata[31]_i_10__0_n_0 ;
  wire \txAXIS_tdata[31]_i_11_n_0 ;
  wire \txAXIS_tdata[31]_i_13_n_0 ;
  wire \txAXIS_tdata[31]_i_14_n_0 ;
  wire \txAXIS_tdata[31]_i_15_n_0 ;
  wire \txAXIS_tdata[31]_i_16_n_0 ;
  wire \txAXIS_tdata[31]_i_17_n_0 ;
  wire \txAXIS_tdata[31]_i_18_n_0 ;
  wire \txAXIS_tdata[31]_i_19_n_0 ;
  wire \txAXIS_tdata[31]_i_20_n_0 ;
  wire \txAXIS_tdata[31]_i_3__0_n_0 ;
  wire \txAXIS_tdata[31]_i_4__0_n_0 ;
  wire \txAXIS_tdata[31]_i_5__0_n_0 ;
  wire \txAXIS_tdata[31]_i_6__0_n_0 ;
  wire \txAXIS_tdata[31]_i_7__0_n_0 ;
  wire \txAXIS_tdata[31]_i_9__0_n_0 ;
  wire \txAXIS_tdata[3]_i_3__0_n_0 ;
  wire \txAXIS_tdata[3]_i_4__0_n_0 ;
  wire \txAXIS_tdata[3]_i_5__0_n_0 ;
  wire \txAXIS_tdata[3]_i_6_n_0 ;
  wire \txAXIS_tdata[4]_i_2__0_n_0 ;
  wire \txAXIS_tdata[4]_i_4__0_n_0 ;
  wire \txAXIS_tdata[4]_i_5__0_n_0 ;
  wire \txAXIS_tdata[4]_i_6__0_n_0 ;
  wire \txAXIS_tdata[5]_i_3__0_n_0 ;
  wire \txAXIS_tdata[5]_i_4_n_0 ;
  wire \txAXIS_tdata[5]_i_5__0_n_0 ;
  wire \txAXIS_tdata[5]_i_6__0_n_0 ;
  wire \txAXIS_tdata[6]_i_2__0_n_0 ;
  wire \txAXIS_tdata[6]_i_3__0_n_0 ;
  wire \txAXIS_tdata[6]_i_5__0_n_0 ;
  wire \txAXIS_tdata[6]_i_6_n_0 ;
  wire \txAXIS_tdata[6]_i_7_n_0 ;
  wire \txAXIS_tdata[6]_i_8__0_n_0 ;
  wire \txAXIS_tdata[7]_i_10_n_0 ;
  wire \txAXIS_tdata[7]_i_5__0_n_0 ;
  wire \txAXIS_tdata[7]_i_6__0_n_0 ;
  wire \txAXIS_tdata[7]_i_7__0_n_0 ;
  wire \txAXIS_tdata[7]_i_8__0_n_0 ;
  wire \txAXIS_tdata[7]_i_9_n_0 ;
  wire \txAXIS_tdata[8]_i_2__0_n_0 ;
  wire \txAXIS_tdata[8]_i_3__0_n_0 ;
  wire \txAXIS_tdata[8]_i_5__0_n_0 ;
  wire \txAXIS_tdata[8]_i_6__0_n_0 ;
  wire \txAXIS_tdata[8]_i_7__0_n_0 ;
  wire \txAXIS_tdata[9]_i_2__0_n_0 ;
  wire \txAXIS_tdata[9]_i_5__0_n_0 ;
  wire \txAXIS_tdata[9]_i_6__0_n_0 ;
  wire \txAXIS_tdata[9]_i_7__0_n_0 ;
  wire \txAXIS_tdata_reg[11]_i_3_n_0 ;
  wire \txAXIS_tdata_reg[13]_i_4_n_0 ;
  wire \txAXIS_tdata_reg[14]_i_3_n_0 ;
  wire \txAXIS_tdata_reg[15]_i_5_n_0 ;
  wire \txAXIS_tdata_reg[24]_i_2_n_0 ;
  wire \txAXIS_tdata_reg[25]_i_3_n_0 ;
  wire \txAXIS_tdata_reg[31]_i_12_n_0 ;
  wire \txAXIS_tdata_reg[31]_i_12_n_1 ;
  wire \txAXIS_tdata_reg[31]_i_12_n_2 ;
  wire \txAXIS_tdata_reg[31]_i_12_n_3 ;
  wire \txAXIS_tdata_reg[31]_i_12_n_4 ;
  wire \txAXIS_tdata_reg[31]_i_12_n_5 ;
  wire \txAXIS_tdata_reg[31]_i_12_n_6 ;
  wire \txAXIS_tdata_reg[31]_i_12_n_7 ;
  wire \txAXIS_tdata_reg[9]_i_3_n_0 ;
  wire \txAXIS_tdata_reg_n_0_[0] ;
  wire \txAXIS_tdata_reg_n_0_[10] ;
  wire \txAXIS_tdata_reg_n_0_[11] ;
  wire \txAXIS_tdata_reg_n_0_[12] ;
  wire \txAXIS_tdata_reg_n_0_[13] ;
  wire \txAXIS_tdata_reg_n_0_[14] ;
  wire \txAXIS_tdata_reg_n_0_[15] ;
  wire \txAXIS_tdata_reg_n_0_[16] ;
  wire \txAXIS_tdata_reg_n_0_[17] ;
  wire \txAXIS_tdata_reg_n_0_[18] ;
  wire \txAXIS_tdata_reg_n_0_[19] ;
  wire \txAXIS_tdata_reg_n_0_[1] ;
  wire \txAXIS_tdata_reg_n_0_[20] ;
  wire \txAXIS_tdata_reg_n_0_[21] ;
  wire \txAXIS_tdata_reg_n_0_[22] ;
  wire \txAXIS_tdata_reg_n_0_[23] ;
  wire \txAXIS_tdata_reg_n_0_[24] ;
  wire \txAXIS_tdata_reg_n_0_[25] ;
  wire \txAXIS_tdata_reg_n_0_[26] ;
  wire \txAXIS_tdata_reg_n_0_[27] ;
  wire \txAXIS_tdata_reg_n_0_[28] ;
  wire \txAXIS_tdata_reg_n_0_[29] ;
  wire \txAXIS_tdata_reg_n_0_[2] ;
  wire \txAXIS_tdata_reg_n_0_[30] ;
  wire \txAXIS_tdata_reg_n_0_[31] ;
  wire \txAXIS_tdata_reg_n_0_[3] ;
  wire \txAXIS_tdata_reg_n_0_[4] ;
  wire \txAXIS_tdata_reg_n_0_[5] ;
  wire \txAXIS_tdata_reg_n_0_[6] ;
  wire \txAXIS_tdata_reg_n_0_[7] ;
  wire \txAXIS_tdata_reg_n_0_[8] ;
  wire \txAXIS_tdata_reg_n_0_[9] ;
  wire [30:1]txlast1;
  wire \txlen_reg_n_0_[0] ;
  wire \txlen_reg_n_0_[1] ;
  wire \txlen_reg_n_0_[3] ;
  wire [24:0]wordcntCrcLast;
  wire [1:0]wordcntLast;
  wire \wordcntLast[0]_i_2__0_n_0 ;
  wire \wordcntLast[1]_i_2_n_0 ;
  wire \wordcntLast_reg_n_0_[0] ;
  wire \wordcntLast_reg_n_0_[1] ;
  wire \wordcntLast_reg_n_0_[3] ;
  wire \wordcnt[30]_i_4_n_0 ;
  wire \wordcnt[30]_i_7__0_n_0 ;
  wire \wordcnt_reg[16]_i_2__0_n_0 ;
  wire \wordcnt_reg[16]_i_2__0_n_1 ;
  wire \wordcnt_reg[16]_i_2__0_n_2 ;
  wire \wordcnt_reg[16]_i_2__0_n_3 ;
  wire \wordcnt_reg[16]_i_2__0_n_4 ;
  wire \wordcnt_reg[16]_i_2__0_n_5 ;
  wire \wordcnt_reg[16]_i_2__0_n_6 ;
  wire \wordcnt_reg[16]_i_2__0_n_7 ;
  wire \wordcnt_reg[24]_i_2__0_n_0 ;
  wire \wordcnt_reg[24]_i_2__0_n_1 ;
  wire \wordcnt_reg[24]_i_2__0_n_2 ;
  wire \wordcnt_reg[24]_i_2__0_n_3 ;
  wire \wordcnt_reg[24]_i_2__0_n_4 ;
  wire \wordcnt_reg[24]_i_2__0_n_5 ;
  wire \wordcnt_reg[24]_i_2__0_n_6 ;
  wire \wordcnt_reg[24]_i_2__0_n_7 ;
  wire \wordcnt_reg[30]_i_6_n_3 ;
  wire \wordcnt_reg[30]_i_6_n_4 ;
  wire \wordcnt_reg[30]_i_6_n_5 ;
  wire \wordcnt_reg[30]_i_6_n_6 ;
  wire \wordcnt_reg[30]_i_6_n_7 ;
  wire \wordcnt_reg[8]_i_2__0_n_0 ;
  wire \wordcnt_reg[8]_i_2__0_n_1 ;
  wire \wordcnt_reg[8]_i_2__0_n_2 ;
  wire \wordcnt_reg[8]_i_2__0_n_3 ;
  wire \wordcnt_reg[8]_i_2__0_n_4 ;
  wire \wordcnt_reg[8]_i_2__0_n_5 ;
  wire \wordcnt_reg[8]_i_2__0_n_6 ;
  wire \wordcnt_reg[8]_i_2__0_n_7 ;
  wire \wordcnt_reg_n_0_[26] ;
  wire \wordcnt_reg_n_0_[27] ;
  wire \wordcnt_reg_n_0_[28] ;
  wire \wordcnt_reg_n_0_[29] ;
  wire \wordcnt_reg_n_0_[30] ;
  wire [7:3]\NLW_crcAXIS_tkeep_reg[3]_i_10_CO_UNCONNECTED ;
  wire [7:0]\NLW_crcAXIS_tkeep_reg[3]_i_10_O_UNCONNECTED ;
  wire [7:3]\NLW_crcAXIS_tkeep_reg[3]_i_11_CO_UNCONNECTED ;
  wire [7:0]\NLW_crcAXIS_tkeep_reg[3]_i_11_O_UNCONNECTED ;
  wire [7:0]\NLW_crcAXIS_tkeep_reg[3]_i_19_O_UNCONNECTED ;
  wire [7:0]\NLW_crcAXIS_tkeep_reg[3]_i_23_O_UNCONNECTED ;
  wire [7:1]\NLW_crcAXIS_tkeep_reg[3]_i_46_CO_UNCONNECTED ;
  wire [7:0]\NLW_crcAXIS_tkeep_reg[3]_i_46_O_UNCONNECTED ;
  wire [7:0]\NLW_opbuf_reg[1][7]_i_23_CO_UNCONNECTED ;
  wire [7:1]\NLW_opbuf_reg[1][7]_i_23_O_UNCONNECTED ;
  wire [7:2]\NLW_opbuf_reg[1][7]_i_42_CO_UNCONNECTED ;
  wire [7:3]\NLW_opbuf_reg[1][7]_i_42_O_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_reg[4]_i_11_O_UNCONNECTED ;
  wire [7:3]\NLW_stateOp_reg[4]_i_5_CO_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_reg[4]_i_5_O_UNCONNECTED ;
  wire [0:0]\NLW_txAXIS_tdata_reg[31]_i_12_O_UNCONNECTED ;
  wire [7:5]\NLW_wordcnt_reg[30]_i_6_CO_UNCONNECTED ;
  wire [7:6]\NLW_wordcnt_reg[30]_i_6_O_UNCONNECTED ;

  LUT2 #(
    .INIT(4'h2)) 
    \capt[4]_i_1 
       (.I0(reqInvRpuifToRotarySet),
        .I1(\capt_reg[4] ),
        .O(\mask_reg[4] ));
  LUT6 #(
    .INIT(64'h0000080000000000)) 
    \capt[4]_i_2 
       (.I0(Q[3]),
        .I1(Q[4]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(Q[2]),
        .I5(\stateOp_next[3]_i_2_n_0 ),
        .O(reqInvRpuifToRotarySet));
  LUT6 #(
    .INIT(64'hEEFFFFFFFFFFFAFF)) 
    \crcAXIS_tkeep[0]_i_2 
       (.I0(Q[4]),
        .I1(\stateOp_reg[4]_i_5_n_5 ),
        .I2(Q[2]),
        .I3(Q[3]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(\crcAXIS_tkeep[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFF7F7F7FCF3F0F3)) 
    \crcAXIS_tkeep[1]_i_2 
       (.I0(Q[0]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[1]),
        .I4(\stateOp_reg[4]_i_5_n_5 ),
        .I5(Q[2]),
        .O(\crcAXIS_tkeep[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAAD8AFDFAFFFFAF5)) 
    \crcAXIS_tkeep[3]_i_12 
       (.I0(Q[3]),
        .I1(\stateOp_reg[4]_i_5_n_5 ),
        .I2(Q[2]),
        .I3(Q[4]),
        .I4(Q[1]),
        .I5(Q[0]),
        .O(\crcAXIS_tkeep[3]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2847" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \crcAXIS_tkeep[3]_i_13 
       (.I0(\opbuf_reg[0]51_in [17]),
        .I1(\opbuf_reg[0]51_in [19]),
        .I2(\opbuf_reg[0]51_in [18]),
        .O(\crcAXIS_tkeep[3]_i_13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2846" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \crcAXIS_tkeep[3]_i_14 
       (.I0(\opbuf_reg[0]51_in [26]),
        .I1(\opbuf_reg[0]51_in [28]),
        .I2(\opbuf_reg[0]51_in [27]),
        .O(\crcAXIS_tkeep[3]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2849" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \crcAXIS_tkeep[3]_i_15 
       (.I0(\opbuf_reg[0]51_in [20]),
        .I1(\opbuf_reg[0]51_in [22]),
        .I2(\opbuf_reg[0]51_in [21]),
        .O(\crcAXIS_tkeep[3]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2848" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \crcAXIS_tkeep[3]_i_16 
       (.I0(\opbuf_reg[0]51_in [14]),
        .I1(\opbuf_reg[0]51_in [16]),
        .I2(\opbuf_reg[0]51_in [15]),
        .O(\crcAXIS_tkeep[3]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \crcAXIS_tkeep[3]_i_17 
       (.I0(\wordcnt_reg_n_0_[27] ),
        .I1(\wordcnt_reg_n_0_[29] ),
        .I2(\wordcnt_reg_n_0_[28] ),
        .I3(\opbuf_reg[0]51_in [29]),
        .I4(\crcAXIS_tkeep[3]_i_27_n_0 ),
        .I5(\crcAXIS_tkeep[3]_i_28_n_0 ),
        .O(\crcAXIS_tkeep[3]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFEFFFFFFFF)) 
    \crcAXIS_tkeep[3]_i_18 
       (.I0(\opbuf_reg[0]51_in [5]),
        .I1(\opbuf_reg[0]51_in [7]),
        .I2(\wordcnt_reg_n_0_[30] ),
        .I3(\opbuf_reg[0]51_in [6]),
        .I4(\opbuf_reg[0]51_in [8]),
        .I5(\crcAXIS_tkeep[3]_i_29_n_0 ),
        .O(\crcAXIS_tkeep[3]_i_18_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \crcAXIS_tkeep[3]_i_20 
       (.I0(\wordcnt_reg_n_0_[30] ),
        .O(\crcAXIS_tkeep[3]_i_20_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \crcAXIS_tkeep[3]_i_21 
       (.I0(\wordcnt_reg_n_0_[28] ),
        .I1(\wordcnt_reg_n_0_[29] ),
        .I2(\wordcnt_reg_n_0_[27] ),
        .O(\crcAXIS_tkeep[3]_i_21_n_0 ));
  LUT4 #(
    .INIT(16'h1001)) 
    \crcAXIS_tkeep[3]_i_22 
       (.I0(\wordcnt_reg_n_0_[26] ),
        .I1(\opbuf_reg[0]51_in [30]),
        .I2(wordcntCrcLast[24]),
        .I3(\opbuf_reg[0]51_in [29]),
        .O(\crcAXIS_tkeep[3]_i_22_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \crcAXIS_tkeep[3]_i_24 
       (.I0(\crcAXIS_tkeep_reg[3]_i_46_n_5 ),
        .I1(\wordcnt_reg_n_0_[30] ),
        .O(\crcAXIS_tkeep[3]_i_24_n_0 ));
  LUT4 #(
    .INIT(16'h2004)) 
    \crcAXIS_tkeep[3]_i_25 
       (.I0(\wordcnt_reg_n_0_[27] ),
        .I1(\crcAXIS_tkeep_reg[3]_i_46_n_5 ),
        .I2(\wordcnt_reg_n_0_[28] ),
        .I3(\wordcnt_reg_n_0_[29] ),
        .O(\crcAXIS_tkeep[3]_i_25_n_0 ));
  LUT4 #(
    .INIT(16'h0810)) 
    \crcAXIS_tkeep[3]_i_26 
       (.I0(\opbuf_reg[0]51_in [30]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\crcAXIS_tkeep_reg[3]_i_46_n_5 ),
        .I3(\opbuf_reg[0]51_in [29]),
        .O(\crcAXIS_tkeep[3]_i_26_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2861" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \crcAXIS_tkeep[3]_i_27 
       (.I0(\opbuf_reg[0]51_in [30]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .O(\crcAXIS_tkeep[3]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \crcAXIS_tkeep[3]_i_28 
       (.I0(\opbuf_reg[0]51_in [12]),
        .I1(\opbuf_reg[0]51_in [13]),
        .I2(\opbuf_reg[0]51_in [11]),
        .I3(\opbuf_reg[0]51_in [24]),
        .I4(\opbuf_reg[0]51_in [25]),
        .I5(\opbuf_reg[0]51_in [23]),
        .O(\crcAXIS_tkeep[3]_i_28_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    \crcAXIS_tkeep[3]_i_29 
       (.I0(\opbuf_reg[0]51_in [9]),
        .I1(\opbuf_reg[0]51_in [10]),
        .O(\crcAXIS_tkeep[3]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[3]_i_30 
       (.I0(wordcntCrcLast[23]),
        .I1(\opbuf_reg[0]51_in [28]),
        .I2(\opbuf_reg[0]51_in [26]),
        .I3(wordcntCrcLast[21]),
        .I4(\opbuf_reg[0]51_in [27]),
        .I5(wordcntCrcLast[22]),
        .O(\crcAXIS_tkeep[3]_i_30_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[3]_i_31 
       (.I0(wordcntCrcLast[20]),
        .I1(\opbuf_reg[0]51_in [25]),
        .I2(\opbuf_reg[0]51_in [23]),
        .I3(wordcntCrcLast[18]),
        .I4(\opbuf_reg[0]51_in [24]),
        .I5(wordcntCrcLast[19]),
        .O(\crcAXIS_tkeep[3]_i_31_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[3]_i_32 
       (.I0(wordcntCrcLast[17]),
        .I1(\opbuf_reg[0]51_in [22]),
        .I2(\opbuf_reg[0]51_in [20]),
        .I3(wordcntCrcLast[15]),
        .I4(\opbuf_reg[0]51_in [21]),
        .I5(wordcntCrcLast[16]),
        .O(\crcAXIS_tkeep[3]_i_32_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[3]_i_33 
       (.I0(wordcntCrcLast[14]),
        .I1(\opbuf_reg[0]51_in [19]),
        .I2(\opbuf_reg[0]51_in [17]),
        .I3(wordcntCrcLast[12]),
        .I4(\opbuf_reg[0]51_in [18]),
        .I5(wordcntCrcLast[13]),
        .O(\crcAXIS_tkeep[3]_i_33_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[3]_i_34 
       (.I0(wordcntCrcLast[11]),
        .I1(\opbuf_reg[0]51_in [16]),
        .I2(\opbuf_reg[0]51_in [14]),
        .I3(wordcntCrcLast[9]),
        .I4(\opbuf_reg[0]51_in [15]),
        .I5(wordcntCrcLast[10]),
        .O(\crcAXIS_tkeep[3]_i_34_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[3]_i_35 
       (.I0(wordcntCrcLast[8]),
        .I1(\opbuf_reg[0]51_in [13]),
        .I2(\opbuf_reg[0]51_in [11]),
        .I3(wordcntCrcLast[6]),
        .I4(\opbuf_reg[0]51_in [12]),
        .I5(wordcntCrcLast[7]),
        .O(\crcAXIS_tkeep[3]_i_35_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[3]_i_36 
       (.I0(wordcntCrcLast[5]),
        .I1(\opbuf_reg[0]51_in [10]),
        .I2(\opbuf_reg[0]51_in [8]),
        .I3(wordcntCrcLast[3]),
        .I4(\opbuf_reg[0]51_in [9]),
        .I5(wordcntCrcLast[4]),
        .O(\crcAXIS_tkeep[3]_i_36_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \crcAXIS_tkeep[3]_i_37 
       (.I0(wordcntCrcLast[2]),
        .I1(\opbuf_reg[0]51_in [7]),
        .I2(\opbuf_reg[0]51_in [6]),
        .I3(wordcntCrcLast[1]),
        .I4(\opbuf_reg[0]51_in [5]),
        .I5(wordcntCrcLast[0]),
        .O(\crcAXIS_tkeep[3]_i_37_n_0 ));
  LUT4 #(
    .INIT(16'h4002)) 
    \crcAXIS_tkeep[3]_i_38 
       (.I0(\crcAXIS_tkeep_reg[3]_i_46_n_5 ),
        .I1(\opbuf_reg[0]51_in [27]),
        .I2(\opbuf_reg[0]51_in [28]),
        .I3(\opbuf_reg[0]51_in [26]),
        .O(\crcAXIS_tkeep[3]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h4002)) 
    \crcAXIS_tkeep[3]_i_39 
       (.I0(\crcAXIS_tkeep_reg[3]_i_46_n_5 ),
        .I1(\opbuf_reg[0]51_in [24]),
        .I2(\opbuf_reg[0]51_in [25]),
        .I3(\opbuf_reg[0]51_in [23]),
        .O(\crcAXIS_tkeep[3]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h4002)) 
    \crcAXIS_tkeep[3]_i_40 
       (.I0(\crcAXIS_tkeep_reg[3]_i_46_n_5 ),
        .I1(\opbuf_reg[0]51_in [21]),
        .I2(\opbuf_reg[0]51_in [22]),
        .I3(\opbuf_reg[0]51_in [20]),
        .O(\crcAXIS_tkeep[3]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h4002)) 
    \crcAXIS_tkeep[3]_i_41 
       (.I0(\crcAXIS_tkeep_reg[3]_i_46_n_5 ),
        .I1(\opbuf_reg[0]51_in [18]),
        .I2(\opbuf_reg[0]51_in [19]),
        .I3(\opbuf_reg[0]51_in [17]),
        .O(\crcAXIS_tkeep[3]_i_41_n_0 ));
  LUT4 #(
    .INIT(16'h4002)) 
    \crcAXIS_tkeep[3]_i_42 
       (.I0(\crcAXIS_tkeep_reg[3]_i_46_n_5 ),
        .I1(\opbuf_reg[0]51_in [15]),
        .I2(\opbuf_reg[0]51_in [16]),
        .I3(\opbuf_reg[0]51_in [14]),
        .O(\crcAXIS_tkeep[3]_i_42_n_0 ));
  LUT4 #(
    .INIT(16'h4002)) 
    \crcAXIS_tkeep[3]_i_43 
       (.I0(\crcAXIS_tkeep_reg[3]_i_46_n_5 ),
        .I1(\opbuf_reg[0]51_in [12]),
        .I2(\opbuf_reg[0]51_in [13]),
        .I3(\opbuf_reg[0]51_in [11]),
        .O(\crcAXIS_tkeep[3]_i_43_n_0 ));
  LUT5 #(
    .INIT(32'h00900900)) 
    \crcAXIS_tkeep[3]_i_44 
       (.I0(crcAXIS_tkeep1),
        .I1(\opbuf_reg[0]51_in [8]),
        .I2(\opbuf_reg[0]51_in [9]),
        .I3(\crcAXIS_tkeep_reg[3]_i_46_n_5 ),
        .I4(\opbuf_reg[0]51_in [10]),
        .O(\crcAXIS_tkeep[3]_i_44_n_0 ));
  LUT5 #(
    .INIT(32'h10080210)) 
    \crcAXIS_tkeep[3]_i_45 
       (.I0(\opbuf_reg[0]51_in [5]),
        .I1(\opbuf_reg[0]51_in [7]),
        .I2(\wordcntLast_reg_n_0_[0] ),
        .I3(\wordcntLast_reg_n_0_[1] ),
        .I4(\opbuf_reg[0]51_in [6]),
        .O(\crcAXIS_tkeep[3]_i_45_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \crcAXIS_tkeep[3]_i_47 
       (.I0(\wordcntLast_reg_n_0_[1] ),
        .I1(\wordcntLast_reg_n_0_[0] ),
        .O(\crcAXIS_tkeep[3]_i_47_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \crcAXIS_tkeep[3]_i_48 
       (.I0(\wordcntLast_reg_n_0_[3] ),
        .O(\crcAXIS_tkeep[3]_i_48_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF7FFF)) 
    \crcAXIS_tkeep[3]_i_7 
       (.I0(\crcAXIS_tkeep[3]_i_13_n_0 ),
        .I1(\crcAXIS_tkeep[3]_i_14_n_0 ),
        .I2(\crcAXIS_tkeep[3]_i_15_n_0 ),
        .I3(\crcAXIS_tkeep[3]_i_16_n_0 ),
        .I4(\crcAXIS_tkeep[3]_i_17_n_0 ),
        .I5(\crcAXIS_tkeep[3]_i_18_n_0 ),
        .O(\crcAXIS_tkeep[3]_i_7_n_0 ));
  FDPE \crcAXIS_tkeep_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_180),
        .D(myRxtx_n_51),
        .PRE(\stateOp_reg[0]_0 ),
        .Q(AXIS_tkeep[0]));
  FDPE \crcAXIS_tkeep_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_180),
        .D(myRxtx_n_50),
        .PRE(\stateOp_reg[0]_0 ),
        .Q(AXIS_tkeep[1]));
  FDPE \crcAXIS_tkeep_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_180),
        .D(myRxtx_n_49),
        .PRE(\stateOp_reg[0]_0 ),
        .Q(AXIS_tkeep[2]));
  FDPE \crcAXIS_tkeep_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_180),
        .D(myRxtx_n_48),
        .PRE(\stateOp_reg[0]_0 ),
        .Q(AXIS_tkeep[3]));
  CARRY8 \crcAXIS_tkeep_reg[3]_i_10 
       (.CI(\crcAXIS_tkeep_reg[3]_i_19_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_crcAXIS_tkeep_reg[3]_i_10_CO_UNCONNECTED [7:3],\crcAXIS_tkeep_reg[3]_i_10_n_5 ,\crcAXIS_tkeep_reg[3]_i_10_n_6 ,\crcAXIS_tkeep_reg[3]_i_10_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_crcAXIS_tkeep_reg[3]_i_10_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,\crcAXIS_tkeep[3]_i_20_n_0 ,\crcAXIS_tkeep[3]_i_21_n_0 ,\crcAXIS_tkeep[3]_i_22_n_0 }));
  CARRY8 \crcAXIS_tkeep_reg[3]_i_11 
       (.CI(\crcAXIS_tkeep_reg[3]_i_23_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_crcAXIS_tkeep_reg[3]_i_11_CO_UNCONNECTED [7:3],\crcAXIS_tkeep_reg[3]_i_11_n_5 ,\crcAXIS_tkeep_reg[3]_i_11_n_6 ,\crcAXIS_tkeep_reg[3]_i_11_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_crcAXIS_tkeep_reg[3]_i_11_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,\crcAXIS_tkeep[3]_i_24_n_0 ,\crcAXIS_tkeep[3]_i_25_n_0 ,\crcAXIS_tkeep[3]_i_26_n_0 }));
  CARRY8 \crcAXIS_tkeep_reg[3]_i_19 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\crcAXIS_tkeep_reg[3]_i_19_n_0 ,\crcAXIS_tkeep_reg[3]_i_19_n_1 ,\crcAXIS_tkeep_reg[3]_i_19_n_2 ,\crcAXIS_tkeep_reg[3]_i_19_n_3 ,\crcAXIS_tkeep_reg[3]_i_19_n_4 ,\crcAXIS_tkeep_reg[3]_i_19_n_5 ,\crcAXIS_tkeep_reg[3]_i_19_n_6 ,\crcAXIS_tkeep_reg[3]_i_19_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_crcAXIS_tkeep_reg[3]_i_19_O_UNCONNECTED [7:0]),
        .S({\crcAXIS_tkeep[3]_i_30_n_0 ,\crcAXIS_tkeep[3]_i_31_n_0 ,\crcAXIS_tkeep[3]_i_32_n_0 ,\crcAXIS_tkeep[3]_i_33_n_0 ,\crcAXIS_tkeep[3]_i_34_n_0 ,\crcAXIS_tkeep[3]_i_35_n_0 ,\crcAXIS_tkeep[3]_i_36_n_0 ,\crcAXIS_tkeep[3]_i_37_n_0 }));
  CARRY8 \crcAXIS_tkeep_reg[3]_i_23 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\crcAXIS_tkeep_reg[3]_i_23_n_0 ,\crcAXIS_tkeep_reg[3]_i_23_n_1 ,\crcAXIS_tkeep_reg[3]_i_23_n_2 ,\crcAXIS_tkeep_reg[3]_i_23_n_3 ,\crcAXIS_tkeep_reg[3]_i_23_n_4 ,\crcAXIS_tkeep_reg[3]_i_23_n_5 ,\crcAXIS_tkeep_reg[3]_i_23_n_6 ,\crcAXIS_tkeep_reg[3]_i_23_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_crcAXIS_tkeep_reg[3]_i_23_O_UNCONNECTED [7:0]),
        .S({\crcAXIS_tkeep[3]_i_38_n_0 ,\crcAXIS_tkeep[3]_i_39_n_0 ,\crcAXIS_tkeep[3]_i_40_n_0 ,\crcAXIS_tkeep[3]_i_41_n_0 ,\crcAXIS_tkeep[3]_i_42_n_0 ,\crcAXIS_tkeep[3]_i_43_n_0 ,\crcAXIS_tkeep[3]_i_44_n_0 ,\crcAXIS_tkeep[3]_i_45_n_0 }));
  CARRY8 \crcAXIS_tkeep_reg[3]_i_46 
       (.CI(\crcAXIS_tkeep[3]_i_47_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_crcAXIS_tkeep_reg[3]_i_46_CO_UNCONNECTED [7:3],\crcAXIS_tkeep_reg[3]_i_46_n_5 ,\NLW_crcAXIS_tkeep_reg[3]_i_46_CO_UNCONNECTED [1],\crcAXIS_tkeep_reg[3]_i_46_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\wordcntLast_reg_n_0_[3] ,1'b0}),
        .O({\NLW_crcAXIS_tkeep_reg[3]_i_46_O_UNCONNECTED [7:2],crcAXIS_tkeep1,\NLW_crcAXIS_tkeep_reg[3]_i_46_O_UNCONNECTED [0]}),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\crcAXIS_tkeep[3]_i_48_n_0 ,1'b1}));
  (* SOFT_HLUTNM = "soft_lutpair2827" *) 
  LUT5 #(
    .INIT(32'h00400000)) 
    crcAXIS_tlast_sig_i_10__0
       (.I0(Q[1]),
        .I1(Q[2]),
        .I2(Q[0]),
        .I3(Q[3]),
        .I4(Q[4]),
        .O(crcAXIS_tlast_sig_i_10__0_n_0));
  LUT6 #(
    .INIT(64'hFEFFFEEFFFFFFFEF)) 
    crcAXIS_tlast_sig_i_3__0
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[3]),
        .I3(Q[4]),
        .I4(\crcAXIS_tkeep[3]_i_7_n_0 ),
        .I5(\crcAXIS_tkeep_reg[3]_i_10_n_5 ),
        .O(crcAXIS_tlast_sig_i_3__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2829" *) 
  LUT5 #(
    .INIT(32'hFFFBB6FD)) 
    crcAXIS_tlast_sig_i_6__0
       (.I0(Q[3]),
        .I1(Q[2]),
        .I2(Q[4]),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(crcAXIS_tlast_sig_i_6__0_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2836" *) 
  LUT5 #(
    .INIT(32'hFEDFFFEB)) 
    crcAXIS_tlast_sig_i_7__0
       (.I0(Q[3]),
        .I1(Q[4]),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[2]),
        .O(crcAXIS_tlast_sig_i_7__0_n_0));
  FDPE crcAXIS_tlast_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(myRxtx_n_130),
        .PRE(\stateOp_reg[0]_0 ),
        .Q(crcAXIS_tlast_sig_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2831" *) 
  LUT5 #(
    .INIT(32'h00000004)) 
    \ixRetbufCrc[2]_i_2 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\stateOp[4]_i_17_n_0 ),
        .I4(\retbuf[2][7]_i_5__0_n_0 ),
        .O(\ixRetbufCrc[2]_i_2_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \ixRetbufCrc[5]_i_3__0 
       (.I0(\stateOp[4]_i_17_n_0 ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\retbuf[2][7]_i_4_n_0 ),
        .O(lenRet1));
  FDCE #(
    .INIT(1'b0)) 
    \ixRetbufCrc_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_47),
        .Q(ixRetbufCrc[1]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRetbufCrc_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_46),
        .Q(ixRetbufCrc[2]));
  FDCE #(
    .INIT(1'b0)) 
    \ixRetbufCrc_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_45),
        .Q(ixRetbufCrc[5]));
  FDPE \lastAXIS_tkeep_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_344),
        .D(myRxtx_n_187),
        .PRE(\stateOp_reg[0]_0 ),
        .Q(lastAXIS_tkeep__0[2]));
  FDPE \lastAXIS_tkeep_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_344),
        .D(myRxtx_n_186),
        .PRE(\stateOp_reg[0]_0 ),
        .Q(lastAXIS_tkeep__0[3]));
  FDCE \len_reg[0] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_291),
        .Q(\len_reg_n_0_[0] ));
  FDCE \len_reg[10] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_281),
        .Q(\len_reg_n_0_[10] ));
  FDCE \len_reg[11] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_280),
        .Q(\len_reg_n_0_[11] ));
  FDCE \len_reg[12] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_279),
        .Q(\len_reg_n_0_[12] ));
  FDCE \len_reg[13] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_278),
        .Q(\len_reg_n_0_[13] ));
  FDCE \len_reg[14] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_277),
        .Q(\len_reg_n_0_[14] ));
  FDCE \len_reg[15] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_276),
        .Q(\len_reg_n_0_[15] ));
  FDCE \len_reg[1] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_290),
        .Q(\len_reg_n_0_[1] ));
  FDCE \len_reg[2] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_289),
        .Q(\len_reg_n_0_[2] ));
  FDCE \len_reg[3] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_288),
        .Q(\len_reg_n_0_[3] ));
  FDCE \len_reg[4] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_287),
        .Q(\len_reg_n_0_[4] ));
  FDCE \len_reg[5] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_286),
        .Q(\len_reg_n_0_[5] ));
  FDCE \len_reg[6] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_285),
        .Q(\len_reg_n_0_[6] ));
  FDCE \len_reg[7] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_284),
        .Q(\len_reg_n_0_[7] ));
  FDCE \len_reg[8] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_283),
        .Q(\len_reg_n_0_[8] ));
  FDCE \len_reg[9] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_282),
        .Q(\len_reg_n_0_[9] ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Crc8005_32 myCrc
       (.AXIS_tdata({AXIS_tdata[30:29],AXIS_tdata[23:21],AXIS_tdata[15:13],AXIS_tdata[6],AXIS_tdata[3],AXIS_tdata[1:0]}),
        .AXIS_tlast(AXIS_tlast),
        .AXIS_tvalid(AXIS_tvalid),
        .D({myCrc_n_3,myCrc_n_4,myCrc_n_5,myCrc_n_6,myCrc_n_7,myCrc_n_8,myCrc_n_9,myCrc_n_10}),
        .E(myCrc_n_1),
        .Q(Q),
        .aclk_sig(aclk_sig),
        .\crcAXIS_tkeep_reg[1] (myCrc_n_43),
        .\crcAXIS_tkeep_reg[2] (myCrc_n_32),
        .\crcAXIS_tkeep_reg[2]_0 (myCrc_n_37),
        .crc_imd013_out(crc_imd013_out),
        .crc_imd015_out(crc_imd015_out),
        .crc_imd017_out(crc_imd017_out),
        .crc_imd019_out(crc_imd019_out),
        .crc_imd020_out(crc_imd020_out),
        .crc_imd032_out(crc_imd032_out),
        .crc_imd033_out(crc_imd033_out),
        .crc_imd059_out(crc_imd059_out),
        .crc_imd060_out(crc_imd060_out),
        .\crc_imd[15]_i_9__0 ({\txAXIS_tdata_reg_n_0_[15] ,\txAXIS_tdata_reg_n_0_[14] ,\txAXIS_tdata_reg_n_0_[11] ,\txAXIS_tdata_reg_n_0_[10] ,\txAXIS_tdata_reg_n_0_[8] ,\txAXIS_tdata_reg_n_0_[5] ,\txAXIS_tdata_reg_n_0_[4] ,\txAXIS_tdata_reg_n_0_[3] ,\txAXIS_tdata_reg_n_0_[0] }),
        .\crc_imd[15]_i_9__0_0 ({rxAXIS_tdata[15:14],rxAXIS_tdata[11:10],rxAXIS_tdata[8],rxAXIS_tdata[5:3],rxAXIS_tdata[0]}),
        .\crc_imd[1]_i_2__0_0 (myRxtx_n_162),
        .\crc_imd[1]_i_2__0_1 (myRxtx_n_161),
        .\crc_imd_reg[0]_0 (myCrc_n_55),
        .\crc_imd_reg[0]_1 (myCrc_n_115),
        .\crc_imd_reg[0]_10 (myRxtx_n_170),
        .\crc_imd_reg[0]_11 (myRxtx_n_173),
        .\crc_imd_reg[0]_2 (myCrc_n_144),
        .\crc_imd_reg[0]_3 (myCrc_n_157),
        .\crc_imd_reg[0]_4 (myRxtx_n_138),
        .\crc_imd_reg[0]_5 (myRxtx_n_142),
        .\crc_imd_reg[0]_6 (myRxtx_n_141),
        .\crc_imd_reg[0]_7 (AXIS_tkeep),
        .\crc_imd_reg[0]_8 (crcAXIS_tlast_sig_reg_n_0),
        .\crc_imd_reg[0]_9 (myRxtx_n_143),
        .\crc_imd_reg[10]_0 (myRxtx_n_165),
        .\crc_imd_reg[11]_0 (myCrc_n_140),
        .\crc_imd_reg[11]_1 (myRxtx_n_171),
        .\crc_imd_reg[12]_0 (myCrc_n_42),
        .\crc_imd_reg[12]_1 (myCrc_n_168),
        .\crc_imd_reg[13]_0 (myCrc_n_48),
        .\crc_imd_reg[13]_1 (myCrc_n_139),
        .\crc_imd_reg[13]_2 (myCrc_n_160),
        .\crc_imd_reg[13]_3 (myRxtx_n_166),
        .\crc_imd_reg[14]_0 (myCrc_n_49),
        .\crc_imd_reg[14]_1 ({myCrc_n_132,myCrc_n_133}),
        .\crc_imd_reg[14]_2 (myCrc_n_170),
        .\crc_imd_reg[14]_3 (myRxtx_n_167),
        .\crc_imd_reg[15]_0 ({myCrc_n_11,myCrc_n_12,myCrc_n_13,myCrc_n_14,myCrc_n_15,myCrc_n_16,myCrc_n_17,myCrc_n_18,myCrc_n_19,myCrc_n_20,myCrc_n_21,myCrc_n_22,myCrc_n_23,myCrc_n_24,myCrc_n_25,myCrc_n_26}),
        .\crc_imd_reg[15]_1 ({myCrc_n_83,myCrc_n_84,myCrc_n_85,myCrc_n_86,myCrc_n_87,myCrc_n_88,myCrc_n_89,myCrc_n_90}),
        .\crc_imd_reg[15]_10 (myRxtx_n_158),
        .\crc_imd_reg[15]_11 (myRxtx_n_144),
        .\crc_imd_reg[15]_2 ({myCrc_n_91,myCrc_n_92,myCrc_n_93,myCrc_n_94,myCrc_n_95,myCrc_n_96,myCrc_n_97,myCrc_n_98}),
        .\crc_imd_reg[15]_3 ({myCrc_n_99,myCrc_n_100,myCrc_n_101,myCrc_n_102,myCrc_n_103,myCrc_n_104,myCrc_n_105,myCrc_n_106}),
        .\crc_imd_reg[15]_4 ({myCrc_n_107,myCrc_n_108,myCrc_n_109,myCrc_n_110,myCrc_n_111,myCrc_n_112,myCrc_n_113,myCrc_n_114}),
        .\crc_imd_reg[15]_5 ({myCrc_n_116,myCrc_n_117,myCrc_n_118,myCrc_n_119,myCrc_n_120,myCrc_n_121,myCrc_n_122,myCrc_n_123}),
        .\crc_imd_reg[15]_6 (myCrc_n_138),
        .\crc_imd_reg[15]_7 (myCrc_n_159),
        .\crc_imd_reg[15]_8 (myRxtx_n_168),
        .\crc_imd_reg[15]_9 (myRxtx_n_172),
        .\crc_imd_reg[1]_0 (myCrc_n_124),
        .\crc_imd_reg[1]_1 (myCrc_n_158),
        .\crc_imd_reg[1]_2 (myRxtx_n_145),
        .\crc_imd_reg[1]_3 (myRxtx_n_174),
        .\crc_imd_reg[1]_4 (myRxtx_n_169),
        .\crc_imd_reg[2]_0 (myCrc_n_47),
        .\crc_imd_reg[2]_1 ({myCrc_n_81,myCrc_n_82}),
        .\crc_imd_reg[2]_2 (myCrc_n_125),
        .\crc_imd_reg[2]_3 (myCrc_n_145),
        .\crc_imd_reg[3]_0 (myCrc_n_27),
        .\crc_imd_reg[3]_1 (myCrc_n_46),
        .\crc_imd_reg[3]_2 (myCrc_n_131),
        .\crc_imd_reg[3]_3 (myCrc_n_135),
        .\crc_imd_reg[4]_0 (myCrc_n_146),
        .\crc_imd_reg[4]_1 (myCrc_n_150),
        .\crc_imd_reg[4]_2 (myCrc_n_172),
        .\crc_imd_reg[5]_0 (myCrc_n_147),
        .\crc_imd_reg[5]_1 (myCrc_n_149),
        .\crc_imd_reg[5]_2 (myCrc_n_151),
        .\crc_imd_reg[6]_0 (myCrc_n_35),
        .\crc_imd_reg[6]_1 ({myCrc_n_126,myCrc_n_127,myCrc_n_128,myCrc_n_129,myCrc_n_130}),
        .\crc_imd_reg[6]_2 (myCrc_n_148),
        .\crc_imd_reg[6]_3 (myCrc_n_152),
        .\crc_imd_reg[6]_4 (myCrc_n_173),
        .\crc_imd_reg[7]_0 (myCrc_n_44),
        .\crc_imd_reg[7]_1 (myCrc_n_167),
        .\crc_imd_reg[7]_2 (myRxtx_n_164),
        .\crc_imd_reg[8]_0 (myCrc_n_51),
        .\crc_imd_reg[8]_1 (myRxtx_n_175),
        .\crc_imd_reg[8]_2 (myRxtx_n_163),
        .\crc_imd_reg[9]_0 (myCrc_n_53),
        .\crc_imd_reg[9]_1 (myCrc_n_141),
        .\crc_imd_reg[9]_2 (myCrc_n_162),
        .\crc_imd_reg[9]_3 ({myRxtx_n_132,myRxtx_n_133,myRxtx_n_134,myRxtx_n_135,myRxtx_n_136,myRxtx_n_137}),
        .first_reg_0(\stateOp_reg[0]_0 ),
        .p_10_out(p_10_out),
        .p_24_in(p_24_in),
        .\recvAXIS_tdata_sig_reg[13] (myCrc_n_36),
        .recvAXIS_tlast(recvAXIS_tlast),
        .\resid_reg[1] (myCrc_n_28),
        .\resid_reg[1]_0 (myCrc_n_29),
        .\resid_reg[1]_1 (myCrc_n_30),
        .\resid_reg[1]_2 (myCrc_n_161),
        .\retbuf_reg[0][0] (\retbuf[0][6]_i_2_n_0 ),
        .\retbuf_reg[0][0]_0 (myRxtx_n_214),
        .\retbuf_reg[0][0]_1 (myRxtx_n_44),
        .\retbuf_reg[0][1] (\retbuf_reg[0][1]_0 ),
        .\retbuf_reg[0][3] (\retbuf[0][4]_i_2_n_0 ),
        .\retbuf_reg[0][6] (\retbuf[0][6]_i_3_n_0 ),
        .\retbuf_reg[1][0] ({ixRetbufCrc[5],ixRetbufCrc[2:1]}),
        .\retbuf_reg[2][7] (\retbuf_reg[1][7]_0 [23:8]),
        .\retbuf_reg[31][0] ({\resid_reg_n_0_[1] ,\resid_reg_n_0_[0] }),
        .\retbuf_reg[33][0] (\retbuf[0][7]_i_4__0_n_0 ),
        .\retbuf_reg[33][0]_0 (\retbuf[33][7]_i_3__0_n_0 ),
        .\retbuf_reg[36][0] (\retbuf[36][7]_i_3__0_n_0 ),
        .\retbuf_reg[37][0] (\retbuf[37][7]_i_3__0_n_0 ),
        .\retbuf_reg[6][7] (\retbuf_reg[6][7]_0 ),
        .\retbuf_reg[8][0] (\retbuf[8][7]_i_3_n_0 ),
        .\retbuf_reg[8][5] (\retbuf[8][5]_i_2__0_n_0 ),
        .rxAXIS_tvalid(rxAXIS_tvalid),
        .\scoreMax_reg[7] ({myCrc_n_73,myCrc_n_74,myCrc_n_75,myCrc_n_76,myCrc_n_77,myCrc_n_78,myCrc_n_79,myCrc_n_80}),
        .\stateOp_next_reg[0] (myCrc_n_137),
        .\stateOp_next_reg[2] (myCrc_n_134),
        .\stateOp_reg[1] (myCrc_n_136),
        .\stateOp_reg[1]_0 (myCrc_n_163),
        .\stateOp_reg[1]_1 (myCrc_n_164),
        .\stateOp_reg[1]_2 (myCrc_n_165),
        .\stateOp_reg[1]_3 (myCrc_n_166),
        .\stateOp_reg[1]_4 (myCrc_n_169),
        .\stateOp_reg[1]_5 (myCrc_n_171),
        .\stateOp_reg[2] (myCrc_n_50),
        .\stateOp_reg[2]_0 ({stateOp_next[2],stateOp_next[0]}),
        .\stateOp_reg[3] (myCrc_n_2),
        .\stateOp_reg[3]_0 (tixVCommand),
        .\stateOp_reg[3]_1 (myCrc_n_45),
        .\stateOp_reg[3]_2 (myCrc_n_153),
        .\stateOp_reg[3]_3 (myCrc_n_154),
        .\stateOp_reg[3]_4 (myCrc_n_155),
        .\stateOp_reg[3]_5 (myCrc_n_156),
        .\stateOp_reg[4] (myCrc_n_142),
        .\stateOp_reg[4]_0 (myCrc_n_143),
        .\stateOp_reg[4]_1 (\stateOp[3]_i_6__0_n_0 ),
        .\stateOp_reg[4]_2 (\stateOp[1]_i_4__4_n_0 ),
        .stateOp_reg_0(myCrc_n_0),
        .stateOp_reg_1(myCrc_n_34),
        .stateOp_reg_2(myCrc_n_41),
        .stateOp_reg_3(myRxtx_n_177),
        .\tixVCommand_reg[0] (\tixVController[7]_i_4__0_n_0 ),
        .\tixVCommand_reg[0]_0 (\opbuf_reg_n_0_[2][0] ),
        .\tkst_reg[15] ({myCrc_n_65,myCrc_n_66,myCrc_n_67,myCrc_n_68,myCrc_n_69,myCrc_n_70,myCrc_n_71,myCrc_n_72}),
        .\tkst_reg[23] ({myCrc_n_57,myCrc_n_58,myCrc_n_59,myCrc_n_60,myCrc_n_61,myCrc_n_62,myCrc_n_63,myCrc_n_64}),
        .\txAXIS_tdata_reg[10] (\txAXIS_tdata[31]_i_9__0_n_0 ),
        .\txAXIS_tdata_reg[10]_0 (\pollbuf_reg[1]_50 [2]),
        .\txAXIS_tdata_reg[10]_1 (\pollbuf_reg[5]_53 [2]),
        .\txAXIS_tdata_reg[16] (\txAXIS_tdata[16]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[16]_0 (\txAXIS_tdata[23]_i_5__0_n_0 ),
        .\txAXIS_tdata_reg[18] (\txAXIS_tdata[18]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[26] (\pollbuf_reg[3]_51 [2]),
        .\txAXIS_tdata_reg[6] ({\pollbuf_reg[4]_52 [6],\pollbuf_reg[4]_52 [4],\pollbuf_reg[4]_52 [2],\pollbuf_reg[4]_52 [0]}),
        .\txAXIS_tdata_reg[6]_0 ({\pollbuf_reg[0]_49 [6],\pollbuf_reg[0]_49 [4],\pollbuf_reg[0]_49 [2],\pollbuf_reg[0]_49 [0]}),
        .\txAXIS_tdata_reg[8] (myCrc_n_54),
        .\txlen_reg[3] (myRxtx_n_8));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Axislave_v1_0__parameterized1 myRxtx
       (.AXIL_arready(AXIL_arready),
        .AXIL_awready_sig_reg_0(AXIL_awready_sig_reg),
        .AXIL_bvalid_sig_reg_0(AXIL_bvalid_sig_reg),
        .AXIL_wready_sig_reg_0(AXIL_wready_sig_reg),
        .AXIS_tlast(AXIS_tlast),
        .AXIS_tvalid(AXIS_tvalid),
        .CO(\stateOp_reg[4]_i_5_n_5 ),
        .D({myRxtx_n_0,myRxtx_n_1,myRxtx_n_2,myRxtx_n_3,myRxtx_n_4,myRxtx_n_5,myRxtx_n_6,myRxtx_n_7}),
        .E(myRxtx_n_34),
        .Q(Q),
        .aclk_sig(aclk_sig),
        .\crcAXIS_tkeep_reg[0] (\crcAXIS_tkeep[0]_i_2_n_0 ),
        .\crcAXIS_tkeep_reg[0]_0 (\crcAXIS_tkeep[3]_i_7_n_0 ),
        .\crcAXIS_tkeep_reg[0]_1 (\crcAXIS_tkeep_reg[3]_i_11_n_5 ),
        .\crcAXIS_tkeep_reg[1] (\crcAXIS_tkeep[1]_i_2_n_0 ),
        .\crcAXIS_tkeep_reg[3] (lastAXIS_tkeep__0),
        .\crcAXIS_tkeep_reg[3]_0 (\crcAXIS_tkeep[3]_i_12_n_0 ),
        .crcAXIS_tlast_sig_i_4__0_0(stateOp_next),
        .crcAXIS_tlast_sig_i_9__0_0({\tixVBuffer_reg_n_0_[3] ,\tixVBuffer_reg_n_0_[2] ,\tixVBuffer_reg_n_0_[1] ,\tixVBuffer_reg_n_0_[0] }),
        .crcAXIS_tlast_sig_i_9__0_1(\stateOp[2]_i_6__0_n_0 ),
        .crcAXIS_tlast_sig_reg(myRxtx_n_177),
        .crcAXIS_tlast_sig_reg_0(\wordcnt[30]_i_7__0_n_0 ),
        .crcAXIS_tlast_sig_reg_1(crcAXIS_tlast_sig_i_3__0_n_0),
        .crcAXIS_tlast_sig_reg_2(crcAXIS_tlast_sig_reg_n_0),
        .crcAXIS_tlast_sig_reg_3(crcAXIS_tlast_sig_i_6__0_n_0),
        .crcAXIS_tlast_sig_reg_4(\crcAXIS_tkeep_reg[3]_i_10_n_5 ),
        .crcAXIS_tlast_sig_reg_5(crcAXIS_tlast_sig_i_7__0_n_0),
        .crcAXIS_tlast_sig_reg_6(crcAXIS_tlast_sig_i_10__0_n_0),
        .crc_imd013_out(crc_imd013_out),
        .crc_imd015_out(crc_imd015_out),
        .crc_imd017_out(crc_imd017_out),
        .crc_imd019_out(crc_imd019_out),
        .crc_imd020_out(crc_imd020_out),
        .crc_imd032_out(crc_imd032_out),
        .crc_imd033_out(crc_imd033_out),
        .crc_imd059_out(crc_imd059_out),
        .crc_imd060_out(crc_imd060_out),
        .\crc_imd[2]_i_3__0_0 (myCrc_n_48),
        .\crc_imd[6]_i_3__0_0 (myCrc_n_42),
        .\crc_imd_reg[0] (myCrc_n_41),
        .\crc_imd_reg[0]_0 (myCrc_n_36),
        .\crc_imd_reg[10] (AXIS_tkeep[3:2]),
        .\crc_imd_reg[11] (myCrc_n_50),
        .\crc_imd_reg[13] (myCrc_n_46),
        .\crc_imd_reg[14] (myRxtx_n_158),
        .\crc_imd_reg[15] ({myRxtx_n_26,myRxtx_n_27,myRxtx_n_28,myRxtx_n_29,myRxtx_n_30,myRxtx_n_31,myRxtx_n_32,myRxtx_n_33}),
        .\crc_imd_reg[15]_0 (myCrc_n_51),
        .\crc_imd_reg[15]_1 (myCrc_n_53),
        .\crc_imd_reg[1] ({myRxtx_n_132,myRxtx_n_133,myRxtx_n_134,myRxtx_n_135,myRxtx_n_136,myRxtx_n_137}),
        .\crc_imd_reg[2] (myCrc_n_37),
        .\crc_imd_reg[2]_0 (myCrc_n_32),
        .\crc_imd_reg[2]_1 (myCrc_n_0),
        .\crc_imd_reg[2]_2 (myCrc_n_55),
        .\crc_imd_reg[2]_3 (myCrc_n_34),
        .\crc_imd_reg[4] (myCrc_n_54),
        .\crc_imd_reg[6] (myCrc_n_47),
        .\crc_imd_reg[7] ({myRxtx_n_18,myRxtx_n_19,myRxtx_n_20,myRxtx_n_21,myRxtx_n_22,myRxtx_n_23,myRxtx_n_24,myRxtx_n_25}),
        .\crc_imd_reg[8] (myCrc_n_35),
        .\crc_imd_reg[8]_0 (myCrc_n_49),
        .\crc_imd_reg[9] (myCrc_n_43),
        .\crc_imd_reg[9]_0 (myCrc_n_44),
        .\ixRetbufCrc_reg[1] (myRxtx_n_221),
        .\ixRetbufCrc_reg[2] (myRxtx_n_222),
        .\ixRetbufCrc_reg[2]_0 (myRxtx_n_223),
        .\ixRetbufCrc_reg[2]_1 (myRxtx_n_224),
        .\ixRetbufCrc_reg[2]_2 (myRxtx_n_225),
        .\ixRetbufCrc_reg[2]_3 (myRxtx_n_227),
        .\ixRetbufCrc_reg[5] (myRxtx_n_219),
        .\ixRetbufCrc_reg[5]_0 (myRxtx_n_267),
        .\ixRetbufCrc_reg[5]_1 (myRxtx_n_326),
        .\lastAXIS_tkeep_reg[3] (\ixRetbufCrc[2]_i_2_n_0 ),
        .\lastAXIS_tkeep_reg[3]_0 (\stateOp_next[3]_i_2_n_0 ),
        .\lastAXIS_tkeep_reg[3]_1 (\resid[0]_i_2__0_n_0 ),
        .lenRet1(lenRet1),
        .\len_reg[15] (\opbuf_reg[5]_47 ),
        .\len_reg[7] (\opbuf_reg[6]_46 ),
        .\opbuf_reg[0][7] ({myRxtx_n_268,myRxtx_n_269,myRxtx_n_270,myRxtx_n_271,myRxtx_n_272,myRxtx_n_273,myRxtx_n_274,myRxtx_n_275}),
        .\opbuf_reg[1][0] (\opbuf[1][7]_i_3_n_0 ),
        .\opbuf_reg[1][0]_0 (\opbuf[1][7]_i_4_n_0 ),
        .\opbuf_reg[1][7] ({myRxtx_n_316,myRxtx_n_317,myRxtx_n_318,myRxtx_n_319,myRxtx_n_320,myRxtx_n_321,myRxtx_n_322,myRxtx_n_323}),
        .\opbuf_reg[2][7] ({myRxtx_n_328,myRxtx_n_329,myRxtx_n_330,myRxtx_n_331,myRxtx_n_332,myRxtx_n_333,myRxtx_n_334,myRxtx_n_335}),
        .\opbuf_reg[5][7] ({myRxtx_n_276,myRxtx_n_277,myRxtx_n_278,myRxtx_n_279,myRxtx_n_280,myRxtx_n_281,myRxtx_n_282,myRxtx_n_283,myRxtx_n_284,myRxtx_n_285,myRxtx_n_286,myRxtx_n_287,myRxtx_n_288,myRxtx_n_289,myRxtx_n_290,myRxtx_n_291}),
        .\opbuf_reg[6][0] (\opbuf[6][7]_i_3_n_0 ),
        .\opbuf_reg[6][0]_0 (\opbuf[6][7]_i_4_n_0 ),
        .out({myRxtx_n_351,myRxtx_n_352,myRxtx_n_353,myRxtx_n_354,myRxtx_n_355,myRxtx_n_356,myRxtx_n_357,myRxtx_n_358,myRxtx_n_359,myRxtx_n_360,myRxtx_n_361,myRxtx_n_362,myRxtx_n_363,myRxtx_n_364,myRxtx_n_365,myRxtx_n_366,myRxtx_n_367,myRxtx_n_368,myRxtx_n_369,myRxtx_n_370,myRxtx_n_371,myRxtx_n_372,myRxtx_n_373,myRxtx_n_374,myRxtx_n_375}),
        .p_10_out(p_10_out),
        .p_24_in(p_24_in),
        .\pollbuf_reg[0][7] ({\tixVController_reg_n_0_[7] ,\tixVController_reg_n_0_[6] ,\tixVController_reg_n_0_[5] ,\tixVController_reg_n_0_[4] ,\tixVController_reg_n_0_[3] ,\tixVController_reg_n_0_[2] ,\tixVController_reg_n_0_[1] ,\tixVController_reg_n_0_[0] }),
        .\pollbuf_reg[1][7] ({\tixVCommand_reg_n_0_[7] ,\tixVCommand_reg_n_0_[6] ,\tixVCommand_reg_n_0_[5] ,\tixVCommand_reg_n_0_[4] ,\tixVCommand_reg_n_0_[3] ,\tixVCommand_reg_n_0_[2] ,\tixVCommand_reg_n_0_[1] ,\tixVCommand_reg_n_0_[0] }),
        .\pollbuf_reg[4][7] ({myCrc_n_11,myCrc_n_12,myCrc_n_13,myCrc_n_14,myCrc_n_15,myCrc_n_16,myCrc_n_17,myCrc_n_18,myCrc_n_19,myCrc_n_20,myCrc_n_21,myCrc_n_22,myCrc_n_23,myCrc_n_24,myCrc_n_25,myCrc_n_26}),
        .recvAXIS_tdata({rxAXIS_tdata[15:14],rxAXIS_tdata[11:10],rxAXIS_tdata[8],rxAXIS_tdata[5:3],rxAXIS_tdata[0]}),
        .\recvAXIS_tdata_sig_reg[12]_0 (myRxtx_n_162),
        .\recvAXIS_tdata_sig_reg[13]_0 (myRxtx_n_164),
        .\recvAXIS_tdata_sig_reg[13]_1 (myRxtx_n_172),
        .\recvAXIS_tdata_sig_reg[15]_0 ({myRxtx_n_292,myRxtx_n_293,myRxtx_n_294,myRxtx_n_295,myRxtx_n_296,myRxtx_n_297,myRxtx_n_298,myRxtx_n_299}),
        .\recvAXIS_tdata_sig_reg[15]_1 (\opbuf[1]_56 ),
        .\recvAXIS_tdata_sig_reg[21]_0 (myRxtx_n_143),
        .\recvAXIS_tdata_sig_reg[21]_1 (myRxtx_n_174),
        .\recvAXIS_tdata_sig_reg[23]_0 (myRxtx_n_170),
        .\recvAXIS_tdata_sig_reg[23]_1 ({myRxtx_n_300,myRxtx_n_301,myRxtx_n_302,myRxtx_n_303,myRxtx_n_304,myRxtx_n_305,myRxtx_n_306,myRxtx_n_307}),
        .\recvAXIS_tdata_sig_reg[23]_2 ({myRxtx_n_308,myRxtx_n_309,myRxtx_n_310,myRxtx_n_311,myRxtx_n_312,myRxtx_n_313,myRxtx_n_314,myRxtx_n_315}),
        .\recvAXIS_tdata_sig_reg[2]_0 (myRxtx_n_171),
        .\recvAXIS_tdata_sig_reg[5]_0 (myRxtx_n_168),
        .\recvAXIS_tdata_sig_reg[7]_0 (myRxtx_n_141),
        .recvAXIS_tlast(recvAXIS_tlast),
        .recvAXIS_tlast_sig_reg_0(myRxtx_n_138),
        .recvAXIS_tlast_sig_reg_i_3__0_0({\txlen_reg_n_0_[3] ,\txlen_reg_n_0_[1] ,\txlen_reg_n_0_[0] }),
        .\resid_reg[0] (myRxtx_n_43),
        .\resid_reg[0]_0 ({myRxtx_n_215,myRxtx_n_216,myRxtx_n_217,myRxtx_n_218}),
        .\resid_reg[0]_1 (myRxtx_n_220),
        .\resid_reg[0]_2 (myRxtx_n_226),
        .\resid_reg[0]_3 (myRxtx_n_228),
        .\retbuf_reg[14][4] (\retbuf[2][7]_i_3__0_n_0 ),
        .\retbuf_reg[14][4]_0 (\retbuf[2][7]_i_4_n_0 ),
        .\retbuf_reg[1][0] (myCrc_n_144),
        .\retbuf_reg[1][2] (myCrc_n_145),
        .\retbuf_reg[1][4] (myCrc_n_146),
        .\retbuf_reg[1][5] (myCrc_n_147),
        .\retbuf_reg[1][6] (myCrc_n_148),
        .\retbuf_reg[1][7] ({\retbuf_reg[1][7]_0 [31:24],\retbuf_reg[1][7]_0 [7:0]}),
        .\retbuf_reg[1][7]_0 (\retbuf[1][7]_i_3__0_n_0 ),
        .\retbuf_reg[2][7] (\retbuf[2][7]_i_5__0_n_0 ),
        .\retbuf_reg[36][7] ({ixRetbufCrc[5],ixRetbufCrc[2:1]}),
        .\retbuf_reg[36][7]_0 (\retbuf[0][7]_i_3__0_n_0 ),
        .\retbuf_reg[39][0] (\retbuf[39][7]_i_2__0_n_0 ),
        .\retbuf_reg[4][4] (myCrc_n_150),
        .\retbuf_reg[4][5] (myCrc_n_151),
        .\retbuf_reg[4][6] (myCrc_n_152),
        .\retbuf_reg[4][7] (\retbuf[4][7]_i_3__0_n_0 ),
        .\retbuf_reg[5][5] (\retbuf[0][6]_i_3_n_0 ),
        .\retbuf_reg[5][5]_0 (\retbuf[0][7]_i_4__0_n_0 ),
        .\retbuf_reg[5][5]_1 (myCrc_n_149),
        .\retbuf_reg[5][7] (\retbuf_reg[5][7]_0 ),
        .\retbuf_reg[5][7]_0 (\retbuf[5][7]_i_3__0_n_0 ),
        .rpuAXIL_araddr(rpuAXIL_araddr),
        .rpuAXIL_arvalid(rpuAXIL_arvalid),
        .rpuAXIL_awaddr(rpuAXIL_awaddr),
        .rpuAXIL_awvalid(rpuAXIL_awvalid),
        .rpuAXIL_bready(rpuAXIL_bready),
        .rpuAXIL_rdata(rpuAXIL_rdata),
        .rpuAXIL_rready(rpuAXIL_rready),
        .rpuAXIL_rvalid(rpuAXIL_rvalid),
        .rpuAXIL_wdata(rpuAXIL_wdata),
        .rpuAXIL_wstrb(rpuAXIL_wstrb),
        .rpuAXIL_wvalid(rpuAXIL_wvalid),
        .rxAXIS_tvalid(rxAXIS_tvalid),
        .rxlen(rxlen),
        .\rxlen_reg[1] (myRxtx_n_131),
        .\rxlen_reg[1]_0 (\rxlen[1]_i_3_n_0 ),
        .\scoreMin_reg[7] ({myRxtx_n_190,myRxtx_n_191,myRxtx_n_192,myRxtx_n_193,myRxtx_n_194,myRxtx_n_195,myRxtx_n_196,myRxtx_n_197}),
        .\sendAXIL_rdata_reg[0]_0 (\stateOp_reg[0]_0 ),
        .\sendAXIL_rdata_reg[31]_0 ({\txAXIS_tdata_reg_n_0_[31] ,\txAXIS_tdata_reg_n_0_[30] ,\txAXIS_tdata_reg_n_0_[29] ,\txAXIS_tdata_reg_n_0_[28] ,\txAXIS_tdata_reg_n_0_[27] ,\txAXIS_tdata_reg_n_0_[26] ,\txAXIS_tdata_reg_n_0_[25] ,\txAXIS_tdata_reg_n_0_[24] ,\txAXIS_tdata_reg_n_0_[23] ,\txAXIS_tdata_reg_n_0_[22] ,\txAXIS_tdata_reg_n_0_[21] ,\txAXIS_tdata_reg_n_0_[20] ,\txAXIS_tdata_reg_n_0_[19] ,\txAXIS_tdata_reg_n_0_[18] ,\txAXIS_tdata_reg_n_0_[17] ,\txAXIS_tdata_reg_n_0_[16] ,\txAXIS_tdata_reg_n_0_[15] ,\txAXIS_tdata_reg_n_0_[14] ,\txAXIS_tdata_reg_n_0_[13] ,\txAXIS_tdata_reg_n_0_[12] ,\txAXIS_tdata_reg_n_0_[11] ,\txAXIS_tdata_reg_n_0_[10] ,\txAXIS_tdata_reg_n_0_[9] ,\txAXIS_tdata_reg_n_0_[8] ,\txAXIS_tdata_reg_n_0_[7] ,\txAXIS_tdata_reg_n_0_[6] ,\txAXIS_tdata_reg_n_0_[5] ,\txAXIS_tdata_reg_n_0_[4] ,\txAXIS_tdata_reg_n_0_[3] ,\txAXIS_tdata_reg_n_0_[2] ,\txAXIS_tdata_reg_n_0_[1] ,\txAXIS_tdata_reg_n_0_[0] }),
        .\stateOp_next_reg[0] (\stateOp_next[0]_i_2_n_0 ),
        .\stateOp_next_reg[1] (\stateOp_next[2]_i_3_n_0 ),
        .\stateOp_next_reg[2] (\len_reg_n_0_[1] ),
        .\stateOp_next_reg[2]_0 (\stateOp_next[2]_i_2_n_0 ),
        .\stateOp_next_reg[4] (\stateOp_next[4]_i_3__0_n_0 ),
        .stateOp_reg(myRxtx_n_142),
        .\stateOp_reg[0] (myRxtx_n_44),
        .\stateOp_reg[0]_0 ({myRxtx_n_48,myRxtx_n_49,myRxtx_n_50,myRxtx_n_51}),
        .\stateOp_reg[0]_1 (myRxtx_n_57),
        .\stateOp_reg[0]_10 ({myXferto_n_0,myXferto_n_1}),
        .\stateOp_reg[0]_11 ({myWordto_n_0,myWordto_n_1}),
        .\stateOp_reg[0]_12 (myWordto_n_2),
        .\stateOp_reg[0]_13 (\stateOp[0]_i_7__0_n_0 ),
        .\stateOp_reg[0]_2 (myRxtx_n_130),
        .\stateOp_reg[0]_3 (myRxtx_n_214),
        .\stateOp_reg[0]_4 (\stateOp[4]_i_3_n_0 ),
        .\stateOp_reg[0]_5 (\stateOp[4]_i_4__0_n_0 ),
        .\stateOp_reg[0]_6 (\stateOp[4]_i_6__0_n_0 ),
        .\stateOp_reg[0]_7 (\stateOp[4]_i_15_n_0 ),
        .\stateOp_reg[0]_8 (myCrc_n_137),
        .\stateOp_reg[0]_9 (\stateOp[0]_i_5__0_n_0 ),
        .\stateOp_reg[1] (myRxtx_n_8),
        .\stateOp_reg[1]_0 ({myRxtx_n_125,myRxtx_n_126,myRxtx_n_127,myRxtx_n_128,myRxtx_n_129}),
        .\stateOp_reg[1]_1 (myRxtx_n_179),
        .\stateOp_reg[1]_2 ({myRxtx_n_181,myRxtx_n_182,myRxtx_n_183,myRxtx_n_184,myRxtx_n_185}),
        .\stateOp_reg[1]_3 ({myRxtx_n_229,myRxtx_n_230,myRxtx_n_231,myRxtx_n_232,myRxtx_n_233,myRxtx_n_234,myRxtx_n_235,myRxtx_n_236,myRxtx_n_237,myRxtx_n_238,myRxtx_n_239,myRxtx_n_240,myRxtx_n_241,myRxtx_n_242,myRxtx_n_243,myRxtx_n_244,myRxtx_n_245,myRxtx_n_246,myRxtx_n_247,myRxtx_n_248,myRxtx_n_249,myRxtx_n_250,myRxtx_n_251,myRxtx_n_252,myRxtx_n_253,myRxtx_n_254,myRxtx_n_255,myRxtx_n_256,myRxtx_n_257,myRxtx_n_258}),
        .\stateOp_reg[1]_4 (\opbuf[0]1 ),
        .\stateOp_reg[1]_5 (myRxtx_n_347),
        .\stateOp_reg[1]_6 (\stateOp[1]_i_3__3_n_0 ),
        .\stateOp_reg[1]_7 (\stateOp[1]_i_4__4_n_0 ),
        .\stateOp_reg[2] ({myRxtx_n_52,myRxtx_n_53,wordcntLast[0]}),
        .\stateOp_reg[2]_0 (myRxtx_n_55),
        .\stateOp_reg[2]_1 (myRxtx_n_91),
        .\stateOp_reg[2]_2 (myRxtx_n_178),
        .\stateOp_reg[2]_3 (myCrc_n_134),
        .\stateOp_reg[2]_4 (\stateOp[2]_i_4__1_n_0 ),
        .\stateOp_reg[3] (myRxtx_n_180),
        .\stateOp_reg[3]_0 (\pollbuf[5]_54 ),
        .\stateOp_reg[3]_1 (\pollbuf[3]_55 ),
        .\stateOp_reg[3]_2 (myRxtx_n_327),
        .\stateOp_reg[3]_3 (\stateOp[3]_i_3__0_n_0 ),
        .\stateOp_reg[3]_4 (\stateOp[3]_i_6__0_n_0 ),
        .\stateOp_reg[3]_5 (\stateOp[3]_i_7__0_n_0 ),
        .\stateOp_reg[3]_6 (\stateOp[3]_i_9_n_0 ),
        .\stateOp_reg[4] (myRxtx_n_344),
        .\stateOp_reg[4]_0 (wordcntLast[1]),
        .\stateOp_reg[4]_1 (\stateOp[4]_i_9_n_0 ),
        .\stateOp_reg[4]_2 (myCrc_n_136),
        .stateOp_reg_0(myRxtx_n_145),
        .stateOp_reg_1(myRxtx_n_165),
        .stateOp_reg_2(myRxtx_n_166),
        .stateOp_reg_3(myRxtx_n_167),
        .stateOp_reg_4(myCrc_n_45),
        .\stateSend_reg[0]_0 (myRxtx_n_348),
        .\tixVBuffer_reg[7] ({\opbuf_reg_n_0_[0][7] ,\opbuf_reg_n_0_[0][6] ,\opbuf_reg_n_0_[0][5] ,\opbuf_reg_n_0_[0][4] ,\opbuf_reg_n_0_[0][3] ,\opbuf_reg_n_0_[0][2] ,\opbuf_reg_n_0_[0][1] ,\opbuf_reg_n_0_[0][0] }),
        .\tixVBufxfop_reg[7] ({\opbuf_reg_n_0_[2][7] ,\opbuf_reg_n_0_[2][6] ,\opbuf_reg_n_0_[2][5] ,\opbuf_reg_n_0_[2][4] ,\opbuf_reg_n_0_[2][3] ,\opbuf_reg_n_0_[2][2] ,\opbuf_reg_n_0_[2][1] ,\opbuf_reg_n_0_[2][0] }),
        .\tixVCommand_reg[1] ({myRxtx_n_186,myRxtx_n_187}),
        .\tixVCommand_reg[1]_0 ({myRxtx_n_188,myRxtx_n_189}),
        .\tixVCommand_reg[7] ({myRxtx_n_259,myRxtx_n_260,myRxtx_n_261,myRxtx_n_262,myRxtx_n_263,myRxtx_n_264,myRxtx_n_265,myRxtx_n_266}),
        .\tixVController_reg[0] ({myRxtx_n_45,myRxtx_n_46,myRxtx_n_47}),
        .\tixVController_reg[0]_0 (myRxtx_n_58),
        .\tixVController_reg[1] (myRxtx_n_59),
        .\tixVController_reg[7] ({myRxtx_n_35,myRxtx_n_36,myRxtx_n_37,myRxtx_n_38,myRxtx_n_39,myRxtx_n_40,myRxtx_n_41,myRxtx_n_42}),
        .\tixVController_reg[7]_0 (\opbuf_reg[1]_45 ),
        .\tkst_reg[31] ({myRxtx_n_206,myRxtx_n_207,myRxtx_n_208,myRxtx_n_209,myRxtx_n_210,myRxtx_n_211,myRxtx_n_212,myRxtx_n_213}),
        .\tkst_reg[7] ({myRxtx_n_198,myRxtx_n_199,myRxtx_n_200,myRxtx_n_201,myRxtx_n_202,myRxtx_n_203,myRxtx_n_204,myRxtx_n_205}),
        .\txAXIS_tdata_reg[0] (\txAXIS_tdata[0]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[0]_0 (\txAXIS_tdata[6]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[0]_1 (myCrc_n_153),
        .\txAXIS_tdata_reg[0]_2 (\txAXIS_tdata[6]_i_5__0_n_0 ),
        .\txAXIS_tdata_reg[10] (myCrc_n_142),
        .\txAXIS_tdata_reg[10]_0 (\txAXIS_tdata[10]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[10]_1 (\txAXIS_tdata[10]_i_4__0_n_0 ),
        .\txAXIS_tdata_reg[11] (myRxtx_n_161),
        .\txAXIS_tdata_reg[11]_0 (myRxtx_n_173),
        .\txAXIS_tdata_reg[11]_1 (\txAXIS_tdata[11]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[11]_2 (\txAXIS_tdata_reg[11]_i_3_n_0 ),
        .\txAXIS_tdata_reg[11]_3 (myCrc_n_30),
        .\txAXIS_tdata_reg[12] (\txAXIS_tdata[12]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[12]_0 (\txAXIS_tdata[12]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[12]_1 (myCrc_n_168),
        .\txAXIS_tdata_reg[13] (myCrc_n_169),
        .\txAXIS_tdata_reg[13]_0 (\txAXIS_tdata[13]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[13]_1 (\txAXIS_tdata_reg[13]_i_4_n_0 ),
        .\txAXIS_tdata_reg[14] (myRxtx_n_144),
        .\txAXIS_tdata_reg[14]_0 (myRxtx_n_169),
        .\txAXIS_tdata_reg[14]_1 (\txAXIS_tdata[14]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[14]_2 (\txAXIS_tdata_reg[14]_i_3_n_0 ),
        .\txAXIS_tdata_reg[14]_3 (myCrc_n_170),
        .\txAXIS_tdata_reg[15] ({\resid_reg_n_0_[1] ,\resid_reg_n_0_[0] }),
        .\txAXIS_tdata_reg[15]_0 (myCrc_n_171),
        .\txAXIS_tdata_reg[15]_1 (\txAXIS_tdata[15]_i_4__0_n_0 ),
        .\txAXIS_tdata_reg[15]_2 (\txAXIS_tdata_reg[15]_i_5_n_0 ),
        .\txAXIS_tdata_reg[15]_3 (\txAXIS_tdata[31]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[17] (\txAXIS_tdata[17]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[17]_0 (\txAXIS_tdata[17]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[17]_1 (\txAXIS_tdata[31]_i_7__0_n_0 ),
        .\txAXIS_tdata_reg[17]_2 (\txAXIS_tdata[23]_i_5__0_n_0 ),
        .\txAXIS_tdata_reg[17]_3 (myCrc_n_162),
        .\txAXIS_tdata_reg[19] (\txAXIS_tdata[19]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[19]_0 (\txAXIS_tdata[27]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[19]_1 (\txAXIS_tdata[19]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[19]_2 (myCrc_n_161),
        .\txAXIS_tdata_reg[1] (myCrc_n_141),
        .\txAXIS_tdata_reg[1]_0 (\txAXIS_tdata[1]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[1]_1 (\txAXIS_tdata[1]_i_4__0_n_0 ),
        .\txAXIS_tdata_reg[1]_2 (\txAXIS_tdata[7]_i_7__0_n_0 ),
        .\txAXIS_tdata_reg[20] (myCrc_n_172),
        .\txAXIS_tdata_reg[20]_0 (\txAXIS_tdata[20]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[20]_1 (\txAXIS_tdata[31]_i_5__0_n_0 ),
        .\txAXIS_tdata_reg[20]_2 (\txAXIS_tdata[20]_i_4__0_n_0 ),
        .\txAXIS_tdata_reg[21] (\txAXIS_tdata[21]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[21]_0 (\txAXIS_tdata[21]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[21]_1 (myCrc_n_160),
        .\txAXIS_tdata_reg[22] (\txAXIS_tdata[22]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[22]_0 (\txAXIS_tdata[22]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[22]_1 (myCrc_n_173),
        .\txAXIS_tdata_reg[23] (\txAXIS_tdata[23]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[23]_0 (\txAXIS_tdata[23]_i_4__0_n_0 ),
        .\txAXIS_tdata_reg[23]_1 (myCrc_n_159),
        .\txAXIS_tdata_reg[24] (\txAXIS_tdata[25]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[24]_0 (\txAXIS_tdata_reg[24]_i_2_n_0 ),
        .\txAXIS_tdata_reg[24]_1 (myCrc_n_157),
        .\txAXIS_tdata_reg[25] (\txAXIS_tdata_reg[25]_i_3_n_0 ),
        .\txAXIS_tdata_reg[25]_0 (myCrc_n_158),
        .\txAXIS_tdata_reg[26] (myCrc_n_143),
        .\txAXIS_tdata_reg[26]_0 (\txAXIS_tdata[26]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[26]_1 (\txAXIS_tdata[26]_i_4__0_n_0 ),
        .\txAXIS_tdata_reg[26]_2 (\txAXIS_tdata[26]_i_5__0_n_0 ),
        .\txAXIS_tdata_reg[27] (\txAXIS_tdata[27]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[27]_0 (\txAXIS_tdata[27]_i_4__0_n_0 ),
        .\txAXIS_tdata_reg[27]_1 (myCrc_n_163),
        .\txAXIS_tdata_reg[28] (\txAXIS_tdata[28]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[28]_0 (\txAXIS_tdata[28]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[28]_1 (myCrc_n_164),
        .\txAXIS_tdata_reg[29] (myCrc_n_165),
        .\txAXIS_tdata_reg[29]_0 (\txAXIS_tdata[29]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[2] (\txAXIS_tdata[2]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[2]_0 (myCrc_n_154),
        .\txAXIS_tdata_reg[30] ({AXIS_tdata[30:29],AXIS_tdata[23:21],AXIS_tdata[15:13],AXIS_tdata[6],AXIS_tdata[3],AXIS_tdata[1:0]}),
        .\txAXIS_tdata_reg[30]_0 (\txAXIS_tdata[30]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[30]_1 (\txAXIS_tdata[30]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[30]_2 (myCrc_n_166),
        .\txAXIS_tdata_reg[31] (myRxtx_n_163),
        .\txAXIS_tdata_reg[31]_0 (\txAXIS_tdata[31]_i_4__0_n_0 ),
        .\txAXIS_tdata_reg[31]_1 (\txAXIS_tdata[31]_i_6__0_n_0 ),
        .\txAXIS_tdata_reg[31]_2 (myCrc_n_167),
        .\txAXIS_tdata_reg[3] (myCrc_n_140),
        .\txAXIS_tdata_reg[3]_0 (\txAXIS_tdata[3]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[3]_1 (\txAXIS_tdata[3]_i_4__0_n_0 ),
        .\txAXIS_tdata_reg[4] (\txAXIS_tdata[4]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[4]_0 (myCrc_n_155),
        .\txAXIS_tdata_reg[5] (myCrc_n_139),
        .\txAXIS_tdata_reg[5]_0 (\txAXIS_tdata[5]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[5]_1 (\txAXIS_tdata[5]_i_4_n_0 ),
        .\txAXIS_tdata_reg[6] (\txAXIS_tdata[6]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[6]_0 (myCrc_n_156),
        .\txAXIS_tdata_reg[7] (myRxtx_n_175),
        .\txAXIS_tdata_reg[7]_0 (myCrc_n_135),
        .\txAXIS_tdata_reg[7]_1 (\stateOp[3]_i_5__0_n_0 ),
        .\txAXIS_tdata_reg[7]_2 (myCrc_n_138),
        .\txAXIS_tdata_reg[7]_3 (\txAXIS_tdata[7]_i_5__0_n_0 ),
        .\txAXIS_tdata_reg[7]_4 (\txAXIS_tdata[7]_i_6__0_n_0 ),
        .\txAXIS_tdata_reg[8] (\txAXIS_tdata[8]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[8]_0 (\txAXIS_tdata[8]_i_3__0_n_0 ),
        .\txAXIS_tdata_reg[8]_1 (myCrc_n_28),
        .\txAXIS_tdata_reg[9] (\txAXIS_tdata[9]_i_2__0_n_0 ),
        .\txAXIS_tdata_reg[9]_0 (\txAXIS_tdata_reg[9]_i_3_n_0 ),
        .\txAXIS_tdata_reg[9]_1 (myCrc_n_29),
        .txlast1(txlast1),
        .\txlen_reg[0] (\wordcntLast[0]_i_2__0_n_0 ),
        .\wordcntLast_reg[1] (\wordcntLast[1]_i_2_n_0 ),
        .\wordcnt_reg[0]_0 (\opbuf_reg[0]51_in [5]),
        .\wordcnt_reg[0]_1 (\wordcnt[30]_i_4_n_0 ),
        .\wordcnt_reg[30]_0 ({myRxtx_n_60,myRxtx_n_61,myRxtx_n_62,myRxtx_n_63,myRxtx_n_64,myRxtx_n_65,myRxtx_n_66,myRxtx_n_67,myRxtx_n_68,myRxtx_n_69,myRxtx_n_70,myRxtx_n_71,myRxtx_n_72,myRxtx_n_73,myRxtx_n_74,myRxtx_n_75,myRxtx_n_76,myRxtx_n_77,myRxtx_n_78,myRxtx_n_79,myRxtx_n_80,myRxtx_n_81,myRxtx_n_82,myRxtx_n_83,myRxtx_n_84,myRxtx_n_85,myRxtx_n_86,myRxtx_n_87,myRxtx_n_88,myRxtx_n_89,myRxtx_n_90}));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Timeout_v1_0 myWordto
       (.Q({myWordto_n_0,myWordto_n_1}),
        .aclk_sig(aclk_sig),
        .\stateOp[1]_i_3__1 ({Q[4:3],Q[1:0]}),
        .\stateOp_reg[0]_0 (myRxtx_n_348),
        .\stateOp_reg[1]_0 (myWordto_n_2),
        .\stateOp_reg[1]_1 (\stateOp_reg[0]_0 ),
        .tkclk(tkclk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Timeout_v1_0__parameterized1 myXferto
       (.Q({myXferto_n_0,myXferto_n_1}),
        .aclk_sig(aclk_sig),
        .\stateOp_reg[0]_0 (\stateOp_reg[0]_0 ),
        .\stateOp_reg[0]_1 (myRxtx_n_347),
        .tkclk(tkclk));
  LUT6 #(
    .INIT(64'hFFFFFFFF7FFFFFFE)) 
    \opbuf[1][7]_i_10 
       (.I0(\opbuf[1][7]_i_24_n_0 ),
        .I1(\opbuf[1][7]_i_25_n_0 ),
        .I2(\opbuf[1][7]_i_26_n_0 ),
        .I3(\opbuf[1][7]_i_27_n_0 ),
        .I4(\opbuf[1][7]_i_28_n_0 ),
        .I5(\opbuf[1][7]_i_29_n_0 ),
        .O(\opbuf[1][7]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2841" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_11 
       (.I0(\opbuf_reg[0]3 [8]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [11]),
        .O(\opbuf[1][7]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2868" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_12 
       (.I0(\opbuf_reg[0]3 [10]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [13]),
        .O(\opbuf[1][7]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2868" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_13 
       (.I0(\opbuf_reg[0]3 [9]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [12]),
        .O(\opbuf[1][7]_i_13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2867" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_14 
       (.I0(\opbuf_reg[0]3 [12]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [15]),
        .O(\opbuf[1][7]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2848" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_15 
       (.I0(\opbuf_reg[0]3 [11]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [14]),
        .O(\opbuf[1][7]_i_15_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFE)) 
    \opbuf[1][7]_i_16 
       (.I0(\opbuf[6][7]_i_14_n_0 ),
        .I1(\opbuf[1][7]_i_14_n_0 ),
        .I2(\opbuf[6][7]_i_13_n_0 ),
        .I3(\opbuf[1][7]_i_24_n_0 ),
        .I4(\opbuf[6][7]_i_15_n_0 ),
        .O(\opbuf[1][7]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2841" *) 
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \opbuf[1][7]_i_18 
       (.I0(\opbuf_reg[0]51_in [11]),
        .I1(\opbuf_reg[0]3 [8]),
        .I2(\opbuf_reg[0]51_in [10]),
        .I3(\wordcnt_reg_n_0_[26] ),
        .I4(\opbuf_reg[0]3 [7]),
        .O(\opbuf[1][7]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2862" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_19 
       (.I0(\opbuf_reg[0]3 [25]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [28]),
        .O(\opbuf[1][7]_i_19_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2863" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_20 
       (.I0(\opbuf_reg[0]3 [24]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [27]),
        .O(\opbuf[1][7]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2862" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_21 
       (.I0(\opbuf_reg[0]3 [27]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [30]),
        .O(\opbuf[1][7]_i_21_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2861" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_22 
       (.I0(\opbuf_reg[0]3 [26]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [29]),
        .O(\opbuf[1][7]_i_22_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2865" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_24 
       (.I0(\opbuf_reg[0]3 [16]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [19]),
        .O(\opbuf[1][7]_i_24_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2865" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_25 
       (.I0(\opbuf_reg[0]3 [18]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [21]),
        .O(\opbuf[1][7]_i_25_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2849" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_26 
       (.I0(\opbuf_reg[0]3 [17]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [20]),
        .O(\opbuf[1][7]_i_26_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2864" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_27 
       (.I0(\opbuf_reg[0]3 [20]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [23]),
        .O(\opbuf[1][7]_i_27_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2866" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_28 
       (.I0(\opbuf_reg[0]3 [19]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [22]),
        .O(\opbuf[1][7]_i_28_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFE)) 
    \opbuf[1][7]_i_29 
       (.I0(\opbuf[6][7]_i_17_n_0 ),
        .I1(\opbuf[1][7]_i_20_n_0 ),
        .I2(\opbuf[1][7]_i_40_n_0 ),
        .I3(\opbuf[6][7]_i_11_n_0 ),
        .I4(\opbuf[1][7]_i_27_n_0 ),
        .O(\opbuf[1][7]_i_29_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \opbuf[1][7]_i_3 
       (.I0(\opbuf[1][7]_i_5_n_0 ),
        .I1(\opbuf[1][7]_i_6_n_0 ),
        .I2(\opbuf[1][7]_i_7_n_0 ),
        .I3(\opbuf[1][7]_i_8_n_0 ),
        .I4(\opbuf[1][7]_i_9_n_0 ),
        .I5(\opbuf[1][7]_i_10_n_0 ),
        .O(\opbuf[1][7]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h1D)) 
    \opbuf[1][7]_i_30 
       (.I0(\opbuf_reg[0]51_in [5]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]5 [5]),
        .O(\opbuf[1][7]_i_30_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[1][7]_i_31 
       (.I0(\opbuf_reg[0]51_in [13]),
        .I1(\opbuf_reg[0]5 [13]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[1][7]_i_31_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[1][7]_i_32 
       (.I0(\opbuf_reg[0]51_in [12]),
        .I1(\opbuf_reg[0]5 [12]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[1][7]_i_32_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[1][7]_i_33 
       (.I0(\opbuf_reg[0]51_in [11]),
        .I1(\opbuf_reg[0]5 [11]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[1][7]_i_33_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[1][7]_i_34 
       (.I0(\opbuf_reg[0]51_in [10]),
        .I1(\opbuf_reg[0]5 [10]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[1][7]_i_34_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[1][7]_i_35 
       (.I0(\opbuf_reg[0]51_in [9]),
        .I1(\opbuf_reg[0]5 [9]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[1][7]_i_35_n_0 ));
  LUT3 #(
    .INIT(8'h1D)) 
    \opbuf[1][7]_i_36 
       (.I0(\opbuf_reg[0]51_in [8]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]5 [8]),
        .O(\opbuf[1][7]_i_36_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[1][7]_i_37 
       (.I0(\opbuf_reg[0]51_in [7]),
        .I1(\opbuf_reg[0]5 [7]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[1][7]_i_37_n_0 ));
  LUT3 #(
    .INIT(8'h1D)) 
    \opbuf[1][7]_i_38 
       (.I0(\opbuf_reg[0]51_in [6]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]5 [6]),
        .O(\opbuf[1][7]_i_38_n_0 ));
  LUT3 #(
    .INIT(8'h1D)) 
    \opbuf[1][7]_i_39 
       (.I0(\opbuf_reg[0]51_in [30]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]5 [30]),
        .O(\opbuf[1][7]_i_39_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2845" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \opbuf[1][7]_i_4 
       (.I0(Q[4]),
        .I1(Q[3]),
        .I2(Q[2]),
        .O(\opbuf[1][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2864" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_40 
       (.I0(\opbuf_reg[0]3 [21]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [24]),
        .O(\opbuf[1][7]_i_40_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[1][7]_i_43 
       (.I0(\opbuf_reg[0]51_in [19]),
        .O(\opbuf[1][7]_i_43_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[1][7]_i_44 
       (.I0(\opbuf_reg[0]51_in [18]),
        .O(\opbuf[1][7]_i_44_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[1][7]_i_45 
       (.I0(\opbuf_reg[0]51_in [17]),
        .O(\opbuf[1][7]_i_45_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[1][7]_i_46 
       (.I0(\opbuf_reg[0]51_in [16]),
        .O(\opbuf[1][7]_i_46_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[1][7]_i_47 
       (.I0(\opbuf_reg[0]51_in [15]),
        .O(\opbuf[1][7]_i_47_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[1][7]_i_48 
       (.I0(\opbuf_reg[0]51_in [14]),
        .O(\opbuf[1][7]_i_48_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[1][7]_i_49 
       (.I0(\opbuf_reg[0]51_in [13]),
        .O(\opbuf[1][7]_i_49_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF7FFFFFFE)) 
    \opbuf[1][7]_i_5 
       (.I0(\opbuf[1][7]_i_11_n_0 ),
        .I1(\opbuf[1][7]_i_12_n_0 ),
        .I2(\opbuf[1][7]_i_13_n_0 ),
        .I3(\opbuf[1][7]_i_14_n_0 ),
        .I4(\opbuf[1][7]_i_15_n_0 ),
        .I5(\opbuf[1][7]_i_16_n_0 ),
        .O(\opbuf[1][7]_i_5_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[1][7]_i_50 
       (.I0(\opbuf_reg[0]51_in [12]),
        .O(\opbuf[1][7]_i_50_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[1][7]_i_51 
       (.I0(\opbuf_reg[0]51_in [30]),
        .O(\opbuf[1][7]_i_51_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[1][7]_i_52 
       (.I0(\opbuf_reg[0]51_in [29]),
        .O(\opbuf[1][7]_i_52_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[1][7]_i_53 
       (.I0(\opbuf_reg[0]51_in [28]),
        .O(\opbuf[1][7]_i_53_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2869" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[1][7]_i_6 
       (.I0(\opbuf_reg[0]3 [6]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [9]),
        .O(\opbuf[1][7]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hFFFACCFA)) 
    \opbuf[1][7]_i_7 
       (.I0(\opbuf_reg[0]51_in [8]),
        .I1(\opbuf_reg[0]3 [5]),
        .I2(\opbuf_reg[0]51_in [7]),
        .I3(\wordcnt_reg_n_0_[26] ),
        .I4(\opbuf_reg[0]3 [4]),
        .O(\opbuf[1][7]_i_7_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFB8)) 
    \opbuf[1][7]_i_8 
       (.I0(\opbuf_reg[0]3 [3]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [6]),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\opbuf[1][7]_i_18_n_0 ),
        .O(\opbuf[1][7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFFE7FFFFFFEFFFE)) 
    \opbuf[1][7]_i_9 
       (.I0(\opbuf[1][7]_i_19_n_0 ),
        .I1(\opbuf[1][7]_i_20_n_0 ),
        .I2(\opbuf[1][7]_i_21_n_0 ),
        .I3(\opbuf[1][7]_i_22_n_0 ),
        .I4(\opbuf_reg[1][7]_i_23_n_6 ),
        .I5(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[1][7]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFEEFAFFFA)) 
    \opbuf[6][7]_i_10 
       (.I0(\opbuf[1][7]_i_22_n_0 ),
        .I1(\opbuf_reg[0]3 [25]),
        .I2(\opbuf_reg[0]51_in [28]),
        .I3(\wordcnt_reg_n_0_[26] ),
        .I4(\opbuf_reg[1][7]_i_23_n_6 ),
        .I5(\opbuf[1][7]_i_21_n_0 ),
        .O(\opbuf[6][7]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2863" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[6][7]_i_11 
       (.I0(\opbuf_reg[0]3 [22]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [25]),
        .O(\opbuf[6][7]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2866" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[6][7]_i_13 
       (.I0(\opbuf_reg[0]3 [15]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [18]),
        .O(\opbuf[6][7]_i_13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2867" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[6][7]_i_14 
       (.I0(\opbuf_reg[0]3 [13]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [16]),
        .O(\opbuf[6][7]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2847" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[6][7]_i_15 
       (.I0(\opbuf_reg[0]3 [14]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [17]),
        .O(\opbuf[6][7]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2846" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \opbuf[6][7]_i_17 
       (.I0(\opbuf_reg[0]3 [23]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [26]),
        .O(\opbuf[6][7]_i_17_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_18 
       (.I0(\opbuf_reg[0]51_in [29]),
        .I1(\opbuf_reg[0]5 [29]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_19 
       (.I0(\opbuf_reg[0]51_in [28]),
        .I1(\opbuf_reg[0]5 [28]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_19_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_20 
       (.I0(\opbuf_reg[0]51_in [27]),
        .I1(\opbuf_reg[0]5 [27]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_20_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_21 
       (.I0(\opbuf_reg[0]51_in [26]),
        .I1(\opbuf_reg[0]5 [26]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_21_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_22 
       (.I0(\opbuf_reg[0]51_in [25]),
        .I1(\opbuf_reg[0]5 [25]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_22_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_23 
       (.I0(\opbuf_reg[0]51_in [24]),
        .I1(\opbuf_reg[0]5 [24]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_24 
       (.I0(\opbuf_reg[0]51_in [23]),
        .I1(\opbuf_reg[0]5 [23]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_24_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_25 
       (.I0(\opbuf_reg[0]51_in [22]),
        .I1(\opbuf_reg[0]5 [22]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_25_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_26 
       (.I0(\opbuf_reg[0]51_in [21]),
        .I1(\opbuf_reg[0]5 [21]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_26_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_27 
       (.I0(\opbuf_reg[0]51_in [20]),
        .I1(\opbuf_reg[0]5 [20]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_27_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_28 
       (.I0(\opbuf_reg[0]51_in [19]),
        .I1(\opbuf_reg[0]5 [19]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_28_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_29 
       (.I0(\opbuf_reg[0]51_in [18]),
        .I1(\opbuf_reg[0]5 [18]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_29_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2851" *) 
  LUT3 #(
    .INIT(8'hFB)) 
    \opbuf[6][7]_i_3 
       (.I0(Q[3]),
        .I1(Q[1]),
        .I2(Q[4]),
        .O(\opbuf[6][7]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_30 
       (.I0(\opbuf_reg[0]51_in [17]),
        .I1(\opbuf_reg[0]5 [17]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_30_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_31 
       (.I0(\opbuf_reg[0]51_in [16]),
        .I1(\opbuf_reg[0]5 [16]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_31_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_32 
       (.I0(\opbuf_reg[0]51_in [15]),
        .I1(\opbuf_reg[0]5 [15]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_32_n_0 ));
  LUT3 #(
    .INIT(8'h35)) 
    \opbuf[6][7]_i_33 
       (.I0(\opbuf_reg[0]51_in [14]),
        .I1(\opbuf_reg[0]5 [14]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .O(\opbuf[6][7]_i_33_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[6][7]_i_35 
       (.I0(\opbuf_reg[0]51_in [27]),
        .O(\opbuf[6][7]_i_35_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[6][7]_i_36 
       (.I0(\opbuf_reg[0]51_in [26]),
        .O(\opbuf[6][7]_i_36_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[6][7]_i_37 
       (.I0(\opbuf_reg[0]51_in [25]),
        .O(\opbuf[6][7]_i_37_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[6][7]_i_38 
       (.I0(\opbuf_reg[0]51_in [24]),
        .O(\opbuf[6][7]_i_38_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[6][7]_i_39 
       (.I0(\opbuf_reg[0]51_in [23]),
        .O(\opbuf[6][7]_i_39_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \opbuf[6][7]_i_4 
       (.I0(\opbuf[6][7]_i_5_n_0 ),
        .I1(\opbuf[6][7]_i_6_n_0 ),
        .I2(\opbuf[6][7]_i_7_n_0 ),
        .I3(\opbuf[6][7]_i_8_n_0 ),
        .I4(\opbuf[6][7]_i_9_n_0 ),
        .I5(\opbuf[6][7]_i_10_n_0 ),
        .O(\opbuf[6][7]_i_4_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[6][7]_i_40 
       (.I0(\opbuf_reg[0]51_in [22]),
        .O(\opbuf[6][7]_i_40_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[6][7]_i_41 
       (.I0(\opbuf_reg[0]51_in [21]),
        .O(\opbuf[6][7]_i_41_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \opbuf[6][7]_i_42 
       (.I0(\opbuf_reg[0]51_in [20]),
        .O(\opbuf[6][7]_i_42_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFEFEA)) 
    \opbuf[6][7]_i_5 
       (.I0(\opbuf[6][7]_i_11_n_0 ),
        .I1(\opbuf_reg[0]3 [21]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .I3(\opbuf_reg[0]51_in [24]),
        .I4(\opbuf[1][7]_i_12_n_0 ),
        .I5(\opbuf[1][7]_i_13_n_0 ),
        .O(\opbuf[6][7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFEFEA)) 
    \opbuf[6][7]_i_6 
       (.I0(\opbuf[1][7]_i_27_n_0 ),
        .I1(\opbuf_reg[0]3 [19]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .I3(\opbuf_reg[0]51_in [22]),
        .I4(\opbuf[1][7]_i_14_n_0 ),
        .I5(\opbuf[1][7]_i_15_n_0 ),
        .O(\opbuf[6][7]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFCFFFFFFFCFAFAF)) 
    \opbuf[6][7]_i_7 
       (.I0(\opbuf_reg[0]51_in [9]),
        .I1(\opbuf_reg[0]3 [6]),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\opbuf_reg[0]3 [3]),
        .I4(\wordcnt_reg_n_0_[26] ),
        .I5(\opbuf_reg[0]51_in [6]),
        .O(\opbuf[6][7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \opbuf[6][7]_i_8 
       (.I0(\opbuf[6][7]_i_13_n_0 ),
        .I1(\opbuf[1][7]_i_24_n_0 ),
        .I2(\opbuf[1][7]_i_7_n_0 ),
        .I3(\opbuf[1][7]_i_18_n_0 ),
        .I4(\opbuf[6][7]_i_14_n_0 ),
        .I5(\opbuf[6][7]_i_15_n_0 ),
        .O(\opbuf[6][7]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFEFEA)) 
    \opbuf[6][7]_i_9 
       (.I0(\opbuf[1][7]_i_25_n_0 ),
        .I1(\opbuf_reg[0]3 [17]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .I3(\opbuf_reg[0]51_in [20]),
        .I4(\opbuf[1][7]_i_20_n_0 ),
        .I5(\opbuf[6][7]_i_17_n_0 ),
        .O(\opbuf[6][7]_i_9_n_0 ));
  FDCE \opbuf_reg[0][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_7),
        .Q(\opbuf_reg_n_0_[0][0] ));
  FDCE \opbuf_reg[0][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_6),
        .Q(\opbuf_reg_n_0_[0][1] ));
  FDCE \opbuf_reg[0][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_5),
        .Q(\opbuf_reg_n_0_[0][2] ));
  FDCE \opbuf_reg[0][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_4),
        .Q(\opbuf_reg_n_0_[0][3] ));
  FDCE \opbuf_reg[0][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_3),
        .Q(\opbuf_reg_n_0_[0][4] ));
  FDCE \opbuf_reg[0][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_2),
        .Q(\opbuf_reg_n_0_[0][5] ));
  FDCE \opbuf_reg[0][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_1),
        .Q(\opbuf_reg_n_0_[0][6] ));
  FDCE \opbuf_reg[0][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_0),
        .Q(\opbuf_reg_n_0_[0][7] ));
  FDCE \opbuf_reg[1][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(\opbuf[1]_56 [0]),
        .Q(\opbuf_reg[1]_45 [0]));
  FDCE \opbuf_reg[1][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(\opbuf[1]_56 [1]),
        .Q(\opbuf_reg[1]_45 [1]));
  FDCE \opbuf_reg[1][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(\opbuf[1]_56 [2]),
        .Q(\opbuf_reg[1]_45 [2]));
  FDCE \opbuf_reg[1][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(\opbuf[1]_56 [3]),
        .Q(\opbuf_reg[1]_45 [3]));
  FDCE \opbuf_reg[1][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(\opbuf[1]_56 [4]),
        .Q(\opbuf_reg[1]_45 [4]));
  FDCE \opbuf_reg[1][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(\opbuf[1]_56 [5]),
        .Q(\opbuf_reg[1]_45 [5]));
  FDCE \opbuf_reg[1][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(\opbuf[1]_56 [6]),
        .Q(\opbuf_reg[1]_45 [6]));
  FDCE \opbuf_reg[1][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(\opbuf[1]_56 [7]),
        .Q(\opbuf_reg[1]_45 [7]));
  CARRY8 \opbuf_reg[1][7]_i_17 
       (.CI(\opbuf[1][7]_i_30_n_0 ),
        .CI_TOP(1'b0),
        .CO({\opbuf_reg[1][7]_i_17_n_0 ,\opbuf_reg[1][7]_i_17_n_1 ,\opbuf_reg[1][7]_i_17_n_2 ,\opbuf_reg[1][7]_i_17_n_3 ,\opbuf_reg[1][7]_i_17_n_4 ,\opbuf_reg[1][7]_i_17_n_5 ,\opbuf_reg[1][7]_i_17_n_6 ,\opbuf_reg[1][7]_i_17_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\opbuf_reg[0]3 [10:3]),
        .S({\opbuf[1][7]_i_31_n_0 ,\opbuf[1][7]_i_32_n_0 ,\opbuf[1][7]_i_33_n_0 ,\opbuf[1][7]_i_34_n_0 ,\opbuf[1][7]_i_35_n_0 ,\opbuf[1][7]_i_36_n_0 ,\opbuf[1][7]_i_37_n_0 ,\opbuf[1][7]_i_38_n_0 }));
  CARRY8 \opbuf_reg[1][7]_i_23 
       (.CI(\opbuf_reg[6][7]_i_12_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_opbuf_reg[1][7]_i_23_CO_UNCONNECTED [7:2],\opbuf_reg[1][7]_i_23_n_6 ,\NLW_opbuf_reg[1][7]_i_23_CO_UNCONNECTED [0]}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_opbuf_reg[1][7]_i_23_O_UNCONNECTED [7:1],\opbuf_reg[0]3 [27]}),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,\opbuf[1][7]_i_39_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \opbuf_reg[1][7]_i_41 
       (.CI(\txAXIS_tdata_reg[31]_i_12_n_0 ),
        .CI_TOP(1'b0),
        .CO({\opbuf_reg[1][7]_i_41_n_0 ,\opbuf_reg[1][7]_i_41_n_1 ,\opbuf_reg[1][7]_i_41_n_2 ,\opbuf_reg[1][7]_i_41_n_3 ,\opbuf_reg[1][7]_i_41_n_4 ,\opbuf_reg[1][7]_i_41_n_5 ,\opbuf_reg[1][7]_i_41_n_6 ,\opbuf_reg[1][7]_i_41_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\opbuf_reg[0]5 [19:12]),
        .S({\opbuf[1][7]_i_43_n_0 ,\opbuf[1][7]_i_44_n_0 ,\opbuf[1][7]_i_45_n_0 ,\opbuf[1][7]_i_46_n_0 ,\opbuf[1][7]_i_47_n_0 ,\opbuf[1][7]_i_48_n_0 ,\opbuf[1][7]_i_49_n_0 ,\opbuf[1][7]_i_50_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \opbuf_reg[1][7]_i_42 
       (.CI(\opbuf_reg[6][7]_i_34_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_opbuf_reg[1][7]_i_42_CO_UNCONNECTED [7:2],\opbuf_reg[1][7]_i_42_n_6 ,\opbuf_reg[1][7]_i_42_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_opbuf_reg[1][7]_i_42_O_UNCONNECTED [7:3],\opbuf_reg[0]5 [30:28]}),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,\opbuf[1][7]_i_51_n_0 ,\opbuf[1][7]_i_52_n_0 ,\opbuf[1][7]_i_53_n_0 }));
  FDCE \opbuf_reg[2][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_315),
        .Q(\opbuf_reg_n_0_[2][0] ));
  FDCE \opbuf_reg[2][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_314),
        .Q(\opbuf_reg_n_0_[2][1] ));
  FDCE \opbuf_reg[2][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_313),
        .Q(\opbuf_reg_n_0_[2][2] ));
  FDCE \opbuf_reg[2][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_312),
        .Q(\opbuf_reg_n_0_[2][3] ));
  FDCE \opbuf_reg[2][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_311),
        .Q(\opbuf_reg_n_0_[2][4] ));
  FDCE \opbuf_reg[2][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_310),
        .Q(\opbuf_reg_n_0_[2][5] ));
  FDCE \opbuf_reg[2][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_309),
        .Q(\opbuf_reg_n_0_[2][6] ));
  FDCE \opbuf_reg[2][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_57),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_308),
        .Q(\opbuf_reg_n_0_[2][7] ));
  FDCE \opbuf_reg[5][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_299),
        .Q(\opbuf_reg[5]_47 [0]));
  FDCE \opbuf_reg[5][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_298),
        .Q(\opbuf_reg[5]_47 [1]));
  FDCE \opbuf_reg[5][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_297),
        .Q(\opbuf_reg[5]_47 [2]));
  FDCE \opbuf_reg[5][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_296),
        .Q(\opbuf_reg[5]_47 [3]));
  FDCE \opbuf_reg[5][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_295),
        .Q(\opbuf_reg[5]_47 [4]));
  FDCE \opbuf_reg[5][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_294),
        .Q(\opbuf_reg[5]_47 [5]));
  FDCE \opbuf_reg[5][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_293),
        .Q(\opbuf_reg[5]_47 [6]));
  FDCE \opbuf_reg[5][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_292),
        .Q(\opbuf_reg[5]_47 [7]));
  FDCE \opbuf_reg[6][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_307),
        .Q(\opbuf_reg[6]_46 [0]));
  FDCE \opbuf_reg[6][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_306),
        .Q(\opbuf_reg[6]_46 [1]));
  FDCE \opbuf_reg[6][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_305),
        .Q(\opbuf_reg[6]_46 [2]));
  FDCE \opbuf_reg[6][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_304),
        .Q(\opbuf_reg[6]_46 [3]));
  FDCE \opbuf_reg[6][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_303),
        .Q(\opbuf_reg[6]_46 [4]));
  FDCE \opbuf_reg[6][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_302),
        .Q(\opbuf_reg[6]_46 [5]));
  FDCE \opbuf_reg[6][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_301),
        .Q(\opbuf_reg[6]_46 [6]));
  FDCE \opbuf_reg[6][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_55),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_300),
        .Q(\opbuf_reg[6]_46 [7]));
  CARRY8 \opbuf_reg[6][7]_i_12 
       (.CI(\opbuf_reg[6][7]_i_16_n_0 ),
        .CI_TOP(1'b0),
        .CO({\opbuf_reg[6][7]_i_12_n_0 ,\opbuf_reg[6][7]_i_12_n_1 ,\opbuf_reg[6][7]_i_12_n_2 ,\opbuf_reg[6][7]_i_12_n_3 ,\opbuf_reg[6][7]_i_12_n_4 ,\opbuf_reg[6][7]_i_12_n_5 ,\opbuf_reg[6][7]_i_12_n_6 ,\opbuf_reg[6][7]_i_12_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\opbuf_reg[0]3 [26:19]),
        .S({\opbuf[6][7]_i_18_n_0 ,\opbuf[6][7]_i_19_n_0 ,\opbuf[6][7]_i_20_n_0 ,\opbuf[6][7]_i_21_n_0 ,\opbuf[6][7]_i_22_n_0 ,\opbuf[6][7]_i_23_n_0 ,\opbuf[6][7]_i_24_n_0 ,\opbuf[6][7]_i_25_n_0 }));
  CARRY8 \opbuf_reg[6][7]_i_16 
       (.CI(\opbuf_reg[1][7]_i_17_n_0 ),
        .CI_TOP(1'b0),
        .CO({\opbuf_reg[6][7]_i_16_n_0 ,\opbuf_reg[6][7]_i_16_n_1 ,\opbuf_reg[6][7]_i_16_n_2 ,\opbuf_reg[6][7]_i_16_n_3 ,\opbuf_reg[6][7]_i_16_n_4 ,\opbuf_reg[6][7]_i_16_n_5 ,\opbuf_reg[6][7]_i_16_n_6 ,\opbuf_reg[6][7]_i_16_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\opbuf_reg[0]3 [18:11]),
        .S({\opbuf[6][7]_i_26_n_0 ,\opbuf[6][7]_i_27_n_0 ,\opbuf[6][7]_i_28_n_0 ,\opbuf[6][7]_i_29_n_0 ,\opbuf[6][7]_i_30_n_0 ,\opbuf[6][7]_i_31_n_0 ,\opbuf[6][7]_i_32_n_0 ,\opbuf[6][7]_i_33_n_0 }));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \opbuf_reg[6][7]_i_34 
       (.CI(\opbuf_reg[1][7]_i_41_n_0 ),
        .CI_TOP(1'b0),
        .CO({\opbuf_reg[6][7]_i_34_n_0 ,\opbuf_reg[6][7]_i_34_n_1 ,\opbuf_reg[6][7]_i_34_n_2 ,\opbuf_reg[6][7]_i_34_n_3 ,\opbuf_reg[6][7]_i_34_n_4 ,\opbuf_reg[6][7]_i_34_n_5 ,\opbuf_reg[6][7]_i_34_n_6 ,\opbuf_reg[6][7]_i_34_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\opbuf_reg[0]5 [27:20]),
        .S({\opbuf[6][7]_i_35_n_0 ,\opbuf[6][7]_i_36_n_0 ,\opbuf[6][7]_i_37_n_0 ,\opbuf[6][7]_i_38_n_0 ,\opbuf[6][7]_i_39_n_0 ,\opbuf[6][7]_i_40_n_0 ,\opbuf[6][7]_i_41_n_0 ,\opbuf[6][7]_i_42_n_0 }));
  FDCE \pollbuf_reg[0][0] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_42),
        .Q(\pollbuf_reg[0]_49 [0]));
  FDCE \pollbuf_reg[0][1] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_41),
        .Q(\pollbuf_reg[0]_49 [1]));
  FDCE \pollbuf_reg[0][2] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_40),
        .Q(\pollbuf_reg[0]_49 [2]));
  FDCE \pollbuf_reg[0][3] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_39),
        .Q(\pollbuf_reg[0]_49 [3]));
  FDCE \pollbuf_reg[0][4] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_38),
        .Q(\pollbuf_reg[0]_49 [4]));
  FDCE \pollbuf_reg[0][5] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_37),
        .Q(\pollbuf_reg[0]_49 [5]));
  FDCE \pollbuf_reg[0][6] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_36),
        .Q(\pollbuf_reg[0]_49 [6]));
  FDCE \pollbuf_reg[0][7] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_35),
        .Q(\pollbuf_reg[0]_49 [7]));
  FDCE \pollbuf_reg[1][0] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_266),
        .Q(\pollbuf_reg[1]_50 [0]));
  FDCE \pollbuf_reg[1][1] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_265),
        .Q(\pollbuf_reg[1]_50 [1]));
  FDCE \pollbuf_reg[1][2] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_264),
        .Q(\pollbuf_reg[1]_50 [2]));
  FDCE \pollbuf_reg[1][3] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_263),
        .Q(\pollbuf_reg[1]_50 [3]));
  FDCE \pollbuf_reg[1][4] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_262),
        .Q(\pollbuf_reg[1]_50 [4]));
  FDCE \pollbuf_reg[1][5] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_261),
        .Q(\pollbuf_reg[1]_50 [5]));
  FDCE \pollbuf_reg[1][6] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_260),
        .Q(\pollbuf_reg[1]_50 [6]));
  FDCE \pollbuf_reg[1][7] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_259),
        .Q(\pollbuf_reg[1]_50 [7]));
  FDCE \pollbuf_reg[3][1] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_47),
        .Q(\pollbuf_reg[3]_51 [1]));
  FDCE \pollbuf_reg[3][2] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_46),
        .Q(\pollbuf_reg[3]_51 [2]));
  FDCE \pollbuf_reg[3][5] 
       (.C(aclk_sig),
        .CE(\pollbuf[3]_55 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_45),
        .Q(\pollbuf_reg[3]_51 [5]));
  FDCE \pollbuf_reg[4][0] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_33),
        .Q(\pollbuf_reg[4]_52 [0]));
  FDCE \pollbuf_reg[4][1] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_32),
        .Q(\pollbuf_reg[4]_52 [1]));
  FDCE \pollbuf_reg[4][2] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_31),
        .Q(\pollbuf_reg[4]_52 [2]));
  FDCE \pollbuf_reg[4][3] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_30),
        .Q(\pollbuf_reg[4]_52 [3]));
  FDCE \pollbuf_reg[4][4] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_29),
        .Q(\pollbuf_reg[4]_52 [4]));
  FDCE \pollbuf_reg[4][5] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_28),
        .Q(\pollbuf_reg[4]_52 [5]));
  FDCE \pollbuf_reg[4][6] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_27),
        .Q(\pollbuf_reg[4]_52 [6]));
  FDCE \pollbuf_reg[4][7] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_26),
        .Q(\pollbuf_reg[4]_52 [7]));
  FDCE \pollbuf_reg[5][0] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_25),
        .Q(\pollbuf_reg[5]_53 [0]));
  FDCE \pollbuf_reg[5][1] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_24),
        .Q(\pollbuf_reg[5]_53 [1]));
  FDCE \pollbuf_reg[5][2] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_23),
        .Q(\pollbuf_reg[5]_53 [2]));
  FDCE \pollbuf_reg[5][3] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_22),
        .Q(\pollbuf_reg[5]_53 [3]));
  FDCE \pollbuf_reg[5][4] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_21),
        .Q(\pollbuf_reg[5]_53 [4]));
  FDCE \pollbuf_reg[5][5] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_20),
        .Q(\pollbuf_reg[5]_53 [5]));
  FDCE \pollbuf_reg[5][6] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_19),
        .Q(\pollbuf_reg[5]_53 [6]));
  FDCE \pollbuf_reg[5][7] 
       (.C(aclk_sig),
        .CE(\pollbuf[5]_54 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_18),
        .Q(\pollbuf_reg[5]_53 [7]));
  (* SOFT_HLUTNM = "soft_lutpair2836" *) 
  LUT5 #(
    .INIT(32'h10000000)) 
    \resid[0]_i_2__0 
       (.I0(Q[4]),
        .I1(Q[0]),
        .I2(Q[3]),
        .I3(Q[1]),
        .I4(Q[2]),
        .O(\resid[0]_i_2__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \resid_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_344),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_189),
        .Q(\resid_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \resid_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_344),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_188),
        .Q(\resid_reg_n_0_[1] ));
  (* SOFT_HLUTNM = "soft_lutpair2831" *) 
  LUT4 #(
    .INIT(16'h0004)) 
    \retbuf[0][4]_i_2 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\stateOp[4]_i_17_n_0 ),
        .I3(\tixVController_reg_n_0_[2] ),
        .O(\retbuf[0][4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2872" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \retbuf[0][6]_i_2 
       (.I0(\resid_reg_n_0_[0] ),
        .I1(\resid_reg_n_0_[1] ),
        .O(\retbuf[0][6]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF00000040)) 
    \retbuf[0][6]_i_3 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[4]),
        .I3(Q[3]),
        .I4(Q[2]),
        .I5(\retbuf[0][4]_i_2_n_0 ),
        .O(\retbuf[0][6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000200)) 
    \retbuf[0][7]_i_3__0 
       (.I0(Q[1]),
        .I1(Q[3]),
        .I2(\resid_reg_n_0_[1] ),
        .I3(Q[4]),
        .I4(Q[2]),
        .I5(Q[0]),
        .O(\retbuf[0][7]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2827" *) 
  LUT5 #(
    .INIT(32'h00001000)) 
    \retbuf[0][7]_i_4__0 
       (.I0(Q[2]),
        .I1(Q[3]),
        .I2(Q[4]),
        .I3(Q[1]),
        .I4(Q[0]),
        .O(\retbuf[0][7]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2837" *) 
  LUT5 #(
    .INIT(32'h010101FF)) 
    \retbuf[1][7]_i_3__0 
       (.I0(ixRetbufCrc[1]),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[2]),
        .I3(\resid_reg_n_0_[1] ),
        .I4(\resid_reg_n_0_[0] ),
        .O(\retbuf[1][7]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEFFFFF)) 
    \retbuf[2][7]_i_3__0 
       (.I0(\stateOp[4]_i_17_n_0 ),
        .I1(\tixVController_reg_n_0_[0] ),
        .I2(\retbuf[2][7]_i_6__0_n_0 ),
        .I3(Q[1]),
        .I4(Q[0]),
        .I5(Q[2]),
        .O(\retbuf[2][7]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2832" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFD)) 
    \retbuf[2][7]_i_4 
       (.I0(\tixVController_reg_n_0_[1] ),
        .I1(\stateOp_next[3]_i_3_n_0 ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVCommand_reg_n_0_[1] ),
        .I4(\tixVCommand_reg_n_0_[0] ),
        .O(\retbuf[2][7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2842" *) 
  LUT3 #(
    .INIT(8'hFB)) 
    \retbuf[2][7]_i_5__0 
       (.I0(\tixVCommand_reg_n_0_[0] ),
        .I1(\tixVCommand_reg_n_0_[1] ),
        .I2(\stateOp_next[3]_i_3_n_0 ),
        .O(\retbuf[2][7]_i_5__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2850" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[2][7]_i_6__0 
       (.I0(Q[3]),
        .I1(Q[4]),
        .O(\retbuf[2][7]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2852" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \retbuf[33][7]_i_3__0 
       (.I0(ixRetbufCrc[1]),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[2]),
        .O(\retbuf[33][7]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2839" *) 
  LUT5 #(
    .INIT(32'h404040FF)) 
    \retbuf[36][7]_i_3__0 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[1]),
        .I3(\resid_reg_n_0_[1] ),
        .I4(\resid_reg_n_0_[0] ),
        .O(\retbuf[36][7]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2839" *) 
  LUT5 #(
    .INIT(32'h1F111111)) 
    \retbuf[37][7]_i_3__0 
       (.I0(\resid_reg_n_0_[1] ),
        .I1(\resid_reg_n_0_[0] ),
        .I2(ixRetbufCrc[1]),
        .I3(ixRetbufCrc[2]),
        .I4(ixRetbufCrc[5]),
        .O(\retbuf[37][7]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFEFFFFFFFFF)) 
    \retbuf[39][7]_i_2__0 
       (.I0(Q[3]),
        .I1(Q[2]),
        .I2(\resid_reg_n_0_[0] ),
        .I3(\resid_reg_n_0_[1] ),
        .I4(Q[0]),
        .I5(Q[4]),
        .O(\retbuf[39][7]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2838" *) 
  LUT5 #(
    .INIT(32'h040404FF)) 
    \retbuf[4][7]_i_3__0 
       (.I0(ixRetbufCrc[5]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[2]),
        .I3(\resid_reg_n_0_[1] ),
        .I4(\resid_reg_n_0_[0] ),
        .O(\retbuf[4][7]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2837" *) 
  LUT5 #(
    .INIT(32'h101010FF)) 
    \retbuf[5][7]_i_3__0 
       (.I0(ixRetbufCrc[1]),
        .I1(ixRetbufCrc[5]),
        .I2(ixRetbufCrc[2]),
        .I3(\resid_reg_n_0_[1] ),
        .I4(\resid_reg_n_0_[0] ),
        .O(\retbuf[5][7]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2852" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \retbuf[8][5]_i_2__0 
       (.I0(ixRetbufCrc[2]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[5]),
        .O(\retbuf[8][5]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2838" *) 
  LUT5 #(
    .INIT(32'h404040FF)) 
    \retbuf[8][7]_i_3 
       (.I0(ixRetbufCrc[5]),
        .I1(ixRetbufCrc[1]),
        .I2(ixRetbufCrc[2]),
        .I3(\resid_reg_n_0_[1] ),
        .I4(\resid_reg_n_0_[0] ),
        .O(\retbuf[8][7]_i_3_n_0 ));
  FDCE \retbuf_reg[0][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_228),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_10),
        .Q(\retbuf_reg_n_0_[0][0] ));
  FDCE \retbuf_reg[0][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_228),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_9),
        .Q(\retbuf_reg_n_0_[0][1] ));
  FDCE \retbuf_reg[0][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_228),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_8),
        .Q(\retbuf_reg_n_0_[0][2] ));
  FDCE \retbuf_reg[0][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_228),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_7),
        .Q(\retbuf_reg_n_0_[0][3] ));
  FDCE \retbuf_reg[0][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_228),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_6),
        .Q(\retbuf_reg_n_0_[0][4] ));
  FDCE \retbuf_reg[0][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_228),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_5),
        .Q(\retbuf_reg_n_0_[0][5] ));
  FDCE \retbuf_reg[0][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_228),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_4),
        .Q(\retbuf_reg_n_0_[0][6] ));
  FDCE \retbuf_reg[0][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_228),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_3),
        .Q(\retbuf_reg_n_0_[0][7] ));
  FDCE \retbuf_reg[11][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_130),
        .Q(\retbuf_reg_n_0_[11][0] ));
  FDCE \retbuf_reg[11][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_129),
        .Q(\retbuf_reg_n_0_[11][1] ));
  FDCE \retbuf_reg[11][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_8),
        .Q(\retbuf_reg_n_0_[11][2] ));
  FDCE \retbuf_reg[11][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_27),
        .Q(\retbuf_reg_n_0_[11][3] ));
  FDCE \retbuf_reg[11][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_133),
        .Q(\retbuf_reg_n_0_[11][4] ));
  FDCE \retbuf_reg[11][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_127),
        .Q(\retbuf_reg_n_0_[11][5] ));
  FDCE \retbuf_reg[11][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_132),
        .Q(\retbuf_reg_n_0_[11][6] ));
  FDCE \retbuf_reg[11][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_3),
        .Q(\retbuf_reg_n_0_[11][7] ));
  FDCE \retbuf_reg[14][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_128),
        .Q(\retbuf_reg_n_0_[14][4] ));
  FDCE \retbuf_reg[15][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_124),
        .Q(\retbuf_reg_n_0_[15][1] ));
  FDCE \retbuf_reg[15][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_125),
        .Q(\retbuf_reg_n_0_[15][2] ));
  FDCE \retbuf_reg[15][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_131),
        .Q(\retbuf_reg_n_0_[15][3] ));
  FDCE \retbuf_reg[1][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_227),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_213),
        .Q(\retbuf_reg_n_0_[1][0] ));
  FDCE \retbuf_reg[1][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_227),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_212),
        .Q(\retbuf_reg_n_0_[1][1] ));
  FDCE \retbuf_reg[1][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_227),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_211),
        .Q(\retbuf_reg_n_0_[1][2] ));
  FDCE \retbuf_reg[1][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_227),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_210),
        .Q(\retbuf_reg_n_0_[1][3] ));
  FDCE \retbuf_reg[1][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_227),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_209),
        .Q(\retbuf_reg_n_0_[1][4] ));
  FDCE \retbuf_reg[1][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_227),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_208),
        .Q(\retbuf_reg_n_0_[1][5] ));
  FDCE \retbuf_reg[1][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_227),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_207),
        .Q(\retbuf_reg_n_0_[1][6] ));
  FDCE \retbuf_reg[1][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_227),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_206),
        .Q(\retbuf_reg_n_0_[1][7] ));
  FDCE \retbuf_reg[23][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_126),
        .Q(\retbuf_reg_n_0_[23][6] ));
  FDCE \retbuf_reg[2][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_64),
        .Q(\retbuf_reg_n_0_[2][0] ));
  FDCE \retbuf_reg[2][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_63),
        .Q(\retbuf_reg_n_0_[2][1] ));
  FDCE \retbuf_reg[2][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_62),
        .Q(\retbuf_reg_n_0_[2][2] ));
  FDCE \retbuf_reg[2][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_61),
        .Q(\retbuf_reg_n_0_[2][3] ));
  FDCE \retbuf_reg[2][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_60),
        .Q(\retbuf_reg_n_0_[2][4] ));
  FDCE \retbuf_reg[2][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_59),
        .Q(\retbuf_reg_n_0_[2][5] ));
  FDCE \retbuf_reg[2][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_58),
        .Q(\retbuf_reg_n_0_[2][6] ));
  FDCE \retbuf_reg[2][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_57),
        .Q(\retbuf_reg_n_0_[2][7] ));
  FDCE \retbuf_reg[31][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_58),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_115),
        .Q(\retbuf_reg_n_0_[31][0] ));
  FDCE \retbuf_reg[32][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_220),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_130),
        .Q(\retbuf_reg_n_0_[32][0] ));
  FDCE \retbuf_reg[32][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_220),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_129),
        .Q(\retbuf_reg_n_0_[32][1] ));
  FDCE \retbuf_reg[32][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_220),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_8),
        .Q(\retbuf_reg_n_0_[32][2] ));
  FDCE \retbuf_reg[32][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_220),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_27),
        .Q(\retbuf_reg_n_0_[32][3] ));
  FDCE \retbuf_reg[32][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_220),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_128),
        .Q(\retbuf_reg_n_0_[32][4] ));
  FDCE \retbuf_reg[32][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_220),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_127),
        .Q(\retbuf_reg_n_0_[32][5] ));
  FDCE \retbuf_reg[32][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_220),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_126),
        .Q(\retbuf_reg_n_0_[32][6] ));
  FDCE \retbuf_reg[32][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_220),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_3),
        .Q(\retbuf_reg_n_0_[32][7] ));
  FDCE \retbuf_reg[33][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_222),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_106),
        .Q(\retbuf_reg_n_0_[33][0] ));
  FDCE \retbuf_reg[33][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_222),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_105),
        .Q(\retbuf_reg_n_0_[33][1] ));
  FDCE \retbuf_reg[33][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_222),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_104),
        .Q(\retbuf_reg_n_0_[33][2] ));
  FDCE \retbuf_reg[33][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_222),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_103),
        .Q(\retbuf_reg_n_0_[33][3] ));
  FDCE \retbuf_reg[33][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_222),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_102),
        .Q(\retbuf_reg_n_0_[33][4] ));
  FDCE \retbuf_reg[33][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_222),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_101),
        .Q(\retbuf_reg_n_0_[33][5] ));
  FDCE \retbuf_reg[33][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_222),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_100),
        .Q(\retbuf_reg_n_0_[33][6] ));
  FDCE \retbuf_reg[33][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_222),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_99),
        .Q(\retbuf_reg_n_0_[33][7] ));
  FDCE \retbuf_reg[35][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_221),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_130),
        .Q(\retbuf_reg_n_0_[35][0] ));
  FDCE \retbuf_reg[35][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_221),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_129),
        .Q(\retbuf_reg_n_0_[35][1] ));
  FDCE \retbuf_reg[35][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_221),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_8),
        .Q(\retbuf_reg_n_0_[35][2] ));
  FDCE \retbuf_reg[35][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_221),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_27),
        .Q(\retbuf_reg_n_0_[35][3] ));
  FDCE \retbuf_reg[35][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_221),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_133),
        .Q(\retbuf_reg_n_0_[35][4] ));
  FDCE \retbuf_reg[35][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_221),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_127),
        .Q(\retbuf_reg_n_0_[35][5] ));
  FDCE \retbuf_reg[35][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_221),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_132),
        .Q(\retbuf_reg_n_0_[35][6] ));
  FDCE \retbuf_reg[35][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_221),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_3),
        .Q(\retbuf_reg_n_0_[35][7] ));
  FDCE \retbuf_reg[36][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_43),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_98),
        .Q(\retbuf_reg_n_0_[36][0] ));
  FDCE \retbuf_reg[36][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_43),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_97),
        .Q(\retbuf_reg_n_0_[36][1] ));
  FDCE \retbuf_reg[36][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_43),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_96),
        .Q(\retbuf_reg_n_0_[36][2] ));
  FDCE \retbuf_reg[36][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_43),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_95),
        .Q(\retbuf_reg_n_0_[36][3] ));
  FDCE \retbuf_reg[36][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_43),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_94),
        .Q(\retbuf_reg_n_0_[36][4] ));
  FDCE \retbuf_reg[36][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_43),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_93),
        .Q(\retbuf_reg_n_0_[36][5] ));
  FDCE \retbuf_reg[36][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_43),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_92),
        .Q(\retbuf_reg_n_0_[36][6] ));
  FDCE \retbuf_reg[36][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_43),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_91),
        .Q(\retbuf_reg_n_0_[36][7] ));
  FDCE \retbuf_reg[37][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_267),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_90),
        .Q(\retbuf_reg_n_0_[37][0] ));
  FDCE \retbuf_reg[37][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_267),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_89),
        .Q(\retbuf_reg_n_0_[37][1] ));
  FDCE \retbuf_reg[37][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_267),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_88),
        .Q(\retbuf_reg_n_0_[37][2] ));
  FDCE \retbuf_reg[37][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_267),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_87),
        .Q(\retbuf_reg_n_0_[37][3] ));
  FDCE \retbuf_reg[37][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_267),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_86),
        .Q(\retbuf_reg_n_0_[37][4] ));
  FDCE \retbuf_reg[37][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_267),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_85),
        .Q(\retbuf_reg_n_0_[37][5] ));
  FDCE \retbuf_reg[37][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_267),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_84),
        .Q(\retbuf_reg_n_0_[37][6] ));
  FDCE \retbuf_reg[37][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_267),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_83),
        .Q(\retbuf_reg_n_0_[37][7] ));
  FDCE \retbuf_reg[38][0] 
       (.C(aclk_sig),
        .CE(\opbuf[0]1 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_123),
        .Q(\retbuf_reg_n_0_[38][0] ));
  FDCE \retbuf_reg[38][1] 
       (.C(aclk_sig),
        .CE(\opbuf[0]1 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_122),
        .Q(\retbuf_reg_n_0_[38][1] ));
  FDCE \retbuf_reg[38][2] 
       (.C(aclk_sig),
        .CE(\opbuf[0]1 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_121),
        .Q(\retbuf_reg_n_0_[38][2] ));
  FDCE \retbuf_reg[38][3] 
       (.C(aclk_sig),
        .CE(\opbuf[0]1 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_120),
        .Q(\retbuf_reg_n_0_[38][3] ));
  FDCE \retbuf_reg[38][4] 
       (.C(aclk_sig),
        .CE(\opbuf[0]1 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_119),
        .Q(\retbuf_reg_n_0_[38][4] ));
  FDCE \retbuf_reg[38][5] 
       (.C(aclk_sig),
        .CE(\opbuf[0]1 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_118),
        .Q(\retbuf_reg_n_0_[38][5] ));
  FDCE \retbuf_reg[38][6] 
       (.C(aclk_sig),
        .CE(\opbuf[0]1 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_117),
        .Q(\retbuf_reg_n_0_[38][6] ));
  FDCE \retbuf_reg[38][7] 
       (.C(aclk_sig),
        .CE(\opbuf[0]1 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_116),
        .Q(\retbuf_reg_n_0_[38][7] ));
  FDCE \retbuf_reg[39][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_326),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_123),
        .Q(\retbuf_reg_n_0_[39][0] ));
  FDCE \retbuf_reg[39][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_326),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_122),
        .Q(\retbuf_reg_n_0_[39][1] ));
  FDCE \retbuf_reg[39][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_326),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_121),
        .Q(\retbuf_reg_n_0_[39][2] ));
  FDCE \retbuf_reg[39][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_326),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_120),
        .Q(\retbuf_reg_n_0_[39][3] ));
  FDCE \retbuf_reg[39][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_326),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_119),
        .Q(\retbuf_reg_n_0_[39][4] ));
  FDCE \retbuf_reg[39][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_326),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_118),
        .Q(\retbuf_reg_n_0_[39][5] ));
  FDCE \retbuf_reg[39][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_326),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_117),
        .Q(\retbuf_reg_n_0_[39][6] ));
  FDCE \retbuf_reg[39][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_326),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_116),
        .Q(\retbuf_reg_n_0_[39][7] ));
  FDCE \retbuf_reg[3][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_226),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_72),
        .Q(\retbuf_reg_n_0_[3][0] ));
  FDCE \retbuf_reg[3][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_226),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_71),
        .Q(\retbuf_reg_n_0_[3][1] ));
  FDCE \retbuf_reg[3][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_226),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_70),
        .Q(\retbuf_reg_n_0_[3][2] ));
  FDCE \retbuf_reg[3][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_226),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_69),
        .Q(\retbuf_reg_n_0_[3][3] ));
  FDCE \retbuf_reg[3][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_226),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_68),
        .Q(\retbuf_reg_n_0_[3][4] ));
  FDCE \retbuf_reg[3][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_226),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_67),
        .Q(\retbuf_reg_n_0_[3][5] ));
  FDCE \retbuf_reg[3][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_226),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_66),
        .Q(\retbuf_reg_n_0_[3][6] ));
  FDCE \retbuf_reg[3][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_226),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_65),
        .Q(\retbuf_reg_n_0_[3][7] ));
  FDCE \retbuf_reg[4][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_225),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_205),
        .Q(\retbuf_reg_n_0_[4][0] ));
  FDCE \retbuf_reg[4][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_225),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_204),
        .Q(\retbuf_reg_n_0_[4][1] ));
  FDCE \retbuf_reg[4][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_225),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_203),
        .Q(\retbuf_reg_n_0_[4][2] ));
  FDCE \retbuf_reg[4][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_225),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_202),
        .Q(\retbuf_reg_n_0_[4][3] ));
  FDCE \retbuf_reg[4][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_225),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_201),
        .Q(\retbuf_reg_n_0_[4][4] ));
  FDCE \retbuf_reg[4][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_225),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_200),
        .Q(\retbuf_reg_n_0_[4][5] ));
  FDCE \retbuf_reg[4][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_225),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_199),
        .Q(\retbuf_reg_n_0_[4][6] ));
  FDCE \retbuf_reg[4][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_225),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_198),
        .Q(\retbuf_reg_n_0_[4][7] ));
  FDCE \retbuf_reg[5][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_224),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_197),
        .Q(\retbuf_reg_n_0_[5][0] ));
  FDCE \retbuf_reg[5][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_224),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_196),
        .Q(\retbuf_reg_n_0_[5][1] ));
  FDCE \retbuf_reg[5][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_224),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_195),
        .Q(\retbuf_reg_n_0_[5][2] ));
  FDCE \retbuf_reg[5][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_224),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_194),
        .Q(\retbuf_reg_n_0_[5][3] ));
  FDCE \retbuf_reg[5][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_224),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_193),
        .Q(\retbuf_reg_n_0_[5][4] ));
  FDCE \retbuf_reg[5][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_224),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_192),
        .Q(\retbuf_reg_n_0_[5][5] ));
  FDCE \retbuf_reg[5][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_224),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_191),
        .Q(\retbuf_reg_n_0_[5][6] ));
  FDCE \retbuf_reg[5][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_224),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_190),
        .Q(\retbuf_reg_n_0_[5][7] ));
  FDCE \retbuf_reg[6][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_80),
        .Q(\retbuf_reg_n_0_[6][0] ));
  FDCE \retbuf_reg[6][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_79),
        .Q(\retbuf_reg_n_0_[6][1] ));
  FDCE \retbuf_reg[6][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_78),
        .Q(\retbuf_reg_n_0_[6][2] ));
  FDCE \retbuf_reg[6][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_77),
        .Q(\retbuf_reg_n_0_[6][3] ));
  FDCE \retbuf_reg[6][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_76),
        .Q(\retbuf_reg_n_0_[6][4] ));
  FDCE \retbuf_reg[6][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_75),
        .Q(\retbuf_reg_n_0_[6][5] ));
  FDCE \retbuf_reg[6][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_74),
        .Q(\retbuf_reg_n_0_[6][6] ));
  FDCE \retbuf_reg[6][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_59),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_73),
        .Q(\retbuf_reg_n_0_[6][7] ));
  FDCE \retbuf_reg[7][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_219),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_130),
        .Q(\retbuf_reg[7]_48 [0]));
  FDCE \retbuf_reg[7][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_219),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_129),
        .Q(\retbuf_reg[7]_48 [1]));
  FDCE \retbuf_reg[7][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_219),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_8),
        .Q(\retbuf_reg[7]_48 [2]));
  FDCE \retbuf_reg[7][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_219),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_27),
        .Q(\retbuf_reg[7]_48 [3]));
  FDCE \retbuf_reg[7][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_219),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_133),
        .Q(\retbuf_reg[7]_48 [4]));
  FDCE \retbuf_reg[7][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_219),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_127),
        .Q(\retbuf_reg[7]_48 [5]));
  FDCE \retbuf_reg[7][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_219),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_132),
        .Q(\retbuf_reg[7]_48 [6]));
  FDCE \retbuf_reg[7][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_219),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_3),
        .Q(\retbuf_reg[7]_48 [7]));
  FDCE \retbuf_reg[8][0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_223),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_114),
        .Q(\retbuf_reg_n_0_[8][0] ));
  FDCE \retbuf_reg[8][1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_223),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_113),
        .Q(\retbuf_reg_n_0_[8][1] ));
  FDCE \retbuf_reg[8][2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_223),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_112),
        .Q(\retbuf_reg_n_0_[8][2] ));
  FDCE \retbuf_reg[8][3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_223),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_111),
        .Q(\retbuf_reg_n_0_[8][3] ));
  FDCE \retbuf_reg[8][4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_223),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_110),
        .Q(\retbuf_reg_n_0_[8][4] ));
  FDCE \retbuf_reg[8][5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_223),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_109),
        .Q(\retbuf_reg_n_0_[8][5] ));
  FDCE \retbuf_reg[8][6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_223),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_108),
        .Q(\retbuf_reg_n_0_[8][6] ));
  FDCE \retbuf_reg[8][7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_223),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_107),
        .Q(\retbuf_reg_n_0_[8][7] ));
  (* SOFT_HLUTNM = "soft_lutpair2834" *) 
  LUT5 #(
    .INIT(32'h01000082)) 
    \rxlen[1]_i_3 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(Q[3]),
        .O(\rxlen[1]_i_3_n_0 ));
  FDCE \rxlen_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_131),
        .Q(rxlen));
  (* SOFT_HLUTNM = "soft_lutpair2828" *) 
  LUT5 #(
    .INIT(32'h7FC07CC0)) 
    \stateOp[0]_i_5__0 
       (.I0(\stateOp_reg[4]_i_5_n_5 ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(crcAXIS_tlast_sig_reg_n_0),
        .O(\stateOp[0]_i_5__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2828" *) 
  LUT3 #(
    .INIT(8'hC8)) 
    \stateOp[0]_i_7__0 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(crcAXIS_tlast_sig_reg_n_0),
        .O(\stateOp[0]_i_7__0_n_0 ));
  LUT6 #(
    .INIT(64'hBFAAAABFBFBAAABF)) 
    \stateOp[1]_i_3__3 
       (.I0(Q[4]),
        .I1(Q[3]),
        .I2(Q[2]),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(stateOp_next[1]),
        .O(\stateOp[1]_i_3__3_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp[1]_i_4__4 
       (.I0(Q[4]),
        .I1(Q[3]),
        .O(\stateOp[1]_i_4__4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF9391FFFFFFFF)) 
    \stateOp[2]_i_4__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .I3(crcAXIS_tlast_sig_reg_n_0),
        .I4(Q[3]),
        .I5(Q[4]),
        .O(\stateOp[2]_i_4__1_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_6__0 
       (.I0(\tixVBuffer_reg_n_0_[5] ),
        .I1(\tixVBuffer_reg_n_0_[4] ),
        .I2(\tixVBuffer_reg_n_0_[6] ),
        .I3(\tixVBuffer_reg_n_0_[7] ),
        .O(\stateOp[2]_i_6__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000FF000000CB00)) 
    \stateOp[3]_i_3__0 
       (.I0(crcAXIS_tlast_sig_reg_n_0),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[4]),
        .I4(Q[3]),
        .I5(Q[2]),
        .O(\stateOp[3]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2870" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \stateOp[3]_i_5__0 
       (.I0(Q[1]),
        .I1(Q[0]),
        .O(\stateOp[3]_i_5__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2845" *) 
  LUT3 #(
    .INIT(8'h8A)) 
    \stateOp[3]_i_6__0 
       (.I0(Q[4]),
        .I1(Q[3]),
        .I2(Q[2]),
        .O(\stateOp[3]_i_6__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF1FFF00001FFF)) 
    \stateOp[3]_i_7__0 
       (.I0(stateOp_next[3]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[1]),
        .I4(Q[3]),
        .I5(Q[4]),
        .O(\stateOp[3]_i_7__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2844" *) 
  LUT4 #(
    .INIT(16'hFFEF)) 
    \stateOp[3]_i_9 
       (.I0(Q[0]),
        .I1(Q[2]),
        .I2(Q[4]),
        .I3(Q[1]),
        .O(\stateOp[3]_i_9_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \stateOp[4]_i_12 
       (.I0(\wordcnt_reg_n_0_[30] ),
        .O(\stateOp[4]_i_12_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp[4]_i_13 
       (.I0(\wordcnt_reg_n_0_[28] ),
        .I1(\wordcnt_reg_n_0_[29] ),
        .I2(\wordcnt_reg_n_0_[27] ),
        .O(\stateOp[4]_i_13_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp[4]_i_14 
       (.I0(\opbuf_reg[0]51_in [30]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [29]),
        .O(\stateOp[4]_i_14_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2834" *) 
  LUT5 #(
    .INIT(32'h00B7FDB6)) 
    \stateOp[4]_i_15 
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[3]),
        .I4(Q[4]),
        .O(\stateOp[4]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2832" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \stateOp[4]_i_16 
       (.I0(\tixVCommand_reg_n_0_[0] ),
        .I1(\tixVCommand_reg_n_0_[1] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\stateOp_next[3]_i_3_n_0 ),
        .O(\stateOp[4]_i_16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2833" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[4]_i_17 
       (.I0(\tixVController_reg_n_0_[3] ),
        .I1(\tixVController_reg_n_0_[4] ),
        .I2(\tixVController_reg_n_0_[5] ),
        .I3(\tixVController_reg_n_0_[7] ),
        .I4(\tixVController_reg_n_0_[6] ),
        .O(\stateOp[4]_i_17_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \stateOp[4]_i_18 
       (.I0(\stateOp_next[4]_i_4__0_n_0 ),
        .I1(\stateOp_next[3]_i_2_n_0 ),
        .O(\stateOp[4]_i_18_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp[4]_i_20 
       (.I0(\opbuf_reg[0]51_in [26]),
        .I1(\opbuf_reg[0]51_in [28]),
        .I2(\opbuf_reg[0]51_in [27]),
        .O(\stateOp[4]_i_20_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp[4]_i_21 
       (.I0(\opbuf_reg[0]51_in [24]),
        .I1(\opbuf_reg[0]51_in [25]),
        .I2(\opbuf_reg[0]51_in [23]),
        .O(\stateOp[4]_i_21_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp[4]_i_22 
       (.I0(\opbuf_reg[0]51_in [20]),
        .I1(\opbuf_reg[0]51_in [22]),
        .I2(\opbuf_reg[0]51_in [21]),
        .O(\stateOp[4]_i_22_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp[4]_i_23 
       (.I0(\opbuf_reg[0]51_in [17]),
        .I1(\opbuf_reg[0]51_in [19]),
        .I2(\opbuf_reg[0]51_in [18]),
        .O(\stateOp[4]_i_23_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp[4]_i_24 
       (.I0(\opbuf_reg[0]51_in [14]),
        .I1(\opbuf_reg[0]51_in [16]),
        .I2(\opbuf_reg[0]51_in [15]),
        .O(\stateOp[4]_i_24_n_0 ));
  LUT3 #(
    .INIT(8'h01)) 
    \stateOp[4]_i_25 
       (.I0(\opbuf_reg[0]51_in [12]),
        .I1(\opbuf_reg[0]51_in [13]),
        .I2(\opbuf_reg[0]51_in [11]),
        .O(\stateOp[4]_i_25_n_0 ));
  LUT4 #(
    .INIT(16'h1001)) 
    \stateOp[4]_i_26 
       (.I0(\opbuf_reg[0]51_in [10]),
        .I1(\opbuf_reg[0]51_in [9]),
        .I2(\wordcntLast_reg_n_0_[3] ),
        .I3(\opbuf_reg[0]51_in [8]),
        .O(\stateOp[4]_i_26_n_0 ));
  LUT5 #(
    .INIT(32'h09000009)) 
    \stateOp[4]_i_27 
       (.I0(\opbuf_reg[0]51_in [6]),
        .I1(\wordcntLast_reg_n_0_[1] ),
        .I2(\opbuf_reg[0]51_in [7]),
        .I3(\wordcntLast_reg_n_0_[0] ),
        .I4(\opbuf_reg[0]51_in [5]),
        .O(\stateOp[4]_i_27_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2835" *) 
  LUT5 #(
    .INIT(32'h1008C400)) 
    \stateOp[4]_i_3 
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[3]),
        .I3(Q[0]),
        .I4(Q[4]),
        .O(\stateOp[4]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2829" *) 
  LUT5 #(
    .INIT(32'h01FF37BE)) 
    \stateOp[4]_i_4__0 
       (.I0(Q[1]),
        .I1(Q[4]),
        .I2(Q[2]),
        .I3(Q[3]),
        .I4(Q[0]),
        .O(\stateOp[4]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000000055555155)) 
    \stateOp[4]_i_6__0 
       (.I0(\stateOp[4]_i_15_n_0 ),
        .I1(\stateOp[4]_i_16_n_0 ),
        .I2(\tixVController_reg_n_0_[1] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .I4(\stateOp[4]_i_17_n_0 ),
        .I5(\stateOp[4]_i_18_n_0 ),
        .O(\stateOp[4]_i_6__0_n_0 ));
  LUT6 #(
    .INIT(64'h4000500840004008)) 
    \stateOp[4]_i_9 
       (.I0(Q[4]),
        .I1(Q[3]),
        .I2(Q[2]),
        .I3(Q[1]),
        .I4(Q[0]),
        .I5(stateOp_next[4]),
        .O(\stateOp[4]_i_9_n_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp_next[0]_i_2 
       (.I0(\stateOp_next[4]_i_3__0_n_0 ),
        .I1(\stateOp_next[2]_i_3_n_0 ),
        .O(\stateOp_next[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFEFF)) 
    \stateOp_next[2]_i_2 
       (.I0(\stateOp_next[2]_i_4_n_0 ),
        .I1(\len_reg_n_0_[14] ),
        .I2(\tixVBuffer_reg_n_0_[1] ),
        .I3(\tixVBuffer_reg_n_0_[0] ),
        .I4(\len_reg_n_0_[12] ),
        .I5(\stateOp_next[2]_i_5_n_0 ),
        .O(\stateOp_next[2]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000020)) 
    \stateOp_next[2]_i_3 
       (.I0(\stateOp_next[2]_i_6_n_0 ),
        .I1(\stateOp_next[2]_i_7_n_0 ),
        .I2(tixVBufxfop[0]),
        .I3(tixVBufxfop[3]),
        .I4(tixVBufxfop[6]),
        .I5(tixVBufxfop[7]),
        .O(\stateOp_next[2]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp_next[2]_i_4 
       (.I0(\tixVBuffer_reg_n_0_[3] ),
        .I1(\tixVBuffer_reg_n_0_[2] ),
        .I2(\len_reg_n_0_[6] ),
        .I3(\len_reg_n_0_[7] ),
        .O(\stateOp_next[2]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp_next[2]_i_5 
       (.I0(\stateOp_next[2]_i_8_n_0 ),
        .I1(\len_reg_n_0_[10] ),
        .I2(\len_reg_n_0_[9] ),
        .I3(\len_reg_n_0_[2] ),
        .I4(\stateOp_next[2]_i_9_n_0 ),
        .I5(\stateOp[2]_i_6__0_n_0 ),
        .O(\stateOp_next[2]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h00000001)) 
    \stateOp_next[2]_i_6 
       (.I0(\stateOp[2]_i_6__0_n_0 ),
        .I1(\tixVBuffer_reg_n_0_[0] ),
        .I2(\tixVBuffer_reg_n_0_[1] ),
        .I3(\tixVBuffer_reg_n_0_[2] ),
        .I4(\tixVBuffer_reg_n_0_[3] ),
        .O(\stateOp_next[2]_i_6_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp_next[2]_i_7 
       (.I0(tixVBufxfop[1]),
        .I1(tixVBufxfop[2]),
        .I2(tixVBufxfop[5]),
        .I3(tixVBufxfop[4]),
        .O(\stateOp_next[2]_i_7_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp_next[2]_i_8 
       (.I0(\len_reg_n_0_[13] ),
        .I1(\len_reg_n_0_[15] ),
        .I2(\len_reg_n_0_[8] ),
        .I3(\len_reg_n_0_[11] ),
        .O(\stateOp_next[2]_i_8_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp_next[2]_i_9 
       (.I0(\len_reg_n_0_[5] ),
        .I1(\len_reg_n_0_[0] ),
        .I2(\len_reg_n_0_[4] ),
        .I3(\len_reg_n_0_[3] ),
        .O(\stateOp_next[2]_i_9_n_0 ));
  LUT6 #(
    .INIT(64'h0000000002000000)) 
    \stateOp_next[3]_i_2 
       (.I0(\tixVCommand_reg_n_0_[1] ),
        .I1(\stateOp_next[3]_i_3_n_0 ),
        .I2(\stateOp_next[3]_i_4_n_0 ),
        .I3(\tixVCommand_reg_n_0_[0] ),
        .I4(\tixVController_reg_n_0_[3] ),
        .I5(\stateOp_next[3]_i_5_n_0 ),
        .O(\stateOp_next[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp_next[3]_i_3 
       (.I0(\tixVCommand_reg_n_0_[2] ),
        .I1(\tixVCommand_reg_n_0_[5] ),
        .I2(\tixVCommand_reg_n_0_[6] ),
        .I3(\tixVCommand_reg_n_0_[7] ),
        .I4(\tixVCommand_reg_n_0_[3] ),
        .I5(\tixVCommand_reg_n_0_[4] ),
        .O(\stateOp_next[3]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2843" *) 
  LUT3 #(
    .INIT(8'hFB)) 
    \stateOp_next[3]_i_4 
       (.I0(\tixVController_reg_n_0_[0] ),
        .I1(\tixVController_reg_n_0_[2] ),
        .I2(\tixVController_reg_n_0_[1] ),
        .O(\stateOp_next[3]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2833" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp_next[3]_i_5 
       (.I0(\tixVController_reg_n_0_[6] ),
        .I1(\tixVController_reg_n_0_[7] ),
        .I2(\tixVController_reg_n_0_[5] ),
        .I3(\tixVController_reg_n_0_[4] ),
        .O(\stateOp_next[3]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hDEDEDEDEDEDEDEDF)) 
    \stateOp_next[4]_i_3__0 
       (.I0(\stateOp_next[3]_i_2_n_0 ),
        .I1(\stateOp_next[2]_i_2_n_0 ),
        .I2(\len_reg_n_0_[1] ),
        .I3(\stateOp_next[4]_i_4__0_n_0 ),
        .I4(\ixRetbufCrc[2]_i_2_n_0 ),
        .I5(lenRet1),
        .O(\stateOp_next[4]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2842" *) 
  LUT4 #(
    .INIT(16'h0002)) 
    \stateOp_next[4]_i_4__0 
       (.I0(\stateOp_next[4]_i_5__0_n_0 ),
        .I1(\tixVCommand_reg_n_0_[0] ),
        .I2(\tixVCommand_reg_n_0_[1] ),
        .I3(\stateOp_next[4]_i_6__0_n_0 ),
        .O(\stateOp_next[4]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2843" *) 
  LUT4 #(
    .INIT(16'h0010)) 
    \stateOp_next[4]_i_5__0 
       (.I0(\stateOp[4]_i_17_n_0 ),
        .I1(\tixVController_reg_n_0_[1] ),
        .I2(\tixVController_reg_n_0_[2] ),
        .I3(\tixVController_reg_n_0_[0] ),
        .O(\stateOp_next[4]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp_next[4]_i_6__0 
       (.I0(\tixVCommand_reg_n_0_[4] ),
        .I1(\tixVCommand_reg_n_0_[3] ),
        .I2(\tixVCommand_reg_n_0_[7] ),
        .I3(\tixVCommand_reg_n_0_[6] ),
        .I4(\tixVCommand_reg_n_0_[5] ),
        .O(\stateOp_next[4]_i_6__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_next_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_327),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_129),
        .Q(stateOp_next[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_next_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_327),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_128),
        .Q(stateOp_next[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_next_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_327),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_127),
        .Q(stateOp_next[2]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_next_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_327),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_126),
        .Q(stateOp_next[3]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_next_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_327),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_125),
        .Q(stateOp_next[4]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_178),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_185),
        .Q(Q[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_178),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_184),
        .Q(Q[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_178),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_183),
        .Q(Q[2]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_178),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_182),
        .Q(Q[3]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_178),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_181),
        .Q(Q[4]));
  CARRY8 \stateOp_reg[4]_i_11 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\stateOp_reg[4]_i_11_n_0 ,\stateOp_reg[4]_i_11_n_1 ,\stateOp_reg[4]_i_11_n_2 ,\stateOp_reg[4]_i_11_n_3 ,\stateOp_reg[4]_i_11_n_4 ,\stateOp_reg[4]_i_11_n_5 ,\stateOp_reg[4]_i_11_n_6 ,\stateOp_reg[4]_i_11_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_stateOp_reg[4]_i_11_O_UNCONNECTED [7:0]),
        .S({\stateOp[4]_i_20_n_0 ,\stateOp[4]_i_21_n_0 ,\stateOp[4]_i_22_n_0 ,\stateOp[4]_i_23_n_0 ,\stateOp[4]_i_24_n_0 ,\stateOp[4]_i_25_n_0 ,\stateOp[4]_i_26_n_0 ,\stateOp[4]_i_27_n_0 }));
  CARRY8 \stateOp_reg[4]_i_5 
       (.CI(\stateOp_reg[4]_i_11_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_stateOp_reg[4]_i_5_CO_UNCONNECTED [7:3],\stateOp_reg[4]_i_5_n_5 ,\stateOp_reg[4]_i_5_n_6 ,\stateOp_reg[4]_i_5_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_stateOp_reg[4]_i_5_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,\stateOp[4]_i_12_n_0 ,\stateOp[4]_i_13_n_0 ,\stateOp[4]_i_14_n_0 }));
  FDCE \tixVBuffer_reg[0] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_275),
        .Q(\tixVBuffer_reg_n_0_[0] ));
  FDCE \tixVBuffer_reg[1] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_274),
        .Q(\tixVBuffer_reg_n_0_[1] ));
  FDCE \tixVBuffer_reg[2] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_273),
        .Q(\tixVBuffer_reg_n_0_[2] ));
  FDCE \tixVBuffer_reg[3] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_272),
        .Q(\tixVBuffer_reg_n_0_[3] ));
  FDCE \tixVBuffer_reg[4] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_271),
        .Q(\tixVBuffer_reg_n_0_[4] ));
  FDCE \tixVBuffer_reg[5] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_270),
        .Q(\tixVBuffer_reg_n_0_[5] ));
  FDCE \tixVBuffer_reg[6] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_269),
        .Q(\tixVBuffer_reg_n_0_[6] ));
  FDCE \tixVBuffer_reg[7] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_268),
        .Q(\tixVBuffer_reg_n_0_[7] ));
  FDCE \tixVBufxfop_reg[0] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_335),
        .Q(tixVBufxfop[0]));
  FDCE \tixVBufxfop_reg[1] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_334),
        .Q(tixVBufxfop[1]));
  FDCE \tixVBufxfop_reg[2] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_333),
        .Q(tixVBufxfop[2]));
  FDCE \tixVBufxfop_reg[3] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_332),
        .Q(tixVBufxfop[3]));
  FDCE \tixVBufxfop_reg[4] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_331),
        .Q(tixVBufxfop[4]));
  FDCE \tixVBufxfop_reg[5] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_330),
        .Q(tixVBufxfop[5]));
  FDCE \tixVBufxfop_reg[6] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_329),
        .Q(tixVBufxfop[6]));
  FDCE \tixVBufxfop_reg[7] 
       (.C(aclk_sig),
        .CE(myCrc_n_2),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_328),
        .Q(tixVBufxfop[7]));
  FDCE \tixVCommand_reg[0] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_335),
        .Q(\tixVCommand_reg_n_0_[0] ));
  FDCE \tixVCommand_reg[1] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_334),
        .Q(\tixVCommand_reg_n_0_[1] ));
  FDCE \tixVCommand_reg[2] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_333),
        .Q(\tixVCommand_reg_n_0_[2] ));
  FDCE \tixVCommand_reg[3] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_332),
        .Q(\tixVCommand_reg_n_0_[3] ));
  FDCE \tixVCommand_reg[4] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_331),
        .Q(\tixVCommand_reg_n_0_[4] ));
  FDCE \tixVCommand_reg[5] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_330),
        .Q(\tixVCommand_reg_n_0_[5] ));
  FDCE \tixVCommand_reg[6] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_329),
        .Q(\tixVCommand_reg_n_0_[6] ));
  FDCE \tixVCommand_reg[7] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_328),
        .Q(\tixVCommand_reg_n_0_[7] ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \tixVController[7]_i_4__0 
       (.I0(\tixVController[7]_i_5__0_n_0 ),
        .I1(\tixVController[7]_i_6__0_n_0 ),
        .I2(\tixVController[7]_i_7_n_0 ),
        .I3(\opbuf_reg_n_0_[2][7] ),
        .I4(\opbuf_reg_n_0_[0][6] ),
        .I5(\opbuf_reg_n_0_[2][2] ),
        .O(\tixVController[7]_i_4__0_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \tixVController[7]_i_5__0 
       (.I0(\opbuf_reg_n_0_[2][6] ),
        .I1(\opbuf_reg_n_0_[2][3] ),
        .I2(\opbuf_reg_n_0_[0][0] ),
        .I3(\opbuf_reg_n_0_[2][5] ),
        .O(\tixVController[7]_i_5__0_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \tixVController[7]_i_6__0 
       (.I0(\opbuf_reg_n_0_[0][4] ),
        .I1(\opbuf_reg_n_0_[0][1] ),
        .I2(\opbuf_reg_n_0_[0][7] ),
        .I3(\opbuf_reg_n_0_[2][4] ),
        .O(\tixVController[7]_i_6__0_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \tixVController[7]_i_7 
       (.I0(\opbuf_reg_n_0_[0][3] ),
        .I1(\opbuf_reg_n_0_[0][2] ),
        .I2(\opbuf_reg_n_0_[0][5] ),
        .I3(\opbuf_reg_n_0_[2][1] ),
        .O(\tixVController[7]_i_7_n_0 ));
  FDCE \tixVController_reg[0] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_323),
        .Q(\tixVController_reg_n_0_[0] ));
  FDCE \tixVController_reg[1] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_322),
        .Q(\tixVController_reg_n_0_[1] ));
  FDCE \tixVController_reg[2] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_321),
        .Q(\tixVController_reg_n_0_[2] ));
  FDCE \tixVController_reg[3] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_320),
        .Q(\tixVController_reg_n_0_[3] ));
  FDCE \tixVController_reg[4] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_319),
        .Q(\tixVController_reg_n_0_[4] ));
  FDCE \tixVController_reg[5] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_318),
        .Q(\tixVController_reg_n_0_[5] ));
  FDCE \tixVController_reg[6] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_317),
        .Q(\tixVController_reg_n_0_[6] ));
  FDCE \tixVController_reg[7] 
       (.C(aclk_sig),
        .CE(tixVCommand),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_316),
        .Q(\tixVController_reg_n_0_[7] ));
  LUT5 #(
    .INIT(32'h8BBB8B88)) 
    \txAXIS_tdata[0]_i_2__0 
       (.I0(\txAXIS_tdata[0]_i_4__0_n_0 ),
        .I1(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I2(\retbuf_reg_n_0_[31][0] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\txAXIS_tdata[0]_i_5_n_0 ),
        .O(\txAXIS_tdata[0]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'h1015DFD5)) 
    \txAXIS_tdata[0]_i_4__0 
       (.I0(\retbuf_reg_n_0_[32][0] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\retbuf_reg_n_0_[36][0] ),
        .O(\txAXIS_tdata[0]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[0]_i_5 
       (.I0(\retbuf_reg_n_0_[31][0] ),
        .I1(\retbuf_reg_n_0_[8][0] ),
        .I2(\txAXIS_tdata[31]_i_11_n_0 ),
        .I3(\retbuf_reg_n_0_[4][0] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][0] ),
        .O(\txAXIS_tdata[0]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h888AAA8A88888888)) 
    \txAXIS_tdata[10]_i_3__0 
       (.I0(\txAXIS_tdata[26]_i_4__0_n_0 ),
        .I1(\txAXIS_tdata[10]_i_6__0_n_0 ),
        .I2(\retbuf_reg_n_0_[15][2] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[11][2] ),
        .I5(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .O(\txAXIS_tdata[10]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \txAXIS_tdata[10]_i_4__0 
       (.I0(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I1(\retbuf_reg_n_0_[33][2] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[37][2] ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][2] ),
        .O(\txAXIS_tdata[10]_i_4__0_n_0 ));
  LUT5 #(
    .INIT(32'hAAAABABF)) 
    \txAXIS_tdata[10]_i_6__0 
       (.I0(\txAXIS_tdata[31]_i_11_n_0 ),
        .I1(\retbuf_reg_n_0_[5][2] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[1][2] ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .O(\txAXIS_tdata[10]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2855" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \txAXIS_tdata[11]_i_2__0 
       (.I0(\pollbuf_reg[5]_53 [3]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\pollbuf_reg[1]_50 [3]),
        .O(\txAXIS_tdata[11]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'hEF89EFEF67010101)) 
    \txAXIS_tdata[11]_i_5__0 
       (.I0(\txAXIS_tdata[31]_i_11_n_0 ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\txAXIS_tdata[11]_i_7__0_n_0 ),
        .I3(\retbuf_reg_n_0_[15][3] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[11][3] ),
        .O(\txAXIS_tdata[11]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \txAXIS_tdata[11]_i_6__0 
       (.I0(\retbuf_reg_n_0_[0][3] ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\retbuf_reg_n_0_[37][3] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[33][3] ),
        .O(\txAXIS_tdata[11]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2855" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[11]_i_7__0 
       (.I0(\retbuf_reg_n_0_[5][3] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[1][3] ),
        .O(\txAXIS_tdata[11]_i_7__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2856" *) 
  LUT3 #(
    .INIT(8'h1D)) 
    \txAXIS_tdata[12]_i_2__0 
       (.I0(\pollbuf_reg[1]_50 [4]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\pollbuf_reg[5]_53 [4]),
        .O(\txAXIS_tdata[12]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h505FCFCF505FC0C0)) 
    \txAXIS_tdata[12]_i_3__0 
       (.I0(\retbuf_reg_n_0_[0][4] ),
        .I1(\txAXIS_tdata[12]_i_5__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I3(\retbuf_reg_n_0_[14][4] ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\txAXIS_tdata[12]_i_6__0_n_0 ),
        .O(\txAXIS_tdata[12]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2856" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[12]_i_5__0 
       (.I0(\retbuf_reg_n_0_[37][4] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[33][4] ),
        .O(\txAXIS_tdata[12]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'h47444777)) 
    \txAXIS_tdata[12]_i_6__0 
       (.I0(\retbuf_reg_n_0_[11][4] ),
        .I1(\txAXIS_tdata[31]_i_11_n_0 ),
        .I2(\retbuf_reg_n_0_[5][4] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[1][4] ),
        .O(\txAXIS_tdata[12]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2857" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \txAXIS_tdata[13]_i_3__0 
       (.I0(\pollbuf_reg[5]_53 [5]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\pollbuf_reg[1]_50 [5]),
        .O(\txAXIS_tdata[13]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFB8000000B8)) 
    \txAXIS_tdata[13]_i_5__0 
       (.I0(\retbuf_reg_n_0_[5][5] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[1][5] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\txAXIS_tdata[31]_i_11_n_0 ),
        .I5(\retbuf_reg_n_0_[11][5] ),
        .O(\txAXIS_tdata[13]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \txAXIS_tdata[13]_i_6__0 
       (.I0(\retbuf_reg_n_0_[0][5] ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\retbuf_reg_n_0_[37][5] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[33][5] ),
        .O(\txAXIS_tdata[13]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2857" *) 
  LUT3 #(
    .INIT(8'h1D)) 
    \txAXIS_tdata[14]_i_2__0 
       (.I0(\pollbuf_reg[1]_50 [6]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\pollbuf_reg[5]_53 [6]),
        .O(\txAXIS_tdata[14]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h0C0022223FFFEEEE)) 
    \txAXIS_tdata[14]_i_5__0 
       (.I0(\txAXIS_tdata[14]_i_7__0_n_0 ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\retbuf_reg_n_0_[23][6] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\txAXIS_tdata[31]_i_11_n_0 ),
        .I5(\retbuf_reg_n_0_[11][6] ),
        .O(\txAXIS_tdata[14]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'h47444777)) 
    \txAXIS_tdata[14]_i_6__0 
       (.I0(\retbuf_reg_n_0_[0][6] ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\retbuf_reg_n_0_[37][6] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[33][6] ),
        .O(\txAXIS_tdata[14]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2858" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[14]_i_7__0 
       (.I0(\retbuf_reg_n_0_[5][6] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[1][6] ),
        .O(\txAXIS_tdata[14]_i_7__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2858" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \txAXIS_tdata[15]_i_4__0 
       (.I0(\pollbuf_reg[5]_53 [7]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\pollbuf_reg[1]_50 [7]),
        .O(\txAXIS_tdata[15]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFB8000000B8)) 
    \txAXIS_tdata[15]_i_6__0 
       (.I0(\retbuf_reg_n_0_[5][7] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[1][7] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\txAXIS_tdata[31]_i_11_n_0 ),
        .I5(\retbuf_reg_n_0_[11][7] ),
        .O(\txAXIS_tdata[15]_i_6__0_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \txAXIS_tdata[15]_i_7__0 
       (.I0(\retbuf_reg_n_0_[0][7] ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\retbuf_reg_n_0_[37][7] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[33][7] ),
        .O(\txAXIS_tdata[15]_i_7__0_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFEA00EA)) 
    \txAXIS_tdata[16]_i_2__0 
       (.I0(\txAXIS_tdata[16]_i_3__0_n_0 ),
        .I1(\txAXIS_tdata[31]_i_11_n_0 ),
        .I2(\retbuf_reg_n_0_[11][0] ),
        .I3(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I4(\txAXIS_tdata[16]_i_4__0_n_0 ),
        .I5(\txAXIS_tdata[31]_i_7__0_n_0 ),
        .O(\txAXIS_tdata[16]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000FFB8B8)) 
    \txAXIS_tdata[16]_i_3__0 
       (.I0(\retbuf_reg_n_0_[6][0] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[2][0] ),
        .I3(\txAXIS_tdata[16]_i_5__0_n_0 ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\txAXIS_tdata[31]_i_11_n_0 ),
        .O(\txAXIS_tdata[16]_i_3__0_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \txAXIS_tdata[16]_i_4__0 
       (.I0(\retbuf_reg_n_0_[0][0] ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\retbuf_reg_n_0_[38][0] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[31][0] ),
        .O(\txAXIS_tdata[16]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2859" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[16]_i_5__0 
       (.I0(\retbuf_reg_n_0_[31][0] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[11][0] ),
        .O(\txAXIS_tdata[16]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFDDD111D1)) 
    \txAXIS_tdata[17]_i_2__0 
       (.I0(\txAXIS_tdata[17]_i_5__0_n_0 ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\retbuf_reg_n_0_[11][1] ),
        .I3(\txAXIS_tdata[31]_i_11_n_0 ),
        .I4(\retbuf_reg_n_0_[15][1] ),
        .I5(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .O(\txAXIS_tdata[17]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \txAXIS_tdata[17]_i_3__0 
       (.I0(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I1(\retbuf_reg_n_0_[11][1] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[38][1] ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][1] ),
        .O(\txAXIS_tdata[17]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h0F000FFF55335533)) 
    \txAXIS_tdata[17]_i_5__0 
       (.I0(\retbuf_reg_n_0_[6][1] ),
        .I1(\retbuf_reg_n_0_[2][1] ),
        .I2(\retbuf_reg_n_0_[15][1] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[11][1] ),
        .I5(\txAXIS_tdata[31]_i_11_n_0 ),
        .O(\txAXIS_tdata[17]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000015155550151)) 
    \txAXIS_tdata[18]_i_2__0 
       (.I0(\txAXIS_tdata[31]_i_7__0_n_0 ),
        .I1(\txAXIS_tdata[18]_i_3__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I3(\txAXIS_tdata[18]_i_4__0_n_0 ),
        .I4(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I5(\txAXIS_tdata[18]_i_5__0_n_0 ),
        .O(\txAXIS_tdata[18]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'h47444777)) 
    \txAXIS_tdata[18]_i_3__0 
       (.I0(\retbuf_reg_n_0_[11][2] ),
        .I1(\txAXIS_tdata[31]_i_11_n_0 ),
        .I2(\retbuf_reg_n_0_[6][2] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[2][2] ),
        .O(\txAXIS_tdata[18]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2840" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[18]_i_4__0 
       (.I0(\retbuf_reg_n_0_[15][2] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[11][2] ),
        .O(\txAXIS_tdata[18]_i_4__0_n_0 ));
  LUT5 #(
    .INIT(32'h0047FF47)) 
    \txAXIS_tdata[18]_i_5__0 
       (.I0(\retbuf_reg_n_0_[38][2] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[11][2] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\retbuf_reg_n_0_[0][2] ),
        .O(\txAXIS_tdata[18]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h5555540400005404)) 
    \txAXIS_tdata[19]_i_2__0 
       (.I0(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I1(\retbuf_reg_n_0_[2][3] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[6][3] ),
        .I4(\txAXIS_tdata[31]_i_11_n_0 ),
        .I5(\retbuf_reg_n_0_[11][3] ),
        .O(\txAXIS_tdata[19]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \txAXIS_tdata[19]_i_3__0 
       (.I0(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I1(\retbuf_reg_n_0_[15][3] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[38][3] ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][3] ),
        .O(\txAXIS_tdata[19]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FF8D008D)) 
    \txAXIS_tdata[1]_i_3__0 
       (.I0(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I1(\retbuf_reg_n_0_[11][1] ),
        .I2(\txAXIS_tdata[1]_i_5__0_n_0 ),
        .I3(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I4(\txAXIS_tdata[1]_i_6_n_0 ),
        .I5(Q[1]),
        .O(\txAXIS_tdata[1]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hEEEEEEEEDFDDDFFF)) 
    \txAXIS_tdata[1]_i_4__0 
       (.I0(Q[3]),
        .I1(\txAXIS_tdata[7]_i_10_n_0 ),
        .I2(\pollbuf_reg[4]_52 [1]),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\pollbuf_reg[0]_49 [1]),
        .I5(Q[4]),
        .O(\txAXIS_tdata[1]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[1]_i_5__0 
       (.I0(\retbuf_reg_n_0_[11][1] ),
        .I1(\retbuf_reg_n_0_[8][1] ),
        .I2(\txAXIS_tdata[31]_i_11_n_0 ),
        .I3(\retbuf_reg_n_0_[4][1] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][1] ),
        .O(\txAXIS_tdata[1]_i_5__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2853" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \txAXIS_tdata[1]_i_6 
       (.I0(\retbuf_reg_n_0_[36][1] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[32][1] ),
        .O(\txAXIS_tdata[1]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h12B7757F12B7202A)) 
    \txAXIS_tdata[20]_i_3__0 
       (.I0(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I1(\retbuf_reg_n_0_[14][4] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[11][4] ),
        .I4(\txAXIS_tdata[31]_i_11_n_0 ),
        .I5(\txAXIS_tdata[20]_i_5__0_n_0 ),
        .O(\txAXIS_tdata[20]_i_3__0_n_0 ));
  LUT5 #(
    .INIT(32'h47444777)) 
    \txAXIS_tdata[20]_i_4__0 
       (.I0(\retbuf_reg_n_0_[0][4] ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\retbuf_reg_n_0_[38][4] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[11][4] ),
        .O(\txAXIS_tdata[20]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2859" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[20]_i_5__0 
       (.I0(\retbuf_reg_n_0_[6][4] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[2][4] ),
        .O(\txAXIS_tdata[20]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'hFEFEFEAEAEAEFEAE)) 
    \txAXIS_tdata[21]_i_2__0 
       (.I0(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I1(\retbuf_reg_n_0_[11][5] ),
        .I2(\txAXIS_tdata[28]_i_5__0_n_0 ),
        .I3(\retbuf_reg_n_0_[2][5] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[6][5] ),
        .O(\txAXIS_tdata[21]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \txAXIS_tdata[21]_i_3__0 
       (.I0(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I1(\retbuf_reg_n_0_[11][5] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[38][5] ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][5] ),
        .O(\txAXIS_tdata[21]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB8B8FF00)) 
    \txAXIS_tdata[22]_i_2__0 
       (.I0(\retbuf_reg_n_0_[6][6] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[2][6] ),
        .I3(\retbuf_reg_n_0_[11][6] ),
        .I4(\txAXIS_tdata[28]_i_5__0_n_0 ),
        .I5(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .O(\txAXIS_tdata[22]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h404C4040404C4C4C)) 
    \txAXIS_tdata[22]_i_3__0 
       (.I0(\retbuf_reg_n_0_[0][6] ),
        .I1(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I3(\retbuf_reg_n_0_[38][6] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[23][6] ),
        .O(\txAXIS_tdata[22]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hFEFEFEAEAEAEFEAE)) 
    \txAXIS_tdata[23]_i_3__0 
       (.I0(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I1(\retbuf_reg_n_0_[11][7] ),
        .I2(\txAXIS_tdata[28]_i_5__0_n_0 ),
        .I3(\retbuf_reg_n_0_[2][7] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[6][7] ),
        .O(\txAXIS_tdata[23]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \txAXIS_tdata[23]_i_4__0 
       (.I0(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I1(\retbuf_reg_n_0_[11][7] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[38][7] ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][7] ),
        .O(\txAXIS_tdata[23]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2872" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \txAXIS_tdata[23]_i_5__0 
       (.I0(Q[1]),
        .I1(\resid_reg_n_0_[1] ),
        .O(\txAXIS_tdata[23]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h400070F0400F7FFF)) 
    \txAXIS_tdata[24]_i_4__0 
       (.I0(\retbuf_reg_n_0_[31][0] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I3(\txAXIS_tdata[31]_i_11_n_0 ),
        .I4(\retbuf_reg_n_0_[11][0] ),
        .I5(\txAXIS_tdata[24]_i_6__0_n_0 ),
        .O(\txAXIS_tdata[24]_i_4__0_n_0 ));
  LUT5 #(
    .INIT(32'h0047FF47)) 
    \txAXIS_tdata[24]_i_5__0 
       (.I0(\retbuf_reg_n_0_[39][0] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[35][0] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\retbuf_reg_n_0_[0][0] ),
        .O(\txAXIS_tdata[24]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'hC00A0000C00ACCAA)) 
    \txAXIS_tdata[24]_i_6__0 
       (.I0(\retbuf_reg_n_0_[3][0] ),
        .I1(\retbuf_reg[7]_48 [0]),
        .I2(\opbuf_reg[0]5 [6]),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\wordcnt_reg_n_0_[26] ),
        .I5(\opbuf_reg[0]51_in [6]),
        .O(\txAXIS_tdata[24]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2860" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \txAXIS_tdata[25]_i_2__0 
       (.I0(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I1(\pollbuf_reg[3]_51 [1]),
        .O(\txAXIS_tdata[25]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h0400AEEE4E444EEE)) 
    \txAXIS_tdata[25]_i_5__0 
       (.I0(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I1(\txAXIS_tdata[25]_i_7__0_n_0 ),
        .I2(\retbuf_reg_n_0_[15][1] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[11][1] ),
        .I5(\txAXIS_tdata[31]_i_11_n_0 ),
        .O(\txAXIS_tdata[25]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'h0047FF47)) 
    \txAXIS_tdata[25]_i_6__0 
       (.I0(\retbuf_reg_n_0_[39][1] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[35][1] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\retbuf_reg_n_0_[0][1] ),
        .O(\txAXIS_tdata[25]_i_6__0_n_0 ));
  LUT6 #(
    .INIT(64'h7474B8FFFFFFB8FF)) 
    \txAXIS_tdata[25]_i_7__0 
       (.I0(\opbuf_reg[0]5 [6]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [6]),
        .I3(\retbuf_reg_n_0_[3][1] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg[7]_48 [1]),
        .O(\txAXIS_tdata[25]_i_7__0_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFB800B8)) 
    \txAXIS_tdata[26]_i_3__0 
       (.I0(\retbuf_reg[7]_48 [2]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[3][2] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\retbuf_reg_n_0_[11][2] ),
        .I5(\txAXIS_tdata[31]_i_11_n_0 ),
        .O(\txAXIS_tdata[26]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2840" *) 
  LUT5 #(
    .INIT(32'h0000757F)) 
    \txAXIS_tdata[26]_i_4__0 
       (.I0(\txAXIS_tdata[31]_i_11_n_0 ),
        .I1(\retbuf_reg_n_0_[15][2] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[11][2] ),
        .I4(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .O(\txAXIS_tdata[26]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \txAXIS_tdata[26]_i_5__0 
       (.I0(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I1(\retbuf_reg_n_0_[35][2] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[39][2] ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][2] ),
        .O(\txAXIS_tdata[26]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000FFB8B8)) 
    \txAXIS_tdata[27]_i_2__0 
       (.I0(\retbuf_reg[7]_48 [3]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[3][3] ),
        .I3(\txAXIS_tdata[27]_i_6__0_n_0 ),
        .I4(\txAXIS_tdata[31]_i_11_n_0 ),
        .I5(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .O(\txAXIS_tdata[27]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'hEFFFEAAAAAAAAAAA)) 
    \txAXIS_tdata[27]_i_3__0 
       (.I0(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I1(\retbuf_reg_n_0_[15][3] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\txAXIS_tdata[31]_i_11_n_0 ),
        .I4(\retbuf_reg_n_0_[11][3] ),
        .I5(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .O(\txAXIS_tdata[27]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h000002A2AAAA02A2)) 
    \txAXIS_tdata[27]_i_4__0 
       (.I0(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I1(\retbuf_reg_n_0_[35][3] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[39][3] ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][3] ),
        .O(\txAXIS_tdata[27]_i_4__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2860" *) 
  LUT3 #(
    .INIT(8'h47)) 
    \txAXIS_tdata[27]_i_6__0 
       (.I0(\retbuf_reg_n_0_[15][3] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[11][3] ),
        .O(\txAXIS_tdata[27]_i_6__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFB8B8FF00)) 
    \txAXIS_tdata[28]_i_2__0 
       (.I0(\retbuf_reg[7]_48 [4]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[3][4] ),
        .I3(\retbuf_reg_n_0_[11][4] ),
        .I4(\txAXIS_tdata[28]_i_5__0_n_0 ),
        .I5(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .O(\txAXIS_tdata[28]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h00FF474700000000)) 
    \txAXIS_tdata[28]_i_3__0 
       (.I0(\retbuf_reg_n_0_[39][4] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[35][4] ),
        .I3(\retbuf_reg_n_0_[0][4] ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .O(\txAXIS_tdata[28]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hC0030000C0035555)) 
    \txAXIS_tdata[28]_i_5__0 
       (.I0(\opbuf_reg[0]51_in [7]),
        .I1(\opbuf_reg[0]5 [7]),
        .I2(\opbuf_reg[0]5 [6]),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\wordcnt_reg_n_0_[26] ),
        .I5(\opbuf_reg[0]51_in [6]),
        .O(\txAXIS_tdata[28]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'hB800B800B8FFB800)) 
    \txAXIS_tdata[29]_i_3__0 
       (.I0(\txAXIS_tdata[29]_i_4__0_n_0 ),
        .I1(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I2(\txAXIS_tdata[29]_i_5__0_n_0 ),
        .I3(Q[4]),
        .I4(\pollbuf_reg[3]_51 [5]),
        .I5(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .O(\txAXIS_tdata[29]_i_3__0_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \txAXIS_tdata[29]_i_4__0 
       (.I0(\retbuf_reg_n_0_[0][5] ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\retbuf_reg_n_0_[39][5] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[35][5] ),
        .O(\txAXIS_tdata[29]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFB8000000B8)) 
    \txAXIS_tdata[29]_i_5__0 
       (.I0(\retbuf_reg[7]_48 [5]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[3][5] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\txAXIS_tdata[31]_i_11_n_0 ),
        .I5(\retbuf_reg_n_0_[11][5] ),
        .O(\txAXIS_tdata[29]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'h8BBB8B88)) 
    \txAXIS_tdata[2]_i_2__0 
       (.I0(\txAXIS_tdata[2]_i_4__0_n_0 ),
        .I1(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I2(\retbuf_reg_n_0_[11][2] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\txAXIS_tdata[2]_i_5__0_n_0 ),
        .O(\txAXIS_tdata[2]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'h1015DFD5)) 
    \txAXIS_tdata[2]_i_4__0 
       (.I0(\retbuf_reg_n_0_[32][2] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\retbuf_reg_n_0_[36][2] ),
        .O(\txAXIS_tdata[2]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[2]_i_5__0 
       (.I0(\retbuf_reg_n_0_[11][2] ),
        .I1(\retbuf_reg_n_0_[8][2] ),
        .I2(\txAXIS_tdata[31]_i_11_n_0 ),
        .I3(\retbuf_reg_n_0_[4][2] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][2] ),
        .O(\txAXIS_tdata[2]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFEAEAAAA)) 
    \txAXIS_tdata[30]_i_2__0 
       (.I0(\txAXIS_tdata[30]_i_5__0_n_0 ),
        .I1(\retbuf_reg_n_0_[11][6] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[23][6] ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .O(\txAXIS_tdata[30]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'h404C4040404C4C4C)) 
    \txAXIS_tdata[30]_i_3__0 
       (.I0(\retbuf_reg_n_0_[0][6] ),
        .I1(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I3(\retbuf_reg_n_0_[39][6] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[35][6] ),
        .O(\txAXIS_tdata[30]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FF00B8B8)) 
    \txAXIS_tdata[30]_i_5__0 
       (.I0(\retbuf_reg[7]_48 [6]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[3][6] ),
        .I3(\retbuf_reg_n_0_[11][6] ),
        .I4(\txAXIS_tdata[31]_i_11_n_0 ),
        .I5(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .O(\txAXIS_tdata[30]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'h55CC5ACC)) 
    \txAXIS_tdata[31]_i_10__0 
       (.I0(\opbuf_reg[0]5 [7]),
        .I1(\opbuf_reg[0]51_in [7]),
        .I2(\opbuf_reg[0]5 [6]),
        .I3(\wordcnt_reg_n_0_[26] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .O(\txAXIS_tdata[31]_i_10__0_n_0 ));
  LUT4 #(
    .INIT(16'h2EE2)) 
    \txAXIS_tdata[31]_i_11 
       (.I0(\opbuf_reg[0]51_in [6]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\opbuf_reg[0]5 [6]),
        .O(\txAXIS_tdata[31]_i_11_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2869" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \txAXIS_tdata[31]_i_13 
       (.I0(\opbuf_reg[0]5 [6]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [6]),
        .O(\txAXIS_tdata[31]_i_13_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \txAXIS_tdata[31]_i_14 
       (.I0(\opbuf_reg[0]51_in [5]),
        .O(\txAXIS_tdata[31]_i_14_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \txAXIS_tdata[31]_i_15 
       (.I0(\opbuf_reg[0]51_in [11]),
        .O(\txAXIS_tdata[31]_i_15_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \txAXIS_tdata[31]_i_16 
       (.I0(\opbuf_reg[0]51_in [10]),
        .O(\txAXIS_tdata[31]_i_16_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \txAXIS_tdata[31]_i_17 
       (.I0(\opbuf_reg[0]51_in [9]),
        .O(\txAXIS_tdata[31]_i_17_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \txAXIS_tdata[31]_i_18 
       (.I0(\opbuf_reg[0]51_in [8]),
        .O(\txAXIS_tdata[31]_i_18_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \txAXIS_tdata[31]_i_19 
       (.I0(\opbuf_reg[0]51_in [7]),
        .O(\txAXIS_tdata[31]_i_19_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \txAXIS_tdata[31]_i_20 
       (.I0(\opbuf_reg[0]51_in [6]),
        .O(\txAXIS_tdata[31]_i_20_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2830" *) 
  LUT4 #(
    .INIT(16'hFEEF)) 
    \txAXIS_tdata[31]_i_3__0 
       (.I0(Q[0]),
        .I1(Q[2]),
        .I2(Q[4]),
        .I3(Q[3]),
        .O(\txAXIS_tdata[31]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFB8000000B8)) 
    \txAXIS_tdata[31]_i_4__0 
       (.I0(\retbuf_reg[7]_48 [7]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[3][7] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\txAXIS_tdata[31]_i_11_n_0 ),
        .I5(\retbuf_reg_n_0_[11][7] ),
        .O(\txAXIS_tdata[31]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'h01FFFEFF0100FE00)) 
    \txAXIS_tdata[31]_i_5__0 
       (.I0(\opbuf_reg[0]5 [7]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_13_n_0 ),
        .I3(\wordcnt_reg_n_0_[26] ),
        .I4(\opbuf_reg[0]5 [8]),
        .I5(\opbuf_reg[0]51_in [8]),
        .O(\txAXIS_tdata[31]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \txAXIS_tdata[31]_i_6__0 
       (.I0(\retbuf_reg_n_0_[0][7] ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\retbuf_reg_n_0_[39][7] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[35][7] ),
        .O(\txAXIS_tdata[31]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2871" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \txAXIS_tdata[31]_i_7__0 
       (.I0(Q[1]),
        .I1(Q[4]),
        .O(\txAXIS_tdata[31]_i_7__0_n_0 ));
  LUT3 #(
    .INIT(8'hB8)) 
    \txAXIS_tdata[31]_i_9__0 
       (.I0(\opbuf_reg[0]5 [5]),
        .I1(\wordcnt_reg_n_0_[26] ),
        .I2(\opbuf_reg[0]51_in [5]),
        .O(\txAXIS_tdata[31]_i_9__0_n_0 ));
  LUT5 #(
    .INIT(32'h8BBB8B88)) 
    \txAXIS_tdata[3]_i_3__0 
       (.I0(\txAXIS_tdata[3]_i_5__0_n_0 ),
        .I1(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I2(\retbuf_reg_n_0_[11][3] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\txAXIS_tdata[3]_i_6_n_0 ),
        .O(\txAXIS_tdata[3]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hEEEEEEEEDFDDDFFF)) 
    \txAXIS_tdata[3]_i_4__0 
       (.I0(Q[3]),
        .I1(\txAXIS_tdata[7]_i_10_n_0 ),
        .I2(\pollbuf_reg[4]_52 [3]),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\pollbuf_reg[0]_49 [3]),
        .I5(Q[4]),
        .O(\txAXIS_tdata[3]_i_4__0_n_0 ));
  LUT5 #(
    .INIT(32'h1015DFD5)) 
    \txAXIS_tdata[3]_i_5__0 
       (.I0(\retbuf_reg_n_0_[32][3] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\retbuf_reg_n_0_[36][3] ),
        .O(\txAXIS_tdata[3]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[3]_i_6 
       (.I0(\retbuf_reg_n_0_[11][3] ),
        .I1(\retbuf_reg_n_0_[8][3] ),
        .I2(\txAXIS_tdata[31]_i_11_n_0 ),
        .I3(\retbuf_reg_n_0_[4][3] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][3] ),
        .O(\txAXIS_tdata[3]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hBBB888B8)) 
    \txAXIS_tdata[4]_i_2__0 
       (.I0(\txAXIS_tdata[4]_i_4__0_n_0 ),
        .I1(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I2(\txAXIS_tdata[4]_i_5__0_n_0 ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\txAXIS_tdata[4]_i_6__0_n_0 ),
        .O(\txAXIS_tdata[4]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'h1015DFD5)) 
    \txAXIS_tdata[4]_i_4__0 
       (.I0(\retbuf_reg_n_0_[32][4] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\retbuf_reg_n_0_[36][4] ),
        .O(\txAXIS_tdata[4]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[4]_i_5__0 
       (.I0(\retbuf_reg_n_0_[14][4] ),
        .I1(\retbuf_reg_n_0_[8][4] ),
        .I2(\txAXIS_tdata[31]_i_11_n_0 ),
        .I3(\retbuf_reg_n_0_[4][4] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][4] ),
        .O(\txAXIS_tdata[4]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h04005400F7FF57FF)) 
    \txAXIS_tdata[4]_i_6__0 
       (.I0(\retbuf_reg_n_0_[11][4] ),
        .I1(\opbuf_reg[0]51_in [6]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\opbuf_reg[0]5 [6]),
        .I5(\retbuf_reg_n_0_[14][4] ),
        .O(\txAXIS_tdata[4]_i_6__0_n_0 ));
  LUT5 #(
    .INIT(32'h8BBB8B88)) 
    \txAXIS_tdata[5]_i_3__0 
       (.I0(\txAXIS_tdata[5]_i_5__0_n_0 ),
        .I1(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I2(\retbuf_reg_n_0_[11][5] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\txAXIS_tdata[5]_i_6__0_n_0 ),
        .O(\txAXIS_tdata[5]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hEEEEEEEEDFDDDFFF)) 
    \txAXIS_tdata[5]_i_4 
       (.I0(Q[3]),
        .I1(\txAXIS_tdata[7]_i_10_n_0 ),
        .I2(\pollbuf_reg[4]_52 [5]),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\pollbuf_reg[0]_49 [5]),
        .I5(Q[4]),
        .O(\txAXIS_tdata[5]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'h1015DFD5)) 
    \txAXIS_tdata[5]_i_5__0 
       (.I0(\retbuf_reg_n_0_[32][5] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\retbuf_reg_n_0_[36][5] ),
        .O(\txAXIS_tdata[5]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[5]_i_6__0 
       (.I0(\retbuf_reg_n_0_[11][5] ),
        .I1(\retbuf_reg_n_0_[8][5] ),
        .I2(\txAXIS_tdata[31]_i_11_n_0 ),
        .I3(\retbuf_reg_n_0_[4][5] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][5] ),
        .O(\txAXIS_tdata[5]_i_6__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2870" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \txAXIS_tdata[6]_i_2__0 
       (.I0(Q[1]),
        .I1(Q[0]),
        .O(\txAXIS_tdata[6]_i_2__0_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \txAXIS_tdata[6]_i_3__0 
       (.I0(\txAXIS_tdata[6]_i_6_n_0 ),
        .I1(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I2(\txAXIS_tdata[6]_i_7_n_0 ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\txAXIS_tdata[6]_i_8__0_n_0 ),
        .O(\txAXIS_tdata[6]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2830" *) 
  LUT5 #(
    .INIT(32'h0200003C)) 
    \txAXIS_tdata[6]_i_5__0 
       (.I0(\stateOp_next[0]_i_2_n_0 ),
        .I1(Q[4]),
        .I2(Q[3]),
        .I3(Q[0]),
        .I4(Q[2]),
        .O(\txAXIS_tdata[6]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'hEFEA202A)) 
    \txAXIS_tdata[6]_i_6 
       (.I0(\retbuf_reg_n_0_[32][6] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\retbuf_reg_n_0_[36][6] ),
        .O(\txAXIS_tdata[6]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFBFFABFF0800A800)) 
    \txAXIS_tdata[6]_i_7 
       (.I0(\retbuf_reg_n_0_[23][6] ),
        .I1(\opbuf_reg[0]51_in [6]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\opbuf_reg[0]5 [6]),
        .I5(\retbuf_reg_n_0_[11][6] ),
        .O(\txAXIS_tdata[6]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[6]_i_8__0 
       (.I0(\retbuf_reg_n_0_[11][6] ),
        .I1(\retbuf_reg_n_0_[8][6] ),
        .I2(\txAXIS_tdata[31]_i_11_n_0 ),
        .I3(\retbuf_reg_n_0_[4][6] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][6] ),
        .O(\txAXIS_tdata[6]_i_8__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2844" *) 
  LUT2 #(
    .INIT(4'hE)) 
    \txAXIS_tdata[7]_i_10 
       (.I0(Q[2]),
        .I1(Q[0]),
        .O(\txAXIS_tdata[7]_i_10_n_0 ));
  LUT5 #(
    .INIT(32'h8BBB8B88)) 
    \txAXIS_tdata[7]_i_5__0 
       (.I0(\txAXIS_tdata[7]_i_8__0_n_0 ),
        .I1(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I2(\retbuf_reg_n_0_[11][7] ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\txAXIS_tdata[7]_i_9_n_0 ),
        .O(\txAXIS_tdata[7]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'hEEEEEEEEDFDDDFFF)) 
    \txAXIS_tdata[7]_i_6__0 
       (.I0(Q[3]),
        .I1(\txAXIS_tdata[7]_i_10_n_0 ),
        .I2(\pollbuf_reg[4]_52 [7]),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\pollbuf_reg[0]_49 [7]),
        .I5(Q[4]),
        .O(\txAXIS_tdata[7]_i_6__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFEFFFFFFFFFFF)) 
    \txAXIS_tdata[7]_i_7__0 
       (.I0(Q[3]),
        .I1(Q[4]),
        .I2(Q[0]),
        .I3(Q[2]),
        .I4(Q[1]),
        .I5(\stateOp_next[0]_i_2_n_0 ),
        .O(\txAXIS_tdata[7]_i_7__0_n_0 ));
  LUT5 #(
    .INIT(32'h1015DFD5)) 
    \txAXIS_tdata[7]_i_8__0 
       (.I0(\retbuf_reg_n_0_[32][7] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I3(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I4(\retbuf_reg_n_0_[36][7] ),
        .O(\txAXIS_tdata[7]_i_8__0_n_0 ));
  LUT6 #(
    .INIT(64'h505F3030505F3F3F)) 
    \txAXIS_tdata[7]_i_9 
       (.I0(\retbuf_reg_n_0_[11][7] ),
        .I1(\retbuf_reg_n_0_[8][7] ),
        .I2(\txAXIS_tdata[31]_i_11_n_0 ),
        .I3(\retbuf_reg_n_0_[4][7] ),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[0][7] ),
        .O(\txAXIS_tdata[7]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2853" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \txAXIS_tdata[8]_i_2__0 
       (.I0(\pollbuf_reg[5]_53 [0]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\pollbuf_reg[1]_50 [0]),
        .O(\txAXIS_tdata[8]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'hAFA0CFCFAFA0C0C0)) 
    \txAXIS_tdata[8]_i_3__0 
       (.I0(\retbuf_reg_n_0_[0][0] ),
        .I1(\txAXIS_tdata[8]_i_5__0_n_0 ),
        .I2(\txAXIS_tdata[31]_i_5__0_n_0 ),
        .I3(\txAXIS_tdata[8]_i_6__0_n_0 ),
        .I4(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I5(\txAXIS_tdata[8]_i_7__0_n_0 ),
        .O(\txAXIS_tdata[8]_i_3__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2854" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \txAXIS_tdata[8]_i_5__0 
       (.I0(\retbuf_reg_n_0_[37][0] ),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\retbuf_reg_n_0_[33][0] ),
        .O(\txAXIS_tdata[8]_i_5__0_n_0 ));
  LUT6 #(
    .INIT(64'hAEFEFFFFA2020000)) 
    \txAXIS_tdata[8]_i_6__0 
       (.I0(\retbuf_reg_n_0_[11][0] ),
        .I1(\opbuf_reg[0]51_in [6]),
        .I2(\wordcnt_reg_n_0_[26] ),
        .I3(\opbuf_reg[0]5 [6]),
        .I4(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I5(\retbuf_reg_n_0_[31][0] ),
        .O(\txAXIS_tdata[8]_i_6__0_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \txAXIS_tdata[8]_i_7__0 
       (.I0(\retbuf_reg_n_0_[11][0] ),
        .I1(\txAXIS_tdata[31]_i_11_n_0 ),
        .I2(\retbuf_reg_n_0_[5][0] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[1][0] ),
        .O(\txAXIS_tdata[8]_i_7__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2854" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \txAXIS_tdata[9]_i_2__0 
       (.I0(\pollbuf_reg[5]_53 [1]),
        .I1(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I2(\pollbuf_reg[1]_50 [1]),
        .O(\txAXIS_tdata[9]_i_2__0_n_0 ));
  LUT6 #(
    .INIT(64'hDFD5FF55CFC0AA00)) 
    \txAXIS_tdata[9]_i_5__0 
       (.I0(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I1(\retbuf_reg_n_0_[15][1] ),
        .I2(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I3(\retbuf_reg_n_0_[11][1] ),
        .I4(\txAXIS_tdata[31]_i_11_n_0 ),
        .I5(\txAXIS_tdata[9]_i_7__0_n_0 ),
        .O(\txAXIS_tdata[9]_i_5__0_n_0 ));
  LUT5 #(
    .INIT(32'hB8BBB888)) 
    \txAXIS_tdata[9]_i_6__0 
       (.I0(\retbuf_reg_n_0_[0][1] ),
        .I1(\txAXIS_tdata[31]_i_10__0_n_0 ),
        .I2(\retbuf_reg_n_0_[37][1] ),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\retbuf_reg_n_0_[33][1] ),
        .O(\txAXIS_tdata[9]_i_6__0_n_0 ));
  LUT6 #(
    .INIT(64'hC00A0000C00ACCAA)) 
    \txAXIS_tdata[9]_i_7__0 
       (.I0(\retbuf_reg_n_0_[1][1] ),
        .I1(\retbuf_reg_n_0_[5][1] ),
        .I2(\opbuf_reg[0]5 [6]),
        .I3(\txAXIS_tdata[31]_i_9__0_n_0 ),
        .I4(\wordcnt_reg_n_0_[26] ),
        .I5(\opbuf_reg[0]51_in [6]),
        .O(\txAXIS_tdata[9]_i_7__0_n_0 ));
  FDCE \txAXIS_tdata_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_218),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_258),
        .Q(\txAXIS_tdata_reg_n_0_[0] ));
  FDCE \txAXIS_tdata_reg[10] 
       (.C(aclk_sig),
        .CE(myRxtx_n_217),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_248),
        .Q(\txAXIS_tdata_reg_n_0_[10] ));
  FDCE \txAXIS_tdata_reg[11] 
       (.C(aclk_sig),
        .CE(myRxtx_n_217),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_247),
        .Q(\txAXIS_tdata_reg_n_0_[11] ));
  MUXF7 \txAXIS_tdata_reg[11]_i_3 
       (.I0(\txAXIS_tdata[11]_i_5__0_n_0 ),
        .I1(\txAXIS_tdata[11]_i_6__0_n_0 ),
        .O(\txAXIS_tdata_reg[11]_i_3_n_0 ),
        .S(\txAXIS_tdata[31]_i_5__0_n_0 ));
  FDCE \txAXIS_tdata_reg[12] 
       (.C(aclk_sig),
        .CE(myRxtx_n_217),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_246),
        .Q(\txAXIS_tdata_reg_n_0_[12] ));
  FDCE \txAXIS_tdata_reg[13] 
       (.C(aclk_sig),
        .CE(myRxtx_n_217),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_245),
        .Q(\txAXIS_tdata_reg_n_0_[13] ));
  MUXF7 \txAXIS_tdata_reg[13]_i_4 
       (.I0(\txAXIS_tdata[13]_i_5__0_n_0 ),
        .I1(\txAXIS_tdata[13]_i_6__0_n_0 ),
        .O(\txAXIS_tdata_reg[13]_i_4_n_0 ),
        .S(\txAXIS_tdata[31]_i_5__0_n_0 ));
  FDCE \txAXIS_tdata_reg[14] 
       (.C(aclk_sig),
        .CE(myRxtx_n_217),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_244),
        .Q(\txAXIS_tdata_reg_n_0_[14] ));
  MUXF7 \txAXIS_tdata_reg[14]_i_3 
       (.I0(\txAXIS_tdata[14]_i_5__0_n_0 ),
        .I1(\txAXIS_tdata[14]_i_6__0_n_0 ),
        .O(\txAXIS_tdata_reg[14]_i_3_n_0 ),
        .S(\txAXIS_tdata[31]_i_5__0_n_0 ));
  FDCE \txAXIS_tdata_reg[15] 
       (.C(aclk_sig),
        .CE(myRxtx_n_217),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_243),
        .Q(\txAXIS_tdata_reg_n_0_[15] ));
  MUXF7 \txAXIS_tdata_reg[15]_i_5 
       (.I0(\txAXIS_tdata[15]_i_6__0_n_0 ),
        .I1(\txAXIS_tdata[15]_i_7__0_n_0 ),
        .O(\txAXIS_tdata_reg[15]_i_5_n_0 ),
        .S(\txAXIS_tdata[31]_i_5__0_n_0 ));
  FDCE \txAXIS_tdata_reg[16] 
       (.C(aclk_sig),
        .CE(myRxtx_n_216),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_82),
        .Q(\txAXIS_tdata_reg_n_0_[16] ));
  FDCE \txAXIS_tdata_reg[17] 
       (.C(aclk_sig),
        .CE(myRxtx_n_216),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_242),
        .Q(\txAXIS_tdata_reg_n_0_[17] ));
  FDCE \txAXIS_tdata_reg[18] 
       (.C(aclk_sig),
        .CE(myRxtx_n_216),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myCrc_n_81),
        .Q(\txAXIS_tdata_reg_n_0_[18] ));
  FDCE \txAXIS_tdata_reg[19] 
       (.C(aclk_sig),
        .CE(myRxtx_n_216),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_241),
        .Q(\txAXIS_tdata_reg_n_0_[19] ));
  FDCE \txAXIS_tdata_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_218),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_257),
        .Q(\txAXIS_tdata_reg_n_0_[1] ));
  FDCE \txAXIS_tdata_reg[20] 
       (.C(aclk_sig),
        .CE(myRxtx_n_216),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_240),
        .Q(\txAXIS_tdata_reg_n_0_[20] ));
  FDCE \txAXIS_tdata_reg[21] 
       (.C(aclk_sig),
        .CE(myRxtx_n_216),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_239),
        .Q(\txAXIS_tdata_reg_n_0_[21] ));
  FDCE \txAXIS_tdata_reg[22] 
       (.C(aclk_sig),
        .CE(myRxtx_n_216),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_238),
        .Q(\txAXIS_tdata_reg_n_0_[22] ));
  FDCE \txAXIS_tdata_reg[23] 
       (.C(aclk_sig),
        .CE(myRxtx_n_216),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_237),
        .Q(\txAXIS_tdata_reg_n_0_[23] ));
  FDCE \txAXIS_tdata_reg[24] 
       (.C(aclk_sig),
        .CE(myRxtx_n_215),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_236),
        .Q(\txAXIS_tdata_reg_n_0_[24] ));
  MUXF7 \txAXIS_tdata_reg[24]_i_2 
       (.I0(\txAXIS_tdata[24]_i_4__0_n_0 ),
        .I1(\txAXIS_tdata[24]_i_5__0_n_0 ),
        .O(\txAXIS_tdata_reg[24]_i_2_n_0 ),
        .S(\txAXIS_tdata[31]_i_5__0_n_0 ));
  FDCE \txAXIS_tdata_reg[25] 
       (.C(aclk_sig),
        .CE(myRxtx_n_215),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_235),
        .Q(\txAXIS_tdata_reg_n_0_[25] ));
  MUXF7 \txAXIS_tdata_reg[25]_i_3 
       (.I0(\txAXIS_tdata[25]_i_5__0_n_0 ),
        .I1(\txAXIS_tdata[25]_i_6__0_n_0 ),
        .O(\txAXIS_tdata_reg[25]_i_3_n_0 ),
        .S(\txAXIS_tdata[31]_i_5__0_n_0 ));
  FDCE \txAXIS_tdata_reg[26] 
       (.C(aclk_sig),
        .CE(myRxtx_n_215),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_234),
        .Q(\txAXIS_tdata_reg_n_0_[26] ));
  FDCE \txAXIS_tdata_reg[27] 
       (.C(aclk_sig),
        .CE(myRxtx_n_215),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_233),
        .Q(\txAXIS_tdata_reg_n_0_[27] ));
  FDCE \txAXIS_tdata_reg[28] 
       (.C(aclk_sig),
        .CE(myRxtx_n_215),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_232),
        .Q(\txAXIS_tdata_reg_n_0_[28] ));
  FDCE \txAXIS_tdata_reg[29] 
       (.C(aclk_sig),
        .CE(myRxtx_n_215),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_231),
        .Q(\txAXIS_tdata_reg_n_0_[29] ));
  FDCE \txAXIS_tdata_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_218),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_256),
        .Q(\txAXIS_tdata_reg_n_0_[2] ));
  FDCE \txAXIS_tdata_reg[30] 
       (.C(aclk_sig),
        .CE(myRxtx_n_215),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_230),
        .Q(\txAXIS_tdata_reg_n_0_[30] ));
  FDCE \txAXIS_tdata_reg[31] 
       (.C(aclk_sig),
        .CE(myRxtx_n_215),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_229),
        .Q(\txAXIS_tdata_reg_n_0_[31] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \txAXIS_tdata_reg[31]_i_12 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\txAXIS_tdata_reg[31]_i_12_n_0 ,\txAXIS_tdata_reg[31]_i_12_n_1 ,\txAXIS_tdata_reg[31]_i_12_n_2 ,\txAXIS_tdata_reg[31]_i_12_n_3 ,\txAXIS_tdata_reg[31]_i_12_n_4 ,\txAXIS_tdata_reg[31]_i_12_n_5 ,\txAXIS_tdata_reg[31]_i_12_n_6 ,\txAXIS_tdata_reg[31]_i_12_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\txAXIS_tdata[31]_i_14_n_0 ,1'b0}),
        .O({\opbuf_reg[0]5 [11:5],\NLW_txAXIS_tdata_reg[31]_i_12_O_UNCONNECTED [0]}),
        .S({\txAXIS_tdata[31]_i_15_n_0 ,\txAXIS_tdata[31]_i_16_n_0 ,\txAXIS_tdata[31]_i_17_n_0 ,\txAXIS_tdata[31]_i_18_n_0 ,\txAXIS_tdata[31]_i_19_n_0 ,\txAXIS_tdata[31]_i_20_n_0 ,\opbuf_reg[0]51_in [5],1'b0}));
  FDCE \txAXIS_tdata_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_218),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_255),
        .Q(\txAXIS_tdata_reg_n_0_[3] ));
  FDCE \txAXIS_tdata_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_218),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_254),
        .Q(\txAXIS_tdata_reg_n_0_[4] ));
  FDCE \txAXIS_tdata_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_218),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_253),
        .Q(\txAXIS_tdata_reg_n_0_[5] ));
  FDCE \txAXIS_tdata_reg[6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_218),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_252),
        .Q(\txAXIS_tdata_reg_n_0_[6] ));
  FDCE \txAXIS_tdata_reg[7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_218),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_251),
        .Q(\txAXIS_tdata_reg_n_0_[7] ));
  FDCE \txAXIS_tdata_reg[8] 
       (.C(aclk_sig),
        .CE(myRxtx_n_217),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_250),
        .Q(\txAXIS_tdata_reg_n_0_[8] ));
  FDCE \txAXIS_tdata_reg[9] 
       (.C(aclk_sig),
        .CE(myRxtx_n_217),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_249),
        .Q(\txAXIS_tdata_reg_n_0_[9] ));
  MUXF7 \txAXIS_tdata_reg[9]_i_3 
       (.I0(\txAXIS_tdata[9]_i_5__0_n_0 ),
        .I1(\txAXIS_tdata[9]_i_6__0_n_0 ),
        .O(\txAXIS_tdata_reg[9]_i_3_n_0 ),
        .S(\txAXIS_tdata[31]_i_5__0_n_0 ));
  FDCE \txlen_reg[0] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[0]_0 ),
        .D(wordcntLast[0]),
        .Q(\txlen_reg_n_0_[0] ));
  FDCE \txlen_reg[1] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_53),
        .Q(\txlen_reg_n_0_[1] ));
  FDCE \txlen_reg[3] 
       (.C(aclk_sig),
        .CE(myCrc_n_1),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_52),
        .Q(\txlen_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_375),
        .Q(wordcntCrcLast[0]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[10] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_365),
        .Q(wordcntCrcLast[10]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[11] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_364),
        .Q(wordcntCrcLast[11]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[12] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_363),
        .Q(wordcntCrcLast[12]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[13] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_362),
        .Q(wordcntCrcLast[13]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[14] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_361),
        .Q(wordcntCrcLast[14]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[15] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_360),
        .Q(wordcntCrcLast[15]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[16] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_359),
        .Q(wordcntCrcLast[16]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[17] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_358),
        .Q(wordcntCrcLast[17]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[18] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_357),
        .Q(wordcntCrcLast[18]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[19] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_356),
        .Q(wordcntCrcLast[19]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_374),
        .Q(wordcntCrcLast[1]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[20] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_355),
        .Q(wordcntCrcLast[20]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[21] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_354),
        .Q(wordcntCrcLast[21]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[22] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_353),
        .Q(wordcntCrcLast[22]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[23] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_352),
        .Q(wordcntCrcLast[23]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[24] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_351),
        .Q(wordcntCrcLast[24]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_373),
        .Q(wordcntCrcLast[2]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_372),
        .Q(wordcntCrcLast[3]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_371),
        .Q(wordcntCrcLast[4]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_370),
        .Q(wordcntCrcLast[5]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_369),
        .Q(wordcntCrcLast[6]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_368),
        .Q(wordcntCrcLast[7]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[8] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_367),
        .Q(wordcntCrcLast[8]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntCrcLast_reg[9] 
       (.C(aclk_sig),
        .CE(myRxtx_n_34),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_366),
        .Q(wordcntCrcLast[9]));
  (* SOFT_HLUTNM = "soft_lutpair2835" *) 
  LUT5 #(
    .INIT(32'h10200000)) 
    \wordcntLast[0]_i_2__0 
       (.I0(Q[3]),
        .I1(Q[4]),
        .I2(Q[2]),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\wordcntLast[0]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2871" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \wordcntLast[1]_i_2 
       (.I0(Q[1]),
        .I1(Q[0]),
        .O(\wordcntLast[1]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_91),
        .CLR(\stateOp_reg[0]_0 ),
        .D(wordcntLast[0]),
        .Q(\wordcntLast_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_91),
        .CLR(\stateOp_reg[0]_0 ),
        .D(wordcntLast[1]),
        .Q(\wordcntLast_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcntLast_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_91),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_52),
        .Q(\wordcntLast_reg_n_0_[3] ));
  (* SOFT_HLUTNM = "soft_lutpair2850" *) 
  LUT3 #(
    .INIT(8'hDF)) 
    \wordcnt[30]_i_4 
       (.I0(Q[4]),
        .I1(Q[3]),
        .I2(Q[2]),
        .O(\wordcnt[30]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2851" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \wordcnt[30]_i_7__0 
       (.I0(Q[3]),
        .I1(Q[1]),
        .O(\wordcnt[30]_i_7__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[0] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_90),
        .Q(\opbuf_reg[0]51_in [5]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[10] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_80),
        .Q(\opbuf_reg[0]51_in [15]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[11] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_79),
        .Q(\opbuf_reg[0]51_in [16]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[12] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_78),
        .Q(\opbuf_reg[0]51_in [17]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[13] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_77),
        .Q(\opbuf_reg[0]51_in [18]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[14] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_76),
        .Q(\opbuf_reg[0]51_in [19]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[15] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_75),
        .Q(\opbuf_reg[0]51_in [20]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[16] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_74),
        .Q(\opbuf_reg[0]51_in [21]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcnt_reg[16]_i_2__0 
       (.CI(\wordcnt_reg[8]_i_2__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[16]_i_2__0_n_0 ,\wordcnt_reg[16]_i_2__0_n_1 ,\wordcnt_reg[16]_i_2__0_n_2 ,\wordcnt_reg[16]_i_2__0_n_3 ,\wordcnt_reg[16]_i_2__0_n_4 ,\wordcnt_reg[16]_i_2__0_n_5 ,\wordcnt_reg[16]_i_2__0_n_6 ,\wordcnt_reg[16]_i_2__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(txlast1[16:9]),
        .S(\opbuf_reg[0]51_in [21:14]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[17] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_73),
        .Q(\opbuf_reg[0]51_in [22]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[18] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_72),
        .Q(\opbuf_reg[0]51_in [23]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[19] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_71),
        .Q(\opbuf_reg[0]51_in [24]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[1] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_89),
        .Q(\opbuf_reg[0]51_in [6]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[20] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_70),
        .Q(\opbuf_reg[0]51_in [25]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[21] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_69),
        .Q(\opbuf_reg[0]51_in [26]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[22] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_68),
        .Q(\opbuf_reg[0]51_in [27]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[23] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_67),
        .Q(\opbuf_reg[0]51_in [28]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[24] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_66),
        .Q(\opbuf_reg[0]51_in [29]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcnt_reg[24]_i_2__0 
       (.CI(\wordcnt_reg[16]_i_2__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[24]_i_2__0_n_0 ,\wordcnt_reg[24]_i_2__0_n_1 ,\wordcnt_reg[24]_i_2__0_n_2 ,\wordcnt_reg[24]_i_2__0_n_3 ,\wordcnt_reg[24]_i_2__0_n_4 ,\wordcnt_reg[24]_i_2__0_n_5 ,\wordcnt_reg[24]_i_2__0_n_6 ,\wordcnt_reg[24]_i_2__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(txlast1[24:17]),
        .S(\opbuf_reg[0]51_in [29:22]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[25] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_65),
        .Q(\opbuf_reg[0]51_in [30]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[26] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_64),
        .Q(\wordcnt_reg_n_0_[26] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[27] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_63),
        .Q(\wordcnt_reg_n_0_[27] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[28] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_62),
        .Q(\wordcnt_reg_n_0_[28] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[29] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_61),
        .Q(\wordcnt_reg_n_0_[29] ));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[2] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_88),
        .Q(\opbuf_reg[0]51_in [7]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[30] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_60),
        .Q(\wordcnt_reg_n_0_[30] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcnt_reg[30]_i_6 
       (.CI(\wordcnt_reg[24]_i_2__0_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_wordcnt_reg[30]_i_6_CO_UNCONNECTED [7:5],\wordcnt_reg[30]_i_6_n_3 ,\wordcnt_reg[30]_i_6_n_4 ,\wordcnt_reg[30]_i_6_n_5 ,\wordcnt_reg[30]_i_6_n_6 ,\wordcnt_reg[30]_i_6_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_wordcnt_reg[30]_i_6_O_UNCONNECTED [7:6],txlast1[30:25]}),
        .S({1'b0,1'b0,\wordcnt_reg_n_0_[30] ,\wordcnt_reg_n_0_[29] ,\wordcnt_reg_n_0_[28] ,\wordcnt_reg_n_0_[27] ,\wordcnt_reg_n_0_[26] ,\opbuf_reg[0]51_in [30]}));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[3] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_87),
        .Q(\opbuf_reg[0]51_in [8]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[4] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_86),
        .Q(\opbuf_reg[0]51_in [9]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[5] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_85),
        .Q(\opbuf_reg[0]51_in [10]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[6] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_84),
        .Q(\opbuf_reg[0]51_in [11]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[7] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_83),
        .Q(\opbuf_reg[0]51_in [12]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[8] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_82),
        .Q(\opbuf_reg[0]51_in [13]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \wordcnt_reg[8]_i_2__0 
       (.CI(\opbuf_reg[0]51_in [5]),
        .CI_TOP(1'b0),
        .CO({\wordcnt_reg[8]_i_2__0_n_0 ,\wordcnt_reg[8]_i_2__0_n_1 ,\wordcnt_reg[8]_i_2__0_n_2 ,\wordcnt_reg[8]_i_2__0_n_3 ,\wordcnt_reg[8]_i_2__0_n_4 ,\wordcnt_reg[8]_i_2__0_n_5 ,\wordcnt_reg[8]_i_2__0_n_6 ,\wordcnt_reg[8]_i_2__0_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(txlast1[8:1]),
        .S(\opbuf_reg[0]51_in [13:6]));
  FDCE #(
    .INIT(1'b0)) 
    \wordcnt_reg[9] 
       (.C(aclk_sig),
        .CE(myRxtx_n_179),
        .CLR(\stateOp_reg[0]_0 ),
        .D(myRxtx_n_81),
        .Q(\opbuf_reg[0]51_in [14]));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Spimaster_v1_0
   (mosi,
    D,
    E,
    \FSM_sequential_stateOp_reg[1] ,
    \FSM_sequential_stateOp_reg[1]_0 ,
    \FSM_sequential_stateOp_reg[2] ,
    \FSM_sequential_stateOp_reg[1]_1 ,
    cs,
    sclk,
    \FSM_sequential_stateOp_reg[0] ,
    aclk_sig,
    \FSM_sequential_stateXfer_reg[2]_0 ,
    \FSM_sequential_stateOp_reg[0]_0 ,
    Q,
    \i_reg[0]_0 ,
    reqInvLaserSet,
    \FSM_sequential_stateOp_reg[0]_1 ,
    \i_reg[0]_1 ,
    rNotL_reg,
    len,
    \send_var_reg[7]_0 );
  output mosi;
  output [1:0]D;
  output [0:0]E;
  output [0:0]\FSM_sequential_stateOp_reg[1] ;
  output [0:0]\FSM_sequential_stateOp_reg[1]_0 ;
  output [0:0]\FSM_sequential_stateOp_reg[2] ;
  output [0:0]\FSM_sequential_stateOp_reg[1]_1 ;
  output cs;
  output sclk;
  output \FSM_sequential_stateOp_reg[0] ;
  input aclk_sig;
  input [0:0]\FSM_sequential_stateXfer_reg[2]_0 ;
  input \FSM_sequential_stateOp_reg[0]_0 ;
  input [2:0]Q;
  input \i_reg[0]_0 ;
  input reqInvLaserSet;
  input \FSM_sequential_stateOp_reg[0]_1 ;
  input \i_reg[0]_1 ;
  input rNotL_reg;
  input [0:0]len;
  input [7:0]\send_var_reg[7]_0 ;

  wire [1:0]D;
  wire [0:0]E;
  wire \FSM_sequential_stateOp[2]_i_3_n_0 ;
  wire \FSM_sequential_stateOp[2]_i_4_n_0 ;
  wire \FSM_sequential_stateOp[2]_i_7_n_0 ;
  wire \FSM_sequential_stateOp[2]_i_9_n_0 ;
  wire \FSM_sequential_stateOp_reg[0] ;
  wire \FSM_sequential_stateOp_reg[0]_0 ;
  wire \FSM_sequential_stateOp_reg[0]_1 ;
  wire [0:0]\FSM_sequential_stateOp_reg[1] ;
  wire [0:0]\FSM_sequential_stateOp_reg[1]_0 ;
  wire [0:0]\FSM_sequential_stateOp_reg[1]_1 ;
  wire [0:0]\FSM_sequential_stateOp_reg[2] ;
  wire \FSM_sequential_stateXfer[1]_i_2_n_0 ;
  wire \FSM_sequential_stateXfer[2]_i_1_n_0 ;
  wire \FSM_sequential_stateXfer[2]_i_3_n_0 ;
  wire [0:0]\FSM_sequential_stateXfer_reg[2]_0 ;
  wire [2:0]Q;
  wire aclk_sig;
  wire [2:0]bitcnt;
  wire bitcnt0;
  wire \bitcnt[2]_i_4_n_0 ;
  wire \bytecnt[0]_i_1__1_n_0 ;
  wire \bytecnt[0]_i_2_n_0 ;
  wire \bytecnt[0]_i_3_n_0 ;
  wire \bytecnt[0]_i_4__0_n_0 ;
  wire \bytecnt[0]_i_4_n_0 ;
  wire \bytecnt[0]_i_5_n_0 ;
  wire [16:0]bytecnt_reg;
  wire \bytecnt_reg[0]_i_3_n_0 ;
  wire \bytecnt_reg[0]_i_3_n_1 ;
  wire \bytecnt_reg[0]_i_3_n_10 ;
  wire \bytecnt_reg[0]_i_3_n_11 ;
  wire \bytecnt_reg[0]_i_3_n_12 ;
  wire \bytecnt_reg[0]_i_3_n_13 ;
  wire \bytecnt_reg[0]_i_3_n_14 ;
  wire \bytecnt_reg[0]_i_3_n_15 ;
  wire \bytecnt_reg[0]_i_3_n_2 ;
  wire \bytecnt_reg[0]_i_3_n_3 ;
  wire \bytecnt_reg[0]_i_3_n_4 ;
  wire \bytecnt_reg[0]_i_3_n_5 ;
  wire \bytecnt_reg[0]_i_3_n_6 ;
  wire \bytecnt_reg[0]_i_3_n_7 ;
  wire \bytecnt_reg[0]_i_3_n_8 ;
  wire \bytecnt_reg[0]_i_3_n_9 ;
  wire \bytecnt_reg[16]_i_1_n_15 ;
  wire \bytecnt_reg[8]_i_1_n_0 ;
  wire \bytecnt_reg[8]_i_1_n_1 ;
  wire \bytecnt_reg[8]_i_1_n_10 ;
  wire \bytecnt_reg[8]_i_1_n_11 ;
  wire \bytecnt_reg[8]_i_1_n_12 ;
  wire \bytecnt_reg[8]_i_1_n_13 ;
  wire \bytecnt_reg[8]_i_1_n_14 ;
  wire \bytecnt_reg[8]_i_1_n_15 ;
  wire \bytecnt_reg[8]_i_1_n_2 ;
  wire \bytecnt_reg[8]_i_1_n_3 ;
  wire \bytecnt_reg[8]_i_1_n_4 ;
  wire \bytecnt_reg[8]_i_1_n_5 ;
  wire \bytecnt_reg[8]_i_1_n_6 ;
  wire \bytecnt_reg[8]_i_1_n_7 ;
  wire \bytecnt_reg[8]_i_1_n_8 ;
  wire \bytecnt_reg[8]_i_1_n_9 ;
  wire cs;
  wire data0;
  wire data2;
  wire data3;
  wire data4;
  wire data5;
  wire data6;
  wire data7;
  wire dneSpi;
  wire i0;
  wire \i[0]_i_1__21_n_0 ;
  wire \i[10]_i_3__0_n_0 ;
  wire \i[1]_i_1__16_n_0 ;
  wire \i[2]_i_1__12_n_0 ;
  wire \i[3]_i_1__12_n_0 ;
  wire \i[4]_i_1__12_n_0 ;
  wire \i[5]_i_1__11_n_0 ;
  wire \i[6]_i_1__13_n_0 ;
  wire \i[6]_i_3__1_n_0 ;
  wire \i[6]_i_4__1_n_0 ;
  wire \i[6]_i_5_n_0 ;
  wire \i[6]_i_6_n_0 ;
  wire i__carry_i_1__2_n_0;
  wire i__carry_i_2__2_n_0;
  wire i__carry_i_3__2_n_0;
  wire i__carry_i_4__2_n_0;
  wire i__carry_i_5__2_n_0;
  wire i__carry_i_6__2_n_0;
  wire \i_reg[0]_0 ;
  wire \i_reg[0]_1 ;
  wire \i_reg_n_0_[0] ;
  wire \i_reg_n_0_[1] ;
  wire \i_reg_n_0_[2] ;
  wire \i_reg_n_0_[3] ;
  wire \i_reg_n_0_[4] ;
  wire \i_reg_n_0_[5] ;
  wire \i_reg_n_0_[6] ;
  wire in5;
  wire \j[0]_i_1__1_n_0 ;
  wire \j[0]_i_2_n_0 ;
  wire \j_reg_n_0_[0] ;
  wire [0:0]len;
  wire mosi;
  wire mosi_sig;
  wire mosi_sig0__4;
  wire mosi_sig_i_1_n_0;
  wire mosi_sig_i_4_n_0;
  wire mosi_sig_i_5_n_0;
  wire mosi_sig_i_6_n_0;
  wire mosi_sig_i_7_n_0;
  wire [2:0]p_0_in;
  wire [2:0]p_3_out;
  wire rNotL_reg;
  wire req;
  wire reqInvLaserSet;
  wire sclk;
  wire send_var0;
  wire [7:0]\send_var_reg[7]_0 ;
  wire \send_var_reg_n_0_[0] ;
  wire \stateXfer1_inferred__0/i__carry_n_3 ;
  wire \stateXfer1_inferred__0/i__carry_n_4 ;
  wire \stateXfer1_inferred__0/i__carry_n_5 ;
  wire \stateXfer1_inferred__0/i__carry_n_6 ;
  wire \stateXfer1_inferred__0/i__carry_n_7 ;
  wire [2:0]stateXfer__0;
  wire [7:0]\NLW_bytecnt_reg[16]_i_1_CO_UNCONNECTED ;
  wire [7:1]\NLW_bytecnt_reg[16]_i_1_O_UNCONNECTED ;
  wire [7:6]\NLW_stateXfer1_inferred__0/i__carry_CO_UNCONNECTED ;
  wire [7:0]\NLW_stateXfer1_inferred__0/i__carry_O_UNCONNECTED ;

  LUT6 #(
    .INIT(64'hFFFF0033FFF055FF)) 
    \FSM_sequential_stateOp[0]_i_1 
       (.I0(\FSM_sequential_stateOp_reg[0]_0 ),
        .I1(dneSpi),
        .I2(\FSM_sequential_stateOp_reg[0]_1 ),
        .I3(Q[2]),
        .I4(Q[1]),
        .I5(Q[0]),
        .O(D[0]));
  (* SOFT_HLUTNM = "soft_lutpair2497" *) 
  LUT3 #(
    .INIT(8'h02)) 
    \FSM_sequential_stateOp[0]_i_2 
       (.I0(stateXfer__0[1]),
        .I1(stateXfer__0[2]),
        .I2(stateXfer__0[0]),
        .O(dneSpi));
  LUT6 #(
    .INIT(64'hEAEAEAFFEAEAEAEA)) 
    \FSM_sequential_stateOp[2]_i_1 
       (.I0(\FSM_sequential_stateOp[2]_i_3_n_0 ),
        .I1(\FSM_sequential_stateOp[2]_i_4_n_0 ),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(reqInvLaserSet),
        .I5(Q[2]),
        .O(\FSM_sequential_stateOp_reg[1] ));
  LUT6 #(
    .INIT(64'h3F3B0C083F3B3C08)) 
    \FSM_sequential_stateOp[2]_i_2 
       (.I0(\FSM_sequential_stateOp_reg[0]_0 ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(\FSM_sequential_stateOp[2]_i_7_n_0 ),
        .I5(\i_reg[0]_0 ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'h0AAADDFF0AAADDF5)) 
    \FSM_sequential_stateOp[2]_i_3 
       (.I0(Q[0]),
        .I1(reqInvLaserSet),
        .I2(\FSM_sequential_stateOp[2]_i_9_n_0 ),
        .I3(Q[2]),
        .I4(Q[1]),
        .I5(dneSpi),
        .O(\FSM_sequential_stateOp[2]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2492" *) 
  LUT4 #(
    .INIT(16'h0081)) 
    \FSM_sequential_stateOp[2]_i_4 
       (.I0(stateXfer__0[2]),
        .I1(stateXfer__0[1]),
        .I2(stateXfer__0[0]),
        .I3(Q[2]),
        .O(\FSM_sequential_stateOp[2]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000FDFDFF000000)) 
    \FSM_sequential_stateOp[2]_i_7 
       (.I0(stateXfer__0[1]),
        .I1(stateXfer__0[2]),
        .I2(stateXfer__0[0]),
        .I3(\i_reg[0]_1 ),
        .I4(Q[1]),
        .I5(Q[0]),
        .O(\FSM_sequential_stateOp[2]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2488" *) 
  LUT3 #(
    .INIT(8'h2E)) 
    \FSM_sequential_stateOp[2]_i_9 
       (.I0(stateXfer__0[2]),
        .I1(stateXfer__0[0]),
        .I2(stateXfer__0[1]),
        .O(\FSM_sequential_stateOp[2]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2488" *) 
  LUT5 #(
    .INIT(32'hF5075507)) 
    \FSM_sequential_stateXfer[0]_i_1 
       (.I0(stateXfer__0[0]),
        .I1(in5),
        .I2(stateXfer__0[1]),
        .I3(stateXfer__0[2]),
        .I4(len),
        .O(p_3_out[0]));
  (* SOFT_HLUTNM = "soft_lutpair2486" *) 
  LUT5 #(
    .INIT(32'hFCAF000F)) 
    \FSM_sequential_stateXfer[1]_i_1 
       (.I0(req),
        .I1(\FSM_sequential_stateXfer[1]_i_2_n_0 ),
        .I2(stateXfer__0[1]),
        .I3(stateXfer__0[2]),
        .I4(stateXfer__0[0]),
        .O(p_3_out[1]));
  (* SOFT_HLUTNM = "soft_lutpair2489" *) 
  LUT3 #(
    .INIT(8'h7F)) 
    \FSM_sequential_stateXfer[1]_i_2 
       (.I0(bitcnt[0]),
        .I1(bitcnt[1]),
        .I2(bitcnt[2]),
        .O(\FSM_sequential_stateXfer[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFEEFFAAFBFEFBBAF)) 
    \FSM_sequential_stateXfer[2]_i_1 
       (.I0(\FSM_sequential_stateXfer[2]_i_3_n_0 ),
        .I1(stateXfer__0[2]),
        .I2(stateXfer__0[0]),
        .I3(stateXfer__0[1]),
        .I4(mosi_sig0__4),
        .I5(req),
        .O(\FSM_sequential_stateXfer[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h6961616161616961)) 
    \FSM_sequential_stateXfer[2]_i_2 
       (.I0(stateXfer__0[1]),
        .I1(stateXfer__0[0]),
        .I2(stateXfer__0[2]),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(Q[2]),
        .O(p_3_out[2]));
  (* SOFT_HLUTNM = "soft_lutpair2493" *) 
  LUT4 #(
    .INIT(16'h0100)) 
    \FSM_sequential_stateXfer[2]_i_3 
       (.I0(\j_reg_n_0_[0] ),
        .I1(stateXfer__0[1]),
        .I2(stateXfer__0[2]),
        .I3(\i[6]_i_4__1_n_0 ),
        .O(\FSM_sequential_stateXfer[2]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2487" *) 
  LUT3 #(
    .INIT(8'h82)) 
    \FSM_sequential_stateXfer[2]_i_4 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(req));
  (* FSM_ENCODED_STATES = "iSTATE:111,iSTATE0:101,iSTATE1:001,iSTATE2:110,iSTATE3:100,iSTATE4:011,iSTATE5:010,iSTATE6:000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateXfer_reg[0] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_stateXfer[2]_i_1_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2]_0 ),
        .D(p_3_out[0]),
        .Q(stateXfer__0[0]));
  (* FSM_ENCODED_STATES = "iSTATE:111,iSTATE0:101,iSTATE1:001,iSTATE2:110,iSTATE3:100,iSTATE4:011,iSTATE5:010,iSTATE6:000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateXfer_reg[1] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_stateXfer[2]_i_1_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2]_0 ),
        .D(p_3_out[1]),
        .Q(stateXfer__0[1]));
  (* FSM_ENCODED_STATES = "iSTATE:111,iSTATE0:101,iSTATE1:001,iSTATE2:110,iSTATE3:100,iSTATE4:011,iSTATE5:010,iSTATE6:000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateXfer_reg[2] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_stateXfer[2]_i_1_n_0 ),
        .CLR(\FSM_sequential_stateXfer_reg[2]_0 ),
        .D(p_3_out[2]),
        .Q(stateXfer__0[2]));
  LUT1 #(
    .INIT(2'h1)) 
    \bitcnt[0]_i_1__0 
       (.I0(bitcnt[0]),
        .O(p_0_in[0]));
  (* SOFT_HLUTNM = "soft_lutpair2496" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \bitcnt[1]_i_1__0 
       (.I0(bitcnt[1]),
        .I1(bitcnt[0]),
        .O(p_0_in[1]));
  LUT5 #(
    .INIT(32'h00080000)) 
    \bitcnt[2]_i_1__0 
       (.I0(stateXfer__0[1]),
        .I1(stateXfer__0[0]),
        .I2(stateXfer__0[2]),
        .I3(\FSM_sequential_stateXfer_reg[2]_0 ),
        .I4(req),
        .O(send_var0));
  LUT5 #(
    .INIT(32'hFFFF1555)) 
    \bitcnt[2]_i_2 
       (.I0(\bitcnt[2]_i_4_n_0 ),
        .I1(bitcnt[0]),
        .I2(bitcnt[1]),
        .I3(bitcnt[2]),
        .I4(\bytecnt[0]_i_2_n_0 ),
        .O(bitcnt0));
  (* SOFT_HLUTNM = "soft_lutpair2496" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \bitcnt[2]_i_3 
       (.I0(bitcnt[0]),
        .I1(bitcnt[1]),
        .I2(bitcnt[2]),
        .O(p_0_in[2]));
  (* SOFT_HLUTNM = "soft_lutpair2490" *) 
  LUT5 #(
    .INIT(32'hFDFFFFFF)) 
    \bitcnt[2]_i_4 
       (.I0(mosi_sig0__4),
        .I1(\FSM_sequential_stateXfer_reg[2]_0 ),
        .I2(stateXfer__0[1]),
        .I3(stateXfer__0[0]),
        .I4(stateXfer__0[2]),
        .O(\bitcnt[2]_i_4_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bitcnt_reg[0] 
       (.C(aclk_sig),
        .CE(bitcnt0),
        .D(p_0_in[0]),
        .Q(bitcnt[0]),
        .R(send_var0));
  FDRE #(
    .INIT(1'b0)) 
    \bitcnt_reg[1] 
       (.C(aclk_sig),
        .CE(bitcnt0),
        .D(p_0_in[1]),
        .Q(bitcnt[1]),
        .R(send_var0));
  FDRE #(
    .INIT(1'b0)) 
    \bitcnt_reg[2] 
       (.C(aclk_sig),
        .CE(bitcnt0),
        .D(p_0_in[2]),
        .Q(bitcnt[2]),
        .R(send_var0));
  LUT6 #(
    .INIT(64'hFBFB3F33F8083F03)) 
    \bytecnt[0]_i_1__0 
       (.I0(reqInvLaserSet),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(\bytecnt[0]_i_3_n_0 ),
        .I4(Q[0]),
        .I5(\bytecnt[0]_i_4_n_0 ),
        .O(\FSM_sequential_stateOp_reg[2] ));
  LUT4 #(
    .INIT(16'h0001)) 
    \bytecnt[0]_i_1__1 
       (.I0(\FSM_sequential_stateXfer_reg[2]_0 ),
        .I1(stateXfer__0[0]),
        .I2(stateXfer__0[1]),
        .I3(stateXfer__0[2]),
        .O(\bytecnt[0]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000004004)) 
    \bytecnt[0]_i_2 
       (.I0(\FSM_sequential_stateXfer_reg[2]_0 ),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(stateXfer__0[2]),
        .I5(\bytecnt[0]_i_4__0_n_0 ),
        .O(\bytecnt[0]_i_2_n_0 ));
  LUT3 #(
    .INIT(8'h08)) 
    \bytecnt[0]_i_3 
       (.I0(\i[10]_i_3__0_n_0 ),
        .I1(\i_reg[0]_1 ),
        .I2(rNotL_reg),
        .O(\bytecnt[0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2492" *) 
  LUT4 #(
    .INIT(16'h1510)) 
    \bytecnt[0]_i_4 
       (.I0(Q[1]),
        .I1(stateXfer__0[1]),
        .I2(stateXfer__0[0]),
        .I3(stateXfer__0[2]),
        .O(\bytecnt[0]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2497" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \bytecnt[0]_i_4__0 
       (.I0(stateXfer__0[0]),
        .I1(stateXfer__0[1]),
        .O(\bytecnt[0]_i_4__0_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \bytecnt[0]_i_5 
       (.I0(bytecnt_reg[0]),
        .O(\bytecnt[0]_i_5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[0] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[0]_i_3_n_15 ),
        .Q(bytecnt_reg[0]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \bytecnt_reg[0]_i_3 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\bytecnt_reg[0]_i_3_n_0 ,\bytecnt_reg[0]_i_3_n_1 ,\bytecnt_reg[0]_i_3_n_2 ,\bytecnt_reg[0]_i_3_n_3 ,\bytecnt_reg[0]_i_3_n_4 ,\bytecnt_reg[0]_i_3_n_5 ,\bytecnt_reg[0]_i_3_n_6 ,\bytecnt_reg[0]_i_3_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1}),
        .O({\bytecnt_reg[0]_i_3_n_8 ,\bytecnt_reg[0]_i_3_n_9 ,\bytecnt_reg[0]_i_3_n_10 ,\bytecnt_reg[0]_i_3_n_11 ,\bytecnt_reg[0]_i_3_n_12 ,\bytecnt_reg[0]_i_3_n_13 ,\bytecnt_reg[0]_i_3_n_14 ,\bytecnt_reg[0]_i_3_n_15 }),
        .S({bytecnt_reg[7:1],\bytecnt[0]_i_5_n_0 }));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[10] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[8]_i_1_n_13 ),
        .Q(bytecnt_reg[10]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[11] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[8]_i_1_n_12 ),
        .Q(bytecnt_reg[11]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[12] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[8]_i_1_n_11 ),
        .Q(bytecnt_reg[12]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[13] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[8]_i_1_n_10 ),
        .Q(bytecnt_reg[13]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[14] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[8]_i_1_n_9 ),
        .Q(bytecnt_reg[14]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[15] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[8]_i_1_n_8 ),
        .Q(bytecnt_reg[15]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[16] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[16]_i_1_n_15 ),
        .Q(bytecnt_reg[16]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \bytecnt_reg[16]_i_1 
       (.CI(\bytecnt_reg[8]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO(\NLW_bytecnt_reg[16]_i_1_CO_UNCONNECTED [7:0]),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_bytecnt_reg[16]_i_1_O_UNCONNECTED [7:1],\bytecnt_reg[16]_i_1_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,bytecnt_reg[16]}));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[1] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[0]_i_3_n_14 ),
        .Q(bytecnt_reg[1]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[2] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[0]_i_3_n_13 ),
        .Q(bytecnt_reg[2]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[3] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[0]_i_3_n_12 ),
        .Q(bytecnt_reg[3]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[4] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[0]_i_3_n_11 ),
        .Q(bytecnt_reg[4]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[5] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[0]_i_3_n_10 ),
        .Q(bytecnt_reg[5]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[6] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[0]_i_3_n_9 ),
        .Q(bytecnt_reg[6]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[7] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[0]_i_3_n_8 ),
        .Q(bytecnt_reg[7]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[8] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[8]_i_1_n_15 ),
        .Q(bytecnt_reg[8]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \bytecnt_reg[8]_i_1 
       (.CI(\bytecnt_reg[0]_i_3_n_0 ),
        .CI_TOP(1'b0),
        .CO({\bytecnt_reg[8]_i_1_n_0 ,\bytecnt_reg[8]_i_1_n_1 ,\bytecnt_reg[8]_i_1_n_2 ,\bytecnt_reg[8]_i_1_n_3 ,\bytecnt_reg[8]_i_1_n_4 ,\bytecnt_reg[8]_i_1_n_5 ,\bytecnt_reg[8]_i_1_n_6 ,\bytecnt_reg[8]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\bytecnt_reg[8]_i_1_n_8 ,\bytecnt_reg[8]_i_1_n_9 ,\bytecnt_reg[8]_i_1_n_10 ,\bytecnt_reg[8]_i_1_n_11 ,\bytecnt_reg[8]_i_1_n_12 ,\bytecnt_reg[8]_i_1_n_13 ,\bytecnt_reg[8]_i_1_n_14 ,\bytecnt_reg[8]_i_1_n_15 }),
        .S(bytecnt_reg[15:8]));
  FDRE #(
    .INIT(1'b0)) 
    \bytecnt_reg[9] 
       (.C(aclk_sig),
        .CE(\bytecnt[0]_i_2_n_0 ),
        .D(\bytecnt_reg[8]_i_1_n_14 ),
        .Q(bytecnt_reg[9]),
        .R(\bytecnt[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2486" *) 
  LUT3 #(
    .INIT(8'h83)) 
    cs_INST_0
       (.I0(stateXfer__0[1]),
        .I1(stateXfer__0[0]),
        .I2(stateXfer__0[2]),
        .O(cs));
  LUT6 #(
    .INIT(64'h0000000043157F15)) 
    \i[0]_i_1__21 
       (.I0(\i[6]_i_4__1_n_0 ),
        .I1(stateXfer__0[1]),
        .I2(stateXfer__0[0]),
        .I3(stateXfer__0[2]),
        .I4(mosi_sig0__4),
        .I5(\i_reg_n_0_[0] ),
        .O(\i[0]_i_1__21_n_0 ));
  LUT6 #(
    .INIT(64'h0080FFFF00800080)) 
    \i[10]_i_1__4 
       (.I0(\i_reg[0]_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[2]),
        .I4(\i_reg[0]_1 ),
        .I5(\i[10]_i_3__0_n_0 ),
        .O(\FSM_sequential_stateOp_reg[1]_0 ));
  LUT6 #(
    .INIT(64'h0000400100000000)) 
    \i[10]_i_3__0 
       (.I0(Q[2]),
        .I1(stateXfer__0[0]),
        .I2(stateXfer__0[1]),
        .I3(stateXfer__0[2]),
        .I4(Q[0]),
        .I5(Q[1]),
        .O(\i[10]_i_3__0_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \i[1]_i_1__16 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .O(\i[1]_i_1__16_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2495" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[2]_i_1__12 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[2] ),
        .O(\i[2]_i_1__12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2495" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \i[3]_i_1__12 
       (.I0(\i_reg_n_0_[2] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(\i_reg_n_0_[3] ),
        .O(\i[3]_i_1__12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2491" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \i[4]_i_1__12 
       (.I0(\i_reg_n_0_[3] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[2] ),
        .I4(\i_reg_n_0_[4] ),
        .O(\i[4]_i_1__12_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \i[5]_i_1__11 
       (.I0(\i_reg_n_0_[4] ),
        .I1(\i_reg_n_0_[2] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[3] ),
        .I5(\i_reg_n_0_[5] ),
        .O(\i[5]_i_1__11_n_0 ));
  LUT6 #(
    .INIT(64'h8AA0A8888000A888)) 
    \i[6]_i_1__13 
       (.I0(i0),
        .I1(\i[6]_i_4__1_n_0 ),
        .I2(stateXfer__0[1]),
        .I3(stateXfer__0[0]),
        .I4(stateXfer__0[2]),
        .I5(mosi_sig0__4),
        .O(\i[6]_i_1__13_n_0 ));
  LUT5 #(
    .INIT(32'h050F0D00)) 
    \i[6]_i_2__2 
       (.I0(stateXfer__0[1]),
        .I1(req),
        .I2(\FSM_sequential_stateXfer_reg[2]_0 ),
        .I3(stateXfer__0[0]),
        .I4(stateXfer__0[2]),
        .O(i0));
  LUT3 #(
    .INIT(8'hD2)) 
    \i[6]_i_3__1 
       (.I0(\i_reg_n_0_[5] ),
        .I1(\i[6]_i_5_n_0 ),
        .I2(\i_reg_n_0_[6] ),
        .O(\i[6]_i_3__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2494" *) 
  LUT4 #(
    .INIT(16'h8288)) 
    \i[6]_i_4__1 
       (.I0(\i[6]_i_6_n_0 ),
        .I1(\i_reg_n_0_[6] ),
        .I2(\i[6]_i_5_n_0 ),
        .I3(\i_reg_n_0_[5] ),
        .O(\i[6]_i_4__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2491" *) 
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \i[6]_i_5 
       (.I0(\i_reg_n_0_[3] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[2] ),
        .I4(\i_reg_n_0_[4] ),
        .O(\i[6]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000002000)) 
    \i[6]_i_6 
       (.I0(\i_reg_n_0_[5] ),
        .I1(\i_reg_n_0_[3] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[2] ),
        .I5(\i_reg_n_0_[4] ),
        .O(\i[6]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h1)) 
    i__carry_i_1__2
       (.I0(bytecnt_reg[16]),
        .I1(bytecnt_reg[15]),
        .O(i__carry_i_1__2_n_0));
  LUT3 #(
    .INIT(8'h01)) 
    i__carry_i_2__2
       (.I0(bytecnt_reg[14]),
        .I1(bytecnt_reg[13]),
        .I2(bytecnt_reg[12]),
        .O(i__carry_i_2__2_n_0));
  LUT3 #(
    .INIT(8'h01)) 
    i__carry_i_3__2
       (.I0(bytecnt_reg[11]),
        .I1(bytecnt_reg[10]),
        .I2(bytecnt_reg[9]),
        .O(i__carry_i_3__2_n_0));
  LUT3 #(
    .INIT(8'h01)) 
    i__carry_i_4__2
       (.I0(bytecnt_reg[8]),
        .I1(bytecnt_reg[7]),
        .I2(bytecnt_reg[6]),
        .O(i__carry_i_4__2_n_0));
  LUT3 #(
    .INIT(8'h01)) 
    i__carry_i_5__2
       (.I0(bytecnt_reg[5]),
        .I1(bytecnt_reg[4]),
        .I2(bytecnt_reg[3]),
        .O(i__carry_i_5__2_n_0));
  LUT4 #(
    .INIT(16'h1001)) 
    i__carry_i_6__2
       (.I0(bytecnt_reg[2]),
        .I1(bytecnt_reg[0]),
        .I2(len),
        .I3(bytecnt_reg[1]),
        .O(i__carry_i_6__2_n_0));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(i0),
        .D(\i[0]_i_1__21_n_0 ),
        .Q(\i_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(i0),
        .D(\i[1]_i_1__16_n_0 ),
        .Q(\i_reg_n_0_[1] ),
        .R(\i[6]_i_1__13_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(i0),
        .D(\i[2]_i_1__12_n_0 ),
        .Q(\i_reg_n_0_[2] ),
        .R(\i[6]_i_1__13_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(i0),
        .D(\i[3]_i_1__12_n_0 ),
        .Q(\i_reg_n_0_[3] ),
        .R(\i[6]_i_1__13_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(i0),
        .D(\i[4]_i_1__12_n_0 ),
        .Q(\i_reg_n_0_[4] ),
        .R(\i[6]_i_1__13_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(i0),
        .D(\i[5]_i_1__11_n_0 ),
        .Q(\i_reg_n_0_[5] ),
        .R(\i[6]_i_1__13_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(i0),
        .D(\i[6]_i_3__1_n_0 ),
        .Q(\i_reg_n_0_[6] ),
        .R(\i[6]_i_1__13_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2489" *) 
  LUT5 #(
    .INIT(32'h8CCCCCCC)) 
    \j[0]_i_1__1 
       (.I0(\bitcnt[2]_i_4_n_0 ),
        .I1(\j[0]_i_2_n_0 ),
        .I2(bitcnt[0]),
        .I3(bitcnt[1]),
        .I4(bitcnt[2]),
        .O(\j[0]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFDF00000020)) 
    \j[0]_i_2 
       (.I0(\i[6]_i_4__1_n_0 ),
        .I1(\FSM_sequential_stateXfer_reg[2]_0 ),
        .I2(stateXfer__0[0]),
        .I3(stateXfer__0[2]),
        .I4(stateXfer__0[1]),
        .I5(\j_reg_n_0_[0] ),
        .O(\j[0]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF1000)) 
    \j[7]_i_1__1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(\FSM_sequential_stateOp_reg[0]_0 ),
        .I4(\bytecnt[0]_i_3_n_0 ),
        .O(\FSM_sequential_stateOp_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \j_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\j[0]_i_1__1_n_0 ),
        .Q(\j_reg_n_0_[0] ),
        .R(1'b0));
  LUT6 #(
    .INIT(64'hFBFFFFFA0800000A)) 
    mosi_sig_i_1
       (.I0(mosi_sig),
        .I1(mosi_sig0__4),
        .I2(stateXfer__0[0]),
        .I3(stateXfer__0[1]),
        .I4(stateXfer__0[2]),
        .I5(mosi),
        .O(mosi_sig_i_1_n_0));
  LUT6 #(
    .INIT(64'hC088C088C08888C0)) 
    mosi_sig_i_2
       (.I0(mosi_sig_i_4_n_0),
        .I1(mosi_sig_i_5_n_0),
        .I2(mosi_sig_i_6_n_0),
        .I3(bitcnt[2]),
        .I4(bitcnt[1]),
        .I5(bitcnt[0]),
        .O(mosi_sig));
  (* SOFT_HLUTNM = "soft_lutpair2494" *) 
  LUT4 #(
    .INIT(16'h2822)) 
    mosi_sig_i_3
       (.I0(mosi_sig_i_7_n_0),
        .I1(\i_reg_n_0_[6] ),
        .I2(\i[6]_i_5_n_0 ),
        .I3(\i_reg_n_0_[5] ),
        .O(mosi_sig0__4));
  LUT6 #(
    .INIT(64'hFACF0ACFFAC00AC0)) 
    mosi_sig_i_4
       (.I0(data7),
        .I1(data6),
        .I2(bitcnt[1]),
        .I3(bitcnt[0]),
        .I4(data5),
        .I5(data4),
        .O(mosi_sig_i_4_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2490" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    mosi_sig_i_5
       (.I0(stateXfer__0[2]),
        .I1(stateXfer__0[1]),
        .I2(stateXfer__0[0]),
        .O(mosi_sig_i_5_n_0));
  LUT6 #(
    .INIT(64'hFACF0ACFFAC00AC0)) 
    mosi_sig_i_6
       (.I0(data3),
        .I1(data2),
        .I2(bitcnt[1]),
        .I3(bitcnt[0]),
        .I4(\send_var_reg_n_0_[0] ),
        .I5(data0),
        .O(mosi_sig_i_6_n_0));
  LUT6 #(
    .INIT(64'h0000002000000000)) 
    mosi_sig_i_7
       (.I0(\i_reg_n_0_[5] ),
        .I1(\i_reg_n_0_[3] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[2] ),
        .I5(\i_reg_n_0_[4] ),
        .O(mosi_sig_i_7_n_0));
  FDCE mosi_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\FSM_sequential_stateXfer_reg[2]_0 ),
        .D(mosi_sig_i_1_n_0),
        .Q(mosi));
  LUT6 #(
    .INIT(64'hF3FFF7FFA2AAA2AA)) 
    rNotL_i_1
       (.I0(\bytecnt[0]_i_3_n_0 ),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(reqInvLaserSet),
        .I5(rNotL_reg),
        .O(\FSM_sequential_stateOp_reg[0] ));
  (* SOFT_HLUTNM = "soft_lutpair2493" *) 
  LUT3 #(
    .INIT(8'h40)) 
    sclk_INST_0
       (.I0(stateXfer__0[1]),
        .I1(stateXfer__0[0]),
        .I2(stateXfer__0[2]),
        .O(sclk));
  FDRE \send_var_reg[0] 
       (.C(aclk_sig),
        .CE(send_var0),
        .D(\send_var_reg[7]_0 [0]),
        .Q(\send_var_reg_n_0_[0] ),
        .R(1'b0));
  FDRE \send_var_reg[1] 
       (.C(aclk_sig),
        .CE(send_var0),
        .D(\send_var_reg[7]_0 [1]),
        .Q(data2),
        .R(1'b0));
  FDRE \send_var_reg[2] 
       (.C(aclk_sig),
        .CE(send_var0),
        .D(\send_var_reg[7]_0 [2]),
        .Q(data3),
        .R(1'b0));
  FDRE \send_var_reg[3] 
       (.C(aclk_sig),
        .CE(send_var0),
        .D(\send_var_reg[7]_0 [3]),
        .Q(data4),
        .R(1'b0));
  FDRE \send_var_reg[4] 
       (.C(aclk_sig),
        .CE(send_var0),
        .D(\send_var_reg[7]_0 [4]),
        .Q(data5),
        .R(1'b0));
  FDRE \send_var_reg[5] 
       (.C(aclk_sig),
        .CE(send_var0),
        .D(\send_var_reg[7]_0 [5]),
        .Q(data6),
        .R(1'b0));
  FDRE \send_var_reg[6] 
       (.C(aclk_sig),
        .CE(send_var0),
        .D(\send_var_reg[7]_0 [6]),
        .Q(data7),
        .R(1'b0));
  FDRE \send_var_reg[7] 
       (.C(aclk_sig),
        .CE(send_var0),
        .D(\send_var_reg[7]_0 [7]),
        .Q(data0),
        .R(1'b0));
  CARRY8 \stateXfer1_inferred__0/i__carry 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\NLW_stateXfer1_inferred__0/i__carry_CO_UNCONNECTED [7:6],in5,\stateXfer1_inferred__0/i__carry_n_3 ,\stateXfer1_inferred__0/i__carry_n_4 ,\stateXfer1_inferred__0/i__carry_n_5 ,\stateXfer1_inferred__0/i__carry_n_6 ,\stateXfer1_inferred__0/i__carry_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(\NLW_stateXfer1_inferred__0/i__carry_O_UNCONNECTED [7:0]),
        .S({1'b0,1'b0,i__carry_i_1__2_n_0,i__carry_i_2__2_n_0,i__carry_i_3__2_n_0,i__carry_i_4__2_n_0,i__carry_i_5__2_n_0,i__carry_i_6__2_n_0}));
  (* SOFT_HLUTNM = "soft_lutpair2487" *) 
  LUT5 #(
    .INIT(32'hF83F0803)) 
    \txbuf[1][7]_i_1 
       (.I0(reqInvLaserSet),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(\bytecnt[0]_i_3_n_0 ),
        .O(E));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_State
   (\seq_reg[1][13]_0 ,
    \ixSeq_reg[1]_0 ,
    Q,
    \ixSeq_reg[0]_0 ,
    \seq_reg[0][5]_0 ,
    rgb0,
    S,
    DI,
    \seq_reg[1][13]_1 ,
    \i_reg[0]_0 ,
    \seq_reg[1][5]_0 ,
    aclk_sig,
    \i_reg[0]_1 ,
    \seq[1]_2 ,
    D,
    \stateBlue0_inferred__0/i__carry ,
    \stateRed0_inferred__0/i__carry ,
    \stateRed0_inferred__0/i__carry_0 ,
    tkclk,
    stateStats,
    \i_reg[0]_2 ,
    \seq_reg[0][21]_0 );
  output [0:0]\seq_reg[1][13]_0 ;
  output [1:0]\ixSeq_reg[1]_0 ;
  output [0:0]Q;
  output [1:0]\ixSeq_reg[0]_0 ;
  output [0:0]\seq_reg[0][5]_0 ;
  output [1:0]rgb0;
  output [1:0]S;
  output [1:0]DI;
  output \seq_reg[1][13]_1 ;
  output [0:0]\i_reg[0]_0 ;
  input \seq_reg[1][5]_0 ;
  input aclk_sig;
  input [0:0]\i_reg[0]_1 ;
  input [0:0]\seq[1]_2 ;
  input [3:0]D;
  input \stateBlue0_inferred__0/i__carry ;
  input [3:0]\stateRed0_inferred__0/i__carry ;
  input \stateRed0_inferred__0/i__carry_0 ;
  input tkclk;
  input stateStats;
  input [0:0]\i_reg[0]_2 ;
  input [1:0]\seq_reg[0][21]_0 ;

  wire [3:0]D;
  wire [1:0]DI;
  wire [0:0]Q;
  wire [1:0]S;
  wire aclk_sig;
  wire \i[10]_i_1__0_n_0 ;
  wire \i[10]_i_3_n_0 ;
  wire \i[5]_i_2__2_n_0 ;
  wire \i[9]_i_2__1_n_0 ;
  wire [10:1]i_reg;
  wire [0:0]\i_reg[0]_0 ;
  wire [0:0]\i_reg[0]_1 ;
  wire [0:0]\i_reg[0]_2 ;
  wire ixSeq;
  wire \ixSeq[0]_i_1_n_0 ;
  wire \ixSeq[1]_i_1_n_0 ;
  wire \ixSeq[2]_i_2_n_0 ;
  wire \ixSeq[2]_i_3_n_0 ;
  wire \ixSeq[2]_i_4_n_0 ;
  wire \ixSeq[2]_i_5_n_0 ;
  wire [1:0]\ixSeq_reg[0]_0 ;
  wire [1:0]\ixSeq_reg[1]_0 ;
  wire \ixSeq_reg_n_0_[0] ;
  wire \ixSeq_reg_n_0_[1] ;
  wire [10:1]p_0_in;
  wire [1:0]rgb0;
  wire \seq[0][21]_i_1_n_0 ;
  wire \seq[0][21]_i_3_n_0 ;
  wire \seq[0][21]_i_4_n_0 ;
  wire \seq[0][21]_i_5_n_0 ;
  wire [0:0]\seq[1]_2 ;
  wire [1:0]\seq_reg[0][21]_0 ;
  wire [0:0]\seq_reg[0][5]_0 ;
  wire [21:5]\seq_reg[0]_1 ;
  wire [0:0]\seq_reg[1][13]_0 ;
  wire \seq_reg[1][13]_1 ;
  wire \seq_reg[1][5]_0 ;
  wire [5:5]\seq_reg[1]_0 ;
  wire \stateBlue0_inferred__0/i__carry ;
  wire [3:0]\stateRed0_inferred__0/i__carry ;
  wire \stateRed0_inferred__0/i__carry_0 ;
  wire stateStats;
  wire tkclk;

  LUT3 #(
    .INIT(8'hBA)) 
    \i[10]_i_1__0 
       (.I0(ixSeq),
        .I1(tkclk),
        .I2(stateStats),
        .O(\i[10]_i_1__0_n_0 ));
  LUT4 #(
    .INIT(16'hB040)) 
    \i[10]_i_2__0 
       (.I0(\i[10]_i_3_n_0 ),
        .I1(i_reg[9]),
        .I2(stateStats),
        .I3(i_reg[10]),
        .O(p_0_in[10]));
  (* SOFT_HLUTNM = "soft_lutpair2878" *) 
  LUT4 #(
    .INIT(16'hF7FF)) 
    \i[10]_i_3 
       (.I0(i_reg[7]),
        .I1(i_reg[6]),
        .I2(\i[9]_i_2__1_n_0 ),
        .I3(i_reg[8]),
        .O(\i[10]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2879" *) 
  LUT3 #(
    .INIT(8'h60)) 
    \i[1]_i_1__7 
       (.I0(i_reg[1]),
        .I1(\i_reg[0]_0 ),
        .I2(stateStats),
        .O(p_0_in[1]));
  (* SOFT_HLUTNM = "soft_lutpair2875" *) 
  LUT4 #(
    .INIT(16'h7080)) 
    \i[2]_i_1__4 
       (.I0(\i_reg[0]_0 ),
        .I1(i_reg[1]),
        .I2(stateStats),
        .I3(i_reg[2]),
        .O(p_0_in[2]));
  (* SOFT_HLUTNM = "soft_lutpair2875" *) 
  LUT5 #(
    .INIT(32'h7F008000)) 
    \i[3]_i_1__4 
       (.I0(i_reg[1]),
        .I1(\i_reg[0]_0 ),
        .I2(i_reg[2]),
        .I3(stateStats),
        .I4(i_reg[3]),
        .O(p_0_in[3]));
  LUT6 #(
    .INIT(64'h7FFF000080000000)) 
    \i[4]_i_1__4 
       (.I0(i_reg[2]),
        .I1(\i_reg[0]_0 ),
        .I2(i_reg[1]),
        .I3(i_reg[3]),
        .I4(stateStats),
        .I5(i_reg[4]),
        .O(p_0_in[4]));
  (* SOFT_HLUTNM = "soft_lutpair2879" *) 
  LUT3 #(
    .INIT(8'h48)) 
    \i[5]_i_1__3 
       (.I0(\i[5]_i_2__2_n_0 ),
        .I1(stateStats),
        .I2(i_reg[5]),
        .O(p_0_in[5]));
  LUT5 #(
    .INIT(32'h80000000)) 
    \i[5]_i_2__2 
       (.I0(i_reg[4]),
        .I1(i_reg[3]),
        .I2(i_reg[1]),
        .I3(\i_reg[0]_0 ),
        .I4(i_reg[2]),
        .O(\i[5]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2878" *) 
  LUT3 #(
    .INIT(8'h84)) 
    \i[6]_i_1__2 
       (.I0(\i[9]_i_2__1_n_0 ),
        .I1(stateStats),
        .I2(i_reg[6]),
        .O(p_0_in[6]));
  (* SOFT_HLUTNM = "soft_lutpair2876" *) 
  LUT4 #(
    .INIT(16'hD020)) 
    \i[7]_i_1__2 
       (.I0(i_reg[6]),
        .I1(\i[9]_i_2__1_n_0 ),
        .I2(stateStats),
        .I3(i_reg[7]),
        .O(p_0_in[7]));
  (* SOFT_HLUTNM = "soft_lutpair2876" *) 
  LUT5 #(
    .INIT(32'hBF004000)) 
    \i[8]_i_1__2 
       (.I0(\i[9]_i_2__1_n_0 ),
        .I1(i_reg[6]),
        .I2(i_reg[7]),
        .I3(stateStats),
        .I4(i_reg[8]),
        .O(p_0_in[8]));
  LUT6 #(
    .INIT(64'hF7FF000008000000)) 
    \i[9]_i_1__1 
       (.I0(i_reg[7]),
        .I1(i_reg[6]),
        .I2(\i[9]_i_2__1_n_0 ),
        .I3(i_reg[8]),
        .I4(stateStats),
        .I5(i_reg[9]),
        .O(p_0_in[9]));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \i[9]_i_2__1 
       (.I0(i_reg[2]),
        .I1(\i_reg[0]_0 ),
        .I2(i_reg[1]),
        .I3(i_reg[3]),
        .I4(i_reg[4]),
        .I5(i_reg[5]),
        .O(\i[9]_i_2__1_n_0 ));
  LUT6 #(
    .INIT(64'h002000F0FAFAFAFA)) 
    i__carry_i_1
       (.I0(D[2]),
        .I1(\ixSeq_reg_n_0_[0] ),
        .I2(D[3]),
        .I3(Q),
        .I4(\ixSeq_reg_n_0_[1] ),
        .I5(\seq_reg[1][13]_0 ),
        .O(\ixSeq_reg[0]_0 [1]));
  LUT2 #(
    .INIT(4'h7)) 
    i__carry_i_10
       (.I0(\seq_reg[1][13]_0 ),
        .I1(Q),
        .O(\seq_reg[1][13]_1 ));
  LUT6 #(
    .INIT(64'h00000002AAAAAAA2)) 
    i__carry_i_1__0
       (.I0(\stateBlue0_inferred__0/i__carry ),
        .I1(\seq_reg[0]_1 [5]),
        .I2(\ixSeq_reg_n_0_[0] ),
        .I3(\ixSeq_reg_n_0_[1] ),
        .I4(Q),
        .I5(\seq_reg[1]_0 ),
        .O(\seq_reg[0][5]_0 ));
  LUT5 #(
    .INIT(32'hAAA8AAAA)) 
    i__carry_i_1__1
       (.I0(\stateRed0_inferred__0/i__carry_0 ),
        .I1(Q),
        .I2(\ixSeq_reg_n_0_[1] ),
        .I3(\ixSeq_reg_n_0_[0] ),
        .I4(\seq_reg[0]_1 [21]),
        .O(DI[1]));
  LUT6 #(
    .INIT(64'hEEEEEEE0EEEEEEEE)) 
    i__carry_i_2__0
       (.I0(\stateRed0_inferred__0/i__carry [1]),
        .I1(\stateRed0_inferred__0/i__carry [0]),
        .I2(Q),
        .I3(\ixSeq_reg_n_0_[1] ),
        .I4(\ixSeq_reg_n_0_[0] ),
        .I5(\seq_reg[0]_1 [21]),
        .O(DI[0]));
  LUT6 #(
    .INIT(64'h3B3B333F2A22222A)) 
    i__carry_i_2__1
       (.I0(D[1]),
        .I1(\seq_reg[1][13]_0 ),
        .I2(Q),
        .I3(\ixSeq_reg_n_0_[0] ),
        .I4(\ixSeq_reg_n_0_[1] ),
        .I5(D[0]),
        .O(\ixSeq_reg[0]_0 [0]));
  LUT6 #(
    .INIT(64'hC804C00400330833)) 
    i__carry_i_6
       (.I0(\ixSeq_reg_n_0_[1] ),
        .I1(\seq_reg[1][13]_0 ),
        .I2(Q),
        .I3(D[3]),
        .I4(\ixSeq_reg_n_0_[0] ),
        .I5(D[2]),
        .O(\ixSeq_reg[1]_0 [1]));
  LUT6 #(
    .INIT(64'h000200000000FFFD)) 
    i__carry_i_6__1
       (.I0(\seq_reg[0]_1 [21]),
        .I1(\ixSeq_reg_n_0_[0] ),
        .I2(\ixSeq_reg_n_0_[1] ),
        .I3(Q),
        .I4(\stateRed0_inferred__0/i__carry [2]),
        .I5(\stateRed0_inferred__0/i__carry [3]),
        .O(S[1]));
  LUT6 #(
    .INIT(64'h000200000000FFFD)) 
    i__carry_i_7__0
       (.I0(\seq_reg[0]_1 [21]),
        .I1(\ixSeq_reg_n_0_[0] ),
        .I2(\ixSeq_reg_n_0_[1] ),
        .I3(Q),
        .I4(\stateRed0_inferred__0/i__carry [0]),
        .I5(\stateRed0_inferred__0/i__carry [1]),
        .O(S[0]));
  LUT6 #(
    .INIT(64'h8480888011191115)) 
    i__carry_i_7__1
       (.I0(D[1]),
        .I1(\seq_reg[1][13]_0 ),
        .I2(Q),
        .I3(\ixSeq_reg_n_0_[0] ),
        .I4(\ixSeq_reg_n_0_[1] ),
        .I5(D[0]),
        .O(\ixSeq_reg[1]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[10]_i_1__0_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(\i_reg[0]_2 ),
        .Q(\i_reg[0]_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[10] 
       (.C(aclk_sig),
        .CE(\i[10]_i_1__0_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(p_0_in[10]),
        .Q(i_reg[10]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[10]_i_1__0_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(p_0_in[1]),
        .Q(i_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(\i[10]_i_1__0_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(p_0_in[2]),
        .Q(i_reg[2]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(\i[10]_i_1__0_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(p_0_in[3]),
        .Q(i_reg[3]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(\i[10]_i_1__0_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(p_0_in[4]),
        .Q(i_reg[4]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(\i[10]_i_1__0_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(p_0_in[5]),
        .Q(i_reg[5]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(\i[10]_i_1__0_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(p_0_in[6]),
        .Q(i_reg[6]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(\i[10]_i_1__0_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(p_0_in[7]),
        .Q(i_reg[7]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[8] 
       (.C(aclk_sig),
        .CE(\i[10]_i_1__0_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(p_0_in[8]),
        .Q(i_reg[8]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[9] 
       (.C(aclk_sig),
        .CE(\i[10]_i_1__0_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(p_0_in[9]),
        .Q(i_reg[9]));
  (* SOFT_HLUTNM = "soft_lutpair2873" *) 
  LUT3 #(
    .INIT(8'h0D)) 
    \ixSeq[0]_i_1 
       (.I0(Q),
        .I1(\ixSeq_reg_n_0_[1] ),
        .I2(\ixSeq_reg_n_0_[0] ),
        .O(\ixSeq[0]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \ixSeq[1]_i_1 
       (.I0(\ixSeq_reg_n_0_[1] ),
        .I1(\ixSeq_reg_n_0_[0] ),
        .O(\ixSeq[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hA222000000000000)) 
    \ixSeq[2]_i_1 
       (.I0(\ixSeq[2]_i_3_n_0 ),
        .I1(i_reg[8]),
        .I2(i_reg[6]),
        .I3(i_reg[7]),
        .I4(\ixSeq[2]_i_4_n_0 ),
        .I5(\ixSeq[2]_i_5_n_0 ),
        .O(ixSeq));
  (* SOFT_HLUTNM = "soft_lutpair2877" *) 
  LUT3 #(
    .INIT(8'h68)) 
    \ixSeq[2]_i_2 
       (.I0(\ixSeq_reg_n_0_[0] ),
        .I1(\ixSeq_reg_n_0_[1] ),
        .I2(Q),
        .O(\ixSeq[2]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2874" *) 
  LUT5 #(
    .INIT(32'h00000004)) 
    \ixSeq[2]_i_3 
       (.I0(\i_reg[0]_0 ),
        .I1(i_reg[4]),
        .I2(i_reg[5]),
        .I3(i_reg[1]),
        .I4(i_reg[2]),
        .O(\ixSeq[2]_i_3_n_0 ));
  LUT3 #(
    .INIT(8'h07)) 
    \ixSeq[2]_i_4 
       (.I0(i_reg[3]),
        .I1(i_reg[4]),
        .I2(i_reg[5]),
        .O(\ixSeq[2]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0000800000000000)) 
    \ixSeq[2]_i_5 
       (.I0(i_reg[7]),
        .I1(i_reg[8]),
        .I2(i_reg[9]),
        .I3(i_reg[10]),
        .I4(stateStats),
        .I5(tkclk),
        .O(\ixSeq[2]_i_5_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \ixSeq_reg[0] 
       (.C(aclk_sig),
        .CE(ixSeq),
        .CLR(\i_reg[0]_1 ),
        .D(\ixSeq[0]_i_1_n_0 ),
        .Q(\ixSeq_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \ixSeq_reg[1] 
       (.C(aclk_sig),
        .CE(ixSeq),
        .CLR(\i_reg[0]_1 ),
        .D(\ixSeq[1]_i_1_n_0 ),
        .Q(\ixSeq_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \ixSeq_reg[2] 
       (.C(aclk_sig),
        .CE(ixSeq),
        .CLR(\i_reg[0]_1 ),
        .D(\ixSeq[2]_i_2_n_0 ),
        .Q(Q));
  LUT6 #(
    .INIT(64'h8000888800000000)) 
    \seq[0][21]_i_1 
       (.I0(\seq[0][21]_i_3_n_0 ),
        .I1(\ixSeq[2]_i_5_n_0 ),
        .I2(i_reg[7]),
        .I3(i_reg[6]),
        .I4(i_reg[8]),
        .I5(\seq[0][21]_i_4_n_0 ),
        .O(\seq[0][21]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000004000000)) 
    \seq[0][21]_i_3 
       (.I0(\ixSeq_reg_n_0_[0] ),
        .I1(Q),
        .I2(\ixSeq_reg_n_0_[1] ),
        .I3(\seq[0][21]_i_5_n_0 ),
        .I4(i_reg[4]),
        .I5(i_reg[5]),
        .O(\seq[0][21]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0015000000150015)) 
    \seq[0][21]_i_4 
       (.I0(i_reg[5]),
        .I1(i_reg[4]),
        .I2(i_reg[3]),
        .I3(i_reg[2]),
        .I4(i_reg[1]),
        .I5(\i_reg[0]_0 ),
        .O(\seq[0][21]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2874" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \seq[0][21]_i_5 
       (.I0(i_reg[1]),
        .I1(i_reg[2]),
        .O(\seq[0][21]_i_5_n_0 ));
  FDCE \seq_reg[0][21] 
       (.C(aclk_sig),
        .CE(\seq[0][21]_i_1_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(\seq_reg[0][21]_0 [1]),
        .Q(\seq_reg[0]_1 [21]));
  FDCE \seq_reg[0][5] 
       (.C(aclk_sig),
        .CE(\seq[0][21]_i_1_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(\seq_reg[0][21]_0 [0]),
        .Q(\seq_reg[0]_1 [5]));
  FDCE \seq_reg[1][13] 
       (.C(aclk_sig),
        .CE(\seq[0][21]_i_1_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(\seq[1]_2 ),
        .Q(\seq_reg[1][13]_0 ));
  FDCE \seq_reg[1][5] 
       (.C(aclk_sig),
        .CE(\seq[0][21]_i_1_n_0 ),
        .CLR(\i_reg[0]_1 ),
        .D(\seq_reg[1][5]_0 ),
        .Q(\seq_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2873" *) 
  LUT5 #(
    .INIT(32'hAAABAAA8)) 
    stateBlue_i_6
       (.I0(\seq_reg[1]_0 ),
        .I1(Q),
        .I2(\ixSeq_reg_n_0_[1] ),
        .I3(\ixSeq_reg_n_0_[0] ),
        .I4(\seq_reg[0]_1 [5]),
        .O(rgb0[0]));
  (* SOFT_HLUTNM = "soft_lutpair2877" *) 
  LUT4 #(
    .INIT(16'h0002)) 
    stateRed_i_6
       (.I0(\seq_reg[0]_1 [21]),
        .I1(\ixSeq_reg_n_0_[0] ),
        .I2(\ixSeq_reg_n_0_[1] ),
        .I3(Q),
        .O(rgb0[1]));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Stepmux
   (ackInvStepmuxSet,
    linNotRot_reg_0,
    nslp,
    reqInvStepmuxSet,
    aclk_sig,
    stateOp_reg_0,
    linNotRot_reg_1);
  output ackInvStepmuxSet;
  output linNotRot_reg_0;
  output nslp;
  input reqInvStepmuxSet;
  input aclk_sig;
  input [0:0]stateOp_reg_0;
  input linNotRot_reg_1;

  wire ackInvStepmuxSet;
  wire aclk_sig;
  wire linNotRot_reg_0;
  wire linNotRot_reg_1;
  wire nslp;
  wire reqInvStepmuxSet;
  wire [0:0]stateOp_reg_0;

  FDCE linNotRot_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(stateOp_reg_0),
        .D(linNotRot_reg_1),
        .Q(linNotRot_reg_0));
  LUT1 #(
    .INIT(2'h1)) 
    nslp_INST_0
       (.I0(linNotRot_reg_0),
        .O(nslp));
  FDCE stateOp_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(stateOp_reg_0),
        .D(reqInvStepmuxSet),
        .Q(ackInvStepmuxSet));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Timeout_v1_0
   (Q,
    \stateOp_reg[1]_0 ,
    tkclk,
    \stateOp_reg[1]_1 ,
    \stateOp_reg[0]_0 ,
    \stateOp[1]_i_3__1 ,
    aclk_sig);
  output [1:0]Q;
  output \stateOp_reg[1]_0 ;
  input tkclk;
  input [0:0]\stateOp_reg[1]_1 ;
  input \stateOp_reg[0]_0 ;
  input [3:0]\stateOp[1]_i_3__1 ;
  input aclk_sig;

  wire [1:0]Q;
  wire aclk_sig;
  wire \i[6]_i_1__10_n_0 ;
  wire \i[6]_i_2__1_n_0 ;
  wire \i[6]_i_4__0_n_0 ;
  wire [6:0]i_reg;
  wire [6:0]p_0_in;
  wire [1:0]stateOp;
  wire \stateOp[1]_i_1__8_n_0 ;
  wire [3:0]\stateOp[1]_i_3__1 ;
  wire \stateOp[1]_i_4__2_n_0 ;
  wire \stateOp[1]_i_8__2_n_0 ;
  wire \stateOp_reg[0]_0 ;
  wire \stateOp_reg[1]_0 ;
  wire [0:0]\stateOp_reg[1]_1 ;
  wire tkclk;

  LUT1 #(
    .INIT(2'h1)) 
    \i[0]_i_1__15 
       (.I0(i_reg[0]),
        .O(p_0_in[0]));
  (* SOFT_HLUTNM = "soft_lutpair2820" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \i[1]_i_1__14 
       (.I0(i_reg[0]),
        .I1(i_reg[1]),
        .O(p_0_in[1]));
  (* SOFT_HLUTNM = "soft_lutpair2819" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[2]_i_1__10 
       (.I0(i_reg[0]),
        .I1(i_reg[1]),
        .I2(i_reg[2]),
        .O(p_0_in[2]));
  (* SOFT_HLUTNM = "soft_lutpair2819" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \i[3]_i_1__10 
       (.I0(i_reg[1]),
        .I1(i_reg[0]),
        .I2(i_reg[2]),
        .I3(i_reg[3]),
        .O(p_0_in[3]));
  (* SOFT_HLUTNM = "soft_lutpair2817" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \i[4]_i_1__10 
       (.I0(i_reg[2]),
        .I1(i_reg[0]),
        .I2(i_reg[1]),
        .I3(i_reg[3]),
        .I4(i_reg[4]),
        .O(p_0_in[4]));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \i[5]_i_1__9 
       (.I0(i_reg[3]),
        .I1(i_reg[1]),
        .I2(i_reg[0]),
        .I3(i_reg[2]),
        .I4(i_reg[4]),
        .I5(i_reg[5]),
        .O(p_0_in[5]));
  LUT4 #(
    .INIT(16'h00AB)) 
    \i[6]_i_1__10 
       (.I0(\stateOp_reg[0]_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(\stateOp_reg[1]_1 ),
        .O(\i[6]_i_1__10_n_0 ));
  LUT4 #(
    .INIT(16'h0004)) 
    \i[6]_i_2__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(tkclk),
        .I3(\stateOp_reg[1]_1 ),
        .O(\i[6]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2821" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[6]_i_3__0 
       (.I0(\i[6]_i_4__0_n_0 ),
        .I1(i_reg[5]),
        .I2(i_reg[6]),
        .O(p_0_in[6]));
  (* SOFT_HLUTNM = "soft_lutpair2817" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \i[6]_i_4__0 
       (.I0(i_reg[4]),
        .I1(i_reg[2]),
        .I2(i_reg[0]),
        .I3(i_reg[1]),
        .I4(i_reg[3]),
        .O(\i[6]_i_4__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__1_n_0 ),
        .D(p_0_in[0]),
        .Q(i_reg[0]),
        .R(\i[6]_i_1__10_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__1_n_0 ),
        .D(p_0_in[1]),
        .Q(i_reg[1]),
        .R(\i[6]_i_1__10_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__1_n_0 ),
        .D(p_0_in[2]),
        .Q(i_reg[2]),
        .R(\i[6]_i_1__10_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__1_n_0 ),
        .D(p_0_in[3]),
        .Q(i_reg[3]),
        .R(\i[6]_i_1__10_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__1_n_0 ),
        .D(p_0_in[4]),
        .Q(i_reg[4]),
        .R(\i[6]_i_1__10_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__1_n_0 ),
        .D(p_0_in[5]),
        .Q(i_reg[5]),
        .R(\i[6]_i_1__10_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__1_n_0 ),
        .D(p_0_in[6]),
        .Q(i_reg[6]),
        .R(\i[6]_i_1__10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2818" *) 
  LUT4 #(
    .INIT(16'h0F0D)) 
    \stateOp[0]_i_1__7 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(\stateOp_reg[0]_0 ),
        .I3(\stateOp[1]_i_4__2_n_0 ),
        .O(stateOp[0]));
  LUT5 #(
    .INIT(32'hBBBFBBAF)) 
    \stateOp[1]_i_1__8 
       (.I0(\stateOp_reg[0]_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(tkclk),
        .I4(\stateOp[1]_i_4__2_n_0 ),
        .O(\stateOp[1]_i_1__8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2818" *) 
  LUT3 #(
    .INIT(8'h10)) 
    \stateOp[1]_i_2__8 
       (.I0(\stateOp_reg[0]_0 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .O(stateOp[1]));
  (* SOFT_HLUTNM = "soft_lutpair2820" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \stateOp[1]_i_4__2 
       (.I0(i_reg[4]),
        .I1(i_reg[1]),
        .I2(i_reg[3]),
        .I3(\stateOp[1]_i_8__2_n_0 ),
        .O(\stateOp[1]_i_4__2_n_0 ));
  LUT4 #(
    .INIT(16'hDFFF)) 
    \stateOp[1]_i_6__2 
       (.I0(\stateOp[1]_i_3__1 [1]),
        .I1(\stateOp[1]_i_3__1 [3]),
        .I2(\stateOp[1]_i_3__1 [2]),
        .I3(\stateOp[1]_i_3__1 [0]),
        .O(\stateOp_reg[1]_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2821" *) 
  LUT4 #(
    .INIT(16'hF7FF)) 
    \stateOp[1]_i_8__2 
       (.I0(i_reg[6]),
        .I1(i_reg[2]),
        .I2(i_reg[0]),
        .I3(i_reg[5]),
        .O(\stateOp[1]_i_8__2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(\stateOp[1]_i_1__8_n_0 ),
        .CLR(\stateOp_reg[1]_1 ),
        .D(stateOp[0]),
        .Q(Q[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(\stateOp[1]_i_1__8_n_0 ),
        .CLR(\stateOp_reg[1]_1 ),
        .D(stateOp[1]),
        .Q(Q[1]));
endmodule

(* ORIG_REF_NAME = "Timeout_v1_0" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Timeout_v1_0_56
   (Q,
    \stateOp_reg[2] ,
    tkclk,
    \stateOp_reg[0]_0 ,
    \stateOp_reg[0]_1 ,
    \stateOp[1]_i_3 ,
    aclk_sig);
  output [1:0]Q;
  output \stateOp_reg[2] ;
  input tkclk;
  input [0:0]\stateOp_reg[0]_0 ;
  input \stateOp_reg[0]_1 ;
  input [5:0]\stateOp[1]_i_3 ;
  input aclk_sig;

  wire [1:0]Q;
  wire aclk_sig;
  wire \i[6]_i_1__9_n_0 ;
  wire \i[6]_i_2__0_n_0 ;
  wire \i[6]_i_4_n_0 ;
  wire [6:0]i_reg;
  wire [6:0]p_0_in;
  wire [1:0]stateOp;
  wire \stateOp[1]_i_1__6_n_0 ;
  wire [5:0]\stateOp[1]_i_3 ;
  wire \stateOp[1]_i_4_n_0 ;
  wire \stateOp[1]_i_8_n_0 ;
  wire [0:0]\stateOp_reg[0]_0 ;
  wire \stateOp_reg[0]_1 ;
  wire \stateOp_reg[2] ;
  wire tkclk;

  LUT1 #(
    .INIT(2'h1)) 
    \i[0]_i_1__12 
       (.I0(i_reg[0]),
        .O(p_0_in[0]));
  (* SOFT_HLUTNM = "soft_lutpair2255" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \i[1]_i_1__11 
       (.I0(i_reg[0]),
        .I1(i_reg[1]),
        .O(p_0_in[1]));
  (* SOFT_HLUTNM = "soft_lutpair2254" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[2]_i_1__7 
       (.I0(i_reg[0]),
        .I1(i_reg[1]),
        .I2(i_reg[2]),
        .O(p_0_in[2]));
  (* SOFT_HLUTNM = "soft_lutpair2254" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \i[3]_i_1__7 
       (.I0(i_reg[1]),
        .I1(i_reg[0]),
        .I2(i_reg[2]),
        .I3(i_reg[3]),
        .O(p_0_in[3]));
  (* SOFT_HLUTNM = "soft_lutpair2252" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \i[4]_i_1__7 
       (.I0(i_reg[2]),
        .I1(i_reg[0]),
        .I2(i_reg[1]),
        .I3(i_reg[3]),
        .I4(i_reg[4]),
        .O(p_0_in[4]));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \i[5]_i_1__6 
       (.I0(i_reg[3]),
        .I1(i_reg[1]),
        .I2(i_reg[0]),
        .I3(i_reg[2]),
        .I4(i_reg[4]),
        .I5(i_reg[5]),
        .O(p_0_in[5]));
  LUT4 #(
    .INIT(16'h00AB)) 
    \i[6]_i_1__9 
       (.I0(\stateOp_reg[0]_1 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(\stateOp_reg[0]_0 ),
        .O(\i[6]_i_1__9_n_0 ));
  LUT4 #(
    .INIT(16'h0004)) 
    \i[6]_i_2__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(tkclk),
        .I3(\stateOp_reg[0]_0 ),
        .O(\i[6]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2256" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[6]_i_3 
       (.I0(\i[6]_i_4_n_0 ),
        .I1(i_reg[5]),
        .I2(i_reg[6]),
        .O(p_0_in[6]));
  (* SOFT_HLUTNM = "soft_lutpair2252" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \i[6]_i_4 
       (.I0(i_reg[4]),
        .I1(i_reg[2]),
        .I2(i_reg[0]),
        .I3(i_reg[1]),
        .I4(i_reg[3]),
        .O(\i[6]_i_4_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__0_n_0 ),
        .D(p_0_in[0]),
        .Q(i_reg[0]),
        .R(\i[6]_i_1__9_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__0_n_0 ),
        .D(p_0_in[1]),
        .Q(i_reg[1]),
        .R(\i[6]_i_1__9_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__0_n_0 ),
        .D(p_0_in[2]),
        .Q(i_reg[2]),
        .R(\i[6]_i_1__9_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__0_n_0 ),
        .D(p_0_in[3]),
        .Q(i_reg[3]),
        .R(\i[6]_i_1__9_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__0_n_0 ),
        .D(p_0_in[4]),
        .Q(i_reg[4]),
        .R(\i[6]_i_1__9_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__0_n_0 ),
        .D(p_0_in[5]),
        .Q(i_reg[5]),
        .R(\i[6]_i_1__9_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(\i[6]_i_2__0_n_0 ),
        .D(p_0_in[6]),
        .Q(i_reg[6]),
        .R(\i[6]_i_1__9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2253" *) 
  LUT4 #(
    .INIT(16'h0F0D)) 
    \stateOp[0]_i_1__4 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(\stateOp_reg[0]_1 ),
        .I3(\stateOp[1]_i_4_n_0 ),
        .O(stateOp[0]));
  LUT5 #(
    .INIT(32'hBBBFBBAF)) 
    \stateOp[1]_i_1__6 
       (.I0(\stateOp_reg[0]_1 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(tkclk),
        .I4(\stateOp[1]_i_4_n_0 ),
        .O(\stateOp[1]_i_1__6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2253" *) 
  LUT3 #(
    .INIT(8'h10)) 
    \stateOp[1]_i_2__6 
       (.I0(\stateOp_reg[0]_1 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .O(stateOp[1]));
  (* SOFT_HLUTNM = "soft_lutpair2255" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \stateOp[1]_i_4 
       (.I0(i_reg[4]),
        .I1(i_reg[1]),
        .I2(i_reg[3]),
        .I3(\stateOp[1]_i_8_n_0 ),
        .O(\stateOp[1]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFB3FFFFFFFFF)) 
    \stateOp[1]_i_6 
       (.I0(\stateOp[1]_i_3 [2]),
        .I1(\stateOp[1]_i_3 [3]),
        .I2(\stateOp[1]_i_3 [1]),
        .I3(\stateOp[1]_i_3 [4]),
        .I4(\stateOp[1]_i_3 [5]),
        .I5(\stateOp[1]_i_3 [0]),
        .O(\stateOp_reg[2] ));
  (* SOFT_HLUTNM = "soft_lutpair2256" *) 
  LUT4 #(
    .INIT(16'hF7FF)) 
    \stateOp[1]_i_8 
       (.I0(i_reg[6]),
        .I1(i_reg[2]),
        .I2(i_reg[0]),
        .I3(i_reg[5]),
        .O(\stateOp[1]_i_8_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(\stateOp[1]_i_1__6_n_0 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(stateOp[0]),
        .Q(Q[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(\stateOp[1]_i_1__6_n_0 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(stateOp[1]),
        .Q(Q[1]));
endmodule

(* ORIG_REF_NAME = "Timeout_v1_0" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Timeout_v1_0__parameterized1
   (Q,
    tkclk,
    \stateOp_reg[0]_0 ,
    \stateOp_reg[0]_1 ,
    aclk_sig);
  output [1:0]Q;
  input tkclk;
  input [0:0]\stateOp_reg[0]_0 ;
  input \stateOp_reg[0]_1 ;
  input aclk_sig;

  wire [1:0]Q;
  wire aclk_sig;
  wire \i[9]_i_1__6_n_0 ;
  wire \i[9]_i_2__6_n_0 ;
  wire \i[9]_i_4__1_n_0 ;
  wire [9:0]i_reg;
  wire [9:0]p_0_in;
  wire [1:0]stateOp;
  wire \stateOp[1]_i_1__9_n_0 ;
  wire \stateOp[1]_i_4__3_n_0 ;
  wire \stateOp[1]_i_5__3_n_0 ;
  wire [0:0]\stateOp_reg[0]_0 ;
  wire \stateOp_reg[0]_1 ;
  wire tkclk;

  LUT1 #(
    .INIT(2'h1)) 
    \i[0]_i_1__16 
       (.I0(i_reg[0]),
        .O(p_0_in[0]));
  (* SOFT_HLUTNM = "soft_lutpair2826" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \i[1]_i_1__15 
       (.I0(i_reg[0]),
        .I1(i_reg[1]),
        .O(p_0_in[1]));
  (* SOFT_HLUTNM = "soft_lutpair2826" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[2]_i_1__11 
       (.I0(i_reg[0]),
        .I1(i_reg[1]),
        .I2(i_reg[2]),
        .O(p_0_in[2]));
  (* SOFT_HLUTNM = "soft_lutpair2823" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \i[3]_i_1__11 
       (.I0(i_reg[1]),
        .I1(i_reg[0]),
        .I2(i_reg[2]),
        .I3(i_reg[3]),
        .O(p_0_in[3]));
  (* SOFT_HLUTNM = "soft_lutpair2823" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \i[4]_i_1__11 
       (.I0(i_reg[2]),
        .I1(i_reg[0]),
        .I2(i_reg[1]),
        .I3(i_reg[3]),
        .I4(i_reg[4]),
        .O(p_0_in[4]));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \i[5]_i_1__10 
       (.I0(i_reg[3]),
        .I1(i_reg[1]),
        .I2(i_reg[0]),
        .I3(i_reg[2]),
        .I4(i_reg[4]),
        .I5(i_reg[5]),
        .O(p_0_in[5]));
  (* SOFT_HLUTNM = "soft_lutpair2825" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \i[6]_i_1__8 
       (.I0(\i[9]_i_4__1_n_0 ),
        .I1(i_reg[6]),
        .O(p_0_in[6]));
  (* SOFT_HLUTNM = "soft_lutpair2825" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[7]_i_1__8 
       (.I0(\i[9]_i_4__1_n_0 ),
        .I1(i_reg[6]),
        .I2(i_reg[7]),
        .O(p_0_in[7]));
  (* SOFT_HLUTNM = "soft_lutpair2822" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \i[8]_i_1__7 
       (.I0(i_reg[6]),
        .I1(\i[9]_i_4__1_n_0 ),
        .I2(i_reg[7]),
        .I3(i_reg[8]),
        .O(p_0_in[8]));
  LUT4 #(
    .INIT(16'h00AB)) 
    \i[9]_i_1__6 
       (.I0(\stateOp_reg[0]_1 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(\stateOp_reg[0]_0 ),
        .O(\i[9]_i_1__6_n_0 ));
  LUT4 #(
    .INIT(16'h0004)) 
    \i[9]_i_2__6 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(tkclk),
        .I3(\stateOp_reg[0]_0 ),
        .O(\i[9]_i_2__6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2822" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \i[9]_i_3__1 
       (.I0(i_reg[7]),
        .I1(\i[9]_i_4__1_n_0 ),
        .I2(i_reg[6]),
        .I3(i_reg[8]),
        .I4(i_reg[9]),
        .O(p_0_in[9]));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \i[9]_i_4__1 
       (.I0(i_reg[5]),
        .I1(i_reg[3]),
        .I2(i_reg[1]),
        .I3(i_reg[0]),
        .I4(i_reg[2]),
        .I5(i_reg[4]),
        .O(\i[9]_i_4__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__6_n_0 ),
        .D(p_0_in[0]),
        .Q(i_reg[0]),
        .R(\i[9]_i_1__6_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__6_n_0 ),
        .D(p_0_in[1]),
        .Q(i_reg[1]),
        .R(\i[9]_i_1__6_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__6_n_0 ),
        .D(p_0_in[2]),
        .Q(i_reg[2]),
        .R(\i[9]_i_1__6_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__6_n_0 ),
        .D(p_0_in[3]),
        .Q(i_reg[3]),
        .R(\i[9]_i_1__6_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__6_n_0 ),
        .D(p_0_in[4]),
        .Q(i_reg[4]),
        .R(\i[9]_i_1__6_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__6_n_0 ),
        .D(p_0_in[5]),
        .Q(i_reg[5]),
        .R(\i[9]_i_1__6_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__6_n_0 ),
        .D(p_0_in[6]),
        .Q(i_reg[6]),
        .R(\i[9]_i_1__6_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__6_n_0 ),
        .D(p_0_in[7]),
        .Q(i_reg[7]),
        .R(\i[9]_i_1__6_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[8] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__6_n_0 ),
        .D(p_0_in[8]),
        .Q(i_reg[8]),
        .R(\i[9]_i_1__6_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[9] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__6_n_0 ),
        .D(p_0_in[9]),
        .Q(i_reg[9]),
        .R(\i[9]_i_1__6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2824" *) 
  LUT4 #(
    .INIT(16'h0F0D)) 
    \stateOp[0]_i_1__8 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(\stateOp_reg[0]_1 ),
        .I3(\stateOp[1]_i_4__3_n_0 ),
        .O(stateOp[0]));
  LUT5 #(
    .INIT(32'hBBBFBBAF)) 
    \stateOp[1]_i_1__9 
       (.I0(\stateOp_reg[0]_1 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(tkclk),
        .I4(\stateOp[1]_i_4__3_n_0 ),
        .O(\stateOp[1]_i_1__9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2824" *) 
  LUT3 #(
    .INIT(8'h10)) 
    \stateOp[1]_i_2__9 
       (.I0(\stateOp_reg[0]_1 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .O(stateOp[1]));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    \stateOp[1]_i_4__3 
       (.I0(i_reg[1]),
        .I1(i_reg[0]),
        .I2(i_reg[8]),
        .I3(i_reg[2]),
        .I4(i_reg[4]),
        .I5(\stateOp[1]_i_5__3_n_0 ),
        .O(\stateOp[1]_i_4__3_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \stateOp[1]_i_5__3 
       (.I0(i_reg[9]),
        .I1(i_reg[7]),
        .I2(i_reg[3]),
        .I3(i_reg[5]),
        .I4(i_reg[6]),
        .O(\stateOp[1]_i_5__3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(\stateOp[1]_i_1__9_n_0 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(stateOp[0]),
        .Q(Q[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(\stateOp[1]_i_1__9_n_0 ),
        .CLR(\stateOp_reg[0]_0 ),
        .D(stateOp[1]),
        .Q(Q[1]));
endmodule

(* ORIG_REF_NAME = "Timeout_v1_0" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Timeout_v1_0__parameterized1_57
   (Q,
    \stateOp_reg[0]_0 ,
    \stateOp_reg[2] ,
    \stateOp_reg[3] ,
    tkclk,
    \stateOp_reg[1]_0 ,
    \stateOp_reg[0]_1 ,
    \stateOp[1]_i_3__0 ,
    aclk_sig);
  output [1:0]Q;
  output \stateOp_reg[0]_0 ;
  output \stateOp_reg[2] ;
  output \stateOp_reg[3] ;
  input tkclk;
  input [0:0]\stateOp_reg[1]_0 ;
  input \stateOp_reg[0]_1 ;
  input [5:0]\stateOp[1]_i_3__0 ;
  input aclk_sig;

  wire [1:0]Q;
  wire aclk_sig;
  wire \i[9]_i_1__5_n_0 ;
  wire \i[9]_i_2__5_n_0 ;
  wire \i[9]_i_4__0_n_0 ;
  wire [9:0]i_reg;
  wire [9:0]p_0_in;
  wire [1:0]stateOp;
  wire \stateOp[1]_i_1__7_n_0 ;
  wire [5:0]\stateOp[1]_i_3__0 ;
  wire \stateOp[1]_i_4__0_n_0 ;
  wire \stateOp[1]_i_8__0_n_0 ;
  wire \stateOp_reg[0]_0 ;
  wire \stateOp_reg[0]_1 ;
  wire [0:0]\stateOp_reg[1]_0 ;
  wire \stateOp_reg[2] ;
  wire \stateOp_reg[3] ;
  wire tkclk;

  LUT1 #(
    .INIT(2'h1)) 
    \i[0]_i_1__13 
       (.I0(i_reg[0]),
        .O(p_0_in[0]));
  (* SOFT_HLUTNM = "soft_lutpair2261" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \i[1]_i_1__12 
       (.I0(i_reg[0]),
        .I1(i_reg[1]),
        .O(p_0_in[1]));
  (* SOFT_HLUTNM = "soft_lutpair2261" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[2]_i_1__8 
       (.I0(i_reg[0]),
        .I1(i_reg[1]),
        .I2(i_reg[2]),
        .O(p_0_in[2]));
  (* SOFT_HLUTNM = "soft_lutpair2258" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \i[3]_i_1__8 
       (.I0(i_reg[1]),
        .I1(i_reg[0]),
        .I2(i_reg[2]),
        .I3(i_reg[3]),
        .O(p_0_in[3]));
  (* SOFT_HLUTNM = "soft_lutpair2258" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \i[4]_i_1__8 
       (.I0(i_reg[2]),
        .I1(i_reg[0]),
        .I2(i_reg[1]),
        .I3(i_reg[3]),
        .I4(i_reg[4]),
        .O(p_0_in[4]));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \i[5]_i_1__7 
       (.I0(i_reg[3]),
        .I1(i_reg[1]),
        .I2(i_reg[0]),
        .I3(i_reg[2]),
        .I4(i_reg[4]),
        .I5(i_reg[5]),
        .O(p_0_in[5]));
  (* SOFT_HLUTNM = "soft_lutpair2260" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \i[6]_i_1__6 
       (.I0(\i[9]_i_4__0_n_0 ),
        .I1(i_reg[6]),
        .O(p_0_in[6]));
  (* SOFT_HLUTNM = "soft_lutpair2260" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \i[7]_i_1__6 
       (.I0(\i[9]_i_4__0_n_0 ),
        .I1(i_reg[6]),
        .I2(i_reg[7]),
        .O(p_0_in[7]));
  (* SOFT_HLUTNM = "soft_lutpair2257" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \i[8]_i_1__5 
       (.I0(i_reg[6]),
        .I1(\i[9]_i_4__0_n_0 ),
        .I2(i_reg[7]),
        .I3(i_reg[8]),
        .O(p_0_in[8]));
  LUT4 #(
    .INIT(16'h00AB)) 
    \i[9]_i_1__5 
       (.I0(\stateOp_reg[0]_1 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(\stateOp_reg[1]_0 ),
        .O(\i[9]_i_1__5_n_0 ));
  LUT4 #(
    .INIT(16'h0004)) 
    \i[9]_i_2__5 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(tkclk),
        .I3(\stateOp_reg[1]_0 ),
        .O(\i[9]_i_2__5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2257" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \i[9]_i_3__0 
       (.I0(i_reg[7]),
        .I1(\i[9]_i_4__0_n_0 ),
        .I2(i_reg[6]),
        .I3(i_reg[8]),
        .I4(i_reg[9]),
        .O(p_0_in[9]));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \i[9]_i_4__0 
       (.I0(i_reg[5]),
        .I1(i_reg[3]),
        .I2(i_reg[1]),
        .I3(i_reg[0]),
        .I4(i_reg[2]),
        .I5(i_reg[4]),
        .O(\i[9]_i_4__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__5_n_0 ),
        .D(p_0_in[0]),
        .Q(i_reg[0]),
        .R(\i[9]_i_1__5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__5_n_0 ),
        .D(p_0_in[1]),
        .Q(i_reg[1]),
        .R(\i[9]_i_1__5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__5_n_0 ),
        .D(p_0_in[2]),
        .Q(i_reg[2]),
        .R(\i[9]_i_1__5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__5_n_0 ),
        .D(p_0_in[3]),
        .Q(i_reg[3]),
        .R(\i[9]_i_1__5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__5_n_0 ),
        .D(p_0_in[4]),
        .Q(i_reg[4]),
        .R(\i[9]_i_1__5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__5_n_0 ),
        .D(p_0_in[5]),
        .Q(i_reg[5]),
        .R(\i[9]_i_1__5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__5_n_0 ),
        .D(p_0_in[6]),
        .Q(i_reg[6]),
        .R(\i[9]_i_1__5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__5_n_0 ),
        .D(p_0_in[7]),
        .Q(i_reg[7]),
        .R(\i[9]_i_1__5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[8] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__5_n_0 ),
        .D(p_0_in[8]),
        .Q(i_reg[8]),
        .R(\i[9]_i_1__5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \i_reg[9] 
       (.C(aclk_sig),
        .CE(\i[9]_i_2__5_n_0 ),
        .D(p_0_in[9]),
        .Q(i_reg[9]),
        .R(\i[9]_i_1__5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2259" *) 
  LUT4 #(
    .INIT(16'h0F0D)) 
    \stateOp[0]_i_1__5 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(\stateOp_reg[0]_1 ),
        .I3(\stateOp[1]_i_4__0_n_0 ),
        .O(stateOp[0]));
  LUT5 #(
    .INIT(32'hBBBFBBAF)) 
    \stateOp[1]_i_1__7 
       (.I0(\stateOp_reg[0]_1 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(tkclk),
        .I4(\stateOp[1]_i_4__0_n_0 ),
        .O(\stateOp[1]_i_1__7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2259" *) 
  LUT3 #(
    .INIT(8'h10)) 
    \stateOp[1]_i_2__7 
       (.I0(\stateOp_reg[0]_1 ),
        .I1(Q[1]),
        .I2(Q[0]),
        .O(stateOp[1]));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    \stateOp[1]_i_4__0 
       (.I0(i_reg[1]),
        .I1(i_reg[0]),
        .I2(i_reg[8]),
        .I3(i_reg[2]),
        .I4(i_reg[4]),
        .I5(\stateOp[1]_i_8__0_n_0 ),
        .O(\stateOp[1]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFF6FFFFFBFF)) 
    \stateOp[1]_i_5__0 
       (.I0(\stateOp[1]_i_3__0 [0]),
        .I1(\stateOp[1]_i_3__0 [2]),
        .I2(\stateOp[1]_i_3__0 [3]),
        .I3(\stateOp[1]_i_3__0 [1]),
        .I4(\stateOp[1]_i_3__0 [4]),
        .I5(\stateOp[1]_i_3__0 [5]),
        .O(\stateOp_reg[0]_0 ));
  LUT6 #(
    .INIT(64'h0000000008000040)) 
    \stateOp[1]_i_6__0 
       (.I0(\stateOp[1]_i_3__0 [3]),
        .I1(\stateOp[1]_i_3__0 [1]),
        .I2(\stateOp[1]_i_3__0 [5]),
        .I3(\stateOp[1]_i_3__0 [4]),
        .I4(\stateOp[1]_i_3__0 [2]),
        .I5(\stateOp[1]_i_3__0 [0]),
        .O(\stateOp_reg[3] ));
  LUT6 #(
    .INIT(64'h0040000800000020)) 
    \stateOp[1]_i_7__0 
       (.I0(\stateOp[1]_i_3__0 [2]),
        .I1(\stateOp[1]_i_3__0 [0]),
        .I2(\stateOp[1]_i_3__0 [4]),
        .I3(\stateOp[1]_i_3__0 [5]),
        .I4(\stateOp[1]_i_3__0 [1]),
        .I5(\stateOp[1]_i_3__0 [3]),
        .O(\stateOp_reg[2] ));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \stateOp[1]_i_8__0 
       (.I0(i_reg[9]),
        .I1(i_reg[7]),
        .I2(i_reg[3]),
        .I3(i_reg[5]),
        .I4(i_reg[6]),
        .O(\stateOp[1]_i_8__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(\stateOp[1]_i_1__7_n_0 ),
        .CLR(\stateOp_reg[1]_0 ),
        .D(stateOp[0]),
        .Q(Q[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(\stateOp[1]_i_1__7_n_0 ),
        .CLR(\stateOp_reg[1]_0 ),
        .D(stateOp[1]),
        .Q(Q[1]));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Tkclksrc_Easy_v1_0
   (tkclk,
    Q,
    ackInvTkclksrcSetTkst,
    aclk_sig,
    tkclk_sig_reg_0,
    reqInvTkclksrcSetTkst,
    D,
    \tkst_reg[31]_0 ,
    \stateOp_reg[1]_0 );
  output tkclk;
  output [31:0]Q;
  output ackInvTkclksrcSetTkst;
  input aclk_sig;
  input [0:0]tkclk_sig_reg_0;
  input reqInvTkclksrcSetTkst;
  input [23:0]D;
  input [7:0]\tkst_reg[31]_0 ;
  input \stateOp_reg[1]_0 ;

  wire [23:0]D;
  wire [31:0]Q;
  wire ackInvTkclksrcSetTkst;
  wire aclk_sig;
  wire i;
  wire \i[0]_i_1__9_n_0 ;
  wire \i[10]_i_1__1_n_0 ;
  wire \i[11]_i_1__0_n_0 ;
  wire \i[12]_i_1__0_n_0 ;
  wire \i[13]_i_2__0_n_0 ;
  wire \i[13]_i_3__0_n_0 ;
  wire \i[13]_i_4_n_0 ;
  wire \i[1]_i_1__8_n_0 ;
  wire \i[2]_i_1__5_n_0 ;
  wire \i[3]_i_1__5_n_0 ;
  wire \i[4]_i_1__5_n_0 ;
  wire \i[5]_i_1__4_n_0 ;
  wire \i[5]_i_2__3_n_0 ;
  wire \i[6]_i_1__3_n_0 ;
  wire \i[7]_i_1__3_n_0 ;
  wire \i[8]_i_1__3_n_0 ;
  wire \i[9]_i_1__2_n_0 ;
  wire \i[9]_i_2__2_n_0 ;
  wire \i_reg_n_0_[0] ;
  wire \i_reg_n_0_[10] ;
  wire \i_reg_n_0_[11] ;
  wire \i_reg_n_0_[12] ;
  wire \i_reg_n_0_[13] ;
  wire \i_reg_n_0_[1] ;
  wire \i_reg_n_0_[2] ;
  wire \i_reg_n_0_[3] ;
  wire \i_reg_n_0_[4] ;
  wire \i_reg_n_0_[5] ;
  wire \i_reg_n_0_[6] ;
  wire \i_reg_n_0_[7] ;
  wire \i_reg_n_0_[8] ;
  wire \i_reg_n_0_[9] ;
  wire [31:0]p_1_in;
  wire [31:1]plusOp__60;
  wire plusOp_carry__0_n_0;
  wire plusOp_carry__0_n_1;
  wire plusOp_carry__0_n_2;
  wire plusOp_carry__0_n_3;
  wire plusOp_carry__0_n_4;
  wire plusOp_carry__0_n_5;
  wire plusOp_carry__0_n_6;
  wire plusOp_carry__0_n_7;
  wire plusOp_carry__1_n_0;
  wire plusOp_carry__1_n_1;
  wire plusOp_carry__1_n_2;
  wire plusOp_carry__1_n_3;
  wire plusOp_carry__1_n_4;
  wire plusOp_carry__1_n_5;
  wire plusOp_carry__1_n_6;
  wire plusOp_carry__1_n_7;
  wire plusOp_carry__2_n_2;
  wire plusOp_carry__2_n_3;
  wire plusOp_carry__2_n_4;
  wire plusOp_carry__2_n_5;
  wire plusOp_carry__2_n_6;
  wire plusOp_carry__2_n_7;
  wire plusOp_carry_n_0;
  wire plusOp_carry_n_1;
  wire plusOp_carry_n_2;
  wire plusOp_carry_n_3;
  wire plusOp_carry_n_4;
  wire plusOp_carry_n_5;
  wire plusOp_carry_n_6;
  wire plusOp_carry_n_7;
  wire reqInvTkclksrcSetTkst;
  wire \stateOp[0]_i_1__3_n_0 ;
  wire \stateOp_reg[1]_0 ;
  wire \stateOp_reg_n_0_[0] ;
  wire \stateOp_reg_n_0_[1] ;
  wire tkclk;
  wire [10:10]tkclk_sig1__3;
  wire tkclk_sig_i_1_n_0;
  wire [0:0]tkclk_sig_reg_0;
  wire \tkst[31]_i_1__1_n_0 ;
  wire \tkst[31]_i_3_n_0 ;
  wire \tkst[31]_i_4_n_0 ;
  wire \tkst[31]_i_5_n_0 ;
  wire \tkst[31]_i_6_n_0 ;
  wire [7:0]\tkst_reg[31]_0 ;
  wire [7:6]NLW_plusOp_carry__2_CO_UNCONNECTED;
  wire [7:7]NLW_plusOp_carry__2_O_UNCONNECTED;

  (* SOFT_HLUTNM = "soft_lutpair2885" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \i[0]_i_1__9 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[0] ),
        .O(\i[0]_i_1__9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2887" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \i[10]_i_1__1 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(tkclk_sig1__3),
        .O(\i[10]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'hF7FFFFFF08000000)) 
    \i[10]_i_2__1 
       (.I0(\i_reg_n_0_[8] ),
        .I1(\i_reg_n_0_[7] ),
        .I2(\i[9]_i_2__2_n_0 ),
        .I3(\i_reg_n_0_[6] ),
        .I4(\i_reg_n_0_[9] ),
        .I5(\i_reg_n_0_[10] ),
        .O(tkclk_sig1__3));
  (* SOFT_HLUTNM = "soft_lutpair2887" *) 
  LUT3 #(
    .INIT(8'h82)) 
    \i[11]_i_1__0 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[11] ),
        .I2(\i[13]_i_4_n_0 ),
        .O(\i[11]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2884" *) 
  LUT4 #(
    .INIT(16'h8288)) 
    \i[12]_i_1__0 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[12] ),
        .I2(\i[13]_i_4_n_0 ),
        .I3(\i_reg_n_0_[11] ),
        .O(\i[12]_i_1__0_n_0 ));
  LUT3 #(
    .INIT(8'hD5)) 
    \i[13]_i_1__0 
       (.I0(\stateOp_reg_n_0_[0] ),
        .I1(\stateOp_reg_n_0_[1] ),
        .I2(reqInvTkclksrcSetTkst),
        .O(i));
  (* SOFT_HLUTNM = "soft_lutpair2884" *) 
  LUT5 #(
    .INIT(32'h88288888)) 
    \i[13]_i_2__0 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[13] ),
        .I2(\i_reg_n_0_[11] ),
        .I3(\i[13]_i_4_n_0 ),
        .I4(\i_reg_n_0_[12] ),
        .O(\i[13]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2880" *) 
  LUT4 #(
    .INIT(16'h0454)) 
    \i[13]_i_3__0 
       (.I0(\tkst[31]_i_3_n_0 ),
        .I1(\stateOp_reg_n_0_[0] ),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(reqInvTkclksrcSetTkst),
        .O(\i[13]_i_3__0_n_0 ));
  LUT6 #(
    .INIT(64'hF7FFFFFFFFFFFFFF)) 
    \i[13]_i_4 
       (.I0(\i_reg_n_0_[8] ),
        .I1(\i_reg_n_0_[7] ),
        .I2(\i[9]_i_2__2_n_0 ),
        .I3(\i_reg_n_0_[6] ),
        .I4(\i_reg_n_0_[9] ),
        .I5(\i_reg_n_0_[10] ),
        .O(\i[13]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2885" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \i[1]_i_1__8 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .O(\i[1]_i_1__8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2882" *) 
  LUT4 #(
    .INIT(16'h2888)) 
    \i[2]_i_1__5 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[2] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[0] ),
        .O(\i[2]_i_1__5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2882" *) 
  LUT5 #(
    .INIT(32'h28888888)) 
    \i[3]_i_1__5 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[3] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[2] ),
        .O(\i[3]_i_1__5_n_0 ));
  LUT6 #(
    .INIT(64'h2888888888888888)) 
    \i[4]_i_1__5 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[4] ),
        .I2(\i_reg_n_0_[2] ),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[0] ),
        .I5(\i_reg_n_0_[3] ),
        .O(\i[4]_i_1__5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2886" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \i[5]_i_1__4 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i[5]_i_2__3_n_0 ),
        .O(\i[5]_i_1__4_n_0 ));
  LUT6 #(
    .INIT(64'h9555555555555555)) 
    \i[5]_i_2__3 
       (.I0(\i_reg_n_0_[5] ),
        .I1(\i_reg_n_0_[2] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[3] ),
        .I5(\i_reg_n_0_[4] ),
        .O(\i[5]_i_2__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2886" *) 
  LUT3 #(
    .INIT(8'h82)) 
    \i[6]_i_1__3 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[6] ),
        .I2(\i[9]_i_2__2_n_0 ),
        .O(\i[6]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2883" *) 
  LUT4 #(
    .INIT(16'h8288)) 
    \i[7]_i_1__3 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[7] ),
        .I2(\i[9]_i_2__2_n_0 ),
        .I3(\i_reg_n_0_[6] ),
        .O(\i[7]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2883" *) 
  LUT5 #(
    .INIT(32'h88288888)) 
    \i[8]_i_1__3 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[8] ),
        .I2(\i_reg_n_0_[6] ),
        .I3(\i[9]_i_2__2_n_0 ),
        .I4(\i_reg_n_0_[7] ),
        .O(\i[8]_i_1__3_n_0 ));
  LUT6 #(
    .INIT(64'h8888288888888888)) 
    \i[9]_i_1__2 
       (.I0(\i[13]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[9] ),
        .I2(\i_reg_n_0_[8] ),
        .I3(\i_reg_n_0_[7] ),
        .I4(\i[9]_i_2__2_n_0 ),
        .I5(\i_reg_n_0_[6] ),
        .O(\i[9]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \i[9]_i_2__2 
       (.I0(\i_reg_n_0_[5] ),
        .I1(\i_reg_n_0_[2] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[3] ),
        .I5(\i_reg_n_0_[4] ),
        .O(\i[9]_i_2__2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[0]_i_1__9_n_0 ),
        .Q(\i_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[10] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[10]_i_1__1_n_0 ),
        .Q(\i_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[11] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[11]_i_1__0_n_0 ),
        .Q(\i_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[12] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[12]_i_1__0_n_0 ),
        .Q(\i_reg_n_0_[12] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[13] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[13]_i_2__0_n_0 ),
        .Q(\i_reg_n_0_[13] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[1]_i_1__8_n_0 ),
        .Q(\i_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[2]_i_1__5_n_0 ),
        .Q(\i_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[3]_i_1__5_n_0 ),
        .Q(\i_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[4]_i_1__5_n_0 ),
        .Q(\i_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[5] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[5]_i_1__4_n_0 ),
        .Q(\i_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[6] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[6]_i_1__3_n_0 ),
        .Q(\i_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[7] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[7]_i_1__3_n_0 ),
        .Q(\i_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[8] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[8]_i_1__3_n_0 ),
        .Q(\i_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[9] 
       (.C(aclk_sig),
        .CE(i),
        .CLR(tkclk_sig_reg_0),
        .D(\i[9]_i_1__2_n_0 ),
        .Q(\i_reg_n_0_[9] ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry
       (.CI(Q[0]),
        .CI_TOP(1'b0),
        .CO({plusOp_carry_n_0,plusOp_carry_n_1,plusOp_carry_n_2,plusOp_carry_n_3,plusOp_carry_n_4,plusOp_carry_n_5,plusOp_carry_n_6,plusOp_carry_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(plusOp__60[8:1]),
        .S(Q[8:1]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry__0
       (.CI(plusOp_carry_n_0),
        .CI_TOP(1'b0),
        .CO({plusOp_carry__0_n_0,plusOp_carry__0_n_1,plusOp_carry__0_n_2,plusOp_carry__0_n_3,plusOp_carry__0_n_4,plusOp_carry__0_n_5,plusOp_carry__0_n_6,plusOp_carry__0_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(plusOp__60[16:9]),
        .S(Q[16:9]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry__1
       (.CI(plusOp_carry__0_n_0),
        .CI_TOP(1'b0),
        .CO({plusOp_carry__1_n_0,plusOp_carry__1_n_1,plusOp_carry__1_n_2,plusOp_carry__1_n_3,plusOp_carry__1_n_4,plusOp_carry__1_n_5,plusOp_carry__1_n_6,plusOp_carry__1_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(plusOp__60[24:17]),
        .S(Q[24:17]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 plusOp_carry__2
       (.CI(plusOp_carry__1_n_0),
        .CI_TOP(1'b0),
        .CO({NLW_plusOp_carry__2_CO_UNCONNECTED[7:6],plusOp_carry__2_n_2,plusOp_carry__2_n_3,plusOp_carry__2_n_4,plusOp_carry__2_n_5,plusOp_carry__2_n_6,plusOp_carry__2_n_7}),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({NLW_plusOp_carry__2_O_UNCONNECTED[7],plusOp__60[31:25]}),
        .S({1'b0,Q[31:25]}));
  LUT3 #(
    .INIT(8'hF8)) 
    \stateOp[0]_i_1__3 
       (.I0(\stateOp_reg_n_0_[0] ),
        .I1(\stateOp_reg_n_0_[1] ),
        .I2(reqInvTkclksrcSetTkst),
        .O(\stateOp[0]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2881" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp[5]_i_67 
       (.I0(\stateOp_reg_n_0_[0] ),
        .I1(\stateOp_reg_n_0_[1] ),
        .O(ackInvTkclksrcSetTkst));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(tkclk_sig_reg_0),
        .D(\stateOp[0]_i_1__3_n_0 ),
        .Q(\stateOp_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(tkclk_sig_reg_0),
        .D(\stateOp_reg[1]_0 ),
        .Q(\stateOp_reg_n_0_[1] ));
  (* SOFT_HLUTNM = "soft_lutpair2880" *) 
  LUT5 #(
    .INIT(32'h0CDC0020)) 
    tkclk_sig_i_1
       (.I0(\tkst[31]_i_3_n_0 ),
        .I1(\stateOp_reg_n_0_[0] ),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(reqInvTkclksrcSetTkst),
        .I4(tkclk),
        .O(tkclk_sig_i_1_n_0));
  FDCE tkclk_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(tkclk_sig_reg_0),
        .D(tkclk_sig_i_1_n_0),
        .Q(tkclk));
  (* SOFT_HLUTNM = "soft_lutpair2881" *) 
  LUT5 #(
    .INIT(32'h808ABFBA)) 
    \tkst[0]_i_1__0 
       (.I0(D[0]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(Q[0]),
        .O(p_1_in[0]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[10]_i_1__0 
       (.I0(D[10]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[10]),
        .O(p_1_in[10]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[11]_i_1__0 
       (.I0(D[11]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[11]),
        .O(p_1_in[11]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[12]_i_1__0 
       (.I0(D[12]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[12]),
        .O(p_1_in[12]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[13]_i_1__0 
       (.I0(D[13]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[13]),
        .O(p_1_in[13]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[14]_i_1__0 
       (.I0(D[14]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[14]),
        .O(p_1_in[14]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[15]_i_1__0 
       (.I0(D[15]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[15]),
        .O(p_1_in[15]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[16]_i_1__0 
       (.I0(D[16]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[16]),
        .O(p_1_in[16]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[17]_i_1__0 
       (.I0(D[17]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[17]),
        .O(p_1_in[17]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[18]_i_1__0 
       (.I0(D[18]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[18]),
        .O(p_1_in[18]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[19]_i_1__0 
       (.I0(D[19]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[19]),
        .O(p_1_in[19]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[1]_i_1__0 
       (.I0(D[1]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[1]),
        .O(p_1_in[1]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[20]_i_1__0 
       (.I0(D[20]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[20]),
        .O(p_1_in[20]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[21]_i_1__0 
       (.I0(D[21]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[21]),
        .O(p_1_in[21]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[22]_i_1__0 
       (.I0(D[22]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[22]),
        .O(p_1_in[22]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[23]_i_1__0 
       (.I0(D[23]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[23]),
        .O(p_1_in[23]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[24]_i_1__0 
       (.I0(\tkst_reg[31]_0 [0]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[24]),
        .O(p_1_in[24]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[25]_i_1__0 
       (.I0(\tkst_reg[31]_0 [1]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[25]),
        .O(p_1_in[25]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[26]_i_1__0 
       (.I0(\tkst_reg[31]_0 [2]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[26]),
        .O(p_1_in[26]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[27]_i_1__0 
       (.I0(\tkst_reg[31]_0 [3]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[27]),
        .O(p_1_in[27]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[28]_i_1__0 
       (.I0(\tkst_reg[31]_0 [4]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[28]),
        .O(p_1_in[28]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[29]_i_1__0 
       (.I0(\tkst_reg[31]_0 [5]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[29]),
        .O(p_1_in[29]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[2]_i_1__0 
       (.I0(D[2]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[2]),
        .O(p_1_in[2]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[30]_i_1__0 
       (.I0(\tkst_reg[31]_0 [6]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[30]),
        .O(p_1_in[30]));
  LUT5 #(
    .INIT(32'hF000F8F0)) 
    \tkst[31]_i_1__1 
       (.I0(\tkst[31]_i_3_n_0 ),
        .I1(tkclk),
        .I2(reqInvTkclksrcSetTkst),
        .I3(\stateOp_reg_n_0_[1] ),
        .I4(\stateOp_reg_n_0_[0] ),
        .O(\tkst[31]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[31]_i_2 
       (.I0(\tkst_reg[31]_0 [7]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[31]),
        .O(p_1_in[31]));
  LUT6 #(
    .INIT(64'h0000000008000008)) 
    \tkst[31]_i_3 
       (.I0(\tkst[31]_i_4_n_0 ),
        .I1(\i_reg_n_0_[13] ),
        .I2(\i_reg_n_0_[11] ),
        .I3(\tkst[31]_i_5_n_0 ),
        .I4(\i_reg_n_0_[10] ),
        .I5(\i_reg_n_0_[12] ),
        .O(\tkst[31]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000080000800000)) 
    \tkst[31]_i_4 
       (.I0(\tkst[31]_i_6_n_0 ),
        .I1(\i_reg_n_0_[9] ),
        .I2(\i_reg_n_0_[8] ),
        .I3(\i_reg_n_0_[7] ),
        .I4(\i[9]_i_2__2_n_0 ),
        .I5(\i_reg_n_0_[6] ),
        .O(\tkst[31]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hF7FFFFFF)) 
    \tkst[31]_i_5 
       (.I0(\i_reg_n_0_[9] ),
        .I1(\i_reg_n_0_[6] ),
        .I2(\i[9]_i_2__2_n_0 ),
        .I3(\i_reg_n_0_[7] ),
        .I4(\i_reg_n_0_[8] ),
        .O(\tkst[31]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000040000000)) 
    \tkst[31]_i_6 
       (.I0(\i_reg_n_0_[4] ),
        .I1(\i_reg_n_0_[3] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[2] ),
        .I5(\i_reg_n_0_[5] ),
        .O(\tkst[31]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[3]_i_1__0 
       (.I0(D[3]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[3]),
        .O(p_1_in[3]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[4]_i_1__0 
       (.I0(D[4]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[4]),
        .O(p_1_in[4]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[5]_i_1__0 
       (.I0(D[5]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[5]),
        .O(p_1_in[5]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[6]_i_1__0 
       (.I0(D[6]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[6]),
        .O(p_1_in[6]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[7]_i_1__0 
       (.I0(D[7]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[7]),
        .O(p_1_in[7]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[8]_i_1__0 
       (.I0(D[8]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[8]),
        .O(p_1_in[8]));
  LUT5 #(
    .INIT(32'hBFBA808A)) 
    \tkst[9]_i_1__0 
       (.I0(D[9]),
        .I1(reqInvTkclksrcSetTkst),
        .I2(\stateOp_reg_n_0_[1] ),
        .I3(\stateOp_reg_n_0_[0] ),
        .I4(plusOp__60[9]),
        .O(p_1_in[9]));
  FDCE \tkst_reg[0] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[0]),
        .Q(Q[0]));
  FDCE \tkst_reg[10] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[10]),
        .Q(Q[10]));
  FDCE \tkst_reg[11] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[11]),
        .Q(Q[11]));
  FDCE \tkst_reg[12] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[12]),
        .Q(Q[12]));
  FDCE \tkst_reg[13] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[13]),
        .Q(Q[13]));
  FDCE \tkst_reg[14] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[14]),
        .Q(Q[14]));
  FDCE \tkst_reg[15] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[15]),
        .Q(Q[15]));
  FDCE \tkst_reg[16] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[16]),
        .Q(Q[16]));
  FDCE \tkst_reg[17] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[17]),
        .Q(Q[17]));
  FDCE \tkst_reg[18] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[18]),
        .Q(Q[18]));
  FDCE \tkst_reg[19] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[19]),
        .Q(Q[19]));
  FDCE \tkst_reg[1] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[1]),
        .Q(Q[1]));
  FDCE \tkst_reg[20] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[20]),
        .Q(Q[20]));
  FDCE \tkst_reg[21] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[21]),
        .Q(Q[21]));
  FDCE \tkst_reg[22] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[22]),
        .Q(Q[22]));
  FDCE \tkst_reg[23] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[23]),
        .Q(Q[23]));
  FDCE \tkst_reg[24] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[24]),
        .Q(Q[24]));
  FDCE \tkst_reg[25] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[25]),
        .Q(Q[25]));
  FDCE \tkst_reg[26] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[26]),
        .Q(Q[26]));
  FDCE \tkst_reg[27] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[27]),
        .Q(Q[27]));
  FDCE \tkst_reg[28] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[28]),
        .Q(Q[28]));
  FDCE \tkst_reg[29] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[29]),
        .Q(Q[29]));
  FDCE \tkst_reg[2] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[2]),
        .Q(Q[2]));
  FDCE \tkst_reg[30] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[30]),
        .Q(Q[30]));
  FDCE \tkst_reg[31] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[31]),
        .Q(Q[31]));
  FDCE \tkst_reg[3] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[3]),
        .Q(Q[3]));
  FDCE \tkst_reg[4] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[4]),
        .Q(Q[4]));
  FDCE \tkst_reg[5] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[5]),
        .Q(Q[5]));
  FDCE \tkst_reg[6] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[6]),
        .Q(Q[6]));
  FDCE \tkst_reg[7] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[7]),
        .Q(Q[7]));
  FDCE \tkst_reg[8] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[8]),
        .Q(Q[8]));
  FDCE \tkst_reg[9] 
       (.C(aclk_sig),
        .CE(\tkst[31]_i_1__1_n_0 ),
        .CLR(tkclk_sig_reg_0),
        .D(p_1_in[9]),
        .Q(Q[9]));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Trace
   (doutb,
    stateOp_reg_0,
    ackInvTraceConfig,
    ackInvTraceAcquire,
    traceGetInfoTixVState,
    Q,
    ackFlgbufTraceToHostif,
    aclk_sig,
    stateOp5_out,
    \tixVState_reg[0]_0 ,
    ackInvConfig_sig,
    ackInvAcquire_sig3_out,
    reqInvTraceConfig,
    reqInvTraceAcquire,
    flgbufTraceToHostifAXIS_tready,
    dneFlgbufTraceToHostif,
    reqFlgbufTraceToHostif);
  output [63:0]doutb;
  output stateOp_reg_0;
  output ackInvTraceConfig;
  output ackInvTraceAcquire;
  output [0:0]traceGetInfoTixVState;
  output [1:0]Q;
  output ackFlgbufTraceToHostif;
  input aclk_sig;
  input stateOp5_out;
  input [0:0]\tixVState_reg[0]_0 ;
  input ackInvConfig_sig;
  input ackInvAcquire_sig3_out;
  input reqInvTraceConfig;
  input reqInvTraceAcquire;
  input flgbufTraceToHostifAXIS_tready;
  input dneFlgbufTraceToHostif;
  input reqFlgbufTraceToHostif;

  wire \FSM_onehot_stateFlgbufB[0]_i_1_n_0 ;
  wire \FSM_onehot_stateFlgbufB[2]_i_1_n_0 ;
  wire \FSM_onehot_stateFlgbufB[3]_i_1_n_0 ;
  wire \FSM_onehot_stateFlgbufB[3]_i_2_n_0 ;
  wire \FSM_onehot_stateFlgbufB[5]_i_1_n_0 ;
  wire \FSM_onehot_stateFlgbufB[5]_i_3_n_0 ;
  wire \FSM_onehot_stateFlgbufB_reg_n_0_[0] ;
  wire \FSM_onehot_stateFlgbufB_reg_n_0_[2] ;
  wire [1:0]Q;
  wire \aFlgbufB[0]_i_1_n_0 ;
  wire \aFlgbufB[10]_i_1_n_0 ;
  wire \aFlgbufB[11]_i_1_n_0 ;
  wire \aFlgbufB[12]_i_1_n_0 ;
  wire \aFlgbufB[12]_i_2_n_0 ;
  wire \aFlgbufB[12]_i_3_n_0 ;
  wire \aFlgbufB[1]_i_1_n_0 ;
  wire \aFlgbufB[2]_i_1_n_0 ;
  wire \aFlgbufB[3]_i_1_n_0 ;
  wire \aFlgbufB[4]_i_1_n_0 ;
  wire \aFlgbufB[5]_i_1_n_0 ;
  wire \aFlgbufB[5]_i_2_n_0 ;
  wire \aFlgbufB[6]_i_1_n_0 ;
  wire \aFlgbufB[7]_i_1_n_0 ;
  wire \aFlgbufB[8]_i_1_n_0 ;
  wire \aFlgbufB[9]_i_1_n_0 ;
  wire \aFlgbufB[9]_i_2_n_0 ;
  wire \aFlgbufB_reg_n_0_[0] ;
  wire \aFlgbufB_reg_n_0_[10] ;
  wire \aFlgbufB_reg_n_0_[11] ;
  wire \aFlgbufB_reg_n_0_[12] ;
  wire \aFlgbufB_reg_n_0_[1] ;
  wire \aFlgbufB_reg_n_0_[2] ;
  wire \aFlgbufB_reg_n_0_[3] ;
  wire \aFlgbufB_reg_n_0_[4] ;
  wire \aFlgbufB_reg_n_0_[5] ;
  wire \aFlgbufB_reg_n_0_[6] ;
  wire \aFlgbufB_reg_n_0_[7] ;
  wire \aFlgbufB_reg_n_0_[8] ;
  wire \aFlgbufB_reg_n_0_[9] ;
  wire ackFlgbufTraceToHostif;
  wire ackInvAcquire_sig3_out;
  wire ackInvConfig_sig;
  wire ackInvTraceAcquire;
  wire ackInvTraceConfig;
  wire aclk_sig;
  wire dneFlgbufTraceToHostif;
  wire [63:0]doutb;
  wire enFlgbufB;
  wire flgbufTraceToHostifAXIS_tready;
  wire reqFlgbufTraceToHostif;
  wire reqInvTraceAcquire;
  wire reqInvTraceConfig;
  wire stateOp;
  wire stateOp5_out;
  wire stateOp_reg_0;
  wire \tixVState[0]_i_1__0_n_0 ;
  wire [0:0]\tixVState_reg[0]_0 ;
  wire [0:0]traceGetInfoTixVState;

  LUT6 #(
    .INIT(64'h000100010001FF01)) 
    \FSM_onehot_stateFlgbufB[0]_i_1 
       (.I0(enFlgbufB),
        .I1(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(reqFlgbufTraceToHostif),
        .I5(flgbufTraceToHostifAXIS_tready),
        .O(\FSM_onehot_stateFlgbufB[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2891" *) 
  LUT3 #(
    .INIT(8'h08)) 
    \FSM_onehot_stateFlgbufB[2]_i_1 
       (.I0(flgbufTraceToHostifAXIS_tready),
        .I1(Q[0]),
        .I2(\FSM_onehot_stateFlgbufB[3]_i_2_n_0 ),
        .O(\FSM_onehot_stateFlgbufB[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2891" *) 
  LUT4 #(
    .INIT(16'hFF80)) 
    \FSM_onehot_stateFlgbufB[3]_i_1 
       (.I0(Q[0]),
        .I1(flgbufTraceToHostifAXIS_tready),
        .I2(\FSM_onehot_stateFlgbufB[3]_i_2_n_0 ),
        .I3(Q[1]),
        .O(\FSM_onehot_stateFlgbufB[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFB)) 
    \FSM_onehot_stateFlgbufB[3]_i_2 
       (.I0(\aFlgbufB_reg_n_0_[11] ),
        .I1(\aFlgbufB_reg_n_0_[12] ),
        .I2(\aFlgbufB_reg_n_0_[8] ),
        .I3(\aFlgbufB_reg_n_0_[10] ),
        .I4(\aFlgbufB[12]_i_3_n_0 ),
        .O(\FSM_onehot_stateFlgbufB[3]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFFF8)) 
    \FSM_onehot_stateFlgbufB[5]_i_1 
       (.I0(Q[0]),
        .I1(flgbufTraceToHostifAXIS_tready),
        .I2(enFlgbufB),
        .I3(\FSM_onehot_stateFlgbufB[5]_i_3_n_0 ),
        .O(\FSM_onehot_stateFlgbufB[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEAEAFFFFEAEAFFC0)) 
    \FSM_onehot_stateFlgbufB[5]_i_3 
       (.I0(Q[1]),
        .I1(dneFlgbufTraceToHostif),
        .I2(\FSM_onehot_stateFlgbufB_reg_n_0_[2] ),
        .I3(Q[0]),
        .I4(reqFlgbufTraceToHostif),
        .I5(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\FSM_onehot_stateFlgbufB[5]_i_3_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDPE #(
    .INIT(1'b1)) 
    \FSM_onehot_stateFlgbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateFlgbufB[5]_i_1_n_0 ),
        .D(\FSM_onehot_stateFlgbufB[0]_i_1_n_0 ),
        .PRE(\tixVState_reg[0]_0 ),
        .Q(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateFlgbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateFlgbufB[5]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(enFlgbufB),
        .Q(Q[0]));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateFlgbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateFlgbufB[5]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\FSM_onehot_stateFlgbufB[2]_i_1_n_0 ),
        .Q(\FSM_onehot_stateFlgbufB_reg_n_0_[2] ));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateFlgbufB_reg[3] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateFlgbufB[5]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\FSM_onehot_stateFlgbufB[3]_i_1_n_0 ),
        .Q(enFlgbufB));
  (* FSM_ENCODED_STATES = "iSTATE:100000,iSTATE0:000010,iSTATE1:001000,iSTATE2:000100,iSTATE3:000001,iSTATE4:010000" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateFlgbufB_reg[5] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateFlgbufB[5]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .Q(Q[1]));
  LUT2 #(
    .INIT(4'h1)) 
    \aFlgbufB[0]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[0] ),
        .I1(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2890" *) 
  LUT4 #(
    .INIT(16'h00A6)) 
    \aFlgbufB[10]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[10] ),
        .I1(\aFlgbufB_reg_n_0_[8] ),
        .I2(\aFlgbufB[12]_i_3_n_0 ),
        .I3(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2890" *) 
  LUT5 #(
    .INIT(32'h0000AA6A)) 
    \aFlgbufB[11]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[11] ),
        .I1(\aFlgbufB_reg_n_0_[10] ),
        .I2(\aFlgbufB_reg_n_0_[8] ),
        .I3(\aFlgbufB[12]_i_3_n_0 ),
        .I4(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[11]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFF80)) 
    \aFlgbufB[12]_i_1 
       (.I0(Q[0]),
        .I1(flgbufTraceToHostifAXIS_tready),
        .I2(\FSM_onehot_stateFlgbufB[3]_i_2_n_0 ),
        .I3(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[12]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000AAAA6AAA)) 
    \aFlgbufB[12]_i_2 
       (.I0(\aFlgbufB_reg_n_0_[12] ),
        .I1(\aFlgbufB_reg_n_0_[8] ),
        .I2(\aFlgbufB_reg_n_0_[10] ),
        .I3(\aFlgbufB_reg_n_0_[11] ),
        .I4(\aFlgbufB[12]_i_3_n_0 ),
        .I5(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[12]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2892" *) 
  LUT4 #(
    .INIT(16'hDFFF)) 
    \aFlgbufB[12]_i_3 
       (.I0(\aFlgbufB_reg_n_0_[7] ),
        .I1(\aFlgbufB[9]_i_2_n_0 ),
        .I2(\aFlgbufB_reg_n_0_[6] ),
        .I3(\aFlgbufB_reg_n_0_[9] ),
        .O(\aFlgbufB[12]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2893" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \aFlgbufB[1]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[1] ),
        .I1(\aFlgbufB_reg_n_0_[0] ),
        .I2(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2888" *) 
  LUT4 #(
    .INIT(16'h006A)) 
    \aFlgbufB[2]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[2] ),
        .I1(\aFlgbufB_reg_n_0_[0] ),
        .I2(\aFlgbufB_reg_n_0_[1] ),
        .I3(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2888" *) 
  LUT5 #(
    .INIT(32'h00006AAA)) 
    \aFlgbufB[3]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[3] ),
        .I1(\aFlgbufB_reg_n_0_[1] ),
        .I2(\aFlgbufB_reg_n_0_[0] ),
        .I3(\aFlgbufB_reg_n_0_[2] ),
        .I4(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h000000006AAAAAAA)) 
    \aFlgbufB[4]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[4] ),
        .I1(\aFlgbufB_reg_n_0_[2] ),
        .I2(\aFlgbufB_reg_n_0_[0] ),
        .I3(\aFlgbufB_reg_n_0_[1] ),
        .I4(\aFlgbufB_reg_n_0_[3] ),
        .I5(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2893" *) 
  LUT3 #(
    .INIT(8'h09)) 
    \aFlgbufB[5]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[5] ),
        .I1(\aFlgbufB[5]_i_2_n_0 ),
        .I2(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \aFlgbufB[5]_i_2 
       (.I0(\aFlgbufB_reg_n_0_[3] ),
        .I1(\aFlgbufB_reg_n_0_[1] ),
        .I2(\aFlgbufB_reg_n_0_[0] ),
        .I3(\aFlgbufB_reg_n_0_[2] ),
        .I4(\aFlgbufB_reg_n_0_[4] ),
        .O(\aFlgbufB[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2892" *) 
  LUT3 #(
    .INIT(8'h09)) 
    \aFlgbufB[6]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[6] ),
        .I1(\aFlgbufB[9]_i_2_n_0 ),
        .I2(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2889" *) 
  LUT4 #(
    .INIT(16'h009A)) 
    \aFlgbufB[7]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[7] ),
        .I1(\aFlgbufB[9]_i_2_n_0 ),
        .I2(\aFlgbufB_reg_n_0_[6] ),
        .I3(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2889" *) 
  LUT5 #(
    .INIT(32'h0000A6AA)) 
    \aFlgbufB[8]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[8] ),
        .I1(\aFlgbufB_reg_n_0_[6] ),
        .I2(\aFlgbufB[9]_i_2_n_0 ),
        .I3(\aFlgbufB_reg_n_0_[7] ),
        .I4(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000AA6AAAAA)) 
    \aFlgbufB[9]_i_1 
       (.I0(\aFlgbufB_reg_n_0_[9] ),
        .I1(\aFlgbufB_reg_n_0_[8] ),
        .I2(\aFlgbufB_reg_n_0_[7] ),
        .I3(\aFlgbufB[9]_i_2_n_0 ),
        .I4(\aFlgbufB_reg_n_0_[6] ),
        .I5(\FSM_onehot_stateFlgbufB_reg_n_0_[0] ),
        .O(\aFlgbufB[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFF)) 
    \aFlgbufB[9]_i_2 
       (.I0(\aFlgbufB_reg_n_0_[4] ),
        .I1(\aFlgbufB_reg_n_0_[2] ),
        .I2(\aFlgbufB_reg_n_0_[0] ),
        .I3(\aFlgbufB_reg_n_0_[1] ),
        .I4(\aFlgbufB_reg_n_0_[3] ),
        .I5(\aFlgbufB_reg_n_0_[5] ),
        .O(\aFlgbufB[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[0]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[10] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[10]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[11] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[11]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[12] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[12]_i_2_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[12] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[1]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[2]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[3] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[3]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[4] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[4]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[5] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[5]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[6] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[6]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[7] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[7]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[8] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[8]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \aFlgbufB_reg[9] 
       (.C(aclk_sig),
        .CE(\aFlgbufB[12]_i_1_n_0 ),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\aFlgbufB[9]_i_1_n_0 ),
        .Q(\aFlgbufB_reg_n_0_[9] ));
  FDCE ackInvAcquire_sig_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(\tixVState_reg[0]_0 ),
        .D(ackInvAcquire_sig3_out),
        .Q(ackInvTraceAcquire));
  FDCE ackInvConfig_sig_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(\tixVState_reg[0]_0 ),
        .D(ackInvConfig_sig),
        .Q(ackInvTraceConfig));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size38kB_a8b64 myFlgbuf
       (.Q(enFlgbufB),
        .aclk_sig(aclk_sig),
        .doutb(doutb),
        .\no_softecc_sel_reg.ce_pri.sel_pipe_reg[2] ({\aFlgbufB_reg_n_0_[12] ,\aFlgbufB_reg_n_0_[11] ,\aFlgbufB_reg_n_0_[10] ,\aFlgbufB_reg_n_0_[9] ,\aFlgbufB_reg_n_0_[8] ,\aFlgbufB_reg_n_0_[7] ,\aFlgbufB_reg_n_0_[6] ,\aFlgbufB_reg_n_0_[5] ,\aFlgbufB_reg_n_0_[4] ,\aFlgbufB_reg_n_0_[3] ,\aFlgbufB_reg_n_0_[2] ,\aFlgbufB_reg_n_0_[1] ,\aFlgbufB_reg_n_0_[0] }));
  LUT5 #(
    .INIT(32'h5D5DFF5D)) 
    stateOp_i_1__4
       (.I0(stateOp_reg_0),
        .I1(ackInvTraceConfig),
        .I2(reqInvTraceConfig),
        .I3(ackInvTraceAcquire),
        .I4(reqInvTraceAcquire),
        .O(stateOp));
  FDCE stateOp_reg
       (.C(aclk_sig),
        .CE(stateOp),
        .CLR(\tixVState_reg[0]_0 ),
        .D(stateOp5_out),
        .Q(stateOp_reg_0));
  LUT3 #(
    .INIT(8'hDC)) 
    \tixVState[0]_i_1__0 
       (.I0(stateOp_reg_0),
        .I1(traceGetInfoTixVState),
        .I2(reqInvTraceAcquire),
        .O(\tixVState[0]_i_1__0_n_0 ));
  FDCE \tixVState_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(\tixVState_reg[0]_0 ),
        .D(\tixVState[0]_i_1__0_n_0 ),
        .Q(traceGetInfoTixVState));
  LUT3 #(
    .INIT(8'hFE)) 
    \wordcntLast[28]_i_18 
       (.I0(enFlgbufB),
        .I1(Q[0]),
        .I2(\FSM_onehot_stateFlgbufB_reg_n_0_[2] ),
        .O(ackFlgbufTraceToHostif));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Videoin
   (rgbVideoinToManyAXIS_tvalid,
    grayVideoinToManyAXIS_tvalid,
    grayVideoinToManyAXIS_tlast,
    rgbToManyAXIS_tlast_sig_reg_0,
    Q,
    \col_lcl_reg[5]_0 ,
    \FSM_sequential_stateRgbegr_reg[2]_0 ,
    \col_lcl_reg[5]_1 ,
    \klm_reg[0]_0 ,
    \stateIgr_reg[1]_0 ,
    \rgbToManyAXIS_tdata_sig_reg[7]_0 ,
    \rgbToManyAXIS_tdata_sig_reg[35]_0 ,
    grayToManyAXIS_tvalid_sig_reg_0,
    enAccbuf1,
    DI,
    \abcde_reg[0]_0 ,
    \rgbToManyAXIS_tdata_sig_reg[7]_1 ,
    O,
    \abcde_reg[0]_1 ,
    videoinStateIgr_dbg,
    videoinStateRgbegr_dbg,
    \NColRaw_sig_reg[4] ,
    \col_lcl_reg[4]_0 ,
    aclk_sig,
    enRowbufB_lcl_reg_0,
    \dwrEobuf_reg[63]_0 ,
    camifToVideoinAXIS_tdata,
    \dwrEobuf_reg[62]_0 ,
    \dwrEobuf_reg[61]_0 ,
    \dwrEobuf_reg[60]_0 ,
    \dwrEobuf_reg[59]_0 ,
    \dwrEobuf_reg[58]_0 ,
    \dwrEobuf_reg[57]_0 ,
    \dwrEobuf_reg[56]_0 ,
    \dwrEobuf_reg[36]_0 ,
    enAccbuf_reg,
    enAccbuf0,
    \dwrAccbuf_reg[7] ,
    \dy_reg[8] ,
    oddNotEven_reg_0,
    enRowbuf_reg_0,
    enEobufB_reg_0,
    camifToVideoinAXIS_tvalid,
    \dwrEobuf_reg[63]_1 ,
    camifToVideoinAXIS_tlast,
    enEobufB_reg_1,
    E,
    \stateIgr_reg[1]_1 );
  output rgbVideoinToManyAXIS_tvalid;
  output grayVideoinToManyAXIS_tvalid;
  output grayVideoinToManyAXIS_tlast;
  output rgbToManyAXIS_tlast_sig_reg_0;
  output [4:0]Q;
  output \col_lcl_reg[5]_0 ;
  output [2:0]\FSM_sequential_stateRgbegr_reg[2]_0 ;
  output \col_lcl_reg[5]_1 ;
  output [0:0]\klm_reg[0]_0 ;
  output [1:0]\stateIgr_reg[1]_0 ;
  output [7:0]\rgbToManyAXIS_tdata_sig_reg[7]_0 ;
  output [35:0]\rgbToManyAXIS_tdata_sig_reg[35]_0 ;
  output grayToManyAXIS_tvalid_sig_reg_0;
  output enAccbuf1;
  output [3:0]DI;
  output [39:0]\abcde_reg[0]_0 ;
  output [0:0]\rgbToManyAXIS_tdata_sig_reg[7]_1 ;
  output [7:0]O;
  output [44:0]\abcde_reg[0]_1 ;
  output [1:0]videoinStateIgr_dbg;
  output [1:0]videoinStateRgbegr_dbg;
  output \NColRaw_sig_reg[4] ;
  output \col_lcl_reg[4]_0 ;
  input aclk_sig;
  input [0:0]enRowbufB_lcl_reg_0;
  input \dwrEobuf_reg[63]_0 ;
  input [23:0]camifToVideoinAXIS_tdata;
  input \dwrEobuf_reg[62]_0 ;
  input \dwrEobuf_reg[61]_0 ;
  input \dwrEobuf_reg[60]_0 ;
  input \dwrEobuf_reg[59]_0 ;
  input \dwrEobuf_reg[58]_0 ;
  input \dwrEobuf_reg[57]_0 ;
  input \dwrEobuf_reg[56]_0 ;
  input \dwrEobuf_reg[36]_0 ;
  input enAccbuf_reg;
  input enAccbuf0;
  input [7:0]\dwrAccbuf_reg[7] ;
  input \dy_reg[8] ;
  input oddNotEven_reg_0;
  input [10:0]enRowbuf_reg_0;
  input enEobufB_reg_0;
  input camifToVideoinAXIS_tvalid;
  input \dwrEobuf_reg[63]_1 ;
  input camifToVideoinAXIS_tlast;
  input enEobufB_reg_1;
  input [0:0]E;
  input [0:0]\stateIgr_reg[1]_1 ;

  wire [3:0]DI;
  wire [0:0]E;
  wire \FSM_sequential_stateGrayegr[2]_i_10_n_0 ;
  wire \FSM_sequential_stateGrayegr[2]_i_1_n_0 ;
  wire \FSM_sequential_stateGrayegr[2]_i_3_n_0 ;
  wire \FSM_sequential_stateGrayegr[2]_i_4_n_0 ;
  wire \FSM_sequential_stateGrayegr[2]_i_5_n_0 ;
  wire \FSM_sequential_stateGrayegr[2]_i_6_n_0 ;
  wire \FSM_sequential_stateGrayegr[2]_i_7_n_0 ;
  wire \FSM_sequential_stateGrayegr[2]_i_8_n_0 ;
  wire \FSM_sequential_stateGrayegr[2]_i_9_n_0 ;
  wire \FSM_sequential_stateRgbegr[2]_i_1_n_0 ;
  wire \FSM_sequential_stateRgbegr[2]_i_2_n_0 ;
  wire [2:0]\FSM_sequential_stateRgbegr_reg[2]_0 ;
  wire \NColRaw_sig_reg[4] ;
  wire [7:0]O;
  wire [4:0]Q;
  wire \aEobufB[0]_i_1_n_0 ;
  wire \aEobufB[1]_i_1_n_0 ;
  wire \aEobufB[2]_i_1_n_0 ;
  wire \aEobufB[3]_i_1_n_0 ;
  wire \aEobufB[4]_i_1_n_0 ;
  wire \aEobufB[4]_i_2_n_0 ;
  wire \aEobufB[5]_i_1_n_0 ;
  wire \aEobufB[5]_i_2_n_0 ;
  wire \aEobufB[6]_i_1_n_0 ;
  wire \aEobufB[7]_i_1_n_0 ;
  wire \aEobufB[8]_i_1_n_0 ;
  wire \aEobufB[8]_i_2_n_0 ;
  wire \aEobufB[9]_i_1_n_0 ;
  wire \aEobufB[9]_i_2_n_0 ;
  wire \aEobufB[9]_i_3_n_0 ;
  wire \aEobufB[9]_i_4_n_0 ;
  wire \aEobufB[9]_i_5_n_0 ;
  wire \aEobufB[9]_i_6_n_0 ;
  wire \aEobufB_reg_n_0_[0] ;
  wire \aEobufB_reg_n_0_[1] ;
  wire \aEobufB_reg_n_0_[2] ;
  wire \aEobufB_reg_n_0_[3] ;
  wire \aEobufB_reg_n_0_[4] ;
  wire \aEobufB_reg_n_0_[5] ;
  wire \aEobufB_reg_n_0_[6] ;
  wire \aEobufB_reg_n_0_[7] ;
  wire \aEobufB_reg_n_0_[8] ;
  wire \aEobufB_reg_n_0_[9] ;
  wire \aEobuf[0]_i_1_n_0 ;
  wire \aEobuf[1]_i_1_n_0 ;
  wire \aEobuf[2]_i_1_n_0 ;
  wire \aEobuf[3]_i_1_n_0 ;
  wire \aEobuf[4]_i_1_n_0 ;
  wire \aEobuf[5]_i_1_n_0 ;
  wire \aEobuf[5]_i_2_n_0 ;
  wire \aEobuf[6]_i_1_n_0 ;
  wire \aEobuf[7]_i_1_n_0 ;
  wire \aEobuf[8]_i_1_n_0 ;
  wire \aEobuf[9]_i_1_n_0 ;
  wire \aEobuf[9]_i_2_n_0 ;
  wire \aEobuf[9]_i_3_n_0 ;
  wire \aEobuf[9]_i_4_n_0 ;
  wire \aEobuf[9]_i_5_n_0 ;
  wire \aEobuf[9]_i_6_n_0 ;
  wire \aEobuf_reg_n_0_[0] ;
  wire \aEobuf_reg_n_0_[1] ;
  wire \aEobuf_reg_n_0_[2] ;
  wire \aEobuf_reg_n_0_[3] ;
  wire \aEobuf_reg_n_0_[4] ;
  wire \aEobuf_reg_n_0_[5] ;
  wire \aEobuf_reg_n_0_[6] ;
  wire \aEobuf_reg_n_0_[7] ;
  wire \aEobuf_reg_n_0_[8] ;
  wire \aEobuf_reg_n_0_[9] ;
  wire [0:0]aRowbuf;
  wire \aRowbufB[0]_i_1_n_0 ;
  wire \aRowbufB[1]_i_1_n_0 ;
  wire \aRowbufB[2]_i_1_n_0 ;
  wire \aRowbufB[3]_i_1_n_0 ;
  wire \aRowbufB[4]_i_1_n_0 ;
  wire \aRowbufB[4]_i_2_n_0 ;
  wire \aRowbufB[5]_i_1_n_0 ;
  wire \aRowbufB[5]_i_2_n_0 ;
  wire \aRowbufB[6]_i_1_n_0 ;
  wire \aRowbufB[7]_i_1_n_0 ;
  wire \aRowbufB[8]_i_1_n_0 ;
  wire \aRowbufB[8]_i_2_n_0 ;
  wire \aRowbufB[8]_i_3_n_0 ;
  wire \aRowbufB[8]_i_4_n_0 ;
  wire \aRowbufB_reg_n_0_[0] ;
  wire \aRowbufB_reg_n_0_[1] ;
  wire \aRowbufB_reg_n_0_[2] ;
  wire \aRowbufB_reg_n_0_[3] ;
  wire \aRowbufB_reg_n_0_[4] ;
  wire \aRowbufB_reg_n_0_[5] ;
  wire \aRowbufB_reg_n_0_[6] ;
  wire \aRowbufB_reg_n_0_[7] ;
  wire \aRowbufB_reg_n_0_[8] ;
  wire \aRowbuf[1]_i_1_n_0 ;
  wire \aRowbuf[2]_i_1_n_0 ;
  wire \aRowbuf[3]_i_1_n_0 ;
  wire \aRowbuf[4]_i_1_n_0 ;
  wire \aRowbuf[4]_i_2_n_0 ;
  wire \aRowbuf[5]_i_1_n_0 ;
  wire \aRowbuf[5]_i_2_n_0 ;
  wire \aRowbuf[6]_i_1_n_0 ;
  wire \aRowbuf[7]_i_1_n_0 ;
  wire \aRowbuf[8]_i_1_n_0 ;
  wire \aRowbuf[8]_i_2_n_0 ;
  wire \aRowbuf[8]_i_3_n_0 ;
  wire \aRowbuf[8]_i_4_n_0 ;
  wire \aRowbuf[8]_i_5_n_0 ;
  wire \aRowbuf[8]_i_6_n_0 ;
  wire \aRowbuf[8]_i_7_n_0 ;
  wire \aRowbuf_reg_n_0_[0] ;
  wire \aRowbuf_reg_n_0_[1] ;
  wire \aRowbuf_reg_n_0_[2] ;
  wire \aRowbuf_reg_n_0_[3] ;
  wire \aRowbuf_reg_n_0_[4] ;
  wire \aRowbuf_reg_n_0_[5] ;
  wire \aRowbuf_reg_n_0_[6] ;
  wire \aRowbuf_reg_n_0_[7] ;
  wire \aRowbuf_reg_n_0_[8] ;
  wire [1:1]abcde;
  wire \abcde[0]_i_1__0_n_0 ;
  wire \abcde[2]_i_1__0_n_0 ;
  wire \abcde[2]_i_2__0_n_0 ;
  wire [39:0]\abcde_reg[0]_0 ;
  wire [44:0]\abcde_reg[0]_1 ;
  wire \abcde_reg_n_0_[0] ;
  wire \abcde_reg_n_0_[1] ;
  wire \abcde_reg_n_0_[2] ;
  wire \acc0_lcl_reg[7]_i_2_n_1 ;
  wire \acc0_lcl_reg[7]_i_2_n_2 ;
  wire \acc0_lcl_reg[7]_i_2_n_3 ;
  wire \acc0_lcl_reg[7]_i_2_n_4 ;
  wire \acc0_lcl_reg[7]_i_2_n_5 ;
  wire \acc0_lcl_reg[7]_i_2_n_6 ;
  wire \acc0_lcl_reg[7]_i_2_n_7 ;
  wire aclk_sig;
  wire [23:0]camifToVideoinAXIS_tdata;
  wire camifToVideoinAXIS_tlast;
  wire camifToVideoinAXIS_tvalid;
  wire [10:0]col_lcl;
  wire \col_lcl[0]__0_i_1__0_n_0 ;
  wire \col_lcl[0]_i_1__1_n_0 ;
  wire \col_lcl[10]__0_i_1__0_n_0 ;
  wire \col_lcl[10]__0_i_2__0_n_0 ;
  wire \col_lcl[10]__1_i_1_n_0 ;
  wire \col_lcl[10]_i_1__1_n_0 ;
  wire \col_lcl[10]_i_2__1_n_0 ;
  wire \col_lcl[1]__0_i_1__0_n_0 ;
  wire \col_lcl[1]_i_1__1_n_0 ;
  wire \col_lcl[2]__0_i_1__0_n_0 ;
  wire \col_lcl[2]__1_i_1_n_0 ;
  wire \col_lcl[2]_i_1__1_n_0 ;
  wire \col_lcl[3]__0_i_1__0_n_0 ;
  wire \col_lcl[3]__1_i_1_n_0 ;
  wire \col_lcl[3]_i_1__1_n_0 ;
  wire \col_lcl[4]__0_i_1__0_n_0 ;
  wire \col_lcl[4]__1_i_1_n_0 ;
  wire \col_lcl[4]__1_i_2_n_0 ;
  wire \col_lcl[4]_i_1__1_n_0 ;
  wire \col_lcl[5]__0_i_1__0_n_0 ;
  wire \col_lcl[5]__0_i_2__0_n_0 ;
  wire \col_lcl[5]__1_i_1_n_0 ;
  wire \col_lcl[5]__1_i_2_n_0 ;
  wire \col_lcl[5]_i_1__1_n_0 ;
  wire \col_lcl[6]__0_i_1__0_n_0 ;
  wire \col_lcl[6]__1_i_1_n_0 ;
  wire \col_lcl[6]_i_1__1_n_0 ;
  wire \col_lcl[7]__0_i_1__0_n_0 ;
  wire \col_lcl[7]__1_i_1_n_0 ;
  wire \col_lcl[7]_i_1__1_n_0 ;
  wire \col_lcl[8]__0_i_1__0_n_0 ;
  wire \col_lcl[8]__1_i_2_n_0 ;
  wire \col_lcl[8]_i_1__1_n_0 ;
  wire \col_lcl[9]__0_i_1__0_n_0 ;
  wire \col_lcl[9]__0_i_2__0_n_0 ;
  wire \col_lcl[9]__1_i_1_n_0 ;
  wire \col_lcl[9]__1_i_2_n_0 ;
  wire \col_lcl[9]_i_1__1_n_0 ;
  wire \col_lcl_reg[0]__0_n_0 ;
  wire \col_lcl_reg[0]__1_n_0 ;
  wire \col_lcl_reg[10]__0_n_0 ;
  wire \col_lcl_reg[10]__1_n_0 ;
  wire \col_lcl_reg[1]__0_n_0 ;
  wire \col_lcl_reg[1]__1_n_0 ;
  wire \col_lcl_reg[2]__0_n_0 ;
  wire \col_lcl_reg[2]__1_n_0 ;
  wire \col_lcl_reg[3]__0_n_0 ;
  wire \col_lcl_reg[3]__1_n_0 ;
  wire \col_lcl_reg[4]_0 ;
  wire \col_lcl_reg[4]__0_n_0 ;
  wire \col_lcl_reg[4]__1_n_0 ;
  wire \col_lcl_reg[5]_0 ;
  wire \col_lcl_reg[5]_1 ;
  wire \col_lcl_reg[5]__0_n_0 ;
  wire \col_lcl_reg[5]__1_n_0 ;
  wire \col_lcl_reg[6]__0_n_0 ;
  wire \col_lcl_reg[6]__1_n_0 ;
  wire \col_lcl_reg[7]__0_n_0 ;
  wire \col_lcl_reg[7]__1_n_0 ;
  wire \col_lcl_reg[8]__0_n_0 ;
  wire \col_lcl_reg[8]__1_n_0 ;
  wire \col_lcl_reg[9]__0_n_0 ;
  wire \col_lcl_reg[9]__1_n_0 ;
  wire \col_lcl_reg_n_0_[10] ;
  wire \col_lcl_reg_n_0_[3] ;
  wire \col_lcl_reg_n_0_[4] ;
  wire \col_lcl_reg_n_0_[5] ;
  wire \col_lcl_reg_n_0_[8] ;
  wire \col_lcl_reg_n_0_[9] ;
  wire \dIgrm1[16]_i_3_n_0 ;
  wire \dIgrm1[17]_i_3_n_0 ;
  wire \dIgrm1[18]_i_3_n_0 ;
  wire \dIgrm1[19]_i_3_n_0 ;
  wire \dIgrm1[20]_i_3_n_0 ;
  wire \dIgrm1[21]_i_3_n_0 ;
  wire \dIgrm1[22]_i_3_n_0 ;
  wire \dIgrm1[23]_i_3_n_0 ;
  wire \dIgrm1[24]_i_3_n_0 ;
  wire \dIgrm1[24]_i_4_n_0 ;
  wire \dIgrm1[25]_i_3_n_0 ;
  wire \dIgrm1[25]_i_4_n_0 ;
  wire \dIgrm1[26]_i_3_n_0 ;
  wire \dIgrm1[26]_i_4_n_0 ;
  wire \dIgrm1[27]_i_3_n_0 ;
  wire \dIgrm1[27]_i_4_n_0 ;
  wire \dIgrm1[28]_i_3_n_0 ;
  wire \dIgrm1[28]_i_4_n_0 ;
  wire \dIgrm1[29]_i_3_n_0 ;
  wire \dIgrm1[29]_i_4_n_0 ;
  wire \dIgrm1[30]_i_3_n_0 ;
  wire \dIgrm1[30]_i_4_n_0 ;
  wire \dIgrm1[31]_i_3_n_0 ;
  wire \dIgrm1[31]_i_4_n_0 ;
  wire \dIgrm1[32]_i_3_n_0 ;
  wire \dIgrm1[32]_i_4_n_0 ;
  wire \dIgrm1[33]_i_3_n_0 ;
  wire \dIgrm1[33]_i_4_n_0 ;
  wire \dIgrm1[34]_i_3_n_0 ;
  wire \dIgrm1[34]_i_4_n_0 ;
  wire \dIgrm1[35]_i_3_n_0 ;
  wire \dIgrm1[35]_i_4_n_0 ;
  wire \dIgrm1[36]_i_3_n_0 ;
  wire \dIgrm1[36]_i_4_n_0 ;
  wire \dIgrm1[37]_i_3_n_0 ;
  wire \dIgrm1[37]_i_4_n_0 ;
  wire \dIgrm1[38]_i_3_n_0 ;
  wire \dIgrm1[38]_i_4_n_0 ;
  wire \dIgrm1[39]_i_4_n_0 ;
  wire \dIgrm1[39]_i_5_n_0 ;
  wire [7:4]data10;
  wire [7:4]data10__0;
  wire [7:4]data10__1;
  wire [7:4]data10__2;
  wire [7:4]data10__3;
  wire [11:0]data2;
  wire [63:0]drdB;
  wire [63:48]drdEvenAbufB;
  wire [63:48]drdEvenbufBm1;
  wire \drdEvenbufBm1[63]_i_1_n_0 ;
  wire \drdEvenbufBm1_reg_n_0_[60] ;
  wire \drdEvenbufBm1_reg_n_0_[61] ;
  wire \drdEvenbufBm1_reg_n_0_[62] ;
  wire \drdEvenbufBm1_reg_n_0_[63] ;
  wire [63:48]drdOddbufBm1;
  wire \drdOddbufBm1_reg_n_0_[48] ;
  wire \drdOddbufBm1_reg_n_0_[49] ;
  wire \drdOddbufBm1_reg_n_0_[50] ;
  wire \drdOddbufBm1_reg_n_0_[51] ;
  wire \drdOddbufBm1_reg_n_0_[52] ;
  wire \drdOddbufBm1_reg_n_0_[53] ;
  wire \drdOddbufBm1_reg_n_0_[54] ;
  wire \drdOddbufBm1_reg_n_0_[55] ;
  wire \drdOddbufBm1_reg_n_0_[56] ;
  wire \drdOddbufBm1_reg_n_0_[57] ;
  wire \drdOddbufBm1_reg_n_0_[58] ;
  wire \drdOddbufBm1_reg_n_0_[59] ;
  wire \drdOddbufBm1_reg_n_0_[60] ;
  wire \drdOddbufBm1_reg_n_0_[61] ;
  wire \drdOddbufBm1_reg_n_0_[62] ;
  wire \drdOddbufBm1_reg_n_0_[63] ;
  wire [63:60]drdRow0bufBm1;
  wire [63:60]drdRow1bufBm1;
  wire [63:60]drdRow2bufBm1;
  wire [63:60]drdRow3bufBm1;
  wire [63:60]drdRow4bufBm1;
  wire \drdRow4bufBm1[63]_i_1_n_0 ;
  wire \drdRow4bufBm1[63]_i_3_n_0 ;
  wire [7:0]\dwrAccbuf_reg[7] ;
  wire [63:0]dwrEobuf;
  wire \dwrEobuf[0]_i_1_n_0 ;
  wire \dwrEobuf[10]_i_1_n_0 ;
  wire \dwrEobuf[10]_i_2_n_0 ;
  wire \dwrEobuf[11]_i_1_n_0 ;
  wire \dwrEobuf[11]_i_2_n_0 ;
  wire \dwrEobuf[12]_i_1_n_0 ;
  wire \dwrEobuf[12]_i_2_n_0 ;
  wire \dwrEobuf[13]_i_1_n_0 ;
  wire \dwrEobuf[13]_i_2_n_0 ;
  wire \dwrEobuf[14]_i_1_n_0 ;
  wire \dwrEobuf[14]_i_2_n_0 ;
  wire \dwrEobuf[15]_i_1_n_0 ;
  wire \dwrEobuf[15]_i_2_n_0 ;
  wire \dwrEobuf[16]_i_1_n_0 ;
  wire \dwrEobuf[17]_i_1_n_0 ;
  wire \dwrEobuf[18]_i_1_n_0 ;
  wire \dwrEobuf[19]_i_1_n_0 ;
  wire \dwrEobuf[1]_i_1_n_0 ;
  wire \dwrEobuf[20]_i_1_n_0 ;
  wire \dwrEobuf[21]_i_1_n_0 ;
  wire \dwrEobuf[22]_i_1_n_0 ;
  wire \dwrEobuf[23]_i_1_n_0 ;
  wire \dwrEobuf[23]_i_2_n_0 ;
  wire \dwrEobuf[24]_i_1_n_0 ;
  wire \dwrEobuf[25]_i_1_n_0 ;
  wire \dwrEobuf[26]_i_1_n_0 ;
  wire \dwrEobuf[27]_i_1_n_0 ;
  wire \dwrEobuf[28]_i_1_n_0 ;
  wire \dwrEobuf[29]_i_1_n_0 ;
  wire \dwrEobuf[2]_i_1_n_0 ;
  wire \dwrEobuf[30]_i_1_n_0 ;
  wire \dwrEobuf[31]_i_1_n_0 ;
  wire \dwrEobuf[31]_i_2_n_0 ;
  wire \dwrEobuf[32]_i_1_n_0 ;
  wire \dwrEobuf[32]_i_2_n_0 ;
  wire \dwrEobuf[33]_i_1_n_0 ;
  wire \dwrEobuf[33]_i_2_n_0 ;
  wire \dwrEobuf[34]_i_1_n_0 ;
  wire \dwrEobuf[34]_i_2_n_0 ;
  wire \dwrEobuf[35]_i_1_n_0 ;
  wire \dwrEobuf[35]_i_2_n_0 ;
  wire \dwrEobuf[36]_i_1_n_0 ;
  wire \dwrEobuf[36]_i_2_n_0 ;
  wire \dwrEobuf[37]_i_1_n_0 ;
  wire \dwrEobuf[37]_i_2_n_0 ;
  wire \dwrEobuf[38]_i_1_n_0 ;
  wire \dwrEobuf[38]_i_2_n_0 ;
  wire \dwrEobuf[39]_i_1_n_0 ;
  wire \dwrEobuf[39]_i_2_n_0 ;
  wire \dwrEobuf[39]_i_4_n_0 ;
  wire \dwrEobuf[3]_i_1_n_0 ;
  wire \dwrEobuf[40]_i_1_n_0 ;
  wire \dwrEobuf[41]_i_1_n_0 ;
  wire \dwrEobuf[42]_i_1_n_0 ;
  wire \dwrEobuf[43]_i_1_n_0 ;
  wire \dwrEobuf[44]_i_1_n_0 ;
  wire \dwrEobuf[45]_i_1_n_0 ;
  wire \dwrEobuf[46]_i_1_n_0 ;
  wire \dwrEobuf[47]_i_1_n_0 ;
  wire \dwrEobuf[47]_i_2_n_0 ;
  wire \dwrEobuf[48]_i_1_n_0 ;
  wire \dwrEobuf[48]_i_2_n_0 ;
  wire \dwrEobuf[49]_i_1_n_0 ;
  wire \dwrEobuf[49]_i_2_n_0 ;
  wire \dwrEobuf[4]_i_1_n_0 ;
  wire \dwrEobuf[50]_i_1_n_0 ;
  wire \dwrEobuf[50]_i_2_n_0 ;
  wire \dwrEobuf[51]_i_1_n_0 ;
  wire \dwrEobuf[51]_i_2_n_0 ;
  wire \dwrEobuf[52]_i_1_n_0 ;
  wire \dwrEobuf[52]_i_2_n_0 ;
  wire \dwrEobuf[53]_i_1_n_0 ;
  wire \dwrEobuf[53]_i_2_n_0 ;
  wire \dwrEobuf[54]_i_1_n_0 ;
  wire \dwrEobuf[54]_i_2_n_0 ;
  wire \dwrEobuf[55]_i_1_n_0 ;
  wire \dwrEobuf[55]_i_2_n_0 ;
  wire \dwrEobuf[55]_i_3_n_0 ;
  wire \dwrEobuf[56]_i_1_n_0 ;
  wire \dwrEobuf[57]_i_1_n_0 ;
  wire \dwrEobuf[58]_i_1_n_0 ;
  wire \dwrEobuf[59]_i_1_n_0 ;
  wire \dwrEobuf[5]_i_1_n_0 ;
  wire \dwrEobuf[60]_i_1_n_0 ;
  wire \dwrEobuf[61]_i_1_n_0 ;
  wire \dwrEobuf[62]_i_1_n_0 ;
  wire \dwrEobuf[63]_i_1_n_0 ;
  wire \dwrEobuf[63]_i_2_n_0 ;
  wire \dwrEobuf[6]_i_1_n_0 ;
  wire \dwrEobuf[7]_i_1_n_0 ;
  wire \dwrEobuf[8]_i_1_n_0 ;
  wire \dwrEobuf[8]_i_2_n_0 ;
  wire \dwrEobuf[9]_i_1_n_0 ;
  wire \dwrEobuf[9]_i_2_n_0 ;
  wire \dwrEobuf_reg[36]_0 ;
  wire \dwrEobuf_reg[56]_0 ;
  wire \dwrEobuf_reg[57]_0 ;
  wire \dwrEobuf_reg[58]_0 ;
  wire \dwrEobuf_reg[59]_0 ;
  wire \dwrEobuf_reg[60]_0 ;
  wire \dwrEobuf_reg[61]_0 ;
  wire \dwrEobuf_reg[62]_0 ;
  wire \dwrEobuf_reg[63]_0 ;
  wire \dwrEobuf_reg[63]_1 ;
  wire [15:0]dwrEobufp1;
  wire [15:0]dwrEobufp10_out;
  wire \dwrEobufp1[15]_i_1_n_0 ;
  wire \dwrEobufp1[7]_i_1_n_0 ;
  wire \dwrEobufp1[7]_i_4_n_0 ;
  wire \dwrRowbuf[0]_i_1__0_n_0 ;
  wire \dwrRowbuf[11]_i_1__0_n_0 ;
  wire \dwrRowbuf[15]_i_1__0_n_0 ;
  wire \dwrRowbuf[19]_i_1__0_n_0 ;
  wire \dwrRowbuf[1]_i_1__0_n_0 ;
  wire \dwrRowbuf[23]_i_1__0_n_0 ;
  wire \dwrRowbuf[27]_i_1__0_n_0 ;
  wire \dwrRowbuf[2]_i_1__0_n_0 ;
  wire \dwrRowbuf[31]_i_1__0_n_0 ;
  wire \dwrRowbuf[35]_i_1_n_0 ;
  wire \dwrRowbuf[39]_i_1_n_0 ;
  wire \dwrRowbuf[3]_i_1__0_n_0 ;
  wire \dwrRowbuf[43]_i_1_n_0 ;
  wire \dwrRowbuf[47]_i_1_n_0 ;
  wire \dwrRowbuf[48]_i_1_n_0 ;
  wire \dwrRowbuf[49]_i_1_n_0 ;
  wire \dwrRowbuf[4]_i_1__0_n_0 ;
  wire \dwrRowbuf[50]_i_1_n_0 ;
  wire \dwrRowbuf[51]_i_1_n_0 ;
  wire \dwrRowbuf[51]_i_2_n_0 ;
  wire \dwrRowbuf[52]_i_1_n_0 ;
  wire \dwrRowbuf[53]_i_1_n_0 ;
  wire \dwrRowbuf[54]_i_1_n_0 ;
  wire \dwrRowbuf[55]_i_1_n_0 ;
  wire \dwrRowbuf[55]_i_2_n_0 ;
  wire \dwrRowbuf[56]_i_1_n_0 ;
  wire \dwrRowbuf[57]_i_1_n_0 ;
  wire \dwrRowbuf[58]_i_1_n_0 ;
  wire \dwrRowbuf[59]_i_1_n_0 ;
  wire \dwrRowbuf[59]_i_2_n_0 ;
  wire \dwrRowbuf[5]_i_1__0_n_0 ;
  wire \dwrRowbuf[60]_i_1_n_0 ;
  wire \dwrRowbuf[61]_i_1_n_0 ;
  wire \dwrRowbuf[62]_i_1_n_0 ;
  wire \dwrRowbuf[63]_i_1_n_0 ;
  wire \dwrRowbuf[63]_i_2_n_0 ;
  wire \dwrRowbuf[6]_i_1__0_n_0 ;
  wire \dwrRowbuf[7]_i_1__0_n_0 ;
  wire \dwrRowbuf_reg_n_0_[0] ;
  wire \dwrRowbuf_reg_n_0_[10] ;
  wire \dwrRowbuf_reg_n_0_[11] ;
  wire \dwrRowbuf_reg_n_0_[12] ;
  wire \dwrRowbuf_reg_n_0_[13] ;
  wire \dwrRowbuf_reg_n_0_[14] ;
  wire \dwrRowbuf_reg_n_0_[15] ;
  wire \dwrRowbuf_reg_n_0_[16] ;
  wire \dwrRowbuf_reg_n_0_[17] ;
  wire \dwrRowbuf_reg_n_0_[18] ;
  wire \dwrRowbuf_reg_n_0_[19] ;
  wire \dwrRowbuf_reg_n_0_[1] ;
  wire \dwrRowbuf_reg_n_0_[20] ;
  wire \dwrRowbuf_reg_n_0_[21] ;
  wire \dwrRowbuf_reg_n_0_[22] ;
  wire \dwrRowbuf_reg_n_0_[23] ;
  wire \dwrRowbuf_reg_n_0_[24] ;
  wire \dwrRowbuf_reg_n_0_[25] ;
  wire \dwrRowbuf_reg_n_0_[26] ;
  wire \dwrRowbuf_reg_n_0_[27] ;
  wire \dwrRowbuf_reg_n_0_[28] ;
  wire \dwrRowbuf_reg_n_0_[29] ;
  wire \dwrRowbuf_reg_n_0_[2] ;
  wire \dwrRowbuf_reg_n_0_[30] ;
  wire \dwrRowbuf_reg_n_0_[31] ;
  wire \dwrRowbuf_reg_n_0_[32] ;
  wire \dwrRowbuf_reg_n_0_[33] ;
  wire \dwrRowbuf_reg_n_0_[34] ;
  wire \dwrRowbuf_reg_n_0_[35] ;
  wire \dwrRowbuf_reg_n_0_[36] ;
  wire \dwrRowbuf_reg_n_0_[37] ;
  wire \dwrRowbuf_reg_n_0_[38] ;
  wire \dwrRowbuf_reg_n_0_[39] ;
  wire \dwrRowbuf_reg_n_0_[3] ;
  wire \dwrRowbuf_reg_n_0_[40] ;
  wire \dwrRowbuf_reg_n_0_[41] ;
  wire \dwrRowbuf_reg_n_0_[42] ;
  wire \dwrRowbuf_reg_n_0_[43] ;
  wire \dwrRowbuf_reg_n_0_[44] ;
  wire \dwrRowbuf_reg_n_0_[45] ;
  wire \dwrRowbuf_reg_n_0_[46] ;
  wire \dwrRowbuf_reg_n_0_[47] ;
  wire \dwrRowbuf_reg_n_0_[48] ;
  wire \dwrRowbuf_reg_n_0_[49] ;
  wire \dwrRowbuf_reg_n_0_[4] ;
  wire \dwrRowbuf_reg_n_0_[50] ;
  wire \dwrRowbuf_reg_n_0_[51] ;
  wire \dwrRowbuf_reg_n_0_[52] ;
  wire \dwrRowbuf_reg_n_0_[53] ;
  wire \dwrRowbuf_reg_n_0_[54] ;
  wire \dwrRowbuf_reg_n_0_[55] ;
  wire \dwrRowbuf_reg_n_0_[56] ;
  wire \dwrRowbuf_reg_n_0_[57] ;
  wire \dwrRowbuf_reg_n_0_[58] ;
  wire \dwrRowbuf_reg_n_0_[59] ;
  wire \dwrRowbuf_reg_n_0_[5] ;
  wire \dwrRowbuf_reg_n_0_[60] ;
  wire \dwrRowbuf_reg_n_0_[61] ;
  wire \dwrRowbuf_reg_n_0_[62] ;
  wire \dwrRowbuf_reg_n_0_[63] ;
  wire \dwrRowbuf_reg_n_0_[6] ;
  wire \dwrRowbuf_reg_n_0_[7] ;
  wire \dwrRowbuf_reg_n_0_[8] ;
  wire \dwrRowbuf_reg_n_0_[9] ;
  wire [7:0]dwrRowbufp1;
  wire [7:0]dwrRowbufp10_out;
  wire \dwrRowbufp1[3]_i_1_n_0 ;
  wire \dwrRowbufp1[3]_i_3_n_0 ;
  wire \dwrRowbufp1[7]_i_1_n_0 ;
  wire \dwrRowbufp1[7]_i_3_n_0 ;
  wire \dwrRowbufp1[7]_i_4_n_0 ;
  wire \dy[11]_i_2_n_0 ;
  wire \dy[13]_i_2_n_0 ;
  wire \dy[15]_i_2_n_0 ;
  wire \dy[17]_i_2_n_0 ;
  wire \dy[20]_i_2_n_0 ;
  wire \dy[22]_i_2_n_0 ;
  wire \dy[24]_i_2_n_0 ;
  wire \dy[26]_i_2_n_0 ;
  wire \dy[29]_i_2_n_0 ;
  wire \dy[2]_i_2_n_0 ;
  wire \dy[31]_i_2_n_0 ;
  wire \dy[33]_i_2_n_0 ;
  wire \dy[35]_i_2_n_0 ;
  wire \dy[38]_i_3_n_0 ;
  wire \dy[40]_i_4_n_0 ;
  wire \dy[42]_i_4_n_0 ;
  wire \dy[44]_i_3_n_0 ;
  wire \dy[4]_i_2_n_0 ;
  wire \dy[6]_i_2_n_0 ;
  wire \dy[8]_i_2_n_0 ;
  wire \dy_reg[8] ;
  wire enAccbuf0;
  wire enAccbuf1;
  wire enAccbuf_reg;
  wire enEobuf;
  wire enEobufB;
  wire enEobufB_i_1_n_0;
  wire enEobufB_i_2_n_0;
  wire enEobufB_i_4_n_0;
  wire enEobufB_i_5_n_0;
  wire enEobufB_i_6_n_0;
  wire enEobufB_lcl;
  wire enEobufB_lcl_reg_n_0;
  wire enEobufB_reg_0;
  wire enEobufB_reg_1;
  wire enEobuf_i_1_n_0;
  wire enRowbuf;
  wire enRowbufB_i_1_n_0;
  wire enRowbufB_i_2_n_0;
  wire enRowbufB_i_3_n_0;
  wire enRowbufB_i_4_n_0;
  wire enRowbufB_lcl_i_1_n_0;
  wire enRowbufB_lcl_i_2_n_0;
  wire [0:0]enRowbufB_lcl_reg_0;
  wire enRowbufB_lcl_reg_n_0;
  wire enRowbufB_reg_n_0;
  wire enRowbuf_i_2_n_0;
  wire enRowbuf_i_3_n_0;
  wire enRowbuf_i_4_n_0;
  wire enRowbuf_i_5_n_0;
  wire [10:0]enRowbuf_reg_0;
  wire enRowbuf_reg_n_0;
  wire fillBNotA_i_1_n_0;
  wire fillBNotA_reg_n_0;
  wire [11:0]gr;
  wire \gr0_reg_n_0_[10] ;
  wire \gr0_reg_n_0_[11] ;
  wire \gr0_reg_n_0_[4] ;
  wire \gr0_reg_n_0_[5] ;
  wire \gr0_reg_n_0_[6] ;
  wire \gr0_reg_n_0_[7] ;
  wire \gr0_reg_n_0_[8] ;
  wire \gr0_reg_n_0_[9] ;
  wire [11:4]gr1;
  wire \gr1_reg_n_0_[10] ;
  wire \gr1_reg_n_0_[11] ;
  wire \gr1_reg_n_0_[4] ;
  wire \gr1_reg_n_0_[5] ;
  wire \gr1_reg_n_0_[6] ;
  wire \gr1_reg_n_0_[7] ;
  wire \gr1_reg_n_0_[8] ;
  wire \gr1_reg_n_0_[9] ;
  wire [11:4]gr2;
  wire \gr2_reg_n_0_[10] ;
  wire \gr2_reg_n_0_[11] ;
  wire \gr2_reg_n_0_[4] ;
  wire \gr2_reg_n_0_[5] ;
  wire \gr2_reg_n_0_[6] ;
  wire \gr2_reg_n_0_[7] ;
  wire \gr2_reg_n_0_[8] ;
  wire \gr2_reg_n_0_[9] ;
  wire [11:4]gr3;
  wire \gr3_reg_n_0_[10] ;
  wire \gr3_reg_n_0_[11] ;
  wire \gr3_reg_n_0_[4] ;
  wire \gr3_reg_n_0_[5] ;
  wire \gr3_reg_n_0_[6] ;
  wire \gr3_reg_n_0_[7] ;
  wire \gr3_reg_n_0_[8] ;
  wire \gr3_reg_n_0_[9] ;
  wire [11:4]gr4;
  wire \gr4[11]_i_1_n_0 ;
  wire \gr4_reg_n_0_[10] ;
  wire \gr4_reg_n_0_[11] ;
  wire \gr4_reg_n_0_[4] ;
  wire \gr4_reg_n_0_[5] ;
  wire \gr4_reg_n_0_[6] ;
  wire \gr4_reg_n_0_[7] ;
  wire \gr4_reg_n_0_[8] ;
  wire \gr4_reg_n_0_[9] ;
  wire \gr[11]_i_1_n_0 ;
  wire grayToManyAXIS_tlast_sig_i_1_n_0;
  wire grayToManyAXIS_tvalid_sig;
  wire grayToManyAXIS_tvalid_sig_i_1_n_0;
  wire grayToManyAXIS_tvalid_sig_reg_0;
  wire [71:64]grayVideoinToManyAXIS_tdata;
  wire grayVideoinToManyAXIS_tlast;
  wire grayVideoinToManyAXIS_tvalid;
  wire [2:1]klm;
  wire \klm[0]_i_1_n_0 ;
  wire \klm[1]_i_1_n_0 ;
  wire \klm[2]_i_2_n_0 ;
  wire [0:0]\klm_reg[0]_0 ;
  wire myEvenAbuf_n_28;
  wire myEvenAbuf_n_29;
  wire myEvenAbuf_n_32;
  wire myEvenAbuf_n_33;
  wire myEvenAbuf_n_34;
  wire myEvenAbuf_n_35;
  wire myEvenAbuf_n_36;
  wire myEvenAbuf_n_37;
  wire myEvenAbuf_n_38;
  wire myEvenAbuf_n_39;
  wire myEvenAbuf_n_40;
  wire myOddbuf_n_0;
  wire myOddbuf_n_1;
  wire myOddbuf_n_2;
  wire myOddbuf_n_22;
  wire myOddbuf_n_23;
  wire myOddbuf_n_24;
  wire myOddbuf_n_25;
  wire myOddbuf_n_3;
  wire myOddbuf_n_4;
  wire myOddbuf_n_5;
  wire myOddbuf_n_6;
  wire myOddbuf_n_9;
  wire myRow0buf_n_0;
  wire myRow0buf_n_1;
  wire myRow0buf_n_2;
  wire myRow0buf_n_3;
  wire myRow0buf_n_4;
  wire myRow0buf_n_5;
  wire myRow0buf_n_6;
  wire myRow0buf_n_7;
  wire [3:0]nop;
  wire \nop[3]_i_1_n_0 ;
  wire \nop[3]_i_3_n_0 ;
  wire \nop_reg_n_0_[0] ;
  wire \nop_reg_n_0_[1] ;
  wire \nop_reg_n_0_[2] ;
  wire \nop_reg_n_0_[3] ;
  wire oddNotEven;
  wire oddNotEven_i_1_n_0;
  wire oddNotEven_reg_0;
  wire [11:0]p_0_in;
  wire [1:0]p_0_out;
  wire [2:0]p_0_out__0;
  wire [11:0]p_14_in;
  wire [3:2]p_1_in;
  wire [1:0]p_3_in;
  wire [1:0]p_3_out;
  wire [2:0]qrs;
  wire \qrs[2]_i_1_n_0 ;
  wire \qrs_reg_n_0_[0] ;
  wire \qrs_reg_n_0_[1] ;
  wire \qrs_reg_n_0_[2] ;
  wire [3:3]rawcolEgrstart;
  wire \rawcolEgrstart[3]_i_1_n_0 ;
  wire [11:0]rawcol_lcl;
  wire \rawcol_lcl[0]_i_1_n_0 ;
  wire \rawcol_lcl[10]_i_1_n_0 ;
  wire \rawcol_lcl[11]_i_1_n_0 ;
  wire \rawcol_lcl[11]_i_2_n_0 ;
  wire \rawcol_lcl[1]_i_1_n_0 ;
  wire \rawcol_lcl[2]_i_1_n_0 ;
  wire \rawcol_lcl[3]_i_1_n_0 ;
  wire \rawcol_lcl[4]_i_1_n_0 ;
  wire \rawcol_lcl[4]_i_2_n_0 ;
  wire \rawcol_lcl[5]_i_1_n_0 ;
  wire \rawcol_lcl[6]_i_1_n_0 ;
  wire \rawcol_lcl[6]_i_2_n_0 ;
  wire \rawcol_lcl[7]_i_1_n_0 ;
  wire \rawcol_lcl[8]_i_1_n_0 ;
  wire \rawcol_lcl[8]_i_2_n_0 ;
  wire \rawcol_lcl[9]_i_1_n_0 ;
  wire \rawcol_lcl[9]_i_2_n_0 ;
  wire [35:0]rgbToManyAXIS_tdata_sig;
  wire [35:0]\rgbToManyAXIS_tdata_sig_reg[35]_0 ;
  wire [7:0]\rgbToManyAXIS_tdata_sig_reg[7]_0 ;
  wire [0:0]\rgbToManyAXIS_tdata_sig_reg[7]_1 ;
  wire rgbToManyAXIS_tlast_sig_i_1_n_0;
  wire rgbToManyAXIS_tlast_sig_i_2_n_0;
  wire rgbToManyAXIS_tlast_sig_i_3_n_0;
  wire rgbToManyAXIS_tlast_sig_i_5_n_0;
  wire rgbToManyAXIS_tlast_sig_reg_0;
  wire rgbToManyAXIS_tvalid_sig_i_1_n_0;
  wire rgbVideoinToManyAXIS_tvalid;
  wire [2:0]stateGrayegr;
  wire [1:0]stateGraypack;
  wire \stateGraypack[0]_i_10_n_0 ;
  wire \stateGraypack[0]_i_1_n_0 ;
  wire \stateGraypack[0]_i_2_n_0 ;
  wire \stateGraypack[0]_i_3_n_0 ;
  wire \stateGraypack[0]_i_4_n_0 ;
  wire \stateGraypack[0]_i_5_n_0 ;
  wire \stateGraypack[0]_i_6_n_0 ;
  wire \stateGraypack[0]_i_7_n_0 ;
  wire \stateGraypack[0]_i_8_n_0 ;
  wire \stateGraypack[0]_i_9_n_0 ;
  wire \stateGraypack[1]_i_1_n_0 ;
  wire \stateGraypack[1]_i_2_n_0 ;
  wire \stateIgr[0]_i_2_n_0 ;
  wire [1:0]\stateIgr_reg[1]_0 ;
  wire [0:0]\stateIgr_reg[1]_1 ;
  wire strbEgrstart_i_1_n_0;
  wire strbEgrstart_i_2_n_0;
  wire strbEgrstart_i_3_n_0;
  wire strbEgrstart_i_4_n_0;
  wire strbEgrstart_reg_n_0;
  wire [1:0]tuv;
  wire \tuv[2]_i_1_n_0 ;
  wire \tuv[3]_i_1_n_0 ;
  wire \tuv_reg_n_0_[0] ;
  wire \tuv_reg_n_0_[1] ;
  wire \tuv_reg_n_0_[2] ;
  wire \tuv_reg_n_0_[3] ;
  wire [1:0]videoinStateIgr_dbg;
  wire [1:0]videoinStateRgbegr_dbg;

  LUT6 #(
    .INIT(64'h55555555C0CCDDDD)) 
    \FSM_sequential_stateGrayegr[0]_i_1 
       (.I0(oddNotEven_reg_0),
        .I1(stateGrayegr[1]),
        .I2(\FSM_sequential_stateGrayegr[2]_i_3_n_0 ),
        .I3(rgbVideoinToManyAXIS_tvalid),
        .I4(stateGrayegr[0]),
        .I5(stateGrayegr[2]),
        .O(p_0_out__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair2995" *) 
  LUT5 #(
    .INIT(32'h0000BFF0)) 
    \FSM_sequential_stateGrayegr[1]_i_1 
       (.I0(\FSM_sequential_stateGrayegr[2]_i_3_n_0 ),
        .I1(rgbVideoinToManyAXIS_tvalid),
        .I2(stateGrayegr[0]),
        .I3(stateGrayegr[1]),
        .I4(stateGrayegr[2]),
        .O(p_0_out__0[1]));
  LUT4 #(
    .INIT(16'h05FD)) 
    \FSM_sequential_stateGrayegr[2]_i_1 
       (.I0(stateGrayegr[0]),
        .I1(strbEgrstart_reg_n_0),
        .I2(stateGrayegr[1]),
        .I3(stateGrayegr[2]),
        .O(\FSM_sequential_stateGrayegr[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \FSM_sequential_stateGrayegr[2]_i_10 
       (.I0(\col_lcl_reg[4]__0_n_0 ),
        .I1(\col_lcl_reg[2]__0_n_0 ),
        .I2(\col_lcl_reg[1]__0_n_0 ),
        .I3(\col_lcl_reg[0]__0_n_0 ),
        .I4(\col_lcl_reg[3]__0_n_0 ),
        .O(\FSM_sequential_stateGrayegr[2]_i_10_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2995" *) 
  LUT5 #(
    .INIT(32'h00000080)) 
    \FSM_sequential_stateGrayegr[2]_i_2 
       (.I0(rgbVideoinToManyAXIS_tvalid),
        .I1(stateGrayegr[1]),
        .I2(stateGrayegr[0]),
        .I3(stateGrayegr[2]),
        .I4(\FSM_sequential_stateGrayegr[2]_i_3_n_0 ),
        .O(p_0_out__0[2]));
  LUT6 #(
    .INIT(64'hFFFFEFFEEFFEFFFF)) 
    \FSM_sequential_stateGrayegr[2]_i_3 
       (.I0(\FSM_sequential_stateGrayegr[2]_i_4_n_0 ),
        .I1(\FSM_sequential_stateGrayegr[2]_i_5_n_0 ),
        .I2(\FSM_sequential_stateGrayegr[2]_i_6_n_0 ),
        .I3(enRowbuf_reg_0[8]),
        .I4(\col_lcl[10]__0_i_2__0_n_0 ),
        .I5(enRowbuf_reg_0[10]),
        .O(\FSM_sequential_stateGrayegr[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h955555556AAAAAAA)) 
    \FSM_sequential_stateGrayegr[2]_i_4 
       (.I0(enRowbuf_reg_0[9]),
        .I1(\col_lcl_reg[8]__0_n_0 ),
        .I2(\col_lcl_reg[6]__0_n_0 ),
        .I3(\col_lcl[9]__0_i_2__0_n_0 ),
        .I4(\col_lcl_reg[7]__0_n_0 ),
        .I5(\col_lcl_reg[9]__0_n_0 ),
        .O(\FSM_sequential_stateGrayegr[2]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFEDFDFEFEFFDFDFE)) 
    \FSM_sequential_stateGrayegr[2]_i_5 
       (.I0(enRowbuf_reg_0[6]),
        .I1(\FSM_sequential_stateGrayegr[2]_i_7_n_0 ),
        .I2(\col_lcl_reg[7]__0_n_0 ),
        .I3(\col_lcl[9]__0_i_2__0_n_0 ),
        .I4(\col_lcl_reg[6]__0_n_0 ),
        .I5(enRowbuf_reg_0[7]),
        .O(\FSM_sequential_stateGrayegr[2]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2959" *) 
  LUT4 #(
    .INIT(16'h6AAA)) 
    \FSM_sequential_stateGrayegr[2]_i_6 
       (.I0(\col_lcl_reg[8]__0_n_0 ),
        .I1(\col_lcl_reg[6]__0_n_0 ),
        .I2(\col_lcl[9]__0_i_2__0_n_0 ),
        .I3(\col_lcl_reg[7]__0_n_0 ),
        .O(\FSM_sequential_stateGrayegr[2]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFF6FFFFFFFFFFF6)) 
    \FSM_sequential_stateGrayegr[2]_i_7 
       (.I0(\col_lcl[5]__0_i_2__0_n_0 ),
        .I1(enRowbuf_reg_0[5]),
        .I2(\FSM_sequential_stateGrayegr[2]_i_8_n_0 ),
        .I3(\FSM_sequential_stateGrayegr[2]_i_9_n_0 ),
        .I4(enRowbuf_reg_0[4]),
        .I5(\FSM_sequential_stateGrayegr[2]_i_10_n_0 ),
        .O(\FSM_sequential_stateGrayegr[2]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF6FF6F96FFFFF)) 
    \FSM_sequential_stateGrayegr[2]_i_8 
       (.I0(\col_lcl_reg[2]__0_n_0 ),
        .I1(enRowbuf_reg_0[2]),
        .I2(enRowbuf_reg_0[1]),
        .I3(\col_lcl_reg[1]__0_n_0 ),
        .I4(\col_lcl_reg[0]__0_n_0 ),
        .I5(enRowbuf_reg_0[0]),
        .O(\FSM_sequential_stateGrayegr[2]_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h95556AAA)) 
    \FSM_sequential_stateGrayegr[2]_i_9 
       (.I0(enRowbuf_reg_0[3]),
        .I1(\col_lcl_reg[2]__0_n_0 ),
        .I2(\col_lcl_reg[1]__0_n_0 ),
        .I3(\col_lcl_reg[0]__0_n_0 ),
        .I4(\col_lcl_reg[3]__0_n_0 ),
        .O(\FSM_sequential_stateGrayegr[2]_i_9_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:010,iSTATE0:011,iSTATE1:100,iSTATE2:000,iSTATE3:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateGrayegr_reg[0] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_stateGrayegr[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(p_0_out__0[0]),
        .Q(stateGrayegr[0]));
  (* FSM_ENCODED_STATES = "iSTATE:010,iSTATE0:011,iSTATE1:100,iSTATE2:000,iSTATE3:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateGrayegr_reg[1] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_stateGrayegr[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(p_0_out__0[1]),
        .Q(stateGrayegr[1]));
  (* FSM_ENCODED_STATES = "iSTATE:010,iSTATE0:011,iSTATE1:100,iSTATE2:000,iSTATE3:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateGrayegr_reg[2] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_stateGrayegr[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(p_0_out__0[2]),
        .Q(stateGrayegr[2]));
  (* SOFT_HLUTNM = "soft_lutpair2992" *) 
  LUT5 #(
    .INIT(32'h1D3FCC0F)) 
    \FSM_sequential_stateRgbegr[0]_i_1 
       (.I0(rgbToManyAXIS_tlast_sig_i_2_n_0),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I2(oddNotEven_reg_0),
        .I3(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I4(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .O(p_0_out[0]));
  (* SOFT_HLUTNM = "soft_lutpair3019" *) 
  LUT3 #(
    .INIT(8'h26)) 
    \FSM_sequential_stateRgbegr[1]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .O(p_0_out[1]));
  LUT4 #(
    .INIT(16'h0FFD)) 
    \FSM_sequential_stateRgbegr[2]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(strbEgrstart_reg_n_0),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I3(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .O(\FSM_sequential_stateRgbegr[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2958" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \FSM_sequential_stateRgbegr[2]_i_2 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .O(\FSM_sequential_stateRgbegr[2]_i_2_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:010,iSTATE0:011,iSTATE1:101,iSTATE2:100,iSTATE3:000,iSTATE4:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateRgbegr_reg[0] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_stateRgbegr[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(p_0_out[0]),
        .Q(\FSM_sequential_stateRgbegr_reg[2]_0 [0]));
  (* FSM_ENCODED_STATES = "iSTATE:010,iSTATE0:011,iSTATE1:101,iSTATE2:100,iSTATE3:000,iSTATE4:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateRgbegr_reg[1] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_stateRgbegr[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(p_0_out[1]),
        .Q(\FSM_sequential_stateRgbegr_reg[2]_0 [1]));
  (* FSM_ENCODED_STATES = "iSTATE:010,iSTATE0:011,iSTATE1:101,iSTATE2:100,iSTATE3:000,iSTATE4:001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_sequential_stateRgbegr_reg[2] 
       (.C(aclk_sig),
        .CE(\FSM_sequential_stateRgbegr[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\FSM_sequential_stateRgbegr[2]_i_2_n_0 ),
        .Q(\FSM_sequential_stateRgbegr_reg[2]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair3018" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \aEobufB[0]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\aEobufB_reg_n_0_[0] ),
        .O(\aEobufB[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2979" *) 
  LUT4 #(
    .INIT(16'h1400)) 
    \aEobufB[1]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\aEobufB_reg_n_0_[0] ),
        .I2(\aEobufB_reg_n_0_[1] ),
        .I3(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .O(\aEobufB[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2979" *) 
  LUT5 #(
    .INIT(32'h04404040)) 
    \aEobufB[2]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\aEobufB_reg_n_0_[2] ),
        .I3(\aEobufB_reg_n_0_[1] ),
        .I4(\aEobufB_reg_n_0_[0] ),
        .O(\aEobufB[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0440404040404040)) 
    \aEobufB[3]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\aEobufB_reg_n_0_[3] ),
        .I3(\aEobufB_reg_n_0_[2] ),
        .I4(\aEobufB_reg_n_0_[0] ),
        .I5(\aEobufB_reg_n_0_[1] ),
        .O(\aEobufB[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3018" *) 
  LUT4 #(
    .INIT(16'h0440)) 
    \aEobufB[4]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\aEobufB_reg_n_0_[4] ),
        .I3(\aEobufB[4]_i_2_n_0 ),
        .O(\aEobufB[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2978" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \aEobufB[4]_i_2 
       (.I0(\aEobufB_reg_n_0_[2] ),
        .I1(\aEobufB_reg_n_0_[0] ),
        .I2(\aEobufB_reg_n_0_[1] ),
        .I3(\aEobufB_reg_n_0_[3] ),
        .O(\aEobufB[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3019" *) 
  LUT4 #(
    .INIT(16'h0440)) 
    \aEobufB[5]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\aEobufB_reg_n_0_[5] ),
        .I3(\aEobufB[5]_i_2_n_0 ),
        .O(\aEobufB[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2978" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \aEobufB[5]_i_2 
       (.I0(\aEobufB_reg_n_0_[3] ),
        .I1(\aEobufB_reg_n_0_[1] ),
        .I2(\aEobufB_reg_n_0_[0] ),
        .I3(\aEobufB_reg_n_0_[2] ),
        .I4(\aEobufB_reg_n_0_[4] ),
        .O(\aEobufB[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2976" *) 
  LUT4 #(
    .INIT(16'h0440)) 
    \aEobufB[6]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\aEobufB_reg_n_0_[6] ),
        .I3(\aEobufB[8]_i_2_n_0 ),
        .O(\aEobufB[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2976" *) 
  LUT5 #(
    .INIT(32'h04404040)) 
    \aEobufB[7]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\aEobufB_reg_n_0_[7] ),
        .I3(\aEobufB_reg_n_0_[6] ),
        .I4(\aEobufB[8]_i_2_n_0 ),
        .O(\aEobufB[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1444444400000000)) 
    \aEobufB[8]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\aEobufB_reg_n_0_[8] ),
        .I2(\aEobufB_reg_n_0_[7] ),
        .I3(\aEobufB[8]_i_2_n_0 ),
        .I4(\aEobufB_reg_n_0_[6] ),
        .I5(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .O(\aEobufB[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aEobufB[8]_i_2 
       (.I0(\aEobufB_reg_n_0_[4] ),
        .I1(\aEobufB_reg_n_0_[2] ),
        .I2(\aEobufB_reg_n_0_[0] ),
        .I3(\aEobufB_reg_n_0_[1] ),
        .I4(\aEobufB_reg_n_0_[3] ),
        .I5(\aEobufB_reg_n_0_[5] ),
        .O(\aEobufB[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF9200)) 
    \aEobufB[9]_i_1 
       (.I0(\qrs_reg_n_0_[2] ),
        .I1(\qrs_reg_n_0_[1] ),
        .I2(\qrs_reg_n_0_[0] ),
        .I3(\aEobufB[9]_i_3_n_0 ),
        .I4(\aEobufB[9]_i_4_n_0 ),
        .I5(\aEobufB[9]_i_5_n_0 ),
        .O(\aEobufB[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2977" *) 
  LUT5 #(
    .INIT(32'h04404040)) 
    \aEobufB[9]_i_2 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\aEobufB_reg_n_0_[9] ),
        .I3(\aEobufB[9]_i_6_n_0 ),
        .I4(\aEobufB_reg_n_0_[8] ),
        .O(\aEobufB[9]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2977" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \aEobufB[9]_i_3 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .O(\aEobufB[9]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2992" *) 
  LUT4 #(
    .INIT(16'h0010)) 
    \aEobufB[9]_i_4 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I3(oddNotEven_reg_0),
        .O(\aEobufB[9]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3040" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \aEobufB[9]_i_5 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .O(\aEobufB[9]_i_5_n_0 ));
  LUT3 #(
    .INIT(8'h80)) 
    \aEobufB[9]_i_6 
       (.I0(\aEobufB_reg_n_0_[6] ),
        .I1(\aEobufB[8]_i_2_n_0 ),
        .I2(\aEobufB_reg_n_0_[7] ),
        .O(\aEobufB[9]_i_6_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobufB_reg[0] 
       (.C(aclk_sig),
        .CE(\aEobufB[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobufB[0]_i_1_n_0 ),
        .Q(\aEobufB_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobufB_reg[1] 
       (.C(aclk_sig),
        .CE(\aEobufB[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobufB[1]_i_1_n_0 ),
        .Q(\aEobufB_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobufB_reg[2] 
       (.C(aclk_sig),
        .CE(\aEobufB[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobufB[2]_i_1_n_0 ),
        .Q(\aEobufB_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobufB_reg[3] 
       (.C(aclk_sig),
        .CE(\aEobufB[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobufB[3]_i_1_n_0 ),
        .Q(\aEobufB_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobufB_reg[4] 
       (.C(aclk_sig),
        .CE(\aEobufB[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobufB[4]_i_1_n_0 ),
        .Q(\aEobufB_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobufB_reg[5] 
       (.C(aclk_sig),
        .CE(\aEobufB[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobufB[5]_i_1_n_0 ),
        .Q(\aEobufB_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobufB_reg[6] 
       (.C(aclk_sig),
        .CE(\aEobufB[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobufB[6]_i_1_n_0 ),
        .Q(\aEobufB_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobufB_reg[7] 
       (.C(aclk_sig),
        .CE(\aEobufB[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobufB[7]_i_1_n_0 ),
        .Q(\aEobufB_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobufB_reg[8] 
       (.C(aclk_sig),
        .CE(\aEobufB[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobufB[8]_i_1_n_0 ),
        .Q(\aEobufB_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobufB_reg[9] 
       (.C(aclk_sig),
        .CE(\aEobufB[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobufB[9]_i_2_n_0 ),
        .Q(\aEobufB_reg_n_0_[9] ));
  LUT3 #(
    .INIT(8'h06)) 
    \aEobuf[0]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\aEobuf_reg_n_0_[0] ),
        .O(\aEobuf[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3002" *) 
  LUT4 #(
    .INIT(16'h0660)) 
    \aEobuf[1]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\aEobuf_reg_n_0_[0] ),
        .I3(\aEobuf_reg_n_0_[1] ),
        .O(\aEobuf[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3002" *) 
  LUT5 #(
    .INIT(32'h06666000)) 
    \aEobuf[2]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\aEobuf_reg_n_0_[1] ),
        .I3(\aEobuf_reg_n_0_[0] ),
        .I4(\aEobuf_reg_n_0_[2] ),
        .O(\aEobuf[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0666666660000000)) 
    \aEobuf[3]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\aEobuf_reg_n_0_[0] ),
        .I3(\aEobuf_reg_n_0_[1] ),
        .I4(\aEobuf_reg_n_0_[2] ),
        .I5(\aEobuf_reg_n_0_[3] ),
        .O(\aEobuf[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \aEobuf[4]_i_1 
       (.I0(\aEobuf[9]_i_4_n_0 ),
        .I1(\aEobuf_reg_n_0_[2] ),
        .I2(\aEobuf_reg_n_0_[1] ),
        .I3(\aEobuf_reg_n_0_[0] ),
        .I4(\aEobuf_reg_n_0_[3] ),
        .I5(\aEobuf_reg_n_0_[4] ),
        .O(\aEobuf[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3033" *) 
  LUT4 #(
    .INIT(16'h0660)) 
    \aEobuf[5]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\aEobuf[5]_i_2_n_0 ),
        .I3(\aEobuf_reg_n_0_[5] ),
        .O(\aEobuf[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aEobuf[5]_i_2 
       (.I0(\aEobuf_reg_n_0_[3] ),
        .I1(\aEobuf_reg_n_0_[0] ),
        .I2(\aEobuf_reg_n_0_[1] ),
        .I3(\aEobuf_reg_n_0_[2] ),
        .I4(\aEobuf_reg_n_0_[4] ),
        .O(\aEobuf[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3003" *) 
  LUT4 #(
    .INIT(16'h0660)) 
    \aEobuf[6]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\aEobuf[9]_i_5_n_0 ),
        .I3(\aEobuf_reg_n_0_[6] ),
        .O(\aEobuf[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3003" *) 
  LUT5 #(
    .INIT(32'h06666000)) 
    \aEobuf[7]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\aEobuf[9]_i_5_n_0 ),
        .I3(\aEobuf_reg_n_0_[6] ),
        .I4(\aEobuf_reg_n_0_[7] ),
        .O(\aEobuf[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0666666660000000)) 
    \aEobuf[8]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\aEobuf_reg_n_0_[6] ),
        .I3(\aEobuf[9]_i_5_n_0 ),
        .I4(\aEobuf_reg_n_0_[7] ),
        .I5(\aEobuf_reg_n_0_[8] ),
        .O(\aEobuf[8]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h55FD0088)) 
    \aEobuf[9]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(camifToVideoinAXIS_tvalid),
        .I3(oddNotEven_reg_0),
        .I4(\aEobuf[9]_i_3_n_0 ),
        .O(\aEobuf[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \aEobuf[9]_i_2 
       (.I0(\aEobuf[9]_i_4_n_0 ),
        .I1(\aEobuf_reg_n_0_[8] ),
        .I2(\aEobuf_reg_n_0_[7] ),
        .I3(\aEobuf[9]_i_5_n_0 ),
        .I4(\aEobuf_reg_n_0_[6] ),
        .I5(\aEobuf_reg_n_0_[9] ),
        .O(\aEobuf[9]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0101FF01FF010155)) 
    \aEobuf[9]_i_3 
       (.I0(\aEobuf[9]_i_6_n_0 ),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(\stateIgr_reg[1]_0 [1]),
        .I3(klm[1]),
        .I4(\klm_reg[0]_0 ),
        .I5(klm[2]),
        .O(\aEobuf[9]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2973" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \aEobuf[9]_i_4 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .O(\aEobuf[9]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aEobuf[9]_i_5 
       (.I0(\aEobuf_reg_n_0_[4] ),
        .I1(\aEobuf_reg_n_0_[2] ),
        .I2(\aEobuf_reg_n_0_[1] ),
        .I3(\aEobuf_reg_n_0_[0] ),
        .I4(\aEobuf_reg_n_0_[3] ),
        .I5(\aEobuf_reg_n_0_[5] ),
        .O(\aEobuf[9]_i_5_n_0 ));
  LUT5 #(
    .INIT(32'h00000008)) 
    \aEobuf[9]_i_6 
       (.I0(strbEgrstart_i_3_n_0),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(rawcol_lcl[3]),
        .I3(rawcol_lcl[2]),
        .I4(strbEgrstart_i_4_n_0),
        .O(\aEobuf[9]_i_6_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobuf_reg[0] 
       (.C(aclk_sig),
        .CE(\aEobuf[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobuf[0]_i_1_n_0 ),
        .Q(\aEobuf_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobuf_reg[1] 
       (.C(aclk_sig),
        .CE(\aEobuf[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobuf[1]_i_1_n_0 ),
        .Q(\aEobuf_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobuf_reg[2] 
       (.C(aclk_sig),
        .CE(\aEobuf[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobuf[2]_i_1_n_0 ),
        .Q(\aEobuf_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobuf_reg[3] 
       (.C(aclk_sig),
        .CE(\aEobuf[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobuf[3]_i_1_n_0 ),
        .Q(\aEobuf_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobuf_reg[4] 
       (.C(aclk_sig),
        .CE(\aEobuf[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobuf[4]_i_1_n_0 ),
        .Q(\aEobuf_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobuf_reg[5] 
       (.C(aclk_sig),
        .CE(\aEobuf[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobuf[5]_i_1_n_0 ),
        .Q(\aEobuf_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobuf_reg[6] 
       (.C(aclk_sig),
        .CE(\aEobuf[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobuf[6]_i_1_n_0 ),
        .Q(\aEobuf_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobuf_reg[7] 
       (.C(aclk_sig),
        .CE(\aEobuf[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobuf[7]_i_1_n_0 ),
        .Q(\aEobuf_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobuf_reg[8] 
       (.C(aclk_sig),
        .CE(\aEobuf[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobuf[8]_i_1_n_0 ),
        .Q(\aEobuf_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \aEobuf_reg[9] 
       (.C(aclk_sig),
        .CE(\aEobuf[9]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aEobuf[9]_i_2_n_0 ),
        .Q(\aEobuf_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair3020" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \aRowbufB[0]_i_1 
       (.I0(stateGrayegr[2]),
        .I1(stateGrayegr[1]),
        .I2(\aRowbufB_reg_n_0_[0] ),
        .O(\aRowbufB[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2983" *) 
  LUT4 #(
    .INIT(16'h1400)) 
    \aRowbufB[1]_i_1 
       (.I0(stateGrayegr[2]),
        .I1(\aRowbufB_reg_n_0_[0] ),
        .I2(\aRowbufB_reg_n_0_[1] ),
        .I3(stateGrayegr[1]),
        .O(\aRowbufB[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2983" *) 
  LUT5 #(
    .INIT(32'h04404040)) 
    \aRowbufB[2]_i_1 
       (.I0(stateGrayegr[2]),
        .I1(stateGrayegr[1]),
        .I2(\aRowbufB_reg_n_0_[2] ),
        .I3(\aRowbufB_reg_n_0_[1] ),
        .I4(\aRowbufB_reg_n_0_[0] ),
        .O(\aRowbufB[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0440404040404040)) 
    \aRowbufB[3]_i_1 
       (.I0(stateGrayegr[2]),
        .I1(stateGrayegr[1]),
        .I2(\aRowbufB_reg_n_0_[3] ),
        .I3(\aRowbufB_reg_n_0_[2] ),
        .I4(\aRowbufB_reg_n_0_[0] ),
        .I5(\aRowbufB_reg_n_0_[1] ),
        .O(\aRowbufB[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3020" *) 
  LUT4 #(
    .INIT(16'h0440)) 
    \aRowbufB[4]_i_1 
       (.I0(stateGrayegr[2]),
        .I1(stateGrayegr[1]),
        .I2(\aRowbufB_reg_n_0_[4] ),
        .I3(\aRowbufB[4]_i_2_n_0 ),
        .O(\aRowbufB[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2982" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \aRowbufB[4]_i_2 
       (.I0(\aRowbufB_reg_n_0_[2] ),
        .I1(\aRowbufB_reg_n_0_[0] ),
        .I2(\aRowbufB_reg_n_0_[1] ),
        .I3(\aRowbufB_reg_n_0_[3] ),
        .O(\aRowbufB[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3021" *) 
  LUT4 #(
    .INIT(16'h0440)) 
    \aRowbufB[5]_i_1 
       (.I0(stateGrayegr[2]),
        .I1(stateGrayegr[1]),
        .I2(\aRowbufB_reg_n_0_[5] ),
        .I3(\aRowbufB[5]_i_2_n_0 ),
        .O(\aRowbufB[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2982" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \aRowbufB[5]_i_2 
       (.I0(\aRowbufB_reg_n_0_[3] ),
        .I1(\aRowbufB_reg_n_0_[1] ),
        .I2(\aRowbufB_reg_n_0_[0] ),
        .I3(\aRowbufB_reg_n_0_[2] ),
        .I4(\aRowbufB_reg_n_0_[4] ),
        .O(\aRowbufB[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2981" *) 
  LUT4 #(
    .INIT(16'h0440)) 
    \aRowbufB[6]_i_1 
       (.I0(stateGrayegr[2]),
        .I1(stateGrayegr[1]),
        .I2(\aRowbufB_reg_n_0_[6] ),
        .I3(\aRowbufB[8]_i_4_n_0 ),
        .O(\aRowbufB[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2981" *) 
  LUT5 #(
    .INIT(32'h14440000)) 
    \aRowbufB[7]_i_1 
       (.I0(stateGrayegr[2]),
        .I1(\aRowbufB_reg_n_0_[7] ),
        .I2(\aRowbufB_reg_n_0_[6] ),
        .I3(\aRowbufB[8]_i_4_n_0 ),
        .I4(stateGrayegr[1]),
        .O(\aRowbufB[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0300000003035353)) 
    \aRowbufB[8]_i_1 
       (.I0(oddNotEven_reg_0),
        .I1(\aRowbufB[8]_i_3_n_0 ),
        .I2(stateGrayegr[2]),
        .I3(rgbVideoinToManyAXIS_tvalid),
        .I4(stateGrayegr[1]),
        .I5(stateGrayegr[0]),
        .O(\aRowbufB[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0440404040404040)) 
    \aRowbufB[8]_i_2 
       (.I0(stateGrayegr[2]),
        .I1(stateGrayegr[1]),
        .I2(\aRowbufB_reg_n_0_[8] ),
        .I3(\aRowbufB[8]_i_4_n_0 ),
        .I4(\aRowbufB_reg_n_0_[6] ),
        .I5(\aRowbufB_reg_n_0_[7] ),
        .O(\aRowbufB[8]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h2AA2A8AA)) 
    \aRowbufB[8]_i_3 
       (.I0(stateGrayegr[0]),
        .I1(\nop_reg_n_0_[0] ),
        .I2(\nop_reg_n_0_[1] ),
        .I3(\nop_reg_n_0_[2] ),
        .I4(\nop_reg_n_0_[3] ),
        .O(\aRowbufB[8]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aRowbufB[8]_i_4 
       (.I0(\aRowbufB_reg_n_0_[4] ),
        .I1(\aRowbufB_reg_n_0_[2] ),
        .I2(\aRowbufB_reg_n_0_[0] ),
        .I3(\aRowbufB_reg_n_0_[1] ),
        .I4(\aRowbufB_reg_n_0_[3] ),
        .I5(\aRowbufB_reg_n_0_[5] ),
        .O(\aRowbufB[8]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\aRowbufB[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbufB[0]_i_1_n_0 ),
        .Q(\aRowbufB_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\aRowbufB[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbufB[1]_i_1_n_0 ),
        .Q(\aRowbufB_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\aRowbufB[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbufB[2]_i_1_n_0 ),
        .Q(\aRowbufB_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufB_reg[3] 
       (.C(aclk_sig),
        .CE(\aRowbufB[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbufB[3]_i_1_n_0 ),
        .Q(\aRowbufB_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufB_reg[4] 
       (.C(aclk_sig),
        .CE(\aRowbufB[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbufB[4]_i_1_n_0 ),
        .Q(\aRowbufB_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufB_reg[5] 
       (.C(aclk_sig),
        .CE(\aRowbufB[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbufB[5]_i_1_n_0 ),
        .Q(\aRowbufB_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufB_reg[6] 
       (.C(aclk_sig),
        .CE(\aRowbufB[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbufB[6]_i_1_n_0 ),
        .Q(\aRowbufB_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufB_reg[7] 
       (.C(aclk_sig),
        .CE(\aRowbufB[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbufB[7]_i_1_n_0 ),
        .Q(\aRowbufB_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbufB_reg[8] 
       (.C(aclk_sig),
        .CE(\aRowbufB[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbufB[8]_i_2_n_0 ),
        .Q(\aRowbufB_reg_n_0_[8] ));
  (* SOFT_HLUTNM = "soft_lutpair3051" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \aRowbuf[0]_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\aRowbuf_reg_n_0_[0] ),
        .O(aRowbuf));
  (* SOFT_HLUTNM = "soft_lutpair2986" *) 
  LUT4 #(
    .INIT(16'h1400)) 
    \aRowbuf[1]_i_1 
       (.I0(stateGraypack[0]),
        .I1(\aRowbuf_reg_n_0_[0] ),
        .I2(\aRowbuf_reg_n_0_[1] ),
        .I3(stateGraypack[1]),
        .O(\aRowbuf[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2986" *) 
  LUT5 #(
    .INIT(32'h04404040)) 
    \aRowbuf[2]_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\aRowbuf_reg_n_0_[2] ),
        .I3(\aRowbuf_reg_n_0_[1] ),
        .I4(\aRowbuf_reg_n_0_[0] ),
        .O(\aRowbuf[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0440404040404040)) 
    \aRowbuf[3]_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\aRowbuf_reg_n_0_[3] ),
        .I3(\aRowbuf_reg_n_0_[2] ),
        .I4(\aRowbuf_reg_n_0_[0] ),
        .I5(\aRowbuf_reg_n_0_[1] ),
        .O(\aRowbuf[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3022" *) 
  LUT4 #(
    .INIT(16'h0440)) 
    \aRowbuf[4]_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\aRowbuf_reg_n_0_[4] ),
        .I3(\aRowbuf[4]_i_2_n_0 ),
        .O(\aRowbuf[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2985" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \aRowbuf[4]_i_2 
       (.I0(\aRowbuf_reg_n_0_[2] ),
        .I1(\aRowbuf_reg_n_0_[0] ),
        .I2(\aRowbuf_reg_n_0_[1] ),
        .I3(\aRowbuf_reg_n_0_[3] ),
        .O(\aRowbuf[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3023" *) 
  LUT4 #(
    .INIT(16'h0440)) 
    \aRowbuf[5]_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\aRowbuf_reg_n_0_[5] ),
        .I3(\aRowbuf[5]_i_2_n_0 ),
        .O(\aRowbuf[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2985" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \aRowbuf[5]_i_2 
       (.I0(\aRowbuf_reg_n_0_[3] ),
        .I1(\aRowbuf_reg_n_0_[1] ),
        .I2(\aRowbuf_reg_n_0_[0] ),
        .I3(\aRowbuf_reg_n_0_[2] ),
        .I4(\aRowbuf_reg_n_0_[4] ),
        .O(\aRowbuf[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2984" *) 
  LUT4 #(
    .INIT(16'h0440)) 
    \aRowbuf[6]_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\aRowbuf_reg_n_0_[6] ),
        .I3(\aRowbuf[8]_i_5_n_0 ),
        .O(\aRowbuf[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2984" *) 
  LUT5 #(
    .INIT(32'h14440000)) 
    \aRowbuf[7]_i_1 
       (.I0(stateGraypack[0]),
        .I1(\aRowbuf_reg_n_0_[7] ),
        .I2(\aRowbuf_reg_n_0_[6] ),
        .I3(\aRowbuf[8]_i_5_n_0 ),
        .I4(stateGraypack[1]),
        .O(\aRowbuf[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF25FF25252525)) 
    \aRowbuf[8]_i_1 
       (.I0(stateGraypack[0]),
        .I1(oddNotEven_reg_0),
        .I2(stateGraypack[1]),
        .I3(\stateGraypack[0]_i_2_n_0 ),
        .I4(\aRowbuf[8]_i_3_n_0 ),
        .I5(\aRowbuf[8]_i_4_n_0 ),
        .O(\aRowbuf[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0440404040404040)) 
    \aRowbuf[8]_i_2 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\aRowbuf_reg_n_0_[8] ),
        .I3(\aRowbuf[8]_i_5_n_0 ),
        .I4(\aRowbuf_reg_n_0_[6] ),
        .I5(\aRowbuf_reg_n_0_[7] ),
        .O(\aRowbuf[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFFFFFFFFFB)) 
    \aRowbuf[8]_i_3 
       (.I0(\col_lcl_reg[9]__1_n_0 ),
        .I1(\aRowbuf[8]_i_6_n_0 ),
        .I2(\col_lcl_reg[6]__1_n_0 ),
        .I3(\col_lcl[8]__1_i_2_n_0 ),
        .I4(\col_lcl_reg[7]__1_n_0 ),
        .I5(\col_lcl_reg[8]__1_n_0 ),
        .O(\aRowbuf[8]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0400000000004004)) 
    \aRowbuf[8]_i_4 
       (.I0(stateGraypack[0]),
        .I1(rgbVideoinToManyAXIS_tvalid),
        .I2(\tuv_reg_n_0_[2] ),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(\tuv_reg_n_0_[0] ),
        .I5(\tuv_reg_n_0_[3] ),
        .O(\aRowbuf[8]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aRowbuf[8]_i_5 
       (.I0(\aRowbuf_reg_n_0_[4] ),
        .I1(\aRowbuf_reg_n_0_[2] ),
        .I2(\aRowbuf_reg_n_0_[0] ),
        .I3(\aRowbuf_reg_n_0_[1] ),
        .I4(\aRowbuf_reg_n_0_[3] ),
        .I5(\aRowbuf_reg_n_0_[5] ),
        .O(\aRowbuf[8]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0000000045555155)) 
    \aRowbuf[8]_i_6 
       (.I0(\aRowbuf[8]_i_7_n_0 ),
        .I1(\tuv_reg_n_0_[2] ),
        .I2(\tuv_reg_n_0_[0] ),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(\tuv_reg_n_0_[3] ),
        .I5(\col_lcl[5]__1_i_2_n_0 ),
        .O(\aRowbuf[8]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3000" *) 
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \aRowbuf[8]_i_7 
       (.I0(\col_lcl_reg[1]__1_n_0 ),
        .I1(\col_lcl_reg[0]__1_n_0 ),
        .I2(\col_lcl_reg[3]__1_n_0 ),
        .I3(\col_lcl_reg[4]__1_n_0 ),
        .I4(\col_lcl_reg[2]__1_n_0 ),
        .O(\aRowbuf[8]_i_7_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\aRowbuf[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(aRowbuf),
        .Q(\aRowbuf_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\aRowbuf[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbuf[1]_i_1_n_0 ),
        .Q(\aRowbuf_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\aRowbuf[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbuf[2]_i_1_n_0 ),
        .Q(\aRowbuf_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\aRowbuf[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbuf[3]_i_1_n_0 ),
        .Q(\aRowbuf_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\aRowbuf[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbuf[4]_i_1_n_0 ),
        .Q(\aRowbuf_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\aRowbuf[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbuf[5]_i_1_n_0 ),
        .Q(\aRowbuf_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\aRowbuf[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbuf[6]_i_1_n_0 ),
        .Q(\aRowbuf_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\aRowbuf[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbuf[7]_i_1_n_0 ),
        .Q(\aRowbuf_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aRowbuf_reg[8] 
       (.C(aclk_sig),
        .CE(\aRowbuf[8]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\aRowbuf[8]_i_2_n_0 ),
        .Q(\aRowbuf_reg_n_0_[8] ));
  (* SOFT_HLUTNM = "soft_lutpair3024" *) 
  LUT4 #(
    .INIT(16'h080A)) 
    \abcde[0]_i_1__0 
       (.I0(stateGrayegr[2]),
        .I1(\abcde_reg_n_0_[1] ),
        .I2(\abcde_reg_n_0_[0] ),
        .I3(\abcde_reg_n_0_[2] ),
        .O(\abcde[0]_i_1__0_n_0 ));
  LUT3 #(
    .INIT(8'h60)) 
    \abcde[1]_i_1__0 
       (.I0(\abcde_reg_n_0_[1] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(stateGrayegr[2]),
        .O(abcde));
  LUT4 #(
    .INIT(16'h0103)) 
    \abcde[2]_i_1__0 
       (.I0(oddNotEven_reg_0),
        .I1(stateGrayegr[1]),
        .I2(stateGrayegr[0]),
        .I3(stateGrayegr[2]),
        .O(\abcde[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3024" *) 
  LUT4 #(
    .INIT(16'h2880)) 
    \abcde[2]_i_2__0 
       (.I0(stateGrayegr[2]),
        .I1(\abcde_reg_n_0_[2] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[0] ),
        .O(\abcde[2]_i_2__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \abcde_reg[0] 
       (.C(aclk_sig),
        .CE(\abcde[2]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\abcde[0]_i_1__0_n_0 ),
        .Q(\abcde_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \abcde_reg[1] 
       (.C(aclk_sig),
        .CE(\abcde[2]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(abcde),
        .Q(\abcde_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \abcde_reg[2] 
       (.C(aclk_sig),
        .CE(\abcde[2]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\abcde[2]_i_2__0_n_0 ),
        .Q(\abcde_reg_n_0_[2] ));
  LUT3 #(
    .INIT(8'hB8)) 
    \acc0_lcl[15]_i_3 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35]_0 [11]),
        .I1(enAccbuf_reg),
        .I2(\abcde_reg[0]_0 [7]),
        .O(DI[3]));
  LUT3 #(
    .INIT(8'hB8)) 
    \acc0_lcl[15]_i_4 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35]_0 [10]),
        .I1(enAccbuf_reg),
        .I2(\abcde_reg[0]_0 [6]),
        .O(DI[2]));
  LUT3 #(
    .INIT(8'hB8)) 
    \acc0_lcl[15]_i_5 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35]_0 [9]),
        .I1(enAccbuf_reg),
        .I2(\abcde_reg[0]_0 [5]),
        .O(DI[1]));
  LUT3 #(
    .INIT(8'hB8)) 
    \acc0_lcl[15]_i_6 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35]_0 [8]),
        .I1(enAccbuf_reg),
        .I2(\abcde_reg[0]_0 [4]),
        .O(DI[0]));
  LUT6 #(
    .INIT(64'hFFFF000002AA02AA)) 
    \acc0_lcl[7]_i_10 
       (.I0(p_14_in[0]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[35]_0 [0]),
        .I5(enAccbuf_reg),
        .O(\rgbToManyAXIS_tdata_sig_reg[7]_0 [0]));
  LUT3 #(
    .INIT(8'hB8)) 
    \acc0_lcl[7]_i_3 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35]_0 [7]),
        .I1(enAccbuf_reg),
        .I2(\abcde_reg[0]_0 [3]),
        .O(\rgbToManyAXIS_tdata_sig_reg[7]_0 [7]));
  LUT3 #(
    .INIT(8'hB8)) 
    \acc0_lcl[7]_i_4 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35]_0 [6]),
        .I1(enAccbuf_reg),
        .I2(\abcde_reg[0]_0 [2]),
        .O(\rgbToManyAXIS_tdata_sig_reg[7]_0 [6]));
  LUT3 #(
    .INIT(8'hB8)) 
    \acc0_lcl[7]_i_5 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35]_0 [5]),
        .I1(enAccbuf_reg),
        .I2(\abcde_reg[0]_0 [1]),
        .O(\rgbToManyAXIS_tdata_sig_reg[7]_0 [5]));
  LUT3 #(
    .INIT(8'hB8)) 
    \acc0_lcl[7]_i_6 
       (.I0(\rgbToManyAXIS_tdata_sig_reg[35]_0 [4]),
        .I1(enAccbuf_reg),
        .I2(\abcde_reg[0]_0 [0]),
        .O(\rgbToManyAXIS_tdata_sig_reg[7]_0 [4]));
  LUT6 #(
    .INIT(64'hFFFF000002AA02AA)) 
    \acc0_lcl[7]_i_7 
       (.I0(p_14_in[3]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[35]_0 [3]),
        .I5(enAccbuf_reg),
        .O(\rgbToManyAXIS_tdata_sig_reg[7]_0 [3]));
  LUT6 #(
    .INIT(64'hFFFF000002AA02AA)) 
    \acc0_lcl[7]_i_8 
       (.I0(p_14_in[2]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[35]_0 [2]),
        .I5(enAccbuf_reg),
        .O(\rgbToManyAXIS_tdata_sig_reg[7]_0 [2]));
  LUT6 #(
    .INIT(64'hFFFF000002AA02AA)) 
    \acc0_lcl[7]_i_9 
       (.I0(p_14_in[1]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .I4(\rgbToManyAXIS_tdata_sig_reg[35]_0 [1]),
        .I5(enAccbuf_reg),
        .O(\rgbToManyAXIS_tdata_sig_reg[7]_0 [1]));
  (* ADDER_THRESHOLD = "35" *) 
  (* METHODOLOGY_DRC_VIOS = "{SYNTH-8 {cell *THIS*}}" *) 
  CARRY8 \acc0_lcl_reg[7]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\rgbToManyAXIS_tdata_sig_reg[7]_1 ,\acc0_lcl_reg[7]_i_2_n_1 ,\acc0_lcl_reg[7]_i_2_n_2 ,\acc0_lcl_reg[7]_i_2_n_3 ,\acc0_lcl_reg[7]_i_2_n_4 ,\acc0_lcl_reg[7]_i_2_n_5 ,\acc0_lcl_reg[7]_i_2_n_6 ,\acc0_lcl_reg[7]_i_2_n_7 }),
        .DI(\rgbToManyAXIS_tdata_sig_reg[7]_0 ),
        .O(O),
        .S(\dwrAccbuf_reg[7] ));
  (* SOFT_HLUTNM = "soft_lutpair3026" *) 
  LUT4 #(
    .INIT(16'hE200)) 
    \acc2[19]_i_2 
       (.I0(grayVideoinToManyAXIS_tvalid),
        .I1(enAccbuf_reg),
        .I2(rgbVideoinToManyAXIS_tvalid),
        .I3(enAccbuf0),
        .O(grayToManyAXIS_tvalid_sig_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair2998" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \col_lcl[0]__0_i_1__0 
       (.I0(stateGrayegr[1]),
        .I1(stateGrayegr[0]),
        .I2(stateGrayegr[2]),
        .I3(\col_lcl_reg[0]__0_n_0 ),
        .O(\col_lcl[0]__0_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3052" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \col_lcl[0]__1_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\col_lcl_reg[0]__1_n_0 ),
        .O(col_lcl[0]));
  (* SOFT_HLUTNM = "soft_lutpair2993" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \col_lcl[0]_i_1__1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I3(Q[0]),
        .O(\col_lcl[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3016" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \col_lcl[10]__0_i_1__0 
       (.I0(stateGrayegr[1]),
        .I1(stateGrayegr[0]),
        .I2(stateGrayegr[2]),
        .I3(\col_lcl[10]__0_i_2__0_n_0 ),
        .O(\col_lcl[10]__0_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h9555555555555555)) 
    \col_lcl[10]__0_i_2__0 
       (.I0(\col_lcl_reg[10]__0_n_0 ),
        .I1(\col_lcl_reg[8]__0_n_0 ),
        .I2(\col_lcl_reg[6]__0_n_0 ),
        .I3(\col_lcl[9]__0_i_2__0_n_0 ),
        .I4(\col_lcl_reg[7]__0_n_0 ),
        .I5(\col_lcl_reg[9]__0_n_0 ),
        .O(\col_lcl[10]__0_i_2__0_n_0 ));
  LUT4 #(
    .INIT(16'h0CBB)) 
    \col_lcl[10]__1_i_1 
       (.I0(rgbVideoinToManyAXIS_tvalid),
        .I1(stateGraypack[1]),
        .I2(oddNotEven_reg_0),
        .I3(stateGraypack[0]),
        .O(\col_lcl[10]__1_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3051" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \col_lcl[10]__1_i_2 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\stateGraypack[0]_i_2_n_0 ),
        .O(col_lcl[10]));
  (* SOFT_HLUTNM = "soft_lutpair3015" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \col_lcl[10]_i_1__1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I3(\col_lcl[10]_i_2__1_n_0 ),
        .O(\col_lcl[10]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h9555555555555555)) 
    \col_lcl[10]_i_2__1 
       (.I0(\col_lcl_reg_n_0_[10] ),
        .I1(\col_lcl_reg_n_0_[8] ),
        .I2(Q[3]),
        .I3(\col_lcl_reg[5]_0 ),
        .I4(Q[4]),
        .I5(\col_lcl_reg_n_0_[9] ),
        .O(\col_lcl[10]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2998" *) 
  LUT5 #(
    .INIT(32'h00080800)) 
    \col_lcl[1]__0_i_1__0 
       (.I0(stateGrayegr[1]),
        .I1(stateGrayegr[0]),
        .I2(stateGrayegr[2]),
        .I3(\col_lcl_reg[1]__0_n_0 ),
        .I4(\col_lcl_reg[0]__0_n_0 ),
        .O(\col_lcl[1]__0_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2969" *) 
  LUT4 #(
    .INIT(16'h0440)) 
    \col_lcl[1]__1_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\col_lcl_reg[1]__1_n_0 ),
        .I3(\col_lcl_reg[0]__1_n_0 ),
        .O(col_lcl[1]));
  (* SOFT_HLUTNM = "soft_lutpair2993" *) 
  LUT5 #(
    .INIT(32'h00080800)) 
    \col_lcl[1]_i_1__1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I3(Q[1]),
        .I4(Q[0]),
        .O(\col_lcl[1]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h0008080808000000)) 
    \col_lcl[2]__0_i_1__0 
       (.I0(stateGrayegr[1]),
        .I1(stateGrayegr[0]),
        .I2(stateGrayegr[2]),
        .I3(\col_lcl_reg[0]__0_n_0 ),
        .I4(\col_lcl_reg[1]__0_n_0 ),
        .I5(\col_lcl_reg[2]__0_n_0 ),
        .O(\col_lcl[2]__0_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2969" *) 
  LUT5 #(
    .INIT(32'h00780000)) 
    \col_lcl[2]__1_i_1 
       (.I0(\col_lcl_reg[0]__1_n_0 ),
        .I1(\col_lcl_reg[1]__1_n_0 ),
        .I2(\col_lcl_reg[2]__1_n_0 ),
        .I3(stateGraypack[0]),
        .I4(stateGraypack[1]),
        .O(\col_lcl[2]__1_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0008080808000000)) 
    \col_lcl[2]_i_1__1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I3(Q[0]),
        .I4(Q[1]),
        .I5(Q[2]),
        .O(\col_lcl[2]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h7F800000)) 
    \col_lcl[3]__0_i_1__0 
       (.I0(\col_lcl_reg[2]__0_n_0 ),
        .I1(\col_lcl_reg[1]__0_n_0 ),
        .I2(\col_lcl_reg[0]__0_n_0 ),
        .I3(\col_lcl_reg[3]__0_n_0 ),
        .I4(\nop[3]_i_3_n_0 ),
        .O(\col_lcl[3]__0_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h00007F8000000000)) 
    \col_lcl[3]__1_i_1 
       (.I0(\col_lcl_reg[2]__1_n_0 ),
        .I1(\col_lcl_reg[1]__1_n_0 ),
        .I2(\col_lcl_reg[0]__1_n_0 ),
        .I3(\col_lcl_reg[3]__1_n_0 ),
        .I4(stateGraypack[0]),
        .I5(stateGraypack[1]),
        .O(\col_lcl[3]__1_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h7F800000)) 
    \col_lcl[3]_i_1__1 
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(\col_lcl_reg_n_0_[3] ),
        .I4(\FSM_sequential_stateRgbegr[2]_i_2_n_0 ),
        .O(\col_lcl[3]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFF800000000000)) 
    \col_lcl[4]__0_i_1__0 
       (.I0(\col_lcl_reg[3]__0_n_0 ),
        .I1(\col_lcl_reg[0]__0_n_0 ),
        .I2(\col_lcl_reg[1]__0_n_0 ),
        .I3(\col_lcl_reg[2]__0_n_0 ),
        .I4(\col_lcl_reg[4]__0_n_0 ),
        .I5(\nop[3]_i_3_n_0 ),
        .O(\col_lcl[4]__0_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h7FFF800000000000)) 
    \col_lcl[4]__1_i_1 
       (.I0(\col_lcl_reg[3]__1_n_0 ),
        .I1(\col_lcl_reg[0]__1_n_0 ),
        .I2(\col_lcl_reg[1]__1_n_0 ),
        .I3(\col_lcl_reg[2]__1_n_0 ),
        .I4(\col_lcl_reg[4]__1_n_0 ),
        .I5(\col_lcl[4]__1_i_2_n_0 ),
        .O(\col_lcl[4]__1_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3011" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \col_lcl[4]__1_i_2 
       (.I0(stateGraypack[1]),
        .I1(stateGraypack[0]),
        .O(\col_lcl[4]__1_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h7FFF800000000000)) 
    \col_lcl[4]_i_1__1 
       (.I0(\col_lcl_reg_n_0_[3] ),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[2]),
        .I4(\col_lcl_reg_n_0_[4] ),
        .I5(\FSM_sequential_stateRgbegr[2]_i_2_n_0 ),
        .O(\col_lcl[4]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3016" *) 
  LUT4 #(
    .INIT(16'h0080)) 
    \col_lcl[5]__0_i_1__0 
       (.I0(\col_lcl[5]__0_i_2__0_n_0 ),
        .I1(stateGrayegr[1]),
        .I2(stateGrayegr[0]),
        .I3(stateGrayegr[2]),
        .O(\col_lcl[5]__0_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h6AAAAAAAAAAAAAAA)) 
    \col_lcl[5]__0_i_2__0 
       (.I0(\col_lcl_reg[5]__0_n_0 ),
        .I1(\col_lcl_reg[3]__0_n_0 ),
        .I2(\col_lcl_reg[0]__0_n_0 ),
        .I3(\col_lcl_reg[1]__0_n_0 ),
        .I4(\col_lcl_reg[2]__0_n_0 ),
        .I5(\col_lcl_reg[4]__0_n_0 ),
        .O(\col_lcl[5]__0_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3022" *) 
  LUT3 #(
    .INIT(8'h20)) 
    \col_lcl[5]__1_i_1 
       (.I0(\col_lcl[5]__1_i_2_n_0 ),
        .I1(stateGraypack[0]),
        .I2(stateGraypack[1]),
        .O(\col_lcl[5]__1_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h6AAAAAAAAAAAAAAA)) 
    \col_lcl[5]__1_i_2 
       (.I0(\col_lcl_reg[5]__1_n_0 ),
        .I1(\col_lcl_reg[3]__1_n_0 ),
        .I2(\col_lcl_reg[0]__1_n_0 ),
        .I3(\col_lcl_reg[1]__1_n_0 ),
        .I4(\col_lcl_reg[2]__1_n_0 ),
        .I5(\col_lcl_reg[4]__1_n_0 ),
        .O(\col_lcl[5]__1_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3015" *) 
  LUT4 #(
    .INIT(16'h0080)) 
    \col_lcl[5]_i_1__1 
       (.I0(\col_lcl_reg[5]_1 ),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I3(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .O(\col_lcl[5]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h6AAAAAAAAAAAAAAA)) 
    \col_lcl[5]_i_2__1 
       (.I0(\col_lcl_reg_n_0_[5] ),
        .I1(\col_lcl_reg_n_0_[3] ),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[2]),
        .I5(\col_lcl_reg_n_0_[4] ),
        .O(\col_lcl_reg[5]_1 ));
  (* SOFT_HLUTNM = "soft_lutpair2960" *) 
  LUT5 #(
    .INIT(32'h00006000)) 
    \col_lcl[6]__0_i_1__0 
       (.I0(\col_lcl[9]__0_i_2__0_n_0 ),
        .I1(\col_lcl_reg[6]__0_n_0 ),
        .I2(stateGrayegr[1]),
        .I3(stateGrayegr[0]),
        .I4(stateGrayegr[2]),
        .O(\col_lcl[6]__0_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2970" *) 
  LUT4 #(
    .INIT(16'h0600)) 
    \col_lcl[6]__1_i_1 
       (.I0(\col_lcl[8]__1_i_2_n_0 ),
        .I1(\col_lcl_reg[6]__1_n_0 ),
        .I2(stateGraypack[0]),
        .I3(stateGraypack[1]),
        .O(\col_lcl[6]__1_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2958" *) 
  LUT5 #(
    .INIT(32'h00006000)) 
    \col_lcl[6]_i_1__1 
       (.I0(\col_lcl_reg[5]_0 ),
        .I1(Q[3]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I3(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I4(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .O(\col_lcl[6]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000078000000)) 
    \col_lcl[7]__0_i_1__0 
       (.I0(\col_lcl_reg[6]__0_n_0 ),
        .I1(\col_lcl[9]__0_i_2__0_n_0 ),
        .I2(\col_lcl_reg[7]__0_n_0 ),
        .I3(stateGrayegr[1]),
        .I4(stateGrayegr[0]),
        .I5(stateGrayegr[2]),
        .O(\col_lcl[7]__0_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2970" *) 
  LUT5 #(
    .INIT(32'h00780000)) 
    \col_lcl[7]__1_i_1 
       (.I0(\col_lcl_reg[6]__1_n_0 ),
        .I1(\col_lcl[8]__1_i_2_n_0 ),
        .I2(\col_lcl_reg[7]__1_n_0 ),
        .I3(stateGraypack[0]),
        .I4(stateGraypack[1]),
        .O(\col_lcl[7]__1_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000078000000)) 
    \col_lcl[7]_i_1__1 
       (.I0(Q[3]),
        .I1(\col_lcl_reg[5]_0 ),
        .I2(Q[4]),
        .I3(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I4(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I5(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .O(\col_lcl[7]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2959" *) 
  LUT5 #(
    .INIT(32'h7F800000)) 
    \col_lcl[8]__0_i_1__0 
       (.I0(\col_lcl_reg[7]__0_n_0 ),
        .I1(\col_lcl[9]__0_i_2__0_n_0 ),
        .I2(\col_lcl_reg[6]__0_n_0 ),
        .I3(\col_lcl_reg[8]__0_n_0 ),
        .I4(\nop[3]_i_3_n_0 ),
        .O(\col_lcl[8]__0_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0444444440000000)) 
    \col_lcl[8]__1_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\col_lcl_reg[7]__1_n_0 ),
        .I3(\col_lcl[8]__1_i_2_n_0 ),
        .I4(\col_lcl_reg[6]__1_n_0 ),
        .I5(\col_lcl_reg[8]__1_n_0 ),
        .O(col_lcl[8]));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \col_lcl[8]__1_i_2 
       (.I0(\col_lcl_reg[5]__1_n_0 ),
        .I1(\col_lcl_reg[3]__1_n_0 ),
        .I2(\col_lcl_reg[0]__1_n_0 ),
        .I3(\col_lcl_reg[1]__1_n_0 ),
        .I4(\col_lcl_reg[2]__1_n_0 ),
        .I5(\col_lcl_reg[4]__1_n_0 ),
        .O(\col_lcl[8]__1_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2957" *) 
  LUT5 #(
    .INIT(32'h7F800000)) 
    \col_lcl[8]_i_1__1 
       (.I0(Q[4]),
        .I1(\col_lcl_reg[5]_0 ),
        .I2(Q[3]),
        .I3(\col_lcl_reg_n_0_[8] ),
        .I4(\FSM_sequential_stateRgbegr[2]_i_2_n_0 ),
        .O(\col_lcl[8]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFF800000000000)) 
    \col_lcl[9]__0_i_1__0 
       (.I0(\col_lcl_reg[8]__0_n_0 ),
        .I1(\col_lcl_reg[6]__0_n_0 ),
        .I2(\col_lcl[9]__0_i_2__0_n_0 ),
        .I3(\col_lcl_reg[7]__0_n_0 ),
        .I4(\col_lcl_reg[9]__0_n_0 ),
        .I5(\nop[3]_i_3_n_0 ),
        .O(\col_lcl[9]__0_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \col_lcl[9]__0_i_2__0 
       (.I0(\col_lcl_reg[5]__0_n_0 ),
        .I1(\col_lcl_reg[3]__0_n_0 ),
        .I2(\col_lcl_reg[0]__0_n_0 ),
        .I3(\col_lcl_reg[1]__0_n_0 ),
        .I4(\col_lcl_reg[2]__0_n_0 ),
        .I5(\col_lcl_reg[4]__0_n_0 ),
        .O(\col_lcl[9]__0_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3023" *) 
  LUT3 #(
    .INIT(8'h20)) 
    \col_lcl[9]__1_i_1 
       (.I0(\col_lcl[9]__1_i_2_n_0 ),
        .I1(stateGraypack[0]),
        .I2(stateGraypack[1]),
        .O(\col_lcl[9]__1_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2999" *) 
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    \col_lcl[9]__1_i_2 
       (.I0(\col_lcl_reg[9]__1_n_0 ),
        .I1(\col_lcl_reg[7]__1_n_0 ),
        .I2(\col_lcl[8]__1_i_2_n_0 ),
        .I3(\col_lcl_reg[6]__1_n_0 ),
        .I4(\col_lcl_reg[8]__1_n_0 ),
        .O(\col_lcl[9]__1_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h7FFF800000000000)) 
    \col_lcl[9]_i_1__1 
       (.I0(\col_lcl_reg_n_0_[8] ),
        .I1(Q[3]),
        .I2(\col_lcl_reg[5]_0 ),
        .I3(Q[4]),
        .I4(\col_lcl_reg_n_0_[9] ),
        .I5(\FSM_sequential_stateRgbegr[2]_i_2_n_0 ),
        .O(\col_lcl[9]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \col_lcl[9]_i_2__1 
       (.I0(\col_lcl_reg_n_0_[5] ),
        .I1(\col_lcl_reg_n_0_[3] ),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[2]),
        .I5(\col_lcl_reg_n_0_[4] ),
        .O(\col_lcl_reg[5]_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[0]_i_1__1_n_0 ),
        .Q(Q[0]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[0]__0 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[0]__0_i_1__0_n_0 ),
        .Q(\col_lcl_reg[0]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[0]__1 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(col_lcl[0]),
        .Q(\col_lcl_reg[0]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[10]_i_1__1_n_0 ),
        .Q(\col_lcl_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[10]__0 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[10]__0_i_1__0_n_0 ),
        .Q(\col_lcl_reg[10]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[10]__1 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(col_lcl[10]),
        .Q(\col_lcl_reg[10]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[1]_i_1__1_n_0 ),
        .Q(Q[1]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[1]__0 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[1]__0_i_1__0_n_0 ),
        .Q(\col_lcl_reg[1]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[1]__1 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(col_lcl[1]),
        .Q(\col_lcl_reg[1]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[2]_i_1__1_n_0 ),
        .Q(Q[2]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[2]__0 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[2]__0_i_1__0_n_0 ),
        .Q(\col_lcl_reg[2]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[2]__1 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[2]__1_i_1_n_0 ),
        .Q(\col_lcl_reg[2]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[3]_i_1__1_n_0 ),
        .Q(\col_lcl_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[3]__0 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[3]__0_i_1__0_n_0 ),
        .Q(\col_lcl_reg[3]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[3]__1 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[3]__1_i_1_n_0 ),
        .Q(\col_lcl_reg[3]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[4]_i_1__1_n_0 ),
        .Q(\col_lcl_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[4]__0 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[4]__0_i_1__0_n_0 ),
        .Q(\col_lcl_reg[4]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[4]__1 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[4]__1_i_1_n_0 ),
        .Q(\col_lcl_reg[4]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[5]_i_1__1_n_0 ),
        .Q(\col_lcl_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[5]__0 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[5]__0_i_1__0_n_0 ),
        .Q(\col_lcl_reg[5]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[5]__1 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[5]__1_i_1_n_0 ),
        .Q(\col_lcl_reg[5]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[6]_i_1__1_n_0 ),
        .Q(Q[3]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[6]__0 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[6]__0_i_1__0_n_0 ),
        .Q(\col_lcl_reg[6]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[6]__1 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[6]__1_i_1_n_0 ),
        .Q(\col_lcl_reg[6]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[7]_i_1__1_n_0 ),
        .Q(Q[4]));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[7]__0 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[7]__0_i_1__0_n_0 ),
        .Q(\col_lcl_reg[7]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[7]__1 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[7]__1_i_1_n_0 ),
        .Q(\col_lcl_reg[7]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[8]_i_1__1_n_0 ),
        .Q(\col_lcl_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[8]__0 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[8]__0_i_1__0_n_0 ),
        .Q(\col_lcl_reg[8]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[8]__1 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(col_lcl[8]),
        .Q(\col_lcl_reg[8]__1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[9]_i_1__1_n_0 ),
        .Q(\col_lcl_reg_n_0_[9] ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[9]__0 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[9]__0_i_1__0_n_0 ),
        .Q(\col_lcl_reg[9]__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \col_lcl_reg[9]__1 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\col_lcl[9]__1_i_1_n_0 ),
        .Q(\col_lcl_reg[9]__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3035" *) 
  LUT4 #(
    .INIT(16'h02AA)) 
    \dIgrm1[0]_i_2 
       (.I0(p_14_in[4]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .O(\abcde_reg[0]_0 [0]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[10]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr3_reg_n_0_[6] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[34]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[26]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [10]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[11]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr3_reg_n_0_[7] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[35]_i_4_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[27]_i_3_n_0 ),
        .O(\abcde_reg[0]_0 [11]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[12]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr3_reg_n_0_[8] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[36]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[28]_i_3_n_0 ),
        .O(\abcde_reg[0]_0 [12]));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[13]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr3_reg_n_0_[9] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[29]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[37]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [13]));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[14]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr3_reg_n_0_[10] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[30]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[38]_i_3_n_0 ),
        .O(\abcde_reg[0]_0 [14]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[15]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr3_reg_n_0_[11] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[39]_i_5_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[31]_i_3_n_0 ),
        .O(\abcde_reg[0]_0 [15]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[16]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr2_reg_n_0_[4] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[16]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[32]_i_3_n_0 ),
        .O(\abcde_reg[0]_0 [16]));
  (* SOFT_HLUTNM = "soft_lutpair3069" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[16]_i_3 
       (.I0(\gr1_reg_n_0_[4] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr0_reg_n_0_[4] ),
        .O(\dIgrm1[16]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[17]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr2_reg_n_0_[5] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[17]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[33]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [17]));
  (* SOFT_HLUTNM = "soft_lutpair3067" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[17]_i_3 
       (.I0(\gr1_reg_n_0_[5] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr0_reg_n_0_[5] ),
        .O(\dIgrm1[17]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[18]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr2_reg_n_0_[6] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[18]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[34]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [18]));
  (* SOFT_HLUTNM = "soft_lutpair3065" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[18]_i_3 
       (.I0(\gr1_reg_n_0_[6] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr0_reg_n_0_[6] ),
        .O(\dIgrm1[18]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[19]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr2_reg_n_0_[7] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[35]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[19]_i_3_n_0 ),
        .O(\abcde_reg[0]_0 [19]));
  (* SOFT_HLUTNM = "soft_lutpair3062" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[19]_i_3 
       (.I0(\gr1_reg_n_0_[7] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr0_reg_n_0_[7] ),
        .O(\dIgrm1[19]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3035" *) 
  LUT4 #(
    .INIT(16'h02AA)) 
    \dIgrm1[1]_i_2 
       (.I0(p_14_in[5]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .O(\abcde_reg[0]_0 [1]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[20]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr2_reg_n_0_[8] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[20]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[36]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [20]));
  (* SOFT_HLUTNM = "soft_lutpair3061" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[20]_i_3 
       (.I0(\gr1_reg_n_0_[8] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr0_reg_n_0_[8] ),
        .O(\dIgrm1[20]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[21]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr2_reg_n_0_[9] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[37]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[21]_i_3_n_0 ),
        .O(\abcde_reg[0]_0 [21]));
  (* SOFT_HLUTNM = "soft_lutpair3058" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[21]_i_3 
       (.I0(\gr1_reg_n_0_[9] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr0_reg_n_0_[9] ),
        .O(\dIgrm1[21]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[22]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr2_reg_n_0_[10] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[22]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[38]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [22]));
  (* SOFT_HLUTNM = "soft_lutpair3056" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[22]_i_3 
       (.I0(\gr1_reg_n_0_[10] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr0_reg_n_0_[10] ),
        .O(\dIgrm1[22]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[23]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr2_reg_n_0_[11] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[39]_i_4_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[23]_i_3_n_0 ),
        .O(\abcde_reg[0]_0 [23]));
  (* SOFT_HLUTNM = "soft_lutpair3055" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[23]_i_3 
       (.I0(\gr1_reg_n_0_[11] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr0_reg_n_0_[11] ),
        .O(\dIgrm1[23]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[24]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr1_reg_n_0_[4] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[24]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[24]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [24]));
  (* SOFT_HLUTNM = "soft_lutpair3068" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[24]_i_3 
       (.I0(\gr3_reg_n_0_[4] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr2_reg_n_0_[4] ),
        .O(\dIgrm1[24]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3073" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[24]_i_4 
       (.I0(\gr0_reg_n_0_[4] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr4_reg_n_0_[4] ),
        .O(\dIgrm1[24]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[25]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr1_reg_n_0_[5] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[25]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[25]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [25]));
  (* SOFT_HLUTNM = "soft_lutpair3066" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[25]_i_3 
       (.I0(\gr3_reg_n_0_[5] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr2_reg_n_0_[5] ),
        .O(\dIgrm1[25]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3073" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[25]_i_4 
       (.I0(\gr0_reg_n_0_[5] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr4_reg_n_0_[5] ),
        .O(\dIgrm1[25]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[26]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr1_reg_n_0_[6] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[26]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[26]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [26]));
  (* SOFT_HLUTNM = "soft_lutpair3064" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[26]_i_3 
       (.I0(\gr3_reg_n_0_[6] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr2_reg_n_0_[6] ),
        .O(\dIgrm1[26]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3072" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[26]_i_4 
       (.I0(\gr0_reg_n_0_[6] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr4_reg_n_0_[6] ),
        .O(\dIgrm1[26]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[27]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr1_reg_n_0_[7] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[27]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[27]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [27]));
  (* SOFT_HLUTNM = "soft_lutpair3072" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[27]_i_3 
       (.I0(\gr0_reg_n_0_[7] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr4_reg_n_0_[7] ),
        .O(\dIgrm1[27]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3063" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[27]_i_4 
       (.I0(\gr3_reg_n_0_[7] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr2_reg_n_0_[7] ),
        .O(\dIgrm1[27]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[28]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr1_reg_n_0_[8] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[28]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[28]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [28]));
  (* SOFT_HLUTNM = "soft_lutpair3071" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[28]_i_3 
       (.I0(\gr0_reg_n_0_[8] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr4_reg_n_0_[8] ),
        .O(\dIgrm1[28]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3060" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[28]_i_4 
       (.I0(\gr3_reg_n_0_[8] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr2_reg_n_0_[8] ),
        .O(\dIgrm1[28]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[29]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr1_reg_n_0_[9] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[29]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[29]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [29]));
  (* SOFT_HLUTNM = "soft_lutpair3071" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[29]_i_3 
       (.I0(\gr0_reg_n_0_[9] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr4_reg_n_0_[9] ),
        .O(\dIgrm1[29]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3059" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[29]_i_4 
       (.I0(\gr3_reg_n_0_[9] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr2_reg_n_0_[9] ),
        .O(\dIgrm1[29]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3036" *) 
  LUT4 #(
    .INIT(16'h02AA)) 
    \dIgrm1[2]_i_2 
       (.I0(p_14_in[6]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .O(\abcde_reg[0]_0 [2]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[30]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr1_reg_n_0_[10] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[30]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[30]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [30]));
  (* SOFT_HLUTNM = "soft_lutpair3070" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[30]_i_3 
       (.I0(\gr0_reg_n_0_[10] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr4_reg_n_0_[10] ),
        .O(\dIgrm1[30]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3057" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[30]_i_4 
       (.I0(\gr3_reg_n_0_[10] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr2_reg_n_0_[10] ),
        .O(\dIgrm1[30]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[31]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr1_reg_n_0_[11] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[31]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[31]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [31]));
  (* SOFT_HLUTNM = "soft_lutpair3070" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[31]_i_3 
       (.I0(\gr0_reg_n_0_[11] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr4_reg_n_0_[11] ),
        .O(\dIgrm1[31]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3054" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[31]_i_4 
       (.I0(\gr3_reg_n_0_[11] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr2_reg_n_0_[11] ),
        .O(\dIgrm1[31]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[32]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr0_reg_n_0_[4] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[32]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[32]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [32]));
  (* SOFT_HLUTNM = "soft_lutpair3068" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[32]_i_3 
       (.I0(\gr4_reg_n_0_[4] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr3_reg_n_0_[4] ),
        .O(\dIgrm1[32]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3069" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[32]_i_4 
       (.I0(\gr2_reg_n_0_[4] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr1_reg_n_0_[4] ),
        .O(\dIgrm1[32]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[33]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr0_reg_n_0_[5] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[33]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[33]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [33]));
  (* SOFT_HLUTNM = "soft_lutpair3067" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[33]_i_3 
       (.I0(\gr2_reg_n_0_[5] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr1_reg_n_0_[5] ),
        .O(\dIgrm1[33]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3066" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[33]_i_4 
       (.I0(\gr4_reg_n_0_[5] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr3_reg_n_0_[5] ),
        .O(\dIgrm1[33]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[34]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr0_reg_n_0_[6] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[34]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[34]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [34]));
  (* SOFT_HLUTNM = "soft_lutpair3065" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[34]_i_3 
       (.I0(\gr2_reg_n_0_[6] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr1_reg_n_0_[6] ),
        .O(\dIgrm1[34]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3064" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[34]_i_4 
       (.I0(\gr4_reg_n_0_[6] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr3_reg_n_0_[6] ),
        .O(\dIgrm1[34]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[35]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr0_reg_n_0_[7] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[35]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[35]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [35]));
  (* SOFT_HLUTNM = "soft_lutpair3063" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[35]_i_3 
       (.I0(\gr4_reg_n_0_[7] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr3_reg_n_0_[7] ),
        .O(\dIgrm1[35]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3062" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[35]_i_4 
       (.I0(\gr2_reg_n_0_[7] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr1_reg_n_0_[7] ),
        .O(\dIgrm1[35]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[36]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr0_reg_n_0_[8] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[36]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[36]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [36]));
  (* SOFT_HLUTNM = "soft_lutpair3061" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[36]_i_3 
       (.I0(\gr2_reg_n_0_[8] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr1_reg_n_0_[8] ),
        .O(\dIgrm1[36]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3060" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[36]_i_4 
       (.I0(\gr4_reg_n_0_[8] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr3_reg_n_0_[8] ),
        .O(\dIgrm1[36]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[37]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr0_reg_n_0_[9] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[37]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[37]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [37]));
  (* SOFT_HLUTNM = "soft_lutpair3059" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[37]_i_3 
       (.I0(\gr4_reg_n_0_[9] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr3_reg_n_0_[9] ),
        .O(\dIgrm1[37]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3058" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[37]_i_4 
       (.I0(\gr2_reg_n_0_[9] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr1_reg_n_0_[9] ),
        .O(\dIgrm1[37]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[38]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr0_reg_n_0_[10] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[38]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[38]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [38]));
  (* SOFT_HLUTNM = "soft_lutpair3056" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[38]_i_3 
       (.I0(\gr2_reg_n_0_[10] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr1_reg_n_0_[10] ),
        .O(\dIgrm1[38]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3057" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[38]_i_4 
       (.I0(\gr4_reg_n_0_[10] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr3_reg_n_0_[10] ),
        .O(\dIgrm1[38]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dIgrm1[39]_i_3 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr0_reg_n_0_[11] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[39]_i_4_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[39]_i_5_n_0 ),
        .O(\abcde_reg[0]_0 [39]));
  (* SOFT_HLUTNM = "soft_lutpair3054" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[39]_i_4 
       (.I0(\gr4_reg_n_0_[11] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr3_reg_n_0_[11] ),
        .O(\dIgrm1[39]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3055" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \dIgrm1[39]_i_5 
       (.I0(\gr2_reg_n_0_[11] ),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\gr1_reg_n_0_[11] ),
        .O(\dIgrm1[39]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3036" *) 
  LUT4 #(
    .INIT(16'h02AA)) 
    \dIgrm1[3]_i_2 
       (.I0(p_14_in[7]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .O(\abcde_reg[0]_0 [3]));
  (* SOFT_HLUTNM = "soft_lutpair3037" *) 
  LUT4 #(
    .INIT(16'h02AA)) 
    \dIgrm1[4]_i_2 
       (.I0(p_14_in[8]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .O(\abcde_reg[0]_0 [4]));
  (* SOFT_HLUTNM = "soft_lutpair3037" *) 
  LUT4 #(
    .INIT(16'h02AA)) 
    \dIgrm1[5]_i_2 
       (.I0(p_14_in[9]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .O(\abcde_reg[0]_0 [5]));
  (* SOFT_HLUTNM = "soft_lutpair3038" *) 
  LUT4 #(
    .INIT(16'h02AA)) 
    \dIgrm1[6]_i_2 
       (.I0(p_14_in[10]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .O(\abcde_reg[0]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair3038" *) 
  LUT4 #(
    .INIT(16'h02AA)) 
    \dIgrm1[7]_i_2 
       (.I0(p_14_in[11]),
        .I1(\abcde_reg_n_0_[0] ),
        .I2(\abcde_reg_n_0_[1] ),
        .I3(\abcde_reg_n_0_[2] ),
        .O(\abcde_reg[0]_0 [7]));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[8]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr3_reg_n_0_[4] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[24]_i_4_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[32]_i_4_n_0 ),
        .O(\abcde_reg[0]_0 [8]));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dIgrm1[9]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr3_reg_n_0_[5] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[25]_i_4_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[33]_i_3_n_0 ),
        .O(\abcde_reg[0]_0 [9]));
  LUT6 #(
    .INIT(64'h0141410101010141)) 
    \drdEvenbufBm1[63]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I3(\qrs_reg_n_0_[2] ),
        .I4(\qrs_reg_n_0_[0] ),
        .I5(\qrs_reg_n_0_[1] ),
        .O(\drdEvenbufBm1[63]_i_1_n_0 ));
  FDCE \drdEvenbufBm1_reg[48] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[48]),
        .Q(data2[0]));
  FDCE \drdEvenbufBm1_reg[49] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[49]),
        .Q(data2[1]));
  FDCE \drdEvenbufBm1_reg[50] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[50]),
        .Q(data2[2]));
  FDCE \drdEvenbufBm1_reg[51] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[51]),
        .Q(data2[3]));
  FDCE \drdEvenbufBm1_reg[52] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[52]),
        .Q(data2[4]));
  FDCE \drdEvenbufBm1_reg[53] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[53]),
        .Q(data2[5]));
  FDCE \drdEvenbufBm1_reg[54] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[54]),
        .Q(data2[6]));
  FDCE \drdEvenbufBm1_reg[55] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[55]),
        .Q(data2[7]));
  FDCE \drdEvenbufBm1_reg[56] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[56]),
        .Q(data2[8]));
  FDCE \drdEvenbufBm1_reg[57] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[57]),
        .Q(data2[9]));
  FDCE \drdEvenbufBm1_reg[58] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[58]),
        .Q(data2[10]));
  FDCE \drdEvenbufBm1_reg[59] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[59]),
        .Q(data2[11]));
  FDCE \drdEvenbufBm1_reg[60] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[60]),
        .Q(\drdEvenbufBm1_reg_n_0_[60] ));
  FDCE \drdEvenbufBm1_reg[61] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[61]),
        .Q(\drdEvenbufBm1_reg_n_0_[61] ));
  FDCE \drdEvenbufBm1_reg[62] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[62]),
        .Q(\drdEvenbufBm1_reg_n_0_[62] ));
  FDCE \drdEvenbufBm1_reg[63] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdEvenbufBm1[63]),
        .Q(\drdEvenbufBm1_reg_n_0_[63] ));
  FDCE \drdOddbufBm1_reg[48] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[48]),
        .Q(\drdOddbufBm1_reg_n_0_[48] ));
  FDCE \drdOddbufBm1_reg[49] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[49]),
        .Q(\drdOddbufBm1_reg_n_0_[49] ));
  FDCE \drdOddbufBm1_reg[50] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[50]),
        .Q(\drdOddbufBm1_reg_n_0_[50] ));
  FDCE \drdOddbufBm1_reg[51] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[51]),
        .Q(\drdOddbufBm1_reg_n_0_[51] ));
  FDCE \drdOddbufBm1_reg[52] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[52]),
        .Q(\drdOddbufBm1_reg_n_0_[52] ));
  FDCE \drdOddbufBm1_reg[53] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[53]),
        .Q(\drdOddbufBm1_reg_n_0_[53] ));
  FDCE \drdOddbufBm1_reg[54] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[54]),
        .Q(\drdOddbufBm1_reg_n_0_[54] ));
  FDCE \drdOddbufBm1_reg[55] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[55]),
        .Q(\drdOddbufBm1_reg_n_0_[55] ));
  FDCE \drdOddbufBm1_reg[56] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[56]),
        .Q(\drdOddbufBm1_reg_n_0_[56] ));
  FDCE \drdOddbufBm1_reg[57] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[57]),
        .Q(\drdOddbufBm1_reg_n_0_[57] ));
  FDCE \drdOddbufBm1_reg[58] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[58]),
        .Q(\drdOddbufBm1_reg_n_0_[58] ));
  FDCE \drdOddbufBm1_reg[59] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[59]),
        .Q(\drdOddbufBm1_reg_n_0_[59] ));
  FDCE \drdOddbufBm1_reg[60] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[60]),
        .Q(\drdOddbufBm1_reg_n_0_[60] ));
  FDCE \drdOddbufBm1_reg[61] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[61]),
        .Q(\drdOddbufBm1_reg_n_0_[61] ));
  FDCE \drdOddbufBm1_reg[62] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[62]),
        .Q(\drdOddbufBm1_reg_n_0_[62] ));
  FDCE \drdOddbufBm1_reg[63] 
       (.C(aclk_sig),
        .CE(\drdEvenbufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdOddbufBm1[63]),
        .Q(\drdOddbufBm1_reg_n_0_[63] ));
  FDCE \drdRow0bufBm1_reg[60] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow0bufBm1[60]),
        .Q(data10__3[4]));
  FDCE \drdRow0bufBm1_reg[61] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow0bufBm1[61]),
        .Q(data10__3[5]));
  FDCE \drdRow0bufBm1_reg[62] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow0bufBm1[62]),
        .Q(data10__3[6]));
  FDCE \drdRow0bufBm1_reg[63] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow0bufBm1[63]),
        .Q(data10__3[7]));
  FDCE \drdRow1bufBm1_reg[60] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow1bufBm1[60]),
        .Q(data10__2[4]));
  FDCE \drdRow1bufBm1_reg[61] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow1bufBm1[61]),
        .Q(data10__2[5]));
  FDCE \drdRow1bufBm1_reg[62] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow1bufBm1[62]),
        .Q(data10__2[6]));
  FDCE \drdRow1bufBm1_reg[63] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow1bufBm1[63]),
        .Q(data10__2[7]));
  FDCE \drdRow2bufBm1_reg[60] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow2bufBm1[60]),
        .Q(data10__1[4]));
  FDCE \drdRow2bufBm1_reg[61] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow2bufBm1[61]),
        .Q(data10__1[5]));
  FDCE \drdRow2bufBm1_reg[62] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow2bufBm1[62]),
        .Q(data10__1[6]));
  FDCE \drdRow2bufBm1_reg[63] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow2bufBm1[63]),
        .Q(data10__1[7]));
  FDCE \drdRow3bufBm1_reg[60] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow3bufBm1[60]),
        .Q(data10__0[4]));
  FDCE \drdRow3bufBm1_reg[61] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow3bufBm1[61]),
        .Q(data10__0[5]));
  FDCE \drdRow3bufBm1_reg[62] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow3bufBm1[62]),
        .Q(data10__0[6]));
  FDCE \drdRow3bufBm1_reg[63] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow3bufBm1[63]),
        .Q(data10__0[7]));
  LUT6 #(
    .INIT(64'hAABAEAAEAAAAAAAA)) 
    \drdRow4bufBm1[63]_i_1 
       (.I0(\drdRow4bufBm1[63]_i_3_n_0 ),
        .I1(\nop_reg_n_0_[3] ),
        .I2(\nop_reg_n_0_[1] ),
        .I3(\nop_reg_n_0_[2] ),
        .I4(\nop_reg_n_0_[0] ),
        .I5(grayToManyAXIS_tvalid_sig),
        .O(\drdRow4bufBm1[63]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3005" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \drdRow4bufBm1[63]_i_3 
       (.I0(stateGrayegr[0]),
        .I1(stateGrayegr[2]),
        .I2(stateGrayegr[1]),
        .O(\drdRow4bufBm1[63]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3012" *) 
  LUT4 #(
    .INIT(16'h4000)) 
    \drdRow4bufBm1[63]_i_4 
       (.I0(stateGrayegr[2]),
        .I1(stateGrayegr[0]),
        .I2(stateGrayegr[1]),
        .I3(rgbVideoinToManyAXIS_tvalid),
        .O(grayToManyAXIS_tvalid_sig));
  FDCE \drdRow4bufBm1_reg[60] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow4bufBm1[60]),
        .Q(data10[4]));
  FDCE \drdRow4bufBm1_reg[61] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow4bufBm1[61]),
        .Q(data10[5]));
  FDCE \drdRow4bufBm1_reg[62] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow4bufBm1[62]),
        .Q(data10[6]));
  FDCE \drdRow4bufBm1_reg[63] 
       (.C(aclk_sig),
        .CE(\drdRow4bufBm1[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(drdRow4bufBm1[63]),
        .Q(data10[7]));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrEobuf[0]_i_1 
       (.I0(camifToVideoinAXIS_tdata[0]),
        .I1(klm[1]),
        .I2(dwrEobufp1[0]),
        .I3(\stateIgr_reg[1]_0 [0]),
        .I4(\stateIgr_reg[1]_0 [1]),
        .O(\dwrEobuf[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3043" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \dwrEobuf[10]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\dwrEobuf[10]_i_2_n_0 ),
        .O(\dwrEobuf[10]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0777077700000777)) 
    \dwrEobuf[10]_i_2 
       (.I0(camifToVideoinAXIS_tdata[2]),
        .I1(\klm_reg[0]_0 ),
        .I2(klm[2]),
        .I3(dwrEobufp1[10]),
        .I4(camifToVideoinAXIS_tdata[10]),
        .I5(klm[1]),
        .O(\dwrEobuf[10]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3042" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \dwrEobuf[11]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\dwrEobuf[11]_i_2_n_0 ),
        .O(\dwrEobuf[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0777077700000777)) 
    \dwrEobuf[11]_i_2 
       (.I0(camifToVideoinAXIS_tdata[3]),
        .I1(\klm_reg[0]_0 ),
        .I2(klm[2]),
        .I3(dwrEobufp1[11]),
        .I4(camifToVideoinAXIS_tdata[11]),
        .I5(klm[1]),
        .O(\dwrEobuf[11]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3042" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \dwrEobuf[12]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\dwrEobuf[12]_i_2_n_0 ),
        .O(\dwrEobuf[12]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0777077700000777)) 
    \dwrEobuf[12]_i_2 
       (.I0(camifToVideoinAXIS_tdata[4]),
        .I1(\klm_reg[0]_0 ),
        .I2(klm[2]),
        .I3(dwrEobufp1[12]),
        .I4(camifToVideoinAXIS_tdata[12]),
        .I5(klm[1]),
        .O(\dwrEobuf[12]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3041" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \dwrEobuf[13]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\dwrEobuf[13]_i_2_n_0 ),
        .O(\dwrEobuf[13]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0777077700000777)) 
    \dwrEobuf[13]_i_2 
       (.I0(camifToVideoinAXIS_tdata[5]),
        .I1(\klm_reg[0]_0 ),
        .I2(klm[2]),
        .I3(dwrEobufp1[13]),
        .I4(camifToVideoinAXIS_tdata[13]),
        .I5(klm[1]),
        .O(\dwrEobuf[13]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3041" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \dwrEobuf[14]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\dwrEobuf[14]_i_2_n_0 ),
        .O(\dwrEobuf[14]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0777077700000777)) 
    \dwrEobuf[14]_i_2 
       (.I0(camifToVideoinAXIS_tdata[6]),
        .I1(\klm_reg[0]_0 ),
        .I2(klm[2]),
        .I3(dwrEobufp1[14]),
        .I4(camifToVideoinAXIS_tdata[14]),
        .I5(klm[1]),
        .O(\dwrEobuf[14]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3033" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \dwrEobuf[15]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\dwrEobuf[15]_i_2_n_0 ),
        .O(\dwrEobuf[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0777077700000777)) 
    \dwrEobuf[15]_i_2 
       (.I0(camifToVideoinAXIS_tdata[7]),
        .I1(\klm_reg[0]_0 ),
        .I2(klm[2]),
        .I3(dwrEobufp1[15]),
        .I4(camifToVideoinAXIS_tdata[15]),
        .I5(klm[1]),
        .O(\dwrEobuf[15]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2968" *) 
  LUT5 #(
    .INIT(32'hE000EEEE)) 
    \dwrEobuf[16]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[0]),
        .I4(\dwrEobuf[48]_i_2_n_0 ),
        .O(\dwrEobuf[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2967" *) 
  LUT5 #(
    .INIT(32'hE000EEEE)) 
    \dwrEobuf[17]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[1]),
        .I4(\dwrEobuf[49]_i_2_n_0 ),
        .O(\dwrEobuf[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2966" *) 
  LUT5 #(
    .INIT(32'hE000EEEE)) 
    \dwrEobuf[18]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[2]),
        .I4(\dwrEobuf[50]_i_2_n_0 ),
        .O(\dwrEobuf[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2965" *) 
  LUT5 #(
    .INIT(32'hE000EEEE)) 
    \dwrEobuf[19]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[3]),
        .I4(\dwrEobuf[51]_i_2_n_0 ),
        .O(\dwrEobuf[19]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrEobuf[1]_i_1 
       (.I0(camifToVideoinAXIS_tdata[1]),
        .I1(klm[1]),
        .I2(dwrEobufp1[1]),
        .I3(\stateIgr_reg[1]_0 [0]),
        .I4(\stateIgr_reg[1]_0 [1]),
        .O(\dwrEobuf[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2964" *) 
  LUT5 #(
    .INIT(32'hE000EEEE)) 
    \dwrEobuf[20]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[4]),
        .I4(\dwrEobuf[52]_i_2_n_0 ),
        .O(\dwrEobuf[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2963" *) 
  LUT5 #(
    .INIT(32'hE000EEEE)) 
    \dwrEobuf[21]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[5]),
        .I4(\dwrEobuf[53]_i_2_n_0 ),
        .O(\dwrEobuf[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2962" *) 
  LUT5 #(
    .INIT(32'hE000EEEE)) 
    \dwrEobuf[22]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[6]),
        .I4(\dwrEobuf[54]_i_2_n_0 ),
        .O(\dwrEobuf[22]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1FF1111F11111111)) 
    \dwrEobuf[23]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[2]),
        .I3(\klm_reg[0]_0 ),
        .I4(klm[1]),
        .I5(\dwrEobuf_reg[63]_1 ),
        .O(\dwrEobuf[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2961" *) 
  LUT5 #(
    .INIT(32'hE000EEEE)) 
    \dwrEobuf[23]_i_2 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[7]),
        .I4(\dwrEobuf[55]_i_3_n_0 ),
        .O(\dwrEobuf[23]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h5555555500005404)) 
    \dwrEobuf[24]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[0]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[16]),
        .I4(klm[2]),
        .I5(\dwrEobuf_reg[56]_0 ),
        .O(\dwrEobuf[24]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555500005404)) 
    \dwrEobuf[25]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[1]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[17]),
        .I4(klm[2]),
        .I5(\dwrEobuf_reg[57]_0 ),
        .O(\dwrEobuf[25]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555500005404)) 
    \dwrEobuf[26]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[2]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[18]),
        .I4(klm[2]),
        .I5(\dwrEobuf_reg[58]_0 ),
        .O(\dwrEobuf[26]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555500005404)) 
    \dwrEobuf[27]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[3]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[19]),
        .I4(klm[2]),
        .I5(\dwrEobuf_reg[59]_0 ),
        .O(\dwrEobuf[27]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555500005404)) 
    \dwrEobuf[28]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[4]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[20]),
        .I4(klm[2]),
        .I5(\dwrEobuf_reg[60]_0 ),
        .O(\dwrEobuf[28]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555500005404)) 
    \dwrEobuf[29]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[5]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[21]),
        .I4(klm[2]),
        .I5(\dwrEobuf_reg[61]_0 ),
        .O(\dwrEobuf[29]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrEobuf[2]_i_1 
       (.I0(camifToVideoinAXIS_tdata[2]),
        .I1(klm[1]),
        .I2(dwrEobufp1[2]),
        .I3(\stateIgr_reg[1]_0 [0]),
        .I4(\stateIgr_reg[1]_0 [1]),
        .O(\dwrEobuf[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555500005404)) 
    \dwrEobuf[30]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[6]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[22]),
        .I4(klm[2]),
        .I5(\dwrEobuf_reg[62]_0 ),
        .O(\dwrEobuf[30]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h11F1FF1111111111)) 
    \dwrEobuf[31]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[1]),
        .I3(\klm_reg[0]_0 ),
        .I4(klm[2]),
        .I5(\dwrEobuf_reg[63]_1 ),
        .O(\dwrEobuf[31]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555500005404)) 
    \dwrEobuf[31]_i_2 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[7]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[23]),
        .I4(klm[2]),
        .I5(\dwrEobuf_reg[63]_0 ),
        .O(\dwrEobuf[31]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h80AA)) 
    \dwrEobuf[32]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\klm_reg[0]_0 ),
        .I2(camifToVideoinAXIS_tdata[8]),
        .I3(\dwrEobuf[32]_i_2_n_0 ),
        .O(\dwrEobuf[32]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h57F7)) 
    \dwrEobuf[32]_i_2 
       (.I0(klm[2]),
        .I1(camifToVideoinAXIS_tdata[0]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[16]),
        .O(\dwrEobuf[32]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h80AA)) 
    \dwrEobuf[33]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\klm_reg[0]_0 ),
        .I2(camifToVideoinAXIS_tdata[9]),
        .I3(\dwrEobuf[33]_i_2_n_0 ),
        .O(\dwrEobuf[33]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h57F7)) 
    \dwrEobuf[33]_i_2 
       (.I0(klm[2]),
        .I1(camifToVideoinAXIS_tdata[1]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[17]),
        .O(\dwrEobuf[33]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h80AA)) 
    \dwrEobuf[34]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\klm_reg[0]_0 ),
        .I2(camifToVideoinAXIS_tdata[10]),
        .I3(\dwrEobuf[34]_i_2_n_0 ),
        .O(\dwrEobuf[34]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h57F7)) 
    \dwrEobuf[34]_i_2 
       (.I0(klm[2]),
        .I1(camifToVideoinAXIS_tdata[2]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[18]),
        .O(\dwrEobuf[34]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h80AA)) 
    \dwrEobuf[35]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\klm_reg[0]_0 ),
        .I2(camifToVideoinAXIS_tdata[11]),
        .I3(\dwrEobuf[35]_i_2_n_0 ),
        .O(\dwrEobuf[35]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h57F7)) 
    \dwrEobuf[35]_i_2 
       (.I0(klm[2]),
        .I1(camifToVideoinAXIS_tdata[3]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[19]),
        .O(\dwrEobuf[35]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h80AA)) 
    \dwrEobuf[36]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\klm_reg[0]_0 ),
        .I2(camifToVideoinAXIS_tdata[12]),
        .I3(\dwrEobuf[36]_i_2_n_0 ),
        .O(\dwrEobuf[36]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h57F7)) 
    \dwrEobuf[36]_i_2 
       (.I0(klm[2]),
        .I1(camifToVideoinAXIS_tdata[4]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[20]),
        .O(\dwrEobuf[36]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h80AA)) 
    \dwrEobuf[37]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\klm_reg[0]_0 ),
        .I2(camifToVideoinAXIS_tdata[13]),
        .I3(\dwrEobuf[37]_i_2_n_0 ),
        .O(\dwrEobuf[37]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h57F7)) 
    \dwrEobuf[37]_i_2 
       (.I0(klm[2]),
        .I1(camifToVideoinAXIS_tdata[5]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[21]),
        .O(\dwrEobuf[37]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h80AA)) 
    \dwrEobuf[38]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\klm_reg[0]_0 ),
        .I2(camifToVideoinAXIS_tdata[14]),
        .I3(\dwrEobuf[38]_i_2_n_0 ),
        .O(\dwrEobuf[38]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h57F7)) 
    \dwrEobuf[38]_i_2 
       (.I0(klm[2]),
        .I1(camifToVideoinAXIS_tdata[6]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[22]),
        .O(\dwrEobuf[38]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0010500055555555)) 
    \dwrEobuf[39]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(klm[1]),
        .I2(\dwrEobuf_reg[36]_0 ),
        .I3(klm[2]),
        .I4(\klm_reg[0]_0 ),
        .I5(\stateIgr_reg[1]_0 [0]),
        .O(\dwrEobuf[39]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3025" *) 
  LUT4 #(
    .INIT(16'h80AA)) 
    \dwrEobuf[39]_i_2 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\klm_reg[0]_0 ),
        .I2(camifToVideoinAXIS_tdata[15]),
        .I3(\dwrEobuf[39]_i_4_n_0 ),
        .O(\dwrEobuf[39]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3039" *) 
  LUT4 #(
    .INIT(16'h57F7)) 
    \dwrEobuf[39]_i_4 
       (.I0(klm[2]),
        .I1(camifToVideoinAXIS_tdata[7]),
        .I2(klm[1]),
        .I3(camifToVideoinAXIS_tdata[23]),
        .O(\dwrEobuf[39]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrEobuf[3]_i_1 
       (.I0(camifToVideoinAXIS_tdata[3]),
        .I1(klm[1]),
        .I2(dwrEobufp1[3]),
        .I3(\stateIgr_reg[1]_0 [0]),
        .I4(\stateIgr_reg[1]_0 [1]),
        .O(\dwrEobuf[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555540554040)) 
    \dwrEobuf[40]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[0]),
        .I2(klm[1]),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[16]),
        .I5(\dwrEobuf_reg[56]_0 ),
        .O(\dwrEobuf[40]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555540554040)) 
    \dwrEobuf[41]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[1]),
        .I2(klm[1]),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[17]),
        .I5(\dwrEobuf_reg[57]_0 ),
        .O(\dwrEobuf[41]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555540554040)) 
    \dwrEobuf[42]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[2]),
        .I2(klm[1]),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[18]),
        .I5(\dwrEobuf_reg[58]_0 ),
        .O(\dwrEobuf[42]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555540554040)) 
    \dwrEobuf[43]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[3]),
        .I2(klm[1]),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[19]),
        .I5(\dwrEobuf_reg[59]_0 ),
        .O(\dwrEobuf[43]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555540554040)) 
    \dwrEobuf[44]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[4]),
        .I2(klm[1]),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[20]),
        .I5(\dwrEobuf_reg[60]_0 ),
        .O(\dwrEobuf[44]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555540554040)) 
    \dwrEobuf[45]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[5]),
        .I2(klm[1]),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[21]),
        .I5(\dwrEobuf_reg[61]_0 ),
        .O(\dwrEobuf[45]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555540554040)) 
    \dwrEobuf[46]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[6]),
        .I2(klm[1]),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[22]),
        .I5(\dwrEobuf_reg[62]_0 ),
        .O(\dwrEobuf[46]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hF11F1F1111111111)) 
    \dwrEobuf[47]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[1]),
        .I3(klm[2]),
        .I4(\klm_reg[0]_0 ),
        .I5(\dwrEobuf_reg[63]_1 ),
        .O(\dwrEobuf[47]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5555555540554040)) 
    \dwrEobuf[47]_i_2 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(camifToVideoinAXIS_tdata[7]),
        .I2(klm[1]),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[23]),
        .I5(\dwrEobuf_reg[63]_0 ),
        .O(\dwrEobuf[47]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2968" *) 
  LUT5 #(
    .INIT(32'h00E0EEEE)) 
    \dwrEobuf[48]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(camifToVideoinAXIS_tdata[0]),
        .I3(klm[2]),
        .I4(\dwrEobuf[48]_i_2_n_0 ),
        .O(\dwrEobuf[48]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0BBB)) 
    \dwrEobuf[48]_i_2 
       (.I0(klm[1]),
        .I1(camifToVideoinAXIS_tdata[16]),
        .I2(camifToVideoinAXIS_tdata[8]),
        .I3(\klm_reg[0]_0 ),
        .O(\dwrEobuf[48]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2967" *) 
  LUT5 #(
    .INIT(32'h00E0EEEE)) 
    \dwrEobuf[49]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(camifToVideoinAXIS_tdata[1]),
        .I3(klm[2]),
        .I4(\dwrEobuf[49]_i_2_n_0 ),
        .O(\dwrEobuf[49]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0BBB)) 
    \dwrEobuf[49]_i_2 
       (.I0(klm[1]),
        .I1(camifToVideoinAXIS_tdata[17]),
        .I2(camifToVideoinAXIS_tdata[9]),
        .I3(\klm_reg[0]_0 ),
        .O(\dwrEobuf[49]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrEobuf[4]_i_1 
       (.I0(camifToVideoinAXIS_tdata[4]),
        .I1(klm[1]),
        .I2(dwrEobufp1[4]),
        .I3(\stateIgr_reg[1]_0 [0]),
        .I4(\stateIgr_reg[1]_0 [1]),
        .O(\dwrEobuf[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2966" *) 
  LUT5 #(
    .INIT(32'h00E0EEEE)) 
    \dwrEobuf[50]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(camifToVideoinAXIS_tdata[2]),
        .I3(klm[2]),
        .I4(\dwrEobuf[50]_i_2_n_0 ),
        .O(\dwrEobuf[50]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0BBB)) 
    \dwrEobuf[50]_i_2 
       (.I0(klm[1]),
        .I1(camifToVideoinAXIS_tdata[18]),
        .I2(camifToVideoinAXIS_tdata[10]),
        .I3(\klm_reg[0]_0 ),
        .O(\dwrEobuf[50]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2965" *) 
  LUT5 #(
    .INIT(32'h00E0EEEE)) 
    \dwrEobuf[51]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(camifToVideoinAXIS_tdata[3]),
        .I3(klm[2]),
        .I4(\dwrEobuf[51]_i_2_n_0 ),
        .O(\dwrEobuf[51]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0BBB)) 
    \dwrEobuf[51]_i_2 
       (.I0(klm[1]),
        .I1(camifToVideoinAXIS_tdata[19]),
        .I2(camifToVideoinAXIS_tdata[11]),
        .I3(\klm_reg[0]_0 ),
        .O(\dwrEobuf[51]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2964" *) 
  LUT5 #(
    .INIT(32'h00E0EEEE)) 
    \dwrEobuf[52]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(camifToVideoinAXIS_tdata[4]),
        .I3(klm[2]),
        .I4(\dwrEobuf[52]_i_2_n_0 ),
        .O(\dwrEobuf[52]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0BBB)) 
    \dwrEobuf[52]_i_2 
       (.I0(klm[1]),
        .I1(camifToVideoinAXIS_tdata[20]),
        .I2(camifToVideoinAXIS_tdata[12]),
        .I3(\klm_reg[0]_0 ),
        .O(\dwrEobuf[52]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2963" *) 
  LUT5 #(
    .INIT(32'h00E0EEEE)) 
    \dwrEobuf[53]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(camifToVideoinAXIS_tdata[5]),
        .I3(klm[2]),
        .I4(\dwrEobuf[53]_i_2_n_0 ),
        .O(\dwrEobuf[53]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0BBB)) 
    \dwrEobuf[53]_i_2 
       (.I0(klm[1]),
        .I1(camifToVideoinAXIS_tdata[21]),
        .I2(camifToVideoinAXIS_tdata[13]),
        .I3(\klm_reg[0]_0 ),
        .O(\dwrEobuf[53]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2962" *) 
  LUT5 #(
    .INIT(32'h00E0EEEE)) 
    \dwrEobuf[54]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(camifToVideoinAXIS_tdata[6]),
        .I3(klm[2]),
        .I4(\dwrEobuf[54]_i_2_n_0 ),
        .O(\dwrEobuf[54]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h0BBB)) 
    \dwrEobuf[54]_i_2 
       (.I0(klm[1]),
        .I1(camifToVideoinAXIS_tdata[22]),
        .I2(camifToVideoinAXIS_tdata[14]),
        .I3(\klm_reg[0]_0 ),
        .O(\dwrEobuf[54]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hF11111F11111F111)) 
    \dwrEobuf[55]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\dwrEobuf_reg[63]_1 ),
        .I3(klm[2]),
        .I4(\klm_reg[0]_0 ),
        .I5(klm[1]),
        .O(\dwrEobuf[55]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2961" *) 
  LUT5 #(
    .INIT(32'h00E0EEEE)) 
    \dwrEobuf[55]_i_2 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(camifToVideoinAXIS_tdata[7]),
        .I3(klm[2]),
        .I4(\dwrEobuf[55]_i_3_n_0 ),
        .O(\dwrEobuf[55]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h0BBB)) 
    \dwrEobuf[55]_i_3 
       (.I0(klm[1]),
        .I1(camifToVideoinAXIS_tdata[23]),
        .I2(camifToVideoinAXIS_tdata[15]),
        .I3(\klm_reg[0]_0 ),
        .O(\dwrEobuf[55]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h5454544444445444)) 
    \dwrEobuf[56]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(\dwrEobuf_reg[56]_0 ),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[0]),
        .I4(klm[1]),
        .I5(camifToVideoinAXIS_tdata[16]),
        .O(\dwrEobuf[56]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5454544444445444)) 
    \dwrEobuf[57]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(\dwrEobuf_reg[57]_0 ),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[1]),
        .I4(klm[1]),
        .I5(camifToVideoinAXIS_tdata[17]),
        .O(\dwrEobuf[57]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5454544444445444)) 
    \dwrEobuf[58]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(\dwrEobuf_reg[58]_0 ),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[2]),
        .I4(klm[1]),
        .I5(camifToVideoinAXIS_tdata[18]),
        .O(\dwrEobuf[58]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5454544444445444)) 
    \dwrEobuf[59]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(\dwrEobuf_reg[59]_0 ),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[3]),
        .I4(klm[1]),
        .I5(camifToVideoinAXIS_tdata[19]),
        .O(\dwrEobuf[59]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrEobuf[5]_i_1 
       (.I0(camifToVideoinAXIS_tdata[5]),
        .I1(klm[1]),
        .I2(dwrEobufp1[5]),
        .I3(\stateIgr_reg[1]_0 [0]),
        .I4(\stateIgr_reg[1]_0 [1]),
        .O(\dwrEobuf[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5454544444445444)) 
    \dwrEobuf[60]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(\dwrEobuf_reg[60]_0 ),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[4]),
        .I4(klm[1]),
        .I5(camifToVideoinAXIS_tdata[20]),
        .O(\dwrEobuf[60]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5454544444445444)) 
    \dwrEobuf[61]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(\dwrEobuf_reg[61]_0 ),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[5]),
        .I4(klm[1]),
        .I5(camifToVideoinAXIS_tdata[21]),
        .O(\dwrEobuf[61]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5454544444445444)) 
    \dwrEobuf[62]_i_1 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(\dwrEobuf_reg[62]_0 ),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[6]),
        .I4(klm[1]),
        .I5(camifToVideoinAXIS_tdata[22]),
        .O(\dwrEobuf[62]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hF11FF11111111111)) 
    \dwrEobuf[63]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(klm[2]),
        .I3(\klm_reg[0]_0 ),
        .I4(klm[1]),
        .I5(\dwrEobuf_reg[63]_1 ),
        .O(\dwrEobuf[63]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h5454544444445444)) 
    \dwrEobuf[63]_i_2 
       (.I0(\dwrEobufp1[7]_i_4_n_0 ),
        .I1(\dwrEobuf_reg[63]_0 ),
        .I2(klm[2]),
        .I3(camifToVideoinAXIS_tdata[7]),
        .I4(klm[1]),
        .I5(camifToVideoinAXIS_tdata[23]),
        .O(\dwrEobuf[63]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrEobuf[6]_i_1 
       (.I0(camifToVideoinAXIS_tdata[6]),
        .I1(klm[1]),
        .I2(dwrEobufp1[6]),
        .I3(\stateIgr_reg[1]_0 [0]),
        .I4(\stateIgr_reg[1]_0 [1]),
        .O(\dwrEobuf[6]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrEobuf[7]_i_1 
       (.I0(camifToVideoinAXIS_tdata[7]),
        .I1(klm[1]),
        .I2(dwrEobufp1[7]),
        .I3(\stateIgr_reg[1]_0 [0]),
        .I4(\stateIgr_reg[1]_0 [1]),
        .O(\dwrEobuf[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3044" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \dwrEobuf[8]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\dwrEobuf[8]_i_2_n_0 ),
        .O(\dwrEobuf[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0777077700000777)) 
    \dwrEobuf[8]_i_2 
       (.I0(camifToVideoinAXIS_tdata[0]),
        .I1(\klm_reg[0]_0 ),
        .I2(klm[2]),
        .I3(dwrEobufp1[8]),
        .I4(camifToVideoinAXIS_tdata[8]),
        .I5(klm[1]),
        .O(\dwrEobuf[8]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3043" *) 
  LUT3 #(
    .INIT(8'h0E)) 
    \dwrEobuf[9]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\dwrEobuf[9]_i_2_n_0 ),
        .O(\dwrEobuf[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0777077700000777)) 
    \dwrEobuf[9]_i_2 
       (.I0(camifToVideoinAXIS_tdata[1]),
        .I1(\klm_reg[0]_0 ),
        .I2(klm[2]),
        .I3(dwrEobufp1[9]),
        .I4(camifToVideoinAXIS_tdata[9]),
        .I5(klm[1]),
        .O(\dwrEobuf[9]_i_2_n_0 ));
  FDCE \dwrEobuf_reg[0] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[0]_i_1_n_0 ),
        .Q(dwrEobuf[0]));
  FDCE \dwrEobuf_reg[10] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[10]_i_1_n_0 ),
        .Q(dwrEobuf[10]));
  FDCE \dwrEobuf_reg[11] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[11]_i_1_n_0 ),
        .Q(dwrEobuf[11]));
  FDCE \dwrEobuf_reg[12] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[12]_i_1_n_0 ),
        .Q(dwrEobuf[12]));
  FDCE \dwrEobuf_reg[13] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[13]_i_1_n_0 ),
        .Q(dwrEobuf[13]));
  FDCE \dwrEobuf_reg[14] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[14]_i_1_n_0 ),
        .Q(dwrEobuf[14]));
  FDCE \dwrEobuf_reg[15] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[15]_i_1_n_0 ),
        .Q(dwrEobuf[15]));
  FDCE \dwrEobuf_reg[16] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[16]_i_1_n_0 ),
        .Q(dwrEobuf[16]));
  FDCE \dwrEobuf_reg[17] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[17]_i_1_n_0 ),
        .Q(dwrEobuf[17]));
  FDCE \dwrEobuf_reg[18] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[18]_i_1_n_0 ),
        .Q(dwrEobuf[18]));
  FDCE \dwrEobuf_reg[19] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[19]_i_1_n_0 ),
        .Q(dwrEobuf[19]));
  FDCE \dwrEobuf_reg[1] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[1]_i_1_n_0 ),
        .Q(dwrEobuf[1]));
  FDCE \dwrEobuf_reg[20] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[20]_i_1_n_0 ),
        .Q(dwrEobuf[20]));
  FDCE \dwrEobuf_reg[21] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[21]_i_1_n_0 ),
        .Q(dwrEobuf[21]));
  FDCE \dwrEobuf_reg[22] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[22]_i_1_n_0 ),
        .Q(dwrEobuf[22]));
  FDCE \dwrEobuf_reg[23] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[23]_i_2_n_0 ),
        .Q(dwrEobuf[23]));
  FDCE \dwrEobuf_reg[24] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[31]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[24]_i_1_n_0 ),
        .Q(dwrEobuf[24]));
  FDCE \dwrEobuf_reg[25] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[31]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[25]_i_1_n_0 ),
        .Q(dwrEobuf[25]));
  FDCE \dwrEobuf_reg[26] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[31]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[26]_i_1_n_0 ),
        .Q(dwrEobuf[26]));
  FDCE \dwrEobuf_reg[27] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[31]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[27]_i_1_n_0 ),
        .Q(dwrEobuf[27]));
  FDCE \dwrEobuf_reg[28] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[31]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[28]_i_1_n_0 ),
        .Q(dwrEobuf[28]));
  FDCE \dwrEobuf_reg[29] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[31]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[29]_i_1_n_0 ),
        .Q(dwrEobuf[29]));
  FDCE \dwrEobuf_reg[2] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[2]_i_1_n_0 ),
        .Q(dwrEobuf[2]));
  FDCE \dwrEobuf_reg[30] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[31]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[30]_i_1_n_0 ),
        .Q(dwrEobuf[30]));
  FDCE \dwrEobuf_reg[31] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[31]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[31]_i_2_n_0 ),
        .Q(dwrEobuf[31]));
  FDCE \dwrEobuf_reg[32] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[32]_i_1_n_0 ),
        .Q(dwrEobuf[32]));
  FDCE \dwrEobuf_reg[33] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[33]_i_1_n_0 ),
        .Q(dwrEobuf[33]));
  FDCE \dwrEobuf_reg[34] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[34]_i_1_n_0 ),
        .Q(dwrEobuf[34]));
  FDCE \dwrEobuf_reg[35] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[35]_i_1_n_0 ),
        .Q(dwrEobuf[35]));
  FDCE \dwrEobuf_reg[36] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[36]_i_1_n_0 ),
        .Q(dwrEobuf[36]));
  FDCE \dwrEobuf_reg[37] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[37]_i_1_n_0 ),
        .Q(dwrEobuf[37]));
  FDCE \dwrEobuf_reg[38] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[38]_i_1_n_0 ),
        .Q(dwrEobuf[38]));
  FDCE \dwrEobuf_reg[39] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[39]_i_2_n_0 ),
        .Q(dwrEobuf[39]));
  FDCE \dwrEobuf_reg[3] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[3]_i_1_n_0 ),
        .Q(dwrEobuf[3]));
  FDCE \dwrEobuf_reg[40] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[40]_i_1_n_0 ),
        .Q(dwrEobuf[40]));
  FDCE \dwrEobuf_reg[41] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[41]_i_1_n_0 ),
        .Q(dwrEobuf[41]));
  FDCE \dwrEobuf_reg[42] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[42]_i_1_n_0 ),
        .Q(dwrEobuf[42]));
  FDCE \dwrEobuf_reg[43] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[43]_i_1_n_0 ),
        .Q(dwrEobuf[43]));
  FDCE \dwrEobuf_reg[44] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[44]_i_1_n_0 ),
        .Q(dwrEobuf[44]));
  FDCE \dwrEobuf_reg[45] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[45]_i_1_n_0 ),
        .Q(dwrEobuf[45]));
  FDCE \dwrEobuf_reg[46] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[46]_i_1_n_0 ),
        .Q(dwrEobuf[46]));
  FDCE \dwrEobuf_reg[47] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[47]_i_2_n_0 ),
        .Q(dwrEobuf[47]));
  FDCE \dwrEobuf_reg[48] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[48]_i_1_n_0 ),
        .Q(dwrEobuf[48]));
  FDCE \dwrEobuf_reg[49] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[49]_i_1_n_0 ),
        .Q(dwrEobuf[49]));
  FDCE \dwrEobuf_reg[4] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[4]_i_1_n_0 ),
        .Q(dwrEobuf[4]));
  FDCE \dwrEobuf_reg[50] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[50]_i_1_n_0 ),
        .Q(dwrEobuf[50]));
  FDCE \dwrEobuf_reg[51] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[51]_i_1_n_0 ),
        .Q(dwrEobuf[51]));
  FDCE \dwrEobuf_reg[52] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[52]_i_1_n_0 ),
        .Q(dwrEobuf[52]));
  FDCE \dwrEobuf_reg[53] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[53]_i_1_n_0 ),
        .Q(dwrEobuf[53]));
  FDCE \dwrEobuf_reg[54] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[54]_i_1_n_0 ),
        .Q(dwrEobuf[54]));
  FDCE \dwrEobuf_reg[55] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[55]_i_2_n_0 ),
        .Q(dwrEobuf[55]));
  FDCE \dwrEobuf_reg[56] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[56]_i_1_n_0 ),
        .Q(dwrEobuf[56]));
  FDCE \dwrEobuf_reg[57] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[57]_i_1_n_0 ),
        .Q(dwrEobuf[57]));
  FDCE \dwrEobuf_reg[58] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[58]_i_1_n_0 ),
        .Q(dwrEobuf[58]));
  FDCE \dwrEobuf_reg[59] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[59]_i_1_n_0 ),
        .Q(dwrEobuf[59]));
  FDCE \dwrEobuf_reg[5] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[5]_i_1_n_0 ),
        .Q(dwrEobuf[5]));
  FDCE \dwrEobuf_reg[60] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[60]_i_1_n_0 ),
        .Q(dwrEobuf[60]));
  FDCE \dwrEobuf_reg[61] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[61]_i_1_n_0 ),
        .Q(dwrEobuf[61]));
  FDCE \dwrEobuf_reg[62] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[62]_i_1_n_0 ),
        .Q(dwrEobuf[62]));
  FDCE \dwrEobuf_reg[63] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[63]_i_2_n_0 ),
        .Q(dwrEobuf[63]));
  FDCE \dwrEobuf_reg[6] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[6]_i_1_n_0 ),
        .Q(dwrEobuf[6]));
  FDCE \dwrEobuf_reg[7] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[7]_i_1_n_0 ),
        .Q(dwrEobuf[7]));
  FDCE \dwrEobuf_reg[8] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[8]_i_1_n_0 ),
        .Q(dwrEobuf[8]));
  FDCE \dwrEobuf_reg[9] 
       (.C(aclk_sig),
        .CE(\dwrEobuf[23]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrEobuf[9]_i_1_n_0 ),
        .Q(dwrEobuf[9]));
  LUT6 #(
    .INIT(64'h00000000FFFB0008)) 
    \dwrEobufp1[0]_i_1 
       (.I0(camifToVideoinAXIS_tdata[16]),
        .I1(klm[1]),
        .I2(\klm_reg[0]_0 ),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[8]),
        .I5(\dwrEobufp1[7]_i_4_n_0 ),
        .O(dwrEobufp10_out[0]));
  (* SOFT_HLUTNM = "soft_lutpair3049" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrEobufp1[10]_i_1 
       (.I0(camifToVideoinAXIS_tdata[18]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(\stateIgr_reg[1]_0 [1]),
        .O(dwrEobufp10_out[10]));
  (* SOFT_HLUTNM = "soft_lutpair3048" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrEobufp1[11]_i_1 
       (.I0(camifToVideoinAXIS_tdata[19]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(\stateIgr_reg[1]_0 [1]),
        .O(dwrEobufp10_out[11]));
  (* SOFT_HLUTNM = "soft_lutpair3048" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrEobufp1[12]_i_1 
       (.I0(camifToVideoinAXIS_tdata[20]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(\stateIgr_reg[1]_0 [1]),
        .O(dwrEobufp10_out[12]));
  (* SOFT_HLUTNM = "soft_lutpair3047" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrEobufp1[13]_i_1 
       (.I0(camifToVideoinAXIS_tdata[21]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(\stateIgr_reg[1]_0 [1]),
        .O(dwrEobufp10_out[13]));
  (* SOFT_HLUTNM = "soft_lutpair3047" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrEobufp1[14]_i_1 
       (.I0(camifToVideoinAXIS_tdata[22]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(\stateIgr_reg[1]_0 [1]),
        .O(dwrEobufp10_out[14]));
  LUT6 #(
    .INIT(64'h1111F11111111111)) 
    \dwrEobufp1[15]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(\klm_reg[0]_0 ),
        .I3(klm[2]),
        .I4(klm[1]),
        .I5(\dwrEobuf_reg[63]_1 ),
        .O(\dwrEobufp1[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3044" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrEobufp1[15]_i_2 
       (.I0(camifToVideoinAXIS_tdata[23]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(\stateIgr_reg[1]_0 [1]),
        .O(dwrEobufp10_out[15]));
  LUT6 #(
    .INIT(64'h00000000FFFB0008)) 
    \dwrEobufp1[1]_i_1 
       (.I0(camifToVideoinAXIS_tdata[17]),
        .I1(klm[1]),
        .I2(\klm_reg[0]_0 ),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[9]),
        .I5(\dwrEobufp1[7]_i_4_n_0 ),
        .O(dwrEobufp10_out[1]));
  LUT6 #(
    .INIT(64'h00000000FFFB0008)) 
    \dwrEobufp1[2]_i_1 
       (.I0(camifToVideoinAXIS_tdata[18]),
        .I1(klm[1]),
        .I2(\klm_reg[0]_0 ),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[10]),
        .I5(\dwrEobufp1[7]_i_4_n_0 ),
        .O(dwrEobufp10_out[2]));
  LUT6 #(
    .INIT(64'h00000000FFFB0008)) 
    \dwrEobufp1[3]_i_1 
       (.I0(camifToVideoinAXIS_tdata[19]),
        .I1(klm[1]),
        .I2(\klm_reg[0]_0 ),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[11]),
        .I5(\dwrEobufp1[7]_i_4_n_0 ),
        .O(dwrEobufp10_out[3]));
  LUT6 #(
    .INIT(64'h00000000FFFB0008)) 
    \dwrEobufp1[4]_i_1 
       (.I0(camifToVideoinAXIS_tdata[20]),
        .I1(klm[1]),
        .I2(\klm_reg[0]_0 ),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[12]),
        .I5(\dwrEobufp1[7]_i_4_n_0 ),
        .O(dwrEobufp10_out[4]));
  LUT6 #(
    .INIT(64'h00000000FFFB0008)) 
    \dwrEobufp1[5]_i_1 
       (.I0(camifToVideoinAXIS_tdata[21]),
        .I1(klm[1]),
        .I2(\klm_reg[0]_0 ),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[13]),
        .I5(\dwrEobufp1[7]_i_4_n_0 ),
        .O(dwrEobufp10_out[5]));
  LUT6 #(
    .INIT(64'h00000000FFFB0008)) 
    \dwrEobufp1[6]_i_1 
       (.I0(camifToVideoinAXIS_tdata[22]),
        .I1(klm[1]),
        .I2(\klm_reg[0]_0 ),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[14]),
        .I5(\dwrEobufp1[7]_i_4_n_0 ),
        .O(dwrEobufp10_out[6]));
  LUT6 #(
    .INIT(64'h1F1111F111111111)) 
    \dwrEobufp1[7]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(klm[1]),
        .I3(\klm_reg[0]_0 ),
        .I4(klm[2]),
        .I5(\dwrEobuf_reg[63]_1 ),
        .O(\dwrEobufp1[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFFB0008)) 
    \dwrEobufp1[7]_i_2 
       (.I0(camifToVideoinAXIS_tdata[23]),
        .I1(klm[1]),
        .I2(\klm_reg[0]_0 ),
        .I3(klm[2]),
        .I4(camifToVideoinAXIS_tdata[15]),
        .I5(\dwrEobufp1[7]_i_4_n_0 ),
        .O(dwrEobufp10_out[7]));
  LUT2 #(
    .INIT(4'h1)) 
    \dwrEobufp1[7]_i_4 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .O(\dwrEobufp1[7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3050" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrEobufp1[8]_i_1 
       (.I0(camifToVideoinAXIS_tdata[16]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(\stateIgr_reg[1]_0 [1]),
        .O(dwrEobufp10_out[8]));
  (* SOFT_HLUTNM = "soft_lutpair3049" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrEobufp1[9]_i_1 
       (.I0(camifToVideoinAXIS_tdata[17]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(\stateIgr_reg[1]_0 [1]),
        .O(dwrEobufp10_out[9]));
  FDCE \dwrEobufp1_reg[0] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[0]),
        .Q(dwrEobufp1[0]));
  FDCE \dwrEobufp1_reg[10] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[15]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[10]),
        .Q(dwrEobufp1[10]));
  FDCE \dwrEobufp1_reg[11] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[15]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[11]),
        .Q(dwrEobufp1[11]));
  FDCE \dwrEobufp1_reg[12] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[15]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[12]),
        .Q(dwrEobufp1[12]));
  FDCE \dwrEobufp1_reg[13] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[15]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[13]),
        .Q(dwrEobufp1[13]));
  FDCE \dwrEobufp1_reg[14] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[15]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[14]),
        .Q(dwrEobufp1[14]));
  FDCE \dwrEobufp1_reg[15] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[15]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[15]),
        .Q(dwrEobufp1[15]));
  FDCE \dwrEobufp1_reg[1] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[1]),
        .Q(dwrEobufp1[1]));
  FDCE \dwrEobufp1_reg[2] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[2]),
        .Q(dwrEobufp1[2]));
  FDCE \dwrEobufp1_reg[3] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[3]),
        .Q(dwrEobufp1[3]));
  FDCE \dwrEobufp1_reg[4] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[4]),
        .Q(dwrEobufp1[4]));
  FDCE \dwrEobufp1_reg[5] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[5]),
        .Q(dwrEobufp1[5]));
  FDCE \dwrEobufp1_reg[6] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[6]),
        .Q(dwrEobufp1[6]));
  FDCE \dwrEobufp1_reg[7] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[7]),
        .Q(dwrEobufp1[7]));
  FDCE \dwrEobufp1_reg[8] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[15]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[8]),
        .Q(dwrEobufp1[8]));
  FDCE \dwrEobufp1_reg[9] 
       (.C(aclk_sig),
        .CE(\dwrEobufp1[15]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrEobufp10_out[9]),
        .Q(dwrEobufp1[9]));
  (* SOFT_HLUTNM = "soft_lutpair3010" *) 
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrRowbuf[0]_i_1__0 
       (.I0(p_14_in[0]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(dwrRowbufp1[0]),
        .I3(stateGraypack[0]),
        .I4(stateGraypack[1]),
        .O(\dwrRowbuf[0]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF10810000)) 
    \dwrRowbuf[11]_i_1__0 
       (.I0(\tuv_reg_n_0_[3] ),
        .I1(\tuv_reg_n_0_[0] ),
        .I2(\tuv_reg_n_0_[1] ),
        .I3(\tuv_reg_n_0_[2] ),
        .I4(\dwrRowbufp1[7]_i_4_n_0 ),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[11]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hAABAEBAAAAAAAAAA)) 
    \dwrRowbuf[15]_i_1__0 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[3] ),
        .I2(\tuv_reg_n_0_[1] ),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(\tuv_reg_n_0_[2] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[15]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hAABEABAAAAAAAAAA)) 
    \dwrRowbuf[19]_i_1__0 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[3] ),
        .I2(\tuv_reg_n_0_[1] ),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(\tuv_reg_n_0_[2] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[19]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3011" *) 
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrRowbuf[1]_i_1__0 
       (.I0(p_14_in[1]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(dwrRowbufp1[1]),
        .I3(stateGraypack[0]),
        .I4(stateGraypack[1]),
        .O(\dwrRowbuf[1]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hBAAEABAAAAAAAAAA)) 
    \dwrRowbuf[23]_i_1__0 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[3] ),
        .I2(\tuv_reg_n_0_[1] ),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(\tuv_reg_n_0_[2] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[23]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hBAAEABAAAAAAAAAA)) 
    \dwrRowbuf[27]_i_1__0 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[3] ),
        .I2(\tuv_reg_n_0_[0] ),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(\tuv_reg_n_0_[2] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[27]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrRowbuf[2]_i_1__0 
       (.I0(p_14_in[2]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(dwrRowbufp1[2]),
        .I3(stateGraypack[0]),
        .I4(stateGraypack[1]),
        .O(\dwrRowbuf[2]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hBAEAABAAAAAAAAAA)) 
    \dwrRowbuf[31]_i_1__0 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[3] ),
        .I2(\tuv_reg_n_0_[0] ),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(\tuv_reg_n_0_[2] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[31]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hAAEAABAEAAAAAAAA)) 
    \dwrRowbuf[35]_i_1 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[3] ),
        .I2(\tuv_reg_n_0_[2] ),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(\tuv_reg_n_0_[0] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[35]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAEBBAAAAAAAAAAA)) 
    \dwrRowbuf[39]_i_1 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[2] ),
        .I2(\tuv_reg_n_0_[0] ),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(\tuv_reg_n_0_[3] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[39]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrRowbuf[3]_i_1__0 
       (.I0(p_14_in[3]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(dwrRowbufp1[3]),
        .I3(stateGraypack[0]),
        .I4(stateGraypack[1]),
        .O(\dwrRowbuf[3]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hABEAAAAEAAAAAAAA)) 
    \dwrRowbuf[43]_i_1 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[3] ),
        .I2(\tuv_reg_n_0_[2] ),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(\tuv_reg_n_0_[1] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[43]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEBABAAAAAAAAAAA)) 
    \dwrRowbuf[47]_i_1 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[2] ),
        .I2(\tuv_reg_n_0_[0] ),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(\tuv_reg_n_0_[3] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[47]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[48]_i_1 
       (.I0(p_14_in[0]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(p_14_in[8]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[4]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[48]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[49]_i_1 
       (.I0(p_14_in[1]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(p_14_in[9]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[5]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[49]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[4]_i_1__0 
       (.I0(p_14_in[4]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(dwrRowbufp1[4]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[0]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[4]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[50]_i_1 
       (.I0(p_14_in[2]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(p_14_in[10]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[6]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[50]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEBAABAAAAAAAAAA)) 
    \dwrRowbuf[51]_i_1 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(\tuv_reg_n_0_[0] ),
        .I3(\tuv_reg_n_0_[2] ),
        .I4(\tuv_reg_n_0_[3] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[51]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[51]_i_2 
       (.I0(p_14_in[3]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(p_14_in[11]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[7]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[51]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \dwrRowbuf[52]_i_1 
       (.I0(p_14_in[4]),
        .I1(\tuv_reg_n_0_[0] ),
        .I2(p_14_in[8]),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(p_14_in[0]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[52]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \dwrRowbuf[53]_i_1 
       (.I0(p_14_in[5]),
        .I1(\tuv_reg_n_0_[0] ),
        .I2(p_14_in[9]),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(p_14_in[1]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[53]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \dwrRowbuf[54]_i_1 
       (.I0(p_14_in[6]),
        .I1(\tuv_reg_n_0_[0] ),
        .I2(p_14_in[10]),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(p_14_in[2]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[54]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEAABAAEAAAAAAAAA)) 
    \dwrRowbuf[55]_i_1 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[3] ),
        .I2(\tuv_reg_n_0_[0] ),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(\tuv_reg_n_0_[2] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[55]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \dwrRowbuf[55]_i_2 
       (.I0(p_14_in[7]),
        .I1(\tuv_reg_n_0_[0] ),
        .I2(p_14_in[11]),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(p_14_in[3]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[55]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[56]_i_1 
       (.I0(p_14_in[8]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(p_14_in[0]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[4]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[56]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[57]_i_1 
       (.I0(p_14_in[9]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(p_14_in[1]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[5]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[57]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[58]_i_1 
       (.I0(p_14_in[10]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(p_14_in[2]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[6]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[58]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEABAABAAAAAAAAAA)) 
    \dwrRowbuf[59]_i_1 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[0] ),
        .I2(\tuv_reg_n_0_[1] ),
        .I3(\tuv_reg_n_0_[2] ),
        .I4(\tuv_reg_n_0_[3] ),
        .I5(\dwrRowbufp1[7]_i_4_n_0 ),
        .O(\dwrRowbuf[59]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[59]_i_2 
       (.I0(p_14_in[11]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(p_14_in[3]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[7]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[59]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[5]_i_1__0 
       (.I0(p_14_in[5]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(dwrRowbufp1[5]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[1]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[5]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \dwrRowbuf[60]_i_1 
       (.I0(p_14_in[4]),
        .I1(\tuv_reg_n_0_[0] ),
        .I2(p_14_in[0]),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(p_14_in[8]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[60]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \dwrRowbuf[61]_i_1 
       (.I0(p_14_in[5]),
        .I1(\tuv_reg_n_0_[0] ),
        .I2(p_14_in[1]),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(p_14_in[9]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[61]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \dwrRowbuf[62]_i_1 
       (.I0(p_14_in[6]),
        .I1(\tuv_reg_n_0_[0] ),
        .I2(p_14_in[2]),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(p_14_in[10]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[62]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEAAAAEAAAAEAAAAA)) 
    \dwrRowbuf[63]_i_1 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\dwrRowbufp1[7]_i_4_n_0 ),
        .I2(\tuv_reg_n_0_[0] ),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(\tuv_reg_n_0_[2] ),
        .I5(\tuv_reg_n_0_[3] ),
        .O(\dwrRowbuf[63]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h00000000EEE222E2)) 
    \dwrRowbuf[63]_i_2 
       (.I0(p_14_in[7]),
        .I1(\tuv_reg_n_0_[0] ),
        .I2(p_14_in[3]),
        .I3(\tuv_reg_n_0_[1] ),
        .I4(p_14_in[11]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[63]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[6]_i_1__0 
       (.I0(p_14_in[6]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(dwrRowbufp1[6]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[2]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[6]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h00000000FFE200E2)) 
    \dwrRowbuf[7]_i_1__0 
       (.I0(p_14_in[7]),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(dwrRowbufp1[7]),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(p_14_in[3]),
        .I5(\dwrRowbufp1[7]_i_3_n_0 ),
        .O(\dwrRowbuf[7]_i_1__0_n_0 ));
  FDCE \dwrRowbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[0]_i_1__0_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[0] ));
  FDCE \dwrRowbuf_reg[10] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[58]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[10] ));
  FDCE \dwrRowbuf_reg[11] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[59]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[11] ));
  FDCE \dwrRowbuf_reg[12] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[15]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[60]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[12] ));
  FDCE \dwrRowbuf_reg[13] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[15]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[61]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[13] ));
  FDCE \dwrRowbuf_reg[14] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[15]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[62]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[14] ));
  FDCE \dwrRowbuf_reg[15] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[15]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[63]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[15] ));
  FDCE \dwrRowbuf_reg[16] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[19]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[48]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[16] ));
  FDCE \dwrRowbuf_reg[17] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[19]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[49]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[17] ));
  FDCE \dwrRowbuf_reg[18] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[19]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[50]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[18] ));
  FDCE \dwrRowbuf_reg[19] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[19]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[51]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[19] ));
  FDCE \dwrRowbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[1]_i_1__0_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[1] ));
  FDCE \dwrRowbuf_reg[20] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[23]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[52]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[20] ));
  FDCE \dwrRowbuf_reg[21] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[23]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[53]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[21] ));
  FDCE \dwrRowbuf_reg[22] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[23]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[54]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[22] ));
  FDCE \dwrRowbuf_reg[23] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[23]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[55]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[23] ));
  FDCE \dwrRowbuf_reg[24] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[27]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[56]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[24] ));
  FDCE \dwrRowbuf_reg[25] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[27]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[57]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[25] ));
  FDCE \dwrRowbuf_reg[26] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[27]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[58]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[26] ));
  FDCE \dwrRowbuf_reg[27] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[27]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[59]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[27] ));
  FDCE \dwrRowbuf_reg[28] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[60]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[28] ));
  FDCE \dwrRowbuf_reg[29] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[61]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[29] ));
  FDCE \dwrRowbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[2]_i_1__0_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[2] ));
  FDCE \dwrRowbuf_reg[30] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[62]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[30] ));
  FDCE \dwrRowbuf_reg[31] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[31]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[63]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[31] ));
  FDCE \dwrRowbuf_reg[32] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[35]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[48]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[32] ));
  FDCE \dwrRowbuf_reg[33] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[35]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[49]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[33] ));
  FDCE \dwrRowbuf_reg[34] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[35]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[50]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[34] ));
  FDCE \dwrRowbuf_reg[35] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[35]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[51]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[35] ));
  FDCE \dwrRowbuf_reg[36] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[52]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[36] ));
  FDCE \dwrRowbuf_reg[37] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[53]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[37] ));
  FDCE \dwrRowbuf_reg[38] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[54]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[38] ));
  FDCE \dwrRowbuf_reg[39] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[39]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[55]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[39] ));
  FDCE \dwrRowbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[3]_i_1__0_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[3] ));
  FDCE \dwrRowbuf_reg[40] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[43]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[56]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[40] ));
  FDCE \dwrRowbuf_reg[41] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[43]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[57]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[41] ));
  FDCE \dwrRowbuf_reg[42] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[43]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[58]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[42] ));
  FDCE \dwrRowbuf_reg[43] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[43]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[59]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[43] ));
  FDCE \dwrRowbuf_reg[44] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[60]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[44] ));
  FDCE \dwrRowbuf_reg[45] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[61]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[45] ));
  FDCE \dwrRowbuf_reg[46] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[62]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[46] ));
  FDCE \dwrRowbuf_reg[47] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[47]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[63]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[47] ));
  FDCE \dwrRowbuf_reg[48] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[51]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[48]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[48] ));
  FDCE \dwrRowbuf_reg[49] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[51]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[49]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[49] ));
  FDCE \dwrRowbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[4]_i_1__0_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[4] ));
  FDCE \dwrRowbuf_reg[50] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[51]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[50]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[50] ));
  FDCE \dwrRowbuf_reg[51] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[51]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[51]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[51] ));
  FDCE \dwrRowbuf_reg[52] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[52]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[52] ));
  FDCE \dwrRowbuf_reg[53] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[53]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[53] ));
  FDCE \dwrRowbuf_reg[54] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[54]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[54] ));
  FDCE \dwrRowbuf_reg[55] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[55]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[55]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[55] ));
  FDCE \dwrRowbuf_reg[56] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[59]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[56]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[56] ));
  FDCE \dwrRowbuf_reg[57] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[59]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[57]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[57] ));
  FDCE \dwrRowbuf_reg[58] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[59]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[58]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[58] ));
  FDCE \dwrRowbuf_reg[59] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[59]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[59]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[59] ));
  FDCE \dwrRowbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[5]_i_1__0_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[5] ));
  FDCE \dwrRowbuf_reg[60] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[60]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[60] ));
  FDCE \dwrRowbuf_reg[61] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[61]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[61] ));
  FDCE \dwrRowbuf_reg[62] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[62]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[62] ));
  FDCE \dwrRowbuf_reg[63] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[63]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[63]_i_2_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[63] ));
  FDCE \dwrRowbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[6]_i_1__0_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[6] ));
  FDCE \dwrRowbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[7]_i_1__0_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[7] ));
  FDCE \dwrRowbuf_reg[8] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[56]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[8] ));
  FDCE \dwrRowbuf_reg[9] 
       (.C(aclk_sig),
        .CE(\dwrRowbuf[11]_i_1__0_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\dwrRowbuf[57]_i_1_n_0 ),
        .Q(\dwrRowbuf_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair3009" *) 
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrRowbufp1[0]_i_1 
       (.I0(p_14_in[8]),
        .I1(\dwrRowbufp1[3]_i_3_n_0 ),
        .I2(p_14_in[4]),
        .I3(stateGraypack[0]),
        .I4(stateGraypack[1]),
        .O(dwrRowbufp10_out[0]));
  (* SOFT_HLUTNM = "soft_lutpair3008" *) 
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrRowbufp1[1]_i_1 
       (.I0(p_14_in[9]),
        .I1(\dwrRowbufp1[3]_i_3_n_0 ),
        .I2(p_14_in[5]),
        .I3(stateGraypack[0]),
        .I4(stateGraypack[1]),
        .O(dwrRowbufp10_out[1]));
  (* SOFT_HLUTNM = "soft_lutpair3007" *) 
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrRowbufp1[2]_i_1 
       (.I0(p_14_in[10]),
        .I1(\dwrRowbufp1[3]_i_3_n_0 ),
        .I2(p_14_in[6]),
        .I3(stateGraypack[0]),
        .I4(stateGraypack[1]),
        .O(dwrRowbufp10_out[2]));
  LUT6 #(
    .INIT(64'hAAAABAAAAAEAAAAA)) 
    \dwrRowbufp1[3]_i_1 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\tuv_reg_n_0_[3] ),
        .I2(\dwrRowbufp1[7]_i_4_n_0 ),
        .I3(\tuv_reg_n_0_[2] ),
        .I4(\tuv_reg_n_0_[1] ),
        .I5(\tuv_reg_n_0_[0] ),
        .O(\dwrRowbufp1[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3006" *) 
  LUT5 #(
    .INIT(32'hE2E2E200)) 
    \dwrRowbufp1[3]_i_2 
       (.I0(p_14_in[11]),
        .I1(\dwrRowbufp1[3]_i_3_n_0 ),
        .I2(p_14_in[7]),
        .I3(stateGraypack[0]),
        .I4(stateGraypack[1]),
        .O(dwrRowbufp10_out[3]));
  (* SOFT_HLUTNM = "soft_lutpair3017" *) 
  LUT4 #(
    .INIT(16'h0400)) 
    \dwrRowbufp1[3]_i_3 
       (.I0(\tuv_reg_n_0_[3] ),
        .I1(\tuv_reg_n_0_[2] ),
        .I2(\tuv_reg_n_0_[1] ),
        .I3(\tuv_reg_n_0_[0] ),
        .O(\dwrRowbufp1[3]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3009" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrRowbufp1[4]_i_1 
       (.I0(p_14_in[8]),
        .I1(stateGraypack[0]),
        .I2(stateGraypack[1]),
        .O(dwrRowbufp10_out[4]));
  (* SOFT_HLUTNM = "soft_lutpair3008" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrRowbufp1[5]_i_1 
       (.I0(p_14_in[9]),
        .I1(stateGraypack[0]),
        .I2(stateGraypack[1]),
        .O(dwrRowbufp10_out[5]));
  (* SOFT_HLUTNM = "soft_lutpair3007" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrRowbufp1[6]_i_1 
       (.I0(p_14_in[10]),
        .I1(stateGraypack[0]),
        .I2(stateGraypack[1]),
        .O(dwrRowbufp10_out[6]));
  LUT6 #(
    .INIT(64'hAAAAAEAAAAAAAAAA)) 
    \dwrRowbufp1[7]_i_1 
       (.I0(\dwrRowbufp1[7]_i_3_n_0 ),
        .I1(\dwrRowbufp1[7]_i_4_n_0 ),
        .I2(\tuv_reg_n_0_[3] ),
        .I3(\tuv_reg_n_0_[2] ),
        .I4(\tuv_reg_n_0_[1] ),
        .I5(\tuv_reg_n_0_[0] ),
        .O(\dwrRowbufp1[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3006" *) 
  LUT3 #(
    .INIT(8'hA8)) 
    \dwrRowbufp1[7]_i_2 
       (.I0(p_14_in[11]),
        .I1(stateGraypack[0]),
        .I2(stateGraypack[1]),
        .O(dwrRowbufp10_out[7]));
  LUT2 #(
    .INIT(4'h1)) 
    \dwrRowbufp1[7]_i_3 
       (.I0(stateGraypack[1]),
        .I1(stateGraypack[0]),
        .O(\dwrRowbufp1[7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3053" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrRowbufp1[7]_i_4 
       (.I0(rgbVideoinToManyAXIS_tvalid),
        .I1(stateGraypack[0]),
        .O(\dwrRowbufp1[7]_i_4_n_0 ));
  FDCE \dwrRowbufp1_reg[0] 
       (.C(aclk_sig),
        .CE(\dwrRowbufp1[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrRowbufp10_out[0]),
        .Q(dwrRowbufp1[0]));
  FDCE \dwrRowbufp1_reg[1] 
       (.C(aclk_sig),
        .CE(\dwrRowbufp1[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrRowbufp10_out[1]),
        .Q(dwrRowbufp1[1]));
  FDCE \dwrRowbufp1_reg[2] 
       (.C(aclk_sig),
        .CE(\dwrRowbufp1[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrRowbufp10_out[2]),
        .Q(dwrRowbufp1[2]));
  FDCE \dwrRowbufp1_reg[3] 
       (.C(aclk_sig),
        .CE(\dwrRowbufp1[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrRowbufp10_out[3]),
        .Q(dwrRowbufp1[3]));
  FDCE \dwrRowbufp1_reg[4] 
       (.C(aclk_sig),
        .CE(\dwrRowbufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrRowbufp10_out[4]),
        .Q(dwrRowbufp1[4]));
  FDCE \dwrRowbufp1_reg[5] 
       (.C(aclk_sig),
        .CE(\dwrRowbufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrRowbufp10_out[5]),
        .Q(dwrRowbufp1[5]));
  FDCE \dwrRowbufp1_reg[6] 
       (.C(aclk_sig),
        .CE(\dwrRowbufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrRowbufp10_out[6]),
        .Q(dwrRowbufp1[6]));
  FDCE \dwrRowbufp1_reg[7] 
       (.C(aclk_sig),
        .CE(\dwrRowbufp1[7]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(dwrRowbufp10_out[7]),
        .Q(dwrRowbufp1[7]));
  (* SOFT_HLUTNM = "soft_lutpair3045" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \dy[0]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [8]),
        .I2(\abcde_reg[0]_0 [0]),
        .O(\abcde_reg[0]_1 [0]));
  (* SOFT_HLUTNM = "soft_lutpair2988" *) 
  LUT5 #(
    .INIT(32'h28228288)) 
    \dy[10]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [9]),
        .I2(\abcde_reg[0]_0 [8]),
        .I3(\abcde_reg[0]_0 [16]),
        .I4(\abcde_reg[0]_0 [17]),
        .O(\abcde_reg[0]_1 [10]));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[11]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [10]),
        .I2(\abcde_reg[0]_0 [18]),
        .I3(\dy[11]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [11]));
  (* SOFT_HLUTNM = "soft_lutpair2988" *) 
  LUT4 #(
    .INIT(16'h8AEF)) 
    \dy[11]_i_2 
       (.I0(\abcde_reg[0]_0 [9]),
        .I1(\abcde_reg[0]_0 [8]),
        .I2(\abcde_reg[0]_0 [16]),
        .I3(\abcde_reg[0]_0 [17]),
        .O(\dy[11]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[12]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [11]),
        .I2(\abcde_reg[0]_0 [19]),
        .I3(\dy[13]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [12]));
  LUT6 #(
    .INIT(64'h2882828228282882)) 
    \dy[13]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [12]),
        .I2(\abcde_reg[0]_0 [20]),
        .I3(\dy[13]_i_2_n_0 ),
        .I4(\abcde_reg[0]_0 [11]),
        .I5(\abcde_reg[0]_0 [19]),
        .O(\abcde_reg[0]_1 [13]));
  LUT6 #(
    .INIT(64'hF7510000FFFFF751)) 
    \dy[13]_i_2 
       (.I0(\abcde_reg[0]_0 [17]),
        .I1(\abcde_reg[0]_0 [16]),
        .I2(\abcde_reg[0]_0 [8]),
        .I3(\abcde_reg[0]_0 [9]),
        .I4(\abcde_reg[0]_0 [10]),
        .I5(\abcde_reg[0]_0 [18]),
        .O(\dy[13]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[14]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [13]),
        .I2(\abcde_reg[0]_0 [21]),
        .I3(\dy[15]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [14]));
  LUT6 #(
    .INIT(64'h2882828228282882)) 
    \dy[15]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [14]),
        .I2(\abcde_reg[0]_0 [22]),
        .I3(\dy[15]_i_2_n_0 ),
        .I4(\abcde_reg[0]_0 [13]),
        .I5(\abcde_reg[0]_0 [21]),
        .O(\abcde_reg[0]_1 [15]));
  LUT5 #(
    .INIT(32'hD400FFD4)) 
    \dy[15]_i_2 
       (.I0(\abcde_reg[0]_0 [19]),
        .I1(\abcde_reg[0]_0 [11]),
        .I2(\dy[13]_i_2_n_0 ),
        .I3(\abcde_reg[0]_0 [12]),
        .I4(\abcde_reg[0]_0 [20]),
        .O(\dy[15]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3028" *) 
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[16]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [15]),
        .I2(\abcde_reg[0]_0 [23]),
        .I3(\dy[17]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [16]));
  (* SOFT_HLUTNM = "soft_lutpair3028" *) 
  LUT4 #(
    .INIT(16'h7010)) 
    \dy[17]_i_1 
       (.I0(\dy[17]_i_2_n_0 ),
        .I1(\abcde_reg[0]_0 [15]),
        .I2(\dy_reg[8] ),
        .I3(\abcde_reg[0]_0 [23]),
        .O(\abcde_reg[0]_1 [17]));
  LUT5 #(
    .INIT(32'hD400FFD4)) 
    \dy[17]_i_2 
       (.I0(\abcde_reg[0]_0 [21]),
        .I1(\abcde_reg[0]_0 [13]),
        .I2(\dy[15]_i_2_n_0 ),
        .I3(\abcde_reg[0]_0 [14]),
        .I4(\abcde_reg[0]_0 [22]),
        .O(\dy[17]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3046" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \dy[18]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [24]),
        .I2(\abcde_reg[0]_0 [16]),
        .O(\abcde_reg[0]_1 [18]));
  (* SOFT_HLUTNM = "soft_lutpair2989" *) 
  LUT5 #(
    .INIT(32'h28228288)) 
    \dy[19]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [17]),
        .I2(\abcde_reg[0]_0 [16]),
        .I3(\abcde_reg[0]_0 [24]),
        .I4(\abcde_reg[0]_0 [25]),
        .O(\abcde_reg[0]_1 [19]));
  (* SOFT_HLUTNM = "soft_lutpair2987" *) 
  LUT5 #(
    .INIT(32'h28228288)) 
    \dy[1]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [1]),
        .I2(\abcde_reg[0]_0 [0]),
        .I3(\abcde_reg[0]_0 [8]),
        .I4(\abcde_reg[0]_0 [9]),
        .O(\abcde_reg[0]_1 [1]));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[20]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [18]),
        .I2(\abcde_reg[0]_0 [26]),
        .I3(\dy[20]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [20]));
  (* SOFT_HLUTNM = "soft_lutpair2989" *) 
  LUT4 #(
    .INIT(16'h8AEF)) 
    \dy[20]_i_2 
       (.I0(\abcde_reg[0]_0 [17]),
        .I1(\abcde_reg[0]_0 [16]),
        .I2(\abcde_reg[0]_0 [24]),
        .I3(\abcde_reg[0]_0 [25]),
        .O(\dy[20]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[21]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [19]),
        .I2(\abcde_reg[0]_0 [27]),
        .I3(\dy[22]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [21]));
  LUT6 #(
    .INIT(64'h2882828228282882)) 
    \dy[22]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [20]),
        .I2(\abcde_reg[0]_0 [28]),
        .I3(\dy[22]_i_2_n_0 ),
        .I4(\abcde_reg[0]_0 [19]),
        .I5(\abcde_reg[0]_0 [27]),
        .O(\abcde_reg[0]_1 [22]));
  LUT6 #(
    .INIT(64'hF7510000FFFFF751)) 
    \dy[22]_i_2 
       (.I0(\abcde_reg[0]_0 [25]),
        .I1(\abcde_reg[0]_0 [24]),
        .I2(\abcde_reg[0]_0 [16]),
        .I3(\abcde_reg[0]_0 [17]),
        .I4(\abcde_reg[0]_0 [18]),
        .I5(\abcde_reg[0]_0 [26]),
        .O(\dy[22]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[23]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [21]),
        .I2(\abcde_reg[0]_0 [29]),
        .I3(\dy[24]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [23]));
  LUT6 #(
    .INIT(64'h2882828228282882)) 
    \dy[24]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [22]),
        .I2(\abcde_reg[0]_0 [30]),
        .I3(\dy[24]_i_2_n_0 ),
        .I4(\abcde_reg[0]_0 [21]),
        .I5(\abcde_reg[0]_0 [29]),
        .O(\abcde_reg[0]_1 [24]));
  LUT5 #(
    .INIT(32'hD400FFD4)) 
    \dy[24]_i_2 
       (.I0(\abcde_reg[0]_0 [27]),
        .I1(\abcde_reg[0]_0 [19]),
        .I2(\dy[22]_i_2_n_0 ),
        .I3(\abcde_reg[0]_0 [20]),
        .I4(\abcde_reg[0]_0 [28]),
        .O(\dy[24]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3029" *) 
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[25]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [23]),
        .I2(\abcde_reg[0]_0 [31]),
        .I3(\dy[26]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [25]));
  (* SOFT_HLUTNM = "soft_lutpair3029" *) 
  LUT4 #(
    .INIT(16'h7010)) 
    \dy[26]_i_1 
       (.I0(\dy[26]_i_2_n_0 ),
        .I1(\abcde_reg[0]_0 [23]),
        .I2(\dy_reg[8] ),
        .I3(\abcde_reg[0]_0 [31]),
        .O(\abcde_reg[0]_1 [26]));
  LUT5 #(
    .INIT(32'hD400FFD4)) 
    \dy[26]_i_2 
       (.I0(\abcde_reg[0]_0 [29]),
        .I1(\abcde_reg[0]_0 [21]),
        .I2(\dy[24]_i_2_n_0 ),
        .I3(\abcde_reg[0]_0 [22]),
        .I4(\abcde_reg[0]_0 [30]),
        .O(\dy[26]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3046" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \dy[27]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [32]),
        .I2(\abcde_reg[0]_0 [24]),
        .O(\abcde_reg[0]_1 [27]));
  (* SOFT_HLUTNM = "soft_lutpair2990" *) 
  LUT5 #(
    .INIT(32'h28228288)) 
    \dy[28]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [25]),
        .I2(\abcde_reg[0]_0 [24]),
        .I3(\abcde_reg[0]_0 [32]),
        .I4(\abcde_reg[0]_0 [33]),
        .O(\abcde_reg[0]_1 [28]));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[29]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [26]),
        .I2(\abcde_reg[0]_0 [34]),
        .I3(\dy[29]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [29]));
  (* SOFT_HLUTNM = "soft_lutpair2990" *) 
  LUT4 #(
    .INIT(16'h8AEF)) 
    \dy[29]_i_2 
       (.I0(\abcde_reg[0]_0 [25]),
        .I1(\abcde_reg[0]_0 [24]),
        .I2(\abcde_reg[0]_0 [32]),
        .I3(\abcde_reg[0]_0 [33]),
        .O(\dy[29]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[2]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [2]),
        .I2(\abcde_reg[0]_0 [10]),
        .I3(\dy[2]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [2]));
  (* SOFT_HLUTNM = "soft_lutpair2987" *) 
  LUT4 #(
    .INIT(16'h8AEF)) 
    \dy[2]_i_2 
       (.I0(\abcde_reg[0]_0 [1]),
        .I1(\abcde_reg[0]_0 [0]),
        .I2(\abcde_reg[0]_0 [8]),
        .I3(\abcde_reg[0]_0 [9]),
        .O(\dy[2]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[30]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [27]),
        .I2(\abcde_reg[0]_0 [35]),
        .I3(\dy[31]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [30]));
  LUT6 #(
    .INIT(64'h2882828228282882)) 
    \dy[31]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [28]),
        .I2(\abcde_reg[0]_0 [36]),
        .I3(\dy[31]_i_2_n_0 ),
        .I4(\abcde_reg[0]_0 [27]),
        .I5(\abcde_reg[0]_0 [35]),
        .O(\abcde_reg[0]_1 [31]));
  LUT6 #(
    .INIT(64'hF7510000FFFFF751)) 
    \dy[31]_i_2 
       (.I0(\abcde_reg[0]_0 [33]),
        .I1(\abcde_reg[0]_0 [32]),
        .I2(\abcde_reg[0]_0 [24]),
        .I3(\abcde_reg[0]_0 [25]),
        .I4(\abcde_reg[0]_0 [26]),
        .I5(\abcde_reg[0]_0 [34]),
        .O(\dy[31]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[32]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [29]),
        .I2(\abcde_reg[0]_0 [37]),
        .I3(\dy[33]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [32]));
  LUT6 #(
    .INIT(64'h2882828228282882)) 
    \dy[33]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [30]),
        .I2(\abcde_reg[0]_0 [38]),
        .I3(\dy[33]_i_2_n_0 ),
        .I4(\abcde_reg[0]_0 [29]),
        .I5(\abcde_reg[0]_0 [37]),
        .O(\abcde_reg[0]_1 [33]));
  LUT5 #(
    .INIT(32'hD400FFD4)) 
    \dy[33]_i_2 
       (.I0(\abcde_reg[0]_0 [35]),
        .I1(\abcde_reg[0]_0 [27]),
        .I2(\dy[31]_i_2_n_0 ),
        .I3(\abcde_reg[0]_0 [28]),
        .I4(\abcde_reg[0]_0 [36]),
        .O(\dy[33]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3030" *) 
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[34]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [31]),
        .I2(\abcde_reg[0]_0 [39]),
        .I3(\dy[35]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [34]));
  (* SOFT_HLUTNM = "soft_lutpair3030" *) 
  LUT4 #(
    .INIT(16'h7010)) 
    \dy[35]_i_1 
       (.I0(\dy[35]_i_2_n_0 ),
        .I1(\abcde_reg[0]_0 [31]),
        .I2(\dy_reg[8] ),
        .I3(\abcde_reg[0]_0 [39]),
        .O(\abcde_reg[0]_1 [35]));
  LUT5 #(
    .INIT(32'hD400FFD4)) 
    \dy[35]_i_2 
       (.I0(\abcde_reg[0]_0 [37]),
        .I1(\abcde_reg[0]_0 [29]),
        .I2(\dy[33]_i_2_n_0 ),
        .I3(\abcde_reg[0]_0 [30]),
        .I4(\abcde_reg[0]_0 [38]),
        .O(\dy[35]_i_2_n_0 ));
  LUT3 #(
    .INIT(8'h28)) 
    \dy[36]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(grayVideoinToManyAXIS_tdata[64]),
        .I2(\abcde_reg[0]_0 [32]),
        .O(\abcde_reg[0]_1 [36]));
  (* SOFT_HLUTNM = "soft_lutpair2991" *) 
  LUT5 #(
    .INIT(32'h28288228)) 
    \dy[37]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [33]),
        .I2(grayVideoinToManyAXIS_tdata[65]),
        .I3(grayVideoinToManyAXIS_tdata[64]),
        .I4(\abcde_reg[0]_0 [32]),
        .O(\abcde_reg[0]_1 [37]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dy[37]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr4_reg_n_0_[5] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[25]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[17]_i_3_n_0 ),
        .O(grayVideoinToManyAXIS_tdata[65]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dy[37]_i_3 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr4_reg_n_0_[4] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[24]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[16]_i_3_n_0 ),
        .O(grayVideoinToManyAXIS_tdata[64]));
  LUT4 #(
    .INIT(16'h8228)) 
    \dy[38]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [34]),
        .I2(grayVideoinToManyAXIS_tdata[66]),
        .I3(\dy[38]_i_3_n_0 ),
        .O(\abcde_reg[0]_1 [38]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dy[38]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr4_reg_n_0_[6] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[26]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[18]_i_3_n_0 ),
        .O(grayVideoinToManyAXIS_tdata[66]));
  (* SOFT_HLUTNM = "soft_lutpair2991" *) 
  LUT4 #(
    .INIT(16'h2B22)) 
    \dy[38]_i_3 
       (.I0(grayVideoinToManyAXIS_tdata[65]),
        .I1(\abcde_reg[0]_0 [33]),
        .I2(\abcde_reg[0]_0 [32]),
        .I3(grayVideoinToManyAXIS_tdata[64]),
        .O(\dy[38]_i_3_n_0 ));
  LUT4 #(
    .INIT(16'h8228)) 
    \dy[39]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [35]),
        .I2(grayVideoinToManyAXIS_tdata[67]),
        .I3(\dy[40]_i_4_n_0 ),
        .O(\abcde_reg[0]_1 [39]));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[3]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [3]),
        .I2(\abcde_reg[0]_0 [11]),
        .I3(\dy[4]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [3]));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dy[40]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [36]),
        .I2(grayVideoinToManyAXIS_tdata[68]),
        .I3(grayVideoinToManyAXIS_tdata[67]),
        .I4(\abcde_reg[0]_0 [35]),
        .I5(\dy[40]_i_4_n_0 ),
        .O(\abcde_reg[0]_1 [40]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dy[40]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr4_reg_n_0_[8] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[28]_i_4_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[20]_i_3_n_0 ),
        .O(grayVideoinToManyAXIS_tdata[68]));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dy[40]_i_3 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr4_reg_n_0_[7] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[19]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[27]_i_4_n_0 ),
        .O(grayVideoinToManyAXIS_tdata[67]));
  LUT6 #(
    .INIT(64'h22B2BBBB222222B2)) 
    \dy[40]_i_4 
       (.I0(grayVideoinToManyAXIS_tdata[66]),
        .I1(\abcde_reg[0]_0 [34]),
        .I2(grayVideoinToManyAXIS_tdata[64]),
        .I3(\abcde_reg[0]_0 [32]),
        .I4(\abcde_reg[0]_0 [33]),
        .I5(grayVideoinToManyAXIS_tdata[65]),
        .O(\dy[40]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'h8228)) 
    \dy[41]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [37]),
        .I2(grayVideoinToManyAXIS_tdata[69]),
        .I3(\dy[42]_i_4_n_0 ),
        .O(\abcde_reg[0]_1 [41]));
  LUT6 #(
    .INIT(64'h8228828228288228)) 
    \dy[42]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [38]),
        .I2(grayVideoinToManyAXIS_tdata[70]),
        .I3(grayVideoinToManyAXIS_tdata[69]),
        .I4(\abcde_reg[0]_0 [37]),
        .I5(\dy[42]_i_4_n_0 ),
        .O(\abcde_reg[0]_1 [42]));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dy[42]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr4_reg_n_0_[10] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[22]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[30]_i_4_n_0 ),
        .O(grayVideoinToManyAXIS_tdata[70]));
  LUT6 #(
    .INIT(64'h0F0F4F4000004F40)) 
    \dy[42]_i_3 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr4_reg_n_0_[9] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[21]_i_3_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[29]_i_4_n_0 ),
        .O(grayVideoinToManyAXIS_tdata[69]));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dy[42]_i_4 
       (.I0(grayVideoinToManyAXIS_tdata[68]),
        .I1(\abcde_reg[0]_0 [36]),
        .I2(\dy[40]_i_4_n_0 ),
        .I3(\abcde_reg[0]_0 [35]),
        .I4(grayVideoinToManyAXIS_tdata[67]),
        .O(\dy[42]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3031" *) 
  LUT4 #(
    .INIT(16'h8228)) 
    \dy[43]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [39]),
        .I2(grayVideoinToManyAXIS_tdata[71]),
        .I3(\dy[44]_i_3_n_0 ),
        .O(\abcde_reg[0]_1 [43]));
  (* SOFT_HLUTNM = "soft_lutpair3031" *) 
  LUT4 #(
    .INIT(16'h8C08)) 
    \dy[44]_i_1 
       (.I0(grayVideoinToManyAXIS_tdata[71]),
        .I1(\dy_reg[8] ),
        .I2(\abcde_reg[0]_0 [39]),
        .I3(\dy[44]_i_3_n_0 ),
        .O(\abcde_reg[0]_1 [44]));
  LUT6 #(
    .INIT(64'h0F004F4F0F004040)) 
    \dy[44]_i_2 
       (.I0(\abcde_reg_n_0_[0] ),
        .I1(\gr4_reg_n_0_[11] ),
        .I2(\abcde_reg_n_0_[2] ),
        .I3(\dIgrm1[31]_i_4_n_0 ),
        .I4(\abcde_reg_n_0_[1] ),
        .I5(\dIgrm1[23]_i_3_n_0 ),
        .O(grayVideoinToManyAXIS_tdata[71]));
  LUT5 #(
    .INIT(32'hB2BB22B2)) 
    \dy[44]_i_3 
       (.I0(grayVideoinToManyAXIS_tdata[70]),
        .I1(\abcde_reg[0]_0 [38]),
        .I2(\dy[42]_i_4_n_0 ),
        .I3(\abcde_reg[0]_0 [37]),
        .I4(grayVideoinToManyAXIS_tdata[69]),
        .O(\dy[44]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h2882828228282882)) 
    \dy[4]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [4]),
        .I2(\abcde_reg[0]_0 [12]),
        .I3(\dy[4]_i_2_n_0 ),
        .I4(\abcde_reg[0]_0 [3]),
        .I5(\abcde_reg[0]_0 [11]),
        .O(\abcde_reg[0]_1 [4]));
  LUT6 #(
    .INIT(64'hF7510000FFFFF751)) 
    \dy[4]_i_2 
       (.I0(\abcde_reg[0]_0 [9]),
        .I1(\abcde_reg[0]_0 [8]),
        .I2(\abcde_reg[0]_0 [0]),
        .I3(\abcde_reg[0]_0 [1]),
        .I4(\abcde_reg[0]_0 [2]),
        .I5(\abcde_reg[0]_0 [10]),
        .O(\dy[4]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[5]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [5]),
        .I2(\abcde_reg[0]_0 [13]),
        .I3(\dy[6]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [5]));
  LUT6 #(
    .INIT(64'h2882828228282882)) 
    \dy[6]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [6]),
        .I2(\abcde_reg[0]_0 [14]),
        .I3(\dy[6]_i_2_n_0 ),
        .I4(\abcde_reg[0]_0 [5]),
        .I5(\abcde_reg[0]_0 [13]),
        .O(\abcde_reg[0]_1 [6]));
  LUT5 #(
    .INIT(32'hD400FFD4)) 
    \dy[6]_i_2 
       (.I0(\abcde_reg[0]_0 [11]),
        .I1(\abcde_reg[0]_0 [3]),
        .I2(\dy[4]_i_2_n_0 ),
        .I3(\abcde_reg[0]_0 [4]),
        .I4(\abcde_reg[0]_0 [12]),
        .O(\dy[6]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3027" *) 
  LUT4 #(
    .INIT(16'h2882)) 
    \dy[7]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [7]),
        .I2(\abcde_reg[0]_0 [15]),
        .I3(\dy[8]_i_2_n_0 ),
        .O(\abcde_reg[0]_1 [7]));
  (* SOFT_HLUTNM = "soft_lutpair3027" *) 
  LUT4 #(
    .INIT(16'h7010)) 
    \dy[8]_i_1 
       (.I0(\dy[8]_i_2_n_0 ),
        .I1(\abcde_reg[0]_0 [7]),
        .I2(\dy_reg[8] ),
        .I3(\abcde_reg[0]_0 [15]),
        .O(\abcde_reg[0]_1 [8]));
  LUT5 #(
    .INIT(32'hD400FFD4)) 
    \dy[8]_i_2 
       (.I0(\abcde_reg[0]_0 [13]),
        .I1(\abcde_reg[0]_0 [5]),
        .I2(\dy[6]_i_2_n_0 ),
        .I3(\abcde_reg[0]_0 [6]),
        .I4(\abcde_reg[0]_0 [14]),
        .O(\dy[8]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3045" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \dy[9]_i_1 
       (.I0(\dy_reg[8] ),
        .I1(\abcde_reg[0]_0 [16]),
        .I2(\abcde_reg[0]_0 [8]),
        .O(\abcde_reg[0]_1 [9]));
  (* SOFT_HLUTNM = "soft_lutpair3026" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    enAccbuf_i_4
       (.I0(rgbVideoinToManyAXIS_tvalid),
        .I1(enAccbuf_reg),
        .I2(grayVideoinToManyAXIS_tvalid),
        .O(enAccbuf1));
  LUT6 #(
    .INIT(64'hBABABABB8A8A8A88)) 
    enEobufB_i_1
       (.I0(enEobufB_i_2_n_0),
        .I1(\aEobufB[9]_i_5_n_0 ),
        .I2(enEobufB_reg_1),
        .I3(enEobufB_i_4_n_0),
        .I4(enEobufB_i_5_n_0),
        .I5(enEobufB),
        .O(enEobufB_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3004" *) 
  LUT5 #(
    .INIT(32'h44400040)) 
    enEobufB_i_2
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I2(strbEgrstart_reg_n_0),
        .I3(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I4(enEobufB_lcl_reg_n_0),
        .O(enEobufB_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3004" *) 
  LUT3 #(
    .INIT(8'h54)) 
    enEobufB_i_4
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I2(strbEgrstart_reg_n_0),
        .O(enEobufB_i_4_n_0));
  LUT6 #(
    .INIT(64'hAAAAAAAAAA82AAAA)) 
    enEobufB_i_5
       (.I0(\aEobufB[9]_i_3_n_0 ),
        .I1(enRowbuf_reg_0[10]),
        .I2(\col_lcl[10]_i_2__1_n_0 ),
        .I3(enEobufB_i_6_n_0),
        .I4(enEobufB_reg_0),
        .I5(rgbToManyAXIS_tlast_sig_i_3_n_0),
        .O(enEobufB_i_5_n_0));
  LUT5 #(
    .INIT(32'h95556AAA)) 
    enEobufB_i_6
       (.I0(enRowbuf_reg_0[8]),
        .I1(Q[4]),
        .I2(\col_lcl_reg[5]_0 ),
        .I3(Q[3]),
        .I4(\col_lcl_reg_n_0_[8] ),
        .O(enEobufB_i_6_n_0));
  LUT5 #(
    .INIT(32'h00E0E00E)) 
    enEobufB_lcl_i_1
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I2(\qrs_reg_n_0_[1] ),
        .I3(\qrs_reg_n_0_[0] ),
        .I4(\qrs_reg_n_0_[2] ),
        .O(enEobufB_lcl));
  FDCE enEobufB_lcl_reg
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(enEobufB_lcl),
        .Q(enEobufB_lcl_reg_n_0));
  FDCE enEobufB_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enRowbufB_lcl_reg_0),
        .D(enEobufB_i_1_n_0),
        .Q(enEobufB));
  LUT6 #(
    .INIT(64'hFFCC23CC00CC20CC)) 
    enEobuf_i_1
       (.I0(\stateIgr[0]_i_2_n_0 ),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(camifToVideoinAXIS_tvalid),
        .I3(\stateIgr_reg[1]_0 [0]),
        .I4(oddNotEven_reg_0),
        .I5(enEobuf),
        .O(enEobuf_i_1_n_0));
  FDCE enEobuf_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enRowbufB_lcl_reg_0),
        .D(enEobuf_i_1_n_0),
        .Q(enEobuf));
  LUT6 #(
    .INIT(64'hFFFFAEAA0000A2AA)) 
    enRowbufB_i_1
       (.I0(enRowbufB_i_2_n_0),
        .I1(stateGrayegr[0]),
        .I2(\FSM_sequential_stateGrayegr[2]_i_3_n_0 ),
        .I3(enRowbufB_i_3_n_0),
        .I4(enRowbufB_i_4_n_0),
        .I5(enRowbufB_reg_n_0),
        .O(enRowbufB_i_1_n_0));
  LUT6 #(
    .INIT(64'h0022000030220000)) 
    enRowbufB_i_2
       (.I0(strbEgrstart_reg_n_0),
        .I1(stateGrayegr[2]),
        .I2(enRowbufB_lcl_reg_n_0),
        .I3(stateGrayegr[1]),
        .I4(stateGrayegr[0]),
        .I5(rgbVideoinToManyAXIS_tvalid),
        .O(enRowbufB_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3021" *) 
  LUT2 #(
    .INIT(4'h8)) 
    enRowbufB_i_3
       (.I0(rgbVideoinToManyAXIS_tvalid),
        .I1(stateGrayegr[1]),
        .O(enRowbufB_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3005" *) 
  LUT5 #(
    .INIT(32'hFFEE000C)) 
    enRowbufB_i_4
       (.I0(oddNotEven_reg_0),
        .I1(stateGrayegr[0]),
        .I2(strbEgrstart_reg_n_0),
        .I3(stateGrayegr[1]),
        .I4(stateGrayegr[2]),
        .O(enRowbufB_i_4_n_0));
  LUT6 #(
    .INIT(64'hDFFFCCCC10000000)) 
    enRowbufB_lcl_i_1
       (.I0(enRowbufB_lcl_i_2_n_0),
        .I1(stateGrayegr[2]),
        .I2(rgbVideoinToManyAXIS_tvalid),
        .I3(stateGrayegr[1]),
        .I4(stateGrayegr[0]),
        .I5(enRowbufB_lcl_reg_n_0),
        .O(enRowbufB_lcl_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2996" *) 
  LUT4 #(
    .INIT(16'hFB7D)) 
    enRowbufB_lcl_i_2
       (.I0(\nop_reg_n_0_[3] ),
        .I1(\nop_reg_n_0_[1] ),
        .I2(\nop_reg_n_0_[2] ),
        .I3(\nop_reg_n_0_[0] ),
        .O(enRowbufB_lcl_i_2_n_0));
  FDCE enRowbufB_lcl_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enRowbufB_lcl_reg_0),
        .D(enRowbufB_lcl_i_1_n_0),
        .Q(enRowbufB_lcl_reg_n_0));
  FDCE enRowbufB_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enRowbufB_lcl_reg_0),
        .D(enRowbufB_i_1_n_0),
        .Q(enRowbufB_reg_n_0));
  LUT6 #(
    .INIT(64'h8888888888888AA8)) 
    enRowbuf_i_1
       (.I0(\col_lcl[4]__1_i_2_n_0 ),
        .I1(enRowbuf_i_2_n_0),
        .I2(\stateGraypack[0]_i_2_n_0 ),
        .I3(enRowbuf_reg_0[10]),
        .I4(enRowbuf_i_3_n_0),
        .I5(enRowbuf_i_4_n_0),
        .O(enRowbuf));
  (* SOFT_HLUTNM = "soft_lutpair3017" *) 
  LUT4 #(
    .INIT(16'h8420)) 
    enRowbuf_i_2
       (.I0(\tuv_reg_n_0_[0] ),
        .I1(\tuv_reg_n_0_[1] ),
        .I2(\tuv_reg_n_0_[2] ),
        .I3(\tuv_reg_n_0_[3] ),
        .O(enRowbuf_i_2_n_0));
  LUT6 #(
    .INIT(64'hFFF9F6FFF6FFFFF6)) 
    enRowbuf_i_3
       (.I0(\col_lcl_reg[8]__1_n_0 ),
        .I1(enRowbuf_reg_0[8]),
        .I2(\stateGraypack[0]_i_5_n_0 ),
        .I3(enRowbuf_reg_0[7]),
        .I4(enRowbuf_i_5_n_0),
        .I5(\col_lcl_reg[7]__1_n_0 ),
        .O(enRowbuf_i_3_n_0));
  LUT6 #(
    .INIT(64'h955555556AAAAAAA)) 
    enRowbuf_i_4
       (.I0(enRowbuf_reg_0[9]),
        .I1(\col_lcl_reg[8]__1_n_0 ),
        .I2(\col_lcl_reg[6]__1_n_0 ),
        .I3(\col_lcl[8]__1_i_2_n_0 ),
        .I4(\col_lcl_reg[7]__1_n_0 ),
        .I5(\col_lcl_reg[9]__1_n_0 ),
        .O(enRowbuf_i_4_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3032" *) 
  LUT2 #(
    .INIT(4'h8)) 
    enRowbuf_i_5
       (.I0(\col_lcl_reg[6]__1_n_0 ),
        .I1(\col_lcl[8]__1_i_2_n_0 ),
        .O(enRowbuf_i_5_n_0));
  FDCE enRowbuf_reg
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(enRowbuf),
        .Q(enRowbuf_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3013" *) 
  LUT5 #(
    .INIT(32'hFADA0020)) 
    fillBNotA_i_1
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(oddNotEven_reg_0),
        .I2(\stateIgr_reg[1]_0 [0]),
        .I3(oddNotEven),
        .I4(fillBNotA_reg_n_0),
        .O(fillBNotA_i_1_n_0));
  FDCE fillBNotA_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enRowbufB_lcl_reg_0),
        .D(fillBNotA_i_1_n_0),
        .Q(fillBNotA_reg_n_0));
  FDCE \gr0_reg[10] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(myRow0buf_n_1),
        .Q(\gr0_reg_n_0_[10] ));
  FDCE \gr0_reg[11] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(myRow0buf_n_0),
        .Q(\gr0_reg_n_0_[11] ));
  FDCE \gr0_reg[4] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(myRow0buf_n_7),
        .Q(\gr0_reg_n_0_[4] ));
  FDCE \gr0_reg[5] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(myRow0buf_n_6),
        .Q(\gr0_reg_n_0_[5] ));
  FDCE \gr0_reg[6] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(myRow0buf_n_5),
        .Q(\gr0_reg_n_0_[6] ));
  FDCE \gr0_reg[7] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(myRow0buf_n_4),
        .Q(\gr0_reg_n_0_[7] ));
  FDCE \gr0_reg[8] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(myRow0buf_n_3),
        .Q(\gr0_reg_n_0_[8] ));
  FDCE \gr0_reg[9] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(myRow0buf_n_2),
        .Q(\gr0_reg_n_0_[9] ));
  FDCE \gr1_reg[10] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr1[10]),
        .Q(\gr1_reg_n_0_[10] ));
  FDCE \gr1_reg[11] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr1[11]),
        .Q(\gr1_reg_n_0_[11] ));
  FDCE \gr1_reg[4] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr1[4]),
        .Q(\gr1_reg_n_0_[4] ));
  FDCE \gr1_reg[5] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr1[5]),
        .Q(\gr1_reg_n_0_[5] ));
  FDCE \gr1_reg[6] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr1[6]),
        .Q(\gr1_reg_n_0_[6] ));
  FDCE \gr1_reg[7] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr1[7]),
        .Q(\gr1_reg_n_0_[7] ));
  FDCE \gr1_reg[8] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr1[8]),
        .Q(\gr1_reg_n_0_[8] ));
  FDCE \gr1_reg[9] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr1[9]),
        .Q(\gr1_reg_n_0_[9] ));
  FDCE \gr2_reg[10] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr2[10]),
        .Q(\gr2_reg_n_0_[10] ));
  FDCE \gr2_reg[11] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr2[11]),
        .Q(\gr2_reg_n_0_[11] ));
  FDCE \gr2_reg[4] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr2[4]),
        .Q(\gr2_reg_n_0_[4] ));
  FDCE \gr2_reg[5] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr2[5]),
        .Q(\gr2_reg_n_0_[5] ));
  FDCE \gr2_reg[6] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr2[6]),
        .Q(\gr2_reg_n_0_[6] ));
  FDCE \gr2_reg[7] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr2[7]),
        .Q(\gr2_reg_n_0_[7] ));
  FDCE \gr2_reg[8] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr2[8]),
        .Q(\gr2_reg_n_0_[8] ));
  FDCE \gr2_reg[9] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr2[9]),
        .Q(\gr2_reg_n_0_[9] ));
  FDCE \gr3_reg[10] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr3[10]),
        .Q(\gr3_reg_n_0_[10] ));
  FDCE \gr3_reg[11] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr3[11]),
        .Q(\gr3_reg_n_0_[11] ));
  FDCE \gr3_reg[4] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr3[4]),
        .Q(\gr3_reg_n_0_[4] ));
  FDCE \gr3_reg[5] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr3[5]),
        .Q(\gr3_reg_n_0_[5] ));
  FDCE \gr3_reg[6] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr3[6]),
        .Q(\gr3_reg_n_0_[6] ));
  FDCE \gr3_reg[7] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr3[7]),
        .Q(\gr3_reg_n_0_[7] ));
  FDCE \gr3_reg[8] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr3[8]),
        .Q(\gr3_reg_n_0_[8] ));
  FDCE \gr3_reg[9] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr3[9]),
        .Q(\gr3_reg_n_0_[9] ));
  LUT4 #(
    .INIT(16'h0803)) 
    \gr4[11]_i_1 
       (.I0(rgbVideoinToManyAXIS_tvalid),
        .I1(stateGrayegr[1]),
        .I2(stateGrayegr[2]),
        .I3(stateGrayegr[0]),
        .O(\gr4[11]_i_1_n_0 ));
  FDCE \gr4_reg[10] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr4[10]),
        .Q(\gr4_reg_n_0_[10] ));
  FDCE \gr4_reg[11] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr4[11]),
        .Q(\gr4_reg_n_0_[11] ));
  FDCE \gr4_reg[4] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr4[4]),
        .Q(\gr4_reg_n_0_[4] ));
  FDCE \gr4_reg[5] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr4[5]),
        .Q(\gr4_reg_n_0_[5] ));
  FDCE \gr4_reg[6] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr4[6]),
        .Q(\gr4_reg_n_0_[6] ));
  FDCE \gr4_reg[7] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr4[7]),
        .Q(\gr4_reg_n_0_[7] ));
  FDCE \gr4_reg[8] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr4[8]),
        .Q(\gr4_reg_n_0_[8] ));
  FDCE \gr4_reg[9] 
       (.C(aclk_sig),
        .CE(\gr4[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr4[9]),
        .Q(\gr4_reg_n_0_[9] ));
  LUT3 #(
    .INIT(8'h21)) 
    \gr[11]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .O(\gr[11]_i_1_n_0 ));
  FDCE \gr_reg[0] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[0]),
        .Q(p_14_in[0]));
  FDCE \gr_reg[10] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[10]),
        .Q(p_14_in[10]));
  FDCE \gr_reg[11] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[11]),
        .Q(p_14_in[11]));
  FDCE \gr_reg[1] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[1]),
        .Q(p_14_in[1]));
  FDCE \gr_reg[2] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[2]),
        .Q(p_14_in[2]));
  FDCE \gr_reg[3] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[3]),
        .Q(p_14_in[3]));
  FDCE \gr_reg[4] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[4]),
        .Q(p_14_in[4]));
  FDCE \gr_reg[5] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[5]),
        .Q(p_14_in[5]));
  FDCE \gr_reg[6] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[6]),
        .Q(p_14_in[6]));
  FDCE \gr_reg[7] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[7]),
        .Q(p_14_in[7]));
  FDCE \gr_reg[8] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[8]),
        .Q(p_14_in[8]));
  FDCE \gr_reg[9] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(gr[9]),
        .Q(p_14_in[9]));
  LUT6 #(
    .INIT(64'hEEFFEEFF04110011)) 
    grayToManyAXIS_tlast_sig_i_1
       (.I0(stateGrayegr[2]),
        .I1(stateGrayegr[0]),
        .I2(\FSM_sequential_stateGrayegr[2]_i_3_n_0 ),
        .I3(stateGrayegr[1]),
        .I4(rgbVideoinToManyAXIS_tvalid),
        .I5(grayVideoinToManyAXIS_tlast),
        .O(grayToManyAXIS_tlast_sig_i_1_n_0));
  FDPE grayToManyAXIS_tlast_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(grayToManyAXIS_tlast_sig_i_1_n_0),
        .PRE(enRowbufB_lcl_reg_0),
        .Q(grayVideoinToManyAXIS_tlast));
  (* SOFT_HLUTNM = "soft_lutpair3012" *) 
  LUT5 #(
    .INIT(32'hFBCC0800)) 
    grayToManyAXIS_tvalid_sig_i_1
       (.I0(rgbVideoinToManyAXIS_tvalid),
        .I1(stateGrayegr[0]),
        .I2(stateGrayegr[2]),
        .I3(stateGrayegr[1]),
        .I4(grayVideoinToManyAXIS_tvalid),
        .O(grayToManyAXIS_tvalid_sig_i_1_n_0));
  FDCE grayToManyAXIS_tvalid_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enRowbufB_lcl_reg_0),
        .D(grayToManyAXIS_tvalid_sig_i_1_n_0),
        .Q(grayVideoinToManyAXIS_tvalid));
  (* SOFT_HLUTNM = "soft_lutpair3025" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \klm[0]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(\klm_reg[0]_0 ),
        .O(\klm[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2971" *) 
  LUT4 #(
    .INIT(16'h0060)) 
    \klm[1]_i_1 
       (.I0(klm[1]),
        .I1(\klm_reg[0]_0 ),
        .I2(\stateIgr_reg[1]_0 [0]),
        .I3(\stateIgr_reg[1]_0 [1]),
        .O(\klm[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2971" *) 
  LUT5 #(
    .INIT(32'h04444000)) 
    \klm[2]_i_2 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(klm[1]),
        .I3(\klm_reg[0]_0 ),
        .I4(klm[2]),
        .O(\klm[2]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \klm_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\klm[0]_i_1_n_0 ),
        .Q(\klm_reg[0]_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \klm_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\klm[1]_i_1_n_0 ),
        .Q(klm[1]));
  FDCE #(
    .INIT(1'b0)) 
    \klm_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\klm[2]_i_2_n_0 ),
        .Q(klm[2]));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size6kB_a64b64__xdcDup__1 myEvenAbuf
       (.D(rgbToManyAXIS_tdata_sig[35:12]),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (dwrEobuf),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\aEobufB_reg_n_0_[9] ,\aEobufB_reg_n_0_[8] ,\aEobufB_reg_n_0_[7] ,\aEobufB_reg_n_0_[6] ,\aEobufB_reg_n_0_[5] ,\aEobufB_reg_n_0_[4] ,\aEobufB_reg_n_0_[3] ,\aEobufB_reg_n_0_[2] ,\aEobufB_reg_n_0_[1] ,\aEobufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 (fillBNotA_reg_n_0),
        .Q({\aEobuf_reg_n_0_[9] ,\aEobuf_reg_n_0_[8] ,\aEobuf_reg_n_0_[7] ,\aEobuf_reg_n_0_[6] ,\aEobuf_reg_n_0_[5] ,\aEobuf_reg_n_0_[4] ,\aEobuf_reg_n_0_[3] ,\aEobuf_reg_n_0_[2] ,\aEobuf_reg_n_0_[1] ,\aEobuf_reg_n_0_[0] }),
        .S(myEvenAbuf_n_28),
        .aclk_sig(aclk_sig),
        .doutb(drdEvenAbufB),
        .enEobuf(enEobuf),
        .enEobufB(enEobufB),
        .\gr_reg[5]_i_2 (myOddbuf_n_5),
        .\gr_reg[5]_i_2_0 (myOddbuf_n_4),
        .\gr_reg[5]_i_2_1 (myOddbuf_n_6),
        .oddNotEven(oddNotEven),
        .p_0_in(p_0_in),
        .p_1_in(p_1_in),
        .p_3_in(p_3_in),
        .\qrs_reg[1] (myEvenAbuf_n_32),
        .\qrs_reg[1]_0 (myEvenAbuf_n_33),
        .\qrs_reg[1]_1 (myEvenAbuf_n_34),
        .\qrs_reg[1]_2 (myEvenAbuf_n_36),
        .\qrs_reg[1]_3 (myEvenAbuf_n_37),
        .\qrs_reg[1]_4 (myEvenAbuf_n_38),
        .\qrs_reg[1]_5 (myEvenAbuf_n_40),
        .\qrs_reg[2] (myEvenAbuf_n_29),
        .\qrs_reg[2]_0 (myEvenAbuf_n_35),
        .\qrs_reg[2]_1 (myEvenAbuf_n_39),
        .\rgbToManyAXIS_tdata_sig[18]_i_3_0 ({\drdEvenbufBm1_reg_n_0_[63] ,\drdEvenbufBm1_reg_n_0_[62] ,\drdEvenbufBm1_reg_n_0_[61] ,\drdEvenbufBm1_reg_n_0_[60] ,data2}),
        .\rgbToManyAXIS_tdata_sig[35]_i_2_0 (drdB),
        .\rgbToManyAXIS_tdata_sig_reg[18] (myOddbuf_n_0),
        .\rgbToManyAXIS_tdata_sig_reg[18]_i_2_0 (myOddbuf_n_2),
        .\rgbToManyAXIS_tdata_sig_reg[18]_i_2_1 (myOddbuf_n_23),
        .\rgbToManyAXIS_tdata_sig_reg[18]_i_2_2 (myOddbuf_n_25),
        .\rgbToManyAXIS_tdata_sig_reg[18]_i_2_3 (myOddbuf_n_22),
        .\rgbToManyAXIS_tdata_sig_reg[23]_i_2_0 (myOddbuf_n_1),
        .\rgbToManyAXIS_tdata_sig_reg[23]_i_2_1 (myOddbuf_n_3),
        .\rgbToManyAXIS_tdata_sig_reg[23]_i_2_2 (myOddbuf_n_24),
        .\rgbToManyAXIS_tdata_sig_reg[23]_i_2_3 (myOddbuf_n_9),
        .\rgbToManyAXIS_tdata_sig_reg[28] ({\qrs_reg_n_0_[2] ,\qrs_reg_n_0_[1] ,\qrs_reg_n_0_[0] }),
        .\rgbToManyAXIS_tdata_sig_reg[35] (\FSM_sequential_stateRgbegr_reg[2]_0 [1:0]));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size6kB_a64b64__xdcDup__2 myEvenBbuf
       (.D(drdEvenbufBm1),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (dwrEobuf),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\aEobufB_reg_n_0_[9] ,\aEobufB_reg_n_0_[8] ,\aEobufB_reg_n_0_[7] ,\aEobufB_reg_n_0_[6] ,\aEobufB_reg_n_0_[5] ,\aEobufB_reg_n_0_[4] ,\aEobufB_reg_n_0_[3] ,\aEobufB_reg_n_0_[2] ,\aEobufB_reg_n_0_[1] ,\aEobufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 (fillBNotA_reg_n_0),
        .Q({\aEobuf_reg_n_0_[9] ,\aEobuf_reg_n_0_[8] ,\aEobuf_reg_n_0_[7] ,\aEobuf_reg_n_0_[6] ,\aEobuf_reg_n_0_[5] ,\aEobuf_reg_n_0_[4] ,\aEobuf_reg_n_0_[3] ,\aEobuf_reg_n_0_[2] ,\aEobuf_reg_n_0_[1] ,\aEobuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .doutb(drdB),
        .\drdEvenbufBm1_reg[63] (drdEvenAbufB),
        .\drdEvenbufBm1_reg[63]_0 (\FSM_sequential_stateRgbegr_reg[2]_0 [1:0]),
        .enEobuf(enEobuf),
        .enEobufB(enEobufB),
        .oddNotEven(oddNotEven));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size6kB_a64b64 myOddbuf
       (.D(rgbToManyAXIS_tdata_sig[11:0]),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (drdOddbufBm1),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 (dwrEobuf),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ({\aEobufB_reg_n_0_[9] ,\aEobufB_reg_n_0_[8] ,\aEobufB_reg_n_0_[7] ,\aEobufB_reg_n_0_[6] ,\aEobufB_reg_n_0_[5] ,\aEobufB_reg_n_0_[4] ,\aEobufB_reg_n_0_[3] ,\aEobufB_reg_n_0_[2] ,\aEobufB_reg_n_0_[1] ,\aEobufB_reg_n_0_[0] }),
        .\FSM_sequential_stateRgbegr_reg[1] (gr),
        .Q({\aEobuf_reg_n_0_[9] ,\aEobuf_reg_n_0_[8] ,\aEobuf_reg_n_0_[7] ,\aEobuf_reg_n_0_[6] ,\aEobuf_reg_n_0_[5] ,\aEobuf_reg_n_0_[4] ,\aEobuf_reg_n_0_[3] ,\aEobuf_reg_n_0_[2] ,\aEobuf_reg_n_0_[1] ,\aEobuf_reg_n_0_[0] }),
        .S(myEvenAbuf_n_28),
        .aclk_sig(aclk_sig),
        .\drdOddbufBm1_reg[63] (\FSM_sequential_stateRgbegr_reg[2]_0 [1:0]),
        .enEobuf(enEobuf),
        .enEobufB(enEobufB),
        .\gr_reg[11]_i_3_0 (myEvenAbuf_n_35),
        .\gr_reg[11]_i_3_1 (myEvenAbuf_n_34),
        .\gr_reg[11]_i_3_2 (myEvenAbuf_n_37),
        .\gr_reg[11]_i_3_3 (myEvenAbuf_n_40),
        .\gr_reg[5]_i_2_0 (myEvenAbuf_n_33),
        .\gr_reg[5]_i_2_1 (myEvenAbuf_n_32),
        .\gr_reg[5]_i_2_2 (myEvenAbuf_n_29),
        .\gr_reg[5]_i_2_3 (myEvenAbuf_n_36),
        .\gr_reg[5]_i_2_4 (myEvenAbuf_n_38),
        .\gr_reg[5]_i_2_5 (myEvenAbuf_n_39),
        .oddNotEven(oddNotEven),
        .p_0_in(p_0_in),
        .p_1_in(p_1_in),
        .p_3_in(p_3_in),
        .\qrs_reg[1] (myOddbuf_n_1),
        .\qrs_reg[1]_0 (myOddbuf_n_2),
        .\qrs_reg[1]_1 (myOddbuf_n_3),
        .\qrs_reg[1]_2 (myOddbuf_n_9),
        .\qrs_reg[1]_3 (myOddbuf_n_22),
        .\qrs_reg[1]_4 (myOddbuf_n_23),
        .\qrs_reg[1]_5 (myOddbuf_n_24),
        .\qrs_reg[1]_6 (myOddbuf_n_25),
        .\qrs_reg[2] (myOddbuf_n_0),
        .\qrs_reg[2]_0 (myOddbuf_n_4),
        .\qrs_reg[2]_1 (myOddbuf_n_5),
        .\qrs_reg[2]_2 (myOddbuf_n_6),
        .\rgbToManyAXIS_tdata_sig_reg[7] ({\qrs_reg_n_0_[2] ,\qrs_reg_n_0_[1] ,\qrs_reg_n_0_[0] }),
        .\rgbToManyAXIS_tdata_sig_reg[7]_0 ({\drdOddbufBm1_reg_n_0_[63] ,\drdOddbufBm1_reg_n_0_[62] ,\drdOddbufBm1_reg_n_0_[61] ,\drdOddbufBm1_reg_n_0_[60] ,\drdOddbufBm1_reg_n_0_[59] ,\drdOddbufBm1_reg_n_0_[58] ,\drdOddbufBm1_reg_n_0_[57] ,\drdOddbufBm1_reg_n_0_[56] ,\drdOddbufBm1_reg_n_0_[55] ,\drdOddbufBm1_reg_n_0_[54] ,\drdOddbufBm1_reg_n_0_[53] ,\drdOddbufBm1_reg_n_0_[52] ,\drdOddbufBm1_reg_n_0_[51] ,\drdOddbufBm1_reg_n_0_[50] ,\drdOddbufBm1_reg_n_0_[49] ,\drdOddbufBm1_reg_n_0_[48] }));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a64b64__xdcDup__1 myRow0buf
       (.D({myRow0buf_n_0,myRow0buf_n_1,myRow0buf_n_2,myRow0buf_n_3,myRow0buf_n_4,myRow0buf_n_5,myRow0buf_n_6,myRow0buf_n_7}),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (drdRow0bufBm1),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\dwrRowbuf_reg_n_0_[63] ,\dwrRowbuf_reg_n_0_[62] ,\dwrRowbuf_reg_n_0_[61] ,\dwrRowbuf_reg_n_0_[60] ,\dwrRowbuf_reg_n_0_[59] ,\dwrRowbuf_reg_n_0_[58] ,\dwrRowbuf_reg_n_0_[57] ,\dwrRowbuf_reg_n_0_[56] ,\dwrRowbuf_reg_n_0_[55] ,\dwrRowbuf_reg_n_0_[54] ,\dwrRowbuf_reg_n_0_[53] ,\dwrRowbuf_reg_n_0_[52] ,\dwrRowbuf_reg_n_0_[51] ,\dwrRowbuf_reg_n_0_[50] ,\dwrRowbuf_reg_n_0_[49] ,\dwrRowbuf_reg_n_0_[48] ,\dwrRowbuf_reg_n_0_[47] ,\dwrRowbuf_reg_n_0_[46] ,\dwrRowbuf_reg_n_0_[45] ,\dwrRowbuf_reg_n_0_[44] ,\dwrRowbuf_reg_n_0_[43] ,\dwrRowbuf_reg_n_0_[42] ,\dwrRowbuf_reg_n_0_[41] ,\dwrRowbuf_reg_n_0_[40] ,\dwrRowbuf_reg_n_0_[39] ,\dwrRowbuf_reg_n_0_[38] ,\dwrRowbuf_reg_n_0_[37] ,\dwrRowbuf_reg_n_0_[36] ,\dwrRowbuf_reg_n_0_[35] ,\dwrRowbuf_reg_n_0_[34] ,\dwrRowbuf_reg_n_0_[33] ,\dwrRowbuf_reg_n_0_[32] ,\dwrRowbuf_reg_n_0_[31] ,\dwrRowbuf_reg_n_0_[30] ,\dwrRowbuf_reg_n_0_[29] ,\dwrRowbuf_reg_n_0_[28] ,\dwrRowbuf_reg_n_0_[27] ,\dwrRowbuf_reg_n_0_[26] ,\dwrRowbuf_reg_n_0_[25] ,\dwrRowbuf_reg_n_0_[24] ,\dwrRowbuf_reg_n_0_[23] ,\dwrRowbuf_reg_n_0_[22] ,\dwrRowbuf_reg_n_0_[21] ,\dwrRowbuf_reg_n_0_[20] ,\dwrRowbuf_reg_n_0_[19] ,\dwrRowbuf_reg_n_0_[18] ,\dwrRowbuf_reg_n_0_[17] ,\dwrRowbuf_reg_n_0_[16] ,\dwrRowbuf_reg_n_0_[15] ,\dwrRowbuf_reg_n_0_[14] ,\dwrRowbuf_reg_n_0_[13] ,\dwrRowbuf_reg_n_0_[12] ,\dwrRowbuf_reg_n_0_[11] ,\dwrRowbuf_reg_n_0_[10] ,\dwrRowbuf_reg_n_0_[9] ,\dwrRowbuf_reg_n_0_[8] ,\dwrRowbuf_reg_n_0_[7] ,\dwrRowbuf_reg_n_0_[6] ,\dwrRowbuf_reg_n_0_[5] ,\dwrRowbuf_reg_n_0_[4] ,\dwrRowbuf_reg_n_0_[3] ,\dwrRowbuf_reg_n_0_[2] ,\dwrRowbuf_reg_n_0_[1] ,\dwrRowbuf_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ({\aRowbufB_reg_n_0_[8] ,\aRowbufB_reg_n_0_[7] ,\aRowbufB_reg_n_0_[6] ,\aRowbufB_reg_n_0_[5] ,\aRowbufB_reg_n_0_[4] ,\aRowbufB_reg_n_0_[3] ,\aRowbufB_reg_n_0_[2] ,\aRowbufB_reg_n_0_[1] ,\aRowbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ({\abcde_reg_n_0_[2] ,\abcde_reg_n_0_[1] ,\abcde_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 (enRowbuf_reg_n_0),
        .Q({\aRowbuf_reg_n_0_[8] ,\aRowbuf_reg_n_0_[7] ,\aRowbuf_reg_n_0_[6] ,\aRowbuf_reg_n_0_[5] ,\aRowbuf_reg_n_0_[4] ,\aRowbuf_reg_n_0_[3] ,\aRowbuf_reg_n_0_[2] ,\aRowbuf_reg_n_0_[1] ,\aRowbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .\drdRow0bufBm1_reg[60] (stateGrayegr),
        .enb(enRowbufB_reg_n_0),
        .\gr0_reg[4] ({\nop_reg_n_0_[3] ,\nop_reg_n_0_[2] ,\nop_reg_n_0_[1] ,\nop_reg_n_0_[0] }),
        .\gr0_reg[4]_0 (\drdRow4bufBm1[63]_i_3_n_0 ),
        .\gr0_reg[7] (data10__3));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a64b64__xdcDup__2 myRow1buf
       (.D(gr1),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (drdRow1bufBm1),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\dwrRowbuf_reg_n_0_[63] ,\dwrRowbuf_reg_n_0_[62] ,\dwrRowbuf_reg_n_0_[61] ,\dwrRowbuf_reg_n_0_[60] ,\dwrRowbuf_reg_n_0_[59] ,\dwrRowbuf_reg_n_0_[58] ,\dwrRowbuf_reg_n_0_[57] ,\dwrRowbuf_reg_n_0_[56] ,\dwrRowbuf_reg_n_0_[55] ,\dwrRowbuf_reg_n_0_[54] ,\dwrRowbuf_reg_n_0_[53] ,\dwrRowbuf_reg_n_0_[52] ,\dwrRowbuf_reg_n_0_[51] ,\dwrRowbuf_reg_n_0_[50] ,\dwrRowbuf_reg_n_0_[49] ,\dwrRowbuf_reg_n_0_[48] ,\dwrRowbuf_reg_n_0_[47] ,\dwrRowbuf_reg_n_0_[46] ,\dwrRowbuf_reg_n_0_[45] ,\dwrRowbuf_reg_n_0_[44] ,\dwrRowbuf_reg_n_0_[43] ,\dwrRowbuf_reg_n_0_[42] ,\dwrRowbuf_reg_n_0_[41] ,\dwrRowbuf_reg_n_0_[40] ,\dwrRowbuf_reg_n_0_[39] ,\dwrRowbuf_reg_n_0_[38] ,\dwrRowbuf_reg_n_0_[37] ,\dwrRowbuf_reg_n_0_[36] ,\dwrRowbuf_reg_n_0_[35] ,\dwrRowbuf_reg_n_0_[34] ,\dwrRowbuf_reg_n_0_[33] ,\dwrRowbuf_reg_n_0_[32] ,\dwrRowbuf_reg_n_0_[31] ,\dwrRowbuf_reg_n_0_[30] ,\dwrRowbuf_reg_n_0_[29] ,\dwrRowbuf_reg_n_0_[28] ,\dwrRowbuf_reg_n_0_[27] ,\dwrRowbuf_reg_n_0_[26] ,\dwrRowbuf_reg_n_0_[25] ,\dwrRowbuf_reg_n_0_[24] ,\dwrRowbuf_reg_n_0_[23] ,\dwrRowbuf_reg_n_0_[22] ,\dwrRowbuf_reg_n_0_[21] ,\dwrRowbuf_reg_n_0_[20] ,\dwrRowbuf_reg_n_0_[19] ,\dwrRowbuf_reg_n_0_[18] ,\dwrRowbuf_reg_n_0_[17] ,\dwrRowbuf_reg_n_0_[16] ,\dwrRowbuf_reg_n_0_[15] ,\dwrRowbuf_reg_n_0_[14] ,\dwrRowbuf_reg_n_0_[13] ,\dwrRowbuf_reg_n_0_[12] ,\dwrRowbuf_reg_n_0_[11] ,\dwrRowbuf_reg_n_0_[10] ,\dwrRowbuf_reg_n_0_[9] ,\dwrRowbuf_reg_n_0_[8] ,\dwrRowbuf_reg_n_0_[7] ,\dwrRowbuf_reg_n_0_[6] ,\dwrRowbuf_reg_n_0_[5] ,\dwrRowbuf_reg_n_0_[4] ,\dwrRowbuf_reg_n_0_[3] ,\dwrRowbuf_reg_n_0_[2] ,\dwrRowbuf_reg_n_0_[1] ,\dwrRowbuf_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ({\aRowbufB_reg_n_0_[8] ,\aRowbufB_reg_n_0_[7] ,\aRowbufB_reg_n_0_[6] ,\aRowbufB_reg_n_0_[5] ,\aRowbufB_reg_n_0_[4] ,\aRowbufB_reg_n_0_[3] ,\aRowbufB_reg_n_0_[2] ,\aRowbufB_reg_n_0_[1] ,\aRowbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ({\abcde_reg_n_0_[2] ,\abcde_reg_n_0_[1] ,\abcde_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 (enRowbuf_reg_n_0),
        .Q({\aRowbuf_reg_n_0_[8] ,\aRowbuf_reg_n_0_[7] ,\aRowbuf_reg_n_0_[6] ,\aRowbuf_reg_n_0_[5] ,\aRowbuf_reg_n_0_[4] ,\aRowbuf_reg_n_0_[3] ,\aRowbuf_reg_n_0_[2] ,\aRowbuf_reg_n_0_[1] ,\aRowbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .\drdRow1bufBm1_reg[60] (stateGrayegr),
        .enb(enRowbufB_reg_n_0),
        .\gr1_reg[4] ({\nop_reg_n_0_[3] ,\nop_reg_n_0_[2] ,\nop_reg_n_0_[1] ,\nop_reg_n_0_[0] }),
        .\gr1_reg[4]_0 (\drdRow4bufBm1[63]_i_3_n_0 ),
        .\gr1_reg[7] (data10__2));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a64b64__xdcDup__3 myRow2buf
       (.D(gr2),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (drdRow2bufBm1),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\dwrRowbuf_reg_n_0_[63] ,\dwrRowbuf_reg_n_0_[62] ,\dwrRowbuf_reg_n_0_[61] ,\dwrRowbuf_reg_n_0_[60] ,\dwrRowbuf_reg_n_0_[59] ,\dwrRowbuf_reg_n_0_[58] ,\dwrRowbuf_reg_n_0_[57] ,\dwrRowbuf_reg_n_0_[56] ,\dwrRowbuf_reg_n_0_[55] ,\dwrRowbuf_reg_n_0_[54] ,\dwrRowbuf_reg_n_0_[53] ,\dwrRowbuf_reg_n_0_[52] ,\dwrRowbuf_reg_n_0_[51] ,\dwrRowbuf_reg_n_0_[50] ,\dwrRowbuf_reg_n_0_[49] ,\dwrRowbuf_reg_n_0_[48] ,\dwrRowbuf_reg_n_0_[47] ,\dwrRowbuf_reg_n_0_[46] ,\dwrRowbuf_reg_n_0_[45] ,\dwrRowbuf_reg_n_0_[44] ,\dwrRowbuf_reg_n_0_[43] ,\dwrRowbuf_reg_n_0_[42] ,\dwrRowbuf_reg_n_0_[41] ,\dwrRowbuf_reg_n_0_[40] ,\dwrRowbuf_reg_n_0_[39] ,\dwrRowbuf_reg_n_0_[38] ,\dwrRowbuf_reg_n_0_[37] ,\dwrRowbuf_reg_n_0_[36] ,\dwrRowbuf_reg_n_0_[35] ,\dwrRowbuf_reg_n_0_[34] ,\dwrRowbuf_reg_n_0_[33] ,\dwrRowbuf_reg_n_0_[32] ,\dwrRowbuf_reg_n_0_[31] ,\dwrRowbuf_reg_n_0_[30] ,\dwrRowbuf_reg_n_0_[29] ,\dwrRowbuf_reg_n_0_[28] ,\dwrRowbuf_reg_n_0_[27] ,\dwrRowbuf_reg_n_0_[26] ,\dwrRowbuf_reg_n_0_[25] ,\dwrRowbuf_reg_n_0_[24] ,\dwrRowbuf_reg_n_0_[23] ,\dwrRowbuf_reg_n_0_[22] ,\dwrRowbuf_reg_n_0_[21] ,\dwrRowbuf_reg_n_0_[20] ,\dwrRowbuf_reg_n_0_[19] ,\dwrRowbuf_reg_n_0_[18] ,\dwrRowbuf_reg_n_0_[17] ,\dwrRowbuf_reg_n_0_[16] ,\dwrRowbuf_reg_n_0_[15] ,\dwrRowbuf_reg_n_0_[14] ,\dwrRowbuf_reg_n_0_[13] ,\dwrRowbuf_reg_n_0_[12] ,\dwrRowbuf_reg_n_0_[11] ,\dwrRowbuf_reg_n_0_[10] ,\dwrRowbuf_reg_n_0_[9] ,\dwrRowbuf_reg_n_0_[8] ,\dwrRowbuf_reg_n_0_[7] ,\dwrRowbuf_reg_n_0_[6] ,\dwrRowbuf_reg_n_0_[5] ,\dwrRowbuf_reg_n_0_[4] ,\dwrRowbuf_reg_n_0_[3] ,\dwrRowbuf_reg_n_0_[2] ,\dwrRowbuf_reg_n_0_[1] ,\dwrRowbuf_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ({\aRowbufB_reg_n_0_[8] ,\aRowbufB_reg_n_0_[7] ,\aRowbufB_reg_n_0_[6] ,\aRowbufB_reg_n_0_[5] ,\aRowbufB_reg_n_0_[4] ,\aRowbufB_reg_n_0_[3] ,\aRowbufB_reg_n_0_[2] ,\aRowbufB_reg_n_0_[1] ,\aRowbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ({\abcde_reg_n_0_[2] ,\abcde_reg_n_0_[1] ,\abcde_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 (enRowbuf_reg_n_0),
        .Q({\aRowbuf_reg_n_0_[8] ,\aRowbuf_reg_n_0_[7] ,\aRowbuf_reg_n_0_[6] ,\aRowbuf_reg_n_0_[5] ,\aRowbuf_reg_n_0_[4] ,\aRowbuf_reg_n_0_[3] ,\aRowbuf_reg_n_0_[2] ,\aRowbuf_reg_n_0_[1] ,\aRowbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .\drdRow2bufBm1_reg[60] (stateGrayegr),
        .enb(enRowbufB_reg_n_0),
        .\gr2_reg[4] ({\nop_reg_n_0_[3] ,\nop_reg_n_0_[2] ,\nop_reg_n_0_[1] ,\nop_reg_n_0_[0] }),
        .\gr2_reg[4]_0 (\drdRow4bufBm1[63]_i_3_n_0 ),
        .\gr2_reg[7] (data10__1));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a64b64__xdcDup__4 myRow3buf
       (.D(gr3),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (drdRow3bufBm1),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\dwrRowbuf_reg_n_0_[63] ,\dwrRowbuf_reg_n_0_[62] ,\dwrRowbuf_reg_n_0_[61] ,\dwrRowbuf_reg_n_0_[60] ,\dwrRowbuf_reg_n_0_[59] ,\dwrRowbuf_reg_n_0_[58] ,\dwrRowbuf_reg_n_0_[57] ,\dwrRowbuf_reg_n_0_[56] ,\dwrRowbuf_reg_n_0_[55] ,\dwrRowbuf_reg_n_0_[54] ,\dwrRowbuf_reg_n_0_[53] ,\dwrRowbuf_reg_n_0_[52] ,\dwrRowbuf_reg_n_0_[51] ,\dwrRowbuf_reg_n_0_[50] ,\dwrRowbuf_reg_n_0_[49] ,\dwrRowbuf_reg_n_0_[48] ,\dwrRowbuf_reg_n_0_[47] ,\dwrRowbuf_reg_n_0_[46] ,\dwrRowbuf_reg_n_0_[45] ,\dwrRowbuf_reg_n_0_[44] ,\dwrRowbuf_reg_n_0_[43] ,\dwrRowbuf_reg_n_0_[42] ,\dwrRowbuf_reg_n_0_[41] ,\dwrRowbuf_reg_n_0_[40] ,\dwrRowbuf_reg_n_0_[39] ,\dwrRowbuf_reg_n_0_[38] ,\dwrRowbuf_reg_n_0_[37] ,\dwrRowbuf_reg_n_0_[36] ,\dwrRowbuf_reg_n_0_[35] ,\dwrRowbuf_reg_n_0_[34] ,\dwrRowbuf_reg_n_0_[33] ,\dwrRowbuf_reg_n_0_[32] ,\dwrRowbuf_reg_n_0_[31] ,\dwrRowbuf_reg_n_0_[30] ,\dwrRowbuf_reg_n_0_[29] ,\dwrRowbuf_reg_n_0_[28] ,\dwrRowbuf_reg_n_0_[27] ,\dwrRowbuf_reg_n_0_[26] ,\dwrRowbuf_reg_n_0_[25] ,\dwrRowbuf_reg_n_0_[24] ,\dwrRowbuf_reg_n_0_[23] ,\dwrRowbuf_reg_n_0_[22] ,\dwrRowbuf_reg_n_0_[21] ,\dwrRowbuf_reg_n_0_[20] ,\dwrRowbuf_reg_n_0_[19] ,\dwrRowbuf_reg_n_0_[18] ,\dwrRowbuf_reg_n_0_[17] ,\dwrRowbuf_reg_n_0_[16] ,\dwrRowbuf_reg_n_0_[15] ,\dwrRowbuf_reg_n_0_[14] ,\dwrRowbuf_reg_n_0_[13] ,\dwrRowbuf_reg_n_0_[12] ,\dwrRowbuf_reg_n_0_[11] ,\dwrRowbuf_reg_n_0_[10] ,\dwrRowbuf_reg_n_0_[9] ,\dwrRowbuf_reg_n_0_[8] ,\dwrRowbuf_reg_n_0_[7] ,\dwrRowbuf_reg_n_0_[6] ,\dwrRowbuf_reg_n_0_[5] ,\dwrRowbuf_reg_n_0_[4] ,\dwrRowbuf_reg_n_0_[3] ,\dwrRowbuf_reg_n_0_[2] ,\dwrRowbuf_reg_n_0_[1] ,\dwrRowbuf_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ({\aRowbufB_reg_n_0_[8] ,\aRowbufB_reg_n_0_[7] ,\aRowbufB_reg_n_0_[6] ,\aRowbufB_reg_n_0_[5] ,\aRowbufB_reg_n_0_[4] ,\aRowbufB_reg_n_0_[3] ,\aRowbufB_reg_n_0_[2] ,\aRowbufB_reg_n_0_[1] ,\aRowbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 ({\abcde_reg_n_0_[2] ,\abcde_reg_n_0_[1] ,\abcde_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 (enRowbuf_reg_n_0),
        .Q({\aRowbuf_reg_n_0_[8] ,\aRowbuf_reg_n_0_[7] ,\aRowbuf_reg_n_0_[6] ,\aRowbuf_reg_n_0_[5] ,\aRowbuf_reg_n_0_[4] ,\aRowbuf_reg_n_0_[3] ,\aRowbuf_reg_n_0_[2] ,\aRowbuf_reg_n_0_[1] ,\aRowbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .\drdRow3bufBm1_reg[60] (stateGrayegr),
        .enb(enRowbufB_reg_n_0),
        .\gr3_reg[4] ({\nop_reg_n_0_[3] ,\nop_reg_n_0_[2] ,\nop_reg_n_0_[1] ,\nop_reg_n_0_[0] }),
        .\gr3_reg[4]_0 (\drdRow4bufBm1[63]_i_3_n_0 ),
        .\gr3_reg[7] (data10__0));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a64b64 myRow4buf
       (.D(gr4),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (drdRow4bufBm1),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\dwrRowbuf_reg_n_0_[63] ,\dwrRowbuf_reg_n_0_[62] ,\dwrRowbuf_reg_n_0_[61] ,\dwrRowbuf_reg_n_0_[60] ,\dwrRowbuf_reg_n_0_[59] ,\dwrRowbuf_reg_n_0_[58] ,\dwrRowbuf_reg_n_0_[57] ,\dwrRowbuf_reg_n_0_[56] ,\dwrRowbuf_reg_n_0_[55] ,\dwrRowbuf_reg_n_0_[54] ,\dwrRowbuf_reg_n_0_[53] ,\dwrRowbuf_reg_n_0_[52] ,\dwrRowbuf_reg_n_0_[51] ,\dwrRowbuf_reg_n_0_[50] ,\dwrRowbuf_reg_n_0_[49] ,\dwrRowbuf_reg_n_0_[48] ,\dwrRowbuf_reg_n_0_[47] ,\dwrRowbuf_reg_n_0_[46] ,\dwrRowbuf_reg_n_0_[45] ,\dwrRowbuf_reg_n_0_[44] ,\dwrRowbuf_reg_n_0_[43] ,\dwrRowbuf_reg_n_0_[42] ,\dwrRowbuf_reg_n_0_[41] ,\dwrRowbuf_reg_n_0_[40] ,\dwrRowbuf_reg_n_0_[39] ,\dwrRowbuf_reg_n_0_[38] ,\dwrRowbuf_reg_n_0_[37] ,\dwrRowbuf_reg_n_0_[36] ,\dwrRowbuf_reg_n_0_[35] ,\dwrRowbuf_reg_n_0_[34] ,\dwrRowbuf_reg_n_0_[33] ,\dwrRowbuf_reg_n_0_[32] ,\dwrRowbuf_reg_n_0_[31] ,\dwrRowbuf_reg_n_0_[30] ,\dwrRowbuf_reg_n_0_[29] ,\dwrRowbuf_reg_n_0_[28] ,\dwrRowbuf_reg_n_0_[27] ,\dwrRowbuf_reg_n_0_[26] ,\dwrRowbuf_reg_n_0_[25] ,\dwrRowbuf_reg_n_0_[24] ,\dwrRowbuf_reg_n_0_[23] ,\dwrRowbuf_reg_n_0_[22] ,\dwrRowbuf_reg_n_0_[21] ,\dwrRowbuf_reg_n_0_[20] ,\dwrRowbuf_reg_n_0_[19] ,\dwrRowbuf_reg_n_0_[18] ,\dwrRowbuf_reg_n_0_[17] ,\dwrRowbuf_reg_n_0_[16] ,\dwrRowbuf_reg_n_0_[15] ,\dwrRowbuf_reg_n_0_[14] ,\dwrRowbuf_reg_n_0_[13] ,\dwrRowbuf_reg_n_0_[12] ,\dwrRowbuf_reg_n_0_[11] ,\dwrRowbuf_reg_n_0_[10] ,\dwrRowbuf_reg_n_0_[9] ,\dwrRowbuf_reg_n_0_[8] ,\dwrRowbuf_reg_n_0_[7] ,\dwrRowbuf_reg_n_0_[6] ,\dwrRowbuf_reg_n_0_[5] ,\dwrRowbuf_reg_n_0_[4] ,\dwrRowbuf_reg_n_0_[3] ,\dwrRowbuf_reg_n_0_[2] ,\dwrRowbuf_reg_n_0_[1] ,\dwrRowbuf_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 ({\aRowbufB_reg_n_0_[8] ,\aRowbufB_reg_n_0_[7] ,\aRowbufB_reg_n_0_[6] ,\aRowbufB_reg_n_0_[5] ,\aRowbufB_reg_n_0_[4] ,\aRowbufB_reg_n_0_[3] ,\aRowbufB_reg_n_0_[2] ,\aRowbufB_reg_n_0_[1] ,\aRowbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_2 (enRowbuf_reg_n_0),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_3 ({\abcde_reg_n_0_[2] ,\abcde_reg_n_0_[1] ,\abcde_reg_n_0_[0] }),
        .Q({\aRowbuf_reg_n_0_[8] ,\aRowbuf_reg_n_0_[7] ,\aRowbuf_reg_n_0_[6] ,\aRowbuf_reg_n_0_[5] ,\aRowbuf_reg_n_0_[4] ,\aRowbuf_reg_n_0_[3] ,\aRowbuf_reg_n_0_[2] ,\aRowbuf_reg_n_0_[1] ,\aRowbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .\drdRow4bufBm1_reg[60] (stateGrayegr),
        .enb(enRowbufB_reg_n_0),
        .\gr4_reg[4] ({\nop_reg_n_0_[3] ,\nop_reg_n_0_[2] ,\nop_reg_n_0_[1] ,\nop_reg_n_0_[0] }),
        .\gr4_reg[4]_0 (\drdRow4bufBm1[63]_i_3_n_0 ),
        .\gr4_reg[7] (data10));
  (* SOFT_HLUTNM = "soft_lutpair2997" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \nop[0]_i_1 
       (.I0(stateGrayegr[1]),
        .I1(stateGrayegr[0]),
        .I2(stateGrayegr[2]),
        .I3(\nop_reg_n_0_[0] ),
        .O(nop[0]));
  (* SOFT_HLUTNM = "soft_lutpair2997" *) 
  LUT5 #(
    .INIT(32'h00080800)) 
    \nop[1]_i_1 
       (.I0(stateGrayegr[1]),
        .I1(stateGrayegr[0]),
        .I2(stateGrayegr[2]),
        .I3(\nop_reg_n_0_[0] ),
        .I4(\nop_reg_n_0_[1] ),
        .O(nop[1]));
  LUT6 #(
    .INIT(64'h0008080808000000)) 
    \nop[2]_i_1 
       (.I0(stateGrayegr[1]),
        .I1(stateGrayegr[0]),
        .I2(stateGrayegr[2]),
        .I3(\nop_reg_n_0_[1] ),
        .I4(\nop_reg_n_0_[0] ),
        .I5(\nop_reg_n_0_[2] ),
        .O(nop[2]));
  LUT5 #(
    .INIT(32'h0003A00F)) 
    \nop[3]_i_1 
       (.I0(rgbVideoinToManyAXIS_tvalid),
        .I1(oddNotEven_reg_0),
        .I2(stateGrayegr[1]),
        .I3(stateGrayegr[0]),
        .I4(stateGrayegr[2]),
        .O(\nop[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2996" *) 
  LUT5 #(
    .INIT(32'h2AAA8000)) 
    \nop[3]_i_2 
       (.I0(\nop[3]_i_3_n_0 ),
        .I1(\nop_reg_n_0_[0] ),
        .I2(\nop_reg_n_0_[1] ),
        .I3(\nop_reg_n_0_[2] ),
        .I4(\nop_reg_n_0_[3] ),
        .O(nop[3]));
  (* SOFT_HLUTNM = "soft_lutpair2960" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \nop[3]_i_3 
       (.I0(stateGrayegr[2]),
        .I1(stateGrayegr[0]),
        .I2(stateGrayegr[1]),
        .O(\nop[3]_i_3_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \nop_reg[0] 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(nop[0]),
        .Q(\nop_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \nop_reg[1] 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(nop[1]),
        .Q(\nop_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \nop_reg[2] 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(nop[2]),
        .Q(\nop_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \nop_reg[3] 
       (.C(aclk_sig),
        .CE(\nop[3]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(nop[3]),
        .Q(\nop_reg_n_0_[3] ));
  (* SOFT_HLUTNM = "soft_lutpair3013" *) 
  LUT4 #(
    .INIT(16'hBC40)) 
    oddNotEven_i_1
       (.I0(oddNotEven_reg_0),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(\stateIgr_reg[1]_0 [1]),
        .I3(oddNotEven),
        .O(oddNotEven_i_1_n_0));
  FDCE oddNotEven_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enRowbufB_lcl_reg_0),
        .D(oddNotEven_i_1_n_0),
        .Q(oddNotEven));
  (* SOFT_HLUTNM = "soft_lutpair2994" *) 
  LUT4 #(
    .INIT(16'h0008)) 
    \qrs[0]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I3(\qrs_reg_n_0_[0] ),
        .O(qrs[0]));
  (* SOFT_HLUTNM = "soft_lutpair2994" *) 
  LUT5 #(
    .INIT(32'h00080800)) 
    \qrs[1]_i_1 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I3(\qrs_reg_n_0_[1] ),
        .I4(\qrs_reg_n_0_[0] ),
        .O(qrs[1]));
  LUT4 #(
    .INIT(16'h3007)) 
    \qrs[2]_i_1 
       (.I0(oddNotEven_reg_0),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I3(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .O(\qrs[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0008080808000000)) 
    \qrs[2]_i_2 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I3(\qrs_reg_n_0_[0] ),
        .I4(\qrs_reg_n_0_[1] ),
        .I5(\qrs_reg_n_0_[2] ),
        .O(qrs[2]));
  FDCE #(
    .INIT(1'b0)) 
    \qrs_reg[0] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(qrs[0]),
        .Q(\qrs_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \qrs_reg[1] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(qrs[1]),
        .Q(\qrs_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \qrs_reg[2] 
       (.C(aclk_sig),
        .CE(\qrs[2]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(qrs[2]),
        .Q(\qrs_reg_n_0_[2] ));
  LUT3 #(
    .INIT(8'hF1)) 
    \rawcolEgrstart[3]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(rawcolEgrstart),
        .O(\rawcolEgrstart[3]_i_1_n_0 ));
  FDPE #(
    .INIT(1'b0)) 
    \rawcolEgrstart_reg[3] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\rawcolEgrstart[3]_i_1_n_0 ),
        .PRE(enRowbufB_lcl_reg_0),
        .Q(rawcolEgrstart));
  (* SOFT_HLUTNM = "soft_lutpair3050" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \rawcol_lcl[0]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(rawcol_lcl[0]),
        .O(\rawcol_lcl[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2974" *) 
  LUT5 #(
    .INIT(32'h14440000)) 
    \rawcol_lcl[10]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(rawcol_lcl[10]),
        .I2(rawcol_lcl[9]),
        .I3(\rawcol_lcl[11]_i_2_n_0 ),
        .I4(\stateIgr_reg[1]_0 [0]),
        .O(\rawcol_lcl[10]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0440404040404040)) 
    \rawcol_lcl[11]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(rawcol_lcl[11]),
        .I3(\rawcol_lcl[11]_i_2_n_0 ),
        .I4(rawcol_lcl[9]),
        .I5(rawcol_lcl[10]),
        .O(\rawcol_lcl[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \rawcol_lcl[11]_i_2 
       (.I0(rawcol_lcl[7]),
        .I1(rawcol_lcl[5]),
        .I2(\rawcol_lcl[6]_i_2_n_0 ),
        .I3(rawcol_lcl[4]),
        .I4(rawcol_lcl[6]),
        .I5(rawcol_lcl[8]),
        .O(\rawcol_lcl[11]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2980" *) 
  LUT4 #(
    .INIT(16'h0220)) 
    \rawcol_lcl[1]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(rawcol_lcl[0]),
        .I3(rawcol_lcl[1]),
        .O(\rawcol_lcl[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2980" *) 
  LUT5 #(
    .INIT(32'h04404040)) 
    \rawcol_lcl[2]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(rawcol_lcl[2]),
        .I3(rawcol_lcl[1]),
        .I4(rawcol_lcl[0]),
        .O(\rawcol_lcl[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0220202020202020)) 
    \rawcol_lcl[3]_i_1 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(rawcol_lcl[3]),
        .I3(rawcol_lcl[2]),
        .I4(rawcol_lcl[1]),
        .I5(rawcol_lcl[0]),
        .O(\rawcol_lcl[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h4004404040404040)) 
    \rawcol_lcl[4]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(rawcol_lcl[4]),
        .I3(\rawcol_lcl[4]_i_2_n_0 ),
        .I4(rawcol_lcl[2]),
        .I5(rawcol_lcl[3]),
        .O(\rawcol_lcl[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3034" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \rawcol_lcl[4]_i_2 
       (.I0(rawcol_lcl[0]),
        .I1(rawcol_lcl[1]),
        .O(\rawcol_lcl[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2972" *) 
  LUT5 #(
    .INIT(32'h04404040)) 
    \rawcol_lcl[5]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(rawcol_lcl[5]),
        .I3(rawcol_lcl[4]),
        .I4(\rawcol_lcl[6]_i_2_n_0 ),
        .O(\rawcol_lcl[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0440404040404040)) 
    \rawcol_lcl[6]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(rawcol_lcl[6]),
        .I3(rawcol_lcl[5]),
        .I4(\rawcol_lcl[6]_i_2_n_0 ),
        .I5(rawcol_lcl[4]),
        .O(\rawcol_lcl[6]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h8000)) 
    \rawcol_lcl[6]_i_2 
       (.I0(rawcol_lcl[3]),
        .I1(rawcol_lcl[2]),
        .I2(rawcol_lcl[1]),
        .I3(rawcol_lcl[0]),
        .O(\rawcol_lcl[6]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2973" *) 
  LUT5 #(
    .INIT(32'h04404040)) 
    \rawcol_lcl[7]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(rawcol_lcl[7]),
        .I3(rawcol_lcl[6]),
        .I4(\rawcol_lcl[8]_i_2_n_0 ),
        .O(\rawcol_lcl[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0440404040404040)) 
    \rawcol_lcl[8]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(rawcol_lcl[8]),
        .I3(rawcol_lcl[7]),
        .I4(\rawcol_lcl[8]_i_2_n_0 ),
        .I5(rawcol_lcl[6]),
        .O(\rawcol_lcl[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \rawcol_lcl[8]_i_2 
       (.I0(rawcol_lcl[4]),
        .I1(rawcol_lcl[3]),
        .I2(rawcol_lcl[2]),
        .I3(rawcol_lcl[1]),
        .I4(rawcol_lcl[0]),
        .I5(rawcol_lcl[5]),
        .O(\rawcol_lcl[8]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0440404040404040)) 
    \rawcol_lcl[9]_i_1 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .I2(rawcol_lcl[9]),
        .I3(rawcol_lcl[8]),
        .I4(\rawcol_lcl[9]_i_2_n_0 ),
        .I5(rawcol_lcl[7]),
        .O(\rawcol_lcl[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2000000000000000)) 
    \rawcol_lcl[9]_i_2 
       (.I0(rawcol_lcl[5]),
        .I1(\rawcol_lcl[4]_i_2_n_0 ),
        .I2(rawcol_lcl[2]),
        .I3(rawcol_lcl[3]),
        .I4(rawcol_lcl[4]),
        .I5(rawcol_lcl[6]),
        .O(\rawcol_lcl[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[0] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[0]_i_1_n_0 ),
        .Q(rawcol_lcl[0]));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[10] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[10]_i_1_n_0 ),
        .Q(rawcol_lcl[10]));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[11] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[11]_i_1_n_0 ),
        .Q(rawcol_lcl[11]));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[1] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[1]_i_1_n_0 ),
        .Q(rawcol_lcl[1]));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[2] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[2]_i_1_n_0 ),
        .Q(rawcol_lcl[2]));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[3] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[3]_i_1_n_0 ),
        .Q(rawcol_lcl[3]));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[4] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[4]_i_1_n_0 ),
        .Q(rawcol_lcl[4]));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[5] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[5]_i_1_n_0 ),
        .Q(rawcol_lcl[5]));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[6] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[6]_i_1_n_0 ),
        .Q(rawcol_lcl[6]));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[7] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[7]_i_1_n_0 ),
        .Q(rawcol_lcl[7]));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[8] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[8]_i_1_n_0 ),
        .Q(rawcol_lcl[8]));
  FDCE #(
    .INIT(1'b0)) 
    \rawcol_lcl_reg[9] 
       (.C(aclk_sig),
        .CE(E),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\rawcol_lcl[9]_i_1_n_0 ),
        .Q(rawcol_lcl[9]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[0] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[0]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [0]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[10] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[10]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [10]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[11] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[11]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [11]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[12] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[12]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [12]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[13] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[13]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [13]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[14] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[14]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [14]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[15] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[15]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [15]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[16] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[16]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [16]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[17] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[17]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [17]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[18] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[18]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [18]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[19] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[19]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [19]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[1] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[1]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [1]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[20] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[20]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [20]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[21] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[21]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [21]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[22] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[22]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [22]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[23] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[23]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [23]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[24] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[24]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [24]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[25] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[25]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [25]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[26] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[26]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [26]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[27] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[27]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [27]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[28] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[28]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [28]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[29] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[29]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [29]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[2] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[2]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [2]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[30] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[30]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [30]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[31] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[31]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [31]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[32] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[32]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [32]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[33] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[33]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [33]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[34] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[34]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [34]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[35] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[35]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [35]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[3] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[3]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [3]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[4] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[4]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [4]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[5] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[5]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [5]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[6] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[6]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [6]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[7] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[7]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [7]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[8] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[8]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [8]));
  FDCE \rgbToManyAXIS_tdata_sig_reg[9] 
       (.C(aclk_sig),
        .CE(\gr[11]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tdata_sig[9]),
        .Q(\rgbToManyAXIS_tdata_sig_reg[35]_0 [9]));
  (* SOFT_HLUTNM = "soft_lutpair3014" *) 
  LUT5 #(
    .INIT(32'hFBFB0901)) 
    rgbToManyAXIS_tlast_sig_i_1
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I3(rgbToManyAXIS_tlast_sig_i_2_n_0),
        .I4(rgbToManyAXIS_tlast_sig_reg_0),
        .O(rgbToManyAXIS_tlast_sig_i_1_n_0));
  LUT6 #(
    .INIT(64'h0000400440040000)) 
    rgbToManyAXIS_tlast_sig_i_2
       (.I0(rgbToManyAXIS_tlast_sig_i_3_n_0),
        .I1(enEobufB_reg_0),
        .I2(rgbToManyAXIS_tlast_sig_i_5_n_0),
        .I3(enRowbuf_reg_0[8]),
        .I4(\col_lcl[10]_i_2__1_n_0 ),
        .I5(enRowbuf_reg_0[10]),
        .O(rgbToManyAXIS_tlast_sig_i_2_n_0));
  LUT6 #(
    .INIT(64'h955555556AAAAAAA)) 
    rgbToManyAXIS_tlast_sig_i_3
       (.I0(enRowbuf_reg_0[9]),
        .I1(\col_lcl_reg_n_0_[8] ),
        .I2(Q[3]),
        .I3(\col_lcl_reg[5]_0 ),
        .I4(Q[4]),
        .I5(\col_lcl_reg_n_0_[9] ),
        .O(rgbToManyAXIS_tlast_sig_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair2957" *) 
  LUT4 #(
    .INIT(16'h6AAA)) 
    rgbToManyAXIS_tlast_sig_i_5
       (.I0(\col_lcl_reg_n_0_[8] ),
        .I1(Q[3]),
        .I2(\col_lcl_reg[5]_0 ),
        .I3(Q[4]),
        .O(rgbToManyAXIS_tlast_sig_i_5_n_0));
  LUT5 #(
    .INIT(32'h95556AAA)) 
    rgbToManyAXIS_tlast_sig_i_8
       (.I0(enRowbuf_reg_0[3]),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(\col_lcl_reg_n_0_[3] ),
        .O(\NColRaw_sig_reg[4] ));
  LUT5 #(
    .INIT(32'h6AAAAAAA)) 
    rgbToManyAXIS_tlast_sig_i_9
       (.I0(\col_lcl_reg_n_0_[4] ),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(\col_lcl_reg_n_0_[3] ),
        .O(\col_lcl_reg[4]_0 ));
  FDPE rgbToManyAXIS_tlast_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(rgbToManyAXIS_tlast_sig_i_1_n_0),
        .PRE(enRowbufB_lcl_reg_0),
        .Q(rgbToManyAXIS_tlast_sig_reg_0));
  (* SOFT_HLUTNM = "soft_lutpair3040" *) 
  LUT4 #(
    .INIT(16'hCE08)) 
    rgbToManyAXIS_tvalid_sig_i_1
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I3(rgbVideoinToManyAXIS_tvalid),
        .O(rgbToManyAXIS_tvalid_sig_i_1_n_0));
  FDCE rgbToManyAXIS_tvalid_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enRowbufB_lcl_reg_0),
        .D(rgbToManyAXIS_tvalid_sig_i_1_n_0),
        .Q(rgbVideoinToManyAXIS_tvalid));
  LUT6 #(
    .INIT(64'h00000600FF0006FF)) 
    \stateGraypack[0]_i_1 
       (.I0(\stateGraypack[0]_i_2_n_0 ),
        .I1(enRowbuf_reg_0[10]),
        .I2(\stateGraypack[0]_i_3_n_0 ),
        .I3(stateGraypack[1]),
        .I4(stateGraypack[0]),
        .I5(oddNotEven_reg_0),
        .O(\stateGraypack[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF6FF6F96FFFFF)) 
    \stateGraypack[0]_i_10 
       (.I0(\col_lcl_reg[2]__1_n_0 ),
        .I1(enRowbuf_reg_0[2]),
        .I2(enRowbuf_reg_0[1]),
        .I3(\col_lcl_reg[1]__1_n_0 ),
        .I4(\col_lcl_reg[0]__1_n_0 ),
        .I5(enRowbuf_reg_0[0]),
        .O(\stateGraypack[0]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h9555555555555555)) 
    \stateGraypack[0]_i_2 
       (.I0(\col_lcl_reg[10]__1_n_0 ),
        .I1(\col_lcl_reg[8]__1_n_0 ),
        .I2(\col_lcl_reg[6]__1_n_0 ),
        .I3(\col_lcl[8]__1_i_2_n_0 ),
        .I4(\col_lcl_reg[7]__1_n_0 ),
        .I5(\col_lcl_reg[9]__1_n_0 ),
        .O(\stateGraypack[0]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFF6FFF6FFFF)) 
    \stateGraypack[0]_i_3 
       (.I0(\col_lcl[9]__1_i_2_n_0 ),
        .I1(enRowbuf_reg_0[9]),
        .I2(\stateGraypack[0]_i_4_n_0 ),
        .I3(\stateGraypack[0]_i_5_n_0 ),
        .I4(enRowbuf_reg_0[8]),
        .I5(\stateGraypack[0]_i_6_n_0 ),
        .O(\stateGraypack[0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3032" *) 
  LUT4 #(
    .INIT(16'h956A)) 
    \stateGraypack[0]_i_4 
       (.I0(enRowbuf_reg_0[7]),
        .I1(\col_lcl_reg[6]__1_n_0 ),
        .I2(\col_lcl[8]__1_i_2_n_0 ),
        .I3(\col_lcl_reg[7]__1_n_0 ),
        .O(\stateGraypack[0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFEBFBFEFEFFBFBFE)) 
    \stateGraypack[0]_i_5 
       (.I0(\stateGraypack[0]_i_7_n_0 ),
        .I1(enRowbuf_reg_0[5]),
        .I2(\col_lcl_reg[6]__1_n_0 ),
        .I3(\stateGraypack[0]_i_8_n_0 ),
        .I4(\col_lcl_reg[5]__1_n_0 ),
        .I5(enRowbuf_reg_0[6]),
        .O(\stateGraypack[0]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2999" *) 
  LUT4 #(
    .INIT(16'h9555)) 
    \stateGraypack[0]_i_6 
       (.I0(\col_lcl_reg[8]__1_n_0 ),
        .I1(\col_lcl_reg[6]__1_n_0 ),
        .I2(\col_lcl[8]__1_i_2_n_0 ),
        .I3(\col_lcl_reg[7]__1_n_0 ),
        .O(\stateGraypack[0]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFF96F6FF6)) 
    \stateGraypack[0]_i_7 
       (.I0(\col_lcl_reg[4]__1_n_0 ),
        .I1(enRowbuf_reg_0[4]),
        .I2(enRowbuf_reg_0[3]),
        .I3(\stateGraypack[0]_i_9_n_0 ),
        .I4(\col_lcl_reg[3]__1_n_0 ),
        .I5(\stateGraypack[0]_i_10_n_0 ),
        .O(\stateGraypack[0]_i_7_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3000" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \stateGraypack[0]_i_8 
       (.I0(\col_lcl_reg[4]__1_n_0 ),
        .I1(\col_lcl_reg[2]__1_n_0 ),
        .I2(\col_lcl_reg[1]__1_n_0 ),
        .I3(\col_lcl_reg[0]__1_n_0 ),
        .I4(\col_lcl_reg[3]__1_n_0 ),
        .O(\stateGraypack[0]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3052" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \stateGraypack[0]_i_9 
       (.I0(\col_lcl_reg[2]__1_n_0 ),
        .I1(\col_lcl_reg[1]__1_n_0 ),
        .I2(\col_lcl_reg[0]__1_n_0 ),
        .O(\stateGraypack[0]_i_9_n_0 ));
  LUT4 #(
    .INIT(16'hFCAF)) 
    \stateGraypack[1]_i_1 
       (.I0(strbEgrstart_reg_n_0),
        .I1(rgbVideoinToManyAXIS_tvalid),
        .I2(stateGraypack[0]),
        .I3(stateGraypack[1]),
        .O(\stateGraypack[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3010" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \stateGraypack[1]_i_2 
       (.I0(stateGraypack[1]),
        .I1(stateGraypack[0]),
        .O(\stateGraypack[1]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateGraypack_reg[0] 
       (.C(aclk_sig),
        .CE(\stateGraypack[1]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\stateGraypack[0]_i_1_n_0 ),
        .Q(stateGraypack[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateGraypack_reg[1] 
       (.C(aclk_sig),
        .CE(\stateGraypack[1]_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\stateGraypack[1]_i_2_n_0 ),
        .Q(stateGraypack[1]));
  (* SOFT_HLUTNM = "soft_lutpair3001" *) 
  LUT5 #(
    .INIT(32'h0FDDFFF0)) 
    \stateIgr[0]_i_1 
       (.I0(camifToVideoinAXIS_tlast),
        .I1(\stateIgr[0]_i_2_n_0 ),
        .I2(oddNotEven_reg_0),
        .I3(\stateIgr_reg[1]_0 [1]),
        .I4(\stateIgr_reg[1]_0 [0]),
        .O(p_3_out[0]));
  (* SOFT_HLUTNM = "soft_lutpair3039" *) 
  LUT3 #(
    .INIT(8'h98)) 
    \stateIgr[0]_i_2 
       (.I0(klm[2]),
        .I1(\klm_reg[0]_0 ),
        .I2(klm[1]),
        .O(\stateIgr[0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3001" *) 
  LUT3 #(
    .INIT(8'h64)) 
    \stateIgr[1]_i_2 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .I2(camifToVideoinAXIS_tlast),
        .O(p_3_out[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateIgr_reg[0] 
       (.C(aclk_sig),
        .CE(\stateIgr_reg[1]_1 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(p_3_out[0]),
        .Q(\stateIgr_reg[1]_0 [0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateIgr_reg[1] 
       (.C(aclk_sig),
        .CE(\stateIgr_reg[1]_1 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(p_3_out[1]),
        .Q(\stateIgr_reg[1]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair2974" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \state[0]_i_3 
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(\stateIgr_reg[1]_0 [0]),
        .O(videoinStateIgr_dbg[0]));
  (* SOFT_HLUTNM = "soft_lutpair2972" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \state[4]_i_3 
       (.I0(\stateIgr_reg[1]_0 [0]),
        .I1(\stateIgr_reg[1]_0 [1]),
        .O(videoinStateIgr_dbg[1]));
  (* SOFT_HLUTNM = "soft_lutpair3014" *) 
  LUT3 #(
    .INIT(8'hE6)) 
    \state[4]_i_5 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [0]),
        .I2(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .O(videoinStateRgbegr_dbg[0]));
  LUT2 #(
    .INIT(4'h8)) 
    \state[7]_i_3 
       (.I0(\FSM_sequential_stateRgbegr_reg[2]_0 [1]),
        .I1(\FSM_sequential_stateRgbegr_reg[2]_0 [2]),
        .O(videoinStateRgbegr_dbg[1]));
  LUT4 #(
    .INIT(16'hAA40)) 
    strbEgrstart_i_1
       (.I0(\stateIgr_reg[1]_0 [1]),
        .I1(strbEgrstart_i_2_n_0),
        .I2(\stateIgr_reg[1]_0 [0]),
        .I3(strbEgrstart_reg_n_0),
        .O(strbEgrstart_i_1_n_0));
  LUT6 #(
    .INIT(64'h2000000200000000)) 
    strbEgrstart_i_2
       (.I0(strbEgrstart_i_3_n_0),
        .I1(strbEgrstart_i_4_n_0),
        .I2(rawcol_lcl[2]),
        .I3(rawcol_lcl[3]),
        .I4(rawcolEgrstart),
        .I5(oddNotEven),
        .O(strbEgrstart_i_2_n_0));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    strbEgrstart_i_3
       (.I0(rawcol_lcl[10]),
        .I1(rawcol_lcl[11]),
        .I2(rawcol_lcl[6]),
        .I3(rawcol_lcl[8]),
        .I4(rawcol_lcl[7]),
        .I5(rawcol_lcl[9]),
        .O(strbEgrstart_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3034" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    strbEgrstart_i_4
       (.I0(rawcol_lcl[1]),
        .I1(rawcol_lcl[0]),
        .I2(rawcol_lcl[5]),
        .I3(rawcol_lcl[4]),
        .O(strbEgrstart_i_4_n_0));
  FDCE strbEgrstart_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(enRowbufB_lcl_reg_0),
        .D(strbEgrstart_i_1_n_0),
        .Q(strbEgrstart_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3053" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \tuv[0]_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\tuv_reg_n_0_[0] ),
        .O(tuv[0]));
  (* SOFT_HLUTNM = "soft_lutpair2975" *) 
  LUT4 #(
    .INIT(16'h0220)) 
    \tuv[1]_i_1 
       (.I0(stateGraypack[1]),
        .I1(stateGraypack[0]),
        .I2(\tuv_reg_n_0_[1] ),
        .I3(\tuv_reg_n_0_[0] ),
        .O(tuv[1]));
  (* SOFT_HLUTNM = "soft_lutpair2975" *) 
  LUT5 #(
    .INIT(32'h04404040)) 
    \tuv[2]_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\tuv_reg_n_0_[2] ),
        .I3(\tuv_reg_n_0_[0] ),
        .I4(\tuv_reg_n_0_[1] ),
        .O(\tuv[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0440404040404040)) 
    \tuv[3]_i_1 
       (.I0(stateGraypack[0]),
        .I1(stateGraypack[1]),
        .I2(\tuv_reg_n_0_[3] ),
        .I3(\tuv_reg_n_0_[2] ),
        .I4(\tuv_reg_n_0_[1] ),
        .I5(\tuv_reg_n_0_[0] ),
        .O(\tuv[3]_i_1_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \tuv_reg[0] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(tuv[0]),
        .Q(\tuv_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \tuv_reg[1] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(tuv[1]),
        .Q(\tuv_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \tuv_reg[2] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\tuv[2]_i_1_n_0 ),
        .Q(\tuv_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \tuv_reg[3] 
       (.C(aclk_sig),
        .CE(\col_lcl[10]__1_i_1_n_0 ),
        .CLR(enRowbufB_lcl_reg_0),
        .D(\tuv[3]_i_1_n_0 ),
        .Q(\tuv_reg_n_0_[3] ));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Vidtrack
   (doutb,
    ackInvVidtrackSelect,
    ackInvVidtrackSet,
    Q,
    seqbufVidtrackToHostifAXIS_tvalid,
    vidtrackGetInfoTixVState,
    \TCapt_reg[31]_0 ,
    ackSeqbufVidtrackToHostif,
    vidtrackGetInfoPtr0Seqbuf,
    \tixVCapture_reg[1]_0 ,
    aclk_sig,
    first_reg_0,
    hdrNotFix,
    reqInvVidtrackSet,
    reqInvVidtrackSelect,
    restart_reg_0,
    dneSeqbufVidtrackToHostif,
    seqbufVidtrackToHostifAXIS_tready,
    reqSeqbufVidtrackToHostif,
    \state_reg[7]_0 ,
    videoinStateRgbegr_dbg,
    \state_reg[5]_0 ,
    \state_reg[5]_1 ,
    \state_reg[0]_0 ,
    videoinStateIgr_dbg,
    \state_reg[4]_0 ,
    D,
    \tixVCapture_reg[7]_0 ,
    \TCaptMax_reg[7]_0 );
  output [63:0]doutb;
  output ackInvVidtrackSelect;
  output ackInvVidtrackSet;
  output [0:0]Q;
  output seqbufVidtrackToHostifAXIS_tvalid;
  output [1:0]vidtrackGetInfoTixVState;
  output [31:0]\TCapt_reg[31]_0 ;
  output ackSeqbufVidtrackToHostif;
  output [9:0]vidtrackGetInfoPtr0Seqbuf;
  output [1:0]\tixVCapture_reg[1]_0 ;
  input aclk_sig;
  input [0:0]first_reg_0;
  input hdrNotFix;
  input reqInvVidtrackSet;
  input reqInvVidtrackSelect;
  input restart_reg_0;
  input dneSeqbufVidtrackToHostif;
  input seqbufVidtrackToHostifAXIS_tready;
  input reqSeqbufVidtrackToHostif;
  input [0:0]\state_reg[7]_0 ;
  input [1:0]videoinStateRgbegr_dbg;
  input [1:0]\state_reg[5]_0 ;
  input \state_reg[5]_1 ;
  input \state_reg[0]_0 ;
  input [1:0]videoinStateIgr_dbg;
  input \state_reg[4]_0 ;
  input [23:0]D;
  input [7:0]\tixVCapture_reg[7]_0 ;
  input [7:0]\TCaptMax_reg[7]_0 ;

  wire [23:0]D;
  wire \FSM_onehot_stateSeq[0]_i_1_n_0 ;
  wire \FSM_onehot_stateSeq[0]_i_2_n_0 ;
  wire \FSM_onehot_stateSeq[2]_i_1_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_1_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_2_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_3_n_0 ;
  wire \FSM_onehot_stateSeq[3]_i_4_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_1_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_2_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_3_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_4_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_5_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_6_n_0 ;
  wire \FSM_onehot_stateSeq[5]_i_7_n_0 ;
  wire \FSM_onehot_stateSeq_reg_n_0_[4] ;
  wire [0:0]Q;
  wire TCapt;
  wire TCaptMax;
  wire [7:0]\TCaptMax_reg[7]_0 ;
  wire \TCaptMax_reg_n_0_[0] ;
  wire \TCaptMax_reg_n_0_[10] ;
  wire \TCaptMax_reg_n_0_[11] ;
  wire \TCaptMax_reg_n_0_[12] ;
  wire \TCaptMax_reg_n_0_[13] ;
  wire \TCaptMax_reg_n_0_[14] ;
  wire \TCaptMax_reg_n_0_[15] ;
  wire \TCaptMax_reg_n_0_[16] ;
  wire \TCaptMax_reg_n_0_[17] ;
  wire \TCaptMax_reg_n_0_[18] ;
  wire \TCaptMax_reg_n_0_[19] ;
  wire \TCaptMax_reg_n_0_[1] ;
  wire \TCaptMax_reg_n_0_[20] ;
  wire \TCaptMax_reg_n_0_[21] ;
  wire \TCaptMax_reg_n_0_[22] ;
  wire \TCaptMax_reg_n_0_[23] ;
  wire \TCaptMax_reg_n_0_[24] ;
  wire \TCaptMax_reg_n_0_[25] ;
  wire \TCaptMax_reg_n_0_[26] ;
  wire \TCaptMax_reg_n_0_[27] ;
  wire \TCaptMax_reg_n_0_[28] ;
  wire \TCaptMax_reg_n_0_[29] ;
  wire \TCaptMax_reg_n_0_[2] ;
  wire \TCaptMax_reg_n_0_[30] ;
  wire \TCaptMax_reg_n_0_[31] ;
  wire \TCaptMax_reg_n_0_[3] ;
  wire \TCaptMax_reg_n_0_[4] ;
  wire \TCaptMax_reg_n_0_[5] ;
  wire \TCaptMax_reg_n_0_[6] ;
  wire \TCaptMax_reg_n_0_[7] ;
  wire \TCaptMax_reg_n_0_[8] ;
  wire \TCaptMax_reg_n_0_[9] ;
  wire [31:0]TCapt__0;
  wire \TCapt_reg[16]_i_2_n_0 ;
  wire \TCapt_reg[16]_i_2_n_1 ;
  wire \TCapt_reg[16]_i_2_n_2 ;
  wire \TCapt_reg[16]_i_2_n_3 ;
  wire \TCapt_reg[16]_i_2_n_4 ;
  wire \TCapt_reg[16]_i_2_n_5 ;
  wire \TCapt_reg[16]_i_2_n_6 ;
  wire \TCapt_reg[16]_i_2_n_7 ;
  wire \TCapt_reg[24]_i_2_n_0 ;
  wire \TCapt_reg[24]_i_2_n_1 ;
  wire \TCapt_reg[24]_i_2_n_2 ;
  wire \TCapt_reg[24]_i_2_n_3 ;
  wire \TCapt_reg[24]_i_2_n_4 ;
  wire \TCapt_reg[24]_i_2_n_5 ;
  wire \TCapt_reg[24]_i_2_n_6 ;
  wire \TCapt_reg[24]_i_2_n_7 ;
  wire [31:0]\TCapt_reg[31]_0 ;
  wire \TCapt_reg[31]_i_2_n_2 ;
  wire \TCapt_reg[31]_i_2_n_3 ;
  wire \TCapt_reg[31]_i_2_n_4 ;
  wire \TCapt_reg[31]_i_2_n_5 ;
  wire \TCapt_reg[31]_i_2_n_6 ;
  wire \TCapt_reg[31]_i_2_n_7 ;
  wire \TCapt_reg[8]_i_2_n_0 ;
  wire \TCapt_reg[8]_i_2_n_1 ;
  wire \TCapt_reg[8]_i_2_n_2 ;
  wire \TCapt_reg[8]_i_2_n_3 ;
  wire \TCapt_reg[8]_i_2_n_4 ;
  wire \TCapt_reg[8]_i_2_n_5 ;
  wire \TCapt_reg[8]_i_2_n_6 ;
  wire \TCapt_reg[8]_i_2_n_7 ;
  wire \aSeqbufB[0]_i_1_n_0 ;
  wire \aSeqbufB[1]_i_1_n_0 ;
  wire \aSeqbufB[2]_i_1_n_0 ;
  wire \aSeqbufB[3]_i_1_n_0 ;
  wire \aSeqbufB[4]_i_1_n_0 ;
  wire \aSeqbufB[5]_i_1_n_0 ;
  wire \aSeqbufB[5]_i_2_n_0 ;
  wire \aSeqbufB[6]_i_1_n_0 ;
  wire \aSeqbufB[7]_i_1_n_0 ;
  wire \aSeqbufB[8]_i_1_n_0 ;
  wire \aSeqbufB[8]_i_2_n_0 ;
  wire \aSeqbufB[8]_i_3_n_0 ;
  wire \aSeqbufB[8]_i_4_n_0 ;
  wire \aSeqbufB_reg_n_0_[0] ;
  wire \aSeqbufB_reg_n_0_[1] ;
  wire \aSeqbufB_reg_n_0_[2] ;
  wire \aSeqbufB_reg_n_0_[3] ;
  wire \aSeqbufB_reg_n_0_[4] ;
  wire \aSeqbufB_reg_n_0_[5] ;
  wire \aSeqbufB_reg_n_0_[6] ;
  wire \aSeqbufB_reg_n_0_[7] ;
  wire \aSeqbufB_reg_n_0_[8] ;
  wire \aSeqbuf[0]_i_1_n_0 ;
  wire \aSeqbuf[1]_i_1_n_0 ;
  wire \aSeqbuf[2]_i_1_n_0 ;
  wire \aSeqbuf[3]_i_1_n_0 ;
  wire \aSeqbuf[3]_i_2_n_0 ;
  wire \aSeqbuf[4]_i_1_n_0 ;
  wire \aSeqbuf[5]_i_1_n_0 ;
  wire \aSeqbuf[5]_i_2_n_0 ;
  wire \aSeqbuf[6]_i_1_n_0 ;
  wire \aSeqbuf[7]_i_1_n_0 ;
  wire \aSeqbuf[8]_i_1_n_0 ;
  wire \aSeqbuf[8]_i_2_n_0 ;
  wire \aSeqbuf[8]_i_3_n_0 ;
  wire \aSeqbuf[8]_i_4_n_0 ;
  wire \aSeqbuf[9]_i_1_n_0 ;
  wire \aSeqbuf[9]_i_2_n_0 ;
  wire \aSeqbuf[9]_i_3_n_0 ;
  wire \aSeqbuf[9]_i_4_n_0 ;
  wire \aSeqbuf[9]_i_5_n_0 ;
  wire \aSeqbuf[9]_i_6_n_0 ;
  wire \aSeqbuf[9]_i_7_n_0 ;
  wire \aSeqbuf_reg_n_0_[0] ;
  wire \aSeqbuf_reg_n_0_[1] ;
  wire \aSeqbuf_reg_n_0_[2] ;
  wire \aSeqbuf_reg_n_0_[3] ;
  wire \aSeqbuf_reg_n_0_[4] ;
  wire \aSeqbuf_reg_n_0_[5] ;
  wire \aSeqbuf_reg_n_0_[6] ;
  wire \aSeqbuf_reg_n_0_[7] ;
  wire \aSeqbuf_reg_n_0_[8] ;
  wire \aSeqbuf_reg_n_0_[9] ;
  wire ackInvSelect_sig_i_1_n_0;
  wire ackInvSelect_sig_i_2_n_0;
  wire ackInvSet_sig_i_1__0_n_0;
  wire ackInvVidtrackSelect;
  wire ackInvVidtrackSet;
  wire ackSeqbufBToSeqClear;
  wire ackSeqbufVidtrackToHostif;
  wire aclk_sig;
  wire \burstCnt[0]_i_1__0_n_0 ;
  wire \burstCnt[10]_i_1__0_n_0 ;
  wire \burstCnt[10]_i_2_n_0 ;
  wire \burstCnt[10]_i_3_n_0 ;
  wire \burstCnt[11]_i_1__0_n_0 ;
  wire \burstCnt[11]_i_2_n_0 ;
  wire \burstCnt[12]_i_1__0_n_0 ;
  wire \burstCnt[12]_i_2_n_0 ;
  wire \burstCnt[13]_i_1__0_n_0 ;
  wire \burstCnt[13]_i_2_n_0 ;
  wire \burstCnt[14]_i_1__0_n_0 ;
  wire \burstCnt[14]_i_2_n_0 ;
  wire \burstCnt[14]_i_3_n_0 ;
  wire \burstCnt[15]_i_10_n_0 ;
  wire \burstCnt[15]_i_11_n_0 ;
  wire \burstCnt[15]_i_12_n_0 ;
  wire \burstCnt[15]_i_13_n_0 ;
  wire \burstCnt[15]_i_14_n_0 ;
  wire \burstCnt[15]_i_15_n_0 ;
  wire \burstCnt[15]_i_16_n_0 ;
  wire \burstCnt[15]_i_17_n_0 ;
  wire \burstCnt[15]_i_18_n_0 ;
  wire \burstCnt[15]_i_19_n_0 ;
  wire \burstCnt[15]_i_1_n_0 ;
  wire \burstCnt[15]_i_20_n_0 ;
  wire \burstCnt[15]_i_21_n_0 ;
  wire \burstCnt[15]_i_22_n_0 ;
  wire \burstCnt[15]_i_23_n_0 ;
  wire \burstCnt[15]_i_24_n_0 ;
  wire \burstCnt[15]_i_25_n_0 ;
  wire \burstCnt[15]_i_26_n_0 ;
  wire \burstCnt[15]_i_27_n_0 ;
  wire \burstCnt[15]_i_28_n_0 ;
  wire \burstCnt[15]_i_2__0_n_0 ;
  wire \burstCnt[15]_i_3_n_0 ;
  wire \burstCnt[15]_i_4_n_0 ;
  wire \burstCnt[15]_i_5_n_0 ;
  wire \burstCnt[15]_i_6__0_n_0 ;
  wire \burstCnt[15]_i_7_n_0 ;
  wire \burstCnt[15]_i_8_n_0 ;
  wire \burstCnt[15]_i_9_n_0 ;
  wire \burstCnt[1]_i_1_n_0 ;
  wire \burstCnt[2]_i_1_n_0 ;
  wire \burstCnt[3]_i_1__0_n_0 ;
  wire \burstCnt[4]_i_1_n_0 ;
  wire \burstCnt[4]_i_2_n_0 ;
  wire \burstCnt[5]_i_1_n_0 ;
  wire \burstCnt[5]_i_2_n_0 ;
  wire \burstCnt[6]_i_1_n_0 ;
  wire \burstCnt[6]_i_2_n_0 ;
  wire \burstCnt[7]_i_1_n_0 ;
  wire \burstCnt[7]_i_2_n_0 ;
  wire \burstCnt[7]_i_3_n_0 ;
  wire \burstCnt[8]_i_1_n_0 ;
  wire \burstCnt[8]_i_2_n_0 ;
  wire \burstCnt[9]_i_1__0_n_0 ;
  wire \burstCnt[9]_i_2_n_0 ;
  wire \burstCnt_reg_n_0_[0] ;
  wire \burstCnt_reg_n_0_[10] ;
  wire \burstCnt_reg_n_0_[11] ;
  wire \burstCnt_reg_n_0_[12] ;
  wire \burstCnt_reg_n_0_[13] ;
  wire \burstCnt_reg_n_0_[14] ;
  wire \burstCnt_reg_n_0_[15] ;
  wire \burstCnt_reg_n_0_[1] ;
  wire \burstCnt_reg_n_0_[2] ;
  wire \burstCnt_reg_n_0_[3] ;
  wire \burstCnt_reg_n_0_[4] ;
  wire \burstCnt_reg_n_0_[5] ;
  wire \burstCnt_reg_n_0_[6] ;
  wire \burstCnt_reg_n_0_[7] ;
  wire \burstCnt_reg_n_0_[8] ;
  wire \burstCnt_reg_n_0_[9] ;
  wire \burstState[0]_i_1_n_0 ;
  wire \burstState[1]_i_1_n_0 ;
  wire \burstState[4]_i_1_n_0 ;
  wire \burstState[5]_i_1_n_0 ;
  wire \burstState[6]_i_1_n_0 ;
  wire \burstState_reg_n_0_[0] ;
  wire \burstState_reg_n_0_[1] ;
  wire \burstState_reg_n_0_[4] ;
  wire \burstState_reg_n_0_[5] ;
  wire \burstState_reg_n_0_[6] ;
  wire dneSeqbufVidtrackToHostif;
  wire [63:0]doutb;
  wire [31:0]dwrSeqbuf;
  wire \dwrSeqbuf[0]_i_1_n_0 ;
  wire \dwrSeqbuf[0]_i_2_n_0 ;
  wire \dwrSeqbuf[10]_i_1_n_0 ;
  wire \dwrSeqbuf[10]_i_2_n_0 ;
  wire \dwrSeqbuf[11]_i_1_n_0 ;
  wire \dwrSeqbuf[11]_i_2_n_0 ;
  wire \dwrSeqbuf[12]_i_1_n_0 ;
  wire \dwrSeqbuf[12]_i_2_n_0 ;
  wire \dwrSeqbuf[13]_i_1_n_0 ;
  wire \dwrSeqbuf[13]_i_2_n_0 ;
  wire \dwrSeqbuf[14]_i_1_n_0 ;
  wire \dwrSeqbuf[14]_i_2_n_0 ;
  wire \dwrSeqbuf[15]_i_1_n_0 ;
  wire \dwrSeqbuf[15]_i_2_n_0 ;
  wire \dwrSeqbuf[15]_i_3_n_0 ;
  wire \dwrSeqbuf[16]_i_1_n_0 ;
  wire \dwrSeqbuf[17]_i_1_n_0 ;
  wire \dwrSeqbuf[18]_i_1_n_0 ;
  wire \dwrSeqbuf[19]_i_1_n_0 ;
  wire \dwrSeqbuf[1]_i_1_n_0 ;
  wire \dwrSeqbuf[1]_i_2_n_0 ;
  wire \dwrSeqbuf[1]_i_3_n_0 ;
  wire \dwrSeqbuf[20]_i_1_n_0 ;
  wire \dwrSeqbuf[21]_i_1_n_0 ;
  wire \dwrSeqbuf[22]_i_1_n_0 ;
  wire \dwrSeqbuf[23]_i_1_n_0 ;
  wire \dwrSeqbuf[23]_i_2_n_0 ;
  wire \dwrSeqbuf[24]_i_1_n_0 ;
  wire \dwrSeqbuf[25]_i_1_n_0 ;
  wire \dwrSeqbuf[26]_i_1_n_0 ;
  wire \dwrSeqbuf[27]_i_1_n_0 ;
  wire \dwrSeqbuf[28]_i_1_n_0 ;
  wire \dwrSeqbuf[29]_i_1_n_0 ;
  wire \dwrSeqbuf[2]_i_1_n_0 ;
  wire \dwrSeqbuf[2]_i_2_n_0 ;
  wire \dwrSeqbuf[2]_i_3_n_0 ;
  wire \dwrSeqbuf[30]_i_1_n_0 ;
  wire \dwrSeqbuf[31]_i_1_n_0 ;
  wire \dwrSeqbuf[31]_i_2_n_0 ;
  wire \dwrSeqbuf[31]_i_3__0_n_0 ;
  wire \dwrSeqbuf[31]_i_4_n_0 ;
  wire \dwrSeqbuf[3]_i_1_n_0 ;
  wire \dwrSeqbuf[3]_i_2_n_0 ;
  wire \dwrSeqbuf[3]_i_3_n_0 ;
  wire \dwrSeqbuf[4]_i_1_n_0 ;
  wire \dwrSeqbuf[4]_i_2_n_0 ;
  wire \dwrSeqbuf[4]_i_3_n_0 ;
  wire \dwrSeqbuf[5]_i_1_n_0 ;
  wire \dwrSeqbuf[5]_i_2_n_0 ;
  wire \dwrSeqbuf[5]_i_3_n_0 ;
  wire \dwrSeqbuf[6]_i_1_n_0 ;
  wire \dwrSeqbuf[6]_i_2_n_0 ;
  wire \dwrSeqbuf[7]_i_1_n_0 ;
  wire \dwrSeqbuf[7]_i_2_n_0 ;
  wire \dwrSeqbuf[8]_i_1_n_0 ;
  wire \dwrSeqbuf[8]_i_2_n_0 ;
  wire \dwrSeqbuf[9]_i_1_n_0 ;
  wire \dwrSeqbuf[9]_i_2_n_0 ;
  wire enSeqbuf;
  wire enSeqbuf_reg_n_0;
  wire first;
  wire first__0;
  wire [0:0]first_reg_0;
  wire hdrNotFix;
  wire [1:0]i;
  wire \i[1]_i_1__1_n_0 ;
  wire \i_reg_n_0_[0] ;
  wire \i_reg_n_0_[1] ;
  wire [31:1]in12;
  wire [2:0]p_0_in__0;
  wire ptr0SeqbufTrackNotFixed_i_1_n_0;
  wire ptr0SeqbufTrackNotFixed_reg_n_0;
  wire [31:0]quad;
  wire \quad[15]_i_1_n_0 ;
  wire \quad[23]_i_1_n_0 ;
  wire \quad[7]_i_1_n_0 ;
  wire \quad_reg_n_0_[0] ;
  wire \quad_reg_n_0_[10] ;
  wire \quad_reg_n_0_[11] ;
  wire \quad_reg_n_0_[12] ;
  wire \quad_reg_n_0_[13] ;
  wire \quad_reg_n_0_[14] ;
  wire \quad_reg_n_0_[15] ;
  wire \quad_reg_n_0_[16] ;
  wire \quad_reg_n_0_[17] ;
  wire \quad_reg_n_0_[18] ;
  wire \quad_reg_n_0_[19] ;
  wire \quad_reg_n_0_[1] ;
  wire \quad_reg_n_0_[20] ;
  wire \quad_reg_n_0_[21] ;
  wire \quad_reg_n_0_[22] ;
  wire \quad_reg_n_0_[23] ;
  wire \quad_reg_n_0_[24] ;
  wire \quad_reg_n_0_[25] ;
  wire \quad_reg_n_0_[26] ;
  wire \quad_reg_n_0_[27] ;
  wire \quad_reg_n_0_[28] ;
  wire \quad_reg_n_0_[29] ;
  wire \quad_reg_n_0_[2] ;
  wire \quad_reg_n_0_[30] ;
  wire \quad_reg_n_0_[31] ;
  wire \quad_reg_n_0_[3] ;
  wire \quad_reg_n_0_[4] ;
  wire \quad_reg_n_0_[5] ;
  wire \quad_reg_n_0_[6] ;
  wire \quad_reg_n_0_[7] ;
  wire \quad_reg_n_0_[8] ;
  wire \quad_reg_n_0_[9] ;
  wire rdySeq;
  wire reqInvVidtrackSelect;
  wire reqInvVidtrackSet;
  wire reqSeqbufVidtrackToHostif;
  wire restart_i_1_n_0;
  wire restart_i_2_n_0;
  wire restart_reg_0;
  wire restart_reg_n_0;
  wire rng_reg_n_0;
  wire seqbufVidtrackToHostifAXIS_tready;
  wire seqbufVidtrackToHostifAXIS_tvalid;
  wire staFallingNotRising;
  wire [7:0]staTixVTrigger;
  wire [7:0]state;
  wire [2:0]stateOp;
  wire \stateOp[0]_i_1__0_n_0 ;
  wire \stateOp[1]_i_1__0_n_0 ;
  wire \stateOp[2]_i_10_n_0 ;
  wire \stateOp[2]_i_11_n_0 ;
  wire \stateOp[2]_i_12_n_0 ;
  wire \stateOp[2]_i_13_n_0 ;
  wire \stateOp[2]_i_15_n_0 ;
  wire \stateOp[2]_i_16_n_0 ;
  wire \stateOp[2]_i_17_n_0 ;
  wire \stateOp[2]_i_18_n_0 ;
  wire \stateOp[2]_i_19_n_0 ;
  wire \stateOp[2]_i_1_n_0 ;
  wire \stateOp[2]_i_20_n_0 ;
  wire \stateOp[2]_i_21_n_0 ;
  wire \stateOp[2]_i_22_n_0 ;
  wire \stateOp[2]_i_23_n_0 ;
  wire \stateOp[2]_i_24_n_0 ;
  wire \stateOp[2]_i_25_n_0 ;
  wire \stateOp[2]_i_26_n_0 ;
  wire \stateOp[2]_i_27_n_0 ;
  wire \stateOp[2]_i_28_n_0 ;
  wire \stateOp[2]_i_29_n_0 ;
  wire \stateOp[2]_i_2_n_0 ;
  wire \stateOp[2]_i_30_n_0 ;
  wire \stateOp[2]_i_31_n_0 ;
  wire \stateOp[2]_i_32_n_0 ;
  wire \stateOp[2]_i_33_n_0 ;
  wire \stateOp[2]_i_34_n_0 ;
  wire \stateOp[2]_i_35_n_0 ;
  wire \stateOp[2]_i_36_n_0 ;
  wire \stateOp[2]_i_37_n_0 ;
  wire \stateOp[2]_i_38_n_0 ;
  wire \stateOp[2]_i_39_n_0 ;
  wire \stateOp[2]_i_40_n_0 ;
  wire \stateOp[2]_i_41_n_0 ;
  wire \stateOp[2]_i_42_n_0 ;
  wire \stateOp[2]_i_43_n_0 ;
  wire \stateOp[2]_i_44_n_0 ;
  wire \stateOp[2]_i_45_n_0 ;
  wire \stateOp[2]_i_46_n_0 ;
  wire \stateOp[2]_i_47_n_0 ;
  wire \stateOp[2]_i_48_n_0 ;
  wire \stateOp[2]_i_49_n_0 ;
  wire \stateOp[2]_i_4__0_n_0 ;
  wire \stateOp[2]_i_50_n_0 ;
  wire \stateOp[2]_i_51_n_0 ;
  wire \stateOp[2]_i_52_n_0 ;
  wire \stateOp[2]_i_53_n_0 ;
  wire \stateOp[2]_i_54_n_0 ;
  wire \stateOp[2]_i_55_n_0 ;
  wire \stateOp[2]_i_56_n_0 ;
  wire \stateOp[2]_i_57_n_0 ;
  wire \stateOp[2]_i_5_n_0 ;
  wire \stateOp[2]_i_6_n_0 ;
  wire \stateOp[2]_i_7__0_n_0 ;
  wire \stateOp[2]_i_8_n_0 ;
  wire \stateOp_reg[2]_i_14_n_0 ;
  wire \stateOp_reg[2]_i_14_n_1 ;
  wire \stateOp_reg[2]_i_14_n_2 ;
  wire \stateOp_reg[2]_i_14_n_3 ;
  wire \stateOp_reg[2]_i_14_n_4 ;
  wire \stateOp_reg[2]_i_14_n_5 ;
  wire \stateOp_reg[2]_i_14_n_6 ;
  wire \stateOp_reg[2]_i_14_n_7 ;
  wire \stateOp_reg[2]_i_9_n_0 ;
  wire \stateOp_reg[2]_i_9_n_1 ;
  wire \stateOp_reg[2]_i_9_n_2 ;
  wire \stateOp_reg[2]_i_9_n_3 ;
  wire \stateOp_reg[2]_i_9_n_4 ;
  wire \stateOp_reg[2]_i_9_n_5 ;
  wire \stateOp_reg[2]_i_9_n_6 ;
  wire \stateOp_reg[2]_i_9_n_7 ;
  wire \stateSeqbufB[1]_i_2_n_0 ;
  wire \stateSeqbufB[2]_i_1_n_0 ;
  wire \stateSeqbufB[2]_i_3_n_0 ;
  wire \stateSeqbufB[2]_i_7_n_0 ;
  wire [2:0]stateSeqbufB_reg;
  wire \state[0]_i_1_n_0 ;
  wire \state[4]_i_1_n_0 ;
  wire \state[4]_i_2_n_0 ;
  wire \state[5]_i_1_n_0 ;
  wire \state[6]_i_1_n_0 ;
  wire \state[7]_i_1_n_0 ;
  wire \state[7]_i_4_n_0 ;
  wire \state_reg[0]_0 ;
  wire \state_reg[4]_0 ;
  wire [1:0]\state_reg[5]_0 ;
  wire \state_reg[5]_1 ;
  wire [0:0]\state_reg[7]_0 ;
  wire [7:0]stoTixVTrigger;
  wire stop_lcl_i_1_n_0;
  wire stop_lcl_i_2_n_0;
  wire stop_lcl_reg_n_0;
  wire strbStop_i_1_n_0;
  wire strbStop_i_2_n_0;
  wire strbStop_i_3_n_0;
  wire strbStop_i_4_n_0;
  wire strbStop_i_5_n_0;
  wire strbStop_reg_n_0;
  wire [1:0]\tixVCapture_reg[1]_0 ;
  wire [7:0]\tixVCapture_reg[7]_0 ;
  wire \tixVCapture_reg_n_0_[2] ;
  wire \tixVCapture_reg_n_0_[3] ;
  wire \tixVCapture_reg_n_0_[4] ;
  wire \tixVCapture_reg_n_0_[5] ;
  wire \tixVCapture_reg_n_0_[6] ;
  wire \tixVCapture_reg_n_0_[7] ;
  wire [1:0]videoinStateIgr_dbg;
  wire [1:0]videoinStateRgbegr_dbg;
  wire [9:0]vidtrackGetInfoPtr0Seqbuf;
  wire [1:0]vidtrackGetInfoTixVState;
  wire [7:6]\NLW_TCapt_reg[31]_i_2_CO_UNCONNECTED ;
  wire [7:7]\NLW_TCapt_reg[31]_i_2_O_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_reg[2]_i_14_O_UNCONNECTED ;
  wire [7:0]\NLW_stateOp_reg[2]_i_9_O_UNCONNECTED ;

  LUT6 #(
    .INIT(64'h0000FFFF00010001)) 
    \FSM_onehot_stateSeq[0]_i_1 
       (.I0(TCapt),
        .I1(Q),
        .I2(first),
        .I3(rdySeq),
        .I4(\FSM_onehot_stateSeq[0]_i_2_n_0 ),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\FSM_onehot_stateSeq[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3117" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \FSM_onehot_stateSeq[0]_i_2 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(stateSeqbufB_reg[2]),
        .O(\FSM_onehot_stateSeq[0]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3076" *) 
  LUT5 #(
    .INIT(32'hFFF8FF00)) 
    \FSM_onehot_stateSeq[2]_i_1 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\FSM_onehot_stateSeq[3]_i_2_n_0 ),
        .I3(rdySeq),
        .I4(TCapt),
        .O(\FSM_onehot_stateSeq[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3076" *) 
  LUT4 #(
    .INIT(16'h0700)) 
    \FSM_onehot_stateSeq[3]_i_1 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\FSM_onehot_stateSeq[3]_i_2_n_0 ),
        .I3(TCapt),
        .O(\FSM_onehot_stateSeq[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h000000000000FEFF)) 
    \FSM_onehot_stateSeq[3]_i_2 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\FSM_onehot_stateSeq[3]_i_3_n_0 ),
        .I3(\aSeqbuf[9]_i_4_n_0 ),
        .I4(strbStop_reg_n_0),
        .I5(stop_lcl_reg_n_0),
        .O(\FSM_onehot_stateSeq[3]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFFFD)) 
    \FSM_onehot_stateSeq[3]_i_3 
       (.I0(\FSM_onehot_stateSeq[3]_i_4_n_0 ),
        .I1(stoTixVTrigger[2]),
        .I2(stoTixVTrigger[1]),
        .I3(stoTixVTrigger[0]),
        .O(\FSM_onehot_stateSeq[3]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h00000001)) 
    \FSM_onehot_stateSeq[3]_i_4 
       (.I0(stoTixVTrigger[5]),
        .I1(stoTixVTrigger[3]),
        .I2(stoTixVTrigger[6]),
        .I3(stoTixVTrigger[7]),
        .I4(stoTixVTrigger[4]),
        .O(\FSM_onehot_stateSeq[3]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF55550300)) 
    \FSM_onehot_stateSeq[5]_i_1 
       (.I0(\FSM_onehot_stateSeq[5]_i_3_n_0 ),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I2(ackSeqbufBToSeqClear),
        .I3(\FSM_onehot_stateSeq[5]_i_4_n_0 ),
        .I4(\FSM_onehot_stateSeq[5]_i_5_n_0 ),
        .I5(\FSM_onehot_stateSeq[5]_i_6_n_0 ),
        .O(\FSM_onehot_stateSeq[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3119" *) 
  LUT4 #(
    .INIT(16'h0080)) 
    \FSM_onehot_stateSeq[5]_i_2 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[0]),
        .I3(stateSeqbufB_reg[1]),
        .O(\FSM_onehot_stateSeq[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAAAAAAA2AAAA)) 
    \FSM_onehot_stateSeq[5]_i_3 
       (.I0(\FSM_onehot_stateSeq[5]_i_7_n_0 ),
        .I1(stateOp[0]),
        .I2(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I3(ackSeqbufBToSeqClear),
        .I4(stateOp[1]),
        .I5(stateOp[2]),
        .O(\FSM_onehot_stateSeq[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h08080808FF080808)) 
    \FSM_onehot_stateSeq[5]_i_4 
       (.I0(stateOp[1]),
        .I1(stateOp[2]),
        .I2(stateOp[0]),
        .I3(stateSeqbufB_reg[2]),
        .I4(stateSeqbufB_reg[0]),
        .I5(stateSeqbufB_reg[1]),
        .O(\FSM_onehot_stateSeq[5]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3116" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \FSM_onehot_stateSeq[5]_i_5 
       (.I0(Q),
        .I1(TCapt),
        .O(\FSM_onehot_stateSeq[5]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3116" *) 
  LUT4 #(
    .INIT(16'h0001)) 
    \FSM_onehot_stateSeq[5]_i_6 
       (.I0(ackSeqbufBToSeqClear),
        .I1(rdySeq),
        .I2(Q),
        .I3(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\FSM_onehot_stateSeq[5]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'hFFF31113FFFF11FF)) 
    \FSM_onehot_stateSeq[5]_i_7 
       (.I0(\FSM_onehot_stateSeq[5]_i_5_n_0 ),
        .I1(\aSeqbuf[9]_i_4_n_0 ),
        .I2(rdySeq),
        .I3(ackSeqbufBToSeqClear),
        .I4(\FSM_onehot_stateSeq[0]_i_2_n_0 ),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\FSM_onehot_stateSeq[5]_i_7_n_0 ));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDPE #(
    .INIT(1'b1)) 
    \FSM_onehot_stateSeq_reg[0] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1_n_0 ),
        .D(\FSM_onehot_stateSeq[0]_i_1_n_0 ),
        .PRE(first_reg_0),
        .Q(first));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[1] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(first),
        .Q(rdySeq));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[2] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\FSM_onehot_stateSeq[2]_i_1_n_0 ),
        .Q(TCapt));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[3] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\FSM_onehot_stateSeq[3]_i_1_n_0 ),
        .Q(Q));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[4] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(Q),
        .Q(\FSM_onehot_stateSeq_reg_n_0_[4] ));
  (* FSM_ENCODED_STATES = "iSTATE:000010,iSTATE0:010000,iSTATE1:000100,iSTATE2:001000,iSTATE3:100000,iSTATE4:000001" *) 
  FDCE #(
    .INIT(1'b0)) 
    \FSM_onehot_stateSeq_reg[5] 
       (.C(aclk_sig),
        .CE(\FSM_onehot_stateSeq[5]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\FSM_onehot_stateSeq[5]_i_2_n_0 ),
        .Q(ackSeqbufBToSeqClear));
  LUT5 #(
    .INIT(32'h0000FB00)) 
    \TCaptMax[31]_i_1 
       (.I0(stateOp[2]),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .I3(reqInvVidtrackSet),
        .I4(reqInvVidtrackSelect),
        .O(TCaptMax));
  FDCE \TCaptMax_reg[0] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(\TCaptMax_reg[7]_0 [0]),
        .Q(\TCaptMax_reg_n_0_[0] ));
  FDCE \TCaptMax_reg[10] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[2]),
        .Q(\TCaptMax_reg_n_0_[10] ));
  FDCE \TCaptMax_reg[11] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[3]),
        .Q(\TCaptMax_reg_n_0_[11] ));
  FDCE \TCaptMax_reg[12] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[4]),
        .Q(\TCaptMax_reg_n_0_[12] ));
  FDCE \TCaptMax_reg[13] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[5]),
        .Q(\TCaptMax_reg_n_0_[13] ));
  FDCE \TCaptMax_reg[14] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[6]),
        .Q(\TCaptMax_reg_n_0_[14] ));
  FDCE \TCaptMax_reg[15] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[7]),
        .Q(\TCaptMax_reg_n_0_[15] ));
  FDCE \TCaptMax_reg[16] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[8]),
        .Q(\TCaptMax_reg_n_0_[16] ));
  FDCE \TCaptMax_reg[17] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[9]),
        .Q(\TCaptMax_reg_n_0_[17] ));
  FDCE \TCaptMax_reg[18] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[10]),
        .Q(\TCaptMax_reg_n_0_[18] ));
  FDCE \TCaptMax_reg[19] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[11]),
        .Q(\TCaptMax_reg_n_0_[19] ));
  FDCE \TCaptMax_reg[1] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(\TCaptMax_reg[7]_0 [1]),
        .Q(\TCaptMax_reg_n_0_[1] ));
  FDCE \TCaptMax_reg[20] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[12]),
        .Q(\TCaptMax_reg_n_0_[20] ));
  FDCE \TCaptMax_reg[21] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[13]),
        .Q(\TCaptMax_reg_n_0_[21] ));
  FDCE \TCaptMax_reg[22] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[14]),
        .Q(\TCaptMax_reg_n_0_[22] ));
  FDCE \TCaptMax_reg[23] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[15]),
        .Q(\TCaptMax_reg_n_0_[23] ));
  FDCE \TCaptMax_reg[24] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[16]),
        .Q(\TCaptMax_reg_n_0_[24] ));
  FDCE \TCaptMax_reg[25] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[17]),
        .Q(\TCaptMax_reg_n_0_[25] ));
  FDCE \TCaptMax_reg[26] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[18]),
        .Q(\TCaptMax_reg_n_0_[26] ));
  FDCE \TCaptMax_reg[27] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[19]),
        .Q(\TCaptMax_reg_n_0_[27] ));
  FDCE \TCaptMax_reg[28] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[20]),
        .Q(\TCaptMax_reg_n_0_[28] ));
  FDCE \TCaptMax_reg[29] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[21]),
        .Q(\TCaptMax_reg_n_0_[29] ));
  FDCE \TCaptMax_reg[2] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(\TCaptMax_reg[7]_0 [2]),
        .Q(\TCaptMax_reg_n_0_[2] ));
  FDCE \TCaptMax_reg[30] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[22]),
        .Q(\TCaptMax_reg_n_0_[30] ));
  FDCE \TCaptMax_reg[31] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[23]),
        .Q(\TCaptMax_reg_n_0_[31] ));
  FDCE \TCaptMax_reg[3] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(\TCaptMax_reg[7]_0 [3]),
        .Q(\TCaptMax_reg_n_0_[3] ));
  FDCE \TCaptMax_reg[4] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(\TCaptMax_reg[7]_0 [4]),
        .Q(\TCaptMax_reg_n_0_[4] ));
  FDCE \TCaptMax_reg[5] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(\TCaptMax_reg[7]_0 [5]),
        .Q(\TCaptMax_reg_n_0_[5] ));
  FDCE \TCaptMax_reg[6] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(\TCaptMax_reg[7]_0 [6]),
        .Q(\TCaptMax_reg_n_0_[6] ));
  FDCE \TCaptMax_reg[7] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(\TCaptMax_reg[7]_0 [7]),
        .Q(\TCaptMax_reg_n_0_[7] ));
  FDCE \TCaptMax_reg[8] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[0]),
        .Q(\TCaptMax_reg_n_0_[8] ));
  FDCE \TCaptMax_reg[9] 
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(D[1]),
        .Q(\TCaptMax_reg_n_0_[9] ));
  LUT2 #(
    .INIT(4'h1)) 
    \TCapt[0]_i_1 
       (.I0(\TCapt_reg[31]_0 [0]),
        .I1(first),
        .O(TCapt__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair3139" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[10]_i_1 
       (.I0(in12[10]),
        .I1(first),
        .O(TCapt__0[10]));
  (* SOFT_HLUTNM = "soft_lutpair3138" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[11]_i_1 
       (.I0(in12[11]),
        .I1(first),
        .O(TCapt__0[11]));
  (* SOFT_HLUTNM = "soft_lutpair3138" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[12]_i_1 
       (.I0(in12[12]),
        .I1(first),
        .O(TCapt__0[12]));
  (* SOFT_HLUTNM = "soft_lutpair3137" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[13]_i_1 
       (.I0(in12[13]),
        .I1(first),
        .O(TCapt__0[13]));
  (* SOFT_HLUTNM = "soft_lutpair3137" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[14]_i_1 
       (.I0(in12[14]),
        .I1(first),
        .O(TCapt__0[14]));
  (* SOFT_HLUTNM = "soft_lutpair3136" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[15]_i_1 
       (.I0(in12[15]),
        .I1(first),
        .O(TCapt__0[15]));
  (* SOFT_HLUTNM = "soft_lutpair3136" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[16]_i_1 
       (.I0(in12[16]),
        .I1(first),
        .O(TCapt__0[16]));
  (* SOFT_HLUTNM = "soft_lutpair3135" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[17]_i_1 
       (.I0(in12[17]),
        .I1(first),
        .O(TCapt__0[17]));
  (* SOFT_HLUTNM = "soft_lutpair3135" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[18]_i_1 
       (.I0(in12[18]),
        .I1(first),
        .O(TCapt__0[18]));
  (* SOFT_HLUTNM = "soft_lutpair3134" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[19]_i_1 
       (.I0(in12[19]),
        .I1(first),
        .O(TCapt__0[19]));
  (* SOFT_HLUTNM = "soft_lutpair3143" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[1]_i_1 
       (.I0(in12[1]),
        .I1(first),
        .O(TCapt__0[1]));
  (* SOFT_HLUTNM = "soft_lutpair3134" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[20]_i_1 
       (.I0(in12[20]),
        .I1(first),
        .O(TCapt__0[20]));
  (* SOFT_HLUTNM = "soft_lutpair3133" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[21]_i_1 
       (.I0(in12[21]),
        .I1(first),
        .O(TCapt__0[21]));
  (* SOFT_HLUTNM = "soft_lutpair3133" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[22]_i_1 
       (.I0(in12[22]),
        .I1(first),
        .O(TCapt__0[22]));
  (* SOFT_HLUTNM = "soft_lutpair3132" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[23]_i_1 
       (.I0(in12[23]),
        .I1(first),
        .O(TCapt__0[23]));
  (* SOFT_HLUTNM = "soft_lutpair3132" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[24]_i_1 
       (.I0(in12[24]),
        .I1(first),
        .O(TCapt__0[24]));
  (* SOFT_HLUTNM = "soft_lutpair3131" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[25]_i_1 
       (.I0(in12[25]),
        .I1(first),
        .O(TCapt__0[25]));
  (* SOFT_HLUTNM = "soft_lutpair3131" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[26]_i_1 
       (.I0(in12[26]),
        .I1(first),
        .O(TCapt__0[26]));
  (* SOFT_HLUTNM = "soft_lutpair3130" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[27]_i_1 
       (.I0(in12[27]),
        .I1(first),
        .O(TCapt__0[27]));
  (* SOFT_HLUTNM = "soft_lutpair3130" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[28]_i_1 
       (.I0(in12[28]),
        .I1(first),
        .O(TCapt__0[28]));
  (* SOFT_HLUTNM = "soft_lutpair3129" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[29]_i_1 
       (.I0(in12[29]),
        .I1(first),
        .O(TCapt__0[29]));
  (* SOFT_HLUTNM = "soft_lutpair3143" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[2]_i_1 
       (.I0(in12[2]),
        .I1(first),
        .O(TCapt__0[2]));
  (* SOFT_HLUTNM = "soft_lutpair3129" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[30]_i_1 
       (.I0(in12[30]),
        .I1(first),
        .O(TCapt__0[30]));
  (* SOFT_HLUTNM = "soft_lutpair3128" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[31]_i_1 
       (.I0(in12[31]),
        .I1(first),
        .O(TCapt__0[31]));
  (* SOFT_HLUTNM = "soft_lutpair3142" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[3]_i_1 
       (.I0(in12[3]),
        .I1(first),
        .O(TCapt__0[3]));
  (* SOFT_HLUTNM = "soft_lutpair3142" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[4]_i_1 
       (.I0(in12[4]),
        .I1(first),
        .O(TCapt__0[4]));
  (* SOFT_HLUTNM = "soft_lutpair3141" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[5]_i_1 
       (.I0(in12[5]),
        .I1(first),
        .O(TCapt__0[5]));
  (* SOFT_HLUTNM = "soft_lutpair3141" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[6]_i_1 
       (.I0(in12[6]),
        .I1(first),
        .O(TCapt__0[6]));
  (* SOFT_HLUTNM = "soft_lutpair3140" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[7]_i_1 
       (.I0(in12[7]),
        .I1(first),
        .O(TCapt__0[7]));
  (* SOFT_HLUTNM = "soft_lutpair3140" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[8]_i_1 
       (.I0(in12[8]),
        .I1(first),
        .O(TCapt__0[8]));
  (* SOFT_HLUTNM = "soft_lutpair3139" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \TCapt[9]_i_1 
       (.I0(in12[9]),
        .I1(first),
        .O(TCapt__0[9]));
  FDCE \TCapt_reg[0] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[0]),
        .Q(\TCapt_reg[31]_0 [0]));
  FDCE \TCapt_reg[10] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[10]),
        .Q(\TCapt_reg[31]_0 [10]));
  FDCE \TCapt_reg[11] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[11]),
        .Q(\TCapt_reg[31]_0 [11]));
  FDCE \TCapt_reg[12] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[12]),
        .Q(\TCapt_reg[31]_0 [12]));
  FDCE \TCapt_reg[13] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[13]),
        .Q(\TCapt_reg[31]_0 [13]));
  FDCE \TCapt_reg[14] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[14]),
        .Q(\TCapt_reg[31]_0 [14]));
  FDCE \TCapt_reg[15] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[15]),
        .Q(\TCapt_reg[31]_0 [15]));
  FDCE \TCapt_reg[16] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[16]),
        .Q(\TCapt_reg[31]_0 [16]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \TCapt_reg[16]_i_2 
       (.CI(\TCapt_reg[8]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\TCapt_reg[16]_i_2_n_0 ,\TCapt_reg[16]_i_2_n_1 ,\TCapt_reg[16]_i_2_n_2 ,\TCapt_reg[16]_i_2_n_3 ,\TCapt_reg[16]_i_2_n_4 ,\TCapt_reg[16]_i_2_n_5 ,\TCapt_reg[16]_i_2_n_6 ,\TCapt_reg[16]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in12[16:9]),
        .S(\TCapt_reg[31]_0 [16:9]));
  FDCE \TCapt_reg[17] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[17]),
        .Q(\TCapt_reg[31]_0 [17]));
  FDCE \TCapt_reg[18] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[18]),
        .Q(\TCapt_reg[31]_0 [18]));
  FDCE \TCapt_reg[19] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[19]),
        .Q(\TCapt_reg[31]_0 [19]));
  FDCE \TCapt_reg[1] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[1]),
        .Q(\TCapt_reg[31]_0 [1]));
  FDCE \TCapt_reg[20] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[20]),
        .Q(\TCapt_reg[31]_0 [20]));
  FDCE \TCapt_reg[21] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[21]),
        .Q(\TCapt_reg[31]_0 [21]));
  FDCE \TCapt_reg[22] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[22]),
        .Q(\TCapt_reg[31]_0 [22]));
  FDCE \TCapt_reg[23] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[23]),
        .Q(\TCapt_reg[31]_0 [23]));
  FDCE \TCapt_reg[24] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[24]),
        .Q(\TCapt_reg[31]_0 [24]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \TCapt_reg[24]_i_2 
       (.CI(\TCapt_reg[16]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\TCapt_reg[24]_i_2_n_0 ,\TCapt_reg[24]_i_2_n_1 ,\TCapt_reg[24]_i_2_n_2 ,\TCapt_reg[24]_i_2_n_3 ,\TCapt_reg[24]_i_2_n_4 ,\TCapt_reg[24]_i_2_n_5 ,\TCapt_reg[24]_i_2_n_6 ,\TCapt_reg[24]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in12[24:17]),
        .S(\TCapt_reg[31]_0 [24:17]));
  FDCE \TCapt_reg[25] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[25]),
        .Q(\TCapt_reg[31]_0 [25]));
  FDCE \TCapt_reg[26] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[26]),
        .Q(\TCapt_reg[31]_0 [26]));
  FDCE \TCapt_reg[27] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[27]),
        .Q(\TCapt_reg[31]_0 [27]));
  FDCE \TCapt_reg[28] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[28]),
        .Q(\TCapt_reg[31]_0 [28]));
  FDCE \TCapt_reg[29] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[29]),
        .Q(\TCapt_reg[31]_0 [29]));
  FDCE \TCapt_reg[2] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[2]),
        .Q(\TCapt_reg[31]_0 [2]));
  FDCE \TCapt_reg[30] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[30]),
        .Q(\TCapt_reg[31]_0 [30]));
  FDCE \TCapt_reg[31] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[31]),
        .Q(\TCapt_reg[31]_0 [31]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \TCapt_reg[31]_i_2 
       (.CI(\TCapt_reg[24]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_TCapt_reg[31]_i_2_CO_UNCONNECTED [7:6],\TCapt_reg[31]_i_2_n_2 ,\TCapt_reg[31]_i_2_n_3 ,\TCapt_reg[31]_i_2_n_4 ,\TCapt_reg[31]_i_2_n_5 ,\TCapt_reg[31]_i_2_n_6 ,\TCapt_reg[31]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_TCapt_reg[31]_i_2_O_UNCONNECTED [7],in12[31:25]}),
        .S({1'b0,\TCapt_reg[31]_0 [31:25]}));
  FDCE \TCapt_reg[3] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[3]),
        .Q(\TCapt_reg[31]_0 [3]));
  FDCE \TCapt_reg[4] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[4]),
        .Q(\TCapt_reg[31]_0 [4]));
  FDCE \TCapt_reg[5] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[5]),
        .Q(\TCapt_reg[31]_0 [5]));
  FDCE \TCapt_reg[6] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[6]),
        .Q(\TCapt_reg[31]_0 [6]));
  FDCE \TCapt_reg[7] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[7]),
        .Q(\TCapt_reg[31]_0 [7]));
  FDCE \TCapt_reg[8] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[8]),
        .Q(\TCapt_reg[31]_0 [8]));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \TCapt_reg[8]_i_2 
       (.CI(\TCapt_reg[31]_0 [0]),
        .CI_TOP(1'b0),
        .CO({\TCapt_reg[8]_i_2_n_0 ,\TCapt_reg[8]_i_2_n_1 ,\TCapt_reg[8]_i_2_n_2 ,\TCapt_reg[8]_i_2_n_3 ,\TCapt_reg[8]_i_2_n_4 ,\TCapt_reg[8]_i_2_n_5 ,\TCapt_reg[8]_i_2_n_6 ,\TCapt_reg[8]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O(in12[8:1]),
        .S(\TCapt_reg[31]_0 [8:1]));
  FDCE \TCapt_reg[9] 
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(TCapt__0[9]),
        .Q(\TCapt_reg[31]_0 [9]));
  LUT3 #(
    .INIT(8'h54)) 
    \aSeqbufB[0]_i_1 
       (.I0(\aSeqbufB_reg_n_0_[0] ),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3110" *) 
  LUT4 #(
    .INIT(16'h6660)) 
    \aSeqbufB[1]_i_1 
       (.I0(\aSeqbufB_reg_n_0_[1] ),
        .I1(\aSeqbufB_reg_n_0_[0] ),
        .I2(stateSeqbufB_reg[1]),
        .I3(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3110" *) 
  LUT5 #(
    .INIT(32'h78787800)) 
    \aSeqbufB[2]_i_1 
       (.I0(\aSeqbufB_reg_n_0_[0] ),
        .I1(\aSeqbufB_reg_n_0_[1] ),
        .I2(\aSeqbufB_reg_n_0_[2] ),
        .I3(stateSeqbufB_reg[1]),
        .I4(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00007F80)) 
    \aSeqbufB[3]_i_1 
       (.I0(\aSeqbufB_reg_n_0_[2] ),
        .I1(\aSeqbufB_reg_n_0_[1] ),
        .I2(\aSeqbufB_reg_n_0_[0] ),
        .I3(\aSeqbufB_reg_n_0_[3] ),
        .I4(\aSeqbufB[8]_i_3_n_0 ),
        .O(\aSeqbufB[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h1555555540000000)) 
    \aSeqbufB[4]_i_1 
       (.I0(\aSeqbufB[8]_i_3_n_0 ),
        .I1(\aSeqbufB_reg_n_0_[3] ),
        .I2(\aSeqbufB_reg_n_0_[0] ),
        .I3(\aSeqbufB_reg_n_0_[1] ),
        .I4(\aSeqbufB_reg_n_0_[2] ),
        .I5(\aSeqbufB_reg_n_0_[4] ),
        .O(\aSeqbufB[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3113" *) 
  LUT4 #(
    .INIT(16'h0EE0)) 
    \aSeqbufB[5]_i_1 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(\aSeqbufB[5]_i_2_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[5] ),
        .O(\aSeqbufB[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h80000000)) 
    \aSeqbufB[5]_i_2 
       (.I0(\aSeqbufB_reg_n_0_[4] ),
        .I1(\aSeqbufB_reg_n_0_[2] ),
        .I2(\aSeqbufB_reg_n_0_[1] ),
        .I3(\aSeqbufB_reg_n_0_[0] ),
        .I4(\aSeqbufB_reg_n_0_[3] ),
        .O(\aSeqbufB[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3109" *) 
  LUT4 #(
    .INIT(16'h0EE0)) 
    \aSeqbufB[6]_i_1 
       (.I0(stateSeqbufB_reg[1]),
        .I1(stateSeqbufB_reg[0]),
        .I2(\aSeqbufB[8]_i_4_n_0 ),
        .I3(\aSeqbufB_reg_n_0_[6] ),
        .O(\aSeqbufB[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3109" *) 
  LUT5 #(
    .INIT(32'h78787800)) 
    \aSeqbufB[7]_i_1 
       (.I0(\aSeqbufB[8]_i_4_n_0 ),
        .I1(\aSeqbufB_reg_n_0_[6] ),
        .I2(\aSeqbufB_reg_n_0_[7] ),
        .I3(stateSeqbufB_reg[1]),
        .I4(stateSeqbufB_reg[0]),
        .O(\aSeqbufB[7]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h4101)) 
    \aSeqbufB[8]_i_1 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(\stateSeqbufB[1]_i_2_n_0 ),
        .O(\aSeqbufB[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3074" *) 
  LUT5 #(
    .INIT(32'h15554000)) 
    \aSeqbufB[8]_i_2 
       (.I0(\aSeqbufB[8]_i_3_n_0 ),
        .I1(\aSeqbufB_reg_n_0_[7] ),
        .I2(\aSeqbufB_reg_n_0_[6] ),
        .I3(\aSeqbufB[8]_i_4_n_0 ),
        .I4(\aSeqbufB_reg_n_0_[8] ),
        .O(\aSeqbufB[8]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3119" *) 
  LUT3 #(
    .INIT(8'h01)) 
    \aSeqbufB[8]_i_3 
       (.I0(stateSeqbufB_reg[0]),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[1]),
        .O(\aSeqbufB[8]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aSeqbufB[8]_i_4 
       (.I0(\aSeqbufB_reg_n_0_[3] ),
        .I1(\aSeqbufB_reg_n_0_[0] ),
        .I2(\aSeqbufB_reg_n_0_[1] ),
        .I3(\aSeqbufB_reg_n_0_[2] ),
        .I4(\aSeqbufB_reg_n_0_[4] ),
        .I5(\aSeqbufB_reg_n_0_[5] ),
        .O(\aSeqbufB[8]_i_4_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbufB[0]_i_1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbufB[1]_i_1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbufB[2]_i_1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[3] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbufB[3]_i_1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[4] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbufB[4]_i_1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[5] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbufB[5]_i_1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[6] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbufB[6]_i_1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[7] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbufB[7]_i_1_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbufB_reg[8] 
       (.C(aclk_sig),
        .CE(\aSeqbufB[8]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbufB[8]_i_2_n_0 ),
        .Q(\aSeqbufB_reg_n_0_[8] ));
  LUT6 #(
    .INIT(64'h5555555544454454)) 
    \aSeqbuf[0]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(ackSeqbufBToSeqClear),
        .I2(rdySeq),
        .I3(Q),
        .I4(TCapt),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\aSeqbuf[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3123" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \aSeqbuf[1]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[1] ),
        .I1(\aSeqbuf_reg_n_0_[0] ),
        .I2(\aSeqbuf[3]_i_2_n_0 ),
        .O(\aSeqbuf[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3079" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \aSeqbuf[2]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(\aSeqbuf_reg_n_0_[1] ),
        .I2(\aSeqbuf_reg_n_0_[2] ),
        .I3(\aSeqbuf[3]_i_2_n_0 ),
        .O(\aSeqbuf[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3079" *) 
  LUT5 #(
    .INIT(32'h00007F80)) 
    \aSeqbuf[3]_i_1 
       (.I0(\aSeqbuf_reg_n_0_[2] ),
        .I1(\aSeqbuf_reg_n_0_[1] ),
        .I2(\aSeqbuf_reg_n_0_[0] ),
        .I3(\aSeqbuf_reg_n_0_[3] ),
        .I4(\aSeqbuf[3]_i_2_n_0 ),
        .O(\aSeqbuf[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3080" *) 
  LUT5 #(
    .INIT(32'h00005451)) 
    \aSeqbuf[3]_i_2 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(TCapt),
        .I2(Q),
        .I3(rdySeq),
        .I4(ackSeqbufBToSeqClear),
        .O(\aSeqbuf[3]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h2AAAAAAA80000000)) 
    \aSeqbuf[4]_i_1 
       (.I0(\aSeqbuf[9]_i_6_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[3] ),
        .I2(\aSeqbuf_reg_n_0_[0] ),
        .I3(\aSeqbuf_reg_n_0_[1] ),
        .I4(\aSeqbuf_reg_n_0_[2] ),
        .I5(\aSeqbuf_reg_n_0_[4] ),
        .O(\aSeqbuf[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFF1400000000)) 
    \aSeqbuf[5]_i_1 
       (.I0(Q),
        .I1(rdySeq),
        .I2(TCapt),
        .I3(ackSeqbufBToSeqClear),
        .I4(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I5(\aSeqbuf[5]_i_2_n_0 ),
        .O(\aSeqbuf[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h6AAAAAAAAAAAAAAA)) 
    \aSeqbuf[5]_i_2 
       (.I0(\aSeqbuf_reg_n_0_[5] ),
        .I1(\aSeqbuf_reg_n_0_[4] ),
        .I2(\aSeqbuf_reg_n_0_[3] ),
        .I3(\aSeqbuf_reg_n_0_[0] ),
        .I4(\aSeqbuf_reg_n_0_[1] ),
        .I5(\aSeqbuf_reg_n_0_[2] ),
        .O(\aSeqbuf[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3115" *) 
  LUT3 #(
    .INIT(8'h28)) 
    \aSeqbuf[6]_i_1 
       (.I0(\aSeqbuf[9]_i_6_n_0 ),
        .I1(\aSeqbuf[9]_i_7_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[6] ),
        .O(\aSeqbuf[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3115" *) 
  LUT4 #(
    .INIT(16'h2A80)) 
    \aSeqbuf[7]_i_1 
       (.I0(\aSeqbuf[9]_i_6_n_0 ),
        .I1(\aSeqbuf[9]_i_7_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[6] ),
        .I3(\aSeqbuf_reg_n_0_[7] ),
        .O(\aSeqbuf[7]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h1131)) 
    \aSeqbuf[8]_i_1 
       (.I0(\aSeqbuf[8]_i_2_n_0 ),
        .I1(\aSeqbuf[8]_i_3_n_0 ),
        .I2(\aSeqbuf[8]_i_4_n_0 ),
        .I3(\aSeqbuf[9]_i_4_n_0 ),
        .O(\aSeqbuf[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3080" *) 
  LUT5 #(
    .INIT(32'h00540055)) 
    \aSeqbuf[8]_i_2 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(Q),
        .I2(TCapt),
        .I3(ackSeqbufBToSeqClear),
        .I4(rdySeq),
        .O(\aSeqbuf[8]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3108" *) 
  LUT4 #(
    .INIT(16'h9555)) 
    \aSeqbuf[8]_i_3 
       (.I0(\aSeqbuf_reg_n_0_[8] ),
        .I1(\aSeqbuf[9]_i_7_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[7] ),
        .I3(\aSeqbuf_reg_n_0_[6] ),
        .O(\aSeqbuf[8]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'h00010000)) 
    \aSeqbuf[8]_i_4 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(Q),
        .I2(rdySeq),
        .I3(ackSeqbufBToSeqClear),
        .I4(TCapt),
        .O(\aSeqbuf[8]_i_4_n_0 ));
  LUT4 #(
    .INIT(16'hFFAE)) 
    \aSeqbuf[9]_i_1 
       (.I0(\aSeqbuf[9]_i_3_n_0 ),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I2(\aSeqbuf[9]_i_4_n_0 ),
        .I3(\aSeqbuf[9]_i_5_n_0 ),
        .O(\aSeqbuf[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h2A80AA00AA00AA00)) 
    \aSeqbuf[9]_i_2 
       (.I0(\aSeqbuf[9]_i_6_n_0 ),
        .I1(\aSeqbuf_reg_n_0_[6] ),
        .I2(\aSeqbuf[9]_i_7_n_0 ),
        .I3(\aSeqbuf_reg_n_0_[9] ),
        .I4(\aSeqbuf_reg_n_0_[7] ),
        .I5(\aSeqbuf_reg_n_0_[8] ),
        .O(\aSeqbuf[9]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h008000800080AAAA)) 
    \aSeqbuf[9]_i_3 
       (.I0(\FSM_onehot_stateSeq[5]_i_6_n_0 ),
        .I1(\burstCnt[4]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_3_n_0 ),
        .I3(first__0),
        .I4(Q),
        .I5(TCapt),
        .O(\aSeqbuf[9]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3108" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \aSeqbuf[9]_i_4 
       (.I0(\aSeqbuf_reg_n_0_[6] ),
        .I1(\aSeqbuf[9]_i_7_n_0 ),
        .I2(\aSeqbuf_reg_n_0_[9] ),
        .I3(\aSeqbuf_reg_n_0_[7] ),
        .I4(\aSeqbuf_reg_n_0_[8] ),
        .O(\aSeqbuf[9]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h0300020003000000)) 
    \aSeqbuf[9]_i_5 
       (.I0(rdySeq),
        .I1(ackSeqbufBToSeqClear),
        .I2(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I3(\FSM_onehot_stateSeq[5]_i_4_n_0 ),
        .I4(Q),
        .I5(TCapt),
        .O(\aSeqbuf[9]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFF0F0F1FC)) 
    \aSeqbuf[9]_i_6 
       (.I0(\aSeqbuf[9]_i_4_n_0 ),
        .I1(rdySeq),
        .I2(ackSeqbufBToSeqClear),
        .I3(TCapt),
        .I4(Q),
        .I5(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .O(\aSeqbuf[9]_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \aSeqbuf[9]_i_7 
       (.I0(\aSeqbuf_reg_n_0_[5] ),
        .I1(\aSeqbuf_reg_n_0_[4] ),
        .I2(\aSeqbuf_reg_n_0_[3] ),
        .I3(\aSeqbuf_reg_n_0_[0] ),
        .I4(\aSeqbuf_reg_n_0_[1] ),
        .I5(\aSeqbuf_reg_n_0_[2] ),
        .O(\aSeqbuf[9]_i_7_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbuf[0]_i_1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbuf[1]_i_1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbuf[2]_i_1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbuf[3]_i_1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbuf[4]_i_1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbuf[5]_i_1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbuf[6]_i_1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbuf[7]_i_1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[8] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbuf[8]_i_1_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \aSeqbuf_reg[9] 
       (.C(aclk_sig),
        .CE(\aSeqbuf[9]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\aSeqbuf[9]_i_2_n_0 ),
        .Q(\aSeqbuf_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair3077" *) 
  LUT5 #(
    .INIT(32'h8088EEEE)) 
    ackInvSelect_sig_i_1
       (.I0(ackInvVidtrackSelect),
        .I1(reqInvVidtrackSelect),
        .I2(reqInvVidtrackSet),
        .I3(ackInvVidtrackSet),
        .I4(ackInvSelect_sig_i_2_n_0),
        .O(ackInvSelect_sig_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3114" *) 
  LUT3 #(
    .INIT(8'h04)) 
    ackInvSelect_sig_i_2
       (.I0(stateOp[2]),
        .I1(stateOp[0]),
        .I2(stateOp[1]),
        .O(ackInvSelect_sig_i_2_n_0));
  FDCE ackInvSelect_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(first_reg_0),
        .D(ackInvSelect_sig_i_1_n_0),
        .Q(ackInvVidtrackSelect));
  (* SOFT_HLUTNM = "soft_lutpair3111" *) 
  LUT5 #(
    .INIT(32'hC400CFCC)) 
    ackInvSet_sig_i_1__0
       (.I0(ackInvVidtrackSelect),
        .I1(ackInvVidtrackSet),
        .I2(reqInvVidtrackSelect),
        .I3(reqInvVidtrackSet),
        .I4(ackInvSelect_sig_i_2_n_0),
        .O(ackInvSet_sig_i_1__0_n_0));
  FDCE ackInvSet_sig_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(first_reg_0),
        .D(ackInvSet_sig_i_1__0_n_0),
        .Q(ackInvVidtrackSet));
  (* SOFT_HLUTNM = "soft_lutpair3075" *) 
  LUT4 #(
    .INIT(16'h4404)) 
    \burstCnt[0]_i_1__0 
       (.I0(first),
        .I1(\burstCnt[15]_i_4_n_0 ),
        .I2(\burstCnt_reg_n_0_[0] ),
        .I3(\burstCnt[15]_i_5_n_0 ),
        .O(\burstCnt[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3126" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[10]_i_1__0 
       (.I0(first),
        .I1(\burstCnt[10]_i_2_n_0 ),
        .O(\burstCnt[10]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hF7F7FDF7F7F7F7F7)) 
    \burstCnt[10]_i_2 
       (.I0(\burstCnt[15]_i_4_n_0 ),
        .I1(\burstCnt_reg_n_0_[10] ),
        .I2(\burstCnt[15]_i_5_n_0 ),
        .I3(\burstCnt_reg_n_0_[8] ),
        .I4(\burstCnt[10]_i_3_n_0 ),
        .I5(\burstCnt_reg_n_0_[9] ),
        .O(\burstCnt[10]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hBFFFFFFFFFFFFFFF)) 
    \burstCnt[10]_i_3 
       (.I0(\burstCnt[15]_i_5_n_0 ),
        .I1(\burstCnt_reg_n_0_[5] ),
        .I2(\burstCnt_reg_n_0_[4] ),
        .I3(\burstCnt[5]_i_2_n_0 ),
        .I4(\burstCnt_reg_n_0_[6] ),
        .I5(\burstCnt_reg_n_0_[7] ),
        .O(\burstCnt[10]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3125" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[11]_i_1__0 
       (.I0(first),
        .I1(\burstCnt[11]_i_2_n_0 ),
        .O(\burstCnt[11]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'hFF5DFFF7)) 
    \burstCnt[11]_i_2 
       (.I0(\burstCnt[15]_i_4_n_0 ),
        .I1(\burstCnt_reg_n_0_[10] ),
        .I2(\burstCnt[15]_i_15_n_0 ),
        .I3(\burstCnt[15]_i_5_n_0 ),
        .I4(\burstCnt_reg_n_0_[11] ),
        .O(\burstCnt[11]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3125" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[12]_i_1__0 
       (.I0(first),
        .I1(\burstCnt[12]_i_2_n_0 ),
        .O(\burstCnt[12]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hF7F7F7F7FDF7F7F7)) 
    \burstCnt[12]_i_2 
       (.I0(\burstCnt[15]_i_4_n_0 ),
        .I1(\burstCnt_reg_n_0_[12] ),
        .I2(\burstCnt[15]_i_5_n_0 ),
        .I3(\burstCnt_reg_n_0_[11] ),
        .I4(\burstCnt_reg_n_0_[10] ),
        .I5(\burstCnt[15]_i_15_n_0 ),
        .O(\burstCnt[12]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3124" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[13]_i_1__0 
       (.I0(first),
        .I1(\burstCnt[13]_i_2_n_0 ),
        .O(\burstCnt[13]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3088" *) 
  LUT5 #(
    .INIT(32'hFFD5FF7F)) 
    \burstCnt[13]_i_2 
       (.I0(\burstCnt[15]_i_4_n_0 ),
        .I1(\burstCnt_reg_n_0_[12] ),
        .I2(\burstCnt[14]_i_3_n_0 ),
        .I3(\burstCnt[15]_i_5_n_0 ),
        .I4(\burstCnt_reg_n_0_[13] ),
        .O(\burstCnt[13]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3124" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[14]_i_1__0 
       (.I0(first),
        .I1(\burstCnt[14]_i_2_n_0 ),
        .O(\burstCnt[14]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFD7FF77FF77FF77)) 
    \burstCnt[14]_i_2 
       (.I0(\burstCnt[15]_i_4_n_0 ),
        .I1(\burstCnt_reg_n_0_[14] ),
        .I2(\burstCnt[14]_i_3_n_0 ),
        .I3(\burstCnt[15]_i_5_n_0 ),
        .I4(\burstCnt_reg_n_0_[12] ),
        .I5(\burstCnt_reg_n_0_[13] ),
        .O(\burstCnt[14]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0000080000000000)) 
    \burstCnt[14]_i_3 
       (.I0(\burstCnt_reg_n_0_[11] ),
        .I1(\burstCnt_reg_n_0_[10] ),
        .I2(\burstCnt[15]_i_5_n_0 ),
        .I3(\burstCnt_reg_n_0_[8] ),
        .I4(\burstCnt[10]_i_3_n_0 ),
        .I5(\burstCnt_reg_n_0_[9] ),
        .O(\burstCnt[14]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000010000000101)) 
    \burstCnt[15]_i_1 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(rdySeq),
        .I2(ackSeqbufBToSeqClear),
        .I3(\burstCnt[15]_i_3_n_0 ),
        .I4(Q),
        .I5(TCapt),
        .O(\burstCnt[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hABAEAFAFAFAFABAE)) 
    \burstCnt[15]_i_10 
       (.I0(\burstCnt[15]_i_21_n_0 ),
        .I1(\quad_reg_n_0_[8] ),
        .I2(\burstCnt[15]_i_16_n_0 ),
        .I3(state[0]),
        .I4(\quad_reg_n_0_[10] ),
        .I5(state[7]),
        .O(\burstCnt[15]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'h6F0F666FF6F066F6)) 
    \burstCnt[15]_i_11 
       (.I0(state[7]),
        .I1(\quad_reg_n_0_[23] ),
        .I2(state[4]),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[1] ),
        .I5(\quad_reg_n_0_[12] ),
        .O(\burstCnt[15]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h6F6F660FF6F666F0)) 
    \burstCnt[15]_i_12 
       (.I0(state[7]),
        .I1(\quad_reg_n_0_[1] ),
        .I2(state[5]),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[1] ),
        .I5(\quad_reg_n_0_[13] ),
        .O(\burstCnt[15]_i_12_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF6FF6)) 
    \burstCnt[15]_i_13 
       (.I0(state[6]),
        .I1(\burstState_reg_n_0_[6] ),
        .I2(\burstState_reg_n_0_[0] ),
        .I3(state[0]),
        .I4(\burstCnt[15]_i_22_n_0 ),
        .I5(\burstCnt[15]_i_23_n_0 ),
        .O(\burstCnt[15]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF7FFF)) 
    \burstCnt[15]_i_14 
       (.I0(\burstCnt_reg_n_0_[4] ),
        .I1(\burstCnt_reg_n_0_[12] ),
        .I2(\burstCnt_reg_n_0_[8] ),
        .I3(\burstCnt_reg_n_0_[9] ),
        .I4(\burstCnt[15]_i_24_n_0 ),
        .I5(\burstCnt[15]_i_25_n_0 ),
        .O(\burstCnt[15]_i_14_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \burstCnt[15]_i_15 
       (.I0(\burstCnt[15]_i_26_n_0 ),
        .I1(\burstCnt_reg_n_0_[9] ),
        .O(\burstCnt[15]_i_15_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3086" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \burstCnt[15]_i_16 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .O(\burstCnt[15]_i_16_n_0 ));
  LUT6 #(
    .INIT(64'h6F0F6F66F6F0F666)) 
    \burstCnt[15]_i_17 
       (.I0(state[4]),
        .I1(\quad_reg_n_0_[20] ),
        .I2(state[5]),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[1] ),
        .I5(\quad_reg_n_0_[5] ),
        .O(\burstCnt[15]_i_17_n_0 ));
  LUT6 #(
    .INIT(64'h6F6F660FF6F666F0)) 
    \burstCnt[15]_i_18 
       (.I0(state[6]),
        .I1(\quad_reg_n_0_[6] ),
        .I2(state[5]),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[0] ),
        .I5(\quad_reg_n_0_[21] ),
        .O(\burstCnt[15]_i_18_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3097" *) 
  LUT5 #(
    .INIT(32'h7763EE6C)) 
    \burstCnt[15]_i_19 
       (.I0(\quad_reg_n_0_[3] ),
        .I1(state[7]),
        .I2(\i_reg_n_0_[0] ),
        .I3(\i_reg_n_0_[1] ),
        .I4(\quad_reg_n_0_[15] ),
        .O(\burstCnt[15]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF12333312)) 
    \burstCnt[15]_i_20 
       (.I0(\quad_reg_n_0_[7] ),
        .I1(\burstCnt[15]_i_27_n_0 ),
        .I2(state[7]),
        .I3(\quad_reg_n_0_[0] ),
        .I4(state[0]),
        .I5(\burstCnt[15]_i_28_n_0 ),
        .O(\burstCnt[15]_i_20_n_0 ));
  LUT6 #(
    .INIT(64'h6F0F666FF6F066F6)) 
    \burstCnt[15]_i_21 
       (.I0(state[6]),
        .I1(\quad_reg_n_0_[22] ),
        .I2(state[7]),
        .I3(\i_reg_n_0_[0] ),
        .I4(\i_reg_n_0_[1] ),
        .I5(\quad_reg_n_0_[11] ),
        .O(\burstCnt[15]_i_21_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \burstCnt[15]_i_22 
       (.I0(state[7]),
        .I1(\burstState_reg_n_0_[1] ),
        .O(\burstCnt[15]_i_22_n_0 ));
  LUT6 #(
    .INIT(64'h6FF6FFFFFFFF6FF6)) 
    \burstCnt[15]_i_23 
       (.I0(\burstState_reg_n_0_[1] ),
        .I1(state[7]),
        .I2(state[4]),
        .I3(\burstState_reg_n_0_[4] ),
        .I4(state[5]),
        .I5(\burstState_reg_n_0_[5] ),
        .O(\burstCnt[15]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \burstCnt[15]_i_24 
       (.I0(\burstCnt_reg_n_0_[14] ),
        .I1(\burstCnt_reg_n_0_[7] ),
        .I2(\burstCnt_reg_n_0_[15] ),
        .I3(\burstCnt_reg_n_0_[5] ),
        .O(\burstCnt[15]_i_24_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \burstCnt[15]_i_25 
       (.I0(\burstCnt_reg_n_0_[13] ),
        .I1(\burstCnt_reg_n_0_[10] ),
        .I2(\burstCnt_reg_n_0_[11] ),
        .I3(\burstCnt_reg_n_0_[6] ),
        .O(\burstCnt[15]_i_25_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFF7FFFFFF)) 
    \burstCnt[15]_i_26 
       (.I0(\burstCnt_reg_n_0_[7] ),
        .I1(\burstCnt_reg_n_0_[5] ),
        .I2(\burstCnt[7]_i_3_n_0 ),
        .I3(\burstCnt_reg_n_0_[6] ),
        .I4(\burstCnt_reg_n_0_[8] ),
        .I5(\burstCnt[15]_i_5_n_0 ),
        .O(\burstCnt[15]_i_26_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3085" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[15]_i_27 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .O(\burstCnt[15]_i_27_n_0 ));
  LUT6 #(
    .INIT(64'h6F6F660FF6F666F0)) 
    \burstCnt[15]_i_28 
       (.I0(state[4]),
        .I1(\quad_reg_n_0_[4] ),
        .I2(state[0]),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[0] ),
        .I5(\quad_reg_n_0_[16] ),
        .O(\burstCnt[15]_i_28_n_0 ));
  LUT6 #(
    .INIT(64'h0000444000004040)) 
    \burstCnt[15]_i_2__0 
       (.I0(first),
        .I1(\burstCnt[15]_i_4_n_0 ),
        .I2(\burstCnt_reg_n_0_[15] ),
        .I3(\burstCnt_reg_n_0_[14] ),
        .I4(\burstCnt[15]_i_5_n_0 ),
        .I5(\burstCnt[15]_i_6__0_n_0 ),
        .O(\burstCnt[15]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3083" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \burstCnt[15]_i_3 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .O(\burstCnt[15]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000004)) 
    \burstCnt[15]_i_4 
       (.I0(\burstCnt[15]_i_7_n_0 ),
        .I1(\burstCnt[15]_i_8_n_0 ),
        .I2(\burstCnt[15]_i_9_n_0 ),
        .I3(\burstCnt[15]_i_10_n_0 ),
        .I4(\burstCnt[15]_i_11_n_0 ),
        .I5(\burstCnt[15]_i_12_n_0 ),
        .O(\burstCnt[15]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hBAAAAAAAAAAAAAAA)) 
    \burstCnt[15]_i_5 
       (.I0(\burstCnt[15]_i_13_n_0 ),
        .I1(\burstCnt[15]_i_14_n_0 ),
        .I2(\burstCnt_reg_n_0_[3] ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt_reg_n_0_[1] ),
        .I5(\burstCnt_reg_n_0_[2] ),
        .O(\burstCnt[15]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h0040000000000000)) 
    \burstCnt[15]_i_6__0 
       (.I0(\burstCnt[15]_i_15_n_0 ),
        .I1(\burstCnt_reg_n_0_[10] ),
        .I2(\burstCnt_reg_n_0_[11] ),
        .I3(\burstCnt[15]_i_5_n_0 ),
        .I4(\burstCnt_reg_n_0_[12] ),
        .I5(\burstCnt_reg_n_0_[13] ),
        .O(\burstCnt[15]_i_6__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF12333312)) 
    \burstCnt[15]_i_7 
       (.I0(\quad_reg_n_0_[14] ),
        .I1(\burstCnt[15]_i_16_n_0 ),
        .I2(state[6]),
        .I3(\quad_reg_n_0_[9] ),
        .I4(state[7]),
        .I5(\burstCnt[15]_i_17_n_0 ),
        .O(\burstCnt[15]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h00000000AB040857)) 
    \burstCnt[15]_i_8 
       (.I0(\quad_reg_n_0_[2] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(\quad_reg_n_0_[18] ),
        .I5(\burstCnt[15]_i_18_n_0 ),
        .O(\burstCnt[15]_i_8_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFF070E)) 
    \burstCnt[15]_i_9 
       (.I0(\quad_reg_n_0_[19] ),
        .I1(state[7]),
        .I2(\dwrSeqbuf[23]_i_2_n_0 ),
        .I3(\quad_reg_n_0_[17] ),
        .I4(\burstCnt[15]_i_19_n_0 ),
        .I5(\burstCnt[15]_i_20_n_0 ),
        .O(\burstCnt[15]_i_9_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3075" *) 
  LUT5 #(
    .INIT(32'h01100000)) 
    \burstCnt[1]_i_1 
       (.I0(first),
        .I1(\burstCnt[15]_i_5_n_0 ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt[15]_i_4_n_0 ),
        .O(\burstCnt[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0015004000000000)) 
    \burstCnt[2]_i_1 
       (.I0(first),
        .I1(\burstCnt_reg_n_0_[1] ),
        .I2(\burstCnt_reg_n_0_[0] ),
        .I3(\burstCnt[15]_i_5_n_0 ),
        .I4(\burstCnt_reg_n_0_[2] ),
        .I5(\burstCnt[15]_i_4_n_0 ),
        .O(\burstCnt[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000014444444)) 
    \burstCnt[3]_i_1__0 
       (.I0(first),
        .I1(\burstCnt_reg_n_0_[3] ),
        .I2(\burstCnt_reg_n_0_[0] ),
        .I3(\burstCnt_reg_n_0_[1] ),
        .I4(\burstCnt_reg_n_0_[2] ),
        .I5(\burstCnt[4]_i_2_n_0 ),
        .O(\burstCnt[3]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3112" *) 
  LUT4 #(
    .INIT(16'h0014)) 
    \burstCnt[4]_i_1 
       (.I0(first),
        .I1(\burstCnt_reg_n_0_[4] ),
        .I2(\burstCnt[5]_i_2_n_0 ),
        .I3(\burstCnt[4]_i_2_n_0 ),
        .O(\burstCnt[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3088" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \burstCnt[4]_i_2 
       (.I0(\burstCnt[15]_i_5_n_0 ),
        .I1(\burstCnt[15]_i_4_n_0 ),
        .O(\burstCnt[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h0004040404000000)) 
    \burstCnt[5]_i_1 
       (.I0(first),
        .I1(\burstCnt[15]_i_4_n_0 ),
        .I2(\burstCnt[15]_i_5_n_0 ),
        .I3(\burstCnt[5]_i_2_n_0 ),
        .I4(\burstCnt_reg_n_0_[4] ),
        .I5(\burstCnt_reg_n_0_[5] ),
        .O(\burstCnt[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3091" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \burstCnt[5]_i_2 
       (.I0(\burstCnt_reg_n_0_[3] ),
        .I1(\burstCnt_reg_n_0_[0] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[2] ),
        .O(\burstCnt[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3127" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[6]_i_1 
       (.I0(first),
        .I1(\burstCnt[6]_i_2_n_0 ),
        .O(\burstCnt[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFD7777777)) 
    \burstCnt[6]_i_2 
       (.I0(\burstCnt[15]_i_4_n_0 ),
        .I1(\burstCnt_reg_n_0_[6] ),
        .I2(\burstCnt[5]_i_2_n_0 ),
        .I3(\burstCnt_reg_n_0_[4] ),
        .I4(\burstCnt_reg_n_0_[5] ),
        .I5(\burstCnt[15]_i_5_n_0 ),
        .O(\burstCnt[6]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3128" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[7]_i_1 
       (.I0(first),
        .I1(\burstCnt[7]_i_2_n_0 ),
        .O(\burstCnt[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFF20FFDFFFFFFFFF)) 
    \burstCnt[7]_i_2 
       (.I0(\burstCnt_reg_n_0_[6] ),
        .I1(\burstCnt[7]_i_3_n_0 ),
        .I2(\burstCnt_reg_n_0_[5] ),
        .I3(\burstCnt[15]_i_5_n_0 ),
        .I4(\burstCnt_reg_n_0_[7] ),
        .I5(\burstCnt[15]_i_4_n_0 ),
        .O(\burstCnt[7]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h7FFFFFFF)) 
    \burstCnt[7]_i_3 
       (.I0(\burstCnt_reg_n_0_[4] ),
        .I1(\burstCnt_reg_n_0_[2] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt_reg_n_0_[3] ),
        .O(\burstCnt[7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3127" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[8]_i_1 
       (.I0(first),
        .I1(\burstCnt[8]_i_2_n_0 ),
        .O(\burstCnt[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3089" *) 
  LUT4 #(
    .INIT(16'hDF75)) 
    \burstCnt[8]_i_2 
       (.I0(\burstCnt[15]_i_4_n_0 ),
        .I1(\burstCnt[15]_i_5_n_0 ),
        .I2(\burstCnt_reg_n_0_[8] ),
        .I3(\burstCnt[10]_i_3_n_0 ),
        .O(\burstCnt[8]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3126" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \burstCnt[9]_i_1__0 
       (.I0(first),
        .I1(\burstCnt[9]_i_2_n_0 ),
        .O(\burstCnt[9]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3089" *) 
  LUT5 #(
    .INIT(32'hF2FDFFFF)) 
    \burstCnt[9]_i_2 
       (.I0(\burstCnt_reg_n_0_[8] ),
        .I1(\burstCnt[10]_i_3_n_0 ),
        .I2(\burstCnt[15]_i_5_n_0 ),
        .I3(\burstCnt_reg_n_0_[9] ),
        .I4(\burstCnt[15]_i_4_n_0 ),
        .O(\burstCnt[9]_i_2_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[0] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[0]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[10] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[10]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[10] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[11] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[11]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[11] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[12] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[12]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[12] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[13] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[13]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[13] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[14] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[14]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[14] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[15] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[15]_i_2__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[15] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[1] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[1]_i_1_n_0 ),
        .Q(\burstCnt_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[2] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[2]_i_1_n_0 ),
        .Q(\burstCnt_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[3] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[3]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[4] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[4]_i_1_n_0 ),
        .Q(\burstCnt_reg_n_0_[4] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[5] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[5]_i_1_n_0 ),
        .Q(\burstCnt_reg_n_0_[5] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[6] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[6]_i_1_n_0 ),
        .Q(\burstCnt_reg_n_0_[6] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[7] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[7]_i_1_n_0 ),
        .Q(\burstCnt_reg_n_0_[7] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[8] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[8]_i_1_n_0 ),
        .Q(\burstCnt_reg_n_0_[8] ));
  FDCE #(
    .INIT(1'b0)) 
    \burstCnt_reg[9] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\burstCnt[9]_i_1__0_n_0 ),
        .Q(\burstCnt_reg_n_0_[9] ));
  (* SOFT_HLUTNM = "soft_lutpair3120" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[0]_i_1 
       (.I0(first),
        .I1(state[0]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .O(\burstState[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3120" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[1]_i_1 
       (.I0(first),
        .I1(state[7]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .O(\burstState[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3121" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[4]_i_1 
       (.I0(first),
        .I1(state[4]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .O(\burstState[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3121" *) 
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[5]_i_1 
       (.I0(first),
        .I1(state[5]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .O(\burstState[5]_i_1_n_0 ));
  LUT3 #(
    .INIT(8'hEF)) 
    \burstState[6]_i_1 
       (.I0(first),
        .I1(state[6]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .O(\burstState[6]_i_1_n_0 ));
  FDPE \burstState_reg[0] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .D(\burstState[0]_i_1_n_0 ),
        .PRE(first_reg_0),
        .Q(\burstState_reg_n_0_[0] ));
  FDPE \burstState_reg[1] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .D(\burstState[1]_i_1_n_0 ),
        .PRE(first_reg_0),
        .Q(\burstState_reg_n_0_[1] ));
  FDPE \burstState_reg[4] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .D(\burstState[4]_i_1_n_0 ),
        .PRE(first_reg_0),
        .Q(\burstState_reg_n_0_[4] ));
  FDPE \burstState_reg[5] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .D(\burstState[5]_i_1_n_0 ),
        .PRE(first_reg_0),
        .Q(\burstState_reg_n_0_[5] ));
  FDPE \burstState_reg[6] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .D(\burstState[6]_i_1_n_0 ),
        .PRE(first_reg_0),
        .Q(\burstState_reg_n_0_[6] ));
  LUT6 #(
    .INIT(64'hFBFFFBAAAAAAAAAA)) 
    \dwrSeqbuf[0]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt_reg_n_0_[0] ),
        .I2(\burstCnt[15]_i_5_n_0 ),
        .I3(\burstCnt[15]_i_4_n_0 ),
        .I4(\dwrSeqbuf[0]_i_2_n_0 ),
        .I5(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3098" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[0]_i_2 
       (.I0(state[0]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[0] ),
        .O(\dwrSeqbuf[0]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[10]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[10]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[10]_i_2_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3104" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[10]_i_2 
       (.I0(state[7]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[10] ),
        .O(\dwrSeqbuf[10]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[11]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[11]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[11]_i_2_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3103" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[11]_i_2 
       (.I0(state[7]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[11] ),
        .O(\dwrSeqbuf[11]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[12]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[12]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[12]_i_2_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3107" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[12]_i_2 
       (.I0(state[4]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[12] ),
        .O(\dwrSeqbuf[12]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[13]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[13]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[13]_i_2_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3106" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[13]_i_2 
       (.I0(state[5]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[13] ),
        .O(\dwrSeqbuf[13]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[14]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[14]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[14]_i_2_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3102" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[14]_i_2 
       (.I0(state[6]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[14] ),
        .O(\dwrSeqbuf[14]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBAAAAA)) 
    \dwrSeqbuf[15]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\dwrSeqbuf[15]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[15]_i_3_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hF1F5F5F5F5F5F5F5)) 
    \dwrSeqbuf[15]_i_2 
       (.I0(\burstCnt_reg_n_0_[15] ),
        .I1(\burstCnt_reg_n_0_[14] ),
        .I2(\burstCnt[15]_i_5_n_0 ),
        .I3(\burstCnt_reg_n_0_[13] ),
        .I4(\burstCnt_reg_n_0_[12] ),
        .I5(\burstCnt[14]_i_3_n_0 ),
        .O(\dwrSeqbuf[15]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3097" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[15]_i_3 
       (.I0(state[7]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[15] ),
        .O(\dwrSeqbuf[15]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[16]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(state[0]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\aSeqbuf[8]_i_4_n_0 ),
        .I4(\quad_reg_n_0_[16] ),
        .I5(\dwrSeqbuf[23]_i_2_n_0 ),
        .O(\dwrSeqbuf[16]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[17]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(state[7]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\aSeqbuf[8]_i_4_n_0 ),
        .I4(\quad_reg_n_0_[17] ),
        .I5(\dwrSeqbuf[23]_i_2_n_0 ),
        .O(\dwrSeqbuf[17]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[18]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(state[7]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\aSeqbuf[8]_i_4_n_0 ),
        .I4(\quad_reg_n_0_[18] ),
        .I5(\dwrSeqbuf[23]_i_2_n_0 ),
        .O(\dwrSeqbuf[18]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[19]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(state[7]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\aSeqbuf[8]_i_4_n_0 ),
        .I4(\quad_reg_n_0_[19] ),
        .I5(\dwrSeqbuf[23]_i_2_n_0 ),
        .O(\dwrSeqbuf[19]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[1]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\dwrSeqbuf[1]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[1]_i_3_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3090" *) 
  LUT4 #(
    .INIT(16'hFFD7)) 
    \dwrSeqbuf[1]_i_2 
       (.I0(\burstCnt[15]_i_4_n_0 ),
        .I1(\burstCnt_reg_n_0_[0] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt[15]_i_5_n_0 ),
        .O(\dwrSeqbuf[1]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3095" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[1]_i_3 
       (.I0(state[7]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[1] ),
        .O(\dwrSeqbuf[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[20]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(state[4]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\aSeqbuf[8]_i_4_n_0 ),
        .I4(\quad_reg_n_0_[20] ),
        .I5(\dwrSeqbuf[23]_i_2_n_0 ),
        .O(\dwrSeqbuf[20]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[21]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(state[5]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\aSeqbuf[8]_i_4_n_0 ),
        .I4(\quad_reg_n_0_[21] ),
        .I5(\dwrSeqbuf[23]_i_2_n_0 ),
        .O(\dwrSeqbuf[21]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[22]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(state[6]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\aSeqbuf[8]_i_4_n_0 ),
        .I4(\quad_reg_n_0_[22] ),
        .I5(\dwrSeqbuf[23]_i_2_n_0 ),
        .O(\dwrSeqbuf[22]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEEAAEEAAEFAAEAAA)) 
    \dwrSeqbuf[23]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(state[7]),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\aSeqbuf[8]_i_4_n_0 ),
        .I4(\quad_reg_n_0_[23] ),
        .I5(\dwrSeqbuf[23]_i_2_n_0 ),
        .O(\dwrSeqbuf[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3084" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \dwrSeqbuf[23]_i_2 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .O(\dwrSeqbuf[23]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[24]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[15]_i_4_n_0 ),
        .I2(\quad_reg_n_0_[24] ),
        .I3(\burstCnt[15]_i_3_n_0 ),
        .I4(state[0]),
        .I5(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[24]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[25]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[15]_i_4_n_0 ),
        .I2(\quad_reg_n_0_[25] ),
        .I3(\burstCnt[15]_i_3_n_0 ),
        .I4(state[7]),
        .I5(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[25]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[26]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[15]_i_4_n_0 ),
        .I2(\quad_reg_n_0_[26] ),
        .I3(\burstCnt[15]_i_3_n_0 ),
        .I4(state[7]),
        .I5(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[26]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[27]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[15]_i_4_n_0 ),
        .I2(\quad_reg_n_0_[27] ),
        .I3(\burstCnt[15]_i_3_n_0 ),
        .I4(state[7]),
        .I5(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[27]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[28]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[15]_i_4_n_0 ),
        .I2(\quad_reg_n_0_[28] ),
        .I3(\burstCnt[15]_i_3_n_0 ),
        .I4(state[4]),
        .I5(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[28]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[29]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[15]_i_4_n_0 ),
        .I2(\quad_reg_n_0_[29] ),
        .I3(\burstCnt[15]_i_3_n_0 ),
        .I4(state[5]),
        .I5(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[29]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[2]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\dwrSeqbuf[2]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[2]_i_3_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3090" *) 
  LUT5 #(
    .INIT(32'hFDF7F7F7)) 
    \dwrSeqbuf[2]_i_2 
       (.I0(\burstCnt[15]_i_4_n_0 ),
        .I1(\burstCnt_reg_n_0_[2] ),
        .I2(\burstCnt[15]_i_5_n_0 ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt_reg_n_0_[1] ),
        .O(\dwrSeqbuf[2]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3092" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[2]_i_3 
       (.I0(state[7]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[2] ),
        .O(\dwrSeqbuf[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFEEEFEAAAAAAAA)) 
    \dwrSeqbuf[30]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[15]_i_4_n_0 ),
        .I2(\quad_reg_n_0_[30] ),
        .I3(\burstCnt[15]_i_3_n_0 ),
        .I4(state[6]),
        .I5(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[30]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAAABAAABAAABAAAA)) 
    \dwrSeqbuf[31]_i_1 
       (.I0(\burstCnt[15]_i_1_n_0 ),
        .I1(\dwrSeqbuf[31]_i_3__0_n_0 ),
        .I2(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I3(ackSeqbufBToSeqClear),
        .I4(rdySeq),
        .I5(Q),
        .O(\dwrSeqbuf[31]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFEAE0000)) 
    \dwrSeqbuf[31]_i_2 
       (.I0(\burstCnt[15]_i_4_n_0 ),
        .I1(\quad_reg_n_0_[31] ),
        .I2(\burstCnt[15]_i_3_n_0 ),
        .I3(state[7]),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .I5(\dwrSeqbuf[31]_i_4_n_0 ),
        .O(\dwrSeqbuf[31]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h1F111F1F1F1F1F1F)) 
    \dwrSeqbuf[31]_i_3__0 
       (.I0(TCapt),
        .I1(Q),
        .I2(\FSM_onehot_stateSeq[0]_i_2_n_0 ),
        .I3(stateOp[0]),
        .I4(stateOp[2]),
        .I5(stateOp[1]),
        .O(\dwrSeqbuf[31]_i_3__0_n_0 ));
  LUT5 #(
    .INIT(32'h0000BAAA)) 
    \dwrSeqbuf[31]_i_4 
       (.I0(\FSM_onehot_stateSeq[0]_i_2_n_0 ),
        .I1(stateOp[0]),
        .I2(stateOp[2]),
        .I3(stateOp[1]),
        .I4(\FSM_onehot_stateSeq[5]_i_6_n_0 ),
        .O(\dwrSeqbuf[31]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[3]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\dwrSeqbuf[3]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[3]_i_3_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3091" *) 
  LUT5 #(
    .INIT(32'hEAAABFFF)) 
    \dwrSeqbuf[3]_i_2 
       (.I0(\burstCnt[4]_i_2_n_0 ),
        .I1(\burstCnt_reg_n_0_[2] ),
        .I2(\burstCnt_reg_n_0_[1] ),
        .I3(\burstCnt_reg_n_0_[0] ),
        .I4(\burstCnt_reg_n_0_[3] ),
        .O(\dwrSeqbuf[3]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3096" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[3]_i_3 
       (.I0(state[7]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[3] ),
        .O(\dwrSeqbuf[3]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[4]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\dwrSeqbuf[4]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[4]_i_3_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hEAAAAAAABFFFFFFF)) 
    \dwrSeqbuf[4]_i_2 
       (.I0(\burstCnt[4]_i_2_n_0 ),
        .I1(\burstCnt_reg_n_0_[3] ),
        .I2(\burstCnt_reg_n_0_[0] ),
        .I3(\burstCnt_reg_n_0_[1] ),
        .I4(\burstCnt_reg_n_0_[2] ),
        .I5(\burstCnt_reg_n_0_[4] ),
        .O(\dwrSeqbuf[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3100" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[4]_i_3 
       (.I0(state[4]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[4] ),
        .O(\dwrSeqbuf[4]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[5]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\dwrSeqbuf[5]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[5]_i_3_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[5]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFF95FFFF)) 
    \dwrSeqbuf[5]_i_2 
       (.I0(\burstCnt_reg_n_0_[5] ),
        .I1(\burstCnt_reg_n_0_[4] ),
        .I2(\burstCnt[5]_i_2_n_0 ),
        .I3(\burstCnt[15]_i_5_n_0 ),
        .I4(\burstCnt[15]_i_4_n_0 ),
        .O(\dwrSeqbuf[5]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3094" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[5]_i_3 
       (.I0(state[5]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[5] ),
        .O(\dwrSeqbuf[5]_i_3_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[6]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[6]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[6]_i_2_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3093" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[6]_i_2 
       (.I0(state[6]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[6] ),
        .O(\dwrSeqbuf[6]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[7]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[7]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[7]_i_2_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3099" *) 
  LUT4 #(
    .INIT(16'hFE02)) 
    \dwrSeqbuf[7]_i_2 
       (.I0(state[7]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[7] ),
        .O(\dwrSeqbuf[7]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[8]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[8]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[8]_i_2_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3105" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[8]_i_2 
       (.I0(state[0]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[8] ),
        .O(\dwrSeqbuf[8]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hBFBBAAAA)) 
    \dwrSeqbuf[9]_i_1 
       (.I0(\dwrSeqbuf[31]_i_4_n_0 ),
        .I1(\burstCnt[9]_i_2_n_0 ),
        .I2(\burstCnt[15]_i_4_n_0 ),
        .I3(\dwrSeqbuf[9]_i_2_n_0 ),
        .I4(\aSeqbuf[8]_i_4_n_0 ),
        .O(\dwrSeqbuf[9]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3101" *) 
  LUT4 #(
    .INIT(16'hFB08)) 
    \dwrSeqbuf[9]_i_2 
       (.I0(state[7]),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\quad_reg_n_0_[9] ),
        .O(\dwrSeqbuf[9]_i_2_n_0 ));
  FDCE \dwrSeqbuf_reg[0] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[0]_i_1_n_0 ),
        .Q(dwrSeqbuf[0]));
  FDCE \dwrSeqbuf_reg[10] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[10]_i_1_n_0 ),
        .Q(dwrSeqbuf[10]));
  FDCE \dwrSeqbuf_reg[11] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[11]_i_1_n_0 ),
        .Q(dwrSeqbuf[11]));
  FDCE \dwrSeqbuf_reg[12] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[12]_i_1_n_0 ),
        .Q(dwrSeqbuf[12]));
  FDCE \dwrSeqbuf_reg[13] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[13]_i_1_n_0 ),
        .Q(dwrSeqbuf[13]));
  FDCE \dwrSeqbuf_reg[14] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[14]_i_1_n_0 ),
        .Q(dwrSeqbuf[14]));
  FDCE \dwrSeqbuf_reg[15] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[15]_i_1_n_0 ),
        .Q(dwrSeqbuf[15]));
  FDCE \dwrSeqbuf_reg[16] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[16]_i_1_n_0 ),
        .Q(dwrSeqbuf[16]));
  FDCE \dwrSeqbuf_reg[17] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[17]_i_1_n_0 ),
        .Q(dwrSeqbuf[17]));
  FDCE \dwrSeqbuf_reg[18] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[18]_i_1_n_0 ),
        .Q(dwrSeqbuf[18]));
  FDCE \dwrSeqbuf_reg[19] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[19]_i_1_n_0 ),
        .Q(dwrSeqbuf[19]));
  FDCE \dwrSeqbuf_reg[1] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[1]_i_1_n_0 ),
        .Q(dwrSeqbuf[1]));
  FDCE \dwrSeqbuf_reg[20] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[20]_i_1_n_0 ),
        .Q(dwrSeqbuf[20]));
  FDCE \dwrSeqbuf_reg[21] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[21]_i_1_n_0 ),
        .Q(dwrSeqbuf[21]));
  FDCE \dwrSeqbuf_reg[22] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[22]_i_1_n_0 ),
        .Q(dwrSeqbuf[22]));
  FDCE \dwrSeqbuf_reg[23] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[23]_i_1_n_0 ),
        .Q(dwrSeqbuf[23]));
  FDCE \dwrSeqbuf_reg[24] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[24]_i_1_n_0 ),
        .Q(dwrSeqbuf[24]));
  FDCE \dwrSeqbuf_reg[25] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[25]_i_1_n_0 ),
        .Q(dwrSeqbuf[25]));
  FDCE \dwrSeqbuf_reg[26] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[26]_i_1_n_0 ),
        .Q(dwrSeqbuf[26]));
  FDCE \dwrSeqbuf_reg[27] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[27]_i_1_n_0 ),
        .Q(dwrSeqbuf[27]));
  FDCE \dwrSeqbuf_reg[28] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[28]_i_1_n_0 ),
        .Q(dwrSeqbuf[28]));
  FDCE \dwrSeqbuf_reg[29] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[29]_i_1_n_0 ),
        .Q(dwrSeqbuf[29]));
  FDCE \dwrSeqbuf_reg[2] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[2]_i_1_n_0 ),
        .Q(dwrSeqbuf[2]));
  FDCE \dwrSeqbuf_reg[30] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[30]_i_1_n_0 ),
        .Q(dwrSeqbuf[30]));
  FDCE \dwrSeqbuf_reg[31] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[31]_i_2_n_0 ),
        .Q(dwrSeqbuf[31]));
  FDCE \dwrSeqbuf_reg[3] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[3]_i_1_n_0 ),
        .Q(dwrSeqbuf[3]));
  FDCE \dwrSeqbuf_reg[4] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[4]_i_1_n_0 ),
        .Q(dwrSeqbuf[4]));
  FDCE \dwrSeqbuf_reg[5] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[5]_i_1_n_0 ),
        .Q(dwrSeqbuf[5]));
  FDCE \dwrSeqbuf_reg[6] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[6]_i_1_n_0 ),
        .Q(dwrSeqbuf[6]));
  FDCE \dwrSeqbuf_reg[7] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[7]_i_1_n_0 ),
        .Q(dwrSeqbuf[7]));
  FDCE \dwrSeqbuf_reg[8] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[8]_i_1_n_0 ),
        .Q(dwrSeqbuf[8]));
  FDCE \dwrSeqbuf_reg[9] 
       (.C(aclk_sig),
        .CE(\dwrSeqbuf[31]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\dwrSeqbuf[9]_i_1_n_0 ),
        .Q(dwrSeqbuf[9]));
  (* SOFT_HLUTNM = "soft_lutpair3081" *) 
  LUT3 #(
    .INIT(8'h08)) 
    enSeqbuf_i_1
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(first),
        .O(enSeqbuf));
  FDCE enSeqbuf_reg
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(enSeqbuf),
        .Q(enSeqbuf_reg_n_0));
  FDPE first_reg
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .D(first),
        .PRE(first_reg_0),
        .Q(first__0));
  (* SOFT_HLUTNM = "soft_lutpair3087" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \i[0]_i_1__2 
       (.I0(first),
        .I1(\i_reg_n_0_[0] ),
        .O(i[0]));
  LUT5 #(
    .INIT(32'h00000001)) 
    \i[1]_i_1__1 
       (.I0(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I1(Q),
        .I2(rdySeq),
        .I3(ackSeqbufBToSeqClear),
        .I4(\FSM_onehot_stateSeq[3]_i_1_n_0 ),
        .O(\i[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3082" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \i[1]_i_2__0 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(first),
        .O(i[1]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__1_n_0 ),
        .CLR(first_reg_0),
        .D(i[0]),
        .Q(\i_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(aclk_sig),
        .CE(\i[1]_i_1__1_n_0 ),
        .CLR(first_reg_0),
        .D(i[1]),
        .Q(\i_reg_n_0_[1] ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Dpbram_size4kB_a32b64 mySeqbuf
       (.\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram (dwrSeqbuf),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_0 ({\aSeqbufB_reg_n_0_[8] ,\aSeqbufB_reg_n_0_[7] ,\aSeqbufB_reg_n_0_[6] ,\aSeqbufB_reg_n_0_[5] ,\aSeqbufB_reg_n_0_[4] ,\aSeqbufB_reg_n_0_[3] ,\aSeqbufB_reg_n_0_[2] ,\aSeqbufB_reg_n_0_[1] ,\aSeqbufB_reg_n_0_[0] }),
        .\DEVICE_8SERIES.NO_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.ram_1 (stateSeqbufB_reg),
        .Q({\aSeqbuf_reg_n_0_[9] ,\aSeqbuf_reg_n_0_[8] ,\aSeqbuf_reg_n_0_[7] ,\aSeqbuf_reg_n_0_[6] ,\aSeqbuf_reg_n_0_[5] ,\aSeqbuf_reg_n_0_[4] ,\aSeqbuf_reg_n_0_[3] ,\aSeqbuf_reg_n_0_[2] ,\aSeqbuf_reg_n_0_[1] ,\aSeqbuf_reg_n_0_[0] }),
        .aclk_sig(aclk_sig),
        .doutb(doutb),
        .ena(enSeqbuf_reg_n_0));
  LUT6 #(
    .INIT(64'h2F2F2FFF20202000)) 
    ptr0SeqbufTrackNotFixed_i_1
       (.I0(\burstCnt[4]_i_2_n_0 ),
        .I1(first),
        .I2(\aSeqbuf[9]_i_3_n_0 ),
        .I3(\aSeqbuf[9]_i_4_n_0 ),
        .I4(\FSM_onehot_stateSeq[5]_i_5_n_0 ),
        .I5(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(ptr0SeqbufTrackNotFixed_i_1_n_0));
  FDCE ptr0SeqbufTrackNotFixed_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(first_reg_0),
        .D(ptr0SeqbufTrackNotFixed_i_1_n_0),
        .Q(ptr0SeqbufTrackNotFixed_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3098" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[0]_i_1 
       (.I0(\quad_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[0]),
        .I4(first),
        .O(quad[0]));
  (* SOFT_HLUTNM = "soft_lutpair3104" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[10]_i_1 
       (.I0(\quad_reg_n_0_[10] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[10]));
  (* SOFT_HLUTNM = "soft_lutpair3103" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[11]_i_1 
       (.I0(\quad_reg_n_0_[11] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[11]));
  (* SOFT_HLUTNM = "soft_lutpair3107" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[12]_i_1 
       (.I0(\quad_reg_n_0_[12] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[4]),
        .I4(first),
        .O(quad[12]));
  (* SOFT_HLUTNM = "soft_lutpair3106" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[13]_i_1 
       (.I0(\quad_reg_n_0_[13] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[5]),
        .I4(first),
        .O(quad[13]));
  (* SOFT_HLUTNM = "soft_lutpair3102" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[14]_i_1 
       (.I0(\quad_reg_n_0_[14] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[6]),
        .I4(first),
        .O(quad[14]));
  LUT5 #(
    .INIT(32'h080808AA)) 
    \quad[15]_i_1 
       (.I0(\FSM_onehot_stateSeq[5]_i_6_n_0 ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(Q),
        .I4(TCapt),
        .O(\quad[15]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[15]_i_2 
       (.I0(\quad_reg_n_0_[15] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[15]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[16]_i_1 
       (.I0(\quad_reg_n_0_[16] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[0]),
        .I4(first),
        .O(quad[16]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[17]_i_1 
       (.I0(\quad_reg_n_0_[17] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[17]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[18]_i_1 
       (.I0(\quad_reg_n_0_[18] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[18]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[19]_i_1 
       (.I0(\quad_reg_n_0_[19] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[19]));
  (* SOFT_HLUTNM = "soft_lutpair3095" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[1]_i_1 
       (.I0(\quad_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[1]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[20]_i_1 
       (.I0(\quad_reg_n_0_[20] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[4]),
        .I4(first),
        .O(quad[20]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[21]_i_1 
       (.I0(\quad_reg_n_0_[21] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[5]),
        .I4(first),
        .O(quad[21]));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[22]_i_1 
       (.I0(\quad_reg_n_0_[22] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[6]),
        .I4(first),
        .O(quad[22]));
  LUT5 #(
    .INIT(32'h080808AA)) 
    \quad[23]_i_1 
       (.I0(\FSM_onehot_stateSeq[5]_i_6_n_0 ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(Q),
        .I4(TCapt),
        .O(\quad[23]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[23]_i_2 
       (.I0(\quad_reg_n_0_[23] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[23]));
  (* SOFT_HLUTNM = "soft_lutpair3081" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[24]_i_1 
       (.I0(\quad_reg_n_0_[24] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[0]),
        .I4(first),
        .O(quad[24]));
  (* SOFT_HLUTNM = "soft_lutpair3082" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[25]_i_1 
       (.I0(\quad_reg_n_0_[25] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[25]));
  (* SOFT_HLUTNM = "soft_lutpair3083" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[26]_i_1 
       (.I0(\quad_reg_n_0_[26] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[26]));
  (* SOFT_HLUTNM = "soft_lutpair3084" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[27]_i_1 
       (.I0(\quad_reg_n_0_[27] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[27]));
  (* SOFT_HLUTNM = "soft_lutpair3085" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[28]_i_1 
       (.I0(\quad_reg_n_0_[28] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[4]),
        .I4(first),
        .O(quad[28]));
  (* SOFT_HLUTNM = "soft_lutpair3086" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[29]_i_1 
       (.I0(\quad_reg_n_0_[29] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[5]),
        .I4(first),
        .O(quad[29]));
  (* SOFT_HLUTNM = "soft_lutpair3092" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[2]_i_1 
       (.I0(\quad_reg_n_0_[2] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[2]));
  (* SOFT_HLUTNM = "soft_lutpair3087" *) 
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[30]_i_1 
       (.I0(\quad_reg_n_0_[30] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[6]),
        .I4(first),
        .O(quad[30]));
  LUT5 #(
    .INIT(32'h0000EA2A)) 
    \quad[31]_i_1 
       (.I0(\quad_reg_n_0_[31] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[31]));
  (* SOFT_HLUTNM = "soft_lutpair3096" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[3]_i_1 
       (.I0(\quad_reg_n_0_[3] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[3]));
  (* SOFT_HLUTNM = "soft_lutpair3100" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[4]_i_1 
       (.I0(\quad_reg_n_0_[4] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[4]),
        .I4(first),
        .O(quad[4]));
  (* SOFT_HLUTNM = "soft_lutpair3094" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[5]_i_1 
       (.I0(\quad_reg_n_0_[5] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[5]),
        .I4(first),
        .O(quad[5]));
  (* SOFT_HLUTNM = "soft_lutpair3093" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[6]_i_1 
       (.I0(\quad_reg_n_0_[6] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[6]),
        .I4(first),
        .O(quad[6]));
  LUT5 #(
    .INIT(32'h020202AA)) 
    \quad[7]_i_1 
       (.I0(\FSM_onehot_stateSeq[5]_i_6_n_0 ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(Q),
        .I4(TCapt),
        .O(\quad[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3099" *) 
  LUT5 #(
    .INIT(32'h0000ABA8)) 
    \quad[7]_i_2 
       (.I0(\quad_reg_n_0_[7] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[7]));
  (* SOFT_HLUTNM = "soft_lutpair3105" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[8]_i_1 
       (.I0(\quad_reg_n_0_[8] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[0]),
        .I4(first),
        .O(quad[8]));
  (* SOFT_HLUTNM = "soft_lutpair3101" *) 
  LUT5 #(
    .INIT(32'h0000BA8A)) 
    \quad[9]_i_1 
       (.I0(\quad_reg_n_0_[9] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[0] ),
        .I3(state[7]),
        .I4(first),
        .O(quad[9]));
  FDCE \quad_reg[0] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[0]),
        .Q(\quad_reg_n_0_[0] ));
  FDCE \quad_reg[10] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[10]),
        .Q(\quad_reg_n_0_[10] ));
  FDCE \quad_reg[11] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[11]),
        .Q(\quad_reg_n_0_[11] ));
  FDCE \quad_reg[12] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[12]),
        .Q(\quad_reg_n_0_[12] ));
  FDCE \quad_reg[13] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[13]),
        .Q(\quad_reg_n_0_[13] ));
  FDCE \quad_reg[14] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[14]),
        .Q(\quad_reg_n_0_[14] ));
  FDCE \quad_reg[15] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[15]),
        .Q(\quad_reg_n_0_[15] ));
  FDCE \quad_reg[16] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[16]),
        .Q(\quad_reg_n_0_[16] ));
  FDCE \quad_reg[17] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[17]),
        .Q(\quad_reg_n_0_[17] ));
  FDCE \quad_reg[18] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[18]),
        .Q(\quad_reg_n_0_[18] ));
  FDCE \quad_reg[19] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[19]),
        .Q(\quad_reg_n_0_[19] ));
  FDCE \quad_reg[1] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[1]),
        .Q(\quad_reg_n_0_[1] ));
  FDCE \quad_reg[20] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[20]),
        .Q(\quad_reg_n_0_[20] ));
  FDCE \quad_reg[21] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[21]),
        .Q(\quad_reg_n_0_[21] ));
  FDCE \quad_reg[22] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[22]),
        .Q(\quad_reg_n_0_[22] ));
  FDCE \quad_reg[23] 
       (.C(aclk_sig),
        .CE(\quad[23]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[23]),
        .Q(\quad_reg_n_0_[23] ));
  FDCE \quad_reg[24] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[24]),
        .Q(\quad_reg_n_0_[24] ));
  FDCE \quad_reg[25] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[25]),
        .Q(\quad_reg_n_0_[25] ));
  FDCE \quad_reg[26] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[26]),
        .Q(\quad_reg_n_0_[26] ));
  FDCE \quad_reg[27] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[27]),
        .Q(\quad_reg_n_0_[27] ));
  FDCE \quad_reg[28] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[28]),
        .Q(\quad_reg_n_0_[28] ));
  FDCE \quad_reg[29] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[29]),
        .Q(\quad_reg_n_0_[29] ));
  FDCE \quad_reg[2] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[2]),
        .Q(\quad_reg_n_0_[2] ));
  FDCE \quad_reg[30] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[30]),
        .Q(\quad_reg_n_0_[30] ));
  FDCE \quad_reg[31] 
       (.C(aclk_sig),
        .CE(\burstCnt[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[31]),
        .Q(\quad_reg_n_0_[31] ));
  FDCE \quad_reg[3] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[3]),
        .Q(\quad_reg_n_0_[3] ));
  FDCE \quad_reg[4] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[4]),
        .Q(\quad_reg_n_0_[4] ));
  FDCE \quad_reg[5] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[5]),
        .Q(\quad_reg_n_0_[5] ));
  FDCE \quad_reg[6] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[6]),
        .Q(\quad_reg_n_0_[6] ));
  FDCE \quad_reg[7] 
       (.C(aclk_sig),
        .CE(\quad[7]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[7]),
        .Q(\quad_reg_n_0_[7] ));
  FDCE \quad_reg[8] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[8]),
        .Q(\quad_reg_n_0_[8] ));
  FDCE \quad_reg[9] 
       (.C(aclk_sig),
        .CE(\quad[15]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(quad[9]),
        .Q(\quad_reg_n_0_[9] ));
  LUT6 #(
    .INIT(64'hFFFCFFFF00100010)) 
    restart_i_1
       (.I0(restart_i_2_n_0),
        .I1(stateOp[1]),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .I4(restart_reg_0),
        .I5(restart_reg_n_0),
        .O(restart_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3111" *) 
  LUT4 #(
    .INIT(16'hD0DD)) 
    restart_i_2
       (.I0(ackInvVidtrackSelect),
        .I1(reqInvVidtrackSelect),
        .I2(reqInvVidtrackSet),
        .I3(ackInvVidtrackSet),
        .O(restart_i_2_n_0));
  FDCE restart_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(first_reg_0),
        .D(restart_i_1_n_0),
        .Q(restart_reg_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3122" *) 
  LUT3 #(
    .INIT(8'h24)) 
    \retbuf[0][0]_i_4 
       (.I0(stateOp[0]),
        .I1(stateOp[1]),
        .I2(stateOp[2]),
        .O(vidtrackGetInfoTixVState[0]));
  (* SOFT_HLUTNM = "soft_lutpair3144" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[5][0]_i_5 
       (.I0(\aSeqbuf_reg_n_0_[8] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(vidtrackGetInfoPtr0Seqbuf[8]));
  (* SOFT_HLUTNM = "soft_lutpair3144" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[5][1]_i_5 
       (.I0(\aSeqbuf_reg_n_0_[9] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(vidtrackGetInfoPtr0Seqbuf[9]));
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][0]_i_5 
       (.I0(\aSeqbuf_reg_n_0_[0] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(vidtrackGetInfoPtr0Seqbuf[0]));
  (* SOFT_HLUTNM = "soft_lutpair3123" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][1]_i_5 
       (.I0(\aSeqbuf_reg_n_0_[1] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(vidtrackGetInfoPtr0Seqbuf[1]));
  (* SOFT_HLUTNM = "soft_lutpair3147" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][2]_i_5 
       (.I0(\aSeqbuf_reg_n_0_[2] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(vidtrackGetInfoPtr0Seqbuf[2]));
  (* SOFT_HLUTNM = "soft_lutpair3147" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][3]_i_5 
       (.I0(\aSeqbuf_reg_n_0_[3] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(vidtrackGetInfoPtr0Seqbuf[3]));
  (* SOFT_HLUTNM = "soft_lutpair3146" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][4]_i_5 
       (.I0(\aSeqbuf_reg_n_0_[4] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(vidtrackGetInfoPtr0Seqbuf[4]));
  (* SOFT_HLUTNM = "soft_lutpair3146" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][5]_i_3 
       (.I0(\aSeqbuf_reg_n_0_[5] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(vidtrackGetInfoPtr0Seqbuf[5]));
  (* SOFT_HLUTNM = "soft_lutpair3145" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][6]_i_5 
       (.I0(\aSeqbuf_reg_n_0_[6] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(vidtrackGetInfoPtr0Seqbuf[6]));
  (* SOFT_HLUTNM = "soft_lutpair3145" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \retbuf[6][7]_i_9 
       (.I0(\aSeqbuf_reg_n_0_[7] ),
        .I1(ptr0SeqbufTrackNotFixed_reg_n_0),
        .O(vidtrackGetInfoPtr0Seqbuf[7]));
  FDCE rng_reg
       (.C(aclk_sig),
        .CE(TCaptMax),
        .CLR(first_reg_0),
        .D(hdrNotFix),
        .Q(rng_reg_n_0));
  LUT4 #(
    .INIT(16'hAA8A)) 
    \staTixVTrigger[7]_i_1 
       (.I0(reqInvVidtrackSelect),
        .I1(stateOp[1]),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .O(staFallingNotRising));
  FDCE \staTixVTrigger_reg[0] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[16]),
        .Q(staTixVTrigger[0]));
  FDCE \staTixVTrigger_reg[1] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[17]),
        .Q(staTixVTrigger[1]));
  FDCE \staTixVTrigger_reg[2] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[18]),
        .Q(staTixVTrigger[2]));
  FDCE \staTixVTrigger_reg[3] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[19]),
        .Q(staTixVTrigger[3]));
  FDCE \staTixVTrigger_reg[4] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[20]),
        .Q(staTixVTrigger[4]));
  FDCE \staTixVTrigger_reg[5] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[21]),
        .Q(staTixVTrigger[5]));
  FDCE \staTixVTrigger_reg[6] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[22]),
        .Q(staTixVTrigger[6]));
  FDCE \staTixVTrigger_reg[7] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[23]),
        .Q(staTixVTrigger[7]));
  (* SOFT_HLUTNM = "soft_lutpair3078" *) 
  LUT5 #(
    .INIT(32'hEEEFEFFE)) 
    \stateOp[0]_i_1__0 
       (.I0(reqInvVidtrackSelect),
        .I1(reqInvVidtrackSet),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .I4(stateOp[2]),
        .O(\stateOp[0]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0C0000C8000000C8)) 
    \stateOp[1]_i_1__0 
       (.I0(rng_reg_n_0),
        .I1(restart_reg_0),
        .I2(stateOp[1]),
        .I3(stateOp[0]),
        .I4(stateOp[2]),
        .I5(restart_reg_n_0),
        .O(\stateOp[1]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFB000000)) 
    \stateOp[2]_i_1 
       (.I0(rdySeq),
        .I1(stateOp[0]),
        .I2(restart_reg_n_0),
        .I3(vidtrackGetInfoTixVState[1]),
        .I4(\stateOp[2]_i_4__0_n_0 ),
        .I5(\stateOp[2]_i_5_n_0 ),
        .O(\stateOp[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \stateOp[2]_i_10 
       (.I0(\stateOp[2]_i_31_n_0 ),
        .I1(\TCaptMax_reg_n_0_[17] ),
        .I2(\TCaptMax_reg_n_0_[16] ),
        .I3(\TCaptMax_reg_n_0_[19] ),
        .I4(\TCaptMax_reg_n_0_[18] ),
        .I5(\stateOp[2]_i_32_n_0 ),
        .O(\stateOp[2]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \stateOp[2]_i_11 
       (.I0(\stateOp[2]_i_33_n_0 ),
        .I1(\TCaptMax_reg_n_0_[2] ),
        .I2(\TCaptMax_reg_n_0_[1] ),
        .I3(\TCaptMax_reg_n_0_[3] ),
        .I4(\TCaptMax_reg_n_0_[0] ),
        .I5(\stateOp[2]_i_34_n_0 ),
        .O(\stateOp[2]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'h0000000040000000)) 
    \stateOp[2]_i_12 
       (.I0(\stateOp[2]_i_35_n_0 ),
        .I1(\TCapt_reg[31]_0 [30]),
        .I2(\TCapt_reg[31]_0 [29]),
        .I3(\TCapt_reg[31]_0 [31]),
        .I4(\TCapt_reg[31]_0 [28]),
        .I5(\stateOp[2]_i_36_n_0 ),
        .O(\stateOp[2]_i_12_n_0 ));
  LUT5 #(
    .INIT(32'h00000001)) 
    \stateOp[2]_i_13 
       (.I0(staTixVTrigger[5]),
        .I1(staTixVTrigger[3]),
        .I2(staTixVTrigger[7]),
        .I3(staTixVTrigger[6]),
        .I4(staTixVTrigger[4]),
        .O(\stateOp[2]_i_13_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_15 
       (.I0(\TCapt_reg[31]_0 [31]),
        .I1(\TCaptMax_reg_n_0_[31] ),
        .I2(\TCapt_reg[31]_0 [30]),
        .I3(\TCaptMax_reg_n_0_[30] ),
        .O(\stateOp[2]_i_15_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_16 
       (.I0(\TCapt_reg[31]_0 [29]),
        .I1(\TCaptMax_reg_n_0_[29] ),
        .I2(\TCapt_reg[31]_0 [28]),
        .I3(\TCaptMax_reg_n_0_[28] ),
        .O(\stateOp[2]_i_16_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_17 
       (.I0(\TCapt_reg[31]_0 [27]),
        .I1(\TCaptMax_reg_n_0_[27] ),
        .I2(\TCapt_reg[31]_0 [26]),
        .I3(\TCaptMax_reg_n_0_[26] ),
        .O(\stateOp[2]_i_17_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_18 
       (.I0(\TCapt_reg[31]_0 [25]),
        .I1(\TCaptMax_reg_n_0_[25] ),
        .I2(\TCapt_reg[31]_0 [24]),
        .I3(\TCaptMax_reg_n_0_[24] ),
        .O(\stateOp[2]_i_18_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_19 
       (.I0(\TCapt_reg[31]_0 [23]),
        .I1(\TCaptMax_reg_n_0_[23] ),
        .I2(\TCapt_reg[31]_0 [22]),
        .I3(\TCaptMax_reg_n_0_[22] ),
        .O(\stateOp[2]_i_19_n_0 ));
  LUT6 #(
    .INIT(64'h00300030003030BC)) 
    \stateOp[2]_i_2 
       (.I0(restart_reg_n_0),
        .I1(stateOp[2]),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .I4(reqInvVidtrackSet),
        .I5(reqInvVidtrackSelect),
        .O(\stateOp[2]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_20 
       (.I0(\TCapt_reg[31]_0 [21]),
        .I1(\TCaptMax_reg_n_0_[21] ),
        .I2(\TCapt_reg[31]_0 [20]),
        .I3(\TCaptMax_reg_n_0_[20] ),
        .O(\stateOp[2]_i_20_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_21 
       (.I0(\TCapt_reg[31]_0 [19]),
        .I1(\TCaptMax_reg_n_0_[19] ),
        .I2(\TCapt_reg[31]_0 [18]),
        .I3(\TCaptMax_reg_n_0_[18] ),
        .O(\stateOp[2]_i_21_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_22 
       (.I0(\TCapt_reg[31]_0 [17]),
        .I1(\TCaptMax_reg_n_0_[17] ),
        .I2(\TCapt_reg[31]_0 [16]),
        .I3(\TCaptMax_reg_n_0_[16] ),
        .O(\stateOp[2]_i_22_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_23 
       (.I0(\TCaptMax_reg_n_0_[31] ),
        .I1(\TCapt_reg[31]_0 [31]),
        .I2(\TCaptMax_reg_n_0_[30] ),
        .I3(\TCapt_reg[31]_0 [30]),
        .O(\stateOp[2]_i_23_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_24 
       (.I0(\TCaptMax_reg_n_0_[29] ),
        .I1(\TCapt_reg[31]_0 [29]),
        .I2(\TCaptMax_reg_n_0_[28] ),
        .I3(\TCapt_reg[31]_0 [28]),
        .O(\stateOp[2]_i_24_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_25 
       (.I0(\TCaptMax_reg_n_0_[27] ),
        .I1(\TCapt_reg[31]_0 [27]),
        .I2(\TCaptMax_reg_n_0_[26] ),
        .I3(\TCapt_reg[31]_0 [26]),
        .O(\stateOp[2]_i_25_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_26 
       (.I0(\TCaptMax_reg_n_0_[25] ),
        .I1(\TCapt_reg[31]_0 [25]),
        .I2(\TCaptMax_reg_n_0_[24] ),
        .I3(\TCapt_reg[31]_0 [24]),
        .O(\stateOp[2]_i_26_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_27 
       (.I0(\TCaptMax_reg_n_0_[23] ),
        .I1(\TCapt_reg[31]_0 [23]),
        .I2(\TCaptMax_reg_n_0_[22] ),
        .I3(\TCapt_reg[31]_0 [22]),
        .O(\stateOp[2]_i_27_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_28 
       (.I0(\TCaptMax_reg_n_0_[21] ),
        .I1(\TCapt_reg[31]_0 [21]),
        .I2(\TCaptMax_reg_n_0_[20] ),
        .I3(\TCapt_reg[31]_0 [20]),
        .O(\stateOp[2]_i_28_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_29 
       (.I0(\TCaptMax_reg_n_0_[19] ),
        .I1(\TCapt_reg[31]_0 [19]),
        .I2(\TCaptMax_reg_n_0_[18] ),
        .I3(\TCapt_reg[31]_0 [18]),
        .O(\stateOp[2]_i_29_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3122" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \stateOp[2]_i_3 
       (.I0(stateOp[2]),
        .I1(stateOp[1]),
        .O(vidtrackGetInfoTixVState[1]));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_30 
       (.I0(\TCaptMax_reg_n_0_[17] ),
        .I1(\TCapt_reg[31]_0 [17]),
        .I2(\TCaptMax_reg_n_0_[16] ),
        .I3(\TCapt_reg[31]_0 [16]),
        .O(\stateOp[2]_i_30_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_31 
       (.I0(\TCaptMax_reg_n_0_[21] ),
        .I1(\TCaptMax_reg_n_0_[20] ),
        .I2(\TCaptMax_reg_n_0_[23] ),
        .I3(\TCaptMax_reg_n_0_[22] ),
        .O(\stateOp[2]_i_31_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[2]_i_32 
       (.I0(\TCaptMax_reg_n_0_[26] ),
        .I1(\TCaptMax_reg_n_0_[27] ),
        .I2(\TCaptMax_reg_n_0_[24] ),
        .I3(\TCaptMax_reg_n_0_[25] ),
        .I4(\stateOp[2]_i_53_n_0 ),
        .O(\stateOp[2]_i_32_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_33 
       (.I0(\TCaptMax_reg_n_0_[6] ),
        .I1(\TCaptMax_reg_n_0_[5] ),
        .I2(\TCaptMax_reg_n_0_[7] ),
        .I3(\TCaptMax_reg_n_0_[4] ),
        .O(\stateOp[2]_i_33_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \stateOp[2]_i_34 
       (.I0(\TCaptMax_reg_n_0_[8] ),
        .I1(\TCaptMax_reg_n_0_[9] ),
        .I2(\TCaptMax_reg_n_0_[10] ),
        .I3(\TCaptMax_reg_n_0_[11] ),
        .I4(\stateOp[2]_i_54_n_0 ),
        .O(\stateOp[2]_i_34_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateOp[2]_i_35 
       (.I0(\TCapt_reg[31]_0 [27]),
        .I1(\TCapt_reg[31]_0 [26]),
        .I2(\TCapt_reg[31]_0 [25]),
        .I3(\TCapt_reg[31]_0 [24]),
        .O(\stateOp[2]_i_35_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFBFFFFFFF)) 
    \stateOp[2]_i_36 
       (.I0(\stateOp[2]_i_55_n_0 ),
        .I1(\TCapt_reg[31]_0 [14]),
        .I2(\TCapt_reg[31]_0 [13]),
        .I3(\TCapt_reg[31]_0 [15]),
        .I4(\TCapt_reg[31]_0 [12]),
        .I5(\stateOp[2]_i_56_n_0 ),
        .O(\stateOp[2]_i_36_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_37 
       (.I0(\TCapt_reg[31]_0 [15]),
        .I1(\TCaptMax_reg_n_0_[15] ),
        .I2(\TCapt_reg[31]_0 [14]),
        .I3(\TCaptMax_reg_n_0_[14] ),
        .O(\stateOp[2]_i_37_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_38 
       (.I0(\TCapt_reg[31]_0 [13]),
        .I1(\TCaptMax_reg_n_0_[13] ),
        .I2(\TCapt_reg[31]_0 [12]),
        .I3(\TCaptMax_reg_n_0_[12] ),
        .O(\stateOp[2]_i_38_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_39 
       (.I0(\TCapt_reg[31]_0 [11]),
        .I1(\TCaptMax_reg_n_0_[11] ),
        .I2(\TCapt_reg[31]_0 [10]),
        .I3(\TCaptMax_reg_n_0_[10] ),
        .O(\stateOp[2]_i_39_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_40 
       (.I0(\TCapt_reg[31]_0 [9]),
        .I1(\TCaptMax_reg_n_0_[9] ),
        .I2(\TCapt_reg[31]_0 [8]),
        .I3(\TCaptMax_reg_n_0_[8] ),
        .O(\stateOp[2]_i_40_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_41 
       (.I0(\TCapt_reg[31]_0 [7]),
        .I1(\TCaptMax_reg_n_0_[7] ),
        .I2(\TCapt_reg[31]_0 [6]),
        .I3(\TCaptMax_reg_n_0_[6] ),
        .O(\stateOp[2]_i_41_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_42 
       (.I0(\TCapt_reg[31]_0 [5]),
        .I1(\TCaptMax_reg_n_0_[5] ),
        .I2(\TCapt_reg[31]_0 [4]),
        .I3(\TCaptMax_reg_n_0_[4] ),
        .O(\stateOp[2]_i_42_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_43 
       (.I0(\TCapt_reg[31]_0 [3]),
        .I1(\TCaptMax_reg_n_0_[3] ),
        .I2(\TCapt_reg[31]_0 [2]),
        .I3(\TCaptMax_reg_n_0_[2] ),
        .O(\stateOp[2]_i_43_n_0 ));
  LUT4 #(
    .INIT(16'h22B2)) 
    \stateOp[2]_i_44 
       (.I0(\TCapt_reg[31]_0 [1]),
        .I1(\TCaptMax_reg_n_0_[1] ),
        .I2(\TCapt_reg[31]_0 [0]),
        .I3(\TCaptMax_reg_n_0_[0] ),
        .O(\stateOp[2]_i_44_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_45 
       (.I0(\TCaptMax_reg_n_0_[15] ),
        .I1(\TCapt_reg[31]_0 [15]),
        .I2(\TCaptMax_reg_n_0_[14] ),
        .I3(\TCapt_reg[31]_0 [14]),
        .O(\stateOp[2]_i_45_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_46 
       (.I0(\TCaptMax_reg_n_0_[13] ),
        .I1(\TCapt_reg[31]_0 [13]),
        .I2(\TCaptMax_reg_n_0_[12] ),
        .I3(\TCapt_reg[31]_0 [12]),
        .O(\stateOp[2]_i_46_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_47 
       (.I0(\TCaptMax_reg_n_0_[11] ),
        .I1(\TCapt_reg[31]_0 [11]),
        .I2(\TCaptMax_reg_n_0_[10] ),
        .I3(\TCapt_reg[31]_0 [10]),
        .O(\stateOp[2]_i_47_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_48 
       (.I0(\TCaptMax_reg_n_0_[9] ),
        .I1(\TCapt_reg[31]_0 [9]),
        .I2(\TCaptMax_reg_n_0_[8] ),
        .I3(\TCapt_reg[31]_0 [8]),
        .O(\stateOp[2]_i_48_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_49 
       (.I0(\TCaptMax_reg_n_0_[7] ),
        .I1(\TCapt_reg[31]_0 [7]),
        .I2(\TCaptMax_reg_n_0_[6] ),
        .I3(\TCapt_reg[31]_0 [6]),
        .O(\stateOp[2]_i_49_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \stateOp[2]_i_4__0 
       (.I0(stateOp[0]),
        .I1(\stateOp[2]_i_6_n_0 ),
        .O(\stateOp[2]_i_4__0_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF0F020000)) 
    \stateOp[2]_i_5 
       (.I0(stateOp[0]),
        .I1(restart_i_2_n_0),
        .I2(stateOp[2]),
        .I3(stateOp[1]),
        .I4(\stateOp[2]_i_7__0_n_0 ),
        .I5(\stateOp[2]_i_8_n_0 ),
        .O(\stateOp[2]_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_50 
       (.I0(\TCaptMax_reg_n_0_[5] ),
        .I1(\TCapt_reg[31]_0 [5]),
        .I2(\TCaptMax_reg_n_0_[4] ),
        .I3(\TCapt_reg[31]_0 [4]),
        .O(\stateOp[2]_i_50_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_51 
       (.I0(\TCaptMax_reg_n_0_[3] ),
        .I1(\TCapt_reg[31]_0 [3]),
        .I2(\TCaptMax_reg_n_0_[2] ),
        .I3(\TCapt_reg[31]_0 [2]),
        .O(\stateOp[2]_i_51_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \stateOp[2]_i_52 
       (.I0(\TCaptMax_reg_n_0_[1] ),
        .I1(\TCapt_reg[31]_0 [1]),
        .I2(\TCaptMax_reg_n_0_[0] ),
        .I3(\TCapt_reg[31]_0 [0]),
        .O(\stateOp[2]_i_52_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_53 
       (.I0(\TCaptMax_reg_n_0_[30] ),
        .I1(\TCaptMax_reg_n_0_[29] ),
        .I2(\TCaptMax_reg_n_0_[31] ),
        .I3(\TCaptMax_reg_n_0_[28] ),
        .O(\stateOp[2]_i_53_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \stateOp[2]_i_54 
       (.I0(\TCaptMax_reg_n_0_[13] ),
        .I1(\TCaptMax_reg_n_0_[12] ),
        .I2(\TCaptMax_reg_n_0_[15] ),
        .I3(\TCaptMax_reg_n_0_[14] ),
        .O(\stateOp[2]_i_54_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateOp[2]_i_55 
       (.I0(\TCapt_reg[31]_0 [11]),
        .I1(\TCapt_reg[31]_0 [10]),
        .I2(\TCapt_reg[31]_0 [9]),
        .I3(\TCapt_reg[31]_0 [8]),
        .O(\stateOp[2]_i_55_n_0 ));
  LUT5 #(
    .INIT(32'hFFFF7FFF)) 
    \stateOp[2]_i_56 
       (.I0(\TCapt_reg[31]_0 [20]),
        .I1(\TCapt_reg[31]_0 [21]),
        .I2(\TCapt_reg[31]_0 [22]),
        .I3(\TCapt_reg[31]_0 [23]),
        .I4(\stateOp[2]_i_57_n_0 ),
        .O(\stateOp[2]_i_56_n_0 ));
  LUT4 #(
    .INIT(16'h7FFF)) 
    \stateOp[2]_i_57 
       (.I0(\TCapt_reg[31]_0 [18]),
        .I1(\TCapt_reg[31]_0 [17]),
        .I2(\TCapt_reg[31]_0 [19]),
        .I3(\TCapt_reg[31]_0 [16]),
        .O(\stateOp[2]_i_57_n_0 ));
  LUT6 #(
    .INIT(64'h00000000ABABFFAB)) 
    \stateOp[2]_i_6 
       (.I0(\FSM_onehot_stateSeq[3]_i_3_n_0 ),
        .I1(\stateOp_reg[2]_i_9_n_0 ),
        .I2(Q),
        .I3(\stateOp[2]_i_10_n_0 ),
        .I4(\stateOp[2]_i_11_n_0 ),
        .I5(\stateOp[2]_i_12_n_0 ),
        .O(\stateOp[2]_i_6_n_0 ));
  LUT5 #(
    .INIT(32'hAAABAAAA)) 
    \stateOp[2]_i_7__0 
       (.I0(stateOp[0]),
        .I1(staTixVTrigger[2]),
        .I2(staTixVTrigger[1]),
        .I3(staTixVTrigger[0]),
        .I4(\stateOp[2]_i_13_n_0 ),
        .O(\stateOp[2]_i_7__0_n_0 ));
  LUT6 #(
    .INIT(64'hEFEEEE0FEEEEEE0F)) 
    \stateOp[2]_i_8 
       (.I0(reqInvVidtrackSet),
        .I1(reqInvVidtrackSelect),
        .I2(stateOp[0]),
        .I3(stateOp[2]),
        .I4(stateOp[1]),
        .I5(rdySeq),
        .O(\stateOp[2]_i_8_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[0] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\stateOp[0]_i_1__0_n_0 ),
        .Q(stateOp[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[1] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\stateOp[1]_i_1__0_n_0 ),
        .Q(stateOp[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateOp_reg[2] 
       (.C(aclk_sig),
        .CE(\stateOp[2]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(\stateOp[2]_i_2_n_0 ),
        .Q(stateOp[2]));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \stateOp_reg[2]_i_14 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\stateOp_reg[2]_i_14_n_0 ,\stateOp_reg[2]_i_14_n_1 ,\stateOp_reg[2]_i_14_n_2 ,\stateOp_reg[2]_i_14_n_3 ,\stateOp_reg[2]_i_14_n_4 ,\stateOp_reg[2]_i_14_n_5 ,\stateOp_reg[2]_i_14_n_6 ,\stateOp_reg[2]_i_14_n_7 }),
        .DI({\stateOp[2]_i_37_n_0 ,\stateOp[2]_i_38_n_0 ,\stateOp[2]_i_39_n_0 ,\stateOp[2]_i_40_n_0 ,\stateOp[2]_i_41_n_0 ,\stateOp[2]_i_42_n_0 ,\stateOp[2]_i_43_n_0 ,\stateOp[2]_i_44_n_0 }),
        .O(\NLW_stateOp_reg[2]_i_14_O_UNCONNECTED [7:0]),
        .S({\stateOp[2]_i_45_n_0 ,\stateOp[2]_i_46_n_0 ,\stateOp[2]_i_47_n_0 ,\stateOp[2]_i_48_n_0 ,\stateOp[2]_i_49_n_0 ,\stateOp[2]_i_50_n_0 ,\stateOp[2]_i_51_n_0 ,\stateOp[2]_i_52_n_0 }));
  (* COMPARATOR_THRESHOLD = "11" *) 
  CARRY8 \stateOp_reg[2]_i_9 
       (.CI(\stateOp_reg[2]_i_14_n_0 ),
        .CI_TOP(1'b0),
        .CO({\stateOp_reg[2]_i_9_n_0 ,\stateOp_reg[2]_i_9_n_1 ,\stateOp_reg[2]_i_9_n_2 ,\stateOp_reg[2]_i_9_n_3 ,\stateOp_reg[2]_i_9_n_4 ,\stateOp_reg[2]_i_9_n_5 ,\stateOp_reg[2]_i_9_n_6 ,\stateOp_reg[2]_i_9_n_7 }),
        .DI({\stateOp[2]_i_15_n_0 ,\stateOp[2]_i_16_n_0 ,\stateOp[2]_i_17_n_0 ,\stateOp[2]_i_18_n_0 ,\stateOp[2]_i_19_n_0 ,\stateOp[2]_i_20_n_0 ,\stateOp[2]_i_21_n_0 ,\stateOp[2]_i_22_n_0 }),
        .O(\NLW_stateOp_reg[2]_i_9_O_UNCONNECTED [7:0]),
        .S({\stateOp[2]_i_23_n_0 ,\stateOp[2]_i_24_n_0 ,\stateOp[2]_i_25_n_0 ,\stateOp[2]_i_26_n_0 ,\stateOp[2]_i_27_n_0 ,\stateOp[2]_i_28_n_0 ,\stateOp[2]_i_29_n_0 ,\stateOp[2]_i_30_n_0 }));
  (* SOFT_HLUTNM = "soft_lutpair3117" *) 
  LUT4 #(
    .INIT(16'h0705)) 
    \stateSeqbufB[0]_i_1 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(dneSeqbufVidtrackToHostif),
        .O(p_0_in__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair3118" *) 
  LUT4 #(
    .INIT(16'h00BC)) 
    \stateSeqbufB[1]_i_1 
       (.I0(\stateSeqbufB[1]_i_2_n_0 ),
        .I1(stateSeqbufB_reg[1]),
        .I2(stateSeqbufB_reg[0]),
        .I3(stateSeqbufB_reg[2]),
        .O(p_0_in__0[1]));
  LUT5 #(
    .INIT(32'h2AAAAAAA)) 
    \stateSeqbufB[1]_i_2 
       (.I0(seqbufVidtrackToHostifAXIS_tready),
        .I1(\aSeqbufB_reg_n_0_[7] ),
        .I2(\aSeqbufB_reg_n_0_[6] ),
        .I3(\aSeqbufB[8]_i_4_n_0 ),
        .I4(\aSeqbufB_reg_n_0_[8] ),
        .O(\stateSeqbufB[1]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hBBBBBABBABBBBABB)) 
    \stateSeqbufB[2]_i_1 
       (.I0(\stateSeqbufB[2]_i_3_n_0 ),
        .I1(stateSeqbufB_reg[2]),
        .I2(reqSeqbufVidtrackToHostif),
        .I3(stateSeqbufB_reg[0]),
        .I4(stateSeqbufB_reg[1]),
        .I5(seqbufVidtrackToHostifAXIS_tready),
        .O(\stateSeqbufB[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h000AC000000A0000)) 
    \stateSeqbufB[2]_i_2 
       (.I0(dneSeqbufVidtrackToHostif),
        .I1(\stateSeqbufB[2]_i_7_n_0 ),
        .I2(stateSeqbufB_reg[1]),
        .I3(stateSeqbufB_reg[0]),
        .I4(stateSeqbufB_reg[2]),
        .I5(seqbufVidtrackToHostifAXIS_tready),
        .O(p_0_in__0[2]));
  LUT6 #(
    .INIT(64'h0000000000C088CC)) 
    \stateSeqbufB[2]_i_3 
       (.I0(dneSeqbufVidtrackToHostif),
        .I1(stateSeqbufB_reg[2]),
        .I2(ackSeqbufBToSeqClear),
        .I3(reqSeqbufVidtrackToHostif),
        .I4(stateSeqbufB_reg[0]),
        .I5(stateSeqbufB_reg[1]),
        .O(\stateSeqbufB[2]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3074" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \stateSeqbufB[2]_i_7 
       (.I0(\aSeqbufB_reg_n_0_[8] ),
        .I1(\aSeqbufB[8]_i_4_n_0 ),
        .I2(\aSeqbufB_reg_n_0_[6] ),
        .I3(\aSeqbufB_reg_n_0_[7] ),
        .O(\stateSeqbufB[2]_i_7_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[0] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(p_0_in__0[0]),
        .Q(stateSeqbufB_reg[0]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[1] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(p_0_in__0[1]),
        .Q(stateSeqbufB_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \stateSeqbufB_reg[2] 
       (.C(aclk_sig),
        .CE(\stateSeqbufB[2]_i_1_n_0 ),
        .CLR(first_reg_0),
        .D(p_0_in__0[2]),
        .Q(stateSeqbufB_reg[2]));
  LUT6 #(
    .INIT(64'hFFFFFFFFFBCBF9C9)) 
    \state[0]_i_1 
       (.I0(\tixVCapture_reg[1]_0 [0]),
        .I1(\tixVCapture_reg_n_0_[2] ),
        .I2(\tixVCapture_reg[1]_0 [1]),
        .I3(\state_reg[0]_0 ),
        .I4(videoinStateIgr_dbg[0]),
        .I5(\state[7]_i_4_n_0 ),
        .O(\state[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \state[4]_i_1 
       (.I0(\state[4]_i_2_n_0 ),
        .I1(\tixVCapture_reg_n_0_[5] ),
        .I2(\tixVCapture_reg_n_0_[6] ),
        .I3(\tixVCapture_reg_n_0_[3] ),
        .I4(\tixVCapture_reg_n_0_[4] ),
        .I5(\tixVCapture_reg_n_0_[7] ),
        .O(\state[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFCAFFCFFFCAF0CF)) 
    \state[4]_i_2 
       (.I0(videoinStateIgr_dbg[1]),
        .I1(\state_reg[4]_0 ),
        .I2(\tixVCapture_reg[1]_0 [1]),
        .I3(\tixVCapture_reg_n_0_[2] ),
        .I4(\tixVCapture_reg[1]_0 [0]),
        .I5(\state_reg[5]_0 [0]),
        .O(\state[4]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEFF0E0)) 
    \state[5]_i_1 
       (.I0(\state_reg[5]_0 [1]),
        .I1(\tixVCapture_reg[1]_0 [0]),
        .I2(\tixVCapture_reg_n_0_[2] ),
        .I3(\tixVCapture_reg[1]_0 [1]),
        .I4(\state_reg[5]_1 ),
        .I5(\state[7]_i_4_n_0 ),
        .O(\state[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFF9D9E9C9)) 
    \state[6]_i_1 
       (.I0(\tixVCapture_reg[1]_0 [0]),
        .I1(\tixVCapture_reg_n_0_[2] ),
        .I2(\tixVCapture_reg[1]_0 [1]),
        .I3(\state_reg[7]_0 ),
        .I4(videoinStateRgbegr_dbg[0]),
        .I5(\state[7]_i_4_n_0 ),
        .O(\state[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFF9D9E9C9)) 
    \state[7]_i_1 
       (.I0(\tixVCapture_reg[1]_0 [0]),
        .I1(\tixVCapture_reg_n_0_[2] ),
        .I2(\tixVCapture_reg[1]_0 [1]),
        .I3(\state_reg[7]_0 ),
        .I4(videoinStateRgbegr_dbg[1]),
        .I5(\state[7]_i_4_n_0 ),
        .O(\state[7]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \state[7]_i_4 
       (.I0(\tixVCapture_reg_n_0_[7] ),
        .I1(\tixVCapture_reg_n_0_[4] ),
        .I2(\tixVCapture_reg_n_0_[3] ),
        .I3(\tixVCapture_reg_n_0_[6] ),
        .I4(\tixVCapture_reg_n_0_[5] ),
        .O(\state[7]_i_4_n_0 ));
  FDPE \state_reg[0] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[0]_i_1_n_0 ),
        .PRE(first_reg_0),
        .Q(state[0]));
  FDPE \state_reg[4] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[4]_i_1_n_0 ),
        .PRE(first_reg_0),
        .Q(state[4]));
  FDPE \state_reg[5] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[5]_i_1_n_0 ),
        .PRE(first_reg_0),
        .Q(state[5]));
  FDPE \state_reg[6] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[6]_i_1_n_0 ),
        .PRE(first_reg_0),
        .Q(state[6]));
  FDPE \state_reg[7] 
       (.C(aclk_sig),
        .CE(1'b1),
        .D(\state[7]_i_1_n_0 ),
        .PRE(first_reg_0),
        .Q(state[7]));
  FDCE \stoTixVTrigger_reg[0] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[0]),
        .Q(stoTixVTrigger[0]));
  FDCE \stoTixVTrigger_reg[1] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[1]),
        .Q(stoTixVTrigger[1]));
  FDCE \stoTixVTrigger_reg[2] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[2]),
        .Q(stoTixVTrigger[2]));
  FDCE \stoTixVTrigger_reg[3] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[3]),
        .Q(stoTixVTrigger[3]));
  FDCE \stoTixVTrigger_reg[4] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[4]),
        .Q(stoTixVTrigger[4]));
  FDCE \stoTixVTrigger_reg[5] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[5]),
        .Q(stoTixVTrigger[5]));
  FDCE \stoTixVTrigger_reg[6] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[6]),
        .Q(stoTixVTrigger[6]));
  FDCE \stoTixVTrigger_reg[7] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(D[7]),
        .Q(stoTixVTrigger[7]));
  LUT5 #(
    .INIT(32'hAAAAAAAB)) 
    stop_lcl_i_1
       (.I0(TCapt),
        .I1(\FSM_onehot_stateSeq_reg_n_0_[4] ),
        .I2(Q),
        .I3(rdySeq),
        .I4(ackSeqbufBToSeqClear),
        .O(stop_lcl_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3112" *) 
  LUT2 #(
    .INIT(4'h1)) 
    stop_lcl_i_2
       (.I0(first),
        .I1(\FSM_onehot_stateSeq[3]_i_2_n_0 ),
        .O(stop_lcl_i_2_n_0));
  FDCE stop_lcl_reg
       (.C(aclk_sig),
        .CE(stop_lcl_i_1_n_0),
        .CLR(first_reg_0),
        .D(stop_lcl_i_2_n_0),
        .Q(stop_lcl_reg_n_0));
  LUT6 #(
    .INIT(64'hEFEEEFEFE0EEE0E0)) 
    strbStop_i_1
       (.I0(strbStop_i_2_n_0),
        .I1(strbStop_i_3_n_0),
        .I2(strbStop_i_4_n_0),
        .I3(strbStop_i_5_n_0),
        .I4(\stateOp[2]_i_4__0_n_0 ),
        .I5(strbStop_reg_n_0),
        .O(strbStop_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3077" *) 
  LUT5 #(
    .INIT(32'h08AA0808)) 
    strbStop_i_2
       (.I0(ackInvSelect_sig_i_2_n_0),
        .I1(ackInvVidtrackSet),
        .I2(reqInvVidtrackSet),
        .I3(reqInvVidtrackSelect),
        .I4(ackInvVidtrackSelect),
        .O(strbStop_i_2_n_0));
  LUT6 #(
    .INIT(64'h0000000000010000)) 
    strbStop_i_3
       (.I0(reqInvVidtrackSelect),
        .I1(reqInvVidtrackSet),
        .I2(stateOp[1]),
        .I3(stateOp[0]),
        .I4(stateOp[2]),
        .I5(\stateOp[2]_i_6_n_0 ),
        .O(strbStop_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3078" *) 
  LUT5 #(
    .INIT(32'hEEEEE0EF)) 
    strbStop_i_4
       (.I0(reqInvVidtrackSelect),
        .I1(reqInvVidtrackSet),
        .I2(stateOp[1]),
        .I3(stateOp[0]),
        .I4(stateOp[2]),
        .O(strbStop_i_4_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3114" *) 
  LUT4 #(
    .INIT(16'hFF45)) 
    strbStop_i_5
       (.I0(stateOp[2]),
        .I1(restart_i_2_n_0),
        .I2(stateOp[0]),
        .I3(stateOp[1]),
        .O(strbStop_i_5_n_0));
  FDCE strbStop_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(first_reg_0),
        .D(strbStop_i_1_n_0),
        .Q(strbStop_reg_n_0));
  FDPE \tixVCapture_reg[0] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .D(\tixVCapture_reg[7]_0 [0]),
        .PRE(first_reg_0),
        .Q(\tixVCapture_reg[1]_0 [0]));
  FDCE \tixVCapture_reg[1] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(\tixVCapture_reg[7]_0 [1]),
        .Q(\tixVCapture_reg[1]_0 [1]));
  FDCE \tixVCapture_reg[2] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(\tixVCapture_reg[7]_0 [2]),
        .Q(\tixVCapture_reg_n_0_[2] ));
  FDCE \tixVCapture_reg[3] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(\tixVCapture_reg[7]_0 [3]),
        .Q(\tixVCapture_reg_n_0_[3] ));
  FDCE \tixVCapture_reg[4] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(\tixVCapture_reg[7]_0 [4]),
        .Q(\tixVCapture_reg_n_0_[4] ));
  FDCE \tixVCapture_reg[5] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(\tixVCapture_reg[7]_0 [5]),
        .Q(\tixVCapture_reg_n_0_[5] ));
  FDCE \tixVCapture_reg[6] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(\tixVCapture_reg[7]_0 [6]),
        .Q(\tixVCapture_reg_n_0_[6] ));
  FDCE \tixVCapture_reg[7] 
       (.C(aclk_sig),
        .CE(staFallingNotRising),
        .CLR(first_reg_0),
        .D(\tixVCapture_reg[7]_0 [7]),
        .Q(\tixVCapture_reg_n_0_[7] ));
  (* SOFT_HLUTNM = "soft_lutpair3113" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \txAXIS_tdata[15]_i_18 
       (.I0(stateSeqbufB_reg[2]),
        .I1(stateSeqbufB_reg[0]),
        .I2(stateSeqbufB_reg[1]),
        .O(seqbufVidtrackToHostifAXIS_tvalid));
  (* SOFT_HLUTNM = "soft_lutpair3118" *) 
  LUT3 #(
    .INIT(8'h34)) 
    \wordcntLast[28]_i_13 
       (.I0(stateSeqbufB_reg[0]),
        .I1(stateSeqbufB_reg[2]),
        .I2(stateSeqbufB_reg[1]),
        .O(ackSeqbufVidtrackToHostif));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Vsp_core
   (rgb0_r,
    rgb0_g,
    rgb0_b,
    vsync,
    rgbToManyAXIS_tlast_sig_reg,
    ddrAXI_bready,
    ddrAXI_wlast,
    ddrAXI_wvalid,
    nslp,
    dir,
    step,
    apuAXIL_rdata,
    rpuAXIL_rdata,
    m0z,
    m0,
    camifSetCoreregVal,
    S,
    ddrAXI_rready,
    ddrAXI_araddr,
    probe,
    ddrAXI_arvalid,
    ddrAXI_awvalid,
    ddrAXI_awaddr,
    ddrAXI_wdata,
    rpuAXIL_wready,
    rpuAXIL_awready,
    rpuAXIL_arready,
    rpuAXIL_bvalid,
    rpuAXIL_rvalid,
    cs,
    sclk,
    mosi,
    apuAXIL_wready,
    apuAXIL_awready,
    apuAXIL_arready,
    apuAXIL_bvalid,
    apuAXIL_rvalid,
    scl,
    sda,
    aclk,
    memclk,
    ddrAXI_rvalid,
    ddrAXI_rlast,
    ddrAXI_bvalid,
    ddrAXI_wready,
    aresetn,
    D,
    CO,
    csi_clk_n,
    csi_clk_p,
    mipi_phy_if_data_n,
    mipi_phy_if_data_p,
    ddrAXI_arready,
    ddrAXI_awready,
    ddrAXI_rdata,
    rpuAXIL_wvalid,
    rpuAXIL_awvalid,
    rpuAXIL_wdata,
    rpuAXIL_awaddr,
    rpuAXIL_araddr,
    rpuAXIL_bready,
    rpuAXIL_wstrb,
    rpuAXIL_arvalid,
    rpuAXIL_rready,
    apuAXIL_wvalid,
    apuAXIL_awvalid,
    apuAXIL_wdata,
    apuAXIL_awaddr,
    apuAXIL_araddr,
    apuAXIL_bready,
    apuAXIL_wstrb,
    apuAXIL_arvalid,
    apuAXIL_rready);
  output rgb0_r;
  output rgb0_g;
  output rgb0_b;
  output vsync;
  output rgbToManyAXIS_tlast_sig_reg;
  output ddrAXI_bready;
  output ddrAXI_wlast;
  output ddrAXI_wvalid;
  output nslp;
  output dir;
  output step;
  output [63:0]apuAXIL_rdata;
  output [31:0]rpuAXIL_rdata;
  output m0z;
  output m0;
  output [8:0]camifSetCoreregVal;
  output [7:0]S;
  output ddrAXI_rready;
  output [20:0]ddrAXI_araddr;
  output [2:0]probe;
  output ddrAXI_arvalid;
  output ddrAXI_awvalid;
  output [20:0]ddrAXI_awaddr;
  output [127:0]ddrAXI_wdata;
  output rpuAXIL_wready;
  output rpuAXIL_awready;
  output rpuAXIL_arready;
  output rpuAXIL_bvalid;
  output rpuAXIL_rvalid;
  output cs;
  output sclk;
  output mosi;
  output apuAXIL_wready;
  output apuAXIL_awready;
  output apuAXIL_arready;
  output apuAXIL_bvalid;
  output apuAXIL_rvalid;
  inout scl;
  inout sda;
  input aclk;
  input memclk;
  input ddrAXI_rvalid;
  input ddrAXI_rlast;
  input ddrAXI_bvalid;
  input ddrAXI_wready;
  input aresetn;
  input [7:0]D;
  input [0:0]CO;
  input csi_clk_n;
  input csi_clk_p;
  input [3:0]mipi_phy_if_data_n;
  input [3:0]mipi_phy_if_data_p;
  input ddrAXI_arready;
  input ddrAXI_awready;
  input [127:0]ddrAXI_rdata;
  input rpuAXIL_wvalid;
  input rpuAXIL_awvalid;
  input [31:0]rpuAXIL_wdata;
  input [1:0]rpuAXIL_awaddr;
  input [1:0]rpuAXIL_araddr;
  input rpuAXIL_bready;
  input [3:0]rpuAXIL_wstrb;
  input rpuAXIL_arvalid;
  input rpuAXIL_rready;
  input apuAXIL_wvalid;
  input apuAXIL_awvalid;
  input [63:0]apuAXIL_wdata;
  input [1:0]apuAXIL_awaddr;
  input [1:0]apuAXIL_araddr;
  input apuAXIL_bready;
  input [7:0]apuAXIL_wstrb;
  input apuAXIL_arvalid;
  input apuAXIL_rready;

  wire [0:0]CO;
  wire [7:0]D;
  wire [11:1]NColRaw;
  wire [11:0]NRowRaw;
  wire [7:0]S;
  wire TCaptMax;
  wire TCaptMax_3;
  wire ackCoobufCornerToHostif;
  wire ackFlgbufTraceToHostif;
  wire ackInvAcquire_sig3_out;
  wire ackInvAssign_sig;
  wire ackInvCamifConfig;
  wire ackInvCamifConfigSynth;
  wire ackInvCamifGetCorereg;
  wire ackInvCamifGetReg;
  wire ackInvCamifModReg;
  wire ackInvCamifSetCorereg;
  wire ackInvCamifSetReg;
  wire ackInvConfigSynth_sig;
  wire ackInvConfig_sig;
  wire ackInvConfig_sig0__6;
  wire ackInvCornerAcquire;
  wire ackInvCornerConfig;
  wire ackInvCornerSet;
  wire ackInvCornerUnlock;
  wire ackInvCputrackSelect;
  wire ackInvCputrackSet;
  wire ackInvDecimAcquire;
  wire ackInvDecimConfig;
  wire ackInvDecimSet;
  wire ackInvDecimUnlock;
  wire ackInvDirectorConfig;
  wire ackInvDirectorSet;
  wire ackInvHdrengAssign;
  wire ackInvHdrengSet;
  wire ackInvHshktrackClearMask;
  wire ackInvHshktrackSelect;
  wire ackInvHshktrackSet;
  wire ackInvHshktrackSetMask;
  wire ackInvLaserSet;
  wire ackInvMemtrackClearMask;
  wire ackInvMemtrackSelect;
  wire ackInvMemtrackSet;
  wire ackInvMemtrackSetMask;
  wire ackInvMoveto_sig;
  wire ackInvRotaryConfig;
  wire ackInvRotaryMoveto;
  wire ackInvRotarySet;
  wire ackInvRotaryZero;
  wire ackInvSet_sig;
  wire ackInvSet_sig_1;
  wire ackInvSet_sig_4;
  wire ackInvStepmuxSet;
  wire ackInvTkclksrcSetTkst;
  wire ackInvTraceAcquire;
  wire ackInvTraceConfig;
  wire ackInvUnlock_sig;
  wire ackInvUnlock_sig0_in;
  wire ackInvVidtrackSelect;
  wire ackInvVidtrackSet;
  wire ackPvwbufDecimToHostif;
  wire ackRd;
  wire ackSeqbufCputrackToHostif;
  wire ackSeqbufHshktrackToHostif;
  wire ackSeqbufMemtrackToHostif;
  wire ackSeqbufVidtrackToHostif;
  wire ackWr;
  wire aclk;
  wire aclk_sig;
  wire [1:0]apuAXIL_araddr;
  wire apuAXIL_arready;
  wire apuAXIL_arvalid;
  wire [1:0]apuAXIL_awaddr;
  wire apuAXIL_awready;
  wire apuAXIL_awvalid;
  wire apuAXIL_bready;
  wire apuAXIL_bvalid;
  wire [63:0]apuAXIL_rdata;
  wire apuAXIL_rready;
  wire apuAXIL_rvalid;
  wire [63:0]apuAXIL_wdata;
  wire apuAXIL_wready;
  wire [7:0]apuAXIL_wstrb;
  wire apuAXIL_wvalid;
  wire aresetn;
  wire [11:11]avllenCoobufCornerToHostif;
  wire [15:15]avllenFlgbufTraceToHostif;
  wire [15:15]avllenPvwbufDecimToHostif;
  wire [12:12]avllenSeqbufCputrackToHostif;
  wire [12:12]avllenSeqbufHshktrackToHostif;
  wire [12:12]avllenSeqbufMemtrackToHostif;
  wire [12:12]avllenSeqbufVidtrackToHostif;
  wire [31:0]camifGetCoreregVal;
  wire [7:2]camifGetRegVal;
  wire [8:0]camifSetCoreregVal;
  wire [23:0]camifToVideoinAXIS_tdata;
  wire camifToVideoinAXIS_tlast;
  wire camifToVideoinAXIS_tvalid;
  wire ccwNotCw0;
  wire [14:8]ccwNotCw2;
  wire ccwNotCw5_in;
  wire [10:3]col;
  wire commok;
  wire [10:0]configCol0;
  wire [10:0]configCol1;
  wire [7:0]configHdrNotFix;
  wire [7:0]configSynthNotLive;
  wire [7:1]configSynthTFramepad;
  wire [7:0]configSynthTLinepad;
  wire [63:0]coobufCornerToHostifAXIS_tdata;
  wire coobufCornerToHostifAXIS_tready;
  wire coobufCornerToHostifAXIS_tvalid;
  wire [12:2]corecfgAXIL_araddr0_out;
  wire [12:2]corecfgAXIL_awaddr0_out;
  wire [7:0]cornerGetInfoScoreMax;
  wire [7:0]cornerGetInfoScoreMin;
  wire [1:0]cornerGetInfoTixVState;
  wire [31:0]cornerGetInfoTkst;
  wire [9:0]cputrackGetInfoPtr0Seqbuf;
  wire [31:0]cputrackGetInfoTCapt;
  wire [1:0]cputrackGetInfoTixVState;
  wire cs;
  wire csi_clk_n;
  wire csi_clk_p;
  wire [20:0]ddrAXI_araddr;
  wire ddrAXI_arready;
  wire ddrAXI_arvalid;
  wire [20:0]ddrAXI_awaddr;
  wire ddrAXI_awready;
  wire ddrAXI_awvalid;
  wire ddrAXI_bready;
  wire ddrAXI_bvalid;
  wire [127:0]ddrAXI_rdata;
  wire ddrAXI_rlast;
  wire ddrAXI_rready;
  wire ddrAXI_rvalid;
  wire [127:0]ddrAXI_wdata;
  wire ddrAXI_wlast;
  wire ddrAXI_wready;
  wire ddrAXI_wvalid;
  wire [31:4]ddrifGetStatsNRdA;
  wire [31:4]ddrifGetStatsNRdB;
  wire [31:4]ddrifGetStatsNWrA;
  wire [31:4]ddrifGetStatsNWrB;
  wire [1:0]decimGetInfoTixVState;
  wire [31:0]decimGetInfoTkst;
  wire [5:4]decimStateStore_dbg;
  wire [3:3]decimStateStream_dbg;
  wire dir;
  wire dneCoobufCornerToHostif;
  wire dneFlgbufTraceToHostif;
  wire dnePvwbufDecimToHostif;
  wire dneSeqbufCputrackToHostif;
  wire dneSeqbufHshktrackToHostif;
  wire dneSeqbufMemtrackToHostif;
  wire dneSeqbufVidtrackToHostif;
  wire [7:0]drdParrom;
  wire [7:0]dwrAccbuf;
  wire egrAXIS_tlast;
  wire enAccbuf0;
  wire enAccbuf1;
  wire [63:0]flgbufTraceToHostifAXIS_tdata;
  wire flgbufTraceToHostifAXIS_tready;
  wire flgbufTraceToHostifAXIS_tvalid;
  wire [59:4]grayVideoinToManyAXIS_tdata;
  wire grayVideoinToManyAXIS_tlast;
  wire grayVideoinToManyAXIS_tvalid;
  wire hdrNotFix;
  wire [7:0]hdrengGetInfoIxMem;
  wire [7:0]hdrengGetInfoIxMemAcq;
  wire [7:0]hdrengGetInfoTixVState;
  wire [31:0]hdrengGetInfoTkst;
  wire hdrmemAXI_rlast;
  wire [7:0]hostifStateOp_dbg;
  wire [9:0]hshktrackGetInfoPtr0Seqbuf;
  wire [31:0]hshktrackGetInfoTCapt;
  wire [1:0]hshktrackGetInfoTixVState;
  wire i;
  wire \i[4]_i_1__2_n_0 ;
  wire \i[4]_i_3__0_n_0 ;
  wire [3:0]i_reg;
  wire [0:0]i_reg_8;
  wire \i_reg_n_0_[0] ;
  wire \i_reg_n_0_[1] ;
  wire \i_reg_n_0_[2] ;
  wire \i_reg_n_0_[3] ;
  wire \i_reg_n_0_[4] ;
  wire [2:2]ixTExp;
  wire ixTExp_lcl;
  wire [0:0]klm;
  wire m0;
  wire m0z;
  wire memclk;
  wire [9:0]memtrackGetInfoPtr0Seqbuf;
  wire [31:0]memtrackGetInfoTCapt;
  wire [1:0]memtrackGetInfoTixVState;
  wire [3:0]mipi_phy_if_data_n;
  wire [3:0]mipi_phy_if_data_p;
  wire mosi;
  wire myCamif_n_126;
  wire myCamif_n_127;
  wire myCamif_n_128;
  wire myCamif_n_129;
  wire myCamif_n_130;
  wire myCamif_n_131;
  wire myCamif_n_132;
  wire myCamif_n_15;
  wire myCamif_n_17;
  wire myCamif_n_18;
  wire myCamif_n_19;
  wire myCamif_n_20;
  wire myCamif_n_22;
  wire myCamif_n_32;
  wire myCamif_n_33;
  wire myCamif_n_34;
  wire myCamif_n_35;
  wire myCamif_n_36;
  wire myCamif_n_37;
  wire myCamif_n_38;
  wire myCamif_n_39;
  wire myCamif_n_40;
  wire myCamif_n_42;
  wire myCamif_n_43;
  wire myCamif_n_44;
  wire myCamif_n_45;
  wire myCamif_n_46;
  wire myCamif_n_47;
  wire myCamif_n_48;
  wire myCamif_n_49;
  wire myCamif_n_50;
  wire myCamif_n_51;
  wire myCamif_n_52;
  wire myCamif_n_53;
  wire myCamif_n_78;
  wire myCamif_n_79;
  wire myCamif_n_80;
  wire myCamif_n_81;
  wire myCamif_n_82;
  wire myCamif_n_83;
  wire myCamif_n_84;
  wire myCamif_n_85;
  wire myCamif_n_86;
  wire myCamif_n_87;
  wire myCamif_n_88;
  wire myCamif_n_89;
  wire myCamif_n_9;
  wire myCamif_n_90;
  wire myCamif_n_91;
  wire myCamif_n_92;
  wire myCamif_n_93;
  wire myCamif_n_94;
  wire myCamif_n_95;
  wire myCamif_n_96;
  wire myCamif_n_97;
  wire myCorner_n_68;
  wire myCorner_n_69;
  wire myCorner_n_78;
  wire myCorner_n_79;
  wire myCorner_n_80;
  wire myCorner_n_81;
  wire myCorner_n_82;
  wire myCorner_n_83;
  wire myCorner_n_84;
  wire myCorner_n_85;
  wire myCorner_n_86;
  wire myCorner_n_87;
  wire myCorner_n_88;
  wire myCorner_n_89;
  wire myCorner_n_90;
  wire myCorner_n_93;
  wire myCorner_n_94;
  wire myCorner_n_95;
  wire myCorner_n_96;
  wire myDdrif_n_3;
  wire myDdrif_n_35;
  wire myDdrif_n_37;
  wire myDdrif_n_39;
  wire myDdrif_n_4;
  wire myDdrif_n_5;
  wire myDdrif_n_9;
  wire myDecim_n_126;
  wire myDecim_n_127;
  wire myDecim_n_128;
  wire myDecim_n_129;
  wire myDecim_n_130;
  wire myDecim_n_131;
  wire myDecim_n_132;
  wire myDecim_n_133;
  wire myDecim_n_68;
  wire myDecim_n_69;
  wire myDecim_n_79;
  wire myDecim_n_80;
  wire myDecim_n_86;
  wire myDecim_n_87;
  wire myDecim_n_88;
  wire myDecim_n_89;
  wire myDecim_n_92;
  wire myDecim_n_93;
  wire myDirector_n_17;
  wire myDirector_n_18;
  wire myDirector_n_19;
  wire myDirector_n_2;
  wire myDirector_n_20;
  wire myDirector_n_21;
  wire myDirector_n_22;
  wire myDirector_n_23;
  wire myDirector_n_35;
  wire myDirector_n_36;
  wire myDirector_n_37;
  wire myDirector_n_38;
  wire myDirector_n_39;
  wire myDirector_n_4;
  wire myDirector_n_40;
  wire myDirector_n_41;
  wire myDirector_n_42;
  wire myDirector_n_43;
  wire myHdreng_n_1;
  wire myHdreng_n_10;
  wire myHdreng_n_11;
  wire myHdreng_n_12;
  wire myHdreng_n_14;
  wire myHdreng_n_28;
  wire myHdreng_n_29;
  wire myHdreng_n_4;
  wire myHdreng_n_8;
  wire myHostif_n_1;
  wire myHostif_n_10;
  wire myHostif_n_100;
  wire myHostif_n_101;
  wire myHostif_n_102;
  wire myHostif_n_11;
  wire myHostif_n_111;
  wire myHostif_n_112;
  wire myHostif_n_113;
  wire myHostif_n_114;
  wire myHostif_n_115;
  wire myHostif_n_116;
  wire myHostif_n_117;
  wire myHostif_n_118;
  wire myHostif_n_134;
  wire myHostif_n_143;
  wire myHostif_n_147;
  wire myHostif_n_148;
  wire myHostif_n_149;
  wire myHostif_n_15;
  wire myHostif_n_150;
  wire myHostif_n_151;
  wire myHostif_n_152;
  wire myHostif_n_153;
  wire myHostif_n_157;
  wire myHostif_n_158;
  wire myHostif_n_160;
  wire myHostif_n_166;
  wire myHostif_n_17;
  wire myHostif_n_170;
  wire myHostif_n_171;
  wire myHostif_n_172;
  wire myHostif_n_173;
  wire myHostif_n_174;
  wire myHostif_n_175;
  wire myHostif_n_176;
  wire myHostif_n_177;
  wire myHostif_n_178;
  wire myHostif_n_179;
  wire myHostif_n_18;
  wire myHostif_n_180;
  wire myHostif_n_181;
  wire myHostif_n_182;
  wire myHostif_n_183;
  wire myHostif_n_184;
  wire myHostif_n_185;
  wire myHostif_n_186;
  wire myHostif_n_187;
  wire myHostif_n_19;
  wire myHostif_n_205;
  wire myHostif_n_206;
  wire myHostif_n_207;
  wire myHostif_n_208;
  wire myHostif_n_209;
  wire myHostif_n_210;
  wire myHostif_n_211;
  wire myHostif_n_212;
  wire myHostif_n_213;
  wire myHostif_n_214;
  wire myHostif_n_215;
  wire myHostif_n_216;
  wire myHostif_n_217;
  wire myHostif_n_218;
  wire myHostif_n_219;
  wire myHostif_n_220;
  wire myHostif_n_221;
  wire myHostif_n_222;
  wire myHostif_n_223;
  wire myHostif_n_224;
  wire myHostif_n_225;
  wire myHostif_n_226;
  wire myHostif_n_227;
  wire myHostif_n_228;
  wire myHostif_n_229;
  wire myHostif_n_230;
  wire myHostif_n_231;
  wire myHostif_n_232;
  wire myHostif_n_233;
  wire myHostif_n_234;
  wire myHostif_n_235;
  wire myHostif_n_236;
  wire myHostif_n_237;
  wire myHostif_n_254;
  wire myHostif_n_257;
  wire myHostif_n_258;
  wire myHostif_n_259;
  wire myHostif_n_260;
  wire myHostif_n_261;
  wire myHostif_n_262;
  wire myHostif_n_263;
  wire myHostif_n_264;
  wire myHostif_n_265;
  wire myHostif_n_268;
  wire myHostif_n_270;
  wire myHostif_n_276;
  wire myHostif_n_280;
  wire myHostif_n_283;
  wire myHostif_n_284;
  wire myHostif_n_286;
  wire myHostif_n_287;
  wire myHostif_n_289;
  wire myHostif_n_290;
  wire myHostif_n_291;
  wire myHostif_n_292;
  wire myHostif_n_293;
  wire myHostif_n_294;
  wire myHostif_n_295;
  wire myHostif_n_296;
  wire myHostif_n_297;
  wire myHostif_n_298;
  wire myHostif_n_299;
  wire myHostif_n_300;
  wire myHostif_n_301;
  wire myHostif_n_303;
  wire myHostif_n_310;
  wire myHostif_n_311;
  wire myHostif_n_312;
  wire myHostif_n_313;
  wire myHostif_n_314;
  wire myHostif_n_317;
  wire myHostif_n_321;
  wire myHostif_n_323;
  wire myHostif_n_325;
  wire myHostif_n_326;
  wire myHostif_n_328;
  wire myHostif_n_329;
  wire myHostif_n_331;
  wire myHostif_n_332;
  wire myHostif_n_333;
  wire myHostif_n_334;
  wire myHostif_n_335;
  wire myHostif_n_336;
  wire myHostif_n_337;
  wire myHostif_n_338;
  wire myHostif_n_339;
  wire myHostif_n_385;
  wire myHostif_n_387;
  wire myHostif_n_388;
  wire myHostif_n_7;
  wire myHostif_n_91;
  wire myHostif_n_93;
  wire myHostif_n_97;
  wire myHostif_n_98;
  wire myHostif_n_99;
  wire myHshktrack_n_107;
  wire myHshktrack_n_67;
  wire myHshktrack_n_69;
  wire myHshktrack_n_70;
  wire myHshktrack_n_71;
  wire myHshktrack_n_72;
  wire myHshktrack_n_73;
  wire myHshktrack_n_74;
  wire myMemtrack_n_64;
  wire myMemtrack_n_65;
  wire myMemtrack_n_66;
  wire myMemtrack_n_67;
  wire myMemtrack_n_68;
  wire myMemtrack_n_69;
  wire myMemtrack_n_70;
  wire myMemtrack_n_71;
  wire myMemtrack_n_76;
  wire myMemtrack_n_81;
  wire myRgbled0_n_10;
  wire myRgbled0_n_11;
  wire myRgbled0_n_12;
  wire myRgbled0_n_7;
  wire myRgbled0_n_8;
  wire myRgbled0_n_9;
  wire myRotary_n_11;
  wire myRotary_n_12;
  wire myRotary_n_13;
  wire myRotary_n_14;
  wire myRotary_n_34;
  wire myRotary_n_35;
  wire myRotary_n_36;
  wire myRotary_n_4;
  wire myRpuif_n_37;
  wire myState_n_1;
  wire myState_n_10;
  wire myState_n_11;
  wire myState_n_12;
  wire myState_n_13;
  wire myState_n_2;
  wire myState_n_3;
  wire myState_n_4;
  wire myState_n_5;
  wire myState_n_6;
  wire myState_n_9;
  wire myStepmux_n_1;
  wire myTrace_n_64;
  wire myVideoin_n_107;
  wire myVideoin_n_116;
  wire myVideoin_n_117;
  wire myVideoin_n_118;
  wire myVideoin_n_119;
  wire myVideoin_n_120;
  wire myVideoin_n_121;
  wire myVideoin_n_122;
  wire myVideoin_n_123;
  wire myVideoin_n_124;
  wire myVideoin_n_125;
  wire myVideoin_n_126;
  wire myVideoin_n_127;
  wire myVideoin_n_128;
  wire myVideoin_n_129;
  wire myVideoin_n_13;
  wire myVideoin_n_130;
  wire myVideoin_n_131;
  wire myVideoin_n_132;
  wire myVideoin_n_133;
  wire myVideoin_n_134;
  wire myVideoin_n_135;
  wire myVideoin_n_136;
  wire myVideoin_n_137;
  wire myVideoin_n_138;
  wire myVideoin_n_139;
  wire myVideoin_n_140;
  wire myVideoin_n_141;
  wire myVideoin_n_142;
  wire myVideoin_n_143;
  wire myVideoin_n_144;
  wire myVideoin_n_145;
  wire myVideoin_n_146;
  wire myVideoin_n_147;
  wire myVideoin_n_148;
  wire myVideoin_n_149;
  wire myVideoin_n_150;
  wire myVideoin_n_151;
  wire myVideoin_n_152;
  wire myVideoin_n_153;
  wire myVideoin_n_154;
  wire myVideoin_n_155;
  wire myVideoin_n_156;
  wire myVideoin_n_157;
  wire myVideoin_n_158;
  wire myVideoin_n_159;
  wire myVideoin_n_160;
  wire myVideoin_n_165;
  wire myVideoin_n_166;
  wire myVideoin_n_17;
  wire myVideoin_n_18;
  wire myVideoin_n_19;
  wire myVideoin_n_20;
  wire myVideoin_n_21;
  wire myVideoin_n_22;
  wire myVideoin_n_23;
  wire myVideoin_n_24;
  wire myVideoin_n_4;
  wire myVideoin_n_5;
  wire myVideoin_n_6;
  wire myVideoin_n_61;
  wire myVideoin_n_63;
  wire myVideoin_n_64;
  wire myVideoin_n_65;
  wire myVideoin_n_66;
  wire myVideoin_n_7;
  wire myVideoin_n_8;
  wire myVideoin_n_9;
  wire myVidtrack_n_113;
  wire myVidtrack_n_114;
  wire nslp;
  wire [0:0]p_0_in;
  wire p_0_in0;
  wire [4:0]p_0_in__0;
  wire [3:0]p_0_in__1;
  wire p_1_out1;
  wire [2:0]probe;
  wire [63:0]pvwbufDecimToHostifAXIS_tdata;
  wire pvwbufDecimToHostifAXIS_tready;
  wire pvwbufDecimToHostifAXIS_tvalid;
  wire [19:0]rdAAXI_araddr;
  wire [1:0]rdmutex;
  wire reqCoobufCornerToHostif;
  wire reqFlgbufTraceToHostif;
  wire reqInvAcquire;
  wire reqInvAssign;
  wire reqInvConfig;
  wire reqInvConfigSynth;
  wire reqInvCornerConfig;
  wire reqInvCputrackSet;
  wire reqInvDecimAcquire;
  wire reqInvDecimConfig;
  wire reqInvDecimSet;
  wire reqInvDecimUnlock;
  wire reqInvDirectorConfig;
  wire reqInvDirectorSet;
  wire reqInvGetCorereg;
  wire reqInvGetReg;
  wire reqInvHdrengSet;
  wire reqInvHshktrackClearMask;
  wire reqInvHshktrackSelect;
  wire reqInvHshktrackSet;
  wire reqInvHshktrackSetMask;
  wire reqInvLaserSet;
  wire reqInvMemtrackClearMask;
  wire reqInvMemtrackSelect;
  wire reqInvMemtrackSet;
  wire reqInvMemtrackSetMask;
  wire reqInvModReg;
  wire reqInvRotaryConfig;
  wire reqInvRotaryMoveto;
  wire reqInvRotaryZero;
  wire reqInvSelect;
  wire reqInvSetCorereg;
  wire reqInvSetReg;
  wire reqInvStepmuxSet;
  wire reqInvTkclksrcSetTkst;
  wire reqInvTraceAcquire;
  wire reqInvTraceConfig;
  wire reqInvVidtrackSelect;
  wire reqInvVidtrackSet;
  wire reqPvwbufDecimToHostif;
  wire reqSeqbufCputrackToHostif;
  wire reqSeqbufHshktrackToHostif;
  wire reqSeqbufMemtrackToHostif;
  wire reqSeqbufVidtrackToHostif;
  wire resetMemclk;
  wire resetMemclk_i_1_n_0;
  wire resetMemclk_i_2_n_0;
  wire reset_i_2_n_0;
  wire reset_memclk;
  wire reset_memclk_i_1_n_0;
  wire reset_reg_n_0;
  wire reset_to_memclkm1;
  wire reset_to_memclkm1_i_1_n_0;
  wire reset_to_memclkm2;
  wire [21:5]rgb0;
  wire rgb0_b;
  wire rgb0_g;
  wire rgb0_r;
  wire rgbToManyAXIS_tlast_sig_reg;
  wire [35:0]rgbVideoinToManyAXIS_tdata;
  wire rgbVideoinToManyAXIS_tvalid;
  wire rng;
  wire [13:0]rotaryGetInfoAngle;
  wire [0:0]rotaryGetInfoTixVState;
  wire [10:3]row_lcl_reg;
  wire [10:0]row_lcl_reg_0;
  wire [1:0]rpuAXIL_araddr;
  wire rpuAXIL_arready;
  wire rpuAXIL_arvalid;
  wire [1:0]rpuAXIL_awaddr;
  wire rpuAXIL_awready;
  wire rpuAXIL_awvalid;
  wire rpuAXIL_bready;
  wire rpuAXIL_bvalid;
  wire [31:0]rpuAXIL_rdata;
  wire rpuAXIL_rready;
  wire rpuAXIL_rvalid;
  wire [31:0]rpuAXIL_wdata;
  wire rpuAXIL_wready;
  wire [3:0]rpuAXIL_wstrb;
  wire rpuAXIL_wvalid;
  wire [7:0]rpuifStateOp_dbg;
  wire scl;
  wire sclk;
  wire sda;
  wire [7:4]sel0__0;
  wire [13:13]\seq[1]_2 ;
  wire [13:13]\seq_reg[1]_0 ;
  wire [63:0]seqbufCputrackToHostifAXIS_tdata;
  wire seqbufCputrackToHostifAXIS_tready;
  wire seqbufCputrackToHostifAXIS_tvalid;
  wire [63:0]seqbufHshktrackToHostifAXIS_tdata;
  wire seqbufHshktrackToHostifAXIS_tready;
  wire seqbufHshktrackToHostifAXIS_tvalid;
  wire [63:0]seqbufMemtrackToHostifAXIS_tdata;
  wire seqbufMemtrackToHostifAXIS_tready;
  wire seqbufMemtrackToHostifAXIS_tvalid;
  wire [63:0]seqbufVidtrackToHostifAXIS_tdata;
  wire seqbufVidtrackToHostifAXIS_tready;
  wire seqbufVidtrackToHostifAXIS_tvalid;
  wire [15:9]setCoreregVal;
  wire staTixVTrigger;
  wire staTixVTrigger_2;
  wire stateCorecfg0;
  wire [2:0]stateEgrstr;
  wire [0:0]stateIgr;
  wire [0:0]stateIgrstr;
  wire stateMclk;
  wire stateMemclk_i_1_n_0;
  wire stateMemclk_reg_n_0;
  wire [0:0]stateOp;
  wire stateOp0_out;
  wire stateOp47_out;
  wire stateOp5_out;
  wire [1:0]stateOp_5;
  wire [5:0]stateOp_6;
  wire [4:0]stateOp_7;
  wire [0:0]stateRgbegr;
  wire stateStats;
  wire [1:0]stateStream;
  wire step;
  wire step1__6;
  wire synthNotLive;
  wire targetNotSteady;
  wire tixVState1;
  wire tkclk;
  wire [31:0]tkclksrcGetTkstTkst;
  wire [0:0]traceGetInfoTixVState;
  wire [5:0]videoinStateIgr_dbg;
  wire [7:4]videoinStateRgbegr_dbg;
  wire [9:0]vidtrackGetInfoPtr0Seqbuf;
  wire [31:0]vidtrackGetInfoTCapt;
  wire [1:0]vidtrackGetInfoTixVState;
  wire vsync;
  wire weB;
  wire wrAAXI_awvalid;
  wire wrAAXI_wlast;

  LUT6 #(
    .INIT(64'hFFFFFF55554D1528)) 
    g0_b0
       (.I0(stateOp_6[0]),
        .I1(stateOp_6[1]),
        .I2(stateOp_6[2]),
        .I3(stateOp_6[3]),
        .I4(stateOp_6[4]),
        .I5(stateOp_6[5]),
        .O(hostifStateOp_dbg[0]));
  (* SOFT_HLUTNM = "soft_lutpair3151" *) 
  LUT5 #(
    .INIT(32'hFD4D1528)) 
    g0_b0__0
       (.I0(stateOp_7[0]),
        .I1(stateOp_7[1]),
        .I2(stateOp_7[2]),
        .I3(stateOp_7[3]),
        .I4(stateOp_7[4]),
        .O(rpuifStateOp_dbg[0]));
  LUT6 #(
    .INIT(64'hFFFFFF1999962630)) 
    g0_b1
       (.I0(stateOp_6[0]),
        .I1(stateOp_6[1]),
        .I2(stateOp_6[2]),
        .I3(stateOp_6[3]),
        .I4(stateOp_6[4]),
        .I5(stateOp_6[5]),
        .O(hostifStateOp_dbg[1]));
  (* SOFT_HLUTNM = "soft_lutpair3151" *) 
  LUT5 #(
    .INIT(32'hFD962630)) 
    g0_b1__0
       (.I0(stateOp_7[0]),
        .I1(stateOp_7[1]),
        .I2(stateOp_7[2]),
        .I3(stateOp_7[3]),
        .I4(stateOp_7[4]),
        .O(rpuifStateOp_dbg[1]));
  LUT6 #(
    .INIT(64'hFFFFFF601E18B840)) 
    g0_b2
       (.I0(stateOp_6[0]),
        .I1(stateOp_6[1]),
        .I2(stateOp_6[2]),
        .I3(stateOp_6[3]),
        .I4(stateOp_6[4]),
        .I5(stateOp_6[5]),
        .O(hostifStateOp_dbg[2]));
  (* SOFT_HLUTNM = "soft_lutpair3152" *) 
  LUT5 #(
    .INIT(32'hFC18B840)) 
    g0_b2__0
       (.I0(stateOp_7[0]),
        .I1(stateOp_7[1]),
        .I2(stateOp_7[2]),
        .I3(stateOp_7[3]),
        .I4(stateOp_7[4]),
        .O(rpuifStateOp_dbg[2]));
  LUT3 #(
    .INIT(8'hE0)) 
    g0_b3
       (.I0(stateOp_6[3]),
        .I1(stateOp_6[4]),
        .I2(stateOp_6[5]),
        .O(hostifStateOp_dbg[3]));
  LUT6 #(
    .INIT(64'hFFFFFF7E1FE03F82)) 
    g0_b4
       (.I0(stateOp_6[0]),
        .I1(stateOp_6[1]),
        .I2(stateOp_6[2]),
        .I3(stateOp_6[3]),
        .I4(stateOp_6[4]),
        .I5(stateOp_6[5]),
        .O(hostifStateOp_dbg[4]));
  (* SOFT_HLUTNM = "soft_lutpair3152" *) 
  LUT5 #(
    .INIT(32'hFDE03F82)) 
    g0_b4__0
       (.I0(stateOp_7[0]),
        .I1(stateOp_7[1]),
        .I2(stateOp_7[2]),
        .I3(stateOp_7[3]),
        .I4(stateOp_7[4]),
        .O(rpuifStateOp_dbg[4]));
  LUT6 #(
    .INIT(64'hFFFFFF7FE0003FFC)) 
    g0_b5
       (.I0(stateOp_6[0]),
        .I1(stateOp_6[1]),
        .I2(stateOp_6[2]),
        .I3(stateOp_6[3]),
        .I4(stateOp_6[4]),
        .I5(stateOp_6[5]),
        .O(hostifStateOp_dbg[5]));
  (* SOFT_HLUTNM = "soft_lutpair3153" *) 
  LUT5 #(
    .INIT(32'hFE003FFC)) 
    g0_b5__0
       (.I0(stateOp_7[0]),
        .I1(stateOp_7[1]),
        .I2(stateOp_7[2]),
        .I3(stateOp_7[3]),
        .I4(stateOp_7[4]),
        .O(rpuifStateOp_dbg[5]));
  LUT6 #(
    .INIT(64'hFFFFFF7FFFFFC000)) 
    g0_b6
       (.I0(stateOp_6[0]),
        .I1(stateOp_6[1]),
        .I2(stateOp_6[2]),
        .I3(stateOp_6[3]),
        .I4(stateOp_6[4]),
        .I5(stateOp_6[5]),
        .O(hostifStateOp_dbg[6]));
  LUT4 #(
    .INIT(16'hFF80)) 
    g0_b6__0
       (.I0(stateOp_7[1]),
        .I1(stateOp_7[2]),
        .I2(stateOp_7[3]),
        .I3(stateOp_7[4]),
        .O(rpuifStateOp_dbg[6]));
  LUT6 #(
    .INIT(64'hFFFFFF8000000000)) 
    g0_b7
       (.I0(stateOp_6[0]),
        .I1(stateOp_6[1]),
        .I2(stateOp_6[2]),
        .I3(stateOp_6[3]),
        .I4(stateOp_6[4]),
        .I5(stateOp_6[5]),
        .O(hostifStateOp_dbg[7]));
  (* SOFT_HLUTNM = "soft_lutpair3153" *) 
  LUT4 #(
    .INIT(16'hE000)) 
    g0_b7__0
       (.I0(stateOp_7[1]),
        .I1(stateOp_7[2]),
        .I2(stateOp_7[3]),
        .I3(stateOp_7[4]),
        .O(rpuifStateOp_dbg[7]));
  LUT2 #(
    .INIT(4'h1)) 
    \i[0]__0_i_1__2 
       (.I0(stateMclk),
        .I1(i_reg[0]),
        .O(p_0_in__1[0]));
  (* SOFT_HLUTNM = "soft_lutpair3155" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \i[0]_i_1__10 
       (.I0(stateMemclk_reg_n_0),
        .I1(\i_reg_n_0_[0] ),
        .O(p_0_in__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair3154" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \i[1]__0_i_1__2 
       (.I0(i_reg[0]),
        .I1(i_reg[1]),
        .I2(stateMclk),
        .O(p_0_in__1[1]));
  (* SOFT_HLUTNM = "soft_lutpair3155" *) 
  LUT3 #(
    .INIT(8'h06)) 
    \i[1]_i_1__9 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(stateMemclk_reg_n_0),
        .O(p_0_in__0[1]));
  (* SOFT_HLUTNM = "soft_lutpair3150" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \i[2]__0_i_1__1 
       (.I0(i_reg[1]),
        .I1(i_reg[0]),
        .I2(i_reg[2]),
        .I3(stateMclk),
        .O(p_0_in__1[2]));
  (* SOFT_HLUTNM = "soft_lutpair3148" *) 
  LUT4 #(
    .INIT(16'h0078)) 
    \i[2]_i_1__2 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[2] ),
        .I3(stateMemclk_reg_n_0),
        .O(p_0_in__0[2]));
  (* SOFT_HLUTNM = "soft_lutpair3150" *) 
  LUT5 #(
    .INIT(32'h070F0800)) 
    \i[3]__0_i_2__0 
       (.I0(i_reg[0]),
        .I1(i_reg[1]),
        .I2(stateMclk),
        .I3(i_reg[2]),
        .I4(i_reg[3]),
        .O(p_0_in__1[3]));
  (* SOFT_HLUTNM = "soft_lutpair3148" *) 
  LUT5 #(
    .INIT(32'h00007F80)) 
    \i[3]_i_1__2 
       (.I0(\i_reg_n_0_[0] ),
        .I1(\i_reg_n_0_[1] ),
        .I2(\i_reg_n_0_[2] ),
        .I3(\i_reg_n_0_[3] ),
        .I4(stateMemclk_reg_n_0),
        .O(p_0_in__0[3]));
  LUT6 #(
    .INIT(64'hBBBBBBBBBB8BBBBB)) 
    \i[4]_i_1__2 
       (.I0(reset_memclk),
        .I1(stateMemclk_reg_n_0),
        .I2(\i_reg_n_0_[4] ),
        .I3(\i_reg_n_0_[2] ),
        .I4(\i_reg_n_0_[3] ),
        .I5(\i[4]_i_3__0_n_0 ),
        .O(\i[4]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h000000007FFF8000)) 
    \i[4]_i_2__0 
       (.I0(\i_reg_n_0_[2] ),
        .I1(\i_reg_n_0_[0] ),
        .I2(\i_reg_n_0_[1] ),
        .I3(\i_reg_n_0_[3] ),
        .I4(\i_reg_n_0_[4] ),
        .I5(stateMemclk_reg_n_0),
        .O(p_0_in__0[4]));
  (* SOFT_HLUTNM = "soft_lutpair3149" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \i[4]_i_3__0 
       (.I0(\i_reg_n_0_[1] ),
        .I1(\i_reg_n_0_[0] ),
        .O(\i[4]_i_3__0_n_0 ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0] 
       (.C(memclk),
        .CE(\i[4]_i_1__2_n_0 ),
        .CLR(reset_to_memclkm1_i_1_n_0),
        .D(p_0_in__0[0]),
        .Q(\i_reg_n_0_[0] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[0]__0 
       (.C(aclk_sig),
        .CE(i),
        .CLR(reset_to_memclkm1_i_1_n_0),
        .D(p_0_in__1[0]),
        .Q(i_reg[0]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1] 
       (.C(memclk),
        .CE(\i[4]_i_1__2_n_0 ),
        .CLR(reset_to_memclkm1_i_1_n_0),
        .D(p_0_in__0[1]),
        .Q(\i_reg_n_0_[1] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[1]__0 
       (.C(aclk_sig),
        .CE(i),
        .CLR(reset_to_memclkm1_i_1_n_0),
        .D(p_0_in__1[1]),
        .Q(i_reg[1]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2] 
       (.C(memclk),
        .CE(\i[4]_i_1__2_n_0 ),
        .CLR(reset_to_memclkm1_i_1_n_0),
        .D(p_0_in__0[2]),
        .Q(\i_reg_n_0_[2] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[2]__0 
       (.C(aclk_sig),
        .CE(i),
        .CLR(reset_to_memclkm1_i_1_n_0),
        .D(p_0_in__1[2]),
        .Q(i_reg[2]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3] 
       (.C(memclk),
        .CE(\i[4]_i_1__2_n_0 ),
        .CLR(reset_to_memclkm1_i_1_n_0),
        .D(p_0_in__0[3]),
        .Q(\i_reg_n_0_[3] ));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[3]__0 
       (.C(aclk_sig),
        .CE(i),
        .CLR(reset_to_memclkm1_i_1_n_0),
        .D(p_0_in__1[3]),
        .Q(i_reg[3]));
  FDCE #(
    .INIT(1'b0)) 
    \i_reg[4] 
       (.C(memclk),
        .CE(\i[4]_i_1__2_n_0 ),
        .CLR(reset_to_memclkm1_i_1_n_0),
        .D(p_0_in__0[4]),
        .Q(\i_reg_n_0_[4] ));
  (* XILINX_LEGACY_PRIM = "BUFG" *) 
  (* XILINX_TRANSFORM_PINMAP = "VCC:CE" *) 
  (* box_type = "PRIMITIVE" *) 
  BUFGCE #(
    .CE_TYPE("ASYNC"),
    .SIM_DEVICE("ULTRASCALE_PLUS")) 
    myBufgAclk
       (.CE(1'b1),
        .I(aclk),
        .O(aclk_sig));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Camif myCamif
       (.D({configSynthNotLive,configSynthTFramepad,myHostif_n_134,configSynthTLinepad}),
        .DO({drdParrom[7:5],drdParrom[3:0]}),
        .E(ackInvConfigSynth_sig),
        .\FSM_sequential_stateRgbegr_reg[0] (myCamif_n_88),
        .NColRaw(NColRaw[3:1]),
        .NRowRaw(NRowRaw[2:0]),
        .Q({myDecim_n_92,myDecim_n_93}),
        .ackInvCamifConfig(ackInvCamifConfig),
        .ackInvCamifConfigSynth(ackInvCamifConfigSynth),
        .ackInvCamifGetCorereg(ackInvCamifGetCorereg),
        .ackInvCamifGetReg(ackInvCamifGetReg),
        .ackInvCamifModReg(ackInvCamifModReg),
        .ackInvCamifSetCorereg(ackInvCamifSetCorereg),
        .ackInvCamifSetReg(ackInvCamifSetReg),
        .ackInvGetCorereg_sig_reg_0(myHostif_n_205),
        .ackLiveToConfigSetReg_reg_0(myHostif_n_181),
        .aclk_sig(aclk_sig),
        .camifToVideoinAXIS_tdata(camifToVideoinAXIS_tdata),
        .camifToVideoinAXIS_tlast(camifToVideoinAXIS_tlast),
        .camifToVideoinAXIS_tvalid(camifToVideoinAXIS_tvalid),
        .\capt_reg[0] (myHshktrack_n_74),
        .\col_reg[10]_0 (col),
        .\col_reg[1]_0 (myCamif_n_53),
        .\corecfgAXIL_araddr_reg[12]_0 ({corecfgAXIL_araddr0_out[12],corecfgAXIL_araddr0_out[7:2]}),
        .\corecfgAXIL_awaddr_reg[12]_0 ({corecfgAXIL_awaddr0_out[12],corecfgAXIL_awaddr0_out[7:2]}),
        .\corecfgAXIL_wdata_reg[31]_0 ({myHostif_n_206,myHostif_n_207,myHostif_n_208,myHostif_n_209,myHostif_n_210,myHostif_n_211,myHostif_n_212,myHostif_n_213,myHostif_n_214,myHostif_n_215,myHostif_n_216,myHostif_n_217,myHostif_n_218,myHostif_n_219,myHostif_n_220,myHostif_n_221,myHostif_n_222,myHostif_n_223,myHostif_n_224,myHostif_n_225,myHostif_n_226,myHostif_n_227,myHostif_n_228,myHostif_n_229,myHostif_n_230,myHostif_n_231,myHostif_n_232,myHostif_n_233,myHostif_n_234,myHostif_n_235,myHostif_n_236,myHostif_n_237}),
        .csi_clk_n(csi_clk_n),
        .csi_clk_p(csi_clk_p),
        .\dwrEobuf_reg[63] (klm),
        .enEobufB_reg(stateRgbegr),
        .\getCoreregVal_sig_reg[31]_0 ({camifGetCoreregVal[31],camifGetCoreregVal[26],camifGetCoreregVal[23:0]}),
        .grayToManyAXIS_tvalid_sig_reg(myCamif_n_79),
        .grayVideoinToManyAXIS_tvalid(grayVideoinToManyAXIS_tvalid),
        .hdrNotFix(hdrNotFix),
        .i2cReadNotWrite_reg_0(myHostif_n_166),
        .i2cReadNotWrite_reg_1(myHostif_n_180),
        .\i2cRegaddr_reg[0]_0 (myHostif_n_187),
        .\i2cRegaddr_reg[12]_0 (myHostif_n_183),
        .\i2cRegaddr_reg[13]_0 (myHostif_n_182),
        .\i2cRegaddr_reg[15]_0 ({myHostif_n_170,myHostif_n_171,myHostif_n_172,myHostif_n_173,myHostif_n_174,myHostif_n_175,myHostif_n_176,myHostif_n_177,myHostif_n_178,myHostif_n_179}),
        .\i2cRegaddr_reg[3]_0 (myHostif_n_186),
        .\i2cRegaddr_reg[4]_0 (myHostif_n_185),
        .\i2cRegaddr_reg[6]_0 (myHostif_n_184),
        .\i_reg[0]__0_0 (myDirector_n_23),
        .\i_reg[0]__1_0 (myDirector_n_18),
        .\ixTExp_lcl_reg[1]_0 (myCamif_n_15),
        .\ixTExp_sig_reg[1]_0 (myCamif_n_83),
        .\ixTExp_sig_reg[2]_0 (ixTExp),
        .\ixTExp_sig_reg[2]_1 (myCamif_n_82),
        .\klm_reg[0] (myCamif_n_89),
        .\klm_reg[0]_0 (myCamif_n_90),
        .\klm_reg[0]_1 (myCamif_n_91),
        .\klm_reg[0]_2 (myCamif_n_92),
        .\klm_reg[0]_3 (myCamif_n_93),
        .\klm_reg[0]_4 (myCamif_n_94),
        .\klm_reg[0]_5 (myCamif_n_95),
        .\klm_reg[0]_6 (myCamif_n_96),
        .\klm_reg[0]_7 ({videoinStateIgr_dbg[5],stateIgr}),
        .\liveSetRegAddr_reg[13]_0 ({myCamif_n_131,myCamif_n_132}),
        .\mask_reg[0] (myCamif_n_78),
        .mipi_phy_if_data_n(mipi_phy_if_data_n),
        .mipi_phy_if_data_p(mipi_phy_if_data_p),
        .\regVal_reg[0]_0 (myCamif_n_130),
        .\regVal_reg[1]_0 (myCamif_n_129),
        .\regVal_reg[3]_0 (myCamif_n_128),
        .\regVal_reg[4]_0 (myCamif_n_127),
        .\regVal_reg[5]_0 (myCamif_n_126),
        .\regVal_reg[6]_0 (myCamif_n_97),
        .\regVal_reg[7]_0 ({camifGetRegVal[7],camifGetRegVal[2]}),
        .reqInvConfig(reqInvConfig),
        .reqInvConfigSynth(reqInvConfigSynth),
        .reqInvGetCorereg(reqInvGetCorereg),
        .reqInvGetReg(reqInvGetReg),
        .reqInvModReg(reqInvModReg),
        .reqInvSetCorereg(reqInvSetCorereg),
        .reqInvSetReg(reqInvSetReg),
        .\retbuf[0][0]_i_7 (myHostif_n_91),
        .rng(rng),
        .\rowRaw_lcl_reg[11]_0 ({myCamif_n_44,myCamif_n_45,myCamif_n_46,myCamif_n_47,myCamif_n_48,myCamif_n_49,myCamif_n_50,myCamif_n_51,myCamif_n_52}),
        .\rowRaw_lcl_reg[1]_0 (myCamif_n_42),
        .\row_reg[0]_0 (myCamif_n_43),
        .\row_reg[0]_1 (myDirector_n_21),
        .\row_reg[11]_0 ({myCamif_n_32,myCamif_n_33,myCamif_n_34,myCamif_n_35,myCamif_n_36,myCamif_n_37,myCamif_n_38,myCamif_n_39,myCamif_n_40}),
        .scl(scl),
        .sda(sda),
        .sda_sig_reg(reset_reg_n_0),
        .\stateConfig_reg[3]_0 (myCamif_n_20),
        .stateCorecfg0(stateCorecfg0),
        .\stateIgr_reg[1] (myCamif_n_84),
        .\stateIgr_reg[1]_0 (myCamif_n_85),
        .\stateIgr_reg[1]_1 (myCamif_n_86),
        .\stateLive_reg[2]_0 ({myCamif_n_17,myCamif_n_18,myCamif_n_19}),
        .stateOp47_out(stateOp47_out),
        .stateOp_reg_0(myCamif_n_9),
        .\stateStream_reg[0] (myCamif_n_80),
        .\stateStream_reg[0]_0 (stateStream),
        .\stateSynth_reg[0]_0 (myDirector_n_19),
        .\stateSynth_reg[0]_1 (myDirector_n_22),
        .\stateSynth_reg[0]_2 (myDirector_n_20),
        .\stateSynth_reg[2]_0 (myCamif_n_22),
        .synthNotLive(synthNotLive),
        .synthNotLive_reg_0(vsync),
        .synthNotLive_reg_1(myCamif_n_81),
        .\tixVSynthmode_reg[7]_0 (configHdrNotFix),
        .tkclk(tkclk),
        .\toVideoinAXIS_tdata_sig_reg[23]_0 (myDirector_n_35),
        .toVideoinAXIS_tvalid_sig_reg_0(myCamif_n_87));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Corner myCorner
       (.D({myCorner_n_89,myCorner_n_90}),
        .E(ackInvUnlock_sig),
        .\FSM_onehot_stateCoobufB_reg[5]_0 ({avllenCoobufCornerToHostif,coobufCornerToHostifAXIS_tvalid}),
        .NColRaw({NColRaw[11:10],NColRaw[8:1]}),
        .NRowRaw(NRowRaw[3:1]),
        .Q(row_lcl_reg),
        .\aImdbufB_reg[0]_0 (myDirector_n_36),
        .ackCoobufCornerToHostif(ackCoobufCornerToHostif),
        .ackInvCornerAcquire(ackInvCornerAcquire),
        .ackInvCornerConfig(ackInvCornerConfig),
        .ackInvCornerSet(ackInvCornerSet),
        .ackInvCornerUnlock(ackInvCornerUnlock),
        .ackInvSet_sig(ackInvSet_sig),
        .ackInvUnlock_sig0_in(ackInvUnlock_sig0_in),
        .aclk_sig(aclk_sig),
        .\capt_reg[1] (myHshktrack_n_73),
        .\capt_reg[2] (myHshktrack_n_72),
        .\col0_reg[10]_0 (configCol0),
        .\col1_reg[10]_0 (configCol1),
        .\col_lcl[10]__0_i_3_0 (myDirector_n_38),
        .\col_lcl[10]__0_i_3_1 (myDirector_n_40),
        .\col_lcl[10]__0_i_3_2 (myDirector_n_37),
        .\col_lcl[10]__0_i_5_0 (myDirector_n_41),
        .\col_lcl_reg[0]__0_0 (myDirector_n_39),
        .\col_lcl_reg[10]_0 ({myCorner_n_78,myCorner_n_79,myCorner_n_80,myCorner_n_81,myCorner_n_82,myCorner_n_83,myCorner_n_84,myCorner_n_85,myCorner_n_86,myCorner_n_87,myCorner_n_88}),
        .coobufCornerToHostifAXIS_tready(coobufCornerToHostifAXIS_tready),
        .dneCoobufCornerToHostif(dneCoobufCornerToHostif),
        .doutb(coobufCornerToHostifAXIS_tdata),
        .\dy_reg[44]_0 ({myVideoin_n_116,myVideoin_n_117,myVideoin_n_118,myVideoin_n_119,myVideoin_n_120,myVideoin_n_121,myVideoin_n_122,myVideoin_n_123,myVideoin_n_124,myVideoin_n_125,myVideoin_n_126,myVideoin_n_127,myVideoin_n_128,myVideoin_n_129,myVideoin_n_130,myVideoin_n_131,myVideoin_n_132,myVideoin_n_133,myVideoin_n_134,myVideoin_n_135,myVideoin_n_136,myVideoin_n_137,myVideoin_n_138,myVideoin_n_139,myVideoin_n_140,myVideoin_n_141,myVideoin_n_142,myVideoin_n_143,myVideoin_n_144,myVideoin_n_145,myVideoin_n_146,myVideoin_n_147,myVideoin_n_148,myVideoin_n_149,myVideoin_n_150,myVideoin_n_151,myVideoin_n_152,myVideoin_n_153,myVideoin_n_154,myVideoin_n_155,myVideoin_n_156,myVideoin_n_157,myVideoin_n_158,myVideoin_n_159,myVideoin_n_160}),
        .enCoobuf_reg_0(myDirector_n_4),
        .grayVideoinToManyAXIS_tdata({grayVideoinToManyAXIS_tdata[59:52],grayVideoinToManyAXIS_tdata[47:40],grayVideoinToManyAXIS_tdata[35:28],grayVideoinToManyAXIS_tdata[23:16],grayVideoinToManyAXIS_tdata[11:4]}),
        .grayVideoinToManyAXIS_tlast(grayVideoinToManyAXIS_tlast),
        .grayVideoinToManyAXIS_tvalid(grayVideoinToManyAXIS_tvalid),
        .hdrNotFix(hdrNotFix),
        .linNotLog_reg_0(reset_reg_n_0),
        .reqCoobufCornerToHostif(reqCoobufCornerToHostif),
        .reqInvAcquire(reqInvAcquire),
        .reqInvCornerConfig(reqInvCornerConfig),
        .rng_reg_0(myCorner_n_68),
        .rng_reg_1(myCorner_n_69),
        .rng_reg_2(myHostif_n_328),
        .\row1_reg[7]_0 (camifSetCoreregVal[7:0]),
        .\row_lcl_reg[1]_0 (myCorner_n_96),
        .\scoreMax_reg[7]_0 (cornerGetInfoScoreMax),
        .\scoreMin_reg[7]_0 (cornerGetInfoScoreMin),
        .\stateCorner_reg[1]_0 (myCamif_n_79),
        .\stateOp_reg[0]_0 (stateOp),
        .\stateOp_reg[1]_0 ({myCorner_n_93,myCorner_n_94}),
        .\thd_reg[7]_0 ({configSynthNotLive,configSynthTFramepad[2:1],myHostif_n_134,configSynthTLinepad,setCoreregVal[10:9],camifSetCoreregVal[8]}),
        .\tixVState_reg[1]_0 (cornerGetInfoTixVState),
        .\tixVState_reg[1]_1 (myCorner_n_95),
        .\tixVState_reg[1]_2 (myHostif_n_325),
        .\tixVState_reg[1]_3 (myHostif_n_321),
        .\tixVState_reg[1]_4 (myHostif_n_323),
        .\tkst_reg[0]_0 (vsync),
        .\tkst_reg[31]_0 (cornerGetInfoTkst),
        .\tkst_reg[31]_1 (tkclksrcGetTkstTkst),
        .vsync_last_reg_0(myHostif_n_326));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Cputrack myCputrack
       (.AR(reset_reg_n_0),
        .D({configSynthNotLive,configSynthTFramepad,myHostif_n_134,configSynthTLinepad}),
        .\FSM_onehot_stateSeq_reg[3]_0 (avllenSeqbufCputrackToHostif),
        .Q(cputrackGetInfoTCapt),
        .\TCaptMax_reg[7]_0 ({setCoreregVal,camifSetCoreregVal[8]}),
        .ackInvCputrackSelect(ackInvCputrackSelect),
        .ackInvCputrackSet(ackInvCputrackSet),
        .ackInvSelect_sig_reg_0(myHostif_n_314),
        .ackSeqbufCputrackToHostif(ackSeqbufCputrackToHostif),
        .aclk_sig(aclk_sig),
        .cputrackGetInfoPtr0Seqbuf(cputrackGetInfoPtr0Seqbuf),
        .cputrackGetInfoTixVState(cputrackGetInfoTixVState),
        .dneSeqbufCputrackToHostif(dneSeqbufCputrackToHostif),
        .doutb(seqbufCputrackToHostifAXIS_tdata),
        .hdrNotFix(hdrNotFix),
        .hostifStateOp_dbg(hostifStateOp_dbg),
        .reqInvCputrackSet(reqInvCputrackSet),
        .reqInvSelect(reqInvSelect),
        .reqSeqbufCputrackToHostif(reqSeqbufCputrackToHostif),
        .restart_reg_0(myHostif_n_317),
        .seqbufCputrackToHostifAXIS_tready(seqbufCputrackToHostifAXIS_tready),
        .seqbufCputrackToHostifAXIS_tvalid(seqbufCputrackToHostifAXIS_tvalid),
        .stateOp_dbg({rpuifStateOp_dbg[7:4],rpuifStateOp_dbg[2:0]}),
        .\tixVCapture_reg[7]_0 (configHdrNotFix));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Ddrif myDdrif
       (.AR(reset_reg_n_0),
        .D({myHdreng_n_28,myHdreng_n_29}),
        .\FSM_onehot_stateRead_reg[2]_0 (ackRd),
        .\NRdA_reg[31]_0 (ddrifGetStatsNRdA),
        .\NRdB_reg[31]_0 (ddrifGetStatsNRdB),
        .\NWrA_reg[31]_0 (ddrifGetStatsNWrA),
        .\NWrB_reg[31]_0 (ddrifGetStatsNWrB),
        .Q({ackWr,myDdrif_n_3}),
        .aclk_sig(aclk_sig),
        .\burstIgrstr_reg[0] (stateIgrstr),
        .ddrAXI_araddr(ddrAXI_araddr),
        .ddrAXI_arready(ddrAXI_arready),
        .ddrAXI_awaddr(ddrAXI_awaddr[20]),
        .ddrAXI_awready(ddrAXI_awready),
        .ddrAXI_awvalid(ddrAXI_awvalid),
        .ddrAXI_bready_sig_reg_0(ddrAXI_bready),
        .ddrAXI_bvalid(ddrAXI_bvalid),
        .ddrAXI_rlast(ddrAXI_rlast),
        .ddrAXI_rvalid(ddrAXI_rvalid),
        .ddrAXI_rvalid_0(myDdrif_n_4),
        .ddrAXI_wlast(ddrAXI_wlast),
        .ddrAXI_wready(ddrAXI_wready),
        .ddrAXI_wready_0(myDdrif_n_39),
        .ddrAXI_wvalid(ddrAXI_wvalid),
        .egrAXIS_tlast(egrAXIS_tlast),
        .hdrmemAXI_rlast(hdrmemAXI_rlast),
        .\i_reg[0]_0 (i_reg_8),
        .\ixRdidEgr_reg[4]_0 (myDdrif_n_5),
        .\ixRdid_reg[0]_0 (probe[0]),
        .memclk(memclk),
        .probe(probe[2:1]),
        .rdAAXI_araddr(rdAAXI_araddr),
        .\rdid_reg[1][0]_0 (myHdreng_n_12),
        .\rdmutex_reg[1]_0 (rdmutex),
        .\rdmutex_reg[1]_1 (myDdrif_n_35),
        .\rdmutex_reg[1]_2 (myHdreng_n_11),
        .stateStats(stateStats),
        .stateStats_reg_0(p_0_in),
        .\strbWrlock_i_reg[0]_0 (resetMemclk),
        .tkclk(tkclk),
        .web(weB),
        .wrAAXI_awvalid(wrAAXI_awvalid),
        .wrAAXI_wlast(wrAAXI_wlast),
        .\wrmutex_reg[1]_0 (myDdrif_n_9),
        .\wrmutex_reg[1]_1 (myDdrif_n_37));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Decim myDecim
       (.AR(reset_reg_n_0),
        .CO(CO),
        .D({configSynthNotLive[4:0],configSynthTFramepad[2:1],myHostif_n_134,configSynthTLinepad,setCoreregVal,camifSetCoreregVal[8]}),
        .DI({myVideoin_n_63,myVideoin_n_64,myVideoin_n_65,myVideoin_n_66}),
        .E(ixTExp_lcl),
        .\FSM_onehot_statePvwbufB_reg[5]_0 ({avllenPvwbufDecimToHostif,pvwbufDecimToHostifAXIS_tvalid}),
        .NColRaw(NColRaw),
        .NRowRaw(NRowRaw[11:1]),
        .O(dwrAccbuf),
        .Q(camifSetCoreregVal[7:0]),
        .S(S),
        .\acc0_lcl_reg[7]_0 ({myDecim_n_126,myDecim_n_127,myDecim_n_128,myDecim_n_129,myDecim_n_130,myDecim_n_131,myDecim_n_132,myDecim_n_133}),
        .\acc0_lcl_reg[7]_i_2 ({myVideoin_n_17,myVideoin_n_18,myVideoin_n_19,myVideoin_n_20,myVideoin_n_21,myVideoin_n_22,myVideoin_n_23,myVideoin_n_24}),
        .\acc2_lcl_reg[15]_i_2 (rgbVideoinToManyAXIS_tdata[35:12]),
        .ackInvDecimAcquire(ackInvDecimAcquire),
        .ackInvDecimConfig(ackInvDecimConfig),
        .ackInvDecimSet(ackInvDecimSet),
        .ackInvDecimUnlock(ackInvDecimUnlock),
        .ackInvSet_sig(ackInvSet_sig_4),
        .ackInvUnlock_sig_reg_0(myHostif_n_157),
        .ackPvwbufDecimToHostif(ackPvwbufDecimToHostif),
        .aclk_sig(aclk_sig),
        .\decimLast_reg[8]_0 (D),
        .dnePvwbufDecimToHostif(dnePvwbufDecimToHostif),
        .doutb(pvwbufDecimToHostifAXIS_tdata),
        .\dwrAccbuf_reg[15]_0 (myVideoin_n_107),
        .enAccbuf0(enAccbuf0),
        .enAccbuf1(enAccbuf1),
        .enAccbuf_reg_0(myVideoin_n_61),
        .grayVideoinToManyAXIS_tlast(grayVideoinToManyAXIS_tlast),
        .grayVideoinToManyAXIS_tvalid(grayVideoinToManyAXIS_tvalid),
        .hdrNotFix(hdrNotFix),
        .\ixTExp_lcl_reg[1]_0 ({myDecim_n_92,myDecim_n_93}),
        .\ixTExp_lcl_reg[3]_0 (configHdrNotFix[3:0]),
        .pvwbufDecimToHostifAXIS_tready(pvwbufDecimToHostifAXIS_tready),
        .reqInvDecimAcquire(reqInvDecimAcquire),
        .reqInvDecimConfig(reqInvDecimConfig),
        .reqInvDecimSet(reqInvDecimSet),
        .reqInvDecimUnlock(reqInvDecimUnlock),
        .reqPvwbufDecimToHostif(reqPvwbufDecimToHostif),
        .rgbNotGray_reg_0(myDecim_n_68),
        .rgbVideoinToManyAXIS_tvalid(rgbVideoinToManyAXIS_tvalid),
        .rng_reg_0(myDecim_n_69),
        .rng_reg_1(myHostif_n_1),
        .\stateOp_reg[1]_0 ({myDecim_n_79,myDecim_n_80}),
        .\stateOp_reg[1]_1 (stateOp_5),
        .\stateStore_reg[1]_0 (decimStateStore_dbg),
        .\stateStream_reg[0]_0 (decimStateStream_dbg),
        .\stateStream_reg[0]_1 (myDecim_n_87),
        .\stateStream_reg[0]_2 (rgbToManyAXIS_tlast_sig_reg),
        .\stateStream_reg[1]_0 (myDecim_n_88),
        .\stateStream_reg[1]_1 (myDecim_n_89),
        .\state_reg[5] ({myVidtrack_n_113,myVidtrack_n_114}),
        .\state_reg[5]_0 (videoinStateIgr_dbg[5]),
        .tixVState1(tixVState1),
        .\tixVState_reg[1]_0 (decimGetInfoTixVState),
        .\tixVState_reg[1]_1 (myCamif_n_15),
        .\tixVState_reg[1]_2 (ixTExp),
        .\tixVState_reg[1]_3 (myHostif_n_153),
        .\tixVState_reg[1]_4 (myHostif_n_158),
        .\tkst_reg[31]_0 (decimGetInfoTkst),
        .\tkst_reg[31]_1 (tkclksrcGetTkstTkst),
        .videoinStateRgbegr_dbg({videoinStateRgbegr_dbg[7],videoinStateRgbegr_dbg[5:4]}),
        .vsync_last_reg_0(myDecim_n_86),
        .vsync_last_reg_1(vsync),
        .vsync_last_reg_2(myHostif_n_160));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Director myDirector
       (.AR(reset_reg_n_0),
        .D({configSynthNotLive,configSynthTFramepad[3:1],myHostif_n_134,configSynthTLinepad[7:1]}),
        .\NColRaw_sig_reg[11]_0 (NColRaw),
        .\NColRaw_sig_reg[11]_1 (myDirector_n_36),
        .\NColRaw_sig_reg[2]_0 (myDirector_n_38),
        .\NColRaw_sig_reg[3]_0 (myDirector_n_41),
        .\NColRaw_sig_reg[5]_0 (myDirector_n_40),
        .\NColRaw_sig_reg[7]_0 (myDirector_n_43),
        .\NColRaw_sig_reg[8]_0 (myDirector_n_37),
        .\NColRaw_sig_reg[9]_0 (myDirector_n_39),
        .\NRowRaw_sig_reg[10]_0 (myDirector_n_19),
        .\NRowRaw_sig_reg[11]_0 (myDirector_n_20),
        .\NRowRaw_sig_reg[11]_1 (configHdrNotFix[3:0]),
        .\NRowRaw_sig_reg[7]_0 (myDirector_n_4),
        .Q(NRowRaw),
        .\aImdbufB_reg[0] ({myCorner_n_78,myCorner_n_79,myCorner_n_80,myCorner_n_81,myCorner_n_82,myCorner_n_83,myCorner_n_84,myCorner_n_85,myCorner_n_86,myCorner_n_87,myCorner_n_88}),
        .ackInvDirectorConfig(ackInvDirectorConfig),
        .ackInvDirectorSet(ackInvDirectorSet),
        .aclk_sig(aclk_sig),
        .\col_reg[8] (myDirector_n_23),
        .commok(commok),
        .enCoobuf_reg(vsync),
        .\i[7]_i_3_0 (col),
        .\i[7]_i_6_0 (myCamif_n_53),
        .\i_reg[0]__1 ({myCamif_n_44,myCamif_n_45,myCamif_n_46,myCamif_n_47,myCamif_n_48,myCamif_n_49,myCamif_n_50,myCamif_n_51,myCamif_n_52}),
        .reqInvDirectorConfig(reqInvDirectorConfig),
        .reqInvDirectorSet(reqInvDirectorSet),
        .rgbToManyAXIS_tlast_sig_i_2({myVideoin_n_4,myVideoin_n_5,myVideoin_n_6,myVideoin_n_7,myVideoin_n_8}),
        .rgbToManyAXIS_tlast_sig_i_2_0(myVideoin_n_9),
        .rgbToManyAXIS_tlast_sig_i_4_0(myVideoin_n_165),
        .rgbToManyAXIS_tlast_sig_i_4_1(myVideoin_n_166),
        .rgbToManyAXIS_tlast_sig_i_4_2(myVideoin_n_13),
        .rng(rng),
        .rng_sig_reg_0(myDirector_n_17),
        .rng_sig_reg_1(myDirector_n_35),
        .rng_sig_reg_2(myHostif_n_276),
        .\rowRaw_lcl_reg[10] (myDirector_n_18),
        .\row_lcl_reg[0] (myDirector_n_42),
        .\row_reg[0] ({myCamif_n_32,myCamif_n_33,myCamif_n_34,myCamif_n_35,myCamif_n_36,myCamif_n_37,myCamif_n_38,myCamif_n_39,myCamif_n_40}),
        .\row_reg[11] (myDirector_n_21),
        .\row_reg[9] (myDirector_n_22),
        .\stateLive[1]_i_11_0 (myCamif_n_42),
        .\stateMaxsel[0]_i_2_0 (row_lcl_reg),
        .\stateMaxsel[0]_i_6_0 (myCorner_n_96),
        .stateOp0_out(stateOp0_out),
        .stateOp_reg_0(myDirector_n_2),
        .\stateSwap[2]_i_5_0 (row_lcl_reg_0),
        .\stateSynth[2]_i_12_0 (myCamif_n_43),
        .\toVideoinAXIS_tdata_sig_reg[23] (myCamif_n_22));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Hdreng myHdreng
       (.AR(resetMemclk),
        .D(myHdreng_n_14),
        .E(myHostif_n_329),
        .\FSM_onehot_stateWrite_reg[1] ({myHdreng_n_28,myHdreng_n_29}),
        .\FSM_sequential_stateEgrstr_reg[2]_0 (stateEgrstr),
        .\FSM_sequential_stateIgrstr_reg[0]_0 (stateIgrstr),
        .Q(stateStream),
        .\aRowbufBEgrstr_reg[0]_0 (myDdrif_n_39),
        .ackInvAssign_sig(ackInvAssign_sig),
        .ackInvHdrengAssign(ackInvHdrengAssign),
        .ackInvHdrengSet(ackInvHdrengSet),
        .ackInvSet_sig_reg_0(myHostif_n_10),
        .aclk_sig(aclk_sig),
        .\burstIgrstr_reg[0]_0 (myDdrif_n_4),
        .\capt_reg[5] (myMemtrack_n_66),
        .ddrAXI_arready(ddrAXI_arready),
        .ddrAXI_arvalid(ddrAXI_arvalid),
        .ddrAXI_arvalid_0(rdmutex),
        .ddrAXI_awaddr(ddrAXI_awaddr[19:0]),
        .\ddrAXI_awaddr[27] (myDdrif_n_9),
        .ddrAXI_awready(ddrAXI_awready),
        .ddrAXI_awvalid(ddrAXI_awvalid),
        .ddrAXI_rdata(ddrAXI_rdata),
        .ddrAXI_rlast(ddrAXI_rlast),
        .ddrAXI_rready(ddrAXI_rready),
        .ddrAXI_rready_0(myDdrif_n_5),
        .ddrAXI_rvalid(ddrAXI_rvalid),
        .ddrAXI_rvalid_0(myHdreng_n_12),
        .ddrAXI_wdata(ddrAXI_wdata),
        .ddrAXI_wdata_0_sp_1(myDdrif_n_37),
        .ddrAXI_wready(ddrAXI_wready),
        .ddrAXI_wvalid(ddrAXI_wvalid),
        .\dwrRowbuf[2]_i_19_0 (myCamif_n_83),
        .\dwrRowbuf_reg[0]_0 (reset_reg_n_0),
        .\dwrRowbuf_reg[0]_1 (myCamif_n_82),
        .egrAXIS_tlast(egrAXIS_tlast),
        .hdrmemAXI_rlast(hdrmemAXI_rlast),
        .\ixMemAcq_reg[7]_0 (hdrengGetInfoIxMemAcq),
        .\ixMemNext_reg[7]_0 ({myHostif_n_331,myHostif_n_332,myHostif_n_333,myHostif_n_334,myHostif_n_335,myHostif_n_336,myHostif_n_337,myHostif_n_338}),
        .\ixMem_reg[7]_0 (hdrengGetInfoIxMem),
        .memclk(memclk),
        .probe(probe[0]),
        .rdAAXI_araddr(rdAAXI_araddr),
        .reqInvAssign(reqInvAssign),
        .reqInvHdrengSet(reqInvHdrengSet),
        .\rgbFromVideoinAXIS_tdatam1_reg[35]_0 (rgbVideoinToManyAXIS_tdata),
        .rgbFromVideoinAXIS_tlast_sig_to_memclk_reg_0(rgbToManyAXIS_tlast_sig_reg),
        .rgbVideoinToManyAXIS_tvalid(rgbVideoinToManyAXIS_tvalid),
        .rng_reg_0(myHdreng_n_4),
        .rng_reg_1(myHostif_n_339),
        .\row_lcl_reg[10]_0 (row_lcl_reg_0),
        .stateOp_reg_0(myHdreng_n_1),
        .stateOp_reg_1(myHostif_n_7),
        .\stateStream_reg[0]_0 (myCamif_n_80),
        .\stateStream_reg[0]_1 (NColRaw),
        .\stateStream_reg[1]_0 (vsync),
        .\stateSwap[3]_i_3_0 (myDdrif_n_35),
        .\stateSwap[3]_i_3_1 (ackRd),
        .\stateSwap[3]_i_5_0 ({ackWr,myDdrif_n_3}),
        .\stateSwap_reg[2]_0 (myDirector_n_42),
        .\stateSwap_reg[3]_0 ({myHdreng_n_8,p_1_out1,myHdreng_n_10,myHdreng_n_11}),
        .\tixVState_reg[7]_0 ({hdrengGetInfoTixVState[7],hdrengGetInfoTixVState[1:0]}),
        .\tixVState_reg[7]_1 (myCamif_n_81),
        .\tkstAcq_reg[31]_0 (tkclksrcGetTkstTkst),
        .\tkst_reg[31]_0 (hdrengGetInfoTkst),
        .web(weB),
        .wrAAXI_awvalid(wrAAXI_awvalid),
        .wrAAXI_wlast(wrAAXI_wlast));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Hostif myHostif
       (.AXIL_arready(apuAXIL_arready),
        .AXIL_awready_sig_reg(apuAXIL_awready),
        .AXIL_bvalid_sig_reg(apuAXIL_bvalid),
        .AXIL_wready_sig_reg(apuAXIL_wready),
        .CO(myRotary_n_11),
        .D({configSynthNotLive,configSynthTFramepad,myHostif_n_134,configSynthTLinepad}),
        .DI({myHostif_n_295,myHostif_n_296,myHostif_n_297}),
        .DO({drdParrom[7:5],drdParrom[3:0]}),
        .E(ixTExp_lcl),
        .O(ccwNotCw2[13:8]),
        .Q(i_reg),
        .S({myHostif_n_97,myHostif_n_98,myHostif_n_99,myHostif_n_100,myHostif_n_101,myHostif_n_102}),
        .ackCoobufCornerToHostif(ackCoobufCornerToHostif),
        .ackFlgbufTraceToHostif(ackFlgbufTraceToHostif),
        .ackInvAcquire_sig3_out(ackInvAcquire_sig3_out),
        .ackInvAssign_sig(ackInvAssign_sig),
        .ackInvCamifConfig(ackInvCamifConfig),
        .ackInvCamifConfigSynth(ackInvCamifConfigSynth),
        .ackInvCamifGetCorereg(ackInvCamifGetCorereg),
        .ackInvCamifGetReg(ackInvCamifGetReg),
        .ackInvCamifModReg(ackInvCamifModReg),
        .ackInvCamifSetCorereg(ackInvCamifSetCorereg),
        .ackInvCamifSetReg(ackInvCamifSetReg),
        .ackInvClearMask_sig_reg(myHostif_n_312),
        .ackInvConfig_sig(ackInvConfig_sig),
        .ackInvConfig_sig0__6(ackInvConfig_sig0__6),
        .ackInvCornerAcquire(ackInvCornerAcquire),
        .ackInvCornerConfig(ackInvCornerConfig),
        .ackInvCornerSet(ackInvCornerSet),
        .ackInvCornerUnlock(ackInvCornerUnlock),
        .ackInvCputrackSelect(ackInvCputrackSelect),
        .ackInvCputrackSet(ackInvCputrackSet),
        .ackInvDecimAcquire(ackInvDecimAcquire),
        .ackInvDecimConfig(ackInvDecimConfig),
        .ackInvDecimSet(ackInvDecimSet),
        .ackInvDecimUnlock(ackInvDecimUnlock),
        .ackInvDirectorConfig(ackInvDirectorConfig),
        .ackInvDirectorSet(ackInvDirectorSet),
        .ackInvHdrengAssign(ackInvHdrengAssign),
        .ackInvHdrengSet(ackInvHdrengSet),
        .ackInvHshktrackClearMask(ackInvHshktrackClearMask),
        .ackInvHshktrackSelect(ackInvHshktrackSelect),
        .ackInvHshktrackSet(ackInvHshktrackSet),
        .ackInvHshktrackSetMask(ackInvHshktrackSetMask),
        .ackInvLaserSet(ackInvLaserSet),
        .ackInvMemtrackClearMask(ackInvMemtrackClearMask),
        .ackInvMemtrackSelect(ackInvMemtrackSelect),
        .ackInvMemtrackSet(ackInvMemtrackSet),
        .ackInvMemtrackSetMask(ackInvMemtrackSetMask),
        .ackInvModReg_sig_reg(myHostif_n_181),
        .ackInvRotaryConfig(ackInvRotaryConfig),
        .ackInvRotaryMoveto(ackInvRotaryMoveto),
        .ackInvRotarySet(ackInvRotarySet),
        .ackInvRotaryZero(ackInvRotaryZero),
        .ackInvSelect_sig_reg(myHostif_n_313),
        .ackInvSelect_sig_reg_0(myHostif_n_314),
        .ackInvSetMask_sig_i_2__0_0(myHostif_n_310),
        .ackInvSetMask_sig_reg(myHostif_n_270),
        .ackInvSet_sig(ackInvSet_sig_4),
        .ackInvSet_sig_0(ackInvSet_sig_1),
        .ackInvSet_sig_1(ackInvSet_sig),
        .ackInvSet_sig_i_8_0(myHostif_n_326),
        .ackInvSet_sig_reg({rotaryGetInfoTixVState,myRotary_n_34}),
        .ackInvStepmuxSet(ackInvStepmuxSet),
        .ackInvTkclksrcSetTkst(ackInvTkclksrcSetTkst),
        .ackInvTraceAcquire(ackInvTraceAcquire),
        .ackInvTraceConfig(ackInvTraceConfig),
        .ackInvUnlock_sig0_in(ackInvUnlock_sig0_in),
        .ackInvVidtrackSelect(ackInvVidtrackSelect),
        .ackInvVidtrackSet(ackInvVidtrackSet),
        .ackPvwbufDecimToHostif(ackPvwbufDecimToHostif),
        .ackSeqbufCputrackToHostif(ackSeqbufCputrackToHostif),
        .ackSeqbufHshktrackToHostif(ackSeqbufHshktrackToHostif),
        .ackSeqbufMemtrackToHostif(ackSeqbufMemtrackToHostif),
        .ackSeqbufVidtrackToHostif(ackSeqbufVidtrackToHostif),
        .aclk_sig(aclk_sig),
        .apuAXIL_araddr(apuAXIL_araddr),
        .apuAXIL_arvalid(apuAXIL_arvalid),
        .apuAXIL_awaddr(apuAXIL_awaddr),
        .apuAXIL_awvalid(apuAXIL_awvalid),
        .apuAXIL_bready(apuAXIL_bready),
        .apuAXIL_rdata(apuAXIL_rdata),
        .apuAXIL_rready(apuAXIL_rready),
        .apuAXIL_rvalid(apuAXIL_rvalid),
        .apuAXIL_wdata(apuAXIL_wdata),
        .apuAXIL_wstrb(apuAXIL_wstrb),
        .apuAXIL_wvalid(apuAXIL_wvalid),
        .avllenSeqbufMemtrackToHostif(avllenSeqbufMemtrackToHostif),
        .ccwNotCw0(ccwNotCw0),
        .ccwNotCw2_carry__0(rotaryGetInfoAngle),
        .ccwNotCw5_in(ccwNotCw5_in),
        .ccwNotCw_reg(myRotary_n_12),
        .ccwNotCw_reg_0(myRotary_n_14),
        .ccwNotCw_reg_1(myRotary_n_13),
        .commok(commok),
        .commok_sig_reg_0({p_0_in0,myHostif_n_385}),
        .coobufCornerToHostifAXIS_tready(coobufCornerToHostifAXIS_tready),
        .cputrackGetInfoPtr0Seqbuf(cputrackGetInfoPtr0Seqbuf),
        .cputrackGetInfoTixVState(cputrackGetInfoTixVState),
        .dneCoobufCornerToHostif(dneCoobufCornerToHostif),
        .dneFlgbufTraceToHostif(dneFlgbufTraceToHostif),
        .dnePvwbufDecimToHostif(dnePvwbufDecimToHostif),
        .dneSeqbufCputrackToHostif(dneSeqbufCputrackToHostif),
        .dneSeqbufHshktrackToHostif(dneSeqbufHshktrackToHostif),
        .dneSeqbufMemtrackToHostif(dneSeqbufMemtrackToHostif),
        .dneSeqbufVidtrackToHostif(dneSeqbufVidtrackToHostif),
        .doutb(coobufCornerToHostifAXIS_tdata),
        .flgbufTraceToHostifAXIS_tready(flgbufTraceToHostifAXIS_tready),
        .hdrNotFix(hdrNotFix),
        .hshktrackGetInfoPtr0Seqbuf(hshktrackGetInfoPtr0Seqbuf),
        .hshktrackGetInfoTixVState(hshktrackGetInfoTixVState),
        .i2cReadNotWrite_reg({myCamif_n_17,myCamif_n_18,myCamif_n_19}),
        .\i2cRegaddr[15]_i_6_0 (myHostif_n_180),
        .\i2cRegaddr_reg[13] ({myCamif_n_131,myCamif_n_132}),
        .\i2cRegaddr_reg[15] (myCamif_n_20),
        .\i_reg[2]__0 (myHostif_n_18),
        .\invbuf_reg[0][0]_0 (myHostif_n_149),
        .\invbuf_reg[0][0]_1 (myHostif_n_150),
        .\invbuf_reg[0][1]_0 (myHostif_n_261),
        .\invbuf_reg[0][4]_0 (myHostif_n_183),
        .\invbuf_reg[0][5]_0 (myHostif_n_182),
        .\invbuf_reg[0][5]_1 ({ccwNotCw2[14],myHostif_n_289,myHostif_n_290,myHostif_n_291}),
        .\invbuf_reg[0][5]_2 ({myHostif_n_292,myHostif_n_293,myHostif_n_294}),
        .\invbuf_reg[0][5]_3 ({myHostif_n_298,myHostif_n_299,myHostif_n_300}),
        .\invbuf_reg[0][5]_4 (myHostif_n_301),
        .\invbuf_reg[0][7]_0 (configHdrNotFix),
        .\invbuf_reg[0][7]_1 ({myHostif_n_170,myHostif_n_171,myHostif_n_172,myHostif_n_173,myHostif_n_174,myHostif_n_175,myHostif_n_176,myHostif_n_177,myHostif_n_178,myHostif_n_179}),
        .\invbuf_reg[0][7]_2 ({corecfgAXIL_araddr0_out[12],corecfgAXIL_araddr0_out[7:2]}),
        .\invbuf_reg[0][7]_3 ({corecfgAXIL_awaddr0_out[12],corecfgAXIL_awaddr0_out[7:2]}),
        .\invbuf_reg[0][7]_4 ({myHostif_n_331,myHostif_n_332,myHostif_n_333,myHostif_n_334,myHostif_n_335,myHostif_n_336,myHostif_n_337,myHostif_n_338}),
        .\invbuf_reg[0][7]_5 ({myHostif_n_387,myHostif_n_388}),
        .\invbuf_reg[1][0]_0 (myHostif_n_187),
        .\invbuf_reg[1][3]_0 (myHostif_n_186),
        .\invbuf_reg[1][4]_0 (myHostif_n_185),
        .\invbuf_reg[1][6]_0 (myHostif_n_184),
        .\invbuf_reg[1][7]_0 ({myHostif_n_111,myHostif_n_112,myHostif_n_113,myHostif_n_114,myHostif_n_115,myHostif_n_116,myHostif_n_117,myHostif_n_118}),
        .\invbuf_reg[2][7]_0 ({myHostif_n_206,myHostif_n_207,myHostif_n_208,myHostif_n_209,myHostif_n_210,myHostif_n_211,myHostif_n_212,myHostif_n_213,myHostif_n_214,myHostif_n_215,myHostif_n_216,myHostif_n_217,myHostif_n_218,myHostif_n_219,myHostif_n_220,myHostif_n_221,myHostif_n_222,myHostif_n_223,myHostif_n_224,myHostif_n_225,myHostif_n_226,myHostif_n_227,myHostif_n_228,myHostif_n_229,myHostif_n_230,myHostif_n_231,myHostif_n_232,myHostif_n_233,myHostif_n_234,myHostif_n_235,myHostif_n_236,myHostif_n_237}),
        .\invbuf_reg[4][7]_0 ({setCoreregVal,camifSetCoreregVal[8]}),
        .\invbuf_reg[5][7]_0 (camifSetCoreregVal[7:0]),
        .\invbuf_reg[6][2]_0 (configCol0),
        .\invbuf_reg[8][2]_0 (configCol1),
        .linNotRot_reg(myStepmux_n_1),
        .\mask_reg[0] (myHostif_n_152),
        .\mask_reg[0]_0 (myHostif_n_265),
        .\mask_reg[0]_1 (myHshktrack_n_74),
        .\mask_reg[0]_2 (myMemtrack_n_71),
        .\mask_reg[1] (myHostif_n_151),
        .\mask_reg[1]_0 (myHostif_n_264),
        .\mask_reg[1]_1 (myHshktrack_n_73),
        .\mask_reg[1]_2 (myMemtrack_n_70),
        .\mask_reg[2] (myHostif_n_263),
        .\mask_reg[2]_0 (myHshktrack_n_72),
        .\mask_reg[2]_1 (myMemtrack_n_69),
        .\mask_reg[3] (myHostif_n_262),
        .\mask_reg[3]_0 (myHostif_n_303),
        .\mask_reg[3]_1 (myHshktrack_n_71),
        .\mask_reg[3]_2 (myMemtrack_n_68),
        .\mask_reg[4] (myHostif_n_148),
        .\mask_reg[4]_0 (myHostif_n_260),
        .\mask_reg[4]_1 (myHshktrack_n_70),
        .\mask_reg[4]_2 (myMemtrack_n_67),
        .\mask_reg[5] (myHostif_n_147),
        .\mask_reg[5]_0 (myHostif_n_259),
        .\mask_reg[5]_1 (myHshktrack_n_107),
        .\mask_reg[5]_2 (myHshktrack_n_69),
        .\mask_reg[5]_3 (myMemtrack_n_66),
        .\mask_reg[6] (myHostif_n_258),
        .\mask_reg[6]_0 (myMemtrack_n_65),
        .\mask_reg[7] (myHostif_n_257),
        .\mask_reg[7]_0 (myMemtrack_n_81),
        .\mask_reg[7]_1 (myMemtrack_n_64),
        .memtrackGetInfoTixVState(memtrackGetInfoTixVState),
        .\pollbuf[2][3]_i_2_0 ({avllenCoobufCornerToHostif,coobufCornerToHostifAXIS_tvalid}),
        .\pollbuf[2][4]_i_2_0 (avllenSeqbufVidtrackToHostif),
        .\pollbuf[2][4]_i_2_1 (avllenSeqbufCputrackToHostif),
        .\pollbuf[2][7]_i_2_0 ({avllenFlgbufTraceToHostif,flgbufTraceToHostifAXIS_tvalid}),
        .\pollbuf_reg[2][4]_0 (avllenSeqbufHshktrackToHostif),
        .\pollbuf_reg[2][7]_0 ({avllenPvwbufDecimToHostif,pvwbufDecimToHostifAXIS_tvalid}),
        .pvwbufDecimToHostifAXIS_tready(pvwbufDecimToHostifAXIS_tready),
        .reqCoobufCornerToHostif(reqCoobufCornerToHostif),
        .reqFlgbufTraceToHostif(reqFlgbufTraceToHostif),
        .reqInvAcquire(reqInvAcquire),
        .reqInvAssign(reqInvAssign),
        .reqInvConfig(reqInvConfig),
        .reqInvConfigSynth(reqInvConfigSynth),
        .reqInvCornerConfig(reqInvCornerConfig),
        .reqInvCputrackSet(reqInvCputrackSet),
        .reqInvDecimAcquire(reqInvDecimAcquire),
        .reqInvDecimConfig(reqInvDecimConfig),
        .reqInvDecimSet(reqInvDecimSet),
        .reqInvDecimUnlock(reqInvDecimUnlock),
        .reqInvDirectorConfig(reqInvDirectorConfig),
        .reqInvDirectorSet(reqInvDirectorSet),
        .reqInvGetCorereg(reqInvGetCorereg),
        .reqInvGetReg(reqInvGetReg),
        .reqInvHdrengSet(reqInvHdrengSet),
        .reqInvHshktrackClearMask(reqInvHshktrackClearMask),
        .reqInvHshktrackSelect(reqInvHshktrackSelect),
        .reqInvHshktrackSet(reqInvHshktrackSet),
        .reqInvHshktrackSetMask(reqInvHshktrackSetMask),
        .reqInvLaserSet(reqInvLaserSet),
        .reqInvMemtrackClearMask(reqInvMemtrackClearMask),
        .reqInvMemtrackSelect(reqInvMemtrackSelect),
        .reqInvMemtrackSet(reqInvMemtrackSet),
        .reqInvMemtrackSetMask(reqInvMemtrackSetMask),
        .reqInvModReg(reqInvModReg),
        .reqInvRotaryConfig(reqInvRotaryConfig),
        .reqInvRotaryMoveto(reqInvRotaryMoveto),
        .reqInvRotaryZero(reqInvRotaryZero),
        .reqInvSelect(reqInvSelect),
        .reqInvSetCorereg(reqInvSetCorereg),
        .reqInvSetReg(reqInvSetReg),
        .reqInvStepmuxSet(reqInvStepmuxSet),
        .reqInvTkclksrcSetTkst(reqInvTkclksrcSetTkst),
        .reqInvTraceAcquire(reqInvTraceAcquire),
        .reqInvTraceConfig(reqInvTraceConfig),
        .reqInvVidtrackSelect(reqInvVidtrackSelect),
        .reqInvVidtrackSet(reqInvVidtrackSet),
        .reqPvwbufDecimToHostif(reqPvwbufDecimToHostif),
        .reqReset_sig_reg_0(myHostif_n_17),
        .reqReset_sig_reg_1(i),
        .reqSeqbufCputrackToHostif(reqSeqbufCputrackToHostif),
        .reqSeqbufHshktrackToHostif(reqSeqbufHshktrackToHostif),
        .reqSeqbufMemtrackToHostif(reqSeqbufMemtrackToHostif),
        .reqSeqbufVidtrackToHostif(reqSeqbufVidtrackToHostif),
        .reset_reg(reset_i_2_n_0),
        .\retbuf[0][0]_i_2_0 (myCamif_n_130),
        .\retbuf[0][3]_i_3_0 (myCamif_n_128),
        .\retbuf[0][4]_i_3_0 (myCamif_n_127),
        .\retbuf[0][5]_i_3_0 (myCamif_n_126),
        .\retbuf[0][6]_i_4_0 (myCamif_n_97),
        .\retbuf[0][7]_i_10 (tkclksrcGetTkstTkst),
        .\retbuf[0][7]_i_10_0 ({hdrengGetInfoTixVState[7],hdrengGetInfoTixVState[1:0]}),
        .\retbuf[0][7]_i_20_0 ({camifGetCoreregVal[31],camifGetCoreregVal[26],camifGetCoreregVal[23:0]}),
        .\retbuf[0][7]_i_20_1 (ddrifGetStatsNRdA),
        .\retbuf[0][7]_i_20_2 ({camifGetRegVal[7],camifGetRegVal[2]}),
        .\retbuf[1][7]_i_8_0 (cputrackGetInfoTCapt),
        .\retbuf[1][7]_i_8_1 (hshktrackGetInfoTCapt),
        .\retbuf[1][7]_i_8_2 (memtrackGetInfoTCapt),
        .\retbuf[4][7]_i_12_0 (ddrifGetStatsNRdB),
        .\retbuf[5][1]_i_2_0 (memtrackGetInfoPtr0Seqbuf),
        .\retbuf[5][7]_i_5_0 (cornerGetInfoScoreMin),
        .\retbuf[5][7]_i_5_1 (hdrengGetInfoIxMem),
        .\retbuf[6][7]_i_4_0 (cornerGetInfoScoreMax),
        .\retbuf[6][7]_i_4_1 (hdrengGetInfoIxMemAcq),
        .\retbuf_reg[0][1]_i_5_0 (myCamif_n_129),
        .\retbuf_reg[12][7]_0 (ddrifGetStatsNWrB),
        .\retbuf_reg[1][7]_0 (vidtrackGetInfoTCapt),
        .\retbuf_reg[1][7]_i_13_0 (cornerGetInfoTkst),
        .\retbuf_reg[1][7]_i_13_1 (decimGetInfoTkst),
        .\retbuf_reg[1][7]_i_13_2 (hdrengGetInfoTkst),
        .\retbuf_reg[8][7]_0 (ddrifGetStatsNWrA),
        .rng(rng),
        .rng_reg(myHostif_n_1),
        .rng_reg_0(myHostif_n_11),
        .rng_reg_1(myHostif_n_93),
        .rng_reg_10(myRotary_n_4),
        .rng_reg_11(myHshktrack_n_67),
        .rng_reg_12(myCorner_n_68),
        .rng_reg_13(myHdreng_n_4),
        .rng_reg_2(myHostif_n_143),
        .rng_reg_3(myHostif_n_153),
        .rng_reg_4(stateOp_5),
        .rng_reg_5(myHostif_n_328),
        .rng_reg_6(myHostif_n_329),
        .rng_reg_7(myDecim_n_69),
        .rng_reg_8(myHdreng_n_1),
        .rng_reg_9(myMemtrack_n_76),
        .rng_sig_reg(myDirector_n_2),
        .\seq[1]_2 (\seq[1]_2 ),
        .seqbufCputrackToHostifAXIS_tready(seqbufCputrackToHostifAXIS_tready),
        .seqbufCputrackToHostifAXIS_tvalid(seqbufCputrackToHostifAXIS_tvalid),
        .seqbufHshktrackToHostifAXIS_tready(seqbufHshktrackToHostifAXIS_tready),
        .seqbufHshktrackToHostifAXIS_tvalid(seqbufHshktrackToHostifAXIS_tvalid),
        .seqbufMemtrackToHostifAXIS_tready(seqbufMemtrackToHostifAXIS_tready),
        .seqbufMemtrackToHostifAXIS_tvalid(seqbufMemtrackToHostifAXIS_tvalid),
        .seqbufVidtrackToHostifAXIS_tready(seqbufVidtrackToHostifAXIS_tready),
        .seqbufVidtrackToHostifAXIS_tvalid(seqbufVidtrackToHostifAXIS_tvalid),
        .\staTixVTrigger[7]_i_3__0_0 (myHostif_n_311),
        .stateCorecfg0(stateCorecfg0),
        .\stateCorecfg[2]_i_4_0 (myHostif_n_205),
        .\stateLive_reg[2] (myHostif_n_166),
        .stateMclk(stateMclk),
        .stateOp0_out(stateOp0_out),
        .stateOp47_out(stateOp47_out),
        .stateOp5_out(stateOp5_out),
        .stateOp_reg(myHostif_n_7),
        .\stateOp_reg[0]_0 (myHostif_n_157),
        .\stateOp_reg[0]_1 (myHostif_n_158),
        .\stateOp_reg[0]_2 (myHostif_n_283),
        .\stateOp_reg[0]_3 (TCaptMax),
        .\stateOp_reg[0]_4 (staTixVTrigger),
        .\stateOp_reg[0]_5 (myHostif_n_323),
        .\stateOp_reg[0]_6 (ackInvUnlock_sig),
        .\stateOp_reg[0]_7 ({myDecim_n_79,myDecim_n_80}),
        .\stateOp_reg[0]_8 (myRotary_n_35),
        .\stateOp_reg[0]_9 ({myCorner_n_93,myCorner_n_94}),
        .\stateOp_reg[1]_0 (myHostif_n_280),
        .\stateOp_reg[1]_1 (myHostif_n_286),
        .\stateOp_reg[1]_2 (myHostif_n_287),
        .\stateOp_reg[1]_3 (ackInvMoveto_sig),
        .\stateOp_reg[1]_4 (stateOp),
        .\stateOp_reg[1]_5 (myHostif_n_325),
        .\stateOp_reg[1]_6 (reset_reg_n_0),
        .\stateOp_reg[2]_0 (TCaptMax_3),
        .\stateOp_reg[2]_1 (staTixVTrigger_2),
        .\stateOp_reg[5]_0 (stateOp_6),
        .stateOp_reg_0(myHostif_n_10),
        .stateOp_reg_1(myHostif_n_15),
        .stateOp_reg_2(ackInvConfigSynth_sig),
        .stateOp_reg_3(myHostif_n_276),
        .stateOp_reg_4(myHostif_n_339),
        .stateOp_reg_5(myCamif_n_9),
        .stateOp_reg_6(myTrace_n_64),
        .step1__6(step1__6),
        .synthNotLive(synthNotLive),
        .targetNotSteady(targetNotSteady),
        .\tixVCommand_reg[0]_0 (myHostif_n_91),
        .\tixVCommand_reg[0]_1 (myHostif_n_160),
        .\tixVController_reg[0]_0 (myHostif_n_317),
        .\tixVController_reg[1]_0 (myHostif_n_19),
        .\tixVController_reg[1]_1 (myHostif_n_254),
        .\tixVController_reg[2]_0 (myHostif_n_268),
        .tixVState1(tixVState1),
        .\tixVState_reg[1] (myHostif_n_321),
        .\tixVState_reg[1]_0 (myDecim_n_86),
        .\tixVState_reg[1]_1 (decimGetInfoTixVState),
        .\tixVState_reg[1]_2 (cornerGetInfoTixVState),
        .\tixVState_reg[1]_3 (myCorner_n_95),
        .tkclk(tkclk),
        .tkclk_sig_reg(myHostif_n_284),
        .traceGetInfoTixVState(traceGetInfoTixVState),
        .\txAXIS_tdata[63]_i_8_0 (flgbufTraceToHostifAXIS_tdata),
        .\txAXIS_tdata[63]_i_8_1 (pvwbufDecimToHostifAXIS_tdata),
        .\txAXIS_tdata[63]_i_8_2 (seqbufHshktrackToHostifAXIS_tdata),
        .\txAXIS_tdata[63]_i_8_3 (seqbufMemtrackToHostifAXIS_tdata),
        .\txAXIS_tdata[63]_i_8_4 (seqbufCputrackToHostifAXIS_tdata),
        .\txAXIS_tdata[63]_i_8_5 (seqbufVidtrackToHostifAXIS_tdata),
        .vidtrackGetInfoPtr0Seqbuf(vidtrackGetInfoPtr0Seqbuf),
        .vidtrackGetInfoTixVState(vidtrackGetInfoTixVState));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Hshktrack myHshktrack
       (.D(configHdrNotFix),
        .E(staTixVTrigger),
        .\FSM_onehot_stateSeq_reg[3]_0 (avllenSeqbufHshktrackToHostif),
        .Q(hshktrackGetInfoTCapt),
        .\TCaptMax_reg[31]_0 ({configSynthNotLive,configSynthTFramepad,myHostif_n_134,configSynthTLinepad}),
        .\TCaptMax_reg[31]_1 (TCaptMax),
        .\TCaptMax_reg[7]_0 ({setCoreregVal,camifSetCoreregVal[8]}),
        .ackInvHshktrackClearMask(ackInvHshktrackClearMask),
        .ackInvHshktrackSelect(ackInvHshktrackSelect),
        .ackInvHshktrackSet(ackInvHshktrackSet),
        .ackInvHshktrackSetMask(ackInvHshktrackSetMask),
        .ackInvSetMask_sig_reg_0(myHostif_n_311),
        .ackInvSet_sig_i_2__3_0(myHostif_n_313),
        .ackSeqbufHshktrackToHostif(ackSeqbufHshktrackToHostif),
        .aclk_sig(aclk_sig),
        .\capt_reg[5]_0 ({myRotary_n_36,myRpuif_n_37,myHostif_n_303,myCorner_n_89,myCorner_n_90,myCamif_n_78}),
        .dneSeqbufHshktrackToHostif(dneSeqbufHshktrackToHostif),
        .doutb(seqbufHshktrackToHostifAXIS_tdata),
        .enSeqbuf_reg_0(reset_reg_n_0),
        .hshktrackGetInfoPtr0Seqbuf(hshktrackGetInfoPtr0Seqbuf),
        .hshktrackGetInfoTixVState(hshktrackGetInfoTixVState),
        .\mask_reg[0]_0 (myHshktrack_n_74),
        .\mask_reg[0]_1 (myHostif_n_152),
        .\mask_reg[1]_0 (myHshktrack_n_73),
        .\mask_reg[1]_1 (myHostif_n_151),
        .\mask_reg[2]_0 (myHshktrack_n_72),
        .\mask_reg[2]_1 (myHostif_n_150),
        .\mask_reg[3]_0 (myHshktrack_n_71),
        .\mask_reg[3]_1 (myHostif_n_149),
        .\mask_reg[4]_0 (myHshktrack_n_70),
        .\mask_reg[4]_1 (myHostif_n_148),
        .\mask_reg[5]_0 (myHshktrack_n_69),
        .\mask_reg[5]_1 (myHostif_n_147),
        .reqInvHshktrackClearMask(reqInvHshktrackClearMask),
        .reqInvHshktrackSelect(reqInvHshktrackSelect),
        .reqInvHshktrackSet(reqInvHshktrackSet),
        .reqInvHshktrackSetMask(reqInvHshktrackSetMask),
        .reqSeqbufHshktrackToHostif(reqSeqbufHshktrackToHostif),
        .restart_reg_0(myHostif_n_312),
        .restart_reg_1(myHostif_n_310),
        .rng_reg_0(myHshktrack_n_67),
        .rng_reg_1(myHostif_n_143),
        .seqbufHshktrackToHostifAXIS_tready(seqbufHshktrackToHostifAXIS_tready),
        .seqbufHshktrackToHostifAXIS_tvalid(seqbufHshktrackToHostifAXIS_tvalid),
        .\stateOp_reg[0]_0 (myHshktrack_n_107));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Laser myLaser
       (.D({configSynthNotLive,configSynthTFramepad[1],myHostif_n_134,configSynthTLinepad}),
        .\FSM_sequential_stateXfer_reg[2] (reset_reg_n_0),
        .ackInvLaserSet(ackInvLaserSet),
        .aclk_sig(aclk_sig),
        .cs(cs),
        .mosi(mosi),
        .reqInvLaserSet(reqInvLaserSet),
        .sclk(sclk),
        .\txbuf_reg[0][3]_0 (configHdrNotFix[1:0]));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Memtrack myMemtrack
       (.AR(resetMemclk),
        .D({configSynthNotLive,configSynthTFramepad,myHostif_n_134,configSynthTLinepad}),
        .E(staTixVTrigger_2),
        .Q(memtrackGetInfoTCapt),
        .\TCaptMax_reg[31]_0 (TCaptMax_3),
        .\TCaptMax_reg[7]_0 ({setCoreregVal,camifSetCoreregVal[8]}),
        .ackInvMemtrackClearMask(ackInvMemtrackClearMask),
        .ackInvMemtrackSelect(ackInvMemtrackSelect),
        .ackInvMemtrackSet(ackInvMemtrackSet),
        .ackInvMemtrackSetMask(ackInvMemtrackSetMask),
        .ackSeqbufMemtrackToHostif(ackSeqbufMemtrackToHostif),
        .aclk_sig(aclk_sig),
        .avllenSeqbufMemtrackToHostif(avllenSeqbufMemtrackToHostif),
        .\capt_reg[0]_0 ({myHdreng_n_8,p_1_out1,myHdreng_n_10,myHdreng_n_11}),
        .\capt_reg[1]_0 (rdmutex),
        .\capt_reg[1]_1 (ackRd),
        .\capt_reg[3]_0 (myDdrif_n_37),
        .\capt_reg[3]_1 (ackWr),
        .\capt_reg[5]_0 (myHdreng_n_14),
        .\capt_reg[8]_0 (stateEgrstr),
        .ddrAXI_bvalid(ddrAXI_bvalid),
        .ddrAXI_rvalid(ddrAXI_rvalid),
        .ddrAXI_wready(ddrAXI_wready),
        .dneSeqbufMemtrackToHostif(dneSeqbufMemtrackToHostif),
        .doutb(seqbufMemtrackToHostifAXIS_tdata),
        .\mask_reg[0]_0 (myMemtrack_n_71),
        .\mask_reg[0]_1 (myHostif_n_265),
        .\mask_reg[1]_0 (myMemtrack_n_70),
        .\mask_reg[1]_1 (myHostif_n_264),
        .\mask_reg[2]_0 (myMemtrack_n_69),
        .\mask_reg[2]_1 (myHostif_n_263),
        .\mask_reg[3]_0 (myMemtrack_n_68),
        .\mask_reg[3]_1 (myHostif_n_262),
        .\mask_reg[4]_0 (myMemtrack_n_67),
        .\mask_reg[4]_1 (myHostif_n_260),
        .\mask_reg[5]_0 (myMemtrack_n_66),
        .\mask_reg[5]_1 (myHostif_n_259),
        .\mask_reg[6]_0 (myMemtrack_n_65),
        .\mask_reg[6]_1 (myHostif_n_258),
        .\mask_reg[7]_0 (myMemtrack_n_64),
        .\mask_reg[7]_1 (myHostif_n_257),
        .\mask_reg[8]_0 (myHostif_n_261),
        .memclk(memclk),
        .memtrackGetInfoTixVState(memtrackGetInfoTixVState),
        .\ptr0Seqbuf_mclk_reg[9]_0 (memtrackGetInfoPtr0Seqbuf),
        .\ptr0Seqbuf_to_mclkm2_reg[0]_0 (reset_reg_n_0),
        .reqInvMemtrackClearMask(reqInvMemtrackClearMask),
        .reqInvMemtrackSelect(reqInvMemtrackSelect),
        .reqInvMemtrackSet(reqInvMemtrackSet),
        .reqInvMemtrackSetMask(reqInvMemtrackSetMask),
        .reqSeqbufMemtrackToHostif(reqSeqbufMemtrackToHostif),
        .restart_reg_0(myHostif_n_270),
        .rng_reg_0(myMemtrack_n_76),
        .rng_reg_1(myHostif_n_11),
        .seqbufMemtrackToHostifAXIS_tready(seqbufMemtrackToHostifAXIS_tready),
        .seqbufMemtrackToHostifAXIS_tvalid(seqbufMemtrackToHostifAXIS_tvalid),
        .\staTixVTrigger_reg[7]_0 (configHdrNotFix),
        .start_reg_0(rgbToManyAXIS_tlast_sig_reg),
        .\stateOp_reg[2]_0 (myMemtrack_n_81),
        .stop_reg_0(vsync),
        .strb_last_reg_0(myHostif_n_268));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Rgbled_v1_0 myRgbled0
       (.D({myRgbled0_n_8,myRgbled0_n_9,myRgbled0_n_10,myRgbled0_n_11}),
        .DI({myState_n_11,myState_n_12}),
        .Q(myState_n_3),
        .S({myState_n_9,myState_n_10}),
        .aclk_sig(aclk_sig),
        .\i_reg[0]__1_0 (reset_reg_n_0),
        .\i_reg[6]_0 (sel0__0),
        .\i_reg[7]_0 (myRgbled0_n_7),
        .\i_reg[7]__1_0 (myRgbled0_n_12),
        .rgb0({rgb0[21],rgb0[5]}),
        .rgb0_b(rgb0_b),
        .rgb0_g(rgb0_g),
        .rgb0_r(rgb0_r),
        .\seq_reg[1]_0 (\seq_reg[1]_0 ),
        .stateBlue_i_2_0(myState_n_6),
        .\stateGreen0_inferred__0/i__carry_0 (myState_n_13),
        .stateGreen_reg_0({myState_n_4,myState_n_5}),
        .stateGreen_reg_1({myState_n_1,myState_n_2}));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Rotary myRotary
       (.CO(myRotary_n_11),
        .D(configSynthNotLive),
        .DI({myHostif_n_295,myHostif_n_296,myHostif_n_297}),
        .E(ackInvMoveto_sig),
        .O(ccwNotCw2[13:8]),
        .Q(rotaryGetInfoAngle),
        .S({myHostif_n_97,myHostif_n_98,myHostif_n_99,myHostif_n_100,myHostif_n_101,myHostif_n_102}),
        .ackInvConfig_sig0__6(ackInvConfig_sig0__6),
        .ackInvRotaryConfig(ackInvRotaryConfig),
        .ackInvRotaryMoveto(ackInvRotaryMoveto),
        .ackInvRotarySet(ackInvRotarySet),
        .ackInvRotaryZero(ackInvRotaryZero),
        .ackInvSet_sig(ackInvSet_sig_1),
        .ackInvZero_sig_reg_0(myHostif_n_287),
        .aclk_sig(aclk_sig),
        .\capt_reg[5] (myHshktrack_n_69),
        .ccwNotCw0(ccwNotCw0),
        .ccwNotCw5_in(ccwNotCw5_in),
        .ccwNotCw_reg_0({ccwNotCw2[14],myHostif_n_289,myHostif_n_290,myHostif_n_291}),
        .ccwNotCw_reg_1({myHostif_n_292,myHostif_n_293,myHostif_n_294}),
        .ccwNotCw_reg_2(myHostif_n_301),
        .ccwNotCw_reg_3({myHostif_n_298,myHostif_n_299,myHostif_n_300}),
        .dir(dir),
        .dir_0(myStepmux_n_1),
        .i__carry_i_11__1_0(myRotary_n_13),
        .i__carry_i_11__1_1({myHostif_n_111,myHostif_n_112,myHostif_n_113,myHostif_n_114,myHostif_n_115,myHostif_n_116,myHostif_n_117,myHostif_n_118}),
        .\i_reg[3]_0 (myHostif_n_283),
        .\invbuf_reg[0][5] (myRotary_n_12),
        .\invbuf_reg[0][5]_0 (myRotary_n_14),
        .\lsb_reg[1]_0 ({myHostif_n_387,myHostif_n_388}),
        .m0(m0),
        .m0z(m0z),
        .reqInvRotaryConfig(reqInvRotaryConfig),
        .reqInvRotaryMoveto(reqInvRotaryMoveto),
        .reqInvRotaryZero(reqInvRotaryZero),
        .rng_reg_0(myRotary_n_4),
        .rng_reg_1(myRotary_n_35),
        .rng_reg_2(myHostif_n_93),
        .\stateOp_reg[0]_0 (myHostif_n_280),
        .\stateOp_reg[1]_0 ({rotaryGetInfoTixVState,myRotary_n_34}),
        .\stateOp_reg[1]_1 (myHostif_n_286),
        .\stateOp_reg[1]_2 (myHostif_n_284),
        .step(step),
        .step1__6(step1__6),
        .step_reg_0(myRotary_n_36),
        .targetNotSteady(targetNotSteady),
        .\tixVStepmode_reg[0]_0 (reset_reg_n_0),
        .\tixVStepmode_reg[7]_0 (configHdrNotFix),
        .tkclk(tkclk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Rpuif myRpuif
       (.AXIL_arready(rpuAXIL_arready),
        .AXIL_awready_sig_reg(rpuAXIL_awready),
        .AXIL_bvalid_sig_reg(rpuAXIL_bvalid),
        .AXIL_wready_sig_reg(rpuAXIL_wready),
        .Q(stateOp_7),
        .aclk_sig(aclk_sig),
        .\capt_reg[4] (myHshktrack_n_70),
        .\mask_reg[4] (myRpuif_n_37),
        .\retbuf_reg[0][1]_0 (cornerGetInfoTixVState),
        .\retbuf_reg[1][7]_0 (cornerGetInfoTkst),
        .\retbuf_reg[5][7]_0 (cornerGetInfoScoreMin),
        .\retbuf_reg[6][7]_0 (cornerGetInfoScoreMax),
        .rpuAXIL_araddr(rpuAXIL_araddr),
        .rpuAXIL_arvalid(rpuAXIL_arvalid),
        .rpuAXIL_awaddr(rpuAXIL_awaddr),
        .rpuAXIL_awvalid(rpuAXIL_awvalid),
        .rpuAXIL_bready(rpuAXIL_bready),
        .rpuAXIL_rdata(rpuAXIL_rdata),
        .rpuAXIL_rready(rpuAXIL_rready),
        .rpuAXIL_rvalid(rpuAXIL_rvalid),
        .rpuAXIL_wdata(rpuAXIL_wdata),
        .rpuAXIL_wstrb(rpuAXIL_wstrb),
        .rpuAXIL_wvalid(rpuAXIL_wvalid),
        .\stateOp_reg[0]_0 (reset_reg_n_0),
        .tkclk(tkclk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_State myState
       (.D({myRgbled0_n_8,myRgbled0_n_9,myRgbled0_n_10,myRgbled0_n_11}),
        .DI({myState_n_11,myState_n_12}),
        .Q(myState_n_3),
        .S({myState_n_9,myState_n_10}),
        .aclk_sig(aclk_sig),
        .\i_reg[0]_0 (i_reg_8),
        .\i_reg[0]_1 (reset_reg_n_0),
        .\i_reg[0]_2 (p_0_in),
        .\ixSeq_reg[0]_0 ({myState_n_4,myState_n_5}),
        .\ixSeq_reg[1]_0 ({myState_n_1,myState_n_2}),
        .rgb0({rgb0[21],rgb0[5]}),
        .\seq[1]_2 (\seq[1]_2 ),
        .\seq_reg[0][21]_0 ({p_0_in0,myHostif_n_385}),
        .\seq_reg[0][5]_0 (myState_n_6),
        .\seq_reg[1][13]_0 (\seq_reg[1]_0 ),
        .\seq_reg[1][13]_1 (myState_n_13),
        .\seq_reg[1][5]_0 (myDirector_n_17),
        .\stateBlue0_inferred__0/i__carry (myRgbled0_n_12),
        .\stateRed0_inferred__0/i__carry (sel0__0),
        .\stateRed0_inferred__0/i__carry_0 (myRgbled0_n_7),
        .stateStats(stateStats),
        .tkclk(tkclk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Stepmux myStepmux
       (.ackInvStepmuxSet(ackInvStepmuxSet),
        .aclk_sig(aclk_sig),
        .linNotRot_reg_0(myStepmux_n_1),
        .linNotRot_reg_1(myHostif_n_15),
        .nslp(nslp),
        .reqInvStepmuxSet(reqInvStepmuxSet),
        .stateOp_reg_0(reset_reg_n_0));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Tkclksrc_Easy_v1_0 myTkclksrc
       (.D({configSynthNotLive,configSynthTFramepad,myHostif_n_134,configSynthTLinepad}),
        .Q(tkclksrcGetTkstTkst),
        .ackInvTkclksrcSetTkst(ackInvTkclksrcSetTkst),
        .aclk_sig(aclk_sig),
        .reqInvTkclksrcSetTkst(reqInvTkclksrcSetTkst),
        .\stateOp_reg[1]_0 (myHostif_n_19),
        .tkclk(tkclk),
        .tkclk_sig_reg_0(reset_reg_n_0),
        .\tkst_reg[31]_0 (configHdrNotFix));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Trace myTrace
       (.Q({avllenFlgbufTraceToHostif,flgbufTraceToHostifAXIS_tvalid}),
        .ackFlgbufTraceToHostif(ackFlgbufTraceToHostif),
        .ackInvAcquire_sig3_out(ackInvAcquire_sig3_out),
        .ackInvConfig_sig(ackInvConfig_sig),
        .ackInvTraceAcquire(ackInvTraceAcquire),
        .ackInvTraceConfig(ackInvTraceConfig),
        .aclk_sig(aclk_sig),
        .dneFlgbufTraceToHostif(dneFlgbufTraceToHostif),
        .doutb(flgbufTraceToHostifAXIS_tdata),
        .flgbufTraceToHostifAXIS_tready(flgbufTraceToHostifAXIS_tready),
        .reqFlgbufTraceToHostif(reqFlgbufTraceToHostif),
        .reqInvTraceAcquire(reqInvTraceAcquire),
        .reqInvTraceConfig(reqInvTraceConfig),
        .stateOp5_out(stateOp5_out),
        .stateOp_reg_0(myTrace_n_64),
        .\tixVState_reg[0]_0 (reset_reg_n_0),
        .traceGetInfoTixVState(traceGetInfoTixVState));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Videoin myVideoin
       (.DI({myVideoin_n_63,myVideoin_n_64,myVideoin_n_65,myVideoin_n_66}),
        .E(myCamif_n_85),
        .\FSM_sequential_stateRgbegr_reg[2]_0 ({videoinStateRgbegr_dbg[6:5],stateRgbegr}),
        .\NColRaw_sig_reg[4] (myVideoin_n_165),
        .O(dwrAccbuf),
        .Q({myVideoin_n_4,myVideoin_n_5,myVideoin_n_6,myVideoin_n_7,myVideoin_n_8}),
        .\abcde_reg[0]_0 ({grayVideoinToManyAXIS_tdata[59:52],grayVideoinToManyAXIS_tdata[47:40],grayVideoinToManyAXIS_tdata[35:28],grayVideoinToManyAXIS_tdata[23:16],grayVideoinToManyAXIS_tdata[11:4]}),
        .\abcde_reg[0]_1 ({myVideoin_n_116,myVideoin_n_117,myVideoin_n_118,myVideoin_n_119,myVideoin_n_120,myVideoin_n_121,myVideoin_n_122,myVideoin_n_123,myVideoin_n_124,myVideoin_n_125,myVideoin_n_126,myVideoin_n_127,myVideoin_n_128,myVideoin_n_129,myVideoin_n_130,myVideoin_n_131,myVideoin_n_132,myVideoin_n_133,myVideoin_n_134,myVideoin_n_135,myVideoin_n_136,myVideoin_n_137,myVideoin_n_138,myVideoin_n_139,myVideoin_n_140,myVideoin_n_141,myVideoin_n_142,myVideoin_n_143,myVideoin_n_144,myVideoin_n_145,myVideoin_n_146,myVideoin_n_147,myVideoin_n_148,myVideoin_n_149,myVideoin_n_150,myVideoin_n_151,myVideoin_n_152,myVideoin_n_153,myVideoin_n_154,myVideoin_n_155,myVideoin_n_156,myVideoin_n_157,myVideoin_n_158,myVideoin_n_159,myVideoin_n_160}),
        .aclk_sig(aclk_sig),
        .camifToVideoinAXIS_tdata(camifToVideoinAXIS_tdata),
        .camifToVideoinAXIS_tlast(camifToVideoinAXIS_tlast),
        .camifToVideoinAXIS_tvalid(camifToVideoinAXIS_tvalid),
        .\col_lcl_reg[4]_0 (myVideoin_n_166),
        .\col_lcl_reg[5]_0 (myVideoin_n_9),
        .\col_lcl_reg[5]_1 (myVideoin_n_13),
        .\dwrAccbuf_reg[7] ({myDecim_n_126,myDecim_n_127,myDecim_n_128,myDecim_n_129,myDecim_n_130,myDecim_n_131,myDecim_n_132,myDecim_n_133}),
        .\dwrEobuf_reg[36]_0 (myCamif_n_87),
        .\dwrEobuf_reg[56]_0 (myCamif_n_96),
        .\dwrEobuf_reg[57]_0 (myCamif_n_95),
        .\dwrEobuf_reg[58]_0 (myCamif_n_94),
        .\dwrEobuf_reg[59]_0 (myCamif_n_93),
        .\dwrEobuf_reg[60]_0 (myCamif_n_92),
        .\dwrEobuf_reg[61]_0 (myCamif_n_91),
        .\dwrEobuf_reg[62]_0 (myCamif_n_90),
        .\dwrEobuf_reg[63]_0 (myCamif_n_89),
        .\dwrEobuf_reg[63]_1 (myCamif_n_86),
        .\dy_reg[8] (myCorner_n_69),
        .enAccbuf0(enAccbuf0),
        .enAccbuf1(enAccbuf1),
        .enAccbuf_reg(myDecim_n_68),
        .enEobufB_reg_0(myDirector_n_43),
        .enEobufB_reg_1(myCamif_n_88),
        .enRowbufB_lcl_reg_0(reset_reg_n_0),
        .enRowbuf_reg_0(NColRaw),
        .grayToManyAXIS_tvalid_sig_reg_0(myVideoin_n_61),
        .grayVideoinToManyAXIS_tlast(grayVideoinToManyAXIS_tlast),
        .grayVideoinToManyAXIS_tvalid(grayVideoinToManyAXIS_tvalid),
        .\klm_reg[0]_0 (klm),
        .oddNotEven_reg_0(vsync),
        .\rgbToManyAXIS_tdata_sig_reg[35]_0 (rgbVideoinToManyAXIS_tdata),
        .\rgbToManyAXIS_tdata_sig_reg[7]_0 ({myVideoin_n_17,myVideoin_n_18,myVideoin_n_19,myVideoin_n_20,myVideoin_n_21,myVideoin_n_22,myVideoin_n_23,myVideoin_n_24}),
        .\rgbToManyAXIS_tdata_sig_reg[7]_1 (myVideoin_n_107),
        .rgbToManyAXIS_tlast_sig_reg_0(rgbToManyAXIS_tlast_sig_reg),
        .rgbVideoinToManyAXIS_tvalid(rgbVideoinToManyAXIS_tvalid),
        .\stateIgr_reg[1]_0 ({videoinStateIgr_dbg[5],stateIgr}),
        .\stateIgr_reg[1]_1 (myCamif_n_84),
        .videoinStateIgr_dbg({videoinStateIgr_dbg[4],videoinStateIgr_dbg[0]}),
        .videoinStateRgbegr_dbg({videoinStateRgbegr_dbg[7],videoinStateRgbegr_dbg[4]}));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Vidtrack myVidtrack
       (.D({configSynthNotLive,configSynthTFramepad,myHostif_n_134,configSynthTLinepad}),
        .Q(avllenSeqbufVidtrackToHostif),
        .\TCaptMax_reg[7]_0 ({setCoreregVal,camifSetCoreregVal[8]}),
        .\TCapt_reg[31]_0 (vidtrackGetInfoTCapt),
        .ackInvVidtrackSelect(ackInvVidtrackSelect),
        .ackInvVidtrackSet(ackInvVidtrackSet),
        .ackSeqbufVidtrackToHostif(ackSeqbufVidtrackToHostif),
        .aclk_sig(aclk_sig),
        .dneSeqbufVidtrackToHostif(dneSeqbufVidtrackToHostif),
        .doutb(seqbufVidtrackToHostifAXIS_tdata),
        .first_reg_0(reset_reg_n_0),
        .hdrNotFix(hdrNotFix),
        .reqInvVidtrackSelect(reqInvVidtrackSelect),
        .reqInvVidtrackSet(reqInvVidtrackSet),
        .reqSeqbufVidtrackToHostif(reqSeqbufVidtrackToHostif),
        .restart_reg_0(myHostif_n_254),
        .seqbufVidtrackToHostifAXIS_tready(seqbufVidtrackToHostifAXIS_tready),
        .seqbufVidtrackToHostifAXIS_tvalid(seqbufVidtrackToHostifAXIS_tvalid),
        .\state_reg[0]_0 (myDecim_n_87),
        .\state_reg[4]_0 (myDecim_n_88),
        .\state_reg[5]_0 (decimStateStore_dbg),
        .\state_reg[5]_1 (myDecim_n_89),
        .\state_reg[7]_0 (decimStateStream_dbg),
        .\tixVCapture_reg[1]_0 ({myVidtrack_n_113,myVidtrack_n_114}),
        .\tixVCapture_reg[7]_0 (configHdrNotFix),
        .videoinStateIgr_dbg({videoinStateIgr_dbg[4],videoinStateIgr_dbg[0]}),
        .videoinStateRgbegr_dbg(videoinStateRgbegr_dbg[7:6]),
        .vidtrackGetInfoPtr0Seqbuf(vidtrackGetInfoPtr0Seqbuf),
        .vidtrackGetInfoTixVState(vidtrackGetInfoTixVState));
  LUT4 #(
    .INIT(16'hFEC0)) 
    resetMemclk_i_1
       (.I0(resetMemclk_i_2_n_0),
        .I1(reset_memclk),
        .I2(stateMemclk_reg_n_0),
        .I3(resetMemclk),
        .O(resetMemclk_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair3149" *) 
  LUT5 #(
    .INIT(32'hDFFFFFFF)) 
    resetMemclk_i_2
       (.I0(\i_reg_n_0_[4] ),
        .I1(\i_reg_n_0_[2] ),
        .I2(\i_reg_n_0_[3] ),
        .I3(\i_reg_n_0_[1] ),
        .I4(\i_reg_n_0_[0] ),
        .O(resetMemclk_i_2_n_0));
  FDPE resetMemclk_reg
       (.C(memclk),
        .CE(1'b1),
        .D(resetMemclk_i_1_n_0),
        .PRE(reset_to_memclkm1_i_1_n_0),
        .Q(resetMemclk));
  (* SOFT_HLUTNM = "soft_lutpair3154" *) 
  LUT4 #(
    .INIT(16'hFFEF)) 
    reset_i_2
       (.I0(i_reg[0]),
        .I1(i_reg[1]),
        .I2(i_reg[3]),
        .I3(i_reg[2]),
        .O(reset_i_2_n_0));
  LUT3 #(
    .INIT(8'hE8)) 
    reset_memclk_i_1
       (.I0(reset_to_memclkm2),
        .I1(reset_to_memclkm1),
        .I2(reset_memclk),
        .O(reset_memclk_i_1_n_0));
  FDPE reset_memclk_reg
       (.C(memclk),
        .CE(1'b1),
        .D(reset_memclk_i_1_n_0),
        .PRE(reset_to_memclkm1_i_1_n_0),
        .Q(reset_memclk));
  FDPE reset_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .D(myHostif_n_17),
        .PRE(reset_to_memclkm1_i_1_n_0),
        .Q(reset_reg_n_0));
  LUT1 #(
    .INIT(2'h1)) 
    reset_to_memclkm1_i_1
       (.I0(aresetn),
        .O(reset_to_memclkm1_i_1_n_0));
  FDPE reset_to_memclkm1_reg
       (.C(memclk),
        .CE(1'b1),
        .D(reset_reg_n_0),
        .PRE(reset_to_memclkm1_i_1_n_0),
        .Q(reset_to_memclkm1));
  FDPE reset_to_memclkm2_reg
       (.C(memclk),
        .CE(1'b1),
        .D(reset_to_memclkm1),
        .PRE(reset_to_memclkm1_i_1_n_0),
        .Q(reset_to_memclkm2));
  FDCE stateMclk_reg
       (.C(aclk_sig),
        .CE(1'b1),
        .CLR(reset_to_memclkm1_i_1_n_0),
        .D(myHostif_n_18),
        .Q(stateMclk));
  LUT6 #(
    .INIT(64'h00000000FFFF0400)) 
    stateMemclk_i_1
       (.I0(\i[4]_i_3__0_n_0 ),
        .I1(\i_reg_n_0_[3] ),
        .I2(\i_reg_n_0_[2] ),
        .I3(\i_reg_n_0_[4] ),
        .I4(stateMemclk_reg_n_0),
        .I5(reset_memclk),
        .O(stateMemclk_i_1_n_0));
  FDCE stateMemclk_reg
       (.C(memclk),
        .CE(1'b1),
        .CLR(reset_to_memclkm1_i_1_n_0),
        .D(stateMemclk_i_1_n_0),
        .Q(stateMemclk_reg_n_0));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_crossbar_v2_1_34_addr_arbiter_sasd
   (m_valid_i,
    SR,
    aa_grant_rnw,
    aresetn_d_reg,
    m_ready_d0,
    m_axi_arvalid,
    \gen_no_arbiter.grant_rnw_reg_0 ,
    D,
    E,
    s_axi_bvalid,
    \gen_no_arbiter.grant_rnw_reg_1 ,
    aresetn_d_reg_0,
    m_axi_bready,
    m_axi_awvalid,
    s_axi_wready,
    m_axi_wvalid,
    s_axi_awready,
    s_axi_arready,
    s_axi_rvalid,
    \gen_no_arbiter.m_grant_hot_i_reg[0]_inv_0 ,
    \gen_no_arbiter.m_amesg_i_reg[13]_0 ,
    aclk,
    aresetn_d,
    s_axi_arvalid,
    s_axi_awvalid,
    Q,
    \m_ready_d_reg[1] ,
    m_axi_arready,
    m_atarget_enc,
    \m_ready_d_reg[0] ,
    s_axi_rready,
    sr_rvalid,
    \m_ready_d_reg[0]_0 ,
    m_axi_bvalid,
    \m_ready_d_reg[2] ,
    s_axi_bready,
    m_axi_awready,
    m_axi_wready,
    s_axi_wvalid,
    s_axi_araddr,
    s_axi_awaddr);
  output m_valid_i;
  output [0:0]SR;
  output aa_grant_rnw;
  output [0:0]aresetn_d_reg;
  output [1:0]m_ready_d0;
  output [1:0]m_axi_arvalid;
  output \gen_no_arbiter.grant_rnw_reg_0 ;
  output [1:0]D;
  output [0:0]E;
  output [0:0]s_axi_bvalid;
  output \gen_no_arbiter.grant_rnw_reg_1 ;
  output [0:0]aresetn_d_reg_0;
  output [1:0]m_axi_bready;
  output [1:0]m_axi_awvalid;
  output [0:0]s_axi_wready;
  output [1:0]m_axi_wvalid;
  output [0:0]s_axi_awready;
  output [0:0]s_axi_arready;
  output [0:0]s_axi_rvalid;
  output [1:0]\gen_no_arbiter.m_grant_hot_i_reg[0]_inv_0 ;
  output [6:0]\gen_no_arbiter.m_amesg_i_reg[13]_0 ;
  input aclk;
  input aresetn_d;
  input [0:0]s_axi_arvalid;
  input [0:0]s_axi_awvalid;
  input [1:0]Q;
  input [1:0]\m_ready_d_reg[1] ;
  input [1:0]m_axi_arready;
  input [0:0]m_atarget_enc;
  input \m_ready_d_reg[0] ;
  input [0:0]s_axi_rready;
  input sr_rvalid;
  input [0:0]\m_ready_d_reg[0]_0 ;
  input [1:0]m_axi_bvalid;
  input [2:0]\m_ready_d_reg[2] ;
  input [0:0]s_axi_bready;
  input [1:0]m_axi_awready;
  input [1:0]m_axi_wready;
  input [0:0]s_axi_wvalid;
  input [6:0]s_axi_araddr;
  input [6:0]s_axi_awaddr;

  wire [1:0]D;
  wire [0:0]E;
  wire [1:0]Q;
  wire [0:0]SR;
  wire aa_grant_rnw;
  wire aclk;
  wire aresetn_d;
  wire [0:0]aresetn_d_reg;
  wire [0:0]aresetn_d_reg_0;
  wire \gen_no_arbiter.grant_rnw_i_1_n_0 ;
  wire \gen_no_arbiter.grant_rnw_reg_0 ;
  wire \gen_no_arbiter.grant_rnw_reg_1 ;
  wire [6:0]\gen_no_arbiter.m_amesg_i_reg[13]_0 ;
  wire \gen_no_arbiter.m_grant_hot_i[0]_inv_i_1_n_0 ;
  wire \gen_no_arbiter.m_grant_hot_i[0]_inv_i_2_n_0 ;
  wire \gen_no_arbiter.m_grant_hot_i[0]_inv_i_3_n_0 ;
  wire [1:0]\gen_no_arbiter.m_grant_hot_i_reg[0]_inv_0 ;
  wire \gen_no_arbiter.m_valid_i_i_1_n_0 ;
  wire \gen_no_arbiter.s_ready_i[0]_i_1_n_0 ;
  wire [0:0]m_atarget_enc;
  wire [1:0]m_axi_arready;
  wire [1:0]m_axi_arvalid;
  wire [1:0]m_axi_awready;
  wire [1:0]m_axi_awvalid;
  wire [1:0]m_axi_bready;
  wire [1:0]m_axi_bvalid;
  wire [1:0]m_axi_wready;
  wire [1:0]m_axi_wvalid;
  wire [1:0]m_ready_d0;
  wire \m_ready_d[1]_i_3_n_0 ;
  wire \m_ready_d[2]_i_3_n_0 ;
  wire \m_ready_d[2]_i_4_n_0 ;
  wire \m_ready_d_reg[0] ;
  wire [0:0]\m_ready_d_reg[0]_0 ;
  wire [1:0]\m_ready_d_reg[1] ;
  wire [2:0]\m_ready_d_reg[2] ;
  wire m_valid_i;
  wire p_0_in1_in;
  wire p_0_in6_out;
  wire [13:3]s_amesg;
  wire s_arvalid_reg;
  wire \s_arvalid_reg_reg_n_0_[0] ;
  wire s_awvalid_reg;
  wire s_awvalid_reg0;
  wire [6:0]s_axi_araddr;
  wire [0:0]s_axi_arready;
  wire [0:0]s_axi_arvalid;
  wire [6:0]s_axi_awaddr;
  wire [0:0]s_axi_awready;
  wire [0:0]s_axi_awvalid;
  wire [0:0]s_axi_bready;
  wire [0:0]s_axi_bvalid;
  wire [0:0]s_axi_rready;
  wire [0:0]s_axi_rvalid;
  wire [0:0]s_axi_wready;
  wire [0:0]s_axi_wvalid;
  wire s_ready_i;
  wire sr_rvalid;

  LUT6 #(
    .INIT(64'hFFFF53FF00005000)) 
    \gen_no_arbiter.grant_rnw_i_1 
       (.I0(s_awvalid_reg),
        .I1(s_axi_awvalid),
        .I2(s_axi_arvalid),
        .I3(p_0_in1_in),
        .I4(m_valid_i),
        .I5(aa_grant_rnw),
        .O(\gen_no_arbiter.grant_rnw_i_1_n_0 ));
  FDRE \gen_no_arbiter.grant_rnw_reg 
       (.C(aclk),
        .CE(1'b1),
        .D(\gen_no_arbiter.grant_rnw_i_1_n_0 ),
        .Q(aa_grant_rnw),
        .R(SR));
  LUT4 #(
    .INIT(16'hFB08)) 
    \gen_no_arbiter.m_amesg_i[13]_i_1 
       (.I0(s_axi_araddr[6]),
        .I1(s_axi_arvalid),
        .I2(s_awvalid_reg),
        .I3(s_axi_awaddr[6]),
        .O(s_amesg[13]));
  LUT4 #(
    .INIT(16'hFB08)) 
    \gen_no_arbiter.m_amesg_i[3]_i_1 
       (.I0(s_axi_araddr[0]),
        .I1(s_axi_arvalid),
        .I2(s_awvalid_reg),
        .I3(s_axi_awaddr[0]),
        .O(s_amesg[3]));
  LUT4 #(
    .INIT(16'hFB08)) 
    \gen_no_arbiter.m_amesg_i[4]_i_1 
       (.I0(s_axi_araddr[1]),
        .I1(s_axi_arvalid),
        .I2(s_awvalid_reg),
        .I3(s_axi_awaddr[1]),
        .O(s_amesg[4]));
  LUT4 #(
    .INIT(16'hFB08)) 
    \gen_no_arbiter.m_amesg_i[5]_i_1 
       (.I0(s_axi_araddr[2]),
        .I1(s_axi_arvalid),
        .I2(s_awvalid_reg),
        .I3(s_axi_awaddr[2]),
        .O(s_amesg[5]));
  LUT4 #(
    .INIT(16'hFB08)) 
    \gen_no_arbiter.m_amesg_i[6]_i_1 
       (.I0(s_axi_araddr[3]),
        .I1(s_axi_arvalid),
        .I2(s_awvalid_reg),
        .I3(s_axi_awaddr[3]),
        .O(s_amesg[6]));
  LUT1 #(
    .INIT(2'h1)) 
    \gen_no_arbiter.m_amesg_i[7]_i_1 
       (.I0(aresetn_d),
        .O(SR));
  LUT4 #(
    .INIT(16'hFB08)) 
    \gen_no_arbiter.m_amesg_i[7]_i_2 
       (.I0(s_axi_araddr[4]),
        .I1(s_axi_arvalid),
        .I2(s_awvalid_reg),
        .I3(s_axi_awaddr[4]),
        .O(s_amesg[7]));
  LUT4 #(
    .INIT(16'hFB08)) 
    \gen_no_arbiter.m_amesg_i[8]_i_1 
       (.I0(s_axi_araddr[5]),
        .I1(s_axi_arvalid),
        .I2(s_awvalid_reg),
        .I3(s_axi_awaddr[5]),
        .O(s_amesg[8]));
  FDRE \gen_no_arbiter.m_amesg_i_reg[13] 
       (.C(aclk),
        .CE(p_0_in1_in),
        .D(s_amesg[13]),
        .Q(\gen_no_arbiter.m_amesg_i_reg[13]_0 [6]),
        .R(SR));
  FDRE \gen_no_arbiter.m_amesg_i_reg[3] 
       (.C(aclk),
        .CE(p_0_in1_in),
        .D(s_amesg[3]),
        .Q(\gen_no_arbiter.m_amesg_i_reg[13]_0 [0]),
        .R(SR));
  FDRE \gen_no_arbiter.m_amesg_i_reg[4] 
       (.C(aclk),
        .CE(p_0_in1_in),
        .D(s_amesg[4]),
        .Q(\gen_no_arbiter.m_amesg_i_reg[13]_0 [1]),
        .R(SR));
  FDRE \gen_no_arbiter.m_amesg_i_reg[5] 
       (.C(aclk),
        .CE(p_0_in1_in),
        .D(s_amesg[5]),
        .Q(\gen_no_arbiter.m_amesg_i_reg[13]_0 [2]),
        .R(SR));
  FDRE \gen_no_arbiter.m_amesg_i_reg[6] 
       (.C(aclk),
        .CE(p_0_in1_in),
        .D(s_amesg[6]),
        .Q(\gen_no_arbiter.m_amesg_i_reg[13]_0 [3]),
        .R(SR));
  FDRE \gen_no_arbiter.m_amesg_i_reg[7] 
       (.C(aclk),
        .CE(p_0_in1_in),
        .D(s_amesg[7]),
        .Q(\gen_no_arbiter.m_amesg_i_reg[13]_0 [4]),
        .R(SR));
  FDRE \gen_no_arbiter.m_amesg_i_reg[8] 
       (.C(aclk),
        .CE(p_0_in1_in),
        .D(s_amesg[8]),
        .Q(\gen_no_arbiter.m_amesg_i_reg[13]_0 [5]),
        .R(SR));
  LUT6 #(
    .INIT(64'hFFFFFFFF80808C80)) 
    \gen_no_arbiter.m_grant_hot_i[0]_inv_i_1 
       (.I0(\m_ready_d[1]_i_3_n_0 ),
        .I1(m_valid_i),
        .I2(aa_grant_rnw),
        .I3(m_ready_d0[0]),
        .I4(\gen_no_arbiter.m_grant_hot_i[0]_inv_i_2_n_0 ),
        .I5(\gen_no_arbiter.m_grant_hot_i[0]_inv_i_3_n_0 ),
        .O(\gen_no_arbiter.m_grant_hot_i[0]_inv_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hFF0D)) 
    \gen_no_arbiter.m_grant_hot_i[0]_inv_i_2 
       (.I0(s_axi_bready),
        .I1(\m_ready_d[2]_i_3_n_0 ),
        .I2(\m_ready_d_reg[2] [0]),
        .I3(\m_ready_d[2]_i_4_n_0 ),
        .O(\gen_no_arbiter.m_grant_hot_i[0]_inv_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair553" *) 
  LUT5 #(
    .INIT(32'hD5D5D5F5)) 
    \gen_no_arbiter.m_grant_hot_i[0]_inv_i_3 
       (.I0(aresetn_d),
        .I1(m_valid_i),
        .I2(p_0_in1_in),
        .I3(s_axi_arvalid),
        .I4(s_axi_awvalid),
        .O(\gen_no_arbiter.m_grant_hot_i[0]_inv_i_3_n_0 ));
  (* inverted = "yes" *) 
  FDRE #(
    .INIT(1'b1)) 
    \gen_no_arbiter.m_grant_hot_i_reg[0]_inv 
       (.C(aclk),
        .CE(1'b1),
        .D(\gen_no_arbiter.m_grant_hot_i[0]_inv_i_1_n_0 ),
        .Q(p_0_in1_in),
        .R(1'b0));
  LUT6 #(
    .INIT(64'h35F535F5350535F5)) 
    \gen_no_arbiter.m_valid_i_i_1 
       (.I0(p_0_in1_in),
        .I1(\m_ready_d[1]_i_3_n_0 ),
        .I2(m_valid_i),
        .I3(aa_grant_rnw),
        .I4(m_ready_d0[0]),
        .I5(\gen_no_arbiter.m_grant_hot_i[0]_inv_i_2_n_0 ),
        .O(\gen_no_arbiter.m_valid_i_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_no_arbiter.m_valid_i_reg 
       (.C(aclk),
        .CE(1'b1),
        .D(\gen_no_arbiter.m_valid_i_i_1_n_0 ),
        .Q(m_valid_i),
        .R(SR));
  (* SOFT_HLUTNM = "soft_lutpair553" *) 
  LUT3 #(
    .INIT(8'h10)) 
    \gen_no_arbiter.s_ready_i[0]_i_1 
       (.I0(m_valid_i),
        .I1(p_0_in1_in),
        .I2(aresetn_d),
        .O(\gen_no_arbiter.s_ready_i[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_no_arbiter.s_ready_i_reg[0] 
       (.C(aclk),
        .CE(1'b1),
        .D(\gen_no_arbiter.s_ready_i[0]_i_1_n_0 ),
        .Q(s_ready_i),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h1)) 
    \m_atarget_hot[0]_i_1 
       (.I0(p_0_in1_in),
        .I1(\gen_no_arbiter.m_amesg_i_reg[13]_0 [6]),
        .O(\gen_no_arbiter.m_grant_hot_i_reg[0]_inv_0 [0]));
  (* SOFT_HLUTNM = "soft_lutpair560" *) 
  LUT2 #(
    .INIT(4'h4)) 
    \m_atarget_hot[1]_i_1 
       (.I0(p_0_in1_in),
        .I1(\gen_no_arbiter.m_amesg_i_reg[13]_0 [6]),
        .O(\gen_no_arbiter.m_grant_hot_i_reg[0]_inv_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair556" *) 
  LUT4 #(
    .INIT(16'h0080)) 
    \m_axi_arvalid[0]_INST_0 
       (.I0(Q[0]),
        .I1(aa_grant_rnw),
        .I2(m_valid_i),
        .I3(\m_ready_d_reg[1] [1]),
        .O(m_axi_arvalid[0]));
  (* SOFT_HLUTNM = "soft_lutpair557" *) 
  LUT4 #(
    .INIT(16'h0080)) 
    \m_axi_arvalid[1]_INST_0 
       (.I0(Q[1]),
        .I1(aa_grant_rnw),
        .I2(m_valid_i),
        .I3(\m_ready_d_reg[1] [1]),
        .O(m_axi_arvalid[1]));
  (* SOFT_HLUTNM = "soft_lutpair556" *) 
  LUT4 #(
    .INIT(16'h0020)) 
    \m_axi_awvalid[0]_INST_0 
       (.I0(Q[0]),
        .I1(aa_grant_rnw),
        .I2(m_valid_i),
        .I3(\m_ready_d_reg[2] [2]),
        .O(m_axi_awvalid[0]));
  (* SOFT_HLUTNM = "soft_lutpair557" *) 
  LUT4 #(
    .INIT(16'h0020)) 
    \m_axi_awvalid[1]_INST_0 
       (.I0(Q[1]),
        .I1(aa_grant_rnw),
        .I2(m_valid_i),
        .I3(\m_ready_d_reg[2] [2]),
        .O(m_axi_awvalid[1]));
  (* SOFT_HLUTNM = "soft_lutpair555" *) 
  LUT5 #(
    .INIT(32'h00200000)) 
    \m_axi_bready[0]_INST_0 
       (.I0(Q[0]),
        .I1(\m_ready_d_reg[2] [0]),
        .I2(m_valid_i),
        .I3(aa_grant_rnw),
        .I4(s_axi_bready),
        .O(m_axi_bready[0]));
  LUT5 #(
    .INIT(32'h00200000)) 
    \m_axi_bready[1]_INST_0 
       (.I0(Q[1]),
        .I1(\m_ready_d_reg[2] [0]),
        .I2(m_valid_i),
        .I3(aa_grant_rnw),
        .I4(s_axi_bready),
        .O(m_axi_bready[1]));
  LUT5 #(
    .INIT(32'h00000800)) 
    \m_axi_wvalid[0]_INST_0 
       (.I0(Q[0]),
        .I1(s_axi_wvalid),
        .I2(\m_ready_d_reg[2] [1]),
        .I3(m_valid_i),
        .I4(aa_grant_rnw),
        .O(m_axi_wvalid[0]));
  LUT5 #(
    .INIT(32'h00000800)) 
    \m_axi_wvalid[1]_INST_0 
       (.I0(Q[1]),
        .I1(s_axi_wvalid),
        .I2(\m_ready_d_reg[2] [1]),
        .I3(m_valid_i),
        .I4(aa_grant_rnw),
        .O(m_axi_wvalid[1]));
  (* SOFT_HLUTNM = "soft_lutpair554" *) 
  LUT5 #(
    .INIT(32'h0080FFFF)) 
    \m_payload_i[34]_i_1 
       (.I0(s_axi_rready),
        .I1(aa_grant_rnw),
        .I2(m_valid_i),
        .I3(\m_ready_d_reg[1] [0]),
        .I4(sr_rvalid),
        .O(E));
  LUT6 #(
    .INIT(64'hEAAAAAAAAAAAAAAA)) 
    \m_ready_d[0]_i_1 
       (.I0(\m_ready_d_reg[1] [0]),
        .I1(m_valid_i),
        .I2(aa_grant_rnw),
        .I3(s_axi_rready),
        .I4(\m_ready_d_reg[0]_0 ),
        .I5(sr_rvalid),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hDCCCDCDCDCCCCCCC)) 
    \m_ready_d[1]_i_1 
       (.I0(\gen_no_arbiter.grant_rnw_reg_1 ),
        .I1(\m_ready_d_reg[2] [1]),
        .I2(s_axi_wvalid),
        .I3(m_axi_wready[1]),
        .I4(m_atarget_enc),
        .I5(m_axi_wready[0]),
        .O(m_ready_d0[0]));
  LUT2 #(
    .INIT(4'hB)) 
    \m_ready_d[1]_i_1__0 
       (.I0(\m_ready_d[1]_i_3_n_0 ),
        .I1(aresetn_d),
        .O(aresetn_d_reg));
  LUT6 #(
    .INIT(64'hEAAAEAEAEAAAAAAA)) 
    \m_ready_d[1]_i_2 
       (.I0(\m_ready_d_reg[1] [1]),
        .I1(aa_grant_rnw),
        .I2(m_valid_i),
        .I3(m_axi_arready[1]),
        .I4(m_atarget_enc),
        .I5(m_axi_arready[0]),
        .O(D[1]));
  LUT6 #(
    .INIT(64'h00000000FFFF00E2)) 
    \m_ready_d[1]_i_3 
       (.I0(m_axi_arready[0]),
        .I1(m_atarget_enc),
        .I2(m_axi_arready[1]),
        .I3(\gen_no_arbiter.grant_rnw_reg_0 ),
        .I4(\m_ready_d_reg[1] [1]),
        .I5(\m_ready_d_reg[0] ),
        .O(\m_ready_d[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h55555555DDDD55D5)) 
    \m_ready_d[2]_i_1 
       (.I0(aresetn_d),
        .I1(m_ready_d0[0]),
        .I2(s_axi_bready),
        .I3(\m_ready_d[2]_i_3_n_0 ),
        .I4(\m_ready_d_reg[2] [0]),
        .I5(\m_ready_d[2]_i_4_n_0 ),
        .O(aresetn_d_reg_0));
  LUT6 #(
    .INIT(64'hFFFFFFFF0000E200)) 
    \m_ready_d[2]_i_2 
       (.I0(m_axi_awready[0]),
        .I1(m_atarget_enc),
        .I2(m_axi_awready[1]),
        .I3(m_valid_i),
        .I4(aa_grant_rnw),
        .I5(\m_ready_d_reg[2] [2]),
        .O(m_ready_d0[1]));
  LUT6 #(
    .INIT(64'hFBFBFBFFFFFFFBFF)) 
    \m_ready_d[2]_i_3 
       (.I0(aa_grant_rnw),
        .I1(m_valid_i),
        .I2(\m_ready_d_reg[2] [0]),
        .I3(m_axi_bvalid[0]),
        .I4(m_atarget_enc),
        .I5(m_axi_bvalid[1]),
        .O(\m_ready_d[2]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h4555454545555555)) 
    \m_ready_d[2]_i_4 
       (.I0(\m_ready_d_reg[2] [2]),
        .I1(aa_grant_rnw),
        .I2(m_valid_i),
        .I3(m_axi_awready[1]),
        .I4(m_atarget_enc),
        .I5(m_axi_awready[0]),
        .O(\m_ready_d[2]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair554" *) 
  LUT2 #(
    .INIT(4'h7)) 
    m_valid_i_i_2
       (.I0(aa_grant_rnw),
        .I1(m_valid_i),
        .O(\gen_no_arbiter.grant_rnw_reg_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \s_arvalid_reg[0]_i_1 
       (.I0(s_ready_i),
        .I1(aresetn_d),
        .O(s_arvalid_reg));
  (* SOFT_HLUTNM = "soft_lutpair558" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \s_arvalid_reg[0]_i_2 
       (.I0(s_axi_arvalid),
        .I1(s_awvalid_reg),
        .O(p_0_in6_out));
  FDRE #(
    .INIT(1'b0)) 
    \s_arvalid_reg_reg[0] 
       (.C(aclk),
        .CE(1'b1),
        .D(p_0_in6_out),
        .Q(\s_arvalid_reg_reg_n_0_[0] ),
        .R(s_arvalid_reg));
  (* SOFT_HLUTNM = "soft_lutpair558" *) 
  LUT4 #(
    .INIT(16'h4044)) 
    \s_awvalid_reg[0]_i_1 
       (.I0(\s_arvalid_reg_reg_n_0_[0] ),
        .I1(s_axi_awvalid),
        .I2(s_awvalid_reg),
        .I3(s_axi_arvalid),
        .O(s_awvalid_reg0));
  FDRE #(
    .INIT(1'b0)) 
    \s_awvalid_reg_reg[0] 
       (.C(aclk),
        .CE(1'b1),
        .D(s_awvalid_reg0),
        .Q(s_awvalid_reg),
        .R(s_arvalid_reg));
  (* SOFT_HLUTNM = "soft_lutpair559" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \s_axi_arready[0]_INST_0 
       (.I0(aa_grant_rnw),
        .I1(s_ready_i),
        .O(s_axi_arready));
  (* SOFT_HLUTNM = "soft_lutpair559" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \s_axi_awready[0]_INST_0 
       (.I0(s_ready_i),
        .I1(aa_grant_rnw),
        .O(s_axi_awready));
  LUT6 #(
    .INIT(64'h0000000000004540)) 
    \s_axi_bvalid[0]_INST_0 
       (.I0(p_0_in1_in),
        .I1(m_axi_bvalid[1]),
        .I2(m_atarget_enc),
        .I3(m_axi_bvalid[0]),
        .I4(\m_ready_d_reg[2] [0]),
        .I5(\gen_no_arbiter.grant_rnw_reg_1 ),
        .O(s_axi_bvalid));
  (* SOFT_HLUTNM = "soft_lutpair560" *) 
  LUT2 #(
    .INIT(4'h4)) 
    \s_axi_rvalid[0]_INST_0 
       (.I0(p_0_in1_in),
        .I1(sr_rvalid),
        .O(s_axi_rvalid));
  LUT6 #(
    .INIT(64'h0000000000004540)) 
    \s_axi_wready[0]_INST_0 
       (.I0(p_0_in1_in),
        .I1(m_axi_wready[1]),
        .I2(m_atarget_enc),
        .I3(m_axi_wready[0]),
        .I4(\gen_no_arbiter.grant_rnw_reg_1 ),
        .I5(\m_ready_d_reg[2] [1]),
        .O(s_axi_wready));
  (* SOFT_HLUTNM = "soft_lutpair555" *) 
  LUT2 #(
    .INIT(4'hB)) 
    \s_axi_wready[0]_INST_0_i_1 
       (.I0(aa_grant_rnw),
        .I1(m_valid_i),
        .O(\gen_no_arbiter.grant_rnw_reg_1 ));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_crossbar_v2_1_34_axi_crossbar
   (m_axi_araddr,
    s_axi_rdata,
    m_axi_arvalid,
    s_axi_bvalid,
    m_axi_bready,
    m_axi_awvalid,
    s_axi_wready,
    m_axi_wvalid,
    s_axi_awready,
    s_axi_arready,
    s_axi_rvalid,
    m_axi_rready,
    aresetn,
    aclk,
    s_axi_arvalid,
    s_axi_awvalid,
    m_axi_arready,
    s_axi_rready,
    m_axi_rvalid,
    m_axi_bvalid,
    s_axi_bready,
    m_axi_awready,
    m_axi_wready,
    s_axi_wvalid,
    s_axi_araddr,
    s_axi_awaddr,
    m_axi_rdata);
  output [5:0]m_axi_araddr;
  output [31:0]s_axi_rdata;
  output [1:0]m_axi_arvalid;
  output [0:0]s_axi_bvalid;
  output [1:0]m_axi_bready;
  output [1:0]m_axi_awvalid;
  output [0:0]s_axi_wready;
  output [1:0]m_axi_wvalid;
  output [0:0]s_axi_awready;
  output [0:0]s_axi_arready;
  output [0:0]s_axi_rvalid;
  output [1:0]m_axi_rready;
  input aresetn;
  input aclk;
  input [0:0]s_axi_arvalid;
  input [0:0]s_axi_awvalid;
  input [1:0]m_axi_arready;
  input [0:0]s_axi_rready;
  input [1:0]m_axi_rvalid;
  input [1:0]m_axi_bvalid;
  input [0:0]s_axi_bready;
  input [1:0]m_axi_awready;
  input [1:0]m_axi_wready;
  input [0:0]s_axi_wvalid;
  input [6:0]s_axi_araddr;
  input [6:0]s_axi_awaddr;
  input [63:0]m_axi_rdata;

  wire aclk;
  wire aresetn;
  wire [5:0]m_axi_araddr;
  wire [1:0]m_axi_arready;
  wire [1:0]m_axi_arvalid;
  wire [1:0]m_axi_awready;
  wire [1:0]m_axi_awvalid;
  wire [1:0]m_axi_bready;
  wire [1:0]m_axi_bvalid;
  wire [63:0]m_axi_rdata;
  wire [1:0]m_axi_rready;
  wire [1:0]m_axi_rvalid;
  wire [1:0]m_axi_wready;
  wire [1:0]m_axi_wvalid;
  wire [6:0]s_axi_araddr;
  wire [0:0]s_axi_arready;
  wire [0:0]s_axi_arvalid;
  wire [6:0]s_axi_awaddr;
  wire [0:0]s_axi_awready;
  wire [0:0]s_axi_awvalid;
  wire [0:0]s_axi_bready;
  wire [0:0]s_axi_bvalid;
  wire [31:0]s_axi_rdata;
  wire [0:0]s_axi_rready;
  wire [0:0]s_axi_rvalid;
  wire [0:0]s_axi_wready;
  wire [0:0]s_axi_wvalid;

  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_crossbar_v2_1_34_crossbar_sasd \gen_sasd.crossbar_sasd_0 
       (.aclk(aclk),
        .aresetn(aresetn),
        .m_axi_araddr(m_axi_araddr),
        .m_axi_arready(m_axi_arready),
        .m_axi_arvalid(m_axi_arvalid),
        .m_axi_awready(m_axi_awready),
        .m_axi_awvalid(m_axi_awvalid),
        .m_axi_bready(m_axi_bready),
        .m_axi_bvalid(m_axi_bvalid),
        .m_axi_rdata(m_axi_rdata),
        .m_axi_rready(m_axi_rready),
        .m_axi_rvalid(m_axi_rvalid),
        .m_axi_wready(m_axi_wready),
        .m_axi_wvalid(m_axi_wvalid),
        .s_axi_araddr(s_axi_araddr),
        .s_axi_arready(s_axi_arready),
        .s_axi_arvalid(s_axi_arvalid),
        .s_axi_awaddr(s_axi_awaddr),
        .s_axi_awready(s_axi_awready),
        .s_axi_awvalid(s_axi_awvalid),
        .s_axi_bready(s_axi_bready),
        .s_axi_bvalid(s_axi_bvalid),
        .s_axi_rdata(s_axi_rdata),
        .s_axi_rready(s_axi_rready),
        .s_axi_rvalid(s_axi_rvalid),
        .s_axi_wready(s_axi_wready),
        .s_axi_wvalid(s_axi_wvalid));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_crossbar_v2_1_34_crossbar_sasd
   (m_axi_araddr,
    s_axi_rdata,
    m_axi_arvalid,
    s_axi_bvalid,
    m_axi_bready,
    m_axi_awvalid,
    s_axi_wready,
    m_axi_wvalid,
    s_axi_awready,
    s_axi_arready,
    s_axi_rvalid,
    m_axi_rready,
    aresetn,
    aclk,
    s_axi_arvalid,
    s_axi_awvalid,
    m_axi_arready,
    s_axi_rready,
    m_axi_rvalid,
    m_axi_bvalid,
    s_axi_bready,
    m_axi_awready,
    m_axi_wready,
    s_axi_wvalid,
    s_axi_araddr,
    s_axi_awaddr,
    m_axi_rdata);
  output [5:0]m_axi_araddr;
  output [31:0]s_axi_rdata;
  output [1:0]m_axi_arvalid;
  output [0:0]s_axi_bvalid;
  output [1:0]m_axi_bready;
  output [1:0]m_axi_awvalid;
  output [0:0]s_axi_wready;
  output [1:0]m_axi_wvalid;
  output [0:0]s_axi_awready;
  output [0:0]s_axi_arready;
  output [0:0]s_axi_rvalid;
  output [1:0]m_axi_rready;
  input aresetn;
  input aclk;
  input [0:0]s_axi_arvalid;
  input [0:0]s_axi_awvalid;
  input [1:0]m_axi_arready;
  input [0:0]s_axi_rready;
  input [1:0]m_axi_rvalid;
  input [1:0]m_axi_bvalid;
  input [0:0]s_axi_bready;
  input [1:0]m_axi_awready;
  input [1:0]m_axi_wready;
  input [0:0]s_axi_wvalid;
  input [6:0]s_axi_araddr;
  input [6:0]s_axi_awaddr;
  input [63:0]m_axi_rdata;

  wire aa_grant_rnw;
  wire aclk;
  wire addr_arbiter_inst_n_13;
  wire addr_arbiter_inst_n_14;
  wire addr_arbiter_inst_n_27;
  wire addr_arbiter_inst_n_3;
  wire addr_arbiter_inst_n_8;
  wire aresetn;
  wire aresetn_d;
  wire [0:0]m_atarget_enc;
  wire [1:0]m_atarget_hot;
  wire [1:0]m_atarget_hot0;
  wire [5:0]m_axi_araddr;
  wire [1:0]m_axi_arready;
  wire [1:0]m_axi_arvalid;
  wire [1:0]m_axi_awready;
  wire [1:0]m_axi_awvalid;
  wire [1:0]m_axi_bready;
  wire [1:0]m_axi_bvalid;
  wire [63:0]m_axi_rdata;
  wire [1:0]m_axi_rready;
  wire [1:0]m_axi_rvalid;
  wire [1:0]m_axi_wready;
  wire [1:0]m_axi_wvalid;
  wire [1:0]m_ready_d;
  wire [1:0]m_ready_d0;
  wire [2:1]m_ready_d0_0;
  wire [2:0]m_ready_d_1;
  wire m_valid_i;
  wire p_1_in;
  wire reg_slice_r_n_1;
  wire reg_slice_r_n_34;
  wire reset;
  wire [6:0]s_axi_araddr;
  wire [0:0]s_axi_arready;
  wire [0:0]s_axi_arvalid;
  wire [6:0]s_axi_awaddr;
  wire [0:0]s_axi_awready;
  wire [0:0]s_axi_awvalid;
  wire [0:0]s_axi_bready;
  wire [0:0]s_axi_bvalid;
  wire [31:0]s_axi_rdata;
  wire [0:0]s_axi_rready;
  wire [0:0]s_axi_rvalid;
  wire [0:0]s_axi_wready;
  wire [0:0]s_axi_wvalid;
  wire sr_rvalid;

  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_crossbar_v2_1_34_addr_arbiter_sasd addr_arbiter_inst
       (.D(m_ready_d0),
        .E(p_1_in),
        .Q(m_atarget_hot),
        .SR(reset),
        .aa_grant_rnw(aa_grant_rnw),
        .aclk(aclk),
        .aresetn_d(aresetn_d),
        .aresetn_d_reg(addr_arbiter_inst_n_3),
        .aresetn_d_reg_0(addr_arbiter_inst_n_14),
        .\gen_no_arbiter.grant_rnw_reg_0 (addr_arbiter_inst_n_8),
        .\gen_no_arbiter.grant_rnw_reg_1 (addr_arbiter_inst_n_13),
        .\gen_no_arbiter.m_amesg_i_reg[13]_0 ({addr_arbiter_inst_n_27,m_axi_araddr[0],m_axi_araddr[5:1]}),
        .\gen_no_arbiter.m_grant_hot_i_reg[0]_inv_0 (m_atarget_hot0),
        .m_atarget_enc(m_atarget_enc),
        .m_axi_arready(m_axi_arready),
        .m_axi_arvalid(m_axi_arvalid),
        .m_axi_awready(m_axi_awready),
        .m_axi_awvalid(m_axi_awvalid),
        .m_axi_bready(m_axi_bready),
        .m_axi_bvalid(m_axi_bvalid),
        .m_axi_wready(m_axi_wready),
        .m_axi_wvalid(m_axi_wvalid),
        .m_ready_d0(m_ready_d0_0),
        .\m_ready_d_reg[0] (reg_slice_r_n_1),
        .\m_ready_d_reg[0]_0 (reg_slice_r_n_34),
        .\m_ready_d_reg[1] (m_ready_d),
        .\m_ready_d_reg[2] (m_ready_d_1),
        .m_valid_i(m_valid_i),
        .s_axi_araddr(s_axi_araddr),
        .s_axi_arready(s_axi_arready),
        .s_axi_arvalid(s_axi_arvalid),
        .s_axi_awaddr(s_axi_awaddr),
        .s_axi_awready(s_axi_awready),
        .s_axi_awvalid(s_axi_awvalid),
        .s_axi_bready(s_axi_bready),
        .s_axi_bvalid(s_axi_bvalid),
        .s_axi_rready(s_axi_rready),
        .s_axi_rvalid(s_axi_rvalid),
        .s_axi_wready(s_axi_wready),
        .s_axi_wvalid(s_axi_wvalid),
        .sr_rvalid(sr_rvalid));
  FDRE #(
    .INIT(1'b0)) 
    aresetn_d_reg
       (.C(aclk),
        .CE(1'b1),
        .D(aresetn),
        .Q(aresetn_d),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \m_atarget_enc_reg[0] 
       (.C(aclk),
        .CE(1'b1),
        .D(addr_arbiter_inst_n_27),
        .Q(m_atarget_enc),
        .R(reset));
  FDRE #(
    .INIT(1'b0)) 
    \m_atarget_hot_reg[0] 
       (.C(aclk),
        .CE(1'b1),
        .D(m_atarget_hot0[0]),
        .Q(m_atarget_hot[0]),
        .R(reset));
  FDRE #(
    .INIT(1'b0)) 
    \m_atarget_hot_reg[1] 
       (.C(aclk),
        .CE(1'b1),
        .D(m_atarget_hot0[1]),
        .Q(m_atarget_hot[1]),
        .R(reset));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_33_axic_register_slice reg_slice_r
       (.E(p_1_in),
        .Q(m_ready_d[0]),
        .SR(reset),
        .aa_grant_rnw(aa_grant_rnw),
        .aclk(aclk),
        .m_atarget_enc(m_atarget_enc),
        .m_axi_rdata(m_axi_rdata),
        .m_axi_rready(m_axi_rready),
        .m_axi_rvalid(m_axi_rvalid),
        .\m_payload_i_reg[34]_0 ({s_axi_rdata,reg_slice_r_n_34}),
        .m_valid_i(m_valid_i),
        .m_valid_i_reg_0(reg_slice_r_n_1),
        .rd_req_reg(m_atarget_hot),
        .s_axi_rready(s_axi_rready),
        .s_ready_i_reg_0(addr_arbiter_inst_n_8),
        .sr_rvalid(sr_rvalid));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_crossbar_v2_1_34_splitter__parameterized0 splitter_ar
       (.D(m_ready_d0),
        .Q(m_ready_d),
        .SR(addr_arbiter_inst_n_3),
        .aclk(aclk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_crossbar_v2_1_34_splitter splitter_aw
       (.D(m_ready_d0_0),
        .Q(m_ready_d_1),
        .SR(addr_arbiter_inst_n_14),
        .aclk(aclk),
        .m_atarget_enc(m_atarget_enc),
        .m_axi_bvalid(m_axi_bvalid),
        .\m_ready_d_reg[0]_0 (addr_arbiter_inst_n_13),
        .s_axi_bready(s_axi_bready));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_crossbar_v2_1_34_splitter
   (Q,
    D,
    s_axi_bready,
    m_axi_bvalid,
    m_atarget_enc,
    \m_ready_d_reg[0]_0 ,
    SR,
    aclk);
  output [2:0]Q;
  input [1:0]D;
  input [0:0]s_axi_bready;
  input [1:0]m_axi_bvalid;
  input [0:0]m_atarget_enc;
  input \m_ready_d_reg[0]_0 ;
  input [0:0]SR;
  input aclk;

  wire [1:0]D;
  wire [2:0]Q;
  wire [0:0]SR;
  wire aclk;
  wire [0:0]m_atarget_enc;
  wire [1:0]m_axi_bvalid;
  wire [0:0]m_ready_d0;
  wire \m_ready_d_reg[0]_0 ;
  wire [0:0]s_axi_bready;

  LUT6 #(
    .INIT(64'hFFFF0000FFFF8A80)) 
    \m_ready_d[0]_i_1__0 
       (.I0(s_axi_bready),
        .I1(m_axi_bvalid[1]),
        .I2(m_atarget_enc),
        .I3(m_axi_bvalid[0]),
        .I4(Q[0]),
        .I5(\m_ready_d_reg[0]_0 ),
        .O(m_ready_d0));
  FDRE #(
    .INIT(1'b0)) 
    \m_ready_d_reg[0] 
       (.C(aclk),
        .CE(1'b1),
        .D(m_ready_d0),
        .Q(Q[0]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \m_ready_d_reg[1] 
       (.C(aclk),
        .CE(1'b1),
        .D(D[0]),
        .Q(Q[1]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \m_ready_d_reg[2] 
       (.C(aclk),
        .CE(1'b1),
        .D(D[1]),
        .Q(Q[2]),
        .R(SR));
endmodule

(* ORIG_REF_NAME = "axi_crossbar_v2_1_34_splitter" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_crossbar_v2_1_34_splitter__parameterized0
   (Q,
    SR,
    D,
    aclk);
  output [1:0]Q;
  input [0:0]SR;
  input [1:0]D;
  input aclk;

  wire [1:0]D;
  wire [1:0]Q;
  wire [0:0]SR;
  wire aclk;

  FDRE #(
    .INIT(1'b0)) 
    \m_ready_d_reg[0] 
       (.C(aclk),
        .CE(1'b1),
        .D(D[0]),
        .Q(Q[0]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \m_ready_d_reg[1] 
       (.C(aclk),
        .CE(1'b1),
        .D(D[1]),
        .Q(Q[1]),
        .R(SR));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_register_slice_v2_1_33_axic_register_slice
   (sr_rvalid,
    m_valid_i_reg_0,
    \m_payload_i_reg[34]_0 ,
    m_axi_rready,
    aclk,
    Q,
    s_ready_i_reg_0,
    s_axi_rready,
    m_axi_rvalid,
    m_atarget_enc,
    aa_grant_rnw,
    m_valid_i,
    rd_req_reg,
    m_axi_rdata,
    SR,
    E);
  output sr_rvalid;
  output m_valid_i_reg_0;
  output [32:0]\m_payload_i_reg[34]_0 ;
  output [1:0]m_axi_rready;
  input aclk;
  input [0:0]Q;
  input s_ready_i_reg_0;
  input [0:0]s_axi_rready;
  input [1:0]m_axi_rvalid;
  input [0:0]m_atarget_enc;
  input aa_grant_rnw;
  input m_valid_i;
  input [1:0]rd_req_reg;
  input [63:0]m_axi_rdata;
  input [0:0]SR;
  input [0:0]E;

  wire [0:0]E;
  wire [0:0]Q;
  wire [0:0]SR;
  wire aa_grant_rnw;
  wire aa_rready;
  wire aclk;
  wire \aresetn_d_reg_n_0_[0] ;
  wire \aresetn_d_reg_n_0_[1] ;
  wire [0:0]m_atarget_enc;
  wire [63:0]m_axi_rdata;
  wire [1:0]m_axi_rready;
  wire [1:0]m_axi_rvalid;
  wire [32:0]\m_payload_i_reg[34]_0 ;
  wire m_valid_i;
  wire m_valid_i_i_1_n_0;
  wire m_valid_i_i_3_n_0;
  wire m_valid_i_reg_0;
  wire [1:0]rd_req_reg;
  wire [0:0]s_axi_rready;
  wire s_ready_i_i_1_n_0;
  wire s_ready_i_reg_0;
  wire [34:0]skid_buffer;
  wire \skid_buffer[10]_i_1_n_0 ;
  wire \skid_buffer[11]_i_1_n_0 ;
  wire \skid_buffer[12]_i_1_n_0 ;
  wire \skid_buffer[13]_i_1_n_0 ;
  wire \skid_buffer[14]_i_1_n_0 ;
  wire \skid_buffer[15]_i_1_n_0 ;
  wire \skid_buffer[16]_i_1_n_0 ;
  wire \skid_buffer[17]_i_1_n_0 ;
  wire \skid_buffer[18]_i_1_n_0 ;
  wire \skid_buffer[19]_i_1_n_0 ;
  wire \skid_buffer[20]_i_1_n_0 ;
  wire \skid_buffer[21]_i_1_n_0 ;
  wire \skid_buffer[22]_i_1_n_0 ;
  wire \skid_buffer[23]_i_1_n_0 ;
  wire \skid_buffer[24]_i_1_n_0 ;
  wire \skid_buffer[25]_i_1_n_0 ;
  wire \skid_buffer[26]_i_1_n_0 ;
  wire \skid_buffer[27]_i_1_n_0 ;
  wire \skid_buffer[28]_i_1_n_0 ;
  wire \skid_buffer[29]_i_1_n_0 ;
  wire \skid_buffer[30]_i_1_n_0 ;
  wire \skid_buffer[31]_i_1_n_0 ;
  wire \skid_buffer[32]_i_1_n_0 ;
  wire \skid_buffer[33]_i_1_n_0 ;
  wire \skid_buffer[34]_i_1_n_0 ;
  wire \skid_buffer[3]_i_1_n_0 ;
  wire \skid_buffer[4]_i_1_n_0 ;
  wire \skid_buffer[5]_i_1_n_0 ;
  wire \skid_buffer[6]_i_1_n_0 ;
  wire \skid_buffer[7]_i_1_n_0 ;
  wire \skid_buffer[8]_i_1_n_0 ;
  wire \skid_buffer[9]_i_1_n_0 ;
  wire \skid_buffer_reg_n_0_[0] ;
  wire \skid_buffer_reg_n_0_[10] ;
  wire \skid_buffer_reg_n_0_[11] ;
  wire \skid_buffer_reg_n_0_[12] ;
  wire \skid_buffer_reg_n_0_[13] ;
  wire \skid_buffer_reg_n_0_[14] ;
  wire \skid_buffer_reg_n_0_[15] ;
  wire \skid_buffer_reg_n_0_[16] ;
  wire \skid_buffer_reg_n_0_[17] ;
  wire \skid_buffer_reg_n_0_[18] ;
  wire \skid_buffer_reg_n_0_[19] ;
  wire \skid_buffer_reg_n_0_[20] ;
  wire \skid_buffer_reg_n_0_[21] ;
  wire \skid_buffer_reg_n_0_[22] ;
  wire \skid_buffer_reg_n_0_[23] ;
  wire \skid_buffer_reg_n_0_[24] ;
  wire \skid_buffer_reg_n_0_[25] ;
  wire \skid_buffer_reg_n_0_[26] ;
  wire \skid_buffer_reg_n_0_[27] ;
  wire \skid_buffer_reg_n_0_[28] ;
  wire \skid_buffer_reg_n_0_[29] ;
  wire \skid_buffer_reg_n_0_[30] ;
  wire \skid_buffer_reg_n_0_[31] ;
  wire \skid_buffer_reg_n_0_[32] ;
  wire \skid_buffer_reg_n_0_[33] ;
  wire \skid_buffer_reg_n_0_[34] ;
  wire \skid_buffer_reg_n_0_[3] ;
  wire \skid_buffer_reg_n_0_[4] ;
  wire \skid_buffer_reg_n_0_[5] ;
  wire \skid_buffer_reg_n_0_[6] ;
  wire \skid_buffer_reg_n_0_[7] ;
  wire \skid_buffer_reg_n_0_[8] ;
  wire \skid_buffer_reg_n_0_[9] ;
  wire sr_rvalid;

  FDRE #(
    .INIT(1'b0)) 
    \aresetn_d_reg[0] 
       (.C(aclk),
        .CE(1'b1),
        .D(1'b1),
        .Q(\aresetn_d_reg_n_0_[0] ),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \aresetn_d_reg[1] 
       (.C(aclk),
        .CE(1'b1),
        .D(\aresetn_d_reg_n_0_[0] ),
        .Q(\aresetn_d_reg_n_0_[1] ),
        .R(SR));
  (* SOFT_HLUTNM = "soft_lutpair593" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \m_axi_rready[0]_INST_0 
       (.I0(aa_rready),
        .I1(rd_req_reg[0]),
        .O(m_axi_rready[0]));
  (* SOFT_HLUTNM = "soft_lutpair593" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \m_axi_rready[1]_INST_0 
       (.I0(aa_rready),
        .I1(rd_req_reg[1]),
        .O(m_axi_rready[1]));
  (* SOFT_HLUTNM = "soft_lutpair585" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[10]_i_1 
       (.I0(m_axi_rdata[39]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[7]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[10] ),
        .O(skid_buffer[10]));
  (* SOFT_HLUTNM = "soft_lutpair584" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[11]_i_1 
       (.I0(m_axi_rdata[40]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[8]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[11] ),
        .O(skid_buffer[11]));
  (* SOFT_HLUTNM = "soft_lutpair583" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[12]_i_1 
       (.I0(m_axi_rdata[41]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[9]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[12] ),
        .O(skid_buffer[12]));
  (* SOFT_HLUTNM = "soft_lutpair582" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[13]_i_1 
       (.I0(m_axi_rdata[42]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[10]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[13] ),
        .O(skid_buffer[13]));
  (* SOFT_HLUTNM = "soft_lutpair581" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[14]_i_1 
       (.I0(m_axi_rdata[43]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[11]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[14] ),
        .O(skid_buffer[14]));
  (* SOFT_HLUTNM = "soft_lutpair580" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[15]_i_1 
       (.I0(m_axi_rdata[44]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[12]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[15] ),
        .O(skid_buffer[15]));
  (* SOFT_HLUTNM = "soft_lutpair579" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[16]_i_1 
       (.I0(m_axi_rdata[45]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[13]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[16] ),
        .O(skid_buffer[16]));
  (* SOFT_HLUTNM = "soft_lutpair578" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[17]_i_1 
       (.I0(m_axi_rdata[46]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[14]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[17] ),
        .O(skid_buffer[17]));
  (* SOFT_HLUTNM = "soft_lutpair577" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[18]_i_1 
       (.I0(m_axi_rdata[47]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[15]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[18] ),
        .O(skid_buffer[18]));
  (* SOFT_HLUTNM = "soft_lutpair576" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[19]_i_1 
       (.I0(m_axi_rdata[48]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[16]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[19] ),
        .O(skid_buffer[19]));
  (* SOFT_HLUTNM = "soft_lutpair575" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[20]_i_1 
       (.I0(m_axi_rdata[49]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[17]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[20] ),
        .O(skid_buffer[20]));
  (* SOFT_HLUTNM = "soft_lutpair574" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[21]_i_1 
       (.I0(m_axi_rdata[50]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[18]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[21] ),
        .O(skid_buffer[21]));
  (* SOFT_HLUTNM = "soft_lutpair573" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[22]_i_1 
       (.I0(m_axi_rdata[51]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[19]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[22] ),
        .O(skid_buffer[22]));
  (* SOFT_HLUTNM = "soft_lutpair572" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[23]_i_1 
       (.I0(m_axi_rdata[52]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[20]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[23] ),
        .O(skid_buffer[23]));
  (* SOFT_HLUTNM = "soft_lutpair571" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[24]_i_1 
       (.I0(m_axi_rdata[53]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[21]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[24] ),
        .O(skid_buffer[24]));
  (* SOFT_HLUTNM = "soft_lutpair570" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[25]_i_1 
       (.I0(m_axi_rdata[54]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[22]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[25] ),
        .O(skid_buffer[25]));
  (* SOFT_HLUTNM = "soft_lutpair569" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[26]_i_1 
       (.I0(m_axi_rdata[55]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[23]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[26] ),
        .O(skid_buffer[26]));
  (* SOFT_HLUTNM = "soft_lutpair568" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[27]_i_1 
       (.I0(m_axi_rdata[56]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[24]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[27] ),
        .O(skid_buffer[27]));
  (* SOFT_HLUTNM = "soft_lutpair567" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[28]_i_1 
       (.I0(m_axi_rdata[57]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[25]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[28] ),
        .O(skid_buffer[28]));
  (* SOFT_HLUTNM = "soft_lutpair566" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[29]_i_1 
       (.I0(m_axi_rdata[58]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[26]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[29] ),
        .O(skid_buffer[29]));
  (* SOFT_HLUTNM = "soft_lutpair565" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[30]_i_1 
       (.I0(m_axi_rdata[59]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[27]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[30] ),
        .O(skid_buffer[30]));
  (* SOFT_HLUTNM = "soft_lutpair564" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[31]_i_1 
       (.I0(m_axi_rdata[60]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[28]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[31] ),
        .O(skid_buffer[31]));
  (* SOFT_HLUTNM = "soft_lutpair563" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[32]_i_1 
       (.I0(m_axi_rdata[61]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[29]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[32] ),
        .O(skid_buffer[32]));
  (* SOFT_HLUTNM = "soft_lutpair562" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[33]_i_1 
       (.I0(m_axi_rdata[62]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[30]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[33] ),
        .O(skid_buffer[33]));
  (* SOFT_HLUTNM = "soft_lutpair561" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[34]_i_2 
       (.I0(m_axi_rdata[63]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[31]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[34] ),
        .O(skid_buffer[34]));
  (* SOFT_HLUTNM = "soft_lutpair592" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[3]_i_1 
       (.I0(m_axi_rdata[32]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[0]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[3] ),
        .O(skid_buffer[3]));
  (* SOFT_HLUTNM = "soft_lutpair591" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[4]_i_1 
       (.I0(m_axi_rdata[33]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[1]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[4] ),
        .O(skid_buffer[4]));
  (* SOFT_HLUTNM = "soft_lutpair590" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[5]_i_1 
       (.I0(m_axi_rdata[34]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[2]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[5] ),
        .O(skid_buffer[5]));
  (* SOFT_HLUTNM = "soft_lutpair589" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[6]_i_1 
       (.I0(m_axi_rdata[35]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[3]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[6] ),
        .O(skid_buffer[6]));
  (* SOFT_HLUTNM = "soft_lutpair588" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[7]_i_1 
       (.I0(m_axi_rdata[36]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[4]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[7] ),
        .O(skid_buffer[7]));
  (* SOFT_HLUTNM = "soft_lutpair587" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[8]_i_1 
       (.I0(m_axi_rdata[37]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[5]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[8] ),
        .O(skid_buffer[8]));
  (* SOFT_HLUTNM = "soft_lutpair586" *) 
  LUT5 #(
    .INIT(32'hB8FFB800)) 
    \m_payload_i[9]_i_1 
       (.I0(m_axi_rdata[38]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[6]),
        .I3(aa_rready),
        .I4(\skid_buffer_reg_n_0_[9] ),
        .O(skid_buffer[9]));
  FDRE \m_payload_i_reg[0] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[0]),
        .Q(\m_payload_i_reg[34]_0 [0]),
        .R(1'b0));
  FDRE \m_payload_i_reg[10] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[10]),
        .Q(\m_payload_i_reg[34]_0 [8]),
        .R(1'b0));
  FDRE \m_payload_i_reg[11] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[11]),
        .Q(\m_payload_i_reg[34]_0 [9]),
        .R(1'b0));
  FDRE \m_payload_i_reg[12] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[12]),
        .Q(\m_payload_i_reg[34]_0 [10]),
        .R(1'b0));
  FDRE \m_payload_i_reg[13] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[13]),
        .Q(\m_payload_i_reg[34]_0 [11]),
        .R(1'b0));
  FDRE \m_payload_i_reg[14] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[14]),
        .Q(\m_payload_i_reg[34]_0 [12]),
        .R(1'b0));
  FDRE \m_payload_i_reg[15] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[15]),
        .Q(\m_payload_i_reg[34]_0 [13]),
        .R(1'b0));
  FDRE \m_payload_i_reg[16] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[16]),
        .Q(\m_payload_i_reg[34]_0 [14]),
        .R(1'b0));
  FDRE \m_payload_i_reg[17] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[17]),
        .Q(\m_payload_i_reg[34]_0 [15]),
        .R(1'b0));
  FDRE \m_payload_i_reg[18] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[18]),
        .Q(\m_payload_i_reg[34]_0 [16]),
        .R(1'b0));
  FDRE \m_payload_i_reg[19] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[19]),
        .Q(\m_payload_i_reg[34]_0 [17]),
        .R(1'b0));
  FDRE \m_payload_i_reg[20] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[20]),
        .Q(\m_payload_i_reg[34]_0 [18]),
        .R(1'b0));
  FDRE \m_payload_i_reg[21] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[21]),
        .Q(\m_payload_i_reg[34]_0 [19]),
        .R(1'b0));
  FDRE \m_payload_i_reg[22] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[22]),
        .Q(\m_payload_i_reg[34]_0 [20]),
        .R(1'b0));
  FDRE \m_payload_i_reg[23] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[23]),
        .Q(\m_payload_i_reg[34]_0 [21]),
        .R(1'b0));
  FDRE \m_payload_i_reg[24] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[24]),
        .Q(\m_payload_i_reg[34]_0 [22]),
        .R(1'b0));
  FDRE \m_payload_i_reg[25] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[25]),
        .Q(\m_payload_i_reg[34]_0 [23]),
        .R(1'b0));
  FDRE \m_payload_i_reg[26] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[26]),
        .Q(\m_payload_i_reg[34]_0 [24]),
        .R(1'b0));
  FDRE \m_payload_i_reg[27] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[27]),
        .Q(\m_payload_i_reg[34]_0 [25]),
        .R(1'b0));
  FDRE \m_payload_i_reg[28] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[28]),
        .Q(\m_payload_i_reg[34]_0 [26]),
        .R(1'b0));
  FDRE \m_payload_i_reg[29] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[29]),
        .Q(\m_payload_i_reg[34]_0 [27]),
        .R(1'b0));
  FDRE \m_payload_i_reg[30] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[30]),
        .Q(\m_payload_i_reg[34]_0 [28]),
        .R(1'b0));
  FDRE \m_payload_i_reg[31] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[31]),
        .Q(\m_payload_i_reg[34]_0 [29]),
        .R(1'b0));
  FDRE \m_payload_i_reg[32] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[32]),
        .Q(\m_payload_i_reg[34]_0 [30]),
        .R(1'b0));
  FDRE \m_payload_i_reg[33] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[33]),
        .Q(\m_payload_i_reg[34]_0 [31]),
        .R(1'b0));
  FDRE \m_payload_i_reg[34] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[34]),
        .Q(\m_payload_i_reg[34]_0 [32]),
        .R(1'b0));
  FDRE \m_payload_i_reg[3] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[3]),
        .Q(\m_payload_i_reg[34]_0 [1]),
        .R(1'b0));
  FDRE \m_payload_i_reg[4] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[4]),
        .Q(\m_payload_i_reg[34]_0 [2]),
        .R(1'b0));
  FDRE \m_payload_i_reg[5] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[5]),
        .Q(\m_payload_i_reg[34]_0 [3]),
        .R(1'b0));
  FDRE \m_payload_i_reg[6] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[6]),
        .Q(\m_payload_i_reg[34]_0 [4]),
        .R(1'b0));
  FDRE \m_payload_i_reg[7] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[7]),
        .Q(\m_payload_i_reg[34]_0 [5]),
        .R(1'b0));
  FDRE \m_payload_i_reg[8] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[8]),
        .Q(\m_payload_i_reg[34]_0 [6]),
        .R(1'b0));
  FDRE \m_payload_i_reg[9] 
       (.C(aclk),
        .CE(E),
        .D(skid_buffer[9]),
        .Q(\m_payload_i_reg[34]_0 [7]),
        .R(1'b0));
  LUT6 #(
    .INIT(64'h000000007FFFFFFF)) 
    \m_ready_d[1]_i_4 
       (.I0(sr_rvalid),
        .I1(\m_payload_i_reg[34]_0 [0]),
        .I2(s_axi_rready),
        .I3(aa_grant_rnw),
        .I4(m_valid_i),
        .I5(Q),
        .O(m_valid_i_reg_0));
  LUT6 #(
    .INIT(64'h88808888AAAAAAAA)) 
    m_valid_i_i_1
       (.I0(\aresetn_d_reg_n_0_[1] ),
        .I1(sr_rvalid),
        .I2(Q),
        .I3(s_ready_i_reg_0),
        .I4(s_axi_rready),
        .I5(m_valid_i_i_3_n_0),
        .O(m_valid_i_i_1_n_0));
  LUT6 #(
    .INIT(64'hA8AAA8A8A8AAAAAA)) 
    m_valid_i_i_3
       (.I0(aa_rready),
        .I1(Q),
        .I2(s_ready_i_reg_0),
        .I3(m_axi_rvalid[1]),
        .I4(m_atarget_enc),
        .I5(m_axi_rvalid[0]),
        .O(m_valid_i_i_3_n_0));
  FDRE #(
    .INIT(1'b0)) 
    m_valid_i_reg
       (.C(aclk),
        .CE(1'b1),
        .D(m_valid_i_i_1_n_0),
        .Q(sr_rvalid),
        .R(1'b0));
  LUT6 #(
    .INIT(64'h8A8A8AAA8A8A8A8A)) 
    s_ready_i_i_1
       (.I0(\aresetn_d_reg_n_0_[0] ),
        .I1(m_valid_i_i_3_n_0),
        .I2(sr_rvalid),
        .I3(Q),
        .I4(s_ready_i_reg_0),
        .I5(s_axi_rready),
        .O(s_ready_i_i_1_n_0));
  FDRE #(
    .INIT(1'b0)) 
    s_ready_i_reg
       (.C(aclk),
        .CE(1'b1),
        .D(s_ready_i_i_1_n_0),
        .Q(aa_rready),
        .R(1'b0));
  LUT2 #(
    .INIT(4'hE)) 
    \skid_buffer[0]_i_1 
       (.I0(aa_rready),
        .I1(\skid_buffer_reg_n_0_[0] ),
        .O(skid_buffer[0]));
  (* SOFT_HLUTNM = "soft_lutpair585" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[10]_i_1 
       (.I0(m_axi_rdata[39]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[7]),
        .O(\skid_buffer[10]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair584" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[11]_i_1 
       (.I0(m_axi_rdata[40]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[8]),
        .O(\skid_buffer[11]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair583" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[12]_i_1 
       (.I0(m_axi_rdata[41]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[9]),
        .O(\skid_buffer[12]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair582" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[13]_i_1 
       (.I0(m_axi_rdata[42]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[10]),
        .O(\skid_buffer[13]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair581" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[14]_i_1 
       (.I0(m_axi_rdata[43]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[11]),
        .O(\skid_buffer[14]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair580" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[15]_i_1 
       (.I0(m_axi_rdata[44]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[12]),
        .O(\skid_buffer[15]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair579" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[16]_i_1 
       (.I0(m_axi_rdata[45]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[13]),
        .O(\skid_buffer[16]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair578" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[17]_i_1 
       (.I0(m_axi_rdata[46]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[14]),
        .O(\skid_buffer[17]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair577" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[18]_i_1 
       (.I0(m_axi_rdata[47]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[15]),
        .O(\skid_buffer[18]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair576" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[19]_i_1 
       (.I0(m_axi_rdata[48]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[16]),
        .O(\skid_buffer[19]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair575" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[20]_i_1 
       (.I0(m_axi_rdata[49]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[17]),
        .O(\skid_buffer[20]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair574" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[21]_i_1 
       (.I0(m_axi_rdata[50]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[18]),
        .O(\skid_buffer[21]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair573" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[22]_i_1 
       (.I0(m_axi_rdata[51]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[19]),
        .O(\skid_buffer[22]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair572" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[23]_i_1 
       (.I0(m_axi_rdata[52]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[20]),
        .O(\skid_buffer[23]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair571" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[24]_i_1 
       (.I0(m_axi_rdata[53]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[21]),
        .O(\skid_buffer[24]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair570" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[25]_i_1 
       (.I0(m_axi_rdata[54]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[22]),
        .O(\skid_buffer[25]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair569" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[26]_i_1 
       (.I0(m_axi_rdata[55]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[23]),
        .O(\skid_buffer[26]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair568" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[27]_i_1 
       (.I0(m_axi_rdata[56]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[24]),
        .O(\skid_buffer[27]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair567" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[28]_i_1 
       (.I0(m_axi_rdata[57]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[25]),
        .O(\skid_buffer[28]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair566" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[29]_i_1 
       (.I0(m_axi_rdata[58]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[26]),
        .O(\skid_buffer[29]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair565" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[30]_i_1 
       (.I0(m_axi_rdata[59]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[27]),
        .O(\skid_buffer[30]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair564" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[31]_i_1 
       (.I0(m_axi_rdata[60]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[28]),
        .O(\skid_buffer[31]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair563" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[32]_i_1 
       (.I0(m_axi_rdata[61]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[29]),
        .O(\skid_buffer[32]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair562" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[33]_i_1 
       (.I0(m_axi_rdata[62]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[30]),
        .O(\skid_buffer[33]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair561" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[34]_i_1 
       (.I0(m_axi_rdata[63]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[31]),
        .O(\skid_buffer[34]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair592" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[3]_i_1 
       (.I0(m_axi_rdata[32]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[0]),
        .O(\skid_buffer[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair591" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[4]_i_1 
       (.I0(m_axi_rdata[33]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[1]),
        .O(\skid_buffer[4]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair590" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[5]_i_1 
       (.I0(m_axi_rdata[34]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[2]),
        .O(\skid_buffer[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair589" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[6]_i_1 
       (.I0(m_axi_rdata[35]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[3]),
        .O(\skid_buffer[6]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair588" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[7]_i_1 
       (.I0(m_axi_rdata[36]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[4]),
        .O(\skid_buffer[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair587" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[8]_i_1 
       (.I0(m_axi_rdata[37]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[5]),
        .O(\skid_buffer[8]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair586" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \skid_buffer[9]_i_1 
       (.I0(m_axi_rdata[38]),
        .I1(m_atarget_enc),
        .I2(m_axi_rdata[6]),
        .O(\skid_buffer[9]_i_1_n_0 ));
  FDRE \skid_buffer_reg[0] 
       (.C(aclk),
        .CE(1'b1),
        .D(skid_buffer[0]),
        .Q(\skid_buffer_reg_n_0_[0] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[10] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[10]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[10] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[11] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[11]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[11] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[12] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[12]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[12] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[13] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[13]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[13] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[14] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[14]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[14] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[15] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[15]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[15] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[16] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[16]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[16] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[17] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[17]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[17] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[18] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[18]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[18] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[19] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[19]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[19] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[20] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[20]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[20] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[21] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[21]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[21] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[22] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[22]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[22] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[23] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[23]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[23] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[24] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[24]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[24] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[25] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[25]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[25] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[26] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[26]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[26] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[27] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[27]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[27] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[28] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[28]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[28] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[29] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[29]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[29] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[30] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[30]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[30] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[31] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[31]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[31] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[32] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[32]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[32] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[33] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[33]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[33] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[34] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[34]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[34] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[3] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[3]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[3] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[4] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[4]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[4] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[5] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[5]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[5] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[6] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[6]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[6] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[7] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[7]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[7] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[8] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[8]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[8] ),
        .R(1'b0));
  FDRE \skid_buffer_reg[9] 
       (.C(aclk),
        .CE(aa_rready),
        .D(\skid_buffer[9]_i_1_n_0 ),
        .Q(\skid_buffer_reg_n_0_[9] ),
        .R(1'b0));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axis_dwidth_converter_v1_1_32_axis_dwidth_converter
   (\state_reg[0] ,
    \state_reg[1] ,
    m_axis_tlast,
    m_axis_tdata,
    m_axis_tid,
    m_axis_tuser,
    s_axis_tvalid,
    s_axis_tkeep,
    aclk,
    s_axis_tdata,
    s_axis_tlast,
    s_axis_tid,
    s_axis_tuser,
    aresetn);
  output \state_reg[0] ;
  output \state_reg[1] ;
  output m_axis_tlast;
  output [23:0]m_axis_tdata;
  output [5:0]m_axis_tid;
  output [0:0]m_axis_tuser;
  input s_axis_tvalid;
  input [0:0]s_axis_tkeep;
  input aclk;
  input [47:0]s_axis_tdata;
  input s_axis_tlast;
  input [5:0]s_axis_tid;
  input [0:0]s_axis_tuser;
  input aresetn;

  wire aclk;
  wire areset_r;
  wire aresetn;
  wire [23:0]m_axis_tdata;
  wire [5:0]m_axis_tid;
  wire m_axis_tlast;
  wire [0:0]m_axis_tuser;
  wire p_0_in;
  wire [47:0]s_axis_tdata;
  wire [5:0]s_axis_tid;
  wire [0:0]s_axis_tkeep;
  wire s_axis_tlast;
  wire [0:0]s_axis_tuser;
  wire s_axis_tvalid;
  wire \state_reg[0] ;
  wire \state_reg[1] ;

  LUT1 #(
    .INIT(2'h1)) 
    areset_r_i_1
       (.I0(aresetn),
        .O(p_0_in));
  FDRE #(
    .INIT(1'b0)) 
    areset_r_reg
       (.C(aclk),
        .CE(1'b1),
        .D(p_0_in),
        .Q(areset_r),
        .R(1'b0));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axis_dwidth_converter_v1_1_32_axisc_downsizer \gen_downsizer_conversion.axisc_downsizer_0 
       (.E(\state_reg[0] ),
        .aclk(aclk),
        .areset_r(areset_r),
        .m_axis_tdata(m_axis_tdata),
        .m_axis_tid(m_axis_tid),
        .m_axis_tlast(m_axis_tlast),
        .m_axis_tuser(m_axis_tuser),
        .s_axis_tdata(s_axis_tdata),
        .s_axis_tid(s_axis_tid),
        .s_axis_tkeep(s_axis_tkeep),
        .s_axis_tlast(s_axis_tlast),
        .s_axis_tuser(s_axis_tuser),
        .s_axis_tvalid(s_axis_tvalid),
        .\state_reg[1]_0 (\state_reg[1] ));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axis_dwidth_converter_v1_1_32_axisc_downsizer
   (E,
    \state_reg[1]_0 ,
    m_axis_tlast,
    m_axis_tdata,
    m_axis_tid,
    m_axis_tuser,
    s_axis_tvalid,
    areset_r,
    s_axis_tkeep,
    aclk,
    s_axis_tdata,
    s_axis_tlast,
    s_axis_tid,
    s_axis_tuser);
  output [0:0]E;
  output \state_reg[1]_0 ;
  output m_axis_tlast;
  output [23:0]m_axis_tdata;
  output [5:0]m_axis_tid;
  output [0:0]m_axis_tuser;
  input s_axis_tvalid;
  input areset_r;
  input [0:0]s_axis_tkeep;
  input aclk;
  input [47:0]s_axis_tdata;
  input s_axis_tlast;
  input [5:0]s_axis_tid;
  input [0:0]s_axis_tuser;

  wire [0:0]E;
  wire aclk;
  wire areset_r;
  wire [23:0]m_axis_tdata;
  wire [5:0]m_axis_tid;
  wire m_axis_tlast;
  wire [0:0]m_axis_tuser;
  wire [59:0]p_0_in1_in;
  wire \r0_data_reg_n_0_[32] ;
  wire \r0_data_reg_n_0_[33] ;
  wire \r0_data_reg_n_0_[34] ;
  wire \r0_data_reg_n_0_[35] ;
  wire \r0_data_reg_n_0_[36] ;
  wire \r0_data_reg_n_0_[37] ;
  wire \r0_data_reg_n_0_[38] ;
  wire \r0_data_reg_n_0_[39] ;
  wire \r0_data_reg_n_0_[40] ;
  wire \r0_data_reg_n_0_[41] ;
  wire \r0_data_reg_n_0_[42] ;
  wire \r0_data_reg_n_0_[43] ;
  wire \r0_data_reg_n_0_[48] ;
  wire \r0_data_reg_n_0_[49] ;
  wire \r0_data_reg_n_0_[50] ;
  wire \r0_data_reg_n_0_[51] ;
  wire \r0_data_reg_n_0_[52] ;
  wire \r0_data_reg_n_0_[53] ;
  wire \r0_data_reg_n_0_[54] ;
  wire \r0_data_reg_n_0_[55] ;
  wire \r0_data_reg_n_0_[56] ;
  wire \r0_data_reg_n_0_[57] ;
  wire \r0_data_reg_n_0_[58] ;
  wire \r0_data_reg_n_0_[59] ;
  wire [9:4]r0_id;
  wire [0:0]r0_is_end;
  wire \r0_is_null_r[1]_i_1_n_0 ;
  wire r0_last_reg_n_0;
  wire \r0_out_sel_r[0]_i_1_n_0 ;
  wire \r0_out_sel_r_reg_n_0_[0] ;
  wire [19:19]r0_user;
  wire [9:4]r1_id;
  wire r1_last_reg_n_0;
  wire r1_load;
  wire [0:0]r1_user;
  wire [47:0]s_axis_tdata;
  wire [5:0]s_axis_tid;
  wire [0:0]s_axis_tkeep;
  wire s_axis_tlast;
  wire [0:0]s_axis_tuser;
  wire s_axis_tvalid;
  wire [1:1]state;
  wire \state[0]_i_1_n_0 ;
  wire \state_reg[1]_0 ;

  (* SOFT_HLUTNM = "soft_lutpair543" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[0]_INST_0 
       (.I0(p_0_in1_in[32]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[0]),
        .O(m_axis_tdata[0]));
  (* SOFT_HLUTNM = "soft_lutpair538" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[10]_INST_0 
       (.I0(p_0_in1_in[42]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[10]),
        .O(m_axis_tdata[10]));
  (* SOFT_HLUTNM = "soft_lutpair538" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[11]_INST_0 
       (.I0(p_0_in1_in[43]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[11]),
        .O(m_axis_tdata[11]));
  (* SOFT_HLUTNM = "soft_lutpair537" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[16]_INST_0 
       (.I0(p_0_in1_in[48]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[16]),
        .O(m_axis_tdata[12]));
  (* SOFT_HLUTNM = "soft_lutpair537" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[17]_INST_0 
       (.I0(p_0_in1_in[49]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[17]),
        .O(m_axis_tdata[13]));
  (* SOFT_HLUTNM = "soft_lutpair536" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[18]_INST_0 
       (.I0(p_0_in1_in[50]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[18]),
        .O(m_axis_tdata[14]));
  (* SOFT_HLUTNM = "soft_lutpair536" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[19]_INST_0 
       (.I0(p_0_in1_in[51]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[19]),
        .O(m_axis_tdata[15]));
  (* SOFT_HLUTNM = "soft_lutpair543" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[1]_INST_0 
       (.I0(p_0_in1_in[33]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[1]),
        .O(m_axis_tdata[1]));
  (* SOFT_HLUTNM = "soft_lutpair535" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[20]_INST_0 
       (.I0(p_0_in1_in[52]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[20]),
        .O(m_axis_tdata[16]));
  (* SOFT_HLUTNM = "soft_lutpair535" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[21]_INST_0 
       (.I0(p_0_in1_in[53]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[21]),
        .O(m_axis_tdata[17]));
  (* SOFT_HLUTNM = "soft_lutpair534" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[22]_INST_0 
       (.I0(p_0_in1_in[54]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[22]),
        .O(m_axis_tdata[18]));
  (* SOFT_HLUTNM = "soft_lutpair534" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[23]_INST_0 
       (.I0(p_0_in1_in[55]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[23]),
        .O(m_axis_tdata[19]));
  (* SOFT_HLUTNM = "soft_lutpair533" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[24]_INST_0 
       (.I0(p_0_in1_in[56]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[24]),
        .O(m_axis_tdata[20]));
  (* SOFT_HLUTNM = "soft_lutpair533" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[25]_INST_0 
       (.I0(p_0_in1_in[57]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[25]),
        .O(m_axis_tdata[21]));
  (* SOFT_HLUTNM = "soft_lutpair532" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[26]_INST_0 
       (.I0(p_0_in1_in[58]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[26]),
        .O(m_axis_tdata[22]));
  (* SOFT_HLUTNM = "soft_lutpair532" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[27]_INST_0 
       (.I0(p_0_in1_in[59]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[27]),
        .O(m_axis_tdata[23]));
  (* SOFT_HLUTNM = "soft_lutpair542" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[2]_INST_0 
       (.I0(p_0_in1_in[34]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[2]),
        .O(m_axis_tdata[2]));
  (* SOFT_HLUTNM = "soft_lutpair542" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[3]_INST_0 
       (.I0(p_0_in1_in[35]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[3]),
        .O(m_axis_tdata[3]));
  (* SOFT_HLUTNM = "soft_lutpair541" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[4]_INST_0 
       (.I0(p_0_in1_in[36]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[4]),
        .O(m_axis_tdata[4]));
  (* SOFT_HLUTNM = "soft_lutpair541" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[5]_INST_0 
       (.I0(p_0_in1_in[37]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[5]),
        .O(m_axis_tdata[5]));
  (* SOFT_HLUTNM = "soft_lutpair540" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[6]_INST_0 
       (.I0(p_0_in1_in[38]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[6]),
        .O(m_axis_tdata[6]));
  (* SOFT_HLUTNM = "soft_lutpair540" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[7]_INST_0 
       (.I0(p_0_in1_in[39]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[7]),
        .O(m_axis_tdata[7]));
  (* SOFT_HLUTNM = "soft_lutpair539" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[8]_INST_0 
       (.I0(p_0_in1_in[40]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[8]),
        .O(m_axis_tdata[8]));
  (* SOFT_HLUTNM = "soft_lutpair539" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tdata[9]_INST_0 
       (.I0(p_0_in1_in[41]),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(p_0_in1_in[9]),
        .O(m_axis_tdata[9]));
  LUT4 #(
    .INIT(16'hBF80)) 
    \m_axis_tid[4]_INST_0 
       (.I0(r1_id[4]),
        .I1(\state_reg[1]_0 ),
        .I2(E),
        .I3(r0_id[4]),
        .O(m_axis_tid[0]));
  LUT4 #(
    .INIT(16'hBF80)) 
    \m_axis_tid[5]_INST_0 
       (.I0(r1_id[5]),
        .I1(\state_reg[1]_0 ),
        .I2(E),
        .I3(r0_id[5]),
        .O(m_axis_tid[1]));
  LUT4 #(
    .INIT(16'hBF80)) 
    \m_axis_tid[6]_INST_0 
       (.I0(r1_id[6]),
        .I1(\state_reg[1]_0 ),
        .I2(E),
        .I3(r0_id[6]),
        .O(m_axis_tid[2]));
  LUT4 #(
    .INIT(16'hBF80)) 
    \m_axis_tid[7]_INST_0 
       (.I0(r1_id[7]),
        .I1(\state_reg[1]_0 ),
        .I2(E),
        .I3(r0_id[7]),
        .O(m_axis_tid[3]));
  LUT4 #(
    .INIT(16'hBF80)) 
    \m_axis_tid[8]_INST_0 
       (.I0(r1_id[8]),
        .I1(\state_reg[1]_0 ),
        .I2(E),
        .I3(r0_id[8]),
        .O(m_axis_tid[4]));
  (* SOFT_HLUTNM = "soft_lutpair531" *) 
  LUT4 #(
    .INIT(16'hBF80)) 
    \m_axis_tid[9]_INST_0 
       (.I0(r1_id[9]),
        .I1(\state_reg[1]_0 ),
        .I2(E),
        .I3(r0_id[9]),
        .O(m_axis_tid[5]));
  LUT5 #(
    .INIT(32'hF8880888)) 
    m_axis_tlast_INST_0
       (.I0(r0_last_reg_n_0),
        .I1(r0_is_end),
        .I2(\state_reg[1]_0 ),
        .I3(E),
        .I4(r1_last_reg_n_0),
        .O(m_axis_tlast));
  LUT3 #(
    .INIT(8'hB8)) 
    \m_axis_tuser[0]_INST_0 
       (.I0(r1_user),
        .I1(\r0_out_sel_r_reg_n_0_[0] ),
        .I2(r0_user),
        .O(m_axis_tuser));
  FDRE \r0_data_reg[0] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[0]),
        .Q(p_0_in1_in[0]),
        .R(1'b0));
  FDRE \r0_data_reg[10] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[10]),
        .Q(p_0_in1_in[10]),
        .R(1'b0));
  FDRE \r0_data_reg[11] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[11]),
        .Q(p_0_in1_in[11]),
        .R(1'b0));
  FDRE \r0_data_reg[16] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[12]),
        .Q(p_0_in1_in[16]),
        .R(1'b0));
  FDRE \r0_data_reg[17] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[13]),
        .Q(p_0_in1_in[17]),
        .R(1'b0));
  FDRE \r0_data_reg[18] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[14]),
        .Q(p_0_in1_in[18]),
        .R(1'b0));
  FDRE \r0_data_reg[19] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[15]),
        .Q(p_0_in1_in[19]),
        .R(1'b0));
  FDRE \r0_data_reg[1] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[1]),
        .Q(p_0_in1_in[1]),
        .R(1'b0));
  FDRE \r0_data_reg[20] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[16]),
        .Q(p_0_in1_in[20]),
        .R(1'b0));
  FDRE \r0_data_reg[21] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[17]),
        .Q(p_0_in1_in[21]),
        .R(1'b0));
  FDRE \r0_data_reg[22] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[18]),
        .Q(p_0_in1_in[22]),
        .R(1'b0));
  FDRE \r0_data_reg[23] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[19]),
        .Q(p_0_in1_in[23]),
        .R(1'b0));
  FDRE \r0_data_reg[24] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[20]),
        .Q(p_0_in1_in[24]),
        .R(1'b0));
  FDRE \r0_data_reg[25] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[21]),
        .Q(p_0_in1_in[25]),
        .R(1'b0));
  FDRE \r0_data_reg[26] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[22]),
        .Q(p_0_in1_in[26]),
        .R(1'b0));
  FDRE \r0_data_reg[27] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[23]),
        .Q(p_0_in1_in[27]),
        .R(1'b0));
  FDRE \r0_data_reg[2] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[2]),
        .Q(p_0_in1_in[2]),
        .R(1'b0));
  FDRE \r0_data_reg[32] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[24]),
        .Q(\r0_data_reg_n_0_[32] ),
        .R(1'b0));
  FDRE \r0_data_reg[33] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[25]),
        .Q(\r0_data_reg_n_0_[33] ),
        .R(1'b0));
  FDRE \r0_data_reg[34] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[26]),
        .Q(\r0_data_reg_n_0_[34] ),
        .R(1'b0));
  FDRE \r0_data_reg[35] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[27]),
        .Q(\r0_data_reg_n_0_[35] ),
        .R(1'b0));
  FDRE \r0_data_reg[36] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[28]),
        .Q(\r0_data_reg_n_0_[36] ),
        .R(1'b0));
  FDRE \r0_data_reg[37] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[29]),
        .Q(\r0_data_reg_n_0_[37] ),
        .R(1'b0));
  FDRE \r0_data_reg[38] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[30]),
        .Q(\r0_data_reg_n_0_[38] ),
        .R(1'b0));
  FDRE \r0_data_reg[39] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[31]),
        .Q(\r0_data_reg_n_0_[39] ),
        .R(1'b0));
  FDRE \r0_data_reg[3] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[3]),
        .Q(p_0_in1_in[3]),
        .R(1'b0));
  FDRE \r0_data_reg[40] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[32]),
        .Q(\r0_data_reg_n_0_[40] ),
        .R(1'b0));
  FDRE \r0_data_reg[41] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[33]),
        .Q(\r0_data_reg_n_0_[41] ),
        .R(1'b0));
  FDRE \r0_data_reg[42] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[34]),
        .Q(\r0_data_reg_n_0_[42] ),
        .R(1'b0));
  FDRE \r0_data_reg[43] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[35]),
        .Q(\r0_data_reg_n_0_[43] ),
        .R(1'b0));
  FDRE \r0_data_reg[48] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[36]),
        .Q(\r0_data_reg_n_0_[48] ),
        .R(1'b0));
  FDRE \r0_data_reg[49] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[37]),
        .Q(\r0_data_reg_n_0_[49] ),
        .R(1'b0));
  FDRE \r0_data_reg[4] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[4]),
        .Q(p_0_in1_in[4]),
        .R(1'b0));
  FDRE \r0_data_reg[50] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[38]),
        .Q(\r0_data_reg_n_0_[50] ),
        .R(1'b0));
  FDRE \r0_data_reg[51] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[39]),
        .Q(\r0_data_reg_n_0_[51] ),
        .R(1'b0));
  FDRE \r0_data_reg[52] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[40]),
        .Q(\r0_data_reg_n_0_[52] ),
        .R(1'b0));
  FDRE \r0_data_reg[53] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[41]),
        .Q(\r0_data_reg_n_0_[53] ),
        .R(1'b0));
  FDRE \r0_data_reg[54] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[42]),
        .Q(\r0_data_reg_n_0_[54] ),
        .R(1'b0));
  FDRE \r0_data_reg[55] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[43]),
        .Q(\r0_data_reg_n_0_[55] ),
        .R(1'b0));
  FDRE \r0_data_reg[56] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[44]),
        .Q(\r0_data_reg_n_0_[56] ),
        .R(1'b0));
  FDRE \r0_data_reg[57] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[45]),
        .Q(\r0_data_reg_n_0_[57] ),
        .R(1'b0));
  FDRE \r0_data_reg[58] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[46]),
        .Q(\r0_data_reg_n_0_[58] ),
        .R(1'b0));
  FDRE \r0_data_reg[59] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[47]),
        .Q(\r0_data_reg_n_0_[59] ),
        .R(1'b0));
  FDRE \r0_data_reg[5] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[5]),
        .Q(p_0_in1_in[5]),
        .R(1'b0));
  FDRE \r0_data_reg[6] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[6]),
        .Q(p_0_in1_in[6]),
        .R(1'b0));
  FDRE \r0_data_reg[7] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[7]),
        .Q(p_0_in1_in[7]),
        .R(1'b0));
  FDRE \r0_data_reg[8] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[8]),
        .Q(p_0_in1_in[8]),
        .R(1'b0));
  FDRE \r0_data_reg[9] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tdata[9]),
        .Q(p_0_in1_in[9]),
        .R(1'b0));
  FDRE \r0_id_reg[4] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tid[0]),
        .Q(r0_id[4]),
        .R(1'b0));
  FDRE \r0_id_reg[5] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tid[1]),
        .Q(r0_id[5]),
        .R(1'b0));
  FDRE \r0_id_reg[6] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tid[2]),
        .Q(r0_id[6]),
        .R(1'b0));
  FDRE \r0_id_reg[7] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tid[3]),
        .Q(r0_id[7]),
        .R(1'b0));
  FDRE \r0_id_reg[8] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tid[4]),
        .Q(r0_id[8]),
        .R(1'b0));
  FDRE \r0_id_reg[9] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tid[5]),
        .Q(r0_id[9]),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair530" *) 
  LUT4 #(
    .INIT(16'h7F40)) 
    \r0_is_null_r[1]_i_1 
       (.I0(s_axis_tkeep),
        .I1(s_axis_tvalid),
        .I2(E),
        .I3(r0_is_end),
        .O(\r0_is_null_r[1]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \r0_is_null_r_reg[1] 
       (.C(aclk),
        .CE(1'b1),
        .D(\r0_is_null_r[1]_i_1_n_0 ),
        .Q(r0_is_end),
        .R(areset_r));
  FDRE r0_last_reg
       (.C(aclk),
        .CE(E),
        .D(s_axis_tlast),
        .Q(r0_last_reg_n_0),
        .R(1'b0));
  LUT5 #(
    .INIT(32'h00000045)) 
    \r0_out_sel_r[0]_i_1 
       (.I0(r0_is_end),
        .I1(\state_reg[1]_0 ),
        .I2(E),
        .I3(\r0_out_sel_r_reg_n_0_[0] ),
        .I4(areset_r),
        .O(\r0_out_sel_r[0]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \r0_out_sel_r_reg[0] 
       (.C(aclk),
        .CE(1'b1),
        .D(\r0_out_sel_r[0]_i_1_n_0 ),
        .Q(\r0_out_sel_r_reg_n_0_[0] ),
        .R(1'b0));
  FDRE \r0_user_reg[19] 
       (.C(aclk),
        .CE(E),
        .D(s_axis_tuser),
        .Q(r0_user),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    \r1_data[27]_i_1 
       (.I0(\state_reg[1]_0 ),
        .I1(E),
        .O(r1_load));
  FDRE \r1_data_reg[0] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[32] ),
        .Q(p_0_in1_in[32]),
        .R(1'b0));
  FDRE \r1_data_reg[10] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[42] ),
        .Q(p_0_in1_in[42]),
        .R(1'b0));
  FDRE \r1_data_reg[11] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[43] ),
        .Q(p_0_in1_in[43]),
        .R(1'b0));
  FDRE \r1_data_reg[16] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[48] ),
        .Q(p_0_in1_in[48]),
        .R(1'b0));
  FDRE \r1_data_reg[17] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[49] ),
        .Q(p_0_in1_in[49]),
        .R(1'b0));
  FDRE \r1_data_reg[18] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[50] ),
        .Q(p_0_in1_in[50]),
        .R(1'b0));
  FDRE \r1_data_reg[19] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[51] ),
        .Q(p_0_in1_in[51]),
        .R(1'b0));
  FDRE \r1_data_reg[1] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[33] ),
        .Q(p_0_in1_in[33]),
        .R(1'b0));
  FDRE \r1_data_reg[20] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[52] ),
        .Q(p_0_in1_in[52]),
        .R(1'b0));
  FDRE \r1_data_reg[21] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[53] ),
        .Q(p_0_in1_in[53]),
        .R(1'b0));
  FDRE \r1_data_reg[22] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[54] ),
        .Q(p_0_in1_in[54]),
        .R(1'b0));
  FDRE \r1_data_reg[23] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[55] ),
        .Q(p_0_in1_in[55]),
        .R(1'b0));
  FDRE \r1_data_reg[24] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[56] ),
        .Q(p_0_in1_in[56]),
        .R(1'b0));
  FDRE \r1_data_reg[25] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[57] ),
        .Q(p_0_in1_in[57]),
        .R(1'b0));
  FDRE \r1_data_reg[26] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[58] ),
        .Q(p_0_in1_in[58]),
        .R(1'b0));
  FDRE \r1_data_reg[27] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[59] ),
        .Q(p_0_in1_in[59]),
        .R(1'b0));
  FDRE \r1_data_reg[2] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[34] ),
        .Q(p_0_in1_in[34]),
        .R(1'b0));
  FDRE \r1_data_reg[3] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[35] ),
        .Q(p_0_in1_in[35]),
        .R(1'b0));
  FDRE \r1_data_reg[4] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[36] ),
        .Q(p_0_in1_in[36]),
        .R(1'b0));
  FDRE \r1_data_reg[5] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[37] ),
        .Q(p_0_in1_in[37]),
        .R(1'b0));
  FDRE \r1_data_reg[6] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[38] ),
        .Q(p_0_in1_in[38]),
        .R(1'b0));
  FDRE \r1_data_reg[7] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[39] ),
        .Q(p_0_in1_in[39]),
        .R(1'b0));
  FDRE \r1_data_reg[8] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[40] ),
        .Q(p_0_in1_in[40]),
        .R(1'b0));
  FDRE \r1_data_reg[9] 
       (.C(aclk),
        .CE(r1_load),
        .D(\r0_data_reg_n_0_[41] ),
        .Q(p_0_in1_in[41]),
        .R(1'b0));
  FDRE \r1_id_reg[4] 
       (.C(aclk),
        .CE(r1_load),
        .D(r0_id[4]),
        .Q(r1_id[4]),
        .R(1'b0));
  FDRE \r1_id_reg[5] 
       (.C(aclk),
        .CE(r1_load),
        .D(r0_id[5]),
        .Q(r1_id[5]),
        .R(1'b0));
  FDRE \r1_id_reg[6] 
       (.C(aclk),
        .CE(r1_load),
        .D(r0_id[6]),
        .Q(r1_id[6]),
        .R(1'b0));
  FDRE \r1_id_reg[7] 
       (.C(aclk),
        .CE(r1_load),
        .D(r0_id[7]),
        .Q(r1_id[7]),
        .R(1'b0));
  FDRE \r1_id_reg[8] 
       (.C(aclk),
        .CE(r1_load),
        .D(r0_id[8]),
        .Q(r1_id[8]),
        .R(1'b0));
  FDRE \r1_id_reg[9] 
       (.C(aclk),
        .CE(r1_load),
        .D(r0_id[9]),
        .Q(r1_id[9]),
        .R(1'b0));
  FDRE r1_last_reg
       (.C(aclk),
        .CE(r1_load),
        .D(r0_last_reg_n_0),
        .Q(r1_last_reg_n_0),
        .R(1'b0));
  FDRE \r1_user_reg[0] 
       (.C(aclk),
        .CE(r1_load),
        .D(r0_user),
        .Q(r1_user),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair531" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \state[0]_i_1 
       (.I0(E),
        .I1(s_axis_tvalid),
        .O(\state[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair530" *) 
  LUT4 #(
    .INIT(16'hC5C0)) 
    \state[1]_i_1 
       (.I0(r0_is_end),
        .I1(s_axis_tvalid),
        .I2(E),
        .I3(\state_reg[1]_0 ),
        .O(state));
  (* FSM_ENCODING = "none" *) 
  FDRE #(
    .INIT(1'b0)) 
    \state_reg[0] 
       (.C(aclk),
        .CE(1'b1),
        .D(\state[0]_i_1_n_0 ),
        .Q(E),
        .R(areset_r));
  (* FSM_ENCODING = "none" *) 
  FDRE #(
    .INIT(1'b0)) 
    \state_reg[1] 
       (.C(aclk),
        .CE(1'b1),
        .D(state),
        .Q(\state_reg[1]_0 ),
        .R(areset_r));
endmodule

(* HW_HANDOFF = "Mipirx_xlnx_comb_w4_r1188.hwdef" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289
   (clkoutphy_out,
    csirxss_csi_irq,
    csirxss_s_axi_araddr,
    csirxss_s_axi_arprot,
    csirxss_s_axi_arready,
    csirxss_s_axi_arvalid,
    csirxss_s_axi_awaddr,
    csirxss_s_axi_awprot,
    csirxss_s_axi_awready,
    csirxss_s_axi_awvalid,
    csirxss_s_axi_bready,
    csirxss_s_axi_bresp,
    csirxss_s_axi_bvalid,
    csirxss_s_axi_rdata,
    csirxss_s_axi_rready,
    csirxss_s_axi_rresp,
    csirxss_s_axi_rvalid,
    csirxss_s_axi_wdata,
    csirxss_s_axi_wready,
    csirxss_s_axi_wstrb,
    csirxss_s_axi_wvalid,
    dphy_clk_200M,
    frame_rcvd_pulse_out,
    lite_aclk,
    lite_aresetn,
    mipi_phy_if_clk_n,
    mipi_phy_if_clk_p,
    mipi_phy_if_data_n,
    mipi_phy_if_data_p,
    pll_lock_out,
    rxbyteclkhs,
    system_rst_out,
    video_aclk,
    video_aresetn,
    video_out_tdata,
    video_out_tdest,
    video_out_tlast,
    video_out_tready,
    video_out_tuser,
    video_out_tvalid);
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLK.CLKOUTPHY_OUT CLK" *) (* x_interface_parameter = "XIL_INTERFACENAME CLK.CLKOUTPHY_OUT, CLK_DOMAIN bd_7289_phy_0_clkoutphy_out, FREQ_HZ 1500000000.0, FREQ_TOLERANCE_HZ 0, INSERT_VIP 0, PHASE 0.0" *) output clkoutphy_out;
  (* x_interface_info = "xilinx.com:signal:interrupt:1.0 INTR.CSIRXSS_CSI_IRQ INTERRUPT" *) (* x_interface_parameter = "XIL_INTERFACENAME INTR.CSIRXSS_CSI_IRQ, PortWidth 1, SENSITIVITY LEVEL_HIGH" *) output csirxss_csi_irq;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi ARADDR" *) (* x_interface_mode = "Slave" *) (* x_interface_parameter = "XIL_INTERFACENAME csirxss_s_axi, ADDR_WIDTH 13, ARUSER_WIDTH 0, AWUSER_WIDTH 0, BUSER_WIDTH 0, CLK_DOMAIN bd_7289_lite_aclk, DATA_WIDTH 32, FREQ_HZ 100000000, HAS_BRESP 1, HAS_BURST 0, HAS_CACHE 0, HAS_LOCK 0, HAS_PROT 1, HAS_QOS 0, HAS_REGION 0, HAS_RRESP 1, HAS_WSTRB 1, ID_WIDTH 0, INSERT_VIP 0, MAX_BURST_LENGTH 1, NUM_READ_OUTSTANDING 1, NUM_READ_THREADS 1, NUM_WRITE_OUTSTANDING 1, NUM_WRITE_THREADS 1, PHASE 0.0, PROTOCOL AXI4LITE, READ_WRITE_MODE READ_WRITE, RUSER_BITS_PER_BYTE 0, RUSER_WIDTH 0, SUPPORTS_NARROW_BURST 0, WUSER_BITS_PER_BYTE 0, WUSER_WIDTH 0" *) input [12:0]csirxss_s_axi_araddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi ARPROT" *) input [2:0]csirxss_s_axi_arprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi ARREADY" *) output [0:0]csirxss_s_axi_arready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi ARVALID" *) input [0:0]csirxss_s_axi_arvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi AWADDR" *) input [12:0]csirxss_s_axi_awaddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi AWPROT" *) input [2:0]csirxss_s_axi_awprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi AWREADY" *) output [0:0]csirxss_s_axi_awready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi AWVALID" *) input [0:0]csirxss_s_axi_awvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi BREADY" *) input [0:0]csirxss_s_axi_bready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi BRESP" *) output [1:0]csirxss_s_axi_bresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi BVALID" *) output [0:0]csirxss_s_axi_bvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi RDATA" *) output [31:0]csirxss_s_axi_rdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi RREADY" *) input [0:0]csirxss_s_axi_rready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi RRESP" *) output [1:0]csirxss_s_axi_rresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi RVALID" *) output [0:0]csirxss_s_axi_rvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi WDATA" *) input [31:0]csirxss_s_axi_wdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi WREADY" *) output [0:0]csirxss_s_axi_wready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi WSTRB" *) input [3:0]csirxss_s_axi_wstrb;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 csirxss_s_axi WVALID" *) input [0:0]csirxss_s_axi_wvalid;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLK.DPHY_CLK_200M CLK" *) (* x_interface_parameter = "XIL_INTERFACENAME CLK.DPHY_CLK_200M, CLK_DOMAIN bd_7289_dphy_clk_200M, FREQ_HZ 200000000, FREQ_TOLERANCE_HZ 0, INSERT_VIP 0, PHASE 0.0" *) input dphy_clk_200M;
  output frame_rcvd_pulse_out;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLK.LITE_ACLK CLK" *) (* x_interface_parameter = "XIL_INTERFACENAME CLK.LITE_ACLK, ASSOCIATED_BUSIF csirxss_s_axi, ASSOCIATED_RESET lite_aresetn, CLK_DOMAIN bd_7289_lite_aclk, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, INSERT_VIP 0, PHASE 0.0" *) input lite_aclk;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 RST.LITE_ARESETN RST" *) (* x_interface_parameter = "XIL_INTERFACENAME RST.LITE_ARESETN, INSERT_VIP 0, POLARITY ACTIVE_LOW, TYPE INTERCONNECT" *) input lite_aresetn;
  (* x_interface_info = "xilinx.com:interface:mipi_phy:1.0 mipi_phy_if CLK_N" *) (* x_interface_mode = "Slave" *) input mipi_phy_if_clk_n;
  (* x_interface_info = "xilinx.com:interface:mipi_phy:1.0 mipi_phy_if CLK_P" *) input mipi_phy_if_clk_p;
  (* x_interface_info = "xilinx.com:interface:mipi_phy:1.0 mipi_phy_if DATA_N" *) input [3:0]mipi_phy_if_data_n;
  (* x_interface_info = "xilinx.com:interface:mipi_phy:1.0 mipi_phy_if DATA_P" *) input [3:0]mipi_phy_if_data_p;
  output pll_lock_out;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLK.RXBYTECLKHS CLK" *) (* x_interface_parameter = "XIL_INTERFACENAME CLK.RXBYTECLKHS, CLK_DOMAIN bd_7289_phy_0_rxbyteclkhs, FREQ_HZ 148500000.0, FREQ_TOLERANCE_HZ 0, INSERT_VIP 0, PHASE 0" *) output rxbyteclkhs;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 RST.SYSTEM_RST_OUT RST" *) (* x_interface_parameter = "XIL_INTERFACENAME RST.SYSTEM_RST_OUT, INSERT_VIP 0, POLARITY ACTIVE_LOW" *) output system_rst_out;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLK.VIDEO_ACLK CLK" *) (* x_interface_parameter = "XIL_INTERFACENAME CLK.VIDEO_ACLK, ASSOCIATED_BUSIF video_out, ASSOCIATED_RESET video_aresetn, CLK_DOMAIN bd_7289_video_aclk, FREQ_HZ 150000000, FREQ_TOLERANCE_HZ 0, INSERT_VIP 0, PHASE 0.0" *) input video_aclk;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 RST.VIDEO_ARESETN RST" *) (* x_interface_parameter = "XIL_INTERFACENAME RST.VIDEO_ARESETN, INSERT_VIP 0, POLARITY ACTIVE_LOW" *) input video_aresetn;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TDATA" *) (* x_interface_mode = "Master" *) (* x_interface_parameter = "XIL_INTERFACENAME video_out, CLK_DOMAIN bd_7289_video_aclk, FREQ_HZ 150000000, HAS_TKEEP 0, HAS_TLAST 1, HAS_TREADY 1, HAS_TSTRB 0, INSERT_VIP 0, LAYERED_METADATA undef, PHASE 0.0, TDATA_NUM_BYTES 3, TDEST_WIDTH 10, TID_WIDTH 0, TUSER_WIDTH 96" *) output [23:0]video_out_tdata;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TDEST" *) output [9:0]video_out_tdest;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TLAST" *) output video_out_tlast;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TREADY" *) input video_out_tready;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TUSER" *) output [95:0]video_out_tuser;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 video_out TVALID" *) output video_out_tvalid;

  wire \<const0> ;
  wire [12:0]csirxss_s_axi_araddr;
  wire [0:0]csirxss_s_axi_arready;
  wire [0:0]csirxss_s_axi_arvalid;
  wire [12:0]csirxss_s_axi_awaddr;
  wire [0:0]csirxss_s_axi_awready;
  wire [0:0]csirxss_s_axi_awvalid;
  wire [0:0]csirxss_s_axi_bready;
  wire [0:0]csirxss_s_axi_bvalid;
  wire [31:0]csirxss_s_axi_rdata;
  wire [0:0]csirxss_s_axi_rready;
  wire [0:0]csirxss_s_axi_rvalid;
  wire [31:0]csirxss_s_axi_wdata;
  wire [0:0]csirxss_s_axi_wready;
  wire [0:0]csirxss_s_axi_wvalid;
  wire dphy_clk_200M;
  wire mipi_phy_if_clk_n;
  wire mipi_phy_if_clk_p;
  wire [3:0]mipi_phy_if_data_n;
  wire [3:0]mipi_phy_if_data_p;
  wire phy_n_0;
  wire phy_rx_mipi_ppi_if_CL_ENABLE;
  wire phy_rx_mipi_ppi_if_CL_STOPSTATE;
  wire phy_rx_mipi_ppi_if_DL0_ERRSOTHS;
  wire phy_rx_mipi_ppi_if_DL0_ERRSOTSYNCHS;
  wire phy_rx_mipi_ppi_if_DL0_RXACTIVEHS;
  wire [7:0]phy_rx_mipi_ppi_if_DL0_RXDATAHS;
  wire phy_rx_mipi_ppi_if_DL0_RXSYNCHS;
  wire phy_rx_mipi_ppi_if_DL0_RXVALIDHS;
  wire phy_rx_mipi_ppi_if_DL0_STOPSTATE;
  wire phy_rx_mipi_ppi_if_DL1_ERRSOTHS;
  wire phy_rx_mipi_ppi_if_DL1_ERRSOTSYNCHS;
  wire phy_rx_mipi_ppi_if_DL1_RXACTIVEHS;
  wire [7:0]phy_rx_mipi_ppi_if_DL1_RXDATAHS;
  wire phy_rx_mipi_ppi_if_DL1_RXSYNCHS;
  wire phy_rx_mipi_ppi_if_DL1_RXVALIDHS;
  wire phy_rx_mipi_ppi_if_DL1_STOPSTATE;
  wire phy_rx_mipi_ppi_if_DL2_ERRSOTHS;
  wire phy_rx_mipi_ppi_if_DL2_ERRSOTSYNCHS;
  wire phy_rx_mipi_ppi_if_DL2_RXACTIVEHS;
  wire [7:0]phy_rx_mipi_ppi_if_DL2_RXDATAHS;
  wire phy_rx_mipi_ppi_if_DL2_RXSYNCHS;
  wire phy_rx_mipi_ppi_if_DL2_RXVALIDHS;
  wire phy_rx_mipi_ppi_if_DL2_STOPSTATE;
  wire phy_rx_mipi_ppi_if_DL3_ERRSOTHS;
  wire phy_rx_mipi_ppi_if_DL3_ERRSOTSYNCHS;
  wire phy_rx_mipi_ppi_if_DL3_RXACTIVEHS;
  wire [7:0]phy_rx_mipi_ppi_if_DL3_RXDATAHS;
  wire phy_rx_mipi_ppi_if_DL3_RXSYNCHS;
  wire phy_rx_mipi_ppi_if_DL3_RXVALIDHS;
  wire phy_rx_mipi_ppi_if_DL3_STOPSTATE;
  wire r_sync_peripheral_reset;
  wire [63:0]rx_m_axis_TDATA;
  wire [7:0]rx_m_axis_TKEEP;
  wire rx_m_axis_TLAST;
  wire rx_m_axis_TREADY;
  wire [69:0]rx_m_axis_TUSER;
  wire rx_m_axis_TVALID;
  wire video_aresetn;
  wire [23:0]video_out_tdata;
  wire video_out_tlast;
  wire [69:0]\^video_out_tuser ;
  wire video_out_tvalid;
  wire xbar_M00_AXI_ARREADY;
  wire xbar_M00_AXI_AWREADY;
  wire xbar_M00_AXI_BVALID;
  wire [31:0]xbar_M00_AXI_RDATA;
  wire xbar_M00_AXI_RVALID;
  wire xbar_M00_AXI_WREADY;
  wire [6:2]xbar_M01_AXI_ARADDR;
  wire xbar_M01_AXI_ARREADY;
  wire xbar_M01_AXI_ARVALID;
  wire [6:2]xbar_M01_AXI_AWADDR;
  wire xbar_M01_AXI_AWREADY;
  wire xbar_M01_AXI_AWVALID;
  wire xbar_M01_AXI_BREADY;
  wire xbar_M01_AXI_BVALID;
  wire [31:0]xbar_M01_AXI_RDATA;
  wire xbar_M01_AXI_RREADY;
  wire xbar_M01_AXI_RVALID;
  wire [63:32]xbar_M01_AXI_WDATA;
  wire xbar_M01_AXI_WREADY;
  wire xbar_M01_AXI_WVALID;
  wire xbar_n_107;
  wire xbar_n_108;
  wire xbar_n_109;
  wire xbar_n_110;
  wire xbar_n_111;
  wire xbar_n_115;
  wire xbar_n_116;
  wire xbar_n_117;
  wire xbar_n_118;
  wire xbar_n_119;
  wire xbar_n_120;
  wire xbar_n_121;
  wire xbar_n_122;
  wire xbar_n_123;
  wire xbar_n_124;
  wire xbar_n_125;
  wire xbar_n_126;
  wire xbar_n_127;
  wire xbar_n_128;
  wire xbar_n_129;
  wire xbar_n_130;
  wire xbar_n_131;
  wire xbar_n_132;
  wire xbar_n_133;
  wire xbar_n_134;
  wire xbar_n_135;
  wire xbar_n_136;
  wire xbar_n_137;
  wire xbar_n_138;
  wire xbar_n_148;
  wire xbar_n_150;
  wire xbar_n_169;
  wire xbar_n_170;
  wire xbar_n_171;
  wire xbar_n_172;
  wire xbar_n_173;
  wire xbar_n_174;
  wire xbar_n_184;
  wire xbar_n_186;
  wire xbar_n_59;
  wire xbar_n_60;
  wire xbar_n_61;
  wire xbar_n_62;
  wire xbar_n_63;
  wire xbar_n_64;
  wire xbar_n_74;
  wire NLW_phy_cl_rxclkactivehs_UNCONNECTED;
  wire NLW_phy_cl_rxulpsclknot_UNCONNECTED;
  wire NLW_phy_cl_ulpsactivenot_UNCONNECTED;
  wire NLW_phy_clkoutphy_out_UNCONNECTED;
  wire NLW_phy_dl0_errcontrol_UNCONNECTED;
  wire NLW_phy_dl0_erresc_UNCONNECTED;
  wire NLW_phy_dl0_errsyncesc_UNCONNECTED;
  wire NLW_phy_dl0_rxclkesc_UNCONNECTED;
  wire NLW_phy_dl0_rxlpdtesc_UNCONNECTED;
  wire NLW_phy_dl0_rxulpsesc_UNCONNECTED;
  wire NLW_phy_dl0_rxvalidesc_UNCONNECTED;
  wire NLW_phy_dl0_ulpsactivenot_UNCONNECTED;
  wire NLW_phy_dl1_errcontrol_UNCONNECTED;
  wire NLW_phy_dl1_erresc_UNCONNECTED;
  wire NLW_phy_dl1_errsyncesc_UNCONNECTED;
  wire NLW_phy_dl1_rxclkesc_UNCONNECTED;
  wire NLW_phy_dl1_rxlpdtesc_UNCONNECTED;
  wire NLW_phy_dl1_rxulpsesc_UNCONNECTED;
  wire NLW_phy_dl1_rxvalidesc_UNCONNECTED;
  wire NLW_phy_dl1_ulpsactivenot_UNCONNECTED;
  wire NLW_phy_dl2_errcontrol_UNCONNECTED;
  wire NLW_phy_dl2_erresc_UNCONNECTED;
  wire NLW_phy_dl2_errsyncesc_UNCONNECTED;
  wire NLW_phy_dl2_rxclkesc_UNCONNECTED;
  wire NLW_phy_dl2_rxlpdtesc_UNCONNECTED;
  wire NLW_phy_dl2_rxulpsesc_UNCONNECTED;
  wire NLW_phy_dl2_rxvalidesc_UNCONNECTED;
  wire NLW_phy_dl2_ulpsactivenot_UNCONNECTED;
  wire NLW_phy_dl3_errcontrol_UNCONNECTED;
  wire NLW_phy_dl3_erresc_UNCONNECTED;
  wire NLW_phy_dl3_errsyncesc_UNCONNECTED;
  wire NLW_phy_dl3_rxclkesc_UNCONNECTED;
  wire NLW_phy_dl3_rxlpdtesc_UNCONNECTED;
  wire NLW_phy_dl3_rxulpsesc_UNCONNECTED;
  wire NLW_phy_dl3_rxvalidesc_UNCONNECTED;
  wire NLW_phy_dl3_ulpsactivenot_UNCONNECTED;
  wire NLW_phy_init_done_UNCONNECTED;
  wire NLW_phy_pll_lock_out_UNCONNECTED;
  wire NLW_phy_system_rst_out_UNCONNECTED;
  wire [7:0]NLW_phy_dl0_rxdataesc_UNCONNECTED;
  wire [3:0]NLW_phy_dl0_rxtriggeresc_UNCONNECTED;
  wire [7:0]NLW_phy_dl1_rxdataesc_UNCONNECTED;
  wire [3:0]NLW_phy_dl1_rxtriggeresc_UNCONNECTED;
  wire [7:0]NLW_phy_dl2_rxdataesc_UNCONNECTED;
  wire [3:0]NLW_phy_dl2_rxtriggeresc_UNCONNECTED;
  wire [7:0]NLW_phy_dl3_rxdataesc_UNCONNECTED;
  wire [3:0]NLW_phy_dl3_rxtriggeresc_UNCONNECTED;
  wire [1:0]NLW_phy_s_axi_bresp_UNCONNECTED;
  wire [1:0]NLW_phy_s_axi_rresp_UNCONNECTED;
  wire NLW_r_sync_mb_reset_UNCONNECTED;
  wire [0:0]NLW_r_sync_bus_struct_reset_UNCONNECTED;
  wire [0:0]NLW_r_sync_interconnect_aresetn_UNCONNECTED;
  wire [0:0]NLW_r_sync_peripheral_aresetn_UNCONNECTED;
  wire NLW_rx_core_men_vfb_UNCONNECTED;
  wire NLW_rx_dl0_shutdown_UNCONNECTED;
  wire NLW_rx_dl1_shutdown_UNCONNECTED;
  wire NLW_rx_dl2_shutdown_UNCONNECTED;
  wire NLW_rx_dl3_shutdown_UNCONNECTED;
  wire NLW_rx_frame_rcvd_pulse_out_UNCONNECTED;
  wire NLW_rx_interrupt_UNCONNECTED;
  wire [3:0]NLW_rx_m_axis_tdest_UNCONNECTED;
  wire [95:2]NLW_rx_m_axis_tuser_UNCONNECTED;
  wire [1:0]NLW_rx_s_axi_bresp_UNCONNECTED;
  wire [1:0]NLW_rx_s_axi_rresp_UNCONNECTED;
  wire NLW_vfb_0_core_men_ack_vfb_UNCONNECTED;
  wire NLW_vfb_0_mdt_tr_UNCONNECTED;
  wire NLW_vfb_0_mdt_tv_UNCONNECTED;
  wire NLW_vfb_0_sdt_tr_UNCONNECTED;
  wire NLW_vfb_0_sdt_tv_UNCONNECTED;
  wire NLW_vfb_0_vfb_full_UNCONNECTED;
  wire NLW_vfb_0_vfb_tr_UNCONNECTED;
  wire NLW_vfb_0_vfb_tv_UNCONNECTED;
  wire NLW_vfb_0_vfb_wc_full_UNCONNECTED;
  wire [95:1]NLW_vfb_0_vfb_sof_UNCONNECTED;
  wire [9:0]NLW_vfb_0_vfb_vcdt_UNCONNECTED;
  wire [25:0]NLW_xbar_m_axi_araddr_UNCONNECTED;
  wire [5:0]NLW_xbar_m_axi_arprot_UNCONNECTED;
  wire [25:0]NLW_xbar_m_axi_awaddr_UNCONNECTED;
  wire [5:0]NLW_xbar_m_axi_awprot_UNCONNECTED;
  wire [26:24]NLW_xbar_m_axi_wdata_UNCONNECTED;
  wire [7:0]NLW_xbar_m_axi_wstrb_UNCONNECTED;
  wire [1:0]NLW_xbar_s_axi_bresp_UNCONNECTED;
  wire [1:0]NLW_xbar_s_axi_rresp_UNCONNECTED;

  assign clkoutphy_out = \<const0> ;
  assign csirxss_csi_irq = \<const0> ;
  assign csirxss_s_axi_bresp[1] = \<const0> ;
  assign csirxss_s_axi_bresp[0] = \<const0> ;
  assign csirxss_s_axi_rresp[1] = \<const0> ;
  assign csirxss_s_axi_rresp[0] = \<const0> ;
  assign frame_rcvd_pulse_out = \<const0> ;
  assign pll_lock_out = \<const0> ;
  assign rxbyteclkhs = \<const0> ;
  assign system_rst_out = \<const0> ;
  assign video_out_tdest[9] = \<const0> ;
  assign video_out_tdest[8] = \<const0> ;
  assign video_out_tdest[7] = \<const0> ;
  assign video_out_tdest[6] = \<const0> ;
  assign video_out_tdest[5] = \<const0> ;
  assign video_out_tdest[4] = \<const0> ;
  assign video_out_tdest[3] = \<const0> ;
  assign video_out_tdest[2] = \<const0> ;
  assign video_out_tdest[1] = \<const0> ;
  assign video_out_tdest[0] = \<const0> ;
  assign video_out_tuser[95] = \<const0> ;
  assign video_out_tuser[94] = \<const0> ;
  assign video_out_tuser[93] = \<const0> ;
  assign video_out_tuser[92] = \<const0> ;
  assign video_out_tuser[91] = \<const0> ;
  assign video_out_tuser[90] = \<const0> ;
  assign video_out_tuser[89] = \<const0> ;
  assign video_out_tuser[88] = \<const0> ;
  assign video_out_tuser[87] = \<const0> ;
  assign video_out_tuser[86] = \<const0> ;
  assign video_out_tuser[85] = \<const0> ;
  assign video_out_tuser[84] = \<const0> ;
  assign video_out_tuser[83] = \<const0> ;
  assign video_out_tuser[82] = \<const0> ;
  assign video_out_tuser[81] = \<const0> ;
  assign video_out_tuser[80] = \<const0> ;
  assign video_out_tuser[79] = \<const0> ;
  assign video_out_tuser[78] = \<const0> ;
  assign video_out_tuser[77] = \<const0> ;
  assign video_out_tuser[76] = \<const0> ;
  assign video_out_tuser[75] = \<const0> ;
  assign video_out_tuser[74] = \<const0> ;
  assign video_out_tuser[73] = \<const0> ;
  assign video_out_tuser[72] = \<const0> ;
  assign video_out_tuser[71] = \<const0> ;
  assign video_out_tuser[70] = \<const0> ;
  assign video_out_tuser[69:64] = \^video_out_tuser [69:64];
  assign video_out_tuser[63] = \<const0> ;
  assign video_out_tuser[62] = \<const0> ;
  assign video_out_tuser[61] = \<const0> ;
  assign video_out_tuser[60] = \<const0> ;
  assign video_out_tuser[59] = \<const0> ;
  assign video_out_tuser[58] = \<const0> ;
  assign video_out_tuser[57] = \<const0> ;
  assign video_out_tuser[56] = \<const0> ;
  assign video_out_tuser[55] = \<const0> ;
  assign video_out_tuser[54] = \<const0> ;
  assign video_out_tuser[53] = \<const0> ;
  assign video_out_tuser[52] = \<const0> ;
  assign video_out_tuser[51] = \<const0> ;
  assign video_out_tuser[50] = \<const0> ;
  assign video_out_tuser[49] = \<const0> ;
  assign video_out_tuser[48] = \<const0> ;
  assign video_out_tuser[47] = \<const0> ;
  assign video_out_tuser[46] = \<const0> ;
  assign video_out_tuser[45] = \<const0> ;
  assign video_out_tuser[44] = \<const0> ;
  assign video_out_tuser[43] = \<const0> ;
  assign video_out_tuser[42] = \<const0> ;
  assign video_out_tuser[41] = \<const0> ;
  assign video_out_tuser[40] = \<const0> ;
  assign video_out_tuser[39] = \<const0> ;
  assign video_out_tuser[38] = \<const0> ;
  assign video_out_tuser[37] = \<const0> ;
  assign video_out_tuser[36] = \<const0> ;
  assign video_out_tuser[35] = \<const0> ;
  assign video_out_tuser[34] = \<const0> ;
  assign video_out_tuser[33] = \<const0> ;
  assign video_out_tuser[32] = \<const0> ;
  assign video_out_tuser[31] = \<const0> ;
  assign video_out_tuser[30] = \<const0> ;
  assign video_out_tuser[29] = \<const0> ;
  assign video_out_tuser[28] = \<const0> ;
  assign video_out_tuser[27] = \<const0> ;
  assign video_out_tuser[26] = \<const0> ;
  assign video_out_tuser[25] = \<const0> ;
  assign video_out_tuser[24] = \<const0> ;
  assign video_out_tuser[23] = \<const0> ;
  assign video_out_tuser[22] = \<const0> ;
  assign video_out_tuser[21] = \<const0> ;
  assign video_out_tuser[20] = \<const0> ;
  assign video_out_tuser[19] = \<const0> ;
  assign video_out_tuser[18] = \<const0> ;
  assign video_out_tuser[17] = \<const0> ;
  assign video_out_tuser[16] = \<const0> ;
  assign video_out_tuser[15] = \<const0> ;
  assign video_out_tuser[14] = \<const0> ;
  assign video_out_tuser[13] = \<const0> ;
  assign video_out_tuser[12] = \<const0> ;
  assign video_out_tuser[11] = \<const0> ;
  assign video_out_tuser[10] = \<const0> ;
  assign video_out_tuser[9] = \<const0> ;
  assign video_out_tuser[8] = \<const0> ;
  assign video_out_tuser[7] = \<const0> ;
  assign video_out_tuser[6] = \<const0> ;
  assign video_out_tuser[5] = \<const0> ;
  assign video_out_tuser[4] = \<const0> ;
  assign video_out_tuser[3] = \<const0> ;
  assign video_out_tuser[2] = \<const0> ;
  assign video_out_tuser[1] = \<const0> ;
  assign video_out_tuser[0] = \^video_out_tuser [0];
  GND GND
       (.G(\<const0> ));
  (* C_CAL_MODE = "FIXED" *) 
  (* C_DIV4_CLK_PERIOD = "6.734000" *) 
  (* C_DPHY_LANES = "4" *) 
  (* C_DPHY_MODE = "SLAVE" *) 
  (* C_EN_DEBUG_REGS = "0" *) 
  (* C_EN_DEBUG_TX_CALIB = "0" *) 
  (* C_EN_EXT_TAP = "0" *) 
  (* C_EN_REG_IF = "1" *) 
  (* C_EN_SSC = "0" *) 
  (* C_EN_TIMEOUT_REGS = "0" *) 
  (* C_ESC_CLK_PERIOD = "50.000000" *) 
  (* C_ESC_TIMEOUT = "25600" *) 
  (* C_EXAMPLE_SIMULATION = "true" *) 
  (* C_HS_LINE_RATE = "1188" *) 
  (* C_HS_TIMEOUT = "65541" *) 
  (* C_IDLY_TAP = "0" *) 
  (* C_LPX_PERIOD = "50" *) 
  (* C_RCVE_DESKEW_SEQ = "false" *) 
  (* C_SKEWCAL_FIRST_TIME = "4096" *) 
  (* C_SKEWCAL_PERIODIC_TIME = "128" *) 
  (* C_STABLE_CLK_PERIOD = "5.000000" *) 
  (* C_TXPLL_CLKIN_PERIOD = "6.734000" *) 
  (* C_WAKEUP = "1000" *) 
  (* C_XMIT_FIRST_DESKEW_SEQ = "false" *) 
  (* C_XMIT_PERIODIC_DESKEW_SEQ = "false" *) 
  (* DPHY_PRESET = "CSI2RX_XLNX" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* MTBF_SYNC_STAGES = "3" *) 
  (* SUPPORT_LEVEL = "1" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0 phy
       (.cl_enable(phy_rx_mipi_ppi_if_CL_ENABLE),
        .cl_rxclkactivehs(NLW_phy_cl_rxclkactivehs_UNCONNECTED),
        .cl_rxulpsclknot(NLW_phy_cl_rxulpsclknot_UNCONNECTED),
        .cl_stopstate(phy_rx_mipi_ppi_if_CL_STOPSTATE),
        .cl_ulpsactivenot(NLW_phy_cl_ulpsactivenot_UNCONNECTED),
        .clk_rxn(mipi_phy_if_clk_n),
        .clk_rxp(mipi_phy_if_clk_p),
        .clkoutphy_out(NLW_phy_clkoutphy_out_UNCONNECTED),
        .core_clk(dphy_clk_200M),
        .core_rst(r_sync_peripheral_reset),
        .data_rxn(mipi_phy_if_data_n),
        .data_rxp(mipi_phy_if_data_p),
        .dl0_enable(1'b0),
        .dl0_errcontrol(NLW_phy_dl0_errcontrol_UNCONNECTED),
        .dl0_erresc(NLW_phy_dl0_erresc_UNCONNECTED),
        .dl0_errsoths(phy_rx_mipi_ppi_if_DL0_ERRSOTHS),
        .dl0_errsotsynchs(phy_rx_mipi_ppi_if_DL0_ERRSOTSYNCHS),
        .dl0_errsyncesc(NLW_phy_dl0_errsyncesc_UNCONNECTED),
        .dl0_forcerxmode(1'b0),
        .dl0_rxactivehs(phy_rx_mipi_ppi_if_DL0_RXACTIVEHS),
        .dl0_rxclkesc(NLW_phy_dl0_rxclkesc_UNCONNECTED),
        .dl0_rxdataesc(NLW_phy_dl0_rxdataesc_UNCONNECTED[7:0]),
        .dl0_rxdatahs(phy_rx_mipi_ppi_if_DL0_RXDATAHS),
        .dl0_rxlpdtesc(NLW_phy_dl0_rxlpdtesc_UNCONNECTED),
        .dl0_rxsynchs(phy_rx_mipi_ppi_if_DL0_RXSYNCHS),
        .dl0_rxtriggeresc(NLW_phy_dl0_rxtriggeresc_UNCONNECTED[3:0]),
        .dl0_rxulpsesc(NLW_phy_dl0_rxulpsesc_UNCONNECTED),
        .dl0_rxvalidesc(NLW_phy_dl0_rxvalidesc_UNCONNECTED),
        .dl0_rxvalidhs(phy_rx_mipi_ppi_if_DL0_RXVALIDHS),
        .dl0_stopstate(phy_rx_mipi_ppi_if_DL0_STOPSTATE),
        .dl0_ulpsactivenot(NLW_phy_dl0_ulpsactivenot_UNCONNECTED),
        .dl1_enable(1'b0),
        .dl1_errcontrol(NLW_phy_dl1_errcontrol_UNCONNECTED),
        .dl1_erresc(NLW_phy_dl1_erresc_UNCONNECTED),
        .dl1_errsoths(phy_rx_mipi_ppi_if_DL1_ERRSOTHS),
        .dl1_errsotsynchs(phy_rx_mipi_ppi_if_DL1_ERRSOTSYNCHS),
        .dl1_errsyncesc(NLW_phy_dl1_errsyncesc_UNCONNECTED),
        .dl1_forcerxmode(1'b0),
        .dl1_rxactivehs(phy_rx_mipi_ppi_if_DL1_RXACTIVEHS),
        .dl1_rxclkesc(NLW_phy_dl1_rxclkesc_UNCONNECTED),
        .dl1_rxdataesc(NLW_phy_dl1_rxdataesc_UNCONNECTED[7:0]),
        .dl1_rxdatahs(phy_rx_mipi_ppi_if_DL1_RXDATAHS),
        .dl1_rxlpdtesc(NLW_phy_dl1_rxlpdtesc_UNCONNECTED),
        .dl1_rxsynchs(phy_rx_mipi_ppi_if_DL1_RXSYNCHS),
        .dl1_rxtriggeresc(NLW_phy_dl1_rxtriggeresc_UNCONNECTED[3:0]),
        .dl1_rxulpsesc(NLW_phy_dl1_rxulpsesc_UNCONNECTED),
        .dl1_rxvalidesc(NLW_phy_dl1_rxvalidesc_UNCONNECTED),
        .dl1_rxvalidhs(phy_rx_mipi_ppi_if_DL1_RXVALIDHS),
        .dl1_stopstate(phy_rx_mipi_ppi_if_DL1_STOPSTATE),
        .dl1_ulpsactivenot(NLW_phy_dl1_ulpsactivenot_UNCONNECTED),
        .dl2_enable(1'b0),
        .dl2_errcontrol(NLW_phy_dl2_errcontrol_UNCONNECTED),
        .dl2_erresc(NLW_phy_dl2_erresc_UNCONNECTED),
        .dl2_errsoths(phy_rx_mipi_ppi_if_DL2_ERRSOTHS),
        .dl2_errsotsynchs(phy_rx_mipi_ppi_if_DL2_ERRSOTSYNCHS),
        .dl2_errsyncesc(NLW_phy_dl2_errsyncesc_UNCONNECTED),
        .dl2_forcerxmode(1'b0),
        .dl2_rxactivehs(phy_rx_mipi_ppi_if_DL2_RXACTIVEHS),
        .dl2_rxclkesc(NLW_phy_dl2_rxclkesc_UNCONNECTED),
        .dl2_rxdataesc(NLW_phy_dl2_rxdataesc_UNCONNECTED[7:0]),
        .dl2_rxdatahs(phy_rx_mipi_ppi_if_DL2_RXDATAHS),
        .dl2_rxlpdtesc(NLW_phy_dl2_rxlpdtesc_UNCONNECTED),
        .dl2_rxsynchs(phy_rx_mipi_ppi_if_DL2_RXSYNCHS),
        .dl2_rxtriggeresc(NLW_phy_dl2_rxtriggeresc_UNCONNECTED[3:0]),
        .dl2_rxulpsesc(NLW_phy_dl2_rxulpsesc_UNCONNECTED),
        .dl2_rxvalidesc(NLW_phy_dl2_rxvalidesc_UNCONNECTED),
        .dl2_rxvalidhs(phy_rx_mipi_ppi_if_DL2_RXVALIDHS),
        .dl2_stopstate(phy_rx_mipi_ppi_if_DL2_STOPSTATE),
        .dl2_ulpsactivenot(NLW_phy_dl2_ulpsactivenot_UNCONNECTED),
        .dl3_enable(1'b0),
        .dl3_errcontrol(NLW_phy_dl3_errcontrol_UNCONNECTED),
        .dl3_erresc(NLW_phy_dl3_erresc_UNCONNECTED),
        .dl3_errsoths(phy_rx_mipi_ppi_if_DL3_ERRSOTHS),
        .dl3_errsotsynchs(phy_rx_mipi_ppi_if_DL3_ERRSOTSYNCHS),
        .dl3_errsyncesc(NLW_phy_dl3_errsyncesc_UNCONNECTED),
        .dl3_forcerxmode(1'b0),
        .dl3_rxactivehs(phy_rx_mipi_ppi_if_DL3_RXACTIVEHS),
        .dl3_rxclkesc(NLW_phy_dl3_rxclkesc_UNCONNECTED),
        .dl3_rxdataesc(NLW_phy_dl3_rxdataesc_UNCONNECTED[7:0]),
        .dl3_rxdatahs(phy_rx_mipi_ppi_if_DL3_RXDATAHS),
        .dl3_rxlpdtesc(NLW_phy_dl3_rxlpdtesc_UNCONNECTED),
        .dl3_rxsynchs(phy_rx_mipi_ppi_if_DL3_RXSYNCHS),
        .dl3_rxtriggeresc(NLW_phy_dl3_rxtriggeresc_UNCONNECTED[3:0]),
        .dl3_rxulpsesc(NLW_phy_dl3_rxulpsesc_UNCONNECTED),
        .dl3_rxvalidesc(NLW_phy_dl3_rxvalidesc_UNCONNECTED),
        .dl3_rxvalidhs(phy_rx_mipi_ppi_if_DL3_RXVALIDHS),
        .dl3_stopstate(phy_rx_mipi_ppi_if_DL3_STOPSTATE),
        .dl3_ulpsactivenot(NLW_phy_dl3_ulpsactivenot_UNCONNECTED),
        .init_done(NLW_phy_init_done_UNCONNECTED),
        .pll_lock_out(NLW_phy_pll_lock_out_UNCONNECTED),
        .rxbyteclkhs(phy_n_0),
        .s_axi_aclk(1'b0),
        .s_axi_araddr({xbar_M01_AXI_ARADDR,1'b0,1'b0}),
        .s_axi_aresetn(video_aresetn),
        .s_axi_arready(xbar_M01_AXI_ARREADY),
        .s_axi_arvalid(xbar_M01_AXI_ARVALID),
        .s_axi_awaddr({xbar_M01_AXI_AWADDR,1'b0,1'b0}),
        .s_axi_awready(xbar_M01_AXI_AWREADY),
        .s_axi_awvalid(xbar_M01_AXI_AWVALID),
        .s_axi_bready(xbar_M01_AXI_BREADY),
        .s_axi_bresp(NLW_phy_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(xbar_M01_AXI_BVALID),
        .s_axi_rdata(xbar_M01_AXI_RDATA),
        .s_axi_rready(xbar_M01_AXI_RREADY),
        .s_axi_rresp(NLW_phy_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(xbar_M01_AXI_RVALID),
        .s_axi_wdata(xbar_M01_AXI_WDATA),
        .s_axi_wready(xbar_M01_AXI_WREADY),
        .s_axi_wstrb({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wvalid(xbar_M01_AXI_WVALID),
        .system_rst_out(NLW_phy_system_rst_out_UNCONNECTED));
  (* CHECK_LICENSE_TYPE = "bd_7289_r_sync_0,proc_sys_reset,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "proc_sys_reset,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_r_sync_0 r_sync
       (.aux_reset_in(1'b1),
        .bus_struct_reset(NLW_r_sync_bus_struct_reset_UNCONNECTED[0]),
        .dcm_locked(1'b1),
        .ext_reset_in(video_aresetn),
        .interconnect_aresetn(NLW_r_sync_interconnect_aresetn_UNCONNECTED[0]),
        .mb_debug_sys_rst(1'b0),
        .mb_reset(NLW_r_sync_mb_reset_UNCONNECTED),
        .peripheral_aresetn(NLW_r_sync_peripheral_aresetn_UNCONNECTED[0]),
        .peripheral_reset(r_sync_peripheral_reset),
        .slowest_sync_clk(dphy_clk_200M));
  (* AXIS_FIFO_DCNT_WIDTH = "11" *) 
  (* AXIS_FIFO_DEPTH = "2048" *) 
  (* AXIS_TDATA_WIDTH = "64" *) 
  (* AXIS_TDEST_WIDTH = "4" *) 
  (* AXIS_TUSER_WIDTH = "96" *) 
  (* CMN_INC_VFB = "true" *) 
  (* CSI_EN_VC_SUPPORT = "1" *) 
  (* CSI_FIXED_VC = "0" *) 
  (* CSI_INV_SHUTDOWN = "1" *) 
  (* CSI_LANES = "4" *) 
  (* CSI_OFFLOAD_NONIMAGE = "0" *) 
  (* CSI_VC_OFF_0 = "1" *) 
  (* CSI_VC_OFF_1 = "2" *) 
  (* CSI_VC_OFF_10 = "11" *) 
  (* CSI_VC_OFF_11 = "12" *) 
  (* CSI_VC_OFF_12 = "13" *) 
  (* CSI_VC_OFF_13 = "14" *) 
  (* CSI_VC_OFF_14 = "15" *) 
  (* CSI_VC_OFF_2 = "3" *) 
  (* CSI_VC_OFF_3 = "4" *) 
  (* CSI_VC_OFF_4 = "5" *) 
  (* CSI_VC_OFF_5 = "6" *) 
  (* CSI_VC_OFF_6 = "7" *) 
  (* CSI_VC_OFF_7 = "8" *) 
  (* CSI_VC_OFF_8 = "9" *) 
  (* CSI_VC_OFF_9 = "10" *) 
  (* C_CSI2RX_DBG = "0" *) 
  (* C_CSI_FILTER_USERDATATYPE = "0" *) 
  (* C_CSI_OPT1_REGS = "0" *) 
  (* C_CSI_OPT2_CRC = "0" *) 
  (* C_CSI_OPT3_FIXEDLANES = "1" *) 
  (* C_DISABLE_LITE = "0" *) 
  (* C_EN_CSI_V2_0 = "false" *) 
  (* C_EN_VCX = "false" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HS_LINE_RATE = "1188" *) 
  (* C_MIPI_SLV_INT = "0" *) 
  (* C_RCVE_DESKEW_SEQ = "false" *) 
  (* C_SPRT_ISP_BRIDGE = "0" *) 
  (* C_S_AXI_ADDR_WIDTH = "8" *) 
  (* C_S_AXI_DATA_WIDTH = "32" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_rx_0 rx
       (.cl_enable(phy_rx_mipi_ppi_if_CL_ENABLE),
        .cl_rxulpsclknot(1'b1),
        .cl_stopstate(phy_rx_mipi_ppi_if_CL_STOPSTATE),
        .core_clk(1'b0),
        .core_men_ack_vfb(1'b1),
        .core_men_vfb(NLW_rx_core_men_vfb_UNCONNECTED),
        .dl0_errcontrol(1'b0),
        .dl0_erresc(1'b0),
        .dl0_errsoths(phy_rx_mipi_ppi_if_DL0_ERRSOTHS),
        .dl0_errsotsynchs(phy_rx_mipi_ppi_if_DL0_ERRSOTSYNCHS),
        .dl0_rxactivehs(phy_rx_mipi_ppi_if_DL0_RXACTIVEHS),
        .dl0_rxbyteclkhs(phy_n_0),
        .dl0_rxdatahs(phy_rx_mipi_ppi_if_DL0_RXDATAHS),
        .dl0_rxsynchs(phy_rx_mipi_ppi_if_DL0_RXSYNCHS),
        .dl0_rxulpmesc(1'b0),
        .dl0_rxvalidhs(phy_rx_mipi_ppi_if_DL0_RXVALIDHS),
        .dl0_shutdown(NLW_rx_dl0_shutdown_UNCONNECTED),
        .dl0_stopstate(phy_rx_mipi_ppi_if_DL0_STOPSTATE),
        .dl1_errcontrol(1'b0),
        .dl1_erresc(1'b0),
        .dl1_errsoths(phy_rx_mipi_ppi_if_DL1_ERRSOTHS),
        .dl1_errsotsynchs(phy_rx_mipi_ppi_if_DL1_ERRSOTSYNCHS),
        .dl1_rxactivehs(phy_rx_mipi_ppi_if_DL1_RXACTIVEHS),
        .dl1_rxbyteclkhs(1'b0),
        .dl1_rxdatahs(phy_rx_mipi_ppi_if_DL1_RXDATAHS),
        .dl1_rxsynchs(phy_rx_mipi_ppi_if_DL1_RXSYNCHS),
        .dl1_rxulpmesc(1'b0),
        .dl1_rxvalidhs(phy_rx_mipi_ppi_if_DL1_RXVALIDHS),
        .dl1_shutdown(NLW_rx_dl1_shutdown_UNCONNECTED),
        .dl1_stopstate(phy_rx_mipi_ppi_if_DL1_STOPSTATE),
        .dl2_errcontrol(1'b0),
        .dl2_erresc(1'b0),
        .dl2_errsoths(phy_rx_mipi_ppi_if_DL2_ERRSOTHS),
        .dl2_errsotsynchs(phy_rx_mipi_ppi_if_DL2_ERRSOTSYNCHS),
        .dl2_rxactivehs(phy_rx_mipi_ppi_if_DL2_RXACTIVEHS),
        .dl2_rxbyteclkhs(1'b0),
        .dl2_rxdatahs(phy_rx_mipi_ppi_if_DL2_RXDATAHS),
        .dl2_rxsynchs(phy_rx_mipi_ppi_if_DL2_RXSYNCHS),
        .dl2_rxulpmesc(1'b0),
        .dl2_rxvalidhs(phy_rx_mipi_ppi_if_DL2_RXVALIDHS),
        .dl2_shutdown(NLW_rx_dl2_shutdown_UNCONNECTED),
        .dl2_stopstate(phy_rx_mipi_ppi_if_DL2_STOPSTATE),
        .dl3_errcontrol(1'b0),
        .dl3_erresc(1'b0),
        .dl3_errsoths(phy_rx_mipi_ppi_if_DL3_ERRSOTHS),
        .dl3_errsotsynchs(phy_rx_mipi_ppi_if_DL3_ERRSOTSYNCHS),
        .dl3_rxactivehs(phy_rx_mipi_ppi_if_DL3_RXACTIVEHS),
        .dl3_rxbyteclkhs(1'b0),
        .dl3_rxdatahs(phy_rx_mipi_ppi_if_DL3_RXDATAHS),
        .dl3_rxsynchs(phy_rx_mipi_ppi_if_DL3_RXSYNCHS),
        .dl3_rxulpmesc(1'b0),
        .dl3_rxvalidhs(phy_rx_mipi_ppi_if_DL3_RXVALIDHS),
        .dl3_shutdown(NLW_rx_dl3_shutdown_UNCONNECTED),
        .dl3_stopstate(phy_rx_mipi_ppi_if_DL3_STOPSTATE),
        .frame_rcvd_pulse_out(NLW_rx_frame_rcvd_pulse_out_UNCONNECTED),
        .interrupt(NLW_rx_interrupt_UNCONNECTED),
        .m_axis_aclk(1'b0),
        .m_axis_aresetn(1'b0),
        .m_axis_tdata(rx_m_axis_TDATA),
        .m_axis_tdest(NLW_rx_m_axis_tdest_UNCONNECTED[3:0]),
        .m_axis_tkeep(rx_m_axis_TKEEP),
        .m_axis_tlast(rx_m_axis_TLAST),
        .m_axis_tready(rx_m_axis_TREADY),
        .m_axis_tuser({NLW_rx_m_axis_tuser_UNCONNECTED[95:70],rx_m_axis_TUSER}),
        .m_axis_tvalid(rx_m_axis_TVALID),
        .mdt_tr(1'b0),
        .mdt_tv(1'b0),
        .s_axi_aclk(dphy_clk_200M),
        .s_axi_araddr({xbar_n_169,xbar_n_170,xbar_n_171,xbar_n_172,xbar_n_173,xbar_n_174,1'b0,1'b0}),
        .s_axi_aresetn(video_aresetn),
        .s_axi_arready(xbar_M00_AXI_ARREADY),
        .s_axi_arvalid(xbar_n_184),
        .s_axi_awaddr({xbar_n_59,xbar_n_60,xbar_n_61,xbar_n_62,xbar_n_63,xbar_n_64,1'b0,1'b0}),
        .s_axi_awready(xbar_M00_AXI_AWREADY),
        .s_axi_awvalid(xbar_n_74),
        .s_axi_bready(xbar_n_150),
        .s_axi_bresp(NLW_rx_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(xbar_M00_AXI_BVALID),
        .s_axi_rdata(xbar_M00_AXI_RDATA),
        .s_axi_rready(xbar_n_186),
        .s_axi_rresp(NLW_rx_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(xbar_M00_AXI_RVALID),
        .s_axi_wdata({xbar_n_107,xbar_n_108,xbar_n_109,xbar_n_110,xbar_n_111,1'b0,1'b0,1'b0,xbar_n_115,xbar_n_116,xbar_n_117,xbar_n_118,xbar_n_119,xbar_n_120,xbar_n_121,xbar_n_122,xbar_n_123,xbar_n_124,xbar_n_125,xbar_n_126,xbar_n_127,xbar_n_128,xbar_n_129,xbar_n_130,xbar_n_131,xbar_n_132,xbar_n_133,xbar_n_134,xbar_n_135,xbar_n_136,xbar_n_137,xbar_n_138}),
        .s_axi_wready(xbar_M00_AXI_WREADY),
        .s_axi_wstrb({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wvalid(xbar_n_148),
        .sdt_tr(1'b0),
        .sdt_tv(1'b0),
        .vfb_full(1'b0),
        .vfb_tr(1'b0),
        .vfb_tv(1'b0),
        .vfb_wc_full(1'b0),
        .video_aclk(1'b0));
  (* AXIS_TDATA_WIDTH = "64" *) 
  (* AXIS_TDEST_WIDTH = "4" *) 
  (* AXIS_TUSER_WIDTH = "96" *) 
  (* C_HS_LINE_RATE = "1188" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* VFB_4PXL_W = "48" *) 
  (* VFB_BYPASS_WC = "0" *) 
  (* VFB_DATA_TYPE = "44" *) 
  (* VFB_DCONV_OWIDTH = "32" *) 
  (* VFB_EN_VCX = "0" *) 
  (* VFB_FIFO_DEPTH = "2048" *) 
  (* VFB_FIFO_WIDTH = "64" *) 
  (* VFB_FILTER_VC = "0" *) 
  (* VFB_OP_DWIDTH = "24" *) 
  (* VFB_OP_PIXELS = "2" *) 
  (* VFB_PXL_W = "12" *) 
  (* VFB_PXL_W_BB = "16" *) 
  (* VFB_REQ_BUFFER = "1" *) 
  (* VFB_REQ_REORDER = "1" *) 
  (* VFB_TU_WIDTH = "96" *) 
  (* VFB_VC = "0" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_vfb_0_0 vfb_0
       (.core_men_ack_vfb(NLW_vfb_0_core_men_ack_vfb_UNCONNECTED),
        .core_men_vfb(1'b0),
        .mdt_tr(NLW_vfb_0_mdt_tr_UNCONNECTED),
        .mdt_tv(NLW_vfb_0_mdt_tv_UNCONNECTED),
        .s_axis_aclk(1'b0),
        .s_axis_aresetn(1'b0),
        .s_axis_tdata(rx_m_axis_TDATA),
        .s_axis_tdest({1'b0,1'b0,1'b0,1'b0}),
        .s_axis_tkeep(rx_m_axis_TKEEP),
        .s_axis_tlast(rx_m_axis_TLAST),
        .s_axis_tready(rx_m_axis_TREADY),
        .s_axis_tuser({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,rx_m_axis_TUSER[69:64],1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,rx_m_axis_TUSER[1:0]}),
        .s_axis_tvalid(rx_m_axis_TVALID),
        .sdt_tr(NLW_vfb_0_sdt_tr_UNCONNECTED),
        .sdt_tv(NLW_vfb_0_sdt_tv_UNCONNECTED),
        .vfb_arstn(video_aresetn),
        .vfb_clk(dphy_clk_200M),
        .vfb_data(video_out_tdata),
        .vfb_eol(video_out_tlast),
        .vfb_full(NLW_vfb_0_vfb_full_UNCONNECTED),
        .vfb_ready(1'b1),
        .vfb_sof({NLW_vfb_0_vfb_sof_UNCONNECTED[95:70],\^video_out_tuser }),
        .vfb_tr(NLW_vfb_0_vfb_tr_UNCONNECTED),
        .vfb_tv(NLW_vfb_0_vfb_tv_UNCONNECTED),
        .vfb_valid(video_out_tvalid),
        .vfb_vcdt(NLW_vfb_0_vfb_vcdt_UNCONNECTED[9:0]),
        .vfb_wc_full(NLW_vfb_0_vfb_wc_full_UNCONNECTED));
  (* CHECK_LICENSE_TYPE = "bd_7289_xbar_0,axi_crossbar_v2_1_34_axi_crossbar,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "axi_crossbar_v2_1_34_axi_crossbar,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_xbar_0 xbar
       (.aclk(dphy_clk_200M),
        .aresetn(video_aresetn),
        .m_axi_araddr({NLW_xbar_m_axi_araddr_UNCONNECTED[25:20],xbar_M01_AXI_ARADDR,NLW_xbar_m_axi_araddr_UNCONNECTED[14:8],xbar_n_169,xbar_n_170,xbar_n_171,xbar_n_172,xbar_n_173,xbar_n_174,NLW_xbar_m_axi_araddr_UNCONNECTED[1:0]}),
        .m_axi_arprot(NLW_xbar_m_axi_arprot_UNCONNECTED[5:0]),
        .m_axi_arready({xbar_M01_AXI_ARREADY,xbar_M00_AXI_ARREADY}),
        .m_axi_arvalid({xbar_M01_AXI_ARVALID,xbar_n_184}),
        .m_axi_awaddr({NLW_xbar_m_axi_awaddr_UNCONNECTED[25:20],xbar_M01_AXI_AWADDR,NLW_xbar_m_axi_awaddr_UNCONNECTED[14:8],xbar_n_59,xbar_n_60,xbar_n_61,xbar_n_62,xbar_n_63,xbar_n_64,NLW_xbar_m_axi_awaddr_UNCONNECTED[1:0]}),
        .m_axi_awprot(NLW_xbar_m_axi_awprot_UNCONNECTED[5:0]),
        .m_axi_awready({xbar_M01_AXI_AWREADY,xbar_M00_AXI_AWREADY}),
        .m_axi_awvalid({xbar_M01_AXI_AWVALID,xbar_n_74}),
        .m_axi_bready({xbar_M01_AXI_BREADY,xbar_n_150}),
        .m_axi_bresp({1'b0,1'b0,1'b0,1'b0}),
        .m_axi_bvalid({xbar_M01_AXI_BVALID,xbar_M00_AXI_BVALID}),
        .m_axi_rdata({xbar_M01_AXI_RDATA,xbar_M00_AXI_RDATA}),
        .m_axi_rready({xbar_M01_AXI_RREADY,xbar_n_186}),
        .m_axi_rresp({1'b0,1'b0,1'b0,1'b0}),
        .m_axi_rvalid({xbar_M01_AXI_RVALID,xbar_M00_AXI_RVALID}),
        .m_axi_wdata({xbar_M01_AXI_WDATA,xbar_n_107,xbar_n_108,xbar_n_109,xbar_n_110,xbar_n_111,NLW_xbar_m_axi_wdata_UNCONNECTED[26:24],xbar_n_115,xbar_n_116,xbar_n_117,xbar_n_118,xbar_n_119,xbar_n_120,xbar_n_121,xbar_n_122,xbar_n_123,xbar_n_124,xbar_n_125,xbar_n_126,xbar_n_127,xbar_n_128,xbar_n_129,xbar_n_130,xbar_n_131,xbar_n_132,xbar_n_133,xbar_n_134,xbar_n_135,xbar_n_136,xbar_n_137,xbar_n_138}),
        .m_axi_wready({xbar_M01_AXI_WREADY,xbar_M00_AXI_WREADY}),
        .m_axi_wstrb(NLW_xbar_m_axi_wstrb_UNCONNECTED[7:0]),
        .m_axi_wvalid({xbar_M01_AXI_WVALID,xbar_n_148}),
        .s_axi_araddr({csirxss_s_axi_araddr[12],1'b0,1'b0,1'b0,1'b0,csirxss_s_axi_araddr[7:2],1'b0,1'b0}),
        .s_axi_arprot({1'b0,1'b0,1'b0}),
        .s_axi_arready(csirxss_s_axi_arready),
        .s_axi_arvalid(csirxss_s_axi_arvalid),
        .s_axi_awaddr({csirxss_s_axi_awaddr[12],1'b0,1'b0,1'b0,1'b0,csirxss_s_axi_awaddr[7:2],1'b0,1'b0}),
        .s_axi_awprot({1'b0,1'b0,1'b0}),
        .s_axi_awready(csirxss_s_axi_awready),
        .s_axi_awvalid(csirxss_s_axi_awvalid),
        .s_axi_bready(csirxss_s_axi_bready),
        .s_axi_bresp(NLW_xbar_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(csirxss_s_axi_bvalid),
        .s_axi_rdata(csirxss_s_axi_rdata),
        .s_axi_rready(csirxss_s_axi_rready),
        .s_axi_rresp(NLW_xbar_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(csirxss_s_axi_rvalid),
        .s_axi_wdata(csirxss_s_axi_wdata),
        .s_axi_wready(csirxss_s_axi_wready),
        .s_axi_wstrb({1'b1,1'b1,1'b1,1'b1}),
        .s_axi_wvalid(csirxss_s_axi_wvalid));
endmodule

(* C_CAL_MODE = "FIXED" *) (* C_DIV4_CLK_PERIOD = "6.734000" *) (* C_DPHY_LANES = "4" *) 
(* C_DPHY_MODE = "SLAVE" *) (* C_EN_DEBUG_REGS = "0" *) (* C_EN_DEBUG_TX_CALIB = "0" *) 
(* C_EN_EXT_TAP = "0" *) (* C_EN_REG_IF = "1" *) (* C_EN_SSC = "0" *) 
(* C_EN_TIMEOUT_REGS = "0" *) (* C_ESC_CLK_PERIOD = "50.000000" *) (* C_ESC_TIMEOUT = "25600" *) 
(* C_EXAMPLE_SIMULATION = "true" *) (* C_HS_LINE_RATE = "1188" *) (* C_HS_TIMEOUT = "65541" *) 
(* C_IDLY_TAP = "0" *) (* C_LPX_PERIOD = "50" *) (* C_RCVE_DESKEW_SEQ = "false" *) 
(* C_SKEWCAL_FIRST_TIME = "4096" *) (* C_SKEWCAL_PERIODIC_TIME = "128" *) (* C_STABLE_CLK_PERIOD = "5.000000" *) 
(* C_TXPLL_CLKIN_PERIOD = "6.734000" *) (* C_WAKEUP = "1000" *) (* C_XMIT_FIRST_DESKEW_SEQ = "false" *) 
(* C_XMIT_PERIODIC_DESKEW_SEQ = "false" *) (* DPHY_PRESET = "CSI2RX_XLNX" *) (* MTBF_SYNC_STAGES = "3" *) 
(* SUPPORT_LEVEL = "1" *) (* downgradeipidentifiedwarnings = "yes" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0
   (core_clk,
    core_rst,
    rxbyteclkhs,
    clkoutphy_out,
    pll_lock_out,
    system_rst_out,
    init_done,
    cl_rxclkactivehs,
    cl_stopstate,
    cl_enable,
    cl_rxulpsclknot,
    cl_ulpsactivenot,
    dl0_rxdatahs,
    dl0_rxvalidhs,
    dl0_rxactivehs,
    dl0_rxsynchs,
    dl0_forcerxmode,
    dl0_stopstate,
    dl0_enable,
    dl0_ulpsactivenot,
    dl0_rxclkesc,
    dl0_rxlpdtesc,
    dl0_rxulpsesc,
    dl0_rxtriggeresc,
    dl0_rxdataesc,
    dl0_rxvalidesc,
    dl0_errsoths,
    dl0_errsotsynchs,
    dl0_erresc,
    dl0_errsyncesc,
    dl0_errcontrol,
    dl1_rxdatahs,
    dl1_rxvalidhs,
    dl1_rxactivehs,
    dl1_rxsynchs,
    dl1_forcerxmode,
    dl1_stopstate,
    dl1_enable,
    dl1_ulpsactivenot,
    dl1_rxclkesc,
    dl1_rxlpdtesc,
    dl1_rxulpsesc,
    dl1_rxtriggeresc,
    dl1_rxdataesc,
    dl1_rxvalidesc,
    dl1_errsoths,
    dl1_errsotsynchs,
    dl1_erresc,
    dl1_errsyncesc,
    dl1_errcontrol,
    dl2_rxdatahs,
    dl2_rxvalidhs,
    dl2_rxactivehs,
    dl2_rxsynchs,
    dl2_forcerxmode,
    dl2_stopstate,
    dl2_enable,
    dl2_ulpsactivenot,
    dl2_rxclkesc,
    dl2_rxlpdtesc,
    dl2_rxulpsesc,
    dl2_rxtriggeresc,
    dl2_rxdataesc,
    dl2_rxvalidesc,
    dl2_errsoths,
    dl2_errsotsynchs,
    dl2_erresc,
    dl2_errsyncesc,
    dl2_errcontrol,
    dl3_rxdatahs,
    dl3_rxvalidhs,
    dl3_rxactivehs,
    dl3_rxsynchs,
    dl3_forcerxmode,
    dl3_stopstate,
    dl3_enable,
    dl3_ulpsactivenot,
    dl3_rxclkesc,
    dl3_rxlpdtesc,
    dl3_rxulpsesc,
    dl3_rxtriggeresc,
    dl3_rxdataesc,
    dl3_rxvalidesc,
    dl3_errsoths,
    dl3_errsotsynchs,
    dl3_erresc,
    dl3_errsyncesc,
    dl3_errcontrol,
    s_axi_aclk,
    s_axi_aresetn,
    s_axi_awaddr,
    s_axi_awready,
    s_axi_awvalid,
    s_axi_araddr,
    s_axi_arready,
    s_axi_arvalid,
    s_axi_wdata,
    s_axi_wstrb,
    s_axi_wready,
    s_axi_wvalid,
    s_axi_rdata,
    s_axi_rresp,
    s_axi_rready,
    s_axi_rvalid,
    s_axi_bresp,
    s_axi_bready,
    s_axi_bvalid,
    clk_rxp,
    clk_rxn,
    data_rxp,
    data_rxn);
  input core_clk;
  input core_rst;
  output rxbyteclkhs;
  output clkoutphy_out;
  output pll_lock_out;
  output system_rst_out;
  output init_done;
  output cl_rxclkactivehs;
  output cl_stopstate;
  input cl_enable;
  output cl_rxulpsclknot;
  output cl_ulpsactivenot;
  output [7:0]dl0_rxdatahs;
  output dl0_rxvalidhs;
  output dl0_rxactivehs;
  output dl0_rxsynchs;
  input dl0_forcerxmode;
  output dl0_stopstate;
  input dl0_enable;
  output dl0_ulpsactivenot;
  output dl0_rxclkesc;
  output dl0_rxlpdtesc;
  output dl0_rxulpsesc;
  output [3:0]dl0_rxtriggeresc;
  output [7:0]dl0_rxdataesc;
  output dl0_rxvalidesc;
  output dl0_errsoths;
  output dl0_errsotsynchs;
  output dl0_erresc;
  output dl0_errsyncesc;
  output dl0_errcontrol;
  output [7:0]dl1_rxdatahs;
  output dl1_rxvalidhs;
  output dl1_rxactivehs;
  output dl1_rxsynchs;
  input dl1_forcerxmode;
  output dl1_stopstate;
  input dl1_enable;
  output dl1_ulpsactivenot;
  output dl1_rxclkesc;
  output dl1_rxlpdtesc;
  output dl1_rxulpsesc;
  output [3:0]dl1_rxtriggeresc;
  output [7:0]dl1_rxdataesc;
  output dl1_rxvalidesc;
  output dl1_errsoths;
  output dl1_errsotsynchs;
  output dl1_erresc;
  output dl1_errsyncesc;
  output dl1_errcontrol;
  output [7:0]dl2_rxdatahs;
  output dl2_rxvalidhs;
  output dl2_rxactivehs;
  output dl2_rxsynchs;
  input dl2_forcerxmode;
  output dl2_stopstate;
  input dl2_enable;
  output dl2_ulpsactivenot;
  output dl2_rxclkesc;
  output dl2_rxlpdtesc;
  output dl2_rxulpsesc;
  output [3:0]dl2_rxtriggeresc;
  output [7:0]dl2_rxdataesc;
  output dl2_rxvalidesc;
  output dl2_errsoths;
  output dl2_errsotsynchs;
  output dl2_erresc;
  output dl2_errsyncesc;
  output dl2_errcontrol;
  output [7:0]dl3_rxdatahs;
  output dl3_rxvalidhs;
  output dl3_rxactivehs;
  output dl3_rxsynchs;
  input dl3_forcerxmode;
  output dl3_stopstate;
  input dl3_enable;
  output dl3_ulpsactivenot;
  output dl3_rxclkesc;
  output dl3_rxlpdtesc;
  output dl3_rxulpsesc;
  output [3:0]dl3_rxtriggeresc;
  output [7:0]dl3_rxdataesc;
  output dl3_rxvalidesc;
  output dl3_errsoths;
  output dl3_errsotsynchs;
  output dl3_erresc;
  output dl3_errsyncesc;
  output dl3_errcontrol;
  input s_axi_aclk;
  input s_axi_aresetn;
  input [6:0]s_axi_awaddr;
  output s_axi_awready;
  input s_axi_awvalid;
  input [6:0]s_axi_araddr;
  output s_axi_arready;
  input s_axi_arvalid;
  input [31:0]s_axi_wdata;
  input [3:0]s_axi_wstrb;
  output s_axi_wready;
  input s_axi_wvalid;
  output [31:0]s_axi_rdata;
  output [1:0]s_axi_rresp;
  input s_axi_rready;
  output s_axi_rvalid;
  output [1:0]s_axi_bresp;
  input s_axi_bready;
  output s_axi_bvalid;
  input clk_rxp;
  input clk_rxn;
  input [3:0]data_rxp;
  input [3:0]data_rxn;

  wire \<const0> ;
  wire cl_enable;
  wire cl_stopstate;
  wire clk_rxn;
  wire clk_rxp;
  wire core_clk;
  wire core_rst;
  wire [3:0]data_rxn;
  wire [3:0]data_rxp;
  wire dl0_errsoths;
  wire dl0_errsotsynchs;
  wire dl0_rxactivehs;
  wire [7:0]dl0_rxdatahs;
  wire dl0_rxsynchs;
  wire dl0_rxvalidhs;
  wire dl0_stopstate;
  wire dl1_errsoths;
  wire dl1_errsotsynchs;
  wire dl1_rxactivehs;
  wire [7:0]dl1_rxdatahs;
  wire dl1_rxsynchs;
  wire dl1_rxvalidhs;
  wire dl1_stopstate;
  wire dl2_errsoths;
  wire dl2_errsotsynchs;
  wire dl2_rxactivehs;
  wire [7:0]dl2_rxdatahs;
  wire dl2_rxsynchs;
  wire dl2_rxvalidhs;
  wire dl2_stopstate;
  wire dl3_errsoths;
  wire dl3_errsotsynchs;
  wire dl3_rxactivehs;
  wire [7:0]dl3_rxdatahs;
  wire dl3_rxsynchs;
  wire dl3_rxvalidhs;
  wire dl3_stopstate;
  wire rxbyteclkhs;
  wire [6:0]s_axi_araddr;
  wire s_axi_aresetn;
  wire s_axi_arready;
  wire s_axi_arvalid;
  wire [6:0]s_axi_awaddr;
  wire s_axi_awready;
  wire s_axi_awvalid;
  wire s_axi_bready;
  wire s_axi_bvalid;
  wire [31:0]s_axi_rdata;
  wire s_axi_rready;
  wire s_axi_rvalid;
  wire [31:0]s_axi_wdata;
  wire s_axi_wready;
  wire s_axi_wvalid;
  wire NLW_inst_cl_rxclkactivehs_UNCONNECTED;
  wire NLW_inst_cl_rxulpsclknot_UNCONNECTED;
  wire NLW_inst_cl_ulpsactivenot_UNCONNECTED;
  wire NLW_inst_clkoutphy_out_UNCONNECTED;
  wire NLW_inst_dl0_errcontrol_UNCONNECTED;
  wire NLW_inst_dl0_erresc_UNCONNECTED;
  wire NLW_inst_dl0_errsyncesc_UNCONNECTED;
  wire NLW_inst_dl0_rxclkesc_UNCONNECTED;
  wire NLW_inst_dl0_rxlpdtesc_UNCONNECTED;
  wire NLW_inst_dl0_rxulpsesc_UNCONNECTED;
  wire NLW_inst_dl0_rxvalidesc_UNCONNECTED;
  wire NLW_inst_dl0_ulpsactivenot_UNCONNECTED;
  wire NLW_inst_dl1_errcontrol_UNCONNECTED;
  wire NLW_inst_dl1_erresc_UNCONNECTED;
  wire NLW_inst_dl1_errsyncesc_UNCONNECTED;
  wire NLW_inst_dl1_rxclkesc_UNCONNECTED;
  wire NLW_inst_dl1_rxlpdtesc_UNCONNECTED;
  wire NLW_inst_dl1_rxulpsesc_UNCONNECTED;
  wire NLW_inst_dl1_rxvalidesc_UNCONNECTED;
  wire NLW_inst_dl1_ulpsactivenot_UNCONNECTED;
  wire NLW_inst_dl2_errcontrol_UNCONNECTED;
  wire NLW_inst_dl2_erresc_UNCONNECTED;
  wire NLW_inst_dl2_errsyncesc_UNCONNECTED;
  wire NLW_inst_dl2_rxclkesc_UNCONNECTED;
  wire NLW_inst_dl2_rxlpdtesc_UNCONNECTED;
  wire NLW_inst_dl2_rxulpsesc_UNCONNECTED;
  wire NLW_inst_dl2_rxvalidesc_UNCONNECTED;
  wire NLW_inst_dl2_ulpsactivenot_UNCONNECTED;
  wire NLW_inst_dl3_errcontrol_UNCONNECTED;
  wire NLW_inst_dl3_erresc_UNCONNECTED;
  wire NLW_inst_dl3_errsyncesc_UNCONNECTED;
  wire NLW_inst_dl3_rxclkesc_UNCONNECTED;
  wire NLW_inst_dl3_rxlpdtesc_UNCONNECTED;
  wire NLW_inst_dl3_rxulpsesc_UNCONNECTED;
  wire NLW_inst_dl3_rxvalidesc_UNCONNECTED;
  wire NLW_inst_dl3_ulpsactivenot_UNCONNECTED;
  wire NLW_inst_init_done_UNCONNECTED;
  wire NLW_inst_pll_lock_out_UNCONNECTED;
  wire NLW_inst_system_rst_out_UNCONNECTED;
  wire [7:0]NLW_inst_dl0_rxdataesc_UNCONNECTED;
  wire [3:0]NLW_inst_dl0_rxtriggeresc_UNCONNECTED;
  wire [7:0]NLW_inst_dl1_rxdataesc_UNCONNECTED;
  wire [3:0]NLW_inst_dl1_rxtriggeresc_UNCONNECTED;
  wire [7:0]NLW_inst_dl2_rxdataesc_UNCONNECTED;
  wire [3:0]NLW_inst_dl2_rxtriggeresc_UNCONNECTED;
  wire [7:0]NLW_inst_dl3_rxdataesc_UNCONNECTED;
  wire [3:0]NLW_inst_dl3_rxtriggeresc_UNCONNECTED;
  wire [1:0]NLW_inst_s_axi_bresp_UNCONNECTED;
  wire [1:0]NLW_inst_s_axi_rresp_UNCONNECTED;

  assign cl_rxclkactivehs = \<const0> ;
  assign cl_rxulpsclknot = \<const0> ;
  assign cl_ulpsactivenot = \<const0> ;
  assign clkoutphy_out = \<const0> ;
  assign dl0_errcontrol = \<const0> ;
  assign dl0_erresc = \<const0> ;
  assign dl0_errsyncesc = \<const0> ;
  assign dl0_rxclkesc = \<const0> ;
  assign dl0_rxdataesc[7] = \<const0> ;
  assign dl0_rxdataesc[6] = \<const0> ;
  assign dl0_rxdataesc[5] = \<const0> ;
  assign dl0_rxdataesc[4] = \<const0> ;
  assign dl0_rxdataesc[3] = \<const0> ;
  assign dl0_rxdataesc[2] = \<const0> ;
  assign dl0_rxdataesc[1] = \<const0> ;
  assign dl0_rxdataesc[0] = \<const0> ;
  assign dl0_rxlpdtesc = \<const0> ;
  assign dl0_rxtriggeresc[3] = \<const0> ;
  assign dl0_rxtriggeresc[2] = \<const0> ;
  assign dl0_rxtriggeresc[1] = \<const0> ;
  assign dl0_rxtriggeresc[0] = \<const0> ;
  assign dl0_rxulpsesc = \<const0> ;
  assign dl0_rxvalidesc = \<const0> ;
  assign dl0_ulpsactivenot = \<const0> ;
  assign dl1_errcontrol = \<const0> ;
  assign dl1_erresc = \<const0> ;
  assign dl1_errsyncesc = \<const0> ;
  assign dl1_rxclkesc = \<const0> ;
  assign dl1_rxdataesc[7] = \<const0> ;
  assign dl1_rxdataesc[6] = \<const0> ;
  assign dl1_rxdataesc[5] = \<const0> ;
  assign dl1_rxdataesc[4] = \<const0> ;
  assign dl1_rxdataesc[3] = \<const0> ;
  assign dl1_rxdataesc[2] = \<const0> ;
  assign dl1_rxdataesc[1] = \<const0> ;
  assign dl1_rxdataesc[0] = \<const0> ;
  assign dl1_rxlpdtesc = \<const0> ;
  assign dl1_rxtriggeresc[3] = \<const0> ;
  assign dl1_rxtriggeresc[2] = \<const0> ;
  assign dl1_rxtriggeresc[1] = \<const0> ;
  assign dl1_rxtriggeresc[0] = \<const0> ;
  assign dl1_rxulpsesc = \<const0> ;
  assign dl1_rxvalidesc = \<const0> ;
  assign dl1_ulpsactivenot = \<const0> ;
  assign dl2_errcontrol = \<const0> ;
  assign dl2_erresc = \<const0> ;
  assign dl2_errsyncesc = \<const0> ;
  assign dl2_rxclkesc = \<const0> ;
  assign dl2_rxdataesc[7] = \<const0> ;
  assign dl2_rxdataesc[6] = \<const0> ;
  assign dl2_rxdataesc[5] = \<const0> ;
  assign dl2_rxdataesc[4] = \<const0> ;
  assign dl2_rxdataesc[3] = \<const0> ;
  assign dl2_rxdataesc[2] = \<const0> ;
  assign dl2_rxdataesc[1] = \<const0> ;
  assign dl2_rxdataesc[0] = \<const0> ;
  assign dl2_rxlpdtesc = \<const0> ;
  assign dl2_rxtriggeresc[3] = \<const0> ;
  assign dl2_rxtriggeresc[2] = \<const0> ;
  assign dl2_rxtriggeresc[1] = \<const0> ;
  assign dl2_rxtriggeresc[0] = \<const0> ;
  assign dl2_rxulpsesc = \<const0> ;
  assign dl2_rxvalidesc = \<const0> ;
  assign dl2_ulpsactivenot = \<const0> ;
  assign dl3_errcontrol = \<const0> ;
  assign dl3_erresc = \<const0> ;
  assign dl3_errsyncesc = \<const0> ;
  assign dl3_rxclkesc = \<const0> ;
  assign dl3_rxdataesc[7] = \<const0> ;
  assign dl3_rxdataesc[6] = \<const0> ;
  assign dl3_rxdataesc[5] = \<const0> ;
  assign dl3_rxdataesc[4] = \<const0> ;
  assign dl3_rxdataesc[3] = \<const0> ;
  assign dl3_rxdataesc[2] = \<const0> ;
  assign dl3_rxdataesc[1] = \<const0> ;
  assign dl3_rxdataesc[0] = \<const0> ;
  assign dl3_rxlpdtesc = \<const0> ;
  assign dl3_rxtriggeresc[3] = \<const0> ;
  assign dl3_rxtriggeresc[2] = \<const0> ;
  assign dl3_rxtriggeresc[1] = \<const0> ;
  assign dl3_rxtriggeresc[0] = \<const0> ;
  assign dl3_rxulpsesc = \<const0> ;
  assign dl3_rxvalidesc = \<const0> ;
  assign dl3_ulpsactivenot = \<const0> ;
  assign init_done = \<const0> ;
  assign pll_lock_out = \<const0> ;
  assign s_axi_bresp[1] = \<const0> ;
  assign s_axi_bresp[0] = \<const0> ;
  assign s_axi_rresp[1] = \<const0> ;
  assign s_axi_rresp[0] = \<const0> ;
  assign system_rst_out = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_CAL_MODE = "FIXED" *) 
  (* C_DIV4_CLK_PERIOD = "6.734000" *) 
  (* C_DPHY_LANES = "4" *) 
  (* C_DPHY_MODE = "SLAVE" *) 
  (* C_EN_DEBUG_REGS = "0" *) 
  (* C_EN_EXT_TAP = "0" *) 
  (* C_EN_REG_IF = "1" *) 
  (* C_EN_SSC = "0" *) 
  (* C_EN_TIMEOUT_REGS = "0" *) 
  (* C_ESC_CLK_PERIOD = "50.000000" *) 
  (* C_ESC_TIMEOUT = "25600" *) 
  (* C_EXAMPLE_SIMULATION = "true" *) 
  (* C_HS_LINE_RATE = "1188" *) 
  (* C_HS_TIMEOUT = "65541" *) 
  (* C_IDLY_TAP = "0" *) 
  (* C_LPX_PERIOD = "50" *) 
  (* C_RCVE_DESKEW_SEQ = "false" *) 
  (* C_SKEWCAL_FIRST_TIME = "4096" *) 
  (* C_SKEWCAL_PERIODIC_TIME = "128" *) 
  (* C_STABLE_CLK_PERIOD = "5.000000" *) 
  (* C_TXPLL_CLKIN_PERIOD = "6.734000" *) 
  (* C_WAKEUP = "1000" *) 
  (* C_XMIT_FIRST_DESKEW_SEQ = "false" *) 
  (* C_XMIT_PERIODIC_DESKEW_SEQ = "false" *) 
  (* DPHY_PRESET = "CSI2RX_XLNX" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* MTBF_SYNC_STAGES = "3" *) 
  (* SUPPORT_LEVEL = "1" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_core inst
       (.cl_enable(cl_enable),
        .cl_rxclkactivehs(NLW_inst_cl_rxclkactivehs_UNCONNECTED),
        .cl_rxulpsclknot(NLW_inst_cl_rxulpsclknot_UNCONNECTED),
        .cl_stopstate(cl_stopstate),
        .cl_ulpsactivenot(NLW_inst_cl_ulpsactivenot_UNCONNECTED),
        .clk_rxn(clk_rxn),
        .clk_rxp(clk_rxp),
        .clkoutphy_out(NLW_inst_clkoutphy_out_UNCONNECTED),
        .core_clk(core_clk),
        .core_rst(core_rst),
        .data_rxn(data_rxn),
        .data_rxp(data_rxp),
        .dl0_enable(1'b0),
        .dl0_errcontrol(NLW_inst_dl0_errcontrol_UNCONNECTED),
        .dl0_erresc(NLW_inst_dl0_erresc_UNCONNECTED),
        .dl0_errsoths(dl0_errsoths),
        .dl0_errsotsynchs(dl0_errsotsynchs),
        .dl0_errsyncesc(NLW_inst_dl0_errsyncesc_UNCONNECTED),
        .dl0_forcerxmode(1'b0),
        .dl0_rxactivehs(dl0_rxactivehs),
        .dl0_rxclkesc(NLW_inst_dl0_rxclkesc_UNCONNECTED),
        .dl0_rxdataesc(NLW_inst_dl0_rxdataesc_UNCONNECTED[7:0]),
        .dl0_rxdatahs(dl0_rxdatahs),
        .dl0_rxlpdtesc(NLW_inst_dl0_rxlpdtesc_UNCONNECTED),
        .dl0_rxsynchs(dl0_rxsynchs),
        .dl0_rxtriggeresc(NLW_inst_dl0_rxtriggeresc_UNCONNECTED[3:0]),
        .dl0_rxulpsesc(NLW_inst_dl0_rxulpsesc_UNCONNECTED),
        .dl0_rxvalidesc(NLW_inst_dl0_rxvalidesc_UNCONNECTED),
        .dl0_rxvalidhs(dl0_rxvalidhs),
        .dl0_stopstate(dl0_stopstate),
        .dl0_ulpsactivenot(NLW_inst_dl0_ulpsactivenot_UNCONNECTED),
        .dl1_enable(1'b0),
        .dl1_errcontrol(NLW_inst_dl1_errcontrol_UNCONNECTED),
        .dl1_erresc(NLW_inst_dl1_erresc_UNCONNECTED),
        .dl1_errsoths(dl1_errsoths),
        .dl1_errsotsynchs(dl1_errsotsynchs),
        .dl1_errsyncesc(NLW_inst_dl1_errsyncesc_UNCONNECTED),
        .dl1_forcerxmode(1'b0),
        .dl1_rxactivehs(dl1_rxactivehs),
        .dl1_rxclkesc(NLW_inst_dl1_rxclkesc_UNCONNECTED),
        .dl1_rxdataesc(NLW_inst_dl1_rxdataesc_UNCONNECTED[7:0]),
        .dl1_rxdatahs(dl1_rxdatahs),
        .dl1_rxlpdtesc(NLW_inst_dl1_rxlpdtesc_UNCONNECTED),
        .dl1_rxsynchs(dl1_rxsynchs),
        .dl1_rxtriggeresc(NLW_inst_dl1_rxtriggeresc_UNCONNECTED[3:0]),
        .dl1_rxulpsesc(NLW_inst_dl1_rxulpsesc_UNCONNECTED),
        .dl1_rxvalidesc(NLW_inst_dl1_rxvalidesc_UNCONNECTED),
        .dl1_rxvalidhs(dl1_rxvalidhs),
        .dl1_stopstate(dl1_stopstate),
        .dl1_ulpsactivenot(NLW_inst_dl1_ulpsactivenot_UNCONNECTED),
        .dl2_enable(1'b0),
        .dl2_errcontrol(NLW_inst_dl2_errcontrol_UNCONNECTED),
        .dl2_erresc(NLW_inst_dl2_erresc_UNCONNECTED),
        .dl2_errsoths(dl2_errsoths),
        .dl2_errsotsynchs(dl2_errsotsynchs),
        .dl2_errsyncesc(NLW_inst_dl2_errsyncesc_UNCONNECTED),
        .dl2_forcerxmode(1'b0),
        .dl2_rxactivehs(dl2_rxactivehs),
        .dl2_rxclkesc(NLW_inst_dl2_rxclkesc_UNCONNECTED),
        .dl2_rxdataesc(NLW_inst_dl2_rxdataesc_UNCONNECTED[7:0]),
        .dl2_rxdatahs(dl2_rxdatahs),
        .dl2_rxlpdtesc(NLW_inst_dl2_rxlpdtesc_UNCONNECTED),
        .dl2_rxsynchs(dl2_rxsynchs),
        .dl2_rxtriggeresc(NLW_inst_dl2_rxtriggeresc_UNCONNECTED[3:0]),
        .dl2_rxulpsesc(NLW_inst_dl2_rxulpsesc_UNCONNECTED),
        .dl2_rxvalidesc(NLW_inst_dl2_rxvalidesc_UNCONNECTED),
        .dl2_rxvalidhs(dl2_rxvalidhs),
        .dl2_stopstate(dl2_stopstate),
        .dl2_ulpsactivenot(NLW_inst_dl2_ulpsactivenot_UNCONNECTED),
        .dl3_enable(1'b0),
        .dl3_errcontrol(NLW_inst_dl3_errcontrol_UNCONNECTED),
        .dl3_erresc(NLW_inst_dl3_erresc_UNCONNECTED),
        .dl3_errsoths(dl3_errsoths),
        .dl3_errsotsynchs(dl3_errsotsynchs),
        .dl3_errsyncesc(NLW_inst_dl3_errsyncesc_UNCONNECTED),
        .dl3_forcerxmode(1'b0),
        .dl3_rxactivehs(dl3_rxactivehs),
        .dl3_rxclkesc(NLW_inst_dl3_rxclkesc_UNCONNECTED),
        .dl3_rxdataesc(NLW_inst_dl3_rxdataesc_UNCONNECTED[7:0]),
        .dl3_rxdatahs(dl3_rxdatahs),
        .dl3_rxlpdtesc(NLW_inst_dl3_rxlpdtesc_UNCONNECTED),
        .dl3_rxsynchs(dl3_rxsynchs),
        .dl3_rxtriggeresc(NLW_inst_dl3_rxtriggeresc_UNCONNECTED[3:0]),
        .dl3_rxulpsesc(NLW_inst_dl3_rxulpsesc_UNCONNECTED),
        .dl3_rxvalidesc(NLW_inst_dl3_rxvalidesc_UNCONNECTED),
        .dl3_rxvalidhs(dl3_rxvalidhs),
        .dl3_stopstate(dl3_stopstate),
        .dl3_ulpsactivenot(NLW_inst_dl3_ulpsactivenot_UNCONNECTED),
        .init_done(NLW_inst_init_done_UNCONNECTED),
        .pll_lock_out(NLW_inst_pll_lock_out_UNCONNECTED),
        .rxbyteclkhs(rxbyteclkhs),
        .s_axi_aclk(1'b0),
        .s_axi_araddr({s_axi_araddr[6:2],1'b0,1'b0}),
        .s_axi_aresetn(s_axi_aresetn),
        .s_axi_arready(s_axi_arready),
        .s_axi_arvalid(s_axi_arvalid),
        .s_axi_awaddr({s_axi_awaddr[6:2],1'b0,1'b0}),
        .s_axi_awready(s_axi_awready),
        .s_axi_awvalid(s_axi_awvalid),
        .s_axi_bready(s_axi_bready),
        .s_axi_bresp(NLW_inst_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(s_axi_bvalid),
        .s_axi_rdata(s_axi_rdata),
        .s_axi_rready(s_axi_rready),
        .s_axi_rresp(NLW_inst_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(s_axi_rvalid),
        .s_axi_wdata(s_axi_wdata),
        .s_axi_wready(s_axi_wready),
        .s_axi_wstrb({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wvalid(s_axi_wvalid),
        .system_rst_out(NLW_inst_system_rst_out_UNCONNECTED));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_c1
   (rxbyteclkhs,
    dl0_rxdatahs,
    dl0_rxvalidhs,
    dl0_rxactivehs,
    dl0_rxsynchs,
    dl0_stopstate,
    dl0_errsoths,
    dl0_errsotsynchs,
    dl1_rxdatahs,
    dl1_rxvalidhs,
    dl1_rxactivehs,
    dl1_rxsynchs,
    dl1_stopstate,
    dl1_errsoths,
    dl1_errsotsynchs,
    dl2_rxdatahs,
    dl2_rxvalidhs,
    dl2_rxactivehs,
    dl2_rxsynchs,
    dl2_stopstate,
    dl2_errsoths,
    dl2_errsotsynchs,
    dl3_rxdatahs,
    dl3_rxvalidhs,
    dl3_rxactivehs,
    dl3_rxsynchs,
    dl3_stopstate,
    dl3_errsoths,
    dl3_errsotsynchs,
    cl_stopstate,
    s_axi_awready,
    s_axi_arready,
    s_axi_wready,
    s_axi_rdata,
    s_axi_rvalid,
    s_axi_bvalid,
    clk_rxp,
    clk_rxn,
    data_rxp,
    data_rxn,
    core_rst,
    core_clk,
    cl_enable,
    s_axi_aresetn,
    s_axi_awaddr,
    s_axi_awvalid,
    s_axi_araddr,
    s_axi_arvalid,
    s_axi_wdata,
    s_axi_wvalid,
    s_axi_rready,
    s_axi_bready);
  output rxbyteclkhs;
  output [7:0]dl0_rxdatahs;
  output dl0_rxvalidhs;
  output dl0_rxactivehs;
  output dl0_rxsynchs;
  output dl0_stopstate;
  output dl0_errsoths;
  output dl0_errsotsynchs;
  output [7:0]dl1_rxdatahs;
  output dl1_rxvalidhs;
  output dl1_rxactivehs;
  output dl1_rxsynchs;
  output dl1_stopstate;
  output dl1_errsoths;
  output dl1_errsotsynchs;
  output [7:0]dl2_rxdatahs;
  output dl2_rxvalidhs;
  output dl2_rxactivehs;
  output dl2_rxsynchs;
  output dl2_stopstate;
  output dl2_errsoths;
  output dl2_errsotsynchs;
  output [7:0]dl3_rxdatahs;
  output dl3_rxvalidhs;
  output dl3_rxactivehs;
  output dl3_rxsynchs;
  output dl3_stopstate;
  output dl3_errsoths;
  output dl3_errsotsynchs;
  output cl_stopstate;
  output s_axi_awready;
  output s_axi_arready;
  output s_axi_wready;
  output [31:0]s_axi_rdata;
  output s_axi_rvalid;
  output s_axi_bvalid;
  input clk_rxp;
  input clk_rxn;
  input [3:0]data_rxp;
  input [3:0]data_rxn;
  input core_rst;
  input core_clk;
  input cl_enable;
  input s_axi_aresetn;
  input [4:0]s_axi_awaddr;
  input s_axi_awvalid;
  input [4:0]s_axi_araddr;
  input s_axi_arvalid;
  input [31:0]s_axi_wdata;
  input s_axi_wvalid;
  input s_axi_rready;
  input s_axi_bready;

  wire cl_enable;
  wire cl_stopstate;
  wire clk_rxn;
  wire clk_rxp;
  wire core_clk;
  wire core_rst;
  wire [3:0]data_rxn;
  wire [3:0]data_rxp;
  wire dl0_errsoths;
  wire dl0_errsotsynchs;
  wire dl0_rxactivehs;
  wire [7:0]dl0_rxdatahs;
  wire dl0_rxsynchs;
  wire dl0_rxvalidhs;
  wire dl0_stopstate;
  wire dl1_errsoths;
  wire dl1_errsotsynchs;
  wire dl1_rxactivehs;
  wire [7:0]dl1_rxdatahs;
  wire dl1_rxsynchs;
  wire dl1_rxvalidhs;
  wire dl1_stopstate;
  wire dl2_errsoths;
  wire dl2_errsotsynchs;
  wire dl2_rxactivehs;
  wire [7:0]dl2_rxdatahs;
  wire dl2_rxsynchs;
  wire dl2_rxvalidhs;
  wire dl2_stopstate;
  wire dl3_errsoths;
  wire dl3_errsotsynchs;
  wire dl3_rxactivehs;
  wire [7:0]dl3_rxdatahs;
  wire dl3_rxsynchs;
  wire dl3_rxvalidhs;
  wire dl3_stopstate;
  wire rxbyteclkhs;
  wire [4:0]s_axi_araddr;
  wire s_axi_aresetn;
  wire s_axi_arready;
  wire s_axi_arvalid;
  wire [4:0]s_axi_awaddr;
  wire s_axi_awready;
  wire s_axi_awvalid;
  wire s_axi_bready;
  wire s_axi_bvalid;
  wire [31:0]s_axi_rdata;
  wire s_axi_rready;
  wire s_axi_rvalid;
  wire [31:0]s_axi_wdata;
  wire s_axi_wready;
  wire s_axi_wvalid;

  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_support bd_7289_phy_0_rx_support_i
       (.cl_enable(cl_enable),
        .cl_stopstate(cl_stopstate),
        .clk_rxn(clk_rxn),
        .clk_rxp(clk_rxp),
        .core_clk(core_clk),
        .core_rst(core_rst),
        .data_rxn(data_rxn),
        .data_rxp(data_rxp),
        .dl0_errsoths(dl0_errsoths),
        .dl0_errsotsynchs(dl0_errsotsynchs),
        .dl0_rxactivehs(dl0_rxactivehs),
        .dl0_rxdatahs(dl0_rxdatahs),
        .dl0_rxsynchs(dl0_rxsynchs),
        .dl0_rxvalidhs(dl0_rxvalidhs),
        .dl0_stopstate(dl0_stopstate),
        .dl1_errsoths(dl1_errsoths),
        .dl1_errsotsynchs(dl1_errsotsynchs),
        .dl1_rxactivehs(dl1_rxactivehs),
        .dl1_rxdatahs(dl1_rxdatahs),
        .dl1_rxsynchs(dl1_rxsynchs),
        .dl1_rxvalidhs(dl1_rxvalidhs),
        .dl1_stopstate(dl1_stopstate),
        .dl2_errsoths(dl2_errsoths),
        .dl2_errsotsynchs(dl2_errsotsynchs),
        .dl2_rxactivehs(dl2_rxactivehs),
        .dl2_rxdatahs(dl2_rxdatahs),
        .dl2_rxsynchs(dl2_rxsynchs),
        .dl2_rxvalidhs(dl2_rxvalidhs),
        .dl2_stopstate(dl2_stopstate),
        .dl3_errsoths(dl3_errsoths),
        .dl3_errsotsynchs(dl3_errsotsynchs),
        .dl3_rxactivehs(dl3_rxactivehs),
        .dl3_rxdatahs(dl3_rxdatahs),
        .dl3_rxsynchs(dl3_rxsynchs),
        .dl3_rxvalidhs(dl3_rxvalidhs),
        .dl3_stopstate(dl3_stopstate),
        .rxbyteclkhs(rxbyteclkhs),
        .s_axi_araddr(s_axi_araddr),
        .s_axi_aresetn(s_axi_aresetn),
        .s_axi_arready(s_axi_arready),
        .s_axi_arvalid(s_axi_arvalid),
        .s_axi_awaddr(s_axi_awaddr),
        .s_axi_awready(s_axi_awready),
        .s_axi_awvalid(s_axi_awvalid),
        .s_axi_bready(s_axi_bready),
        .s_axi_bvalid(s_axi_bvalid),
        .s_axi_rdata(s_axi_rdata),
        .s_axi_rready(s_axi_rready),
        .s_axi_rvalid(s_axi_rvalid),
        .s_axi_wdata(s_axi_wdata),
        .s_axi_wready(s_axi_wready),
        .s_axi_wvalid(s_axi_wvalid));
endmodule

(* C_CAL_MODE = "FIXED" *) (* C_DIV4_CLK_PERIOD = "6.734000" *) (* C_DPHY_LANES = "4" *) 
(* C_DPHY_MODE = "SLAVE" *) (* C_EN_DEBUG_REGS = "0" *) (* C_EN_EXT_TAP = "0" *) 
(* C_EN_REG_IF = "1" *) (* C_EN_SSC = "0" *) (* C_EN_TIMEOUT_REGS = "0" *) 
(* C_ESC_CLK_PERIOD = "50.000000" *) (* C_ESC_TIMEOUT = "25600" *) (* C_EXAMPLE_SIMULATION = "true" *) 
(* C_HS_LINE_RATE = "1188" *) (* C_HS_TIMEOUT = "65541" *) (* C_IDLY_TAP = "0" *) 
(* C_LPX_PERIOD = "50" *) (* C_RCVE_DESKEW_SEQ = "false" *) (* C_SKEWCAL_FIRST_TIME = "4096" *) 
(* C_SKEWCAL_PERIODIC_TIME = "128" *) (* C_STABLE_CLK_PERIOD = "5.000000" *) (* C_TXPLL_CLKIN_PERIOD = "6.734000" *) 
(* C_WAKEUP = "1000" *) (* C_XMIT_FIRST_DESKEW_SEQ = "false" *) (* C_XMIT_PERIODIC_DESKEW_SEQ = "false" *) 
(* DPHY_PRESET = "CSI2RX_XLNX" *) (* MTBF_SYNC_STAGES = "3" *) (* SUPPORT_LEVEL = "1" *) 
(* downgradeipidentifiedwarnings = "yes" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_core
   (core_clk,
    core_rst,
    rxbyteclkhs,
    clkoutphy_out,
    pll_lock_out,
    system_rst_out,
    init_done,
    cl_rxclkactivehs,
    cl_stopstate,
    cl_enable,
    cl_rxulpsclknot,
    cl_ulpsactivenot,
    dl0_rxdatahs,
    dl0_rxvalidhs,
    dl0_rxactivehs,
    dl0_rxsynchs,
    dl0_forcerxmode,
    dl0_stopstate,
    dl0_enable,
    dl0_ulpsactivenot,
    dl0_rxclkesc,
    dl0_rxlpdtesc,
    dl0_rxulpsesc,
    dl0_rxtriggeresc,
    dl0_rxdataesc,
    dl0_rxvalidesc,
    dl0_errsoths,
    dl0_errsotsynchs,
    dl0_erresc,
    dl0_errsyncesc,
    dl0_errcontrol,
    dl1_rxdatahs,
    dl1_rxvalidhs,
    dl1_rxactivehs,
    dl1_rxsynchs,
    dl1_forcerxmode,
    dl1_stopstate,
    dl1_enable,
    dl1_ulpsactivenot,
    dl1_rxclkesc,
    dl1_rxlpdtesc,
    dl1_rxulpsesc,
    dl1_rxtriggeresc,
    dl1_rxdataesc,
    dl1_rxvalidesc,
    dl1_errsoths,
    dl1_errsotsynchs,
    dl1_erresc,
    dl1_errsyncesc,
    dl1_errcontrol,
    dl2_rxdatahs,
    dl2_rxvalidhs,
    dl2_rxactivehs,
    dl2_rxsynchs,
    dl2_forcerxmode,
    dl2_stopstate,
    dl2_enable,
    dl2_ulpsactivenot,
    dl2_rxclkesc,
    dl2_rxlpdtesc,
    dl2_rxulpsesc,
    dl2_rxtriggeresc,
    dl2_rxdataesc,
    dl2_rxvalidesc,
    dl2_errsoths,
    dl2_errsotsynchs,
    dl2_erresc,
    dl2_errsyncesc,
    dl2_errcontrol,
    dl3_rxdatahs,
    dl3_rxvalidhs,
    dl3_rxactivehs,
    dl3_rxsynchs,
    dl3_forcerxmode,
    dl3_stopstate,
    dl3_enable,
    dl3_ulpsactivenot,
    dl3_rxclkesc,
    dl3_rxlpdtesc,
    dl3_rxulpsesc,
    dl3_rxtriggeresc,
    dl3_rxdataesc,
    dl3_rxvalidesc,
    dl3_errsoths,
    dl3_errsotsynchs,
    dl3_erresc,
    dl3_errsyncesc,
    dl3_errcontrol,
    s_axi_aclk,
    s_axi_aresetn,
    s_axi_awaddr,
    s_axi_awready,
    s_axi_awvalid,
    s_axi_araddr,
    s_axi_arready,
    s_axi_arvalid,
    s_axi_wdata,
    s_axi_wstrb,
    s_axi_wready,
    s_axi_wvalid,
    s_axi_rdata,
    s_axi_rresp,
    s_axi_rready,
    s_axi_rvalid,
    s_axi_bresp,
    s_axi_bready,
    s_axi_bvalid,
    clk_rxp,
    clk_rxn,
    data_rxp,
    data_rxn);
  input core_clk;
  input core_rst;
  output rxbyteclkhs;
  output clkoutphy_out;
  output pll_lock_out;
  output system_rst_out;
  output init_done;
  output cl_rxclkactivehs;
  output cl_stopstate;
  input cl_enable;
  output cl_rxulpsclknot;
  output cl_ulpsactivenot;
  output [7:0]dl0_rxdatahs;
  output dl0_rxvalidhs;
  output dl0_rxactivehs;
  output dl0_rxsynchs;
  input dl0_forcerxmode;
  output dl0_stopstate;
  input dl0_enable;
  output dl0_ulpsactivenot;
  output dl0_rxclkesc;
  output dl0_rxlpdtesc;
  output dl0_rxulpsesc;
  output [3:0]dl0_rxtriggeresc;
  output [7:0]dl0_rxdataesc;
  output dl0_rxvalidesc;
  output dl0_errsoths;
  output dl0_errsotsynchs;
  output dl0_erresc;
  output dl0_errsyncesc;
  output dl0_errcontrol;
  output [7:0]dl1_rxdatahs;
  output dl1_rxvalidhs;
  output dl1_rxactivehs;
  output dl1_rxsynchs;
  input dl1_forcerxmode;
  output dl1_stopstate;
  input dl1_enable;
  output dl1_ulpsactivenot;
  output dl1_rxclkesc;
  output dl1_rxlpdtesc;
  output dl1_rxulpsesc;
  output [3:0]dl1_rxtriggeresc;
  output [7:0]dl1_rxdataesc;
  output dl1_rxvalidesc;
  output dl1_errsoths;
  output dl1_errsotsynchs;
  output dl1_erresc;
  output dl1_errsyncesc;
  output dl1_errcontrol;
  output [7:0]dl2_rxdatahs;
  output dl2_rxvalidhs;
  output dl2_rxactivehs;
  output dl2_rxsynchs;
  input dl2_forcerxmode;
  output dl2_stopstate;
  input dl2_enable;
  output dl2_ulpsactivenot;
  output dl2_rxclkesc;
  output dl2_rxlpdtesc;
  output dl2_rxulpsesc;
  output [3:0]dl2_rxtriggeresc;
  output [7:0]dl2_rxdataesc;
  output dl2_rxvalidesc;
  output dl2_errsoths;
  output dl2_errsotsynchs;
  output dl2_erresc;
  output dl2_errsyncesc;
  output dl2_errcontrol;
  output [7:0]dl3_rxdatahs;
  output dl3_rxvalidhs;
  output dl3_rxactivehs;
  output dl3_rxsynchs;
  input dl3_forcerxmode;
  output dl3_stopstate;
  input dl3_enable;
  output dl3_ulpsactivenot;
  output dl3_rxclkesc;
  output dl3_rxlpdtesc;
  output dl3_rxulpsesc;
  output [3:0]dl3_rxtriggeresc;
  output [7:0]dl3_rxdataesc;
  output dl3_rxvalidesc;
  output dl3_errsoths;
  output dl3_errsotsynchs;
  output dl3_erresc;
  output dl3_errsyncesc;
  output dl3_errcontrol;
  input s_axi_aclk;
  input s_axi_aresetn;
  input [6:0]s_axi_awaddr;
  output s_axi_awready;
  input s_axi_awvalid;
  input [6:0]s_axi_araddr;
  output s_axi_arready;
  input s_axi_arvalid;
  input [31:0]s_axi_wdata;
  input [3:0]s_axi_wstrb;
  output s_axi_wready;
  input s_axi_wvalid;
  output [31:0]s_axi_rdata;
  output [1:0]s_axi_rresp;
  input s_axi_rready;
  output s_axi_rvalid;
  output [1:0]s_axi_bresp;
  input s_axi_bready;
  output s_axi_bvalid;
  input clk_rxp;
  input clk_rxn;
  input [3:0]data_rxp;
  input [3:0]data_rxn;

  wire \<const0> ;
  wire cl_enable;
  wire cl_stopstate;
  wire clk_rxn;
  wire clk_rxp;
  wire core_clk;
  wire core_rst;
  wire [3:0]data_rxn;
  wire [3:0]data_rxp;
  wire dl0_errsoths;
  wire dl0_errsotsynchs;
  wire dl0_rxactivehs;
  wire [7:0]dl0_rxdatahs;
  wire dl0_rxsynchs;
  wire dl0_rxvalidhs;
  wire dl0_stopstate;
  wire dl1_errsoths;
  wire dl1_errsotsynchs;
  wire dl1_rxactivehs;
  wire [7:0]dl1_rxdatahs;
  wire dl1_rxsynchs;
  wire dl1_rxvalidhs;
  wire dl1_stopstate;
  wire dl2_errsoths;
  wire dl2_errsotsynchs;
  wire dl2_rxactivehs;
  wire [7:0]dl2_rxdatahs;
  wire dl2_rxsynchs;
  wire dl2_rxvalidhs;
  wire dl2_stopstate;
  wire dl3_errsoths;
  wire dl3_errsotsynchs;
  wire dl3_rxactivehs;
  wire [7:0]dl3_rxdatahs;
  wire dl3_rxsynchs;
  wire dl3_rxvalidhs;
  wire dl3_stopstate;
  wire rxbyteclkhs;
  wire [6:0]s_axi_araddr;
  wire s_axi_aresetn;
  wire s_axi_arready;
  wire s_axi_arvalid;
  wire [6:0]s_axi_awaddr;
  wire s_axi_awready;
  wire s_axi_awvalid;
  wire s_axi_bready;
  wire s_axi_bvalid;
  wire [31:0]s_axi_rdata;
  wire s_axi_rready;
  wire s_axi_rvalid;
  wire [31:0]s_axi_wdata;
  wire s_axi_wready;
  wire s_axi_wvalid;

  assign cl_rxclkactivehs = \<const0> ;
  assign cl_rxulpsclknot = \<const0> ;
  assign cl_ulpsactivenot = \<const0> ;
  assign clkoutphy_out = \<const0> ;
  assign dl0_errcontrol = \<const0> ;
  assign dl0_erresc = \<const0> ;
  assign dl0_errsyncesc = \<const0> ;
  assign dl0_rxclkesc = \<const0> ;
  assign dl0_rxdataesc[7] = \<const0> ;
  assign dl0_rxdataesc[6] = \<const0> ;
  assign dl0_rxdataesc[5] = \<const0> ;
  assign dl0_rxdataesc[4] = \<const0> ;
  assign dl0_rxdataesc[3] = \<const0> ;
  assign dl0_rxdataesc[2] = \<const0> ;
  assign dl0_rxdataesc[1] = \<const0> ;
  assign dl0_rxdataesc[0] = \<const0> ;
  assign dl0_rxlpdtesc = \<const0> ;
  assign dl0_rxtriggeresc[3] = \<const0> ;
  assign dl0_rxtriggeresc[2] = \<const0> ;
  assign dl0_rxtriggeresc[1] = \<const0> ;
  assign dl0_rxtriggeresc[0] = \<const0> ;
  assign dl0_rxulpsesc = \<const0> ;
  assign dl0_rxvalidesc = \<const0> ;
  assign dl0_ulpsactivenot = \<const0> ;
  assign dl1_errcontrol = \<const0> ;
  assign dl1_erresc = \<const0> ;
  assign dl1_errsyncesc = \<const0> ;
  assign dl1_rxclkesc = \<const0> ;
  assign dl1_rxdataesc[7] = \<const0> ;
  assign dl1_rxdataesc[6] = \<const0> ;
  assign dl1_rxdataesc[5] = \<const0> ;
  assign dl1_rxdataesc[4] = \<const0> ;
  assign dl1_rxdataesc[3] = \<const0> ;
  assign dl1_rxdataesc[2] = \<const0> ;
  assign dl1_rxdataesc[1] = \<const0> ;
  assign dl1_rxdataesc[0] = \<const0> ;
  assign dl1_rxlpdtesc = \<const0> ;
  assign dl1_rxtriggeresc[3] = \<const0> ;
  assign dl1_rxtriggeresc[2] = \<const0> ;
  assign dl1_rxtriggeresc[1] = \<const0> ;
  assign dl1_rxtriggeresc[0] = \<const0> ;
  assign dl1_rxulpsesc = \<const0> ;
  assign dl1_rxvalidesc = \<const0> ;
  assign dl1_ulpsactivenot = \<const0> ;
  assign dl2_errcontrol = \<const0> ;
  assign dl2_erresc = \<const0> ;
  assign dl2_errsyncesc = \<const0> ;
  assign dl2_rxclkesc = \<const0> ;
  assign dl2_rxdataesc[7] = \<const0> ;
  assign dl2_rxdataesc[6] = \<const0> ;
  assign dl2_rxdataesc[5] = \<const0> ;
  assign dl2_rxdataesc[4] = \<const0> ;
  assign dl2_rxdataesc[3] = \<const0> ;
  assign dl2_rxdataesc[2] = \<const0> ;
  assign dl2_rxdataesc[1] = \<const0> ;
  assign dl2_rxdataesc[0] = \<const0> ;
  assign dl2_rxlpdtesc = \<const0> ;
  assign dl2_rxtriggeresc[3] = \<const0> ;
  assign dl2_rxtriggeresc[2] = \<const0> ;
  assign dl2_rxtriggeresc[1] = \<const0> ;
  assign dl2_rxtriggeresc[0] = \<const0> ;
  assign dl2_rxulpsesc = \<const0> ;
  assign dl2_rxvalidesc = \<const0> ;
  assign dl2_ulpsactivenot = \<const0> ;
  assign dl3_errcontrol = \<const0> ;
  assign dl3_erresc = \<const0> ;
  assign dl3_errsyncesc = \<const0> ;
  assign dl3_rxclkesc = \<const0> ;
  assign dl3_rxdataesc[7] = \<const0> ;
  assign dl3_rxdataesc[6] = \<const0> ;
  assign dl3_rxdataesc[5] = \<const0> ;
  assign dl3_rxdataesc[4] = \<const0> ;
  assign dl3_rxdataesc[3] = \<const0> ;
  assign dl3_rxdataesc[2] = \<const0> ;
  assign dl3_rxdataesc[1] = \<const0> ;
  assign dl3_rxdataesc[0] = \<const0> ;
  assign dl3_rxlpdtesc = \<const0> ;
  assign dl3_rxtriggeresc[3] = \<const0> ;
  assign dl3_rxtriggeresc[2] = \<const0> ;
  assign dl3_rxtriggeresc[1] = \<const0> ;
  assign dl3_rxtriggeresc[0] = \<const0> ;
  assign dl3_rxulpsesc = \<const0> ;
  assign dl3_rxvalidesc = \<const0> ;
  assign dl3_ulpsactivenot = \<const0> ;
  assign init_done = \<const0> ;
  assign pll_lock_out = \<const0> ;
  assign s_axi_bresp[1] = \<const0> ;
  assign s_axi_bresp[0] = \<const0> ;
  assign s_axi_rresp[1] = \<const0> ;
  assign s_axi_rresp[0] = \<const0> ;
  assign system_rst_out = \<const0> ;
  GND GND
       (.G(\<const0> ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_c1 inst
       (.cl_enable(cl_enable),
        .cl_stopstate(cl_stopstate),
        .clk_rxn(clk_rxn),
        .clk_rxp(clk_rxp),
        .core_clk(core_clk),
        .core_rst(core_rst),
        .data_rxn(data_rxn),
        .data_rxp(data_rxp),
        .dl0_errsoths(dl0_errsoths),
        .dl0_errsotsynchs(dl0_errsotsynchs),
        .dl0_rxactivehs(dl0_rxactivehs),
        .dl0_rxdatahs(dl0_rxdatahs),
        .dl0_rxsynchs(dl0_rxsynchs),
        .dl0_rxvalidhs(dl0_rxvalidhs),
        .dl0_stopstate(dl0_stopstate),
        .dl1_errsoths(dl1_errsoths),
        .dl1_errsotsynchs(dl1_errsotsynchs),
        .dl1_rxactivehs(dl1_rxactivehs),
        .dl1_rxdatahs(dl1_rxdatahs),
        .dl1_rxsynchs(dl1_rxsynchs),
        .dl1_rxvalidhs(dl1_rxvalidhs),
        .dl1_stopstate(dl1_stopstate),
        .dl2_errsoths(dl2_errsoths),
        .dl2_errsotsynchs(dl2_errsotsynchs),
        .dl2_rxactivehs(dl2_rxactivehs),
        .dl2_rxdatahs(dl2_rxdatahs),
        .dl2_rxsynchs(dl2_rxsynchs),
        .dl2_rxvalidhs(dl2_rxvalidhs),
        .dl2_stopstate(dl2_stopstate),
        .dl3_errsoths(dl3_errsoths),
        .dl3_errsotsynchs(dl3_errsotsynchs),
        .dl3_rxactivehs(dl3_rxactivehs),
        .dl3_rxdatahs(dl3_rxdatahs),
        .dl3_rxsynchs(dl3_rxsynchs),
        .dl3_rxvalidhs(dl3_rxvalidhs),
        .dl3_stopstate(dl3_stopstate),
        .rxbyteclkhs(rxbyteclkhs),
        .s_axi_araddr(s_axi_araddr[6:2]),
        .s_axi_aresetn(s_axi_aresetn),
        .s_axi_arready(s_axi_arready),
        .s_axi_arvalid(s_axi_arvalid),
        .s_axi_awaddr(s_axi_awaddr[6:2]),
        .s_axi_awready(s_axi_awready),
        .s_axi_awvalid(s_axi_awvalid),
        .s_axi_bready(s_axi_bready),
        .s_axi_bvalid(s_axi_bvalid),
        .s_axi_rdata(s_axi_rdata),
        .s_axi_rready(s_axi_rready),
        .s_axi_rvalid(s_axi_rvalid),
        .s_axi_wdata(s_axi_wdata),
        .s_axi_wready(s_axi_wready),
        .s_axi_wvalid(s_axi_wvalid));
endmodule

(* CHECK_LICENSE_TYPE = "bd_7289_phy_0_hssio_rx,bd_7289_phy_0_hssio_rx_high_speed_selectio_wiz_v3_6_10,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "bd_7289_phy_0_hssio_rx_high_speed_selectio_wiz_v3_6_10,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_hssio_rx
   (hs_rx_disable,
    lp_rx_disable,
    lp_rx_o_p,
    lp_rx_o_n,
    fifo_rd_clk_0,
    fifo_rd_clk_1,
    fifo_rd_clk_2,
    fifo_rd_clk_3,
    fifo_rd_clk_4,
    fifo_rd_clk_5,
    fifo_rd_clk_6,
    fifo_rd_clk_7,
    fifo_rd_clk_8,
    fifo_rd_clk_9,
    fifo_rd_en_0,
    fifo_rd_en_1,
    fifo_rd_en_2,
    fifo_rd_en_3,
    fifo_rd_en_4,
    fifo_rd_en_5,
    fifo_rd_en_6,
    fifo_rd_en_7,
    fifo_rd_en_8,
    fifo_rd_en_9,
    fifo_empty_0,
    fifo_empty_1,
    fifo_empty_2,
    fifo_empty_3,
    fifo_empty_4,
    fifo_empty_5,
    fifo_empty_6,
    fifo_empty_7,
    fifo_empty_8,
    fifo_empty_9,
    fifo_wr_clk_0,
    vtc_rdy_bsc0,
    en_vtc_bsc0,
    vtc_rdy_bsc1,
    en_vtc_bsc1,
    dly_rdy_bsc0,
    dly_rdy_bsc1,
    rst_seq_done,
    shared_pll0_clkoutphy_out,
    pll0_clkout0,
    rst,
    bs_rst_dphy_in,
    clk,
    riu_clk,
    pll0_locked,
    clk_rxp,
    data_to_fabric_clk_rxp,
    clk_rxn,
    data_to_fabric_clk_rxn,
    data_rxp0,
    data_to_fabric_data_rxp0,
    data_rxn0,
    data_to_fabric_data_rxn0,
    data_rxp1,
    data_to_fabric_data_rxp1,
    data_rxn1,
    data_to_fabric_data_rxn1,
    data_rxp2,
    data_to_fabric_data_rxp2,
    data_rxn2,
    data_to_fabric_data_rxn2,
    data_rxp3,
    data_to_fabric_data_rxp3,
    data_rxn3,
    data_to_fabric_data_rxn3);
  input [4:0]hs_rx_disable;
  input [4:0]lp_rx_disable;
  output [4:0]lp_rx_o_p;
  output [4:0]lp_rx_o_n;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_clk_0" *) (* x_interface_mode = "master" *) input fifo_rd_clk_0;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_clk_1" *) input fifo_rd_clk_1;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_clk_2" *) input fifo_rd_clk_2;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_clk_3" *) input fifo_rd_clk_3;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_clk_4" *) input fifo_rd_clk_4;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_clk_5" *) input fifo_rd_clk_5;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_clk_6" *) input fifo_rd_clk_6;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_clk_7" *) input fifo_rd_clk_7;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_clk_8" *) input fifo_rd_clk_8;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_clk_9" *) input fifo_rd_clk_9;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_en_0" *) input fifo_rd_en_0;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_en_1" *) input fifo_rd_en_1;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_en_2" *) input fifo_rd_en_2;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_en_3" *) input fifo_rd_en_3;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_en_4" *) input fifo_rd_en_4;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_en_5" *) input fifo_rd_en_5;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_en_6" *) input fifo_rd_en_6;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_en_7" *) input fifo_rd_en_7;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_en_8" *) input fifo_rd_en_8;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_rd_en_9" *) input fifo_rd_en_9;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_empty_0" *) output fifo_empty_0;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_empty_1" *) output fifo_empty_1;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_empty_2" *) output fifo_empty_2;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_empty_3" *) output fifo_empty_3;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_empty_4" *) output fifo_empty_4;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_empty_5" *) output fifo_empty_5;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_empty_6" *) output fifo_empty_6;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_empty_7" *) output fifo_empty_7;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_empty_8" *) output fifo_empty_8;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_empty_9" *) output fifo_empty_9;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL fifo_wr_clk_0" *) output fifo_wr_clk_0;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL vtc_rdy_bsc0" *) output vtc_rdy_bsc0;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL en_vtc_bsc0" *) input en_vtc_bsc0;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL vtc_rdy_bsc1" *) output vtc_rdy_bsc1;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL en_vtc_bsc1" *) input en_vtc_bsc1;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL dly_rdy_bsc0" *) output dly_rdy_bsc0;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL dly_rdy_bsc1" *) output dly_rdy_bsc1;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL rst_seq_done" *) output rst_seq_done;
  output shared_pll0_clkoutphy_out;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL pll0_clkout0" *) output pll0_clkout0;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 reset_rst RST" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME reset_rst, POLARITY ACTIVE_HIGH, INSERT_VIP 0" *) input rst;
  input bs_rst_dphy_in;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 clock_CLK CLK" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME clock_CLK, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, INSERT_VIP 0" *) input clk;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL riu_clk" *) input riu_clk;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ctrl:1.0 HSSIO_CTRL pll0_locked" *) output pll0_locked;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_data_rx:1.0 xiphy_rx_pins pin0" *) (* x_interface_mode = "slave" *) input clk_rxp;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ip_to_pins:1.0 data_to_fabric ip_to_pins_0" *) (* x_interface_mode = "master" *) output [7:0]data_to_fabric_clk_rxp;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_data_rx:1.0 xiphy_rx_pins pin1" *) input clk_rxn;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ip_to_pins:1.0 data_to_fabric ip_to_pins_1" *) output [7:0]data_to_fabric_clk_rxn;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_data_rx:1.0 xiphy_rx_pins pin2" *) input data_rxp0;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ip_to_pins:1.0 data_to_fabric ip_to_pins_2" *) output [7:0]data_to_fabric_data_rxp0;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_data_rx:1.0 xiphy_rx_pins pin3" *) input data_rxn0;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ip_to_pins:1.0 data_to_fabric ip_to_pins_3" *) output [7:0]data_to_fabric_data_rxn0;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_data_rx:1.0 xiphy_rx_pins pin4" *) input data_rxp1;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ip_to_pins:1.0 data_to_fabric ip_to_pins_4" *) output [7:0]data_to_fabric_data_rxp1;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_data_rx:1.0 xiphy_rx_pins pin5" *) input data_rxn1;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ip_to_pins:1.0 data_to_fabric ip_to_pins_5" *) output [7:0]data_to_fabric_data_rxn1;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_data_rx:1.0 xiphy_rx_pins pin6" *) input data_rxp2;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ip_to_pins:1.0 data_to_fabric ip_to_pins_6" *) output [7:0]data_to_fabric_data_rxp2;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_data_rx:1.0 xiphy_rx_pins pin7" *) input data_rxn2;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ip_to_pins:1.0 data_to_fabric ip_to_pins_7" *) output [7:0]data_to_fabric_data_rxn2;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_data_rx:1.0 xiphy_rx_pins pin8" *) input data_rxp3;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ip_to_pins:1.0 data_to_fabric ip_to_pins_8" *) output [7:0]data_to_fabric_data_rxp3;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_data_rx:1.0 xiphy_rx_pins pin9" *) input data_rxn3;
  (* x_interface_info = "xilinx.com:display_high_speed_selectio_wiz:hssio_ip_to_pins:1.0 data_to_fabric ip_to_pins_9" *) output [7:0]data_to_fabric_data_rxn3;

  wire \<const0> ;
  wire bs_rst_dphy_in;
  wire clk_rxn;
  wire clk_rxp;
  wire data_rxn0;
  wire data_rxn1;
  wire data_rxn2;
  wire data_rxn3;
  wire data_rxp0;
  wire data_rxp1;
  wire data_rxp2;
  wire data_rxp3;
  wire [7:0]data_to_fabric_data_rxp0;
  wire [7:0]data_to_fabric_data_rxp1;
  wire [7:0]data_to_fabric_data_rxp2;
  wire [7:0]data_to_fabric_data_rxp3;
  wire fifo_empty_2;
  wire fifo_empty_4;
  wire fifo_empty_6;
  wire fifo_empty_8;
  wire fifo_rd_clk_0;
  wire fifo_rd_en_2;
  wire fifo_rd_en_4;
  wire fifo_rd_en_6;
  wire fifo_rd_en_8;
  wire fifo_wr_clk_0;
  wire [4:0]hs_rx_disable;
  wire [4:0]lp_rx_o_n;
  wire [4:0]lp_rx_o_p;
  wire riu_clk;
  wire rst;
  wire rst_seq_done;
  wire NLW_inst_bitslip_error_0_UNCONNECTED;
  wire NLW_inst_bitslip_error_1_UNCONNECTED;
  wire NLW_inst_bitslip_error_10_UNCONNECTED;
  wire NLW_inst_bitslip_error_11_UNCONNECTED;
  wire NLW_inst_bitslip_error_12_UNCONNECTED;
  wire NLW_inst_bitslip_error_13_UNCONNECTED;
  wire NLW_inst_bitslip_error_14_UNCONNECTED;
  wire NLW_inst_bitslip_error_15_UNCONNECTED;
  wire NLW_inst_bitslip_error_16_UNCONNECTED;
  wire NLW_inst_bitslip_error_17_UNCONNECTED;
  wire NLW_inst_bitslip_error_18_UNCONNECTED;
  wire NLW_inst_bitslip_error_19_UNCONNECTED;
  wire NLW_inst_bitslip_error_2_UNCONNECTED;
  wire NLW_inst_bitslip_error_20_UNCONNECTED;
  wire NLW_inst_bitslip_error_21_UNCONNECTED;
  wire NLW_inst_bitslip_error_22_UNCONNECTED;
  wire NLW_inst_bitslip_error_23_UNCONNECTED;
  wire NLW_inst_bitslip_error_24_UNCONNECTED;
  wire NLW_inst_bitslip_error_25_UNCONNECTED;
  wire NLW_inst_bitslip_error_26_UNCONNECTED;
  wire NLW_inst_bitslip_error_27_UNCONNECTED;
  wire NLW_inst_bitslip_error_28_UNCONNECTED;
  wire NLW_inst_bitslip_error_29_UNCONNECTED;
  wire NLW_inst_bitslip_error_3_UNCONNECTED;
  wire NLW_inst_bitslip_error_30_UNCONNECTED;
  wire NLW_inst_bitslip_error_31_UNCONNECTED;
  wire NLW_inst_bitslip_error_32_UNCONNECTED;
  wire NLW_inst_bitslip_error_33_UNCONNECTED;
  wire NLW_inst_bitslip_error_34_UNCONNECTED;
  wire NLW_inst_bitslip_error_35_UNCONNECTED;
  wire NLW_inst_bitslip_error_36_UNCONNECTED;
  wire NLW_inst_bitslip_error_37_UNCONNECTED;
  wire NLW_inst_bitslip_error_38_UNCONNECTED;
  wire NLW_inst_bitslip_error_39_UNCONNECTED;
  wire NLW_inst_bitslip_error_4_UNCONNECTED;
  wire NLW_inst_bitslip_error_40_UNCONNECTED;
  wire NLW_inst_bitslip_error_41_UNCONNECTED;
  wire NLW_inst_bitslip_error_42_UNCONNECTED;
  wire NLW_inst_bitslip_error_43_UNCONNECTED;
  wire NLW_inst_bitslip_error_44_UNCONNECTED;
  wire NLW_inst_bitslip_error_45_UNCONNECTED;
  wire NLW_inst_bitslip_error_46_UNCONNECTED;
  wire NLW_inst_bitslip_error_47_UNCONNECTED;
  wire NLW_inst_bitslip_error_48_UNCONNECTED;
  wire NLW_inst_bitslip_error_49_UNCONNECTED;
  wire NLW_inst_bitslip_error_5_UNCONNECTED;
  wire NLW_inst_bitslip_error_50_UNCONNECTED;
  wire NLW_inst_bitslip_error_51_UNCONNECTED;
  wire NLW_inst_bitslip_error_6_UNCONNECTED;
  wire NLW_inst_bitslip_error_7_UNCONNECTED;
  wire NLW_inst_bitslip_error_8_UNCONNECTED;
  wire NLW_inst_bitslip_error_9_UNCONNECTED;
  wire NLW_inst_clk_from_ibuf_UNCONNECTED;
  wire NLW_inst_dly_rdy_bsc0_UNCONNECTED;
  wire NLW_inst_dly_rdy_bsc1_UNCONNECTED;
  wire NLW_inst_dly_rdy_bsc2_UNCONNECTED;
  wire NLW_inst_dly_rdy_bsc3_UNCONNECTED;
  wire NLW_inst_dly_rdy_bsc4_UNCONNECTED;
  wire NLW_inst_dly_rdy_bsc5_UNCONNECTED;
  wire NLW_inst_dly_rdy_bsc6_UNCONNECTED;
  wire NLW_inst_dly_rdy_bsc7_UNCONNECTED;
  wire NLW_inst_drdy_UNCONNECTED;
  wire NLW_inst_fifo_empty_0_UNCONNECTED;
  wire NLW_inst_fifo_empty_1_UNCONNECTED;
  wire NLW_inst_fifo_empty_10_UNCONNECTED;
  wire NLW_inst_fifo_empty_11_UNCONNECTED;
  wire NLW_inst_fifo_empty_12_UNCONNECTED;
  wire NLW_inst_fifo_empty_13_UNCONNECTED;
  wire NLW_inst_fifo_empty_14_UNCONNECTED;
  wire NLW_inst_fifo_empty_15_UNCONNECTED;
  wire NLW_inst_fifo_empty_16_UNCONNECTED;
  wire NLW_inst_fifo_empty_17_UNCONNECTED;
  wire NLW_inst_fifo_empty_18_UNCONNECTED;
  wire NLW_inst_fifo_empty_19_UNCONNECTED;
  wire NLW_inst_fifo_empty_20_UNCONNECTED;
  wire NLW_inst_fifo_empty_21_UNCONNECTED;
  wire NLW_inst_fifo_empty_22_UNCONNECTED;
  wire NLW_inst_fifo_empty_23_UNCONNECTED;
  wire NLW_inst_fifo_empty_24_UNCONNECTED;
  wire NLW_inst_fifo_empty_25_UNCONNECTED;
  wire NLW_inst_fifo_empty_26_UNCONNECTED;
  wire NLW_inst_fifo_empty_27_UNCONNECTED;
  wire NLW_inst_fifo_empty_28_UNCONNECTED;
  wire NLW_inst_fifo_empty_29_UNCONNECTED;
  wire NLW_inst_fifo_empty_3_UNCONNECTED;
  wire NLW_inst_fifo_empty_30_UNCONNECTED;
  wire NLW_inst_fifo_empty_31_UNCONNECTED;
  wire NLW_inst_fifo_empty_32_UNCONNECTED;
  wire NLW_inst_fifo_empty_33_UNCONNECTED;
  wire NLW_inst_fifo_empty_34_UNCONNECTED;
  wire NLW_inst_fifo_empty_35_UNCONNECTED;
  wire NLW_inst_fifo_empty_36_UNCONNECTED;
  wire NLW_inst_fifo_empty_37_UNCONNECTED;
  wire NLW_inst_fifo_empty_38_UNCONNECTED;
  wire NLW_inst_fifo_empty_39_UNCONNECTED;
  wire NLW_inst_fifo_empty_40_UNCONNECTED;
  wire NLW_inst_fifo_empty_41_UNCONNECTED;
  wire NLW_inst_fifo_empty_42_UNCONNECTED;
  wire NLW_inst_fifo_empty_43_UNCONNECTED;
  wire NLW_inst_fifo_empty_44_UNCONNECTED;
  wire NLW_inst_fifo_empty_45_UNCONNECTED;
  wire NLW_inst_fifo_empty_46_UNCONNECTED;
  wire NLW_inst_fifo_empty_47_UNCONNECTED;
  wire NLW_inst_fifo_empty_48_UNCONNECTED;
  wire NLW_inst_fifo_empty_49_UNCONNECTED;
  wire NLW_inst_fifo_empty_5_UNCONNECTED;
  wire NLW_inst_fifo_empty_50_UNCONNECTED;
  wire NLW_inst_fifo_empty_51_UNCONNECTED;
  wire NLW_inst_fifo_empty_7_UNCONNECTED;
  wire NLW_inst_fifo_empty_9_UNCONNECTED;
  wire NLW_inst_fifo_rd_data_valid_UNCONNECTED;
  wire NLW_inst_fifo_wr_clk_13_UNCONNECTED;
  wire NLW_inst_fifo_wr_clk_19_UNCONNECTED;
  wire NLW_inst_fifo_wr_clk_26_UNCONNECTED;
  wire NLW_inst_fifo_wr_clk_32_UNCONNECTED;
  wire NLW_inst_fifo_wr_clk_39_UNCONNECTED;
  wire NLW_inst_fifo_wr_clk_45_UNCONNECTED;
  wire NLW_inst_fifo_wr_clk_6_UNCONNECTED;
  wire NLW_inst_intf_rdy_UNCONNECTED;
  wire NLW_inst_pll0_clkout0_UNCONNECTED;
  wire NLW_inst_pll0_clkout1_UNCONNECTED;
  wire NLW_inst_pll0_locked_UNCONNECTED;
  wire NLW_inst_pll1_clkout0_UNCONNECTED;
  wire NLW_inst_pll1_locked_UNCONNECTED;
  wire NLW_inst_riu_valid_bg0_UNCONNECTED;
  wire NLW_inst_riu_valid_bg0_bs0_UNCONNECTED;
  wire NLW_inst_riu_valid_bg0_bs1_UNCONNECTED;
  wire NLW_inst_riu_valid_bg1_UNCONNECTED;
  wire NLW_inst_riu_valid_bg1_bs2_UNCONNECTED;
  wire NLW_inst_riu_valid_bg1_bs3_UNCONNECTED;
  wire NLW_inst_riu_valid_bg2_UNCONNECTED;
  wire NLW_inst_riu_valid_bg2_bs4_UNCONNECTED;
  wire NLW_inst_riu_valid_bg2_bs5_UNCONNECTED;
  wire NLW_inst_riu_valid_bg3_UNCONNECTED;
  wire NLW_inst_riu_valid_bg3_bs6_UNCONNECTED;
  wire NLW_inst_riu_valid_bg3_bs7_UNCONNECTED;
  wire NLW_inst_rx_bitslip_sync_done_UNCONNECTED;
  wire NLW_inst_rxtx_bitslip_sync_done_UNCONNECTED;
  wire NLW_inst_shared_pll0_clkoutphy_out_UNCONNECTED;
  wire NLW_inst_shared_pll1_clkoutphy_out_UNCONNECTED;
  wire NLW_inst_vtc_rdy_bsc0_UNCONNECTED;
  wire NLW_inst_vtc_rdy_bsc1_UNCONNECTED;
  wire NLW_inst_vtc_rdy_bsc2_UNCONNECTED;
  wire NLW_inst_vtc_rdy_bsc3_UNCONNECTED;
  wire NLW_inst_vtc_rdy_bsc4_UNCONNECTED;
  wire NLW_inst_vtc_rdy_bsc5_UNCONNECTED;
  wire NLW_inst_vtc_rdy_bsc6_UNCONNECTED;
  wire NLW_inst_vtc_rdy_bsc7_UNCONNECTED;
  wire [8:0]NLW_inst_bidir_tx_bs_tri_cntvalueout0_UNCONNECTED;
  wire [8:0]NLW_inst_bidir_tx_bs_tri_cntvalueout1_UNCONNECTED;
  wire [8:0]NLW_inst_bidir_tx_bs_tri_cntvalueout2_UNCONNECTED;
  wire [8:0]NLW_inst_bidir_tx_bs_tri_cntvalueout3_UNCONNECTED;
  wire [8:0]NLW_inst_bidir_tx_bs_tri_cntvalueout4_UNCONNECTED;
  wire [8:0]NLW_inst_bidir_tx_bs_tri_cntvalueout5_UNCONNECTED;
  wire [8:0]NLW_inst_bidir_tx_bs_tri_cntvalueout6_UNCONNECTED;
  wire [8:0]NLW_inst_bidir_tx_bs_tri_cntvalueout7_UNCONNECTED;
  wire [7:0]NLW_inst_data_to_fabric_clk_rxn_UNCONNECTED;
  wire [7:0]NLW_inst_data_to_fabric_clk_rxp_UNCONNECTED;
  wire [7:0]NLW_inst_data_to_fabric_data_rxn0_UNCONNECTED;
  wire [7:0]NLW_inst_data_to_fabric_data_rxn1_UNCONNECTED;
  wire [7:0]NLW_inst_data_to_fabric_data_rxn2_UNCONNECTED;
  wire [7:0]NLW_inst_data_to_fabric_data_rxn3_UNCONNECTED;
  wire [15:0]NLW_inst_do_out_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg0_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg0_bs0_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg0_bs1_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg1_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg1_bs2_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg1_bs3_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg2_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg2_bs4_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg2_bs5_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg3_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg3_bs6_UNCONNECTED;
  wire [15:0]NLW_inst_riu_rd_data_bg3_bs7_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_0_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_1_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_10_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_11_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_12_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_13_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_14_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_15_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_16_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_17_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_18_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_19_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_2_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_20_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_21_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_22_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_23_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_24_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_25_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_26_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_27_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_28_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_29_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_3_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_30_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_31_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_32_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_33_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_34_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_35_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_36_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_37_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_38_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_39_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_4_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_40_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_41_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_42_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_43_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_44_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_45_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_46_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_47_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_48_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_49_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_5_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_50_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_51_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_6_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_7_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_8_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_9_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_0_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_1_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_10_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_11_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_12_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_13_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_14_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_15_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_16_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_17_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_18_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_19_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_2_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_20_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_21_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_22_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_23_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_24_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_25_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_26_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_27_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_28_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_29_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_3_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_30_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_31_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_32_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_33_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_34_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_35_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_36_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_37_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_38_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_39_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_4_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_40_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_41_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_42_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_43_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_44_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_45_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_46_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_47_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_48_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_49_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_5_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_50_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_51_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_6_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_7_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_8_UNCONNECTED;
  wire [8:0]NLW_inst_rx_cntvalueout_ext_9_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_0_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_1_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_10_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_11_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_12_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_13_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_14_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_15_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_16_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_17_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_18_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_19_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_2_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_20_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_21_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_22_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_23_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_24_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_25_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_26_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_27_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_28_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_29_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_3_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_30_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_31_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_32_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_33_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_34_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_35_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_36_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_37_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_38_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_39_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_4_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_40_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_41_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_42_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_43_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_44_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_45_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_46_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_47_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_48_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_49_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_5_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_50_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_51_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_6_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_7_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_8_UNCONNECTED;
  wire [8:0]NLW_inst_tx_cntvalueout_9_UNCONNECTED;

  assign data_to_fabric_clk_rxn[7] = \<const0> ;
  assign data_to_fabric_clk_rxn[6] = \<const0> ;
  assign data_to_fabric_clk_rxn[5] = \<const0> ;
  assign data_to_fabric_clk_rxn[4] = \<const0> ;
  assign data_to_fabric_clk_rxn[3] = \<const0> ;
  assign data_to_fabric_clk_rxn[2] = \<const0> ;
  assign data_to_fabric_clk_rxn[1] = \<const0> ;
  assign data_to_fabric_clk_rxn[0] = \<const0> ;
  assign data_to_fabric_clk_rxp[7] = \<const0> ;
  assign data_to_fabric_clk_rxp[6] = \<const0> ;
  assign data_to_fabric_clk_rxp[5] = \<const0> ;
  assign data_to_fabric_clk_rxp[4] = \<const0> ;
  assign data_to_fabric_clk_rxp[3] = \<const0> ;
  assign data_to_fabric_clk_rxp[2] = \<const0> ;
  assign data_to_fabric_clk_rxp[1] = \<const0> ;
  assign data_to_fabric_clk_rxp[0] = \<const0> ;
  assign data_to_fabric_data_rxn0[7] = \<const0> ;
  assign data_to_fabric_data_rxn0[6] = \<const0> ;
  assign data_to_fabric_data_rxn0[5] = \<const0> ;
  assign data_to_fabric_data_rxn0[4] = \<const0> ;
  assign data_to_fabric_data_rxn0[3] = \<const0> ;
  assign data_to_fabric_data_rxn0[2] = \<const0> ;
  assign data_to_fabric_data_rxn0[1] = \<const0> ;
  assign data_to_fabric_data_rxn0[0] = \<const0> ;
  assign data_to_fabric_data_rxn1[7] = \<const0> ;
  assign data_to_fabric_data_rxn1[6] = \<const0> ;
  assign data_to_fabric_data_rxn1[5] = \<const0> ;
  assign data_to_fabric_data_rxn1[4] = \<const0> ;
  assign data_to_fabric_data_rxn1[3] = \<const0> ;
  assign data_to_fabric_data_rxn1[2] = \<const0> ;
  assign data_to_fabric_data_rxn1[1] = \<const0> ;
  assign data_to_fabric_data_rxn1[0] = \<const0> ;
  assign data_to_fabric_data_rxn2[7] = \<const0> ;
  assign data_to_fabric_data_rxn2[6] = \<const0> ;
  assign data_to_fabric_data_rxn2[5] = \<const0> ;
  assign data_to_fabric_data_rxn2[4] = \<const0> ;
  assign data_to_fabric_data_rxn2[3] = \<const0> ;
  assign data_to_fabric_data_rxn2[2] = \<const0> ;
  assign data_to_fabric_data_rxn2[1] = \<const0> ;
  assign data_to_fabric_data_rxn2[0] = \<const0> ;
  assign data_to_fabric_data_rxn3[7] = \<const0> ;
  assign data_to_fabric_data_rxn3[6] = \<const0> ;
  assign data_to_fabric_data_rxn3[5] = \<const0> ;
  assign data_to_fabric_data_rxn3[4] = \<const0> ;
  assign data_to_fabric_data_rxn3[3] = \<const0> ;
  assign data_to_fabric_data_rxn3[2] = \<const0> ;
  assign data_to_fabric_data_rxn3[1] = \<const0> ;
  assign data_to_fabric_data_rxn3[0] = \<const0> ;
  assign dly_rdy_bsc0 = \<const0> ;
  assign dly_rdy_bsc1 = \<const0> ;
  assign fifo_empty_0 = \<const0> ;
  assign fifo_empty_1 = \<const0> ;
  assign fifo_empty_3 = \<const0> ;
  assign fifo_empty_5 = \<const0> ;
  assign fifo_empty_7 = \<const0> ;
  assign fifo_empty_9 = \<const0> ;
  assign pll0_clkout0 = \<const0> ;
  assign pll0_locked = \<const0> ;
  assign shared_pll0_clkoutphy_out = \<const0> ;
  assign vtc_rdy_bsc0 = \<const0> ;
  assign vtc_rdy_bsc1 = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ALL_EN_PIN_INFO = "0 {nibble 0 dir RX sig_type DIFF data_strb Strobe data_strb_org Strobe sig_name clk_rxp loc T3} 1 {nibble 0 dir RX sig_type DIFF data_strb Strobe data_strb_org Strobe sig_name clk_rxn loc T2} 2 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp0 loc P3} 3 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn0 loc R3} 4 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp1 loc U2} 5 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn1 loc U1} 6 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp2 loc R4} 7 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn2 loc T4} 8 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp3 loc R1} 9 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn3 loc T1}" *) 
  (* C_ALL_RX_EN = "52'b0000000000000000000000000000000000000000001111111111" *) 
  (* C_BANK = "65" *) 
  (* C_BIDIR_BITSLICE_EN = "52'b0000000000000000000000000000000000000000000000000000" *) 
  (* C_BIDIR_FIFO_SYNC_MODE = "FALSE" *) 
  (* C_BIDIR_IS_RX_CLK_INVERTED = "1'b0" *) 
  (* C_BIDIR_IS_RX_RST_DLY_INVERTED = "1'b0" *) 
  (* C_BIDIR_IS_RX_RST_INVERTED = "1'b0" *) 
  (* C_BIDIR_IS_TX_CLK_INVERTED = "1'b0" *) 
  (* C_BIDIR_IS_TX_RST_DLY_INVERTED = "1'b0" *) 
  (* C_BIDIR_IS_TX_RST_INVERTED = "1'b0" *) 
  (* C_BIDIR_RX_DELAY_FORMAT = "TIME" *) 
  (* C_BIDIR_TX_DELAY_FORMAT = "TIME" *) 
  (* C_BITSLIP_MODE = "SLIP_PER_BIT" *) 
  (* C_BITSLIP_VAL = "8'b00101100" *) 
  (* C_BS0_INFO = "0 {name bg0_pin0_nc loc T3} 1 {name bg0_pin6_nc loc R4} 2 {name bg1_pin0_nc loc N2} 3 {name bg1_pin6_nc loc M5} 4 {name bg2_pin0_nc loc J3} 5 {name bg2_pin6_nc loc J5} 6 {name bg3_pin0_nc loc G1} 7 {name bg3_pin6_nc loc D3}" *) 
  (* C_BSC_CTRL_CLK = "EXTERNAL" *) 
  (* C_BSC_EN_DYN_ODLY_MODE = "FALSE" *) 
  (* C_BSC_IDLY_VT_TRACK = "TRUE" *) 
  (* C_BSC_ODLY_VT_TRACK = "TRUE" *) 
  (* C_BSC_QDLY_VT_TRACK = "TRUE" *) 
  (* C_BSC_READ_IDLE_COUNT = "6'b000000" *) 
  (* C_BSC_REFCLK_SRC = "PLLCLK" *) 
  (* C_BSC_ROUNDING_FACTOR = "16" *) 
  (* C_BSC_RXGATE_EXTEND = "FALSE" *) 
  (* C_BSC_RX_GATING = "DISABLE" *) 
  (* C_BSC_SELF_CALIBRATE = "ENABLE" *) 
  (* C_BSC_SIM_SPEEDUP = "FAST" *) 
  (* C_BS_INIT_VAL = "52'b0000000000000000000000000000000000000000000000000000" *) 
  (* C_CLKIN_DIFF_EN = "0" *) 
  (* C_CLKIN_PERIOD = "5.000000" *) 
  (* C_CLK_FWD = "0" *) 
  (* C_CLK_FWD_BITSLICE_NO = "0" *) 
  (* C_CLK_FWD_ENABLE = "52'b0000000000000000000000000000000000000000000000000000" *) 
  (* C_CLK_FWD_PHASE = "0" *) 
  (* C_CLK_SIG_TYPE = "SINGLE" *) 
  (* C_CLOCK_TRI = "1" *) 
  (* C_DATA_PIN_EN = "5" *) 
  (* C_DATA_TRI = "1" *) 
  (* C_DEVICE = "xczu1cg" *) 
  (* C_DEVICE_FAMILY = "zynquplus" *) 
  (* C_DIFFERENTIAL_IO_STD = "MIPI_DPHY_DCI" *) 
  (* C_DIFFERENTIAL_IO_TERMINATION = "TERM_100" *) 
  (* C_DIFF_EN = "52'b0000000000000000000000000000000000000000001111111111" *) 
  (* C_DIV_MODE = "DIV4" *) 
  (* C_ENABLE_BITSLIP = "0" *) 
  (* C_ENABLE_DATA_BITSLIP = "0" *) 
  (* C_ENABLE_N_PINS = "1" *) 
  (* C_ENABLE_PLL0_PLLOUT1 = "0" *) 
  (* C_ENABLE_PLL0_PLLOUTFB = "0" *) 
  (* C_ENABLE_RIU_INTERFACE = "0" *) 
  (* C_ENABLE_RIU_SPLIT = "0" *) 
  (* C_ENABLE_TX_TRI = "0" *) 
  (* C_EN_BIDIR = "0" *) 
  (* C_EN_BSC0 = "1" *) 
  (* C_EN_BSC1 = "1" *) 
  (* C_EN_BSC2 = "0" *) 
  (* C_EN_BSC3 = "0" *) 
  (* C_EN_BSC4 = "0" *) 
  (* C_EN_BSC5 = "0" *) 
  (* C_EN_BSC6 = "0" *) 
  (* C_EN_BSC7 = "0" *) 
  (* C_EN_MULTI_INTF_PORTS = "0" *) 
  (* C_EN_RIU_OR0 = "TRUE" *) 
  (* C_EN_RIU_OR1 = "FALSE" *) 
  (* C_EN_RIU_OR2 = "FALSE" *) 
  (* C_EN_RIU_OR3 = "FALSE" *) 
  (* C_EN_RX = "1" *) 
  (* C_EN_TX = "0" *) 
  (* C_EN_VTC = "0" *) 
  (* C_EXDES_BANK = "" *) 
  (* C_EX_CLK_FREQ = "200.000000" *) 
  (* C_EX_INST_GEN = "0" *) 
  (* C_FIFO_SYNC_MODE = "1" *) 
  (* C_GC_LOC = "21 {name IO_L11P_T1U_N8_GC_65 loc L2} 23 {name IO_L12P_T1U_N10_GC_65 loc L4} 28 {name IO_L14P_T2L_N2_GC_65 loc K4}" *) 
  (* C_INCLK_LOC = "NONE" *) 
  (* C_INCLK_PIN = "100" *) 
  (* C_INV_RX_CLK = "8'b00000000" *) 
  (* C_NIB0_BS0_EN = "0" *) 
  (* C_NIB0_EN_CLK_TO_EXT_NORTH = "1'b0" *) 
  (* C_NIB0_EN_CLK_TO_EXT_SOUTH = "1'b0" *) 
  (* C_NIB0_EN_OTHER_NCLK = "1'b0" *) 
  (* C_NIB0_EN_OTHER_PCLK = "1'b0" *) 
  (* C_NIB1_BS0_EN = "0" *) 
  (* C_NIB1_EN_CLK_TO_EXT_NORTH = "1'b0" *) 
  (* C_NIB1_EN_CLK_TO_EXT_SOUTH = "1'b0" *) 
  (* C_NIB1_EN_OTHER_NCLK = "1'b1" *) 
  (* C_NIB1_EN_OTHER_PCLK = "1'b1" *) 
  (* C_NIB2_BS0_EN = "0" *) 
  (* C_NIB2_EN_CLK_TO_EXT_NORTH = "1'b0" *) 
  (* C_NIB2_EN_CLK_TO_EXT_SOUTH = "1'b0" *) 
  (* C_NIB2_EN_OTHER_NCLK = "1'b0" *) 
  (* C_NIB2_EN_OTHER_PCLK = "1'b0" *) 
  (* C_NIB3_BS0_EN = "0" *) 
  (* C_NIB3_EN_CLK_TO_EXT_NORTH = "1'b0" *) 
  (* C_NIB3_EN_CLK_TO_EXT_SOUTH = "1'b0" *) 
  (* C_NIB3_EN_OTHER_NCLK = "1'b0" *) 
  (* C_NIB3_EN_OTHER_PCLK = "1'b0" *) 
  (* C_NIB4_BS0_EN = "0" *) 
  (* C_NIB4_EN_CLK_TO_EXT_NORTH = "1'b0" *) 
  (* C_NIB4_EN_CLK_TO_EXT_SOUTH = "1'b0" *) 
  (* C_NIB4_EN_OTHER_NCLK = "1'b0" *) 
  (* C_NIB4_EN_OTHER_PCLK = "1'b0" *) 
  (* C_NIB5_BS0_EN = "0" *) 
  (* C_NIB5_EN_CLK_TO_EXT_NORTH = "1'b0" *) 
  (* C_NIB5_EN_CLK_TO_EXT_SOUTH = "1'b0" *) 
  (* C_NIB5_EN_OTHER_NCLK = "1'b0" *) 
  (* C_NIB5_EN_OTHER_PCLK = "1'b0" *) 
  (* C_NIB6_BS0_EN = "0" *) 
  (* C_NIB6_EN_CLK_TO_EXT_NORTH = "1'b0" *) 
  (* C_NIB6_EN_CLK_TO_EXT_SOUTH = "1'b0" *) 
  (* C_NIB6_EN_OTHER_NCLK = "1'b0" *) 
  (* C_NIB6_EN_OTHER_PCLK = "1'b0" *) 
  (* C_NIB7_BS0_EN = "0" *) 
  (* C_NIB7_EN_CLK_TO_EXT_NORTH = "1'b0" *) 
  (* C_NIB7_EN_CLK_TO_EXT_SOUTH = "1'b0" *) 
  (* C_NIB7_EN_OTHER_NCLK = "1'b0" *) 
  (* C_NIB7_EN_OTHER_PCLK = "1'b0" *) 
  (* C_NIBBLE0_TRI = "0" *) 
  (* C_NIBBLE1_TRI = "0" *) 
  (* C_NIBBLE2_TRI = "0" *) 
  (* C_NIBBLE3_TRI = "0" *) 
  (* C_NIBBLE4_TRI = "0" *) 
  (* C_NIBBLE5_TRI = "0" *) 
  (* C_NIBBLE6_TRI = "0" *) 
  (* C_NIBBLE7_TRI = "0" *) 
  (* C_PIN_INFO = "0 {nibble 0 dir RX sig_type DIFF data_strb Strobe data_strb_org Strobe sig_name clk_rxp loc T3} 1 {nibble 0 dir RX sig_type DIFF data_strb Strobe data_strb_org Strobe sig_name clk_rxn loc T2} 2 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp0 loc P3} 3 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn0 loc R3} 4 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp1 loc U2} 5 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn1 loc U1} 6 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp2 loc R4} 7 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn2 loc T4} 8 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp3 loc R1} 9 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn3 loc T1}" *) 
  (* C_PLL0_CLK0_PHASE = "0.000000" *) 
  (* C_PLL0_CLK1_PHASE = "0.000000" *) 
  (* C_PLL0_CLKFBOUT_MULT = "15" *) 
  (* C_PLL0_CLKOUT1_DIVIDE = "1" *) 
  (* C_PLL0_CLKOUTPHY_MODE = "VCO" *) 
  (* C_PLL0_CLK_SOURCE = "BUFG_TO_PLL" *) 
  (* C_PLL0_DIVCLK_DIVIDE = "2" *) 
  (* C_PLL0_DIV_FACTOR = "1.000000" *) 
  (* C_PLL0_FIFO_WRITE_CLK_EN = "1" *) 
  (* C_PLL0_MMCM_CLKFBOUT_MULT_F = "7.875000" *) 
  (* C_PLL0_MMCM_CLKOUT0_DIVIDE_F = "7.875000" *) 
  (* C_PLL0_MMCM_DIVCLK_DIVIDE = "1" *) 
  (* C_PLL0_RX_EXTERNAL_CLK_TO_DATA = "3" *) 
  (* C_PLL1_CLK0_PHASE = "0.000000" *) 
  (* C_PLL1_CLK1_PHASE = "0.000000" *) 
  (* C_PLL1_CLKFBOUT_MULT = "15" *) 
  (* C_PLL1_CLKOUTPHY_MODE = "VCO" *) 
  (* C_PLL1_DIVCLK_DIVIDE = "2" *) 
  (* C_PLL1_DIV_FACTOR = "1.000000" *) 
  (* C_PLL_SHARING = "0" *) 
  (* C_PLL_VCOMIN = "750.000000" *) 
  (* C_REC_IN_FREQ = "93.750" *) 
  (* C_RX_BITSLICE0_EN = "8'b00000000" *) 
  (* C_RX_BITSLICE_EN = "52'b0000000000000000000000000000000000000000001111111111" *) 
  (* C_RX_DELAY_CASCADE = "0" *) 
  (* C_RX_DELAY_FORMAT = "TIME" *) 
  (* C_RX_DELAY_TYPE = "2'b00" *) 
  (* C_RX_DELAY_TYPE0 = "2'b00" *) 
  (* C_RX_DELAY_TYPE1 = "2'b00" *) 
  (* C_RX_DELAY_TYPE10 = "2'b00" *) 
  (* C_RX_DELAY_TYPE11 = "2'b00" *) 
  (* C_RX_DELAY_TYPE12 = "2'b00" *) 
  (* C_RX_DELAY_TYPE13 = "2'b00" *) 
  (* C_RX_DELAY_TYPE14 = "2'b00" *) 
  (* C_RX_DELAY_TYPE15 = "2'b00" *) 
  (* C_RX_DELAY_TYPE16 = "2'b00" *) 
  (* C_RX_DELAY_TYPE17 = "2'b00" *) 
  (* C_RX_DELAY_TYPE18 = "2'b00" *) 
  (* C_RX_DELAY_TYPE19 = "2'b00" *) 
  (* C_RX_DELAY_TYPE2 = "2'b00" *) 
  (* C_RX_DELAY_TYPE20 = "2'b00" *) 
  (* C_RX_DELAY_TYPE21 = "2'b00" *) 
  (* C_RX_DELAY_TYPE22 = "2'b00" *) 
  (* C_RX_DELAY_TYPE23 = "2'b00" *) 
  (* C_RX_DELAY_TYPE24 = "2'b00" *) 
  (* C_RX_DELAY_TYPE25 = "2'b00" *) 
  (* C_RX_DELAY_TYPE26 = "2'b00" *) 
  (* C_RX_DELAY_TYPE27 = "2'b00" *) 
  (* C_RX_DELAY_TYPE28 = "2'b00" *) 
  (* C_RX_DELAY_TYPE29 = "2'b00" *) 
  (* C_RX_DELAY_TYPE3 = "2'b00" *) 
  (* C_RX_DELAY_TYPE30 = "2'b00" *) 
  (* C_RX_DELAY_TYPE31 = "2'b00" *) 
  (* C_RX_DELAY_TYPE32 = "2'b00" *) 
  (* C_RX_DELAY_TYPE33 = "2'b00" *) 
  (* C_RX_DELAY_TYPE34 = "2'b00" *) 
  (* C_RX_DELAY_TYPE35 = "2'b00" *) 
  (* C_RX_DELAY_TYPE36 = "2'b00" *) 
  (* C_RX_DELAY_TYPE37 = "2'b00" *) 
  (* C_RX_DELAY_TYPE38 = "2'b00" *) 
  (* C_RX_DELAY_TYPE39 = "2'b00" *) 
  (* C_RX_DELAY_TYPE4 = "2'b00" *) 
  (* C_RX_DELAY_TYPE40 = "2'b00" *) 
  (* C_RX_DELAY_TYPE41 = "2'b00" *) 
  (* C_RX_DELAY_TYPE42 = "2'b00" *) 
  (* C_RX_DELAY_TYPE43 = "2'b00" *) 
  (* C_RX_DELAY_TYPE44 = "2'b00" *) 
  (* C_RX_DELAY_TYPE45 = "2'b00" *) 
  (* C_RX_DELAY_TYPE46 = "2'b00" *) 
  (* C_RX_DELAY_TYPE47 = "2'b00" *) 
  (* C_RX_DELAY_TYPE48 = "2'b00" *) 
  (* C_RX_DELAY_TYPE49 = "2'b00" *) 
  (* C_RX_DELAY_TYPE5 = "2'b00" *) 
  (* C_RX_DELAY_TYPE50 = "2'b00" *) 
  (* C_RX_DELAY_TYPE51 = "2'b00" *) 
  (* C_RX_DELAY_TYPE6 = "2'b00" *) 
  (* C_RX_DELAY_TYPE7 = "2'b00" *) 
  (* C_RX_DELAY_TYPE8 = "2'b00" *) 
  (* C_RX_DELAY_TYPE9 = "2'b00" *) 
  (* C_RX_DELAY_VALUE = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE0 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE1 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE10 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE11 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE12 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE13 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE14 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE15 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE16 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE17 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE18 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE19 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE2 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE20 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE21 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE22 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE23 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE24 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE25 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE26 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE27 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE28 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE29 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE3 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE30 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE31 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE32 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE33 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE34 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE35 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE36 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE37 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE38 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE39 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE4 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE40 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE41 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE42 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE43 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE44 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE45 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE46 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE47 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE48 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE49 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE5 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE50 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE51 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE6 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE7 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE8 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE9 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT0 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT1 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT10 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT11 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT12 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT13 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT14 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT15 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT16 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT17 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT18 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT19 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT2 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT20 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT21 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT22 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT23 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT24 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT25 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT26 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT27 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT28 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT29 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT3 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT30 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT31 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT32 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT33 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT34 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT35 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT36 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT37 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT38 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT39 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT4 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT40 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT41 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT42 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT43 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT44 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT45 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT46 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT47 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT48 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT49 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT5 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT50 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT51 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT6 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT7 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT8 = "12'b000000000000" *) 
  (* C_RX_DELAY_VALUE_EXT9 = "12'b000000000000" *) 
  (* C_RX_EQUALIZATION_D = "EQ_NONE" *) 
  (* C_RX_EQUALIZATION_S = "NONE" *) 
  (* C_RX_FIFO_SYNC_MODE = "FALSE" *) 
  (* C_RX_IS_CLK_EXT_INVERTED = "1'b0" *) 
  (* C_RX_IS_CLK_INVERTED = "1'b0" *) 
  (* C_RX_IS_RST_DLY_EXT_INVERTED = "1'b0" *) 
  (* C_RX_IS_RST_DLY_INVERTED = "1'b0" *) 
  (* C_RX_IS_RST_INVERTED = "1'b0" *) 
  (* C_RX_PIN_EN = "52'b0000000000000000000000000000000000000000000101010101" *) 
  (* C_RX_REFCLK_FREQ = "1500.000000" *) 
  (* C_RX_STROBE_EN = "16'b0000000000000011" *) 
  (* C_SERIALIZATION_FACTOR = "8" *) 
  (* C_SERIAL_MODE = "FALSE" *) 
  (* C_SIM_DEVICE = "ULTRASCALE_PLUS_ES1" *) 
  (* C_SIM_VERSION = "2.000000" *) 
  (* C_SINGLE_ENDED_IO_STD = "NONE" *) 
  (* C_SINGLE_ENDED_IO_TERMINATION = "NONE" *) 
  (* C_STRB_INFO = "9 99 9 9 9 9 9 9 9 9 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99" *) 
  (* C_TEMPLATE = "2" *) 
  (* C_TX_BITSLICE_EN = "52'b0000000000000000000000000000000000000000000000000000" *) 
  (* C_TX_DATA_PHASE = "0" *) 
  (* C_TX_DELAY_FORMAT = "TIME" *) 
  (* C_TX_DELAY_TYPE = "0" *) 
  (* C_TX_DELAY_TYPE0 = "2'b00" *) 
  (* C_TX_DELAY_TYPE1 = "2'b00" *) 
  (* C_TX_DELAY_TYPE10 = "2'b00" *) 
  (* C_TX_DELAY_TYPE11 = "2'b00" *) 
  (* C_TX_DELAY_TYPE12 = "2'b00" *) 
  (* C_TX_DELAY_TYPE13 = "2'b00" *) 
  (* C_TX_DELAY_TYPE14 = "2'b00" *) 
  (* C_TX_DELAY_TYPE15 = "2'b00" *) 
  (* C_TX_DELAY_TYPE16 = "2'b00" *) 
  (* C_TX_DELAY_TYPE17 = "2'b00" *) 
  (* C_TX_DELAY_TYPE18 = "2'b00" *) 
  (* C_TX_DELAY_TYPE19 = "2'b00" *) 
  (* C_TX_DELAY_TYPE2 = "2'b00" *) 
  (* C_TX_DELAY_TYPE20 = "2'b00" *) 
  (* C_TX_DELAY_TYPE21 = "2'b00" *) 
  (* C_TX_DELAY_TYPE22 = "2'b00" *) 
  (* C_TX_DELAY_TYPE23 = "2'b00" *) 
  (* C_TX_DELAY_TYPE24 = "2'b00" *) 
  (* C_TX_DELAY_TYPE25 = "2'b00" *) 
  (* C_TX_DELAY_TYPE26 = "2'b00" *) 
  (* C_TX_DELAY_TYPE27 = "2'b00" *) 
  (* C_TX_DELAY_TYPE28 = "2'b00" *) 
  (* C_TX_DELAY_TYPE29 = "2'b00" *) 
  (* C_TX_DELAY_TYPE3 = "2'b00" *) 
  (* C_TX_DELAY_TYPE30 = "2'b00" *) 
  (* C_TX_DELAY_TYPE31 = "2'b00" *) 
  (* C_TX_DELAY_TYPE32 = "2'b00" *) 
  (* C_TX_DELAY_TYPE33 = "2'b00" *) 
  (* C_TX_DELAY_TYPE34 = "2'b00" *) 
  (* C_TX_DELAY_TYPE35 = "2'b00" *) 
  (* C_TX_DELAY_TYPE36 = "2'b00" *) 
  (* C_TX_DELAY_TYPE37 = "2'b00" *) 
  (* C_TX_DELAY_TYPE38 = "2'b00" *) 
  (* C_TX_DELAY_TYPE39 = "2'b00" *) 
  (* C_TX_DELAY_TYPE4 = "2'b00" *) 
  (* C_TX_DELAY_TYPE40 = "2'b00" *) 
  (* C_TX_DELAY_TYPE41 = "2'b00" *) 
  (* C_TX_DELAY_TYPE42 = "2'b00" *) 
  (* C_TX_DELAY_TYPE43 = "2'b00" *) 
  (* C_TX_DELAY_TYPE44 = "2'b00" *) 
  (* C_TX_DELAY_TYPE45 = "2'b00" *) 
  (* C_TX_DELAY_TYPE46 = "2'b00" *) 
  (* C_TX_DELAY_TYPE47 = "2'b00" *) 
  (* C_TX_DELAY_TYPE48 = "2'b00" *) 
  (* C_TX_DELAY_TYPE49 = "2'b00" *) 
  (* C_TX_DELAY_TYPE5 = "2'b00" *) 
  (* C_TX_DELAY_TYPE50 = "2'b00" *) 
  (* C_TX_DELAY_TYPE51 = "2'b00" *) 
  (* C_TX_DELAY_TYPE6 = "2'b00" *) 
  (* C_TX_DELAY_TYPE7 = "2'b00" *) 
  (* C_TX_DELAY_TYPE8 = "2'b00" *) 
  (* C_TX_DELAY_TYPE9 = "2'b00" *) 
  (* C_TX_DELAY_VALUE = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE0 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE1 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE10 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE11 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE12 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE13 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE14 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE15 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE16 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE17 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE18 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE19 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE2 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE20 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE21 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE22 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE23 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE24 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE25 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE26 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE27 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE28 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE29 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE3 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE30 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE31 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE32 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE33 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE34 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE35 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE36 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE37 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE38 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE39 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE4 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE40 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE41 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE42 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE43 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE44 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE45 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE46 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE47 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE48 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE49 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE5 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE50 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE51 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE6 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE7 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE8 = "12'b000000000000" *) 
  (* C_TX_DELAY_VALUE9 = "12'b000000000000" *) 
  (* C_TX_DRIVE_D = "NONE" *) 
  (* C_TX_DRIVE_S = "NONE" *) 
  (* C_TX_IS_CLK_INVERTED = "1'b0" *) 
  (* C_TX_IS_RST_DLY_INVERTED = "1'b0" *) 
  (* C_TX_IS_RST_INVERTED = "1'b0" *) 
  (* C_TX_NATIVE_ODELAY_BYPASS = "FALSE" *) 
  (* C_TX_PRE_EMPHASIS_D = "NONE" *) 
  (* C_TX_PRE_EMPHASIS_S = "NONE" *) 
  (* C_TX_REFCLK_FREQ = "1500.000000" *) 
  (* C_TX_SLEW_D = "NONE" *) 
  (* C_TX_SLEW_S = "NONE" *) 
  (* C_TX_TRI_DELAY_FORMAT = "TIME" *) 
  (* C_TX_TRI_INIT = "1'b1" *) 
  (* C_TX_TRI_IS_CLK_INVERTED = "1'b0" *) 
  (* C_TX_TRI_IS_RST_DLY_INVERTED = "1'b0" *) 
  (* C_TX_TRI_IS_RST_INVERTED = "1'b0" *) 
  (* C_TX_TRI_NATIVE_ODELAY_BYPASS = "FALSE" *) 
  (* C_TX_TRI_OUTPUT_PHASE_90 = "FALSE" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* TX_BITSLICE_TRI_EN = "8'b00000000" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_hssio_rx_high_speed_selectio_wiz_v3_6_10 inst
       (.app_clk(1'b0),
        .bg0_pin0_nc(1'b0),
        .bg0_pin6_nc(1'b0),
        .bg1_pin0_nc(1'b0),
        .bg1_pin6_nc(1'b0),
        .bg2_pin0_nc(1'b0),
        .bg2_pin6_nc(1'b0),
        .bg3_pin0_nc(1'b0),
        .bg3_pin6_nc(1'b0),
        .bidir_rx_clk(1'b0),
        .bidir_tx_bs_tri_ce0(1'b0),
        .bidir_tx_bs_tri_ce1(1'b0),
        .bidir_tx_bs_tri_ce2(1'b0),
        .bidir_tx_bs_tri_ce3(1'b0),
        .bidir_tx_bs_tri_ce4(1'b0),
        .bidir_tx_bs_tri_ce5(1'b0),
        .bidir_tx_bs_tri_ce6(1'b0),
        .bidir_tx_bs_tri_ce7(1'b0),
        .bidir_tx_bs_tri_clk(1'b0),
        .bidir_tx_bs_tri_cntvaluein0({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .bidir_tx_bs_tri_cntvaluein1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .bidir_tx_bs_tri_cntvaluein2({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .bidir_tx_bs_tri_cntvaluein3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .bidir_tx_bs_tri_cntvaluein4({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .bidir_tx_bs_tri_cntvaluein5({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .bidir_tx_bs_tri_cntvaluein6({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .bidir_tx_bs_tri_cntvaluein7({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .bidir_tx_bs_tri_cntvalueout0(NLW_inst_bidir_tx_bs_tri_cntvalueout0_UNCONNECTED[8:0]),
        .bidir_tx_bs_tri_cntvalueout1(NLW_inst_bidir_tx_bs_tri_cntvalueout1_UNCONNECTED[8:0]),
        .bidir_tx_bs_tri_cntvalueout2(NLW_inst_bidir_tx_bs_tri_cntvalueout2_UNCONNECTED[8:0]),
        .bidir_tx_bs_tri_cntvalueout3(NLW_inst_bidir_tx_bs_tri_cntvalueout3_UNCONNECTED[8:0]),
        .bidir_tx_bs_tri_cntvalueout4(NLW_inst_bidir_tx_bs_tri_cntvalueout4_UNCONNECTED[8:0]),
        .bidir_tx_bs_tri_cntvalueout5(NLW_inst_bidir_tx_bs_tri_cntvalueout5_UNCONNECTED[8:0]),
        .bidir_tx_bs_tri_cntvalueout6(NLW_inst_bidir_tx_bs_tri_cntvalueout6_UNCONNECTED[8:0]),
        .bidir_tx_bs_tri_cntvalueout7(NLW_inst_bidir_tx_bs_tri_cntvalueout7_UNCONNECTED[8:0]),
        .bidir_tx_bs_tri_en_vtc0(1'b0),
        .bidir_tx_bs_tri_en_vtc1(1'b0),
        .bidir_tx_bs_tri_en_vtc2(1'b0),
        .bidir_tx_bs_tri_en_vtc3(1'b0),
        .bidir_tx_bs_tri_en_vtc4(1'b0),
        .bidir_tx_bs_tri_en_vtc5(1'b0),
        .bidir_tx_bs_tri_en_vtc6(1'b0),
        .bidir_tx_bs_tri_en_vtc7(1'b0),
        .bidir_tx_bs_tri_inc0(1'b0),
        .bidir_tx_bs_tri_inc1(1'b0),
        .bidir_tx_bs_tri_inc2(1'b0),
        .bidir_tx_bs_tri_inc3(1'b0),
        .bidir_tx_bs_tri_inc4(1'b0),
        .bidir_tx_bs_tri_inc5(1'b0),
        .bidir_tx_bs_tri_inc6(1'b0),
        .bidir_tx_bs_tri_inc7(1'b0),
        .bidir_tx_bs_tri_load0(1'b0),
        .bidir_tx_bs_tri_load1(1'b0),
        .bidir_tx_bs_tri_load2(1'b0),
        .bidir_tx_bs_tri_load3(1'b0),
        .bidir_tx_bs_tri_load4(1'b0),
        .bidir_tx_bs_tri_load5(1'b0),
        .bidir_tx_bs_tri_load6(1'b0),
        .bidir_tx_bs_tri_load7(1'b0),
        .bidir_tx_clk(1'b0),
        .bitslip_error_0(NLW_inst_bitslip_error_0_UNCONNECTED),
        .bitslip_error_1(NLW_inst_bitslip_error_1_UNCONNECTED),
        .bitslip_error_10(NLW_inst_bitslip_error_10_UNCONNECTED),
        .bitslip_error_11(NLW_inst_bitslip_error_11_UNCONNECTED),
        .bitslip_error_12(NLW_inst_bitslip_error_12_UNCONNECTED),
        .bitslip_error_13(NLW_inst_bitslip_error_13_UNCONNECTED),
        .bitslip_error_14(NLW_inst_bitslip_error_14_UNCONNECTED),
        .bitslip_error_15(NLW_inst_bitslip_error_15_UNCONNECTED),
        .bitslip_error_16(NLW_inst_bitslip_error_16_UNCONNECTED),
        .bitslip_error_17(NLW_inst_bitslip_error_17_UNCONNECTED),
        .bitslip_error_18(NLW_inst_bitslip_error_18_UNCONNECTED),
        .bitslip_error_19(NLW_inst_bitslip_error_19_UNCONNECTED),
        .bitslip_error_2(NLW_inst_bitslip_error_2_UNCONNECTED),
        .bitslip_error_20(NLW_inst_bitslip_error_20_UNCONNECTED),
        .bitslip_error_21(NLW_inst_bitslip_error_21_UNCONNECTED),
        .bitslip_error_22(NLW_inst_bitslip_error_22_UNCONNECTED),
        .bitslip_error_23(NLW_inst_bitslip_error_23_UNCONNECTED),
        .bitslip_error_24(NLW_inst_bitslip_error_24_UNCONNECTED),
        .bitslip_error_25(NLW_inst_bitslip_error_25_UNCONNECTED),
        .bitslip_error_26(NLW_inst_bitslip_error_26_UNCONNECTED),
        .bitslip_error_27(NLW_inst_bitslip_error_27_UNCONNECTED),
        .bitslip_error_28(NLW_inst_bitslip_error_28_UNCONNECTED),
        .bitslip_error_29(NLW_inst_bitslip_error_29_UNCONNECTED),
        .bitslip_error_3(NLW_inst_bitslip_error_3_UNCONNECTED),
        .bitslip_error_30(NLW_inst_bitslip_error_30_UNCONNECTED),
        .bitslip_error_31(NLW_inst_bitslip_error_31_UNCONNECTED),
        .bitslip_error_32(NLW_inst_bitslip_error_32_UNCONNECTED),
        .bitslip_error_33(NLW_inst_bitslip_error_33_UNCONNECTED),
        .bitslip_error_34(NLW_inst_bitslip_error_34_UNCONNECTED),
        .bitslip_error_35(NLW_inst_bitslip_error_35_UNCONNECTED),
        .bitslip_error_36(NLW_inst_bitslip_error_36_UNCONNECTED),
        .bitslip_error_37(NLW_inst_bitslip_error_37_UNCONNECTED),
        .bitslip_error_38(NLW_inst_bitslip_error_38_UNCONNECTED),
        .bitslip_error_39(NLW_inst_bitslip_error_39_UNCONNECTED),
        .bitslip_error_4(NLW_inst_bitslip_error_4_UNCONNECTED),
        .bitslip_error_40(NLW_inst_bitslip_error_40_UNCONNECTED),
        .bitslip_error_41(NLW_inst_bitslip_error_41_UNCONNECTED),
        .bitslip_error_42(NLW_inst_bitslip_error_42_UNCONNECTED),
        .bitslip_error_43(NLW_inst_bitslip_error_43_UNCONNECTED),
        .bitslip_error_44(NLW_inst_bitslip_error_44_UNCONNECTED),
        .bitslip_error_45(NLW_inst_bitslip_error_45_UNCONNECTED),
        .bitslip_error_46(NLW_inst_bitslip_error_46_UNCONNECTED),
        .bitslip_error_47(NLW_inst_bitslip_error_47_UNCONNECTED),
        .bitslip_error_48(NLW_inst_bitslip_error_48_UNCONNECTED),
        .bitslip_error_49(NLW_inst_bitslip_error_49_UNCONNECTED),
        .bitslip_error_5(NLW_inst_bitslip_error_5_UNCONNECTED),
        .bitslip_error_50(NLW_inst_bitslip_error_50_UNCONNECTED),
        .bitslip_error_51(NLW_inst_bitslip_error_51_UNCONNECTED),
        .bitslip_error_6(NLW_inst_bitslip_error_6_UNCONNECTED),
        .bitslip_error_7(NLW_inst_bitslip_error_7_UNCONNECTED),
        .bitslip_error_8(NLW_inst_bitslip_error_8_UNCONNECTED),
        .bitslip_error_9(NLW_inst_bitslip_error_9_UNCONNECTED),
        .bs_rst_dphy_in(bs_rst_dphy_in),
        .clk(1'b0),
        .clk_from_ibuf(NLW_inst_clk_from_ibuf_UNCONNECTED),
        .clk_n(1'b0),
        .clk_p(1'b0),
        .clk_rxn(clk_rxn),
        .clk_rxp(clk_rxp),
        .daddr({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .data_rxn0(data_rxn0),
        .data_rxn1(data_rxn1),
        .data_rxn2(data_rxn2),
        .data_rxn3(data_rxn3),
        .data_rxp0(data_rxp0),
        .data_rxp1(data_rxp1),
        .data_rxp2(data_rxp2),
        .data_rxp3(data_rxp3),
        .data_to_fabric_clk_rxn(NLW_inst_data_to_fabric_clk_rxn_UNCONNECTED[7:0]),
        .data_to_fabric_clk_rxp(NLW_inst_data_to_fabric_clk_rxp_UNCONNECTED[7:0]),
        .data_to_fabric_data_rxn0(NLW_inst_data_to_fabric_data_rxn0_UNCONNECTED[7:0]),
        .data_to_fabric_data_rxn1(NLW_inst_data_to_fabric_data_rxn1_UNCONNECTED[7:0]),
        .data_to_fabric_data_rxn2(NLW_inst_data_to_fabric_data_rxn2_UNCONNECTED[7:0]),
        .data_to_fabric_data_rxn3(NLW_inst_data_to_fabric_data_rxn3_UNCONNECTED[7:0]),
        .data_to_fabric_data_rxp0(data_to_fabric_data_rxp0),
        .data_to_fabric_data_rxp1(data_to_fabric_data_rxp1),
        .data_to_fabric_data_rxp2(data_to_fabric_data_rxp2),
        .data_to_fabric_data_rxp3(data_to_fabric_data_rxp3),
        .dclk(1'b0),
        .den(1'b0),
        .di({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .dly_rdy_bsc0(NLW_inst_dly_rdy_bsc0_UNCONNECTED),
        .dly_rdy_bsc1(NLW_inst_dly_rdy_bsc1_UNCONNECTED),
        .dly_rdy_bsc2(NLW_inst_dly_rdy_bsc2_UNCONNECTED),
        .dly_rdy_bsc3(NLW_inst_dly_rdy_bsc3_UNCONNECTED),
        .dly_rdy_bsc4(NLW_inst_dly_rdy_bsc4_UNCONNECTED),
        .dly_rdy_bsc5(NLW_inst_dly_rdy_bsc5_UNCONNECTED),
        .dly_rdy_bsc6(NLW_inst_dly_rdy_bsc6_UNCONNECTED),
        .dly_rdy_bsc7(NLW_inst_dly_rdy_bsc7_UNCONNECTED),
        .do_out(NLW_inst_do_out_UNCONNECTED[15:0]),
        .drdy(NLW_inst_drdy_UNCONNECTED),
        .dwe(1'b0),
        .en_vtc_bsc0(1'b1),
        .en_vtc_bsc1(1'b1),
        .en_vtc_bsc2(1'b0),
        .en_vtc_bsc3(1'b0),
        .en_vtc_bsc4(1'b0),
        .en_vtc_bsc5(1'b0),
        .en_vtc_bsc6(1'b0),
        .en_vtc_bsc7(1'b0),
        .fifo_empty_0(NLW_inst_fifo_empty_0_UNCONNECTED),
        .fifo_empty_1(NLW_inst_fifo_empty_1_UNCONNECTED),
        .fifo_empty_10(NLW_inst_fifo_empty_10_UNCONNECTED),
        .fifo_empty_11(NLW_inst_fifo_empty_11_UNCONNECTED),
        .fifo_empty_12(NLW_inst_fifo_empty_12_UNCONNECTED),
        .fifo_empty_13(NLW_inst_fifo_empty_13_UNCONNECTED),
        .fifo_empty_14(NLW_inst_fifo_empty_14_UNCONNECTED),
        .fifo_empty_15(NLW_inst_fifo_empty_15_UNCONNECTED),
        .fifo_empty_16(NLW_inst_fifo_empty_16_UNCONNECTED),
        .fifo_empty_17(NLW_inst_fifo_empty_17_UNCONNECTED),
        .fifo_empty_18(NLW_inst_fifo_empty_18_UNCONNECTED),
        .fifo_empty_19(NLW_inst_fifo_empty_19_UNCONNECTED),
        .fifo_empty_2(fifo_empty_2),
        .fifo_empty_20(NLW_inst_fifo_empty_20_UNCONNECTED),
        .fifo_empty_21(NLW_inst_fifo_empty_21_UNCONNECTED),
        .fifo_empty_22(NLW_inst_fifo_empty_22_UNCONNECTED),
        .fifo_empty_23(NLW_inst_fifo_empty_23_UNCONNECTED),
        .fifo_empty_24(NLW_inst_fifo_empty_24_UNCONNECTED),
        .fifo_empty_25(NLW_inst_fifo_empty_25_UNCONNECTED),
        .fifo_empty_26(NLW_inst_fifo_empty_26_UNCONNECTED),
        .fifo_empty_27(NLW_inst_fifo_empty_27_UNCONNECTED),
        .fifo_empty_28(NLW_inst_fifo_empty_28_UNCONNECTED),
        .fifo_empty_29(NLW_inst_fifo_empty_29_UNCONNECTED),
        .fifo_empty_3(NLW_inst_fifo_empty_3_UNCONNECTED),
        .fifo_empty_30(NLW_inst_fifo_empty_30_UNCONNECTED),
        .fifo_empty_31(NLW_inst_fifo_empty_31_UNCONNECTED),
        .fifo_empty_32(NLW_inst_fifo_empty_32_UNCONNECTED),
        .fifo_empty_33(NLW_inst_fifo_empty_33_UNCONNECTED),
        .fifo_empty_34(NLW_inst_fifo_empty_34_UNCONNECTED),
        .fifo_empty_35(NLW_inst_fifo_empty_35_UNCONNECTED),
        .fifo_empty_36(NLW_inst_fifo_empty_36_UNCONNECTED),
        .fifo_empty_37(NLW_inst_fifo_empty_37_UNCONNECTED),
        .fifo_empty_38(NLW_inst_fifo_empty_38_UNCONNECTED),
        .fifo_empty_39(NLW_inst_fifo_empty_39_UNCONNECTED),
        .fifo_empty_4(fifo_empty_4),
        .fifo_empty_40(NLW_inst_fifo_empty_40_UNCONNECTED),
        .fifo_empty_41(NLW_inst_fifo_empty_41_UNCONNECTED),
        .fifo_empty_42(NLW_inst_fifo_empty_42_UNCONNECTED),
        .fifo_empty_43(NLW_inst_fifo_empty_43_UNCONNECTED),
        .fifo_empty_44(NLW_inst_fifo_empty_44_UNCONNECTED),
        .fifo_empty_45(NLW_inst_fifo_empty_45_UNCONNECTED),
        .fifo_empty_46(NLW_inst_fifo_empty_46_UNCONNECTED),
        .fifo_empty_47(NLW_inst_fifo_empty_47_UNCONNECTED),
        .fifo_empty_48(NLW_inst_fifo_empty_48_UNCONNECTED),
        .fifo_empty_49(NLW_inst_fifo_empty_49_UNCONNECTED),
        .fifo_empty_5(NLW_inst_fifo_empty_5_UNCONNECTED),
        .fifo_empty_50(NLW_inst_fifo_empty_50_UNCONNECTED),
        .fifo_empty_51(NLW_inst_fifo_empty_51_UNCONNECTED),
        .fifo_empty_6(fifo_empty_6),
        .fifo_empty_7(NLW_inst_fifo_empty_7_UNCONNECTED),
        .fifo_empty_8(fifo_empty_8),
        .fifo_empty_9(NLW_inst_fifo_empty_9_UNCONNECTED),
        .fifo_rd_clk_0(fifo_rd_clk_0),
        .fifo_rd_clk_1(1'b0),
        .fifo_rd_clk_10(1'b0),
        .fifo_rd_clk_11(1'b0),
        .fifo_rd_clk_12(1'b0),
        .fifo_rd_clk_13(1'b0),
        .fifo_rd_clk_14(1'b0),
        .fifo_rd_clk_15(1'b0),
        .fifo_rd_clk_16(1'b0),
        .fifo_rd_clk_17(1'b0),
        .fifo_rd_clk_18(1'b0),
        .fifo_rd_clk_19(1'b0),
        .fifo_rd_clk_2(1'b0),
        .fifo_rd_clk_20(1'b0),
        .fifo_rd_clk_21(1'b0),
        .fifo_rd_clk_22(1'b0),
        .fifo_rd_clk_23(1'b0),
        .fifo_rd_clk_24(1'b0),
        .fifo_rd_clk_25(1'b0),
        .fifo_rd_clk_26(1'b0),
        .fifo_rd_clk_27(1'b0),
        .fifo_rd_clk_28(1'b0),
        .fifo_rd_clk_29(1'b0),
        .fifo_rd_clk_3(1'b0),
        .fifo_rd_clk_30(1'b0),
        .fifo_rd_clk_31(1'b0),
        .fifo_rd_clk_32(1'b0),
        .fifo_rd_clk_33(1'b0),
        .fifo_rd_clk_34(1'b0),
        .fifo_rd_clk_35(1'b0),
        .fifo_rd_clk_36(1'b0),
        .fifo_rd_clk_37(1'b0),
        .fifo_rd_clk_38(1'b0),
        .fifo_rd_clk_39(1'b0),
        .fifo_rd_clk_4(1'b0),
        .fifo_rd_clk_40(1'b0),
        .fifo_rd_clk_41(1'b0),
        .fifo_rd_clk_42(1'b0),
        .fifo_rd_clk_43(1'b0),
        .fifo_rd_clk_44(1'b0),
        .fifo_rd_clk_45(1'b0),
        .fifo_rd_clk_46(1'b0),
        .fifo_rd_clk_47(1'b0),
        .fifo_rd_clk_48(1'b0),
        .fifo_rd_clk_49(1'b0),
        .fifo_rd_clk_5(1'b0),
        .fifo_rd_clk_50(1'b0),
        .fifo_rd_clk_51(1'b0),
        .fifo_rd_clk_6(1'b0),
        .fifo_rd_clk_7(1'b0),
        .fifo_rd_clk_8(1'b0),
        .fifo_rd_clk_9(1'b0),
        .fifo_rd_data_valid(NLW_inst_fifo_rd_data_valid_UNCONNECTED),
        .fifo_rd_en_0(1'b1),
        .fifo_rd_en_1(1'b0),
        .fifo_rd_en_10(1'b0),
        .fifo_rd_en_11(1'b0),
        .fifo_rd_en_12(1'b0),
        .fifo_rd_en_13(1'b0),
        .fifo_rd_en_14(1'b0),
        .fifo_rd_en_15(1'b0),
        .fifo_rd_en_16(1'b0),
        .fifo_rd_en_17(1'b0),
        .fifo_rd_en_18(1'b0),
        .fifo_rd_en_19(1'b0),
        .fifo_rd_en_2(fifo_rd_en_2),
        .fifo_rd_en_20(1'b0),
        .fifo_rd_en_21(1'b0),
        .fifo_rd_en_22(1'b0),
        .fifo_rd_en_23(1'b0),
        .fifo_rd_en_24(1'b0),
        .fifo_rd_en_25(1'b0),
        .fifo_rd_en_26(1'b0),
        .fifo_rd_en_27(1'b0),
        .fifo_rd_en_28(1'b0),
        .fifo_rd_en_29(1'b0),
        .fifo_rd_en_3(1'b0),
        .fifo_rd_en_30(1'b0),
        .fifo_rd_en_31(1'b0),
        .fifo_rd_en_32(1'b0),
        .fifo_rd_en_33(1'b0),
        .fifo_rd_en_34(1'b0),
        .fifo_rd_en_35(1'b0),
        .fifo_rd_en_36(1'b0),
        .fifo_rd_en_37(1'b0),
        .fifo_rd_en_38(1'b0),
        .fifo_rd_en_39(1'b0),
        .fifo_rd_en_4(fifo_rd_en_4),
        .fifo_rd_en_40(1'b0),
        .fifo_rd_en_41(1'b0),
        .fifo_rd_en_42(1'b0),
        .fifo_rd_en_43(1'b0),
        .fifo_rd_en_44(1'b0),
        .fifo_rd_en_45(1'b0),
        .fifo_rd_en_46(1'b0),
        .fifo_rd_en_47(1'b0),
        .fifo_rd_en_48(1'b0),
        .fifo_rd_en_49(1'b0),
        .fifo_rd_en_5(1'b0),
        .fifo_rd_en_50(1'b0),
        .fifo_rd_en_51(1'b0),
        .fifo_rd_en_6(fifo_rd_en_6),
        .fifo_rd_en_7(1'b0),
        .fifo_rd_en_8(fifo_rd_en_8),
        .fifo_rd_en_9(1'b0),
        .fifo_wr_clk_0(fifo_wr_clk_0),
        .fifo_wr_clk_13(NLW_inst_fifo_wr_clk_13_UNCONNECTED),
        .fifo_wr_clk_19(NLW_inst_fifo_wr_clk_19_UNCONNECTED),
        .fifo_wr_clk_26(NLW_inst_fifo_wr_clk_26_UNCONNECTED),
        .fifo_wr_clk_32(NLW_inst_fifo_wr_clk_32_UNCONNECTED),
        .fifo_wr_clk_39(NLW_inst_fifo_wr_clk_39_UNCONNECTED),
        .fifo_wr_clk_45(NLW_inst_fifo_wr_clk_45_UNCONNECTED),
        .fifo_wr_clk_6(NLW_inst_fifo_wr_clk_6_UNCONNECTED),
        .hs_rx_disable(hs_rx_disable),
        .intf_rdy(NLW_inst_intf_rdy_UNCONNECTED),
        .lp_rx_disable({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .lp_rx_o_n(lp_rx_o_n),
        .lp_rx_o_p(lp_rx_o_p),
        .lptx_i_n({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .lptx_i_p({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .lptx_t({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .multi_intf_lock_in(1'b0),
        .phy_rden_bsc0({1'b0,1'b0,1'b0,1'b0}),
        .phy_rden_bsc1({1'b0,1'b0,1'b0,1'b0}),
        .phy_rden_bsc2({1'b0,1'b0,1'b0,1'b0}),
        .phy_rden_bsc3({1'b0,1'b0,1'b0,1'b0}),
        .phy_rden_bsc4({1'b0,1'b0,1'b0,1'b0}),
        .phy_rden_bsc5({1'b0,1'b0,1'b0,1'b0}),
        .phy_rden_bsc6({1'b0,1'b0,1'b0,1'b0}),
        .phy_rden_bsc7({1'b0,1'b0,1'b0,1'b0}),
        .pll0_clkout0(NLW_inst_pll0_clkout0_UNCONNECTED),
        .pll0_clkout1(NLW_inst_pll0_clkout1_UNCONNECTED),
        .pll0_locked(NLW_inst_pll0_locked_UNCONNECTED),
        .pll1_clkout0(NLW_inst_pll1_clkout0_UNCONNECTED),
        .pll1_locked(NLW_inst_pll1_locked_UNCONNECTED),
        .riu_addr_bg0({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_addr_bg0_bs0({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_addr_bg0_bs1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_addr_bg1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_addr_bg1_bs2({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_addr_bg1_bs3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_addr_bg2({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_addr_bg2_bs4({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_addr_bg2_bs5({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_addr_bg3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_addr_bg3_bs6({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_addr_bg3_bs7({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_clk(riu_clk),
        .riu_nibble_sel_bg0({1'b0,1'b0}),
        .riu_nibble_sel_bg0_bs0(1'b0),
        .riu_nibble_sel_bg0_bs1(1'b0),
        .riu_nibble_sel_bg1({1'b0,1'b0}),
        .riu_nibble_sel_bg1_bs2(1'b0),
        .riu_nibble_sel_bg1_bs3(1'b0),
        .riu_nibble_sel_bg2({1'b0,1'b0}),
        .riu_nibble_sel_bg2_bs4(1'b0),
        .riu_nibble_sel_bg2_bs5(1'b0),
        .riu_nibble_sel_bg3({1'b0,1'b0}),
        .riu_nibble_sel_bg3_bs6(1'b0),
        .riu_nibble_sel_bg3_bs7(1'b0),
        .riu_rd_data_bg0(NLW_inst_riu_rd_data_bg0_UNCONNECTED[15:0]),
        .riu_rd_data_bg0_bs0(NLW_inst_riu_rd_data_bg0_bs0_UNCONNECTED[15:0]),
        .riu_rd_data_bg0_bs1(NLW_inst_riu_rd_data_bg0_bs1_UNCONNECTED[15:0]),
        .riu_rd_data_bg1(NLW_inst_riu_rd_data_bg1_UNCONNECTED[15:0]),
        .riu_rd_data_bg1_bs2(NLW_inst_riu_rd_data_bg1_bs2_UNCONNECTED[15:0]),
        .riu_rd_data_bg1_bs3(NLW_inst_riu_rd_data_bg1_bs3_UNCONNECTED[15:0]),
        .riu_rd_data_bg2(NLW_inst_riu_rd_data_bg2_UNCONNECTED[15:0]),
        .riu_rd_data_bg2_bs4(NLW_inst_riu_rd_data_bg2_bs4_UNCONNECTED[15:0]),
        .riu_rd_data_bg2_bs5(NLW_inst_riu_rd_data_bg2_bs5_UNCONNECTED[15:0]),
        .riu_rd_data_bg3(NLW_inst_riu_rd_data_bg3_UNCONNECTED[15:0]),
        .riu_rd_data_bg3_bs6(NLW_inst_riu_rd_data_bg3_bs6_UNCONNECTED[15:0]),
        .riu_rd_data_bg3_bs7(NLW_inst_riu_rd_data_bg3_bs7_UNCONNECTED[15:0]),
        .riu_valid_bg0(NLW_inst_riu_valid_bg0_UNCONNECTED),
        .riu_valid_bg0_bs0(NLW_inst_riu_valid_bg0_bs0_UNCONNECTED),
        .riu_valid_bg0_bs1(NLW_inst_riu_valid_bg0_bs1_UNCONNECTED),
        .riu_valid_bg1(NLW_inst_riu_valid_bg1_UNCONNECTED),
        .riu_valid_bg1_bs2(NLW_inst_riu_valid_bg1_bs2_UNCONNECTED),
        .riu_valid_bg1_bs3(NLW_inst_riu_valid_bg1_bs3_UNCONNECTED),
        .riu_valid_bg2(NLW_inst_riu_valid_bg2_UNCONNECTED),
        .riu_valid_bg2_bs4(NLW_inst_riu_valid_bg2_bs4_UNCONNECTED),
        .riu_valid_bg2_bs5(NLW_inst_riu_valid_bg2_bs5_UNCONNECTED),
        .riu_valid_bg3(NLW_inst_riu_valid_bg3_UNCONNECTED),
        .riu_valid_bg3_bs6(NLW_inst_riu_valid_bg3_bs6_UNCONNECTED),
        .riu_valid_bg3_bs7(NLW_inst_riu_valid_bg3_bs7_UNCONNECTED),
        .riu_wr_data_bg0({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_data_bg0_bs0({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_data_bg0_bs1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_data_bg1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_data_bg1_bs2({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_data_bg1_bs3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_data_bg2({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_data_bg2_bs4({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_data_bg2_bs5({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_data_bg3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_data_bg3_bs6({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_data_bg3_bs7({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_wr_en_bg0(1'b0),
        .riu_wr_en_bg0_bs0(1'b0),
        .riu_wr_en_bg0_bs1(1'b0),
        .riu_wr_en_bg1(1'b0),
        .riu_wr_en_bg1_bs2(1'b0),
        .riu_wr_en_bg1_bs3(1'b0),
        .riu_wr_en_bg2(1'b0),
        .riu_wr_en_bg2_bs4(1'b0),
        .riu_wr_en_bg2_bs5(1'b0),
        .riu_wr_en_bg3(1'b0),
        .riu_wr_en_bg3_bs6(1'b0),
        .riu_wr_en_bg3_bs7(1'b0),
        .rst(rst),
        .rst_seq_done(rst_seq_done),
        .rx_bitslip_sync_done(NLW_inst_rx_bitslip_sync_done_UNCONNECTED),
        .rx_ce_0(1'b0),
        .rx_ce_1(1'b0),
        .rx_ce_10(1'b0),
        .rx_ce_11(1'b0),
        .rx_ce_12(1'b0),
        .rx_ce_13(1'b0),
        .rx_ce_14(1'b0),
        .rx_ce_15(1'b0),
        .rx_ce_16(1'b0),
        .rx_ce_17(1'b0),
        .rx_ce_18(1'b0),
        .rx_ce_19(1'b0),
        .rx_ce_2(1'b0),
        .rx_ce_20(1'b0),
        .rx_ce_21(1'b0),
        .rx_ce_22(1'b0),
        .rx_ce_23(1'b0),
        .rx_ce_24(1'b0),
        .rx_ce_25(1'b0),
        .rx_ce_26(1'b0),
        .rx_ce_27(1'b0),
        .rx_ce_28(1'b0),
        .rx_ce_29(1'b0),
        .rx_ce_3(1'b0),
        .rx_ce_30(1'b0),
        .rx_ce_31(1'b0),
        .rx_ce_32(1'b0),
        .rx_ce_33(1'b0),
        .rx_ce_34(1'b0),
        .rx_ce_35(1'b0),
        .rx_ce_36(1'b0),
        .rx_ce_37(1'b0),
        .rx_ce_38(1'b0),
        .rx_ce_39(1'b0),
        .rx_ce_4(1'b0),
        .rx_ce_40(1'b0),
        .rx_ce_41(1'b0),
        .rx_ce_42(1'b0),
        .rx_ce_43(1'b0),
        .rx_ce_44(1'b0),
        .rx_ce_45(1'b0),
        .rx_ce_46(1'b0),
        .rx_ce_47(1'b0),
        .rx_ce_48(1'b0),
        .rx_ce_49(1'b0),
        .rx_ce_5(1'b0),
        .rx_ce_50(1'b0),
        .rx_ce_51(1'b0),
        .rx_ce_6(1'b0),
        .rx_ce_7(1'b0),
        .rx_ce_8(1'b0),
        .rx_ce_9(1'b0),
        .rx_ce_ext_0(1'b0),
        .rx_ce_ext_1(1'b0),
        .rx_ce_ext_10(1'b0),
        .rx_ce_ext_11(1'b0),
        .rx_ce_ext_12(1'b0),
        .rx_ce_ext_13(1'b0),
        .rx_ce_ext_14(1'b0),
        .rx_ce_ext_15(1'b0),
        .rx_ce_ext_16(1'b0),
        .rx_ce_ext_17(1'b0),
        .rx_ce_ext_18(1'b0),
        .rx_ce_ext_19(1'b0),
        .rx_ce_ext_2(1'b0),
        .rx_ce_ext_20(1'b0),
        .rx_ce_ext_21(1'b0),
        .rx_ce_ext_22(1'b0),
        .rx_ce_ext_23(1'b0),
        .rx_ce_ext_24(1'b0),
        .rx_ce_ext_25(1'b0),
        .rx_ce_ext_26(1'b0),
        .rx_ce_ext_27(1'b0),
        .rx_ce_ext_28(1'b0),
        .rx_ce_ext_29(1'b0),
        .rx_ce_ext_3(1'b0),
        .rx_ce_ext_30(1'b0),
        .rx_ce_ext_31(1'b0),
        .rx_ce_ext_32(1'b0),
        .rx_ce_ext_33(1'b0),
        .rx_ce_ext_34(1'b0),
        .rx_ce_ext_35(1'b0),
        .rx_ce_ext_36(1'b0),
        .rx_ce_ext_37(1'b0),
        .rx_ce_ext_38(1'b0),
        .rx_ce_ext_39(1'b0),
        .rx_ce_ext_4(1'b0),
        .rx_ce_ext_40(1'b0),
        .rx_ce_ext_41(1'b0),
        .rx_ce_ext_42(1'b0),
        .rx_ce_ext_43(1'b0),
        .rx_ce_ext_44(1'b0),
        .rx_ce_ext_45(1'b0),
        .rx_ce_ext_46(1'b0),
        .rx_ce_ext_47(1'b0),
        .rx_ce_ext_48(1'b0),
        .rx_ce_ext_49(1'b0),
        .rx_ce_ext_5(1'b0),
        .rx_ce_ext_50(1'b0),
        .rx_ce_ext_51(1'b0),
        .rx_ce_ext_6(1'b0),
        .rx_ce_ext_7(1'b0),
        .rx_ce_ext_8(1'b0),
        .rx_ce_ext_9(1'b0),
        .rx_clk(1'b0),
        .rx_cntvaluein_0({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_10({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_11({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_12({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_13({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_14({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_15({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_16({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_17({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_18({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_19({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_2({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_20({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_21({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_22({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_23({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_24({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_25({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_26({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_27({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_28({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_29({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_30({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_31({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_32({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_33({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_34({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_35({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_36({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_37({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_38({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_39({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_4({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_40({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_41({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_42({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_43({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_44({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_45({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_46({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_47({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_48({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_49({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_5({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_50({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_51({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_6({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_7({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_8({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_9({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_0({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_10({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_11({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_12({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_13({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_14({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_15({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_16({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_17({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_18({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_19({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_2({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_20({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_21({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_22({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_23({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_24({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_25({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_26({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_27({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_28({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_29({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_30({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_31({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_32({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_33({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_34({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_35({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_36({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_37({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_38({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_39({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_4({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_40({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_41({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_42({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_43({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_44({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_45({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_46({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_47({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_48({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_49({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_5({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_50({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_51({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_6({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_7({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_8({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvaluein_ext_9({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cntvalueout_0(NLW_inst_rx_cntvalueout_0_UNCONNECTED[8:0]),
        .rx_cntvalueout_1(NLW_inst_rx_cntvalueout_1_UNCONNECTED[8:0]),
        .rx_cntvalueout_10(NLW_inst_rx_cntvalueout_10_UNCONNECTED[8:0]),
        .rx_cntvalueout_11(NLW_inst_rx_cntvalueout_11_UNCONNECTED[8:0]),
        .rx_cntvalueout_12(NLW_inst_rx_cntvalueout_12_UNCONNECTED[8:0]),
        .rx_cntvalueout_13(NLW_inst_rx_cntvalueout_13_UNCONNECTED[8:0]),
        .rx_cntvalueout_14(NLW_inst_rx_cntvalueout_14_UNCONNECTED[8:0]),
        .rx_cntvalueout_15(NLW_inst_rx_cntvalueout_15_UNCONNECTED[8:0]),
        .rx_cntvalueout_16(NLW_inst_rx_cntvalueout_16_UNCONNECTED[8:0]),
        .rx_cntvalueout_17(NLW_inst_rx_cntvalueout_17_UNCONNECTED[8:0]),
        .rx_cntvalueout_18(NLW_inst_rx_cntvalueout_18_UNCONNECTED[8:0]),
        .rx_cntvalueout_19(NLW_inst_rx_cntvalueout_19_UNCONNECTED[8:0]),
        .rx_cntvalueout_2(NLW_inst_rx_cntvalueout_2_UNCONNECTED[8:0]),
        .rx_cntvalueout_20(NLW_inst_rx_cntvalueout_20_UNCONNECTED[8:0]),
        .rx_cntvalueout_21(NLW_inst_rx_cntvalueout_21_UNCONNECTED[8:0]),
        .rx_cntvalueout_22(NLW_inst_rx_cntvalueout_22_UNCONNECTED[8:0]),
        .rx_cntvalueout_23(NLW_inst_rx_cntvalueout_23_UNCONNECTED[8:0]),
        .rx_cntvalueout_24(NLW_inst_rx_cntvalueout_24_UNCONNECTED[8:0]),
        .rx_cntvalueout_25(NLW_inst_rx_cntvalueout_25_UNCONNECTED[8:0]),
        .rx_cntvalueout_26(NLW_inst_rx_cntvalueout_26_UNCONNECTED[8:0]),
        .rx_cntvalueout_27(NLW_inst_rx_cntvalueout_27_UNCONNECTED[8:0]),
        .rx_cntvalueout_28(NLW_inst_rx_cntvalueout_28_UNCONNECTED[8:0]),
        .rx_cntvalueout_29(NLW_inst_rx_cntvalueout_29_UNCONNECTED[8:0]),
        .rx_cntvalueout_3(NLW_inst_rx_cntvalueout_3_UNCONNECTED[8:0]),
        .rx_cntvalueout_30(NLW_inst_rx_cntvalueout_30_UNCONNECTED[8:0]),
        .rx_cntvalueout_31(NLW_inst_rx_cntvalueout_31_UNCONNECTED[8:0]),
        .rx_cntvalueout_32(NLW_inst_rx_cntvalueout_32_UNCONNECTED[8:0]),
        .rx_cntvalueout_33(NLW_inst_rx_cntvalueout_33_UNCONNECTED[8:0]),
        .rx_cntvalueout_34(NLW_inst_rx_cntvalueout_34_UNCONNECTED[8:0]),
        .rx_cntvalueout_35(NLW_inst_rx_cntvalueout_35_UNCONNECTED[8:0]),
        .rx_cntvalueout_36(NLW_inst_rx_cntvalueout_36_UNCONNECTED[8:0]),
        .rx_cntvalueout_37(NLW_inst_rx_cntvalueout_37_UNCONNECTED[8:0]),
        .rx_cntvalueout_38(NLW_inst_rx_cntvalueout_38_UNCONNECTED[8:0]),
        .rx_cntvalueout_39(NLW_inst_rx_cntvalueout_39_UNCONNECTED[8:0]),
        .rx_cntvalueout_4(NLW_inst_rx_cntvalueout_4_UNCONNECTED[8:0]),
        .rx_cntvalueout_40(NLW_inst_rx_cntvalueout_40_UNCONNECTED[8:0]),
        .rx_cntvalueout_41(NLW_inst_rx_cntvalueout_41_UNCONNECTED[8:0]),
        .rx_cntvalueout_42(NLW_inst_rx_cntvalueout_42_UNCONNECTED[8:0]),
        .rx_cntvalueout_43(NLW_inst_rx_cntvalueout_43_UNCONNECTED[8:0]),
        .rx_cntvalueout_44(NLW_inst_rx_cntvalueout_44_UNCONNECTED[8:0]),
        .rx_cntvalueout_45(NLW_inst_rx_cntvalueout_45_UNCONNECTED[8:0]),
        .rx_cntvalueout_46(NLW_inst_rx_cntvalueout_46_UNCONNECTED[8:0]),
        .rx_cntvalueout_47(NLW_inst_rx_cntvalueout_47_UNCONNECTED[8:0]),
        .rx_cntvalueout_48(NLW_inst_rx_cntvalueout_48_UNCONNECTED[8:0]),
        .rx_cntvalueout_49(NLW_inst_rx_cntvalueout_49_UNCONNECTED[8:0]),
        .rx_cntvalueout_5(NLW_inst_rx_cntvalueout_5_UNCONNECTED[8:0]),
        .rx_cntvalueout_50(NLW_inst_rx_cntvalueout_50_UNCONNECTED[8:0]),
        .rx_cntvalueout_51(NLW_inst_rx_cntvalueout_51_UNCONNECTED[8:0]),
        .rx_cntvalueout_6(NLW_inst_rx_cntvalueout_6_UNCONNECTED[8:0]),
        .rx_cntvalueout_7(NLW_inst_rx_cntvalueout_7_UNCONNECTED[8:0]),
        .rx_cntvalueout_8(NLW_inst_rx_cntvalueout_8_UNCONNECTED[8:0]),
        .rx_cntvalueout_9(NLW_inst_rx_cntvalueout_9_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_0(NLW_inst_rx_cntvalueout_ext_0_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_1(NLW_inst_rx_cntvalueout_ext_1_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_10(NLW_inst_rx_cntvalueout_ext_10_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_11(NLW_inst_rx_cntvalueout_ext_11_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_12(NLW_inst_rx_cntvalueout_ext_12_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_13(NLW_inst_rx_cntvalueout_ext_13_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_14(NLW_inst_rx_cntvalueout_ext_14_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_15(NLW_inst_rx_cntvalueout_ext_15_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_16(NLW_inst_rx_cntvalueout_ext_16_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_17(NLW_inst_rx_cntvalueout_ext_17_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_18(NLW_inst_rx_cntvalueout_ext_18_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_19(NLW_inst_rx_cntvalueout_ext_19_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_2(NLW_inst_rx_cntvalueout_ext_2_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_20(NLW_inst_rx_cntvalueout_ext_20_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_21(NLW_inst_rx_cntvalueout_ext_21_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_22(NLW_inst_rx_cntvalueout_ext_22_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_23(NLW_inst_rx_cntvalueout_ext_23_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_24(NLW_inst_rx_cntvalueout_ext_24_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_25(NLW_inst_rx_cntvalueout_ext_25_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_26(NLW_inst_rx_cntvalueout_ext_26_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_27(NLW_inst_rx_cntvalueout_ext_27_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_28(NLW_inst_rx_cntvalueout_ext_28_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_29(NLW_inst_rx_cntvalueout_ext_29_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_3(NLW_inst_rx_cntvalueout_ext_3_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_30(NLW_inst_rx_cntvalueout_ext_30_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_31(NLW_inst_rx_cntvalueout_ext_31_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_32(NLW_inst_rx_cntvalueout_ext_32_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_33(NLW_inst_rx_cntvalueout_ext_33_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_34(NLW_inst_rx_cntvalueout_ext_34_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_35(NLW_inst_rx_cntvalueout_ext_35_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_36(NLW_inst_rx_cntvalueout_ext_36_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_37(NLW_inst_rx_cntvalueout_ext_37_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_38(NLW_inst_rx_cntvalueout_ext_38_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_39(NLW_inst_rx_cntvalueout_ext_39_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_4(NLW_inst_rx_cntvalueout_ext_4_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_40(NLW_inst_rx_cntvalueout_ext_40_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_41(NLW_inst_rx_cntvalueout_ext_41_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_42(NLW_inst_rx_cntvalueout_ext_42_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_43(NLW_inst_rx_cntvalueout_ext_43_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_44(NLW_inst_rx_cntvalueout_ext_44_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_45(NLW_inst_rx_cntvalueout_ext_45_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_46(NLW_inst_rx_cntvalueout_ext_46_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_47(NLW_inst_rx_cntvalueout_ext_47_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_48(NLW_inst_rx_cntvalueout_ext_48_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_49(NLW_inst_rx_cntvalueout_ext_49_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_5(NLW_inst_rx_cntvalueout_ext_5_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_50(NLW_inst_rx_cntvalueout_ext_50_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_51(NLW_inst_rx_cntvalueout_ext_51_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_6(NLW_inst_rx_cntvalueout_ext_6_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_7(NLW_inst_rx_cntvalueout_ext_7_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_8(NLW_inst_rx_cntvalueout_ext_8_UNCONNECTED[8:0]),
        .rx_cntvalueout_ext_9(NLW_inst_rx_cntvalueout_ext_9_UNCONNECTED[8:0]),
        .rx_en_vtc_0(1'b0),
        .rx_en_vtc_1(1'b0),
        .rx_en_vtc_10(1'b0),
        .rx_en_vtc_11(1'b0),
        .rx_en_vtc_12(1'b0),
        .rx_en_vtc_13(1'b0),
        .rx_en_vtc_14(1'b0),
        .rx_en_vtc_15(1'b0),
        .rx_en_vtc_16(1'b0),
        .rx_en_vtc_17(1'b0),
        .rx_en_vtc_18(1'b0),
        .rx_en_vtc_19(1'b0),
        .rx_en_vtc_2(1'b0),
        .rx_en_vtc_20(1'b0),
        .rx_en_vtc_21(1'b0),
        .rx_en_vtc_22(1'b0),
        .rx_en_vtc_23(1'b0),
        .rx_en_vtc_24(1'b0),
        .rx_en_vtc_25(1'b0),
        .rx_en_vtc_26(1'b0),
        .rx_en_vtc_27(1'b0),
        .rx_en_vtc_28(1'b0),
        .rx_en_vtc_29(1'b0),
        .rx_en_vtc_3(1'b0),
        .rx_en_vtc_30(1'b0),
        .rx_en_vtc_31(1'b0),
        .rx_en_vtc_32(1'b0),
        .rx_en_vtc_33(1'b0),
        .rx_en_vtc_34(1'b0),
        .rx_en_vtc_35(1'b0),
        .rx_en_vtc_36(1'b0),
        .rx_en_vtc_37(1'b0),
        .rx_en_vtc_38(1'b0),
        .rx_en_vtc_39(1'b0),
        .rx_en_vtc_4(1'b0),
        .rx_en_vtc_40(1'b0),
        .rx_en_vtc_41(1'b0),
        .rx_en_vtc_42(1'b0),
        .rx_en_vtc_43(1'b0),
        .rx_en_vtc_44(1'b0),
        .rx_en_vtc_45(1'b0),
        .rx_en_vtc_46(1'b0),
        .rx_en_vtc_47(1'b0),
        .rx_en_vtc_48(1'b0),
        .rx_en_vtc_49(1'b0),
        .rx_en_vtc_5(1'b0),
        .rx_en_vtc_50(1'b0),
        .rx_en_vtc_51(1'b0),
        .rx_en_vtc_6(1'b0),
        .rx_en_vtc_7(1'b0),
        .rx_en_vtc_8(1'b0),
        .rx_en_vtc_9(1'b0),
        .rx_en_vtc_ext_0(1'b0),
        .rx_en_vtc_ext_1(1'b0),
        .rx_en_vtc_ext_10(1'b0),
        .rx_en_vtc_ext_11(1'b0),
        .rx_en_vtc_ext_12(1'b0),
        .rx_en_vtc_ext_13(1'b0),
        .rx_en_vtc_ext_14(1'b0),
        .rx_en_vtc_ext_15(1'b0),
        .rx_en_vtc_ext_16(1'b0),
        .rx_en_vtc_ext_17(1'b0),
        .rx_en_vtc_ext_18(1'b0),
        .rx_en_vtc_ext_19(1'b0),
        .rx_en_vtc_ext_2(1'b0),
        .rx_en_vtc_ext_20(1'b0),
        .rx_en_vtc_ext_21(1'b0),
        .rx_en_vtc_ext_22(1'b0),
        .rx_en_vtc_ext_23(1'b0),
        .rx_en_vtc_ext_24(1'b0),
        .rx_en_vtc_ext_25(1'b0),
        .rx_en_vtc_ext_26(1'b0),
        .rx_en_vtc_ext_27(1'b0),
        .rx_en_vtc_ext_28(1'b0),
        .rx_en_vtc_ext_29(1'b0),
        .rx_en_vtc_ext_3(1'b0),
        .rx_en_vtc_ext_30(1'b0),
        .rx_en_vtc_ext_31(1'b0),
        .rx_en_vtc_ext_32(1'b0),
        .rx_en_vtc_ext_33(1'b0),
        .rx_en_vtc_ext_34(1'b0),
        .rx_en_vtc_ext_35(1'b0),
        .rx_en_vtc_ext_36(1'b0),
        .rx_en_vtc_ext_37(1'b0),
        .rx_en_vtc_ext_38(1'b0),
        .rx_en_vtc_ext_39(1'b0),
        .rx_en_vtc_ext_4(1'b0),
        .rx_en_vtc_ext_40(1'b0),
        .rx_en_vtc_ext_41(1'b0),
        .rx_en_vtc_ext_42(1'b0),
        .rx_en_vtc_ext_43(1'b0),
        .rx_en_vtc_ext_44(1'b0),
        .rx_en_vtc_ext_45(1'b0),
        .rx_en_vtc_ext_46(1'b0),
        .rx_en_vtc_ext_47(1'b0),
        .rx_en_vtc_ext_48(1'b0),
        .rx_en_vtc_ext_49(1'b0),
        .rx_en_vtc_ext_5(1'b0),
        .rx_en_vtc_ext_50(1'b0),
        .rx_en_vtc_ext_51(1'b0),
        .rx_en_vtc_ext_6(1'b0),
        .rx_en_vtc_ext_7(1'b0),
        .rx_en_vtc_ext_8(1'b0),
        .rx_en_vtc_ext_9(1'b0),
        .rx_inc_0(1'b0),
        .rx_inc_1(1'b0),
        .rx_inc_10(1'b0),
        .rx_inc_11(1'b0),
        .rx_inc_12(1'b0),
        .rx_inc_13(1'b0),
        .rx_inc_14(1'b0),
        .rx_inc_15(1'b0),
        .rx_inc_16(1'b0),
        .rx_inc_17(1'b0),
        .rx_inc_18(1'b0),
        .rx_inc_19(1'b0),
        .rx_inc_2(1'b0),
        .rx_inc_20(1'b0),
        .rx_inc_21(1'b0),
        .rx_inc_22(1'b0),
        .rx_inc_23(1'b0),
        .rx_inc_24(1'b0),
        .rx_inc_25(1'b0),
        .rx_inc_26(1'b0),
        .rx_inc_27(1'b0),
        .rx_inc_28(1'b0),
        .rx_inc_29(1'b0),
        .rx_inc_3(1'b0),
        .rx_inc_30(1'b0),
        .rx_inc_31(1'b0),
        .rx_inc_32(1'b0),
        .rx_inc_33(1'b0),
        .rx_inc_34(1'b0),
        .rx_inc_35(1'b0),
        .rx_inc_36(1'b0),
        .rx_inc_37(1'b0),
        .rx_inc_38(1'b0),
        .rx_inc_39(1'b0),
        .rx_inc_4(1'b0),
        .rx_inc_40(1'b0),
        .rx_inc_41(1'b0),
        .rx_inc_42(1'b0),
        .rx_inc_43(1'b0),
        .rx_inc_44(1'b0),
        .rx_inc_45(1'b0),
        .rx_inc_46(1'b0),
        .rx_inc_47(1'b0),
        .rx_inc_48(1'b0),
        .rx_inc_49(1'b0),
        .rx_inc_5(1'b0),
        .rx_inc_50(1'b0),
        .rx_inc_51(1'b0),
        .rx_inc_6(1'b0),
        .rx_inc_7(1'b0),
        .rx_inc_8(1'b0),
        .rx_inc_9(1'b0),
        .rx_inc_ext_0(1'b0),
        .rx_inc_ext_1(1'b0),
        .rx_inc_ext_10(1'b0),
        .rx_inc_ext_11(1'b0),
        .rx_inc_ext_12(1'b0),
        .rx_inc_ext_13(1'b0),
        .rx_inc_ext_14(1'b0),
        .rx_inc_ext_15(1'b0),
        .rx_inc_ext_16(1'b0),
        .rx_inc_ext_17(1'b0),
        .rx_inc_ext_18(1'b0),
        .rx_inc_ext_19(1'b0),
        .rx_inc_ext_2(1'b0),
        .rx_inc_ext_20(1'b0),
        .rx_inc_ext_21(1'b0),
        .rx_inc_ext_22(1'b0),
        .rx_inc_ext_23(1'b0),
        .rx_inc_ext_24(1'b0),
        .rx_inc_ext_25(1'b0),
        .rx_inc_ext_26(1'b0),
        .rx_inc_ext_27(1'b0),
        .rx_inc_ext_28(1'b0),
        .rx_inc_ext_29(1'b0),
        .rx_inc_ext_3(1'b0),
        .rx_inc_ext_30(1'b0),
        .rx_inc_ext_31(1'b0),
        .rx_inc_ext_32(1'b0),
        .rx_inc_ext_33(1'b0),
        .rx_inc_ext_34(1'b0),
        .rx_inc_ext_35(1'b0),
        .rx_inc_ext_36(1'b0),
        .rx_inc_ext_37(1'b0),
        .rx_inc_ext_38(1'b0),
        .rx_inc_ext_39(1'b0),
        .rx_inc_ext_4(1'b0),
        .rx_inc_ext_40(1'b0),
        .rx_inc_ext_41(1'b0),
        .rx_inc_ext_42(1'b0),
        .rx_inc_ext_43(1'b0),
        .rx_inc_ext_44(1'b0),
        .rx_inc_ext_45(1'b0),
        .rx_inc_ext_46(1'b0),
        .rx_inc_ext_47(1'b0),
        .rx_inc_ext_48(1'b0),
        .rx_inc_ext_49(1'b0),
        .rx_inc_ext_5(1'b0),
        .rx_inc_ext_50(1'b0),
        .rx_inc_ext_51(1'b0),
        .rx_inc_ext_6(1'b0),
        .rx_inc_ext_7(1'b0),
        .rx_inc_ext_8(1'b0),
        .rx_inc_ext_9(1'b0),
        .rx_load_0(1'b0),
        .rx_load_1(1'b0),
        .rx_load_10(1'b0),
        .rx_load_11(1'b0),
        .rx_load_12(1'b0),
        .rx_load_13(1'b0),
        .rx_load_14(1'b0),
        .rx_load_15(1'b0),
        .rx_load_16(1'b0),
        .rx_load_17(1'b0),
        .rx_load_18(1'b0),
        .rx_load_19(1'b0),
        .rx_load_2(1'b0),
        .rx_load_20(1'b0),
        .rx_load_21(1'b0),
        .rx_load_22(1'b0),
        .rx_load_23(1'b0),
        .rx_load_24(1'b0),
        .rx_load_25(1'b0),
        .rx_load_26(1'b0),
        .rx_load_27(1'b0),
        .rx_load_28(1'b0),
        .rx_load_29(1'b0),
        .rx_load_3(1'b0),
        .rx_load_30(1'b0),
        .rx_load_31(1'b0),
        .rx_load_32(1'b0),
        .rx_load_33(1'b0),
        .rx_load_34(1'b0),
        .rx_load_35(1'b0),
        .rx_load_36(1'b0),
        .rx_load_37(1'b0),
        .rx_load_38(1'b0),
        .rx_load_39(1'b0),
        .rx_load_4(1'b0),
        .rx_load_40(1'b0),
        .rx_load_41(1'b0),
        .rx_load_42(1'b0),
        .rx_load_43(1'b0),
        .rx_load_44(1'b0),
        .rx_load_45(1'b0),
        .rx_load_46(1'b0),
        .rx_load_47(1'b0),
        .rx_load_48(1'b0),
        .rx_load_49(1'b0),
        .rx_load_5(1'b0),
        .rx_load_50(1'b0),
        .rx_load_51(1'b0),
        .rx_load_6(1'b0),
        .rx_load_7(1'b0),
        .rx_load_8(1'b0),
        .rx_load_9(1'b0),
        .rx_load_ext_0(1'b0),
        .rx_load_ext_1(1'b0),
        .rx_load_ext_10(1'b0),
        .rx_load_ext_11(1'b0),
        .rx_load_ext_12(1'b0),
        .rx_load_ext_13(1'b0),
        .rx_load_ext_14(1'b0),
        .rx_load_ext_15(1'b0),
        .rx_load_ext_16(1'b0),
        .rx_load_ext_17(1'b0),
        .rx_load_ext_18(1'b0),
        .rx_load_ext_19(1'b0),
        .rx_load_ext_2(1'b0),
        .rx_load_ext_20(1'b0),
        .rx_load_ext_21(1'b0),
        .rx_load_ext_22(1'b0),
        .rx_load_ext_23(1'b0),
        .rx_load_ext_24(1'b0),
        .rx_load_ext_25(1'b0),
        .rx_load_ext_26(1'b0),
        .rx_load_ext_27(1'b0),
        .rx_load_ext_28(1'b0),
        .rx_load_ext_29(1'b0),
        .rx_load_ext_3(1'b0),
        .rx_load_ext_30(1'b0),
        .rx_load_ext_31(1'b0),
        .rx_load_ext_32(1'b0),
        .rx_load_ext_33(1'b0),
        .rx_load_ext_34(1'b0),
        .rx_load_ext_35(1'b0),
        .rx_load_ext_36(1'b0),
        .rx_load_ext_37(1'b0),
        .rx_load_ext_38(1'b0),
        .rx_load_ext_39(1'b0),
        .rx_load_ext_4(1'b0),
        .rx_load_ext_40(1'b0),
        .rx_load_ext_41(1'b0),
        .rx_load_ext_42(1'b0),
        .rx_load_ext_43(1'b0),
        .rx_load_ext_44(1'b0),
        .rx_load_ext_45(1'b0),
        .rx_load_ext_46(1'b0),
        .rx_load_ext_47(1'b0),
        .rx_load_ext_48(1'b0),
        .rx_load_ext_49(1'b0),
        .rx_load_ext_5(1'b0),
        .rx_load_ext_50(1'b0),
        .rx_load_ext_51(1'b0),
        .rx_load_ext_6(1'b0),
        .rx_load_ext_7(1'b0),
        .rx_load_ext_8(1'b0),
        .rx_load_ext_9(1'b0),
        .rxtx_bitslip_sync_done(NLW_inst_rxtx_bitslip_sync_done_UNCONNECTED),
        .shared_pll0_clkout0_in(1'b0),
        .shared_pll0_clkoutphy_in(1'b0),
        .shared_pll0_clkoutphy_out(NLW_inst_shared_pll0_clkoutphy_out_UNCONNECTED),
        .shared_pll0_locked_in(1'b0),
        .shared_pll1_clkout0_in(1'b0),
        .shared_pll1_clkoutphy_in(1'b0),
        .shared_pll1_clkoutphy_out(NLW_inst_shared_pll1_clkoutphy_out_UNCONNECTED),
        .shared_pll1_locked_in(1'b0),
        .start_bitslip(1'b0),
        .tri_t_0(1'b0),
        .tri_t_1(1'b0),
        .tri_t_10(1'b0),
        .tri_t_11(1'b0),
        .tri_t_12(1'b0),
        .tri_t_13(1'b0),
        .tri_t_14(1'b0),
        .tri_t_15(1'b0),
        .tri_t_16(1'b0),
        .tri_t_17(1'b0),
        .tri_t_18(1'b0),
        .tri_t_19(1'b0),
        .tri_t_2(1'b0),
        .tri_t_20(1'b0),
        .tri_t_21(1'b0),
        .tri_t_22(1'b0),
        .tri_t_23(1'b0),
        .tri_t_24(1'b0),
        .tri_t_25(1'b0),
        .tri_t_26(1'b0),
        .tri_t_27(1'b0),
        .tri_t_28(1'b0),
        .tri_t_29(1'b0),
        .tri_t_3(1'b0),
        .tri_t_30(1'b0),
        .tri_t_31(1'b0),
        .tri_t_32(1'b0),
        .tri_t_33(1'b0),
        .tri_t_34(1'b0),
        .tri_t_35(1'b0),
        .tri_t_36(1'b0),
        .tri_t_37(1'b0),
        .tri_t_38(1'b0),
        .tri_t_39(1'b0),
        .tri_t_4(1'b0),
        .tri_t_40(1'b0),
        .tri_t_41(1'b0),
        .tri_t_42(1'b0),
        .tri_t_43(1'b0),
        .tri_t_44(1'b0),
        .tri_t_45(1'b0),
        .tri_t_46(1'b0),
        .tri_t_47(1'b0),
        .tri_t_48(1'b0),
        .tri_t_49(1'b0),
        .tri_t_5(1'b0),
        .tri_t_50(1'b0),
        .tri_t_51(1'b0),
        .tri_t_6(1'b0),
        .tri_t_7(1'b0),
        .tri_t_8(1'b0),
        .tri_t_9(1'b0),
        .tri_tbyte0({1'b0,1'b0,1'b0,1'b0}),
        .tri_tbyte1({1'b0,1'b0,1'b0,1'b0}),
        .tri_tbyte2({1'b0,1'b0,1'b0,1'b0}),
        .tri_tbyte3({1'b0,1'b0,1'b0,1'b0}),
        .tri_tbyte4({1'b0,1'b0,1'b0,1'b0}),
        .tri_tbyte5({1'b0,1'b0,1'b0,1'b0}),
        .tri_tbyte6({1'b0,1'b0,1'b0,1'b0}),
        .tri_tbyte7({1'b0,1'b0,1'b0,1'b0}),
        .tx_ce_0(1'b0),
        .tx_ce_1(1'b0),
        .tx_ce_10(1'b0),
        .tx_ce_11(1'b0),
        .tx_ce_12(1'b0),
        .tx_ce_13(1'b0),
        .tx_ce_14(1'b0),
        .tx_ce_15(1'b0),
        .tx_ce_16(1'b0),
        .tx_ce_17(1'b0),
        .tx_ce_18(1'b0),
        .tx_ce_19(1'b0),
        .tx_ce_2(1'b0),
        .tx_ce_20(1'b0),
        .tx_ce_21(1'b0),
        .tx_ce_22(1'b0),
        .tx_ce_23(1'b0),
        .tx_ce_24(1'b0),
        .tx_ce_25(1'b0),
        .tx_ce_26(1'b0),
        .tx_ce_27(1'b0),
        .tx_ce_28(1'b0),
        .tx_ce_29(1'b0),
        .tx_ce_3(1'b0),
        .tx_ce_30(1'b0),
        .tx_ce_31(1'b0),
        .tx_ce_32(1'b0),
        .tx_ce_33(1'b0),
        .tx_ce_34(1'b0),
        .tx_ce_35(1'b0),
        .tx_ce_36(1'b0),
        .tx_ce_37(1'b0),
        .tx_ce_38(1'b0),
        .tx_ce_39(1'b0),
        .tx_ce_4(1'b0),
        .tx_ce_40(1'b0),
        .tx_ce_41(1'b0),
        .tx_ce_42(1'b0),
        .tx_ce_43(1'b0),
        .tx_ce_44(1'b0),
        .tx_ce_45(1'b0),
        .tx_ce_46(1'b0),
        .tx_ce_47(1'b0),
        .tx_ce_48(1'b0),
        .tx_ce_49(1'b0),
        .tx_ce_5(1'b0),
        .tx_ce_50(1'b0),
        .tx_ce_51(1'b0),
        .tx_ce_6(1'b0),
        .tx_ce_7(1'b0),
        .tx_ce_8(1'b0),
        .tx_ce_9(1'b0),
        .tx_clk(1'b0),
        .tx_cntvaluein_0({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_10({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_11({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_12({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_13({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_14({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_15({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_16({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_17({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_18({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_19({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_2({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_20({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_21({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_22({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_23({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_24({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_25({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_26({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_27({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_28({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_29({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_30({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_31({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_32({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_33({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_34({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_35({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_36({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_37({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_38({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_39({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_4({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_40({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_41({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_42({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_43({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_44({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_45({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_46({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_47({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_48({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_49({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_5({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_50({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_51({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_6({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_7({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_8({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvaluein_9({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .tx_cntvalueout_0(NLW_inst_tx_cntvalueout_0_UNCONNECTED[8:0]),
        .tx_cntvalueout_1(NLW_inst_tx_cntvalueout_1_UNCONNECTED[8:0]),
        .tx_cntvalueout_10(NLW_inst_tx_cntvalueout_10_UNCONNECTED[8:0]),
        .tx_cntvalueout_11(NLW_inst_tx_cntvalueout_11_UNCONNECTED[8:0]),
        .tx_cntvalueout_12(NLW_inst_tx_cntvalueout_12_UNCONNECTED[8:0]),
        .tx_cntvalueout_13(NLW_inst_tx_cntvalueout_13_UNCONNECTED[8:0]),
        .tx_cntvalueout_14(NLW_inst_tx_cntvalueout_14_UNCONNECTED[8:0]),
        .tx_cntvalueout_15(NLW_inst_tx_cntvalueout_15_UNCONNECTED[8:0]),
        .tx_cntvalueout_16(NLW_inst_tx_cntvalueout_16_UNCONNECTED[8:0]),
        .tx_cntvalueout_17(NLW_inst_tx_cntvalueout_17_UNCONNECTED[8:0]),
        .tx_cntvalueout_18(NLW_inst_tx_cntvalueout_18_UNCONNECTED[8:0]),
        .tx_cntvalueout_19(NLW_inst_tx_cntvalueout_19_UNCONNECTED[8:0]),
        .tx_cntvalueout_2(NLW_inst_tx_cntvalueout_2_UNCONNECTED[8:0]),
        .tx_cntvalueout_20(NLW_inst_tx_cntvalueout_20_UNCONNECTED[8:0]),
        .tx_cntvalueout_21(NLW_inst_tx_cntvalueout_21_UNCONNECTED[8:0]),
        .tx_cntvalueout_22(NLW_inst_tx_cntvalueout_22_UNCONNECTED[8:0]),
        .tx_cntvalueout_23(NLW_inst_tx_cntvalueout_23_UNCONNECTED[8:0]),
        .tx_cntvalueout_24(NLW_inst_tx_cntvalueout_24_UNCONNECTED[8:0]),
        .tx_cntvalueout_25(NLW_inst_tx_cntvalueout_25_UNCONNECTED[8:0]),
        .tx_cntvalueout_26(NLW_inst_tx_cntvalueout_26_UNCONNECTED[8:0]),
        .tx_cntvalueout_27(NLW_inst_tx_cntvalueout_27_UNCONNECTED[8:0]),
        .tx_cntvalueout_28(NLW_inst_tx_cntvalueout_28_UNCONNECTED[8:0]),
        .tx_cntvalueout_29(NLW_inst_tx_cntvalueout_29_UNCONNECTED[8:0]),
        .tx_cntvalueout_3(NLW_inst_tx_cntvalueout_3_UNCONNECTED[8:0]),
        .tx_cntvalueout_30(NLW_inst_tx_cntvalueout_30_UNCONNECTED[8:0]),
        .tx_cntvalueout_31(NLW_inst_tx_cntvalueout_31_UNCONNECTED[8:0]),
        .tx_cntvalueout_32(NLW_inst_tx_cntvalueout_32_UNCONNECTED[8:0]),
        .tx_cntvalueout_33(NLW_inst_tx_cntvalueout_33_UNCONNECTED[8:0]),
        .tx_cntvalueout_34(NLW_inst_tx_cntvalueout_34_UNCONNECTED[8:0]),
        .tx_cntvalueout_35(NLW_inst_tx_cntvalueout_35_UNCONNECTED[8:0]),
        .tx_cntvalueout_36(NLW_inst_tx_cntvalueout_36_UNCONNECTED[8:0]),
        .tx_cntvalueout_37(NLW_inst_tx_cntvalueout_37_UNCONNECTED[8:0]),
        .tx_cntvalueout_38(NLW_inst_tx_cntvalueout_38_UNCONNECTED[8:0]),
        .tx_cntvalueout_39(NLW_inst_tx_cntvalueout_39_UNCONNECTED[8:0]),
        .tx_cntvalueout_4(NLW_inst_tx_cntvalueout_4_UNCONNECTED[8:0]),
        .tx_cntvalueout_40(NLW_inst_tx_cntvalueout_40_UNCONNECTED[8:0]),
        .tx_cntvalueout_41(NLW_inst_tx_cntvalueout_41_UNCONNECTED[8:0]),
        .tx_cntvalueout_42(NLW_inst_tx_cntvalueout_42_UNCONNECTED[8:0]),
        .tx_cntvalueout_43(NLW_inst_tx_cntvalueout_43_UNCONNECTED[8:0]),
        .tx_cntvalueout_44(NLW_inst_tx_cntvalueout_44_UNCONNECTED[8:0]),
        .tx_cntvalueout_45(NLW_inst_tx_cntvalueout_45_UNCONNECTED[8:0]),
        .tx_cntvalueout_46(NLW_inst_tx_cntvalueout_46_UNCONNECTED[8:0]),
        .tx_cntvalueout_47(NLW_inst_tx_cntvalueout_47_UNCONNECTED[8:0]),
        .tx_cntvalueout_48(NLW_inst_tx_cntvalueout_48_UNCONNECTED[8:0]),
        .tx_cntvalueout_49(NLW_inst_tx_cntvalueout_49_UNCONNECTED[8:0]),
        .tx_cntvalueout_5(NLW_inst_tx_cntvalueout_5_UNCONNECTED[8:0]),
        .tx_cntvalueout_50(NLW_inst_tx_cntvalueout_50_UNCONNECTED[8:0]),
        .tx_cntvalueout_51(NLW_inst_tx_cntvalueout_51_UNCONNECTED[8:0]),
        .tx_cntvalueout_6(NLW_inst_tx_cntvalueout_6_UNCONNECTED[8:0]),
        .tx_cntvalueout_7(NLW_inst_tx_cntvalueout_7_UNCONNECTED[8:0]),
        .tx_cntvalueout_8(NLW_inst_tx_cntvalueout_8_UNCONNECTED[8:0]),
        .tx_cntvalueout_9(NLW_inst_tx_cntvalueout_9_UNCONNECTED[8:0]),
        .tx_en_vtc_0(1'b0),
        .tx_en_vtc_1(1'b0),
        .tx_en_vtc_10(1'b0),
        .tx_en_vtc_11(1'b0),
        .tx_en_vtc_12(1'b0),
        .tx_en_vtc_13(1'b0),
        .tx_en_vtc_14(1'b0),
        .tx_en_vtc_15(1'b0),
        .tx_en_vtc_16(1'b0),
        .tx_en_vtc_17(1'b0),
        .tx_en_vtc_18(1'b0),
        .tx_en_vtc_19(1'b0),
        .tx_en_vtc_2(1'b0),
        .tx_en_vtc_20(1'b0),
        .tx_en_vtc_21(1'b0),
        .tx_en_vtc_22(1'b0),
        .tx_en_vtc_23(1'b0),
        .tx_en_vtc_24(1'b0),
        .tx_en_vtc_25(1'b0),
        .tx_en_vtc_26(1'b0),
        .tx_en_vtc_27(1'b0),
        .tx_en_vtc_28(1'b0),
        .tx_en_vtc_29(1'b0),
        .tx_en_vtc_3(1'b0),
        .tx_en_vtc_30(1'b0),
        .tx_en_vtc_31(1'b0),
        .tx_en_vtc_32(1'b0),
        .tx_en_vtc_33(1'b0),
        .tx_en_vtc_34(1'b0),
        .tx_en_vtc_35(1'b0),
        .tx_en_vtc_36(1'b0),
        .tx_en_vtc_37(1'b0),
        .tx_en_vtc_38(1'b0),
        .tx_en_vtc_39(1'b0),
        .tx_en_vtc_4(1'b0),
        .tx_en_vtc_40(1'b0),
        .tx_en_vtc_41(1'b0),
        .tx_en_vtc_42(1'b0),
        .tx_en_vtc_43(1'b0),
        .tx_en_vtc_44(1'b0),
        .tx_en_vtc_45(1'b0),
        .tx_en_vtc_46(1'b0),
        .tx_en_vtc_47(1'b0),
        .tx_en_vtc_48(1'b0),
        .tx_en_vtc_49(1'b0),
        .tx_en_vtc_5(1'b0),
        .tx_en_vtc_50(1'b0),
        .tx_en_vtc_51(1'b0),
        .tx_en_vtc_6(1'b0),
        .tx_en_vtc_7(1'b0),
        .tx_en_vtc_8(1'b0),
        .tx_en_vtc_9(1'b0),
        .tx_inc_0(1'b0),
        .tx_inc_1(1'b0),
        .tx_inc_10(1'b0),
        .tx_inc_11(1'b0),
        .tx_inc_12(1'b0),
        .tx_inc_13(1'b0),
        .tx_inc_14(1'b0),
        .tx_inc_15(1'b0),
        .tx_inc_16(1'b0),
        .tx_inc_17(1'b0),
        .tx_inc_18(1'b0),
        .tx_inc_19(1'b0),
        .tx_inc_2(1'b0),
        .tx_inc_20(1'b0),
        .tx_inc_21(1'b0),
        .tx_inc_22(1'b0),
        .tx_inc_23(1'b0),
        .tx_inc_24(1'b0),
        .tx_inc_25(1'b0),
        .tx_inc_26(1'b0),
        .tx_inc_27(1'b0),
        .tx_inc_28(1'b0),
        .tx_inc_29(1'b0),
        .tx_inc_3(1'b0),
        .tx_inc_30(1'b0),
        .tx_inc_31(1'b0),
        .tx_inc_32(1'b0),
        .tx_inc_33(1'b0),
        .tx_inc_34(1'b0),
        .tx_inc_35(1'b0),
        .tx_inc_36(1'b0),
        .tx_inc_37(1'b0),
        .tx_inc_38(1'b0),
        .tx_inc_39(1'b0),
        .tx_inc_4(1'b0),
        .tx_inc_40(1'b0),
        .tx_inc_41(1'b0),
        .tx_inc_42(1'b0),
        .tx_inc_43(1'b0),
        .tx_inc_44(1'b0),
        .tx_inc_45(1'b0),
        .tx_inc_46(1'b0),
        .tx_inc_47(1'b0),
        .tx_inc_48(1'b0),
        .tx_inc_49(1'b0),
        .tx_inc_5(1'b0),
        .tx_inc_50(1'b0),
        .tx_inc_51(1'b0),
        .tx_inc_6(1'b0),
        .tx_inc_7(1'b0),
        .tx_inc_8(1'b0),
        .tx_inc_9(1'b0),
        .tx_load_0(1'b0),
        .tx_load_1(1'b0),
        .tx_load_10(1'b0),
        .tx_load_11(1'b0),
        .tx_load_12(1'b0),
        .tx_load_13(1'b0),
        .tx_load_14(1'b0),
        .tx_load_15(1'b0),
        .tx_load_16(1'b0),
        .tx_load_17(1'b0),
        .tx_load_18(1'b0),
        .tx_load_19(1'b0),
        .tx_load_2(1'b0),
        .tx_load_20(1'b0),
        .tx_load_21(1'b0),
        .tx_load_22(1'b0),
        .tx_load_23(1'b0),
        .tx_load_24(1'b0),
        .tx_load_25(1'b0),
        .tx_load_26(1'b0),
        .tx_load_27(1'b0),
        .tx_load_28(1'b0),
        .tx_load_29(1'b0),
        .tx_load_3(1'b0),
        .tx_load_30(1'b0),
        .tx_load_31(1'b0),
        .tx_load_32(1'b0),
        .tx_load_33(1'b0),
        .tx_load_34(1'b0),
        .tx_load_35(1'b0),
        .tx_load_36(1'b0),
        .tx_load_37(1'b0),
        .tx_load_38(1'b0),
        .tx_load_39(1'b0),
        .tx_load_4(1'b0),
        .tx_load_40(1'b0),
        .tx_load_41(1'b0),
        .tx_load_42(1'b0),
        .tx_load_43(1'b0),
        .tx_load_44(1'b0),
        .tx_load_45(1'b0),
        .tx_load_46(1'b0),
        .tx_load_47(1'b0),
        .tx_load_48(1'b0),
        .tx_load_49(1'b0),
        .tx_load_5(1'b0),
        .tx_load_50(1'b0),
        .tx_load_51(1'b0),
        .tx_load_6(1'b0),
        .tx_load_7(1'b0),
        .tx_load_8(1'b0),
        .tx_load_9(1'b0),
        .vtc_rdy_bsc0(NLW_inst_vtc_rdy_bsc0_UNCONNECTED),
        .vtc_rdy_bsc1(NLW_inst_vtc_rdy_bsc1_UNCONNECTED),
        .vtc_rdy_bsc2(NLW_inst_vtc_rdy_bsc2_UNCONNECTED),
        .vtc_rdy_bsc3(NLW_inst_vtc_rdy_bsc3_UNCONNECTED),
        .vtc_rdy_bsc4(NLW_inst_vtc_rdy_bsc4_UNCONNECTED),
        .vtc_rdy_bsc5(NLW_inst_vtc_rdy_bsc5_UNCONNECTED),
        .vtc_rdy_bsc6(NLW_inst_vtc_rdy_bsc6_UNCONNECTED),
        .vtc_rdy_bsc7(NLW_inst_vtc_rdy_bsc7_UNCONNECTED));
endmodule

(* C_ALL_EN_PIN_INFO = "0 {nibble 0 dir RX sig_type DIFF data_strb Strobe data_strb_org Strobe sig_name clk_rxp loc T3} 1 {nibble 0 dir RX sig_type DIFF data_strb Strobe data_strb_org Strobe sig_name clk_rxn loc T2} 2 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp0 loc P3} 3 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn0 loc R3} 4 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp1 loc U2} 5 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn1 loc U1} 6 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp2 loc R4} 7 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn2 loc T4} 8 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp3 loc R1} 9 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn3 loc T1}" *) (* C_ALL_RX_EN = "52'b0000000000000000000000000000000000000000001111111111" *) (* C_BANK = "65" *) 
(* C_BIDIR_BITSLICE_EN = "52'b0000000000000000000000000000000000000000000000000000" *) (* C_BIDIR_FIFO_SYNC_MODE = "FALSE" *) (* C_BIDIR_IS_RX_CLK_INVERTED = "1'b0" *) 
(* C_BIDIR_IS_RX_RST_DLY_INVERTED = "1'b0" *) (* C_BIDIR_IS_RX_RST_INVERTED = "1'b0" *) (* C_BIDIR_IS_TX_CLK_INVERTED = "1'b0" *) 
(* C_BIDIR_IS_TX_RST_DLY_INVERTED = "1'b0" *) (* C_BIDIR_IS_TX_RST_INVERTED = "1'b0" *) (* C_BIDIR_RX_DELAY_FORMAT = "TIME" *) 
(* C_BIDIR_TX_DELAY_FORMAT = "TIME" *) (* C_BITSLIP_MODE = "SLIP_PER_BIT" *) (* C_BITSLIP_VAL = "8'b00101100" *) 
(* C_BS0_INFO = "0 {name bg0_pin0_nc loc T3} 1 {name bg0_pin6_nc loc R4} 2 {name bg1_pin0_nc loc N2} 3 {name bg1_pin6_nc loc M5} 4 {name bg2_pin0_nc loc J3} 5 {name bg2_pin6_nc loc J5} 6 {name bg3_pin0_nc loc G1} 7 {name bg3_pin6_nc loc D3}" *) (* C_BSC_CTRL_CLK = "EXTERNAL" *) (* C_BSC_EN_DYN_ODLY_MODE = "FALSE" *) 
(* C_BSC_IDLY_VT_TRACK = "TRUE" *) (* C_BSC_ODLY_VT_TRACK = "TRUE" *) (* C_BSC_QDLY_VT_TRACK = "TRUE" *) 
(* C_BSC_READ_IDLE_COUNT = "6'b000000" *) (* C_BSC_REFCLK_SRC = "PLLCLK" *) (* C_BSC_ROUNDING_FACTOR = "16" *) 
(* C_BSC_RXGATE_EXTEND = "FALSE" *) (* C_BSC_RX_GATING = "DISABLE" *) (* C_BSC_SELF_CALIBRATE = "ENABLE" *) 
(* C_BSC_SIM_SPEEDUP = "FAST" *) (* C_BS_INIT_VAL = "52'b0000000000000000000000000000000000000000000000000000" *) (* C_CLKIN_DIFF_EN = "0" *) 
(* C_CLKIN_PERIOD = "5.000000" *) (* C_CLK_FWD = "0" *) (* C_CLK_FWD_BITSLICE_NO = "0" *) 
(* C_CLK_FWD_ENABLE = "52'b0000000000000000000000000000000000000000000000000000" *) (* C_CLK_FWD_PHASE = "0" *) (* C_CLK_SIG_TYPE = "SINGLE" *) 
(* C_CLOCK_TRI = "1" *) (* C_DATA_PIN_EN = "5" *) (* C_DATA_TRI = "1" *) 
(* C_DEVICE = "xczu1cg" *) (* C_DEVICE_FAMILY = "zynquplus" *) (* C_DIFFERENTIAL_IO_STD = "MIPI_DPHY_DCI" *) 
(* C_DIFFERENTIAL_IO_TERMINATION = "TERM_100" *) (* C_DIFF_EN = "52'b0000000000000000000000000000000000000000001111111111" *) (* C_DIV_MODE = "DIV4" *) 
(* C_ENABLE_BITSLIP = "0" *) (* C_ENABLE_DATA_BITSLIP = "0" *) (* C_ENABLE_N_PINS = "1" *) 
(* C_ENABLE_PLL0_PLLOUT1 = "0" *) (* C_ENABLE_PLL0_PLLOUTFB = "0" *) (* C_ENABLE_RIU_INTERFACE = "0" *) 
(* C_ENABLE_RIU_SPLIT = "0" *) (* C_ENABLE_TX_TRI = "0" *) (* C_EN_BIDIR = "0" *) 
(* C_EN_BSC0 = "1" *) (* C_EN_BSC1 = "1" *) (* C_EN_BSC2 = "0" *) 
(* C_EN_BSC3 = "0" *) (* C_EN_BSC4 = "0" *) (* C_EN_BSC5 = "0" *) 
(* C_EN_BSC6 = "0" *) (* C_EN_BSC7 = "0" *) (* C_EN_MULTI_INTF_PORTS = "0" *) 
(* C_EN_RIU_OR0 = "TRUE" *) (* C_EN_RIU_OR1 = "FALSE" *) (* C_EN_RIU_OR2 = "FALSE" *) 
(* C_EN_RIU_OR3 = "FALSE" *) (* C_EN_RX = "1" *) (* C_EN_TX = "0" *) 
(* C_EN_VTC = "0" *) (* C_EXDES_BANK = "" *) (* C_EX_CLK_FREQ = "200.000000" *) 
(* C_EX_INST_GEN = "0" *) (* C_FIFO_SYNC_MODE = "1" *) (* C_GC_LOC = "21 {name IO_L11P_T1U_N8_GC_65 loc L2} 23 {name IO_L12P_T1U_N10_GC_65 loc L4} 28 {name IO_L14P_T2L_N2_GC_65 loc K4}" *) 
(* C_INCLK_LOC = "NONE" *) (* C_INCLK_PIN = "100" *) (* C_INV_RX_CLK = "8'b00000000" *) 
(* C_NIB0_BS0_EN = "0" *) (* C_NIB0_EN_CLK_TO_EXT_NORTH = "1'b0" *) (* C_NIB0_EN_CLK_TO_EXT_SOUTH = "1'b0" *) 
(* C_NIB0_EN_OTHER_NCLK = "1'b0" *) (* C_NIB0_EN_OTHER_PCLK = "1'b0" *) (* C_NIB1_BS0_EN = "0" *) 
(* C_NIB1_EN_CLK_TO_EXT_NORTH = "1'b0" *) (* C_NIB1_EN_CLK_TO_EXT_SOUTH = "1'b0" *) (* C_NIB1_EN_OTHER_NCLK = "1'b1" *) 
(* C_NIB1_EN_OTHER_PCLK = "1'b1" *) (* C_NIB2_BS0_EN = "0" *) (* C_NIB2_EN_CLK_TO_EXT_NORTH = "1'b0" *) 
(* C_NIB2_EN_CLK_TO_EXT_SOUTH = "1'b0" *) (* C_NIB2_EN_OTHER_NCLK = "1'b0" *) (* C_NIB2_EN_OTHER_PCLK = "1'b0" *) 
(* C_NIB3_BS0_EN = "0" *) (* C_NIB3_EN_CLK_TO_EXT_NORTH = "1'b0" *) (* C_NIB3_EN_CLK_TO_EXT_SOUTH = "1'b0" *) 
(* C_NIB3_EN_OTHER_NCLK = "1'b0" *) (* C_NIB3_EN_OTHER_PCLK = "1'b0" *) (* C_NIB4_BS0_EN = "0" *) 
(* C_NIB4_EN_CLK_TO_EXT_NORTH = "1'b0" *) (* C_NIB4_EN_CLK_TO_EXT_SOUTH = "1'b0" *) (* C_NIB4_EN_OTHER_NCLK = "1'b0" *) 
(* C_NIB4_EN_OTHER_PCLK = "1'b0" *) (* C_NIB5_BS0_EN = "0" *) (* C_NIB5_EN_CLK_TO_EXT_NORTH = "1'b0" *) 
(* C_NIB5_EN_CLK_TO_EXT_SOUTH = "1'b0" *) (* C_NIB5_EN_OTHER_NCLK = "1'b0" *) (* C_NIB5_EN_OTHER_PCLK = "1'b0" *) 
(* C_NIB6_BS0_EN = "0" *) (* C_NIB6_EN_CLK_TO_EXT_NORTH = "1'b0" *) (* C_NIB6_EN_CLK_TO_EXT_SOUTH = "1'b0" *) 
(* C_NIB6_EN_OTHER_NCLK = "1'b0" *) (* C_NIB6_EN_OTHER_PCLK = "1'b0" *) (* C_NIB7_BS0_EN = "0" *) 
(* C_NIB7_EN_CLK_TO_EXT_NORTH = "1'b0" *) (* C_NIB7_EN_CLK_TO_EXT_SOUTH = "1'b0" *) (* C_NIB7_EN_OTHER_NCLK = "1'b0" *) 
(* C_NIB7_EN_OTHER_PCLK = "1'b0" *) (* C_NIBBLE0_TRI = "0" *) (* C_NIBBLE1_TRI = "0" *) 
(* C_NIBBLE2_TRI = "0" *) (* C_NIBBLE3_TRI = "0" *) (* C_NIBBLE4_TRI = "0" *) 
(* C_NIBBLE5_TRI = "0" *) (* C_NIBBLE6_TRI = "0" *) (* C_NIBBLE7_TRI = "0" *) 
(* C_PIN_INFO = "0 {nibble 0 dir RX sig_type DIFF data_strb Strobe data_strb_org Strobe sig_name clk_rxp loc T3} 1 {nibble 0 dir RX sig_type DIFF data_strb Strobe data_strb_org Strobe sig_name clk_rxn loc T2} 2 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp0 loc P3} 3 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn0 loc R3} 4 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp1 loc U2} 5 {nibble 0 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn1 loc U1} 6 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp2 loc R4} 7 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn2 loc T4} 8 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxp3 loc R1} 9 {nibble 1 dir RX sig_type DIFF data_strb Data data_strb_org Data sig_name data_rxn3 loc T1}" *) (* C_PLL0_CLK0_PHASE = "0.000000" *) (* C_PLL0_CLK1_PHASE = "0.000000" *) 
(* C_PLL0_CLKFBOUT_MULT = "15" *) (* C_PLL0_CLKOUT1_DIVIDE = "1" *) (* C_PLL0_CLKOUTPHY_MODE = "VCO" *) 
(* C_PLL0_CLK_SOURCE = "BUFG_TO_PLL" *) (* C_PLL0_DIVCLK_DIVIDE = "2" *) (* C_PLL0_DIV_FACTOR = "1.000000" *) 
(* C_PLL0_FIFO_WRITE_CLK_EN = "1" *) (* C_PLL0_MMCM_CLKFBOUT_MULT_F = "7.875000" *) (* C_PLL0_MMCM_CLKOUT0_DIVIDE_F = "7.875000" *) 
(* C_PLL0_MMCM_DIVCLK_DIVIDE = "1" *) (* C_PLL0_RX_EXTERNAL_CLK_TO_DATA = "3" *) (* C_PLL1_CLK0_PHASE = "0.000000" *) 
(* C_PLL1_CLK1_PHASE = "0.000000" *) (* C_PLL1_CLKFBOUT_MULT = "15" *) (* C_PLL1_CLKOUTPHY_MODE = "VCO" *) 
(* C_PLL1_DIVCLK_DIVIDE = "2" *) (* C_PLL1_DIV_FACTOR = "1.000000" *) (* C_PLL_SHARING = "0" *) 
(* C_PLL_VCOMIN = "750.000000" *) (* C_REC_IN_FREQ = "93.750" *) (* C_RX_BITSLICE0_EN = "8'b00000000" *) 
(* C_RX_BITSLICE_EN = "52'b0000000000000000000000000000000000000000001111111111" *) (* C_RX_DELAY_CASCADE = "0" *) (* C_RX_DELAY_FORMAT = "TIME" *) 
(* C_RX_DELAY_TYPE = "2'b00" *) (* C_RX_DELAY_TYPE0 = "2'b00" *) (* C_RX_DELAY_TYPE1 = "2'b00" *) 
(* C_RX_DELAY_TYPE10 = "2'b00" *) (* C_RX_DELAY_TYPE11 = "2'b00" *) (* C_RX_DELAY_TYPE12 = "2'b00" *) 
(* C_RX_DELAY_TYPE13 = "2'b00" *) (* C_RX_DELAY_TYPE14 = "2'b00" *) (* C_RX_DELAY_TYPE15 = "2'b00" *) 
(* C_RX_DELAY_TYPE16 = "2'b00" *) (* C_RX_DELAY_TYPE17 = "2'b00" *) (* C_RX_DELAY_TYPE18 = "2'b00" *) 
(* C_RX_DELAY_TYPE19 = "2'b00" *) (* C_RX_DELAY_TYPE2 = "2'b00" *) (* C_RX_DELAY_TYPE20 = "2'b00" *) 
(* C_RX_DELAY_TYPE21 = "2'b00" *) (* C_RX_DELAY_TYPE22 = "2'b00" *) (* C_RX_DELAY_TYPE23 = "2'b00" *) 
(* C_RX_DELAY_TYPE24 = "2'b00" *) (* C_RX_DELAY_TYPE25 = "2'b00" *) (* C_RX_DELAY_TYPE26 = "2'b00" *) 
(* C_RX_DELAY_TYPE27 = "2'b00" *) (* C_RX_DELAY_TYPE28 = "2'b00" *) (* C_RX_DELAY_TYPE29 = "2'b00" *) 
(* C_RX_DELAY_TYPE3 = "2'b00" *) (* C_RX_DELAY_TYPE30 = "2'b00" *) (* C_RX_DELAY_TYPE31 = "2'b00" *) 
(* C_RX_DELAY_TYPE32 = "2'b00" *) (* C_RX_DELAY_TYPE33 = "2'b00" *) (* C_RX_DELAY_TYPE34 = "2'b00" *) 
(* C_RX_DELAY_TYPE35 = "2'b00" *) (* C_RX_DELAY_TYPE36 = "2'b00" *) (* C_RX_DELAY_TYPE37 = "2'b00" *) 
(* C_RX_DELAY_TYPE38 = "2'b00" *) (* C_RX_DELAY_TYPE39 = "2'b00" *) (* C_RX_DELAY_TYPE4 = "2'b00" *) 
(* C_RX_DELAY_TYPE40 = "2'b00" *) (* C_RX_DELAY_TYPE41 = "2'b00" *) (* C_RX_DELAY_TYPE42 = "2'b00" *) 
(* C_RX_DELAY_TYPE43 = "2'b00" *) (* C_RX_DELAY_TYPE44 = "2'b00" *) (* C_RX_DELAY_TYPE45 = "2'b00" *) 
(* C_RX_DELAY_TYPE46 = "2'b00" *) (* C_RX_DELAY_TYPE47 = "2'b00" *) (* C_RX_DELAY_TYPE48 = "2'b00" *) 
(* C_RX_DELAY_TYPE49 = "2'b00" *) (* C_RX_DELAY_TYPE5 = "2'b00" *) (* C_RX_DELAY_TYPE50 = "2'b00" *) 
(* C_RX_DELAY_TYPE51 = "2'b00" *) (* C_RX_DELAY_TYPE6 = "2'b00" *) (* C_RX_DELAY_TYPE7 = "2'b00" *) 
(* C_RX_DELAY_TYPE8 = "2'b00" *) (* C_RX_DELAY_TYPE9 = "2'b00" *) (* C_RX_DELAY_VALUE = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE0 = "12'b000000000000" *) (* C_RX_DELAY_VALUE1 = "12'b000000000000" *) (* C_RX_DELAY_VALUE10 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE11 = "12'b000000000000" *) (* C_RX_DELAY_VALUE12 = "12'b000000000000" *) (* C_RX_DELAY_VALUE13 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE14 = "12'b000000000000" *) (* C_RX_DELAY_VALUE15 = "12'b000000000000" *) (* C_RX_DELAY_VALUE16 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE17 = "12'b000000000000" *) (* C_RX_DELAY_VALUE18 = "12'b000000000000" *) (* C_RX_DELAY_VALUE19 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE2 = "12'b000000000000" *) (* C_RX_DELAY_VALUE20 = "12'b000000000000" *) (* C_RX_DELAY_VALUE21 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE22 = "12'b000000000000" *) (* C_RX_DELAY_VALUE23 = "12'b000000000000" *) (* C_RX_DELAY_VALUE24 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE25 = "12'b000000000000" *) (* C_RX_DELAY_VALUE26 = "12'b000000000000" *) (* C_RX_DELAY_VALUE27 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE28 = "12'b000000000000" *) (* C_RX_DELAY_VALUE29 = "12'b000000000000" *) (* C_RX_DELAY_VALUE3 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE30 = "12'b000000000000" *) (* C_RX_DELAY_VALUE31 = "12'b000000000000" *) (* C_RX_DELAY_VALUE32 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE33 = "12'b000000000000" *) (* C_RX_DELAY_VALUE34 = "12'b000000000000" *) (* C_RX_DELAY_VALUE35 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE36 = "12'b000000000000" *) (* C_RX_DELAY_VALUE37 = "12'b000000000000" *) (* C_RX_DELAY_VALUE38 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE39 = "12'b000000000000" *) (* C_RX_DELAY_VALUE4 = "12'b000000000000" *) (* C_RX_DELAY_VALUE40 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE41 = "12'b000000000000" *) (* C_RX_DELAY_VALUE42 = "12'b000000000000" *) (* C_RX_DELAY_VALUE43 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE44 = "12'b000000000000" *) (* C_RX_DELAY_VALUE45 = "12'b000000000000" *) (* C_RX_DELAY_VALUE46 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE47 = "12'b000000000000" *) (* C_RX_DELAY_VALUE48 = "12'b000000000000" *) (* C_RX_DELAY_VALUE49 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE5 = "12'b000000000000" *) (* C_RX_DELAY_VALUE50 = "12'b000000000000" *) (* C_RX_DELAY_VALUE51 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE6 = "12'b000000000000" *) (* C_RX_DELAY_VALUE7 = "12'b000000000000" *) (* C_RX_DELAY_VALUE8 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE9 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT0 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT1 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT10 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT11 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT12 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT13 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT14 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT15 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT16 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT17 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT18 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT19 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT2 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT20 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT21 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT22 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT23 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT24 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT25 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT26 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT27 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT28 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT29 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT3 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT30 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT31 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT32 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT33 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT34 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT35 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT36 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT37 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT38 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT39 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT4 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT40 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT41 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT42 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT43 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT44 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT45 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT46 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT47 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT48 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT49 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT5 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT50 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT51 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT6 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT7 = "12'b000000000000" *) 
(* C_RX_DELAY_VALUE_EXT8 = "12'b000000000000" *) (* C_RX_DELAY_VALUE_EXT9 = "12'b000000000000" *) (* C_RX_EQUALIZATION_D = "EQ_NONE" *) 
(* C_RX_EQUALIZATION_S = "NONE" *) (* C_RX_FIFO_SYNC_MODE = "FALSE" *) (* C_RX_IS_CLK_EXT_INVERTED = "1'b0" *) 
(* C_RX_IS_CLK_INVERTED = "1'b0" *) (* C_RX_IS_RST_DLY_EXT_INVERTED = "1'b0" *) (* C_RX_IS_RST_DLY_INVERTED = "1'b0" *) 
(* C_RX_IS_RST_INVERTED = "1'b0" *) (* C_RX_PIN_EN = "52'b0000000000000000000000000000000000000000000101010101" *) (* C_RX_REFCLK_FREQ = "1500.000000" *) 
(* C_RX_STROBE_EN = "16'b0000000000000011" *) (* C_SERIALIZATION_FACTOR = "8" *) (* C_SERIAL_MODE = "FALSE" *) 
(* C_SIM_DEVICE = "ULTRASCALE_PLUS_ES1" *) (* C_SIM_VERSION = "2.000000" *) (* C_SINGLE_ENDED_IO_STD = "NONE" *) 
(* C_SINGLE_ENDED_IO_TERMINATION = "NONE" *) (* C_STRB_INFO = "9 99 9 9 9 9 9 9 9 9 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99 99" *) (* C_TEMPLATE = "2" *) 
(* C_TX_BITSLICE_EN = "52'b0000000000000000000000000000000000000000000000000000" *) (* C_TX_DATA_PHASE = "0" *) (* C_TX_DELAY_FORMAT = "TIME" *) 
(* C_TX_DELAY_TYPE = "0" *) (* C_TX_DELAY_TYPE0 = "2'b00" *) (* C_TX_DELAY_TYPE1 = "2'b00" *) 
(* C_TX_DELAY_TYPE10 = "2'b00" *) (* C_TX_DELAY_TYPE11 = "2'b00" *) (* C_TX_DELAY_TYPE12 = "2'b00" *) 
(* C_TX_DELAY_TYPE13 = "2'b00" *) (* C_TX_DELAY_TYPE14 = "2'b00" *) (* C_TX_DELAY_TYPE15 = "2'b00" *) 
(* C_TX_DELAY_TYPE16 = "2'b00" *) (* C_TX_DELAY_TYPE17 = "2'b00" *) (* C_TX_DELAY_TYPE18 = "2'b00" *) 
(* C_TX_DELAY_TYPE19 = "2'b00" *) (* C_TX_DELAY_TYPE2 = "2'b00" *) (* C_TX_DELAY_TYPE20 = "2'b00" *) 
(* C_TX_DELAY_TYPE21 = "2'b00" *) (* C_TX_DELAY_TYPE22 = "2'b00" *) (* C_TX_DELAY_TYPE23 = "2'b00" *) 
(* C_TX_DELAY_TYPE24 = "2'b00" *) (* C_TX_DELAY_TYPE25 = "2'b00" *) (* C_TX_DELAY_TYPE26 = "2'b00" *) 
(* C_TX_DELAY_TYPE27 = "2'b00" *) (* C_TX_DELAY_TYPE28 = "2'b00" *) (* C_TX_DELAY_TYPE29 = "2'b00" *) 
(* C_TX_DELAY_TYPE3 = "2'b00" *) (* C_TX_DELAY_TYPE30 = "2'b00" *) (* C_TX_DELAY_TYPE31 = "2'b00" *) 
(* C_TX_DELAY_TYPE32 = "2'b00" *) (* C_TX_DELAY_TYPE33 = "2'b00" *) (* C_TX_DELAY_TYPE34 = "2'b00" *) 
(* C_TX_DELAY_TYPE35 = "2'b00" *) (* C_TX_DELAY_TYPE36 = "2'b00" *) (* C_TX_DELAY_TYPE37 = "2'b00" *) 
(* C_TX_DELAY_TYPE38 = "2'b00" *) (* C_TX_DELAY_TYPE39 = "2'b00" *) (* C_TX_DELAY_TYPE4 = "2'b00" *) 
(* C_TX_DELAY_TYPE40 = "2'b00" *) (* C_TX_DELAY_TYPE41 = "2'b00" *) (* C_TX_DELAY_TYPE42 = "2'b00" *) 
(* C_TX_DELAY_TYPE43 = "2'b00" *) (* C_TX_DELAY_TYPE44 = "2'b00" *) (* C_TX_DELAY_TYPE45 = "2'b00" *) 
(* C_TX_DELAY_TYPE46 = "2'b00" *) (* C_TX_DELAY_TYPE47 = "2'b00" *) (* C_TX_DELAY_TYPE48 = "2'b00" *) 
(* C_TX_DELAY_TYPE49 = "2'b00" *) (* C_TX_DELAY_TYPE5 = "2'b00" *) (* C_TX_DELAY_TYPE50 = "2'b00" *) 
(* C_TX_DELAY_TYPE51 = "2'b00" *) (* C_TX_DELAY_TYPE6 = "2'b00" *) (* C_TX_DELAY_TYPE7 = "2'b00" *) 
(* C_TX_DELAY_TYPE8 = "2'b00" *) (* C_TX_DELAY_TYPE9 = "2'b00" *) (* C_TX_DELAY_VALUE = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE0 = "12'b000000000000" *) (* C_TX_DELAY_VALUE1 = "12'b000000000000" *) (* C_TX_DELAY_VALUE10 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE11 = "12'b000000000000" *) (* C_TX_DELAY_VALUE12 = "12'b000000000000" *) (* C_TX_DELAY_VALUE13 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE14 = "12'b000000000000" *) (* C_TX_DELAY_VALUE15 = "12'b000000000000" *) (* C_TX_DELAY_VALUE16 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE17 = "12'b000000000000" *) (* C_TX_DELAY_VALUE18 = "12'b000000000000" *) (* C_TX_DELAY_VALUE19 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE2 = "12'b000000000000" *) (* C_TX_DELAY_VALUE20 = "12'b000000000000" *) (* C_TX_DELAY_VALUE21 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE22 = "12'b000000000000" *) (* C_TX_DELAY_VALUE23 = "12'b000000000000" *) (* C_TX_DELAY_VALUE24 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE25 = "12'b000000000000" *) (* C_TX_DELAY_VALUE26 = "12'b000000000000" *) (* C_TX_DELAY_VALUE27 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE28 = "12'b000000000000" *) (* C_TX_DELAY_VALUE29 = "12'b000000000000" *) (* C_TX_DELAY_VALUE3 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE30 = "12'b000000000000" *) (* C_TX_DELAY_VALUE31 = "12'b000000000000" *) (* C_TX_DELAY_VALUE32 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE33 = "12'b000000000000" *) (* C_TX_DELAY_VALUE34 = "12'b000000000000" *) (* C_TX_DELAY_VALUE35 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE36 = "12'b000000000000" *) (* C_TX_DELAY_VALUE37 = "12'b000000000000" *) (* C_TX_DELAY_VALUE38 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE39 = "12'b000000000000" *) (* C_TX_DELAY_VALUE4 = "12'b000000000000" *) (* C_TX_DELAY_VALUE40 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE41 = "12'b000000000000" *) (* C_TX_DELAY_VALUE42 = "12'b000000000000" *) (* C_TX_DELAY_VALUE43 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE44 = "12'b000000000000" *) (* C_TX_DELAY_VALUE45 = "12'b000000000000" *) (* C_TX_DELAY_VALUE46 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE47 = "12'b000000000000" *) (* C_TX_DELAY_VALUE48 = "12'b000000000000" *) (* C_TX_DELAY_VALUE49 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE5 = "12'b000000000000" *) (* C_TX_DELAY_VALUE50 = "12'b000000000000" *) (* C_TX_DELAY_VALUE51 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE6 = "12'b000000000000" *) (* C_TX_DELAY_VALUE7 = "12'b000000000000" *) (* C_TX_DELAY_VALUE8 = "12'b000000000000" *) 
(* C_TX_DELAY_VALUE9 = "12'b000000000000" *) (* C_TX_DRIVE_D = "NONE" *) (* C_TX_DRIVE_S = "NONE" *) 
(* C_TX_IS_CLK_INVERTED = "1'b0" *) (* C_TX_IS_RST_DLY_INVERTED = "1'b0" *) (* C_TX_IS_RST_INVERTED = "1'b0" *) 
(* C_TX_NATIVE_ODELAY_BYPASS = "FALSE" *) (* C_TX_PRE_EMPHASIS_D = "NONE" *) (* C_TX_PRE_EMPHASIS_S = "NONE" *) 
(* C_TX_REFCLK_FREQ = "1500.000000" *) (* C_TX_SLEW_D = "NONE" *) (* C_TX_SLEW_S = "NONE" *) 
(* C_TX_TRI_DELAY_FORMAT = "TIME" *) (* C_TX_TRI_INIT = "1'b1" *) (* C_TX_TRI_IS_CLK_INVERTED = "1'b0" *) 
(* C_TX_TRI_IS_RST_DLY_INVERTED = "1'b0" *) (* C_TX_TRI_IS_RST_INVERTED = "1'b0" *) (* C_TX_TRI_NATIVE_ODELAY_BYPASS = "FALSE" *) 
(* C_TX_TRI_OUTPUT_PHASE_90 = "FALSE" *) (* TX_BITSLICE_TRI_EN = "8'b00000000" *) (* downgradeipidentifiedwarnings = "yes" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_hssio_rx_high_speed_selectio_wiz_v3_6_10
   (daddr,
    dclk,
    den,
    di,
    dwe,
    do_out,
    drdy,
    clk_p,
    clk_n,
    clk,
    riu_clk,
    app_clk,
    bs_rst_dphy_in,
    rst_seq_done,
    pll0_clkout0,
    pll0_locked,
    pll0_clkout1,
    pll1_clkout0,
    pll1_locked,
    intf_rdy,
    multi_intf_lock_in,
    shared_pll0_clkout0_in,
    shared_pll1_clkout0_in,
    shared_pll0_clkoutphy_in,
    shared_pll1_clkoutphy_in,
    shared_pll0_locked_in,
    shared_pll1_locked_in,
    shared_pll0_clkoutphy_out,
    shared_pll1_clkoutphy_out,
    clk_from_ibuf,
    lptx_t,
    lptx_i_p,
    lptx_i_n,
    hs_rx_disable,
    lp_rx_disable,
    lp_rx_o_p,
    lp_rx_o_n,
    dly_rdy_bsc0,
    vtc_rdy_bsc0,
    en_vtc_bsc0,
    phy_rden_bsc0,
    dly_rdy_bsc1,
    vtc_rdy_bsc1,
    en_vtc_bsc1,
    phy_rden_bsc1,
    dly_rdy_bsc2,
    vtc_rdy_bsc2,
    en_vtc_bsc2,
    phy_rden_bsc2,
    dly_rdy_bsc3,
    vtc_rdy_bsc3,
    en_vtc_bsc3,
    phy_rden_bsc3,
    dly_rdy_bsc4,
    vtc_rdy_bsc4,
    en_vtc_bsc4,
    phy_rden_bsc4,
    dly_rdy_bsc5,
    vtc_rdy_bsc5,
    en_vtc_bsc5,
    phy_rden_bsc5,
    dly_rdy_bsc6,
    vtc_rdy_bsc6,
    en_vtc_bsc6,
    phy_rden_bsc6,
    dly_rdy_bsc7,
    vtc_rdy_bsc7,
    en_vtc_bsc7,
    phy_rden_bsc7,
    riu_addr_bg0,
    riu_nibble_sel_bg0,
    riu_wr_data_bg0,
    riu_wr_en_bg0,
    riu_rd_data_bg0,
    riu_valid_bg0,
    riu_addr_bg0_bs0,
    riu_nibble_sel_bg0_bs0,
    riu_wr_data_bg0_bs0,
    riu_wr_en_bg0_bs0,
    riu_rd_data_bg0_bs0,
    riu_valid_bg0_bs0,
    riu_addr_bg0_bs1,
    riu_nibble_sel_bg0_bs1,
    riu_wr_data_bg0_bs1,
    riu_wr_en_bg0_bs1,
    riu_rd_data_bg0_bs1,
    riu_valid_bg0_bs1,
    riu_addr_bg1,
    riu_nibble_sel_bg1,
    riu_wr_data_bg1,
    riu_wr_en_bg1,
    riu_rd_data_bg1,
    riu_valid_bg1,
    riu_addr_bg1_bs2,
    riu_nibble_sel_bg1_bs2,
    riu_wr_data_bg1_bs2,
    riu_wr_en_bg1_bs2,
    riu_rd_data_bg1_bs2,
    riu_valid_bg1_bs2,
    riu_addr_bg1_bs3,
    riu_nibble_sel_bg1_bs3,
    riu_wr_data_bg1_bs3,
    riu_wr_en_bg1_bs3,
    riu_rd_data_bg1_bs3,
    riu_valid_bg1_bs3,
    riu_addr_bg2,
    riu_nibble_sel_bg2,
    riu_wr_data_bg2,
    riu_wr_en_bg2,
    riu_rd_data_bg2,
    riu_valid_bg2,
    riu_addr_bg2_bs4,
    riu_nibble_sel_bg2_bs4,
    riu_wr_data_bg2_bs4,
    riu_wr_en_bg2_bs4,
    riu_rd_data_bg2_bs4,
    riu_valid_bg2_bs4,
    riu_addr_bg2_bs5,
    riu_nibble_sel_bg2_bs5,
    riu_wr_data_bg2_bs5,
    riu_wr_en_bg2_bs5,
    riu_rd_data_bg2_bs5,
    riu_valid_bg2_bs5,
    riu_addr_bg3,
    riu_nibble_sel_bg3,
    riu_wr_data_bg3,
    riu_wr_en_bg3,
    riu_rd_data_bg3,
    riu_valid_bg3,
    riu_addr_bg3_bs6,
    riu_nibble_sel_bg3_bs6,
    riu_wr_data_bg3_bs6,
    riu_wr_en_bg3_bs6,
    riu_rd_data_bg3_bs6,
    riu_valid_bg3_bs6,
    riu_addr_bg3_bs7,
    riu_nibble_sel_bg3_bs7,
    riu_wr_data_bg3_bs7,
    riu_wr_en_bg3_bs7,
    riu_rd_data_bg3_bs7,
    riu_valid_bg3_bs7,
    tx_clk,
    rx_clk,
    bidir_tx_clk,
    bidir_rx_clk,
    bidir_tx_bs_tri_clk,
    bg0_pin0_nc,
    bg0_pin6_nc,
    bg1_pin0_nc,
    bg1_pin6_nc,
    bg2_pin0_nc,
    bg2_pin6_nc,
    bg3_pin0_nc,
    bg3_pin6_nc,
    start_bitslip,
    rx_bitslip_sync_done,
    rxtx_bitslip_sync_done,
    clk_rxp,
    data_to_fabric_clk_rxp,
    tri_t_0,
    tx_cntvaluein_0,
    tx_cntvalueout_0,
    tx_ce_0,
    tx_en_vtc_0,
    tx_inc_0,
    tx_load_0,
    rx_cntvalueout_0,
    rx_cntvaluein_0,
    rx_ce_0,
    rx_en_vtc_0,
    rx_inc_0,
    rx_load_0,
    rx_cntvalueout_ext_0,
    rx_cntvaluein_ext_0,
    rx_ce_ext_0,
    rx_en_vtc_ext_0,
    rx_inc_ext_0,
    rx_load_ext_0,
    fifo_empty_0,
    fifo_rd_clk_0,
    fifo_rd_en_0,
    bitslip_error_0,
    clk_rxn,
    data_to_fabric_clk_rxn,
    tri_t_1,
    tx_cntvaluein_1,
    tx_cntvalueout_1,
    tx_ce_1,
    tx_en_vtc_1,
    tx_inc_1,
    tx_load_1,
    rx_cntvalueout_1,
    rx_cntvaluein_1,
    rx_ce_1,
    rx_en_vtc_1,
    rx_inc_1,
    rx_load_1,
    rx_cntvalueout_ext_1,
    rx_cntvaluein_ext_1,
    rx_ce_ext_1,
    rx_en_vtc_ext_1,
    rx_inc_ext_1,
    rx_load_ext_1,
    fifo_empty_1,
    fifo_rd_clk_1,
    fifo_rd_en_1,
    bitslip_error_1,
    data_rxp0,
    data_to_fabric_data_rxp0,
    tri_t_2,
    tx_cntvaluein_2,
    tx_cntvalueout_2,
    tx_ce_2,
    tx_en_vtc_2,
    tx_inc_2,
    tx_load_2,
    rx_cntvalueout_2,
    rx_cntvaluein_2,
    rx_ce_2,
    rx_en_vtc_2,
    rx_inc_2,
    rx_load_2,
    rx_cntvalueout_ext_2,
    rx_cntvaluein_ext_2,
    rx_ce_ext_2,
    rx_en_vtc_ext_2,
    rx_inc_ext_2,
    rx_load_ext_2,
    fifo_empty_2,
    fifo_rd_clk_2,
    fifo_rd_en_2,
    bitslip_error_2,
    data_rxn0,
    data_to_fabric_data_rxn0,
    tri_t_3,
    tx_cntvaluein_3,
    tx_cntvalueout_3,
    tx_ce_3,
    tx_en_vtc_3,
    tx_inc_3,
    tx_load_3,
    rx_cntvalueout_3,
    rx_cntvaluein_3,
    rx_ce_3,
    rx_en_vtc_3,
    rx_inc_3,
    rx_load_3,
    rx_cntvalueout_ext_3,
    rx_cntvaluein_ext_3,
    rx_ce_ext_3,
    rx_en_vtc_ext_3,
    rx_inc_ext_3,
    rx_load_ext_3,
    fifo_empty_3,
    fifo_rd_clk_3,
    fifo_rd_en_3,
    bitslip_error_3,
    data_rxp1,
    data_to_fabric_data_rxp1,
    tri_t_4,
    tx_cntvaluein_4,
    tx_cntvalueout_4,
    tx_ce_4,
    tx_en_vtc_4,
    tx_inc_4,
    tx_load_4,
    rx_cntvalueout_4,
    rx_cntvaluein_4,
    rx_ce_4,
    rx_en_vtc_4,
    rx_inc_4,
    rx_load_4,
    rx_cntvalueout_ext_4,
    rx_cntvaluein_ext_4,
    rx_ce_ext_4,
    rx_en_vtc_ext_4,
    rx_inc_ext_4,
    rx_load_ext_4,
    fifo_empty_4,
    fifo_rd_clk_4,
    fifo_rd_en_4,
    bitslip_error_4,
    data_rxn1,
    data_to_fabric_data_rxn1,
    tri_t_5,
    tx_cntvaluein_5,
    tx_cntvalueout_5,
    tx_ce_5,
    tx_en_vtc_5,
    tx_inc_5,
    tx_load_5,
    rx_cntvalueout_5,
    rx_cntvaluein_5,
    rx_ce_5,
    rx_en_vtc_5,
    rx_inc_5,
    rx_load_5,
    rx_cntvalueout_ext_5,
    rx_cntvaluein_ext_5,
    rx_ce_ext_5,
    rx_en_vtc_ext_5,
    rx_inc_ext_5,
    rx_load_ext_5,
    fifo_empty_5,
    fifo_rd_clk_5,
    fifo_rd_en_5,
    bitslip_error_5,
    data_rxp2,
    data_to_fabric_data_rxp2,
    tri_t_6,
    tx_cntvaluein_6,
    tx_cntvalueout_6,
    tx_ce_6,
    tx_en_vtc_6,
    tx_inc_6,
    tx_load_6,
    rx_cntvalueout_6,
    rx_cntvaluein_6,
    rx_ce_6,
    rx_en_vtc_6,
    rx_inc_6,
    rx_load_6,
    rx_cntvalueout_ext_6,
    rx_cntvaluein_ext_6,
    rx_ce_ext_6,
    rx_en_vtc_ext_6,
    rx_inc_ext_6,
    rx_load_ext_6,
    fifo_empty_6,
    fifo_rd_clk_6,
    fifo_rd_en_6,
    bitslip_error_6,
    data_rxn2,
    data_to_fabric_data_rxn2,
    tri_t_7,
    tx_cntvaluein_7,
    tx_cntvalueout_7,
    tx_ce_7,
    tx_en_vtc_7,
    tx_inc_7,
    tx_load_7,
    rx_cntvalueout_7,
    rx_cntvaluein_7,
    rx_ce_7,
    rx_en_vtc_7,
    rx_inc_7,
    rx_load_7,
    rx_cntvalueout_ext_7,
    rx_cntvaluein_ext_7,
    rx_ce_ext_7,
    rx_en_vtc_ext_7,
    rx_inc_ext_7,
    rx_load_ext_7,
    fifo_empty_7,
    fifo_rd_clk_7,
    fifo_rd_en_7,
    bitslip_error_7,
    data_rxp3,
    data_to_fabric_data_rxp3,
    tri_t_8,
    tx_cntvaluein_8,
    tx_cntvalueout_8,
    tx_ce_8,
    tx_en_vtc_8,
    tx_inc_8,
    tx_load_8,
    rx_cntvalueout_8,
    rx_cntvaluein_8,
    rx_ce_8,
    rx_en_vtc_8,
    rx_inc_8,
    rx_load_8,
    rx_cntvalueout_ext_8,
    rx_cntvaluein_ext_8,
    rx_ce_ext_8,
    rx_en_vtc_ext_8,
    rx_inc_ext_8,
    rx_load_ext_8,
    fifo_empty_8,
    fifo_rd_clk_8,
    fifo_rd_en_8,
    bitslip_error_8,
    data_rxn3,
    data_to_fabric_data_rxn3,
    tri_t_9,
    tx_cntvaluein_9,
    tx_cntvalueout_9,
    tx_ce_9,
    tx_en_vtc_9,
    tx_inc_9,
    tx_load_9,
    rx_cntvalueout_9,
    rx_cntvaluein_9,
    rx_ce_9,
    rx_en_vtc_9,
    rx_inc_9,
    rx_load_9,
    rx_cntvalueout_ext_9,
    rx_cntvaluein_ext_9,
    rx_ce_ext_9,
    rx_en_vtc_ext_9,
    rx_inc_ext_9,
    rx_load_ext_9,
    fifo_empty_9,
    fifo_rd_clk_9,
    fifo_rd_en_9,
    bitslip_error_9,
    tri_t_10,
    tx_cntvaluein_10,
    tx_cntvalueout_10,
    tx_ce_10,
    tx_en_vtc_10,
    tx_inc_10,
    tx_load_10,
    rx_cntvalueout_10,
    rx_cntvaluein_10,
    rx_ce_10,
    rx_en_vtc_10,
    rx_inc_10,
    rx_load_10,
    rx_cntvalueout_ext_10,
    rx_cntvaluein_ext_10,
    rx_ce_ext_10,
    rx_en_vtc_ext_10,
    rx_inc_ext_10,
    rx_load_ext_10,
    fifo_empty_10,
    fifo_rd_clk_10,
    fifo_rd_en_10,
    bitslip_error_10,
    tri_t_11,
    tx_cntvaluein_11,
    tx_cntvalueout_11,
    tx_ce_11,
    tx_en_vtc_11,
    tx_inc_11,
    tx_load_11,
    rx_cntvalueout_11,
    rx_cntvaluein_11,
    rx_ce_11,
    rx_en_vtc_11,
    rx_inc_11,
    rx_load_11,
    rx_cntvalueout_ext_11,
    rx_cntvaluein_ext_11,
    rx_ce_ext_11,
    rx_en_vtc_ext_11,
    rx_inc_ext_11,
    rx_load_ext_11,
    fifo_empty_11,
    fifo_rd_clk_11,
    fifo_rd_en_11,
    bitslip_error_11,
    tri_t_12,
    tx_cntvaluein_12,
    tx_cntvalueout_12,
    tx_ce_12,
    tx_en_vtc_12,
    tx_inc_12,
    tx_load_12,
    rx_cntvalueout_12,
    rx_cntvaluein_12,
    rx_ce_12,
    rx_en_vtc_12,
    rx_inc_12,
    rx_load_12,
    rx_cntvalueout_ext_12,
    rx_cntvaluein_ext_12,
    rx_ce_ext_12,
    rx_en_vtc_ext_12,
    rx_inc_ext_12,
    rx_load_ext_12,
    fifo_empty_12,
    fifo_rd_clk_12,
    fifo_rd_en_12,
    bitslip_error_12,
    tri_t_13,
    tx_cntvaluein_13,
    tx_cntvalueout_13,
    tx_ce_13,
    tx_en_vtc_13,
    tx_inc_13,
    tx_load_13,
    rx_cntvalueout_13,
    rx_cntvaluein_13,
    rx_ce_13,
    rx_en_vtc_13,
    rx_inc_13,
    rx_load_13,
    rx_cntvalueout_ext_13,
    rx_cntvaluein_ext_13,
    rx_ce_ext_13,
    rx_en_vtc_ext_13,
    rx_inc_ext_13,
    rx_load_ext_13,
    fifo_empty_13,
    fifo_rd_clk_13,
    fifo_rd_en_13,
    bitslip_error_13,
    tri_t_14,
    tx_cntvaluein_14,
    tx_cntvalueout_14,
    tx_ce_14,
    tx_en_vtc_14,
    tx_inc_14,
    tx_load_14,
    rx_cntvalueout_14,
    rx_cntvaluein_14,
    rx_ce_14,
    rx_en_vtc_14,
    rx_inc_14,
    rx_load_14,
    rx_cntvalueout_ext_14,
    rx_cntvaluein_ext_14,
    rx_ce_ext_14,
    rx_en_vtc_ext_14,
    rx_inc_ext_14,
    rx_load_ext_14,
    fifo_empty_14,
    fifo_rd_clk_14,
    fifo_rd_en_14,
    bitslip_error_14,
    tri_t_15,
    tx_cntvaluein_15,
    tx_cntvalueout_15,
    tx_ce_15,
    tx_en_vtc_15,
    tx_inc_15,
    tx_load_15,
    rx_cntvalueout_15,
    rx_cntvaluein_15,
    rx_ce_15,
    rx_en_vtc_15,
    rx_inc_15,
    rx_load_15,
    rx_cntvalueout_ext_15,
    rx_cntvaluein_ext_15,
    rx_ce_ext_15,
    rx_en_vtc_ext_15,
    rx_inc_ext_15,
    rx_load_ext_15,
    fifo_empty_15,
    fifo_rd_clk_15,
    fifo_rd_en_15,
    bitslip_error_15,
    tri_t_16,
    tx_cntvaluein_16,
    tx_cntvalueout_16,
    tx_ce_16,
    tx_en_vtc_16,
    tx_inc_16,
    tx_load_16,
    rx_cntvalueout_16,
    rx_cntvaluein_16,
    rx_ce_16,
    rx_en_vtc_16,
    rx_inc_16,
    rx_load_16,
    rx_cntvalueout_ext_16,
    rx_cntvaluein_ext_16,
    rx_ce_ext_16,
    rx_en_vtc_ext_16,
    rx_inc_ext_16,
    rx_load_ext_16,
    fifo_empty_16,
    fifo_rd_clk_16,
    fifo_rd_en_16,
    bitslip_error_16,
    tri_t_17,
    tx_cntvaluein_17,
    tx_cntvalueout_17,
    tx_ce_17,
    tx_en_vtc_17,
    tx_inc_17,
    tx_load_17,
    rx_cntvalueout_17,
    rx_cntvaluein_17,
    rx_ce_17,
    rx_en_vtc_17,
    rx_inc_17,
    rx_load_17,
    rx_cntvalueout_ext_17,
    rx_cntvaluein_ext_17,
    rx_ce_ext_17,
    rx_en_vtc_ext_17,
    rx_inc_ext_17,
    rx_load_ext_17,
    fifo_empty_17,
    fifo_rd_clk_17,
    fifo_rd_en_17,
    bitslip_error_17,
    tri_t_18,
    tx_cntvaluein_18,
    tx_cntvalueout_18,
    tx_ce_18,
    tx_en_vtc_18,
    tx_inc_18,
    tx_load_18,
    rx_cntvalueout_18,
    rx_cntvaluein_18,
    rx_ce_18,
    rx_en_vtc_18,
    rx_inc_18,
    rx_load_18,
    rx_cntvalueout_ext_18,
    rx_cntvaluein_ext_18,
    rx_ce_ext_18,
    rx_en_vtc_ext_18,
    rx_inc_ext_18,
    rx_load_ext_18,
    fifo_empty_18,
    fifo_rd_clk_18,
    fifo_rd_en_18,
    bitslip_error_18,
    tri_t_19,
    tx_cntvaluein_19,
    tx_cntvalueout_19,
    tx_ce_19,
    tx_en_vtc_19,
    tx_inc_19,
    tx_load_19,
    rx_cntvalueout_19,
    rx_cntvaluein_19,
    rx_ce_19,
    rx_en_vtc_19,
    rx_inc_19,
    rx_load_19,
    rx_cntvalueout_ext_19,
    rx_cntvaluein_ext_19,
    rx_ce_ext_19,
    rx_en_vtc_ext_19,
    rx_inc_ext_19,
    rx_load_ext_19,
    fifo_empty_19,
    fifo_rd_clk_19,
    fifo_rd_en_19,
    bitslip_error_19,
    tri_t_20,
    tx_cntvaluein_20,
    tx_cntvalueout_20,
    tx_ce_20,
    tx_en_vtc_20,
    tx_inc_20,
    tx_load_20,
    rx_cntvalueout_20,
    rx_cntvaluein_20,
    rx_ce_20,
    rx_en_vtc_20,
    rx_inc_20,
    rx_load_20,
    rx_cntvalueout_ext_20,
    rx_cntvaluein_ext_20,
    rx_ce_ext_20,
    rx_en_vtc_ext_20,
    rx_inc_ext_20,
    rx_load_ext_20,
    fifo_empty_20,
    fifo_rd_clk_20,
    fifo_rd_en_20,
    bitslip_error_20,
    tri_t_21,
    tx_cntvaluein_21,
    tx_cntvalueout_21,
    tx_ce_21,
    tx_en_vtc_21,
    tx_inc_21,
    tx_load_21,
    rx_cntvalueout_21,
    rx_cntvaluein_21,
    rx_ce_21,
    rx_en_vtc_21,
    rx_inc_21,
    rx_load_21,
    rx_cntvalueout_ext_21,
    rx_cntvaluein_ext_21,
    rx_ce_ext_21,
    rx_en_vtc_ext_21,
    rx_inc_ext_21,
    rx_load_ext_21,
    fifo_empty_21,
    fifo_rd_clk_21,
    fifo_rd_en_21,
    bitslip_error_21,
    tri_t_22,
    tx_cntvaluein_22,
    tx_cntvalueout_22,
    tx_ce_22,
    tx_en_vtc_22,
    tx_inc_22,
    tx_load_22,
    rx_cntvalueout_22,
    rx_cntvaluein_22,
    rx_ce_22,
    rx_en_vtc_22,
    rx_inc_22,
    rx_load_22,
    rx_cntvalueout_ext_22,
    rx_cntvaluein_ext_22,
    rx_ce_ext_22,
    rx_en_vtc_ext_22,
    rx_inc_ext_22,
    rx_load_ext_22,
    fifo_empty_22,
    fifo_rd_clk_22,
    fifo_rd_en_22,
    bitslip_error_22,
    tri_t_23,
    tx_cntvaluein_23,
    tx_cntvalueout_23,
    tx_ce_23,
    tx_en_vtc_23,
    tx_inc_23,
    tx_load_23,
    rx_cntvalueout_23,
    rx_cntvaluein_23,
    rx_ce_23,
    rx_en_vtc_23,
    rx_inc_23,
    rx_load_23,
    rx_cntvalueout_ext_23,
    rx_cntvaluein_ext_23,
    rx_ce_ext_23,
    rx_en_vtc_ext_23,
    rx_inc_ext_23,
    rx_load_ext_23,
    fifo_empty_23,
    fifo_rd_clk_23,
    fifo_rd_en_23,
    bitslip_error_23,
    tri_t_24,
    tx_cntvaluein_24,
    tx_cntvalueout_24,
    tx_ce_24,
    tx_en_vtc_24,
    tx_inc_24,
    tx_load_24,
    rx_cntvalueout_24,
    rx_cntvaluein_24,
    rx_ce_24,
    rx_en_vtc_24,
    rx_inc_24,
    rx_load_24,
    rx_cntvalueout_ext_24,
    rx_cntvaluein_ext_24,
    rx_ce_ext_24,
    rx_en_vtc_ext_24,
    rx_inc_ext_24,
    rx_load_ext_24,
    fifo_empty_24,
    fifo_rd_clk_24,
    fifo_rd_en_24,
    bitslip_error_24,
    tri_t_25,
    tx_cntvaluein_25,
    tx_cntvalueout_25,
    tx_ce_25,
    tx_en_vtc_25,
    tx_inc_25,
    tx_load_25,
    rx_cntvalueout_25,
    rx_cntvaluein_25,
    rx_ce_25,
    rx_en_vtc_25,
    rx_inc_25,
    rx_load_25,
    rx_cntvalueout_ext_25,
    rx_cntvaluein_ext_25,
    rx_ce_ext_25,
    rx_en_vtc_ext_25,
    rx_inc_ext_25,
    rx_load_ext_25,
    fifo_empty_25,
    fifo_rd_clk_25,
    fifo_rd_en_25,
    bitslip_error_25,
    tri_t_26,
    tx_cntvaluein_26,
    tx_cntvalueout_26,
    tx_ce_26,
    tx_en_vtc_26,
    tx_inc_26,
    tx_load_26,
    rx_cntvalueout_26,
    rx_cntvaluein_26,
    rx_ce_26,
    rx_en_vtc_26,
    rx_inc_26,
    rx_load_26,
    rx_cntvalueout_ext_26,
    rx_cntvaluein_ext_26,
    rx_ce_ext_26,
    rx_en_vtc_ext_26,
    rx_inc_ext_26,
    rx_load_ext_26,
    fifo_empty_26,
    fifo_rd_clk_26,
    fifo_rd_en_26,
    bitslip_error_26,
    tri_t_27,
    tx_cntvaluein_27,
    tx_cntvalueout_27,
    tx_ce_27,
    tx_en_vtc_27,
    tx_inc_27,
    tx_load_27,
    rx_cntvalueout_27,
    rx_cntvaluein_27,
    rx_ce_27,
    rx_en_vtc_27,
    rx_inc_27,
    rx_load_27,
    rx_cntvalueout_ext_27,
    rx_cntvaluein_ext_27,
    rx_ce_ext_27,
    rx_en_vtc_ext_27,
    rx_inc_ext_27,
    rx_load_ext_27,
    fifo_empty_27,
    fifo_rd_clk_27,
    fifo_rd_en_27,
    bitslip_error_27,
    tri_t_28,
    tx_cntvaluein_28,
    tx_cntvalueout_28,
    tx_ce_28,
    tx_en_vtc_28,
    tx_inc_28,
    tx_load_28,
    rx_cntvalueout_28,
    rx_cntvaluein_28,
    rx_ce_28,
    rx_en_vtc_28,
    rx_inc_28,
    rx_load_28,
    rx_cntvalueout_ext_28,
    rx_cntvaluein_ext_28,
    rx_ce_ext_28,
    rx_en_vtc_ext_28,
    rx_inc_ext_28,
    rx_load_ext_28,
    fifo_empty_28,
    fifo_rd_clk_28,
    fifo_rd_en_28,
    bitslip_error_28,
    tri_t_29,
    tx_cntvaluein_29,
    tx_cntvalueout_29,
    tx_ce_29,
    tx_en_vtc_29,
    tx_inc_29,
    tx_load_29,
    rx_cntvalueout_29,
    rx_cntvaluein_29,
    rx_ce_29,
    rx_en_vtc_29,
    rx_inc_29,
    rx_load_29,
    rx_cntvalueout_ext_29,
    rx_cntvaluein_ext_29,
    rx_ce_ext_29,
    rx_en_vtc_ext_29,
    rx_inc_ext_29,
    rx_load_ext_29,
    fifo_empty_29,
    fifo_rd_clk_29,
    fifo_rd_en_29,
    bitslip_error_29,
    tri_t_30,
    tx_cntvaluein_30,
    tx_cntvalueout_30,
    tx_ce_30,
    tx_en_vtc_30,
    tx_inc_30,
    tx_load_30,
    rx_cntvalueout_30,
    rx_cntvaluein_30,
    rx_ce_30,
    rx_en_vtc_30,
    rx_inc_30,
    rx_load_30,
    rx_cntvalueout_ext_30,
    rx_cntvaluein_ext_30,
    rx_ce_ext_30,
    rx_en_vtc_ext_30,
    rx_inc_ext_30,
    rx_load_ext_30,
    fifo_empty_30,
    fifo_rd_clk_30,
    fifo_rd_en_30,
    bitslip_error_30,
    tri_t_31,
    tx_cntvaluein_31,
    tx_cntvalueout_31,
    tx_ce_31,
    tx_en_vtc_31,
    tx_inc_31,
    tx_load_31,
    rx_cntvalueout_31,
    rx_cntvaluein_31,
    rx_ce_31,
    rx_en_vtc_31,
    rx_inc_31,
    rx_load_31,
    rx_cntvalueout_ext_31,
    rx_cntvaluein_ext_31,
    rx_ce_ext_31,
    rx_en_vtc_ext_31,
    rx_inc_ext_31,
    rx_load_ext_31,
    fifo_empty_31,
    fifo_rd_clk_31,
    fifo_rd_en_31,
    bitslip_error_31,
    tri_t_32,
    tx_cntvaluein_32,
    tx_cntvalueout_32,
    tx_ce_32,
    tx_en_vtc_32,
    tx_inc_32,
    tx_load_32,
    rx_cntvalueout_32,
    rx_cntvaluein_32,
    rx_ce_32,
    rx_en_vtc_32,
    rx_inc_32,
    rx_load_32,
    rx_cntvalueout_ext_32,
    rx_cntvaluein_ext_32,
    rx_ce_ext_32,
    rx_en_vtc_ext_32,
    rx_inc_ext_32,
    rx_load_ext_32,
    fifo_empty_32,
    fifo_rd_clk_32,
    fifo_rd_en_32,
    bitslip_error_32,
    tri_t_33,
    tx_cntvaluein_33,
    tx_cntvalueout_33,
    tx_ce_33,
    tx_en_vtc_33,
    tx_inc_33,
    tx_load_33,
    rx_cntvalueout_33,
    rx_cntvaluein_33,
    rx_ce_33,
    rx_en_vtc_33,
    rx_inc_33,
    rx_load_33,
    rx_cntvalueout_ext_33,
    rx_cntvaluein_ext_33,
    rx_ce_ext_33,
    rx_en_vtc_ext_33,
    rx_inc_ext_33,
    rx_load_ext_33,
    fifo_empty_33,
    fifo_rd_clk_33,
    fifo_rd_en_33,
    bitslip_error_33,
    tri_t_34,
    tx_cntvaluein_34,
    tx_cntvalueout_34,
    tx_ce_34,
    tx_en_vtc_34,
    tx_inc_34,
    tx_load_34,
    rx_cntvalueout_34,
    rx_cntvaluein_34,
    rx_ce_34,
    rx_en_vtc_34,
    rx_inc_34,
    rx_load_34,
    rx_cntvalueout_ext_34,
    rx_cntvaluein_ext_34,
    rx_ce_ext_34,
    rx_en_vtc_ext_34,
    rx_inc_ext_34,
    rx_load_ext_34,
    fifo_empty_34,
    fifo_rd_clk_34,
    fifo_rd_en_34,
    bitslip_error_34,
    tri_t_35,
    tx_cntvaluein_35,
    tx_cntvalueout_35,
    tx_ce_35,
    tx_en_vtc_35,
    tx_inc_35,
    tx_load_35,
    rx_cntvalueout_35,
    rx_cntvaluein_35,
    rx_ce_35,
    rx_en_vtc_35,
    rx_inc_35,
    rx_load_35,
    rx_cntvalueout_ext_35,
    rx_cntvaluein_ext_35,
    rx_ce_ext_35,
    rx_en_vtc_ext_35,
    rx_inc_ext_35,
    rx_load_ext_35,
    fifo_empty_35,
    fifo_rd_clk_35,
    fifo_rd_en_35,
    bitslip_error_35,
    tri_t_36,
    tx_cntvaluein_36,
    tx_cntvalueout_36,
    tx_ce_36,
    tx_en_vtc_36,
    tx_inc_36,
    tx_load_36,
    rx_cntvalueout_36,
    rx_cntvaluein_36,
    rx_ce_36,
    rx_en_vtc_36,
    rx_inc_36,
    rx_load_36,
    rx_cntvalueout_ext_36,
    rx_cntvaluein_ext_36,
    rx_ce_ext_36,
    rx_en_vtc_ext_36,
    rx_inc_ext_36,
    rx_load_ext_36,
    fifo_empty_36,
    fifo_rd_clk_36,
    fifo_rd_en_36,
    bitslip_error_36,
    tri_t_37,
    tx_cntvaluein_37,
    tx_cntvalueout_37,
    tx_ce_37,
    tx_en_vtc_37,
    tx_inc_37,
    tx_load_37,
    rx_cntvalueout_37,
    rx_cntvaluein_37,
    rx_ce_37,
    rx_en_vtc_37,
    rx_inc_37,
    rx_load_37,
    rx_cntvalueout_ext_37,
    rx_cntvaluein_ext_37,
    rx_ce_ext_37,
    rx_en_vtc_ext_37,
    rx_inc_ext_37,
    rx_load_ext_37,
    fifo_empty_37,
    fifo_rd_clk_37,
    fifo_rd_en_37,
    bitslip_error_37,
    tri_t_38,
    tx_cntvaluein_38,
    tx_cntvalueout_38,
    tx_ce_38,
    tx_en_vtc_38,
    tx_inc_38,
    tx_load_38,
    rx_cntvalueout_38,
    rx_cntvaluein_38,
    rx_ce_38,
    rx_en_vtc_38,
    rx_inc_38,
    rx_load_38,
    rx_cntvalueout_ext_38,
    rx_cntvaluein_ext_38,
    rx_ce_ext_38,
    rx_en_vtc_ext_38,
    rx_inc_ext_38,
    rx_load_ext_38,
    fifo_empty_38,
    fifo_rd_clk_38,
    fifo_rd_en_38,
    bitslip_error_38,
    tri_t_39,
    tx_cntvaluein_39,
    tx_cntvalueout_39,
    tx_ce_39,
    tx_en_vtc_39,
    tx_inc_39,
    tx_load_39,
    rx_cntvalueout_39,
    rx_cntvaluein_39,
    rx_ce_39,
    rx_en_vtc_39,
    rx_inc_39,
    rx_load_39,
    rx_cntvalueout_ext_39,
    rx_cntvaluein_ext_39,
    rx_ce_ext_39,
    rx_en_vtc_ext_39,
    rx_inc_ext_39,
    rx_load_ext_39,
    fifo_empty_39,
    fifo_rd_clk_39,
    fifo_rd_en_39,
    bitslip_error_39,
    tri_t_40,
    tx_cntvaluein_40,
    tx_cntvalueout_40,
    tx_ce_40,
    tx_en_vtc_40,
    tx_inc_40,
    tx_load_40,
    rx_cntvalueout_40,
    rx_cntvaluein_40,
    rx_ce_40,
    rx_en_vtc_40,
    rx_inc_40,
    rx_load_40,
    rx_cntvalueout_ext_40,
    rx_cntvaluein_ext_40,
    rx_ce_ext_40,
    rx_en_vtc_ext_40,
    rx_inc_ext_40,
    rx_load_ext_40,
    fifo_empty_40,
    fifo_rd_clk_40,
    fifo_rd_en_40,
    bitslip_error_40,
    tri_t_41,
    tx_cntvaluein_41,
    tx_cntvalueout_41,
    tx_ce_41,
    tx_en_vtc_41,
    tx_inc_41,
    tx_load_41,
    rx_cntvalueout_41,
    rx_cntvaluein_41,
    rx_ce_41,
    rx_en_vtc_41,
    rx_inc_41,
    rx_load_41,
    rx_cntvalueout_ext_41,
    rx_cntvaluein_ext_41,
    rx_ce_ext_41,
    rx_en_vtc_ext_41,
    rx_inc_ext_41,
    rx_load_ext_41,
    fifo_empty_41,
    fifo_rd_clk_41,
    fifo_rd_en_41,
    bitslip_error_41,
    tri_t_42,
    tx_cntvaluein_42,
    tx_cntvalueout_42,
    tx_ce_42,
    tx_en_vtc_42,
    tx_inc_42,
    tx_load_42,
    rx_cntvalueout_42,
    rx_cntvaluein_42,
    rx_ce_42,
    rx_en_vtc_42,
    rx_inc_42,
    rx_load_42,
    rx_cntvalueout_ext_42,
    rx_cntvaluein_ext_42,
    rx_ce_ext_42,
    rx_en_vtc_ext_42,
    rx_inc_ext_42,
    rx_load_ext_42,
    fifo_empty_42,
    fifo_rd_clk_42,
    fifo_rd_en_42,
    bitslip_error_42,
    tri_t_43,
    tx_cntvaluein_43,
    tx_cntvalueout_43,
    tx_ce_43,
    tx_en_vtc_43,
    tx_inc_43,
    tx_load_43,
    rx_cntvalueout_43,
    rx_cntvaluein_43,
    rx_ce_43,
    rx_en_vtc_43,
    rx_inc_43,
    rx_load_43,
    rx_cntvalueout_ext_43,
    rx_cntvaluein_ext_43,
    rx_ce_ext_43,
    rx_en_vtc_ext_43,
    rx_inc_ext_43,
    rx_load_ext_43,
    fifo_empty_43,
    fifo_rd_clk_43,
    fifo_rd_en_43,
    bitslip_error_43,
    tri_t_44,
    tx_cntvaluein_44,
    tx_cntvalueout_44,
    tx_ce_44,
    tx_en_vtc_44,
    tx_inc_44,
    tx_load_44,
    rx_cntvalueout_44,
    rx_cntvaluein_44,
    rx_ce_44,
    rx_en_vtc_44,
    rx_inc_44,
    rx_load_44,
    rx_cntvalueout_ext_44,
    rx_cntvaluein_ext_44,
    rx_ce_ext_44,
    rx_en_vtc_ext_44,
    rx_inc_ext_44,
    rx_load_ext_44,
    fifo_empty_44,
    fifo_rd_clk_44,
    fifo_rd_en_44,
    bitslip_error_44,
    tri_t_45,
    tx_cntvaluein_45,
    tx_cntvalueout_45,
    tx_ce_45,
    tx_en_vtc_45,
    tx_inc_45,
    tx_load_45,
    rx_cntvalueout_45,
    rx_cntvaluein_45,
    rx_ce_45,
    rx_en_vtc_45,
    rx_inc_45,
    rx_load_45,
    rx_cntvalueout_ext_45,
    rx_cntvaluein_ext_45,
    rx_ce_ext_45,
    rx_en_vtc_ext_45,
    rx_inc_ext_45,
    rx_load_ext_45,
    fifo_empty_45,
    fifo_rd_clk_45,
    fifo_rd_en_45,
    bitslip_error_45,
    tri_t_46,
    tx_cntvaluein_46,
    tx_cntvalueout_46,
    tx_ce_46,
    tx_en_vtc_46,
    tx_inc_46,
    tx_load_46,
    rx_cntvalueout_46,
    rx_cntvaluein_46,
    rx_ce_46,
    rx_en_vtc_46,
    rx_inc_46,
    rx_load_46,
    rx_cntvalueout_ext_46,
    rx_cntvaluein_ext_46,
    rx_ce_ext_46,
    rx_en_vtc_ext_46,
    rx_inc_ext_46,
    rx_load_ext_46,
    fifo_empty_46,
    fifo_rd_clk_46,
    fifo_rd_en_46,
    bitslip_error_46,
    tri_t_47,
    tx_cntvaluein_47,
    tx_cntvalueout_47,
    tx_ce_47,
    tx_en_vtc_47,
    tx_inc_47,
    tx_load_47,
    rx_cntvalueout_47,
    rx_cntvaluein_47,
    rx_ce_47,
    rx_en_vtc_47,
    rx_inc_47,
    rx_load_47,
    rx_cntvalueout_ext_47,
    rx_cntvaluein_ext_47,
    rx_ce_ext_47,
    rx_en_vtc_ext_47,
    rx_inc_ext_47,
    rx_load_ext_47,
    fifo_empty_47,
    fifo_rd_clk_47,
    fifo_rd_en_47,
    bitslip_error_47,
    tri_t_48,
    tx_cntvaluein_48,
    tx_cntvalueout_48,
    tx_ce_48,
    tx_en_vtc_48,
    tx_inc_48,
    tx_load_48,
    rx_cntvalueout_48,
    rx_cntvaluein_48,
    rx_ce_48,
    rx_en_vtc_48,
    rx_inc_48,
    rx_load_48,
    rx_cntvalueout_ext_48,
    rx_cntvaluein_ext_48,
    rx_ce_ext_48,
    rx_en_vtc_ext_48,
    rx_inc_ext_48,
    rx_load_ext_48,
    fifo_empty_48,
    fifo_rd_clk_48,
    fifo_rd_en_48,
    bitslip_error_48,
    tri_t_49,
    tx_cntvaluein_49,
    tx_cntvalueout_49,
    tx_ce_49,
    tx_en_vtc_49,
    tx_inc_49,
    tx_load_49,
    rx_cntvalueout_49,
    rx_cntvaluein_49,
    rx_ce_49,
    rx_en_vtc_49,
    rx_inc_49,
    rx_load_49,
    rx_cntvalueout_ext_49,
    rx_cntvaluein_ext_49,
    rx_ce_ext_49,
    rx_en_vtc_ext_49,
    rx_inc_ext_49,
    rx_load_ext_49,
    fifo_empty_49,
    fifo_rd_clk_49,
    fifo_rd_en_49,
    bitslip_error_49,
    tri_t_50,
    tx_cntvaluein_50,
    tx_cntvalueout_50,
    tx_ce_50,
    tx_en_vtc_50,
    tx_inc_50,
    tx_load_50,
    rx_cntvalueout_50,
    rx_cntvaluein_50,
    rx_ce_50,
    rx_en_vtc_50,
    rx_inc_50,
    rx_load_50,
    rx_cntvalueout_ext_50,
    rx_cntvaluein_ext_50,
    rx_ce_ext_50,
    rx_en_vtc_ext_50,
    rx_inc_ext_50,
    rx_load_ext_50,
    fifo_empty_50,
    fifo_rd_clk_50,
    fifo_rd_en_50,
    bitslip_error_50,
    tri_t_51,
    tx_cntvaluein_51,
    tx_cntvalueout_51,
    tx_ce_51,
    tx_en_vtc_51,
    tx_inc_51,
    tx_load_51,
    rx_cntvalueout_51,
    rx_cntvaluein_51,
    rx_ce_51,
    rx_en_vtc_51,
    rx_inc_51,
    rx_load_51,
    rx_cntvalueout_ext_51,
    rx_cntvaluein_ext_51,
    rx_ce_ext_51,
    rx_en_vtc_ext_51,
    rx_inc_ext_51,
    rx_load_ext_51,
    fifo_empty_51,
    fifo_rd_clk_51,
    fifo_rd_en_51,
    bitslip_error_51,
    fifo_wr_clk_0,
    fifo_wr_clk_6,
    fifo_wr_clk_13,
    fifo_wr_clk_19,
    fifo_wr_clk_26,
    fifo_wr_clk_32,
    fifo_wr_clk_39,
    fifo_wr_clk_45,
    tri_tbyte0,
    bidir_tx_bs_tri_cntvalueout0,
    bidir_tx_bs_tri_cntvaluein0,
    bidir_tx_bs_tri_en_vtc0,
    bidir_tx_bs_tri_ce0,
    bidir_tx_bs_tri_inc0,
    bidir_tx_bs_tri_load0,
    tri_tbyte1,
    bidir_tx_bs_tri_cntvalueout1,
    bidir_tx_bs_tri_cntvaluein1,
    bidir_tx_bs_tri_en_vtc1,
    bidir_tx_bs_tri_ce1,
    bidir_tx_bs_tri_inc1,
    bidir_tx_bs_tri_load1,
    tri_tbyte2,
    bidir_tx_bs_tri_cntvalueout2,
    bidir_tx_bs_tri_cntvaluein2,
    bidir_tx_bs_tri_en_vtc2,
    bidir_tx_bs_tri_ce2,
    bidir_tx_bs_tri_inc2,
    bidir_tx_bs_tri_load2,
    tri_tbyte3,
    bidir_tx_bs_tri_cntvalueout3,
    bidir_tx_bs_tri_cntvaluein3,
    bidir_tx_bs_tri_en_vtc3,
    bidir_tx_bs_tri_ce3,
    bidir_tx_bs_tri_inc3,
    bidir_tx_bs_tri_load3,
    tri_tbyte4,
    bidir_tx_bs_tri_cntvalueout4,
    bidir_tx_bs_tri_cntvaluein4,
    bidir_tx_bs_tri_en_vtc4,
    bidir_tx_bs_tri_ce4,
    bidir_tx_bs_tri_inc4,
    bidir_tx_bs_tri_load4,
    tri_tbyte5,
    bidir_tx_bs_tri_cntvalueout5,
    bidir_tx_bs_tri_cntvaluein5,
    bidir_tx_bs_tri_en_vtc5,
    bidir_tx_bs_tri_ce5,
    bidir_tx_bs_tri_inc5,
    bidir_tx_bs_tri_load5,
    tri_tbyte6,
    bidir_tx_bs_tri_cntvalueout6,
    bidir_tx_bs_tri_cntvaluein6,
    bidir_tx_bs_tri_en_vtc6,
    bidir_tx_bs_tri_ce6,
    bidir_tx_bs_tri_inc6,
    bidir_tx_bs_tri_load6,
    tri_tbyte7,
    bidir_tx_bs_tri_cntvalueout7,
    bidir_tx_bs_tri_cntvaluein7,
    bidir_tx_bs_tri_en_vtc7,
    bidir_tx_bs_tri_ce7,
    bidir_tx_bs_tri_inc7,
    bidir_tx_bs_tri_load7,
    fifo_rd_data_valid,
    rst);
  input [6:0]daddr;
  input dclk;
  input den;
  input [15:0]di;
  input dwe;
  output [15:0]do_out;
  output drdy;
  input clk_p;
  input clk_n;
  input clk;
  input riu_clk;
  input app_clk;
  input bs_rst_dphy_in;
  output rst_seq_done;
  output pll0_clkout0;
  output pll0_locked;
  output pll0_clkout1;
  output pll1_clkout0;
  output pll1_locked;
  output intf_rdy;
  input multi_intf_lock_in;
  input shared_pll0_clkout0_in;
  input shared_pll1_clkout0_in;
  input shared_pll0_clkoutphy_in;
  input shared_pll1_clkoutphy_in;
  input shared_pll0_locked_in;
  input shared_pll1_locked_in;
  output shared_pll0_clkoutphy_out;
  output shared_pll1_clkoutphy_out;
  output clk_from_ibuf;
  input [4:0]lptx_t;
  input [4:0]lptx_i_p;
  input [4:0]lptx_i_n;
  input [4:0]hs_rx_disable;
  input [4:0]lp_rx_disable;
  output [4:0]lp_rx_o_p;
  output [4:0]lp_rx_o_n;
  output dly_rdy_bsc0;
  output vtc_rdy_bsc0;
  input en_vtc_bsc0;
  input [3:0]phy_rden_bsc0;
  output dly_rdy_bsc1;
  output vtc_rdy_bsc1;
  input en_vtc_bsc1;
  input [3:0]phy_rden_bsc1;
  output dly_rdy_bsc2;
  output vtc_rdy_bsc2;
  input en_vtc_bsc2;
  input [3:0]phy_rden_bsc2;
  output dly_rdy_bsc3;
  output vtc_rdy_bsc3;
  input en_vtc_bsc3;
  input [3:0]phy_rden_bsc3;
  output dly_rdy_bsc4;
  output vtc_rdy_bsc4;
  input en_vtc_bsc4;
  input [3:0]phy_rden_bsc4;
  output dly_rdy_bsc5;
  output vtc_rdy_bsc5;
  input en_vtc_bsc5;
  input [3:0]phy_rden_bsc5;
  output dly_rdy_bsc6;
  output vtc_rdy_bsc6;
  input en_vtc_bsc6;
  input [3:0]phy_rden_bsc6;
  output dly_rdy_bsc7;
  output vtc_rdy_bsc7;
  input en_vtc_bsc7;
  input [3:0]phy_rden_bsc7;
  input [5:0]riu_addr_bg0;
  input [1:0]riu_nibble_sel_bg0;
  input [15:0]riu_wr_data_bg0;
  input riu_wr_en_bg0;
  output [15:0]riu_rd_data_bg0;
  output riu_valid_bg0;
  input [5:0]riu_addr_bg0_bs0;
  input riu_nibble_sel_bg0_bs0;
  input [15:0]riu_wr_data_bg0_bs0;
  input riu_wr_en_bg0_bs0;
  output [15:0]riu_rd_data_bg0_bs0;
  output riu_valid_bg0_bs0;
  input [5:0]riu_addr_bg0_bs1;
  input riu_nibble_sel_bg0_bs1;
  input [15:0]riu_wr_data_bg0_bs1;
  input riu_wr_en_bg0_bs1;
  output [15:0]riu_rd_data_bg0_bs1;
  output riu_valid_bg0_bs1;
  input [5:0]riu_addr_bg1;
  input [1:0]riu_nibble_sel_bg1;
  input [15:0]riu_wr_data_bg1;
  input riu_wr_en_bg1;
  output [15:0]riu_rd_data_bg1;
  output riu_valid_bg1;
  input [5:0]riu_addr_bg1_bs2;
  input riu_nibble_sel_bg1_bs2;
  input [15:0]riu_wr_data_bg1_bs2;
  input riu_wr_en_bg1_bs2;
  output [15:0]riu_rd_data_bg1_bs2;
  output riu_valid_bg1_bs2;
  input [5:0]riu_addr_bg1_bs3;
  input riu_nibble_sel_bg1_bs3;
  input [15:0]riu_wr_data_bg1_bs3;
  input riu_wr_en_bg1_bs3;
  output [15:0]riu_rd_data_bg1_bs3;
  output riu_valid_bg1_bs3;
  input [5:0]riu_addr_bg2;
  input [1:0]riu_nibble_sel_bg2;
  input [15:0]riu_wr_data_bg2;
  input riu_wr_en_bg2;
  output [15:0]riu_rd_data_bg2;
  output riu_valid_bg2;
  input [5:0]riu_addr_bg2_bs4;
  input riu_nibble_sel_bg2_bs4;
  input [15:0]riu_wr_data_bg2_bs4;
  input riu_wr_en_bg2_bs4;
  output [15:0]riu_rd_data_bg2_bs4;
  output riu_valid_bg2_bs4;
  input [5:0]riu_addr_bg2_bs5;
  input riu_nibble_sel_bg2_bs5;
  input [15:0]riu_wr_data_bg2_bs5;
  input riu_wr_en_bg2_bs5;
  output [15:0]riu_rd_data_bg2_bs5;
  output riu_valid_bg2_bs5;
  input [5:0]riu_addr_bg3;
  input [1:0]riu_nibble_sel_bg3;
  input [15:0]riu_wr_data_bg3;
  input riu_wr_en_bg3;
  output [15:0]riu_rd_data_bg3;
  output riu_valid_bg3;
  input [5:0]riu_addr_bg3_bs6;
  input riu_nibble_sel_bg3_bs6;
  input [15:0]riu_wr_data_bg3_bs6;
  input riu_wr_en_bg3_bs6;
  output [15:0]riu_rd_data_bg3_bs6;
  output riu_valid_bg3_bs6;
  input [5:0]riu_addr_bg3_bs7;
  input riu_nibble_sel_bg3_bs7;
  input [15:0]riu_wr_data_bg3_bs7;
  input riu_wr_en_bg3_bs7;
  output [15:0]riu_rd_data_bg3_bs7;
  output riu_valid_bg3_bs7;
  input tx_clk;
  input rx_clk;
  input bidir_tx_clk;
  input bidir_rx_clk;
  input bidir_tx_bs_tri_clk;
  input bg0_pin0_nc;
  input bg0_pin6_nc;
  input bg1_pin0_nc;
  input bg1_pin6_nc;
  input bg2_pin0_nc;
  input bg2_pin6_nc;
  input bg3_pin0_nc;
  input bg3_pin6_nc;
  input start_bitslip;
  output rx_bitslip_sync_done;
  output rxtx_bitslip_sync_done;
  input clk_rxp;
  output [7:0]data_to_fabric_clk_rxp;
  input tri_t_0;
  input [8:0]tx_cntvaluein_0;
  output [8:0]tx_cntvalueout_0;
  input tx_ce_0;
  input tx_en_vtc_0;
  input tx_inc_0;
  input tx_load_0;
  output [8:0]rx_cntvalueout_0;
  input [8:0]rx_cntvaluein_0;
  input rx_ce_0;
  input rx_en_vtc_0;
  input rx_inc_0;
  input rx_load_0;
  output [8:0]rx_cntvalueout_ext_0;
  input [8:0]rx_cntvaluein_ext_0;
  input rx_ce_ext_0;
  input rx_en_vtc_ext_0;
  input rx_inc_ext_0;
  input rx_load_ext_0;
  output fifo_empty_0;
  input fifo_rd_clk_0;
  input fifo_rd_en_0;
  output bitslip_error_0;
  input clk_rxn;
  output [7:0]data_to_fabric_clk_rxn;
  input tri_t_1;
  input [8:0]tx_cntvaluein_1;
  output [8:0]tx_cntvalueout_1;
  input tx_ce_1;
  input tx_en_vtc_1;
  input tx_inc_1;
  input tx_load_1;
  output [8:0]rx_cntvalueout_1;
  input [8:0]rx_cntvaluein_1;
  input rx_ce_1;
  input rx_en_vtc_1;
  input rx_inc_1;
  input rx_load_1;
  output [8:0]rx_cntvalueout_ext_1;
  input [8:0]rx_cntvaluein_ext_1;
  input rx_ce_ext_1;
  input rx_en_vtc_ext_1;
  input rx_inc_ext_1;
  input rx_load_ext_1;
  output fifo_empty_1;
  input fifo_rd_clk_1;
  input fifo_rd_en_1;
  output bitslip_error_1;
  input data_rxp0;
  output [7:0]data_to_fabric_data_rxp0;
  input tri_t_2;
  input [8:0]tx_cntvaluein_2;
  output [8:0]tx_cntvalueout_2;
  input tx_ce_2;
  input tx_en_vtc_2;
  input tx_inc_2;
  input tx_load_2;
  output [8:0]rx_cntvalueout_2;
  input [8:0]rx_cntvaluein_2;
  input rx_ce_2;
  input rx_en_vtc_2;
  input rx_inc_2;
  input rx_load_2;
  output [8:0]rx_cntvalueout_ext_2;
  input [8:0]rx_cntvaluein_ext_2;
  input rx_ce_ext_2;
  input rx_en_vtc_ext_2;
  input rx_inc_ext_2;
  input rx_load_ext_2;
  output fifo_empty_2;
  input fifo_rd_clk_2;
  input fifo_rd_en_2;
  output bitslip_error_2;
  input data_rxn0;
  output [7:0]data_to_fabric_data_rxn0;
  input tri_t_3;
  input [8:0]tx_cntvaluein_3;
  output [8:0]tx_cntvalueout_3;
  input tx_ce_3;
  input tx_en_vtc_3;
  input tx_inc_3;
  input tx_load_3;
  output [8:0]rx_cntvalueout_3;
  input [8:0]rx_cntvaluein_3;
  input rx_ce_3;
  input rx_en_vtc_3;
  input rx_inc_3;
  input rx_load_3;
  output [8:0]rx_cntvalueout_ext_3;
  input [8:0]rx_cntvaluein_ext_3;
  input rx_ce_ext_3;
  input rx_en_vtc_ext_3;
  input rx_inc_ext_3;
  input rx_load_ext_3;
  output fifo_empty_3;
  input fifo_rd_clk_3;
  input fifo_rd_en_3;
  output bitslip_error_3;
  input data_rxp1;
  output [7:0]data_to_fabric_data_rxp1;
  input tri_t_4;
  input [8:0]tx_cntvaluein_4;
  output [8:0]tx_cntvalueout_4;
  input tx_ce_4;
  input tx_en_vtc_4;
  input tx_inc_4;
  input tx_load_4;
  output [8:0]rx_cntvalueout_4;
  input [8:0]rx_cntvaluein_4;
  input rx_ce_4;
  input rx_en_vtc_4;
  input rx_inc_4;
  input rx_load_4;
  output [8:0]rx_cntvalueout_ext_4;
  input [8:0]rx_cntvaluein_ext_4;
  input rx_ce_ext_4;
  input rx_en_vtc_ext_4;
  input rx_inc_ext_4;
  input rx_load_ext_4;
  output fifo_empty_4;
  input fifo_rd_clk_4;
  input fifo_rd_en_4;
  output bitslip_error_4;
  input data_rxn1;
  output [7:0]data_to_fabric_data_rxn1;
  input tri_t_5;
  input [8:0]tx_cntvaluein_5;
  output [8:0]tx_cntvalueout_5;
  input tx_ce_5;
  input tx_en_vtc_5;
  input tx_inc_5;
  input tx_load_5;
  output [8:0]rx_cntvalueout_5;
  input [8:0]rx_cntvaluein_5;
  input rx_ce_5;
  input rx_en_vtc_5;
  input rx_inc_5;
  input rx_load_5;
  output [8:0]rx_cntvalueout_ext_5;
  input [8:0]rx_cntvaluein_ext_5;
  input rx_ce_ext_5;
  input rx_en_vtc_ext_5;
  input rx_inc_ext_5;
  input rx_load_ext_5;
  output fifo_empty_5;
  input fifo_rd_clk_5;
  input fifo_rd_en_5;
  output bitslip_error_5;
  input data_rxp2;
  output [7:0]data_to_fabric_data_rxp2;
  input tri_t_6;
  input [8:0]tx_cntvaluein_6;
  output [8:0]tx_cntvalueout_6;
  input tx_ce_6;
  input tx_en_vtc_6;
  input tx_inc_6;
  input tx_load_6;
  output [8:0]rx_cntvalueout_6;
  input [8:0]rx_cntvaluein_6;
  input rx_ce_6;
  input rx_en_vtc_6;
  input rx_inc_6;
  input rx_load_6;
  output [8:0]rx_cntvalueout_ext_6;
  input [8:0]rx_cntvaluein_ext_6;
  input rx_ce_ext_6;
  input rx_en_vtc_ext_6;
  input rx_inc_ext_6;
  input rx_load_ext_6;
  output fifo_empty_6;
  input fifo_rd_clk_6;
  input fifo_rd_en_6;
  output bitslip_error_6;
  input data_rxn2;
  output [7:0]data_to_fabric_data_rxn2;
  input tri_t_7;
  input [8:0]tx_cntvaluein_7;
  output [8:0]tx_cntvalueout_7;
  input tx_ce_7;
  input tx_en_vtc_7;
  input tx_inc_7;
  input tx_load_7;
  output [8:0]rx_cntvalueout_7;
  input [8:0]rx_cntvaluein_7;
  input rx_ce_7;
  input rx_en_vtc_7;
  input rx_inc_7;
  input rx_load_7;
  output [8:0]rx_cntvalueout_ext_7;
  input [8:0]rx_cntvaluein_ext_7;
  input rx_ce_ext_7;
  input rx_en_vtc_ext_7;
  input rx_inc_ext_7;
  input rx_load_ext_7;
  output fifo_empty_7;
  input fifo_rd_clk_7;
  input fifo_rd_en_7;
  output bitslip_error_7;
  input data_rxp3;
  output [7:0]data_to_fabric_data_rxp3;
  input tri_t_8;
  input [8:0]tx_cntvaluein_8;
  output [8:0]tx_cntvalueout_8;
  input tx_ce_8;
  input tx_en_vtc_8;
  input tx_inc_8;
  input tx_load_8;
  output [8:0]rx_cntvalueout_8;
  input [8:0]rx_cntvaluein_8;
  input rx_ce_8;
  input rx_en_vtc_8;
  input rx_inc_8;
  input rx_load_8;
  output [8:0]rx_cntvalueout_ext_8;
  input [8:0]rx_cntvaluein_ext_8;
  input rx_ce_ext_8;
  input rx_en_vtc_ext_8;
  input rx_inc_ext_8;
  input rx_load_ext_8;
  output fifo_empty_8;
  input fifo_rd_clk_8;
  input fifo_rd_en_8;
  output bitslip_error_8;
  input data_rxn3;
  output [7:0]data_to_fabric_data_rxn3;
  input tri_t_9;
  input [8:0]tx_cntvaluein_9;
  output [8:0]tx_cntvalueout_9;
  input tx_ce_9;
  input tx_en_vtc_9;
  input tx_inc_9;
  input tx_load_9;
  output [8:0]rx_cntvalueout_9;
  input [8:0]rx_cntvaluein_9;
  input rx_ce_9;
  input rx_en_vtc_9;
  input rx_inc_9;
  input rx_load_9;
  output [8:0]rx_cntvalueout_ext_9;
  input [8:0]rx_cntvaluein_ext_9;
  input rx_ce_ext_9;
  input rx_en_vtc_ext_9;
  input rx_inc_ext_9;
  input rx_load_ext_9;
  output fifo_empty_9;
  input fifo_rd_clk_9;
  input fifo_rd_en_9;
  output bitslip_error_9;
  input tri_t_10;
  input [8:0]tx_cntvaluein_10;
  output [8:0]tx_cntvalueout_10;
  input tx_ce_10;
  input tx_en_vtc_10;
  input tx_inc_10;
  input tx_load_10;
  output [8:0]rx_cntvalueout_10;
  input [8:0]rx_cntvaluein_10;
  input rx_ce_10;
  input rx_en_vtc_10;
  input rx_inc_10;
  input rx_load_10;
  output [8:0]rx_cntvalueout_ext_10;
  input [8:0]rx_cntvaluein_ext_10;
  input rx_ce_ext_10;
  input rx_en_vtc_ext_10;
  input rx_inc_ext_10;
  input rx_load_ext_10;
  output fifo_empty_10;
  input fifo_rd_clk_10;
  input fifo_rd_en_10;
  output bitslip_error_10;
  input tri_t_11;
  input [8:0]tx_cntvaluein_11;
  output [8:0]tx_cntvalueout_11;
  input tx_ce_11;
  input tx_en_vtc_11;
  input tx_inc_11;
  input tx_load_11;
  output [8:0]rx_cntvalueout_11;
  input [8:0]rx_cntvaluein_11;
  input rx_ce_11;
  input rx_en_vtc_11;
  input rx_inc_11;
  input rx_load_11;
  output [8:0]rx_cntvalueout_ext_11;
  input [8:0]rx_cntvaluein_ext_11;
  input rx_ce_ext_11;
  input rx_en_vtc_ext_11;
  input rx_inc_ext_11;
  input rx_load_ext_11;
  output fifo_empty_11;
  input fifo_rd_clk_11;
  input fifo_rd_en_11;
  output bitslip_error_11;
  input tri_t_12;
  input [8:0]tx_cntvaluein_12;
  output [8:0]tx_cntvalueout_12;
  input tx_ce_12;
  input tx_en_vtc_12;
  input tx_inc_12;
  input tx_load_12;
  output [8:0]rx_cntvalueout_12;
  input [8:0]rx_cntvaluein_12;
  input rx_ce_12;
  input rx_en_vtc_12;
  input rx_inc_12;
  input rx_load_12;
  output [8:0]rx_cntvalueout_ext_12;
  input [8:0]rx_cntvaluein_ext_12;
  input rx_ce_ext_12;
  input rx_en_vtc_ext_12;
  input rx_inc_ext_12;
  input rx_load_ext_12;
  output fifo_empty_12;
  input fifo_rd_clk_12;
  input fifo_rd_en_12;
  output bitslip_error_12;
  input tri_t_13;
  input [8:0]tx_cntvaluein_13;
  output [8:0]tx_cntvalueout_13;
  input tx_ce_13;
  input tx_en_vtc_13;
  input tx_inc_13;
  input tx_load_13;
  output [8:0]rx_cntvalueout_13;
  input [8:0]rx_cntvaluein_13;
  input rx_ce_13;
  input rx_en_vtc_13;
  input rx_inc_13;
  input rx_load_13;
  output [8:0]rx_cntvalueout_ext_13;
  input [8:0]rx_cntvaluein_ext_13;
  input rx_ce_ext_13;
  input rx_en_vtc_ext_13;
  input rx_inc_ext_13;
  input rx_load_ext_13;
  output fifo_empty_13;
  input fifo_rd_clk_13;
  input fifo_rd_en_13;
  output bitslip_error_13;
  input tri_t_14;
  input [8:0]tx_cntvaluein_14;
  output [8:0]tx_cntvalueout_14;
  input tx_ce_14;
  input tx_en_vtc_14;
  input tx_inc_14;
  input tx_load_14;
  output [8:0]rx_cntvalueout_14;
  input [8:0]rx_cntvaluein_14;
  input rx_ce_14;
  input rx_en_vtc_14;
  input rx_inc_14;
  input rx_load_14;
  output [8:0]rx_cntvalueout_ext_14;
  input [8:0]rx_cntvaluein_ext_14;
  input rx_ce_ext_14;
  input rx_en_vtc_ext_14;
  input rx_inc_ext_14;
  input rx_load_ext_14;
  output fifo_empty_14;
  input fifo_rd_clk_14;
  input fifo_rd_en_14;
  output bitslip_error_14;
  input tri_t_15;
  input [8:0]tx_cntvaluein_15;
  output [8:0]tx_cntvalueout_15;
  input tx_ce_15;
  input tx_en_vtc_15;
  input tx_inc_15;
  input tx_load_15;
  output [8:0]rx_cntvalueout_15;
  input [8:0]rx_cntvaluein_15;
  input rx_ce_15;
  input rx_en_vtc_15;
  input rx_inc_15;
  input rx_load_15;
  output [8:0]rx_cntvalueout_ext_15;
  input [8:0]rx_cntvaluein_ext_15;
  input rx_ce_ext_15;
  input rx_en_vtc_ext_15;
  input rx_inc_ext_15;
  input rx_load_ext_15;
  output fifo_empty_15;
  input fifo_rd_clk_15;
  input fifo_rd_en_15;
  output bitslip_error_15;
  input tri_t_16;
  input [8:0]tx_cntvaluein_16;
  output [8:0]tx_cntvalueout_16;
  input tx_ce_16;
  input tx_en_vtc_16;
  input tx_inc_16;
  input tx_load_16;
  output [8:0]rx_cntvalueout_16;
  input [8:0]rx_cntvaluein_16;
  input rx_ce_16;
  input rx_en_vtc_16;
  input rx_inc_16;
  input rx_load_16;
  output [8:0]rx_cntvalueout_ext_16;
  input [8:0]rx_cntvaluein_ext_16;
  input rx_ce_ext_16;
  input rx_en_vtc_ext_16;
  input rx_inc_ext_16;
  input rx_load_ext_16;
  output fifo_empty_16;
  input fifo_rd_clk_16;
  input fifo_rd_en_16;
  output bitslip_error_16;
  input tri_t_17;
  input [8:0]tx_cntvaluein_17;
  output [8:0]tx_cntvalueout_17;
  input tx_ce_17;
  input tx_en_vtc_17;
  input tx_inc_17;
  input tx_load_17;
  output [8:0]rx_cntvalueout_17;
  input [8:0]rx_cntvaluein_17;
  input rx_ce_17;
  input rx_en_vtc_17;
  input rx_inc_17;
  input rx_load_17;
  output [8:0]rx_cntvalueout_ext_17;
  input [8:0]rx_cntvaluein_ext_17;
  input rx_ce_ext_17;
  input rx_en_vtc_ext_17;
  input rx_inc_ext_17;
  input rx_load_ext_17;
  output fifo_empty_17;
  input fifo_rd_clk_17;
  input fifo_rd_en_17;
  output bitslip_error_17;
  input tri_t_18;
  input [8:0]tx_cntvaluein_18;
  output [8:0]tx_cntvalueout_18;
  input tx_ce_18;
  input tx_en_vtc_18;
  input tx_inc_18;
  input tx_load_18;
  output [8:0]rx_cntvalueout_18;
  input [8:0]rx_cntvaluein_18;
  input rx_ce_18;
  input rx_en_vtc_18;
  input rx_inc_18;
  input rx_load_18;
  output [8:0]rx_cntvalueout_ext_18;
  input [8:0]rx_cntvaluein_ext_18;
  input rx_ce_ext_18;
  input rx_en_vtc_ext_18;
  input rx_inc_ext_18;
  input rx_load_ext_18;
  output fifo_empty_18;
  input fifo_rd_clk_18;
  input fifo_rd_en_18;
  output bitslip_error_18;
  input tri_t_19;
  input [8:0]tx_cntvaluein_19;
  output [8:0]tx_cntvalueout_19;
  input tx_ce_19;
  input tx_en_vtc_19;
  input tx_inc_19;
  input tx_load_19;
  output [8:0]rx_cntvalueout_19;
  input [8:0]rx_cntvaluein_19;
  input rx_ce_19;
  input rx_en_vtc_19;
  input rx_inc_19;
  input rx_load_19;
  output [8:0]rx_cntvalueout_ext_19;
  input [8:0]rx_cntvaluein_ext_19;
  input rx_ce_ext_19;
  input rx_en_vtc_ext_19;
  input rx_inc_ext_19;
  input rx_load_ext_19;
  output fifo_empty_19;
  input fifo_rd_clk_19;
  input fifo_rd_en_19;
  output bitslip_error_19;
  input tri_t_20;
  input [8:0]tx_cntvaluein_20;
  output [8:0]tx_cntvalueout_20;
  input tx_ce_20;
  input tx_en_vtc_20;
  input tx_inc_20;
  input tx_load_20;
  output [8:0]rx_cntvalueout_20;
  input [8:0]rx_cntvaluein_20;
  input rx_ce_20;
  input rx_en_vtc_20;
  input rx_inc_20;
  input rx_load_20;
  output [8:0]rx_cntvalueout_ext_20;
  input [8:0]rx_cntvaluein_ext_20;
  input rx_ce_ext_20;
  input rx_en_vtc_ext_20;
  input rx_inc_ext_20;
  input rx_load_ext_20;
  output fifo_empty_20;
  input fifo_rd_clk_20;
  input fifo_rd_en_20;
  output bitslip_error_20;
  input tri_t_21;
  input [8:0]tx_cntvaluein_21;
  output [8:0]tx_cntvalueout_21;
  input tx_ce_21;
  input tx_en_vtc_21;
  input tx_inc_21;
  input tx_load_21;
  output [8:0]rx_cntvalueout_21;
  input [8:0]rx_cntvaluein_21;
  input rx_ce_21;
  input rx_en_vtc_21;
  input rx_inc_21;
  input rx_load_21;
  output [8:0]rx_cntvalueout_ext_21;
  input [8:0]rx_cntvaluein_ext_21;
  input rx_ce_ext_21;
  input rx_en_vtc_ext_21;
  input rx_inc_ext_21;
  input rx_load_ext_21;
  output fifo_empty_21;
  input fifo_rd_clk_21;
  input fifo_rd_en_21;
  output bitslip_error_21;
  input tri_t_22;
  input [8:0]tx_cntvaluein_22;
  output [8:0]tx_cntvalueout_22;
  input tx_ce_22;
  input tx_en_vtc_22;
  input tx_inc_22;
  input tx_load_22;
  output [8:0]rx_cntvalueout_22;
  input [8:0]rx_cntvaluein_22;
  input rx_ce_22;
  input rx_en_vtc_22;
  input rx_inc_22;
  input rx_load_22;
  output [8:0]rx_cntvalueout_ext_22;
  input [8:0]rx_cntvaluein_ext_22;
  input rx_ce_ext_22;
  input rx_en_vtc_ext_22;
  input rx_inc_ext_22;
  input rx_load_ext_22;
  output fifo_empty_22;
  input fifo_rd_clk_22;
  input fifo_rd_en_22;
  output bitslip_error_22;
  input tri_t_23;
  input [8:0]tx_cntvaluein_23;
  output [8:0]tx_cntvalueout_23;
  input tx_ce_23;
  input tx_en_vtc_23;
  input tx_inc_23;
  input tx_load_23;
  output [8:0]rx_cntvalueout_23;
  input [8:0]rx_cntvaluein_23;
  input rx_ce_23;
  input rx_en_vtc_23;
  input rx_inc_23;
  input rx_load_23;
  output [8:0]rx_cntvalueout_ext_23;
  input [8:0]rx_cntvaluein_ext_23;
  input rx_ce_ext_23;
  input rx_en_vtc_ext_23;
  input rx_inc_ext_23;
  input rx_load_ext_23;
  output fifo_empty_23;
  input fifo_rd_clk_23;
  input fifo_rd_en_23;
  output bitslip_error_23;
  input tri_t_24;
  input [8:0]tx_cntvaluein_24;
  output [8:0]tx_cntvalueout_24;
  input tx_ce_24;
  input tx_en_vtc_24;
  input tx_inc_24;
  input tx_load_24;
  output [8:0]rx_cntvalueout_24;
  input [8:0]rx_cntvaluein_24;
  input rx_ce_24;
  input rx_en_vtc_24;
  input rx_inc_24;
  input rx_load_24;
  output [8:0]rx_cntvalueout_ext_24;
  input [8:0]rx_cntvaluein_ext_24;
  input rx_ce_ext_24;
  input rx_en_vtc_ext_24;
  input rx_inc_ext_24;
  input rx_load_ext_24;
  output fifo_empty_24;
  input fifo_rd_clk_24;
  input fifo_rd_en_24;
  output bitslip_error_24;
  input tri_t_25;
  input [8:0]tx_cntvaluein_25;
  output [8:0]tx_cntvalueout_25;
  input tx_ce_25;
  input tx_en_vtc_25;
  input tx_inc_25;
  input tx_load_25;
  output [8:0]rx_cntvalueout_25;
  input [8:0]rx_cntvaluein_25;
  input rx_ce_25;
  input rx_en_vtc_25;
  input rx_inc_25;
  input rx_load_25;
  output [8:0]rx_cntvalueout_ext_25;
  input [8:0]rx_cntvaluein_ext_25;
  input rx_ce_ext_25;
  input rx_en_vtc_ext_25;
  input rx_inc_ext_25;
  input rx_load_ext_25;
  output fifo_empty_25;
  input fifo_rd_clk_25;
  input fifo_rd_en_25;
  output bitslip_error_25;
  input tri_t_26;
  input [8:0]tx_cntvaluein_26;
  output [8:0]tx_cntvalueout_26;
  input tx_ce_26;
  input tx_en_vtc_26;
  input tx_inc_26;
  input tx_load_26;
  output [8:0]rx_cntvalueout_26;
  input [8:0]rx_cntvaluein_26;
  input rx_ce_26;
  input rx_en_vtc_26;
  input rx_inc_26;
  input rx_load_26;
  output [8:0]rx_cntvalueout_ext_26;
  input [8:0]rx_cntvaluein_ext_26;
  input rx_ce_ext_26;
  input rx_en_vtc_ext_26;
  input rx_inc_ext_26;
  input rx_load_ext_26;
  output fifo_empty_26;
  input fifo_rd_clk_26;
  input fifo_rd_en_26;
  output bitslip_error_26;
  input tri_t_27;
  input [8:0]tx_cntvaluein_27;
  output [8:0]tx_cntvalueout_27;
  input tx_ce_27;
  input tx_en_vtc_27;
  input tx_inc_27;
  input tx_load_27;
  output [8:0]rx_cntvalueout_27;
  input [8:0]rx_cntvaluein_27;
  input rx_ce_27;
  input rx_en_vtc_27;
  input rx_inc_27;
  input rx_load_27;
  output [8:0]rx_cntvalueout_ext_27;
  input [8:0]rx_cntvaluein_ext_27;
  input rx_ce_ext_27;
  input rx_en_vtc_ext_27;
  input rx_inc_ext_27;
  input rx_load_ext_27;
  output fifo_empty_27;
  input fifo_rd_clk_27;
  input fifo_rd_en_27;
  output bitslip_error_27;
  input tri_t_28;
  input [8:0]tx_cntvaluein_28;
  output [8:0]tx_cntvalueout_28;
  input tx_ce_28;
  input tx_en_vtc_28;
  input tx_inc_28;
  input tx_load_28;
  output [8:0]rx_cntvalueout_28;
  input [8:0]rx_cntvaluein_28;
  input rx_ce_28;
  input rx_en_vtc_28;
  input rx_inc_28;
  input rx_load_28;
  output [8:0]rx_cntvalueout_ext_28;
  input [8:0]rx_cntvaluein_ext_28;
  input rx_ce_ext_28;
  input rx_en_vtc_ext_28;
  input rx_inc_ext_28;
  input rx_load_ext_28;
  output fifo_empty_28;
  input fifo_rd_clk_28;
  input fifo_rd_en_28;
  output bitslip_error_28;
  input tri_t_29;
  input [8:0]tx_cntvaluein_29;
  output [8:0]tx_cntvalueout_29;
  input tx_ce_29;
  input tx_en_vtc_29;
  input tx_inc_29;
  input tx_load_29;
  output [8:0]rx_cntvalueout_29;
  input [8:0]rx_cntvaluein_29;
  input rx_ce_29;
  input rx_en_vtc_29;
  input rx_inc_29;
  input rx_load_29;
  output [8:0]rx_cntvalueout_ext_29;
  input [8:0]rx_cntvaluein_ext_29;
  input rx_ce_ext_29;
  input rx_en_vtc_ext_29;
  input rx_inc_ext_29;
  input rx_load_ext_29;
  output fifo_empty_29;
  input fifo_rd_clk_29;
  input fifo_rd_en_29;
  output bitslip_error_29;
  input tri_t_30;
  input [8:0]tx_cntvaluein_30;
  output [8:0]tx_cntvalueout_30;
  input tx_ce_30;
  input tx_en_vtc_30;
  input tx_inc_30;
  input tx_load_30;
  output [8:0]rx_cntvalueout_30;
  input [8:0]rx_cntvaluein_30;
  input rx_ce_30;
  input rx_en_vtc_30;
  input rx_inc_30;
  input rx_load_30;
  output [8:0]rx_cntvalueout_ext_30;
  input [8:0]rx_cntvaluein_ext_30;
  input rx_ce_ext_30;
  input rx_en_vtc_ext_30;
  input rx_inc_ext_30;
  input rx_load_ext_30;
  output fifo_empty_30;
  input fifo_rd_clk_30;
  input fifo_rd_en_30;
  output bitslip_error_30;
  input tri_t_31;
  input [8:0]tx_cntvaluein_31;
  output [8:0]tx_cntvalueout_31;
  input tx_ce_31;
  input tx_en_vtc_31;
  input tx_inc_31;
  input tx_load_31;
  output [8:0]rx_cntvalueout_31;
  input [8:0]rx_cntvaluein_31;
  input rx_ce_31;
  input rx_en_vtc_31;
  input rx_inc_31;
  input rx_load_31;
  output [8:0]rx_cntvalueout_ext_31;
  input [8:0]rx_cntvaluein_ext_31;
  input rx_ce_ext_31;
  input rx_en_vtc_ext_31;
  input rx_inc_ext_31;
  input rx_load_ext_31;
  output fifo_empty_31;
  input fifo_rd_clk_31;
  input fifo_rd_en_31;
  output bitslip_error_31;
  input tri_t_32;
  input [8:0]tx_cntvaluein_32;
  output [8:0]tx_cntvalueout_32;
  input tx_ce_32;
  input tx_en_vtc_32;
  input tx_inc_32;
  input tx_load_32;
  output [8:0]rx_cntvalueout_32;
  input [8:0]rx_cntvaluein_32;
  input rx_ce_32;
  input rx_en_vtc_32;
  input rx_inc_32;
  input rx_load_32;
  output [8:0]rx_cntvalueout_ext_32;
  input [8:0]rx_cntvaluein_ext_32;
  input rx_ce_ext_32;
  input rx_en_vtc_ext_32;
  input rx_inc_ext_32;
  input rx_load_ext_32;
  output fifo_empty_32;
  input fifo_rd_clk_32;
  input fifo_rd_en_32;
  output bitslip_error_32;
  input tri_t_33;
  input [8:0]tx_cntvaluein_33;
  output [8:0]tx_cntvalueout_33;
  input tx_ce_33;
  input tx_en_vtc_33;
  input tx_inc_33;
  input tx_load_33;
  output [8:0]rx_cntvalueout_33;
  input [8:0]rx_cntvaluein_33;
  input rx_ce_33;
  input rx_en_vtc_33;
  input rx_inc_33;
  input rx_load_33;
  output [8:0]rx_cntvalueout_ext_33;
  input [8:0]rx_cntvaluein_ext_33;
  input rx_ce_ext_33;
  input rx_en_vtc_ext_33;
  input rx_inc_ext_33;
  input rx_load_ext_33;
  output fifo_empty_33;
  input fifo_rd_clk_33;
  input fifo_rd_en_33;
  output bitslip_error_33;
  input tri_t_34;
  input [8:0]tx_cntvaluein_34;
  output [8:0]tx_cntvalueout_34;
  input tx_ce_34;
  input tx_en_vtc_34;
  input tx_inc_34;
  input tx_load_34;
  output [8:0]rx_cntvalueout_34;
  input [8:0]rx_cntvaluein_34;
  input rx_ce_34;
  input rx_en_vtc_34;
  input rx_inc_34;
  input rx_load_34;
  output [8:0]rx_cntvalueout_ext_34;
  input [8:0]rx_cntvaluein_ext_34;
  input rx_ce_ext_34;
  input rx_en_vtc_ext_34;
  input rx_inc_ext_34;
  input rx_load_ext_34;
  output fifo_empty_34;
  input fifo_rd_clk_34;
  input fifo_rd_en_34;
  output bitslip_error_34;
  input tri_t_35;
  input [8:0]tx_cntvaluein_35;
  output [8:0]tx_cntvalueout_35;
  input tx_ce_35;
  input tx_en_vtc_35;
  input tx_inc_35;
  input tx_load_35;
  output [8:0]rx_cntvalueout_35;
  input [8:0]rx_cntvaluein_35;
  input rx_ce_35;
  input rx_en_vtc_35;
  input rx_inc_35;
  input rx_load_35;
  output [8:0]rx_cntvalueout_ext_35;
  input [8:0]rx_cntvaluein_ext_35;
  input rx_ce_ext_35;
  input rx_en_vtc_ext_35;
  input rx_inc_ext_35;
  input rx_load_ext_35;
  output fifo_empty_35;
  input fifo_rd_clk_35;
  input fifo_rd_en_35;
  output bitslip_error_35;
  input tri_t_36;
  input [8:0]tx_cntvaluein_36;
  output [8:0]tx_cntvalueout_36;
  input tx_ce_36;
  input tx_en_vtc_36;
  input tx_inc_36;
  input tx_load_36;
  output [8:0]rx_cntvalueout_36;
  input [8:0]rx_cntvaluein_36;
  input rx_ce_36;
  input rx_en_vtc_36;
  input rx_inc_36;
  input rx_load_36;
  output [8:0]rx_cntvalueout_ext_36;
  input [8:0]rx_cntvaluein_ext_36;
  input rx_ce_ext_36;
  input rx_en_vtc_ext_36;
  input rx_inc_ext_36;
  input rx_load_ext_36;
  output fifo_empty_36;
  input fifo_rd_clk_36;
  input fifo_rd_en_36;
  output bitslip_error_36;
  input tri_t_37;
  input [8:0]tx_cntvaluein_37;
  output [8:0]tx_cntvalueout_37;
  input tx_ce_37;
  input tx_en_vtc_37;
  input tx_inc_37;
  input tx_load_37;
  output [8:0]rx_cntvalueout_37;
  input [8:0]rx_cntvaluein_37;
  input rx_ce_37;
  input rx_en_vtc_37;
  input rx_inc_37;
  input rx_load_37;
  output [8:0]rx_cntvalueout_ext_37;
  input [8:0]rx_cntvaluein_ext_37;
  input rx_ce_ext_37;
  input rx_en_vtc_ext_37;
  input rx_inc_ext_37;
  input rx_load_ext_37;
  output fifo_empty_37;
  input fifo_rd_clk_37;
  input fifo_rd_en_37;
  output bitslip_error_37;
  input tri_t_38;
  input [8:0]tx_cntvaluein_38;
  output [8:0]tx_cntvalueout_38;
  input tx_ce_38;
  input tx_en_vtc_38;
  input tx_inc_38;
  input tx_load_38;
  output [8:0]rx_cntvalueout_38;
  input [8:0]rx_cntvaluein_38;
  input rx_ce_38;
  input rx_en_vtc_38;
  input rx_inc_38;
  input rx_load_38;
  output [8:0]rx_cntvalueout_ext_38;
  input [8:0]rx_cntvaluein_ext_38;
  input rx_ce_ext_38;
  input rx_en_vtc_ext_38;
  input rx_inc_ext_38;
  input rx_load_ext_38;
  output fifo_empty_38;
  input fifo_rd_clk_38;
  input fifo_rd_en_38;
  output bitslip_error_38;
  input tri_t_39;
  input [8:0]tx_cntvaluein_39;
  output [8:0]tx_cntvalueout_39;
  input tx_ce_39;
  input tx_en_vtc_39;
  input tx_inc_39;
  input tx_load_39;
  output [8:0]rx_cntvalueout_39;
  input [8:0]rx_cntvaluein_39;
  input rx_ce_39;
  input rx_en_vtc_39;
  input rx_inc_39;
  input rx_load_39;
  output [8:0]rx_cntvalueout_ext_39;
  input [8:0]rx_cntvaluein_ext_39;
  input rx_ce_ext_39;
  input rx_en_vtc_ext_39;
  input rx_inc_ext_39;
  input rx_load_ext_39;
  output fifo_empty_39;
  input fifo_rd_clk_39;
  input fifo_rd_en_39;
  output bitslip_error_39;
  input tri_t_40;
  input [8:0]tx_cntvaluein_40;
  output [8:0]tx_cntvalueout_40;
  input tx_ce_40;
  input tx_en_vtc_40;
  input tx_inc_40;
  input tx_load_40;
  output [8:0]rx_cntvalueout_40;
  input [8:0]rx_cntvaluein_40;
  input rx_ce_40;
  input rx_en_vtc_40;
  input rx_inc_40;
  input rx_load_40;
  output [8:0]rx_cntvalueout_ext_40;
  input [8:0]rx_cntvaluein_ext_40;
  input rx_ce_ext_40;
  input rx_en_vtc_ext_40;
  input rx_inc_ext_40;
  input rx_load_ext_40;
  output fifo_empty_40;
  input fifo_rd_clk_40;
  input fifo_rd_en_40;
  output bitslip_error_40;
  input tri_t_41;
  input [8:0]tx_cntvaluein_41;
  output [8:0]tx_cntvalueout_41;
  input tx_ce_41;
  input tx_en_vtc_41;
  input tx_inc_41;
  input tx_load_41;
  output [8:0]rx_cntvalueout_41;
  input [8:0]rx_cntvaluein_41;
  input rx_ce_41;
  input rx_en_vtc_41;
  input rx_inc_41;
  input rx_load_41;
  output [8:0]rx_cntvalueout_ext_41;
  input [8:0]rx_cntvaluein_ext_41;
  input rx_ce_ext_41;
  input rx_en_vtc_ext_41;
  input rx_inc_ext_41;
  input rx_load_ext_41;
  output fifo_empty_41;
  input fifo_rd_clk_41;
  input fifo_rd_en_41;
  output bitslip_error_41;
  input tri_t_42;
  input [8:0]tx_cntvaluein_42;
  output [8:0]tx_cntvalueout_42;
  input tx_ce_42;
  input tx_en_vtc_42;
  input tx_inc_42;
  input tx_load_42;
  output [8:0]rx_cntvalueout_42;
  input [8:0]rx_cntvaluein_42;
  input rx_ce_42;
  input rx_en_vtc_42;
  input rx_inc_42;
  input rx_load_42;
  output [8:0]rx_cntvalueout_ext_42;
  input [8:0]rx_cntvaluein_ext_42;
  input rx_ce_ext_42;
  input rx_en_vtc_ext_42;
  input rx_inc_ext_42;
  input rx_load_ext_42;
  output fifo_empty_42;
  input fifo_rd_clk_42;
  input fifo_rd_en_42;
  output bitslip_error_42;
  input tri_t_43;
  input [8:0]tx_cntvaluein_43;
  output [8:0]tx_cntvalueout_43;
  input tx_ce_43;
  input tx_en_vtc_43;
  input tx_inc_43;
  input tx_load_43;
  output [8:0]rx_cntvalueout_43;
  input [8:0]rx_cntvaluein_43;
  input rx_ce_43;
  input rx_en_vtc_43;
  input rx_inc_43;
  input rx_load_43;
  output [8:0]rx_cntvalueout_ext_43;
  input [8:0]rx_cntvaluein_ext_43;
  input rx_ce_ext_43;
  input rx_en_vtc_ext_43;
  input rx_inc_ext_43;
  input rx_load_ext_43;
  output fifo_empty_43;
  input fifo_rd_clk_43;
  input fifo_rd_en_43;
  output bitslip_error_43;
  input tri_t_44;
  input [8:0]tx_cntvaluein_44;
  output [8:0]tx_cntvalueout_44;
  input tx_ce_44;
  input tx_en_vtc_44;
  input tx_inc_44;
  input tx_load_44;
  output [8:0]rx_cntvalueout_44;
  input [8:0]rx_cntvaluein_44;
  input rx_ce_44;
  input rx_en_vtc_44;
  input rx_inc_44;
  input rx_load_44;
  output [8:0]rx_cntvalueout_ext_44;
  input [8:0]rx_cntvaluein_ext_44;
  input rx_ce_ext_44;
  input rx_en_vtc_ext_44;
  input rx_inc_ext_44;
  input rx_load_ext_44;
  output fifo_empty_44;
  input fifo_rd_clk_44;
  input fifo_rd_en_44;
  output bitslip_error_44;
  input tri_t_45;
  input [8:0]tx_cntvaluein_45;
  output [8:0]tx_cntvalueout_45;
  input tx_ce_45;
  input tx_en_vtc_45;
  input tx_inc_45;
  input tx_load_45;
  output [8:0]rx_cntvalueout_45;
  input [8:0]rx_cntvaluein_45;
  input rx_ce_45;
  input rx_en_vtc_45;
  input rx_inc_45;
  input rx_load_45;
  output [8:0]rx_cntvalueout_ext_45;
  input [8:0]rx_cntvaluein_ext_45;
  input rx_ce_ext_45;
  input rx_en_vtc_ext_45;
  input rx_inc_ext_45;
  input rx_load_ext_45;
  output fifo_empty_45;
  input fifo_rd_clk_45;
  input fifo_rd_en_45;
  output bitslip_error_45;
  input tri_t_46;
  input [8:0]tx_cntvaluein_46;
  output [8:0]tx_cntvalueout_46;
  input tx_ce_46;
  input tx_en_vtc_46;
  input tx_inc_46;
  input tx_load_46;
  output [8:0]rx_cntvalueout_46;
  input [8:0]rx_cntvaluein_46;
  input rx_ce_46;
  input rx_en_vtc_46;
  input rx_inc_46;
  input rx_load_46;
  output [8:0]rx_cntvalueout_ext_46;
  input [8:0]rx_cntvaluein_ext_46;
  input rx_ce_ext_46;
  input rx_en_vtc_ext_46;
  input rx_inc_ext_46;
  input rx_load_ext_46;
  output fifo_empty_46;
  input fifo_rd_clk_46;
  input fifo_rd_en_46;
  output bitslip_error_46;
  input tri_t_47;
  input [8:0]tx_cntvaluein_47;
  output [8:0]tx_cntvalueout_47;
  input tx_ce_47;
  input tx_en_vtc_47;
  input tx_inc_47;
  input tx_load_47;
  output [8:0]rx_cntvalueout_47;
  input [8:0]rx_cntvaluein_47;
  input rx_ce_47;
  input rx_en_vtc_47;
  input rx_inc_47;
  input rx_load_47;
  output [8:0]rx_cntvalueout_ext_47;
  input [8:0]rx_cntvaluein_ext_47;
  input rx_ce_ext_47;
  input rx_en_vtc_ext_47;
  input rx_inc_ext_47;
  input rx_load_ext_47;
  output fifo_empty_47;
  input fifo_rd_clk_47;
  input fifo_rd_en_47;
  output bitslip_error_47;
  input tri_t_48;
  input [8:0]tx_cntvaluein_48;
  output [8:0]tx_cntvalueout_48;
  input tx_ce_48;
  input tx_en_vtc_48;
  input tx_inc_48;
  input tx_load_48;
  output [8:0]rx_cntvalueout_48;
  input [8:0]rx_cntvaluein_48;
  input rx_ce_48;
  input rx_en_vtc_48;
  input rx_inc_48;
  input rx_load_48;
  output [8:0]rx_cntvalueout_ext_48;
  input [8:0]rx_cntvaluein_ext_48;
  input rx_ce_ext_48;
  input rx_en_vtc_ext_48;
  input rx_inc_ext_48;
  input rx_load_ext_48;
  output fifo_empty_48;
  input fifo_rd_clk_48;
  input fifo_rd_en_48;
  output bitslip_error_48;
  input tri_t_49;
  input [8:0]tx_cntvaluein_49;
  output [8:0]tx_cntvalueout_49;
  input tx_ce_49;
  input tx_en_vtc_49;
  input tx_inc_49;
  input tx_load_49;
  output [8:0]rx_cntvalueout_49;
  input [8:0]rx_cntvaluein_49;
  input rx_ce_49;
  input rx_en_vtc_49;
  input rx_inc_49;
  input rx_load_49;
  output [8:0]rx_cntvalueout_ext_49;
  input [8:0]rx_cntvaluein_ext_49;
  input rx_ce_ext_49;
  input rx_en_vtc_ext_49;
  input rx_inc_ext_49;
  input rx_load_ext_49;
  output fifo_empty_49;
  input fifo_rd_clk_49;
  input fifo_rd_en_49;
  output bitslip_error_49;
  input tri_t_50;
  input [8:0]tx_cntvaluein_50;
  output [8:0]tx_cntvalueout_50;
  input tx_ce_50;
  input tx_en_vtc_50;
  input tx_inc_50;
  input tx_load_50;
  output [8:0]rx_cntvalueout_50;
  input [8:0]rx_cntvaluein_50;
  input rx_ce_50;
  input rx_en_vtc_50;
  input rx_inc_50;
  input rx_load_50;
  output [8:0]rx_cntvalueout_ext_50;
  input [8:0]rx_cntvaluein_ext_50;
  input rx_ce_ext_50;
  input rx_en_vtc_ext_50;
  input rx_inc_ext_50;
  input rx_load_ext_50;
  output fifo_empty_50;
  input fifo_rd_clk_50;
  input fifo_rd_en_50;
  output bitslip_error_50;
  input tri_t_51;
  input [8:0]tx_cntvaluein_51;
  output [8:0]tx_cntvalueout_51;
  input tx_ce_51;
  input tx_en_vtc_51;
  input tx_inc_51;
  input tx_load_51;
  output [8:0]rx_cntvalueout_51;
  input [8:0]rx_cntvaluein_51;
  input rx_ce_51;
  input rx_en_vtc_51;
  input rx_inc_51;
  input rx_load_51;
  output [8:0]rx_cntvalueout_ext_51;
  input [8:0]rx_cntvaluein_ext_51;
  input rx_ce_ext_51;
  input rx_en_vtc_ext_51;
  input rx_inc_ext_51;
  input rx_load_ext_51;
  output fifo_empty_51;
  input fifo_rd_clk_51;
  input fifo_rd_en_51;
  output bitslip_error_51;
  output fifo_wr_clk_0;
  output fifo_wr_clk_6;
  output fifo_wr_clk_13;
  output fifo_wr_clk_19;
  output fifo_wr_clk_26;
  output fifo_wr_clk_32;
  output fifo_wr_clk_39;
  output fifo_wr_clk_45;
  input [3:0]tri_tbyte0;
  output [8:0]bidir_tx_bs_tri_cntvalueout0;
  input [8:0]bidir_tx_bs_tri_cntvaluein0;
  input bidir_tx_bs_tri_en_vtc0;
  input bidir_tx_bs_tri_ce0;
  input bidir_tx_bs_tri_inc0;
  input bidir_tx_bs_tri_load0;
  input [3:0]tri_tbyte1;
  output [8:0]bidir_tx_bs_tri_cntvalueout1;
  input [8:0]bidir_tx_bs_tri_cntvaluein1;
  input bidir_tx_bs_tri_en_vtc1;
  input bidir_tx_bs_tri_ce1;
  input bidir_tx_bs_tri_inc1;
  input bidir_tx_bs_tri_load1;
  input [3:0]tri_tbyte2;
  output [8:0]bidir_tx_bs_tri_cntvalueout2;
  input [8:0]bidir_tx_bs_tri_cntvaluein2;
  input bidir_tx_bs_tri_en_vtc2;
  input bidir_tx_bs_tri_ce2;
  input bidir_tx_bs_tri_inc2;
  input bidir_tx_bs_tri_load2;
  input [3:0]tri_tbyte3;
  output [8:0]bidir_tx_bs_tri_cntvalueout3;
  input [8:0]bidir_tx_bs_tri_cntvaluein3;
  input bidir_tx_bs_tri_en_vtc3;
  input bidir_tx_bs_tri_ce3;
  input bidir_tx_bs_tri_inc3;
  input bidir_tx_bs_tri_load3;
  input [3:0]tri_tbyte4;
  output [8:0]bidir_tx_bs_tri_cntvalueout4;
  input [8:0]bidir_tx_bs_tri_cntvaluein4;
  input bidir_tx_bs_tri_en_vtc4;
  input bidir_tx_bs_tri_ce4;
  input bidir_tx_bs_tri_inc4;
  input bidir_tx_bs_tri_load4;
  input [3:0]tri_tbyte5;
  output [8:0]bidir_tx_bs_tri_cntvalueout5;
  input [8:0]bidir_tx_bs_tri_cntvaluein5;
  input bidir_tx_bs_tri_en_vtc5;
  input bidir_tx_bs_tri_ce5;
  input bidir_tx_bs_tri_inc5;
  input bidir_tx_bs_tri_load5;
  input [3:0]tri_tbyte6;
  output [8:0]bidir_tx_bs_tri_cntvalueout6;
  input [8:0]bidir_tx_bs_tri_cntvaluein6;
  input bidir_tx_bs_tri_en_vtc6;
  input bidir_tx_bs_tri_ce6;
  input bidir_tx_bs_tri_inc6;
  input bidir_tx_bs_tri_load6;
  input [3:0]tri_tbyte7;
  output [8:0]bidir_tx_bs_tri_cntvalueout7;
  input [8:0]bidir_tx_bs_tri_cntvaluein7;
  input bidir_tx_bs_tri_en_vtc7;
  input bidir_tx_bs_tri_ce7;
  input bidir_tx_bs_tri_inc7;
  input bidir_tx_bs_tri_load7;
  output fifo_rd_data_valid;
  input rst;

  wire \<const0> ;
  wire bs_rst_dphy_in;
  wire clk_rxn;
  wire clk_rxp;
  wire data_rxn0;
  wire data_rxn1;
  wire data_rxn2;
  wire data_rxn3;
  wire data_rxp0;
  wire data_rxp1;
  wire data_rxp2;
  wire data_rxp3;
  wire [7:0]data_to_fabric_data_rxp0;
  wire [7:0]data_to_fabric_data_rxp1;
  wire [7:0]data_to_fabric_data_rxp2;
  wire [7:0]data_to_fabric_data_rxp3;
  wire fifo_empty_2;
  wire fifo_empty_4;
  wire fifo_empty_6;
  wire fifo_empty_8;
  wire fifo_rd_clk_0;
  wire fifo_rd_en_2;
  wire fifo_rd_en_4;
  wire fifo_rd_en_6;
  wire fifo_rd_en_8;
  wire fifo_wr_clk_0;
  wire [4:0]hs_rx_disable;
  wire [4:0]lp_rx_o_n;
  wire [4:0]lp_rx_o_p;
  wire riu_clk;
  wire rst;
  wire rst_seq_done;

  assign bidir_tx_bs_tri_cntvalueout0[8] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout0[7] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout0[6] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout0[5] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout0[4] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout0[3] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout0[2] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout0[1] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout0[0] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout1[8] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout1[7] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout1[6] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout1[5] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout1[4] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout1[3] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout1[2] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout1[1] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout1[0] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout2[8] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout2[7] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout2[6] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout2[5] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout2[4] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout2[3] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout2[2] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout2[1] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout2[0] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout3[8] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout3[7] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout3[6] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout3[5] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout3[4] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout3[3] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout3[2] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout3[1] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout3[0] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout4[8] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout4[7] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout4[6] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout4[5] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout4[4] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout4[3] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout4[2] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout4[1] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout4[0] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout5[8] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout5[7] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout5[6] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout5[5] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout5[4] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout5[3] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout5[2] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout5[1] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout5[0] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout6[8] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout6[7] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout6[6] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout6[5] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout6[4] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout6[3] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout6[2] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout6[1] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout6[0] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout7[8] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout7[7] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout7[6] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout7[5] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout7[4] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout7[3] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout7[2] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout7[1] = \<const0> ;
  assign bidir_tx_bs_tri_cntvalueout7[0] = \<const0> ;
  assign bitslip_error_0 = \<const0> ;
  assign bitslip_error_1 = \<const0> ;
  assign bitslip_error_10 = \<const0> ;
  assign bitslip_error_11 = \<const0> ;
  assign bitslip_error_12 = \<const0> ;
  assign bitslip_error_13 = \<const0> ;
  assign bitslip_error_14 = \<const0> ;
  assign bitslip_error_15 = \<const0> ;
  assign bitslip_error_16 = \<const0> ;
  assign bitslip_error_17 = \<const0> ;
  assign bitslip_error_18 = \<const0> ;
  assign bitslip_error_19 = \<const0> ;
  assign bitslip_error_2 = \<const0> ;
  assign bitslip_error_20 = \<const0> ;
  assign bitslip_error_21 = \<const0> ;
  assign bitslip_error_22 = \<const0> ;
  assign bitslip_error_23 = \<const0> ;
  assign bitslip_error_24 = \<const0> ;
  assign bitslip_error_25 = \<const0> ;
  assign bitslip_error_26 = \<const0> ;
  assign bitslip_error_27 = \<const0> ;
  assign bitslip_error_28 = \<const0> ;
  assign bitslip_error_29 = \<const0> ;
  assign bitslip_error_3 = \<const0> ;
  assign bitslip_error_30 = \<const0> ;
  assign bitslip_error_31 = \<const0> ;
  assign bitslip_error_32 = \<const0> ;
  assign bitslip_error_33 = \<const0> ;
  assign bitslip_error_34 = \<const0> ;
  assign bitslip_error_35 = \<const0> ;
  assign bitslip_error_36 = \<const0> ;
  assign bitslip_error_37 = \<const0> ;
  assign bitslip_error_38 = \<const0> ;
  assign bitslip_error_39 = \<const0> ;
  assign bitslip_error_4 = \<const0> ;
  assign bitslip_error_40 = \<const0> ;
  assign bitslip_error_41 = \<const0> ;
  assign bitslip_error_42 = \<const0> ;
  assign bitslip_error_43 = \<const0> ;
  assign bitslip_error_44 = \<const0> ;
  assign bitslip_error_45 = \<const0> ;
  assign bitslip_error_46 = \<const0> ;
  assign bitslip_error_47 = \<const0> ;
  assign bitslip_error_48 = \<const0> ;
  assign bitslip_error_49 = \<const0> ;
  assign bitslip_error_5 = \<const0> ;
  assign bitslip_error_50 = \<const0> ;
  assign bitslip_error_51 = \<const0> ;
  assign bitslip_error_6 = \<const0> ;
  assign bitslip_error_7 = \<const0> ;
  assign bitslip_error_8 = \<const0> ;
  assign bitslip_error_9 = \<const0> ;
  assign clk_from_ibuf = \<const0> ;
  assign data_to_fabric_clk_rxn[7] = \<const0> ;
  assign data_to_fabric_clk_rxn[6] = \<const0> ;
  assign data_to_fabric_clk_rxn[5] = \<const0> ;
  assign data_to_fabric_clk_rxn[4] = \<const0> ;
  assign data_to_fabric_clk_rxn[3] = \<const0> ;
  assign data_to_fabric_clk_rxn[2] = \<const0> ;
  assign data_to_fabric_clk_rxn[1] = \<const0> ;
  assign data_to_fabric_clk_rxn[0] = \<const0> ;
  assign data_to_fabric_clk_rxp[7] = \<const0> ;
  assign data_to_fabric_clk_rxp[6] = \<const0> ;
  assign data_to_fabric_clk_rxp[5] = \<const0> ;
  assign data_to_fabric_clk_rxp[4] = \<const0> ;
  assign data_to_fabric_clk_rxp[3] = \<const0> ;
  assign data_to_fabric_clk_rxp[2] = \<const0> ;
  assign data_to_fabric_clk_rxp[1] = \<const0> ;
  assign data_to_fabric_clk_rxp[0] = \<const0> ;
  assign data_to_fabric_data_rxn0[7] = \<const0> ;
  assign data_to_fabric_data_rxn0[6] = \<const0> ;
  assign data_to_fabric_data_rxn0[5] = \<const0> ;
  assign data_to_fabric_data_rxn0[4] = \<const0> ;
  assign data_to_fabric_data_rxn0[3] = \<const0> ;
  assign data_to_fabric_data_rxn0[2] = \<const0> ;
  assign data_to_fabric_data_rxn0[1] = \<const0> ;
  assign data_to_fabric_data_rxn0[0] = \<const0> ;
  assign data_to_fabric_data_rxn1[7] = \<const0> ;
  assign data_to_fabric_data_rxn1[6] = \<const0> ;
  assign data_to_fabric_data_rxn1[5] = \<const0> ;
  assign data_to_fabric_data_rxn1[4] = \<const0> ;
  assign data_to_fabric_data_rxn1[3] = \<const0> ;
  assign data_to_fabric_data_rxn1[2] = \<const0> ;
  assign data_to_fabric_data_rxn1[1] = \<const0> ;
  assign data_to_fabric_data_rxn1[0] = \<const0> ;
  assign data_to_fabric_data_rxn2[7] = \<const0> ;
  assign data_to_fabric_data_rxn2[6] = \<const0> ;
  assign data_to_fabric_data_rxn2[5] = \<const0> ;
  assign data_to_fabric_data_rxn2[4] = \<const0> ;
  assign data_to_fabric_data_rxn2[3] = \<const0> ;
  assign data_to_fabric_data_rxn2[2] = \<const0> ;
  assign data_to_fabric_data_rxn2[1] = \<const0> ;
  assign data_to_fabric_data_rxn2[0] = \<const0> ;
  assign data_to_fabric_data_rxn3[7] = \<const0> ;
  assign data_to_fabric_data_rxn3[6] = \<const0> ;
  assign data_to_fabric_data_rxn3[5] = \<const0> ;
  assign data_to_fabric_data_rxn3[4] = \<const0> ;
  assign data_to_fabric_data_rxn3[3] = \<const0> ;
  assign data_to_fabric_data_rxn3[2] = \<const0> ;
  assign data_to_fabric_data_rxn3[1] = \<const0> ;
  assign data_to_fabric_data_rxn3[0] = \<const0> ;
  assign dly_rdy_bsc0 = \<const0> ;
  assign dly_rdy_bsc1 = \<const0> ;
  assign dly_rdy_bsc2 = \<const0> ;
  assign dly_rdy_bsc3 = \<const0> ;
  assign dly_rdy_bsc4 = \<const0> ;
  assign dly_rdy_bsc5 = \<const0> ;
  assign dly_rdy_bsc6 = \<const0> ;
  assign dly_rdy_bsc7 = \<const0> ;
  assign do_out[15] = \<const0> ;
  assign do_out[14] = \<const0> ;
  assign do_out[13] = \<const0> ;
  assign do_out[12] = \<const0> ;
  assign do_out[11] = \<const0> ;
  assign do_out[10] = \<const0> ;
  assign do_out[9] = \<const0> ;
  assign do_out[8] = \<const0> ;
  assign do_out[7] = \<const0> ;
  assign do_out[6] = \<const0> ;
  assign do_out[5] = \<const0> ;
  assign do_out[4] = \<const0> ;
  assign do_out[3] = \<const0> ;
  assign do_out[2] = \<const0> ;
  assign do_out[1] = \<const0> ;
  assign do_out[0] = \<const0> ;
  assign drdy = \<const0> ;
  assign fifo_empty_0 = \<const0> ;
  assign fifo_empty_1 = \<const0> ;
  assign fifo_empty_10 = \<const0> ;
  assign fifo_empty_11 = \<const0> ;
  assign fifo_empty_12 = \<const0> ;
  assign fifo_empty_13 = \<const0> ;
  assign fifo_empty_14 = \<const0> ;
  assign fifo_empty_15 = \<const0> ;
  assign fifo_empty_16 = \<const0> ;
  assign fifo_empty_17 = \<const0> ;
  assign fifo_empty_18 = \<const0> ;
  assign fifo_empty_19 = \<const0> ;
  assign fifo_empty_20 = \<const0> ;
  assign fifo_empty_21 = \<const0> ;
  assign fifo_empty_22 = \<const0> ;
  assign fifo_empty_23 = \<const0> ;
  assign fifo_empty_24 = \<const0> ;
  assign fifo_empty_25 = \<const0> ;
  assign fifo_empty_26 = \<const0> ;
  assign fifo_empty_27 = \<const0> ;
  assign fifo_empty_28 = \<const0> ;
  assign fifo_empty_29 = \<const0> ;
  assign fifo_empty_3 = \<const0> ;
  assign fifo_empty_30 = \<const0> ;
  assign fifo_empty_31 = \<const0> ;
  assign fifo_empty_32 = \<const0> ;
  assign fifo_empty_33 = \<const0> ;
  assign fifo_empty_34 = \<const0> ;
  assign fifo_empty_35 = \<const0> ;
  assign fifo_empty_36 = \<const0> ;
  assign fifo_empty_37 = \<const0> ;
  assign fifo_empty_38 = \<const0> ;
  assign fifo_empty_39 = \<const0> ;
  assign fifo_empty_40 = \<const0> ;
  assign fifo_empty_41 = \<const0> ;
  assign fifo_empty_42 = \<const0> ;
  assign fifo_empty_43 = \<const0> ;
  assign fifo_empty_44 = \<const0> ;
  assign fifo_empty_45 = \<const0> ;
  assign fifo_empty_46 = \<const0> ;
  assign fifo_empty_47 = \<const0> ;
  assign fifo_empty_48 = \<const0> ;
  assign fifo_empty_49 = \<const0> ;
  assign fifo_empty_5 = \<const0> ;
  assign fifo_empty_50 = \<const0> ;
  assign fifo_empty_51 = \<const0> ;
  assign fifo_empty_7 = \<const0> ;
  assign fifo_empty_9 = \<const0> ;
  assign fifo_rd_data_valid = \<const0> ;
  assign fifo_wr_clk_13 = \<const0> ;
  assign fifo_wr_clk_19 = \<const0> ;
  assign fifo_wr_clk_26 = \<const0> ;
  assign fifo_wr_clk_32 = \<const0> ;
  assign fifo_wr_clk_39 = \<const0> ;
  assign fifo_wr_clk_45 = \<const0> ;
  assign fifo_wr_clk_6 = \<const0> ;
  assign intf_rdy = \<const0> ;
  assign pll0_clkout0 = \<const0> ;
  assign pll0_clkout1 = \<const0> ;
  assign pll0_locked = \<const0> ;
  assign pll1_clkout0 = \<const0> ;
  assign pll1_locked = \<const0> ;
  assign riu_rd_data_bg0[15] = \<const0> ;
  assign riu_rd_data_bg0[14] = \<const0> ;
  assign riu_rd_data_bg0[13] = \<const0> ;
  assign riu_rd_data_bg0[12] = \<const0> ;
  assign riu_rd_data_bg0[11] = \<const0> ;
  assign riu_rd_data_bg0[10] = \<const0> ;
  assign riu_rd_data_bg0[9] = \<const0> ;
  assign riu_rd_data_bg0[8] = \<const0> ;
  assign riu_rd_data_bg0[7] = \<const0> ;
  assign riu_rd_data_bg0[6] = \<const0> ;
  assign riu_rd_data_bg0[5] = \<const0> ;
  assign riu_rd_data_bg0[4] = \<const0> ;
  assign riu_rd_data_bg0[3] = \<const0> ;
  assign riu_rd_data_bg0[2] = \<const0> ;
  assign riu_rd_data_bg0[1] = \<const0> ;
  assign riu_rd_data_bg0[0] = \<const0> ;
  assign riu_rd_data_bg0_bs0[15] = \<const0> ;
  assign riu_rd_data_bg0_bs0[14] = \<const0> ;
  assign riu_rd_data_bg0_bs0[13] = \<const0> ;
  assign riu_rd_data_bg0_bs0[12] = \<const0> ;
  assign riu_rd_data_bg0_bs0[11] = \<const0> ;
  assign riu_rd_data_bg0_bs0[10] = \<const0> ;
  assign riu_rd_data_bg0_bs0[9] = \<const0> ;
  assign riu_rd_data_bg0_bs0[8] = \<const0> ;
  assign riu_rd_data_bg0_bs0[7] = \<const0> ;
  assign riu_rd_data_bg0_bs0[6] = \<const0> ;
  assign riu_rd_data_bg0_bs0[5] = \<const0> ;
  assign riu_rd_data_bg0_bs0[4] = \<const0> ;
  assign riu_rd_data_bg0_bs0[3] = \<const0> ;
  assign riu_rd_data_bg0_bs0[2] = \<const0> ;
  assign riu_rd_data_bg0_bs0[1] = \<const0> ;
  assign riu_rd_data_bg0_bs0[0] = \<const0> ;
  assign riu_rd_data_bg0_bs1[15] = \<const0> ;
  assign riu_rd_data_bg0_bs1[14] = \<const0> ;
  assign riu_rd_data_bg0_bs1[13] = \<const0> ;
  assign riu_rd_data_bg0_bs1[12] = \<const0> ;
  assign riu_rd_data_bg0_bs1[11] = \<const0> ;
  assign riu_rd_data_bg0_bs1[10] = \<const0> ;
  assign riu_rd_data_bg0_bs1[9] = \<const0> ;
  assign riu_rd_data_bg0_bs1[8] = \<const0> ;
  assign riu_rd_data_bg0_bs1[7] = \<const0> ;
  assign riu_rd_data_bg0_bs1[6] = \<const0> ;
  assign riu_rd_data_bg0_bs1[5] = \<const0> ;
  assign riu_rd_data_bg0_bs1[4] = \<const0> ;
  assign riu_rd_data_bg0_bs1[3] = \<const0> ;
  assign riu_rd_data_bg0_bs1[2] = \<const0> ;
  assign riu_rd_data_bg0_bs1[1] = \<const0> ;
  assign riu_rd_data_bg0_bs1[0] = \<const0> ;
  assign riu_rd_data_bg1[15] = \<const0> ;
  assign riu_rd_data_bg1[14] = \<const0> ;
  assign riu_rd_data_bg1[13] = \<const0> ;
  assign riu_rd_data_bg1[12] = \<const0> ;
  assign riu_rd_data_bg1[11] = \<const0> ;
  assign riu_rd_data_bg1[10] = \<const0> ;
  assign riu_rd_data_bg1[9] = \<const0> ;
  assign riu_rd_data_bg1[8] = \<const0> ;
  assign riu_rd_data_bg1[7] = \<const0> ;
  assign riu_rd_data_bg1[6] = \<const0> ;
  assign riu_rd_data_bg1[5] = \<const0> ;
  assign riu_rd_data_bg1[4] = \<const0> ;
  assign riu_rd_data_bg1[3] = \<const0> ;
  assign riu_rd_data_bg1[2] = \<const0> ;
  assign riu_rd_data_bg1[1] = \<const0> ;
  assign riu_rd_data_bg1[0] = \<const0> ;
  assign riu_rd_data_bg1_bs2[15] = \<const0> ;
  assign riu_rd_data_bg1_bs2[14] = \<const0> ;
  assign riu_rd_data_bg1_bs2[13] = \<const0> ;
  assign riu_rd_data_bg1_bs2[12] = \<const0> ;
  assign riu_rd_data_bg1_bs2[11] = \<const0> ;
  assign riu_rd_data_bg1_bs2[10] = \<const0> ;
  assign riu_rd_data_bg1_bs2[9] = \<const0> ;
  assign riu_rd_data_bg1_bs2[8] = \<const0> ;
  assign riu_rd_data_bg1_bs2[7] = \<const0> ;
  assign riu_rd_data_bg1_bs2[6] = \<const0> ;
  assign riu_rd_data_bg1_bs2[5] = \<const0> ;
  assign riu_rd_data_bg1_bs2[4] = \<const0> ;
  assign riu_rd_data_bg1_bs2[3] = \<const0> ;
  assign riu_rd_data_bg1_bs2[2] = \<const0> ;
  assign riu_rd_data_bg1_bs2[1] = \<const0> ;
  assign riu_rd_data_bg1_bs2[0] = \<const0> ;
  assign riu_rd_data_bg1_bs3[15] = \<const0> ;
  assign riu_rd_data_bg1_bs3[14] = \<const0> ;
  assign riu_rd_data_bg1_bs3[13] = \<const0> ;
  assign riu_rd_data_bg1_bs3[12] = \<const0> ;
  assign riu_rd_data_bg1_bs3[11] = \<const0> ;
  assign riu_rd_data_bg1_bs3[10] = \<const0> ;
  assign riu_rd_data_bg1_bs3[9] = \<const0> ;
  assign riu_rd_data_bg1_bs3[8] = \<const0> ;
  assign riu_rd_data_bg1_bs3[7] = \<const0> ;
  assign riu_rd_data_bg1_bs3[6] = \<const0> ;
  assign riu_rd_data_bg1_bs3[5] = \<const0> ;
  assign riu_rd_data_bg1_bs3[4] = \<const0> ;
  assign riu_rd_data_bg1_bs3[3] = \<const0> ;
  assign riu_rd_data_bg1_bs3[2] = \<const0> ;
  assign riu_rd_data_bg1_bs3[1] = \<const0> ;
  assign riu_rd_data_bg1_bs3[0] = \<const0> ;
  assign riu_rd_data_bg2[15] = \<const0> ;
  assign riu_rd_data_bg2[14] = \<const0> ;
  assign riu_rd_data_bg2[13] = \<const0> ;
  assign riu_rd_data_bg2[12] = \<const0> ;
  assign riu_rd_data_bg2[11] = \<const0> ;
  assign riu_rd_data_bg2[10] = \<const0> ;
  assign riu_rd_data_bg2[9] = \<const0> ;
  assign riu_rd_data_bg2[8] = \<const0> ;
  assign riu_rd_data_bg2[7] = \<const0> ;
  assign riu_rd_data_bg2[6] = \<const0> ;
  assign riu_rd_data_bg2[5] = \<const0> ;
  assign riu_rd_data_bg2[4] = \<const0> ;
  assign riu_rd_data_bg2[3] = \<const0> ;
  assign riu_rd_data_bg2[2] = \<const0> ;
  assign riu_rd_data_bg2[1] = \<const0> ;
  assign riu_rd_data_bg2[0] = \<const0> ;
  assign riu_rd_data_bg2_bs4[15] = \<const0> ;
  assign riu_rd_data_bg2_bs4[14] = \<const0> ;
  assign riu_rd_data_bg2_bs4[13] = \<const0> ;
  assign riu_rd_data_bg2_bs4[12] = \<const0> ;
  assign riu_rd_data_bg2_bs4[11] = \<const0> ;
  assign riu_rd_data_bg2_bs4[10] = \<const0> ;
  assign riu_rd_data_bg2_bs4[9] = \<const0> ;
  assign riu_rd_data_bg2_bs4[8] = \<const0> ;
  assign riu_rd_data_bg2_bs4[7] = \<const0> ;
  assign riu_rd_data_bg2_bs4[6] = \<const0> ;
  assign riu_rd_data_bg2_bs4[5] = \<const0> ;
  assign riu_rd_data_bg2_bs4[4] = \<const0> ;
  assign riu_rd_data_bg2_bs4[3] = \<const0> ;
  assign riu_rd_data_bg2_bs4[2] = \<const0> ;
  assign riu_rd_data_bg2_bs4[1] = \<const0> ;
  assign riu_rd_data_bg2_bs4[0] = \<const0> ;
  assign riu_rd_data_bg2_bs5[15] = \<const0> ;
  assign riu_rd_data_bg2_bs5[14] = \<const0> ;
  assign riu_rd_data_bg2_bs5[13] = \<const0> ;
  assign riu_rd_data_bg2_bs5[12] = \<const0> ;
  assign riu_rd_data_bg2_bs5[11] = \<const0> ;
  assign riu_rd_data_bg2_bs5[10] = \<const0> ;
  assign riu_rd_data_bg2_bs5[9] = \<const0> ;
  assign riu_rd_data_bg2_bs5[8] = \<const0> ;
  assign riu_rd_data_bg2_bs5[7] = \<const0> ;
  assign riu_rd_data_bg2_bs5[6] = \<const0> ;
  assign riu_rd_data_bg2_bs5[5] = \<const0> ;
  assign riu_rd_data_bg2_bs5[4] = \<const0> ;
  assign riu_rd_data_bg2_bs5[3] = \<const0> ;
  assign riu_rd_data_bg2_bs5[2] = \<const0> ;
  assign riu_rd_data_bg2_bs5[1] = \<const0> ;
  assign riu_rd_data_bg2_bs5[0] = \<const0> ;
  assign riu_rd_data_bg3[15] = \<const0> ;
  assign riu_rd_data_bg3[14] = \<const0> ;
  assign riu_rd_data_bg3[13] = \<const0> ;
  assign riu_rd_data_bg3[12] = \<const0> ;
  assign riu_rd_data_bg3[11] = \<const0> ;
  assign riu_rd_data_bg3[10] = \<const0> ;
  assign riu_rd_data_bg3[9] = \<const0> ;
  assign riu_rd_data_bg3[8] = \<const0> ;
  assign riu_rd_data_bg3[7] = \<const0> ;
  assign riu_rd_data_bg3[6] = \<const0> ;
  assign riu_rd_data_bg3[5] = \<const0> ;
  assign riu_rd_data_bg3[4] = \<const0> ;
  assign riu_rd_data_bg3[3] = \<const0> ;
  assign riu_rd_data_bg3[2] = \<const0> ;
  assign riu_rd_data_bg3[1] = \<const0> ;
  assign riu_rd_data_bg3[0] = \<const0> ;
  assign riu_rd_data_bg3_bs6[15] = \<const0> ;
  assign riu_rd_data_bg3_bs6[14] = \<const0> ;
  assign riu_rd_data_bg3_bs6[13] = \<const0> ;
  assign riu_rd_data_bg3_bs6[12] = \<const0> ;
  assign riu_rd_data_bg3_bs6[11] = \<const0> ;
  assign riu_rd_data_bg3_bs6[10] = \<const0> ;
  assign riu_rd_data_bg3_bs6[9] = \<const0> ;
  assign riu_rd_data_bg3_bs6[8] = \<const0> ;
  assign riu_rd_data_bg3_bs6[7] = \<const0> ;
  assign riu_rd_data_bg3_bs6[6] = \<const0> ;
  assign riu_rd_data_bg3_bs6[5] = \<const0> ;
  assign riu_rd_data_bg3_bs6[4] = \<const0> ;
  assign riu_rd_data_bg3_bs6[3] = \<const0> ;
  assign riu_rd_data_bg3_bs6[2] = \<const0> ;
  assign riu_rd_data_bg3_bs6[1] = \<const0> ;
  assign riu_rd_data_bg3_bs6[0] = \<const0> ;
  assign riu_rd_data_bg3_bs7[15] = \<const0> ;
  assign riu_rd_data_bg3_bs7[14] = \<const0> ;
  assign riu_rd_data_bg3_bs7[13] = \<const0> ;
  assign riu_rd_data_bg3_bs7[12] = \<const0> ;
  assign riu_rd_data_bg3_bs7[11] = \<const0> ;
  assign riu_rd_data_bg3_bs7[10] = \<const0> ;
  assign riu_rd_data_bg3_bs7[9] = \<const0> ;
  assign riu_rd_data_bg3_bs7[8] = \<const0> ;
  assign riu_rd_data_bg3_bs7[7] = \<const0> ;
  assign riu_rd_data_bg3_bs7[6] = \<const0> ;
  assign riu_rd_data_bg3_bs7[5] = \<const0> ;
  assign riu_rd_data_bg3_bs7[4] = \<const0> ;
  assign riu_rd_data_bg3_bs7[3] = \<const0> ;
  assign riu_rd_data_bg3_bs7[2] = \<const0> ;
  assign riu_rd_data_bg3_bs7[1] = \<const0> ;
  assign riu_rd_data_bg3_bs7[0] = \<const0> ;
  assign riu_valid_bg0 = \<const0> ;
  assign riu_valid_bg0_bs0 = \<const0> ;
  assign riu_valid_bg0_bs1 = \<const0> ;
  assign riu_valid_bg1 = \<const0> ;
  assign riu_valid_bg1_bs2 = \<const0> ;
  assign riu_valid_bg1_bs3 = \<const0> ;
  assign riu_valid_bg2 = \<const0> ;
  assign riu_valid_bg2_bs4 = \<const0> ;
  assign riu_valid_bg2_bs5 = \<const0> ;
  assign riu_valid_bg3 = \<const0> ;
  assign riu_valid_bg3_bs6 = \<const0> ;
  assign riu_valid_bg3_bs7 = \<const0> ;
  assign rx_bitslip_sync_done = \<const0> ;
  assign rx_cntvalueout_0[8] = \<const0> ;
  assign rx_cntvalueout_0[7] = \<const0> ;
  assign rx_cntvalueout_0[6] = \<const0> ;
  assign rx_cntvalueout_0[5] = \<const0> ;
  assign rx_cntvalueout_0[4] = \<const0> ;
  assign rx_cntvalueout_0[3] = \<const0> ;
  assign rx_cntvalueout_0[2] = \<const0> ;
  assign rx_cntvalueout_0[1] = \<const0> ;
  assign rx_cntvalueout_0[0] = \<const0> ;
  assign rx_cntvalueout_1[8] = \<const0> ;
  assign rx_cntvalueout_1[7] = \<const0> ;
  assign rx_cntvalueout_1[6] = \<const0> ;
  assign rx_cntvalueout_1[5] = \<const0> ;
  assign rx_cntvalueout_1[4] = \<const0> ;
  assign rx_cntvalueout_1[3] = \<const0> ;
  assign rx_cntvalueout_1[2] = \<const0> ;
  assign rx_cntvalueout_1[1] = \<const0> ;
  assign rx_cntvalueout_1[0] = \<const0> ;
  assign rx_cntvalueout_10[8] = \<const0> ;
  assign rx_cntvalueout_10[7] = \<const0> ;
  assign rx_cntvalueout_10[6] = \<const0> ;
  assign rx_cntvalueout_10[5] = \<const0> ;
  assign rx_cntvalueout_10[4] = \<const0> ;
  assign rx_cntvalueout_10[3] = \<const0> ;
  assign rx_cntvalueout_10[2] = \<const0> ;
  assign rx_cntvalueout_10[1] = \<const0> ;
  assign rx_cntvalueout_10[0] = \<const0> ;
  assign rx_cntvalueout_11[8] = \<const0> ;
  assign rx_cntvalueout_11[7] = \<const0> ;
  assign rx_cntvalueout_11[6] = \<const0> ;
  assign rx_cntvalueout_11[5] = \<const0> ;
  assign rx_cntvalueout_11[4] = \<const0> ;
  assign rx_cntvalueout_11[3] = \<const0> ;
  assign rx_cntvalueout_11[2] = \<const0> ;
  assign rx_cntvalueout_11[1] = \<const0> ;
  assign rx_cntvalueout_11[0] = \<const0> ;
  assign rx_cntvalueout_12[8] = \<const0> ;
  assign rx_cntvalueout_12[7] = \<const0> ;
  assign rx_cntvalueout_12[6] = \<const0> ;
  assign rx_cntvalueout_12[5] = \<const0> ;
  assign rx_cntvalueout_12[4] = \<const0> ;
  assign rx_cntvalueout_12[3] = \<const0> ;
  assign rx_cntvalueout_12[2] = \<const0> ;
  assign rx_cntvalueout_12[1] = \<const0> ;
  assign rx_cntvalueout_12[0] = \<const0> ;
  assign rx_cntvalueout_13[8] = \<const0> ;
  assign rx_cntvalueout_13[7] = \<const0> ;
  assign rx_cntvalueout_13[6] = \<const0> ;
  assign rx_cntvalueout_13[5] = \<const0> ;
  assign rx_cntvalueout_13[4] = \<const0> ;
  assign rx_cntvalueout_13[3] = \<const0> ;
  assign rx_cntvalueout_13[2] = \<const0> ;
  assign rx_cntvalueout_13[1] = \<const0> ;
  assign rx_cntvalueout_13[0] = \<const0> ;
  assign rx_cntvalueout_14[8] = \<const0> ;
  assign rx_cntvalueout_14[7] = \<const0> ;
  assign rx_cntvalueout_14[6] = \<const0> ;
  assign rx_cntvalueout_14[5] = \<const0> ;
  assign rx_cntvalueout_14[4] = \<const0> ;
  assign rx_cntvalueout_14[3] = \<const0> ;
  assign rx_cntvalueout_14[2] = \<const0> ;
  assign rx_cntvalueout_14[1] = \<const0> ;
  assign rx_cntvalueout_14[0] = \<const0> ;
  assign rx_cntvalueout_15[8] = \<const0> ;
  assign rx_cntvalueout_15[7] = \<const0> ;
  assign rx_cntvalueout_15[6] = \<const0> ;
  assign rx_cntvalueout_15[5] = \<const0> ;
  assign rx_cntvalueout_15[4] = \<const0> ;
  assign rx_cntvalueout_15[3] = \<const0> ;
  assign rx_cntvalueout_15[2] = \<const0> ;
  assign rx_cntvalueout_15[1] = \<const0> ;
  assign rx_cntvalueout_15[0] = \<const0> ;
  assign rx_cntvalueout_16[8] = \<const0> ;
  assign rx_cntvalueout_16[7] = \<const0> ;
  assign rx_cntvalueout_16[6] = \<const0> ;
  assign rx_cntvalueout_16[5] = \<const0> ;
  assign rx_cntvalueout_16[4] = \<const0> ;
  assign rx_cntvalueout_16[3] = \<const0> ;
  assign rx_cntvalueout_16[2] = \<const0> ;
  assign rx_cntvalueout_16[1] = \<const0> ;
  assign rx_cntvalueout_16[0] = \<const0> ;
  assign rx_cntvalueout_17[8] = \<const0> ;
  assign rx_cntvalueout_17[7] = \<const0> ;
  assign rx_cntvalueout_17[6] = \<const0> ;
  assign rx_cntvalueout_17[5] = \<const0> ;
  assign rx_cntvalueout_17[4] = \<const0> ;
  assign rx_cntvalueout_17[3] = \<const0> ;
  assign rx_cntvalueout_17[2] = \<const0> ;
  assign rx_cntvalueout_17[1] = \<const0> ;
  assign rx_cntvalueout_17[0] = \<const0> ;
  assign rx_cntvalueout_18[8] = \<const0> ;
  assign rx_cntvalueout_18[7] = \<const0> ;
  assign rx_cntvalueout_18[6] = \<const0> ;
  assign rx_cntvalueout_18[5] = \<const0> ;
  assign rx_cntvalueout_18[4] = \<const0> ;
  assign rx_cntvalueout_18[3] = \<const0> ;
  assign rx_cntvalueout_18[2] = \<const0> ;
  assign rx_cntvalueout_18[1] = \<const0> ;
  assign rx_cntvalueout_18[0] = \<const0> ;
  assign rx_cntvalueout_19[8] = \<const0> ;
  assign rx_cntvalueout_19[7] = \<const0> ;
  assign rx_cntvalueout_19[6] = \<const0> ;
  assign rx_cntvalueout_19[5] = \<const0> ;
  assign rx_cntvalueout_19[4] = \<const0> ;
  assign rx_cntvalueout_19[3] = \<const0> ;
  assign rx_cntvalueout_19[2] = \<const0> ;
  assign rx_cntvalueout_19[1] = \<const0> ;
  assign rx_cntvalueout_19[0] = \<const0> ;
  assign rx_cntvalueout_2[8] = \<const0> ;
  assign rx_cntvalueout_2[7] = \<const0> ;
  assign rx_cntvalueout_2[6] = \<const0> ;
  assign rx_cntvalueout_2[5] = \<const0> ;
  assign rx_cntvalueout_2[4] = \<const0> ;
  assign rx_cntvalueout_2[3] = \<const0> ;
  assign rx_cntvalueout_2[2] = \<const0> ;
  assign rx_cntvalueout_2[1] = \<const0> ;
  assign rx_cntvalueout_2[0] = \<const0> ;
  assign rx_cntvalueout_20[8] = \<const0> ;
  assign rx_cntvalueout_20[7] = \<const0> ;
  assign rx_cntvalueout_20[6] = \<const0> ;
  assign rx_cntvalueout_20[5] = \<const0> ;
  assign rx_cntvalueout_20[4] = \<const0> ;
  assign rx_cntvalueout_20[3] = \<const0> ;
  assign rx_cntvalueout_20[2] = \<const0> ;
  assign rx_cntvalueout_20[1] = \<const0> ;
  assign rx_cntvalueout_20[0] = \<const0> ;
  assign rx_cntvalueout_21[8] = \<const0> ;
  assign rx_cntvalueout_21[7] = \<const0> ;
  assign rx_cntvalueout_21[6] = \<const0> ;
  assign rx_cntvalueout_21[5] = \<const0> ;
  assign rx_cntvalueout_21[4] = \<const0> ;
  assign rx_cntvalueout_21[3] = \<const0> ;
  assign rx_cntvalueout_21[2] = \<const0> ;
  assign rx_cntvalueout_21[1] = \<const0> ;
  assign rx_cntvalueout_21[0] = \<const0> ;
  assign rx_cntvalueout_22[8] = \<const0> ;
  assign rx_cntvalueout_22[7] = \<const0> ;
  assign rx_cntvalueout_22[6] = \<const0> ;
  assign rx_cntvalueout_22[5] = \<const0> ;
  assign rx_cntvalueout_22[4] = \<const0> ;
  assign rx_cntvalueout_22[3] = \<const0> ;
  assign rx_cntvalueout_22[2] = \<const0> ;
  assign rx_cntvalueout_22[1] = \<const0> ;
  assign rx_cntvalueout_22[0] = \<const0> ;
  assign rx_cntvalueout_23[8] = \<const0> ;
  assign rx_cntvalueout_23[7] = \<const0> ;
  assign rx_cntvalueout_23[6] = \<const0> ;
  assign rx_cntvalueout_23[5] = \<const0> ;
  assign rx_cntvalueout_23[4] = \<const0> ;
  assign rx_cntvalueout_23[3] = \<const0> ;
  assign rx_cntvalueout_23[2] = \<const0> ;
  assign rx_cntvalueout_23[1] = \<const0> ;
  assign rx_cntvalueout_23[0] = \<const0> ;
  assign rx_cntvalueout_24[8] = \<const0> ;
  assign rx_cntvalueout_24[7] = \<const0> ;
  assign rx_cntvalueout_24[6] = \<const0> ;
  assign rx_cntvalueout_24[5] = \<const0> ;
  assign rx_cntvalueout_24[4] = \<const0> ;
  assign rx_cntvalueout_24[3] = \<const0> ;
  assign rx_cntvalueout_24[2] = \<const0> ;
  assign rx_cntvalueout_24[1] = \<const0> ;
  assign rx_cntvalueout_24[0] = \<const0> ;
  assign rx_cntvalueout_25[8] = \<const0> ;
  assign rx_cntvalueout_25[7] = \<const0> ;
  assign rx_cntvalueout_25[6] = \<const0> ;
  assign rx_cntvalueout_25[5] = \<const0> ;
  assign rx_cntvalueout_25[4] = \<const0> ;
  assign rx_cntvalueout_25[3] = \<const0> ;
  assign rx_cntvalueout_25[2] = \<const0> ;
  assign rx_cntvalueout_25[1] = \<const0> ;
  assign rx_cntvalueout_25[0] = \<const0> ;
  assign rx_cntvalueout_26[8] = \<const0> ;
  assign rx_cntvalueout_26[7] = \<const0> ;
  assign rx_cntvalueout_26[6] = \<const0> ;
  assign rx_cntvalueout_26[5] = \<const0> ;
  assign rx_cntvalueout_26[4] = \<const0> ;
  assign rx_cntvalueout_26[3] = \<const0> ;
  assign rx_cntvalueout_26[2] = \<const0> ;
  assign rx_cntvalueout_26[1] = \<const0> ;
  assign rx_cntvalueout_26[0] = \<const0> ;
  assign rx_cntvalueout_27[8] = \<const0> ;
  assign rx_cntvalueout_27[7] = \<const0> ;
  assign rx_cntvalueout_27[6] = \<const0> ;
  assign rx_cntvalueout_27[5] = \<const0> ;
  assign rx_cntvalueout_27[4] = \<const0> ;
  assign rx_cntvalueout_27[3] = \<const0> ;
  assign rx_cntvalueout_27[2] = \<const0> ;
  assign rx_cntvalueout_27[1] = \<const0> ;
  assign rx_cntvalueout_27[0] = \<const0> ;
  assign rx_cntvalueout_28[8] = \<const0> ;
  assign rx_cntvalueout_28[7] = \<const0> ;
  assign rx_cntvalueout_28[6] = \<const0> ;
  assign rx_cntvalueout_28[5] = \<const0> ;
  assign rx_cntvalueout_28[4] = \<const0> ;
  assign rx_cntvalueout_28[3] = \<const0> ;
  assign rx_cntvalueout_28[2] = \<const0> ;
  assign rx_cntvalueout_28[1] = \<const0> ;
  assign rx_cntvalueout_28[0] = \<const0> ;
  assign rx_cntvalueout_29[8] = \<const0> ;
  assign rx_cntvalueout_29[7] = \<const0> ;
  assign rx_cntvalueout_29[6] = \<const0> ;
  assign rx_cntvalueout_29[5] = \<const0> ;
  assign rx_cntvalueout_29[4] = \<const0> ;
  assign rx_cntvalueout_29[3] = \<const0> ;
  assign rx_cntvalueout_29[2] = \<const0> ;
  assign rx_cntvalueout_29[1] = \<const0> ;
  assign rx_cntvalueout_29[0] = \<const0> ;
  assign rx_cntvalueout_3[8] = \<const0> ;
  assign rx_cntvalueout_3[7] = \<const0> ;
  assign rx_cntvalueout_3[6] = \<const0> ;
  assign rx_cntvalueout_3[5] = \<const0> ;
  assign rx_cntvalueout_3[4] = \<const0> ;
  assign rx_cntvalueout_3[3] = \<const0> ;
  assign rx_cntvalueout_3[2] = \<const0> ;
  assign rx_cntvalueout_3[1] = \<const0> ;
  assign rx_cntvalueout_3[0] = \<const0> ;
  assign rx_cntvalueout_30[8] = \<const0> ;
  assign rx_cntvalueout_30[7] = \<const0> ;
  assign rx_cntvalueout_30[6] = \<const0> ;
  assign rx_cntvalueout_30[5] = \<const0> ;
  assign rx_cntvalueout_30[4] = \<const0> ;
  assign rx_cntvalueout_30[3] = \<const0> ;
  assign rx_cntvalueout_30[2] = \<const0> ;
  assign rx_cntvalueout_30[1] = \<const0> ;
  assign rx_cntvalueout_30[0] = \<const0> ;
  assign rx_cntvalueout_31[8] = \<const0> ;
  assign rx_cntvalueout_31[7] = \<const0> ;
  assign rx_cntvalueout_31[6] = \<const0> ;
  assign rx_cntvalueout_31[5] = \<const0> ;
  assign rx_cntvalueout_31[4] = \<const0> ;
  assign rx_cntvalueout_31[3] = \<const0> ;
  assign rx_cntvalueout_31[2] = \<const0> ;
  assign rx_cntvalueout_31[1] = \<const0> ;
  assign rx_cntvalueout_31[0] = \<const0> ;
  assign rx_cntvalueout_32[8] = \<const0> ;
  assign rx_cntvalueout_32[7] = \<const0> ;
  assign rx_cntvalueout_32[6] = \<const0> ;
  assign rx_cntvalueout_32[5] = \<const0> ;
  assign rx_cntvalueout_32[4] = \<const0> ;
  assign rx_cntvalueout_32[3] = \<const0> ;
  assign rx_cntvalueout_32[2] = \<const0> ;
  assign rx_cntvalueout_32[1] = \<const0> ;
  assign rx_cntvalueout_32[0] = \<const0> ;
  assign rx_cntvalueout_33[8] = \<const0> ;
  assign rx_cntvalueout_33[7] = \<const0> ;
  assign rx_cntvalueout_33[6] = \<const0> ;
  assign rx_cntvalueout_33[5] = \<const0> ;
  assign rx_cntvalueout_33[4] = \<const0> ;
  assign rx_cntvalueout_33[3] = \<const0> ;
  assign rx_cntvalueout_33[2] = \<const0> ;
  assign rx_cntvalueout_33[1] = \<const0> ;
  assign rx_cntvalueout_33[0] = \<const0> ;
  assign rx_cntvalueout_34[8] = \<const0> ;
  assign rx_cntvalueout_34[7] = \<const0> ;
  assign rx_cntvalueout_34[6] = \<const0> ;
  assign rx_cntvalueout_34[5] = \<const0> ;
  assign rx_cntvalueout_34[4] = \<const0> ;
  assign rx_cntvalueout_34[3] = \<const0> ;
  assign rx_cntvalueout_34[2] = \<const0> ;
  assign rx_cntvalueout_34[1] = \<const0> ;
  assign rx_cntvalueout_34[0] = \<const0> ;
  assign rx_cntvalueout_35[8] = \<const0> ;
  assign rx_cntvalueout_35[7] = \<const0> ;
  assign rx_cntvalueout_35[6] = \<const0> ;
  assign rx_cntvalueout_35[5] = \<const0> ;
  assign rx_cntvalueout_35[4] = \<const0> ;
  assign rx_cntvalueout_35[3] = \<const0> ;
  assign rx_cntvalueout_35[2] = \<const0> ;
  assign rx_cntvalueout_35[1] = \<const0> ;
  assign rx_cntvalueout_35[0] = \<const0> ;
  assign rx_cntvalueout_36[8] = \<const0> ;
  assign rx_cntvalueout_36[7] = \<const0> ;
  assign rx_cntvalueout_36[6] = \<const0> ;
  assign rx_cntvalueout_36[5] = \<const0> ;
  assign rx_cntvalueout_36[4] = \<const0> ;
  assign rx_cntvalueout_36[3] = \<const0> ;
  assign rx_cntvalueout_36[2] = \<const0> ;
  assign rx_cntvalueout_36[1] = \<const0> ;
  assign rx_cntvalueout_36[0] = \<const0> ;
  assign rx_cntvalueout_37[8] = \<const0> ;
  assign rx_cntvalueout_37[7] = \<const0> ;
  assign rx_cntvalueout_37[6] = \<const0> ;
  assign rx_cntvalueout_37[5] = \<const0> ;
  assign rx_cntvalueout_37[4] = \<const0> ;
  assign rx_cntvalueout_37[3] = \<const0> ;
  assign rx_cntvalueout_37[2] = \<const0> ;
  assign rx_cntvalueout_37[1] = \<const0> ;
  assign rx_cntvalueout_37[0] = \<const0> ;
  assign rx_cntvalueout_38[8] = \<const0> ;
  assign rx_cntvalueout_38[7] = \<const0> ;
  assign rx_cntvalueout_38[6] = \<const0> ;
  assign rx_cntvalueout_38[5] = \<const0> ;
  assign rx_cntvalueout_38[4] = \<const0> ;
  assign rx_cntvalueout_38[3] = \<const0> ;
  assign rx_cntvalueout_38[2] = \<const0> ;
  assign rx_cntvalueout_38[1] = \<const0> ;
  assign rx_cntvalueout_38[0] = \<const0> ;
  assign rx_cntvalueout_39[8] = \<const0> ;
  assign rx_cntvalueout_39[7] = \<const0> ;
  assign rx_cntvalueout_39[6] = \<const0> ;
  assign rx_cntvalueout_39[5] = \<const0> ;
  assign rx_cntvalueout_39[4] = \<const0> ;
  assign rx_cntvalueout_39[3] = \<const0> ;
  assign rx_cntvalueout_39[2] = \<const0> ;
  assign rx_cntvalueout_39[1] = \<const0> ;
  assign rx_cntvalueout_39[0] = \<const0> ;
  assign rx_cntvalueout_4[8] = \<const0> ;
  assign rx_cntvalueout_4[7] = \<const0> ;
  assign rx_cntvalueout_4[6] = \<const0> ;
  assign rx_cntvalueout_4[5] = \<const0> ;
  assign rx_cntvalueout_4[4] = \<const0> ;
  assign rx_cntvalueout_4[3] = \<const0> ;
  assign rx_cntvalueout_4[2] = \<const0> ;
  assign rx_cntvalueout_4[1] = \<const0> ;
  assign rx_cntvalueout_4[0] = \<const0> ;
  assign rx_cntvalueout_40[8] = \<const0> ;
  assign rx_cntvalueout_40[7] = \<const0> ;
  assign rx_cntvalueout_40[6] = \<const0> ;
  assign rx_cntvalueout_40[5] = \<const0> ;
  assign rx_cntvalueout_40[4] = \<const0> ;
  assign rx_cntvalueout_40[3] = \<const0> ;
  assign rx_cntvalueout_40[2] = \<const0> ;
  assign rx_cntvalueout_40[1] = \<const0> ;
  assign rx_cntvalueout_40[0] = \<const0> ;
  assign rx_cntvalueout_41[8] = \<const0> ;
  assign rx_cntvalueout_41[7] = \<const0> ;
  assign rx_cntvalueout_41[6] = \<const0> ;
  assign rx_cntvalueout_41[5] = \<const0> ;
  assign rx_cntvalueout_41[4] = \<const0> ;
  assign rx_cntvalueout_41[3] = \<const0> ;
  assign rx_cntvalueout_41[2] = \<const0> ;
  assign rx_cntvalueout_41[1] = \<const0> ;
  assign rx_cntvalueout_41[0] = \<const0> ;
  assign rx_cntvalueout_42[8] = \<const0> ;
  assign rx_cntvalueout_42[7] = \<const0> ;
  assign rx_cntvalueout_42[6] = \<const0> ;
  assign rx_cntvalueout_42[5] = \<const0> ;
  assign rx_cntvalueout_42[4] = \<const0> ;
  assign rx_cntvalueout_42[3] = \<const0> ;
  assign rx_cntvalueout_42[2] = \<const0> ;
  assign rx_cntvalueout_42[1] = \<const0> ;
  assign rx_cntvalueout_42[0] = \<const0> ;
  assign rx_cntvalueout_43[8] = \<const0> ;
  assign rx_cntvalueout_43[7] = \<const0> ;
  assign rx_cntvalueout_43[6] = \<const0> ;
  assign rx_cntvalueout_43[5] = \<const0> ;
  assign rx_cntvalueout_43[4] = \<const0> ;
  assign rx_cntvalueout_43[3] = \<const0> ;
  assign rx_cntvalueout_43[2] = \<const0> ;
  assign rx_cntvalueout_43[1] = \<const0> ;
  assign rx_cntvalueout_43[0] = \<const0> ;
  assign rx_cntvalueout_44[8] = \<const0> ;
  assign rx_cntvalueout_44[7] = \<const0> ;
  assign rx_cntvalueout_44[6] = \<const0> ;
  assign rx_cntvalueout_44[5] = \<const0> ;
  assign rx_cntvalueout_44[4] = \<const0> ;
  assign rx_cntvalueout_44[3] = \<const0> ;
  assign rx_cntvalueout_44[2] = \<const0> ;
  assign rx_cntvalueout_44[1] = \<const0> ;
  assign rx_cntvalueout_44[0] = \<const0> ;
  assign rx_cntvalueout_45[8] = \<const0> ;
  assign rx_cntvalueout_45[7] = \<const0> ;
  assign rx_cntvalueout_45[6] = \<const0> ;
  assign rx_cntvalueout_45[5] = \<const0> ;
  assign rx_cntvalueout_45[4] = \<const0> ;
  assign rx_cntvalueout_45[3] = \<const0> ;
  assign rx_cntvalueout_45[2] = \<const0> ;
  assign rx_cntvalueout_45[1] = \<const0> ;
  assign rx_cntvalueout_45[0] = \<const0> ;
  assign rx_cntvalueout_46[8] = \<const0> ;
  assign rx_cntvalueout_46[7] = \<const0> ;
  assign rx_cntvalueout_46[6] = \<const0> ;
  assign rx_cntvalueout_46[5] = \<const0> ;
  assign rx_cntvalueout_46[4] = \<const0> ;
  assign rx_cntvalueout_46[3] = \<const0> ;
  assign rx_cntvalueout_46[2] = \<const0> ;
  assign rx_cntvalueout_46[1] = \<const0> ;
  assign rx_cntvalueout_46[0] = \<const0> ;
  assign rx_cntvalueout_47[8] = \<const0> ;
  assign rx_cntvalueout_47[7] = \<const0> ;
  assign rx_cntvalueout_47[6] = \<const0> ;
  assign rx_cntvalueout_47[5] = \<const0> ;
  assign rx_cntvalueout_47[4] = \<const0> ;
  assign rx_cntvalueout_47[3] = \<const0> ;
  assign rx_cntvalueout_47[2] = \<const0> ;
  assign rx_cntvalueout_47[1] = \<const0> ;
  assign rx_cntvalueout_47[0] = \<const0> ;
  assign rx_cntvalueout_48[8] = \<const0> ;
  assign rx_cntvalueout_48[7] = \<const0> ;
  assign rx_cntvalueout_48[6] = \<const0> ;
  assign rx_cntvalueout_48[5] = \<const0> ;
  assign rx_cntvalueout_48[4] = \<const0> ;
  assign rx_cntvalueout_48[3] = \<const0> ;
  assign rx_cntvalueout_48[2] = \<const0> ;
  assign rx_cntvalueout_48[1] = \<const0> ;
  assign rx_cntvalueout_48[0] = \<const0> ;
  assign rx_cntvalueout_49[8] = \<const0> ;
  assign rx_cntvalueout_49[7] = \<const0> ;
  assign rx_cntvalueout_49[6] = \<const0> ;
  assign rx_cntvalueout_49[5] = \<const0> ;
  assign rx_cntvalueout_49[4] = \<const0> ;
  assign rx_cntvalueout_49[3] = \<const0> ;
  assign rx_cntvalueout_49[2] = \<const0> ;
  assign rx_cntvalueout_49[1] = \<const0> ;
  assign rx_cntvalueout_49[0] = \<const0> ;
  assign rx_cntvalueout_5[8] = \<const0> ;
  assign rx_cntvalueout_5[7] = \<const0> ;
  assign rx_cntvalueout_5[6] = \<const0> ;
  assign rx_cntvalueout_5[5] = \<const0> ;
  assign rx_cntvalueout_5[4] = \<const0> ;
  assign rx_cntvalueout_5[3] = \<const0> ;
  assign rx_cntvalueout_5[2] = \<const0> ;
  assign rx_cntvalueout_5[1] = \<const0> ;
  assign rx_cntvalueout_5[0] = \<const0> ;
  assign rx_cntvalueout_50[8] = \<const0> ;
  assign rx_cntvalueout_50[7] = \<const0> ;
  assign rx_cntvalueout_50[6] = \<const0> ;
  assign rx_cntvalueout_50[5] = \<const0> ;
  assign rx_cntvalueout_50[4] = \<const0> ;
  assign rx_cntvalueout_50[3] = \<const0> ;
  assign rx_cntvalueout_50[2] = \<const0> ;
  assign rx_cntvalueout_50[1] = \<const0> ;
  assign rx_cntvalueout_50[0] = \<const0> ;
  assign rx_cntvalueout_51[8] = \<const0> ;
  assign rx_cntvalueout_51[7] = \<const0> ;
  assign rx_cntvalueout_51[6] = \<const0> ;
  assign rx_cntvalueout_51[5] = \<const0> ;
  assign rx_cntvalueout_51[4] = \<const0> ;
  assign rx_cntvalueout_51[3] = \<const0> ;
  assign rx_cntvalueout_51[2] = \<const0> ;
  assign rx_cntvalueout_51[1] = \<const0> ;
  assign rx_cntvalueout_51[0] = \<const0> ;
  assign rx_cntvalueout_6[8] = \<const0> ;
  assign rx_cntvalueout_6[7] = \<const0> ;
  assign rx_cntvalueout_6[6] = \<const0> ;
  assign rx_cntvalueout_6[5] = \<const0> ;
  assign rx_cntvalueout_6[4] = \<const0> ;
  assign rx_cntvalueout_6[3] = \<const0> ;
  assign rx_cntvalueout_6[2] = \<const0> ;
  assign rx_cntvalueout_6[1] = \<const0> ;
  assign rx_cntvalueout_6[0] = \<const0> ;
  assign rx_cntvalueout_7[8] = \<const0> ;
  assign rx_cntvalueout_7[7] = \<const0> ;
  assign rx_cntvalueout_7[6] = \<const0> ;
  assign rx_cntvalueout_7[5] = \<const0> ;
  assign rx_cntvalueout_7[4] = \<const0> ;
  assign rx_cntvalueout_7[3] = \<const0> ;
  assign rx_cntvalueout_7[2] = \<const0> ;
  assign rx_cntvalueout_7[1] = \<const0> ;
  assign rx_cntvalueout_7[0] = \<const0> ;
  assign rx_cntvalueout_8[8] = \<const0> ;
  assign rx_cntvalueout_8[7] = \<const0> ;
  assign rx_cntvalueout_8[6] = \<const0> ;
  assign rx_cntvalueout_8[5] = \<const0> ;
  assign rx_cntvalueout_8[4] = \<const0> ;
  assign rx_cntvalueout_8[3] = \<const0> ;
  assign rx_cntvalueout_8[2] = \<const0> ;
  assign rx_cntvalueout_8[1] = \<const0> ;
  assign rx_cntvalueout_8[0] = \<const0> ;
  assign rx_cntvalueout_9[8] = \<const0> ;
  assign rx_cntvalueout_9[7] = \<const0> ;
  assign rx_cntvalueout_9[6] = \<const0> ;
  assign rx_cntvalueout_9[5] = \<const0> ;
  assign rx_cntvalueout_9[4] = \<const0> ;
  assign rx_cntvalueout_9[3] = \<const0> ;
  assign rx_cntvalueout_9[2] = \<const0> ;
  assign rx_cntvalueout_9[1] = \<const0> ;
  assign rx_cntvalueout_9[0] = \<const0> ;
  assign rx_cntvalueout_ext_0[8] = \<const0> ;
  assign rx_cntvalueout_ext_0[7] = \<const0> ;
  assign rx_cntvalueout_ext_0[6] = \<const0> ;
  assign rx_cntvalueout_ext_0[5] = \<const0> ;
  assign rx_cntvalueout_ext_0[4] = \<const0> ;
  assign rx_cntvalueout_ext_0[3] = \<const0> ;
  assign rx_cntvalueout_ext_0[2] = \<const0> ;
  assign rx_cntvalueout_ext_0[1] = \<const0> ;
  assign rx_cntvalueout_ext_0[0] = \<const0> ;
  assign rx_cntvalueout_ext_1[8] = \<const0> ;
  assign rx_cntvalueout_ext_1[7] = \<const0> ;
  assign rx_cntvalueout_ext_1[6] = \<const0> ;
  assign rx_cntvalueout_ext_1[5] = \<const0> ;
  assign rx_cntvalueout_ext_1[4] = \<const0> ;
  assign rx_cntvalueout_ext_1[3] = \<const0> ;
  assign rx_cntvalueout_ext_1[2] = \<const0> ;
  assign rx_cntvalueout_ext_1[1] = \<const0> ;
  assign rx_cntvalueout_ext_1[0] = \<const0> ;
  assign rx_cntvalueout_ext_10[8] = \<const0> ;
  assign rx_cntvalueout_ext_10[7] = \<const0> ;
  assign rx_cntvalueout_ext_10[6] = \<const0> ;
  assign rx_cntvalueout_ext_10[5] = \<const0> ;
  assign rx_cntvalueout_ext_10[4] = \<const0> ;
  assign rx_cntvalueout_ext_10[3] = \<const0> ;
  assign rx_cntvalueout_ext_10[2] = \<const0> ;
  assign rx_cntvalueout_ext_10[1] = \<const0> ;
  assign rx_cntvalueout_ext_10[0] = \<const0> ;
  assign rx_cntvalueout_ext_11[8] = \<const0> ;
  assign rx_cntvalueout_ext_11[7] = \<const0> ;
  assign rx_cntvalueout_ext_11[6] = \<const0> ;
  assign rx_cntvalueout_ext_11[5] = \<const0> ;
  assign rx_cntvalueout_ext_11[4] = \<const0> ;
  assign rx_cntvalueout_ext_11[3] = \<const0> ;
  assign rx_cntvalueout_ext_11[2] = \<const0> ;
  assign rx_cntvalueout_ext_11[1] = \<const0> ;
  assign rx_cntvalueout_ext_11[0] = \<const0> ;
  assign rx_cntvalueout_ext_12[8] = \<const0> ;
  assign rx_cntvalueout_ext_12[7] = \<const0> ;
  assign rx_cntvalueout_ext_12[6] = \<const0> ;
  assign rx_cntvalueout_ext_12[5] = \<const0> ;
  assign rx_cntvalueout_ext_12[4] = \<const0> ;
  assign rx_cntvalueout_ext_12[3] = \<const0> ;
  assign rx_cntvalueout_ext_12[2] = \<const0> ;
  assign rx_cntvalueout_ext_12[1] = \<const0> ;
  assign rx_cntvalueout_ext_12[0] = \<const0> ;
  assign rx_cntvalueout_ext_13[8] = \<const0> ;
  assign rx_cntvalueout_ext_13[7] = \<const0> ;
  assign rx_cntvalueout_ext_13[6] = \<const0> ;
  assign rx_cntvalueout_ext_13[5] = \<const0> ;
  assign rx_cntvalueout_ext_13[4] = \<const0> ;
  assign rx_cntvalueout_ext_13[3] = \<const0> ;
  assign rx_cntvalueout_ext_13[2] = \<const0> ;
  assign rx_cntvalueout_ext_13[1] = \<const0> ;
  assign rx_cntvalueout_ext_13[0] = \<const0> ;
  assign rx_cntvalueout_ext_14[8] = \<const0> ;
  assign rx_cntvalueout_ext_14[7] = \<const0> ;
  assign rx_cntvalueout_ext_14[6] = \<const0> ;
  assign rx_cntvalueout_ext_14[5] = \<const0> ;
  assign rx_cntvalueout_ext_14[4] = \<const0> ;
  assign rx_cntvalueout_ext_14[3] = \<const0> ;
  assign rx_cntvalueout_ext_14[2] = \<const0> ;
  assign rx_cntvalueout_ext_14[1] = \<const0> ;
  assign rx_cntvalueout_ext_14[0] = \<const0> ;
  assign rx_cntvalueout_ext_15[8] = \<const0> ;
  assign rx_cntvalueout_ext_15[7] = \<const0> ;
  assign rx_cntvalueout_ext_15[6] = \<const0> ;
  assign rx_cntvalueout_ext_15[5] = \<const0> ;
  assign rx_cntvalueout_ext_15[4] = \<const0> ;
  assign rx_cntvalueout_ext_15[3] = \<const0> ;
  assign rx_cntvalueout_ext_15[2] = \<const0> ;
  assign rx_cntvalueout_ext_15[1] = \<const0> ;
  assign rx_cntvalueout_ext_15[0] = \<const0> ;
  assign rx_cntvalueout_ext_16[8] = \<const0> ;
  assign rx_cntvalueout_ext_16[7] = \<const0> ;
  assign rx_cntvalueout_ext_16[6] = \<const0> ;
  assign rx_cntvalueout_ext_16[5] = \<const0> ;
  assign rx_cntvalueout_ext_16[4] = \<const0> ;
  assign rx_cntvalueout_ext_16[3] = \<const0> ;
  assign rx_cntvalueout_ext_16[2] = \<const0> ;
  assign rx_cntvalueout_ext_16[1] = \<const0> ;
  assign rx_cntvalueout_ext_16[0] = \<const0> ;
  assign rx_cntvalueout_ext_17[8] = \<const0> ;
  assign rx_cntvalueout_ext_17[7] = \<const0> ;
  assign rx_cntvalueout_ext_17[6] = \<const0> ;
  assign rx_cntvalueout_ext_17[5] = \<const0> ;
  assign rx_cntvalueout_ext_17[4] = \<const0> ;
  assign rx_cntvalueout_ext_17[3] = \<const0> ;
  assign rx_cntvalueout_ext_17[2] = \<const0> ;
  assign rx_cntvalueout_ext_17[1] = \<const0> ;
  assign rx_cntvalueout_ext_17[0] = \<const0> ;
  assign rx_cntvalueout_ext_18[8] = \<const0> ;
  assign rx_cntvalueout_ext_18[7] = \<const0> ;
  assign rx_cntvalueout_ext_18[6] = \<const0> ;
  assign rx_cntvalueout_ext_18[5] = \<const0> ;
  assign rx_cntvalueout_ext_18[4] = \<const0> ;
  assign rx_cntvalueout_ext_18[3] = \<const0> ;
  assign rx_cntvalueout_ext_18[2] = \<const0> ;
  assign rx_cntvalueout_ext_18[1] = \<const0> ;
  assign rx_cntvalueout_ext_18[0] = \<const0> ;
  assign rx_cntvalueout_ext_19[8] = \<const0> ;
  assign rx_cntvalueout_ext_19[7] = \<const0> ;
  assign rx_cntvalueout_ext_19[6] = \<const0> ;
  assign rx_cntvalueout_ext_19[5] = \<const0> ;
  assign rx_cntvalueout_ext_19[4] = \<const0> ;
  assign rx_cntvalueout_ext_19[3] = \<const0> ;
  assign rx_cntvalueout_ext_19[2] = \<const0> ;
  assign rx_cntvalueout_ext_19[1] = \<const0> ;
  assign rx_cntvalueout_ext_19[0] = \<const0> ;
  assign rx_cntvalueout_ext_2[8] = \<const0> ;
  assign rx_cntvalueout_ext_2[7] = \<const0> ;
  assign rx_cntvalueout_ext_2[6] = \<const0> ;
  assign rx_cntvalueout_ext_2[5] = \<const0> ;
  assign rx_cntvalueout_ext_2[4] = \<const0> ;
  assign rx_cntvalueout_ext_2[3] = \<const0> ;
  assign rx_cntvalueout_ext_2[2] = \<const0> ;
  assign rx_cntvalueout_ext_2[1] = \<const0> ;
  assign rx_cntvalueout_ext_2[0] = \<const0> ;
  assign rx_cntvalueout_ext_20[8] = \<const0> ;
  assign rx_cntvalueout_ext_20[7] = \<const0> ;
  assign rx_cntvalueout_ext_20[6] = \<const0> ;
  assign rx_cntvalueout_ext_20[5] = \<const0> ;
  assign rx_cntvalueout_ext_20[4] = \<const0> ;
  assign rx_cntvalueout_ext_20[3] = \<const0> ;
  assign rx_cntvalueout_ext_20[2] = \<const0> ;
  assign rx_cntvalueout_ext_20[1] = \<const0> ;
  assign rx_cntvalueout_ext_20[0] = \<const0> ;
  assign rx_cntvalueout_ext_21[8] = \<const0> ;
  assign rx_cntvalueout_ext_21[7] = \<const0> ;
  assign rx_cntvalueout_ext_21[6] = \<const0> ;
  assign rx_cntvalueout_ext_21[5] = \<const0> ;
  assign rx_cntvalueout_ext_21[4] = \<const0> ;
  assign rx_cntvalueout_ext_21[3] = \<const0> ;
  assign rx_cntvalueout_ext_21[2] = \<const0> ;
  assign rx_cntvalueout_ext_21[1] = \<const0> ;
  assign rx_cntvalueout_ext_21[0] = \<const0> ;
  assign rx_cntvalueout_ext_22[8] = \<const0> ;
  assign rx_cntvalueout_ext_22[7] = \<const0> ;
  assign rx_cntvalueout_ext_22[6] = \<const0> ;
  assign rx_cntvalueout_ext_22[5] = \<const0> ;
  assign rx_cntvalueout_ext_22[4] = \<const0> ;
  assign rx_cntvalueout_ext_22[3] = \<const0> ;
  assign rx_cntvalueout_ext_22[2] = \<const0> ;
  assign rx_cntvalueout_ext_22[1] = \<const0> ;
  assign rx_cntvalueout_ext_22[0] = \<const0> ;
  assign rx_cntvalueout_ext_23[8] = \<const0> ;
  assign rx_cntvalueout_ext_23[7] = \<const0> ;
  assign rx_cntvalueout_ext_23[6] = \<const0> ;
  assign rx_cntvalueout_ext_23[5] = \<const0> ;
  assign rx_cntvalueout_ext_23[4] = \<const0> ;
  assign rx_cntvalueout_ext_23[3] = \<const0> ;
  assign rx_cntvalueout_ext_23[2] = \<const0> ;
  assign rx_cntvalueout_ext_23[1] = \<const0> ;
  assign rx_cntvalueout_ext_23[0] = \<const0> ;
  assign rx_cntvalueout_ext_24[8] = \<const0> ;
  assign rx_cntvalueout_ext_24[7] = \<const0> ;
  assign rx_cntvalueout_ext_24[6] = \<const0> ;
  assign rx_cntvalueout_ext_24[5] = \<const0> ;
  assign rx_cntvalueout_ext_24[4] = \<const0> ;
  assign rx_cntvalueout_ext_24[3] = \<const0> ;
  assign rx_cntvalueout_ext_24[2] = \<const0> ;
  assign rx_cntvalueout_ext_24[1] = \<const0> ;
  assign rx_cntvalueout_ext_24[0] = \<const0> ;
  assign rx_cntvalueout_ext_25[8] = \<const0> ;
  assign rx_cntvalueout_ext_25[7] = \<const0> ;
  assign rx_cntvalueout_ext_25[6] = \<const0> ;
  assign rx_cntvalueout_ext_25[5] = \<const0> ;
  assign rx_cntvalueout_ext_25[4] = \<const0> ;
  assign rx_cntvalueout_ext_25[3] = \<const0> ;
  assign rx_cntvalueout_ext_25[2] = \<const0> ;
  assign rx_cntvalueout_ext_25[1] = \<const0> ;
  assign rx_cntvalueout_ext_25[0] = \<const0> ;
  assign rx_cntvalueout_ext_26[8] = \<const0> ;
  assign rx_cntvalueout_ext_26[7] = \<const0> ;
  assign rx_cntvalueout_ext_26[6] = \<const0> ;
  assign rx_cntvalueout_ext_26[5] = \<const0> ;
  assign rx_cntvalueout_ext_26[4] = \<const0> ;
  assign rx_cntvalueout_ext_26[3] = \<const0> ;
  assign rx_cntvalueout_ext_26[2] = \<const0> ;
  assign rx_cntvalueout_ext_26[1] = \<const0> ;
  assign rx_cntvalueout_ext_26[0] = \<const0> ;
  assign rx_cntvalueout_ext_27[8] = \<const0> ;
  assign rx_cntvalueout_ext_27[7] = \<const0> ;
  assign rx_cntvalueout_ext_27[6] = \<const0> ;
  assign rx_cntvalueout_ext_27[5] = \<const0> ;
  assign rx_cntvalueout_ext_27[4] = \<const0> ;
  assign rx_cntvalueout_ext_27[3] = \<const0> ;
  assign rx_cntvalueout_ext_27[2] = \<const0> ;
  assign rx_cntvalueout_ext_27[1] = \<const0> ;
  assign rx_cntvalueout_ext_27[0] = \<const0> ;
  assign rx_cntvalueout_ext_28[8] = \<const0> ;
  assign rx_cntvalueout_ext_28[7] = \<const0> ;
  assign rx_cntvalueout_ext_28[6] = \<const0> ;
  assign rx_cntvalueout_ext_28[5] = \<const0> ;
  assign rx_cntvalueout_ext_28[4] = \<const0> ;
  assign rx_cntvalueout_ext_28[3] = \<const0> ;
  assign rx_cntvalueout_ext_28[2] = \<const0> ;
  assign rx_cntvalueout_ext_28[1] = \<const0> ;
  assign rx_cntvalueout_ext_28[0] = \<const0> ;
  assign rx_cntvalueout_ext_29[8] = \<const0> ;
  assign rx_cntvalueout_ext_29[7] = \<const0> ;
  assign rx_cntvalueout_ext_29[6] = \<const0> ;
  assign rx_cntvalueout_ext_29[5] = \<const0> ;
  assign rx_cntvalueout_ext_29[4] = \<const0> ;
  assign rx_cntvalueout_ext_29[3] = \<const0> ;
  assign rx_cntvalueout_ext_29[2] = \<const0> ;
  assign rx_cntvalueout_ext_29[1] = \<const0> ;
  assign rx_cntvalueout_ext_29[0] = \<const0> ;
  assign rx_cntvalueout_ext_3[8] = \<const0> ;
  assign rx_cntvalueout_ext_3[7] = \<const0> ;
  assign rx_cntvalueout_ext_3[6] = \<const0> ;
  assign rx_cntvalueout_ext_3[5] = \<const0> ;
  assign rx_cntvalueout_ext_3[4] = \<const0> ;
  assign rx_cntvalueout_ext_3[3] = \<const0> ;
  assign rx_cntvalueout_ext_3[2] = \<const0> ;
  assign rx_cntvalueout_ext_3[1] = \<const0> ;
  assign rx_cntvalueout_ext_3[0] = \<const0> ;
  assign rx_cntvalueout_ext_30[8] = \<const0> ;
  assign rx_cntvalueout_ext_30[7] = \<const0> ;
  assign rx_cntvalueout_ext_30[6] = \<const0> ;
  assign rx_cntvalueout_ext_30[5] = \<const0> ;
  assign rx_cntvalueout_ext_30[4] = \<const0> ;
  assign rx_cntvalueout_ext_30[3] = \<const0> ;
  assign rx_cntvalueout_ext_30[2] = \<const0> ;
  assign rx_cntvalueout_ext_30[1] = \<const0> ;
  assign rx_cntvalueout_ext_30[0] = \<const0> ;
  assign rx_cntvalueout_ext_31[8] = \<const0> ;
  assign rx_cntvalueout_ext_31[7] = \<const0> ;
  assign rx_cntvalueout_ext_31[6] = \<const0> ;
  assign rx_cntvalueout_ext_31[5] = \<const0> ;
  assign rx_cntvalueout_ext_31[4] = \<const0> ;
  assign rx_cntvalueout_ext_31[3] = \<const0> ;
  assign rx_cntvalueout_ext_31[2] = \<const0> ;
  assign rx_cntvalueout_ext_31[1] = \<const0> ;
  assign rx_cntvalueout_ext_31[0] = \<const0> ;
  assign rx_cntvalueout_ext_32[8] = \<const0> ;
  assign rx_cntvalueout_ext_32[7] = \<const0> ;
  assign rx_cntvalueout_ext_32[6] = \<const0> ;
  assign rx_cntvalueout_ext_32[5] = \<const0> ;
  assign rx_cntvalueout_ext_32[4] = \<const0> ;
  assign rx_cntvalueout_ext_32[3] = \<const0> ;
  assign rx_cntvalueout_ext_32[2] = \<const0> ;
  assign rx_cntvalueout_ext_32[1] = \<const0> ;
  assign rx_cntvalueout_ext_32[0] = \<const0> ;
  assign rx_cntvalueout_ext_33[8] = \<const0> ;
  assign rx_cntvalueout_ext_33[7] = \<const0> ;
  assign rx_cntvalueout_ext_33[6] = \<const0> ;
  assign rx_cntvalueout_ext_33[5] = \<const0> ;
  assign rx_cntvalueout_ext_33[4] = \<const0> ;
  assign rx_cntvalueout_ext_33[3] = \<const0> ;
  assign rx_cntvalueout_ext_33[2] = \<const0> ;
  assign rx_cntvalueout_ext_33[1] = \<const0> ;
  assign rx_cntvalueout_ext_33[0] = \<const0> ;
  assign rx_cntvalueout_ext_34[8] = \<const0> ;
  assign rx_cntvalueout_ext_34[7] = \<const0> ;
  assign rx_cntvalueout_ext_34[6] = \<const0> ;
  assign rx_cntvalueout_ext_34[5] = \<const0> ;
  assign rx_cntvalueout_ext_34[4] = \<const0> ;
  assign rx_cntvalueout_ext_34[3] = \<const0> ;
  assign rx_cntvalueout_ext_34[2] = \<const0> ;
  assign rx_cntvalueout_ext_34[1] = \<const0> ;
  assign rx_cntvalueout_ext_34[0] = \<const0> ;
  assign rx_cntvalueout_ext_35[8] = \<const0> ;
  assign rx_cntvalueout_ext_35[7] = \<const0> ;
  assign rx_cntvalueout_ext_35[6] = \<const0> ;
  assign rx_cntvalueout_ext_35[5] = \<const0> ;
  assign rx_cntvalueout_ext_35[4] = \<const0> ;
  assign rx_cntvalueout_ext_35[3] = \<const0> ;
  assign rx_cntvalueout_ext_35[2] = \<const0> ;
  assign rx_cntvalueout_ext_35[1] = \<const0> ;
  assign rx_cntvalueout_ext_35[0] = \<const0> ;
  assign rx_cntvalueout_ext_36[8] = \<const0> ;
  assign rx_cntvalueout_ext_36[7] = \<const0> ;
  assign rx_cntvalueout_ext_36[6] = \<const0> ;
  assign rx_cntvalueout_ext_36[5] = \<const0> ;
  assign rx_cntvalueout_ext_36[4] = \<const0> ;
  assign rx_cntvalueout_ext_36[3] = \<const0> ;
  assign rx_cntvalueout_ext_36[2] = \<const0> ;
  assign rx_cntvalueout_ext_36[1] = \<const0> ;
  assign rx_cntvalueout_ext_36[0] = \<const0> ;
  assign rx_cntvalueout_ext_37[8] = \<const0> ;
  assign rx_cntvalueout_ext_37[7] = \<const0> ;
  assign rx_cntvalueout_ext_37[6] = \<const0> ;
  assign rx_cntvalueout_ext_37[5] = \<const0> ;
  assign rx_cntvalueout_ext_37[4] = \<const0> ;
  assign rx_cntvalueout_ext_37[3] = \<const0> ;
  assign rx_cntvalueout_ext_37[2] = \<const0> ;
  assign rx_cntvalueout_ext_37[1] = \<const0> ;
  assign rx_cntvalueout_ext_37[0] = \<const0> ;
  assign rx_cntvalueout_ext_38[8] = \<const0> ;
  assign rx_cntvalueout_ext_38[7] = \<const0> ;
  assign rx_cntvalueout_ext_38[6] = \<const0> ;
  assign rx_cntvalueout_ext_38[5] = \<const0> ;
  assign rx_cntvalueout_ext_38[4] = \<const0> ;
  assign rx_cntvalueout_ext_38[3] = \<const0> ;
  assign rx_cntvalueout_ext_38[2] = \<const0> ;
  assign rx_cntvalueout_ext_38[1] = \<const0> ;
  assign rx_cntvalueout_ext_38[0] = \<const0> ;
  assign rx_cntvalueout_ext_39[8] = \<const0> ;
  assign rx_cntvalueout_ext_39[7] = \<const0> ;
  assign rx_cntvalueout_ext_39[6] = \<const0> ;
  assign rx_cntvalueout_ext_39[5] = \<const0> ;
  assign rx_cntvalueout_ext_39[4] = \<const0> ;
  assign rx_cntvalueout_ext_39[3] = \<const0> ;
  assign rx_cntvalueout_ext_39[2] = \<const0> ;
  assign rx_cntvalueout_ext_39[1] = \<const0> ;
  assign rx_cntvalueout_ext_39[0] = \<const0> ;
  assign rx_cntvalueout_ext_4[8] = \<const0> ;
  assign rx_cntvalueout_ext_4[7] = \<const0> ;
  assign rx_cntvalueout_ext_4[6] = \<const0> ;
  assign rx_cntvalueout_ext_4[5] = \<const0> ;
  assign rx_cntvalueout_ext_4[4] = \<const0> ;
  assign rx_cntvalueout_ext_4[3] = \<const0> ;
  assign rx_cntvalueout_ext_4[2] = \<const0> ;
  assign rx_cntvalueout_ext_4[1] = \<const0> ;
  assign rx_cntvalueout_ext_4[0] = \<const0> ;
  assign rx_cntvalueout_ext_40[8] = \<const0> ;
  assign rx_cntvalueout_ext_40[7] = \<const0> ;
  assign rx_cntvalueout_ext_40[6] = \<const0> ;
  assign rx_cntvalueout_ext_40[5] = \<const0> ;
  assign rx_cntvalueout_ext_40[4] = \<const0> ;
  assign rx_cntvalueout_ext_40[3] = \<const0> ;
  assign rx_cntvalueout_ext_40[2] = \<const0> ;
  assign rx_cntvalueout_ext_40[1] = \<const0> ;
  assign rx_cntvalueout_ext_40[0] = \<const0> ;
  assign rx_cntvalueout_ext_41[8] = \<const0> ;
  assign rx_cntvalueout_ext_41[7] = \<const0> ;
  assign rx_cntvalueout_ext_41[6] = \<const0> ;
  assign rx_cntvalueout_ext_41[5] = \<const0> ;
  assign rx_cntvalueout_ext_41[4] = \<const0> ;
  assign rx_cntvalueout_ext_41[3] = \<const0> ;
  assign rx_cntvalueout_ext_41[2] = \<const0> ;
  assign rx_cntvalueout_ext_41[1] = \<const0> ;
  assign rx_cntvalueout_ext_41[0] = \<const0> ;
  assign rx_cntvalueout_ext_42[8] = \<const0> ;
  assign rx_cntvalueout_ext_42[7] = \<const0> ;
  assign rx_cntvalueout_ext_42[6] = \<const0> ;
  assign rx_cntvalueout_ext_42[5] = \<const0> ;
  assign rx_cntvalueout_ext_42[4] = \<const0> ;
  assign rx_cntvalueout_ext_42[3] = \<const0> ;
  assign rx_cntvalueout_ext_42[2] = \<const0> ;
  assign rx_cntvalueout_ext_42[1] = \<const0> ;
  assign rx_cntvalueout_ext_42[0] = \<const0> ;
  assign rx_cntvalueout_ext_43[8] = \<const0> ;
  assign rx_cntvalueout_ext_43[7] = \<const0> ;
  assign rx_cntvalueout_ext_43[6] = \<const0> ;
  assign rx_cntvalueout_ext_43[5] = \<const0> ;
  assign rx_cntvalueout_ext_43[4] = \<const0> ;
  assign rx_cntvalueout_ext_43[3] = \<const0> ;
  assign rx_cntvalueout_ext_43[2] = \<const0> ;
  assign rx_cntvalueout_ext_43[1] = \<const0> ;
  assign rx_cntvalueout_ext_43[0] = \<const0> ;
  assign rx_cntvalueout_ext_44[8] = \<const0> ;
  assign rx_cntvalueout_ext_44[7] = \<const0> ;
  assign rx_cntvalueout_ext_44[6] = \<const0> ;
  assign rx_cntvalueout_ext_44[5] = \<const0> ;
  assign rx_cntvalueout_ext_44[4] = \<const0> ;
  assign rx_cntvalueout_ext_44[3] = \<const0> ;
  assign rx_cntvalueout_ext_44[2] = \<const0> ;
  assign rx_cntvalueout_ext_44[1] = \<const0> ;
  assign rx_cntvalueout_ext_44[0] = \<const0> ;
  assign rx_cntvalueout_ext_45[8] = \<const0> ;
  assign rx_cntvalueout_ext_45[7] = \<const0> ;
  assign rx_cntvalueout_ext_45[6] = \<const0> ;
  assign rx_cntvalueout_ext_45[5] = \<const0> ;
  assign rx_cntvalueout_ext_45[4] = \<const0> ;
  assign rx_cntvalueout_ext_45[3] = \<const0> ;
  assign rx_cntvalueout_ext_45[2] = \<const0> ;
  assign rx_cntvalueout_ext_45[1] = \<const0> ;
  assign rx_cntvalueout_ext_45[0] = \<const0> ;
  assign rx_cntvalueout_ext_46[8] = \<const0> ;
  assign rx_cntvalueout_ext_46[7] = \<const0> ;
  assign rx_cntvalueout_ext_46[6] = \<const0> ;
  assign rx_cntvalueout_ext_46[5] = \<const0> ;
  assign rx_cntvalueout_ext_46[4] = \<const0> ;
  assign rx_cntvalueout_ext_46[3] = \<const0> ;
  assign rx_cntvalueout_ext_46[2] = \<const0> ;
  assign rx_cntvalueout_ext_46[1] = \<const0> ;
  assign rx_cntvalueout_ext_46[0] = \<const0> ;
  assign rx_cntvalueout_ext_47[8] = \<const0> ;
  assign rx_cntvalueout_ext_47[7] = \<const0> ;
  assign rx_cntvalueout_ext_47[6] = \<const0> ;
  assign rx_cntvalueout_ext_47[5] = \<const0> ;
  assign rx_cntvalueout_ext_47[4] = \<const0> ;
  assign rx_cntvalueout_ext_47[3] = \<const0> ;
  assign rx_cntvalueout_ext_47[2] = \<const0> ;
  assign rx_cntvalueout_ext_47[1] = \<const0> ;
  assign rx_cntvalueout_ext_47[0] = \<const0> ;
  assign rx_cntvalueout_ext_48[8] = \<const0> ;
  assign rx_cntvalueout_ext_48[7] = \<const0> ;
  assign rx_cntvalueout_ext_48[6] = \<const0> ;
  assign rx_cntvalueout_ext_48[5] = \<const0> ;
  assign rx_cntvalueout_ext_48[4] = \<const0> ;
  assign rx_cntvalueout_ext_48[3] = \<const0> ;
  assign rx_cntvalueout_ext_48[2] = \<const0> ;
  assign rx_cntvalueout_ext_48[1] = \<const0> ;
  assign rx_cntvalueout_ext_48[0] = \<const0> ;
  assign rx_cntvalueout_ext_49[8] = \<const0> ;
  assign rx_cntvalueout_ext_49[7] = \<const0> ;
  assign rx_cntvalueout_ext_49[6] = \<const0> ;
  assign rx_cntvalueout_ext_49[5] = \<const0> ;
  assign rx_cntvalueout_ext_49[4] = \<const0> ;
  assign rx_cntvalueout_ext_49[3] = \<const0> ;
  assign rx_cntvalueout_ext_49[2] = \<const0> ;
  assign rx_cntvalueout_ext_49[1] = \<const0> ;
  assign rx_cntvalueout_ext_49[0] = \<const0> ;
  assign rx_cntvalueout_ext_5[8] = \<const0> ;
  assign rx_cntvalueout_ext_5[7] = \<const0> ;
  assign rx_cntvalueout_ext_5[6] = \<const0> ;
  assign rx_cntvalueout_ext_5[5] = \<const0> ;
  assign rx_cntvalueout_ext_5[4] = \<const0> ;
  assign rx_cntvalueout_ext_5[3] = \<const0> ;
  assign rx_cntvalueout_ext_5[2] = \<const0> ;
  assign rx_cntvalueout_ext_5[1] = \<const0> ;
  assign rx_cntvalueout_ext_5[0] = \<const0> ;
  assign rx_cntvalueout_ext_50[8] = \<const0> ;
  assign rx_cntvalueout_ext_50[7] = \<const0> ;
  assign rx_cntvalueout_ext_50[6] = \<const0> ;
  assign rx_cntvalueout_ext_50[5] = \<const0> ;
  assign rx_cntvalueout_ext_50[4] = \<const0> ;
  assign rx_cntvalueout_ext_50[3] = \<const0> ;
  assign rx_cntvalueout_ext_50[2] = \<const0> ;
  assign rx_cntvalueout_ext_50[1] = \<const0> ;
  assign rx_cntvalueout_ext_50[0] = \<const0> ;
  assign rx_cntvalueout_ext_51[8] = \<const0> ;
  assign rx_cntvalueout_ext_51[7] = \<const0> ;
  assign rx_cntvalueout_ext_51[6] = \<const0> ;
  assign rx_cntvalueout_ext_51[5] = \<const0> ;
  assign rx_cntvalueout_ext_51[4] = \<const0> ;
  assign rx_cntvalueout_ext_51[3] = \<const0> ;
  assign rx_cntvalueout_ext_51[2] = \<const0> ;
  assign rx_cntvalueout_ext_51[1] = \<const0> ;
  assign rx_cntvalueout_ext_51[0] = \<const0> ;
  assign rx_cntvalueout_ext_6[8] = \<const0> ;
  assign rx_cntvalueout_ext_6[7] = \<const0> ;
  assign rx_cntvalueout_ext_6[6] = \<const0> ;
  assign rx_cntvalueout_ext_6[5] = \<const0> ;
  assign rx_cntvalueout_ext_6[4] = \<const0> ;
  assign rx_cntvalueout_ext_6[3] = \<const0> ;
  assign rx_cntvalueout_ext_6[2] = \<const0> ;
  assign rx_cntvalueout_ext_6[1] = \<const0> ;
  assign rx_cntvalueout_ext_6[0] = \<const0> ;
  assign rx_cntvalueout_ext_7[8] = \<const0> ;
  assign rx_cntvalueout_ext_7[7] = \<const0> ;
  assign rx_cntvalueout_ext_7[6] = \<const0> ;
  assign rx_cntvalueout_ext_7[5] = \<const0> ;
  assign rx_cntvalueout_ext_7[4] = \<const0> ;
  assign rx_cntvalueout_ext_7[3] = \<const0> ;
  assign rx_cntvalueout_ext_7[2] = \<const0> ;
  assign rx_cntvalueout_ext_7[1] = \<const0> ;
  assign rx_cntvalueout_ext_7[0] = \<const0> ;
  assign rx_cntvalueout_ext_8[8] = \<const0> ;
  assign rx_cntvalueout_ext_8[7] = \<const0> ;
  assign rx_cntvalueout_ext_8[6] = \<const0> ;
  assign rx_cntvalueout_ext_8[5] = \<const0> ;
  assign rx_cntvalueout_ext_8[4] = \<const0> ;
  assign rx_cntvalueout_ext_8[3] = \<const0> ;
  assign rx_cntvalueout_ext_8[2] = \<const0> ;
  assign rx_cntvalueout_ext_8[1] = \<const0> ;
  assign rx_cntvalueout_ext_8[0] = \<const0> ;
  assign rx_cntvalueout_ext_9[8] = \<const0> ;
  assign rx_cntvalueout_ext_9[7] = \<const0> ;
  assign rx_cntvalueout_ext_9[6] = \<const0> ;
  assign rx_cntvalueout_ext_9[5] = \<const0> ;
  assign rx_cntvalueout_ext_9[4] = \<const0> ;
  assign rx_cntvalueout_ext_9[3] = \<const0> ;
  assign rx_cntvalueout_ext_9[2] = \<const0> ;
  assign rx_cntvalueout_ext_9[1] = \<const0> ;
  assign rx_cntvalueout_ext_9[0] = \<const0> ;
  assign rxtx_bitslip_sync_done = \<const0> ;
  assign shared_pll0_clkoutphy_out = \<const0> ;
  assign shared_pll1_clkoutphy_out = \<const0> ;
  assign tx_cntvalueout_0[8] = \<const0> ;
  assign tx_cntvalueout_0[7] = \<const0> ;
  assign tx_cntvalueout_0[6] = \<const0> ;
  assign tx_cntvalueout_0[5] = \<const0> ;
  assign tx_cntvalueout_0[4] = \<const0> ;
  assign tx_cntvalueout_0[3] = \<const0> ;
  assign tx_cntvalueout_0[2] = \<const0> ;
  assign tx_cntvalueout_0[1] = \<const0> ;
  assign tx_cntvalueout_0[0] = \<const0> ;
  assign tx_cntvalueout_1[8] = \<const0> ;
  assign tx_cntvalueout_1[7] = \<const0> ;
  assign tx_cntvalueout_1[6] = \<const0> ;
  assign tx_cntvalueout_1[5] = \<const0> ;
  assign tx_cntvalueout_1[4] = \<const0> ;
  assign tx_cntvalueout_1[3] = \<const0> ;
  assign tx_cntvalueout_1[2] = \<const0> ;
  assign tx_cntvalueout_1[1] = \<const0> ;
  assign tx_cntvalueout_1[0] = \<const0> ;
  assign tx_cntvalueout_10[8] = \<const0> ;
  assign tx_cntvalueout_10[7] = \<const0> ;
  assign tx_cntvalueout_10[6] = \<const0> ;
  assign tx_cntvalueout_10[5] = \<const0> ;
  assign tx_cntvalueout_10[4] = \<const0> ;
  assign tx_cntvalueout_10[3] = \<const0> ;
  assign tx_cntvalueout_10[2] = \<const0> ;
  assign tx_cntvalueout_10[1] = \<const0> ;
  assign tx_cntvalueout_10[0] = \<const0> ;
  assign tx_cntvalueout_11[8] = \<const0> ;
  assign tx_cntvalueout_11[7] = \<const0> ;
  assign tx_cntvalueout_11[6] = \<const0> ;
  assign tx_cntvalueout_11[5] = \<const0> ;
  assign tx_cntvalueout_11[4] = \<const0> ;
  assign tx_cntvalueout_11[3] = \<const0> ;
  assign tx_cntvalueout_11[2] = \<const0> ;
  assign tx_cntvalueout_11[1] = \<const0> ;
  assign tx_cntvalueout_11[0] = \<const0> ;
  assign tx_cntvalueout_12[8] = \<const0> ;
  assign tx_cntvalueout_12[7] = \<const0> ;
  assign tx_cntvalueout_12[6] = \<const0> ;
  assign tx_cntvalueout_12[5] = \<const0> ;
  assign tx_cntvalueout_12[4] = \<const0> ;
  assign tx_cntvalueout_12[3] = \<const0> ;
  assign tx_cntvalueout_12[2] = \<const0> ;
  assign tx_cntvalueout_12[1] = \<const0> ;
  assign tx_cntvalueout_12[0] = \<const0> ;
  assign tx_cntvalueout_13[8] = \<const0> ;
  assign tx_cntvalueout_13[7] = \<const0> ;
  assign tx_cntvalueout_13[6] = \<const0> ;
  assign tx_cntvalueout_13[5] = \<const0> ;
  assign tx_cntvalueout_13[4] = \<const0> ;
  assign tx_cntvalueout_13[3] = \<const0> ;
  assign tx_cntvalueout_13[2] = \<const0> ;
  assign tx_cntvalueout_13[1] = \<const0> ;
  assign tx_cntvalueout_13[0] = \<const0> ;
  assign tx_cntvalueout_14[8] = \<const0> ;
  assign tx_cntvalueout_14[7] = \<const0> ;
  assign tx_cntvalueout_14[6] = \<const0> ;
  assign tx_cntvalueout_14[5] = \<const0> ;
  assign tx_cntvalueout_14[4] = \<const0> ;
  assign tx_cntvalueout_14[3] = \<const0> ;
  assign tx_cntvalueout_14[2] = \<const0> ;
  assign tx_cntvalueout_14[1] = \<const0> ;
  assign tx_cntvalueout_14[0] = \<const0> ;
  assign tx_cntvalueout_15[8] = \<const0> ;
  assign tx_cntvalueout_15[7] = \<const0> ;
  assign tx_cntvalueout_15[6] = \<const0> ;
  assign tx_cntvalueout_15[5] = \<const0> ;
  assign tx_cntvalueout_15[4] = \<const0> ;
  assign tx_cntvalueout_15[3] = \<const0> ;
  assign tx_cntvalueout_15[2] = \<const0> ;
  assign tx_cntvalueout_15[1] = \<const0> ;
  assign tx_cntvalueout_15[0] = \<const0> ;
  assign tx_cntvalueout_16[8] = \<const0> ;
  assign tx_cntvalueout_16[7] = \<const0> ;
  assign tx_cntvalueout_16[6] = \<const0> ;
  assign tx_cntvalueout_16[5] = \<const0> ;
  assign tx_cntvalueout_16[4] = \<const0> ;
  assign tx_cntvalueout_16[3] = \<const0> ;
  assign tx_cntvalueout_16[2] = \<const0> ;
  assign tx_cntvalueout_16[1] = \<const0> ;
  assign tx_cntvalueout_16[0] = \<const0> ;
  assign tx_cntvalueout_17[8] = \<const0> ;
  assign tx_cntvalueout_17[7] = \<const0> ;
  assign tx_cntvalueout_17[6] = \<const0> ;
  assign tx_cntvalueout_17[5] = \<const0> ;
  assign tx_cntvalueout_17[4] = \<const0> ;
  assign tx_cntvalueout_17[3] = \<const0> ;
  assign tx_cntvalueout_17[2] = \<const0> ;
  assign tx_cntvalueout_17[1] = \<const0> ;
  assign tx_cntvalueout_17[0] = \<const0> ;
  assign tx_cntvalueout_18[8] = \<const0> ;
  assign tx_cntvalueout_18[7] = \<const0> ;
  assign tx_cntvalueout_18[6] = \<const0> ;
  assign tx_cntvalueout_18[5] = \<const0> ;
  assign tx_cntvalueout_18[4] = \<const0> ;
  assign tx_cntvalueout_18[3] = \<const0> ;
  assign tx_cntvalueout_18[2] = \<const0> ;
  assign tx_cntvalueout_18[1] = \<const0> ;
  assign tx_cntvalueout_18[0] = \<const0> ;
  assign tx_cntvalueout_19[8] = \<const0> ;
  assign tx_cntvalueout_19[7] = \<const0> ;
  assign tx_cntvalueout_19[6] = \<const0> ;
  assign tx_cntvalueout_19[5] = \<const0> ;
  assign tx_cntvalueout_19[4] = \<const0> ;
  assign tx_cntvalueout_19[3] = \<const0> ;
  assign tx_cntvalueout_19[2] = \<const0> ;
  assign tx_cntvalueout_19[1] = \<const0> ;
  assign tx_cntvalueout_19[0] = \<const0> ;
  assign tx_cntvalueout_2[8] = \<const0> ;
  assign tx_cntvalueout_2[7] = \<const0> ;
  assign tx_cntvalueout_2[6] = \<const0> ;
  assign tx_cntvalueout_2[5] = \<const0> ;
  assign tx_cntvalueout_2[4] = \<const0> ;
  assign tx_cntvalueout_2[3] = \<const0> ;
  assign tx_cntvalueout_2[2] = \<const0> ;
  assign tx_cntvalueout_2[1] = \<const0> ;
  assign tx_cntvalueout_2[0] = \<const0> ;
  assign tx_cntvalueout_20[8] = \<const0> ;
  assign tx_cntvalueout_20[7] = \<const0> ;
  assign tx_cntvalueout_20[6] = \<const0> ;
  assign tx_cntvalueout_20[5] = \<const0> ;
  assign tx_cntvalueout_20[4] = \<const0> ;
  assign tx_cntvalueout_20[3] = \<const0> ;
  assign tx_cntvalueout_20[2] = \<const0> ;
  assign tx_cntvalueout_20[1] = \<const0> ;
  assign tx_cntvalueout_20[0] = \<const0> ;
  assign tx_cntvalueout_21[8] = \<const0> ;
  assign tx_cntvalueout_21[7] = \<const0> ;
  assign tx_cntvalueout_21[6] = \<const0> ;
  assign tx_cntvalueout_21[5] = \<const0> ;
  assign tx_cntvalueout_21[4] = \<const0> ;
  assign tx_cntvalueout_21[3] = \<const0> ;
  assign tx_cntvalueout_21[2] = \<const0> ;
  assign tx_cntvalueout_21[1] = \<const0> ;
  assign tx_cntvalueout_21[0] = \<const0> ;
  assign tx_cntvalueout_22[8] = \<const0> ;
  assign tx_cntvalueout_22[7] = \<const0> ;
  assign tx_cntvalueout_22[6] = \<const0> ;
  assign tx_cntvalueout_22[5] = \<const0> ;
  assign tx_cntvalueout_22[4] = \<const0> ;
  assign tx_cntvalueout_22[3] = \<const0> ;
  assign tx_cntvalueout_22[2] = \<const0> ;
  assign tx_cntvalueout_22[1] = \<const0> ;
  assign tx_cntvalueout_22[0] = \<const0> ;
  assign tx_cntvalueout_23[8] = \<const0> ;
  assign tx_cntvalueout_23[7] = \<const0> ;
  assign tx_cntvalueout_23[6] = \<const0> ;
  assign tx_cntvalueout_23[5] = \<const0> ;
  assign tx_cntvalueout_23[4] = \<const0> ;
  assign tx_cntvalueout_23[3] = \<const0> ;
  assign tx_cntvalueout_23[2] = \<const0> ;
  assign tx_cntvalueout_23[1] = \<const0> ;
  assign tx_cntvalueout_23[0] = \<const0> ;
  assign tx_cntvalueout_24[8] = \<const0> ;
  assign tx_cntvalueout_24[7] = \<const0> ;
  assign tx_cntvalueout_24[6] = \<const0> ;
  assign tx_cntvalueout_24[5] = \<const0> ;
  assign tx_cntvalueout_24[4] = \<const0> ;
  assign tx_cntvalueout_24[3] = \<const0> ;
  assign tx_cntvalueout_24[2] = \<const0> ;
  assign tx_cntvalueout_24[1] = \<const0> ;
  assign tx_cntvalueout_24[0] = \<const0> ;
  assign tx_cntvalueout_25[8] = \<const0> ;
  assign tx_cntvalueout_25[7] = \<const0> ;
  assign tx_cntvalueout_25[6] = \<const0> ;
  assign tx_cntvalueout_25[5] = \<const0> ;
  assign tx_cntvalueout_25[4] = \<const0> ;
  assign tx_cntvalueout_25[3] = \<const0> ;
  assign tx_cntvalueout_25[2] = \<const0> ;
  assign tx_cntvalueout_25[1] = \<const0> ;
  assign tx_cntvalueout_25[0] = \<const0> ;
  assign tx_cntvalueout_26[8] = \<const0> ;
  assign tx_cntvalueout_26[7] = \<const0> ;
  assign tx_cntvalueout_26[6] = \<const0> ;
  assign tx_cntvalueout_26[5] = \<const0> ;
  assign tx_cntvalueout_26[4] = \<const0> ;
  assign tx_cntvalueout_26[3] = \<const0> ;
  assign tx_cntvalueout_26[2] = \<const0> ;
  assign tx_cntvalueout_26[1] = \<const0> ;
  assign tx_cntvalueout_26[0] = \<const0> ;
  assign tx_cntvalueout_27[8] = \<const0> ;
  assign tx_cntvalueout_27[7] = \<const0> ;
  assign tx_cntvalueout_27[6] = \<const0> ;
  assign tx_cntvalueout_27[5] = \<const0> ;
  assign tx_cntvalueout_27[4] = \<const0> ;
  assign tx_cntvalueout_27[3] = \<const0> ;
  assign tx_cntvalueout_27[2] = \<const0> ;
  assign tx_cntvalueout_27[1] = \<const0> ;
  assign tx_cntvalueout_27[0] = \<const0> ;
  assign tx_cntvalueout_28[8] = \<const0> ;
  assign tx_cntvalueout_28[7] = \<const0> ;
  assign tx_cntvalueout_28[6] = \<const0> ;
  assign tx_cntvalueout_28[5] = \<const0> ;
  assign tx_cntvalueout_28[4] = \<const0> ;
  assign tx_cntvalueout_28[3] = \<const0> ;
  assign tx_cntvalueout_28[2] = \<const0> ;
  assign tx_cntvalueout_28[1] = \<const0> ;
  assign tx_cntvalueout_28[0] = \<const0> ;
  assign tx_cntvalueout_29[8] = \<const0> ;
  assign tx_cntvalueout_29[7] = \<const0> ;
  assign tx_cntvalueout_29[6] = \<const0> ;
  assign tx_cntvalueout_29[5] = \<const0> ;
  assign tx_cntvalueout_29[4] = \<const0> ;
  assign tx_cntvalueout_29[3] = \<const0> ;
  assign tx_cntvalueout_29[2] = \<const0> ;
  assign tx_cntvalueout_29[1] = \<const0> ;
  assign tx_cntvalueout_29[0] = \<const0> ;
  assign tx_cntvalueout_3[8] = \<const0> ;
  assign tx_cntvalueout_3[7] = \<const0> ;
  assign tx_cntvalueout_3[6] = \<const0> ;
  assign tx_cntvalueout_3[5] = \<const0> ;
  assign tx_cntvalueout_3[4] = \<const0> ;
  assign tx_cntvalueout_3[3] = \<const0> ;
  assign tx_cntvalueout_3[2] = \<const0> ;
  assign tx_cntvalueout_3[1] = \<const0> ;
  assign tx_cntvalueout_3[0] = \<const0> ;
  assign tx_cntvalueout_30[8] = \<const0> ;
  assign tx_cntvalueout_30[7] = \<const0> ;
  assign tx_cntvalueout_30[6] = \<const0> ;
  assign tx_cntvalueout_30[5] = \<const0> ;
  assign tx_cntvalueout_30[4] = \<const0> ;
  assign tx_cntvalueout_30[3] = \<const0> ;
  assign tx_cntvalueout_30[2] = \<const0> ;
  assign tx_cntvalueout_30[1] = \<const0> ;
  assign tx_cntvalueout_30[0] = \<const0> ;
  assign tx_cntvalueout_31[8] = \<const0> ;
  assign tx_cntvalueout_31[7] = \<const0> ;
  assign tx_cntvalueout_31[6] = \<const0> ;
  assign tx_cntvalueout_31[5] = \<const0> ;
  assign tx_cntvalueout_31[4] = \<const0> ;
  assign tx_cntvalueout_31[3] = \<const0> ;
  assign tx_cntvalueout_31[2] = \<const0> ;
  assign tx_cntvalueout_31[1] = \<const0> ;
  assign tx_cntvalueout_31[0] = \<const0> ;
  assign tx_cntvalueout_32[8] = \<const0> ;
  assign tx_cntvalueout_32[7] = \<const0> ;
  assign tx_cntvalueout_32[6] = \<const0> ;
  assign tx_cntvalueout_32[5] = \<const0> ;
  assign tx_cntvalueout_32[4] = \<const0> ;
  assign tx_cntvalueout_32[3] = \<const0> ;
  assign tx_cntvalueout_32[2] = \<const0> ;
  assign tx_cntvalueout_32[1] = \<const0> ;
  assign tx_cntvalueout_32[0] = \<const0> ;
  assign tx_cntvalueout_33[8] = \<const0> ;
  assign tx_cntvalueout_33[7] = \<const0> ;
  assign tx_cntvalueout_33[6] = \<const0> ;
  assign tx_cntvalueout_33[5] = \<const0> ;
  assign tx_cntvalueout_33[4] = \<const0> ;
  assign tx_cntvalueout_33[3] = \<const0> ;
  assign tx_cntvalueout_33[2] = \<const0> ;
  assign tx_cntvalueout_33[1] = \<const0> ;
  assign tx_cntvalueout_33[0] = \<const0> ;
  assign tx_cntvalueout_34[8] = \<const0> ;
  assign tx_cntvalueout_34[7] = \<const0> ;
  assign tx_cntvalueout_34[6] = \<const0> ;
  assign tx_cntvalueout_34[5] = \<const0> ;
  assign tx_cntvalueout_34[4] = \<const0> ;
  assign tx_cntvalueout_34[3] = \<const0> ;
  assign tx_cntvalueout_34[2] = \<const0> ;
  assign tx_cntvalueout_34[1] = \<const0> ;
  assign tx_cntvalueout_34[0] = \<const0> ;
  assign tx_cntvalueout_35[8] = \<const0> ;
  assign tx_cntvalueout_35[7] = \<const0> ;
  assign tx_cntvalueout_35[6] = \<const0> ;
  assign tx_cntvalueout_35[5] = \<const0> ;
  assign tx_cntvalueout_35[4] = \<const0> ;
  assign tx_cntvalueout_35[3] = \<const0> ;
  assign tx_cntvalueout_35[2] = \<const0> ;
  assign tx_cntvalueout_35[1] = \<const0> ;
  assign tx_cntvalueout_35[0] = \<const0> ;
  assign tx_cntvalueout_36[8] = \<const0> ;
  assign tx_cntvalueout_36[7] = \<const0> ;
  assign tx_cntvalueout_36[6] = \<const0> ;
  assign tx_cntvalueout_36[5] = \<const0> ;
  assign tx_cntvalueout_36[4] = \<const0> ;
  assign tx_cntvalueout_36[3] = \<const0> ;
  assign tx_cntvalueout_36[2] = \<const0> ;
  assign tx_cntvalueout_36[1] = \<const0> ;
  assign tx_cntvalueout_36[0] = \<const0> ;
  assign tx_cntvalueout_37[8] = \<const0> ;
  assign tx_cntvalueout_37[7] = \<const0> ;
  assign tx_cntvalueout_37[6] = \<const0> ;
  assign tx_cntvalueout_37[5] = \<const0> ;
  assign tx_cntvalueout_37[4] = \<const0> ;
  assign tx_cntvalueout_37[3] = \<const0> ;
  assign tx_cntvalueout_37[2] = \<const0> ;
  assign tx_cntvalueout_37[1] = \<const0> ;
  assign tx_cntvalueout_37[0] = \<const0> ;
  assign tx_cntvalueout_38[8] = \<const0> ;
  assign tx_cntvalueout_38[7] = \<const0> ;
  assign tx_cntvalueout_38[6] = \<const0> ;
  assign tx_cntvalueout_38[5] = \<const0> ;
  assign tx_cntvalueout_38[4] = \<const0> ;
  assign tx_cntvalueout_38[3] = \<const0> ;
  assign tx_cntvalueout_38[2] = \<const0> ;
  assign tx_cntvalueout_38[1] = \<const0> ;
  assign tx_cntvalueout_38[0] = \<const0> ;
  assign tx_cntvalueout_39[8] = \<const0> ;
  assign tx_cntvalueout_39[7] = \<const0> ;
  assign tx_cntvalueout_39[6] = \<const0> ;
  assign tx_cntvalueout_39[5] = \<const0> ;
  assign tx_cntvalueout_39[4] = \<const0> ;
  assign tx_cntvalueout_39[3] = \<const0> ;
  assign tx_cntvalueout_39[2] = \<const0> ;
  assign tx_cntvalueout_39[1] = \<const0> ;
  assign tx_cntvalueout_39[0] = \<const0> ;
  assign tx_cntvalueout_4[8] = \<const0> ;
  assign tx_cntvalueout_4[7] = \<const0> ;
  assign tx_cntvalueout_4[6] = \<const0> ;
  assign tx_cntvalueout_4[5] = \<const0> ;
  assign tx_cntvalueout_4[4] = \<const0> ;
  assign tx_cntvalueout_4[3] = \<const0> ;
  assign tx_cntvalueout_4[2] = \<const0> ;
  assign tx_cntvalueout_4[1] = \<const0> ;
  assign tx_cntvalueout_4[0] = \<const0> ;
  assign tx_cntvalueout_40[8] = \<const0> ;
  assign tx_cntvalueout_40[7] = \<const0> ;
  assign tx_cntvalueout_40[6] = \<const0> ;
  assign tx_cntvalueout_40[5] = \<const0> ;
  assign tx_cntvalueout_40[4] = \<const0> ;
  assign tx_cntvalueout_40[3] = \<const0> ;
  assign tx_cntvalueout_40[2] = \<const0> ;
  assign tx_cntvalueout_40[1] = \<const0> ;
  assign tx_cntvalueout_40[0] = \<const0> ;
  assign tx_cntvalueout_41[8] = \<const0> ;
  assign tx_cntvalueout_41[7] = \<const0> ;
  assign tx_cntvalueout_41[6] = \<const0> ;
  assign tx_cntvalueout_41[5] = \<const0> ;
  assign tx_cntvalueout_41[4] = \<const0> ;
  assign tx_cntvalueout_41[3] = \<const0> ;
  assign tx_cntvalueout_41[2] = \<const0> ;
  assign tx_cntvalueout_41[1] = \<const0> ;
  assign tx_cntvalueout_41[0] = \<const0> ;
  assign tx_cntvalueout_42[8] = \<const0> ;
  assign tx_cntvalueout_42[7] = \<const0> ;
  assign tx_cntvalueout_42[6] = \<const0> ;
  assign tx_cntvalueout_42[5] = \<const0> ;
  assign tx_cntvalueout_42[4] = \<const0> ;
  assign tx_cntvalueout_42[3] = \<const0> ;
  assign tx_cntvalueout_42[2] = \<const0> ;
  assign tx_cntvalueout_42[1] = \<const0> ;
  assign tx_cntvalueout_42[0] = \<const0> ;
  assign tx_cntvalueout_43[8] = \<const0> ;
  assign tx_cntvalueout_43[7] = \<const0> ;
  assign tx_cntvalueout_43[6] = \<const0> ;
  assign tx_cntvalueout_43[5] = \<const0> ;
  assign tx_cntvalueout_43[4] = \<const0> ;
  assign tx_cntvalueout_43[3] = \<const0> ;
  assign tx_cntvalueout_43[2] = \<const0> ;
  assign tx_cntvalueout_43[1] = \<const0> ;
  assign tx_cntvalueout_43[0] = \<const0> ;
  assign tx_cntvalueout_44[8] = \<const0> ;
  assign tx_cntvalueout_44[7] = \<const0> ;
  assign tx_cntvalueout_44[6] = \<const0> ;
  assign tx_cntvalueout_44[5] = \<const0> ;
  assign tx_cntvalueout_44[4] = \<const0> ;
  assign tx_cntvalueout_44[3] = \<const0> ;
  assign tx_cntvalueout_44[2] = \<const0> ;
  assign tx_cntvalueout_44[1] = \<const0> ;
  assign tx_cntvalueout_44[0] = \<const0> ;
  assign tx_cntvalueout_45[8] = \<const0> ;
  assign tx_cntvalueout_45[7] = \<const0> ;
  assign tx_cntvalueout_45[6] = \<const0> ;
  assign tx_cntvalueout_45[5] = \<const0> ;
  assign tx_cntvalueout_45[4] = \<const0> ;
  assign tx_cntvalueout_45[3] = \<const0> ;
  assign tx_cntvalueout_45[2] = \<const0> ;
  assign tx_cntvalueout_45[1] = \<const0> ;
  assign tx_cntvalueout_45[0] = \<const0> ;
  assign tx_cntvalueout_46[8] = \<const0> ;
  assign tx_cntvalueout_46[7] = \<const0> ;
  assign tx_cntvalueout_46[6] = \<const0> ;
  assign tx_cntvalueout_46[5] = \<const0> ;
  assign tx_cntvalueout_46[4] = \<const0> ;
  assign tx_cntvalueout_46[3] = \<const0> ;
  assign tx_cntvalueout_46[2] = \<const0> ;
  assign tx_cntvalueout_46[1] = \<const0> ;
  assign tx_cntvalueout_46[0] = \<const0> ;
  assign tx_cntvalueout_47[8] = \<const0> ;
  assign tx_cntvalueout_47[7] = \<const0> ;
  assign tx_cntvalueout_47[6] = \<const0> ;
  assign tx_cntvalueout_47[5] = \<const0> ;
  assign tx_cntvalueout_47[4] = \<const0> ;
  assign tx_cntvalueout_47[3] = \<const0> ;
  assign tx_cntvalueout_47[2] = \<const0> ;
  assign tx_cntvalueout_47[1] = \<const0> ;
  assign tx_cntvalueout_47[0] = \<const0> ;
  assign tx_cntvalueout_48[8] = \<const0> ;
  assign tx_cntvalueout_48[7] = \<const0> ;
  assign tx_cntvalueout_48[6] = \<const0> ;
  assign tx_cntvalueout_48[5] = \<const0> ;
  assign tx_cntvalueout_48[4] = \<const0> ;
  assign tx_cntvalueout_48[3] = \<const0> ;
  assign tx_cntvalueout_48[2] = \<const0> ;
  assign tx_cntvalueout_48[1] = \<const0> ;
  assign tx_cntvalueout_48[0] = \<const0> ;
  assign tx_cntvalueout_49[8] = \<const0> ;
  assign tx_cntvalueout_49[7] = \<const0> ;
  assign tx_cntvalueout_49[6] = \<const0> ;
  assign tx_cntvalueout_49[5] = \<const0> ;
  assign tx_cntvalueout_49[4] = \<const0> ;
  assign tx_cntvalueout_49[3] = \<const0> ;
  assign tx_cntvalueout_49[2] = \<const0> ;
  assign tx_cntvalueout_49[1] = \<const0> ;
  assign tx_cntvalueout_49[0] = \<const0> ;
  assign tx_cntvalueout_5[8] = \<const0> ;
  assign tx_cntvalueout_5[7] = \<const0> ;
  assign tx_cntvalueout_5[6] = \<const0> ;
  assign tx_cntvalueout_5[5] = \<const0> ;
  assign tx_cntvalueout_5[4] = \<const0> ;
  assign tx_cntvalueout_5[3] = \<const0> ;
  assign tx_cntvalueout_5[2] = \<const0> ;
  assign tx_cntvalueout_5[1] = \<const0> ;
  assign tx_cntvalueout_5[0] = \<const0> ;
  assign tx_cntvalueout_50[8] = \<const0> ;
  assign tx_cntvalueout_50[7] = \<const0> ;
  assign tx_cntvalueout_50[6] = \<const0> ;
  assign tx_cntvalueout_50[5] = \<const0> ;
  assign tx_cntvalueout_50[4] = \<const0> ;
  assign tx_cntvalueout_50[3] = \<const0> ;
  assign tx_cntvalueout_50[2] = \<const0> ;
  assign tx_cntvalueout_50[1] = \<const0> ;
  assign tx_cntvalueout_50[0] = \<const0> ;
  assign tx_cntvalueout_51[8] = \<const0> ;
  assign tx_cntvalueout_51[7] = \<const0> ;
  assign tx_cntvalueout_51[6] = \<const0> ;
  assign tx_cntvalueout_51[5] = \<const0> ;
  assign tx_cntvalueout_51[4] = \<const0> ;
  assign tx_cntvalueout_51[3] = \<const0> ;
  assign tx_cntvalueout_51[2] = \<const0> ;
  assign tx_cntvalueout_51[1] = \<const0> ;
  assign tx_cntvalueout_51[0] = \<const0> ;
  assign tx_cntvalueout_6[8] = \<const0> ;
  assign tx_cntvalueout_6[7] = \<const0> ;
  assign tx_cntvalueout_6[6] = \<const0> ;
  assign tx_cntvalueout_6[5] = \<const0> ;
  assign tx_cntvalueout_6[4] = \<const0> ;
  assign tx_cntvalueout_6[3] = \<const0> ;
  assign tx_cntvalueout_6[2] = \<const0> ;
  assign tx_cntvalueout_6[1] = \<const0> ;
  assign tx_cntvalueout_6[0] = \<const0> ;
  assign tx_cntvalueout_7[8] = \<const0> ;
  assign tx_cntvalueout_7[7] = \<const0> ;
  assign tx_cntvalueout_7[6] = \<const0> ;
  assign tx_cntvalueout_7[5] = \<const0> ;
  assign tx_cntvalueout_7[4] = \<const0> ;
  assign tx_cntvalueout_7[3] = \<const0> ;
  assign tx_cntvalueout_7[2] = \<const0> ;
  assign tx_cntvalueout_7[1] = \<const0> ;
  assign tx_cntvalueout_7[0] = \<const0> ;
  assign tx_cntvalueout_8[8] = \<const0> ;
  assign tx_cntvalueout_8[7] = \<const0> ;
  assign tx_cntvalueout_8[6] = \<const0> ;
  assign tx_cntvalueout_8[5] = \<const0> ;
  assign tx_cntvalueout_8[4] = \<const0> ;
  assign tx_cntvalueout_8[3] = \<const0> ;
  assign tx_cntvalueout_8[2] = \<const0> ;
  assign tx_cntvalueout_8[1] = \<const0> ;
  assign tx_cntvalueout_8[0] = \<const0> ;
  assign tx_cntvalueout_9[8] = \<const0> ;
  assign tx_cntvalueout_9[7] = \<const0> ;
  assign tx_cntvalueout_9[6] = \<const0> ;
  assign tx_cntvalueout_9[5] = \<const0> ;
  assign tx_cntvalueout_9[4] = \<const0> ;
  assign tx_cntvalueout_9[3] = \<const0> ;
  assign tx_cntvalueout_9[2] = \<const0> ;
  assign tx_cntvalueout_9[1] = \<const0> ;
  assign tx_cntvalueout_9[0] = \<const0> ;
  assign vtc_rdy_bsc0 = \<const0> ;
  assign vtc_rdy_bsc1 = \<const0> ;
  assign vtc_rdy_bsc2 = \<const0> ;
  assign vtc_rdy_bsc3 = \<const0> ;
  assign vtc_rdy_bsc4 = \<const0> ;
  assign vtc_rdy_bsc5 = \<const0> ;
  assign vtc_rdy_bsc6 = \<const0> ;
  assign vtc_rdy_bsc7 = \<const0> ;
  GND GND
       (.G(\<const0> ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_hssio_rx_hssio_wiz_top top_inst
       (.bs_rst_dphy_in(bs_rst_dphy_in),
        .clk_rxn(clk_rxn),
        .clk_rxp(clk_rxp),
        .data_rxn0(data_rxn0),
        .data_rxn1(data_rxn1),
        .data_rxn2(data_rxn2),
        .data_rxn3(data_rxn3),
        .data_rxp0(data_rxp0),
        .data_rxp1(data_rxp1),
        .data_rxp2(data_rxp2),
        .data_rxp3(data_rxp3),
        .data_to_fabric_data_rxp0(data_to_fabric_data_rxp0),
        .data_to_fabric_data_rxp1(data_to_fabric_data_rxp1),
        .data_to_fabric_data_rxp2(data_to_fabric_data_rxp2),
        .data_to_fabric_data_rxp3(data_to_fabric_data_rxp3),
        .fifo_empty_2(fifo_empty_2),
        .fifo_empty_4(fifo_empty_4),
        .fifo_empty_6(fifo_empty_6),
        .fifo_empty_8(fifo_empty_8),
        .fifo_rd_clk_0(fifo_rd_clk_0),
        .fifo_rd_en_2(fifo_rd_en_2),
        .fifo_rd_en_4(fifo_rd_en_4),
        .fifo_rd_en_6(fifo_rd_en_6),
        .fifo_rd_en_8(fifo_rd_en_8),
        .fifo_wr_clk_0(fifo_wr_clk_0),
        .hs_rx_disable(hs_rx_disable),
        .lp_rx_o_n(lp_rx_o_n),
        .lp_rx_o_p(lp_rx_o_p),
        .riu_clk(riu_clk),
        .rst(rst),
        .rst_seq_done(rst_seq_done));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_hssio_rx_hssio_wiz_top
   (lp_rx_o_n,
    lp_rx_o_p,
    fifo_wr_clk_0,
    fifo_empty_2,
    data_to_fabric_data_rxp0,
    fifo_empty_4,
    data_to_fabric_data_rxp1,
    fifo_empty_6,
    data_to_fabric_data_rxp2,
    fifo_empty_8,
    data_to_fabric_data_rxp3,
    rst_seq_done,
    hs_rx_disable,
    clk_rxp,
    clk_rxn,
    data_rxp0,
    data_rxn0,
    data_rxp1,
    data_rxn1,
    data_rxp2,
    data_rxn2,
    data_rxp3,
    data_rxn3,
    fifo_rd_clk_0,
    fifo_rd_en_2,
    fifo_rd_en_4,
    fifo_rd_en_6,
    fifo_rd_en_8,
    riu_clk,
    rst,
    bs_rst_dphy_in);
  output [4:0]lp_rx_o_n;
  output [4:0]lp_rx_o_p;
  output fifo_wr_clk_0;
  output fifo_empty_2;
  output [7:0]data_to_fabric_data_rxp0;
  output fifo_empty_4;
  output [7:0]data_to_fabric_data_rxp1;
  output fifo_empty_6;
  output [7:0]data_to_fabric_data_rxp2;
  output fifo_empty_8;
  output [7:0]data_to_fabric_data_rxp3;
  output rst_seq_done;
  input [4:0]hs_rx_disable;
  input clk_rxp;
  input clk_rxn;
  input data_rxp0;
  input data_rxn0;
  input data_rxp1;
  input data_rxn1;
  input data_rxp2;
  input data_rxn2;
  input data_rxp3;
  input data_rxn3;
  input fifo_rd_clk_0;
  input fifo_rd_en_2;
  input fifo_rd_en_4;
  input fifo_rd_en_6;
  input fifo_rd_en_8;
  input riu_clk;
  input rst;
  input bs_rst_dphy_in;

  wire all_bsc_dly_rdy_in;
  wire bs_ctrl_top_inst_n_0;
  wire bs_ctrl_top_inst_n_1;
  wire bs_ctrl_top_inst_n_2;
  wire bs_ctrl_top_inst_n_3;
  wire [8:0]bs_rst;
  wire bs_rst_dphy_in;
  wire bsctrl_rst;
  wire clk_rst_top_inst_n_10;
  wire clk_rst_top_inst_n_15;
  wire clk_rxn;
  wire clk_rxp;
  wire core_rdy;
  (* RTL_KEEP = "true" *) wire [51:0]core_rdy_r;
  wire data_rxn0;
  wire data_rxn1;
  wire data_rxn2;
  wire data_rxn3;
  wire data_rxp0;
  wire data_rxp1;
  wire data_rxp2;
  wire data_rxp3;
  wire [8:0]data_to_bs;
  wire [7:0]data_to_fabric_data_rxp0;
  wire [7:0]data_to_fabric_data_rxp1;
  wire [7:0]data_to_fabric_data_rxp2;
  wire [7:0]data_to_fabric_data_rxp3;
  wire fifo_empty_2;
  wire fifo_empty_4;
  wire fifo_empty_6;
  wire fifo_empty_8;
  wire fifo_rd_clk_0;
  wire fifo_rd_en_2;
  wire fifo_rd_en_4;
  wire fifo_rd_en_6;
  wire fifo_rd_en_8;
  wire fifo_wr_clk_0;
  wire [4:0]hs_rx_disable;
  wire [4:0]lp_rx_o_n;
  wire [4:0]lp_rx_o_p;
  wire n0_en_vtc;
  wire [39:0]n0_rx_bit_ctrl_in0;
  wire [39:0]n0_rx_bit_ctrl_in2;
  wire [39:0]n0_rx_bit_ctrl_in4;
  wire [39:0]n0_rx_bit_ctrl_out0;
  wire [39:0]n0_rx_bit_ctrl_out2;
  wire [39:0]n0_rx_bit_ctrl_out4;
  (* RTL_KEEP = "true" *) wire [3:0]n0_tbyte_d;
  wire [39:0]n0_tx_bit_ctrl_in0;
  wire [39:0]n0_tx_bit_ctrl_in2;
  wire [39:0]n0_tx_bit_ctrl_in4;
  wire [39:0]n0_tx_bit_ctrl_out0;
  wire [39:0]n0_tx_bit_ctrl_out2;
  wire [39:0]n0_tx_bit_ctrl_out4;
  wire [39:0]n1_rx_bit_ctrl_in0;
  wire [39:0]n1_rx_bit_ctrl_in2;
  wire [39:0]n1_rx_bit_ctrl_out0;
  wire [39:0]n1_rx_bit_ctrl_out2;
  (* RTL_KEEP = "true" *) wire [3:0]n1_tbyte_d;
  wire [39:0]n1_tx_bit_ctrl_in0;
  wire [39:0]n1_tx_bit_ctrl_in2;
  wire [39:0]n1_tx_bit_ctrl_out0;
  wire [39:0]n1_tx_bit_ctrl_out2;
  (* RTL_KEEP = "true" *) wire [3:0]n2_tbyte_d;
  (* RTL_KEEP = "true" *) wire [3:0]n3_tbyte_d;
  (* RTL_KEEP = "true" *) wire [3:0]n4_tbyte_d;
  (* RTL_KEEP = "true" *) wire [3:0]n5_tbyte_d;
  (* RTL_KEEP = "true" *) wire [3:0]n6_tbyte_d;
  (* RTL_KEEP = "true" *) wire [3:0]n7_tbyte_d;
  wire riu_clk;
  wire rst;
  wire [8:0]rst_dly;
  wire [7:7]\rst_scheme_inst/hssio_state ;
  (* RTL_KEEP = "true" *) wire rst_seq_done1;
  (* RTL_KEEP = "true" *) wire rst_seq_done2;
  (* RTL_KEEP = "true" *) wire rst_seq_done3;

  assign rst_seq_done = rst_seq_done3;
  FDRE \CORE_RDY_GEN[0].core_rdy_r_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[0]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[10].core_rdy_r_reg[10] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[10]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[11].core_rdy_r_reg[11] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[11]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[12].core_rdy_r_reg[12] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[12]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[13].core_rdy_r_reg[13] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[13]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[14].core_rdy_r_reg[14] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[14]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[15].core_rdy_r_reg[15] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[15]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[16].core_rdy_r_reg[16] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[16]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[17].core_rdy_r_reg[17] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[17]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[18].core_rdy_r_reg[18] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[18]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[19].core_rdy_r_reg[19] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[19]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[1].core_rdy_r_reg[1] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[1]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[20].core_rdy_r_reg[20] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[20]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[21].core_rdy_r_reg[21] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[21]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[22].core_rdy_r_reg[22] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[22]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[23].core_rdy_r_reg[23] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[23]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[24].core_rdy_r_reg[24] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[24]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[25].core_rdy_r_reg[25] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[25]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[26].core_rdy_r_reg[26] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[26]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[27].core_rdy_r_reg[27] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[27]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[28].core_rdy_r_reg[28] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[28]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[29].core_rdy_r_reg[29] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[29]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[2].core_rdy_r_reg[2] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[2]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[30].core_rdy_r_reg[30] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[30]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[31].core_rdy_r_reg[31] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[31]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[32].core_rdy_r_reg[32] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[32]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[33].core_rdy_r_reg[33] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[33]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[34].core_rdy_r_reg[34] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[34]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[35].core_rdy_r_reg[35] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[35]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[36].core_rdy_r_reg[36] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[36]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[37].core_rdy_r_reg[37] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[37]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[38].core_rdy_r_reg[38] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[38]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[39].core_rdy_r_reg[39] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[39]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[3].core_rdy_r_reg[3] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[3]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[40].core_rdy_r_reg[40] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[40]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[41].core_rdy_r_reg[41] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[41]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[42].core_rdy_r_reg[42] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[42]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[43].core_rdy_r_reg[43] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[43]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[44].core_rdy_r_reg[44] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[44]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[45].core_rdy_r_reg[45] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[45]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[46].core_rdy_r_reg[46] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[46]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[47].core_rdy_r_reg[47] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[47]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[48].core_rdy_r_reg[48] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[48]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[49].core_rdy_r_reg[49] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[49]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[4].core_rdy_r_reg[4] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[4]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[50].core_rdy_r_reg[50] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[50]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[51].core_rdy_r_reg[51] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[51]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[5].core_rdy_r_reg[5] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[5]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[6].core_rdy_r_reg[6] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[6]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[7].core_rdy_r_reg[7] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[7]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[8].core_rdy_r_reg[8] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[8]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \CORE_RDY_GEN[9].core_rdy_r_reg[9] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(core_rdy),
        .Q(core_rdy_r[9]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB0_TBYTE.n0_tbyte_d_reg[0] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n0_tbyte_d[0]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB0_TBYTE.n0_tbyte_d_reg[1] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n0_tbyte_d[1]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB0_TBYTE.n0_tbyte_d_reg[2] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n0_tbyte_d[2]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB0_TBYTE.n0_tbyte_d_reg[3] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n0_tbyte_d[3]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB1_TBYTE.n1_tbyte_d_reg[0] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n1_tbyte_d[0]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB1_TBYTE.n1_tbyte_d_reg[1] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n1_tbyte_d[1]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB1_TBYTE.n1_tbyte_d_reg[2] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n1_tbyte_d[2]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB1_TBYTE.n1_tbyte_d_reg[3] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n1_tbyte_d[3]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB2_TBYTE.n2_tbyte_d_reg[0] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n2_tbyte_d[0]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB2_TBYTE.n2_tbyte_d_reg[1] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n2_tbyte_d[1]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB2_TBYTE.n2_tbyte_d_reg[2] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n2_tbyte_d[2]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB2_TBYTE.n2_tbyte_d_reg[3] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n2_tbyte_d[3]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB3_TBYTE.n3_tbyte_d_reg[0] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n3_tbyte_d[0]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB3_TBYTE.n3_tbyte_d_reg[1] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n3_tbyte_d[1]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB3_TBYTE.n3_tbyte_d_reg[2] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n3_tbyte_d[2]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB3_TBYTE.n3_tbyte_d_reg[3] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n3_tbyte_d[3]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB4_TBYTE.n4_tbyte_d_reg[0] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n4_tbyte_d[0]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB4_TBYTE.n4_tbyte_d_reg[1] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n4_tbyte_d[1]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB4_TBYTE.n4_tbyte_d_reg[2] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n4_tbyte_d[2]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB4_TBYTE.n4_tbyte_d_reg[3] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n4_tbyte_d[3]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB5_TBYTE.n5_tbyte_d_reg[0] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n5_tbyte_d[0]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB5_TBYTE.n5_tbyte_d_reg[1] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n5_tbyte_d[1]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB5_TBYTE.n5_tbyte_d_reg[2] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n5_tbyte_d[2]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB5_TBYTE.n5_tbyte_d_reg[3] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n5_tbyte_d[3]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB6_TBYTE.n6_tbyte_d_reg[0] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n6_tbyte_d[0]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB6_TBYTE.n6_tbyte_d_reg[1] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n6_tbyte_d[1]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB6_TBYTE.n6_tbyte_d_reg[2] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n6_tbyte_d[2]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB6_TBYTE.n6_tbyte_d_reg[3] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n6_tbyte_d[3]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB7_TBYTE.n7_tbyte_d_reg[0] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n7_tbyte_d[0]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB7_TBYTE.n7_tbyte_d_reg[1] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n7_tbyte_d[1]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB7_TBYTE.n7_tbyte_d_reg[2] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n7_tbyte_d[2]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDRE \GEN_NIB7_TBYTE.n7_tbyte_d_reg[3] 
       (.C(clk_rst_top_inst_n_10),
        .CE(1'b1),
        .D(1'b0),
        .Q(n7_tbyte_d[3]),
        .R(1'b0));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_bs_ctrl_top bs_ctrl_top_inst
       (.\BITSLICE_CTRL[1].bs_ctrl_inst_0 (bs_ctrl_top_inst_n_0),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] (bs_ctrl_top_inst_n_3),
        .Q(\rst_scheme_inst/hssio_state ),
        .bsctrl_rst(bsctrl_rst),
        .core_rdy(core_rdy),
        .in0(all_bsc_dly_rdy_in),
        .n0_rx_bit_ctrl_out0(n0_rx_bit_ctrl_out0),
        .n0_rx_bit_ctrl_out2(n0_rx_bit_ctrl_out2),
        .n0_rx_bit_ctrl_out4(n0_rx_bit_ctrl_out4),
        .n0_tbyte_in(n0_tbyte_d),
        .n0_tx_bit_ctrl_out0(n0_tx_bit_ctrl_out0),
        .n0_tx_bit_ctrl_out2(n0_tx_bit_ctrl_out2),
        .n0_tx_bit_ctrl_out4(n0_tx_bit_ctrl_out4),
        .n0_vtc_rdy_out(bs_ctrl_top_inst_n_2),
        .n1_en_vtc_in(n0_en_vtc),
        .n1_rx_bit_ctrl_out0(n1_rx_bit_ctrl_out0),
        .n1_rx_bit_ctrl_out2(n1_rx_bit_ctrl_out2),
        .n1_tbyte_in(n1_tbyte_d),
        .n1_tx_bit_ctrl_out0(n1_tx_bit_ctrl_out0),
        .n1_tx_bit_ctrl_out2(n1_tx_bit_ctrl_out2),
        .n1_vtc_rdy_out(bs_ctrl_top_inst_n_1),
        .pll0_clkoutphy_out(clk_rst_top_inst_n_15),
        .riu_clk(riu_clk),
        .rx_bs0_rx_bit_ctrl_out(n0_rx_bit_ctrl_in0),
        .rx_bs0_tx_bit_ctrl_out(n0_tx_bit_ctrl_in0),
        .rx_bs2_rx_bit_ctrl_out(n0_rx_bit_ctrl_in2),
        .rx_bs2_tx_bit_ctrl_out(n0_tx_bit_ctrl_in2),
        .rx_bs4_rx_bit_ctrl_out(n0_rx_bit_ctrl_in4),
        .rx_bs4_tx_bit_ctrl_out(n0_tx_bit_ctrl_in4),
        .rx_bs6_rx_bit_ctrl_out(n1_rx_bit_ctrl_in0),
        .rx_bs6_tx_bit_ctrl_out(n1_tx_bit_ctrl_in0),
        .rx_bs8_rx_bit_ctrl_out(n1_rx_bit_ctrl_in2),
        .rx_bs8_tx_bit_ctrl_out(n1_tx_bit_ctrl_in2));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_bs_top bs_top_inst
       (.data_to_bs_out({data_to_bs[8],data_to_bs[6],data_to_bs[4],data_to_bs[2],data_to_bs[0]}),
        .data_to_fabric_data_rxp0(data_to_fabric_data_rxp0),
        .data_to_fabric_data_rxp1(data_to_fabric_data_rxp1),
        .data_to_fabric_data_rxp2(data_to_fabric_data_rxp2),
        .data_to_fabric_data_rxp3(data_to_fabric_data_rxp3),
        .fifo_empty_2(fifo_empty_2),
        .fifo_empty_4(fifo_empty_4),
        .fifo_empty_6(fifo_empty_6),
        .fifo_empty_8(fifo_empty_8),
        .fifo_rd_clk_0(fifo_rd_clk_0),
        .fifo_rd_en_2(fifo_rd_en_2),
        .fifo_rd_en_4(fifo_rd_en_4),
        .fifo_rd_en_6(fifo_rd_en_6),
        .fifo_rd_en_8(fifo_rd_en_8),
        .fifo_wr_clk_0(fifo_wr_clk_0),
        .rx_bs0_rx_bit_ctrl_in(n0_rx_bit_ctrl_out0),
        .rx_bs0_rx_bit_ctrl_out(n0_rx_bit_ctrl_in0),
        .rx_bs0_tx_bit_ctrl_in(n0_tx_bit_ctrl_out0),
        .rx_bs0_tx_bit_ctrl_out(n0_tx_bit_ctrl_in0),
        .rx_bs2_rx_bit_ctrl_in(n0_rx_bit_ctrl_out2),
        .rx_bs2_rx_bit_ctrl_out(n0_rx_bit_ctrl_in2),
        .rx_bs2_tx_bit_ctrl_in(n0_tx_bit_ctrl_out2),
        .rx_bs2_tx_bit_ctrl_out(n0_tx_bit_ctrl_in2),
        .rx_bs4_rx_bit_ctrl_in(n0_rx_bit_ctrl_out4),
        .rx_bs4_rx_bit_ctrl_out(n0_rx_bit_ctrl_in4),
        .rx_bs4_tx_bit_ctrl_in(n0_tx_bit_ctrl_out4),
        .rx_bs4_tx_bit_ctrl_out(n0_tx_bit_ctrl_in4),
        .rx_bs6_rx_bit_ctrl_in(n1_rx_bit_ctrl_out0),
        .rx_bs6_rx_bit_ctrl_out(n1_rx_bit_ctrl_in0),
        .rx_bs6_tx_bit_ctrl_in(n1_tx_bit_ctrl_out0),
        .rx_bs6_tx_bit_ctrl_out(n1_tx_bit_ctrl_in0),
        .rx_bs8_rx_bit_ctrl_in(n1_rx_bit_ctrl_out2),
        .rx_bs8_rx_bit_ctrl_out(n1_rx_bit_ctrl_in2),
        .rx_bs8_tx_bit_ctrl_in(n1_tx_bit_ctrl_out2),
        .rx_bs8_tx_bit_ctrl_out(n1_tx_bit_ctrl_in2),
        .rx_bs_rst_dly_ext_in({rst_dly[8],rst_dly[6],rst_dly[4],rst_dly[2],rst_dly[0]}),
        .rx_bs_rst_in({bs_rst[8],bs_rst[6],bs_rst[4],bs_rst[2],bs_rst[0]}));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_clk_rst_top clk_rst_top_inst
       (.\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg (bs_ctrl_top_inst_n_0),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 (bs_ctrl_top_inst_n_3),
        .Q(\rst_scheme_inst/hssio_state ),
        .bs_rst_dphy_in(bs_rst_dphy_in),
        .\bs_rst_int_r_reg[8] ({bs_rst[8],bs_rst[6],bs_rst[4],bs_rst[2],bs_rst[0]}),
        .bsctrl_rst(bsctrl_rst),
        .in0(all_bsc_dly_rdy_in),
        .n0_vtc_rdy_out(bs_ctrl_top_inst_n_2),
        .n1_en_vtc_in(n0_en_vtc),
        .n1_vtc_rdy_out(bs_ctrl_top_inst_n_1),
        .out({rst_dly[8],rst_dly[6],rst_dly[4],rst_dly[2],rst_dly[0]}),
        .pll0_clkout0_out(clk_rst_top_inst_n_10),
        .pll0_clkoutphy_out(clk_rst_top_inst_n_15),
        .riu_clk(riu_clk),
        .rst(rst),
        .rst_seq_done3(rst_seq_done3));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_hssio_rx_mipi_iobuf_rx iobuf_top_inst
       (.data_from_pins({data_rxn3,data_rxp3,data_rxn2,data_rxp2,data_rxn1,data_rxp1,data_rxn0,data_rxp0,clk_rxn,clk_rxp}),
        .data_to_bs_out({data_to_bs[8],data_to_bs[6],data_to_bs[4],data_to_bs[2],data_to_bs[0]}),
        .hs_rx_disable(hs_rx_disable),
        .lp_rx_o_n(lp_rx_o_n),
        .lp_rx_o_p(lp_rx_o_p));
  LUT1 #(
    .INIT(2'h2)) 
    rst_seq_done1_inst
       (.I0(rst_seq_done3),
        .O(rst_seq_done1));
  LUT1 #(
    .INIT(2'h2)) 
    rst_seq_done2_inst
       (.I0(rst_seq_done3),
        .O(rst_seq_done2));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell sync_cell_rst_seq_pll0_inst
       (.CLK(clk_rst_top_inst_n_10),
        .out(rst_seq_done1));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_hssio_rx_mipi_iobuf_rx
   (data_to_bs_out,
    lp_rx_o_n,
    lp_rx_o_p,
    hs_rx_disable,
    data_from_pins);
  output [4:0]data_to_bs_out;
  output [4:0]lp_rx_o_n;
  output [4:0]lp_rx_o_p;
  input [4:0]hs_rx_disable;
  input [9:0]data_from_pins;

  wire [9:0]data_from_pins;
  wire [4:0]data_to_bs_out;
  wire [4:0]hs_rx_disable;
  wire [4:0]lp_rx_o_n;
  wire [4:0]lp_rx_o_p;

  (* box_type = "PRIMITIVE" *) 
  IBUFDS_DPHY #(
    .SIM_DEVICE("ULTRASCALE_PLUS")) 
    \io_gen[0].ibufds_dphy 
       (.HSRX_DISABLE(hs_rx_disable[0]),
        .HSRX_O(data_to_bs_out[0]),
        .I(data_from_pins[0]),
        .IB(data_from_pins[1]),
        .LPRX_DISABLE(1'b0),
        .LPRX_O_N(lp_rx_o_n[0]),
        .LPRX_O_P(lp_rx_o_p[0]));
  (* box_type = "PRIMITIVE" *) 
  IBUFDS_DPHY #(
    .SIM_DEVICE("ULTRASCALE_PLUS")) 
    \io_gen[2].ibufds_dphy 
       (.HSRX_DISABLE(hs_rx_disable[1]),
        .HSRX_O(data_to_bs_out[1]),
        .I(data_from_pins[2]),
        .IB(data_from_pins[3]),
        .LPRX_DISABLE(1'b0),
        .LPRX_O_N(lp_rx_o_n[1]),
        .LPRX_O_P(lp_rx_o_p[1]));
  (* box_type = "PRIMITIVE" *) 
  IBUFDS_DPHY #(
    .SIM_DEVICE("ULTRASCALE_PLUS")) 
    \io_gen[4].ibufds_dphy 
       (.HSRX_DISABLE(hs_rx_disable[2]),
        .HSRX_O(data_to_bs_out[2]),
        .I(data_from_pins[4]),
        .IB(data_from_pins[5]),
        .LPRX_DISABLE(1'b0),
        .LPRX_O_N(lp_rx_o_n[2]),
        .LPRX_O_P(lp_rx_o_p[2]));
  (* box_type = "PRIMITIVE" *) 
  IBUFDS_DPHY #(
    .SIM_DEVICE("ULTRASCALE_PLUS")) 
    \io_gen[6].ibufds_dphy 
       (.HSRX_DISABLE(hs_rx_disable[3]),
        .HSRX_O(data_to_bs_out[3]),
        .I(data_from_pins[6]),
        .IB(data_from_pins[7]),
        .LPRX_DISABLE(1'b0),
        .LPRX_O_N(lp_rx_o_n[3]),
        .LPRX_O_P(lp_rx_o_p[3]));
  (* box_type = "PRIMITIVE" *) 
  IBUFDS_DPHY #(
    .SIM_DEVICE("ULTRASCALE_PLUS")) 
    \io_gen[8].ibufds_dphy 
       (.HSRX_DISABLE(hs_rx_disable[4]),
        .HSRX_O(data_to_bs_out[4]),
        .I(data_from_pins[8]),
        .IB(data_from_pins[9]),
        .LPRX_DISABLE(1'b0),
        .LPRX_O_N(lp_rx_o_n[4]),
        .LPRX_O_P(lp_rx_o_p[4]));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_support
   (rxbyteclkhs,
    dl0_rxdatahs,
    dl0_rxvalidhs,
    dl0_rxactivehs,
    dl0_rxsynchs,
    dl0_stopstate,
    dl0_errsoths,
    dl0_errsotsynchs,
    dl1_rxdatahs,
    dl1_rxvalidhs,
    dl1_rxactivehs,
    dl1_rxsynchs,
    dl1_stopstate,
    dl1_errsoths,
    dl1_errsotsynchs,
    dl2_rxdatahs,
    dl2_rxvalidhs,
    dl2_rxactivehs,
    dl2_rxsynchs,
    dl2_stopstate,
    dl2_errsoths,
    dl2_errsotsynchs,
    dl3_rxdatahs,
    dl3_rxvalidhs,
    dl3_rxactivehs,
    dl3_rxsynchs,
    dl3_stopstate,
    dl3_errsoths,
    dl3_errsotsynchs,
    cl_stopstate,
    s_axi_awready,
    s_axi_arready,
    s_axi_wready,
    s_axi_rdata,
    s_axi_rvalid,
    s_axi_bvalid,
    clk_rxp,
    clk_rxn,
    data_rxp,
    data_rxn,
    core_rst,
    core_clk,
    cl_enable,
    s_axi_aresetn,
    s_axi_awaddr,
    s_axi_awvalid,
    s_axi_araddr,
    s_axi_arvalid,
    s_axi_wdata,
    s_axi_wvalid,
    s_axi_rready,
    s_axi_bready);
  output rxbyteclkhs;
  output [7:0]dl0_rxdatahs;
  output dl0_rxvalidhs;
  output dl0_rxactivehs;
  output dl0_rxsynchs;
  output dl0_stopstate;
  output dl0_errsoths;
  output dl0_errsotsynchs;
  output [7:0]dl1_rxdatahs;
  output dl1_rxvalidhs;
  output dl1_rxactivehs;
  output dl1_rxsynchs;
  output dl1_stopstate;
  output dl1_errsoths;
  output dl1_errsotsynchs;
  output [7:0]dl2_rxdatahs;
  output dl2_rxvalidhs;
  output dl2_rxactivehs;
  output dl2_rxsynchs;
  output dl2_stopstate;
  output dl2_errsoths;
  output dl2_errsotsynchs;
  output [7:0]dl3_rxdatahs;
  output dl3_rxvalidhs;
  output dl3_rxactivehs;
  output dl3_rxsynchs;
  output dl3_stopstate;
  output dl3_errsoths;
  output dl3_errsotsynchs;
  output cl_stopstate;
  output s_axi_awready;
  output s_axi_arready;
  output s_axi_wready;
  output [31:0]s_axi_rdata;
  output s_axi_rvalid;
  output s_axi_bvalid;
  input clk_rxp;
  input clk_rxn;
  input [3:0]data_rxp;
  input [3:0]data_rxn;
  input core_rst;
  input core_clk;
  input cl_enable;
  input s_axi_aresetn;
  input [4:0]s_axi_awaddr;
  input s_axi_awvalid;
  input [4:0]s_axi_araddr;
  input s_axi_arvalid;
  input [31:0]s_axi_wdata;
  input s_axi_wvalid;
  input s_axi_rready;
  input s_axi_bready;

  wire bit_slc_rst_w;
  wire cl_enable;
  wire cl_enable_sync;
  wire cl_stopstate;
  wire clk_rxn;
  wire clk_rxp;
  wire core_clk;
  wire core_ref_clk_w;
  wire core_rst;
  wire core_rst_coreclk_sync;
  wire [3:0]data_rxn;
  wire [3:0]data_rxp;
  wire div4_clk_t;
  wire dl0_errsoths;
  wire dl0_errsotsynchs;
  wire dl0_rxactivehs;
  wire [7:0]dl0_rxdatahs;
  wire dl0_rxsynchs;
  wire dl0_rxvalidhs;
  wire dl0_stopstate;
  wire dl1_errsoths;
  wire dl1_errsotsynchs;
  wire dl1_rxactivehs;
  wire [7:0]dl1_rxdatahs;
  wire dl1_rxsynchs;
  wire dl1_rxvalidhs;
  wire dl1_stopstate;
  wire dl2_errsoths;
  wire dl2_errsotsynchs;
  wire dl2_rxactivehs;
  wire [7:0]dl2_rxdatahs;
  wire dl2_rxsynchs;
  wire dl2_rxvalidhs;
  wire dl2_stopstate;
  wire dl3_errsoths;
  wire dl3_errsotsynchs;
  wire dl3_rxactivehs;
  wire [7:0]dl3_rxdatahs;
  wire dl3_rxsynchs;
  wire dl3_rxvalidhs;
  wire dl3_stopstate;
  wire dphy_en_w;
  wire dphy_srst_w;
  wire phy_rdy_out;
  wire phy_reset_w;
  wire rx_cl_disable_ibuf_w;
  wire rx_dl0_disable_ibuf_w;
  wire rx_dl0_fifo_empty_w;
  wire [7:0]rx_dl0_hs_dp_w;
  wire rx_dl0_lp_dn_w;
  wire rx_dl0_lp_dp_w;
  wire rx_dl1_disable_ibuf_w;
  wire rx_dl1_fifo_empty_w;
  wire [7:0]rx_dl1_hs_dp_w;
  wire rx_dl1_lp_dn_w;
  wire rx_dl1_lp_dp_w;
  wire rx_dl2_disable_ibuf_w;
  wire rx_dl2_fifo_empty_w;
  wire [7:0]rx_dl2_hs_dp_w;
  wire rx_dl2_lp_dn_w;
  wire rx_dl2_lp_dp_w;
  wire rx_dl3_disable_ibuf_w;
  wire rx_dl3_fifo_empty_w;
  wire [7:0]rx_dl3_hs_dp_w;
  wire rx_dl3_lp_dn_w;
  wire rx_dl3_lp_dp_w;
  wire rxbyteclkhs;
  wire [4:0]s_axi_araddr;
  wire s_axi_aresetn;
  wire s_axi_arready;
  wire s_axi_arvalid;
  wire [4:0]s_axi_awaddr;
  wire s_axi_awready;
  wire s_axi_awvalid;
  wire s_axi_bready;
  wire s_axi_bvalid;
  wire [31:0]s_axi_rdata;
  wire s_axi_rready;
  wire s_axi_rvalid;
  wire [31:0]s_axi_wdata;
  wire s_axi_wready;
  wire s_axi_wvalid;
  wire \slave_rx.bd_7289_phy_0_rx_hssio_i_i_1_n_0 ;
  wire \slave_rx.bd_7289_phy_0_rx_hssio_i_i_2_n_0 ;
  wire \slave_rx.bd_7289_phy_0_rx_hssio_i_i_3_n_0 ;
  wire \slave_rx.bd_7289_phy_0_rx_hssio_i_i_4_n_0 ;
  wire \slave_rx.bd_7289_phy_0_rx_hssio_i_n_4 ;
  wire \slave_rx.bd_7289_phy_0_rx_hssio_i_n_9 ;
  wire \slave_rx.u_rx_rst_logic_n_6 ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_dly_rdy_bsc0_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_dly_rdy_bsc1_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_0_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_1_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_3_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_5_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_7_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_9_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_pll0_clkout0_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_pll0_locked_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_shared_pll0_clkoutphy_out_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_vtc_rdy_bsc0_UNCONNECTED ;
  wire \NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_vtc_rdy_bsc1_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_clk_rxn_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_clk_rxp_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_data_rxn0_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_data_rxn1_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_data_rxn2_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_data_rxn3_UNCONNECTED ;
  wire \NLW_slave_rx.cl_enable_sync_support_i_prmry_ack_UNCONNECTED ;
  wire [1:0]\NLW_slave_rx.cl_enable_sync_support_i_scndry_vect_out_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_calib_status_l0_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_calib_status_l1_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_calib_status_l2_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_calib_status_l3_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_cl_rxclkactivehs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_cl_rxulpsclknot_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_cl_ulpsactivenot_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl0_errcontrol_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl0_erresc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl0_errsyncesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl0_rxclkesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl0_rxlpdtesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl0_rxskewcalhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl0_rxulpsesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl0_rxvalidesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl0_ulpsactivenot_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl1_errcontrol_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl1_erresc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl1_errsyncesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl1_rxclkesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl1_rxlpdtesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl1_rxskewcalhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl1_rxulpsesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl1_rxvalidesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl1_ulpsactivenot_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl2_errcontrol_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl2_erresc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl2_errsyncesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl2_rxclkesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl2_rxlpdtesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl2_rxskewcalhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl2_rxulpsesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl2_rxvalidesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl2_ulpsactivenot_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl3_errcontrol_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl3_erresc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl3_errsyncesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl3_rxclkesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl3_rxlpdtesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl3_rxskewcalhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl3_rxulpsesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl3_rxvalidesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl3_ulpsactivenot_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_errcontrol_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_erresc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_errsoths_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_errsotsynchs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_errsyncesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_rxactivehs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_rxclkesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_rxlpdtesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_rxskewcalhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_rxsynchs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_rxulpsesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_rxvalidesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_rxvalidhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_stopstate_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl4_ulpsactivenot_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_errcontrol_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_erresc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_errsoths_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_errsotsynchs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_errsyncesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_rxactivehs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_rxclkesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_rxlpdtesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_rxskewcalhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_rxsynchs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_rxulpsesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_rxvalidesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_rxvalidhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_stopstate_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl5_ulpsactivenot_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_errcontrol_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_erresc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_errsoths_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_errsotsynchs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_errsyncesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_rxactivehs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_rxclkesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_rxlpdtesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_rxskewcalhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_rxsynchs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_rxulpsesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_rxvalidesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_rxvalidhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_stopstate_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl6_ulpsactivenot_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_errcontrol_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_erresc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_errsoths_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_errsotsynchs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_errsyncesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_rxactivehs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_rxclkesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_rxlpdtesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_rxskewcalhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_rxsynchs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_rxulpsesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_rxvalidesc_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_rxvalidhs_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_stopstate_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_dl7_ulpsactivenot_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_idelay_load_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_init_done_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_phy_rst_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_reg_cal_start_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_riu_nibble_sel_l0_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_riu_nibble_sel_l1_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_riu_nibble_sel_l2_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_riu_nibble_sel_l3_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_riu_wr_en_l0_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_riu_wr_en_l1_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_riu_wr_en_l2_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_riu_wr_en_l3_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_cl_en_hs_lpn_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_cl_fifo_rd_clk_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_cl_fifo_rd_en_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl0_en_hs_lpn_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl0_fifo_rd_clk_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl0_fifo_rd_en_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl1_en_hs_lpn_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl1_fifo_rd_clk_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl1_fifo_rd_en_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl2_en_hs_lpn_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl2_fifo_rd_clk_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl2_fifo_rd_en_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl3_en_hs_lpn_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl3_fifo_rd_clk_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl3_fifo_rd_en_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl4_disable_ibuf_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl4_en_hs_lpn_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl4_fifo_rd_clk_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl4_fifo_rd_en_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl5_disable_ibuf_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl5_en_hs_lpn_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl5_fifo_rd_clk_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl5_fifo_rd_en_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl6_disable_ibuf_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl6_en_hs_lpn_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl6_fifo_rd_clk_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl6_fifo_rd_en_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl7_disable_ibuf_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl7_en_hs_lpn_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl7_fifo_rd_clk_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_rx_dl7_fifo_rd_en_UNCONNECTED ;
  wire \NLW_slave_rx.dphy_rx_fab_top_sys_rst_byteclk_out_UNCONNECTED ;
  wire [3:0]\NLW_slave_rx.dphy_rx_fab_top_alt_skew_calb_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl0_rxdataesc_UNCONNECTED ;
  wire [3:0]\NLW_slave_rx.dphy_rx_fab_top_dl0_rxtriggeresc_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl1_rxdataesc_UNCONNECTED ;
  wire [3:0]\NLW_slave_rx.dphy_rx_fab_top_dl1_rxtriggeresc_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl2_rxdataesc_UNCONNECTED ;
  wire [3:0]\NLW_slave_rx.dphy_rx_fab_top_dl2_rxtriggeresc_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl3_rxdataesc_UNCONNECTED ;
  wire [3:0]\NLW_slave_rx.dphy_rx_fab_top_dl3_rxtriggeresc_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl4_rxdataesc_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl4_rxdatahs_UNCONNECTED ;
  wire [3:0]\NLW_slave_rx.dphy_rx_fab_top_dl4_rxtriggeresc_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl5_rxdataesc_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl5_rxdatahs_UNCONNECTED ;
  wire [3:0]\NLW_slave_rx.dphy_rx_fab_top_dl5_rxtriggeresc_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl6_rxdataesc_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl6_rxdatahs_UNCONNECTED ;
  wire [3:0]\NLW_slave_rx.dphy_rx_fab_top_dl6_rxtriggeresc_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl7_rxdataesc_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_dl7_rxdatahs_UNCONNECTED ;
  wire [3:0]\NLW_slave_rx.dphy_rx_fab_top_dl7_rxtriggeresc_UNCONNECTED ;
  wire [8:0]\NLW_slave_rx.dphy_rx_fab_top_idelay_tap_value_UNCONNECTED ;
  wire [3:0]\NLW_slave_rx.dphy_rx_fab_top_init_periodic_skew_calb_UNCONNECTED ;
  wire [5:0]\NLW_slave_rx.dphy_rx_fab_top_riu_addr_l0_UNCONNECTED ;
  wire [5:0]\NLW_slave_rx.dphy_rx_fab_top_riu_addr_l1_UNCONNECTED ;
  wire [5:0]\NLW_slave_rx.dphy_rx_fab_top_riu_addr_l2_UNCONNECTED ;
  wire [5:0]\NLW_slave_rx.dphy_rx_fab_top_riu_addr_l3_UNCONNECTED ;
  wire [15:0]\NLW_slave_rx.dphy_rx_fab_top_riu_wr_data_l0_UNCONNECTED ;
  wire [15:0]\NLW_slave_rx.dphy_rx_fab_top_riu_wr_data_l1_UNCONNECTED ;
  wire [15:0]\NLW_slave_rx.dphy_rx_fab_top_riu_wr_data_l2_UNCONNECTED ;
  wire [15:0]\NLW_slave_rx.dphy_rx_fab_top_riu_wr_data_l3_UNCONNECTED ;
  wire [1:0]\NLW_slave_rx.dphy_rx_fab_top_s_axi_bresp_UNCONNECTED ;
  wire [1:0]\NLW_slave_rx.dphy_rx_fab_top_s_axi_rresp_UNCONNECTED ;
  wire [7:0]\NLW_slave_rx.dphy_rx_fab_top_tap_comp_res_UNCONNECTED ;
  wire [63:0]\NLW_slave_rx.dphy_rx_fab_top_tap_val_dyn_out_UNCONNECTED ;
  wire \NLW_slave_rx.u_rx_rst_logic_mmcm_rst_UNCONNECTED ;
  wire \NLW_slave_rx.u_rx_rst_logic_system_rst_byteclk_UNCONNECTED ;
  wire \NLW_slave_rx.u_rx_rst_logic_system_rst_div4clk_UNCONNECTED ;
  wire \NLW_slave_rx.u_rx_rst_logic_system_rst_escclk_UNCONNECTED ;
  wire \NLW_slave_rx.u_rx_rst_logic_txpll_rst_UNCONNECTED ;

  (* CHECK_LICENSE_TYPE = "bd_7289_phy_0_hssio_rx,bd_7289_phy_0_hssio_rx_high_speed_selectio_wiz_v3_6_10,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "bd_7289_phy_0_hssio_rx_high_speed_selectio_wiz_v3_6_10,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_phy_0_hssio_rx \slave_rx.bd_7289_phy_0_rx_hssio_i 
       (.bs_rst_dphy_in(bit_slc_rst_w),
        .clk(1'b0),
        .clk_rxn(clk_rxn),
        .clk_rxp(clk_rxp),
        .data_rxn0(data_rxn[0]),
        .data_rxn1(data_rxn[1]),
        .data_rxn2(data_rxn[2]),
        .data_rxn3(data_rxn[3]),
        .data_rxp0(data_rxp[0]),
        .data_rxp1(data_rxp[1]),
        .data_rxp2(data_rxp[2]),
        .data_rxp3(data_rxp[3]),
        .data_to_fabric_clk_rxn(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_clk_rxn_UNCONNECTED [7:0]),
        .data_to_fabric_clk_rxp(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_clk_rxp_UNCONNECTED [7:0]),
        .data_to_fabric_data_rxn0(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_data_rxn0_UNCONNECTED [7:0]),
        .data_to_fabric_data_rxn1(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_data_rxn1_UNCONNECTED [7:0]),
        .data_to_fabric_data_rxn2(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_data_rxn2_UNCONNECTED [7:0]),
        .data_to_fabric_data_rxn3(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_data_to_fabric_data_rxn3_UNCONNECTED [7:0]),
        .data_to_fabric_data_rxp0(rx_dl0_hs_dp_w),
        .data_to_fabric_data_rxp1(rx_dl1_hs_dp_w),
        .data_to_fabric_data_rxp2(rx_dl2_hs_dp_w),
        .data_to_fabric_data_rxp3(rx_dl3_hs_dp_w),
        .dly_rdy_bsc0(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_dly_rdy_bsc0_UNCONNECTED ),
        .dly_rdy_bsc1(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_dly_rdy_bsc1_UNCONNECTED ),
        .en_vtc_bsc0(1'b1),
        .en_vtc_bsc1(1'b1),
        .fifo_empty_0(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_0_UNCONNECTED ),
        .fifo_empty_1(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_1_UNCONNECTED ),
        .fifo_empty_2(rx_dl0_fifo_empty_w),
        .fifo_empty_3(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_3_UNCONNECTED ),
        .fifo_empty_4(rx_dl1_fifo_empty_w),
        .fifo_empty_5(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_5_UNCONNECTED ),
        .fifo_empty_6(rx_dl2_fifo_empty_w),
        .fifo_empty_7(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_7_UNCONNECTED ),
        .fifo_empty_8(rx_dl3_fifo_empty_w),
        .fifo_empty_9(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_fifo_empty_9_UNCONNECTED ),
        .fifo_rd_clk_0(rxbyteclkhs),
        .fifo_rd_clk_1(1'b0),
        .fifo_rd_clk_2(1'b0),
        .fifo_rd_clk_3(1'b0),
        .fifo_rd_clk_4(1'b0),
        .fifo_rd_clk_5(1'b0),
        .fifo_rd_clk_6(1'b0),
        .fifo_rd_clk_7(1'b0),
        .fifo_rd_clk_8(1'b0),
        .fifo_rd_clk_9(1'b0),
        .fifo_rd_en_0(1'b1),
        .fifo_rd_en_1(1'b1),
        .fifo_rd_en_2(\slave_rx.bd_7289_phy_0_rx_hssio_i_i_1_n_0 ),
        .fifo_rd_en_3(1'b0),
        .fifo_rd_en_4(\slave_rx.bd_7289_phy_0_rx_hssio_i_i_2_n_0 ),
        .fifo_rd_en_5(1'b0),
        .fifo_rd_en_6(\slave_rx.bd_7289_phy_0_rx_hssio_i_i_3_n_0 ),
        .fifo_rd_en_7(1'b0),
        .fifo_rd_en_8(\slave_rx.bd_7289_phy_0_rx_hssio_i_i_4_n_0 ),
        .fifo_rd_en_9(1'b0),
        .fifo_wr_clk_0(div4_clk_t),
        .hs_rx_disable({rx_dl3_disable_ibuf_w,rx_dl2_disable_ibuf_w,rx_dl1_disable_ibuf_w,rx_dl0_disable_ibuf_w,rx_cl_disable_ibuf_w}),
        .lp_rx_disable({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .lp_rx_o_n({rx_dl3_lp_dn_w,rx_dl2_lp_dn_w,rx_dl1_lp_dn_w,rx_dl0_lp_dn_w,\slave_rx.bd_7289_phy_0_rx_hssio_i_n_9 }),
        .lp_rx_o_p({rx_dl3_lp_dp_w,rx_dl2_lp_dp_w,rx_dl1_lp_dp_w,rx_dl0_lp_dp_w,\slave_rx.bd_7289_phy_0_rx_hssio_i_n_4 }),
        .pll0_clkout0(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_pll0_clkout0_UNCONNECTED ),
        .pll0_locked(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_pll0_locked_UNCONNECTED ),
        .riu_clk(core_ref_clk_w),
        .rst(phy_reset_w),
        .rst_seq_done(phy_rdy_out),
        .shared_pll0_clkoutphy_out(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_shared_pll0_clkoutphy_out_UNCONNECTED ),
        .vtc_rdy_bsc0(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_vtc_rdy_bsc0_UNCONNECTED ),
        .vtc_rdy_bsc1(\NLW_slave_rx.bd_7289_phy_0_rx_hssio_i_vtc_rdy_bsc1_UNCONNECTED ));
  LUT1 #(
    .INIT(2'h1)) 
    \slave_rx.bd_7289_phy_0_rx_hssio_i_i_1 
       (.I0(rx_dl0_fifo_empty_w),
        .O(\slave_rx.bd_7289_phy_0_rx_hssio_i_i_1_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \slave_rx.bd_7289_phy_0_rx_hssio_i_i_2 
       (.I0(rx_dl1_fifo_empty_w),
        .O(\slave_rx.bd_7289_phy_0_rx_hssio_i_i_2_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \slave_rx.bd_7289_phy_0_rx_hssio_i_i_3 
       (.I0(rx_dl2_fifo_empty_w),
        .O(\slave_rx.bd_7289_phy_0_rx_hssio_i_i_3_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \slave_rx.bd_7289_phy_0_rx_hssio_i_i_4 
       (.I0(rx_dl3_fifo_empty_w),
        .O(\slave_rx.bd_7289_phy_0_rx_hssio_i_i_4_n_0 ));
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* c_cdc_type = "2'b01" *) 
  (* c_flop_input = "1'b0" *) 
  (* c_mtbf_stages = "3" *) 
  (* c_reset_state = "1'b1" *) 
  (* c_single_bit = "1'b1" *) 
  (* c_vector_width = "8'b00000010" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_mipi_dphy_v4_3_13_rx_sync_cell \slave_rx.cl_enable_sync_support_i 
       (.prmry_ack(\NLW_slave_rx.cl_enable_sync_support_i_prmry_ack_UNCONNECTED ),
        .prmry_aclk(1'b0),
        .prmry_in(cl_enable),
        .prmry_rst_n(1'b1),
        .prmry_vect_in({1'b0,1'b0}),
        .scndry_aclk(core_clk),
        .scndry_out(cl_enable_sync),
        .scndry_rst_n(1'b1),
        .scndry_vect_out(\NLW_slave_rx.cl_enable_sync_support_i_scndry_vect_out_UNCONNECTED [1:0]));
  (* BYTE_UI = "6" *) 
  (* CL_ACTIVE_BYTE_UI = "1" *) 
  (* C_CAL_MODE = "FIXED" *) 
  (* C_CLK_PREPARE_VAL = "40" *) 
  (* C_CLK_SETTLE_VAL = "95" *) 
  (* C_CLK_TERMEN_VAL = "38" *) 
  (* C_CLK_ZERO_VAL = "205" *) 
  (* C_COMP_CYCLES = "5" *) 
  (* C_DPHY_LANES = "4" *) 
  (* C_DPHY_MODE = "SLAVE" *) 
  (* C_D_TERMEN_VAL = "35" *) 
  (* C_EN_DEBUG_REGS = "0" *) 
  (* C_EN_EXT_TAP = "0" *) 
  (* C_EN_REGISTER = "1" *) 
  (* C_EN_TIMEOUT_REGS = "0" *) 
  (* C_EN_ULPS_WAKEUP_CNT = "FALSE" *) 
  (* C_ESC_TIMEOUT = "25600" *) 
  (* C_HS_LINE_RATE = "1188" *) 
  (* C_HS_RX_TIMEOUT = "65541" *) 
  (* C_HS_SETTLE_VAL = "143" *) 
  (* C_HS_SKIP_VAL = "40" *) 
  (* C_IDLY_TAP = "0" *) 
  (* C_INIT = "100000" *) 
  (* C_IO_ADDR = "8'b00010100" *) 
  (* C_IS_7SERIES = "FALSE" *) 
  (* C_LPX_PERIOD = "50" *) 
  (* C_NO_INCR_TAPS = "2" *) 
  (* C_RCVE_ALT_DESKEW_SEQ = "false" *) 
  (* C_RCVE_DESKEW_SEQ = "false" *) 
  (* C_STABLE_CLK_PERIOD = "5.000000" *) 
  (* C_UI_IN_TAPS = "64" *) 
  (* C_WAKEUP = "1000" *) 
  (* DPHY_PRESET = "CSI2RX_XLNX" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* INIT_TIMEOUT_L = "19998" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* LPX_PERIOD_MIN = "25" *) 
  (* LP_STATE_CNT = "2" *) 
  (* MTBF_SYNC_STAGES = "3" *) 
  (* RESET_PULSE_EXTN = "4'b0001" *) 
  (* SETTLE_TIMEOUT_L = "24" *) 
  (* SUPPORT_LEVEL = "1" *) 
  (* UI10_VAL = "8" *) 
  (* UI_VAL = "841" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_mipi_dphy_v4_3_13_rx_fab_top \slave_rx.dphy_rx_fab_top 
       (.alt_skew_calb(\NLW_slave_rx.dphy_rx_fab_top_alt_skew_calb_UNCONNECTED [3:0]),
        .bit_slc_rst(bit_slc_rst_w),
        .cal_done(1'b0),
        .cal_pass(1'b0),
        .calib_status_l0(\NLW_slave_rx.dphy_rx_fab_top_calib_status_l0_UNCONNECTED ),
        .calib_status_l1(\NLW_slave_rx.dphy_rx_fab_top_calib_status_l1_UNCONNECTED ),
        .calib_status_l2(\NLW_slave_rx.dphy_rx_fab_top_calib_status_l2_UNCONNECTED ),
        .calib_status_l3(\NLW_slave_rx.dphy_rx_fab_top_calib_status_l3_UNCONNECTED ),
        .cl_enable(cl_enable_sync),
        .cl_rxclkactivehs(\NLW_slave_rx.dphy_rx_fab_top_cl_rxclkactivehs_UNCONNECTED ),
        .cl_rxulpsclknot(\NLW_slave_rx.dphy_rx_fab_top_cl_rxulpsclknot_UNCONNECTED ),
        .cl_stopstate(cl_stopstate),
        .cl_ulpsactivenot(\NLW_slave_rx.dphy_rx_fab_top_cl_ulpsactivenot_UNCONNECTED ),
        .clk_200m(1'b0),
        .core_clk(core_clk),
        .core_ref_clk(core_ref_clk_w),
        .core_rst(core_rst_coreclk_sync),
        .dl0_enable(1'b0),
        .dl0_errcontrol(\NLW_slave_rx.dphy_rx_fab_top_dl0_errcontrol_UNCONNECTED ),
        .dl0_erresc(\NLW_slave_rx.dphy_rx_fab_top_dl0_erresc_UNCONNECTED ),
        .dl0_errsoths(dl0_errsoths),
        .dl0_errsotsynchs(dl0_errsotsynchs),
        .dl0_errsyncesc(\NLW_slave_rx.dphy_rx_fab_top_dl0_errsyncesc_UNCONNECTED ),
        .dl0_forcerxmode(1'b0),
        .dl0_rxactivehs(dl0_rxactivehs),
        .dl0_rxclkesc(\NLW_slave_rx.dphy_rx_fab_top_dl0_rxclkesc_UNCONNECTED ),
        .dl0_rxdataesc(\NLW_slave_rx.dphy_rx_fab_top_dl0_rxdataesc_UNCONNECTED [7:0]),
        .dl0_rxdatahs(dl0_rxdatahs),
        .dl0_rxlpdtesc(\NLW_slave_rx.dphy_rx_fab_top_dl0_rxlpdtesc_UNCONNECTED ),
        .dl0_rxskewcalhs(\NLW_slave_rx.dphy_rx_fab_top_dl0_rxskewcalhs_UNCONNECTED ),
        .dl0_rxsynchs(dl0_rxsynchs),
        .dl0_rxtriggeresc(\NLW_slave_rx.dphy_rx_fab_top_dl0_rxtriggeresc_UNCONNECTED [3:0]),
        .dl0_rxulpsesc(\NLW_slave_rx.dphy_rx_fab_top_dl0_rxulpsesc_UNCONNECTED ),
        .dl0_rxvalidesc(\NLW_slave_rx.dphy_rx_fab_top_dl0_rxvalidesc_UNCONNECTED ),
        .dl0_rxvalidhs(dl0_rxvalidhs),
        .dl0_stopstate(dl0_stopstate),
        .dl0_ulpsactivenot(\NLW_slave_rx.dphy_rx_fab_top_dl0_ulpsactivenot_UNCONNECTED ),
        .dl1_enable(1'b0),
        .dl1_errcontrol(\NLW_slave_rx.dphy_rx_fab_top_dl1_errcontrol_UNCONNECTED ),
        .dl1_erresc(\NLW_slave_rx.dphy_rx_fab_top_dl1_erresc_UNCONNECTED ),
        .dl1_errsoths(dl1_errsoths),
        .dl1_errsotsynchs(dl1_errsotsynchs),
        .dl1_errsyncesc(\NLW_slave_rx.dphy_rx_fab_top_dl1_errsyncesc_UNCONNECTED ),
        .dl1_forcerxmode(1'b0),
        .dl1_rxactivehs(dl1_rxactivehs),
        .dl1_rxclkesc(\NLW_slave_rx.dphy_rx_fab_top_dl1_rxclkesc_UNCONNECTED ),
        .dl1_rxdataesc(\NLW_slave_rx.dphy_rx_fab_top_dl1_rxdataesc_UNCONNECTED [7:0]),
        .dl1_rxdatahs(dl1_rxdatahs),
        .dl1_rxlpdtesc(\NLW_slave_rx.dphy_rx_fab_top_dl1_rxlpdtesc_UNCONNECTED ),
        .dl1_rxskewcalhs(\NLW_slave_rx.dphy_rx_fab_top_dl1_rxskewcalhs_UNCONNECTED ),
        .dl1_rxsynchs(dl1_rxsynchs),
        .dl1_rxtriggeresc(\NLW_slave_rx.dphy_rx_fab_top_dl1_rxtriggeresc_UNCONNECTED [3:0]),
        .dl1_rxulpsesc(\NLW_slave_rx.dphy_rx_fab_top_dl1_rxulpsesc_UNCONNECTED ),
        .dl1_rxvalidesc(\NLW_slave_rx.dphy_rx_fab_top_dl1_rxvalidesc_UNCONNECTED ),
        .dl1_rxvalidhs(dl1_rxvalidhs),
        .dl1_stopstate(dl1_stopstate),
        .dl1_ulpsactivenot(\NLW_slave_rx.dphy_rx_fab_top_dl1_ulpsactivenot_UNCONNECTED ),
        .dl2_enable(1'b0),
        .dl2_errcontrol(\NLW_slave_rx.dphy_rx_fab_top_dl2_errcontrol_UNCONNECTED ),
        .dl2_erresc(\NLW_slave_rx.dphy_rx_fab_top_dl2_erresc_UNCONNECTED ),
        .dl2_errsoths(dl2_errsoths),
        .dl2_errsotsynchs(dl2_errsotsynchs),
        .dl2_errsyncesc(\NLW_slave_rx.dphy_rx_fab_top_dl2_errsyncesc_UNCONNECTED ),
        .dl2_forcerxmode(1'b0),
        .dl2_rxactivehs(dl2_rxactivehs),
        .dl2_rxclkesc(\NLW_slave_rx.dphy_rx_fab_top_dl2_rxclkesc_UNCONNECTED ),
        .dl2_rxdataesc(\NLW_slave_rx.dphy_rx_fab_top_dl2_rxdataesc_UNCONNECTED [7:0]),
        .dl2_rxdatahs(dl2_rxdatahs),
        .dl2_rxlpdtesc(\NLW_slave_rx.dphy_rx_fab_top_dl2_rxlpdtesc_UNCONNECTED ),
        .dl2_rxskewcalhs(\NLW_slave_rx.dphy_rx_fab_top_dl2_rxskewcalhs_UNCONNECTED ),
        .dl2_rxsynchs(dl2_rxsynchs),
        .dl2_rxtriggeresc(\NLW_slave_rx.dphy_rx_fab_top_dl2_rxtriggeresc_UNCONNECTED [3:0]),
        .dl2_rxulpsesc(\NLW_slave_rx.dphy_rx_fab_top_dl2_rxulpsesc_UNCONNECTED ),
        .dl2_rxvalidesc(\NLW_slave_rx.dphy_rx_fab_top_dl2_rxvalidesc_UNCONNECTED ),
        .dl2_rxvalidhs(dl2_rxvalidhs),
        .dl2_stopstate(dl2_stopstate),
        .dl2_ulpsactivenot(\NLW_slave_rx.dphy_rx_fab_top_dl2_ulpsactivenot_UNCONNECTED ),
        .dl3_enable(1'b0),
        .dl3_errcontrol(\NLW_slave_rx.dphy_rx_fab_top_dl3_errcontrol_UNCONNECTED ),
        .dl3_erresc(\NLW_slave_rx.dphy_rx_fab_top_dl3_erresc_UNCONNECTED ),
        .dl3_errsoths(dl3_errsoths),
        .dl3_errsotsynchs(dl3_errsotsynchs),
        .dl3_errsyncesc(\NLW_slave_rx.dphy_rx_fab_top_dl3_errsyncesc_UNCONNECTED ),
        .dl3_forcerxmode(1'b0),
        .dl3_rxactivehs(dl3_rxactivehs),
        .dl3_rxclkesc(\NLW_slave_rx.dphy_rx_fab_top_dl3_rxclkesc_UNCONNECTED ),
        .dl3_rxdataesc(\NLW_slave_rx.dphy_rx_fab_top_dl3_rxdataesc_UNCONNECTED [7:0]),
        .dl3_rxdatahs(dl3_rxdatahs),
        .dl3_rxlpdtesc(\NLW_slave_rx.dphy_rx_fab_top_dl3_rxlpdtesc_UNCONNECTED ),
        .dl3_rxskewcalhs(\NLW_slave_rx.dphy_rx_fab_top_dl3_rxskewcalhs_UNCONNECTED ),
        .dl3_rxsynchs(dl3_rxsynchs),
        .dl3_rxtriggeresc(\NLW_slave_rx.dphy_rx_fab_top_dl3_rxtriggeresc_UNCONNECTED [3:0]),
        .dl3_rxulpsesc(\NLW_slave_rx.dphy_rx_fab_top_dl3_rxulpsesc_UNCONNECTED ),
        .dl3_rxvalidesc(\NLW_slave_rx.dphy_rx_fab_top_dl3_rxvalidesc_UNCONNECTED ),
        .dl3_rxvalidhs(dl3_rxvalidhs),
        .dl3_stopstate(dl3_stopstate),
        .dl3_ulpsactivenot(\NLW_slave_rx.dphy_rx_fab_top_dl3_ulpsactivenot_UNCONNECTED ),
        .dl4_enable(1'b0),
        .dl4_errcontrol(\NLW_slave_rx.dphy_rx_fab_top_dl4_errcontrol_UNCONNECTED ),
        .dl4_erresc(\NLW_slave_rx.dphy_rx_fab_top_dl4_erresc_UNCONNECTED ),
        .dl4_errsoths(\NLW_slave_rx.dphy_rx_fab_top_dl4_errsoths_UNCONNECTED ),
        .dl4_errsotsynchs(\NLW_slave_rx.dphy_rx_fab_top_dl4_errsotsynchs_UNCONNECTED ),
        .dl4_errsyncesc(\NLW_slave_rx.dphy_rx_fab_top_dl4_errsyncesc_UNCONNECTED ),
        .dl4_forcerxmode(1'b0),
        .dl4_rxactivehs(\NLW_slave_rx.dphy_rx_fab_top_dl4_rxactivehs_UNCONNECTED ),
        .dl4_rxclkesc(\NLW_slave_rx.dphy_rx_fab_top_dl4_rxclkesc_UNCONNECTED ),
        .dl4_rxdataesc(\NLW_slave_rx.dphy_rx_fab_top_dl4_rxdataesc_UNCONNECTED [7:0]),
        .dl4_rxdatahs(\NLW_slave_rx.dphy_rx_fab_top_dl4_rxdatahs_UNCONNECTED [7:0]),
        .dl4_rxlpdtesc(\NLW_slave_rx.dphy_rx_fab_top_dl4_rxlpdtesc_UNCONNECTED ),
        .dl4_rxskewcalhs(\NLW_slave_rx.dphy_rx_fab_top_dl4_rxskewcalhs_UNCONNECTED ),
        .dl4_rxsynchs(\NLW_slave_rx.dphy_rx_fab_top_dl4_rxsynchs_UNCONNECTED ),
        .dl4_rxtriggeresc(\NLW_slave_rx.dphy_rx_fab_top_dl4_rxtriggeresc_UNCONNECTED [3:0]),
        .dl4_rxulpsesc(\NLW_slave_rx.dphy_rx_fab_top_dl4_rxulpsesc_UNCONNECTED ),
        .dl4_rxvalidesc(\NLW_slave_rx.dphy_rx_fab_top_dl4_rxvalidesc_UNCONNECTED ),
        .dl4_rxvalidhs(\NLW_slave_rx.dphy_rx_fab_top_dl4_rxvalidhs_UNCONNECTED ),
        .dl4_stopstate(\NLW_slave_rx.dphy_rx_fab_top_dl4_stopstate_UNCONNECTED ),
        .dl4_ulpsactivenot(\NLW_slave_rx.dphy_rx_fab_top_dl4_ulpsactivenot_UNCONNECTED ),
        .dl5_enable(1'b0),
        .dl5_errcontrol(\NLW_slave_rx.dphy_rx_fab_top_dl5_errcontrol_UNCONNECTED ),
        .dl5_erresc(\NLW_slave_rx.dphy_rx_fab_top_dl5_erresc_UNCONNECTED ),
        .dl5_errsoths(\NLW_slave_rx.dphy_rx_fab_top_dl5_errsoths_UNCONNECTED ),
        .dl5_errsotsynchs(\NLW_slave_rx.dphy_rx_fab_top_dl5_errsotsynchs_UNCONNECTED ),
        .dl5_errsyncesc(\NLW_slave_rx.dphy_rx_fab_top_dl5_errsyncesc_UNCONNECTED ),
        .dl5_forcerxmode(1'b0),
        .dl5_rxactivehs(\NLW_slave_rx.dphy_rx_fab_top_dl5_rxactivehs_UNCONNECTED ),
        .dl5_rxclkesc(\NLW_slave_rx.dphy_rx_fab_top_dl5_rxclkesc_UNCONNECTED ),
        .dl5_rxdataesc(\NLW_slave_rx.dphy_rx_fab_top_dl5_rxdataesc_UNCONNECTED [7:0]),
        .dl5_rxdatahs(\NLW_slave_rx.dphy_rx_fab_top_dl5_rxdatahs_UNCONNECTED [7:0]),
        .dl5_rxlpdtesc(\NLW_slave_rx.dphy_rx_fab_top_dl5_rxlpdtesc_UNCONNECTED ),
        .dl5_rxskewcalhs(\NLW_slave_rx.dphy_rx_fab_top_dl5_rxskewcalhs_UNCONNECTED ),
        .dl5_rxsynchs(\NLW_slave_rx.dphy_rx_fab_top_dl5_rxsynchs_UNCONNECTED ),
        .dl5_rxtriggeresc(\NLW_slave_rx.dphy_rx_fab_top_dl5_rxtriggeresc_UNCONNECTED [3:0]),
        .dl5_rxulpsesc(\NLW_slave_rx.dphy_rx_fab_top_dl5_rxulpsesc_UNCONNECTED ),
        .dl5_rxvalidesc(\NLW_slave_rx.dphy_rx_fab_top_dl5_rxvalidesc_UNCONNECTED ),
        .dl5_rxvalidhs(\NLW_slave_rx.dphy_rx_fab_top_dl5_rxvalidhs_UNCONNECTED ),
        .dl5_stopstate(\NLW_slave_rx.dphy_rx_fab_top_dl5_stopstate_UNCONNECTED ),
        .dl5_ulpsactivenot(\NLW_slave_rx.dphy_rx_fab_top_dl5_ulpsactivenot_UNCONNECTED ),
        .dl6_enable(1'b0),
        .dl6_errcontrol(\NLW_slave_rx.dphy_rx_fab_top_dl6_errcontrol_UNCONNECTED ),
        .dl6_erresc(\NLW_slave_rx.dphy_rx_fab_top_dl6_erresc_UNCONNECTED ),
        .dl6_errsoths(\NLW_slave_rx.dphy_rx_fab_top_dl6_errsoths_UNCONNECTED ),
        .dl6_errsotsynchs(\NLW_slave_rx.dphy_rx_fab_top_dl6_errsotsynchs_UNCONNECTED ),
        .dl6_errsyncesc(\NLW_slave_rx.dphy_rx_fab_top_dl6_errsyncesc_UNCONNECTED ),
        .dl6_forcerxmode(1'b0),
        .dl6_rxactivehs(\NLW_slave_rx.dphy_rx_fab_top_dl6_rxactivehs_UNCONNECTED ),
        .dl6_rxclkesc(\NLW_slave_rx.dphy_rx_fab_top_dl6_rxclkesc_UNCONNECTED ),
        .dl6_rxdataesc(\NLW_slave_rx.dphy_rx_fab_top_dl6_rxdataesc_UNCONNECTED [7:0]),
        .dl6_rxdatahs(\NLW_slave_rx.dphy_rx_fab_top_dl6_rxdatahs_UNCONNECTED [7:0]),
        .dl6_rxlpdtesc(\NLW_slave_rx.dphy_rx_fab_top_dl6_rxlpdtesc_UNCONNECTED ),
        .dl6_rxskewcalhs(\NLW_slave_rx.dphy_rx_fab_top_dl6_rxskewcalhs_UNCONNECTED ),
        .dl6_rxsynchs(\NLW_slave_rx.dphy_rx_fab_top_dl6_rxsynchs_UNCONNECTED ),
        .dl6_rxtriggeresc(\NLW_slave_rx.dphy_rx_fab_top_dl6_rxtriggeresc_UNCONNECTED [3:0]),
        .dl6_rxulpsesc(\NLW_slave_rx.dphy_rx_fab_top_dl6_rxulpsesc_UNCONNECTED ),
        .dl6_rxvalidesc(\NLW_slave_rx.dphy_rx_fab_top_dl6_rxvalidesc_UNCONNECTED ),
        .dl6_rxvalidhs(\NLW_slave_rx.dphy_rx_fab_top_dl6_rxvalidhs_UNCONNECTED ),
        .dl6_stopstate(\NLW_slave_rx.dphy_rx_fab_top_dl6_stopstate_UNCONNECTED ),
        .dl6_ulpsactivenot(\NLW_slave_rx.dphy_rx_fab_top_dl6_ulpsactivenot_UNCONNECTED ),
        .dl7_enable(1'b0),
        .dl7_errcontrol(\NLW_slave_rx.dphy_rx_fab_top_dl7_errcontrol_UNCONNECTED ),
        .dl7_erresc(\NLW_slave_rx.dphy_rx_fab_top_dl7_erresc_UNCONNECTED ),
        .dl7_errsoths(\NLW_slave_rx.dphy_rx_fab_top_dl7_errsoths_UNCONNECTED ),
        .dl7_errsotsynchs(\NLW_slave_rx.dphy_rx_fab_top_dl7_errsotsynchs_UNCONNECTED ),
        .dl7_errsyncesc(\NLW_slave_rx.dphy_rx_fab_top_dl7_errsyncesc_UNCONNECTED ),
        .dl7_forcerxmode(1'b0),
        .dl7_rxactivehs(\NLW_slave_rx.dphy_rx_fab_top_dl7_rxactivehs_UNCONNECTED ),
        .dl7_rxclkesc(\NLW_slave_rx.dphy_rx_fab_top_dl7_rxclkesc_UNCONNECTED ),
        .dl7_rxdataesc(\NLW_slave_rx.dphy_rx_fab_top_dl7_rxdataesc_UNCONNECTED [7:0]),
        .dl7_rxdatahs(\NLW_slave_rx.dphy_rx_fab_top_dl7_rxdatahs_UNCONNECTED [7:0]),
        .dl7_rxlpdtesc(\NLW_slave_rx.dphy_rx_fab_top_dl7_rxlpdtesc_UNCONNECTED ),
        .dl7_rxskewcalhs(\NLW_slave_rx.dphy_rx_fab_top_dl7_rxskewcalhs_UNCONNECTED ),
        .dl7_rxsynchs(\NLW_slave_rx.dphy_rx_fab_top_dl7_rxsynchs_UNCONNECTED ),
        .dl7_rxtriggeresc(\NLW_slave_rx.dphy_rx_fab_top_dl7_rxtriggeresc_UNCONNECTED [3:0]),
        .dl7_rxulpsesc(\NLW_slave_rx.dphy_rx_fab_top_dl7_rxulpsesc_UNCONNECTED ),
        .dl7_rxvalidesc(\NLW_slave_rx.dphy_rx_fab_top_dl7_rxvalidesc_UNCONNECTED ),
        .dl7_rxvalidhs(\NLW_slave_rx.dphy_rx_fab_top_dl7_rxvalidhs_UNCONNECTED ),
        .dl7_stopstate(\NLW_slave_rx.dphy_rx_fab_top_dl7_stopstate_UNCONNECTED ),
        .dl7_ulpsactivenot(\NLW_slave_rx.dphy_rx_fab_top_dl7_ulpsactivenot_UNCONNECTED ),
        .dly_ctrl_rdy(1'b0),
        .dphy_en_out(dphy_en_w),
        .dphy_srst_out(dphy_srst_w),
        .idelay_load(\NLW_slave_rx.dphy_rx_fab_top_idelay_load_UNCONNECTED ),
        .idelay_ready(1'b0),
        .idelay_tap_value(\NLW_slave_rx.dphy_rx_fab_top_idelay_tap_value_UNCONNECTED [8:0]),
        .idly_tap_val({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .init_done(\NLW_slave_rx.dphy_rx_fab_top_init_done_UNCONNECTED ),
        .init_periodic_skew_calb(\NLW_slave_rx.dphy_rx_fab_top_init_periodic_skew_calb_UNCONNECTED [3:0]),
        .lane0_tap({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .lane1_tap({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .lane2_tap({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .lane3_tap({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .lane4_tap({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .lane5_tap({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .lane6_tap({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .lane7_tap({1'b0,1'b0,1'b0,1'b0,1'b0}),
        .phy_ready(phy_rdy_out),
        .phy_rst(\NLW_slave_rx.dphy_rx_fab_top_phy_rst_UNCONNECTED ),
        .reg_cal_start(\NLW_slave_rx.dphy_rx_fab_top_reg_cal_start_UNCONNECTED ),
        .riu_addr_l0(\NLW_slave_rx.dphy_rx_fab_top_riu_addr_l0_UNCONNECTED [5:0]),
        .riu_addr_l1(\NLW_slave_rx.dphy_rx_fab_top_riu_addr_l1_UNCONNECTED [5:0]),
        .riu_addr_l2(\NLW_slave_rx.dphy_rx_fab_top_riu_addr_l2_UNCONNECTED [5:0]),
        .riu_addr_l3(\NLW_slave_rx.dphy_rx_fab_top_riu_addr_l3_UNCONNECTED [5:0]),
        .riu_nibble_sel_l0(\NLW_slave_rx.dphy_rx_fab_top_riu_nibble_sel_l0_UNCONNECTED ),
        .riu_nibble_sel_l1(\NLW_slave_rx.dphy_rx_fab_top_riu_nibble_sel_l1_UNCONNECTED ),
        .riu_nibble_sel_l2(\NLW_slave_rx.dphy_rx_fab_top_riu_nibble_sel_l2_UNCONNECTED ),
        .riu_nibble_sel_l3(\NLW_slave_rx.dphy_rx_fab_top_riu_nibble_sel_l3_UNCONNECTED ),
        .riu_rd_data_l0({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_rd_data_l1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_rd_data_l2({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_rd_data_l3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .riu_valid_l0(1'b0),
        .riu_valid_l1(1'b0),
        .riu_valid_l2(1'b0),
        .riu_valid_l3(1'b0),
        .riu_wr_data_l0(\NLW_slave_rx.dphy_rx_fab_top_riu_wr_data_l0_UNCONNECTED [15:0]),
        .riu_wr_data_l1(\NLW_slave_rx.dphy_rx_fab_top_riu_wr_data_l1_UNCONNECTED [15:0]),
        .riu_wr_data_l2(\NLW_slave_rx.dphy_rx_fab_top_riu_wr_data_l2_UNCONNECTED [15:0]),
        .riu_wr_data_l3(\NLW_slave_rx.dphy_rx_fab_top_riu_wr_data_l3_UNCONNECTED [15:0]),
        .riu_wr_en_l0(\NLW_slave_rx.dphy_rx_fab_top_riu_wr_en_l0_UNCONNECTED ),
        .riu_wr_en_l1(\NLW_slave_rx.dphy_rx_fab_top_riu_wr_en_l1_UNCONNECTED ),
        .riu_wr_en_l2(\NLW_slave_rx.dphy_rx_fab_top_riu_wr_en_l2_UNCONNECTED ),
        .riu_wr_en_l3(\NLW_slave_rx.dphy_rx_fab_top_riu_wr_en_l3_UNCONNECTED ),
        .rx_cl_disable_ibuf(rx_cl_disable_ibuf_w),
        .rx_cl_en_hs_lpn(\NLW_slave_rx.dphy_rx_fab_top_rx_cl_en_hs_lpn_UNCONNECTED ),
        .rx_cl_fifo_empty(1'b0),
        .rx_cl_fifo_rd_clk(\NLW_slave_rx.dphy_rx_fab_top_rx_cl_fifo_rd_clk_UNCONNECTED ),
        .rx_cl_fifo_rd_en(\NLW_slave_rx.dphy_rx_fab_top_rx_cl_fifo_rd_en_UNCONNECTED ),
        .rx_cl_hs_dp({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_cl_lp_dn(\slave_rx.bd_7289_phy_0_rx_hssio_i_n_9 ),
        .rx_cl_lp_dp(\slave_rx.bd_7289_phy_0_rx_hssio_i_n_4 ),
        .rx_div4_clk(rxbyteclkhs),
        .rx_dl0_disable_ibuf(rx_dl0_disable_ibuf_w),
        .rx_dl0_en_hs_lpn(\NLW_slave_rx.dphy_rx_fab_top_rx_dl0_en_hs_lpn_UNCONNECTED ),
        .rx_dl0_fifo_empty(1'b0),
        .rx_dl0_fifo_rd_clk(\NLW_slave_rx.dphy_rx_fab_top_rx_dl0_fifo_rd_clk_UNCONNECTED ),
        .rx_dl0_fifo_rd_en(\NLW_slave_rx.dphy_rx_fab_top_rx_dl0_fifo_rd_en_UNCONNECTED ),
        .rx_dl0_hs_dp(rx_dl0_hs_dp_w),
        .rx_dl0_lp_dn(rx_dl0_lp_dn_w),
        .rx_dl0_lp_dp(rx_dl0_lp_dp_w),
        .rx_dl1_disable_ibuf(rx_dl1_disable_ibuf_w),
        .rx_dl1_en_hs_lpn(\NLW_slave_rx.dphy_rx_fab_top_rx_dl1_en_hs_lpn_UNCONNECTED ),
        .rx_dl1_fifo_empty(1'b0),
        .rx_dl1_fifo_rd_clk(\NLW_slave_rx.dphy_rx_fab_top_rx_dl1_fifo_rd_clk_UNCONNECTED ),
        .rx_dl1_fifo_rd_en(\NLW_slave_rx.dphy_rx_fab_top_rx_dl1_fifo_rd_en_UNCONNECTED ),
        .rx_dl1_hs_dp(rx_dl1_hs_dp_w),
        .rx_dl1_lp_dn(rx_dl1_lp_dn_w),
        .rx_dl1_lp_dp(rx_dl1_lp_dp_w),
        .rx_dl2_disable_ibuf(rx_dl2_disable_ibuf_w),
        .rx_dl2_en_hs_lpn(\NLW_slave_rx.dphy_rx_fab_top_rx_dl2_en_hs_lpn_UNCONNECTED ),
        .rx_dl2_fifo_empty(1'b0),
        .rx_dl2_fifo_rd_clk(\NLW_slave_rx.dphy_rx_fab_top_rx_dl2_fifo_rd_clk_UNCONNECTED ),
        .rx_dl2_fifo_rd_en(\NLW_slave_rx.dphy_rx_fab_top_rx_dl2_fifo_rd_en_UNCONNECTED ),
        .rx_dl2_hs_dp(rx_dl2_hs_dp_w),
        .rx_dl2_lp_dn(rx_dl2_lp_dn_w),
        .rx_dl2_lp_dp(rx_dl2_lp_dp_w),
        .rx_dl3_disable_ibuf(rx_dl3_disable_ibuf_w),
        .rx_dl3_en_hs_lpn(\NLW_slave_rx.dphy_rx_fab_top_rx_dl3_en_hs_lpn_UNCONNECTED ),
        .rx_dl3_fifo_empty(1'b0),
        .rx_dl3_fifo_rd_clk(\NLW_slave_rx.dphy_rx_fab_top_rx_dl3_fifo_rd_clk_UNCONNECTED ),
        .rx_dl3_fifo_rd_en(\NLW_slave_rx.dphy_rx_fab_top_rx_dl3_fifo_rd_en_UNCONNECTED ),
        .rx_dl3_hs_dp(rx_dl3_hs_dp_w),
        .rx_dl3_lp_dn(rx_dl3_lp_dn_w),
        .rx_dl3_lp_dp(rx_dl3_lp_dp_w),
        .rx_dl4_disable_ibuf(\NLW_slave_rx.dphy_rx_fab_top_rx_dl4_disable_ibuf_UNCONNECTED ),
        .rx_dl4_en_hs_lpn(\NLW_slave_rx.dphy_rx_fab_top_rx_dl4_en_hs_lpn_UNCONNECTED ),
        .rx_dl4_fifo_empty(1'b0),
        .rx_dl4_fifo_rd_clk(\NLW_slave_rx.dphy_rx_fab_top_rx_dl4_fifo_rd_clk_UNCONNECTED ),
        .rx_dl4_fifo_rd_en(\NLW_slave_rx.dphy_rx_fab_top_rx_dl4_fifo_rd_en_UNCONNECTED ),
        .rx_dl4_hs_dp({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_dl4_lp_dn(1'b0),
        .rx_dl4_lp_dp(1'b0),
        .rx_dl5_disable_ibuf(\NLW_slave_rx.dphy_rx_fab_top_rx_dl5_disable_ibuf_UNCONNECTED ),
        .rx_dl5_en_hs_lpn(\NLW_slave_rx.dphy_rx_fab_top_rx_dl5_en_hs_lpn_UNCONNECTED ),
        .rx_dl5_fifo_empty(1'b0),
        .rx_dl5_fifo_rd_clk(\NLW_slave_rx.dphy_rx_fab_top_rx_dl5_fifo_rd_clk_UNCONNECTED ),
        .rx_dl5_fifo_rd_en(\NLW_slave_rx.dphy_rx_fab_top_rx_dl5_fifo_rd_en_UNCONNECTED ),
        .rx_dl5_hs_dp({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_dl5_lp_dn(1'b0),
        .rx_dl5_lp_dp(1'b0),
        .rx_dl6_disable_ibuf(\NLW_slave_rx.dphy_rx_fab_top_rx_dl6_disable_ibuf_UNCONNECTED ),
        .rx_dl6_en_hs_lpn(\NLW_slave_rx.dphy_rx_fab_top_rx_dl6_en_hs_lpn_UNCONNECTED ),
        .rx_dl6_fifo_empty(1'b0),
        .rx_dl6_fifo_rd_clk(\NLW_slave_rx.dphy_rx_fab_top_rx_dl6_fifo_rd_clk_UNCONNECTED ),
        .rx_dl6_fifo_rd_en(\NLW_slave_rx.dphy_rx_fab_top_rx_dl6_fifo_rd_en_UNCONNECTED ),
        .rx_dl6_hs_dp({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_dl6_lp_dn(1'b0),
        .rx_dl6_lp_dp(1'b0),
        .rx_dl7_disable_ibuf(\NLW_slave_rx.dphy_rx_fab_top_rx_dl7_disable_ibuf_UNCONNECTED ),
        .rx_dl7_en_hs_lpn(\NLW_slave_rx.dphy_rx_fab_top_rx_dl7_en_hs_lpn_UNCONNECTED ),
        .rx_dl7_fifo_empty(1'b0),
        .rx_dl7_fifo_rd_clk(\NLW_slave_rx.dphy_rx_fab_top_rx_dl7_fifo_rd_clk_UNCONNECTED ),
        .rx_dl7_fifo_rd_en(\NLW_slave_rx.dphy_rx_fab_top_rx_dl7_fifo_rd_en_UNCONNECTED ),
        .rx_dl7_hs_dp({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .rx_dl7_lp_dn(1'b0),
        .rx_dl7_lp_dp(1'b0),
        .s_axi_aclk(1'b0),
        .s_axi_araddr({s_axi_araddr,1'b0,1'b0}),
        .s_axi_aresetn(s_axi_aresetn),
        .s_axi_arready(s_axi_arready),
        .s_axi_arvalid(s_axi_arvalid),
        .s_axi_awaddr({s_axi_awaddr,1'b0,1'b0}),
        .s_axi_awready(s_axi_awready),
        .s_axi_awvalid(s_axi_awvalid),
        .s_axi_bready(s_axi_bready),
        .s_axi_bresp(\NLW_slave_rx.dphy_rx_fab_top_s_axi_bresp_UNCONNECTED [1:0]),
        .s_axi_bvalid(s_axi_bvalid),
        .s_axi_rdata(s_axi_rdata),
        .s_axi_rready(s_axi_rready),
        .s_axi_rresp(\NLW_slave_rx.dphy_rx_fab_top_s_axi_rresp_UNCONNECTED [1:0]),
        .s_axi_rvalid(s_axi_rvalid),
        .s_axi_wdata(s_axi_wdata),
        .s_axi_wready(s_axi_wready),
        .s_axi_wstrb({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wvalid(s_axi_wvalid),
        .sys_rst_byteclk_out(\NLW_slave_rx.dphy_rx_fab_top_sys_rst_byteclk_out_UNCONNECTED ),
        .system_rst_byteclk_in(1'b0),
        .system_rst_in(\slave_rx.u_rx_rst_logic_n_6 ),
        .system_rst_phybyteclk_in(1'b0),
        .tap_comp_res(\NLW_slave_rx.dphy_rx_fab_top_tap_comp_res_UNCONNECTED [7:0]),
        .tap_comp_rst(1'b0),
        .tap_val_dyn_out(\NLW_slave_rx.dphy_rx_fab_top_tap_val_dyn_out_UNCONNECTED [63:0]));
  (* XILINX_LEGACY_PRIM = "BUFG" *) 
  (* XILINX_TRANSFORM_PINMAP = "VCC:CE" *) 
  (* box_type = "PRIMITIVE" *) 
  BUFGCE #(
    .CE_TYPE("ASYNC"),
    .SIM_DEVICE("ULTRASCALE_PLUS")) 
    \slave_rx.rxbyteclkhs_buf 
       (.CE(1'b1),
        .I(div4_clk_t),
        .O(rxbyteclkhs));
  (* KEEP_HIERARCHY = "soft" *) 
  (* c_init_val = "1'b1" *) 
  (* c_mtbf_stages = "5'b00010" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_mipi_dphy_v4_3_13_rx_rst_sync \slave_rx.u_core_rst_coreclk_sync_rx_i 
       (.prmry_in(core_rst),
        .scndry_aclk(core_clk),
        .scndry_out(core_rst_coreclk_sync));
  (* ASSERT_ALL_RESETS = "3'b001" *) 
  (* DPHY_PRESET = "CSI2RX_XLNX" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* MMCM_USED = "TRUE" *) 
  (* MTBF_SYNC_STAGES = "3" *) 
  (* RELEASE_MMCM_RESET = "3'b010" *) 
  (* RELEASE_TXPLL_RESET = "3'b011" *) 
  (* RESET_FSM_DONE = "3'b101" *) 
  (* RST_BEGIN = "3'b000" *) 
  (* STABLE_CLK_PERIOD = "5.000000" *) 
  (* TIME_OUT = "40000" *) 
  (* TXPLL_USED = "FALSE" *) 
  (* WAIT_FOR_ENABLE = "3'b100" *) 
  (* WATCHDOG_TIMEOUT = "200000" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_mipi_dphy_v4_3_13_rx_rst_logic \slave_rx.u_rx_rst_logic 
       (.cl_enable(cl_enable_sync),
        .core_clk(core_clk),
        .core_rst(core_rst_coreclk_sync),
        .dphyen(dphy_en_w),
        .mmcm_lock(1'b1),
        .mmcm_rst(\NLW_slave_rx.u_rx_rst_logic_mmcm_rst_UNCONNECTED ),
        .phy_rdy(1'b1),
        .phy_rst(phy_reset_w),
        .srst(dphy_srst_w),
        .system_rst(\slave_rx.u_rx_rst_logic_n_6 ),
        .system_rst_byteclk(\NLW_slave_rx.u_rx_rst_logic_system_rst_byteclk_UNCONNECTED ),
        .system_rst_div4clk(\NLW_slave_rx.u_rx_rst_logic_system_rst_div4clk_UNCONNECTED ),
        .system_rst_escclk(\NLW_slave_rx.u_rx_rst_logic_system_rst_escclk_UNCONNECTED ),
        .txpll_lock(1'b1),
        .txpll_rst(\NLW_slave_rx.u_rx_rst_logic_txpll_rst_UNCONNECTED ));
endmodule

(* CHECK_LICENSE_TYPE = "bd_7289_r_sync_0,proc_sys_reset,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "proc_sys_reset,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_r_sync_0
   (slowest_sync_clk,
    ext_reset_in,
    aux_reset_in,
    mb_debug_sys_rst,
    dcm_locked,
    mb_reset,
    bus_struct_reset,
    peripheral_reset,
    interconnect_aresetn,
    peripheral_aresetn);
  (* x_interface_info = "xilinx.com:signal:clock:1.0 clock CLK" *) (* x_interface_mode = "slave clock" *) (* x_interface_parameter = "XIL_INTERFACENAME clock, ASSOCIATED_RESET mb_reset:bus_struct_reset:interconnect_aresetn:peripheral_aresetn:peripheral_reset, FREQ_HZ 200000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, CLK_DOMAIN bd_7289_dphy_clk_200M, INSERT_VIP 0" *) input slowest_sync_clk;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 ext_reset RST" *) (* x_interface_mode = "slave ext_reset" *) (* x_interface_parameter = "XIL_INTERFACENAME ext_reset, BOARD.ASSOCIATED_PARAM RESET_BOARD_INTERFACE, POLARITY ACTIVE_LOW, INSERT_VIP 0" *) input ext_reset_in;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 aux_reset RST" *) (* x_interface_mode = "slave aux_reset" *) (* x_interface_parameter = "XIL_INTERFACENAME aux_reset, POLARITY ACTIVE_LOW, INSERT_VIP 0" *) input aux_reset_in;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 dbg_reset RST" *) (* x_interface_mode = "slave dbg_reset" *) (* x_interface_parameter = "XIL_INTERFACENAME dbg_reset, POLARITY ACTIVE_HIGH, INSERT_VIP 0" *) input mb_debug_sys_rst;
  input dcm_locked;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 mb_rst RST" *) (* x_interface_mode = "master mb_rst" *) (* x_interface_parameter = "XIL_INTERFACENAME mb_rst, POLARITY ACTIVE_HIGH, TYPE PROCESSOR, INSERT_VIP 0" *) output mb_reset;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 bus_struct_reset RST" *) (* x_interface_mode = "master bus_struct_reset" *) (* x_interface_parameter = "XIL_INTERFACENAME bus_struct_reset, POLARITY ACTIVE_HIGH, TYPE INTERCONNECT, INSERT_VIP 0" *) output [0:0]bus_struct_reset;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 peripheral_high_rst RST" *) (* x_interface_mode = "master peripheral_high_rst" *) (* x_interface_parameter = "XIL_INTERFACENAME peripheral_high_rst, POLARITY ACTIVE_HIGH, TYPE PERIPHERAL, INSERT_VIP 0" *) output [0:0]peripheral_reset;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 interconnect_low_rst RST" *) (* x_interface_mode = "master interconnect_low_rst" *) (* x_interface_parameter = "XIL_INTERFACENAME interconnect_low_rst, POLARITY ACTIVE_LOW, TYPE INTERCONNECT, INSERT_VIP 0" *) output [0:0]interconnect_aresetn;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 peripheral_low_rst RST" *) (* x_interface_mode = "master peripheral_low_rst" *) (* x_interface_parameter = "XIL_INTERFACENAME peripheral_low_rst, POLARITY ACTIVE_LOW, TYPE PERIPHERAL, INSERT_VIP 0" *) output [0:0]peripheral_aresetn;

  wire \<const0> ;
  wire ext_reset_in;
  wire [0:0]peripheral_reset;
  wire slowest_sync_clk;
  wire NLW_U0_mb_reset_UNCONNECTED;
  wire [0:0]NLW_U0_bus_struct_reset_UNCONNECTED;
  wire [0:0]NLW_U0_interconnect_aresetn_UNCONNECTED;
  wire [0:0]NLW_U0_peripheral_aresetn_UNCONNECTED;

  assign bus_struct_reset[0] = \<const0> ;
  assign interconnect_aresetn[0] = \<const0> ;
  assign mb_reset = \<const0> ;
  assign peripheral_aresetn[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_AUX_RESET_HIGH = "1'b0" *) 
  (* C_AUX_RST_WIDTH = "4" *) 
  (* C_EXT_RESET_HIGH = "1'b0" *) 
  (* C_EXT_RST_WIDTH = "4" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_NUM_BUS_RST = "1" *) 
  (* C_NUM_INTERCONNECT_ARESETN = "1" *) 
  (* C_NUM_PERP_ARESETN = "1" *) 
  (* C_NUM_PERP_RST = "1" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_proc_sys_reset U0
       (.aux_reset_in(1'b1),
        .bus_struct_reset(NLW_U0_bus_struct_reset_UNCONNECTED[0]),
        .dcm_locked(1'b1),
        .ext_reset_in(ext_reset_in),
        .interconnect_aresetn(NLW_U0_interconnect_aresetn_UNCONNECTED[0]),
        .mb_debug_sys_rst(1'b0),
        .mb_reset(NLW_U0_mb_reset_UNCONNECTED),
        .peripheral_aresetn(NLW_U0_peripheral_aresetn_UNCONNECTED[0]),
        .peripheral_reset(peripheral_reset),
        .slowest_sync_clk(slowest_sync_clk));
endmodule

(* AXIS_FIFO_DCNT_WIDTH = "11" *) (* AXIS_FIFO_DEPTH = "2048" *) (* AXIS_TDATA_WIDTH = "64" *) 
(* AXIS_TDEST_WIDTH = "4" *) (* AXIS_TUSER_WIDTH = "96" *) (* CMN_INC_VFB = "true" *) 
(* CSI_EN_VC_SUPPORT = "1" *) (* CSI_FIXED_VC = "0" *) (* CSI_INV_SHUTDOWN = "1" *) 
(* CSI_LANES = "4" *) (* CSI_OFFLOAD_NONIMAGE = "0" *) (* CSI_VC_OFF_0 = "1" *) 
(* CSI_VC_OFF_1 = "2" *) (* CSI_VC_OFF_10 = "11" *) (* CSI_VC_OFF_11 = "12" *) 
(* CSI_VC_OFF_12 = "13" *) (* CSI_VC_OFF_13 = "14" *) (* CSI_VC_OFF_14 = "15" *) 
(* CSI_VC_OFF_2 = "3" *) (* CSI_VC_OFF_3 = "4" *) (* CSI_VC_OFF_4 = "5" *) 
(* CSI_VC_OFF_5 = "6" *) (* CSI_VC_OFF_6 = "7" *) (* CSI_VC_OFF_7 = "8" *) 
(* CSI_VC_OFF_8 = "9" *) (* CSI_VC_OFF_9 = "10" *) (* C_CSI2RX_DBG = "0" *) 
(* C_CSI_FILTER_USERDATATYPE = "0" *) (* C_CSI_OPT1_REGS = "0" *) (* C_CSI_OPT2_CRC = "0" *) 
(* C_CSI_OPT3_FIXEDLANES = "1" *) (* C_DISABLE_LITE = "0" *) (* C_EN_CSI_V2_0 = "false" *) 
(* C_EN_VCX = "false" *) (* C_FAMILY = "zynquplus" *) (* C_HS_LINE_RATE = "1188" *) 
(* C_MIPI_SLV_INT = "0" *) (* C_RCVE_DESKEW_SEQ = "false" *) (* C_SPRT_ISP_BRIDGE = "0" *) 
(* C_S_AXI_ADDR_WIDTH = "8" *) (* C_S_AXI_DATA_WIDTH = "32" *) (* downgradeipidentifiedwarnings = "yes" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_rx_0
   (core_clk,
    s_axi_aclk,
    s_axi_aresetn,
    s_axi_awaddr,
    s_axi_awvalid,
    s_axi_awready,
    s_axi_wdata,
    s_axi_wstrb,
    s_axi_wvalid,
    s_axi_wready,
    s_axi_bresp,
    s_axi_bvalid,
    s_axi_bready,
    s_axi_araddr,
    s_axi_arvalid,
    s_axi_arready,
    s_axi_rdata,
    s_axi_rresp,
    s_axi_rvalid,
    s_axi_rready,
    cl_stopstate,
    cl_enable,
    cl_rxulpsclknot,
    vfb_full,
    vfb_wc_full,
    core_men_ack_vfb,
    core_men_vfb,
    dl0_rxbyteclkhs,
    dl0_rxdatahs,
    dl0_rxvalidhs,
    dl0_rxactivehs,
    dl0_rxsynchs,
    dl0_stopstate,
    dl0_shutdown,
    dl0_rxulpmesc,
    dl0_errsoths,
    dl0_errsotsynchs,
    dl0_erresc,
    dl0_errcontrol,
    dl1_rxbyteclkhs,
    dl1_rxdatahs,
    dl1_rxvalidhs,
    dl1_rxactivehs,
    dl1_rxsynchs,
    dl1_stopstate,
    dl1_shutdown,
    dl1_rxulpmesc,
    dl1_errsoths,
    dl1_errsotsynchs,
    dl1_erresc,
    dl1_errcontrol,
    dl2_rxbyteclkhs,
    dl2_rxdatahs,
    dl2_rxvalidhs,
    dl2_rxactivehs,
    dl2_rxsynchs,
    dl2_stopstate,
    dl2_shutdown,
    dl2_rxulpmesc,
    dl2_errsoths,
    dl2_errsotsynchs,
    dl2_erresc,
    dl2_errcontrol,
    dl3_rxbyteclkhs,
    dl3_rxdatahs,
    dl3_rxvalidhs,
    dl3_rxactivehs,
    dl3_rxsynchs,
    dl3_stopstate,
    dl3_shutdown,
    dl3_rxulpmesc,
    dl3_errsoths,
    dl3_errsotsynchs,
    dl3_erresc,
    dl3_errcontrol,
    video_aclk,
    m_axis_aclk,
    m_axis_aresetn,
    m_axis_tready,
    m_axis_tvalid,
    m_axis_tlast,
    m_axis_tdata,
    m_axis_tkeep,
    m_axis_tuser,
    m_axis_tdest,
    mdt_tv,
    mdt_tr,
    sdt_tv,
    sdt_tr,
    vfb_tv,
    vfb_tr,
    interrupt,
    frame_rcvd_pulse_out);
  input core_clk;
  input s_axi_aclk;
  input s_axi_aresetn;
  input [7:0]s_axi_awaddr;
  input s_axi_awvalid;
  output s_axi_awready;
  input [31:0]s_axi_wdata;
  input [3:0]s_axi_wstrb;
  input s_axi_wvalid;
  output s_axi_wready;
  output [1:0]s_axi_bresp;
  output s_axi_bvalid;
  input s_axi_bready;
  input [7:0]s_axi_araddr;
  input s_axi_arvalid;
  output s_axi_arready;
  output [31:0]s_axi_rdata;
  output [1:0]s_axi_rresp;
  output s_axi_rvalid;
  input s_axi_rready;
  input cl_stopstate;
  output cl_enable;
  input cl_rxulpsclknot;
  input vfb_full;
  input vfb_wc_full;
  input core_men_ack_vfb;
  output core_men_vfb;
  input dl0_rxbyteclkhs;
  input [7:0]dl0_rxdatahs;
  input dl0_rxvalidhs;
  input dl0_rxactivehs;
  input dl0_rxsynchs;
  input dl0_stopstate;
  output dl0_shutdown;
  input dl0_rxulpmesc;
  input dl0_errsoths;
  input dl0_errsotsynchs;
  input dl0_erresc;
  input dl0_errcontrol;
  input dl1_rxbyteclkhs;
  input [7:0]dl1_rxdatahs;
  input dl1_rxvalidhs;
  input dl1_rxactivehs;
  input dl1_rxsynchs;
  input dl1_stopstate;
  output dl1_shutdown;
  input dl1_rxulpmesc;
  input dl1_errsoths;
  input dl1_errsotsynchs;
  input dl1_erresc;
  input dl1_errcontrol;
  input dl2_rxbyteclkhs;
  input [7:0]dl2_rxdatahs;
  input dl2_rxvalidhs;
  input dl2_rxactivehs;
  input dl2_rxsynchs;
  input dl2_stopstate;
  output dl2_shutdown;
  input dl2_rxulpmesc;
  input dl2_errsoths;
  input dl2_errsotsynchs;
  input dl2_erresc;
  input dl2_errcontrol;
  input dl3_rxbyteclkhs;
  input [7:0]dl3_rxdatahs;
  input dl3_rxvalidhs;
  input dl3_rxactivehs;
  input dl3_rxsynchs;
  input dl3_stopstate;
  output dl3_shutdown;
  input dl3_rxulpmesc;
  input dl3_errsoths;
  input dl3_errsotsynchs;
  input dl3_erresc;
  input dl3_errcontrol;
  input video_aclk;
  input m_axis_aclk;
  input m_axis_aresetn;
  input m_axis_tready;
  output m_axis_tvalid;
  output m_axis_tlast;
  output [63:0]m_axis_tdata;
  output [7:0]m_axis_tkeep;
  output [95:0]m_axis_tuser;
  output [3:0]m_axis_tdest;
  input mdt_tv;
  input mdt_tr;
  input sdt_tv;
  input sdt_tr;
  input vfb_tv;
  input vfb_tr;
  output interrupt;
  output frame_rcvd_pulse_out;

  wire \<const0> ;
  wire cl_enable;
  wire cl_rxulpsclknot;
  wire cl_stopstate;
  wire dl0_errsoths;
  wire dl0_errsotsynchs;
  wire dl0_rxactivehs;
  wire dl0_rxbyteclkhs;
  wire [7:0]dl0_rxdatahs;
  wire dl0_rxsynchs;
  wire dl0_rxvalidhs;
  wire dl0_stopstate;
  wire dl1_errsoths;
  wire dl1_errsotsynchs;
  wire dl1_rxactivehs;
  wire [7:0]dl1_rxdatahs;
  wire dl1_rxsynchs;
  wire dl1_rxvalidhs;
  wire dl1_stopstate;
  wire dl2_errsoths;
  wire dl2_errsotsynchs;
  wire dl2_rxactivehs;
  wire [7:0]dl2_rxdatahs;
  wire dl2_rxsynchs;
  wire dl2_rxvalidhs;
  wire dl2_stopstate;
  wire dl3_errsoths;
  wire dl3_errsotsynchs;
  wire dl3_rxactivehs;
  wire [7:0]dl3_rxdatahs;
  wire dl3_rxsynchs;
  wire dl3_rxvalidhs;
  wire dl3_stopstate;
  wire [63:0]m_axis_tdata;
  wire [7:0]m_axis_tkeep;
  wire m_axis_tlast;
  wire m_axis_tready;
  wire [69:0]\^m_axis_tuser ;
  wire m_axis_tvalid;
  wire s_axi_aclk;
  wire [7:0]s_axi_araddr;
  wire s_axi_aresetn;
  wire s_axi_arready;
  wire s_axi_arvalid;
  wire [7:0]s_axi_awaddr;
  wire s_axi_awready;
  wire s_axi_awvalid;
  wire s_axi_bready;
  wire s_axi_bvalid;
  wire [31:0]s_axi_rdata;
  wire s_axi_rready;
  wire s_axi_rvalid;
  wire [31:0]s_axi_wdata;
  wire s_axi_wready;
  wire s_axi_wvalid;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_cl_stopstate_intr_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_core_men_vfb_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_crc_status_intr_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_disable_in_progress_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl0_shutdown_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl0_stopstate_intr_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl1_shutdown_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl1_stopstate_intr_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl2_shutdown_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl2_stopstate_intr_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl3_shutdown_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl3_stopstate_intr_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_errsoths_intr_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_errsotsynchs_intr_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_frame_rcvd_pulse_out_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_header_valid_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_interrupt_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_linebuffer_full_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tlast_UNCONNECTED;
  wire NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tvalid_UNCONNECTED;
  wire [1:0]NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_ecc_status_intr_UNCONNECTED;
  wire [31:0]NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_header_data_UNCONNECTED;
  wire [63:0]NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tdata_UNCONNECTED;
  wire [3:0]NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tdest_UNCONNECTED;
  wire [7:0]NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tkeep_UNCONNECTED;
  wire [95:0]NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tuser_UNCONNECTED;
  wire [3:0]NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_tdest_UNCONNECTED;
  wire [95:2]NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_tuser_UNCONNECTED;
  wire [1:0]NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_s_axi_bresp_UNCONNECTED;
  wire [1:0]NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_s_axi_rresp_UNCONNECTED;

  assign core_men_vfb = \<const0> ;
  assign dl0_shutdown = \<const0> ;
  assign dl1_shutdown = \<const0> ;
  assign dl2_shutdown = \<const0> ;
  assign dl3_shutdown = \<const0> ;
  assign frame_rcvd_pulse_out = \<const0> ;
  assign interrupt = \<const0> ;
  assign m_axis_tdest[3] = \<const0> ;
  assign m_axis_tdest[2] = \<const0> ;
  assign m_axis_tdest[1] = \<const0> ;
  assign m_axis_tdest[0] = \<const0> ;
  assign m_axis_tuser[95] = \<const0> ;
  assign m_axis_tuser[94] = \<const0> ;
  assign m_axis_tuser[93] = \<const0> ;
  assign m_axis_tuser[92] = \<const0> ;
  assign m_axis_tuser[91] = \<const0> ;
  assign m_axis_tuser[90] = \<const0> ;
  assign m_axis_tuser[89] = \<const0> ;
  assign m_axis_tuser[88] = \<const0> ;
  assign m_axis_tuser[87] = \<const0> ;
  assign m_axis_tuser[86] = \<const0> ;
  assign m_axis_tuser[85] = \<const0> ;
  assign m_axis_tuser[84] = \<const0> ;
  assign m_axis_tuser[83] = \<const0> ;
  assign m_axis_tuser[82] = \<const0> ;
  assign m_axis_tuser[81] = \<const0> ;
  assign m_axis_tuser[80] = \<const0> ;
  assign m_axis_tuser[79] = \<const0> ;
  assign m_axis_tuser[78] = \<const0> ;
  assign m_axis_tuser[77] = \<const0> ;
  assign m_axis_tuser[76] = \<const0> ;
  assign m_axis_tuser[75] = \<const0> ;
  assign m_axis_tuser[74] = \<const0> ;
  assign m_axis_tuser[73] = \<const0> ;
  assign m_axis_tuser[72] = \<const0> ;
  assign m_axis_tuser[71] = \<const0> ;
  assign m_axis_tuser[70] = \<const0> ;
  assign m_axis_tuser[69:64] = \^m_axis_tuser [69:64];
  assign m_axis_tuser[63] = \<const0> ;
  assign m_axis_tuser[62] = \<const0> ;
  assign m_axis_tuser[61] = \<const0> ;
  assign m_axis_tuser[60] = \<const0> ;
  assign m_axis_tuser[59] = \<const0> ;
  assign m_axis_tuser[58] = \<const0> ;
  assign m_axis_tuser[57] = \<const0> ;
  assign m_axis_tuser[56] = \<const0> ;
  assign m_axis_tuser[55] = \<const0> ;
  assign m_axis_tuser[54] = \<const0> ;
  assign m_axis_tuser[53] = \<const0> ;
  assign m_axis_tuser[52] = \<const0> ;
  assign m_axis_tuser[51] = \<const0> ;
  assign m_axis_tuser[50] = \<const0> ;
  assign m_axis_tuser[49] = \<const0> ;
  assign m_axis_tuser[48] = \<const0> ;
  assign m_axis_tuser[47] = \<const0> ;
  assign m_axis_tuser[46] = \<const0> ;
  assign m_axis_tuser[45] = \<const0> ;
  assign m_axis_tuser[44] = \<const0> ;
  assign m_axis_tuser[43] = \<const0> ;
  assign m_axis_tuser[42] = \<const0> ;
  assign m_axis_tuser[41] = \<const0> ;
  assign m_axis_tuser[40] = \<const0> ;
  assign m_axis_tuser[39] = \<const0> ;
  assign m_axis_tuser[38] = \<const0> ;
  assign m_axis_tuser[37] = \<const0> ;
  assign m_axis_tuser[36] = \<const0> ;
  assign m_axis_tuser[35] = \<const0> ;
  assign m_axis_tuser[34] = \<const0> ;
  assign m_axis_tuser[33] = \<const0> ;
  assign m_axis_tuser[32] = \<const0> ;
  assign m_axis_tuser[31] = \<const0> ;
  assign m_axis_tuser[30] = \<const0> ;
  assign m_axis_tuser[29] = \<const0> ;
  assign m_axis_tuser[28] = \<const0> ;
  assign m_axis_tuser[27] = \<const0> ;
  assign m_axis_tuser[26] = \<const0> ;
  assign m_axis_tuser[25] = \<const0> ;
  assign m_axis_tuser[24] = \<const0> ;
  assign m_axis_tuser[23] = \<const0> ;
  assign m_axis_tuser[22] = \<const0> ;
  assign m_axis_tuser[21] = \<const0> ;
  assign m_axis_tuser[20] = \<const0> ;
  assign m_axis_tuser[19] = \<const0> ;
  assign m_axis_tuser[18] = \<const0> ;
  assign m_axis_tuser[17] = \<const0> ;
  assign m_axis_tuser[16] = \<const0> ;
  assign m_axis_tuser[15] = \<const0> ;
  assign m_axis_tuser[14] = \<const0> ;
  assign m_axis_tuser[13] = \<const0> ;
  assign m_axis_tuser[12] = \<const0> ;
  assign m_axis_tuser[11] = \<const0> ;
  assign m_axis_tuser[10] = \<const0> ;
  assign m_axis_tuser[9] = \<const0> ;
  assign m_axis_tuser[8] = \<const0> ;
  assign m_axis_tuser[7] = \<const0> ;
  assign m_axis_tuser[6] = \<const0> ;
  assign m_axis_tuser[5] = \<const0> ;
  assign m_axis_tuser[4] = \<const0> ;
  assign m_axis_tuser[3] = \<const0> ;
  assign m_axis_tuser[2] = \<const0> ;
  assign m_axis_tuser[1:0] = \^m_axis_tuser [1:0];
  assign s_axi_bresp[1] = \<const0> ;
  assign s_axi_bresp[0] = \<const0> ;
  assign s_axi_rresp[1] = \<const0> ;
  assign s_axi_rresp[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* AXIS_FIFO_DCNT_WIDTH = "11" *) 
  (* AXIS_FIFO_DEPTH = "2048" *) 
  (* AXIS_TDATA_WIDTH = "64" *) 
  (* AXIS_TDEST_WIDTH = "4" *) 
  (* AXIS_TUSER_WIDTH = "96" *) 
  (* CMN_INC_VFB = "true" *) 
  (* CSI_EN_VC_SUPPORT = "1" *) 
  (* CSI_FIXED_VC = "0" *) 
  (* CSI_INV_SHUTDOWN = "1" *) 
  (* CSI_LANES = "4" *) 
  (* CSI_OFFLOAD_NONIMAGE = "0" *) 
  (* CSI_VC_OFF_0 = "1" *) 
  (* CSI_VC_OFF_1 = "2" *) 
  (* CSI_VC_OFF_10 = "11" *) 
  (* CSI_VC_OFF_11 = "12" *) 
  (* CSI_VC_OFF_12 = "13" *) 
  (* CSI_VC_OFF_13 = "14" *) 
  (* CSI_VC_OFF_14 = "15" *) 
  (* CSI_VC_OFF_2 = "3" *) 
  (* CSI_VC_OFF_3 = "4" *) 
  (* CSI_VC_OFF_4 = "5" *) 
  (* CSI_VC_OFF_5 = "6" *) 
  (* CSI_VC_OFF_6 = "7" *) 
  (* CSI_VC_OFF_7 = "8" *) 
  (* CSI_VC_OFF_8 = "9" *) 
  (* CSI_VC_OFF_9 = "10" *) 
  (* C_CSI2RX_DBG = "0" *) 
  (* C_CSI_FILTER_USERDATATYPE = "0" *) 
  (* C_CSI_OPT1_REGS = "0" *) 
  (* C_CSI_OPT2_CRC = "0" *) 
  (* C_CSI_OPT3_FIXEDLANES = "1" *) 
  (* C_DISABLE_LITE = "0" *) 
  (* C_EN_CSI_V2_0 = "false" *) 
  (* C_EN_VCX = "false" *) 
  (* C_FAMILY = "zynquplus" *) 
  (* C_HS_LINE_RATE = "1188" *) 
  (* C_IS_EVAL = "0" *) 
  (* C_MIPI_SLV_INT = "0" *) 
  (* C_RCVE_DESKEW_SEQ = "false" *) 
  (* C_RX_PHY = "0" *) 
  (* C_SPRT_ISP_BRIDGE = "false" *) 
  (* C_S_AXI_ADDR_WIDTH = "8" *) 
  (* C_S_AXI_DATA_WIDTH = "32" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* VC_H = "4" *) 
  (* VC_L = "0" *) 
  (* VC_NUMS = "4" *) 
  (* VFB_FIFO = "16" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_mipi_csi2_rx_ctrl_v1_0_11_top mipi_csi2_rx_ctrl_v1_0_11_top_dut
       (.active_lanes({1'b0,1'b0}),
        .cl_enable(cl_enable),
        .cl_rxulpsclknot(cl_rxulpsclknot),
        .cl_stopstate(cl_stopstate),
        .cl_stopstate_intr(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_cl_stopstate_intr_UNCONNECTED),
        .core_clk(1'b0),
        .core_enable(1'b0),
        .core_men_ack_vfb(1'b1),
        .core_men_vfb(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_core_men_vfb_UNCONNECTED),
        .crc_status_intr(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_crc_status_intr_UNCONNECTED),
        .disable_in_progress(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_disable_in_progress_UNCONNECTED),
        .dl0_errcontrol(1'b0),
        .dl0_erresc(1'b0),
        .dl0_errsoths(dl0_errsoths),
        .dl0_errsotsynchs(dl0_errsotsynchs),
        .dl0_rxactivehs(dl0_rxactivehs),
        .dl0_rxbyteclkhs(dl0_rxbyteclkhs),
        .dl0_rxdatahs(dl0_rxdatahs),
        .dl0_rxskewcalhs(1'b0),
        .dl0_rxsynchs(dl0_rxsynchs),
        .dl0_rxulpmesc(1'b0),
        .dl0_rxvalidhs(dl0_rxvalidhs),
        .dl0_shutdown(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl0_shutdown_UNCONNECTED),
        .dl0_stopstate(dl0_stopstate),
        .dl0_stopstate_intr(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl0_stopstate_intr_UNCONNECTED),
        .dl1_errcontrol(1'b0),
        .dl1_erresc(1'b0),
        .dl1_errsoths(dl1_errsoths),
        .dl1_errsotsynchs(dl1_errsotsynchs),
        .dl1_rxactivehs(dl1_rxactivehs),
        .dl1_rxbyteclkhs(1'b0),
        .dl1_rxdatahs(dl1_rxdatahs),
        .dl1_rxskewcalhs(1'b0),
        .dl1_rxsynchs(dl1_rxsynchs),
        .dl1_rxulpmesc(1'b0),
        .dl1_rxvalidhs(dl1_rxvalidhs),
        .dl1_shutdown(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl1_shutdown_UNCONNECTED),
        .dl1_stopstate(dl1_stopstate),
        .dl1_stopstate_intr(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl1_stopstate_intr_UNCONNECTED),
        .dl2_errcontrol(1'b0),
        .dl2_erresc(1'b0),
        .dl2_errsoths(dl2_errsoths),
        .dl2_errsotsynchs(dl2_errsotsynchs),
        .dl2_rxactivehs(dl2_rxactivehs),
        .dl2_rxbyteclkhs(1'b0),
        .dl2_rxdatahs(dl2_rxdatahs),
        .dl2_rxskewcalhs(1'b0),
        .dl2_rxsynchs(dl2_rxsynchs),
        .dl2_rxulpmesc(1'b0),
        .dl2_rxvalidhs(dl2_rxvalidhs),
        .dl2_shutdown(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl2_shutdown_UNCONNECTED),
        .dl2_stopstate(dl2_stopstate),
        .dl2_stopstate_intr(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl2_stopstate_intr_UNCONNECTED),
        .dl3_errcontrol(1'b0),
        .dl3_erresc(1'b0),
        .dl3_errsoths(dl3_errsoths),
        .dl3_errsotsynchs(dl3_errsotsynchs),
        .dl3_rxactivehs(dl3_rxactivehs),
        .dl3_rxbyteclkhs(1'b0),
        .dl3_rxdatahs(dl3_rxdatahs),
        .dl3_rxskewcalhs(1'b0),
        .dl3_rxsynchs(dl3_rxsynchs),
        .dl3_rxulpmesc(1'b0),
        .dl3_rxvalidhs(dl3_rxvalidhs),
        .dl3_shutdown(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl3_shutdown_UNCONNECTED),
        .dl3_stopstate(dl3_stopstate),
        .dl3_stopstate_intr(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_dl3_stopstate_intr_UNCONNECTED),
        .ecc_status_intr(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_ecc_status_intr_UNCONNECTED[1:0]),
        .errsoths_intr(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_errsoths_intr_UNCONNECTED),
        .errsotsynchs_intr(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_errsotsynchs_intr_UNCONNECTED),
        .frame_rcvd_pulse_out(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_frame_rcvd_pulse_out_UNCONNECTED),
        .header_data(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_header_data_UNCONNECTED[31:0]),
        .header_valid(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_header_valid_UNCONNECTED),
        .interrupt(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_interrupt_UNCONNECTED),
        .linebuffer_full(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_linebuffer_full_UNCONNECTED),
        .m_axis_aclk(1'b0),
        .m_axis_aresetn(1'b0),
        .m_axis_eni_tdata(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tdata_UNCONNECTED[63:0]),
        .m_axis_eni_tdest(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tdest_UNCONNECTED[3:0]),
        .m_axis_eni_tkeep(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tkeep_UNCONNECTED[7:0]),
        .m_axis_eni_tlast(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tlast_UNCONNECTED),
        .m_axis_eni_tready(1'b0),
        .m_axis_eni_tuser(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tuser_UNCONNECTED[95:0]),
        .m_axis_eni_tvalid(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_eni_tvalid_UNCONNECTED),
        .m_axis_tdata(m_axis_tdata),
        .m_axis_tdest(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_tdest_UNCONNECTED[3:0]),
        .m_axis_tkeep(m_axis_tkeep),
        .m_axis_tlast(m_axis_tlast),
        .m_axis_tready(m_axis_tready),
        .m_axis_tuser({NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_m_axis_tuser_UNCONNECTED[95:70],\^m_axis_tuser }),
        .m_axis_tvalid(m_axis_tvalid),
        .mdt_tr(1'b0),
        .mdt_tv(1'b0),
        .s_axi_aclk(s_axi_aclk),
        .s_axi_araddr({s_axi_araddr[7:2],1'b0,1'b0}),
        .s_axi_aresetn(s_axi_aresetn),
        .s_axi_arready(s_axi_arready),
        .s_axi_arvalid(s_axi_arvalid),
        .s_axi_awaddr({s_axi_awaddr[7:2],1'b0,1'b0}),
        .s_axi_awready(s_axi_awready),
        .s_axi_awvalid(s_axi_awvalid),
        .s_axi_bready(s_axi_bready),
        .s_axi_bresp(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_s_axi_bresp_UNCONNECTED[1:0]),
        .s_axi_bvalid(s_axi_bvalid),
        .s_axi_rdata(s_axi_rdata),
        .s_axi_rready(s_axi_rready),
        .s_axi_rresp(NLW_mipi_csi2_rx_ctrl_v1_0_11_top_dut_s_axi_rresp_UNCONNECTED[1:0]),
        .s_axi_rvalid(s_axi_rvalid),
        .s_axi_wdata({s_axi_wdata[31:27],1'b0,1'b0,1'b0,s_axi_wdata[23:0]}),
        .s_axi_wready(s_axi_wready),
        .s_axi_wstrb({1'b0,1'b0,1'b0,1'b0}),
        .s_axi_wvalid(s_axi_wvalid),
        .sdt_tr(1'b0),
        .sdt_tv(1'b0),
        .vfb_full(1'b0),
        .vfb_tr(1'b0),
        .vfb_tv(1'b0),
        .vfb_wc_full(1'b0),
        .video_aclk(1'b0));
endmodule

(* AXIS_TDATA_WIDTH = "64" *) (* AXIS_TDEST_WIDTH = "4" *) (* AXIS_TUSER_WIDTH = "96" *) 
(* C_HS_LINE_RATE = "1188" *) (* VFB_4PXL_W = "48" *) (* VFB_BYPASS_WC = "0" *) 
(* VFB_DATA_TYPE = "44" *) (* VFB_DCONV_OWIDTH = "32" *) (* VFB_EN_VCX = "0" *) 
(* VFB_FIFO_DEPTH = "2048" *) (* VFB_FIFO_WIDTH = "64" *) (* VFB_FILTER_VC = "0" *) 
(* VFB_OP_DWIDTH = "24" *) (* VFB_OP_PIXELS = "2" *) (* VFB_PXL_W = "12" *) 
(* VFB_PXL_W_BB = "16" *) (* VFB_REQ_BUFFER = "1" *) (* VFB_REQ_REORDER = "1" *) 
(* VFB_TU_WIDTH = "96" *) (* VFB_VC = "0" *) (* downgradeipidentifiedwarnings = "yes" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_vfb_0_0
   (s_axis_aclk,
    s_axis_aresetn,
    s_axis_tready,
    s_axis_tvalid,
    s_axis_tlast,
    s_axis_tdata,
    s_axis_tkeep,
    s_axis_tuser,
    s_axis_tdest,
    mdt_tv,
    mdt_tr,
    sdt_tv,
    sdt_tr,
    vfb_tv,
    vfb_tr,
    vfb_arstn,
    vfb_clk,
    vfb_ready,
    core_men_vfb,
    vfb_full,
    vfb_wc_full,
    core_men_ack_vfb,
    vfb_valid,
    vfb_eol,
    vfb_sof,
    vfb_vcdt,
    vfb_data);
  input s_axis_aclk;
  input s_axis_aresetn;
  output s_axis_tready;
  input s_axis_tvalid;
  input s_axis_tlast;
  input [63:0]s_axis_tdata;
  input [7:0]s_axis_tkeep;
  input [95:0]s_axis_tuser;
  input [3:0]s_axis_tdest;
  output mdt_tv;
  output mdt_tr;
  output sdt_tv;
  output sdt_tr;
  output vfb_tv;
  output vfb_tr;
  input vfb_arstn;
  input vfb_clk;
  input vfb_ready;
  input core_men_vfb;
  output vfb_full;
  output vfb_wc_full;
  output core_men_ack_vfb;
  output vfb_valid;
  output vfb_eol;
  output [95:0]vfb_sof;
  output [9:0]vfb_vcdt;
  output [23:0]vfb_data;

  wire \<const0> ;
  wire [63:0]s_axis_tdata;
  wire [7:0]s_axis_tkeep;
  wire s_axis_tlast;
  wire s_axis_tready;
  wire [95:0]s_axis_tuser;
  wire s_axis_tvalid;
  wire vfb_arstn;
  wire vfb_clk;
  wire [23:0]vfb_data;
  wire vfb_eol;
  wire [69:0]\^vfb_sof ;
  wire vfb_valid;

  assign core_men_ack_vfb = \<const0> ;
  assign mdt_tr = \<const0> ;
  assign mdt_tv = \<const0> ;
  assign sdt_tr = \<const0> ;
  assign sdt_tv = \<const0> ;
  assign vfb_full = \<const0> ;
  assign vfb_sof[95] = \<const0> ;
  assign vfb_sof[94] = \<const0> ;
  assign vfb_sof[93] = \<const0> ;
  assign vfb_sof[92] = \<const0> ;
  assign vfb_sof[91] = \<const0> ;
  assign vfb_sof[90] = \<const0> ;
  assign vfb_sof[89] = \<const0> ;
  assign vfb_sof[88] = \<const0> ;
  assign vfb_sof[87] = \<const0> ;
  assign vfb_sof[86] = \<const0> ;
  assign vfb_sof[85] = \<const0> ;
  assign vfb_sof[84] = \<const0> ;
  assign vfb_sof[83] = \<const0> ;
  assign vfb_sof[82] = \<const0> ;
  assign vfb_sof[81] = \<const0> ;
  assign vfb_sof[80] = \<const0> ;
  assign vfb_sof[79] = \<const0> ;
  assign vfb_sof[78] = \<const0> ;
  assign vfb_sof[77] = \<const0> ;
  assign vfb_sof[76] = \<const0> ;
  assign vfb_sof[75] = \<const0> ;
  assign vfb_sof[74] = \<const0> ;
  assign vfb_sof[73] = \<const0> ;
  assign vfb_sof[72] = \<const0> ;
  assign vfb_sof[71] = \<const0> ;
  assign vfb_sof[70] = \<const0> ;
  assign vfb_sof[69:64] = \^vfb_sof [69:64];
  assign vfb_sof[63] = \<const0> ;
  assign vfb_sof[62] = \<const0> ;
  assign vfb_sof[61] = \<const0> ;
  assign vfb_sof[60] = \<const0> ;
  assign vfb_sof[59] = \<const0> ;
  assign vfb_sof[58] = \<const0> ;
  assign vfb_sof[57] = \<const0> ;
  assign vfb_sof[56] = \<const0> ;
  assign vfb_sof[55] = \<const0> ;
  assign vfb_sof[54] = \<const0> ;
  assign vfb_sof[53] = \<const0> ;
  assign vfb_sof[52] = \<const0> ;
  assign vfb_sof[51] = \<const0> ;
  assign vfb_sof[50] = \<const0> ;
  assign vfb_sof[49] = \<const0> ;
  assign vfb_sof[48] = \<const0> ;
  assign vfb_sof[47] = \<const0> ;
  assign vfb_sof[46] = \<const0> ;
  assign vfb_sof[45] = \<const0> ;
  assign vfb_sof[44] = \<const0> ;
  assign vfb_sof[43] = \<const0> ;
  assign vfb_sof[42] = \<const0> ;
  assign vfb_sof[41] = \<const0> ;
  assign vfb_sof[40] = \<const0> ;
  assign vfb_sof[39] = \<const0> ;
  assign vfb_sof[38] = \<const0> ;
  assign vfb_sof[37] = \<const0> ;
  assign vfb_sof[36] = \<const0> ;
  assign vfb_sof[35] = \<const0> ;
  assign vfb_sof[34] = \<const0> ;
  assign vfb_sof[33] = \<const0> ;
  assign vfb_sof[32] = \<const0> ;
  assign vfb_sof[31] = \<const0> ;
  assign vfb_sof[30] = \<const0> ;
  assign vfb_sof[29] = \<const0> ;
  assign vfb_sof[28] = \<const0> ;
  assign vfb_sof[27] = \<const0> ;
  assign vfb_sof[26] = \<const0> ;
  assign vfb_sof[25] = \<const0> ;
  assign vfb_sof[24] = \<const0> ;
  assign vfb_sof[23] = \<const0> ;
  assign vfb_sof[22] = \<const0> ;
  assign vfb_sof[21] = \<const0> ;
  assign vfb_sof[20] = \<const0> ;
  assign vfb_sof[19] = \<const0> ;
  assign vfb_sof[18] = \<const0> ;
  assign vfb_sof[17] = \<const0> ;
  assign vfb_sof[16] = \<const0> ;
  assign vfb_sof[15] = \<const0> ;
  assign vfb_sof[14] = \<const0> ;
  assign vfb_sof[13] = \<const0> ;
  assign vfb_sof[12] = \<const0> ;
  assign vfb_sof[11] = \<const0> ;
  assign vfb_sof[10] = \<const0> ;
  assign vfb_sof[9] = \<const0> ;
  assign vfb_sof[8] = \<const0> ;
  assign vfb_sof[7] = \<const0> ;
  assign vfb_sof[6] = \<const0> ;
  assign vfb_sof[5] = \<const0> ;
  assign vfb_sof[4] = \<const0> ;
  assign vfb_sof[3] = \<const0> ;
  assign vfb_sof[2] = \<const0> ;
  assign vfb_sof[1] = \<const0> ;
  assign vfb_sof[0] = \^vfb_sof [0];
  assign vfb_tr = \<const0> ;
  assign vfb_tv = \<const0> ;
  assign vfb_vcdt[9] = \<const0> ;
  assign vfb_vcdt[8] = \<const0> ;
  assign vfb_vcdt[7] = \<const0> ;
  assign vfb_vcdt[6] = \<const0> ;
  assign vfb_vcdt[5] = \<const0> ;
  assign vfb_vcdt[4] = \<const0> ;
  assign vfb_vcdt[3] = \<const0> ;
  assign vfb_vcdt[2] = \<const0> ;
  assign vfb_vcdt[1] = \<const0> ;
  assign vfb_vcdt[0] = \<const0> ;
  assign vfb_wc_full = \<const0> ;
  GND GND
       (.G(\<const0> ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_vfb_0_0_core inst
       (.D({s_axis_tlast,s_axis_tdata,s_axis_tkeep,s_axis_tuser[69:64],s_axis_tuser[1:0]}),
        .s_axis_tready(s_axis_tready),
        .s_axis_tvalid(s_axis_tvalid),
        .vfb_arstn(vfb_arstn),
        .vfb_clk(vfb_clk),
        .vfb_data(vfb_data),
        .vfb_eol_reg(vfb_eol),
        .vfb_sof({\^vfb_sof [69:64],\^vfb_sof [0]}),
        .vfb_valid_reg(vfb_valid));
endmodule

(* CHECK_LICENSE_TYPE = "bd_7289_vfb_0_0_axis_converter,axis_dwidth_converter_v1_1_32_axis_dwidth_converter,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "axis_dwidth_converter_v1_1_32_axis_dwidth_converter,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_vfb_0_0_axis_converter
   (aclk,
    aresetn,
    s_axis_tvalid,
    s_axis_tready,
    s_axis_tdata,
    s_axis_tkeep,
    s_axis_tlast,
    s_axis_tid,
    s_axis_tdest,
    s_axis_tuser,
    m_axis_tvalid,
    m_axis_tready,
    m_axis_tdata,
    m_axis_tkeep,
    m_axis_tlast,
    m_axis_tid,
    m_axis_tdest,
    m_axis_tuser);
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLKIF CLK" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME CLKIF, ASSOCIATED_BUSIF S_AXIS:M_AXIS, ASSOCIATED_RESET aresetn, ASSOCIATED_CLKEN aclken, FREQ_HZ 10000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, INSERT_VIP 0" *) input aclk;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 RSTIF RST" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME RSTIF, POLARITY ACTIVE_LOW, INSERT_VIP 0" *) input aresetn;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS TVALID" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME S_AXIS, TDATA_NUM_BYTES 1, TDEST_WIDTH 0, TID_WIDTH 0, TUSER_WIDTH 0, HAS_TREADY 1, HAS_TSTRB 0, HAS_TKEEP 0, HAS_TLAST 0, FREQ_HZ 100000000, PHASE 0.0, LAYERED_METADATA undef, INSERT_VIP 0" *) input s_axis_tvalid;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS TREADY" *) output s_axis_tready;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS TDATA" *) input [63:0]s_axis_tdata;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS TKEEP" *) input [7:0]s_axis_tkeep;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS TLAST" *) input s_axis_tlast;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS TID" *) input [31:0]s_axis_tid;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS TDEST" *) input [31:0]s_axis_tdest;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS TUSER" *) input [151:0]s_axis_tuser;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS TVALID" *) (* x_interface_mode = "master" *) (* x_interface_parameter = "XIL_INTERFACENAME M_AXIS, TDATA_NUM_BYTES 1, TDEST_WIDTH 0, TID_WIDTH 0, TUSER_WIDTH 0, HAS_TREADY 1, HAS_TSTRB 0, HAS_TKEEP 0, HAS_TLAST 0, FREQ_HZ 100000000, PHASE 0.0, LAYERED_METADATA undef, INSERT_VIP 0" *) output m_axis_tvalid;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS TREADY" *) input m_axis_tready;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS TDATA" *) output [31:0]m_axis_tdata;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS TKEEP" *) output [3:0]m_axis_tkeep;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS TLAST" *) output m_axis_tlast;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS TID" *) output [31:0]m_axis_tid;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS TDEST" *) output [31:0]m_axis_tdest;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS TUSER" *) output [75:0]m_axis_tuser;

  wire \<const0> ;
  wire aclk;
  wire aresetn;
  wire [27:0]\^m_axis_tdata ;
  wire [9:4]\^m_axis_tid ;
  wire m_axis_tlast;
  wire [0:0]\^m_axis_tuser ;
  wire m_axis_tvalid;
  wire [63:0]s_axis_tdata;
  wire [31:0]s_axis_tid;
  wire [7:0]s_axis_tkeep;
  wire s_axis_tlast;
  wire s_axis_tready;
  wire [151:0]s_axis_tuser;
  wire s_axis_tvalid;

  assign m_axis_tdata[31] = \<const0> ;
  assign m_axis_tdata[30] = \<const0> ;
  assign m_axis_tdata[29] = \<const0> ;
  assign m_axis_tdata[28] = \<const0> ;
  assign m_axis_tdata[27:16] = \^m_axis_tdata [27:16];
  assign m_axis_tdata[15] = \<const0> ;
  assign m_axis_tdata[14] = \<const0> ;
  assign m_axis_tdata[13] = \<const0> ;
  assign m_axis_tdata[12] = \<const0> ;
  assign m_axis_tdata[11:0] = \^m_axis_tdata [11:0];
  assign m_axis_tdest[31] = \<const0> ;
  assign m_axis_tdest[30] = \<const0> ;
  assign m_axis_tdest[29] = \<const0> ;
  assign m_axis_tdest[28] = \<const0> ;
  assign m_axis_tdest[27] = \<const0> ;
  assign m_axis_tdest[26] = \<const0> ;
  assign m_axis_tdest[25] = \<const0> ;
  assign m_axis_tdest[24] = \<const0> ;
  assign m_axis_tdest[23] = \<const0> ;
  assign m_axis_tdest[22] = \<const0> ;
  assign m_axis_tdest[21] = \<const0> ;
  assign m_axis_tdest[20] = \<const0> ;
  assign m_axis_tdest[19] = \<const0> ;
  assign m_axis_tdest[18] = \<const0> ;
  assign m_axis_tdest[17] = \<const0> ;
  assign m_axis_tdest[16] = \<const0> ;
  assign m_axis_tdest[15] = \<const0> ;
  assign m_axis_tdest[14] = \<const0> ;
  assign m_axis_tdest[13] = \<const0> ;
  assign m_axis_tdest[12] = \<const0> ;
  assign m_axis_tdest[11] = \<const0> ;
  assign m_axis_tdest[10] = \<const0> ;
  assign m_axis_tdest[9] = \<const0> ;
  assign m_axis_tdest[8] = \<const0> ;
  assign m_axis_tdest[7] = \<const0> ;
  assign m_axis_tdest[6] = \<const0> ;
  assign m_axis_tdest[5] = \<const0> ;
  assign m_axis_tdest[4] = \<const0> ;
  assign m_axis_tdest[3] = \<const0> ;
  assign m_axis_tdest[2] = \<const0> ;
  assign m_axis_tdest[1] = \<const0> ;
  assign m_axis_tdest[0] = \<const0> ;
  assign m_axis_tid[31] = \<const0> ;
  assign m_axis_tid[30] = \<const0> ;
  assign m_axis_tid[29] = \<const0> ;
  assign m_axis_tid[28] = \<const0> ;
  assign m_axis_tid[27] = \<const0> ;
  assign m_axis_tid[26] = \<const0> ;
  assign m_axis_tid[25] = \<const0> ;
  assign m_axis_tid[24] = \<const0> ;
  assign m_axis_tid[23] = \<const0> ;
  assign m_axis_tid[22] = \<const0> ;
  assign m_axis_tid[21] = \<const0> ;
  assign m_axis_tid[20] = \<const0> ;
  assign m_axis_tid[19] = \<const0> ;
  assign m_axis_tid[18] = \<const0> ;
  assign m_axis_tid[17] = \<const0> ;
  assign m_axis_tid[16] = \<const0> ;
  assign m_axis_tid[15] = \<const0> ;
  assign m_axis_tid[14] = \<const0> ;
  assign m_axis_tid[13] = \<const0> ;
  assign m_axis_tid[12] = \<const0> ;
  assign m_axis_tid[11] = \<const0> ;
  assign m_axis_tid[10] = \<const0> ;
  assign m_axis_tid[9:4] = \^m_axis_tid [9:4];
  assign m_axis_tid[3] = \<const0> ;
  assign m_axis_tid[2] = \<const0> ;
  assign m_axis_tid[1] = \<const0> ;
  assign m_axis_tid[0] = \<const0> ;
  assign m_axis_tkeep[3] = \<const0> ;
  assign m_axis_tkeep[2] = \<const0> ;
  assign m_axis_tkeep[1] = \<const0> ;
  assign m_axis_tkeep[0] = \<const0> ;
  assign m_axis_tuser[75] = \<const0> ;
  assign m_axis_tuser[74] = \<const0> ;
  assign m_axis_tuser[73] = \<const0> ;
  assign m_axis_tuser[72] = \<const0> ;
  assign m_axis_tuser[71] = \<const0> ;
  assign m_axis_tuser[70] = \<const0> ;
  assign m_axis_tuser[69] = \<const0> ;
  assign m_axis_tuser[68] = \<const0> ;
  assign m_axis_tuser[67] = \<const0> ;
  assign m_axis_tuser[66] = \<const0> ;
  assign m_axis_tuser[65] = \<const0> ;
  assign m_axis_tuser[64] = \<const0> ;
  assign m_axis_tuser[63] = \<const0> ;
  assign m_axis_tuser[62] = \<const0> ;
  assign m_axis_tuser[61] = \<const0> ;
  assign m_axis_tuser[60] = \<const0> ;
  assign m_axis_tuser[59] = \<const0> ;
  assign m_axis_tuser[58] = \<const0> ;
  assign m_axis_tuser[57] = \<const0> ;
  assign m_axis_tuser[56] = \<const0> ;
  assign m_axis_tuser[55] = \<const0> ;
  assign m_axis_tuser[54] = \<const0> ;
  assign m_axis_tuser[53] = \<const0> ;
  assign m_axis_tuser[52] = \<const0> ;
  assign m_axis_tuser[51] = \<const0> ;
  assign m_axis_tuser[50] = \<const0> ;
  assign m_axis_tuser[49] = \<const0> ;
  assign m_axis_tuser[48] = \<const0> ;
  assign m_axis_tuser[47] = \<const0> ;
  assign m_axis_tuser[46] = \<const0> ;
  assign m_axis_tuser[45] = \<const0> ;
  assign m_axis_tuser[44] = \<const0> ;
  assign m_axis_tuser[43] = \<const0> ;
  assign m_axis_tuser[42] = \<const0> ;
  assign m_axis_tuser[41] = \<const0> ;
  assign m_axis_tuser[40] = \<const0> ;
  assign m_axis_tuser[39] = \<const0> ;
  assign m_axis_tuser[38] = \<const0> ;
  assign m_axis_tuser[37] = \<const0> ;
  assign m_axis_tuser[36] = \<const0> ;
  assign m_axis_tuser[35] = \<const0> ;
  assign m_axis_tuser[34] = \<const0> ;
  assign m_axis_tuser[33] = \<const0> ;
  assign m_axis_tuser[32] = \<const0> ;
  assign m_axis_tuser[31] = \<const0> ;
  assign m_axis_tuser[30] = \<const0> ;
  assign m_axis_tuser[29] = \<const0> ;
  assign m_axis_tuser[28] = \<const0> ;
  assign m_axis_tuser[27] = \<const0> ;
  assign m_axis_tuser[26] = \<const0> ;
  assign m_axis_tuser[25] = \<const0> ;
  assign m_axis_tuser[24] = \<const0> ;
  assign m_axis_tuser[23] = \<const0> ;
  assign m_axis_tuser[22] = \<const0> ;
  assign m_axis_tuser[21] = \<const0> ;
  assign m_axis_tuser[20] = \<const0> ;
  assign m_axis_tuser[19] = \<const0> ;
  assign m_axis_tuser[18] = \<const0> ;
  assign m_axis_tuser[17] = \<const0> ;
  assign m_axis_tuser[16] = \<const0> ;
  assign m_axis_tuser[15] = \<const0> ;
  assign m_axis_tuser[14] = \<const0> ;
  assign m_axis_tuser[13] = \<const0> ;
  assign m_axis_tuser[12] = \<const0> ;
  assign m_axis_tuser[11] = \<const0> ;
  assign m_axis_tuser[10] = \<const0> ;
  assign m_axis_tuser[9] = \<const0> ;
  assign m_axis_tuser[8] = \<const0> ;
  assign m_axis_tuser[7] = \<const0> ;
  assign m_axis_tuser[6] = \<const0> ;
  assign m_axis_tuser[5] = \<const0> ;
  assign m_axis_tuser[4] = \<const0> ;
  assign m_axis_tuser[3] = \<const0> ;
  assign m_axis_tuser[2] = \<const0> ;
  assign m_axis_tuser[1] = \<const0> ;
  assign m_axis_tuser[0] = \^m_axis_tuser [0];
  GND GND
       (.G(\<const0> ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axis_dwidth_converter_v1_1_32_axis_dwidth_converter inst
       (.aclk(aclk),
        .aresetn(aresetn),
        .m_axis_tdata({\^m_axis_tdata [27:16],\^m_axis_tdata [11:0]}),
        .m_axis_tid(\^m_axis_tid ),
        .m_axis_tlast(m_axis_tlast),
        .m_axis_tuser(\^m_axis_tuser ),
        .s_axis_tdata({s_axis_tdata[59:48],s_axis_tdata[43:32],s_axis_tdata[27:16],s_axis_tdata[11:0]}),
        .s_axis_tid(s_axis_tid[9:4]),
        .s_axis_tkeep(s_axis_tkeep[7]),
        .s_axis_tlast(s_axis_tlast),
        .s_axis_tuser(s_axis_tuser[19]),
        .s_axis_tvalid(s_axis_tvalid),
        .\state_reg[0] (s_axis_tready),
        .\state_reg[1] (m_axis_tvalid));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_vfb_0_0_axis_dconverter
   (s_axis_tready,
    m_axis_tvalid,
    \r1_data_reg[19] ,
    m_axis_tlast,
    m_axis_tid,
    D,
    \state_reg[1] ,
    \state_reg[0] ,
    \state_reg[1]_0 ,
    \state_reg[1]_1 ,
    vfb_clk,
    vfb_arstn,
    s_fifo_tv,
    \r0_data_reg[59] ,
    s_axis_tkeep,
    s_axis_tlast,
    \r0_id_reg[9] ,
    s_axis_tuser,
    \vfb_data_reg[4] ,
    Q,
    \vfb_data_reg[23] ,
    vfb_sof119_out,
    cur_dtype_udef,
    \sband_tu_r[0]_i_2 );
  output s_axis_tready;
  output m_axis_tvalid;
  output [7:0]\r1_data_reg[19] ;
  output m_axis_tlast;
  output [5:0]m_axis_tid;
  output [15:0]D;
  output \state_reg[1] ;
  output \state_reg[0] ;
  output \state_reg[1]_0 ;
  output \state_reg[1]_1 ;
  input vfb_clk;
  input vfb_arstn;
  input s_fifo_tv;
  input [47:0]\r0_data_reg[59] ;
  input [0:0]s_axis_tkeep;
  input s_axis_tlast;
  input [5:0]\r0_id_reg[9] ;
  input [0:0]s_axis_tuser;
  input \vfb_data_reg[4] ;
  input [15:0]Q;
  input [15:0]\vfb_data_reg[23] ;
  input vfb_sof119_out;
  input cur_dtype_udef;
  input \sband_tu_r[0]_i_2 ;

  wire [15:0]D;
  wire [15:0]Q;
  wire cur_dtype_udef;
  wire [27:4]m_axis_tdata;
  wire [5:0]m_axis_tid;
  wire m_axis_tlast;
  wire [0:0]m_axis_tuser;
  wire m_axis_tvalid;
  wire [47:0]\r0_data_reg[59] ;
  wire [5:0]\r0_id_reg[9] ;
  wire [7:0]\r1_data_reg[19] ;
  wire [0:0]s_axis_tkeep;
  wire s_axis_tlast;
  wire s_axis_tready;
  wire [0:0]s_axis_tuser;
  wire s_fifo_tv;
  wire \sband_tu_r[0]_i_2 ;
  wire \state_reg[0] ;
  wire \state_reg[1] ;
  wire \state_reg[1]_0 ;
  wire \state_reg[1]_1 ;
  wire vfb_arstn;
  wire vfb_clk;
  wire \vfb_data[23]_i_4_n_0 ;
  wire [15:0]\vfb_data_reg[23] ;
  wire \vfb_data_reg[4] ;
  wire vfb_sof119_out;
  wire [31:12]NLW_axis_conv_inst_m_axis_tdata_UNCONNECTED;
  wire [31:0]NLW_axis_conv_inst_m_axis_tdest_UNCONNECTED;
  wire [31:0]NLW_axis_conv_inst_m_axis_tid_UNCONNECTED;
  wire [3:0]NLW_axis_conv_inst_m_axis_tkeep_UNCONNECTED;
  wire [75:1]NLW_axis_conv_inst_m_axis_tuser_UNCONNECTED;

  LUT2 #(
    .INIT(4'hB)) 
    \REQ_BUFFER_RAW12.buff_tv_i_i_3 
       (.I0(s_axis_tready),
        .I1(s_fifo_tv),
        .O(\state_reg[0] ));
  (* SOFT_HLUTNM = "soft_lutpair544" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \TUSR0.vfb_sof[69]_i_5 
       (.I0(vfb_arstn),
        .I1(m_axis_tvalid),
        .O(\state_reg[1] ));
  (* CHECK_LICENSE_TYPE = "bd_7289_vfb_0_0_axis_converter,axis_dwidth_converter_v1_1_32_axis_dwidth_converter,{}" *) 
  (* DowngradeIPIdentifiedWarnings = "yes" *) 
  (* X_CORE_INFO = "axis_dwidth_converter_v1_1_32_axis_dwidth_converter,Vivado 2024.2" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_vfb_0_0_axis_converter axis_conv_inst
       (.aclk(vfb_clk),
        .aresetn(vfb_arstn),
        .m_axis_tdata({NLW_axis_conv_inst_m_axis_tdata_UNCONNECTED[31:28],m_axis_tdata[27:20],\r1_data_reg[19] [7:4],NLW_axis_conv_inst_m_axis_tdata_UNCONNECTED[15:12],m_axis_tdata[11:4],\r1_data_reg[19] [3:0]}),
        .m_axis_tdest(NLW_axis_conv_inst_m_axis_tdest_UNCONNECTED[31:0]),
        .m_axis_tid({NLW_axis_conv_inst_m_axis_tid_UNCONNECTED[31:10],m_axis_tid,NLW_axis_conv_inst_m_axis_tid_UNCONNECTED[3:0]}),
        .m_axis_tkeep(NLW_axis_conv_inst_m_axis_tkeep_UNCONNECTED[3:0]),
        .m_axis_tlast(m_axis_tlast),
        .m_axis_tready(1'b1),
        .m_axis_tuser({NLW_axis_conv_inst_m_axis_tuser_UNCONNECTED[75:1],m_axis_tuser}),
        .m_axis_tvalid(m_axis_tvalid),
        .s_axis_tdata({1'b0,1'b0,1'b0,1'b0,\r0_data_reg[59] [47:36],1'b0,1'b0,1'b0,1'b0,\r0_data_reg[59] [35:24],1'b0,1'b0,1'b0,1'b0,\r0_data_reg[59] [23:12],1'b0,1'b0,1'b0,1'b0,\r0_data_reg[59] [11:0]}),
        .s_axis_tdest({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axis_tid({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,\r0_id_reg[9] ,1'b0,1'b0,1'b0,1'b0}),
        .s_axis_tkeep({s_axis_tkeep,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axis_tlast(s_axis_tlast),
        .s_axis_tready(s_axis_tready),
        .s_axis_tuser({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,s_axis_tuser,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .s_axis_tvalid(s_fifo_tv));
  (* SOFT_HLUTNM = "soft_lutpair545" *) 
  LUT3 #(
    .INIT(8'h04)) 
    \buf_valid[1]_i_3 
       (.I0(m_axis_tvalid),
        .I1(cur_dtype_udef),
        .I2(\sband_tu_r[0]_i_2 ),
        .O(\state_reg[1]_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[10]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[6]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [6]),
        .I4(m_axis_tdata[10]),
        .I5(\state_reg[1] ),
        .O(D[6]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[11]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[7]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [7]),
        .I4(m_axis_tdata[11]),
        .I5(\state_reg[1] ),
        .O(D[7]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[16]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[8]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [8]),
        .I4(m_axis_tdata[20]),
        .I5(\state_reg[1] ),
        .O(D[8]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[17]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[9]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [9]),
        .I4(m_axis_tdata[21]),
        .I5(\state_reg[1] ),
        .O(D[9]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[18]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[10]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [10]),
        .I4(m_axis_tdata[22]),
        .I5(\state_reg[1] ),
        .O(D[10]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[19]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[11]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [11]),
        .I4(m_axis_tdata[23]),
        .I5(\state_reg[1] ),
        .O(D[11]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[20]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[12]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [12]),
        .I4(m_axis_tdata[24]),
        .I5(\state_reg[1] ),
        .O(D[12]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[21]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[13]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [13]),
        .I4(m_axis_tdata[25]),
        .I5(\state_reg[1] ),
        .O(D[13]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[22]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[14]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [14]),
        .I4(m_axis_tdata[26]),
        .I5(\state_reg[1] ),
        .O(D[14]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[23]_i_2 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[15]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [15]),
        .I4(m_axis_tdata[27]),
        .I5(\state_reg[1] ),
        .O(D[15]));
  (* SOFT_HLUTNM = "soft_lutpair544" *) 
  LUT3 #(
    .INIT(8'h40)) 
    \vfb_data[23]_i_4 
       (.I0(m_axis_tvalid),
        .I1(vfb_arstn),
        .I2(vfb_sof119_out),
        .O(\vfb_data[23]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[4]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[0]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [0]),
        .I4(m_axis_tdata[4]),
        .I5(\state_reg[1] ),
        .O(D[0]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[5]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[1]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [1]),
        .I4(m_axis_tdata[5]),
        .I5(\state_reg[1] ),
        .O(D[1]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[6]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[2]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [2]),
        .I4(m_axis_tdata[6]),
        .I5(\state_reg[1] ),
        .O(D[2]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[7]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[3]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [3]),
        .I4(m_axis_tdata[7]),
        .I5(\state_reg[1] ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[8]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[4]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [4]),
        .I4(m_axis_tdata[8]),
        .I5(\state_reg[1] ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \vfb_data[9]_i_1 
       (.I0(\vfb_data_reg[4] ),
        .I1(Q[5]),
        .I2(\vfb_data[23]_i_4_n_0 ),
        .I3(\vfb_data_reg[23] [5]),
        .I4(m_axis_tdata[9]),
        .I5(\state_reg[1] ),
        .O(D[5]));
  (* SOFT_HLUTNM = "soft_lutpair545" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \vfb_sof[0]_i_3 
       (.I0(m_axis_tuser),
        .I1(m_axis_tvalid),
        .O(\state_reg[1]_1 ));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_vfb_0_0_core
   (vfb_valid_reg,
    vfb_eol_reg,
    vfb_sof,
    vfb_data,
    s_axis_tready,
    vfb_arstn,
    D,
    s_axis_tvalid,
    vfb_clk);
  output vfb_valid_reg;
  output vfb_eol_reg;
  output [6:0]vfb_sof;
  output [23:0]vfb_data;
  output s_axis_tready;
  input vfb_arstn;
  input [80:0]D;
  input s_axis_tvalid;
  input vfb_clk;

  wire [80:0]D;
  wire \VFB_MIN.reorder_n_2 ;
  wire \VFB_MIN.reorder_n_31 ;
  wire \VFB_MIN.reorder_n_34 ;
  wire \VFB_MIN.reorder_n_35 ;
  wire \VFB_MIN.reorder_n_84 ;
  wire axis_dconverter_n_1;
  wire axis_dconverter_n_17;
  wire axis_dconverter_n_18;
  wire axis_dconverter_n_19;
  wire axis_dconverter_n_20;
  wire axis_dconverter_n_21;
  wire axis_dconverter_n_22;
  wire axis_dconverter_n_23;
  wire axis_dconverter_n_24;
  wire axis_dconverter_n_25;
  wire axis_dconverter_n_26;
  wire axis_dconverter_n_27;
  wire axis_dconverter_n_28;
  wire axis_dconverter_n_29;
  wire axis_dconverter_n_30;
  wire axis_dconverter_n_31;
  wire axis_dconverter_n_32;
  wire axis_dconverter_n_33;
  wire axis_dconverter_n_34;
  wire axis_dconverter_n_35;
  wire axis_dconverter_n_36;
  wire cur_dtype_udef;
  wire [19:0]m_axis_tdata;
  wire [9:4]m_axis_tid;
  wire m_axis_tlast;
  wire op_inf_n_14;
  wire op_inf_n_15;
  wire op_inf_n_16;
  wire op_inf_n_17;
  wire op_inf_n_18;
  wire op_inf_n_19;
  wire op_inf_n_20;
  wire op_inf_n_21;
  wire op_inf_n_22;
  wire op_inf_n_23;
  wire op_inf_n_24;
  wire op_inf_n_25;
  wire op_inf_n_26;
  wire op_inf_n_27;
  wire op_inf_n_28;
  wire op_inf_n_29;
  wire op_inf_n_30;
  wire op_inf_n_31;
  wire op_inf_n_32;
  wire op_inf_n_33;
  wire op_inf_n_34;
  wire op_inf_n_35;
  wire op_inf_n_36;
  wire op_inf_n_37;
  wire op_inf_n_38;
  wire op_inf_n_39;
  wire op_inf_n_4;
  wire op_inf_n_40;
  wire op_inf_n_41;
  wire op_inf_n_42;
  wire op_inf_n_43;
  wire op_inf_n_44;
  wire op_inf_n_45;
  wire op_inf_n_46;
  wire op_inf_n_47;
  wire op_inf_n_48;
  wire op_inf_n_49;
  wire op_inf_n_50;
  wire op_inf_n_51;
  wire op_inf_n_52;
  wire op_inf_n_53;
  wire op_inf_n_54;
  wire op_inf_n_55;
  wire op_inf_n_56;
  wire op_inf_n_57;
  wire op_inf_n_58;
  wire op_inf_n_59;
  wire op_inf_n_6;
  wire op_inf_n_60;
  wire op_inf_n_61;
  wire op_inf_n_7;
  wire s_axis_tready;
  wire s_axis_tvalid;
  wire [59:0]s_fifo_td;
  wire [9:4]s_fifo_tid;
  wire [7:7]s_fifo_tk;
  wire s_fifo_tl;
  wire s_fifo_tr;
  wire [76:76]s_fifo_tu;
  wire s_fifo_tv;
  wire [15:0]sband_td;
  wire [47:0]sband_td_r;
  wire [2:2]sband_tk;
  wire sband_tl;
  wire [9:4]sband_ts;
  wire [0:0]sband_tu;
  wire [0:0]sband_tu_r;
  wire vfb_arstn;
  wire vfb_clk;
  wire [23:0]vfb_data;
  wire vfb_eol_reg;
  wire [6:0]vfb_sof;
  wire vfb_sof015_out;
  wire vfb_sof119_out;
  wire vfb_valid_reg;

  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vfb_v1_0_27_reorder \VFB_MIN.reorder 
       (.D(D),
        .E(vfb_valid_reg),
        .Q({sband_td,sband_tk,sband_ts}),
        .\REQ_BUFFER_RAW12.buff_tv_i_reg_0 (axis_dconverter_n_34),
        .SR(\VFB_MIN.reorder_n_2 ),
        .\buf_data_reg[0][106]_0 ({\VFB_MIN.reorder_n_34 ,\VFB_MIN.reorder_n_35 }),
        .\buf_data_reg[0][171]_0 (sband_td_r),
        .\buf_valid_reg[1]_0 (s_axis_tready),
        .\buf_valid_reg[1]_1 (axis_dconverter_n_35),
        .cur_dtype_udef(cur_dtype_udef),
        .m_axis_tvalid(axis_dconverter_n_1),
        .s_axis_tkeep(s_fifo_tk),
        .s_axis_tlast(s_fifo_tl),
        .s_axis_tready(s_fifo_tr),
        .s_axis_tuser(s_fifo_tu),
        .s_axis_tvalid(s_axis_tvalid),
        .\s_fifo_td_reg[59]_0 ({s_fifo_td[59:48],s_fifo_td[43:32],s_fifo_td[27:16],s_fifo_td[11:0]}),
        .\s_fifo_tid_reg[9]_0 (s_fifo_tid),
        .s_fifo_tv(s_fifo_tv),
        .\sband_td_r_reg[31] ({op_inf_n_14,op_inf_n_15,op_inf_n_16,op_inf_n_17,op_inf_n_18,op_inf_n_19,op_inf_n_20,op_inf_n_21,op_inf_n_22,op_inf_n_23,op_inf_n_24,op_inf_n_25,op_inf_n_26,op_inf_n_27,op_inf_n_28,op_inf_n_29,op_inf_n_30,op_inf_n_31,op_inf_n_32,op_inf_n_33,op_inf_n_34,op_inf_n_35,op_inf_n_36,op_inf_n_37,op_inf_n_38,op_inf_n_39,op_inf_n_40,op_inf_n_41,op_inf_n_42,op_inf_n_43,op_inf_n_44,op_inf_n_45}),
        .\sband_tk_r_reg[2] (op_inf_n_7),
        .sband_tl(sband_tl),
        .sband_tl_r_reg(op_inf_n_6),
        .sband_tl_r_reg_0(vfb_eol_reg),
        .sband_tu(sband_tu),
        .sband_tu_r(sband_tu_r),
        .\state_reg[1] (\VFB_MIN.reorder_n_31 ),
        .\state_reg[1]_0 (\VFB_MIN.reorder_n_84 ),
        .vfb_arstn(vfb_arstn),
        .vfb_clk(vfb_clk),
        .vfb_sof015_out(vfb_sof015_out),
        .vfb_sof119_out(vfb_sof119_out),
        .\vfb_sof_reg[0] (op_inf_n_4));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_vfb_0_0_axis_dconverter axis_dconverter
       (.D({axis_dconverter_n_17,axis_dconverter_n_18,axis_dconverter_n_19,axis_dconverter_n_20,axis_dconverter_n_21,axis_dconverter_n_22,axis_dconverter_n_23,axis_dconverter_n_24,axis_dconverter_n_25,axis_dconverter_n_26,axis_dconverter_n_27,axis_dconverter_n_28,axis_dconverter_n_29,axis_dconverter_n_30,axis_dconverter_n_31,axis_dconverter_n_32}),
        .Q({op_inf_n_46,op_inf_n_47,op_inf_n_48,op_inf_n_49,op_inf_n_50,op_inf_n_51,op_inf_n_52,op_inf_n_53,op_inf_n_54,op_inf_n_55,op_inf_n_56,op_inf_n_57,op_inf_n_58,op_inf_n_59,op_inf_n_60,op_inf_n_61}),
        .cur_dtype_udef(cur_dtype_udef),
        .m_axis_tid(m_axis_tid),
        .m_axis_tlast(m_axis_tlast),
        .m_axis_tvalid(axis_dconverter_n_1),
        .\r0_data_reg[59] ({s_fifo_td[59:48],s_fifo_td[43:32],s_fifo_td[27:16],s_fifo_td[11:0]}),
        .\r0_id_reg[9] (s_fifo_tid),
        .\r1_data_reg[19] ({m_axis_tdata[19:16],m_axis_tdata[3:0]}),
        .s_axis_tkeep(s_fifo_tk),
        .s_axis_tlast(s_fifo_tl),
        .s_axis_tready(s_fifo_tr),
        .s_axis_tuser(s_fifo_tu),
        .s_fifo_tv(s_fifo_tv),
        .\sband_tu_r[0]_i_2 (vfb_eol_reg),
        .\state_reg[0] (axis_dconverter_n_34),
        .\state_reg[1] (axis_dconverter_n_33),
        .\state_reg[1]_0 (axis_dconverter_n_35),
        .\state_reg[1]_1 (axis_dconverter_n_36),
        .vfb_arstn(vfb_arstn),
        .vfb_clk(vfb_clk),
        .\vfb_data_reg[23] (sband_td),
        .\vfb_data_reg[4] (\VFB_MIN.reorder_n_84 ),
        .vfb_sof119_out(vfb_sof119_out));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vfb_v1_0_27_op_inf op_inf
       (.D({\VFB_MIN.reorder_n_34 ,\VFB_MIN.reorder_n_35 }),
        .E(vfb_valid_reg),
        .Q({sband_tk,sband_ts}),
        .SR(\VFB_MIN.reorder_n_2 ),
        .\TUSR0.vfb_sof_reg[64]_0 (axis_dconverter_n_33),
        .m_axis_tid(m_axis_tid),
        .m_axis_tlast(m_axis_tlast),
        .m_axis_tvalid(axis_dconverter_n_1),
        .\sband_td_r_reg[47]_0 ({op_inf_n_14,op_inf_n_15,op_inf_n_16,op_inf_n_17,op_inf_n_18,op_inf_n_19,op_inf_n_20,op_inf_n_21,op_inf_n_22,op_inf_n_23,op_inf_n_24,op_inf_n_25,op_inf_n_26,op_inf_n_27,op_inf_n_28,op_inf_n_29,op_inf_n_30,op_inf_n_31,op_inf_n_32,op_inf_n_33,op_inf_n_34,op_inf_n_35,op_inf_n_36,op_inf_n_37,op_inf_n_38,op_inf_n_39,op_inf_n_40,op_inf_n_41,op_inf_n_42,op_inf_n_43,op_inf_n_44,op_inf_n_45,op_inf_n_46,op_inf_n_47,op_inf_n_48,op_inf_n_49,op_inf_n_50,op_inf_n_51,op_inf_n_52,op_inf_n_53,op_inf_n_54,op_inf_n_55,op_inf_n_56,op_inf_n_57,op_inf_n_58,op_inf_n_59,op_inf_n_60,op_inf_n_61}),
        .\sband_td_r_reg[47]_1 (sband_td_r),
        .\sband_tk_r_reg[4]_0 (op_inf_n_7),
        .sband_tl(sband_tl),
        .sband_tu(sband_tu),
        .sband_tu_r(sband_tu_r),
        .vfb_arstn(vfb_arstn),
        .vfb_clk(vfb_clk),
        .\vfb_cnt_reg[3]_0 (op_inf_n_6),
        .vfb_data(vfb_data),
        .\vfb_data_reg[15]_0 ({m_axis_tdata[19:16],m_axis_tdata[3:0]}),
        .\vfb_data_reg[23]_0 ({axis_dconverter_n_17,axis_dconverter_n_18,axis_dconverter_n_19,axis_dconverter_n_20,axis_dconverter_n_21,axis_dconverter_n_22,axis_dconverter_n_23,axis_dconverter_n_24,axis_dconverter_n_25,axis_dconverter_n_26,axis_dconverter_n_27,axis_dconverter_n_28,axis_dconverter_n_29,axis_dconverter_n_30,axis_dconverter_n_31,axis_dconverter_n_32}),
        .vfb_eol_reg_0(vfb_eol_reg),
        .vfb_sof(vfb_sof[6:1]),
        .vfb_sof015_out(vfb_sof015_out),
        .vfb_sof119_out(vfb_sof119_out),
        .\vfb_sof_reg[0]_0 (vfb_sof[0]),
        .\vfb_sof_reg[0]_1 (\VFB_MIN.reorder_n_31 ),
        .\vfb_sof_reg[0]_2 (axis_dconverter_n_36),
        .vfb_valid_reg_0(op_inf_n_4));
endmodule

(* CHECK_LICENSE_TYPE = "bd_7289_xbar_0,axi_crossbar_v2_1_34_axi_crossbar,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "axi_crossbar_v2_1_34_axi_crossbar,Vivado 2024.2" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_bd_7289_xbar_0
   (aclk,
    aresetn,
    s_axi_awaddr,
    s_axi_awprot,
    s_axi_awvalid,
    s_axi_awready,
    s_axi_wdata,
    s_axi_wstrb,
    s_axi_wvalid,
    s_axi_wready,
    s_axi_bresp,
    s_axi_bvalid,
    s_axi_bready,
    s_axi_araddr,
    s_axi_arprot,
    s_axi_arvalid,
    s_axi_arready,
    s_axi_rdata,
    s_axi_rresp,
    s_axi_rvalid,
    s_axi_rready,
    m_axi_awaddr,
    m_axi_awprot,
    m_axi_awvalid,
    m_axi_awready,
    m_axi_wdata,
    m_axi_wstrb,
    m_axi_wvalid,
    m_axi_wready,
    m_axi_bresp,
    m_axi_bvalid,
    m_axi_bready,
    m_axi_araddr,
    m_axi_arprot,
    m_axi_arvalid,
    m_axi_arready,
    m_axi_rdata,
    m_axi_rresp,
    m_axi_rvalid,
    m_axi_rready);
  (* x_interface_info = "xilinx.com:signal:clock:1.0 CLKIF CLK" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME CLKIF, ASSOCIATED_BUSIF M00_AXI:M01_AXI:M02_AXI:M03_AXI:M04_AXI:M05_AXI:M06_AXI:M07_AXI:M08_AXI:M09_AXI:M10_AXI:M11_AXI:M12_AXI:M13_AXI:M14_AXI:M15_AXI:S00_AXI:S01_AXI:S02_AXI:S03_AXI:S04_AXI:S05_AXI:S06_AXI:S07_AXI:S08_AXI:S09_AXI:S10_AXI:S11_AXI:S12_AXI:S13_AXI:S14_AXI:S15_AXI, ASSOCIATED_RESET aresetn, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, CLK_DOMAIN bd_7289_lite_aclk, INSERT_VIP 0" *) input aclk;
  (* x_interface_info = "xilinx.com:signal:reset:1.0 RSTIF RST" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME RSTIF, POLARITY ACTIVE_LOW, INSERT_VIP 0, TYPE INTERCONNECT" *) input aresetn;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI AWADDR" *) (* x_interface_mode = "slave" *) (* x_interface_parameter = "XIL_INTERFACENAME S00_AXI, DATA_WIDTH 32, PROTOCOL AXI4LITE, FREQ_HZ 100000000, ID_WIDTH 0, ADDR_WIDTH 13, AWUSER_WIDTH 0, ARUSER_WIDTH 0, WUSER_WIDTH 0, RUSER_WIDTH 0, BUSER_WIDTH 0, READ_WRITE_MODE READ_WRITE, HAS_BURST 0, HAS_LOCK 0, HAS_PROT 1, HAS_CACHE 0, HAS_QOS 0, HAS_REGION 0, HAS_WSTRB 1, HAS_BRESP 1, HAS_RRESP 1, SUPPORTS_NARROW_BURST 0, NUM_READ_OUTSTANDING 1, NUM_WRITE_OUTSTANDING 1, MAX_BURST_LENGTH 1, PHASE 0.0, CLK_DOMAIN bd_7289_lite_aclk, NUM_READ_THREADS 1, NUM_WRITE_THREADS 1, RUSER_BITS_PER_BYTE 0, WUSER_BITS_PER_BYTE 0, INSERT_VIP 0" *) input [12:0]s_axi_awaddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI AWPROT" *) input [2:0]s_axi_awprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI AWVALID" *) input [0:0]s_axi_awvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI AWREADY" *) output [0:0]s_axi_awready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI WDATA" *) input [31:0]s_axi_wdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI WSTRB" *) input [3:0]s_axi_wstrb;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI WVALID" *) input [0:0]s_axi_wvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI WREADY" *) output [0:0]s_axi_wready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI BRESP" *) output [1:0]s_axi_bresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI BVALID" *) output [0:0]s_axi_bvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI BREADY" *) input [0:0]s_axi_bready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI ARADDR" *) input [12:0]s_axi_araddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI ARPROT" *) input [2:0]s_axi_arprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI ARVALID" *) input [0:0]s_axi_arvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI ARREADY" *) output [0:0]s_axi_arready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI RDATA" *) output [31:0]s_axi_rdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI RRESP" *) output [1:0]s_axi_rresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI RVALID" *) output [0:0]s_axi_rvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 S00_AXI RREADY" *) input [0:0]s_axi_rready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI AWADDR [12:0] [12:0], xilinx.com:interface:aximm:1.0 M01_AXI AWADDR [12:0] [25:13]" *) (* x_interface_mode = "master M01_AXI" *) (* x_interface_parameter = "XIL_INTERFACENAME M01_AXI, DATA_WIDTH 32, PROTOCOL AXI4LITE, FREQ_HZ 100000000, ID_WIDTH 0, ADDR_WIDTH 13, AWUSER_WIDTH 0, ARUSER_WIDTH 0, WUSER_WIDTH 0, RUSER_WIDTH 0, BUSER_WIDTH 0, READ_WRITE_MODE READ_WRITE, HAS_BURST 0, HAS_LOCK 0, HAS_PROT 1, HAS_CACHE 0, HAS_QOS 0, HAS_REGION 0, HAS_WSTRB 1, HAS_BRESP 1, HAS_RRESP 1, SUPPORTS_NARROW_BURST 0, NUM_READ_OUTSTANDING 1, NUM_WRITE_OUTSTANDING 1, MAX_BURST_LENGTH 1, PHASE 0.0, CLK_DOMAIN bd_7289_lite_aclk, NUM_READ_THREADS 1, NUM_WRITE_THREADS 1, RUSER_BITS_PER_BYTE 0, WUSER_BITS_PER_BYTE 0, INSERT_VIP 0" *) output [25:0]m_axi_awaddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI AWPROT [2:0] [2:0], xilinx.com:interface:aximm:1.0 M01_AXI AWPROT [2:0] [5:3]" *) output [5:0]m_axi_awprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI AWVALID [0:0] [0:0], xilinx.com:interface:aximm:1.0 M01_AXI AWVALID [0:0] [1:1]" *) output [1:0]m_axi_awvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI AWREADY [0:0] [0:0], xilinx.com:interface:aximm:1.0 M01_AXI AWREADY [0:0] [1:1]" *) input [1:0]m_axi_awready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI WDATA [31:0] [31:0], xilinx.com:interface:aximm:1.0 M01_AXI WDATA [31:0] [63:32]" *) output [63:0]m_axi_wdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI WSTRB [3:0] [3:0], xilinx.com:interface:aximm:1.0 M01_AXI WSTRB [3:0] [7:4]" *) output [7:0]m_axi_wstrb;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI WVALID [0:0] [0:0], xilinx.com:interface:aximm:1.0 M01_AXI WVALID [0:0] [1:1]" *) output [1:0]m_axi_wvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI WREADY [0:0] [0:0], xilinx.com:interface:aximm:1.0 M01_AXI WREADY [0:0] [1:1]" *) input [1:0]m_axi_wready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI BRESP [1:0] [1:0], xilinx.com:interface:aximm:1.0 M01_AXI BRESP [1:0] [3:2]" *) input [3:0]m_axi_bresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI BVALID [0:0] [0:0], xilinx.com:interface:aximm:1.0 M01_AXI BVALID [0:0] [1:1]" *) input [1:0]m_axi_bvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI BREADY [0:0] [0:0], xilinx.com:interface:aximm:1.0 M01_AXI BREADY [0:0] [1:1]" *) output [1:0]m_axi_bready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI ARADDR [12:0] [12:0], xilinx.com:interface:aximm:1.0 M01_AXI ARADDR [12:0] [25:13]" *) output [25:0]m_axi_araddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI ARPROT [2:0] [2:0], xilinx.com:interface:aximm:1.0 M01_AXI ARPROT [2:0] [5:3]" *) output [5:0]m_axi_arprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI ARVALID [0:0] [0:0], xilinx.com:interface:aximm:1.0 M01_AXI ARVALID [0:0] [1:1]" *) output [1:0]m_axi_arvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI ARREADY [0:0] [0:0], xilinx.com:interface:aximm:1.0 M01_AXI ARREADY [0:0] [1:1]" *) input [1:0]m_axi_arready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI RDATA [31:0] [31:0], xilinx.com:interface:aximm:1.0 M01_AXI RDATA [31:0] [63:32]" *) input [63:0]m_axi_rdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI RRESP [1:0] [1:0], xilinx.com:interface:aximm:1.0 M01_AXI RRESP [1:0] [3:2]" *) input [3:0]m_axi_rresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI RVALID [0:0] [0:0], xilinx.com:interface:aximm:1.0 M01_AXI RVALID [0:0] [1:1]" *) input [1:0]m_axi_rvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 M00_AXI RREADY [0:0] [0:0], xilinx.com:interface:aximm:1.0 M01_AXI RREADY [0:0] [1:1]" *) output [1:0]m_axi_rready;

  wire \<const0> ;
  wire aclk;
  wire aresetn;
  wire [7:2]\^m_axi_araddr ;
  wire [1:0]m_axi_arready;
  wire [1:0]m_axi_arvalid;
  wire [1:0]m_axi_awready;
  wire [1:0]m_axi_awvalid;
  wire [1:0]m_axi_bready;
  wire [1:0]m_axi_bvalid;
  wire [63:0]m_axi_rdata;
  wire [1:0]m_axi_rready;
  wire [1:0]m_axi_rvalid;
  wire [1:0]m_axi_wready;
  wire [1:0]m_axi_wvalid;
  wire [12:0]s_axi_araddr;
  wire [0:0]s_axi_arready;
  wire [0:0]s_axi_arvalid;
  wire [12:0]s_axi_awaddr;
  wire [0:0]s_axi_awready;
  wire [0:0]s_axi_awvalid;
  wire [0:0]s_axi_bready;
  wire [0:0]s_axi_bvalid;
  wire [31:0]s_axi_rdata;
  wire [0:0]s_axi_rready;
  wire [0:0]s_axi_rvalid;
  wire [31:0]s_axi_wdata;
  wire [0:0]s_axi_wready;
  wire [0:0]s_axi_wvalid;

  assign m_axi_araddr[25] = \<const0> ;
  assign m_axi_araddr[24] = \<const0> ;
  assign m_axi_araddr[23] = \<const0> ;
  assign m_axi_araddr[22] = \<const0> ;
  assign m_axi_araddr[21] = \<const0> ;
  assign m_axi_araddr[20] = \<const0> ;
  assign m_axi_araddr[19:15] = \^m_axi_araddr [6:2];
  assign m_axi_araddr[14] = \<const0> ;
  assign m_axi_araddr[13] = \<const0> ;
  assign m_axi_araddr[12] = \<const0> ;
  assign m_axi_araddr[11] = \<const0> ;
  assign m_axi_araddr[10] = \<const0> ;
  assign m_axi_araddr[9] = \<const0> ;
  assign m_axi_araddr[8] = \<const0> ;
  assign m_axi_araddr[7:2] = \^m_axi_araddr [7:2];
  assign m_axi_araddr[1] = \<const0> ;
  assign m_axi_araddr[0] = \<const0> ;
  assign m_axi_arprot[5] = \<const0> ;
  assign m_axi_arprot[4] = \<const0> ;
  assign m_axi_arprot[3] = \<const0> ;
  assign m_axi_arprot[2] = \<const0> ;
  assign m_axi_arprot[1] = \<const0> ;
  assign m_axi_arprot[0] = \<const0> ;
  assign m_axi_awaddr[25] = \<const0> ;
  assign m_axi_awaddr[24] = \<const0> ;
  assign m_axi_awaddr[23] = \<const0> ;
  assign m_axi_awaddr[22] = \<const0> ;
  assign m_axi_awaddr[21] = \<const0> ;
  assign m_axi_awaddr[20] = \<const0> ;
  assign m_axi_awaddr[19:15] = \^m_axi_araddr [6:2];
  assign m_axi_awaddr[14] = \<const0> ;
  assign m_axi_awaddr[13] = \<const0> ;
  assign m_axi_awaddr[12] = \<const0> ;
  assign m_axi_awaddr[11] = \<const0> ;
  assign m_axi_awaddr[10] = \<const0> ;
  assign m_axi_awaddr[9] = \<const0> ;
  assign m_axi_awaddr[8] = \<const0> ;
  assign m_axi_awaddr[7:2] = \^m_axi_araddr [7:2];
  assign m_axi_awaddr[1] = \<const0> ;
  assign m_axi_awaddr[0] = \<const0> ;
  assign m_axi_awprot[5] = \<const0> ;
  assign m_axi_awprot[4] = \<const0> ;
  assign m_axi_awprot[3] = \<const0> ;
  assign m_axi_awprot[2] = \<const0> ;
  assign m_axi_awprot[1] = \<const0> ;
  assign m_axi_awprot[0] = \<const0> ;
  assign m_axi_wdata[63:32] = s_axi_wdata;
  assign m_axi_wdata[31:27] = s_axi_wdata[31:27];
  assign m_axi_wdata[26] = \<const0> ;
  assign m_axi_wdata[25] = \<const0> ;
  assign m_axi_wdata[24] = \<const0> ;
  assign m_axi_wdata[23:0] = s_axi_wdata[23:0];
  assign m_axi_wstrb[7] = \<const0> ;
  assign m_axi_wstrb[6] = \<const0> ;
  assign m_axi_wstrb[5] = \<const0> ;
  assign m_axi_wstrb[4] = \<const0> ;
  assign m_axi_wstrb[3] = \<const0> ;
  assign m_axi_wstrb[2] = \<const0> ;
  assign m_axi_wstrb[1] = \<const0> ;
  assign m_axi_wstrb[0] = \<const0> ;
  assign s_axi_bresp[1] = \<const0> ;
  assign s_axi_bresp[0] = \<const0> ;
  assign s_axi_rresp[1] = \<const0> ;
  assign s_axi_rresp[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_axi_crossbar_v2_1_34_axi_crossbar inst
       (.aclk(aclk),
        .aresetn(aresetn),
        .m_axi_araddr({\^m_axi_araddr [6:2],\^m_axi_araddr [7]}),
        .m_axi_arready(m_axi_arready),
        .m_axi_arvalid(m_axi_arvalid),
        .m_axi_awready(m_axi_awready),
        .m_axi_awvalid(m_axi_awvalid),
        .m_axi_bready(m_axi_bready),
        .m_axi_bvalid(m_axi_bvalid),
        .m_axi_rdata(m_axi_rdata),
        .m_axi_rready(m_axi_rready),
        .m_axi_rvalid(m_axi_rvalid),
        .m_axi_wready(m_axi_wready),
        .m_axi_wvalid(m_axi_wvalid),
        .s_axi_araddr({s_axi_araddr[12],s_axi_araddr[7:2]}),
        .s_axi_arready(s_axi_arready),
        .s_axi_arvalid(s_axi_arvalid),
        .s_axi_awaddr({s_axi_awaddr[12],s_axi_awaddr[7:2]}),
        .s_axi_awready(s_axi_awready),
        .s_axi_awvalid(s_axi_awvalid),
        .s_axi_bready(s_axi_bready),
        .s_axi_bvalid(s_axi_bvalid),
        .s_axi_rdata(s_axi_rdata),
        .s_axi_rready(s_axi_rready),
        .s_axi_rvalid(s_axi_rvalid),
        .s_axi_wready(s_axi_wready),
        .s_axi_wvalid(s_axi_wvalid));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_cdc_sync
   (lpf_exr_reg,
    scndry_out,
    lpf_exr,
    p_1_in4_in,
    p_2_in3_in,
    exr_lpf,
    ext_reset_in,
    slowest_sync_clk);
  output lpf_exr_reg;
  output scndry_out;
  input lpf_exr;
  input p_1_in4_in;
  input p_2_in3_in;
  input [0:0]exr_lpf;
  input ext_reset_in;
  input slowest_sync_clk;

  wire \GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.s_level_out_d2 ;
  wire \GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.s_level_out_d3 ;
  wire Q;
  wire exr_d1;
  wire [0:0]exr_lpf;
  wire ext_reset_in;
  wire lpf_exr;
  wire lpf_exr_reg;
  wire p_1_in4_in;
  wire p_2_in3_in;
  wire scndry_out;
  wire slowest_sync_clk;

  (* ASYNC_REG *) 
  (* XILINX_LEGACY_PRIM = "FDR" *) 
  (* XILINX_TRANSFORM_PINMAP = "VCC:CE" *) 
  (* box_type = "PRIMITIVE" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.CROSS_PLEVEL_IN2SCNDRY_IN_cdc_to 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(exr_d1),
        .Q(Q),
        .R(1'b0));
  LUT1 #(
    .INIT(2'h1)) 
    \GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.CROSS_PLEVEL_IN2SCNDRY_IN_cdc_to_i_1 
       (.I0(ext_reset_in),
        .O(exr_d1));
  (* ASYNC_REG *) 
  (* XILINX_LEGACY_PRIM = "FDR" *) 
  (* XILINX_TRANSFORM_PINMAP = "VCC:CE" *) 
  (* box_type = "PRIMITIVE" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.CROSS_PLEVEL_IN2SCNDRY_s_level_out_d2 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(Q),
        .Q(\GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.s_level_out_d2 ),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* XILINX_LEGACY_PRIM = "FDR" *) 
  (* XILINX_TRANSFORM_PINMAP = "VCC:CE" *) 
  (* box_type = "PRIMITIVE" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.CROSS_PLEVEL_IN2SCNDRY_s_level_out_d3 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(\GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.s_level_out_d2 ),
        .Q(\GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.s_level_out_d3 ),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* XILINX_LEGACY_PRIM = "FDR" *) 
  (* XILINX_TRANSFORM_PINMAP = "VCC:CE" *) 
  (* box_type = "PRIMITIVE" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.CROSS_PLEVEL_IN2SCNDRY_s_level_out_d4 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(\GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.s_level_out_d3 ),
        .Q(scndry_out),
        .R(1'b0));
  LUT5 #(
    .INIT(32'hEAAAAAA8)) 
    lpf_exr_i_1
       (.I0(lpf_exr),
        .I1(p_1_in4_in),
        .I2(p_2_in3_in),
        .I3(scndry_out),
        .I4(exr_lpf),
        .O(lpf_exr_reg));
endmodule

(* CHECK_LICENSE_TYPE = "design_1_Vsp_core_0_0,Vsp_core,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* ip_definition_source = "package_project" *) 
(* x_core_info = "Vsp_core,Vivado 2024.2" *) 
(* NotValidForBitStream *)
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix
   (aresetn,
    aclk,
    memclk,
    apuAXIL_araddr,
    apuAXIL_arprot,
    apuAXIL_arready,
    apuAXIL_arvalid,
    apuAXIL_rdata,
    apuAXIL_rready,
    apuAXIL_rresp,
    apuAXIL_rvalid,
    apuAXIL_rlast,
    apuAXIL_awaddr,
    apuAXIL_awprot,
    apuAXIL_awready,
    apuAXIL_awvalid,
    apuAXIL_wdata,
    apuAXIL_wready,
    apuAXIL_wstrb,
    apuAXIL_wvalid,
    apuAXIL_bready,
    apuAXIL_bresp,
    apuAXIL_bvalid,
    rpuAXIL_araddr,
    rpuAXIL_arprot,
    rpuAXIL_arready,
    rpuAXIL_arvalid,
    rpuAXIL_rdata,
    rpuAXIL_rready,
    rpuAXIL_rresp,
    rpuAXIL_rvalid,
    rpuAXIL_rlast,
    rpuAXIL_awaddr,
    rpuAXIL_awprot,
    rpuAXIL_awready,
    rpuAXIL_awvalid,
    rpuAXIL_wdata,
    rpuAXIL_wready,
    rpuAXIL_wstrb,
    rpuAXIL_wvalid,
    rpuAXIL_bready,
    rpuAXIL_bresp,
    rpuAXIL_bvalid,
    ddrAXI_rready,
    ddrAXI_wvalid,
    probe,
    scl,
    sda,
    csi_clk_p,
    csi_clk_n,
    csi_d0_p,
    csi_d0_n,
    csi_d1_p,
    csi_d1_n,
    csi_d2_p,
    csi_d2_n,
    csi_d3_p,
    csi_d3_n,
    ddrAXI_arid,
    ddrAXI_araddr,
    ddrAXI_arburst,
    ddrAXI_arcache,
    ddrAXI_arlen,
    ddrAXI_arlock,
    ddrAXI_arprot,
    ddrAXI_arqos,
    ddrAXI_arready,
    ddrAXI_arregion,
    ddrAXI_arsize,
    ddrAXI_arvalid,
    ddrAXI_rid,
    ddrAXI_rdata,
    ddrAXI_rlast,
    ddrAXI_rresp,
    ddrAXI_rvalid,
    ddrAXI_awid,
    ddrAXI_awaddr,
    ddrAXI_awburst,
    ddrAXI_awcache,
    ddrAXI_awlen,
    ddrAXI_awlock,
    ddrAXI_awprot,
    ddrAXI_awqos,
    ddrAXI_awready,
    ddrAXI_awregion,
    ddrAXI_awsize,
    ddrAXI_awvalid,
    ddrAXI_wdata,
    ddrAXI_wlast,
    ddrAXI_wready,
    ddrAXI_wstrb,
    ddrAXI_bid,
    ddrAXI_bready,
    ddrAXI_bresp,
    ddrAXI_bvalid,
    cs,
    sclk,
    mosi,
    rgb0_r,
    rgb0_g,
    rgb0_b,
    rgb1_r,
    rgb1_g,
    rgb1_b,
    nslp,
    m0,
    m0z,
    m1,
    m1z,
    dir,
    step);
  (* x_interface_info = "xilinx.com:signal:reset:1.0 aresetn RST" *) (* x_interface_mode = "slave aresetn" *) (* x_interface_parameter = "XIL_INTERFACENAME aresetn, POLARITY ACTIVE_LOW, INSERT_VIP 0" *) input aresetn;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 aclk CLK" *) (* x_interface_mode = "slave aclk" *) (* x_interface_parameter = "XIL_INTERFACENAME aclk, ASSOCIATED_BUSIF apuAXIL:rpuAXIL, FREQ_HZ 200000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, CLK_DOMAIN design_1_zynq_ultra_ps_e_0_0_pl_clk0, INSERT_VIP 0" *) input aclk;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 memclk CLK" *) (* x_interface_mode = "slave memclk" *) (* x_interface_parameter = "XIL_INTERFACENAME memclk, ASSOCIATED_BUSIF ddrAXI, FREQ_HZ 325000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, CLK_DOMAIN design_1_zynq_ultra_ps_e_0_0_pl_clk1, INSERT_VIP 0" *) input memclk;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL ARADDR" *) (* x_interface_mode = "slave apuAXIL" *) (* x_interface_parameter = "XIL_INTERFACENAME apuAXIL, DATA_WIDTH 64, PROTOCOL AXI4LITE, FREQ_HZ 200000000, ID_WIDTH 0, ADDR_WIDTH 40, AWUSER_WIDTH 0, ARUSER_WIDTH 0, WUSER_WIDTH 0, RUSER_WIDTH 0, BUSER_WIDTH 0, READ_WRITE_MODE READ_WRITE, HAS_BURST 0, HAS_LOCK 0, HAS_PROT 1, HAS_CACHE 0, HAS_QOS 0, HAS_REGION 0, HAS_WSTRB 1, HAS_BRESP 1, HAS_RRESP 1, SUPPORTS_NARROW_BURST 0, NUM_READ_OUTSTANDING 1, NUM_WRITE_OUTSTANDING 1, MAX_BURST_LENGTH 1, PHASE 0.0, CLK_DOMAIN design_1_zynq_ultra_ps_e_0_0_pl_clk0, NUM_READ_THREADS 4, NUM_WRITE_THREADS 4, RUSER_BITS_PER_BYTE 0, WUSER_BITS_PER_BYTE 0, INSERT_VIP 0" *) input [39:0]apuAXIL_araddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL ARPROT" *) input [2:0]apuAXIL_arprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL ARREADY" *) output apuAXIL_arready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL ARVALID" *) input apuAXIL_arvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL RDATA" *) output [63:0]apuAXIL_rdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL RREADY" *) input apuAXIL_rready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL RRESP" *) output [1:0]apuAXIL_rresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL RVALID" *) output apuAXIL_rvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL RLAST" *) output apuAXIL_rlast;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL AWADDR" *) input [39:0]apuAXIL_awaddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL AWPROT" *) input [2:0]apuAXIL_awprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL AWREADY" *) output apuAXIL_awready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL AWVALID" *) input apuAXIL_awvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL WDATA" *) input [63:0]apuAXIL_wdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL WREADY" *) output apuAXIL_wready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL WSTRB" *) input [7:0]apuAXIL_wstrb;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL WVALID" *) input apuAXIL_wvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL BREADY" *) input apuAXIL_bready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL BRESP" *) output [1:0]apuAXIL_bresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 apuAXIL BVALID" *) output apuAXIL_bvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL ARADDR" *) (* x_interface_mode = "slave rpuAXIL" *) (* x_interface_parameter = "XIL_INTERFACENAME rpuAXIL, DATA_WIDTH 32, PROTOCOL AXI4LITE, FREQ_HZ 200000000, ID_WIDTH 0, ADDR_WIDTH 32, AWUSER_WIDTH 0, ARUSER_WIDTH 0, WUSER_WIDTH 0, RUSER_WIDTH 0, BUSER_WIDTH 0, READ_WRITE_MODE READ_WRITE, HAS_BURST 0, HAS_LOCK 0, HAS_PROT 1, HAS_CACHE 0, HAS_QOS 0, HAS_REGION 0, HAS_WSTRB 1, HAS_BRESP 1, HAS_RRESP 1, SUPPORTS_NARROW_BURST 0, MAX_BURST_LENGTH 1, PHASE 0.0, CLK_DOMAIN design_1_zynq_ultra_ps_e_0_0_pl_clk0, NUM_READ_THREADS 4, NUM_WRITE_THREADS 4, RUSER_BITS_PER_BYTE 0, WUSER_BITS_PER_BYTE 0, INSERT_VIP 0" *) input [31:0]rpuAXIL_araddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL ARPROT" *) input [2:0]rpuAXIL_arprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL ARREADY" *) output rpuAXIL_arready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL ARVALID" *) input rpuAXIL_arvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL RDATA" *) output [31:0]rpuAXIL_rdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL RREADY" *) input rpuAXIL_rready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL RRESP" *) output [1:0]rpuAXIL_rresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL RVALID" *) output rpuAXIL_rvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL RLAST" *) output rpuAXIL_rlast;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL AWADDR" *) input [31:0]rpuAXIL_awaddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL AWPROT" *) input [2:0]rpuAXIL_awprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL AWREADY" *) output rpuAXIL_awready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL AWVALID" *) input rpuAXIL_awvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL WDATA" *) input [31:0]rpuAXIL_wdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL WREADY" *) output rpuAXIL_wready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL WSTRB" *) input [3:0]rpuAXIL_wstrb;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL WVALID" *) input rpuAXIL_wvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL BREADY" *) input rpuAXIL_bready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL BRESP" *) output [1:0]rpuAXIL_bresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 rpuAXIL BVALID" *) output rpuAXIL_bvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI RREADY" *) (* x_interface_mode = "master ddrAXI" *) (* x_interface_parameter = "XIL_INTERFACENAME ddrAXI, DATA_WIDTH 128, PROTOCOL AXI4, FREQ_HZ 325000000, ID_WIDTH 6, ADDR_WIDTH 40, AWUSER_WIDTH 0, ARUSER_WIDTH 0, WUSER_WIDTH 0, RUSER_WIDTH 0, BUSER_WIDTH 0, READ_WRITE_MODE READ_WRITE, HAS_BURST 1, HAS_LOCK 1, HAS_PROT 1, HAS_CACHE 1, HAS_QOS 1, HAS_REGION 1, HAS_WSTRB 1, HAS_BRESP 1, HAS_RRESP 1, SUPPORTS_NARROW_BURST 1, NUM_READ_OUTSTANDING 2, NUM_WRITE_OUTSTANDING 2, MAX_BURST_LENGTH 256, PHASE 0.0, CLK_DOMAIN design_1_zynq_ultra_ps_e_0_0_pl_clk1, NUM_READ_THREADS 1, NUM_WRITE_THREADS 1, RUSER_BITS_PER_BYTE 0, WUSER_BITS_PER_BYTE 0, INSERT_VIP 0" *) output ddrAXI_rready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI WVALID" *) output ddrAXI_wvalid;
  output [5:0]probe;
  inout scl;
  inout sda;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 csi_clk_p CLK" *) (* x_interface_mode = "slave csi_clk_p" *) (* x_interface_parameter = "XIL_INTERFACENAME csi_clk_p, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, CLK_DOMAIN design_1_csi_clk_p_0, INSERT_VIP 0" *) input csi_clk_p;
  (* x_interface_info = "xilinx.com:signal:clock:1.0 csi_clk_n CLK" *) (* x_interface_mode = "slave csi_clk_n" *) (* x_interface_parameter = "XIL_INTERFACENAME csi_clk_n, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, CLK_DOMAIN design_1_csi_clk_n_0, INSERT_VIP 0" *) input csi_clk_n;
  input csi_d0_p;
  input csi_d0_n;
  input csi_d1_p;
  input csi_d1_n;
  input csi_d2_p;
  input csi_d2_n;
  input csi_d3_p;
  input csi_d3_n;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARID" *) output [5:0]ddrAXI_arid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARADDR" *) output [39:0]ddrAXI_araddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARBURST" *) output [1:0]ddrAXI_arburst;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARCACHE" *) output [3:0]ddrAXI_arcache;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARLEN" *) output [7:0]ddrAXI_arlen;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARLOCK" *) output [0:0]ddrAXI_arlock;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARPROT" *) output [2:0]ddrAXI_arprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARQOS" *) output [3:0]ddrAXI_arqos;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARREADY" *) input ddrAXI_arready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARREGION" *) output [3:0]ddrAXI_arregion;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARSIZE" *) output [2:0]ddrAXI_arsize;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI ARVALID" *) output ddrAXI_arvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI RID" *) input [5:0]ddrAXI_rid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI RDATA" *) input [127:0]ddrAXI_rdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI RLAST" *) input ddrAXI_rlast;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI RRESP" *) input [1:0]ddrAXI_rresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI RVALID" *) input ddrAXI_rvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWID" *) output [5:0]ddrAXI_awid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWADDR" *) output [39:0]ddrAXI_awaddr;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWBURST" *) output [1:0]ddrAXI_awburst;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWCACHE" *) output [3:0]ddrAXI_awcache;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWLEN" *) output [7:0]ddrAXI_awlen;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWLOCK" *) output [0:0]ddrAXI_awlock;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWPROT" *) output [2:0]ddrAXI_awprot;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWQOS" *) output [3:0]ddrAXI_awqos;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWREADY" *) input ddrAXI_awready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWREGION" *) output [3:0]ddrAXI_awregion;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWSIZE" *) output [2:0]ddrAXI_awsize;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI AWVALID" *) output ddrAXI_awvalid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI WDATA" *) output [127:0]ddrAXI_wdata;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI WLAST" *) output ddrAXI_wlast;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI WREADY" *) input ddrAXI_wready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI WSTRB" *) output [15:0]ddrAXI_wstrb;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI BID" *) input [5:0]ddrAXI_bid;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI BREADY" *) output ddrAXI_bready;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI BRESP" *) input [1:0]ddrAXI_bresp;
  (* x_interface_info = "xilinx.com:interface:aximm:1.0 ddrAXI BVALID" *) input ddrAXI_bvalid;
  output cs;
  output sclk;
  output mosi;
  output rgb0_r;
  output rgb0_g;
  output rgb0_b;
  output rgb1_r;
  output rgb1_g;
  output rgb1_b;
  output nslp;
  output m0;
  output m0z;
  output m1;
  output m1z;
  output dir;
  output step;

  wire \<const0> ;
  wire \<const1> ;
  wire U0_n_118;
  wire U0_n_119;
  wire U0_n_120;
  wire U0_n_121;
  wire U0_n_122;
  wire U0_n_123;
  wire U0_n_124;
  wire U0_n_125;
  wire aclk;
  wire [39:0]apuAXIL_araddr;
  wire apuAXIL_arready;
  wire apuAXIL_arvalid;
  wire [39:0]apuAXIL_awaddr;
  wire apuAXIL_awready;
  wire apuAXIL_awvalid;
  wire apuAXIL_bready;
  wire apuAXIL_bvalid;
  wire [63:0]apuAXIL_rdata;
  wire apuAXIL_rready;
  wire apuAXIL_rvalid;
  wire [63:0]apuAXIL_wdata;
  wire apuAXIL_wready;
  wire [7:0]apuAXIL_wstrb;
  wire apuAXIL_wvalid;
  wire aresetn;
  wire cs;
  (* DIFF_TERM_ADV = "TERM_100" *) (* IOSTANDARD = "MIPI_DPHY_DCI" *) wire csi_clk_n;
  (* DIFF_TERM_ADV = "TERM_100" *) (* IOSTANDARD = "MIPI_DPHY_DCI" *) wire csi_clk_p;
  (* DIFF_TERM_ADV = "TERM_100" *) (* IOSTANDARD = "MIPI_DPHY_DCI" *) wire csi_d0_n;
  (* DIFF_TERM_ADV = "TERM_100" *) (* IOSTANDARD = "MIPI_DPHY_DCI" *) wire csi_d0_p;
  (* DIFF_TERM_ADV = "TERM_100" *) (* IOSTANDARD = "MIPI_DPHY_DCI" *) wire csi_d1_n;
  (* DIFF_TERM_ADV = "TERM_100" *) (* IOSTANDARD = "MIPI_DPHY_DCI" *) wire csi_d1_p;
  (* DIFF_TERM_ADV = "TERM_100" *) (* IOSTANDARD = "MIPI_DPHY_DCI" *) wire csi_d2_n;
  (* DIFF_TERM_ADV = "TERM_100" *) (* IOSTANDARD = "MIPI_DPHY_DCI" *) wire csi_d2_p;
  (* DIFF_TERM_ADV = "TERM_100" *) (* IOSTANDARD = "MIPI_DPHY_DCI" *) wire csi_d3_n;
  (* DIFF_TERM_ADV = "TERM_100" *) (* IOSTANDARD = "MIPI_DPHY_DCI" *) wire csi_d3_p;
  wire [29:8]\^ddrAXI_araddr ;
  wire ddrAXI_arready;
  wire ddrAXI_arvalid;
  wire [29:8]\^ddrAXI_awaddr ;
  wire ddrAXI_awready;
  wire ddrAXI_awvalid;
  wire ddrAXI_bready;
  wire ddrAXI_bvalid;
  wire [127:0]ddrAXI_rdata;
  wire ddrAXI_rlast;
  wire ddrAXI_rready;
  wire ddrAXI_rvalid;
  wire [127:0]ddrAXI_wdata;
  wire ddrAXI_wlast;
  wire ddrAXI_wready;
  wire ddrAXI_wvalid;
  wire dir;
  wire m0;
  wire m0z;
  wire memclk;
  wire mosi;
  wire \myDecim/decimLast_reg[8]_i_1_n_0 ;
  wire \myDecim/decimLast_reg[8]_i_1_n_1 ;
  wire \myDecim/decimLast_reg[8]_i_1_n_2 ;
  wire \myDecim/decimLast_reg[8]_i_1_n_3 ;
  wire \myDecim/decimLast_reg[8]_i_1_n_4 ;
  wire \myDecim/decimLast_reg[8]_i_1_n_5 ;
  wire \myDecim/decimLast_reg[8]_i_1_n_6 ;
  wire \myDecim/decimLast_reg[8]_i_1_n_7 ;
  wire [8:1]\myDecim/minusOp ;
  wire nslp;
  wire [5:0]\^probe ;
  wire rgb0_b;
  wire rgb0_g;
  wire rgb0_r;
  wire [31:0]rpuAXIL_araddr;
  wire rpuAXIL_arready;
  wire rpuAXIL_arvalid;
  wire [31:0]rpuAXIL_awaddr;
  wire rpuAXIL_awready;
  wire rpuAXIL_awvalid;
  wire rpuAXIL_bready;
  wire rpuAXIL_bvalid;
  wire [31:0]rpuAXIL_rdata;
  wire rpuAXIL_rready;
  wire rpuAXIL_rvalid;
  wire [31:0]rpuAXIL_wdata;
  wire rpuAXIL_wready;
  wire [3:0]rpuAXIL_wstrb;
  wire rpuAXIL_wvalid;
  (* DRIVE = "8" *) (* IBUF_LOW_PWR *) (* SLEW = "SLOW" *) wire scl;
  wire sclk;
  (* DRIVE = "8" *) (* IBUF_LOW_PWR *) (* SLEW = "SLOW" *) wire sda;
  wire [8:0]setCoreregVal;
  wire step;

  assign apuAXIL_bresp[1] = \<const0> ;
  assign apuAXIL_bresp[0] = \<const0> ;
  assign apuAXIL_rlast = \<const1> ;
  assign apuAXIL_rresp[1] = \<const0> ;
  assign apuAXIL_rresp[0] = \<const0> ;
  assign ddrAXI_araddr[39] = \<const0> ;
  assign ddrAXI_araddr[38] = \<const0> ;
  assign ddrAXI_araddr[37] = \<const0> ;
  assign ddrAXI_araddr[36] = \<const0> ;
  assign ddrAXI_araddr[35] = \<const0> ;
  assign ddrAXI_araddr[34] = \<const0> ;
  assign ddrAXI_araddr[33] = \<const0> ;
  assign ddrAXI_araddr[32] = \<const0> ;
  assign ddrAXI_araddr[31] = \<const0> ;
  assign ddrAXI_araddr[30] = \<const0> ;
  assign ddrAXI_araddr[29] = \^ddrAXI_araddr [29];
  assign ddrAXI_araddr[28] = \^ddrAXI_araddr [29];
  assign ddrAXI_araddr[27:8] = \^ddrAXI_araddr [27:8];
  assign ddrAXI_araddr[7] = \<const0> ;
  assign ddrAXI_araddr[6] = \<const0> ;
  assign ddrAXI_araddr[5] = \<const0> ;
  assign ddrAXI_araddr[4] = \<const0> ;
  assign ddrAXI_araddr[3] = \<const0> ;
  assign ddrAXI_araddr[2] = \<const0> ;
  assign ddrAXI_araddr[1] = \<const0> ;
  assign ddrAXI_araddr[0] = \<const0> ;
  assign ddrAXI_arburst[1] = \<const0> ;
  assign ddrAXI_arburst[0] = \<const1> ;
  assign ddrAXI_arcache[3] = \<const0> ;
  assign ddrAXI_arcache[2] = \<const0> ;
  assign ddrAXI_arcache[1] = \<const0> ;
  assign ddrAXI_arcache[0] = \<const0> ;
  assign ddrAXI_arid[5] = \<const0> ;
  assign ddrAXI_arid[4] = \<const0> ;
  assign ddrAXI_arid[3] = \<const0> ;
  assign ddrAXI_arid[2] = \<const0> ;
  assign ddrAXI_arid[1] = \<const0> ;
  assign ddrAXI_arid[0] = \<const0> ;
  assign ddrAXI_arlen[7] = \<const0> ;
  assign ddrAXI_arlen[6] = \<const0> ;
  assign ddrAXI_arlen[5] = \<const0> ;
  assign ddrAXI_arlen[4] = \<const0> ;
  assign ddrAXI_arlen[3] = \<const1> ;
  assign ddrAXI_arlen[2] = \<const1> ;
  assign ddrAXI_arlen[1] = \<const1> ;
  assign ddrAXI_arlen[0] = \<const1> ;
  assign ddrAXI_arlock[0] = \<const0> ;
  assign ddrAXI_arprot[2] = \<const0> ;
  assign ddrAXI_arprot[1] = \<const1> ;
  assign ddrAXI_arprot[0] = \<const0> ;
  assign ddrAXI_arqos[3] = \<const1> ;
  assign ddrAXI_arqos[2] = \<const1> ;
  assign ddrAXI_arqos[1] = \<const0> ;
  assign ddrAXI_arqos[0] = \<const1> ;
  assign ddrAXI_arregion[3] = \<const0> ;
  assign ddrAXI_arregion[2] = \<const0> ;
  assign ddrAXI_arregion[1] = \<const0> ;
  assign ddrAXI_arregion[0] = \<const0> ;
  assign ddrAXI_arsize[2] = \<const1> ;
  assign ddrAXI_arsize[1] = \<const0> ;
  assign ddrAXI_arsize[0] = \<const0> ;
  assign ddrAXI_awaddr[39] = \<const0> ;
  assign ddrAXI_awaddr[38] = \<const0> ;
  assign ddrAXI_awaddr[37] = \<const0> ;
  assign ddrAXI_awaddr[36] = \<const0> ;
  assign ddrAXI_awaddr[35] = \<const0> ;
  assign ddrAXI_awaddr[34] = \<const0> ;
  assign ddrAXI_awaddr[33] = \<const0> ;
  assign ddrAXI_awaddr[32] = \<const0> ;
  assign ddrAXI_awaddr[31] = \<const0> ;
  assign ddrAXI_awaddr[30] = \<const0> ;
  assign ddrAXI_awaddr[29] = \^ddrAXI_awaddr [29];
  assign ddrAXI_awaddr[28] = \^ddrAXI_awaddr [29];
  assign ddrAXI_awaddr[27:8] = \^ddrAXI_awaddr [27:8];
  assign ddrAXI_awaddr[7] = \<const0> ;
  assign ddrAXI_awaddr[6] = \<const0> ;
  assign ddrAXI_awaddr[5] = \<const0> ;
  assign ddrAXI_awaddr[4] = \<const0> ;
  assign ddrAXI_awaddr[3] = \<const0> ;
  assign ddrAXI_awaddr[2] = \<const0> ;
  assign ddrAXI_awaddr[1] = \<const0> ;
  assign ddrAXI_awaddr[0] = \<const0> ;
  assign ddrAXI_awburst[1] = \<const0> ;
  assign ddrAXI_awburst[0] = \<const1> ;
  assign ddrAXI_awcache[3] = \<const0> ;
  assign ddrAXI_awcache[2] = \<const0> ;
  assign ddrAXI_awcache[1] = \<const0> ;
  assign ddrAXI_awcache[0] = \<const0> ;
  assign ddrAXI_awid[5] = \<const0> ;
  assign ddrAXI_awid[4] = \<const0> ;
  assign ddrAXI_awid[3] = \<const0> ;
  assign ddrAXI_awid[2] = \<const0> ;
  assign ddrAXI_awid[1] = \<const0> ;
  assign ddrAXI_awid[0] = \<const0> ;
  assign ddrAXI_awlen[7] = \<const0> ;
  assign ddrAXI_awlen[6] = \<const0> ;
  assign ddrAXI_awlen[5] = \<const0> ;
  assign ddrAXI_awlen[4] = \<const0> ;
  assign ddrAXI_awlen[3] = \<const1> ;
  assign ddrAXI_awlen[2] = \<const1> ;
  assign ddrAXI_awlen[1] = \<const1> ;
  assign ddrAXI_awlen[0] = \<const1> ;
  assign ddrAXI_awlock[0] = \<const0> ;
  assign ddrAXI_awprot[2] = \<const0> ;
  assign ddrAXI_awprot[1] = \<const1> ;
  assign ddrAXI_awprot[0] = \<const0> ;
  assign ddrAXI_awqos[3] = \<const1> ;
  assign ddrAXI_awqos[2] = \<const1> ;
  assign ddrAXI_awqos[1] = \<const0> ;
  assign ddrAXI_awqos[0] = \<const1> ;
  assign ddrAXI_awregion[3] = \<const0> ;
  assign ddrAXI_awregion[2] = \<const0> ;
  assign ddrAXI_awregion[1] = \<const0> ;
  assign ddrAXI_awregion[0] = \<const0> ;
  assign ddrAXI_awsize[2] = \<const1> ;
  assign ddrAXI_awsize[1] = \<const0> ;
  assign ddrAXI_awsize[0] = \<const0> ;
  assign ddrAXI_wstrb[15] = \<const1> ;
  assign ddrAXI_wstrb[14] = \<const1> ;
  assign ddrAXI_wstrb[13] = \<const1> ;
  assign ddrAXI_wstrb[12] = \<const1> ;
  assign ddrAXI_wstrb[11] = \<const1> ;
  assign ddrAXI_wstrb[10] = \<const1> ;
  assign ddrAXI_wstrb[9] = \<const1> ;
  assign ddrAXI_wstrb[8] = \<const1> ;
  assign ddrAXI_wstrb[7] = \<const1> ;
  assign ddrAXI_wstrb[6] = \<const1> ;
  assign ddrAXI_wstrb[5] = \<const1> ;
  assign ddrAXI_wstrb[4] = \<const1> ;
  assign ddrAXI_wstrb[3] = \<const1> ;
  assign ddrAXI_wstrb[2] = \<const1> ;
  assign ddrAXI_wstrb[1] = \<const1> ;
  assign ddrAXI_wstrb[0] = \<const1> ;
  assign m1 = \<const0> ;
  assign m1z = \<const0> ;
  assign probe[5] = \^probe [5];
  assign probe[4] = ddrAXI_arready;
  assign probe[3:0] = \^probe [3:0];
  assign rgb1_b = \<const0> ;
  assign rgb1_g = \<const0> ;
  assign rgb1_r = \<const0> ;
  assign rpuAXIL_bresp[1] = \<const0> ;
  assign rpuAXIL_bresp[0] = \<const0> ;
  assign rpuAXIL_rlast = \<const1> ;
  assign rpuAXIL_rresp[1] = \<const0> ;
  assign rpuAXIL_rresp[0] = \<const0> ;
  GND GND
       (.G(\<const0> ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_Vsp_core U0
       (.CO(\myDecim/decimLast_reg[8]_i_1_n_0 ),
        .D(\myDecim/minusOp ),
        .S({U0_n_118,U0_n_119,U0_n_120,U0_n_121,U0_n_122,U0_n_123,U0_n_124,U0_n_125}),
        .aclk(aclk),
        .apuAXIL_araddr(apuAXIL_araddr[5:4]),
        .apuAXIL_arready(apuAXIL_arready),
        .apuAXIL_arvalid(apuAXIL_arvalid),
        .apuAXIL_awaddr(apuAXIL_awaddr[5:4]),
        .apuAXIL_awready(apuAXIL_awready),
        .apuAXIL_awvalid(apuAXIL_awvalid),
        .apuAXIL_bready(apuAXIL_bready),
        .apuAXIL_bvalid(apuAXIL_bvalid),
        .apuAXIL_rdata(apuAXIL_rdata),
        .apuAXIL_rready(apuAXIL_rready),
        .apuAXIL_rvalid(apuAXIL_rvalid),
        .apuAXIL_wdata(apuAXIL_wdata),
        .apuAXIL_wready(apuAXIL_wready),
        .apuAXIL_wstrb(apuAXIL_wstrb),
        .apuAXIL_wvalid(apuAXIL_wvalid),
        .aresetn(aresetn),
        .camifSetCoreregVal(setCoreregVal),
        .cs(cs),
        .csi_clk_n(csi_clk_n),
        .csi_clk_p(csi_clk_p),
        .ddrAXI_araddr({\^ddrAXI_araddr [29],\^ddrAXI_araddr [27:8]}),
        .ddrAXI_arready(ddrAXI_arready),
        .ddrAXI_arvalid(ddrAXI_arvalid),
        .ddrAXI_awaddr({\^ddrAXI_awaddr [29],\^ddrAXI_awaddr [27:8]}),
        .ddrAXI_awready(ddrAXI_awready),
        .ddrAXI_awvalid(ddrAXI_awvalid),
        .ddrAXI_bready(ddrAXI_bready),
        .ddrAXI_bvalid(ddrAXI_bvalid),
        .ddrAXI_rdata(ddrAXI_rdata),
        .ddrAXI_rlast(ddrAXI_rlast),
        .ddrAXI_rready(ddrAXI_rready),
        .ddrAXI_rvalid(ddrAXI_rvalid),
        .ddrAXI_wdata(ddrAXI_wdata),
        .ddrAXI_wlast(ddrAXI_wlast),
        .ddrAXI_wready(ddrAXI_wready),
        .ddrAXI_wvalid(ddrAXI_wvalid),
        .dir(dir),
        .m0(m0),
        .m0z(m0z),
        .memclk(memclk),
        .mipi_phy_if_data_n({csi_d3_n,csi_d2_n,csi_d1_n,csi_d0_n}),
        .mipi_phy_if_data_p({csi_d3_p,csi_d2_p,csi_d1_p,csi_d0_p}),
        .mosi(mosi),
        .nslp(nslp),
        .probe({\^probe [5],\^probe [3:2]}),
        .rgb0_b(rgb0_b),
        .rgb0_g(rgb0_g),
        .rgb0_r(rgb0_r),
        .rgbToManyAXIS_tlast_sig_reg(\^probe [1]),
        .rpuAXIL_araddr(rpuAXIL_araddr[5:4]),
        .rpuAXIL_arready(rpuAXIL_arready),
        .rpuAXIL_arvalid(rpuAXIL_arvalid),
        .rpuAXIL_awaddr(rpuAXIL_awaddr[5:4]),
        .rpuAXIL_awready(rpuAXIL_awready),
        .rpuAXIL_awvalid(rpuAXIL_awvalid),
        .rpuAXIL_bready(rpuAXIL_bready),
        .rpuAXIL_bvalid(rpuAXIL_bvalid),
        .rpuAXIL_rdata(rpuAXIL_rdata),
        .rpuAXIL_rready(rpuAXIL_rready),
        .rpuAXIL_rvalid(rpuAXIL_rvalid),
        .rpuAXIL_wdata(rpuAXIL_wdata),
        .rpuAXIL_wready(rpuAXIL_wready),
        .rpuAXIL_wstrb(rpuAXIL_wstrb),
        .rpuAXIL_wvalid(rpuAXIL_wvalid),
        .scl(scl),
        .sclk(sclk),
        .sda(sda),
        .step(step),
        .vsync(\^probe [0]));
  VCC VCC
       (.P(\<const1> ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \myDecim/decimLast_reg[8]_i_1 
       (.CI(setCoreregVal[0]),
        .CI_TOP(1'b0),
        .CO({\myDecim/decimLast_reg[8]_i_1_n_0 ,\myDecim/decimLast_reg[8]_i_1_n_1 ,\myDecim/decimLast_reg[8]_i_1_n_2 ,\myDecim/decimLast_reg[8]_i_1_n_3 ,\myDecim/decimLast_reg[8]_i_1_n_4 ,\myDecim/decimLast_reg[8]_i_1_n_5 ,\myDecim/decimLast_reg[8]_i_1_n_6 ,\myDecim/decimLast_reg[8]_i_1_n_7 }),
        .DI(setCoreregVal[8:1]),
        .O(\myDecim/minusOp ),
        .S({U0_n_118,U0_n_119,U0_n_120,U0_n_121,U0_n_122,U0_n_123,U0_n_124,U0_n_125}));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_bs_ctrl_top
   (\BITSLICE_CTRL[1].bs_ctrl_inst_0 ,
    n1_vtc_rdy_out,
    n0_vtc_rdy_out,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ,
    core_rdy,
    in0,
    n0_rx_bit_ctrl_out0,
    n0_rx_bit_ctrl_out2,
    n0_rx_bit_ctrl_out4,
    n0_tx_bit_ctrl_out0,
    n0_tx_bit_ctrl_out2,
    n0_tx_bit_ctrl_out4,
    n1_rx_bit_ctrl_out0,
    n1_rx_bit_ctrl_out2,
    n1_tx_bit_ctrl_out0,
    n1_tx_bit_ctrl_out2,
    Q,
    n1_en_vtc_in,
    pll0_clkoutphy_out,
    riu_clk,
    bsctrl_rst,
    rx_bs0_rx_bit_ctrl_out,
    rx_bs2_rx_bit_ctrl_out,
    rx_bs4_rx_bit_ctrl_out,
    rx_bs0_tx_bit_ctrl_out,
    rx_bs2_tx_bit_ctrl_out,
    rx_bs4_tx_bit_ctrl_out,
    n0_tbyte_in,
    rx_bs6_rx_bit_ctrl_out,
    rx_bs8_rx_bit_ctrl_out,
    rx_bs6_tx_bit_ctrl_out,
    rx_bs8_tx_bit_ctrl_out,
    n1_tbyte_in);
  output \BITSLICE_CTRL[1].bs_ctrl_inst_0 ;
  output n1_vtc_rdy_out;
  output n0_vtc_rdy_out;
  output \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ;
  output core_rdy;
  output [0:0]in0;
  output [39:0]n0_rx_bit_ctrl_out0;
  output [39:0]n0_rx_bit_ctrl_out2;
  output [39:0]n0_rx_bit_ctrl_out4;
  output [39:0]n0_tx_bit_ctrl_out0;
  output [39:0]n0_tx_bit_ctrl_out2;
  output [39:0]n0_tx_bit_ctrl_out4;
  output [39:0]n1_rx_bit_ctrl_out0;
  output [39:0]n1_rx_bit_ctrl_out2;
  output [39:0]n1_tx_bit_ctrl_out0;
  output [39:0]n1_tx_bit_ctrl_out2;
  input [0:0]Q;
  input n1_en_vtc_in;
  input pll0_clkoutphy_out;
  input riu_clk;
  input bsctrl_rst;
  input [39:0]rx_bs0_rx_bit_ctrl_out;
  input [39:0]rx_bs2_rx_bit_ctrl_out;
  input [39:0]rx_bs4_rx_bit_ctrl_out;
  input [39:0]rx_bs0_tx_bit_ctrl_out;
  input [39:0]rx_bs2_tx_bit_ctrl_out;
  input [39:0]rx_bs4_tx_bit_ctrl_out;
  input [3:0]n0_tbyte_in;
  input [39:0]rx_bs6_rx_bit_ctrl_out;
  input [39:0]rx_bs8_rx_bit_ctrl_out;
  input [39:0]rx_bs6_tx_bit_ctrl_out;
  input [39:0]rx_bs8_tx_bit_ctrl_out;
  input [3:0]n1_tbyte_in;

  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_10 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_11 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_12 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_13 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_14 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_15 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_16 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_17 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_18 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_19 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_2 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_20 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_21 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_22 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_263 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_264 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_265 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_266 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_267 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_268 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_269 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_270 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_271 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_272 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_273 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_274 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_275 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_276 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_277 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_278 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_279 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_280 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_281 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_282 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_283 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_284 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_285 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_286 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_287 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_288 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_289 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_290 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_291 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_292 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_293 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_294 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_295 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_296 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_297 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_298 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_299 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_300 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_301 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_302 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_5 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_543 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_544 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_545 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_546 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_547 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_548 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_549 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_550 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_551 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_552 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_553 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_554 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_555 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_556 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_557 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_558 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_559 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_560 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_561 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_562 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_563 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_564 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_565 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_566 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_567 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_568 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_569 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_570 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_571 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_572 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_573 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_574 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_575 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_576 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_577 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_578 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_579 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_580 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_581 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_582 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_7 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_8 ;
  wire \BITSLICE_CTRL[0].bs_ctrl_inst_n_9 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_0 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_10 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_11 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_12 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_13 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_14 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_15 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_16 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_17 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_18 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_19 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_2 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_20 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_21 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_22 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_5 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_7 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_8 ;
  wire \BITSLICE_CTRL[1].bs_ctrl_inst_n_9 ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ;
  wire [0:0]Q;
  wire bsctrl_rst;
  wire core_rdy;
  wire [0:0]in0;
  wire [39:0]n0_rx_bit_ctrl_out0;
  wire [39:0]n0_rx_bit_ctrl_out1;
  wire [39:0]n0_rx_bit_ctrl_out2;
  wire [39:0]n0_rx_bit_ctrl_out3;
  wire [39:0]n0_rx_bit_ctrl_out4;
  wire [39:0]n0_rx_bit_ctrl_out5;
  wire [3:0]n0_tbyte_in;
  wire [39:0]n0_tx_bit_ctrl_out0;
  wire [39:0]n0_tx_bit_ctrl_out1;
  wire [39:0]n0_tx_bit_ctrl_out2;
  wire [39:0]n0_tx_bit_ctrl_out3;
  wire [39:0]n0_tx_bit_ctrl_out4;
  wire [39:0]n0_tx_bit_ctrl_out5;
  wire [39:0]n0_tx_bit_ctrl_out_tri;
  wire n0_vtc_rdy_out;
  wire n1_en_vtc_in;
  wire [39:0]n1_rx_bit_ctrl_out0;
  wire [39:0]n1_rx_bit_ctrl_out1;
  wire [39:0]n1_rx_bit_ctrl_out2;
  wire [39:0]n1_rx_bit_ctrl_out3;
  wire [39:0]n1_rx_bit_ctrl_out4;
  wire [39:0]n1_rx_bit_ctrl_out5;
  wire [39:0]n1_rx_bit_ctrl_out6;
  wire [3:0]n1_tbyte_in;
  wire [39:0]n1_tx_bit_ctrl_out0;
  wire [39:0]n1_tx_bit_ctrl_out1;
  wire [39:0]n1_tx_bit_ctrl_out2;
  wire [39:0]n1_tx_bit_ctrl_out3;
  wire [39:0]n1_tx_bit_ctrl_out4;
  wire [39:0]n1_tx_bit_ctrl_out5;
  wire [39:0]n1_tx_bit_ctrl_out6;
  wire [39:0]n1_tx_bit_ctrl_out_tri;
  wire n1_vtc_rdy_out;
  wire [1:0]nclk_nibble_out;
  wire [1:0]pclk_nibble_out;
  wire pll0_clkoutphy_out;
  wire riu_clk;
  wire [39:0]rx_bs0_rx_bit_ctrl_out;
  wire [39:0]rx_bs0_tx_bit_ctrl_out;
  wire [39:0]rx_bs2_rx_bit_ctrl_out;
  wire [39:0]rx_bs2_tx_bit_ctrl_out;
  wire [39:0]rx_bs4_rx_bit_ctrl_out;
  wire [39:0]rx_bs4_tx_bit_ctrl_out;
  wire [39:0]rx_bs6_rx_bit_ctrl_out;
  wire [39:0]rx_bs6_tx_bit_ctrl_out;
  wire [39:0]rx_bs8_rx_bit_ctrl_out;
  wire [39:0]rx_bs8_tx_bit_ctrl_out;
  wire \NLW_BITSLICE_CTRL[0].bs_ctrl_inst_CLK_TO_EXT_NORTH_UNCONNECTED ;
  wire \NLW_BITSLICE_CTRL[0].bs_ctrl_inst_CLK_TO_EXT_SOUTH_UNCONNECTED ;
  wire [6:0]\NLW_BITSLICE_CTRL[0].bs_ctrl_inst_DYN_DCI_UNCONNECTED ;
  wire \NLW_BITSLICE_CTRL[1].bs_ctrl_inst_CLK_TO_EXT_NORTH_UNCONNECTED ;
  wire \NLW_BITSLICE_CTRL[1].bs_ctrl_inst_CLK_TO_EXT_SOUTH_UNCONNECTED ;
  wire [6:0]\NLW_BITSLICE_CTRL[1].bs_ctrl_inst_DYN_DCI_UNCONNECTED ;

  (* box_type = "PRIMITIVE" *) 
  BITSLICE_CONTROL #(
    .CTRL_CLK("EXTERNAL"),
    .DIV_MODE("DIV4"),
    .EN_CLK_TO_EXT_NORTH("DISABLE"),
    .EN_CLK_TO_EXT_SOUTH("DISABLE"),
    .EN_DYN_ODLY_MODE("FALSE"),
    .EN_OTHER_NCLK("FALSE"),
    .EN_OTHER_PCLK("FALSE"),
    .IDLY_VT_TRACK("TRUE"),
    .INV_RXCLK("FALSE"),
    .ODLY_VT_TRACK("TRUE"),
    .QDLY_VT_TRACK("TRUE"),
    .READ_IDLE_COUNT(6'h00),
    .REFCLK_SRC("PLLCLK"),
    .ROUNDING_FACTOR(16),
    .RXGATE_EXTEND("FALSE"),
    .RX_CLK_PHASE_N("SHIFT_0"),
    .RX_CLK_PHASE_P("SHIFT_0"),
    .RX_GATING("DISABLE"),
    .SELF_CALIBRATE("ENABLE"),
    .SERIAL_MODE("FALSE"),
    .SIM_DEVICE("ULTRASCALE_PLUS_ES1"),
    .SIM_SPEEDUP("FAST"),
    .SIM_VERSION(2.000000),
    .TX_GATING("DISABLE")) 
    \BITSLICE_CTRL[0].bs_ctrl_inst 
       (.CLK_FROM_EXT(1'b1),
        .CLK_TO_EXT_NORTH(\NLW_BITSLICE_CTRL[0].bs_ctrl_inst_CLK_TO_EXT_NORTH_UNCONNECTED ),
        .CLK_TO_EXT_SOUTH(\NLW_BITSLICE_CTRL[0].bs_ctrl_inst_CLK_TO_EXT_SOUTH_UNCONNECTED ),
        .DLY_RDY(\BITSLICE_CTRL[0].bs_ctrl_inst_n_2 ),
        .DYN_DCI(\NLW_BITSLICE_CTRL[0].bs_ctrl_inst_DYN_DCI_UNCONNECTED [6:0]),
        .EN_VTC(n1_en_vtc_in),
        .NCLK_NIBBLE_IN(nclk_nibble_out[1]),
        .NCLK_NIBBLE_OUT(nclk_nibble_out[0]),
        .PCLK_NIBBLE_IN(pclk_nibble_out[1]),
        .PCLK_NIBBLE_OUT(pclk_nibble_out[0]),
        .PHY_RDCS0({1'b0,1'b0,1'b0,1'b0}),
        .PHY_RDCS1({1'b0,1'b0,1'b0,1'b0}),
        .PHY_RDEN({1'b1,1'b1,1'b1,1'b1}),
        .PHY_WRCS0({1'b0,1'b0,1'b0,1'b0}),
        .PHY_WRCS1({1'b0,1'b0,1'b0,1'b0}),
        .PLL_CLK(pll0_clkoutphy_out),
        .REFCLK(1'b0),
        .RIU_ADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RIU_CLK(riu_clk),
        .RIU_NIBBLE_SEL(1'b0),
        .RIU_RD_DATA({\BITSLICE_CTRL[0].bs_ctrl_inst_n_7 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_8 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_9 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_10 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_11 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_12 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_13 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_14 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_15 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_16 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_17 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_18 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_19 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_20 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_21 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_22 }),
        .RIU_VALID(\BITSLICE_CTRL[0].bs_ctrl_inst_n_5 ),
        .RIU_WR_DATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RIU_WR_EN(1'b0),
        .RST(bsctrl_rst),
        .RX_BIT_CTRL_IN0(rx_bs0_rx_bit_ctrl_out),
        .RX_BIT_CTRL_IN1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RX_BIT_CTRL_IN2(rx_bs2_rx_bit_ctrl_out),
        .RX_BIT_CTRL_IN3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RX_BIT_CTRL_IN4(rx_bs4_rx_bit_ctrl_out),
        .RX_BIT_CTRL_IN5({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RX_BIT_CTRL_IN6({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RX_BIT_CTRL_OUT0(n0_rx_bit_ctrl_out0),
        .RX_BIT_CTRL_OUT1(n0_rx_bit_ctrl_out1),
        .RX_BIT_CTRL_OUT2(n0_rx_bit_ctrl_out2),
        .RX_BIT_CTRL_OUT3(n0_rx_bit_ctrl_out3),
        .RX_BIT_CTRL_OUT4(n0_rx_bit_ctrl_out4),
        .RX_BIT_CTRL_OUT5(n0_rx_bit_ctrl_out5),
        .RX_BIT_CTRL_OUT6({\BITSLICE_CTRL[0].bs_ctrl_inst_n_263 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_264 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_265 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_266 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_267 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_268 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_269 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_270 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_271 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_272 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_273 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_274 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_275 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_276 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_277 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_278 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_279 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_280 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_281 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_282 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_283 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_284 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_285 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_286 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_287 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_288 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_289 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_290 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_291 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_292 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_293 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_294 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_295 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_296 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_297 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_298 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_299 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_300 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_301 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_302 }),
        .TBYTE_IN(n0_tbyte_in),
        .TX_BIT_CTRL_IN0(rx_bs0_tx_bit_ctrl_out),
        .TX_BIT_CTRL_IN1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .TX_BIT_CTRL_IN2(rx_bs2_tx_bit_ctrl_out),
        .TX_BIT_CTRL_IN3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .TX_BIT_CTRL_IN4(rx_bs4_tx_bit_ctrl_out),
        .TX_BIT_CTRL_IN5({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .TX_BIT_CTRL_IN6({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .TX_BIT_CTRL_IN_TRI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .TX_BIT_CTRL_OUT0(n0_tx_bit_ctrl_out0),
        .TX_BIT_CTRL_OUT1(n0_tx_bit_ctrl_out1),
        .TX_BIT_CTRL_OUT2(n0_tx_bit_ctrl_out2),
        .TX_BIT_CTRL_OUT3(n0_tx_bit_ctrl_out3),
        .TX_BIT_CTRL_OUT4(n0_tx_bit_ctrl_out4),
        .TX_BIT_CTRL_OUT5(n0_tx_bit_ctrl_out5),
        .TX_BIT_CTRL_OUT6({\BITSLICE_CTRL[0].bs_ctrl_inst_n_543 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_544 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_545 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_546 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_547 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_548 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_549 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_550 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_551 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_552 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_553 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_554 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_555 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_556 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_557 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_558 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_559 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_560 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_561 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_562 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_563 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_564 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_565 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_566 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_567 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_568 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_569 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_570 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_571 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_572 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_573 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_574 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_575 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_576 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_577 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_578 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_579 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_580 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_581 ,\BITSLICE_CTRL[0].bs_ctrl_inst_n_582 }),
        .TX_BIT_CTRL_OUT_TRI(n0_tx_bit_ctrl_out_tri),
        .VTC_RDY(n0_vtc_rdy_out));
  (* box_type = "PRIMITIVE" *) 
  BITSLICE_CONTROL #(
    .CTRL_CLK("EXTERNAL"),
    .DIV_MODE("DIV4"),
    .EN_CLK_TO_EXT_NORTH("DISABLE"),
    .EN_CLK_TO_EXT_SOUTH("DISABLE"),
    .EN_DYN_ODLY_MODE("FALSE"),
    .EN_OTHER_NCLK("TRUE"),
    .EN_OTHER_PCLK("TRUE"),
    .IDLY_VT_TRACK("TRUE"),
    .INV_RXCLK("FALSE"),
    .ODLY_VT_TRACK("TRUE"),
    .QDLY_VT_TRACK("TRUE"),
    .READ_IDLE_COUNT(6'h00),
    .REFCLK_SRC("PLLCLK"),
    .ROUNDING_FACTOR(16),
    .RXGATE_EXTEND("FALSE"),
    .RX_CLK_PHASE_N("SHIFT_0"),
    .RX_CLK_PHASE_P("SHIFT_0"),
    .RX_GATING("DISABLE"),
    .SELF_CALIBRATE("ENABLE"),
    .SERIAL_MODE("FALSE"),
    .SIM_DEVICE("ULTRASCALE_PLUS_ES1"),
    .SIM_SPEEDUP("FAST"),
    .SIM_VERSION(2.000000),
    .TX_GATING("DISABLE")) 
    \BITSLICE_CTRL[1].bs_ctrl_inst 
       (.CLK_FROM_EXT(1'b1),
        .CLK_TO_EXT_NORTH(\NLW_BITSLICE_CTRL[1].bs_ctrl_inst_CLK_TO_EXT_NORTH_UNCONNECTED ),
        .CLK_TO_EXT_SOUTH(\NLW_BITSLICE_CTRL[1].bs_ctrl_inst_CLK_TO_EXT_SOUTH_UNCONNECTED ),
        .DLY_RDY(\BITSLICE_CTRL[1].bs_ctrl_inst_n_2 ),
        .DYN_DCI(\NLW_BITSLICE_CTRL[1].bs_ctrl_inst_DYN_DCI_UNCONNECTED [6:0]),
        .EN_VTC(n1_en_vtc_in),
        .NCLK_NIBBLE_IN(nclk_nibble_out[0]),
        .NCLK_NIBBLE_OUT(nclk_nibble_out[1]),
        .PCLK_NIBBLE_IN(pclk_nibble_out[0]),
        .PCLK_NIBBLE_OUT(pclk_nibble_out[1]),
        .PHY_RDCS0({1'b0,1'b0,1'b0,1'b0}),
        .PHY_RDCS1({1'b0,1'b0,1'b0,1'b0}),
        .PHY_RDEN({1'b1,1'b1,1'b1,1'b1}),
        .PHY_WRCS0({1'b0,1'b0,1'b0,1'b0}),
        .PHY_WRCS1({1'b0,1'b0,1'b0,1'b0}),
        .PLL_CLK(pll0_clkoutphy_out),
        .REFCLK(1'b0),
        .RIU_ADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RIU_CLK(riu_clk),
        .RIU_NIBBLE_SEL(1'b0),
        .RIU_RD_DATA({\BITSLICE_CTRL[1].bs_ctrl_inst_n_7 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_8 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_9 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_10 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_11 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_12 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_13 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_14 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_15 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_16 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_17 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_18 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_19 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_20 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_21 ,\BITSLICE_CTRL[1].bs_ctrl_inst_n_22 }),
        .RIU_VALID(\BITSLICE_CTRL[1].bs_ctrl_inst_n_5 ),
        .RIU_WR_DATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RIU_WR_EN(1'b0),
        .RST(bsctrl_rst),
        .RX_BIT_CTRL_IN0(rx_bs6_rx_bit_ctrl_out),
        .RX_BIT_CTRL_IN1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RX_BIT_CTRL_IN2(rx_bs8_rx_bit_ctrl_out),
        .RX_BIT_CTRL_IN3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RX_BIT_CTRL_IN4({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RX_BIT_CTRL_IN5({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RX_BIT_CTRL_IN6({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .RX_BIT_CTRL_OUT0(n1_rx_bit_ctrl_out0),
        .RX_BIT_CTRL_OUT1(n1_rx_bit_ctrl_out1),
        .RX_BIT_CTRL_OUT2(n1_rx_bit_ctrl_out2),
        .RX_BIT_CTRL_OUT3(n1_rx_bit_ctrl_out3),
        .RX_BIT_CTRL_OUT4(n1_rx_bit_ctrl_out4),
        .RX_BIT_CTRL_OUT5(n1_rx_bit_ctrl_out5),
        .RX_BIT_CTRL_OUT6(n1_rx_bit_ctrl_out6),
        .TBYTE_IN(n1_tbyte_in),
        .TX_BIT_CTRL_IN0(rx_bs6_tx_bit_ctrl_out),
        .TX_BIT_CTRL_IN1({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .TX_BIT_CTRL_IN2(rx_bs8_tx_bit_ctrl_out),
        .TX_BIT_CTRL_IN3({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .TX_BIT_CTRL_IN4({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .TX_BIT_CTRL_IN5({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .TX_BIT_CTRL_IN6({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .TX_BIT_CTRL_IN_TRI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .TX_BIT_CTRL_OUT0(n1_tx_bit_ctrl_out0),
        .TX_BIT_CTRL_OUT1(n1_tx_bit_ctrl_out1),
        .TX_BIT_CTRL_OUT2(n1_tx_bit_ctrl_out2),
        .TX_BIT_CTRL_OUT3(n1_tx_bit_ctrl_out3),
        .TX_BIT_CTRL_OUT4(n1_tx_bit_ctrl_out4),
        .TX_BIT_CTRL_OUT5(n1_tx_bit_ctrl_out5),
        .TX_BIT_CTRL_OUT6(n1_tx_bit_ctrl_out6),
        .TX_BIT_CTRL_OUT_TRI(n1_tx_bit_ctrl_out_tri),
        .VTC_RDY(n1_vtc_rdy_out));
  (* SOFT_HLUTNM = "soft_lutpair0" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \CORE_RDY_GEN[0].core_rdy_r[0]_i_1 
       (.I0(\BITSLICE_CTRL[1].bs_ctrl_inst_n_2 ),
        .I1(\BITSLICE_CTRL[0].bs_ctrl_inst_n_2 ),
        .I2(n1_vtc_rdy_out),
        .I3(n0_vtc_rdy_out),
        .O(core_rdy));
  (* SOFT_HLUTNM = "soft_lutpair1" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_7 
       (.I0(Q),
        .I1(n1_vtc_rdy_out),
        .I2(n0_vtc_rdy_out),
        .O(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ));
  (* SOFT_HLUTNM = "soft_lutpair1" *) 
  LUT3 #(
    .INIT(8'h8F)) 
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_9 
       (.I0(n1_vtc_rdy_out),
        .I1(n0_vtc_rdy_out),
        .I2(Q),
        .O(\BITSLICE_CTRL[1].bs_ctrl_inst_0 ));
  (* SOFT_HLUTNM = "soft_lutpair0" *) 
  LUT2 #(
    .INIT(4'h8)) 
    src_data_inferred_i_1
       (.I0(\BITSLICE_CTRL[0].bs_ctrl_inst_n_2 ),
        .I1(\BITSLICE_CTRL[1].bs_ctrl_inst_n_2 ),
        .O(in0));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_bs_top
   (fifo_wr_clk_0,
    rx_bs0_rx_bit_ctrl_out,
    rx_bs0_tx_bit_ctrl_out,
    fifo_empty_2,
    rx_bs2_rx_bit_ctrl_out,
    rx_bs2_tx_bit_ctrl_out,
    data_to_fabric_data_rxp0,
    fifo_empty_4,
    rx_bs4_rx_bit_ctrl_out,
    rx_bs4_tx_bit_ctrl_out,
    data_to_fabric_data_rxp1,
    fifo_empty_6,
    rx_bs6_rx_bit_ctrl_out,
    rx_bs6_tx_bit_ctrl_out,
    data_to_fabric_data_rxp2,
    fifo_empty_8,
    rx_bs8_rx_bit_ctrl_out,
    rx_bs8_tx_bit_ctrl_out,
    data_to_fabric_data_rxp3,
    data_to_bs_out,
    fifo_rd_clk_0,
    rx_bs_rst_in,
    rx_bs_rst_dly_ext_in,
    rx_bs0_rx_bit_ctrl_in,
    rx_bs0_tx_bit_ctrl_in,
    fifo_rd_en_2,
    rx_bs2_rx_bit_ctrl_in,
    rx_bs2_tx_bit_ctrl_in,
    fifo_rd_en_4,
    rx_bs4_rx_bit_ctrl_in,
    rx_bs4_tx_bit_ctrl_in,
    fifo_rd_en_6,
    rx_bs6_rx_bit_ctrl_in,
    rx_bs6_tx_bit_ctrl_in,
    fifo_rd_en_8,
    rx_bs8_rx_bit_ctrl_in,
    rx_bs8_tx_bit_ctrl_in);
  output fifo_wr_clk_0;
  output [39:0]rx_bs0_rx_bit_ctrl_out;
  output [39:0]rx_bs0_tx_bit_ctrl_out;
  output fifo_empty_2;
  output [39:0]rx_bs2_rx_bit_ctrl_out;
  output [39:0]rx_bs2_tx_bit_ctrl_out;
  output [7:0]data_to_fabric_data_rxp0;
  output fifo_empty_4;
  output [39:0]rx_bs4_rx_bit_ctrl_out;
  output [39:0]rx_bs4_tx_bit_ctrl_out;
  output [7:0]data_to_fabric_data_rxp1;
  output fifo_empty_6;
  output [39:0]rx_bs6_rx_bit_ctrl_out;
  output [39:0]rx_bs6_tx_bit_ctrl_out;
  output [7:0]data_to_fabric_data_rxp2;
  output fifo_empty_8;
  output [39:0]rx_bs8_rx_bit_ctrl_out;
  output [39:0]rx_bs8_tx_bit_ctrl_out;
  output [7:0]data_to_fabric_data_rxp3;
  input [4:0]data_to_bs_out;
  input fifo_rd_clk_0;
  input [4:0]rx_bs_rst_in;
  input [4:0]rx_bs_rst_dly_ext_in;
  input [39:0]rx_bs0_rx_bit_ctrl_in;
  input [39:0]rx_bs0_tx_bit_ctrl_in;
  input fifo_rd_en_2;
  input [39:0]rx_bs2_rx_bit_ctrl_in;
  input [39:0]rx_bs2_tx_bit_ctrl_in;
  input fifo_rd_en_4;
  input [39:0]rx_bs4_rx_bit_ctrl_in;
  input [39:0]rx_bs4_tx_bit_ctrl_in;
  input fifo_rd_en_6;
  input [39:0]rx_bs6_rx_bit_ctrl_in;
  input [39:0]rx_bs6_tx_bit_ctrl_in;
  input fifo_rd_en_8;
  input [39:0]rx_bs8_rx_bit_ctrl_in;
  input [39:0]rx_bs8_tx_bit_ctrl_in;

  wire [4:0]data_to_bs_out;
  wire [7:0]data_to_fabric_data_rxp0;
  wire [7:0]data_to_fabric_data_rxp1;
  wire [7:0]data_to_fabric_data_rxp2;
  wire [7:0]data_to_fabric_data_rxp3;
  wire fifo_empty_2;
  wire fifo_empty_4;
  wire fifo_empty_6;
  wire fifo_empty_8;
  wire fifo_rd_clk_0;
  wire fifo_rd_en_2;
  wire fifo_rd_en_4;
  wire fifo_rd_en_6;
  wire fifo_rd_en_8;
  wire fifo_wr_clk_0;
  wire [39:0]rx_bs0_rx_bit_ctrl_in;
  wire [39:0]rx_bs0_rx_bit_ctrl_out;
  wire [39:0]rx_bs0_tx_bit_ctrl_in;
  wire [39:0]rx_bs0_tx_bit_ctrl_out;
  wire [39:0]rx_bs2_rx_bit_ctrl_in;
  wire [39:0]rx_bs2_rx_bit_ctrl_out;
  wire [39:0]rx_bs2_tx_bit_ctrl_in;
  wire [39:0]rx_bs2_tx_bit_ctrl_out;
  wire [39:0]rx_bs4_rx_bit_ctrl_in;
  wire [39:0]rx_bs4_rx_bit_ctrl_out;
  wire [39:0]rx_bs4_tx_bit_ctrl_in;
  wire [39:0]rx_bs4_tx_bit_ctrl_out;
  wire [39:0]rx_bs6_rx_bit_ctrl_in;
  wire [39:0]rx_bs6_rx_bit_ctrl_out;
  wire [39:0]rx_bs6_tx_bit_ctrl_in;
  wire [39:0]rx_bs6_tx_bit_ctrl_out;
  wire [39:0]rx_bs8_rx_bit_ctrl_in;
  wire [39:0]rx_bs8_rx_bit_ctrl_out;
  wire [39:0]rx_bs8_tx_bit_ctrl_in;
  wire [39:0]rx_bs8_tx_bit_ctrl_out;
  wire [4:0]rx_bs_rst_dly_ext_in;
  wire [4:0]rx_bs_rst_in;

  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_rx_bs u_rx_bs
       (.data_to_bs_out(data_to_bs_out),
        .data_to_fabric_data_rxp0(data_to_fabric_data_rxp0),
        .data_to_fabric_data_rxp1(data_to_fabric_data_rxp1),
        .data_to_fabric_data_rxp2(data_to_fabric_data_rxp2),
        .data_to_fabric_data_rxp3(data_to_fabric_data_rxp3),
        .fifo_empty_2(fifo_empty_2),
        .fifo_empty_4(fifo_empty_4),
        .fifo_empty_6(fifo_empty_6),
        .fifo_empty_8(fifo_empty_8),
        .fifo_rd_clk_0(fifo_rd_clk_0),
        .fifo_rd_en_2(fifo_rd_en_2),
        .fifo_rd_en_4(fifo_rd_en_4),
        .fifo_rd_en_6(fifo_rd_en_6),
        .fifo_rd_en_8(fifo_rd_en_8),
        .fifo_wr_clk_0(fifo_wr_clk_0),
        .rx_bs0_rx_bit_ctrl_in(rx_bs0_rx_bit_ctrl_in),
        .rx_bs0_rx_bit_ctrl_out(rx_bs0_rx_bit_ctrl_out),
        .rx_bs0_tx_bit_ctrl_in(rx_bs0_tx_bit_ctrl_in),
        .rx_bs0_tx_bit_ctrl_out(rx_bs0_tx_bit_ctrl_out),
        .rx_bs2_rx_bit_ctrl_in(rx_bs2_rx_bit_ctrl_in),
        .rx_bs2_rx_bit_ctrl_out(rx_bs2_rx_bit_ctrl_out),
        .rx_bs2_tx_bit_ctrl_in(rx_bs2_tx_bit_ctrl_in),
        .rx_bs2_tx_bit_ctrl_out(rx_bs2_tx_bit_ctrl_out),
        .rx_bs4_rx_bit_ctrl_in(rx_bs4_rx_bit_ctrl_in),
        .rx_bs4_rx_bit_ctrl_out(rx_bs4_rx_bit_ctrl_out),
        .rx_bs4_tx_bit_ctrl_in(rx_bs4_tx_bit_ctrl_in),
        .rx_bs4_tx_bit_ctrl_out(rx_bs4_tx_bit_ctrl_out),
        .rx_bs6_rx_bit_ctrl_in(rx_bs6_rx_bit_ctrl_in),
        .rx_bs6_rx_bit_ctrl_out(rx_bs6_rx_bit_ctrl_out),
        .rx_bs6_tx_bit_ctrl_in(rx_bs6_tx_bit_ctrl_in),
        .rx_bs6_tx_bit_ctrl_out(rx_bs6_tx_bit_ctrl_out),
        .rx_bs8_rx_bit_ctrl_in(rx_bs8_rx_bit_ctrl_in),
        .rx_bs8_rx_bit_ctrl_out(rx_bs8_rx_bit_ctrl_out),
        .rx_bs8_tx_bit_ctrl_in(rx_bs8_tx_bit_ctrl_in),
        .rx_bs8_tx_bit_ctrl_out(rx_bs8_tx_bit_ctrl_out),
        .rx_bs_rst_dly_ext_in(rx_bs_rst_dly_ext_in),
        .rx_bs_rst_in(rx_bs_rst_in));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_clk_rst_top
   (out,
    \bs_rst_int_r_reg[8] ,
    pll0_clkout0_out,
    bsctrl_rst,
    Q,
    rst_seq_done3,
    n1_en_vtc_in,
    pll0_clkoutphy_out,
    rst,
    bs_rst_dphy_in,
    in0,
    riu_clk,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ,
    n1_vtc_rdy_out,
    n0_vtc_rdy_out,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 );
  output [4:0]out;
  output [4:0]\bs_rst_int_r_reg[8] ;
  output pll0_clkout0_out;
  output bsctrl_rst;
  output [0:0]Q;
  output rst_seq_done3;
  output n1_en_vtc_in;
  output pll0_clkoutphy_out;
  input rst;
  input bs_rst_dphy_in;
  input [0:0]in0;
  input riu_clk;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ;
  input n1_vtc_rdy_out;
  input n0_vtc_rdy_out;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ;

  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ;
  wire [0:0]Q;
  wire bs_rst_dphy_in;
  wire [4:0]\bs_rst_int_r_reg[8] ;
  wire bsctrl_rst;
  wire clk_scheme_inst_n_1;
  wire [0:0]in0;
  wire n0_vtc_rdy_out;
  wire n1_en_vtc_in;
  wire n1_vtc_rdy_out;
  wire [4:0]out;
  wire pll0_clkout0_out;
  wire pll0_clkoutphy_en;
  wire pll0_clkoutphy_out;
  wire pll1_rst;
  wire riu_clk;
  wire rst;
  wire rst_seq_done3;

  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_clk_scheme clk_scheme_inst
       (.pll0_clkout0_out(pll0_clkout0_out),
        .pll0_clkoutphy_en_in(pll0_clkoutphy_en),
        .pll0_clkoutphy_out(pll0_clkoutphy_out),
        .pll0_locked_out(clk_scheme_inst_n_1),
        .pll0_rst_in(pll1_rst),
        .riu_clk(riu_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_rst_scheme rst_scheme_inst
       (.CLK(pll0_clkout0_out),
        .\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 (bsctrl_rst),
        .\GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 (rst_seq_done3),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 (\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_1 (\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ),
        .Q(Q),
        .bs_rst_dphy_in(bs_rst_dphy_in),
        .\bs_rst_int_r_reg[8]_0 (\bs_rst_int_r_reg[8] ),
        .in0(in0),
        .n0_vtc_rdy_out(n0_vtc_rdy_out),
        .n1_en_vtc_in(n1_en_vtc_in),
        .n1_vtc_rdy_out(n1_vtc_rdy_out),
        .out(out),
        .pll0_clkoutphy_en_in(pll0_clkoutphy_en),
        .pll0_locked_out(clk_scheme_inst_n_1),
        .pll0_rst_in(pll1_rst),
        .riu_clk(riu_clk),
        .rst(rst));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_clk_scheme
   (pll0_clkoutphy_out,
    pll0_locked_out,
    pll0_clkout0_out,
    riu_clk,
    pll0_clkoutphy_en_in,
    pll0_rst_in);
  output pll0_clkoutphy_out;
  output pll0_locked_out;
  output pll0_clkout0_out;
  input riu_clk;
  input pll0_clkoutphy_en_in;
  input pll0_rst_in;

  wire \GEN_PLL_IN_IP_USP.pll0_clkout0 ;
  wire \GEN_PLL_IN_IP_USP.pll0_clkout1_buf_n_0 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_10 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_11 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_12 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_13 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_14 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_15 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_16 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_17 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_18 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_19 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_20 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_21 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_22 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_23 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_6 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_8 ;
  wire \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_9 ;
  wire pll0_clkout0_out;
  wire pll0_clkout1;
  wire pll0_clkoutphy_en_in;
  wire pll0_clkoutphy_out;
  wire pll0_locked_out;
  wire pll0_rst_in;
  wire riu_clk;
  wire \NLW_GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_CLKFBIN_UNCONNECTED ;
  wire \NLW_GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_CLKFBOUT_UNCONNECTED ;
  wire \NLW_GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_CLKOUT0B_UNCONNECTED ;
  wire \NLW_GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_CLKOUT1B_UNCONNECTED ;

  (* box_type = "PRIMITIVE" *) 
  BUFGCE #(
    .CE_TYPE("SYNC"),
    .IS_CE_INVERTED(1'b0),
    .IS_I_INVERTED(1'b0),
    .SIM_DEVICE("ULTRASCALE"),
    .STARTUP_SYNC("FALSE")) 
    \GEN_PLL_IN_IP_USP.pll0_clkout0_buf 
       (.CE(pll0_locked_out),
        .I(\GEN_PLL_IN_IP_USP.pll0_clkout0 ),
        .O(pll0_clkout0_out));
  (* box_type = "PRIMITIVE" *) 
  BUFGCE #(
    .CE_TYPE("SYNC"),
    .IS_CE_INVERTED(1'b0),
    .IS_I_INVERTED(1'b0),
    .SIM_DEVICE("ULTRASCALE"),
    .STARTUP_SYNC("FALSE")) 
    \GEN_PLL_IN_IP_USP.pll0_clkout1_buf 
       (.CE(pll0_locked_out),
        .I(pll0_clkout1),
        .O(\GEN_PLL_IN_IP_USP.pll0_clkout1_buf_n_0 ));
  (* OPT_MODIFIED = "MLO" *) 
  (* box_type = "PRIMITIVE" *) 
  PLLE4_ADV #(
    .CLKFBOUT_MULT(15),
    .CLKFBOUT_PHASE(0.000000),
    .CLKIN_PERIOD(5.000000),
    .CLKOUT0_DIVIDE(8),
    .CLKOUT0_DUTY_CYCLE(0.500000),
    .CLKOUT0_PHASE(0.000000),
    .CLKOUT1_DIVIDE(1),
    .CLKOUT1_DUTY_CYCLE(0.500000),
    .CLKOUT1_PHASE(0.000000),
    .CLKOUTPHY_MODE("VCO"),
    .COMPENSATION("INTERNAL"),
    .DIVCLK_DIVIDE(2),
    .IS_CLKFBIN_INVERTED(1'b0),
    .IS_CLKIN_INVERTED(1'b0),
    .IS_PWRDWN_INVERTED(1'b0),
    .IS_RST_INVERTED(1'b0),
    .REF_JITTER(0.010000),
    .STARTUP_WAIT("FALSE")) 
    \GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst 
       (.CLKFBIN(\NLW_GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_CLKFBIN_UNCONNECTED ),
        .CLKFBOUT(\NLW_GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_CLKFBOUT_UNCONNECTED ),
        .CLKIN(riu_clk),
        .CLKOUT0(\GEN_PLL_IN_IP_USP.pll0_clkout0 ),
        .CLKOUT0B(\NLW_GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_CLKOUT0B_UNCONNECTED ),
        .CLKOUT1(pll0_clkout1),
        .CLKOUT1B(\NLW_GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_CLKOUT1B_UNCONNECTED ),
        .CLKOUTPHY(pll0_clkoutphy_out),
        .CLKOUTPHYEN(pll0_clkoutphy_en_in),
        .DADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .DCLK(1'b0),
        .DEN(1'b0),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .DO({\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_8 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_9 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_10 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_11 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_12 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_13 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_14 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_15 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_16 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_17 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_18 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_19 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_20 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_21 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_22 ,\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_23 }),
        .DRDY(\GEN_PLL_IN_IP_USP.plle4_adv_pll0_inst_n_6 ),
        .DWE(1'b0),
        .LOCKED(pll0_locked_out),
        .PWRDWN(1'b0),
        .RST(pll0_rst_in));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_rst_scheme
   (out,
    \bs_rst_int_r_reg[8]_0 ,
    \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ,
    Q,
    pll0_clkoutphy_en_in,
    pll0_rst_in,
    \GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 ,
    n1_en_vtc_in,
    pll0_locked_out,
    rst,
    bs_rst_dphy_in,
    in0,
    riu_clk,
    CLK,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ,
    n1_vtc_rdy_out,
    n0_vtc_rdy_out,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_1 );
  output [4:0]out;
  output [4:0]\bs_rst_int_r_reg[8]_0 ;
  output \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ;
  output [0:0]Q;
  output pll0_clkoutphy_en_in;
  output pll0_rst_in;
  output \GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 ;
  output n1_en_vtc_in;
  input pll0_locked_out;
  input rst;
  input bs_rst_dphy_in;
  input [0:0]in0;
  input riu_clk;
  input CLK;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ;
  input n1_vtc_rdy_out;
  input n0_vtc_rdy_out;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_1 ;

  wire CLK;
  wire \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_i_3_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_2_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_3_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state[0]_i_3_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.pll0_rst_i_1_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.pll0_rst_i_2_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.pll0_rst_i_3_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.pll0_rst_i_4_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.pll0_rst_i_5_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_3_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_4_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_5_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_i_2_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_2_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_5_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_8_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_1 ;
  wire [0:0]Q;
  wire all_bsc_dly_rdy;
  wire bs_dly_rst;
  (* RTL_KEEP = "true" *) wire [51:0]bs_dly_rst_r;
  wire bs_rst_dphy_in;
  wire bs_rst_dphy_sync;
  (* RTL_KEEP = "true" *) wire [51:0]bs_rst_int_r;
  (* RTL_KEEP = "true" *) wire [51:0]bs_rst_r;
  wire bsc_en_vtc;
  wire bsc_en_vtc_1;
  wire [8:0]hssio_state;
  wire \hssio_state_inferred__3/i___0_n_0 ;
  wire \hssio_state_inferred__3/i___1_n_0 ;
  wire \hssio_state_inferred__3/i___2_n_0 ;
  wire \hssio_state_inferred__3/i___3_n_0 ;
  wire \hssio_state_inferred__3/i__n_0 ;
  wire [0:0]in0;
  wire locked;
  wire n0_vtc_rdy_out;
  wire n1_en_vtc_in;
  wire n1_vtc_rdy_out;
  wire [6:0]p_0_in;
  wire [8:0]p_0_in_0;
  wire pll0_clkoutphy_en_in;
  wire \pll0_fab_clk_cntr[6]_i_3_n_0 ;
  wire \pll0_fab_clk_cntr[6]_i_4_n_0 ;
  wire [6:6]pll0_fab_clk_cntr_reg;
  wire [5:0]pll0_fab_clk_cntr_reg__0;
  wire pll0_locked_out;
  wire pll0_rst_in;
  wire riu_clk;
  wire rst;
  wire rst_in_sync;
  wire rst_seq_done;
  wire sync_cell_dly_rdy_inst_n_1;
  wire sync_cell_pll0lock_inst_n_10;
  wire sync_cell_pll0lock_inst_n_11;
  wire sync_cell_pll0lock_inst_n_7;
  wire sync_cell_pll0lock_inst_n_8;
  wire sync_cell_pll0lock_inst_n_9;
  wire sync_cell_start_fab_cntr_pll0_inst_n_0;
  wire sync_cell_wait_pll0_fab_timeout_inst_n_2;
  wire sync_cell_wait_pll0_fab_timeout_inst_n_3;
  wire sync_cell_wait_pll0_fab_timeout_inst_n_4;
  wire timeout_cntr;
  wire \timeout_cntr[0]_i_3_n_0 ;
  wire \timeout_cntr[0]_i_4_n_0 ;
  wire \timeout_cntr[0]_i_5_n_0 ;
  wire \timeout_cntr[0]_i_6_n_0 ;
  wire [19:0]timeout_cntr_reg;
  wire \timeout_cntr_reg[0]_i_2_n_0 ;
  wire \timeout_cntr_reg[0]_i_2_n_1 ;
  wire \timeout_cntr_reg[0]_i_2_n_10 ;
  wire \timeout_cntr_reg[0]_i_2_n_11 ;
  wire \timeout_cntr_reg[0]_i_2_n_12 ;
  wire \timeout_cntr_reg[0]_i_2_n_13 ;
  wire \timeout_cntr_reg[0]_i_2_n_14 ;
  wire \timeout_cntr_reg[0]_i_2_n_15 ;
  wire \timeout_cntr_reg[0]_i_2_n_2 ;
  wire \timeout_cntr_reg[0]_i_2_n_3 ;
  wire \timeout_cntr_reg[0]_i_2_n_4 ;
  wire \timeout_cntr_reg[0]_i_2_n_5 ;
  wire \timeout_cntr_reg[0]_i_2_n_6 ;
  wire \timeout_cntr_reg[0]_i_2_n_7 ;
  wire \timeout_cntr_reg[0]_i_2_n_8 ;
  wire \timeout_cntr_reg[0]_i_2_n_9 ;
  wire \timeout_cntr_reg[16]_i_1_n_12 ;
  wire \timeout_cntr_reg[16]_i_1_n_13 ;
  wire \timeout_cntr_reg[16]_i_1_n_14 ;
  wire \timeout_cntr_reg[16]_i_1_n_15 ;
  wire \timeout_cntr_reg[16]_i_1_n_5 ;
  wire \timeout_cntr_reg[16]_i_1_n_6 ;
  wire \timeout_cntr_reg[16]_i_1_n_7 ;
  wire \timeout_cntr_reg[8]_i_1_n_0 ;
  wire \timeout_cntr_reg[8]_i_1_n_1 ;
  wire \timeout_cntr_reg[8]_i_1_n_10 ;
  wire \timeout_cntr_reg[8]_i_1_n_11 ;
  wire \timeout_cntr_reg[8]_i_1_n_12 ;
  wire \timeout_cntr_reg[8]_i_1_n_13 ;
  wire \timeout_cntr_reg[8]_i_1_n_14 ;
  wire \timeout_cntr_reg[8]_i_1_n_15 ;
  wire \timeout_cntr_reg[8]_i_1_n_2 ;
  wire \timeout_cntr_reg[8]_i_1_n_3 ;
  wire \timeout_cntr_reg[8]_i_1_n_4 ;
  wire \timeout_cntr_reg[8]_i_1_n_5 ;
  wire \timeout_cntr_reg[8]_i_1_n_6 ;
  wire \timeout_cntr_reg[8]_i_1_n_7 ;
  wire \timeout_cntr_reg[8]_i_1_n_8 ;
  wire \timeout_cntr_reg[8]_i_1_n_9 ;
  wire timeout_cntr_rst;
  wire wait_pll0_x_fab_clk_timeout;
  wire wait_pll0_x_fab_clk_timeout_sync;
  wire wait_pll_lock_timeout_i_1_n_0;
  wire wait_pll_lock_timeout_i_2_n_0;
  wire wait_pll_lock_timeout_i_3_n_0;
  wire wait_pll_lock_timeout_i_4_n_0;
  wire wait_pll_lock_timeout_i_5_n_0;
  wire wait_pll_lock_timeout_i_6_n_0;
  wire wait_pll_lock_timeout_i_7_n_0;
  wire wait_pll_lock_timeout_i_8_n_0;
  wire wait_pll_lock_timeout_i_9_n_0;
  wire wait_pll_lock_timeout_reg_n_0;
  wire [7:3]\NLW_timeout_cntr_reg[16]_i_1_CO_UNCONNECTED ;
  wire [7:4]\NLW_timeout_cntr_reg[16]_i_1_O_UNCONNECTED ;

  assign \bs_rst_int_r_reg[8]_0 [4] = bs_rst_int_r[8];
  assign \bs_rst_int_r_reg[8]_0 [3] = bs_rst_int_r[6];
  assign \bs_rst_int_r_reg[8]_0 [2] = bs_rst_int_r[4];
  assign \bs_rst_int_r_reg[8]_0 [1] = bs_rst_int_r[2];
  assign \bs_rst_int_r_reg[8]_0 [0] = bs_rst_int_r[0];
  assign out[4] = bs_dly_rst_r[8];
  assign out[3] = bs_dly_rst_r[6];
  assign out[2] = bs_dly_rst_r[4];
  assign out[1] = bs_dly_rst_r[2];
  assign out[0] = bs_dly_rst_r[0];
  LUT2 #(
    .INIT(4'hE)) 
    \BITSLICE_CTRL[0].bs_ctrl_inst_i_1 
       (.I0(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 ),
        .I1(bsc_en_vtc),
        .O(n1_en_vtc_in));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFEFFFF)) 
    \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_i_2 
       (.I0(Q),
        .I1(hssio_state[5]),
        .I2(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_4_n_0 ),
        .I3(hssio_state[0]),
        .I4(hssio_state[3]),
        .I5(hssio_state[8]),
        .O(bs_dly_rst));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_i_3 
       (.I0(Q),
        .I1(hssio_state[5]),
        .I2(hssio_state[1]),
        .I3(bsc_en_vtc_1),
        .I4(hssio_state[4]),
        .I5(hssio_state[2]),
        .O(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_i_3_n_0 ));
  FDSE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_cell_pll0lock_inst_n_11),
        .Q(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .S(rst_in_sync));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFE)) 
    \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_2 
       (.I0(hssio_state[1]),
        .I1(bsc_en_vtc_1),
        .I2(hssio_state[4]),
        .I3(hssio_state[2]),
        .I4(hssio_state[8]),
        .I5(hssio_state[3]),
        .O(\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_2_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_3 
       (.I0(hssio_state[5]),
        .I1(Q),
        .O(\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_3_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_reg 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_cell_pll0lock_inst_n_9),
        .Q(bsc_en_vtc),
        .R(rst_in_sync));
  (* SOFT_HLUTNM = "soft_lutpair3" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[0]_i_3 
       (.I0(Q),
        .I1(hssio_state[5]),
        .I2(hssio_state[8]),
        .I3(hssio_state[3]),
        .O(\GEN_RIU_NOT_FROM_PLL.hssio_state[0]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h8)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[1]_i_1 
       (.I0(\hssio_state_inferred__3/i___3_n_0 ),
        .I1(hssio_state[0]),
        .O(p_0_in_0[1]));
  (* FSM_ENCODED_STATES = "WAIT_FOR_PLL_LOCK:000000100,WAIT_FOR_BSC_VTC_RDY:010000000,ASSERT_BSC_EN_VTC:001000000,DEASSERT_PLL_RESET:000000010,ASSERT_PLL_CLKOUTPHYEN:000010000,ASSERT_ALL_RESETS:000000001,WAIT_FOR_BSC_DLY_RDY:000100000,DEASSERT_BS_RESETS:000001000,RESET_SEQ_DONE:100000000" *) 
  FDSE #(
    .INIT(1'b1)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(p_0_in_0[0]),
        .Q(hssio_state[0]),
        .S(rst_in_sync));
  (* FSM_ENCODED_STATES = "WAIT_FOR_PLL_LOCK:000000100,WAIT_FOR_BSC_VTC_RDY:010000000,ASSERT_BSC_EN_VTC:001000000,DEASSERT_PLL_RESET:000000010,ASSERT_PLL_CLKOUTPHYEN:000010000,ASSERT_ALL_RESETS:000000001,WAIT_FOR_BSC_DLY_RDY:000100000,DEASSERT_BS_RESETS:000001000,RESET_SEQ_DONE:100000000" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[1] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(p_0_in_0[1]),
        .Q(hssio_state[1]),
        .R(rst_in_sync));
  (* FSM_ENCODED_STATES = "WAIT_FOR_PLL_LOCK:000000100,WAIT_FOR_BSC_VTC_RDY:010000000,ASSERT_BSC_EN_VTC:001000000,DEASSERT_PLL_RESET:000000010,ASSERT_PLL_CLKOUTPHYEN:000010000,ASSERT_ALL_RESETS:000000001,WAIT_FOR_BSC_DLY_RDY:000100000,DEASSERT_BS_RESETS:000001000,RESET_SEQ_DONE:100000000" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[2] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(p_0_in_0[2]),
        .Q(hssio_state[2]),
        .R(rst_in_sync));
  (* FSM_ENCODED_STATES = "WAIT_FOR_PLL_LOCK:000000100,WAIT_FOR_BSC_VTC_RDY:010000000,ASSERT_BSC_EN_VTC:001000000,DEASSERT_PLL_RESET:000000010,ASSERT_PLL_CLKOUTPHYEN:000010000,ASSERT_ALL_RESETS:000000001,WAIT_FOR_BSC_DLY_RDY:000100000,DEASSERT_BS_RESETS:000001000,RESET_SEQ_DONE:100000000" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(p_0_in_0[3]),
        .Q(hssio_state[3]),
        .R(rst_in_sync));
  (* FSM_ENCODED_STATES = "WAIT_FOR_PLL_LOCK:000000100,WAIT_FOR_BSC_VTC_RDY:010000000,ASSERT_BSC_EN_VTC:001000000,DEASSERT_PLL_RESET:000000010,ASSERT_PLL_CLKOUTPHYEN:000010000,ASSERT_ALL_RESETS:000000001,WAIT_FOR_BSC_DLY_RDY:000100000,DEASSERT_BS_RESETS:000001000,RESET_SEQ_DONE:100000000" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[4] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(p_0_in_0[4]),
        .Q(hssio_state[4]),
        .R(rst_in_sync));
  (* FSM_ENCODED_STATES = "WAIT_FOR_PLL_LOCK:000000100,WAIT_FOR_BSC_VTC_RDY:010000000,ASSERT_BSC_EN_VTC:001000000,DEASSERT_PLL_RESET:000000010,ASSERT_PLL_CLKOUTPHYEN:000010000,ASSERT_ALL_RESETS:000000001,WAIT_FOR_BSC_DLY_RDY:000100000,DEASSERT_BS_RESETS:000001000,RESET_SEQ_DONE:100000000" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[5] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(p_0_in_0[5]),
        .Q(hssio_state[5]),
        .R(rst_in_sync));
  (* FSM_ENCODED_STATES = "WAIT_FOR_PLL_LOCK:000000100,WAIT_FOR_BSC_VTC_RDY:010000000,ASSERT_BSC_EN_VTC:001000000,DEASSERT_PLL_RESET:000000010,ASSERT_PLL_CLKOUTPHYEN:000010000,ASSERT_ALL_RESETS:000000001,WAIT_FOR_BSC_DLY_RDY:000100000,DEASSERT_BS_RESETS:000001000,RESET_SEQ_DONE:100000000" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(p_0_in_0[6]),
        .Q(bsc_en_vtc_1),
        .R(rst_in_sync));
  (* FSM_ENCODED_STATES = "WAIT_FOR_PLL_LOCK:000000100,WAIT_FOR_BSC_VTC_RDY:010000000,ASSERT_BSC_EN_VTC:001000000,DEASSERT_PLL_RESET:000000010,ASSERT_PLL_CLKOUTPHYEN:000010000,ASSERT_ALL_RESETS:000000001,WAIT_FOR_BSC_DLY_RDY:000100000,DEASSERT_BS_RESETS:000001000,RESET_SEQ_DONE:100000000" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(p_0_in_0[7]),
        .Q(Q),
        .R(rst_in_sync));
  (* FSM_ENCODED_STATES = "WAIT_FOR_PLL_LOCK:000000100,WAIT_FOR_BSC_VTC_RDY:010000000,ASSERT_BSC_EN_VTC:001000000,DEASSERT_PLL_RESET:000000010,ASSERT_PLL_CLKOUTPHYEN:000010000,ASSERT_ALL_RESETS:000000001,WAIT_FOR_BSC_DLY_RDY:000100000,DEASSERT_BS_RESETS:000001000,RESET_SEQ_DONE:100000000" *) 
  FDRE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[8] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(p_0_in_0[8]),
        .Q(hssio_state[8]),
        .R(rst_in_sync));
  FDRE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_cell_wait_pll0_fab_timeout_inst_n_3),
        .Q(pll0_clkoutphy_en_in),
        .R(rst_in_sync));
  LUT6 #(
    .INIT(64'hFEFEFFFFFEFEFF00)) 
    \GEN_RIU_NOT_FROM_PLL.pll0_rst_i_1 
       (.I0(\GEN_RIU_NOT_FROM_PLL.pll0_rst_i_2_n_0 ),
        .I1(hssio_state[0]),
        .I2(\GEN_RIU_NOT_FROM_PLL.hssio_state[0]_i_3_n_0 ),
        .I3(\GEN_RIU_NOT_FROM_PLL.pll0_rst_i_3_n_0 ),
        .I4(hssio_state[1]),
        .I5(pll0_rst_in),
        .O(\GEN_RIU_NOT_FROM_PLL.pll0_rst_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair8" *) 
  LUT3 #(
    .INIT(8'hFE)) 
    \GEN_RIU_NOT_FROM_PLL.pll0_rst_i_2 
       (.I0(bsc_en_vtc_1),
        .I1(hssio_state[4]),
        .I2(hssio_state[2]),
        .O(\GEN_RIU_NOT_FROM_PLL.pll0_rst_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFEFFFEFEF9)) 
    \GEN_RIU_NOT_FROM_PLL.pll0_rst_i_3 
       (.I0(\GEN_RIU_NOT_FROM_PLL.pll0_rst_i_4_n_0 ),
        .I1(\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_3_n_0 ),
        .I2(\GEN_RIU_NOT_FROM_PLL.pll0_rst_i_5_n_0 ),
        .I3(hssio_state[2]),
        .I4(bsc_en_vtc_1),
        .I5(hssio_state[4]),
        .O(\GEN_RIU_NOT_FROM_PLL.pll0_rst_i_3_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \GEN_RIU_NOT_FROM_PLL.pll0_rst_i_4 
       (.I0(hssio_state[3]),
        .I1(hssio_state[8]),
        .O(\GEN_RIU_NOT_FROM_PLL.pll0_rst_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair3" *) 
  LUT5 #(
    .INIT(32'hFFF8F8F8)) 
    \GEN_RIU_NOT_FROM_PLL.pll0_rst_i_5 
       (.I0(hssio_state[8]),
        .I1(hssio_state[3]),
        .I2(hssio_state[0]),
        .I3(hssio_state[5]),
        .I4(Q),
        .O(\GEN_RIU_NOT_FROM_PLL.pll0_rst_i_5_n_0 ));
  FDSE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.pll0_rst_reg 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.pll0_rst_i_1_n_0 ),
        .Q(pll0_rst_in),
        .S(rst_in_sync));
  LUT6 #(
    .INIT(64'h0000000000000100)) 
    \GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_2 
       (.I0(Q),
        .I1(hssio_state[5]),
        .I2(hssio_state[3]),
        .I3(hssio_state[8]),
        .I4(hssio_state[0]),
        .I5(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_4_n_0 ),
        .O(rst_seq_done));
  LUT6 #(
    .INIT(64'hFFFFFFFEFFFEFFEB)) 
    \GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_3 
       (.I0(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_2_n_0 ),
        .I1(hssio_state[8]),
        .I2(hssio_state[3]),
        .I3(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_5_n_0 ),
        .I4(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_4_n_0 ),
        .I5(\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_3_n_0 ),
        .O(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair6" *) 
  LUT4 #(
    .INIT(16'hFFFE)) 
    \GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_4 
       (.I0(hssio_state[2]),
        .I1(hssio_state[4]),
        .I2(bsc_en_vtc_1),
        .I3(hssio_state[1]),
        .O(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair9" *) 
  LUT3 #(
    .INIT(8'hF8)) 
    \GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_5 
       (.I0(Q),
        .I1(hssio_state[5]),
        .I2(hssio_state[0]),
        .O(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_cell_pll0lock_inst_n_10),
        .Q(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 ),
        .R(rst_in_sync));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_i_2 
       (.I0(hssio_state[5]),
        .I1(Q),
        .I2(hssio_state[0]),
        .I3(hssio_state[3]),
        .I4(hssio_state[8]),
        .I5(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_4_n_0 ),
        .O(\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_i_2_n_0 ));
  FDRE \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_cell_wait_pll0_fab_timeout_inst_n_4),
        .Q(\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_n_0 ),
        .R(rst_in_sync));
  (* SOFT_HLUTNM = "soft_lutpair6" *) 
  LUT4 #(
    .INIT(16'hFEE8)) 
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_2 
       (.I0(hssio_state[1]),
        .I1(hssio_state[4]),
        .I2(bsc_en_vtc_1),
        .I3(hssio_state[2]),
        .O(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFEA)) 
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_5 
       (.I0(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_8_n_0 ),
        .I1(Q),
        .I2(hssio_state[5]),
        .I3(hssio_state[0]),
        .I4(hssio_state[1]),
        .I5(hssio_state[8]),
        .O(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_5_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFEFFFEFE01)) 
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_8 
       (.I0(Q),
        .I1(hssio_state[5]),
        .I2(hssio_state[3]),
        .I3(hssio_state[4]),
        .I4(bsc_en_vtc_1),
        .I5(hssio_state[2]),
        .O(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_8_n_0 ));
  FDSE #(
    .INIT(1'b0)) 
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_cell_pll0lock_inst_n_8),
        .Q(timeout_cntr_rst),
        .S(rst_in_sync));
  FDRE \bs_rst_gen[0].bs_dly_rst_r_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[0]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[0].bs_rst_r_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[0]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[10].bs_dly_rst_r_reg[10] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[10]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[10].bs_rst_r_reg[10] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[10]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[11].bs_dly_rst_r_reg[11] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[11]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[11].bs_rst_r_reg[11] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[11]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[12].bs_dly_rst_r_reg[12] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[12]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[12].bs_rst_r_reg[12] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[12]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[13].bs_dly_rst_r_reg[13] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[13]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[13].bs_rst_r_reg[13] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[13]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[14].bs_dly_rst_r_reg[14] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[14]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[14].bs_rst_r_reg[14] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[14]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[15].bs_dly_rst_r_reg[15] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[15]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[15].bs_rst_r_reg[15] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[15]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[16].bs_dly_rst_r_reg[16] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[16]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[16].bs_rst_r_reg[16] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[16]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[17].bs_dly_rst_r_reg[17] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[17]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[17].bs_rst_r_reg[17] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[17]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[18].bs_dly_rst_r_reg[18] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[18]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[18].bs_rst_r_reg[18] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[18]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[19].bs_dly_rst_r_reg[19] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[19]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[19].bs_rst_r_reg[19] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[19]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[1].bs_dly_rst_r_reg[1] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[1]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[1].bs_rst_r_reg[1] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[1]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[20].bs_dly_rst_r_reg[20] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[20]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[20].bs_rst_r_reg[20] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[20]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[21].bs_dly_rst_r_reg[21] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[21]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[21].bs_rst_r_reg[21] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[21]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[22].bs_dly_rst_r_reg[22] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[22]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[22].bs_rst_r_reg[22] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[22]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[23].bs_dly_rst_r_reg[23] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[23]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[23].bs_rst_r_reg[23] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[23]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[24].bs_dly_rst_r_reg[24] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[24]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[24].bs_rst_r_reg[24] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[24]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[25].bs_dly_rst_r_reg[25] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[25]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[25].bs_rst_r_reg[25] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[25]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[26].bs_dly_rst_r_reg[26] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[26]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[26].bs_rst_r_reg[26] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[26]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[27].bs_dly_rst_r_reg[27] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[27]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[27].bs_rst_r_reg[27] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[27]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[28].bs_dly_rst_r_reg[28] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[28]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[28].bs_rst_r_reg[28] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[28]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[29].bs_dly_rst_r_reg[29] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[29]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[29].bs_rst_r_reg[29] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[29]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[2].bs_dly_rst_r_reg[2] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[2]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[2].bs_rst_r_reg[2] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[2]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[30].bs_dly_rst_r_reg[30] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[30]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[30].bs_rst_r_reg[30] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[30]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[31].bs_dly_rst_r_reg[31] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[31]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[31].bs_rst_r_reg[31] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[31]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[32].bs_dly_rst_r_reg[32] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[32]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[32].bs_rst_r_reg[32] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[32]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[33].bs_dly_rst_r_reg[33] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[33]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[33].bs_rst_r_reg[33] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[33]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[34].bs_dly_rst_r_reg[34] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[34]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[34].bs_rst_r_reg[34] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[34]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[35].bs_dly_rst_r_reg[35] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[35]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[35].bs_rst_r_reg[35] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[35]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[36].bs_dly_rst_r_reg[36] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[36]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[36].bs_rst_r_reg[36] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[36]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[37].bs_dly_rst_r_reg[37] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[37]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[37].bs_rst_r_reg[37] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[37]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[38].bs_dly_rst_r_reg[38] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[38]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[38].bs_rst_r_reg[38] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[38]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[39].bs_dly_rst_r_reg[39] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[39]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[39].bs_rst_r_reg[39] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[39]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[3].bs_dly_rst_r_reg[3] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[3]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[3].bs_rst_r_reg[3] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[3]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[40].bs_dly_rst_r_reg[40] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[40]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[40].bs_rst_r_reg[40] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[40]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[41].bs_dly_rst_r_reg[41] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[41]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[41].bs_rst_r_reg[41] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[41]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[42].bs_dly_rst_r_reg[42] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[42]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[42].bs_rst_r_reg[42] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[42]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[43].bs_dly_rst_r_reg[43] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[43]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[43].bs_rst_r_reg[43] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[43]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[44].bs_dly_rst_r_reg[44] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[44]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[44].bs_rst_r_reg[44] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[44]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[45].bs_dly_rst_r_reg[45] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[45]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[45].bs_rst_r_reg[45] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[45]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[46].bs_dly_rst_r_reg[46] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[46]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[46].bs_rst_r_reg[46] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[46]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[47].bs_dly_rst_r_reg[47] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[47]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[47].bs_rst_r_reg[47] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[47]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[48].bs_dly_rst_r_reg[48] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[48]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[48].bs_rst_r_reg[48] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[48]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[49].bs_dly_rst_r_reg[49] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[49]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[49].bs_rst_r_reg[49] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[49]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[4].bs_dly_rst_r_reg[4] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[4]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[4].bs_rst_r_reg[4] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[4]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[50].bs_dly_rst_r_reg[50] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[50]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[50].bs_rst_r_reg[50] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[50]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[51].bs_dly_rst_r_reg[51] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[51]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[51].bs_rst_r_reg[51] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[51]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[5].bs_dly_rst_r_reg[5] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[5]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[5].bs_rst_r_reg[5] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[5]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[6].bs_dly_rst_r_reg[6] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[6]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[6].bs_rst_r_reg[6] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[6]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[7].bs_dly_rst_r_reg[7] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[7]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[7].bs_rst_r_reg[7] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[7]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[8].bs_dly_rst_r_reg[8] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[8]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[8].bs_rst_r_reg[8] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[8]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[9].bs_dly_rst_r_reg[9] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_dly_rst_r[9]),
        .R(1'b0));
  (* equivalent_register_removal = "no" *) 
  FDRE \bs_rst_gen[9].bs_rst_r_reg[9] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .Q(bs_rst_r[9]),
        .R(1'b0));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[0]),
        .Q(bs_rst_int_r[0]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[10] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[10]),
        .Q(bs_rst_int_r[10]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[11] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[11]),
        .Q(bs_rst_int_r[11]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[12] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[12]),
        .Q(bs_rst_int_r[12]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[13] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[13]),
        .Q(bs_rst_int_r[13]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[14] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[14]),
        .Q(bs_rst_int_r[14]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[15] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[15]),
        .Q(bs_rst_int_r[15]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[16] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[16]),
        .Q(bs_rst_int_r[16]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[17] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[17]),
        .Q(bs_rst_int_r[17]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[18] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[18]),
        .Q(bs_rst_int_r[18]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[19] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[19]),
        .Q(bs_rst_int_r[19]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[1] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[1]),
        .Q(bs_rst_int_r[1]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[20] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[20]),
        .Q(bs_rst_int_r[20]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[21] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[21]),
        .Q(bs_rst_int_r[21]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[22] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[22]),
        .Q(bs_rst_int_r[22]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[23] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[23]),
        .Q(bs_rst_int_r[23]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[24] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[24]),
        .Q(bs_rst_int_r[24]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[25] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[25]),
        .Q(bs_rst_int_r[25]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[26] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[26]),
        .Q(bs_rst_int_r[26]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[27] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[27]),
        .Q(bs_rst_int_r[27]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[28] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[28]),
        .Q(bs_rst_int_r[28]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[29] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[29]),
        .Q(bs_rst_int_r[29]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[2] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[2]),
        .Q(bs_rst_int_r[2]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[30] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[30]),
        .Q(bs_rst_int_r[30]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[31] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[31]),
        .Q(bs_rst_int_r[31]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[32] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[32]),
        .Q(bs_rst_int_r[32]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[33] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[33]),
        .Q(bs_rst_int_r[33]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[34] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[34]),
        .Q(bs_rst_int_r[34]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[35] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[35]),
        .Q(bs_rst_int_r[35]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[36] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[36]),
        .Q(bs_rst_int_r[36]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[37] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[37]),
        .Q(bs_rst_int_r[37]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[38] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[38]),
        .Q(bs_rst_int_r[38]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[39] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[39]),
        .Q(bs_rst_int_r[39]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[3] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[3]),
        .Q(bs_rst_int_r[3]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[40] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[40]),
        .Q(bs_rst_int_r[40]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[41] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[41]),
        .Q(bs_rst_int_r[41]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[42] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[42]),
        .Q(bs_rst_int_r[42]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[43] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[43]),
        .Q(bs_rst_int_r[43]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[44] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[44]),
        .Q(bs_rst_int_r[44]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[45] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[45]),
        .Q(bs_rst_int_r[45]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[46] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[46]),
        .Q(bs_rst_int_r[46]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[47] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[47]),
        .Q(bs_rst_int_r[47]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[48] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[48]),
        .Q(bs_rst_int_r[48]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[49] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[49]),
        .Q(bs_rst_int_r[49]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[4] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[4]),
        .Q(bs_rst_int_r[4]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[50] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[50]),
        .Q(bs_rst_int_r[50]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[51] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[51]),
        .Q(bs_rst_int_r[51]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[5] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[5]),
        .Q(bs_rst_int_r[5]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[6] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[6]),
        .Q(bs_rst_int_r[6]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[7] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[7]),
        .Q(bs_rst_int_r[7]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[8] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[8]),
        .Q(bs_rst_int_r[8]),
        .S(bs_rst_dphy_sync));
  (* KEEP = "yes" *) 
  FDSE #(
    .INIT(1'b0)) 
    \bs_rst_int_r_reg[9] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_r[9]),
        .Q(bs_rst_int_r[9]),
        .S(bs_rst_dphy_sync));
  (* SOFT_HLUTNM = "soft_lutpair5" *) 
  LUT4 #(
    .INIT(16'h0116)) 
    \hssio_state_inferred__3/i_ 
       (.I0(hssio_state[0]),
        .I1(hssio_state[1]),
        .I2(hssio_state[2]),
        .I3(hssio_state[3]),
        .O(\hssio_state_inferred__3/i__n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair5" *) 
  LUT4 #(
    .INIT(16'hFEE8)) 
    \hssio_state_inferred__3/i___0 
       (.I0(hssio_state[0]),
        .I1(hssio_state[1]),
        .I2(hssio_state[2]),
        .I3(hssio_state[3]),
        .O(\hssio_state_inferred__3/i___0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2" *) 
  LUT5 #(
    .INIT(32'h00010116)) 
    \hssio_state_inferred__3/i___1 
       (.I0(hssio_state[4]),
        .I1(hssio_state[5]),
        .I2(bsc_en_vtc_1),
        .I3(Q),
        .I4(hssio_state[8]),
        .O(\hssio_state_inferred__3/i___1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair2" *) 
  LUT5 #(
    .INIT(32'hFFFEFEE8)) 
    \hssio_state_inferred__3/i___2 
       (.I0(hssio_state[4]),
        .I1(hssio_state[5]),
        .I2(bsc_en_vtc_1),
        .I3(Q),
        .I4(hssio_state[8]),
        .O(\hssio_state_inferred__3/i___2_n_0 ));
  LUT4 #(
    .INIT(16'h0012)) 
    \hssio_state_inferred__3/i___3 
       (.I0(\hssio_state_inferred__3/i__n_0 ),
        .I1(\hssio_state_inferred__3/i___0_n_0 ),
        .I2(\hssio_state_inferred__3/i___1_n_0 ),
        .I3(\hssio_state_inferred__3/i___2_n_0 ),
        .O(\hssio_state_inferred__3/i___3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair10" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \pll0_fab_clk_cntr[0]_i_1 
       (.I0(pll0_fab_clk_cntr_reg__0[0]),
        .O(p_0_in[0]));
  (* SOFT_HLUTNM = "soft_lutpair10" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \pll0_fab_clk_cntr[1]_i_1 
       (.I0(pll0_fab_clk_cntr_reg__0[0]),
        .I1(pll0_fab_clk_cntr_reg__0[1]),
        .O(p_0_in[1]));
  (* SOFT_HLUTNM = "soft_lutpair7" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \pll0_fab_clk_cntr[2]_i_1 
       (.I0(pll0_fab_clk_cntr_reg__0[0]),
        .I1(pll0_fab_clk_cntr_reg__0[1]),
        .I2(pll0_fab_clk_cntr_reg__0[2]),
        .O(p_0_in[2]));
  (* SOFT_HLUTNM = "soft_lutpair7" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \pll0_fab_clk_cntr[3]_i_1 
       (.I0(pll0_fab_clk_cntr_reg__0[1]),
        .I1(pll0_fab_clk_cntr_reg__0[0]),
        .I2(pll0_fab_clk_cntr_reg__0[2]),
        .I3(pll0_fab_clk_cntr_reg__0[3]),
        .O(p_0_in[3]));
  (* SOFT_HLUTNM = "soft_lutpair4" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \pll0_fab_clk_cntr[4]_i_1 
       (.I0(pll0_fab_clk_cntr_reg__0[2]),
        .I1(pll0_fab_clk_cntr_reg__0[0]),
        .I2(pll0_fab_clk_cntr_reg__0[1]),
        .I3(pll0_fab_clk_cntr_reg__0[3]),
        .I4(pll0_fab_clk_cntr_reg__0[4]),
        .O(p_0_in[4]));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \pll0_fab_clk_cntr[5]_i_1 
       (.I0(pll0_fab_clk_cntr_reg__0[3]),
        .I1(pll0_fab_clk_cntr_reg__0[1]),
        .I2(pll0_fab_clk_cntr_reg__0[0]),
        .I3(pll0_fab_clk_cntr_reg__0[2]),
        .I4(pll0_fab_clk_cntr_reg__0[4]),
        .I5(pll0_fab_clk_cntr_reg__0[5]),
        .O(p_0_in[5]));
  LUT3 #(
    .INIT(8'h78)) 
    \pll0_fab_clk_cntr[6]_i_2 
       (.I0(\pll0_fab_clk_cntr[6]_i_4_n_0 ),
        .I1(pll0_fab_clk_cntr_reg__0[5]),
        .I2(pll0_fab_clk_cntr_reg),
        .O(p_0_in[6]));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    \pll0_fab_clk_cntr[6]_i_3 
       (.I0(pll0_fab_clk_cntr_reg__0[3]),
        .I1(pll0_fab_clk_cntr_reg__0[2]),
        .I2(pll0_fab_clk_cntr_reg__0[5]),
        .I3(pll0_fab_clk_cntr_reg__0[4]),
        .I4(pll0_fab_clk_cntr_reg__0[1]),
        .I5(pll0_fab_clk_cntr_reg__0[0]),
        .O(\pll0_fab_clk_cntr[6]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair4" *) 
  LUT5 #(
    .INIT(32'h80000000)) 
    \pll0_fab_clk_cntr[6]_i_4 
       (.I0(pll0_fab_clk_cntr_reg__0[4]),
        .I1(pll0_fab_clk_cntr_reg__0[2]),
        .I2(pll0_fab_clk_cntr_reg__0[0]),
        .I3(pll0_fab_clk_cntr_reg__0[1]),
        .I4(pll0_fab_clk_cntr_reg__0[3]),
        .O(\pll0_fab_clk_cntr[6]_i_4_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \pll0_fab_clk_cntr_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(p_0_in[0]),
        .Q(pll0_fab_clk_cntr_reg__0[0]),
        .R(sync_cell_start_fab_cntr_pll0_inst_n_0));
  FDRE #(
    .INIT(1'b0)) 
    \pll0_fab_clk_cntr_reg[1] 
       (.C(CLK),
        .CE(1'b1),
        .D(p_0_in[1]),
        .Q(pll0_fab_clk_cntr_reg__0[1]),
        .R(sync_cell_start_fab_cntr_pll0_inst_n_0));
  FDRE #(
    .INIT(1'b0)) 
    \pll0_fab_clk_cntr_reg[2] 
       (.C(CLK),
        .CE(1'b1),
        .D(p_0_in[2]),
        .Q(pll0_fab_clk_cntr_reg__0[2]),
        .R(sync_cell_start_fab_cntr_pll0_inst_n_0));
  FDRE #(
    .INIT(1'b0)) 
    \pll0_fab_clk_cntr_reg[3] 
       (.C(CLK),
        .CE(1'b1),
        .D(p_0_in[3]),
        .Q(pll0_fab_clk_cntr_reg__0[3]),
        .R(sync_cell_start_fab_cntr_pll0_inst_n_0));
  FDRE #(
    .INIT(1'b0)) 
    \pll0_fab_clk_cntr_reg[4] 
       (.C(CLK),
        .CE(1'b1),
        .D(p_0_in[4]),
        .Q(pll0_fab_clk_cntr_reg__0[4]),
        .R(sync_cell_start_fab_cntr_pll0_inst_n_0));
  FDRE #(
    .INIT(1'b0)) 
    \pll0_fab_clk_cntr_reg[5] 
       (.C(CLK),
        .CE(1'b1),
        .D(p_0_in[5]),
        .Q(pll0_fab_clk_cntr_reg__0[5]),
        .R(sync_cell_start_fab_cntr_pll0_inst_n_0));
  FDRE #(
    .INIT(1'b0)) 
    \pll0_fab_clk_cntr_reg[6] 
       (.C(CLK),
        .CE(1'b1),
        .D(p_0_in[6]),
        .Q(pll0_fab_clk_cntr_reg),
        .R(sync_cell_start_fab_cntr_pll0_inst_n_0));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_217 sync_cell_bs_rst_dphy_inst
       (.SS(bs_rst_dphy_sync),
        .bs_rst_dphy_in(bs_rst_dphy_in),
        .riu_clk(riu_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_218 sync_cell_dly_rdy_inst
       (.D(p_0_in_0[6]),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] (locked),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6]_0 (\hssio_state_inferred__3/i___3_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg (\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 (\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_3_n_0 ),
        .Q({bsc_en_vtc_1,hssio_state[5],hssio_state[3]}),
        .in0(in0),
        .out(all_bsc_dly_rdy),
        .riu_clk(riu_clk),
        .\sync_flop_1_reg[0]_0 (sync_cell_dly_rdy_inst_n_1));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_219 sync_cell_mult_intf_lock_inst
       (.riu_clk(riu_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_220 sync_cell_pll0lock_inst
       (.D({p_0_in_0[8:7],p_0_in_0[4:2],p_0_in_0[0]}),
        .\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg (\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_i_3_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 (\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_reg (\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_2_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_reg_0 (\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_3_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[0] (\GEN_RIU_NOT_FROM_PLL.hssio_state[0]_i_3_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[2] (wait_pll_lock_timeout_reg_n_0),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] (\hssio_state_inferred__3/i___3_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[4] (wait_pll0_x_fab_clk_timeout_sync),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] (sync_cell_pll0lock_inst_n_9),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] (all_bsc_dly_rdy),
        .\GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg (\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_3_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 (\GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 ),
        .\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg (wait_pll_lock_timeout_i_3_n_0),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg (sync_cell_pll0lock_inst_n_8),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 (\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_1 ),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_1 (\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_5_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_2 (\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_2_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_3 (sync_cell_wait_pll0_fab_timeout_inst_n_2),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_4 (\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_5_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_5 (sync_cell_dly_rdy_inst_n_1),
        .Q({hssio_state[8],Q,bsc_en_vtc_1,hssio_state[5:0]}),
        .bs_dly_rst(bs_dly_rst),
        .bsc_en_vtc(bsc_en_vtc),
        .n0_vtc_rdy_out(n0_vtc_rdy_out),
        .n1_vtc_rdy_out(n1_vtc_rdy_out),
        .out(locked),
        .pll0_locked_out(pll0_locked_out),
        .riu_clk(riu_clk),
        .rst_seq_done(rst_seq_done),
        .\sync_flop_1_reg[0]_0 (sync_cell_pll0lock_inst_n_7),
        .\sync_flop_1_reg[0]_1 (sync_cell_pll0lock_inst_n_10),
        .\sync_flop_1_reg[0]_2 (sync_cell_pll0lock_inst_n_11),
        .timeout_cntr_rst(timeout_cntr_rst));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_221 sync_cell_rst_inst
       (.out(rst_in_sync),
        .riu_clk(riu_clk),
        .rst(rst));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_222 sync_cell_start_fab_cntr_pll0_inst
       (.CLK(CLK),
        .Q(pll0_fab_clk_cntr_reg),
        .SR(sync_cell_start_fab_cntr_pll0_inst_n_0),
        .in0(\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_n_0 ),
        .\pll0_fab_clk_cntr_reg[0] (\pll0_fab_clk_cntr[6]_i_3_n_0 ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_223 sync_cell_wait_pll0_fab_timeout_inst
       (.D(p_0_in_0[5]),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] (sync_cell_wait_pll0_fab_timeout_inst_n_2),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[4] (sync_cell_wait_pll0_fab_timeout_inst_n_4),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[5] (\hssio_state_inferred__3/i___3_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[5]_0 (all_bsc_dly_rdy),
        .\GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg (locked),
        .\GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg_0 (wait_pll_lock_timeout_i_3_n_0),
        .\GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg_1 (\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_3_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg (\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_i_2_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_0 (sync_cell_pll0lock_inst_n_7),
        .\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_1 (\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg (\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_3_n_0 ),
        .\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 (\GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_4_n_0 ),
        .Q({hssio_state[8],bsc_en_vtc_1,hssio_state[5:2]}),
        .in0(wait_pll0_x_fab_clk_timeout),
        .out(wait_pll0_x_fab_clk_timeout_sync),
        .pll0_clkoutphy_en_in(pll0_clkoutphy_en_in),
        .riu_clk(riu_clk),
        .\sync_flop_1_reg[0]_0 (sync_cell_wait_pll0_fab_timeout_inst_n_3));
  LUT5 #(
    .INIT(32'hFFFFFFFE)) 
    \timeout_cntr[0]_i_1 
       (.I0(timeout_cntr_reg[0]),
        .I1(timeout_cntr_reg[1]),
        .I2(\timeout_cntr[0]_i_3_n_0 ),
        .I3(\timeout_cntr[0]_i_4_n_0 ),
        .I4(\timeout_cntr[0]_i_5_n_0 ),
        .O(timeout_cntr));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFFFFFFD)) 
    \timeout_cntr[0]_i_3 
       (.I0(timeout_cntr_reg[6]),
        .I1(timeout_cntr_reg[7]),
        .I2(timeout_cntr_reg[4]),
        .I3(timeout_cntr_reg[5]),
        .I4(timeout_cntr_reg[3]),
        .I5(timeout_cntr_reg[2]),
        .O(\timeout_cntr[0]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF7FFFFFFFFFFF)) 
    \timeout_cntr[0]_i_4 
       (.I0(timeout_cntr_reg[18]),
        .I1(timeout_cntr_reg[19]),
        .I2(timeout_cntr_reg[16]),
        .I3(timeout_cntr_reg[17]),
        .I4(timeout_cntr_reg[15]),
        .I5(timeout_cntr_reg[14]),
        .O(\timeout_cntr[0]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFEFFFFFFFF)) 
    \timeout_cntr[0]_i_5 
       (.I0(timeout_cntr_reg[12]),
        .I1(timeout_cntr_reg[13]),
        .I2(timeout_cntr_reg[10]),
        .I3(timeout_cntr_reg[11]),
        .I4(timeout_cntr_reg[8]),
        .I5(timeout_cntr_reg[9]),
        .O(\timeout_cntr[0]_i_5_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    \timeout_cntr[0]_i_6 
       (.I0(timeout_cntr_reg[0]),
        .O(\timeout_cntr[0]_i_6_n_0 ));
  FDRE \timeout_cntr_reg[0] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[0]_i_2_n_15 ),
        .Q(timeout_cntr_reg[0]),
        .R(timeout_cntr_rst));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \timeout_cntr_reg[0]_i_2 
       (.CI(1'b0),
        .CI_TOP(1'b0),
        .CO({\timeout_cntr_reg[0]_i_2_n_0 ,\timeout_cntr_reg[0]_i_2_n_1 ,\timeout_cntr_reg[0]_i_2_n_2 ,\timeout_cntr_reg[0]_i_2_n_3 ,\timeout_cntr_reg[0]_i_2_n_4 ,\timeout_cntr_reg[0]_i_2_n_5 ,\timeout_cntr_reg[0]_i_2_n_6 ,\timeout_cntr_reg[0]_i_2_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1}),
        .O({\timeout_cntr_reg[0]_i_2_n_8 ,\timeout_cntr_reg[0]_i_2_n_9 ,\timeout_cntr_reg[0]_i_2_n_10 ,\timeout_cntr_reg[0]_i_2_n_11 ,\timeout_cntr_reg[0]_i_2_n_12 ,\timeout_cntr_reg[0]_i_2_n_13 ,\timeout_cntr_reg[0]_i_2_n_14 ,\timeout_cntr_reg[0]_i_2_n_15 }),
        .S({timeout_cntr_reg[7:1],\timeout_cntr[0]_i_6_n_0 }));
  FDRE \timeout_cntr_reg[10] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[8]_i_1_n_13 ),
        .Q(timeout_cntr_reg[10]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[11] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[8]_i_1_n_12 ),
        .Q(timeout_cntr_reg[11]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[12] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[8]_i_1_n_11 ),
        .Q(timeout_cntr_reg[12]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[13] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[8]_i_1_n_10 ),
        .Q(timeout_cntr_reg[13]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[14] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[8]_i_1_n_9 ),
        .Q(timeout_cntr_reg[14]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[15] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[8]_i_1_n_8 ),
        .Q(timeout_cntr_reg[15]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[16] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[16]_i_1_n_15 ),
        .Q(timeout_cntr_reg[16]),
        .R(timeout_cntr_rst));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \timeout_cntr_reg[16]_i_1 
       (.CI(\timeout_cntr_reg[8]_i_1_n_0 ),
        .CI_TOP(1'b0),
        .CO({\NLW_timeout_cntr_reg[16]_i_1_CO_UNCONNECTED [7:3],\timeout_cntr_reg[16]_i_1_n_5 ,\timeout_cntr_reg[16]_i_1_n_6 ,\timeout_cntr_reg[16]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\NLW_timeout_cntr_reg[16]_i_1_O_UNCONNECTED [7:4],\timeout_cntr_reg[16]_i_1_n_12 ,\timeout_cntr_reg[16]_i_1_n_13 ,\timeout_cntr_reg[16]_i_1_n_14 ,\timeout_cntr_reg[16]_i_1_n_15 }),
        .S({1'b0,1'b0,1'b0,1'b0,timeout_cntr_reg[19:16]}));
  FDRE \timeout_cntr_reg[17] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[16]_i_1_n_14 ),
        .Q(timeout_cntr_reg[17]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[18] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[16]_i_1_n_13 ),
        .Q(timeout_cntr_reg[18]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[19] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[16]_i_1_n_12 ),
        .Q(timeout_cntr_reg[19]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[1] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[0]_i_2_n_14 ),
        .Q(timeout_cntr_reg[1]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[2] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[0]_i_2_n_13 ),
        .Q(timeout_cntr_reg[2]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[3] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[0]_i_2_n_12 ),
        .Q(timeout_cntr_reg[3]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[4] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[0]_i_2_n_11 ),
        .Q(timeout_cntr_reg[4]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[5] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[0]_i_2_n_10 ),
        .Q(timeout_cntr_reg[5]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[6] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[0]_i_2_n_9 ),
        .Q(timeout_cntr_reg[6]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[7] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[0]_i_2_n_8 ),
        .Q(timeout_cntr_reg[7]),
        .R(timeout_cntr_rst));
  FDRE \timeout_cntr_reg[8] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[8]_i_1_n_15 ),
        .Q(timeout_cntr_reg[8]),
        .R(timeout_cntr_rst));
  (* ADDER_THRESHOLD = "16" *) 
  CARRY8 \timeout_cntr_reg[8]_i_1 
       (.CI(\timeout_cntr_reg[0]_i_2_n_0 ),
        .CI_TOP(1'b0),
        .CO({\timeout_cntr_reg[8]_i_1_n_0 ,\timeout_cntr_reg[8]_i_1_n_1 ,\timeout_cntr_reg[8]_i_1_n_2 ,\timeout_cntr_reg[8]_i_1_n_3 ,\timeout_cntr_reg[8]_i_1_n_4 ,\timeout_cntr_reg[8]_i_1_n_5 ,\timeout_cntr_reg[8]_i_1_n_6 ,\timeout_cntr_reg[8]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .O({\timeout_cntr_reg[8]_i_1_n_8 ,\timeout_cntr_reg[8]_i_1_n_9 ,\timeout_cntr_reg[8]_i_1_n_10 ,\timeout_cntr_reg[8]_i_1_n_11 ,\timeout_cntr_reg[8]_i_1_n_12 ,\timeout_cntr_reg[8]_i_1_n_13 ,\timeout_cntr_reg[8]_i_1_n_14 ,\timeout_cntr_reg[8]_i_1_n_15 }),
        .S(timeout_cntr_reg[15:8]));
  FDRE \timeout_cntr_reg[9] 
       (.C(riu_clk),
        .CE(timeout_cntr),
        .D(\timeout_cntr_reg[8]_i_1_n_14 ),
        .Q(timeout_cntr_reg[9]),
        .R(timeout_cntr_rst));
  FDRE wait_pll0_x_fab_clk_timeout_reg
       (.C(CLK),
        .CE(1'b1),
        .D(pll0_fab_clk_cntr_reg),
        .Q(wait_pll0_x_fab_clk_timeout),
        .R(1'b0));
  LUT6 #(
    .INIT(64'h000000002222E222)) 
    wait_pll_lock_timeout_i_1
       (.I0(wait_pll_lock_timeout_reg_n_0),
        .I1(wait_pll_lock_timeout_i_2_n_0),
        .I2(wait_pll_lock_timeout_i_3_n_0),
        .I3(hssio_state[2]),
        .I4(wait_pll_lock_timeout_i_4_n_0),
        .I5(timeout_cntr_rst),
        .O(wait_pll_lock_timeout_i_1_n_0));
  LUT6 #(
    .INIT(64'h8000800080000000)) 
    wait_pll_lock_timeout_i_2
       (.I0(wait_pll_lock_timeout_i_5_n_0),
        .I1(wait_pll_lock_timeout_i_6_n_0),
        .I2(wait_pll_lock_timeout_i_7_n_0),
        .I3(wait_pll_lock_timeout_i_8_n_0),
        .I4(\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_2_n_0 ),
        .I5(wait_pll_lock_timeout_i_9_n_0),
        .O(wait_pll_lock_timeout_i_2_n_0));
  LUT6 #(
    .INIT(64'h0000000000000001)) 
    wait_pll_lock_timeout_i_3
       (.I0(hssio_state[0]),
        .I1(Q),
        .I2(hssio_state[5]),
        .I3(hssio_state[8]),
        .I4(hssio_state[3]),
        .I5(hssio_state[1]),
        .O(wait_pll_lock_timeout_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair8" *) 
  LUT2 #(
    .INIT(4'hE)) 
    wait_pll_lock_timeout_i_4
       (.I0(hssio_state[4]),
        .I1(bsc_en_vtc_1),
        .O(wait_pll_lock_timeout_i_4_n_0));
  LUT2 #(
    .INIT(4'h1)) 
    wait_pll_lock_timeout_i_5
       (.I0(timeout_cntr_reg[0]),
        .I1(timeout_cntr_reg[1]),
        .O(wait_pll_lock_timeout_i_5_n_0));
  LUT6 #(
    .INIT(64'h0080000000000000)) 
    wait_pll_lock_timeout_i_6
       (.I0(timeout_cntr_reg[16]),
        .I1(timeout_cntr_reg[17]),
        .I2(timeout_cntr_reg[14]),
        .I3(timeout_cntr_reg[15]),
        .I4(timeout_cntr_reg[19]),
        .I5(timeout_cntr_reg[18]),
        .O(wait_pll_lock_timeout_i_6_n_0));
  LUT6 #(
    .INIT(64'h0000000100000000)) 
    wait_pll_lock_timeout_i_7
       (.I0(timeout_cntr_reg[4]),
        .I1(timeout_cntr_reg[5]),
        .I2(timeout_cntr_reg[2]),
        .I3(timeout_cntr_reg[3]),
        .I4(timeout_cntr_reg[7]),
        .I5(timeout_cntr_reg[6]),
        .O(wait_pll_lock_timeout_i_7_n_0));
  LUT6 #(
    .INIT(64'h0000000000000010)) 
    wait_pll_lock_timeout_i_8
       (.I0(timeout_cntr_reg[10]),
        .I1(timeout_cntr_reg[11]),
        .I2(timeout_cntr_reg[9]),
        .I3(timeout_cntr_reg[8]),
        .I4(timeout_cntr_reg[13]),
        .I5(timeout_cntr_reg[12]),
        .O(wait_pll_lock_timeout_i_8_n_0));
  (* SOFT_HLUTNM = "soft_lutpair9" *) 
  LUT3 #(
    .INIT(8'hEB)) 
    wait_pll_lock_timeout_i_9
       (.I0(hssio_state[0]),
        .I1(Q),
        .I2(hssio_state[5]),
        .O(wait_pll_lock_timeout_i_9_n_0));
  FDRE #(
    .INIT(1'b0)) 
    wait_pll_lock_timeout_reg
       (.C(riu_clk),
        .CE(1'b1),
        .D(wait_pll_lock_timeout_i_1_n_0),
        .Q(wait_pll_lock_timeout_reg_n_0),
        .R(1'b0));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_rx_bs
   (fifo_wr_clk_0,
    rx_bs0_rx_bit_ctrl_out,
    rx_bs0_tx_bit_ctrl_out,
    fifo_empty_2,
    rx_bs2_rx_bit_ctrl_out,
    rx_bs2_tx_bit_ctrl_out,
    data_to_fabric_data_rxp0,
    fifo_empty_4,
    rx_bs4_rx_bit_ctrl_out,
    rx_bs4_tx_bit_ctrl_out,
    data_to_fabric_data_rxp1,
    fifo_empty_6,
    rx_bs6_rx_bit_ctrl_out,
    rx_bs6_tx_bit_ctrl_out,
    data_to_fabric_data_rxp2,
    fifo_empty_8,
    rx_bs8_rx_bit_ctrl_out,
    rx_bs8_tx_bit_ctrl_out,
    data_to_fabric_data_rxp3,
    data_to_bs_out,
    fifo_rd_clk_0,
    rx_bs_rst_in,
    rx_bs_rst_dly_ext_in,
    rx_bs0_rx_bit_ctrl_in,
    rx_bs0_tx_bit_ctrl_in,
    fifo_rd_en_2,
    rx_bs2_rx_bit_ctrl_in,
    rx_bs2_tx_bit_ctrl_in,
    fifo_rd_en_4,
    rx_bs4_rx_bit_ctrl_in,
    rx_bs4_tx_bit_ctrl_in,
    fifo_rd_en_6,
    rx_bs6_rx_bit_ctrl_in,
    rx_bs6_tx_bit_ctrl_in,
    fifo_rd_en_8,
    rx_bs8_rx_bit_ctrl_in,
    rx_bs8_tx_bit_ctrl_in);
  output fifo_wr_clk_0;
  output [39:0]rx_bs0_rx_bit_ctrl_out;
  output [39:0]rx_bs0_tx_bit_ctrl_out;
  output fifo_empty_2;
  output [39:0]rx_bs2_rx_bit_ctrl_out;
  output [39:0]rx_bs2_tx_bit_ctrl_out;
  output [7:0]data_to_fabric_data_rxp0;
  output fifo_empty_4;
  output [39:0]rx_bs4_rx_bit_ctrl_out;
  output [39:0]rx_bs4_tx_bit_ctrl_out;
  output [7:0]data_to_fabric_data_rxp1;
  output fifo_empty_6;
  output [39:0]rx_bs6_rx_bit_ctrl_out;
  output [39:0]rx_bs6_tx_bit_ctrl_out;
  output [7:0]data_to_fabric_data_rxp2;
  output fifo_empty_8;
  output [39:0]rx_bs8_rx_bit_ctrl_out;
  output [39:0]rx_bs8_tx_bit_ctrl_out;
  output [7:0]data_to_fabric_data_rxp3;
  input [4:0]data_to_bs_out;
  input fifo_rd_clk_0;
  input [4:0]rx_bs_rst_in;
  input [4:0]rx_bs_rst_dly_ext_in;
  input [39:0]rx_bs0_rx_bit_ctrl_in;
  input [39:0]rx_bs0_tx_bit_ctrl_in;
  input fifo_rd_en_2;
  input [39:0]rx_bs2_rx_bit_ctrl_in;
  input [39:0]rx_bs2_tx_bit_ctrl_in;
  input fifo_rd_en_4;
  input [39:0]rx_bs4_rx_bit_ctrl_in;
  input [39:0]rx_bs4_tx_bit_ctrl_in;
  input fifo_rd_en_6;
  input [39:0]rx_bs6_rx_bit_ctrl_in;
  input [39:0]rx_bs6_tx_bit_ctrl_in;
  input fifo_rd_en_8;
  input [39:0]rx_bs8_rx_bit_ctrl_in;
  input [39:0]rx_bs8_tx_bit_ctrl_in;

  wire \RX_BS[0].rx_bitslice_if_bs_n_0 ;
  wire \RX_BS[0].rx_bitslice_if_bs_n_82 ;
  wire \RX_BS[0].rx_bitslice_if_bs_n_83 ;
  wire \RX_BS[0].rx_bitslice_if_bs_n_84 ;
  wire \RX_BS[0].rx_bitslice_if_bs_n_85 ;
  wire \RX_BS[0].rx_bitslice_if_bs_n_86 ;
  wire \RX_BS[0].rx_bitslice_if_bs_n_87 ;
  wire \RX_BS[0].rx_bitslice_if_bs_n_88 ;
  wire \RX_BS[0].rx_bitslice_if_bs_n_89 ;
  wire [4:0]data_to_bs_out;
  wire [7:0]data_to_fabric_data_rxp0;
  wire [7:0]data_to_fabric_data_rxp1;
  wire [7:0]data_to_fabric_data_rxp2;
  wire [7:0]data_to_fabric_data_rxp3;
  wire fifo_empty_2;
  wire fifo_empty_4;
  wire fifo_empty_6;
  wire fifo_empty_8;
  wire fifo_rd_clk_0;
  wire fifo_rd_en_2;
  wire fifo_rd_en_4;
  wire fifo_rd_en_6;
  wire fifo_rd_en_8;
  wire fifo_wr_clk_0;
  wire [39:0]rx_bs0_rx_bit_ctrl_in;
  wire [39:0]rx_bs0_rx_bit_ctrl_out;
  wire [39:0]rx_bs0_tx_bit_ctrl_in;
  wire [39:0]rx_bs0_tx_bit_ctrl_out;
  wire [39:0]rx_bs2_rx_bit_ctrl_in;
  wire [39:0]rx_bs2_rx_bit_ctrl_out;
  wire [39:0]rx_bs2_tx_bit_ctrl_in;
  wire [39:0]rx_bs2_tx_bit_ctrl_out;
  wire [39:0]rx_bs4_rx_bit_ctrl_in;
  wire [39:0]rx_bs4_rx_bit_ctrl_out;
  wire [39:0]rx_bs4_tx_bit_ctrl_in;
  wire [39:0]rx_bs4_tx_bit_ctrl_out;
  wire [39:0]rx_bs6_rx_bit_ctrl_in;
  wire [39:0]rx_bs6_rx_bit_ctrl_out;
  wire [39:0]rx_bs6_tx_bit_ctrl_in;
  wire [39:0]rx_bs6_tx_bit_ctrl_out;
  wire [39:0]rx_bs8_rx_bit_ctrl_in;
  wire [39:0]rx_bs8_rx_bit_ctrl_out;
  wire [39:0]rx_bs8_tx_bit_ctrl_in;
  wire [39:0]rx_bs8_tx_bit_ctrl_out;
  wire [4:0]rx_bs_rst_dly_ext_in;
  wire [4:0]rx_bs_rst_in;
  wire [8:0]\NLW_RX_BS[0].rx_bitslice_if_bs_CNTVALUEOUT_UNCONNECTED ;
  wire [8:0]\NLW_RX_BS[0].rx_bitslice_if_bs_CNTVALUEOUT_EXT_UNCONNECTED ;
  wire \NLW_RX_BS[2].rx_bitslice_if_bs_FIFO_WRCLK_OUT_UNCONNECTED ;
  wire [8:0]\NLW_RX_BS[2].rx_bitslice_if_bs_CNTVALUEOUT_UNCONNECTED ;
  wire [8:0]\NLW_RX_BS[2].rx_bitslice_if_bs_CNTVALUEOUT_EXT_UNCONNECTED ;
  wire \NLW_RX_BS[4].rx_bitslice_if_bs_FIFO_WRCLK_OUT_UNCONNECTED ;
  wire [8:0]\NLW_RX_BS[4].rx_bitslice_if_bs_CNTVALUEOUT_UNCONNECTED ;
  wire [8:0]\NLW_RX_BS[4].rx_bitslice_if_bs_CNTVALUEOUT_EXT_UNCONNECTED ;
  wire \NLW_RX_BS[6].rx_bitslice_if_bs_FIFO_WRCLK_OUT_UNCONNECTED ;
  wire [8:0]\NLW_RX_BS[6].rx_bitslice_if_bs_CNTVALUEOUT_UNCONNECTED ;
  wire [8:0]\NLW_RX_BS[6].rx_bitslice_if_bs_CNTVALUEOUT_EXT_UNCONNECTED ;
  wire \NLW_RX_BS[8].rx_bitslice_if_bs_FIFO_WRCLK_OUT_UNCONNECTED ;
  wire [8:0]\NLW_RX_BS[8].rx_bitslice_if_bs_CNTVALUEOUT_UNCONNECTED ;
  wire [8:0]\NLW_RX_BS[8].rx_bitslice_if_bs_CNTVALUEOUT_EXT_UNCONNECTED ;

  (* box_type = "PRIMITIVE" *) 
  RX_BITSLICE #(
    .CASCADE("FALSE"),
    .DATA_TYPE("DATA_AND_CLOCK"),
    .DATA_WIDTH(8),
    .DELAY_FORMAT("TIME"),
    .DELAY_TYPE("FIXED"),
    .DELAY_VALUE(0),
    .DELAY_VALUE_EXT(0),
    .FIFO_SYNC_MODE("FALSE"),
    .IS_CLK_EXT_INVERTED(1'b0),
    .IS_CLK_INVERTED(1'b0),
    .IS_RST_DLY_EXT_INVERTED(1'b0),
    .IS_RST_DLY_INVERTED(1'b0),
    .IS_RST_INVERTED(1'b0),
    .REFCLK_FREQUENCY(1500.000000),
    .SIM_DEVICE("ULTRASCALE_PLUS_ES1"),
    .SIM_VERSION(2.000000),
    .UPDATE_MODE("ASYNC"),
    .UPDATE_MODE_EXT("ASYNC")) 
    \RX_BS[0].rx_bitslice_if_bs 
       (.CE(1'b0),
        .CE_EXT(1'b0),
        .CLK(1'b0),
        .CLK_EXT(1'b0),
        .CNTVALUEIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CNTVALUEIN_EXT({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CNTVALUEOUT(\NLW_RX_BS[0].rx_bitslice_if_bs_CNTVALUEOUT_UNCONNECTED [8:0]),
        .CNTVALUEOUT_EXT(\NLW_RX_BS[0].rx_bitslice_if_bs_CNTVALUEOUT_EXT_UNCONNECTED [8:0]),
        .DATAIN(data_to_bs_out[0]),
        .EN_VTC(1'b1),
        .EN_VTC_EXT(1'b1),
        .FIFO_EMPTY(\RX_BS[0].rx_bitslice_if_bs_n_0 ),
        .FIFO_RD_CLK(fifo_rd_clk_0),
        .FIFO_RD_EN(1'b1),
        .FIFO_WRCLK_OUT(fifo_wr_clk_0),
        .INC(1'b0),
        .INC_EXT(1'b0),
        .LOAD(1'b0),
        .LOAD_EXT(1'b0),
        .Q({\RX_BS[0].rx_bitslice_if_bs_n_82 ,\RX_BS[0].rx_bitslice_if_bs_n_83 ,\RX_BS[0].rx_bitslice_if_bs_n_84 ,\RX_BS[0].rx_bitslice_if_bs_n_85 ,\RX_BS[0].rx_bitslice_if_bs_n_86 ,\RX_BS[0].rx_bitslice_if_bs_n_87 ,\RX_BS[0].rx_bitslice_if_bs_n_88 ,\RX_BS[0].rx_bitslice_if_bs_n_89 }),
        .RST(rx_bs_rst_in[0]),
        .RST_DLY(rx_bs_rst_dly_ext_in[0]),
        .RST_DLY_EXT(rx_bs_rst_dly_ext_in[0]),
        .RX_BIT_CTRL_IN(rx_bs0_rx_bit_ctrl_in),
        .RX_BIT_CTRL_OUT(rx_bs0_rx_bit_ctrl_out),
        .TX_BIT_CTRL_IN(rx_bs0_tx_bit_ctrl_in),
        .TX_BIT_CTRL_OUT(rx_bs0_tx_bit_ctrl_out));
  (* box_type = "PRIMITIVE" *) 
  RX_BITSLICE #(
    .CASCADE("FALSE"),
    .DATA_TYPE("DATA"),
    .DATA_WIDTH(8),
    .DELAY_FORMAT("TIME"),
    .DELAY_TYPE("FIXED"),
    .DELAY_VALUE(0),
    .DELAY_VALUE_EXT(0),
    .FIFO_SYNC_MODE("FALSE"),
    .IS_CLK_EXT_INVERTED(1'b0),
    .IS_CLK_INVERTED(1'b0),
    .IS_RST_DLY_EXT_INVERTED(1'b0),
    .IS_RST_DLY_INVERTED(1'b0),
    .IS_RST_INVERTED(1'b0),
    .REFCLK_FREQUENCY(1500.000000),
    .SIM_DEVICE("ULTRASCALE_PLUS_ES1"),
    .SIM_VERSION(2.000000),
    .UPDATE_MODE("ASYNC"),
    .UPDATE_MODE_EXT("ASYNC")) 
    \RX_BS[2].rx_bitslice_if_bs 
       (.CE(1'b0),
        .CE_EXT(1'b0),
        .CLK(1'b0),
        .CLK_EXT(1'b0),
        .CNTVALUEIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CNTVALUEIN_EXT({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CNTVALUEOUT(\NLW_RX_BS[2].rx_bitslice_if_bs_CNTVALUEOUT_UNCONNECTED [8:0]),
        .CNTVALUEOUT_EXT(\NLW_RX_BS[2].rx_bitslice_if_bs_CNTVALUEOUT_EXT_UNCONNECTED [8:0]),
        .DATAIN(data_to_bs_out[1]),
        .EN_VTC(1'b1),
        .EN_VTC_EXT(1'b1),
        .FIFO_EMPTY(fifo_empty_2),
        .FIFO_RD_CLK(fifo_rd_clk_0),
        .FIFO_RD_EN(fifo_rd_en_2),
        .FIFO_WRCLK_OUT(\NLW_RX_BS[2].rx_bitslice_if_bs_FIFO_WRCLK_OUT_UNCONNECTED ),
        .INC(1'b0),
        .INC_EXT(1'b0),
        .LOAD(1'b0),
        .LOAD_EXT(1'b0),
        .Q(data_to_fabric_data_rxp0),
        .RST(rx_bs_rst_in[1]),
        .RST_DLY(rx_bs_rst_dly_ext_in[1]),
        .RST_DLY_EXT(rx_bs_rst_dly_ext_in[1]),
        .RX_BIT_CTRL_IN(rx_bs2_rx_bit_ctrl_in),
        .RX_BIT_CTRL_OUT(rx_bs2_rx_bit_ctrl_out),
        .TX_BIT_CTRL_IN(rx_bs2_tx_bit_ctrl_in),
        .TX_BIT_CTRL_OUT(rx_bs2_tx_bit_ctrl_out));
  (* box_type = "PRIMITIVE" *) 
  RX_BITSLICE #(
    .CASCADE("FALSE"),
    .DATA_TYPE("DATA"),
    .DATA_WIDTH(8),
    .DELAY_FORMAT("TIME"),
    .DELAY_TYPE("FIXED"),
    .DELAY_VALUE(0),
    .DELAY_VALUE_EXT(0),
    .FIFO_SYNC_MODE("FALSE"),
    .IS_CLK_EXT_INVERTED(1'b0),
    .IS_CLK_INVERTED(1'b0),
    .IS_RST_DLY_EXT_INVERTED(1'b0),
    .IS_RST_DLY_INVERTED(1'b0),
    .IS_RST_INVERTED(1'b0),
    .REFCLK_FREQUENCY(1500.000000),
    .SIM_DEVICE("ULTRASCALE_PLUS_ES1"),
    .SIM_VERSION(2.000000),
    .UPDATE_MODE("ASYNC"),
    .UPDATE_MODE_EXT("ASYNC")) 
    \RX_BS[4].rx_bitslice_if_bs 
       (.CE(1'b0),
        .CE_EXT(1'b0),
        .CLK(1'b0),
        .CLK_EXT(1'b0),
        .CNTVALUEIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CNTVALUEIN_EXT({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CNTVALUEOUT(\NLW_RX_BS[4].rx_bitslice_if_bs_CNTVALUEOUT_UNCONNECTED [8:0]),
        .CNTVALUEOUT_EXT(\NLW_RX_BS[4].rx_bitslice_if_bs_CNTVALUEOUT_EXT_UNCONNECTED [8:0]),
        .DATAIN(data_to_bs_out[2]),
        .EN_VTC(1'b1),
        .EN_VTC_EXT(1'b1),
        .FIFO_EMPTY(fifo_empty_4),
        .FIFO_RD_CLK(fifo_rd_clk_0),
        .FIFO_RD_EN(fifo_rd_en_4),
        .FIFO_WRCLK_OUT(\NLW_RX_BS[4].rx_bitslice_if_bs_FIFO_WRCLK_OUT_UNCONNECTED ),
        .INC(1'b0),
        .INC_EXT(1'b0),
        .LOAD(1'b0),
        .LOAD_EXT(1'b0),
        .Q(data_to_fabric_data_rxp1),
        .RST(rx_bs_rst_in[2]),
        .RST_DLY(rx_bs_rst_dly_ext_in[2]),
        .RST_DLY_EXT(rx_bs_rst_dly_ext_in[2]),
        .RX_BIT_CTRL_IN(rx_bs4_rx_bit_ctrl_in),
        .RX_BIT_CTRL_OUT(rx_bs4_rx_bit_ctrl_out),
        .TX_BIT_CTRL_IN(rx_bs4_tx_bit_ctrl_in),
        .TX_BIT_CTRL_OUT(rx_bs4_tx_bit_ctrl_out));
  (* box_type = "PRIMITIVE" *) 
  RX_BITSLICE #(
    .CASCADE("FALSE"),
    .DATA_TYPE("DATA"),
    .DATA_WIDTH(8),
    .DELAY_FORMAT("TIME"),
    .DELAY_TYPE("FIXED"),
    .DELAY_VALUE(0),
    .DELAY_VALUE_EXT(0),
    .FIFO_SYNC_MODE("FALSE"),
    .IS_CLK_EXT_INVERTED(1'b0),
    .IS_CLK_INVERTED(1'b0),
    .IS_RST_DLY_EXT_INVERTED(1'b0),
    .IS_RST_DLY_INVERTED(1'b0),
    .IS_RST_INVERTED(1'b0),
    .REFCLK_FREQUENCY(1500.000000),
    .SIM_DEVICE("ULTRASCALE_PLUS_ES1"),
    .SIM_VERSION(2.000000),
    .UPDATE_MODE("ASYNC"),
    .UPDATE_MODE_EXT("ASYNC")) 
    \RX_BS[6].rx_bitslice_if_bs 
       (.CE(1'b0),
        .CE_EXT(1'b0),
        .CLK(1'b0),
        .CLK_EXT(1'b0),
        .CNTVALUEIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CNTVALUEIN_EXT({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CNTVALUEOUT(\NLW_RX_BS[6].rx_bitslice_if_bs_CNTVALUEOUT_UNCONNECTED [8:0]),
        .CNTVALUEOUT_EXT(\NLW_RX_BS[6].rx_bitslice_if_bs_CNTVALUEOUT_EXT_UNCONNECTED [8:0]),
        .DATAIN(data_to_bs_out[3]),
        .EN_VTC(1'b1),
        .EN_VTC_EXT(1'b1),
        .FIFO_EMPTY(fifo_empty_6),
        .FIFO_RD_CLK(fifo_rd_clk_0),
        .FIFO_RD_EN(fifo_rd_en_6),
        .FIFO_WRCLK_OUT(\NLW_RX_BS[6].rx_bitslice_if_bs_FIFO_WRCLK_OUT_UNCONNECTED ),
        .INC(1'b0),
        .INC_EXT(1'b0),
        .LOAD(1'b0),
        .LOAD_EXT(1'b0),
        .Q(data_to_fabric_data_rxp2),
        .RST(rx_bs_rst_in[3]),
        .RST_DLY(rx_bs_rst_dly_ext_in[3]),
        .RST_DLY_EXT(rx_bs_rst_dly_ext_in[3]),
        .RX_BIT_CTRL_IN(rx_bs6_rx_bit_ctrl_in),
        .RX_BIT_CTRL_OUT(rx_bs6_rx_bit_ctrl_out),
        .TX_BIT_CTRL_IN(rx_bs6_tx_bit_ctrl_in),
        .TX_BIT_CTRL_OUT(rx_bs6_tx_bit_ctrl_out));
  (* box_type = "PRIMITIVE" *) 
  RX_BITSLICE #(
    .CASCADE("FALSE"),
    .DATA_TYPE("DATA"),
    .DATA_WIDTH(8),
    .DELAY_FORMAT("TIME"),
    .DELAY_TYPE("FIXED"),
    .DELAY_VALUE(0),
    .DELAY_VALUE_EXT(0),
    .FIFO_SYNC_MODE("FALSE"),
    .IS_CLK_EXT_INVERTED(1'b0),
    .IS_CLK_INVERTED(1'b0),
    .IS_RST_DLY_EXT_INVERTED(1'b0),
    .IS_RST_DLY_INVERTED(1'b0),
    .IS_RST_INVERTED(1'b0),
    .REFCLK_FREQUENCY(1500.000000),
    .SIM_DEVICE("ULTRASCALE_PLUS_ES1"),
    .SIM_VERSION(2.000000),
    .UPDATE_MODE("ASYNC"),
    .UPDATE_MODE_EXT("ASYNC")) 
    \RX_BS[8].rx_bitslice_if_bs 
       (.CE(1'b0),
        .CE_EXT(1'b0),
        .CLK(1'b0),
        .CLK_EXT(1'b0),
        .CNTVALUEIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CNTVALUEIN_EXT({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CNTVALUEOUT(\NLW_RX_BS[8].rx_bitslice_if_bs_CNTVALUEOUT_UNCONNECTED [8:0]),
        .CNTVALUEOUT_EXT(\NLW_RX_BS[8].rx_bitslice_if_bs_CNTVALUEOUT_EXT_UNCONNECTED [8:0]),
        .DATAIN(data_to_bs_out[4]),
        .EN_VTC(1'b1),
        .EN_VTC_EXT(1'b1),
        .FIFO_EMPTY(fifo_empty_8),
        .FIFO_RD_CLK(fifo_rd_clk_0),
        .FIFO_RD_EN(fifo_rd_en_8),
        .FIFO_WRCLK_OUT(\NLW_RX_BS[8].rx_bitslice_if_bs_FIFO_WRCLK_OUT_UNCONNECTED ),
        .INC(1'b0),
        .INC_EXT(1'b0),
        .LOAD(1'b0),
        .LOAD_EXT(1'b0),
        .Q(data_to_fabric_data_rxp3),
        .RST(rx_bs_rst_in[4]),
        .RST_DLY(rx_bs_rst_dly_ext_in[4]),
        .RST_DLY_EXT(rx_bs_rst_dly_ext_in[4]),
        .RX_BIT_CTRL_IN(rx_bs8_rx_bit_ctrl_in),
        .RX_BIT_CTRL_OUT(rx_bs8_rx_bit_ctrl_out),
        .TX_BIT_CTRL_IN(rx_bs8_tx_bit_ctrl_in),
        .TX_BIT_CTRL_OUT(rx_bs8_tx_bit_ctrl_out));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell
   (out,
    CLK);
  input out;
  input CLK;

  wire CLK;
  wire out;
  (* async_reg = "true" *) wire sync_flop_0;
  (* async_reg = "true" *) wire sync_flop_1;
  (* async_reg = "true" *) wire sync_flop_2;
  (* async_reg = "true" *) wire sync_flop_3;
  (* async_reg = "true" *) wire sync_flop_4;
  (* async_reg = "true" *) wire sync_flop_5;
  (* async_reg = "true" *) wire sync_flop_6;

  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_0_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(out),
        .Q(sync_flop_0),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_1_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_0),
        .Q(sync_flop_1),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_2_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_1),
        .Q(sync_flop_2),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_3_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_2),
        .Q(sync_flop_3),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_4_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_3),
        .Q(sync_flop_4),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_5_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_4),
        .Q(sync_flop_5),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_6_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_5),
        .Q(sync_flop_6),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "high_speed_selectio_wiz_v3_6_10_sync_cell" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_217
   (SS,
    bs_rst_dphy_in,
    riu_clk);
  output [0:0]SS;
  input bs_rst_dphy_in;
  input riu_clk;

  wire bs_rst_dphy_in;
  wire riu_clk;
  (* async_reg = "true" *) wire sync_flop_0;
  (* async_reg = "true" *) wire sync_flop_1;
  (* async_reg = "true" *) wire sync_flop_2;
  (* async_reg = "true" *) wire sync_flop_3;
  (* async_reg = "true" *) wire sync_flop_4;
  (* async_reg = "true" *) wire sync_flop_5;
  (* async_reg = "true" *) wire sync_flop_6;

  assign SS[0] = sync_flop_1;
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_0_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(bs_rst_dphy_in),
        .Q(sync_flop_0),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_1_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_0),
        .Q(sync_flop_1),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_2_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_1),
        .Q(sync_flop_2),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_3_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_2),
        .Q(sync_flop_3),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_4_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_3),
        .Q(sync_flop_4),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_5_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_4),
        .Q(sync_flop_5),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_6_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_5),
        .Q(sync_flop_6),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "high_speed_selectio_wiz_v3_6_10_sync_cell" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_218
   (out,
    \sync_flop_1_reg[0]_0 ,
    D,
    in0,
    riu_clk,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] ,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ,
    Q,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6]_0 );
  output out;
  output \sync_flop_1_reg[0]_0 ;
  output [0:0]D;
  input [0:0]in0;
  input riu_clk;
  input \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] ;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ;
  input [2:0]Q;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ;
  input \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6]_0 ;

  wire [0:0]D;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6]_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ;
  wire [2:0]Q;
  wire [0:0]in0;
  wire riu_clk;
  (* async_reg = "true" *) wire sync_flop_0;
  (* async_reg = "true" *) wire sync_flop_1;
  wire \sync_flop_1_reg[0]_0 ;
  (* async_reg = "true" *) wire sync_flop_2;
  (* async_reg = "true" *) wire sync_flop_3;
  (* async_reg = "true" *) wire sync_flop_4;
  (* async_reg = "true" *) wire sync_flop_5;
  (* async_reg = "true" *) wire sync_flop_6;

  assign out = sync_flop_1;
  LUT4 #(
    .INIT(16'h8000)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[6]_i_1 
       (.I0(sync_flop_1),
        .I1(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6]_0 ),
        .I2(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] ),
        .I3(Q[1]),
        .O(D));
  LUT6 #(
    .INIT(64'hFFFF80CC808080CC)) 
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_6 
       (.I0(sync_flop_1),
        .I1(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] ),
        .I2(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ),
        .I3(Q[2]),
        .I4(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ),
        .I5(Q[0]),
        .O(\sync_flop_1_reg[0]_0 ));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_0_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(in0),
        .Q(sync_flop_0),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_1_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_0),
        .Q(sync_flop_1),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_2_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_1),
        .Q(sync_flop_2),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_3_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_2),
        .Q(sync_flop_3),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_4_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_3),
        .Q(sync_flop_4),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_5_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_4),
        .Q(sync_flop_5),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_6_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_5),
        .Q(sync_flop_6),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "high_speed_selectio_wiz_v3_6_10_sync_cell" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_219
   (riu_clk);
  input riu_clk;

  wire n_0_0;
  wire riu_clk;
  (* async_reg = "true" *) wire sync_flop_0;
  (* async_reg = "true" *) wire sync_flop_1;
  (* async_reg = "true" *) wire sync_flop_2;
  (* async_reg = "true" *) wire sync_flop_3;
  (* async_reg = "true" *) wire sync_flop_4;
  (* async_reg = "true" *) wire sync_flop_5;
  (* async_reg = "true" *) wire sync_flop_6;

  LUT1 #(
    .INIT(2'h2)) 
    i_0
       (.I0(1'b0),
        .O(n_0_0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_0_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(n_0_0),
        .Q(sync_flop_0),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_1_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_0),
        .Q(sync_flop_1),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_2_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_1),
        .Q(sync_flop_2),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_3_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_2),
        .Q(sync_flop_3),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_4_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_3),
        .Q(sync_flop_4),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_5_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_4),
        .Q(sync_flop_5),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_6_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_5),
        .Q(sync_flop_6),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "high_speed_selectio_wiz_v3_6_10_sync_cell" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_220
   (out,
    D,
    \sync_flop_1_reg[0]_0 ,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] ,
    \sync_flop_1_reg[0]_1 ,
    \sync_flop_1_reg[0]_2 ,
    pll0_locked_out,
    riu_clk,
    Q,
    n1_vtc_rdy_out,
    n0_vtc_rdy_out,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_1 ,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[4] ,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[2] ,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[0] ,
    \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg ,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_2 ,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_3 ,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_4 ,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_5 ,
    timeout_cntr_rst,
    \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_reg ,
    \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_reg_0 ,
    bsc_en_vtc,
    rst_seq_done,
    \GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg ,
    \GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 ,
    bs_dly_rst,
    \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg ,
    \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 );
  output out;
  output [5:0]D;
  output \sync_flop_1_reg[0]_0 ;
  output \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ;
  output \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] ;
  output \sync_flop_1_reg[0]_1 ;
  output \sync_flop_1_reg[0]_2 ;
  input pll0_locked_out;
  input riu_clk;
  input [8:0]Q;
  input n1_vtc_rdy_out;
  input n0_vtc_rdy_out;
  input \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_1 ;
  input \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ;
  input \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[4] ;
  input \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[2] ;
  input \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[0] ;
  input \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg ;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_2 ;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_3 ;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_4 ;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_5 ;
  input timeout_cntr_rst;
  input \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_reg ;
  input \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_reg_0 ;
  input bsc_en_vtc;
  input rst_seq_done;
  input \GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg ;
  input \GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 ;
  input bs_dly_rst;
  input \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg ;
  input \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ;

  wire [5:0]D;
  wire \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg ;
  wire \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_4_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_reg ;
  wire \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_reg_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state[0]_i_2_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state[8]_i_2_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[0] ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[2] ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[4] ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ;
  wire \GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg ;
  wire \GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_3_n_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_1 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_2 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_3 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_4 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_5 ;
  wire [8:0]Q;
  wire bs_dly_rst;
  wire bsc_en_vtc;
  wire n0_vtc_rdy_out;
  wire n1_vtc_rdy_out;
  wire pll0_locked_out;
  wire riu_clk;
  wire rst_seq_done;
  (* async_reg = "true" *) wire sync_flop_0;
  (* async_reg = "true" *) wire sync_flop_1;
  wire \sync_flop_1_reg[0]_0 ;
  wire \sync_flop_1_reg[0]_1 ;
  wire \sync_flop_1_reg[0]_2 ;
  (* async_reg = "true" *) wire sync_flop_2;
  (* async_reg = "true" *) wire sync_flop_3;
  (* async_reg = "true" *) wire sync_flop_4;
  (* async_reg = "true" *) wire sync_flop_5;
  (* async_reg = "true" *) wire sync_flop_6;
  wire timeout_cntr_rst;

  assign out = sync_flop_1;
  LUT6 #(
    .INIT(64'hAAAAFFEFAAAA0020)) 
    \GEN_RIU_NOT_FROM_PLL.bs_dly_rst_i_1 
       (.I0(bs_dly_rst),
        .I1(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg ),
        .I2(sync_flop_1),
        .I3(Q[8]),
        .I4(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg ),
        .I5(\GEN_RIU_NOT_FROM_PLL.bs_dly_rst_reg_0 ),
        .O(\sync_flop_1_reg[0]_2 ));
  LUT6 #(
    .INIT(64'hAAAAFFEFAAAA0020)) 
    \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_1 
       (.I0(Q[6]),
        .I1(\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_reg ),
        .I2(Q[0]),
        .I3(\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_reg_0 ),
        .I4(\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_4_n_0 ),
        .I5(bsc_en_vtc),
        .O(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[6] ));
  LUT6 #(
    .INIT(64'h0000080000000000)) 
    \GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_4 
       (.I0(sync_flop_1),
        .I1(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ),
        .I2(Q[4]),
        .I3(Q[6]),
        .I4(Q[2]),
        .I5(\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg ),
        .O(\GEN_RIU_NOT_FROM_PLL.bsc_en_vtc_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAFAFAFAFFFFFFFEF)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[0]_i_1 
       (.I0(\GEN_RIU_NOT_FROM_PLL.hssio_state[0]_i_2_n_0 ),
        .I1(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[0] ),
        .I2(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ),
        .I3(Q[6]),
        .I4(Q[4]),
        .I5(sync_flop_1),
        .O(D[0]));
  LUT6 #(
    .INIT(64'h4040FFFF4040FF40)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[0]_i_2 
       (.I0(sync_flop_1),
        .I1(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[2] ),
        .I2(Q[2]),
        .I3(Q[7]),
        .I4(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ),
        .I5(Q[6]),
        .O(\GEN_RIU_NOT_FROM_PLL.hssio_state[0]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAB00AA00)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[2]_i_1 
       (.I0(Q[1]),
        .I1(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[2] ),
        .I2(sync_flop_1),
        .I3(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ),
        .I4(Q[2]),
        .O(D[1]));
  LUT3 #(
    .INIT(8'h80)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[3]_i_1 
       (.I0(sync_flop_1),
        .I1(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ),
        .I2(Q[2]),
        .O(D[2]));
  LUT5 #(
    .INIT(32'h8080C080)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[4]_i_1 
       (.I0(Q[3]),
        .I1(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ),
        .I2(sync_flop_1),
        .I3(Q[4]),
        .I4(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[4] ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hBFAA000000000000)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[7]_i_1 
       (.I0(Q[6]),
        .I1(n1_vtc_rdy_out),
        .I2(n0_vtc_rdy_out),
        .I3(Q[7]),
        .I4(\GEN_RIU_NOT_FROM_PLL.hssio_state[8]_i_2_n_0 ),
        .I5(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ),
        .O(D[4]));
  LUT6 #(
    .INIT(64'hC888888888888888)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[8]_i_1 
       (.I0(Q[8]),
        .I1(\GEN_RIU_NOT_FROM_PLL.hssio_state[8]_i_2_n_0 ),
        .I2(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ),
        .I3(Q[7]),
        .I4(n1_vtc_rdy_out),
        .I5(n0_vtc_rdy_out),
        .O(D[5]));
  LUT2 #(
    .INIT(4'h8)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[8]_i_2 
       (.I0(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ),
        .I1(sync_flop_1),
        .O(\GEN_RIU_NOT_FROM_PLL.hssio_state[8]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'hAABFAA80)) 
    \GEN_RIU_NOT_FROM_PLL.rst_seq_done_i_1 
       (.I0(rst_seq_done),
        .I1(sync_flop_1),
        .I2(Q[8]),
        .I3(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg ),
        .I4(\GEN_RIU_NOT_FROM_PLL.rst_seq_done_reg_0 ),
        .O(\sync_flop_1_reg[0]_1 ));
  LUT5 #(
    .INIT(32'h00200000)) 
    \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_i_3 
       (.I0(sync_flop_1),
        .I1(Q[6]),
        .I2(Q[4]),
        .I3(Q[2]),
        .I4(\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg ),
        .O(\sync_flop_1_reg[0]_0 ));
  LUT6 #(
    .INIT(64'hFEFEFEFFFEFEFE00)) 
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_1 
       (.I0(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_2 ),
        .I1(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_3_n_0 ),
        .I2(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_3 ),
        .I3(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_4 ),
        .I4(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_5 ),
        .I5(timeout_cntr_rst),
        .O(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ));
  LUT6 #(
    .INIT(64'hFFFFFFFFFFEAEAEA)) 
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_3 
       (.I0(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ),
        .I1(sync_flop_1),
        .I2(Q[2]),
        .I3(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[7] ),
        .I4(Q[5]),
        .I5(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_1 ),
        .O(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_3_n_0 ));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_0_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(pll0_locked_out),
        .Q(sync_flop_0),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_1_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_0),
        .Q(sync_flop_1),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_2_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_1),
        .Q(sync_flop_2),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_3_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_2),
        .Q(sync_flop_3),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_4_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_3),
        .Q(sync_flop_4),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_5_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_4),
        .Q(sync_flop_5),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_6_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_5),
        .Q(sync_flop_6),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "high_speed_selectio_wiz_v3_6_10_sync_cell" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_221
   (out,
    rst,
    riu_clk);
  output out;
  input rst;
  input riu_clk;

  wire riu_clk;
  wire rst;
  (* async_reg = "true" *) wire sync_flop_0;
  (* async_reg = "true" *) wire sync_flop_1;
  (* async_reg = "true" *) wire sync_flop_2;
  (* async_reg = "true" *) wire sync_flop_3;
  (* async_reg = "true" *) wire sync_flop_4;
  (* async_reg = "true" *) wire sync_flop_5;
  (* async_reg = "true" *) wire sync_flop_6;

  assign out = sync_flop_1;
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_0_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(rst),
        .Q(sync_flop_0),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_1_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_0),
        .Q(sync_flop_1),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_2_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_1),
        .Q(sync_flop_2),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_3_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_2),
        .Q(sync_flop_3),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_4_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_3),
        .Q(sync_flop_4),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_5_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_4),
        .Q(sync_flop_5),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_6_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_5),
        .Q(sync_flop_6),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "high_speed_selectio_wiz_v3_6_10_sync_cell" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_222
   (SR,
    in0,
    CLK,
    Q,
    \pll0_fab_clk_cntr_reg[0] );
  output [0:0]SR;
  input [0:0]in0;
  input CLK;
  input [0:0]Q;
  input \pll0_fab_clk_cntr_reg[0] ;

  wire CLK;
  wire [0:0]Q;
  wire [0:0]SR;
  wire [0:0]in0;
  wire \pll0_fab_clk_cntr_reg[0] ;
  (* async_reg = "true" *) wire sync_flop_0;
  (* async_reg = "true" *) wire sync_flop_1;
  (* async_reg = "true" *) wire sync_flop_2;
  (* async_reg = "true" *) wire sync_flop_3;
  (* async_reg = "true" *) wire sync_flop_4;
  (* async_reg = "true" *) wire sync_flop_5;
  (* async_reg = "true" *) wire sync_flop_6;

  LUT3 #(
    .INIT(8'h5D)) 
    \pll0_fab_clk_cntr[6]_i_1 
       (.I0(sync_flop_1),
        .I1(Q),
        .I2(\pll0_fab_clk_cntr_reg[0] ),
        .O(SR));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_0_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(in0),
        .Q(sync_flop_0),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_1_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_0),
        .Q(sync_flop_1),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_2_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_1),
        .Q(sync_flop_2),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_3_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_2),
        .Q(sync_flop_3),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_4_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_3),
        .Q(sync_flop_4),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_5_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_4),
        .Q(sync_flop_5),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_6_reg[0] 
       (.C(CLK),
        .CE(1'b1),
        .D(sync_flop_5),
        .Q(sync_flop_6),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "high_speed_selectio_wiz_v3_6_10_sync_cell" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_high_speed_selectio_wiz_v3_6_10_sync_cell_223
   (out,
    D,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ,
    \sync_flop_1_reg[0]_0 ,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[4] ,
    in0,
    riu_clk,
    Q,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[5] ,
    \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg ,
    \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[5]_0 ,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ,
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ,
    \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg_0 ,
    \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg_1 ,
    pll0_clkoutphy_en_in,
    \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg ,
    \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_0 ,
    \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_1 );
  output out;
  output [0:0]D;
  output \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ;
  output \sync_flop_1_reg[0]_0 ;
  output \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[4] ;
  input [0:0]in0;
  input riu_clk;
  input [5:0]Q;
  input \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[5] ;
  input \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg ;
  input \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[5]_0 ;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ;
  input \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ;
  input \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg_0 ;
  input \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg_1 ;
  input pll0_clkoutphy_en_in;
  input \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg ;
  input \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_0 ;
  input [0:0]\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_1 ;

  wire [0:0]D;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[4] ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[5] ;
  wire \GEN_RIU_NOT_FROM_PLL.hssio_state_reg[5]_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg ;
  wire \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg_0 ;
  wire \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg_1 ;
  wire \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg ;
  wire \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_0 ;
  wire [0:0]\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_1 ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ;
  wire \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ;
  wire [5:0]Q;
  wire [0:0]in0;
  wire pll0_clkoutphy_en;
  wire pll0_clkoutphy_en_in;
  wire riu_clk;
  (* async_reg = "true" *) wire sync_flop_0;
  (* async_reg = "true" *) wire sync_flop_1;
  wire \sync_flop_1_reg[0]_0 ;
  (* async_reg = "true" *) wire sync_flop_2;
  (* async_reg = "true" *) wire sync_flop_3;
  (* async_reg = "true" *) wire sync_flop_4;
  (* async_reg = "true" *) wire sync_flop_5;
  (* async_reg = "true" *) wire sync_flop_6;

  assign out = sync_flop_1;
  LUT6 #(
    .INIT(64'h80008000F0008000)) 
    \GEN_RIU_NOT_FROM_PLL.hssio_state[5]_i_1 
       (.I0(sync_flop_1),
        .I1(Q[2]),
        .I2(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[5] ),
        .I3(\GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg ),
        .I4(Q[3]),
        .I5(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[5]_0 ),
        .O(D));
  LUT5 #(
    .INIT(32'hAABFAA80)) 
    \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_i_1 
       (.I0(pll0_clkoutphy_en),
        .I1(\GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg ),
        .I2(Q[2]),
        .I3(\GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg_1 ),
        .I4(pll0_clkoutphy_en_in),
        .O(\sync_flop_1_reg[0]_0 ));
  LUT5 #(
    .INIT(32'h00200000)) 
    \GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_i_2 
       (.I0(Q[2]),
        .I1(Q[4]),
        .I2(sync_flop_1),
        .I3(Q[0]),
        .I4(\GEN_RIU_NOT_FROM_PLL.pll0_clkoutphy_en_reg_0 ),
        .O(pll0_clkoutphy_en));
  LUT5 #(
    .INIT(32'h222F2220)) 
    \GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_i_1 
       (.I0(Q[2]),
        .I1(sync_flop_1),
        .I2(\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg ),
        .I3(\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_0 ),
        .I4(\GEN_RIU_NOT_FROM_PLL.start_fab_clk_cntr_reg_1 ),
        .O(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[4] ));
  LUT6 #(
    .INIT(64'hFFF9FFF9FFFFFFF9)) 
    \GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_i_4 
       (.I0(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg ),
        .I1(\GEN_RIU_NOT_FROM_PLL.timeout_cntr_rst_reg_0 ),
        .I2(Q[1]),
        .I3(Q[5]),
        .I4(Q[2]),
        .I5(sync_flop_1),
        .O(\GEN_RIU_NOT_FROM_PLL.hssio_state_reg[3] ));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_0_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(in0),
        .Q(sync_flop_0),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_1_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_0),
        .Q(sync_flop_1),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_2_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_1),
        .Q(sync_flop_2),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_3_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_2),
        .Q(sync_flop_3),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_4_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_3),
        .Q(sync_flop_4),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_5_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_4),
        .Q(sync_flop_5),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "yes" *) 
  FDRE \sync_flop_6_reg[0] 
       (.C(riu_clk),
        .CE(1'b1),
        .D(sync_flop_5),
        .Q(sync_flop_6),
        .R(1'b0));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_lpf
   (lpf_int,
    slowest_sync_clk,
    ext_reset_in);
  output lpf_int;
  input slowest_sync_clk;
  input ext_reset_in;

  wire \ACTIVE_LOW_EXT.ACT_LO_EXT_n_0 ;
  wire Q;
  wire [0:0]exr_lpf;
  wire ext_reset_in;
  wire lpf_exr;
  wire lpf_int;
  wire lpf_int0;
  wire p_1_in4_in;
  wire p_2_in3_in;
  wire p_3_in6_in;
  wire slowest_sync_clk;

  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_cdc_sync \ACTIVE_LOW_EXT.ACT_LO_EXT 
       (.exr_lpf(exr_lpf),
        .ext_reset_in(ext_reset_in),
        .lpf_exr(lpf_exr),
        .lpf_exr_reg(\ACTIVE_LOW_EXT.ACT_LO_EXT_n_0 ),
        .p_1_in4_in(p_1_in4_in),
        .p_2_in3_in(p_2_in3_in),
        .scndry_out(p_3_in6_in),
        .slowest_sync_clk(slowest_sync_clk));
  FDRE #(
    .INIT(1'b0)) 
    \EXT_LPF[1].exr_lpf_reg[1] 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(p_3_in6_in),
        .Q(p_2_in3_in),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \EXT_LPF[2].exr_lpf_reg[2] 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(p_2_in3_in),
        .Q(p_1_in4_in),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \EXT_LPF[3].exr_lpf_reg[3] 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(p_1_in4_in),
        .Q(exr_lpf),
        .R(1'b0));
  (* XILINX_LEGACY_PRIM = "SRL16" *) 
  (* XILINX_TRANSFORM_PINMAP = "VCC:CE" *) 
  (* box_type = "PRIMITIVE" *) 
  (* srl_name = "\\U0/myCamif/myMipirx /inst/i_0/r_sync/U0/\\EXT_LPF/POR_SRL_I " *) 
  SRL16E #(
    .INIT(16'hFFFF)) 
    POR_SRL_I
       (.A0(1'b1),
        .A1(1'b1),
        .A2(1'b1),
        .A3(1'b1),
        .CE(1'b1),
        .CLK(slowest_sync_clk),
        .D(1'b0),
        .Q(Q));
  FDRE #(
    .INIT(1'b0)) 
    lpf_exr_reg
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(\ACTIVE_LOW_EXT.ACT_LO_EXT_n_0 ),
        .Q(lpf_exr),
        .R(1'b0));
  LUT2 #(
    .INIT(4'hE)) 
    lpf_int_i_1
       (.I0(lpf_exr),
        .I1(Q),
        .O(lpf_int0));
  FDRE #(
    .INIT(1'b0)) 
    lpf_int_reg
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(lpf_int0),
        .Q(lpf_int),
        .R(1'b0));
endmodule

(* C_AUX_RESET_HIGH = "1'b0" *) (* C_AUX_RST_WIDTH = "4" *) (* C_EXT_RESET_HIGH = "1'b0" *) 
(* C_EXT_RST_WIDTH = "4" *) (* C_FAMILY = "zynquplus" *) (* C_NUM_BUS_RST = "1" *) 
(* C_NUM_INTERCONNECT_ARESETN = "1" *) (* C_NUM_PERP_ARESETN = "1" *) (* C_NUM_PERP_RST = "1" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_proc_sys_reset
   (slowest_sync_clk,
    ext_reset_in,
    aux_reset_in,
    mb_debug_sys_rst,
    dcm_locked,
    mb_reset,
    bus_struct_reset,
    peripheral_reset,
    interconnect_aresetn,
    peripheral_aresetn);
  input slowest_sync_clk;
  input ext_reset_in;
  input aux_reset_in;
  input mb_debug_sys_rst;
  input dcm_locked;
  output mb_reset;
  output [0:0]bus_struct_reset;
  output [0:0]peripheral_reset;
  output [0:0]interconnect_aresetn;
  output [0:0]peripheral_aresetn;

  wire \<const0> ;
  wire Pr_out;
  wire ext_reset_in;
  wire lpf_int;
  wire [0:0]peripheral_reset;
  wire slowest_sync_clk;

  assign bus_struct_reset[0] = \<const0> ;
  assign interconnect_aresetn[0] = \<const0> ;
  assign mb_reset = \<const0> ;
  assign peripheral_aresetn[0] = \<const0> ;
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_lpf EXT_LPF
       (.ext_reset_in(ext_reset_in),
        .lpf_int(lpf_int),
        .slowest_sync_clk(slowest_sync_clk));
  GND GND
       (.G(\<const0> ));
  (* box_type = "PRIMITIVE" *) 
  FDRE #(
    .INIT(1'b1),
    .IS_C_INVERTED(1'b0),
    .IS_D_INVERTED(1'b0),
    .IS_R_INVERTED(1'b0)) 
    \PR_OUT_DFF[0].FDRE_PER 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(Pr_out),
        .Q(peripheral_reset),
        .R(1'b0));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_sequence_psr SEQ
       (.Pr_out(Pr_out),
        .lpf_int(lpf_int),
        .slowest_sync_clk(slowest_sync_clk));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_sequence_psr
   (Pr_out,
    lpf_int,
    slowest_sync_clk);
  output Pr_out;
  input lpf_int;
  input slowest_sync_clk;

  wire Core_i_1_n_0;
  wire MB_out;
  wire Pr_out;
  wire \core_dec[0]_i_1_n_0 ;
  wire \core_dec[2]_i_1_n_0 ;
  wire \core_dec_reg_n_0_[0] ;
  wire from_sys_i_1_n_0;
  wire lpf_int;
  wire p_0_in;
  wire [2:0]p_3_out;
  wire pr_dec0__0;
  wire \pr_dec_reg_n_0_[0] ;
  wire \pr_dec_reg_n_0_[1] ;
  wire \pr_dec_reg_n_0_[2] ;
  wire pr_i_1_n_0;
  wire seq_clr;
  wire [5:0]seq_cnt;
  wire seq_cnt_en;
  wire slowest_sync_clk;

  (* SOFT_HLUTNM = "soft_lutpair183" *) 
  LUT2 #(
    .INIT(4'h2)) 
    Core_i_1
       (.I0(MB_out),
        .I1(p_0_in),
        .O(Core_i_1_n_0));
  FDSE #(
    .INIT(1'b1)) 
    Core_reg
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(Core_i_1_n_0),
        .Q(MB_out),
        .S(lpf_int));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_upcnt_n SEQ_COUNTER
       (.Q(seq_cnt),
        .seq_clr(seq_clr),
        .seq_cnt_en(seq_cnt_en),
        .slowest_sync_clk(slowest_sync_clk));
  (* SOFT_HLUTNM = "soft_lutpair182" *) 
  LUT4 #(
    .INIT(16'h9000)) 
    \core_dec[0]_i_1 
       (.I0(seq_cnt_en),
        .I1(seq_cnt[4]),
        .I2(seq_cnt[5]),
        .I3(seq_cnt[3]),
        .O(\core_dec[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair184" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \core_dec[2]_i_1 
       (.I0(\pr_dec_reg_n_0_[1] ),
        .I1(\core_dec_reg_n_0_[0] ),
        .O(\core_dec[2]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \core_dec_reg[0] 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(\core_dec[0]_i_1_n_0 ),
        .Q(\core_dec_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \core_dec_reg[2] 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(\core_dec[2]_i_1_n_0 ),
        .Q(p_0_in),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair183" *) 
  LUT2 #(
    .INIT(4'h8)) 
    from_sys_i_1
       (.I0(MB_out),
        .I1(seq_cnt_en),
        .O(from_sys_i_1_n_0));
  FDSE #(
    .INIT(1'b0)) 
    from_sys_reg
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(from_sys_i_1_n_0),
        .Q(seq_cnt_en),
        .S(lpf_int));
  LUT4 #(
    .INIT(16'h0018)) 
    pr_dec0
       (.I0(seq_cnt_en),
        .I1(seq_cnt[0]),
        .I2(seq_cnt[2]),
        .I3(seq_cnt[1]),
        .O(pr_dec0__0));
  (* SOFT_HLUTNM = "soft_lutpair182" *) 
  LUT4 #(
    .INIT(16'h1080)) 
    \pr_dec[0]_i_1 
       (.I0(seq_cnt_en),
        .I1(seq_cnt[5]),
        .I2(seq_cnt[3]),
        .I3(seq_cnt[4]),
        .O(p_3_out[0]));
  (* SOFT_HLUTNM = "soft_lutpair184" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \pr_dec[2]_i_1 
       (.I0(\pr_dec_reg_n_0_[1] ),
        .I1(\pr_dec_reg_n_0_[0] ),
        .O(p_3_out[2]));
  FDRE #(
    .INIT(1'b0)) 
    \pr_dec_reg[0] 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(p_3_out[0]),
        .Q(\pr_dec_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \pr_dec_reg[1] 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(pr_dec0__0),
        .Q(\pr_dec_reg_n_0_[1] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \pr_dec_reg[2] 
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(p_3_out[2]),
        .Q(\pr_dec_reg_n_0_[2] ),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    pr_i_1
       (.I0(Pr_out),
        .I1(\pr_dec_reg_n_0_[2] ),
        .O(pr_i_1_n_0));
  FDSE #(
    .INIT(1'b1)) 
    pr_reg
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(pr_i_1_n_0),
        .Q(Pr_out),
        .S(lpf_int));
  FDRE #(
    .INIT(1'b0)) 
    seq_clr_reg
       (.C(slowest_sync_clk),
        .CE(1'b1),
        .D(1'b1),
        .Q(seq_clr),
        .R(lpf_int));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_upcnt_n
   (Q,
    seq_clr,
    seq_cnt_en,
    slowest_sync_clk);
  output [5:0]Q;
  input seq_clr;
  input seq_cnt_en;
  input slowest_sync_clk;

  wire [5:0]Q;
  wire clear;
  wire [5:0]q_int0;
  wire seq_clr;
  wire seq_cnt_en;
  wire slowest_sync_clk;

  LUT1 #(
    .INIT(2'h1)) 
    \q_int[0]_i_1 
       (.I0(Q[0]),
        .O(q_int0[0]));
  (* SOFT_HLUTNM = "soft_lutpair181" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \q_int[1]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(q_int0[1]));
  (* SOFT_HLUTNM = "soft_lutpair181" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \q_int[2]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(q_int0[2]));
  (* SOFT_HLUTNM = "soft_lutpair180" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \q_int[3]_i_1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(q_int0[3]));
  (* SOFT_HLUTNM = "soft_lutpair180" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \q_int[4]_i_1 
       (.I0(Q[2]),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[3]),
        .I4(Q[4]),
        .O(q_int0[4]));
  LUT1 #(
    .INIT(2'h1)) 
    \q_int[5]_i_1 
       (.I0(seq_clr),
        .O(clear));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \q_int[5]_i_2 
       (.I0(Q[3]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[2]),
        .I4(Q[4]),
        .I5(Q[5]),
        .O(q_int0[5]));
  FDRE #(
    .INIT(1'b1)) 
    \q_int_reg[0] 
       (.C(slowest_sync_clk),
        .CE(seq_cnt_en),
        .D(q_int0[0]),
        .Q(Q[0]),
        .R(clear));
  FDRE #(
    .INIT(1'b1)) 
    \q_int_reg[1] 
       (.C(slowest_sync_clk),
        .CE(seq_cnt_en),
        .D(q_int0[1]),
        .Q(Q[1]),
        .R(clear));
  FDRE #(
    .INIT(1'b1)) 
    \q_int_reg[2] 
       (.C(slowest_sync_clk),
        .CE(seq_cnt_en),
        .D(q_int0[2]),
        .Q(Q[2]),
        .R(clear));
  FDRE #(
    .INIT(1'b1)) 
    \q_int_reg[3] 
       (.C(slowest_sync_clk),
        .CE(seq_cnt_en),
        .D(q_int0[3]),
        .Q(Q[3]),
        .R(clear));
  FDRE #(
    .INIT(1'b1)) 
    \q_int_reg[4] 
       (.C(slowest_sync_clk),
        .CE(seq_cnt_en),
        .D(q_int0[4]),
        .Q(Q[4]),
        .R(clear));
  FDRE #(
    .INIT(1'b1)) 
    \q_int_reg[5] 
       (.C(slowest_sync_clk),
        .CE(seq_cnt_en),
        .D(q_int0[5]),
        .Q(Q[5]),
        .R(clear));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vfb_v1_0_27_op_inf
   (sband_tu_r,
    vfb_eol_reg_0,
    E,
    \vfb_sof_reg[0]_0 ,
    vfb_valid_reg_0,
    vfb_sof015_out,
    \vfb_cnt_reg[3]_0 ,
    \sband_tk_r_reg[4]_0 ,
    vfb_sof,
    \sband_td_r_reg[47]_0 ,
    vfb_data,
    SR,
    vfb_sof119_out,
    sband_tl,
    vfb_clk,
    sband_tu,
    Q,
    m_axis_tvalid,
    vfb_arstn,
    \vfb_sof_reg[0]_1 ,
    \vfb_sof_reg[0]_2 ,
    m_axis_tlast,
    m_axis_tid,
    \TUSR0.vfb_sof_reg[64]_0 ,
    D,
    \sband_td_r_reg[47]_1 ,
    \vfb_data_reg[23]_0 ,
    \vfb_data_reg[15]_0 );
  output [0:0]sband_tu_r;
  output vfb_eol_reg_0;
  output [0:0]E;
  output \vfb_sof_reg[0]_0 ;
  output vfb_valid_reg_0;
  output vfb_sof015_out;
  output \vfb_cnt_reg[3]_0 ;
  output [0:0]\sband_tk_r_reg[4]_0 ;
  output [5:0]vfb_sof;
  output [47:0]\sband_td_r_reg[47]_0 ;
  output [23:0]vfb_data;
  input [0:0]SR;
  input vfb_sof119_out;
  input sband_tl;
  input vfb_clk;
  input [0:0]sband_tu;
  input [6:0]Q;
  input m_axis_tvalid;
  input vfb_arstn;
  input \vfb_sof_reg[0]_1 ;
  input \vfb_sof_reg[0]_2 ;
  input m_axis_tlast;
  input [5:0]m_axis_tid;
  input \TUSR0.vfb_sof_reg[64]_0 ;
  input [1:0]D;
  input [47:0]\sband_td_r_reg[47]_1 ;
  input [15:0]\vfb_data_reg[23]_0 ;
  input [7:0]\vfb_data_reg[15]_0 ;

  wire [1:0]D;
  wire [0:0]E;
  wire [6:0]Q;
  wire [0:0]SR;
  wire \TUSR0.vfb_sof[69]_i_1_n_0 ;
  wire \TUSR0.vfb_sof[69]_i_3_n_0 ;
  wire \TUSR0.vfb_sof[69]_i_4_n_0 ;
  wire \TUSR0.vfb_sof_reg[64]_0 ;
  wire [3:1]cnt_done0;
  wire [5:0]m_axis_tid;
  wire m_axis_tlast;
  wire m_axis_tvalid;
  wire [68:63]p_1_in;
  wire sband_tact;
  wire sband_tact_i_1_n_0;
  wire sband_tact_i_2_n_0;
  wire [47:0]\sband_td_r_reg[47]_0 ;
  wire [47:0]\sband_td_r_reg[47]_1 ;
  wire \sband_tk_r[4]_i_1_n_0 ;
  wire [0:0]\sband_tk_r_reg[4]_0 ;
  wire \sband_tk_r_reg_n_0_[2] ;
  wire sband_tl;
  wire sband_tl_r;
  wire [9:4]sband_ts_r;
  wire [0:0]sband_tu;
  wire [0:0]sband_tu_r;
  wire vfb_arstn;
  wire vfb_clk;
  wire \vfb_cnt[3]_i_1_n_0 ;
  wire [3:1]vfb_cnt_reg;
  wire \vfb_cnt_reg[3]_0 ;
  wire [23:0]vfb_data;
  wire \vfb_data[15]_i_1_n_0 ;
  wire \vfb_data[23]_i_1_n_0 ;
  wire [7:0]\vfb_data_reg[15]_0 ;
  wire [15:0]\vfb_data_reg[23]_0 ;
  wire vfb_eol_i_1_n_0;
  wire vfb_eol_i_2_n_0;
  wire vfb_eol_i_3_n_0;
  wire vfb_eol_reg_0;
  wire [5:0]vfb_sof;
  wire vfb_sof015_out;
  wire vfb_sof119_out;
  wire vfb_sof4_out;
  wire \vfb_sof[0]_i_1_n_0 ;
  wire \vfb_sof[0]_i_5_n_0 ;
  wire \vfb_sof_reg[0]_0 ;
  wire \vfb_sof_reg[0]_1 ;
  wire \vfb_sof_reg[0]_2 ;
  wire vfb_tu0;
  wire vfb_tu0_i_1_n_0;
  wire vfb_valid_i_2_n_0;
  wire vfb_valid_reg_0;

  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \TUSR0.vfb_sof[64]_i_1 
       (.I0(\TUSR0.vfb_sof[69]_i_3_n_0 ),
        .I1(sband_ts_r[4]),
        .I2(\TUSR0.vfb_sof[69]_i_4_n_0 ),
        .I3(Q[0]),
        .I4(m_axis_tid[0]),
        .I5(\TUSR0.vfb_sof_reg[64]_0 ),
        .O(p_1_in[63]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \TUSR0.vfb_sof[65]_i_1 
       (.I0(\TUSR0.vfb_sof[69]_i_3_n_0 ),
        .I1(sband_ts_r[5]),
        .I2(\TUSR0.vfb_sof[69]_i_4_n_0 ),
        .I3(Q[1]),
        .I4(m_axis_tid[1]),
        .I5(\TUSR0.vfb_sof_reg[64]_0 ),
        .O(p_1_in[64]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \TUSR0.vfb_sof[66]_i_1 
       (.I0(\TUSR0.vfb_sof[69]_i_3_n_0 ),
        .I1(sband_ts_r[6]),
        .I2(\TUSR0.vfb_sof[69]_i_4_n_0 ),
        .I3(Q[2]),
        .I4(m_axis_tid[2]),
        .I5(\TUSR0.vfb_sof_reg[64]_0 ),
        .O(p_1_in[65]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \TUSR0.vfb_sof[67]_i_1 
       (.I0(\TUSR0.vfb_sof[69]_i_3_n_0 ),
        .I1(sband_ts_r[7]),
        .I2(\TUSR0.vfb_sof[69]_i_4_n_0 ),
        .I3(Q[3]),
        .I4(m_axis_tid[3]),
        .I5(\TUSR0.vfb_sof_reg[64]_0 ),
        .O(p_1_in[66]));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \TUSR0.vfb_sof[68]_i_1 
       (.I0(\TUSR0.vfb_sof[69]_i_3_n_0 ),
        .I1(sband_ts_r[8]),
        .I2(\TUSR0.vfb_sof[69]_i_4_n_0 ),
        .I3(Q[4]),
        .I4(m_axis_tid[4]),
        .I5(\TUSR0.vfb_sof_reg[64]_0 ),
        .O(p_1_in[67]));
  LUT6 #(
    .INIT(64'hFFFEFEFEFFFFFFFF)) 
    \TUSR0.vfb_sof[69]_i_1 
       (.I0(vfb_sof015_out),
        .I1(m_axis_tvalid),
        .I2(vfb_sof119_out),
        .I3(vfb_eol_reg_0),
        .I4(E),
        .I5(vfb_arstn),
        .O(\TUSR0.vfb_sof[69]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF888F888F888)) 
    \TUSR0.vfb_sof[69]_i_2 
       (.I0(\TUSR0.vfb_sof[69]_i_3_n_0 ),
        .I1(sband_ts_r[9]),
        .I2(\TUSR0.vfb_sof[69]_i_4_n_0 ),
        .I3(Q[5]),
        .I4(m_axis_tid[5]),
        .I5(\TUSR0.vfb_sof_reg[64]_0 ),
        .O(p_1_in[68]));
  (* SOFT_HLUTNM = "soft_lutpair547" *) 
  LUT5 #(
    .INIT(32'h00000070)) 
    \TUSR0.vfb_sof[69]_i_3 
       (.I0(E),
        .I1(vfb_eol_reg_0),
        .I2(vfb_arstn),
        .I3(m_axis_tvalid),
        .I4(vfb_sof119_out),
        .O(\TUSR0.vfb_sof[69]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair547" *) 
  LUT5 #(
    .INIT(32'h00700000)) 
    \TUSR0.vfb_sof[69]_i_4 
       (.I0(E),
        .I1(vfb_eol_reg_0),
        .I2(vfb_arstn),
        .I3(m_axis_tvalid),
        .I4(vfb_sof119_out),
        .O(\TUSR0.vfb_sof[69]_i_4_n_0 ));
  FDRE \TUSR0.vfb_sof_reg[64] 
       (.C(vfb_clk),
        .CE(\TUSR0.vfb_sof[69]_i_1_n_0 ),
        .D(p_1_in[63]),
        .Q(vfb_sof[0]),
        .R(1'b0));
  FDRE \TUSR0.vfb_sof_reg[65] 
       (.C(vfb_clk),
        .CE(\TUSR0.vfb_sof[69]_i_1_n_0 ),
        .D(p_1_in[64]),
        .Q(vfb_sof[1]),
        .R(1'b0));
  FDRE \TUSR0.vfb_sof_reg[66] 
       (.C(vfb_clk),
        .CE(\TUSR0.vfb_sof[69]_i_1_n_0 ),
        .D(p_1_in[65]),
        .Q(vfb_sof[2]),
        .R(1'b0));
  FDRE \TUSR0.vfb_sof_reg[67] 
       (.C(vfb_clk),
        .CE(\TUSR0.vfb_sof[69]_i_1_n_0 ),
        .D(p_1_in[66]),
        .Q(vfb_sof[3]),
        .R(1'b0));
  FDRE \TUSR0.vfb_sof_reg[68] 
       (.C(vfb_clk),
        .CE(\TUSR0.vfb_sof[69]_i_1_n_0 ),
        .D(p_1_in[67]),
        .Q(vfb_sof[4]),
        .R(1'b0));
  FDRE \TUSR0.vfb_sof_reg[69] 
       (.C(vfb_clk),
        .CE(\TUSR0.vfb_sof[69]_i_1_n_0 ),
        .D(p_1_in[68]),
        .Q(vfb_sof[5]),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair548" *) 
  LUT5 #(
    .INIT(32'hFF75FF00)) 
    sband_tact_i_1
       (.I0(E),
        .I1(vfb_eol_reg_0),
        .I2(sband_tact_i_2_n_0),
        .I3(vfb_sof119_out),
        .I4(sband_tact),
        .O(sband_tact_i_1_n_0));
  (* SOFT_HLUTNM = "soft_lutpair549" *) 
  LUT3 #(
    .INIT(8'hBF)) 
    sband_tact_i_2
       (.I0(vfb_cnt_reg[3]),
        .I1(vfb_cnt_reg[2]),
        .I2(vfb_cnt_reg[1]),
        .O(sband_tact_i_2_n_0));
  FDRE sband_tact_reg
       (.C(vfb_clk),
        .CE(1'b1),
        .D(sband_tact_i_1_n_0),
        .Q(sband_tact),
        .R(SR));
  FDRE \sband_td_r_reg[0] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [0]),
        .Q(\sband_td_r_reg[47]_0 [0]),
        .R(SR));
  FDRE \sband_td_r_reg[10] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [10]),
        .Q(\sband_td_r_reg[47]_0 [10]),
        .R(SR));
  FDRE \sband_td_r_reg[11] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [11]),
        .Q(\sband_td_r_reg[47]_0 [11]),
        .R(SR));
  FDRE \sband_td_r_reg[12] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [12]),
        .Q(\sband_td_r_reg[47]_0 [12]),
        .R(SR));
  FDRE \sband_td_r_reg[13] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [13]),
        .Q(\sband_td_r_reg[47]_0 [13]),
        .R(SR));
  FDRE \sband_td_r_reg[14] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [14]),
        .Q(\sband_td_r_reg[47]_0 [14]),
        .R(SR));
  FDRE \sband_td_r_reg[15] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [15]),
        .Q(\sband_td_r_reg[47]_0 [15]),
        .R(SR));
  FDRE \sband_td_r_reg[16] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [16]),
        .Q(\sband_td_r_reg[47]_0 [16]),
        .R(SR));
  FDRE \sband_td_r_reg[17] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [17]),
        .Q(\sband_td_r_reg[47]_0 [17]),
        .R(SR));
  FDRE \sband_td_r_reg[18] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [18]),
        .Q(\sband_td_r_reg[47]_0 [18]),
        .R(SR));
  FDRE \sband_td_r_reg[19] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [19]),
        .Q(\sband_td_r_reg[47]_0 [19]),
        .R(SR));
  FDRE \sband_td_r_reg[1] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [1]),
        .Q(\sband_td_r_reg[47]_0 [1]),
        .R(SR));
  FDRE \sband_td_r_reg[20] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [20]),
        .Q(\sband_td_r_reg[47]_0 [20]),
        .R(SR));
  FDRE \sband_td_r_reg[21] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [21]),
        .Q(\sband_td_r_reg[47]_0 [21]),
        .R(SR));
  FDRE \sband_td_r_reg[22] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [22]),
        .Q(\sband_td_r_reg[47]_0 [22]),
        .R(SR));
  FDRE \sband_td_r_reg[23] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [23]),
        .Q(\sband_td_r_reg[47]_0 [23]),
        .R(SR));
  FDRE \sband_td_r_reg[24] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [24]),
        .Q(\sband_td_r_reg[47]_0 [24]),
        .R(SR));
  FDRE \sband_td_r_reg[25] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [25]),
        .Q(\sband_td_r_reg[47]_0 [25]),
        .R(SR));
  FDRE \sband_td_r_reg[26] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [26]),
        .Q(\sband_td_r_reg[47]_0 [26]),
        .R(SR));
  FDRE \sband_td_r_reg[27] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [27]),
        .Q(\sband_td_r_reg[47]_0 [27]),
        .R(SR));
  FDRE \sband_td_r_reg[28] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [28]),
        .Q(\sband_td_r_reg[47]_0 [28]),
        .R(SR));
  FDRE \sband_td_r_reg[29] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [29]),
        .Q(\sband_td_r_reg[47]_0 [29]),
        .R(SR));
  FDRE \sband_td_r_reg[2] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [2]),
        .Q(\sband_td_r_reg[47]_0 [2]),
        .R(SR));
  FDRE \sband_td_r_reg[30] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [30]),
        .Q(\sband_td_r_reg[47]_0 [30]),
        .R(SR));
  FDRE \sband_td_r_reg[31] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [31]),
        .Q(\sband_td_r_reg[47]_0 [31]),
        .R(SR));
  FDRE \sband_td_r_reg[32] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [32]),
        .Q(\sband_td_r_reg[47]_0 [32]),
        .R(SR));
  FDRE \sband_td_r_reg[33] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [33]),
        .Q(\sband_td_r_reg[47]_0 [33]),
        .R(SR));
  FDRE \sband_td_r_reg[34] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [34]),
        .Q(\sband_td_r_reg[47]_0 [34]),
        .R(SR));
  FDRE \sband_td_r_reg[35] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [35]),
        .Q(\sband_td_r_reg[47]_0 [35]),
        .R(SR));
  FDRE \sband_td_r_reg[36] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [36]),
        .Q(\sband_td_r_reg[47]_0 [36]),
        .R(SR));
  FDRE \sband_td_r_reg[37] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [37]),
        .Q(\sband_td_r_reg[47]_0 [37]),
        .R(SR));
  FDRE \sband_td_r_reg[38] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [38]),
        .Q(\sband_td_r_reg[47]_0 [38]),
        .R(SR));
  FDRE \sband_td_r_reg[39] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [39]),
        .Q(\sband_td_r_reg[47]_0 [39]),
        .R(SR));
  FDRE \sband_td_r_reg[3] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [3]),
        .Q(\sband_td_r_reg[47]_0 [3]),
        .R(SR));
  FDRE \sband_td_r_reg[40] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [40]),
        .Q(\sband_td_r_reg[47]_0 [40]),
        .R(SR));
  FDRE \sband_td_r_reg[41] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [41]),
        .Q(\sband_td_r_reg[47]_0 [41]),
        .R(SR));
  FDRE \sband_td_r_reg[42] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [42]),
        .Q(\sband_td_r_reg[47]_0 [42]),
        .R(SR));
  FDRE \sband_td_r_reg[43] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [43]),
        .Q(\sband_td_r_reg[47]_0 [43]),
        .R(SR));
  FDRE \sband_td_r_reg[44] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [44]),
        .Q(\sband_td_r_reg[47]_0 [44]),
        .R(SR));
  FDRE \sband_td_r_reg[45] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [45]),
        .Q(\sband_td_r_reg[47]_0 [45]),
        .R(SR));
  FDRE \sband_td_r_reg[46] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [46]),
        .Q(\sband_td_r_reg[47]_0 [46]),
        .R(SR));
  FDRE \sband_td_r_reg[47] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [47]),
        .Q(\sband_td_r_reg[47]_0 [47]),
        .R(SR));
  FDRE \sband_td_r_reg[4] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [4]),
        .Q(\sband_td_r_reg[47]_0 [4]),
        .R(SR));
  FDRE \sband_td_r_reg[5] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [5]),
        .Q(\sband_td_r_reg[47]_0 [5]),
        .R(SR));
  FDRE \sband_td_r_reg[6] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [6]),
        .Q(\sband_td_r_reg[47]_0 [6]),
        .R(SR));
  FDRE \sband_td_r_reg[7] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [7]),
        .Q(\sband_td_r_reg[47]_0 [7]),
        .R(SR));
  FDRE \sband_td_r_reg[8] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [8]),
        .Q(\sband_td_r_reg[47]_0 [8]),
        .R(SR));
  FDRE \sband_td_r_reg[9] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(\sband_td_r_reg[47]_1 [9]),
        .Q(\sband_td_r_reg[47]_0 [9]),
        .R(SR));
  LUT2 #(
    .INIT(4'hE)) 
    \sband_tk_r[4]_i_1 
       (.I0(E),
        .I1(vfb_sof119_out),
        .O(\sband_tk_r[4]_i_1_n_0 ));
  FDRE \sband_tk_r_reg[2] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(D[0]),
        .Q(\sband_tk_r_reg_n_0_[2] ),
        .R(SR));
  FDRE \sband_tk_r_reg[4] 
       (.C(vfb_clk),
        .CE(\sband_tk_r[4]_i_1_n_0 ),
        .D(D[1]),
        .Q(\sband_tk_r_reg[4]_0 ),
        .R(SR));
  (* SOFT_HLUTNM = "soft_lutpair549" *) 
  LUT4 #(
    .INIT(16'h40FF)) 
    sband_tl_r_i_3
       (.I0(vfb_cnt_reg[3]),
        .I1(vfb_cnt_reg[1]),
        .I2(vfb_cnt_reg[2]),
        .I3(E),
        .O(\vfb_cnt_reg[3]_0 ));
  FDRE sband_tl_r_reg
       (.C(vfb_clk),
        .CE(vfb_sof119_out),
        .D(sband_tl),
        .Q(sband_tl_r),
        .R(SR));
  FDRE \sband_ts_r_reg[4] 
       (.C(vfb_clk),
        .CE(vfb_sof119_out),
        .D(Q[0]),
        .Q(sband_ts_r[4]),
        .R(SR));
  FDRE \sband_ts_r_reg[5] 
       (.C(vfb_clk),
        .CE(vfb_sof119_out),
        .D(Q[1]),
        .Q(sband_ts_r[5]),
        .R(SR));
  FDRE \sband_ts_r_reg[6] 
       (.C(vfb_clk),
        .CE(vfb_sof119_out),
        .D(Q[2]),
        .Q(sband_ts_r[6]),
        .R(SR));
  FDRE \sband_ts_r_reg[7] 
       (.C(vfb_clk),
        .CE(vfb_sof119_out),
        .D(Q[3]),
        .Q(sband_ts_r[7]),
        .R(SR));
  FDRE \sband_ts_r_reg[8] 
       (.C(vfb_clk),
        .CE(vfb_sof119_out),
        .D(Q[4]),
        .Q(sband_ts_r[8]),
        .R(SR));
  FDRE \sband_ts_r_reg[9] 
       (.C(vfb_clk),
        .CE(vfb_sof119_out),
        .D(Q[5]),
        .Q(sband_ts_r[9]),
        .R(SR));
  FDRE \sband_tu_r_reg[0] 
       (.C(vfb_clk),
        .CE(vfb_sof119_out),
        .D(sband_tu),
        .Q(sband_tu_r),
        .R(SR));
  (* SOFT_HLUTNM = "soft_lutpair552" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \vfb_cnt[1]_i_1 
       (.I0(vfb_cnt_reg[1]),
        .O(cnt_done0[1]));
  (* SOFT_HLUTNM = "soft_lutpair552" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \vfb_cnt[2]_i_1 
       (.I0(vfb_cnt_reg[1]),
        .I1(vfb_cnt_reg[2]),
        .O(cnt_done0[2]));
  LUT6 #(
    .INIT(64'h8888A888FFFFFFFF)) 
    \vfb_cnt[3]_i_1 
       (.I0(E),
        .I1(vfb_eol_reg_0),
        .I2(vfb_cnt_reg[1]),
        .I3(vfb_cnt_reg[2]),
        .I4(vfb_cnt_reg[3]),
        .I5(vfb_arstn),
        .O(\vfb_cnt[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair550" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \vfb_cnt[3]_i_2 
       (.I0(vfb_cnt_reg[1]),
        .I1(vfb_cnt_reg[2]),
        .I2(vfb_cnt_reg[3]),
        .O(cnt_done0[3]));
  FDRE \vfb_cnt_reg[1] 
       (.C(vfb_clk),
        .CE(E),
        .D(cnt_done0[1]),
        .Q(vfb_cnt_reg[1]),
        .R(\vfb_cnt[3]_i_1_n_0 ));
  FDRE \vfb_cnt_reg[2] 
       (.C(vfb_clk),
        .CE(E),
        .D(cnt_done0[2]),
        .Q(vfb_cnt_reg[2]),
        .R(\vfb_cnt[3]_i_1_n_0 ));
  FDRE \vfb_cnt_reg[3] 
       (.C(vfb_clk),
        .CE(E),
        .D(cnt_done0[3]),
        .Q(vfb_cnt_reg[3]),
        .R(\vfb_cnt[3]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'h07FF)) 
    \vfb_data[15]_i_1 
       (.I0(E),
        .I1(vfb_eol_reg_0),
        .I2(m_axis_tvalid),
        .I3(vfb_arstn),
        .O(\vfb_data[15]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hBFFF)) 
    \vfb_data[23]_i_1 
       (.I0(m_axis_tvalid),
        .I1(vfb_arstn),
        .I2(vfb_eol_reg_0),
        .I3(E),
        .O(\vfb_data[23]_i_1_n_0 ));
  FDRE \vfb_data_reg[0] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[15]_0 [0]),
        .Q(vfb_data[0]),
        .R(\vfb_data[15]_i_1_n_0 ));
  FDRE \vfb_data_reg[10] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [6]),
        .Q(vfb_data[10]),
        .R(1'b0));
  FDRE \vfb_data_reg[11] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [7]),
        .Q(vfb_data[11]),
        .R(1'b0));
  FDRE \vfb_data_reg[12] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[15]_0 [4]),
        .Q(vfb_data[12]),
        .R(\vfb_data[15]_i_1_n_0 ));
  FDRE \vfb_data_reg[13] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[15]_0 [5]),
        .Q(vfb_data[13]),
        .R(\vfb_data[15]_i_1_n_0 ));
  FDRE \vfb_data_reg[14] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[15]_0 [6]),
        .Q(vfb_data[14]),
        .R(\vfb_data[15]_i_1_n_0 ));
  FDRE \vfb_data_reg[15] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[15]_0 [7]),
        .Q(vfb_data[15]),
        .R(\vfb_data[15]_i_1_n_0 ));
  FDRE \vfb_data_reg[16] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [8]),
        .Q(vfb_data[16]),
        .R(1'b0));
  FDRE \vfb_data_reg[17] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [9]),
        .Q(vfb_data[17]),
        .R(1'b0));
  FDRE \vfb_data_reg[18] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [10]),
        .Q(vfb_data[18]),
        .R(1'b0));
  FDRE \vfb_data_reg[19] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [11]),
        .Q(vfb_data[19]),
        .R(1'b0));
  FDRE \vfb_data_reg[1] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[15]_0 [1]),
        .Q(vfb_data[1]),
        .R(\vfb_data[15]_i_1_n_0 ));
  FDRE \vfb_data_reg[20] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [12]),
        .Q(vfb_data[20]),
        .R(1'b0));
  FDRE \vfb_data_reg[21] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [13]),
        .Q(vfb_data[21]),
        .R(1'b0));
  FDRE \vfb_data_reg[22] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [14]),
        .Q(vfb_data[22]),
        .R(1'b0));
  FDRE \vfb_data_reg[23] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [15]),
        .Q(vfb_data[23]),
        .R(1'b0));
  FDRE \vfb_data_reg[2] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[15]_0 [2]),
        .Q(vfb_data[2]),
        .R(\vfb_data[15]_i_1_n_0 ));
  FDRE \vfb_data_reg[3] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[15]_0 [3]),
        .Q(vfb_data[3]),
        .R(\vfb_data[15]_i_1_n_0 ));
  FDRE \vfb_data_reg[4] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [0]),
        .Q(vfb_data[4]),
        .R(1'b0));
  FDRE \vfb_data_reg[5] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [1]),
        .Q(vfb_data[5]),
        .R(1'b0));
  FDRE \vfb_data_reg[6] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [2]),
        .Q(vfb_data[6]),
        .R(1'b0));
  FDRE \vfb_data_reg[7] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [3]),
        .Q(vfb_data[7]),
        .R(1'b0));
  FDRE \vfb_data_reg[8] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [4]),
        .Q(vfb_data[8]),
        .R(1'b0));
  FDRE \vfb_data_reg[9] 
       (.C(vfb_clk),
        .CE(\vfb_data[23]_i_1_n_0 ),
        .D(\vfb_data_reg[23]_0 [5]),
        .Q(vfb_data[9]),
        .R(1'b0));
  LUT6 #(
    .INIT(64'hFFFFEAAAAAAAEAAA)) 
    vfb_eol_i_1
       (.I0(vfb_eol_i_2_n_0),
        .I1(sband_tl),
        .I2(vfb_eol_i_3_n_0),
        .I3(vfb_sof119_out),
        .I4(m_axis_tvalid),
        .I5(m_axis_tlast),
        .O(vfb_eol_i_1_n_0));
  LUT6 #(
    .INIT(64'h0000000000000008)) 
    vfb_eol_i_2
       (.I0(vfb_sof015_out),
        .I1(sband_tl_r),
        .I2(\sband_tk_r_reg_n_0_[2] ),
        .I3(vfb_valid_reg_0),
        .I4(vfb_sof119_out),
        .I5(m_axis_tvalid),
        .O(vfb_eol_i_2_n_0));
  LUT3 #(
    .INIT(8'h07)) 
    vfb_eol_i_3
       (.I0(vfb_eol_reg_0),
        .I1(E),
        .I2(Q[6]),
        .O(vfb_eol_i_3_n_0));
  (* SOFT_HLUTNM = "soft_lutpair548" *) 
  LUT2 #(
    .INIT(4'h8)) 
    vfb_eol_i_4
       (.I0(E),
        .I1(vfb_eol_reg_0),
        .O(vfb_valid_reg_0));
  FDRE vfb_eol_reg
       (.C(vfb_clk),
        .CE(1'b1),
        .D(vfb_eol_i_1_n_0),
        .Q(vfb_eol_reg_0),
        .R(SR));
  LUT6 #(
    .INIT(64'hA8AAA80000000000)) 
    \vfb_sof[0]_i_1 
       (.I0(vfb_arstn),
        .I1(\vfb_sof_reg[0]_1 ),
        .I2(\vfb_sof_reg[0]_2 ),
        .I3(vfb_sof4_out),
        .I4(\vfb_sof_reg[0]_0 ),
        .I5(\vfb_sof[0]_i_5_n_0 ),
        .O(\vfb_sof[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair546" *) 
  LUT5 #(
    .INIT(32'hFFFFFFF8)) 
    \vfb_sof[0]_i_4 
       (.I0(E),
        .I1(vfb_eol_reg_0),
        .I2(vfb_sof119_out),
        .I3(m_axis_tvalid),
        .I4(vfb_sof015_out),
        .O(vfb_sof4_out));
  (* SOFT_HLUTNM = "soft_lutpair551" *) 
  LUT4 #(
    .INIT(16'h0DDD)) 
    \vfb_sof[0]_i_5 
       (.I0(vfb_tu0),
        .I1(vfb_eol_reg_0),
        .I2(\vfb_sof_reg[0]_0 ),
        .I3(E),
        .O(\vfb_sof[0]_i_5_n_0 ));
  FDRE \vfb_sof_reg[0] 
       (.C(vfb_clk),
        .CE(1'b1),
        .D(\vfb_sof[0]_i_1_n_0 ),
        .Q(\vfb_sof_reg[0]_0 ),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair551" *) 
  LUT4 #(
    .INIT(16'h3F20)) 
    vfb_tu0_i_1
       (.I0(\vfb_sof_reg[0]_0 ),
        .I1(vfb_eol_reg_0),
        .I2(E),
        .I3(vfb_tu0),
        .O(vfb_tu0_i_1_n_0));
  FDRE vfb_tu0_reg
       (.C(vfb_clk),
        .CE(1'b1),
        .D(vfb_tu0_i_1_n_0),
        .Q(vfb_tu0),
        .R(SR));
  (* SOFT_HLUTNM = "soft_lutpair546" *) 
  LUT5 #(
    .INIT(32'hAFFFAEEE)) 
    vfb_valid_i_2
       (.I0(m_axis_tvalid),
        .I1(vfb_sof015_out),
        .I2(E),
        .I3(vfb_eol_reg_0),
        .I4(vfb_sof119_out),
        .O(vfb_valid_i_2_n_0));
  (* SOFT_HLUTNM = "soft_lutpair550" *) 
  LUT4 #(
    .INIT(16'hF700)) 
    vfb_valid_i_3
       (.I0(vfb_cnt_reg[1]),
        .I1(vfb_cnt_reg[2]),
        .I2(vfb_cnt_reg[3]),
        .I3(sband_tact),
        .O(vfb_sof015_out));
  FDRE vfb_valid_reg
       (.C(vfb_clk),
        .CE(1'b1),
        .D(vfb_valid_i_2_n_0),
        .Q(E),
        .R(SR));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vfb_v1_0_27_reorder
   (cur_dtype_udef,
    s_axis_tuser,
    SR,
    s_fifo_tv,
    s_axis_tkeep,
    s_axis_tlast,
    Q,
    sband_tu,
    \buf_valid_reg[1]_0 ,
    \state_reg[1] ,
    vfb_sof119_out,
    sband_tl,
    \buf_data_reg[0][106]_0 ,
    \buf_data_reg[0][171]_0 ,
    \state_reg[1]_0 ,
    \s_fifo_td_reg[59]_0 ,
    \s_fifo_tid_reg[9]_0 ,
    vfb_clk,
    s_axis_tready,
    D,
    s_axis_tvalid,
    vfb_arstn,
    m_axis_tvalid,
    \vfb_sof_reg[0] ,
    sband_tu_r,
    \buf_valid_reg[1]_1 ,
    sband_tl_r_reg,
    \sband_tk_r_reg[2] ,
    \sband_td_r_reg[31] ,
    vfb_sof015_out,
    sband_tl_r_reg_0,
    E,
    \REQ_BUFFER_RAW12.buff_tv_i_reg_0 );
  output cur_dtype_udef;
  output [0:0]s_axis_tuser;
  output [0:0]SR;
  output s_fifo_tv;
  output [0:0]s_axis_tkeep;
  output s_axis_tlast;
  output [22:0]Q;
  output [0:0]sband_tu;
  output \buf_valid_reg[1]_0 ;
  output \state_reg[1] ;
  output vfb_sof119_out;
  output sband_tl;
  output [1:0]\buf_data_reg[0][106]_0 ;
  output [47:0]\buf_data_reg[0][171]_0 ;
  output \state_reg[1]_0 ;
  output [47:0]\s_fifo_td_reg[59]_0 ;
  output [5:0]\s_fifo_tid_reg[9]_0 ;
  input vfb_clk;
  input s_axis_tready;
  input [80:0]D;
  input s_axis_tvalid;
  input vfb_arstn;
  input m_axis_tvalid;
  input \vfb_sof_reg[0] ;
  input [0:0]sband_tu_r;
  input \buf_valid_reg[1]_1 ;
  input sband_tl_r_reg;
  input [0:0]\sband_tk_r_reg[2] ;
  input [31:0]\sband_td_r_reg[31] ;
  input vfb_sof015_out;
  input sband_tl_r_reg_0;
  input [0:0]E;
  input \REQ_BUFFER_RAW12.buff_tv_i_reg_0 ;

  wire [80:0]D;
  wire [0:0]E;
  wire [22:0]Q;
  wire [7:0]\REQ_BUFFER_RAW12.buff_tk_i ;
  wire \REQ_BUFFER_RAW12.buff_tk_i[0]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tk_i[1]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tk_i[2]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tk_i[3]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tk_i[4]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tk_i[5]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tk_i[6]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tk_i[7]_i_2_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tl_i ;
  wire \REQ_BUFFER_RAW12.buff_tl_i0 ;
  wire \REQ_BUFFER_RAW12.buff_tl_i7_out ;
  wire \REQ_BUFFER_RAW12.buff_tl_i_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tl_i_i_5_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tl_i_i_6_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tl_i_i_7_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tl_i_i_8_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_ts_i[4]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_ts_i[5]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_ts_i[6]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_ts_i[7]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_ts_i[8]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_ts_i[9]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[4] ;
  wire \REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[5] ;
  wire \REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[6] ;
  wire \REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[7] ;
  wire \REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[8] ;
  wire \REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[9] ;
  wire \REQ_BUFFER_RAW12.buff_tu_i ;
  wire \REQ_BUFFER_RAW12.buff_tu_i_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tu_i_i_2_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tv_i2__2 ;
  wire \REQ_BUFFER_RAW12.buff_tv_i8_out ;
  wire \REQ_BUFFER_RAW12.buff_tv_i_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tv_i_i_5_n_0 ;
  wire \REQ_BUFFER_RAW12.buff_tv_i_reg_0 ;
  wire \REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[0]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[10]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[11]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[12]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[13]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[14]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[15]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[16]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[17]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[18]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[19]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[1]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[20]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[21]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[22]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[23]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[24]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[25]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[26]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[27]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[28]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[29]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[2]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[30]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[31]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[32]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[33]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[34]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[35]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[36]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[37]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[38]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[39]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[3]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[40]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[41]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[42]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[43]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[44]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[45]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[46]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[47]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[48]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[49]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[4]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[50]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[51]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[52]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[53]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[54]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[55]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[56]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[57]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[58]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[59]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[5]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[60]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[61]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[62]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[63]_i_2_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[6]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[7]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[8]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data[9]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[0] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[10] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[11] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[12] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[13] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[14] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[15] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[16] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[17] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[18] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[19] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[1] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[20] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[21] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[22] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[23] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[24] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[25] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[26] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[27] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[28] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[29] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[2] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[30] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[31] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[32] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[33] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[34] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[35] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[36] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[37] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[38] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[39] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[3] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[40] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[41] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[42] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[43] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[44] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[45] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[46] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[47] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[48] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[49] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[4] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[50] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[51] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[52] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[53] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[54] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[55] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[56] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[57] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[58] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[59] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[5] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[60] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[61] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[62] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[63] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[6] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[7] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[8] ;
  wire \REQ_BUFFER_RAW12.cur_data_reg_n_0_[9] ;
  wire \REQ_BUFFER_RAW12.filt_tl_on ;
  wire \REQ_BUFFER_RAW12.filt_tl_on_i_1_n_0 ;
  wire [1:0]\REQ_BUFFER_RAW12.indx_cntr ;
  wire \REQ_BUFFER_RAW12.indx_cntr0 ;
  wire \REQ_BUFFER_RAW12.indx_cntr[0]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.indx_cntr[1]_i_1_n_0 ;
  wire [63:0]\REQ_BUFFER_RAW12.liv_data ;
  wire \REQ_BUFFER_RAW12.liv_data[63]_i_3_n_0 ;
  wire [7:0]\REQ_BUFFER_RAW12.liv_tk ;
  wire \REQ_BUFFER_RAW12.liv_ts ;
  wire \REQ_BUFFER_RAW12.liv_ts_reg_n_0_[4] ;
  wire \REQ_BUFFER_RAW12.liv_ts_reg_n_0_[5] ;
  wire \REQ_BUFFER_RAW12.liv_ts_reg_n_0_[6] ;
  wire \REQ_BUFFER_RAW12.liv_ts_reg_n_0_[7] ;
  wire \REQ_BUFFER_RAW12.liv_ts_reg_n_0_[8] ;
  wire \REQ_BUFFER_RAW12.liv_ts_reg_n_0_[9] ;
  wire [63:16]\REQ_BUFFER_RAW12.res_data ;
  wire \REQ_BUFFER_RAW12.resi_wdth ;
  wire \REQ_BUFFER_RAW12.resi_wdth133_out ;
  wire \REQ_BUFFER_RAW12.resi_wdth[3]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[3]_i_2_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[4]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[4]_i_2_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[4]_i_3_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[4]_i_4_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[4]_i_5_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[4]_i_6_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[5]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[5]_i_2_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[5]_i_3_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[5]_i_4_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[5]_i_5_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[6]_i_1_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[6]_i_2_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[6]_i_3_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[6]_i_4_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_10_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_11_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_12_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_13_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_2_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_3_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_4_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_5_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_6_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_7_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_8_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth[7]_i_9_n_0 ;
  wire \REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ;
  wire \REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ;
  wire \REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ;
  wire \REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ;
  wire \REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[7] ;
  wire \REQ_REORDER_RAW12.tk_partial_i1__2 ;
  wire [0:0]SR;
  wire \buf_data[0][172]_i_1_n_0 ;
  wire \buf_data[1][172]_i_1_n_0 ;
  wire [1:0]\buf_data_reg[0][106]_0 ;
  wire [47:0]\buf_data_reg[0][171]_0 ;
  wire [172:4]\buf_data_reg[1]_0 ;
  wire \buf_data_reg_n_0_[0][4] ;
  wire \buf_valid[0]_i_1_n_0 ;
  wire \buf_valid[1]_i_1_n_0 ;
  wire \buf_valid[1]_i_4_n_0 ;
  wire \buf_valid_reg[1]_0 ;
  wire \buf_valid_reg[1]_1 ;
  wire \buf_valid_reg_n_0_[0] ;
  wire [47:0]buff_td;
  wire buff_tr141_in;
  wire cur_dtype_pxls;
  wire cur_dtype_pxls0;
  wire cur_dtype_pxls1;
  wire cur_dtype_pxls_i_2_n_0;
  wire cur_dtype_pxls_i_4_n_0;
  wire cur_dtype_sink;
  wire cur_dtype_sink_i_1_n_0;
  wire cur_dtype_sink_reg_n_0;
  wire cur_dtype_udef;
  wire cur_dtype_udef_i_1_n_0;
  wire m_axis_tvalid;
  wire main_dtvc__4;
  wire p_0_in;
  wire p_0_in39_in;
  wire [172:4]p_2_in__0;
  wire p_3_in;
  wire [0:0]s_axis_tkeep;
  wire s_axis_tlast;
  wire s_axis_tlast_0;
  wire s_axis_tready;
  wire s_axis_tready__3;
  wire [0:0]s_axis_tuser;
  wire s_axis_tvalid;
  wire [47:0]\s_fifo_td_reg[59]_0 ;
  wire [5:0]\s_fifo_tid_reg[9]_0 ;
  wire \s_fifo_tk[7]_i_1_n_0 ;
  wire \s_fifo_tk[7]_i_2_n_0 ;
  wire \s_fifo_tk[7]_i_4_n_0 ;
  wire \s_fifo_tk[7]_i_5_n_0 ;
  wire s_fifo_tl_i_1_n_0;
  wire s_fifo_tv;
  wire s_fifo_tv_i_1_n_0;
  wire sban_dtvc;
  wire [63:16]sband_td;
  wire [31:0]\sband_td_r_reg[31] ;
  wire [7:0]sband_tk;
  wire [0:0]\sband_tk_r_reg[2] ;
  wire sband_tl;
  wire sband_tl_r_reg;
  wire sband_tl_r_reg_0;
  wire [0:0]sband_tu;
  wire [0:0]sband_tu_r;
  wire \sband_tu_r[0]_i_3_n_0 ;
  wire \state_reg[1] ;
  wire \state_reg[1]_0 ;
  wire vfb_arstn;
  wire vfb_clk;
  wire vfb_sof015_out;
  wire vfb_sof119_out;
  wire \vfb_sof[0]_i_6_n_0 ;
  wire \vfb_sof_reg[0] ;

  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_tk_i[0]_i_1 
       (.I0(sband_tk[0]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_tk [0]),
        .O(\REQ_BUFFER_RAW12.buff_tk_i[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_tk_i[1]_i_1 
       (.I0(sband_tk[1]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_tk [1]),
        .O(\REQ_BUFFER_RAW12.buff_tk_i[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_tk_i[2]_i_1 
       (.I0(Q[6]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_tk [2]),
        .O(\REQ_BUFFER_RAW12.buff_tk_i[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_tk_i[3]_i_1 
       (.I0(sband_tk[3]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_tk [3]),
        .O(\REQ_BUFFER_RAW12.buff_tk_i[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_tk_i[4]_i_1 
       (.I0(sband_tk[4]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_tk [4]),
        .O(\REQ_BUFFER_RAW12.buff_tk_i[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_tk_i[5]_i_1 
       (.I0(sband_tk[5]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_tk [5]),
        .O(\REQ_BUFFER_RAW12.buff_tk_i[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_tk_i[6]_i_1 
       (.I0(sband_tk[6]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_tk [6]),
        .O(\REQ_BUFFER_RAW12.buff_tk_i[6]_i_1_n_0 ));
  LUT4 #(
    .INIT(16'hE2EE)) 
    \REQ_BUFFER_RAW12.buff_tk_i[7]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I2(s_axis_tready),
        .I3(s_fifo_tv),
        .O(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_tk_i[7]_i_2 
       (.I0(sband_tk[7]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_tk [7]),
        .O(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_2_n_0 ));
  FDRE \REQ_BUFFER_RAW12.buff_tk_i_reg[0] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_tk_i[0]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_tk_i [0]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_tk_i_reg[1] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_tk_i[1]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_tk_i [1]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_tk_i_reg[2] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_tk_i[2]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_tk_i [2]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_tk_i_reg[3] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_tk_i[3]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_tk_i [3]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_tk_i_reg[4] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_tk_i[4]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_tk_i [4]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_tk_i_reg[5] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_tk_i[5]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_tk_i [5]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_tk_i_reg[6] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_tk_i[6]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_tk_i [6]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_tk_i_reg[7] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_2_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_tk_i [7]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  LUT6 #(
    .INIT(64'hFBF8000000000000)) 
    \REQ_BUFFER_RAW12.buff_tl_i_i_1 
       (.I0(\REQ_BUFFER_RAW12.buff_tl_i0 ),
        .I1(\REQ_BUFFER_RAW12.buff_tl_i ),
        .I2(\REQ_BUFFER_RAW12.buff_tl_i7_out ),
        .I3(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .I4(vfb_arstn),
        .I5(\REQ_BUFFER_RAW12.buff_tl_i_i_5_n_0 ),
        .O(\REQ_BUFFER_RAW12.buff_tl_i_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFF80000000000000)) 
    \REQ_BUFFER_RAW12.buff_tl_i_i_2 
       (.I0(\REQ_BUFFER_RAW12.buff_tu_i_i_2_n_0 ),
        .I1(\REQ_BUFFER_RAW12.buff_tl_i_i_6_n_0 ),
        .I2(\REQ_BUFFER_RAW12.buff_tl_i_i_7_n_0 ),
        .I3(p_0_in39_in),
        .I4(cur_dtype_pxls1),
        .I5(s_axis_tlast_0),
        .O(\REQ_BUFFER_RAW12.buff_tl_i0 ));
  LUT6 #(
    .INIT(64'h8000808080808080)) 
    \REQ_BUFFER_RAW12.buff_tl_i_i_3 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tlast_0),
        .I2(cur_dtype_pxls1),
        .I3(s_axis_tready),
        .I4(s_fifo_tv),
        .I5(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .O(\REQ_BUFFER_RAW12.buff_tl_i ));
  LUT6 #(
    .INIT(64'hAAAA2AAA2AAA2AAA)) 
    \REQ_BUFFER_RAW12.buff_tl_i_i_4 
       (.I0(\REQ_BUFFER_RAW12.buff_tl_i_i_8_n_0 ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I2(s_axis_tlast_0),
        .I3(cur_dtype_pxls1),
        .I4(\REQ_BUFFER_RAW12.resi_wdth[7]_i_4_n_0 ),
        .I5(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .O(\REQ_BUFFER_RAW12.buff_tl_i7_out ));
  (* SOFT_HLUTNM = "soft_lutpair498" *) 
  LUT4 #(
    .INIT(16'h7F77)) 
    \REQ_BUFFER_RAW12.buff_tl_i_i_5 
       (.I0(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .I1(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I2(s_axis_tready),
        .I3(s_fifo_tv),
        .O(\REQ_BUFFER_RAW12.buff_tl_i_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair528" *) 
  LUT3 #(
    .INIT(8'h02)) 
    \REQ_BUFFER_RAW12.buff_tl_i_i_6 
       (.I0(sband_tk[0]),
        .I1(sband_tk[7]),
        .I2(sband_tk[6]),
        .O(\REQ_BUFFER_RAW12.buff_tl_i_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair491" *) 
  LUT5 #(
    .INIT(32'h8000008B)) 
    \REQ_BUFFER_RAW12.buff_tl_i_i_7 
       (.I0(sband_tk[1]),
        .I1(Q[6]),
        .I2(sband_tk[3]),
        .I3(sband_tk[4]),
        .I4(sband_tk[5]),
        .O(\REQ_BUFFER_RAW12.buff_tl_i_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h8080808080808088)) 
    \REQ_BUFFER_RAW12.buff_tl_i_i_8 
       (.I0(\REQ_BUFFER_RAW12.filt_tl_on ),
        .I1(p_3_in),
        .I2(buff_tr141_in),
        .I3(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[7] ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .O(\REQ_BUFFER_RAW12.buff_tl_i_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair527" *) 
  LUT3 #(
    .INIT(8'hDF)) 
    \REQ_BUFFER_RAW12.buff_tl_i_i_9 
       (.I0(s_fifo_tv),
        .I1(s_axis_tready),
        .I2(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .O(p_3_in));
  FDRE \REQ_BUFFER_RAW12.buff_tl_i_reg 
       (.C(vfb_clk),
        .CE(1'b1),
        .D(\REQ_BUFFER_RAW12.buff_tl_i_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .R(1'b0));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_ts_i[4]_i_1 
       (.I0(Q[0]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[4] ),
        .O(\REQ_BUFFER_RAW12.buff_ts_i[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_ts_i[5]_i_1 
       (.I0(Q[1]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[5] ),
        .O(\REQ_BUFFER_RAW12.buff_ts_i[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_ts_i[6]_i_1 
       (.I0(Q[2]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[6] ),
        .O(\REQ_BUFFER_RAW12.buff_ts_i[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_ts_i[7]_i_1 
       (.I0(Q[3]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[7] ),
        .O(\REQ_BUFFER_RAW12.buff_ts_i[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_ts_i[8]_i_1 
       (.I0(Q[4]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[8] ),
        .O(\REQ_BUFFER_RAW12.buff_ts_i[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAEAAFFFFA2AA0000)) 
    \REQ_BUFFER_RAW12.buff_ts_i[9]_i_1 
       (.I0(Q[5]),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I5(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[9] ),
        .O(\REQ_BUFFER_RAW12.buff_ts_i[9]_i_1_n_0 ));
  FDRE \REQ_BUFFER_RAW12.buff_ts_i_reg[4] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i[4]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[4] ),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_ts_i_reg[5] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i[5]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[5] ),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_ts_i_reg[6] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i[6]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[6] ),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_ts_i_reg[7] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i[7]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[7] ),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_ts_i_reg[8] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i[8]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[8] ),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.buff_ts_i_reg[9] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.buff_tk_i[7]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i[9]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[9] ),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  LUT6 #(
    .INIT(64'hFF00800000008000)) 
    \REQ_BUFFER_RAW12.buff_tu_i_i_1 
       (.I0(s_axis_tready__3),
        .I1(\REQ_BUFFER_RAW12.buff_tu_i_i_2_n_0 ),
        .I2(\buf_data_reg_n_0_[0][4] ),
        .I3(vfb_arstn),
        .I4(\REQ_BUFFER_RAW12.buff_tu_i ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth[7]_i_4_n_0 ),
        .O(\REQ_BUFFER_RAW12.buff_tu_i_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair526" *) 
  LUT3 #(
    .INIT(8'h80)) 
    \REQ_BUFFER_RAW12.buff_tu_i_i_2 
       (.I0(\buf_valid_reg_n_0_[0] ),
        .I1(\REQ_BUFFER_RAW12.liv_data[63]_i_3_n_0 ),
        .I2(cur_dtype_pxls),
        .O(\REQ_BUFFER_RAW12.buff_tu_i_i_2_n_0 ));
  FDRE \REQ_BUFFER_RAW12.buff_tu_i_reg 
       (.C(vfb_clk),
        .CE(1'b1),
        .D(\REQ_BUFFER_RAW12.buff_tu_i_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_tu_i ),
        .R(1'b0));
  LUT6 #(
    .INIT(64'hFFFFFFFF0808FF08)) 
    \REQ_BUFFER_RAW12.buff_tv_i_i_1 
       (.I0(\REQ_BUFFER_RAW12.buff_tv_i2__2 ),
        .I1(\REQ_BUFFER_RAW12.filt_tl_on ),
        .I2(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.buff_tv_i_reg_0 ),
        .I5(\REQ_BUFFER_RAW12.buff_tv_i8_out ),
        .O(\REQ_BUFFER_RAW12.buff_tv_i_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair488" *) 
  LUT5 #(
    .INIT(32'h01030303)) 
    \REQ_BUFFER_RAW12.buff_tv_i_i_2 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[7] ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .O(\REQ_BUFFER_RAW12.buff_tv_i2__2 ));
  LUT6 #(
    .INIT(64'hFF0FFFFF22022222)) 
    \REQ_BUFFER_RAW12.buff_tv_i_i_4 
       (.I0(\REQ_BUFFER_RAW12.buff_tv_i_i_5_n_0 ),
        .I1(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .I2(s_fifo_tv),
        .I3(s_axis_tready),
        .I4(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .O(\REQ_BUFFER_RAW12.buff_tv_i8_out ));
  LUT6 #(
    .INIT(64'hFFFFFFFAFFF8FFF0)) 
    \REQ_BUFFER_RAW12.buff_tv_i_i_5 
       (.I0(\REQ_BUFFER_RAW12.filt_tl_on ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[7] ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .O(\REQ_BUFFER_RAW12.buff_tv_i_i_5_n_0 ));
  FDRE \REQ_BUFFER_RAW12.buff_tv_i_reg 
       (.C(vfb_clk),
        .CE(1'b1),
        .D(\REQ_BUFFER_RAW12.buff_tv_i_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .R(SR));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[0]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[7]),
        .I5(\REQ_BUFFER_RAW12.liv_data [0]),
        .O(\REQ_BUFFER_RAW12.cur_data[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[10]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[17]),
        .I5(\REQ_BUFFER_RAW12.liv_data [10]),
        .O(\REQ_BUFFER_RAW12.cur_data[10]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[11]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[18]),
        .I5(\REQ_BUFFER_RAW12.liv_data [11]),
        .O(\REQ_BUFFER_RAW12.cur_data[11]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[12]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[19]),
        .I5(\REQ_BUFFER_RAW12.liv_data [12]),
        .O(\REQ_BUFFER_RAW12.cur_data[12]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[13]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[20]),
        .I5(\REQ_BUFFER_RAW12.liv_data [13]),
        .O(\REQ_BUFFER_RAW12.cur_data[13]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[14]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[21]),
        .I5(\REQ_BUFFER_RAW12.liv_data [14]),
        .O(\REQ_BUFFER_RAW12.cur_data[14]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[15]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[22]),
        .I5(\REQ_BUFFER_RAW12.liv_data [15]),
        .O(\REQ_BUFFER_RAW12.cur_data[15]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[16]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[16]),
        .I5(\REQ_BUFFER_RAW12.liv_data [16]),
        .O(\REQ_BUFFER_RAW12.cur_data[16]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[17]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[17]),
        .I5(\REQ_BUFFER_RAW12.liv_data [17]),
        .O(\REQ_BUFFER_RAW12.cur_data[17]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[18]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[18]),
        .I5(\REQ_BUFFER_RAW12.liv_data [18]),
        .O(\REQ_BUFFER_RAW12.cur_data[18]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[19]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[19]),
        .I5(\REQ_BUFFER_RAW12.liv_data [19]),
        .O(\REQ_BUFFER_RAW12.cur_data[19]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[1]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[8]),
        .I5(\REQ_BUFFER_RAW12.liv_data [1]),
        .O(\REQ_BUFFER_RAW12.cur_data[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[20]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[20]),
        .I5(\REQ_BUFFER_RAW12.liv_data [20]),
        .O(\REQ_BUFFER_RAW12.cur_data[20]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[21]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[21]),
        .I5(\REQ_BUFFER_RAW12.liv_data [21]),
        .O(\REQ_BUFFER_RAW12.cur_data[21]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[22]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[22]),
        .I5(\REQ_BUFFER_RAW12.liv_data [22]),
        .O(\REQ_BUFFER_RAW12.cur_data[22]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[23]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[23]),
        .I5(\REQ_BUFFER_RAW12.liv_data [23]),
        .O(\REQ_BUFFER_RAW12.cur_data[23]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[24]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[24]),
        .I5(\REQ_BUFFER_RAW12.liv_data [24]),
        .O(\REQ_BUFFER_RAW12.cur_data[24]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[25]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[25]),
        .I5(\REQ_BUFFER_RAW12.liv_data [25]),
        .O(\REQ_BUFFER_RAW12.cur_data[25]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[26]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[26]),
        .I5(\REQ_BUFFER_RAW12.liv_data [26]),
        .O(\REQ_BUFFER_RAW12.cur_data[26]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[27]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[27]),
        .I5(\REQ_BUFFER_RAW12.liv_data [27]),
        .O(\REQ_BUFFER_RAW12.cur_data[27]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[28]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[28]),
        .I5(\REQ_BUFFER_RAW12.liv_data [28]),
        .O(\REQ_BUFFER_RAW12.cur_data[28]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[29]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[29]),
        .I5(\REQ_BUFFER_RAW12.liv_data [29]),
        .O(\REQ_BUFFER_RAW12.cur_data[29]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[2]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[9]),
        .I5(\REQ_BUFFER_RAW12.liv_data [2]),
        .O(\REQ_BUFFER_RAW12.cur_data[2]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[30]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[30]),
        .I5(\REQ_BUFFER_RAW12.liv_data [30]),
        .O(\REQ_BUFFER_RAW12.cur_data[30]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[31]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[31]),
        .I5(\REQ_BUFFER_RAW12.liv_data [31]),
        .O(\REQ_BUFFER_RAW12.cur_data[31]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[32]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[32]),
        .I5(\REQ_BUFFER_RAW12.liv_data [32]),
        .O(\REQ_BUFFER_RAW12.cur_data[32]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[33]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[33]),
        .I5(\REQ_BUFFER_RAW12.liv_data [33]),
        .O(\REQ_BUFFER_RAW12.cur_data[33]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[34]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[34]),
        .I5(\REQ_BUFFER_RAW12.liv_data [34]),
        .O(\REQ_BUFFER_RAW12.cur_data[34]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[35]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[35]),
        .I5(\REQ_BUFFER_RAW12.liv_data [35]),
        .O(\REQ_BUFFER_RAW12.cur_data[35]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[36]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[36]),
        .I5(\REQ_BUFFER_RAW12.liv_data [36]),
        .O(\REQ_BUFFER_RAW12.cur_data[36]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[37]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[37]),
        .I5(\REQ_BUFFER_RAW12.liv_data [37]),
        .O(\REQ_BUFFER_RAW12.cur_data[37]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[38]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[38]),
        .I5(\REQ_BUFFER_RAW12.liv_data [38]),
        .O(\REQ_BUFFER_RAW12.cur_data[38]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[39]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[39]),
        .I5(\REQ_BUFFER_RAW12.liv_data [39]),
        .O(\REQ_BUFFER_RAW12.cur_data[39]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[3]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[10]),
        .I5(\REQ_BUFFER_RAW12.liv_data [3]),
        .O(\REQ_BUFFER_RAW12.cur_data[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[40]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[40]),
        .I5(\REQ_BUFFER_RAW12.liv_data [40]),
        .O(\REQ_BUFFER_RAW12.cur_data[40]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[41]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[41]),
        .I5(\REQ_BUFFER_RAW12.liv_data [41]),
        .O(\REQ_BUFFER_RAW12.cur_data[41]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[42]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[42]),
        .I5(\REQ_BUFFER_RAW12.liv_data [42]),
        .O(\REQ_BUFFER_RAW12.cur_data[42]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[43]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[43]),
        .I5(\REQ_BUFFER_RAW12.liv_data [43]),
        .O(\REQ_BUFFER_RAW12.cur_data[43]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[44]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[44]),
        .I5(\REQ_BUFFER_RAW12.liv_data [44]),
        .O(\REQ_BUFFER_RAW12.cur_data[44]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[45]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[45]),
        .I5(\REQ_BUFFER_RAW12.liv_data [45]),
        .O(\REQ_BUFFER_RAW12.cur_data[45]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[46]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[46]),
        .I5(\REQ_BUFFER_RAW12.liv_data [46]),
        .O(\REQ_BUFFER_RAW12.cur_data[46]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[47]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[47]),
        .I5(\REQ_BUFFER_RAW12.liv_data [47]),
        .O(\REQ_BUFFER_RAW12.cur_data[47]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[48]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[48]),
        .I5(\REQ_BUFFER_RAW12.liv_data [48]),
        .O(\REQ_BUFFER_RAW12.cur_data[48]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[49]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[49]),
        .I5(\REQ_BUFFER_RAW12.liv_data [49]),
        .O(\REQ_BUFFER_RAW12.cur_data[49]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[4]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[11]),
        .I5(\REQ_BUFFER_RAW12.liv_data [4]),
        .O(\REQ_BUFFER_RAW12.cur_data[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[50]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[50]),
        .I5(\REQ_BUFFER_RAW12.liv_data [50]),
        .O(\REQ_BUFFER_RAW12.cur_data[50]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[51]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[51]),
        .I5(\REQ_BUFFER_RAW12.liv_data [51]),
        .O(\REQ_BUFFER_RAW12.cur_data[51]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[52]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[52]),
        .I5(\REQ_BUFFER_RAW12.liv_data [52]),
        .O(\REQ_BUFFER_RAW12.cur_data[52]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[53]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[53]),
        .I5(\REQ_BUFFER_RAW12.liv_data [53]),
        .O(\REQ_BUFFER_RAW12.cur_data[53]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[54]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[54]),
        .I5(\REQ_BUFFER_RAW12.liv_data [54]),
        .O(\REQ_BUFFER_RAW12.cur_data[54]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[55]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[55]),
        .I5(\REQ_BUFFER_RAW12.liv_data [55]),
        .O(\REQ_BUFFER_RAW12.cur_data[55]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[56]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[56]),
        .I5(\REQ_BUFFER_RAW12.liv_data [56]),
        .O(\REQ_BUFFER_RAW12.cur_data[56]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[57]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[57]),
        .I5(\REQ_BUFFER_RAW12.liv_data [57]),
        .O(\REQ_BUFFER_RAW12.cur_data[57]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[58]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[58]),
        .I5(\REQ_BUFFER_RAW12.liv_data [58]),
        .O(\REQ_BUFFER_RAW12.cur_data[58]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[59]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[59]),
        .I5(\REQ_BUFFER_RAW12.liv_data [59]),
        .O(\REQ_BUFFER_RAW12.cur_data[59]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[5]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[12]),
        .I5(\REQ_BUFFER_RAW12.liv_data [5]),
        .O(\REQ_BUFFER_RAW12.cur_data[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[60]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[60]),
        .I5(\REQ_BUFFER_RAW12.liv_data [60]),
        .O(\REQ_BUFFER_RAW12.cur_data[60]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[61]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[61]),
        .I5(\REQ_BUFFER_RAW12.liv_data [61]),
        .O(\REQ_BUFFER_RAW12.cur_data[61]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[62]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[62]),
        .I5(\REQ_BUFFER_RAW12.liv_data [62]),
        .O(\REQ_BUFFER_RAW12.cur_data[62]_i_1_n_0 ));
  LUT3 #(
    .INIT(8'hBF)) 
    \REQ_BUFFER_RAW12.cur_data[63]_i_1 
       (.I0(s_axis_tready),
        .I1(s_fifo_tv),
        .I2(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .O(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[63]_i_2 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(sband_td[63]),
        .I5(\REQ_BUFFER_RAW12.liv_data [63]),
        .O(\REQ_BUFFER_RAW12.cur_data[63]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[6]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[13]),
        .I5(\REQ_BUFFER_RAW12.liv_data [6]),
        .O(\REQ_BUFFER_RAW12.cur_data[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[7]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[14]),
        .I5(\REQ_BUFFER_RAW12.liv_data [7]),
        .O(\REQ_BUFFER_RAW12.cur_data[7]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[8]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[15]),
        .I5(\REQ_BUFFER_RAW12.liv_data [8]),
        .O(\REQ_BUFFER_RAW12.cur_data[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFF75008AFF0000)) 
    \REQ_BUFFER_RAW12.cur_data[9]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(Q[16]),
        .I5(\REQ_BUFFER_RAW12.liv_data [9]),
        .O(\REQ_BUFFER_RAW12.cur_data[9]_i_1_n_0 ));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[0] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[0]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[0] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[10] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[10]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[10] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[11] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[11]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[11] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[12] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[12]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[12] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[13] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[13]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[13] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[14] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[14]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[14] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[15] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[15]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[15] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[16] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[16]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[16] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[17] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[17]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[17] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[18] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[18]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[18] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[19] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[19]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[19] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[1] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[1]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[1] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[20] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[20]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[20] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[21] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[21]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[21] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[22] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[22]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[22] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[23] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[23]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[23] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[24] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[24]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[24] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[25] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[25]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[25] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[26] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[26]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[26] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[27] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[27]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[27] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[28] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[28]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[28] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[29] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[29]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[29] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[2] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[2]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[2] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[30] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[30]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[30] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[31] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[31]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[31] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[32] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[32]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[32] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[33] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[33]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[33] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[34] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[34]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[34] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[35] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[35]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[35] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[36] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[36]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[36] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[37] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[37]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[37] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[38] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[38]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[38] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[39] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[39]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[39] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[3] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[3]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[3] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[40] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[40]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[40] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[41] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[41]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[41] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[42] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[42]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[42] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[43] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[43]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[43] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[44] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[44]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[44] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[45] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[45]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[45] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[46] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[46]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[46] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[47] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[47]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[47] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[48] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[48]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[48] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[49] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[49]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[49] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[4] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[4]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[4] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[50] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[50]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[50] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[51] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[51]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[51] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[52] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[52]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[52] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[53] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[53]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[53] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[54] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[54]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[54] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[55] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[55]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[55] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[56] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[56]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[56] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[57] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[57]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[57] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[58] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[58]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[58] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[59] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[59]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[59] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[5] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[5]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[5] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[60] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[60]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[60] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[61] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[61]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[61] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[62] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[62]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[62] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[63] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[63]_i_2_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[63] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[6] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[6]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[6] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[7] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[7]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[7] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[8] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[8]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[8] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.cur_data_reg[9] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.cur_data[63]_i_1_n_0 ),
        .D(\REQ_BUFFER_RAW12.cur_data[9]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[9] ),
        .R(SR));
  LUT6 #(
    .INIT(64'h00F08080F0F08080)) 
    \REQ_BUFFER_RAW12.filt_tl_on_i_1 
       (.I0(sband_tl),
        .I1(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I2(vfb_arstn),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.filt_tl_on ),
        .I5(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .O(\REQ_BUFFER_RAW12.filt_tl_on_i_1_n_0 ));
  FDRE \REQ_BUFFER_RAW12.filt_tl_on_reg 
       (.C(vfb_clk),
        .CE(1'b1),
        .D(\REQ_BUFFER_RAW12.filt_tl_on_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.filt_tl_on ),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair529" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \REQ_BUFFER_RAW12.indx_cntr[0]_i_1 
       (.I0(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .O(\REQ_BUFFER_RAW12.indx_cntr[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair529" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \REQ_BUFFER_RAW12.indx_cntr[1]_i_1 
       (.I0(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I1(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .O(\REQ_BUFFER_RAW12.indx_cntr[1]_i_1_n_0 ));
  FDRE \REQ_BUFFER_RAW12.indx_cntr_reg[0] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.indx_cntr[0]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.indx_cntr_reg[1] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.indx_cntr[1]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  LUT6 #(
    .INIT(64'h0200000000000000)) 
    \REQ_BUFFER_RAW12.liv_data[63]_i_1 
       (.I0(buff_tr141_in),
        .I1(\REQ_BUFFER_RAW12.filt_tl_on ),
        .I2(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .I3(cur_dtype_pxls),
        .I4(\REQ_BUFFER_RAW12.liv_data[63]_i_3_n_0 ),
        .I5(\buf_valid_reg_n_0_[0] ),
        .O(\REQ_BUFFER_RAW12.resi_wdth133_out ));
  (* SOFT_HLUTNM = "soft_lutpair488" *) 
  LUT4 #(
    .INIT(16'h0007)) 
    \REQ_BUFFER_RAW12.liv_data[63]_i_2 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[7] ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ),
        .O(buff_tr141_in));
  LUT6 #(
    .INIT(64'h0002000000000000)) 
    \REQ_BUFFER_RAW12.liv_data[63]_i_3 
       (.I0(Q[5]),
        .I1(Q[4]),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[2]),
        .I5(Q[3]),
        .O(\REQ_BUFFER_RAW12.liv_data[63]_i_3_n_0 ));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[0] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[7]),
        .Q(\REQ_BUFFER_RAW12.liv_data [0]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[10] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[17]),
        .Q(\REQ_BUFFER_RAW12.liv_data [10]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[11] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[18]),
        .Q(\REQ_BUFFER_RAW12.liv_data [11]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[12] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[19]),
        .Q(\REQ_BUFFER_RAW12.liv_data [12]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[13] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[20]),
        .Q(\REQ_BUFFER_RAW12.liv_data [13]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[14] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[21]),
        .Q(\REQ_BUFFER_RAW12.liv_data [14]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[15] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[22]),
        .Q(\REQ_BUFFER_RAW12.liv_data [15]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[16] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[16]),
        .Q(\REQ_BUFFER_RAW12.liv_data [16]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[17] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[17]),
        .Q(\REQ_BUFFER_RAW12.liv_data [17]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[18] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[18]),
        .Q(\REQ_BUFFER_RAW12.liv_data [18]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[19] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[19]),
        .Q(\REQ_BUFFER_RAW12.liv_data [19]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[1] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[8]),
        .Q(\REQ_BUFFER_RAW12.liv_data [1]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[20] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[20]),
        .Q(\REQ_BUFFER_RAW12.liv_data [20]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[21] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[21]),
        .Q(\REQ_BUFFER_RAW12.liv_data [21]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[22] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[22]),
        .Q(\REQ_BUFFER_RAW12.liv_data [22]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[23] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[23]),
        .Q(\REQ_BUFFER_RAW12.liv_data [23]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[24] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[24]),
        .Q(\REQ_BUFFER_RAW12.liv_data [24]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[25] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[25]),
        .Q(\REQ_BUFFER_RAW12.liv_data [25]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[26] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[26]),
        .Q(\REQ_BUFFER_RAW12.liv_data [26]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[27] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[27]),
        .Q(\REQ_BUFFER_RAW12.liv_data [27]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[28] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[28]),
        .Q(\REQ_BUFFER_RAW12.liv_data [28]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[29] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[29]),
        .Q(\REQ_BUFFER_RAW12.liv_data [29]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[2] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[9]),
        .Q(\REQ_BUFFER_RAW12.liv_data [2]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[30] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[30]),
        .Q(\REQ_BUFFER_RAW12.liv_data [30]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[31] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[31]),
        .Q(\REQ_BUFFER_RAW12.liv_data [31]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[32] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[32]),
        .Q(\REQ_BUFFER_RAW12.liv_data [32]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[33] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[33]),
        .Q(\REQ_BUFFER_RAW12.liv_data [33]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[34] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[34]),
        .Q(\REQ_BUFFER_RAW12.liv_data [34]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[35] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[35]),
        .Q(\REQ_BUFFER_RAW12.liv_data [35]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[36] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[36]),
        .Q(\REQ_BUFFER_RAW12.liv_data [36]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[37] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[37]),
        .Q(\REQ_BUFFER_RAW12.liv_data [37]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[38] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[38]),
        .Q(\REQ_BUFFER_RAW12.liv_data [38]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[39] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[39]),
        .Q(\REQ_BUFFER_RAW12.liv_data [39]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[3] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[10]),
        .Q(\REQ_BUFFER_RAW12.liv_data [3]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[40] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[40]),
        .Q(\REQ_BUFFER_RAW12.liv_data [40]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[41] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[41]),
        .Q(\REQ_BUFFER_RAW12.liv_data [41]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[42] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[42]),
        .Q(\REQ_BUFFER_RAW12.liv_data [42]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[43] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[43]),
        .Q(\REQ_BUFFER_RAW12.liv_data [43]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[44] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[44]),
        .Q(\REQ_BUFFER_RAW12.liv_data [44]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[45] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[45]),
        .Q(\REQ_BUFFER_RAW12.liv_data [45]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[46] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[46]),
        .Q(\REQ_BUFFER_RAW12.liv_data [46]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[47] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[47]),
        .Q(\REQ_BUFFER_RAW12.liv_data [47]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[48] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[48]),
        .Q(\REQ_BUFFER_RAW12.liv_data [48]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[49] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[49]),
        .Q(\REQ_BUFFER_RAW12.liv_data [49]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[4] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[11]),
        .Q(\REQ_BUFFER_RAW12.liv_data [4]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[50] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[50]),
        .Q(\REQ_BUFFER_RAW12.liv_data [50]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[51] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[51]),
        .Q(\REQ_BUFFER_RAW12.liv_data [51]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[52] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[52]),
        .Q(\REQ_BUFFER_RAW12.liv_data [52]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[53] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[53]),
        .Q(\REQ_BUFFER_RAW12.liv_data [53]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[54] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[54]),
        .Q(\REQ_BUFFER_RAW12.liv_data [54]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[55] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[55]),
        .Q(\REQ_BUFFER_RAW12.liv_data [55]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[56] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[56]),
        .Q(\REQ_BUFFER_RAW12.liv_data [56]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[57] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[57]),
        .Q(\REQ_BUFFER_RAW12.liv_data [57]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[58] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[58]),
        .Q(\REQ_BUFFER_RAW12.liv_data [58]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[59] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[59]),
        .Q(\REQ_BUFFER_RAW12.liv_data [59]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[5] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[12]),
        .Q(\REQ_BUFFER_RAW12.liv_data [5]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[60] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[60]),
        .Q(\REQ_BUFFER_RAW12.liv_data [60]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[61] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[61]),
        .Q(\REQ_BUFFER_RAW12.liv_data [61]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[62] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[62]),
        .Q(\REQ_BUFFER_RAW12.liv_data [62]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[63] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_td[63]),
        .Q(\REQ_BUFFER_RAW12.liv_data [63]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[6] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[13]),
        .Q(\REQ_BUFFER_RAW12.liv_data [6]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[7] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[14]),
        .Q(\REQ_BUFFER_RAW12.liv_data [7]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[8] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[15]),
        .Q(\REQ_BUFFER_RAW12.liv_data [8]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_data_reg[9] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[16]),
        .Q(\REQ_BUFFER_RAW12.liv_data [9]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_tk_reg[0] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_tk[0]),
        .Q(\REQ_BUFFER_RAW12.liv_tk [0]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.liv_tk_reg[1] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_tk[1]),
        .Q(\REQ_BUFFER_RAW12.liv_tk [1]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.liv_tk_reg[2] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(Q[6]),
        .Q(\REQ_BUFFER_RAW12.liv_tk [2]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.liv_tk_reg[3] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_tk[3]),
        .Q(\REQ_BUFFER_RAW12.liv_tk [3]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.liv_tk_reg[4] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_tk[4]),
        .Q(\REQ_BUFFER_RAW12.liv_tk [4]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.liv_tk_reg[5] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_tk[5]),
        .Q(\REQ_BUFFER_RAW12.liv_tk [5]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.liv_tk_reg[6] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_tk[6]),
        .Q(\REQ_BUFFER_RAW12.liv_tk [6]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.liv_tk_reg[7] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .D(sband_tk[7]),
        .Q(\REQ_BUFFER_RAW12.liv_tk [7]),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  LUT5 #(
    .INIT(32'h5DFF0000)) 
    \REQ_BUFFER_RAW12.liv_ts[9]_i_1 
       (.I0(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .O(\REQ_BUFFER_RAW12.liv_ts ));
  FDRE \REQ_BUFFER_RAW12.liv_ts_reg[4] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.liv_ts ),
        .D(Q[0]),
        .Q(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[4] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_ts_reg[5] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.liv_ts ),
        .D(Q[1]),
        .Q(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[5] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_ts_reg[6] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.liv_ts ),
        .D(Q[2]),
        .Q(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[6] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_ts_reg[7] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.liv_ts ),
        .D(Q[3]),
        .Q(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[7] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_ts_reg[8] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.liv_ts ),
        .D(Q[4]),
        .Q(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[8] ),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.liv_ts_reg[9] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.liv_ts ),
        .D(Q[5]),
        .Q(\REQ_BUFFER_RAW12.liv_ts_reg_n_0_[9] ),
        .R(SR));
  LUT3 #(
    .INIT(8'h8A)) 
    \REQ_BUFFER_RAW12.res_data[63]_i_1 
       (.I0(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .O(\REQ_BUFFER_RAW12.indx_cntr0 ));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[16] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[16] ),
        .Q(\REQ_BUFFER_RAW12.res_data [16]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[17] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[17] ),
        .Q(\REQ_BUFFER_RAW12.res_data [17]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[18] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[18] ),
        .Q(\REQ_BUFFER_RAW12.res_data [18]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[19] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[19] ),
        .Q(\REQ_BUFFER_RAW12.res_data [19]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[20] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[20] ),
        .Q(\REQ_BUFFER_RAW12.res_data [20]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[21] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[21] ),
        .Q(\REQ_BUFFER_RAW12.res_data [21]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[22] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[22] ),
        .Q(\REQ_BUFFER_RAW12.res_data [22]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[23] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[23] ),
        .Q(\REQ_BUFFER_RAW12.res_data [23]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[24] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[24] ),
        .Q(\REQ_BUFFER_RAW12.res_data [24]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[25] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[25] ),
        .Q(\REQ_BUFFER_RAW12.res_data [25]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[26] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[26] ),
        .Q(\REQ_BUFFER_RAW12.res_data [26]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[27] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[27] ),
        .Q(\REQ_BUFFER_RAW12.res_data [27]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[28] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[28] ),
        .Q(\REQ_BUFFER_RAW12.res_data [28]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[29] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[29] ),
        .Q(\REQ_BUFFER_RAW12.res_data [29]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[30] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[30] ),
        .Q(\REQ_BUFFER_RAW12.res_data [30]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[31] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[31] ),
        .Q(\REQ_BUFFER_RAW12.res_data [31]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[32] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[32] ),
        .Q(\REQ_BUFFER_RAW12.res_data [32]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[33] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[33] ),
        .Q(\REQ_BUFFER_RAW12.res_data [33]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[34] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[34] ),
        .Q(\REQ_BUFFER_RAW12.res_data [34]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[35] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[35] ),
        .Q(\REQ_BUFFER_RAW12.res_data [35]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[36] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[36] ),
        .Q(\REQ_BUFFER_RAW12.res_data [36]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[37] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[37] ),
        .Q(\REQ_BUFFER_RAW12.res_data [37]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[38] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[38] ),
        .Q(\REQ_BUFFER_RAW12.res_data [38]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[39] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[39] ),
        .Q(\REQ_BUFFER_RAW12.res_data [39]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[40] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[40] ),
        .Q(\REQ_BUFFER_RAW12.res_data [40]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[41] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[41] ),
        .Q(\REQ_BUFFER_RAW12.res_data [41]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[42] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[42] ),
        .Q(\REQ_BUFFER_RAW12.res_data [42]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[43] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[43] ),
        .Q(\REQ_BUFFER_RAW12.res_data [43]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[44] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[44] ),
        .Q(\REQ_BUFFER_RAW12.res_data [44]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[45] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[45] ),
        .Q(\REQ_BUFFER_RAW12.res_data [45]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[46] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[46] ),
        .Q(\REQ_BUFFER_RAW12.res_data [46]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[47] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[47] ),
        .Q(\REQ_BUFFER_RAW12.res_data [47]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[48] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[48] ),
        .Q(\REQ_BUFFER_RAW12.res_data [48]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[49] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[49] ),
        .Q(\REQ_BUFFER_RAW12.res_data [49]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[50] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[50] ),
        .Q(\REQ_BUFFER_RAW12.res_data [50]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[51] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[51] ),
        .Q(\REQ_BUFFER_RAW12.res_data [51]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[52] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[52] ),
        .Q(\REQ_BUFFER_RAW12.res_data [52]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[53] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[53] ),
        .Q(\REQ_BUFFER_RAW12.res_data [53]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[54] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[54] ),
        .Q(\REQ_BUFFER_RAW12.res_data [54]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[55] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[55] ),
        .Q(\REQ_BUFFER_RAW12.res_data [55]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[56] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[56] ),
        .Q(\REQ_BUFFER_RAW12.res_data [56]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[57] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[57] ),
        .Q(\REQ_BUFFER_RAW12.res_data [57]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[58] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[58] ),
        .Q(\REQ_BUFFER_RAW12.res_data [58]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[59] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[59] ),
        .Q(\REQ_BUFFER_RAW12.res_data [59]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[60] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[60] ),
        .Q(\REQ_BUFFER_RAW12.res_data [60]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[61] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[61] ),
        .Q(\REQ_BUFFER_RAW12.res_data [61]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[62] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[62] ),
        .Q(\REQ_BUFFER_RAW12.res_data [62]),
        .R(SR));
  FDRE \REQ_BUFFER_RAW12.res_data_reg[63] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[63] ),
        .Q(\REQ_BUFFER_RAW12.res_data [63]),
        .R(SR));
  LUT4 #(
    .INIT(16'h2EE2)) 
    \REQ_BUFFER_RAW12.resi_wdth[3]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I2(sband_tk[1]),
        .I3(\REQ_BUFFER_RAW12.resi_wdth[3]_i_2_n_0 ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[3]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \REQ_BUFFER_RAW12.resi_wdth[3]_i_2 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth[4]_i_5_n_0 ),
        .I1(sband_tk[7]),
        .I2(sband_tk[6]),
        .I3(sband_tk[5]),
        .I4(sband_tk[0]),
        .I5(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[3]_i_2_n_0 ));
  LUT5 #(
    .INIT(32'h3C55C355)) 
    \REQ_BUFFER_RAW12.resi_wdth[4]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth[4]_i_2_n_0 ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth[4]_i_3_n_0 ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth[4]_i_4_n_0 ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[4]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hF66060F660F6F660)) 
    \REQ_BUFFER_RAW12.resi_wdth[4]_i_2 
       (.I0(sband_tk[0]),
        .I1(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth[4]_i_5_n_0 ),
        .I3(sband_tk[7]),
        .I4(sband_tk[6]),
        .I5(sband_tk[5]),
        .O(\REQ_BUFFER_RAW12.resi_wdth[4]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair490" *) 
  LUT5 #(
    .INIT(32'hA995566A)) 
    \REQ_BUFFER_RAW12.resi_wdth[4]_i_3 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth[5]_i_5_n_0 ),
        .I1(sband_tk[5]),
        .I2(sband_tk[6]),
        .I3(sband_tk[7]),
        .I4(\REQ_BUFFER_RAW12.resi_wdth[5]_i_4_n_0 ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[4]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair492" *) 
  LUT5 #(
    .INIT(32'h9669FFFF)) 
    \REQ_BUFFER_RAW12.resi_wdth[4]_i_4 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I1(sband_tk[0]),
        .I2(\REQ_BUFFER_RAW12.resi_wdth[4]_i_6_n_0 ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth[4]_i_5_n_0 ),
        .I4(sband_tk[1]),
        .O(\REQ_BUFFER_RAW12.resi_wdth[4]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair500" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \REQ_BUFFER_RAW12.resi_wdth[4]_i_5 
       (.I0(Q[6]),
        .I1(sband_tk[4]),
        .I2(sband_tk[3]),
        .O(\REQ_BUFFER_RAW12.resi_wdth[4]_i_5_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair528" *) 
  LUT3 #(
    .INIT(8'h96)) 
    \REQ_BUFFER_RAW12.resi_wdth[4]_i_6 
       (.I0(sband_tk[7]),
        .I1(sband_tk[6]),
        .I2(sband_tk[5]),
        .O(\REQ_BUFFER_RAW12.resi_wdth[4]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair489" *) 
  LUT5 #(
    .INIT(32'h66660FF0)) 
    \REQ_BUFFER_RAW12.resi_wdth[5]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth[5]_i_2_n_0 ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth[5]_i_3_n_0 ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[5]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair490" *) 
  LUT5 #(
    .INIT(32'hEEE8E888)) 
    \REQ_BUFFER_RAW12.resi_wdth[5]_i_2 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth[5]_i_4_n_0 ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth[5]_i_5_n_0 ),
        .I2(sband_tk[5]),
        .I3(sband_tk[6]),
        .I4(sband_tk[7]),
        .O(\REQ_BUFFER_RAW12.resi_wdth[5]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hA999955556666AAA)) 
    \REQ_BUFFER_RAW12.resi_wdth[5]_i_3 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth[7]_i_9_n_0 ),
        .I2(sband_tk[0]),
        .I3(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth[7]_i_11_n_0 ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[5]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h8778878787878787)) 
    \REQ_BUFFER_RAW12.resi_wdth[5]_i_4 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I1(sband_tk[0]),
        .I2(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I3(s_axis_tready),
        .I4(s_fifo_tv),
        .I5(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[5]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair491" *) 
  LUT3 #(
    .INIT(8'hE8)) 
    \REQ_BUFFER_RAW12.resi_wdth[5]_i_5 
       (.I0(sband_tk[4]),
        .I1(Q[6]),
        .I2(sband_tk[3]),
        .O(\REQ_BUFFER_RAW12.resi_wdth[5]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h66666666F0000FFF)) 
    \REQ_BUFFER_RAW12.resi_wdth[6]_i_1 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth[6]_i_2_n_0 ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth[6]_i_3_n_0 ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hAA80557F7FFF8000)) 
    \REQ_BUFFER_RAW12.resi_wdth[6]_i_2 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .I1(sband_tk[0]),
        .I2(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth[7]_i_9_n_0 ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[6]_i_2_n_0 ));
  LUT3 #(
    .INIT(8'hE8)) 
    \REQ_BUFFER_RAW12.resi_wdth[6]_i_3 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth[7]_i_11_n_0 ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth[6]_i_4_n_0 ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth[5]_i_2_n_0 ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[6]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h7F15151580EAEAEA)) 
    \REQ_BUFFER_RAW12.resi_wdth[6]_i_4 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I2(sband_tk[0]),
        .I3(\REQ_BUFFER_RAW12.resi_wdth[7]_i_4_n_0 ),
        .I4(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[6]_i_4_n_0 ));
  LUT5 #(
    .INIT(32'hA200FFFF)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_1 
       (.I0(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I4(vfb_arstn),
        .O(\REQ_BUFFER_RAW12.resi_wdth ));
  LUT6 #(
    .INIT(64'hFFF7F7F7F7000000)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_10 
       (.I0(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I1(s_fifo_tv),
        .I2(s_axis_tready),
        .I3(sband_tk[0]),
        .I4(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_10_n_0 ));
  LUT6 #(
    .INIT(64'hF999999099909000)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_11 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth[5]_i_4_n_0 ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth[7]_i_12_n_0 ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth[7]_i_13_n_0 ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth[4]_i_6_n_0 ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth[4]_i_5_n_0 ),
        .I5(sband_tk[1]),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_11_n_0 ));
  LUT6 #(
    .INIT(64'hE8E8E817E8171717)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_12 
       (.I0(sband_tk[7]),
        .I1(sband_tk[6]),
        .I2(sband_tk[5]),
        .I3(sband_tk[3]),
        .I4(Q[6]),
        .I5(sband_tk[4]),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_12_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair492" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_13 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I1(sband_tk[0]),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_13_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFFFFF0000FFF8)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_2 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[7] ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth[7]_i_4_n_0 ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h99999999F00FFF00)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_3 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth[7]_i_5_n_0 ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth[7]_i_6_n_0 ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[7] ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth[7]_i_7_n_0 ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth133_out ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair527" *) 
  LUT3 #(
    .INIT(8'h2F)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_4 
       (.I0(s_fifo_tv),
        .I1(s_axis_tready),
        .I2(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_4_n_0 ));
  LUT6 #(
    .INIT(64'hAAAAAA6A5595AAAA)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_5 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[7] ),
        .I1(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I2(s_fifo_tv),
        .I3(s_axis_tready),
        .I4(\REQ_BUFFER_RAW12.resi_wdth[7]_i_8_n_0 ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h6F99999FFF9F9FFF)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_6 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth[7]_i_9_n_0 ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ),
        .I2(\REQ_BUFFER_RAW12.resi_wdth[5]_i_2_n_0 ),
        .I3(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .I4(\REQ_BUFFER_RAW12.resi_wdth[7]_i_10_n_0 ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth[7]_i_11_n_0 ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_6_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair489" *) 
  LUT2 #(
    .INIT(4'h7)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_7 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h7F151515FFFFFFFF)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_8 
       (.I0(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .I1(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .I2(sband_tk[0]),
        .I3(\REQ_BUFFER_RAW12.resi_wdth[7]_i_4_n_0 ),
        .I4(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I5(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_8_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair498" *) 
  LUT3 #(
    .INIT(8'hBF)) 
    \REQ_BUFFER_RAW12.resi_wdth[7]_i_9 
       (.I0(s_axis_tready),
        .I1(s_fifo_tv),
        .I2(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .O(\REQ_BUFFER_RAW12.resi_wdth[7]_i_9_n_0 ));
  FDRE \REQ_BUFFER_RAW12.resi_wdth_reg[3] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth[7]_i_2_n_0 ),
        .D(\REQ_BUFFER_RAW12.resi_wdth[3]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[3] ),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.resi_wdth_reg[4] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth[7]_i_2_n_0 ),
        .D(\REQ_BUFFER_RAW12.resi_wdth[4]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[4] ),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.resi_wdth_reg[5] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth[7]_i_2_n_0 ),
        .D(\REQ_BUFFER_RAW12.resi_wdth[5]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[5] ),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.resi_wdth_reg[6] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth[7]_i_2_n_0 ),
        .D(\REQ_BUFFER_RAW12.resi_wdth[6]_i_1_n_0 ),
        .Q(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[6] ),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  FDRE \REQ_BUFFER_RAW12.resi_wdth_reg[7] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.resi_wdth[7]_i_2_n_0 ),
        .D(\REQ_BUFFER_RAW12.resi_wdth[7]_i_3_n_0 ),
        .Q(\REQ_BUFFER_RAW12.resi_wdth_reg_n_0_[7] ),
        .R(\REQ_BUFFER_RAW12.resi_wdth ));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][100]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[8]),
        .I3(\buf_data_reg[1]_0 [100]),
        .O(p_2_in__0[100]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][101]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[9]),
        .I3(\buf_data_reg[1]_0 [101]),
        .O(p_2_in__0[101]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][102]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[10]),
        .I3(\buf_data_reg[1]_0 [102]),
        .O(p_2_in__0[102]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][103]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[11]),
        .I3(\buf_data_reg[1]_0 [103]),
        .O(p_2_in__0[103]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][104]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[12]),
        .I3(\buf_data_reg[1]_0 [104]),
        .O(p_2_in__0[104]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][105]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[13]),
        .I3(\buf_data_reg[1]_0 [105]),
        .O(p_2_in__0[105]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][106]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[14]),
        .I3(\buf_data_reg[1]_0 [106]),
        .O(p_2_in__0[106]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][107]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[15]),
        .I3(\buf_data_reg[1]_0 [107]),
        .O(p_2_in__0[107]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][108]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[16]),
        .I3(\buf_data_reg[1]_0 [108]),
        .O(p_2_in__0[108]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][109]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[17]),
        .I3(\buf_data_reg[1]_0 [109]),
        .O(p_2_in__0[109]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][110]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[18]),
        .I3(\buf_data_reg[1]_0 [110]),
        .O(p_2_in__0[110]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][111]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[19]),
        .I3(\buf_data_reg[1]_0 [111]),
        .O(p_2_in__0[111]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][112]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[20]),
        .I3(\buf_data_reg[1]_0 [112]),
        .O(p_2_in__0[112]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][113]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[21]),
        .I3(\buf_data_reg[1]_0 [113]),
        .O(p_2_in__0[113]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][114]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[22]),
        .I3(\buf_data_reg[1]_0 [114]),
        .O(p_2_in__0[114]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][115]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[23]),
        .I3(\buf_data_reg[1]_0 [115]),
        .O(p_2_in__0[115]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][116]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[24]),
        .I3(\buf_data_reg[1]_0 [116]),
        .O(p_2_in__0[116]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][117]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[25]),
        .I3(\buf_data_reg[1]_0 [117]),
        .O(p_2_in__0[117]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][118]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[26]),
        .I3(\buf_data_reg[1]_0 [118]),
        .O(p_2_in__0[118]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][119]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[27]),
        .I3(\buf_data_reg[1]_0 [119]),
        .O(p_2_in__0[119]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][120]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[28]),
        .I3(\buf_data_reg[1]_0 [120]),
        .O(p_2_in__0[120]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][121]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[29]),
        .I3(\buf_data_reg[1]_0 [121]),
        .O(p_2_in__0[121]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][122]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[30]),
        .I3(\buf_data_reg[1]_0 [122]),
        .O(p_2_in__0[122]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][123]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[31]),
        .I3(\buf_data_reg[1]_0 [123]),
        .O(p_2_in__0[123]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][124]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[32]),
        .I3(\buf_data_reg[1]_0 [124]),
        .O(p_2_in__0[124]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][125]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[33]),
        .I3(\buf_data_reg[1]_0 [125]),
        .O(p_2_in__0[125]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][126]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[34]),
        .I3(\buf_data_reg[1]_0 [126]),
        .O(p_2_in__0[126]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][127]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[35]),
        .I3(\buf_data_reg[1]_0 [127]),
        .O(p_2_in__0[127]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][128]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[36]),
        .I3(\buf_data_reg[1]_0 [128]),
        .O(p_2_in__0[128]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][129]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[37]),
        .I3(\buf_data_reg[1]_0 [129]),
        .O(p_2_in__0[129]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][130]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[38]),
        .I3(\buf_data_reg[1]_0 [130]),
        .O(p_2_in__0[130]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][131]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[39]),
        .I3(\buf_data_reg[1]_0 [131]),
        .O(p_2_in__0[131]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][132]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[40]),
        .I3(\buf_data_reg[1]_0 [132]),
        .O(p_2_in__0[132]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][133]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[41]),
        .I3(\buf_data_reg[1]_0 [133]),
        .O(p_2_in__0[133]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][134]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[42]),
        .I3(\buf_data_reg[1]_0 [134]),
        .O(p_2_in__0[134]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][135]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[43]),
        .I3(\buf_data_reg[1]_0 [135]),
        .O(p_2_in__0[135]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][136]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[44]),
        .I3(\buf_data_reg[1]_0 [136]),
        .O(p_2_in__0[136]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][137]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[45]),
        .I3(\buf_data_reg[1]_0 [137]),
        .O(p_2_in__0[137]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][138]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[46]),
        .I3(\buf_data_reg[1]_0 [138]),
        .O(p_2_in__0[138]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][139]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[47]),
        .I3(\buf_data_reg[1]_0 [139]),
        .O(p_2_in__0[139]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][140]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[48]),
        .I3(\buf_data_reg[1]_0 [140]),
        .O(p_2_in__0[140]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][141]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[49]),
        .I3(\buf_data_reg[1]_0 [141]),
        .O(p_2_in__0[141]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][142]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[50]),
        .I3(\buf_data_reg[1]_0 [142]),
        .O(p_2_in__0[142]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][143]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[51]),
        .I3(\buf_data_reg[1]_0 [143]),
        .O(p_2_in__0[143]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][144]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[52]),
        .I3(\buf_data_reg[1]_0 [144]),
        .O(p_2_in__0[144]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][145]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[53]),
        .I3(\buf_data_reg[1]_0 [145]),
        .O(p_2_in__0[145]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][146]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[54]),
        .I3(\buf_data_reg[1]_0 [146]),
        .O(p_2_in__0[146]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][147]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[55]),
        .I3(\buf_data_reg[1]_0 [147]),
        .O(p_2_in__0[147]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][148]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[56]),
        .I3(\buf_data_reg[1]_0 [148]),
        .O(p_2_in__0[148]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][149]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[57]),
        .I3(\buf_data_reg[1]_0 [149]),
        .O(p_2_in__0[149]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][150]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[58]),
        .I3(\buf_data_reg[1]_0 [150]),
        .O(p_2_in__0[150]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][151]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[59]),
        .I3(\buf_data_reg[1]_0 [151]),
        .O(p_2_in__0[151]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][152]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[60]),
        .I3(\buf_data_reg[1]_0 [152]),
        .O(p_2_in__0[152]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][153]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[61]),
        .I3(\buf_data_reg[1]_0 [153]),
        .O(p_2_in__0[153]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][154]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[62]),
        .I3(\buf_data_reg[1]_0 [154]),
        .O(p_2_in__0[154]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][155]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[63]),
        .I3(\buf_data_reg[1]_0 [155]),
        .O(p_2_in__0[155]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][156]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[64]),
        .I3(\buf_data_reg[1]_0 [156]),
        .O(p_2_in__0[156]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][157]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[65]),
        .I3(\buf_data_reg[1]_0 [157]),
        .O(p_2_in__0[157]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][158]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[66]),
        .I3(\buf_data_reg[1]_0 [158]),
        .O(p_2_in__0[158]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][159]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[67]),
        .I3(\buf_data_reg[1]_0 [159]),
        .O(p_2_in__0[159]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][160]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[68]),
        .I3(\buf_data_reg[1]_0 [160]),
        .O(p_2_in__0[160]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][161]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[69]),
        .I3(\buf_data_reg[1]_0 [161]),
        .O(p_2_in__0[161]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][162]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[70]),
        .I3(\buf_data_reg[1]_0 [162]),
        .O(p_2_in__0[162]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][163]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[71]),
        .I3(\buf_data_reg[1]_0 [163]),
        .O(p_2_in__0[163]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][164]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[72]),
        .I3(\buf_data_reg[1]_0 [164]),
        .O(p_2_in__0[164]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][165]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[73]),
        .I3(\buf_data_reg[1]_0 [165]),
        .O(p_2_in__0[165]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][166]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[74]),
        .I3(\buf_data_reg[1]_0 [166]),
        .O(p_2_in__0[166]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][167]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[75]),
        .I3(\buf_data_reg[1]_0 [167]),
        .O(p_2_in__0[167]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][168]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[76]),
        .I3(\buf_data_reg[1]_0 [168]),
        .O(p_2_in__0[168]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][169]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[77]),
        .I3(\buf_data_reg[1]_0 [169]),
        .O(p_2_in__0[169]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][170]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[78]),
        .I3(\buf_data_reg[1]_0 [170]),
        .O(p_2_in__0[170]));
  (* SOFT_HLUTNM = "soft_lutpair494" *) 
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][171]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[79]),
        .I3(\buf_data_reg[1]_0 [171]),
        .O(p_2_in__0[171]));
  LUT4 #(
    .INIT(16'hF1A0)) 
    \buf_data[0][172]_i_1 
       (.I0(p_0_in),
        .I1(\buf_valid_reg_n_0_[0] ),
        .I2(cur_dtype_pxls1),
        .I3(s_axis_tvalid),
        .O(\buf_data[0][172]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair493" *) 
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][172]_i_2 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[80]),
        .I3(\buf_data_reg[1]_0 [172]),
        .O(p_2_in__0[172]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][4]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[0]),
        .I3(\buf_data_reg[1]_0 [4]),
        .O(p_2_in__0[4]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][5]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[1]),
        .I3(\buf_data_reg[1]_0 [5]),
        .O(p_2_in__0[5]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][68]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[2]),
        .I3(\buf_data_reg[1]_0 [68]),
        .O(p_2_in__0[68]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][69]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[3]),
        .I3(\buf_data_reg[1]_0 [69]),
        .O(p_2_in__0[69]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][70]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[4]),
        .I3(\buf_data_reg[1]_0 [70]),
        .O(p_2_in__0[70]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][71]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[5]),
        .I3(\buf_data_reg[1]_0 [71]),
        .O(p_2_in__0[71]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][72]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[6]),
        .I3(\buf_data_reg[1]_0 [72]),
        .O(p_2_in__0[72]));
  LUT4 #(
    .INIT(16'hF870)) 
    \buf_data[0][73]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(D[7]),
        .I3(\buf_data_reg[1]_0 [73]),
        .O(p_2_in__0[73]));
  LUT4 #(
    .INIT(16'h0008)) 
    \buf_data[1][172]_i_1 
       (.I0(\buf_valid_reg_n_0_[0] ),
        .I1(s_axis_tvalid),
        .I2(p_0_in),
        .I3(cur_dtype_pxls1),
        .O(\buf_data[1][172]_i_1_n_0 ));
  FDRE \buf_data_reg[0][100] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[100]),
        .Q(sband_tk[0]),
        .R(SR));
  FDRE \buf_data_reg[0][101] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[101]),
        .Q(sband_tk[1]),
        .R(SR));
  FDRE \buf_data_reg[0][102] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[102]),
        .Q(Q[6]),
        .R(SR));
  FDRE \buf_data_reg[0][103] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[103]),
        .Q(sband_tk[3]),
        .R(SR));
  FDRE \buf_data_reg[0][104] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[104]),
        .Q(sband_tk[4]),
        .R(SR));
  FDRE \buf_data_reg[0][105] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[105]),
        .Q(sband_tk[5]),
        .R(SR));
  FDRE \buf_data_reg[0][106] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[106]),
        .Q(sband_tk[6]),
        .R(SR));
  FDRE \buf_data_reg[0][107] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[107]),
        .Q(sband_tk[7]),
        .R(SR));
  FDRE \buf_data_reg[0][108] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[108]),
        .Q(Q[7]),
        .R(SR));
  FDRE \buf_data_reg[0][109] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[109]),
        .Q(Q[8]),
        .R(SR));
  FDRE \buf_data_reg[0][110] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[110]),
        .Q(Q[9]),
        .R(SR));
  FDRE \buf_data_reg[0][111] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[111]),
        .Q(Q[10]),
        .R(SR));
  FDRE \buf_data_reg[0][112] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[112]),
        .Q(Q[11]),
        .R(SR));
  FDRE \buf_data_reg[0][113] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[113]),
        .Q(Q[12]),
        .R(SR));
  FDRE \buf_data_reg[0][114] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[114]),
        .Q(Q[13]),
        .R(SR));
  FDRE \buf_data_reg[0][115] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[115]),
        .Q(Q[14]),
        .R(SR));
  FDRE \buf_data_reg[0][116] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[116]),
        .Q(Q[15]),
        .R(SR));
  FDRE \buf_data_reg[0][117] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[117]),
        .Q(Q[16]),
        .R(SR));
  FDRE \buf_data_reg[0][118] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[118]),
        .Q(Q[17]),
        .R(SR));
  FDRE \buf_data_reg[0][119] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[119]),
        .Q(Q[18]),
        .R(SR));
  FDRE \buf_data_reg[0][120] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[120]),
        .Q(Q[19]),
        .R(SR));
  FDRE \buf_data_reg[0][121] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[121]),
        .Q(Q[20]),
        .R(SR));
  FDRE \buf_data_reg[0][122] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[122]),
        .Q(Q[21]),
        .R(SR));
  FDRE \buf_data_reg[0][123] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[123]),
        .Q(Q[22]),
        .R(SR));
  FDRE \buf_data_reg[0][124] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[124]),
        .Q(sband_td[16]),
        .R(SR));
  FDRE \buf_data_reg[0][125] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[125]),
        .Q(sband_td[17]),
        .R(SR));
  FDRE \buf_data_reg[0][126] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[126]),
        .Q(sband_td[18]),
        .R(SR));
  FDRE \buf_data_reg[0][127] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[127]),
        .Q(sband_td[19]),
        .R(SR));
  FDRE \buf_data_reg[0][128] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[128]),
        .Q(sband_td[20]),
        .R(SR));
  FDRE \buf_data_reg[0][129] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[129]),
        .Q(sband_td[21]),
        .R(SR));
  FDRE \buf_data_reg[0][130] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[130]),
        .Q(sband_td[22]),
        .R(SR));
  FDRE \buf_data_reg[0][131] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[131]),
        .Q(sband_td[23]),
        .R(SR));
  FDRE \buf_data_reg[0][132] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[132]),
        .Q(sband_td[24]),
        .R(SR));
  FDRE \buf_data_reg[0][133] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[133]),
        .Q(sband_td[25]),
        .R(SR));
  FDRE \buf_data_reg[0][134] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[134]),
        .Q(sband_td[26]),
        .R(SR));
  FDRE \buf_data_reg[0][135] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[135]),
        .Q(sband_td[27]),
        .R(SR));
  FDRE \buf_data_reg[0][136] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[136]),
        .Q(sband_td[28]),
        .R(SR));
  FDRE \buf_data_reg[0][137] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[137]),
        .Q(sband_td[29]),
        .R(SR));
  FDRE \buf_data_reg[0][138] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[138]),
        .Q(sband_td[30]),
        .R(SR));
  FDRE \buf_data_reg[0][139] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[139]),
        .Q(sband_td[31]),
        .R(SR));
  FDRE \buf_data_reg[0][140] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[140]),
        .Q(sband_td[32]),
        .R(SR));
  FDRE \buf_data_reg[0][141] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[141]),
        .Q(sband_td[33]),
        .R(SR));
  FDRE \buf_data_reg[0][142] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[142]),
        .Q(sband_td[34]),
        .R(SR));
  FDRE \buf_data_reg[0][143] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[143]),
        .Q(sband_td[35]),
        .R(SR));
  FDRE \buf_data_reg[0][144] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[144]),
        .Q(sband_td[36]),
        .R(SR));
  FDRE \buf_data_reg[0][145] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[145]),
        .Q(sband_td[37]),
        .R(SR));
  FDRE \buf_data_reg[0][146] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[146]),
        .Q(sband_td[38]),
        .R(SR));
  FDRE \buf_data_reg[0][147] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[147]),
        .Q(sband_td[39]),
        .R(SR));
  FDRE \buf_data_reg[0][148] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[148]),
        .Q(sband_td[40]),
        .R(SR));
  FDRE \buf_data_reg[0][149] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[149]),
        .Q(sband_td[41]),
        .R(SR));
  FDRE \buf_data_reg[0][150] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[150]),
        .Q(sband_td[42]),
        .R(SR));
  FDRE \buf_data_reg[0][151] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[151]),
        .Q(sband_td[43]),
        .R(SR));
  FDRE \buf_data_reg[0][152] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[152]),
        .Q(sband_td[44]),
        .R(SR));
  FDRE \buf_data_reg[0][153] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[153]),
        .Q(sband_td[45]),
        .R(SR));
  FDRE \buf_data_reg[0][154] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[154]),
        .Q(sband_td[46]),
        .R(SR));
  FDRE \buf_data_reg[0][155] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[155]),
        .Q(sband_td[47]),
        .R(SR));
  FDRE \buf_data_reg[0][156] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[156]),
        .Q(sband_td[48]),
        .R(SR));
  FDRE \buf_data_reg[0][157] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[157]),
        .Q(sband_td[49]),
        .R(SR));
  FDRE \buf_data_reg[0][158] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[158]),
        .Q(sband_td[50]),
        .R(SR));
  FDRE \buf_data_reg[0][159] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[159]),
        .Q(sband_td[51]),
        .R(SR));
  FDRE \buf_data_reg[0][160] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[160]),
        .Q(sband_td[52]),
        .R(SR));
  FDRE \buf_data_reg[0][161] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[161]),
        .Q(sband_td[53]),
        .R(SR));
  FDRE \buf_data_reg[0][162] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[162]),
        .Q(sband_td[54]),
        .R(SR));
  FDRE \buf_data_reg[0][163] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[163]),
        .Q(sband_td[55]),
        .R(SR));
  FDRE \buf_data_reg[0][164] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[164]),
        .Q(sband_td[56]),
        .R(SR));
  FDRE \buf_data_reg[0][165] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[165]),
        .Q(sband_td[57]),
        .R(SR));
  FDRE \buf_data_reg[0][166] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[166]),
        .Q(sband_td[58]),
        .R(SR));
  FDRE \buf_data_reg[0][167] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[167]),
        .Q(sband_td[59]),
        .R(SR));
  FDRE \buf_data_reg[0][168] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[168]),
        .Q(sband_td[60]),
        .R(SR));
  FDRE \buf_data_reg[0][169] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[169]),
        .Q(sband_td[61]),
        .R(SR));
  FDRE \buf_data_reg[0][170] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[170]),
        .Q(sband_td[62]),
        .R(SR));
  FDRE \buf_data_reg[0][171] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[171]),
        .Q(sband_td[63]),
        .R(SR));
  FDRE \buf_data_reg[0][172] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[172]),
        .Q(s_axis_tlast_0),
        .R(SR));
  FDRE \buf_data_reg[0][4] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[4]),
        .Q(\buf_data_reg_n_0_[0][4] ),
        .R(SR));
  FDRE \buf_data_reg[0][5] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[5]),
        .Q(p_0_in39_in),
        .R(SR));
  FDRE \buf_data_reg[0][68] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[68]),
        .Q(Q[0]),
        .R(SR));
  FDRE \buf_data_reg[0][69] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[69]),
        .Q(Q[1]),
        .R(SR));
  FDRE \buf_data_reg[0][70] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[70]),
        .Q(Q[2]),
        .R(SR));
  FDRE \buf_data_reg[0][71] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[71]),
        .Q(Q[3]),
        .R(SR));
  FDRE \buf_data_reg[0][72] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[72]),
        .Q(Q[4]),
        .R(SR));
  FDRE \buf_data_reg[0][73] 
       (.C(vfb_clk),
        .CE(\buf_data[0][172]_i_1_n_0 ),
        .D(p_2_in__0[73]),
        .Q(Q[5]),
        .R(SR));
  FDRE \buf_data_reg[1][100] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[8]),
        .Q(\buf_data_reg[1]_0 [100]),
        .R(SR));
  FDRE \buf_data_reg[1][101] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[9]),
        .Q(\buf_data_reg[1]_0 [101]),
        .R(SR));
  FDRE \buf_data_reg[1][102] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[10]),
        .Q(\buf_data_reg[1]_0 [102]),
        .R(SR));
  FDRE \buf_data_reg[1][103] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[11]),
        .Q(\buf_data_reg[1]_0 [103]),
        .R(SR));
  FDRE \buf_data_reg[1][104] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[12]),
        .Q(\buf_data_reg[1]_0 [104]),
        .R(SR));
  FDRE \buf_data_reg[1][105] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[13]),
        .Q(\buf_data_reg[1]_0 [105]),
        .R(SR));
  FDRE \buf_data_reg[1][106] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[14]),
        .Q(\buf_data_reg[1]_0 [106]),
        .R(SR));
  FDRE \buf_data_reg[1][107] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[15]),
        .Q(\buf_data_reg[1]_0 [107]),
        .R(SR));
  FDRE \buf_data_reg[1][108] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[16]),
        .Q(\buf_data_reg[1]_0 [108]),
        .R(SR));
  FDRE \buf_data_reg[1][109] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[17]),
        .Q(\buf_data_reg[1]_0 [109]),
        .R(SR));
  FDRE \buf_data_reg[1][110] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[18]),
        .Q(\buf_data_reg[1]_0 [110]),
        .R(SR));
  FDRE \buf_data_reg[1][111] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[19]),
        .Q(\buf_data_reg[1]_0 [111]),
        .R(SR));
  FDRE \buf_data_reg[1][112] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[20]),
        .Q(\buf_data_reg[1]_0 [112]),
        .R(SR));
  FDRE \buf_data_reg[1][113] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[21]),
        .Q(\buf_data_reg[1]_0 [113]),
        .R(SR));
  FDRE \buf_data_reg[1][114] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[22]),
        .Q(\buf_data_reg[1]_0 [114]),
        .R(SR));
  FDRE \buf_data_reg[1][115] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[23]),
        .Q(\buf_data_reg[1]_0 [115]),
        .R(SR));
  FDRE \buf_data_reg[1][116] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[24]),
        .Q(\buf_data_reg[1]_0 [116]),
        .R(SR));
  FDRE \buf_data_reg[1][117] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[25]),
        .Q(\buf_data_reg[1]_0 [117]),
        .R(SR));
  FDRE \buf_data_reg[1][118] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[26]),
        .Q(\buf_data_reg[1]_0 [118]),
        .R(SR));
  FDRE \buf_data_reg[1][119] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[27]),
        .Q(\buf_data_reg[1]_0 [119]),
        .R(SR));
  FDRE \buf_data_reg[1][120] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[28]),
        .Q(\buf_data_reg[1]_0 [120]),
        .R(SR));
  FDRE \buf_data_reg[1][121] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[29]),
        .Q(\buf_data_reg[1]_0 [121]),
        .R(SR));
  FDRE \buf_data_reg[1][122] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[30]),
        .Q(\buf_data_reg[1]_0 [122]),
        .R(SR));
  FDRE \buf_data_reg[1][123] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[31]),
        .Q(\buf_data_reg[1]_0 [123]),
        .R(SR));
  FDRE \buf_data_reg[1][124] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[32]),
        .Q(\buf_data_reg[1]_0 [124]),
        .R(SR));
  FDRE \buf_data_reg[1][125] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[33]),
        .Q(\buf_data_reg[1]_0 [125]),
        .R(SR));
  FDRE \buf_data_reg[1][126] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[34]),
        .Q(\buf_data_reg[1]_0 [126]),
        .R(SR));
  FDRE \buf_data_reg[1][127] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[35]),
        .Q(\buf_data_reg[1]_0 [127]),
        .R(SR));
  FDRE \buf_data_reg[1][128] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[36]),
        .Q(\buf_data_reg[1]_0 [128]),
        .R(SR));
  FDRE \buf_data_reg[1][129] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[37]),
        .Q(\buf_data_reg[1]_0 [129]),
        .R(SR));
  FDRE \buf_data_reg[1][130] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[38]),
        .Q(\buf_data_reg[1]_0 [130]),
        .R(SR));
  FDRE \buf_data_reg[1][131] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[39]),
        .Q(\buf_data_reg[1]_0 [131]),
        .R(SR));
  FDRE \buf_data_reg[1][132] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[40]),
        .Q(\buf_data_reg[1]_0 [132]),
        .R(SR));
  FDRE \buf_data_reg[1][133] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[41]),
        .Q(\buf_data_reg[1]_0 [133]),
        .R(SR));
  FDRE \buf_data_reg[1][134] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[42]),
        .Q(\buf_data_reg[1]_0 [134]),
        .R(SR));
  FDRE \buf_data_reg[1][135] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[43]),
        .Q(\buf_data_reg[1]_0 [135]),
        .R(SR));
  FDRE \buf_data_reg[1][136] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[44]),
        .Q(\buf_data_reg[1]_0 [136]),
        .R(SR));
  FDRE \buf_data_reg[1][137] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[45]),
        .Q(\buf_data_reg[1]_0 [137]),
        .R(SR));
  FDRE \buf_data_reg[1][138] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[46]),
        .Q(\buf_data_reg[1]_0 [138]),
        .R(SR));
  FDRE \buf_data_reg[1][139] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[47]),
        .Q(\buf_data_reg[1]_0 [139]),
        .R(SR));
  FDRE \buf_data_reg[1][140] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[48]),
        .Q(\buf_data_reg[1]_0 [140]),
        .R(SR));
  FDRE \buf_data_reg[1][141] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[49]),
        .Q(\buf_data_reg[1]_0 [141]),
        .R(SR));
  FDRE \buf_data_reg[1][142] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[50]),
        .Q(\buf_data_reg[1]_0 [142]),
        .R(SR));
  FDRE \buf_data_reg[1][143] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[51]),
        .Q(\buf_data_reg[1]_0 [143]),
        .R(SR));
  FDRE \buf_data_reg[1][144] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[52]),
        .Q(\buf_data_reg[1]_0 [144]),
        .R(SR));
  FDRE \buf_data_reg[1][145] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[53]),
        .Q(\buf_data_reg[1]_0 [145]),
        .R(SR));
  FDRE \buf_data_reg[1][146] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[54]),
        .Q(\buf_data_reg[1]_0 [146]),
        .R(SR));
  FDRE \buf_data_reg[1][147] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[55]),
        .Q(\buf_data_reg[1]_0 [147]),
        .R(SR));
  FDRE \buf_data_reg[1][148] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[56]),
        .Q(\buf_data_reg[1]_0 [148]),
        .R(SR));
  FDRE \buf_data_reg[1][149] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[57]),
        .Q(\buf_data_reg[1]_0 [149]),
        .R(SR));
  FDRE \buf_data_reg[1][150] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[58]),
        .Q(\buf_data_reg[1]_0 [150]),
        .R(SR));
  FDRE \buf_data_reg[1][151] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[59]),
        .Q(\buf_data_reg[1]_0 [151]),
        .R(SR));
  FDRE \buf_data_reg[1][152] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[60]),
        .Q(\buf_data_reg[1]_0 [152]),
        .R(SR));
  FDRE \buf_data_reg[1][153] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[61]),
        .Q(\buf_data_reg[1]_0 [153]),
        .R(SR));
  FDRE \buf_data_reg[1][154] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[62]),
        .Q(\buf_data_reg[1]_0 [154]),
        .R(SR));
  FDRE \buf_data_reg[1][155] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[63]),
        .Q(\buf_data_reg[1]_0 [155]),
        .R(SR));
  FDRE \buf_data_reg[1][156] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[64]),
        .Q(\buf_data_reg[1]_0 [156]),
        .R(SR));
  FDRE \buf_data_reg[1][157] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[65]),
        .Q(\buf_data_reg[1]_0 [157]),
        .R(SR));
  FDRE \buf_data_reg[1][158] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[66]),
        .Q(\buf_data_reg[1]_0 [158]),
        .R(SR));
  FDRE \buf_data_reg[1][159] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[67]),
        .Q(\buf_data_reg[1]_0 [159]),
        .R(SR));
  FDRE \buf_data_reg[1][160] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[68]),
        .Q(\buf_data_reg[1]_0 [160]),
        .R(SR));
  FDRE \buf_data_reg[1][161] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[69]),
        .Q(\buf_data_reg[1]_0 [161]),
        .R(SR));
  FDRE \buf_data_reg[1][162] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[70]),
        .Q(\buf_data_reg[1]_0 [162]),
        .R(SR));
  FDRE \buf_data_reg[1][163] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[71]),
        .Q(\buf_data_reg[1]_0 [163]),
        .R(SR));
  FDRE \buf_data_reg[1][164] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[72]),
        .Q(\buf_data_reg[1]_0 [164]),
        .R(SR));
  FDRE \buf_data_reg[1][165] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[73]),
        .Q(\buf_data_reg[1]_0 [165]),
        .R(SR));
  FDRE \buf_data_reg[1][166] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[74]),
        .Q(\buf_data_reg[1]_0 [166]),
        .R(SR));
  FDRE \buf_data_reg[1][167] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[75]),
        .Q(\buf_data_reg[1]_0 [167]),
        .R(SR));
  FDRE \buf_data_reg[1][168] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[76]),
        .Q(\buf_data_reg[1]_0 [168]),
        .R(SR));
  FDRE \buf_data_reg[1][169] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[77]),
        .Q(\buf_data_reg[1]_0 [169]),
        .R(SR));
  FDRE \buf_data_reg[1][170] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[78]),
        .Q(\buf_data_reg[1]_0 [170]),
        .R(SR));
  FDRE \buf_data_reg[1][171] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[79]),
        .Q(\buf_data_reg[1]_0 [171]),
        .R(SR));
  FDRE \buf_data_reg[1][172] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[80]),
        .Q(\buf_data_reg[1]_0 [172]),
        .R(SR));
  FDRE \buf_data_reg[1][4] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[0]),
        .Q(\buf_data_reg[1]_0 [4]),
        .R(SR));
  FDRE \buf_data_reg[1][5] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[1]),
        .Q(\buf_data_reg[1]_0 [5]),
        .R(SR));
  FDRE \buf_data_reg[1][68] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[2]),
        .Q(\buf_data_reg[1]_0 [68]),
        .R(SR));
  FDRE \buf_data_reg[1][69] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[3]),
        .Q(\buf_data_reg[1]_0 [69]),
        .R(SR));
  FDRE \buf_data_reg[1][70] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[4]),
        .Q(\buf_data_reg[1]_0 [70]),
        .R(SR));
  FDRE \buf_data_reg[1][71] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[5]),
        .Q(\buf_data_reg[1]_0 [71]),
        .R(SR));
  FDRE \buf_data_reg[1][72] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[6]),
        .Q(\buf_data_reg[1]_0 [72]),
        .R(SR));
  FDRE \buf_data_reg[1][73] 
       (.C(vfb_clk),
        .CE(\buf_data[1][172]_i_1_n_0 ),
        .D(D[7]),
        .Q(\buf_data_reg[1]_0 [73]),
        .R(SR));
  (* SOFT_HLUTNM = "soft_lutpair495" *) 
  LUT4 #(
    .INIT(16'hFDB8)) 
    \buf_valid[0]_i_1 
       (.I0(cur_dtype_pxls1),
        .I1(p_0_in),
        .I2(s_axis_tvalid),
        .I3(\buf_valid_reg_n_0_[0] ),
        .O(\buf_valid[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair495" *) 
  LUT4 #(
    .INIT(16'h00F8)) 
    \buf_valid[1]_i_1 
       (.I0(\buf_valid_reg_n_0_[0] ),
        .I1(s_axis_tvalid),
        .I2(p_0_in),
        .I3(cur_dtype_pxls1),
        .O(\buf_valid[1]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hFFFFF88800000000)) 
    \buf_valid[1]_i_2 
       (.I0(\buf_valid_reg[1]_1 ),
        .I1(sband_tl_r_reg),
        .I2(buff_tr141_in),
        .I3(\buf_valid[1]_i_4_n_0 ),
        .I4(cur_dtype_sink_reg_n_0),
        .I5(\buf_valid_reg_n_0_[0] ),
        .O(cur_dtype_pxls1));
  (* SOFT_HLUTNM = "soft_lutpair525" *) 
  LUT3 #(
    .INIT(8'h10)) 
    \buf_valid[1]_i_4 
       (.I0(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .I1(\REQ_BUFFER_RAW12.filt_tl_on ),
        .I2(cur_dtype_pxls),
        .O(\buf_valid[1]_i_4_n_0 ));
  FDRE \buf_valid_reg[0] 
       (.C(vfb_clk),
        .CE(1'b1),
        .D(\buf_valid[0]_i_1_n_0 ),
        .Q(\buf_valid_reg_n_0_[0] ),
        .R(SR));
  FDRE \buf_valid_reg[1] 
       (.C(vfb_clk),
        .CE(1'b1),
        .D(\buf_valid[1]_i_1_n_0 ),
        .Q(p_0_in),
        .R(SR));
  LUT2 #(
    .INIT(4'hB)) 
    cur_dtype_pxls_i_1
       (.I0(sband_tl),
        .I1(vfb_arstn),
        .O(cur_dtype_sink));
  (* SOFT_HLUTNM = "soft_lutpair526" *) 
  LUT2 #(
    .INIT(4'hE)) 
    cur_dtype_pxls_i_2
       (.I0(cur_dtype_pxls0),
        .I1(cur_dtype_pxls),
        .O(cur_dtype_pxls_i_2_n_0));
  LUT6 #(
    .INIT(64'h0008000000000000)) 
    cur_dtype_pxls_i_3
       (.I0(Q[3]),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(cur_dtype_pxls_i_4_n_0),
        .I5(\buf_valid_reg_n_0_[0] ),
        .O(cur_dtype_pxls0));
  LUT2 #(
    .INIT(4'h2)) 
    cur_dtype_pxls_i_4
       (.I0(Q[5]),
        .I1(Q[4]),
        .O(cur_dtype_pxls_i_4_n_0));
  FDRE cur_dtype_pxls_reg
       (.C(vfb_clk),
        .CE(1'b1),
        .D(cur_dtype_pxls_i_2_n_0),
        .Q(cur_dtype_pxls),
        .R(cur_dtype_sink));
  LUT4 #(
    .INIT(16'hFF04)) 
    cur_dtype_sink_i_1
       (.I0(sban_dtvc),
        .I1(\buf_valid_reg_n_0_[0] ),
        .I2(main_dtvc__4),
        .I3(cur_dtype_sink_reg_n_0),
        .O(cur_dtype_sink_i_1_n_0));
  LUT6 #(
    .INIT(64'h0000000800000000)) 
    cur_dtype_sink_i_2
       (.I0(Q[2]),
        .I1(Q[3]),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[4]),
        .I5(Q[5]),
        .O(main_dtvc__4));
  FDRE cur_dtype_sink_reg
       (.C(vfb_clk),
        .CE(1'b1),
        .D(cur_dtype_sink_i_1_n_0),
        .Q(cur_dtype_sink_reg_n_0),
        .R(cur_dtype_sink));
  (* SOFT_HLUTNM = "soft_lutpair496" *) 
  LUT3 #(
    .INIT(8'hF8)) 
    cur_dtype_udef_i_1
       (.I0(sban_dtvc),
        .I1(\buf_valid_reg_n_0_[0] ),
        .I2(cur_dtype_udef),
        .O(cur_dtype_udef_i_1_n_0));
  LUT6 #(
    .INIT(64'h0000020088888888)) 
    cur_dtype_udef_i_2
       (.I0(Q[5]),
        .I1(Q[4]),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(Q[2]),
        .I5(Q[3]),
        .O(sban_dtvc));
  FDRE cur_dtype_udef_reg
       (.C(vfb_clk),
        .CE(1'b1),
        .D(cur_dtype_udef_i_1_n_0),
        .Q(cur_dtype_udef),
        .R(cur_dtype_sink));
  (* SOFT_HLUTNM = "soft_lutpair494" *) 
  LUT1 #(
    .INIT(2'h1)) 
    s_axis_tready_INST_0
       (.I0(p_0_in),
        .O(\buf_valid_reg[1]_0 ));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[0]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [48]),
        .I1(\REQ_BUFFER_RAW12.res_data [32]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[16] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[0] ),
        .O(buff_td[16]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[10]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [38]),
        .I1(\REQ_BUFFER_RAW12.res_data [22]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[6] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [54]),
        .O(buff_td[6]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[11]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [39]),
        .I1(\REQ_BUFFER_RAW12.res_data [23]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[7] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [55]),
        .O(buff_td[7]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[16]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [52]),
        .I1(\REQ_BUFFER_RAW12.res_data [36]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[20] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[4] ),
        .O(buff_td[20]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[17]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [53]),
        .I1(\REQ_BUFFER_RAW12.res_data [37]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[21] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[5] ),
        .O(buff_td[21]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[18]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [54]),
        .I1(\REQ_BUFFER_RAW12.res_data [38]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[22] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[6] ),
        .O(buff_td[22]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[19]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [55]),
        .I1(\REQ_BUFFER_RAW12.res_data [39]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[23] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[7] ),
        .O(buff_td[23]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[1]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [49]),
        .I1(\REQ_BUFFER_RAW12.res_data [33]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[17] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[1] ),
        .O(buff_td[17]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[20]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [40]),
        .I1(\REQ_BUFFER_RAW12.res_data [24]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[8] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [56]),
        .O(buff_td[8]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[21]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [41]),
        .I1(\REQ_BUFFER_RAW12.res_data [25]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[9] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [57]),
        .O(buff_td[9]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[22]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [42]),
        .I1(\REQ_BUFFER_RAW12.res_data [26]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[10] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [58]),
        .O(buff_td[10]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[23]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [43]),
        .I1(\REQ_BUFFER_RAW12.res_data [27]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[11] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [59]),
        .O(buff_td[11]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[24]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [44]),
        .I1(\REQ_BUFFER_RAW12.res_data [28]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[12] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [60]),
        .O(buff_td[12]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[25]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [45]),
        .I1(\REQ_BUFFER_RAW12.res_data [29]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[13] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [61]),
        .O(buff_td[13]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[26]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [46]),
        .I1(\REQ_BUFFER_RAW12.res_data [30]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[14] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [62]),
        .O(buff_td[14]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[27]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [47]),
        .I1(\REQ_BUFFER_RAW12.res_data [31]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[15] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [63]),
        .O(buff_td[15]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[2]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [50]),
        .I1(\REQ_BUFFER_RAW12.res_data [34]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[18] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[2] ),
        .O(buff_td[18]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[32]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[8] ),
        .I1(\REQ_BUFFER_RAW12.res_data [56]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[40] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[24] ),
        .O(buff_td[40]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[33]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[9] ),
        .I1(\REQ_BUFFER_RAW12.res_data [57]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[41] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[25] ),
        .O(buff_td[41]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[34]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[10] ),
        .I1(\REQ_BUFFER_RAW12.res_data [58]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[42] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[26] ),
        .O(buff_td[42]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[35]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[11] ),
        .I1(\REQ_BUFFER_RAW12.res_data [59]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[43] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[27] ),
        .O(buff_td[43]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[36]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [56]),
        .I1(\REQ_BUFFER_RAW12.res_data [40]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[24] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[8] ),
        .O(buff_td[24]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[37]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [57]),
        .I1(\REQ_BUFFER_RAW12.res_data [41]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[25] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[9] ),
        .O(buff_td[25]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[38]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [58]),
        .I1(\REQ_BUFFER_RAW12.res_data [42]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[26] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[10] ),
        .O(buff_td[26]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[39]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [59]),
        .I1(\REQ_BUFFER_RAW12.res_data [43]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[27] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[11] ),
        .O(buff_td[27]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[3]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [51]),
        .I1(\REQ_BUFFER_RAW12.res_data [35]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[19] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[3] ),
        .O(buff_td[19]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[40]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [60]),
        .I1(\REQ_BUFFER_RAW12.res_data [44]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[28] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[12] ),
        .O(buff_td[28]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[41]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [61]),
        .I1(\REQ_BUFFER_RAW12.res_data [45]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[29] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[13] ),
        .O(buff_td[29]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[42]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [62]),
        .I1(\REQ_BUFFER_RAW12.res_data [46]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[30] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[14] ),
        .O(buff_td[30]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[43]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [63]),
        .I1(\REQ_BUFFER_RAW12.res_data [47]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[31] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[15] ),
        .O(buff_td[31]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[48]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[12] ),
        .I1(\REQ_BUFFER_RAW12.res_data [60]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[44] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[28] ),
        .O(buff_td[44]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[49]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[13] ),
        .I1(\REQ_BUFFER_RAW12.res_data [61]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[45] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[29] ),
        .O(buff_td[45]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[4]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [32]),
        .I1(\REQ_BUFFER_RAW12.res_data [16]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[0] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [48]),
        .O(buff_td[0]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[50]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[14] ),
        .I1(\REQ_BUFFER_RAW12.res_data [62]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[46] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[30] ),
        .O(buff_td[46]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[51]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[15] ),
        .I1(\REQ_BUFFER_RAW12.res_data [63]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[47] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[31] ),
        .O(buff_td[47]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[52]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[0] ),
        .I1(\REQ_BUFFER_RAW12.res_data [48]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[32] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[16] ),
        .O(buff_td[32]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[53]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[1] ),
        .I1(\REQ_BUFFER_RAW12.res_data [49]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[33] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[17] ),
        .O(buff_td[33]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[54]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[2] ),
        .I1(\REQ_BUFFER_RAW12.res_data [50]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[34] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[18] ),
        .O(buff_td[34]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[55]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[3] ),
        .I1(\REQ_BUFFER_RAW12.res_data [51]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[35] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[19] ),
        .O(buff_td[35]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[56]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[4] ),
        .I1(\REQ_BUFFER_RAW12.res_data [52]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[36] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[20] ),
        .O(buff_td[36]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[57]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[5] ),
        .I1(\REQ_BUFFER_RAW12.res_data [53]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[37] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[21] ),
        .O(buff_td[37]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[58]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[6] ),
        .I1(\REQ_BUFFER_RAW12.res_data [54]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[38] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[22] ),
        .O(buff_td[38]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[59]_i_1 
       (.I0(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[7] ),
        .I1(\REQ_BUFFER_RAW12.res_data [55]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[39] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[23] ),
        .O(buff_td[39]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[5]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [33]),
        .I1(\REQ_BUFFER_RAW12.res_data [17]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[1] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [49]),
        .O(buff_td[1]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[6]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [34]),
        .I1(\REQ_BUFFER_RAW12.res_data [18]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[2] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [50]),
        .O(buff_td[2]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[7]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [35]),
        .I1(\REQ_BUFFER_RAW12.res_data [19]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[3] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [51]),
        .O(buff_td[3]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[8]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [36]),
        .I1(\REQ_BUFFER_RAW12.res_data [20]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[4] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [52]),
        .O(buff_td[4]));
  LUT6 #(
    .INIT(64'hCCFFAAF0CC00AAF0)) 
    \s_fifo_td[9]_i_1 
       (.I0(\REQ_BUFFER_RAW12.res_data [37]),
        .I1(\REQ_BUFFER_RAW12.res_data [21]),
        .I2(\REQ_BUFFER_RAW12.cur_data_reg_n_0_[5] ),
        .I3(\REQ_BUFFER_RAW12.indx_cntr [1]),
        .I4(\REQ_BUFFER_RAW12.indx_cntr [0]),
        .I5(\REQ_BUFFER_RAW12.res_data [53]),
        .O(buff_td[5]));
  FDRE \s_fifo_td_reg[0] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[16]),
        .Q(\s_fifo_td_reg[59]_0 [0]),
        .R(SR));
  FDRE \s_fifo_td_reg[10] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[6]),
        .Q(\s_fifo_td_reg[59]_0 [10]),
        .R(SR));
  FDRE \s_fifo_td_reg[11] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[7]),
        .Q(\s_fifo_td_reg[59]_0 [11]),
        .R(SR));
  FDRE \s_fifo_td_reg[16] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[20]),
        .Q(\s_fifo_td_reg[59]_0 [12]),
        .R(SR));
  FDRE \s_fifo_td_reg[17] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[21]),
        .Q(\s_fifo_td_reg[59]_0 [13]),
        .R(SR));
  FDRE \s_fifo_td_reg[18] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[22]),
        .Q(\s_fifo_td_reg[59]_0 [14]),
        .R(SR));
  FDRE \s_fifo_td_reg[19] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[23]),
        .Q(\s_fifo_td_reg[59]_0 [15]),
        .R(SR));
  FDRE \s_fifo_td_reg[1] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[17]),
        .Q(\s_fifo_td_reg[59]_0 [1]),
        .R(SR));
  FDRE \s_fifo_td_reg[20] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[8]),
        .Q(\s_fifo_td_reg[59]_0 [16]),
        .R(SR));
  FDRE \s_fifo_td_reg[21] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[9]),
        .Q(\s_fifo_td_reg[59]_0 [17]),
        .R(SR));
  FDRE \s_fifo_td_reg[22] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[10]),
        .Q(\s_fifo_td_reg[59]_0 [18]),
        .R(SR));
  FDRE \s_fifo_td_reg[23] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[11]),
        .Q(\s_fifo_td_reg[59]_0 [19]),
        .R(SR));
  FDRE \s_fifo_td_reg[24] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[12]),
        .Q(\s_fifo_td_reg[59]_0 [20]),
        .R(SR));
  FDRE \s_fifo_td_reg[25] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[13]),
        .Q(\s_fifo_td_reg[59]_0 [21]),
        .R(SR));
  FDRE \s_fifo_td_reg[26] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[14]),
        .Q(\s_fifo_td_reg[59]_0 [22]),
        .R(SR));
  FDRE \s_fifo_td_reg[27] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[15]),
        .Q(\s_fifo_td_reg[59]_0 [23]),
        .R(SR));
  FDRE \s_fifo_td_reg[2] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[18]),
        .Q(\s_fifo_td_reg[59]_0 [2]),
        .R(SR));
  FDRE \s_fifo_td_reg[32] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[40]),
        .Q(\s_fifo_td_reg[59]_0 [24]),
        .R(SR));
  FDRE \s_fifo_td_reg[33] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[41]),
        .Q(\s_fifo_td_reg[59]_0 [25]),
        .R(SR));
  FDRE \s_fifo_td_reg[34] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[42]),
        .Q(\s_fifo_td_reg[59]_0 [26]),
        .R(SR));
  FDRE \s_fifo_td_reg[35] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[43]),
        .Q(\s_fifo_td_reg[59]_0 [27]),
        .R(SR));
  FDRE \s_fifo_td_reg[36] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[24]),
        .Q(\s_fifo_td_reg[59]_0 [28]),
        .R(SR));
  FDRE \s_fifo_td_reg[37] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[25]),
        .Q(\s_fifo_td_reg[59]_0 [29]),
        .R(SR));
  FDRE \s_fifo_td_reg[38] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[26]),
        .Q(\s_fifo_td_reg[59]_0 [30]),
        .R(SR));
  FDRE \s_fifo_td_reg[39] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[27]),
        .Q(\s_fifo_td_reg[59]_0 [31]),
        .R(SR));
  FDRE \s_fifo_td_reg[3] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[19]),
        .Q(\s_fifo_td_reg[59]_0 [3]),
        .R(SR));
  FDRE \s_fifo_td_reg[40] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[28]),
        .Q(\s_fifo_td_reg[59]_0 [32]),
        .R(SR));
  FDRE \s_fifo_td_reg[41] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[29]),
        .Q(\s_fifo_td_reg[59]_0 [33]),
        .R(SR));
  FDRE \s_fifo_td_reg[42] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[30]),
        .Q(\s_fifo_td_reg[59]_0 [34]),
        .R(SR));
  FDRE \s_fifo_td_reg[43] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[31]),
        .Q(\s_fifo_td_reg[59]_0 [35]),
        .R(SR));
  FDRE \s_fifo_td_reg[48] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[44]),
        .Q(\s_fifo_td_reg[59]_0 [36]),
        .R(SR));
  FDRE \s_fifo_td_reg[49] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[45]),
        .Q(\s_fifo_td_reg[59]_0 [37]),
        .R(SR));
  FDRE \s_fifo_td_reg[4] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[0]),
        .Q(\s_fifo_td_reg[59]_0 [4]),
        .R(SR));
  FDRE \s_fifo_td_reg[50] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[46]),
        .Q(\s_fifo_td_reg[59]_0 [38]),
        .R(SR));
  FDRE \s_fifo_td_reg[51] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[47]),
        .Q(\s_fifo_td_reg[59]_0 [39]),
        .R(SR));
  FDRE \s_fifo_td_reg[52] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[32]),
        .Q(\s_fifo_td_reg[59]_0 [40]),
        .R(SR));
  FDRE \s_fifo_td_reg[53] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[33]),
        .Q(\s_fifo_td_reg[59]_0 [41]),
        .R(SR));
  FDRE \s_fifo_td_reg[54] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[34]),
        .Q(\s_fifo_td_reg[59]_0 [42]),
        .R(SR));
  FDRE \s_fifo_td_reg[55] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[35]),
        .Q(\s_fifo_td_reg[59]_0 [43]),
        .R(SR));
  FDRE \s_fifo_td_reg[56] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[36]),
        .Q(\s_fifo_td_reg[59]_0 [44]),
        .R(SR));
  FDRE \s_fifo_td_reg[57] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[37]),
        .Q(\s_fifo_td_reg[59]_0 [45]),
        .R(SR));
  FDRE \s_fifo_td_reg[58] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[38]),
        .Q(\s_fifo_td_reg[59]_0 [46]),
        .R(SR));
  FDRE \s_fifo_td_reg[59] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[39]),
        .Q(\s_fifo_td_reg[59]_0 [47]),
        .R(SR));
  FDRE \s_fifo_td_reg[5] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[1]),
        .Q(\s_fifo_td_reg[59]_0 [5]),
        .R(SR));
  FDRE \s_fifo_td_reg[6] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[2]),
        .Q(\s_fifo_td_reg[59]_0 [6]),
        .R(SR));
  FDRE \s_fifo_td_reg[7] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[3]),
        .Q(\s_fifo_td_reg[59]_0 [7]),
        .R(SR));
  FDRE \s_fifo_td_reg[8] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[4]),
        .Q(\s_fifo_td_reg[59]_0 [8]),
        .R(SR));
  FDRE \s_fifo_td_reg[9] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(buff_td[5]),
        .Q(\s_fifo_td_reg[59]_0 [9]),
        .R(SR));
  FDRE \s_fifo_tid_reg[4] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[4] ),
        .Q(\s_fifo_tid_reg[9]_0 [0]),
        .R(SR));
  FDRE \s_fifo_tid_reg[5] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[5] ),
        .Q(\s_fifo_tid_reg[9]_0 [1]),
        .R(SR));
  FDRE \s_fifo_tid_reg[6] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[6] ),
        .Q(\s_fifo_tid_reg[9]_0 [2]),
        .R(SR));
  FDRE \s_fifo_tid_reg[7] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[7] ),
        .Q(\s_fifo_tid_reg[9]_0 [3]),
        .R(SR));
  FDRE \s_fifo_tid_reg[8] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[8] ),
        .Q(\s_fifo_tid_reg[9]_0 [4]),
        .R(SR));
  FDRE \s_fifo_tid_reg[9] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.buff_ts_i_reg_n_0_[9] ),
        .Q(\s_fifo_tid_reg[9]_0 [5]),
        .R(SR));
  LUT6 #(
    .INIT(64'hCC8C888800808888)) 
    \s_fifo_tk[7]_i_1 
       (.I0(s_axis_tkeep),
        .I1(vfb_arstn),
        .I2(s_fifo_tv),
        .I3(s_axis_tready),
        .I4(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I5(\s_fifo_tk[7]_i_2_n_0 ),
        .O(\s_fifo_tk[7]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h7)) 
    \s_fifo_tk[7]_i_2 
       (.I0(\REQ_REORDER_RAW12.tk_partial_i1__2 ),
        .I1(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .O(\s_fifo_tk[7]_i_2_n_0 ));
  LUT6 #(
    .INIT(64'hA00000000000E00C)) 
    \s_fifo_tk[7]_i_3 
       (.I0(\s_fifo_tk[7]_i_4_n_0 ),
        .I1(\s_fifo_tk[7]_i_5_n_0 ),
        .I2(\REQ_BUFFER_RAW12.buff_tk_i [1]),
        .I3(\REQ_BUFFER_RAW12.buff_tk_i [2]),
        .I4(\REQ_BUFFER_RAW12.buff_tk_i [6]),
        .I5(\REQ_BUFFER_RAW12.buff_tk_i [5]),
        .O(\REQ_REORDER_RAW12.tk_partial_i1__2 ));
  (* SOFT_HLUTNM = "soft_lutpair499" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \s_fifo_tk[7]_i_4 
       (.I0(\REQ_BUFFER_RAW12.buff_tk_i [3]),
        .I1(\REQ_BUFFER_RAW12.buff_tk_i [0]),
        .I2(\REQ_BUFFER_RAW12.buff_tk_i [7]),
        .I3(\REQ_BUFFER_RAW12.buff_tk_i [4]),
        .O(\s_fifo_tk[7]_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair499" *) 
  LUT4 #(
    .INIT(16'h0004)) 
    \s_fifo_tk[7]_i_5 
       (.I0(\REQ_BUFFER_RAW12.buff_tk_i [3]),
        .I1(\REQ_BUFFER_RAW12.buff_tk_i [0]),
        .I2(\REQ_BUFFER_RAW12.buff_tk_i [7]),
        .I3(\REQ_BUFFER_RAW12.buff_tk_i [4]),
        .O(\s_fifo_tk[7]_i_5_n_0 ));
  FDRE \s_fifo_tk_reg[7] 
       (.C(vfb_clk),
        .CE(1'b1),
        .D(\s_fifo_tk[7]_i_1_n_0 ),
        .Q(s_axis_tkeep),
        .R(1'b0));
  LUT6 #(
    .INIT(64'hA0C0A0A000C00000)) 
    s_fifo_tl_i_1
       (.I0(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .I1(s_axis_tlast),
        .I2(vfb_arstn),
        .I3(s_axis_tready),
        .I4(s_fifo_tv),
        .I5(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .O(s_fifo_tl_i_1_n_0));
  FDRE s_fifo_tl_reg
       (.C(vfb_clk),
        .CE(1'b1),
        .D(s_fifo_tl_i_1_n_0),
        .Q(s_axis_tlast),
        .R(1'b0));
  FDRE \s_fifo_tu_reg[76] 
       (.C(vfb_clk),
        .CE(\REQ_BUFFER_RAW12.indx_cntr0 ),
        .D(\REQ_BUFFER_RAW12.buff_tu_i ),
        .Q(s_axis_tuser),
        .R(SR));
  LUT3 #(
    .INIT(8'hBA)) 
    s_fifo_tv_i_1
       (.I0(\REQ_BUFFER_RAW12.buff_tv_i_reg_n_0 ),
        .I1(s_axis_tready),
        .I2(s_fifo_tv),
        .O(s_fifo_tv_i_1_n_0));
  FDRE s_fifo_tv_reg
       (.C(vfb_clk),
        .CE(1'b1),
        .D(s_fifo_tv_i_1_n_0),
        .Q(s_fifo_tv),
        .R(SR));
  (* SOFT_HLUTNM = "soft_lutpair524" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[0]_i_1 
       (.I0(sband_td[16]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [0]),
        .O(\buf_data_reg[0][171]_0 [0]));
  (* SOFT_HLUTNM = "soft_lutpair519" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[10]_i_1 
       (.I0(sband_td[26]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [10]),
        .O(\buf_data_reg[0][171]_0 [10]));
  (* SOFT_HLUTNM = "soft_lutpair519" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[11]_i_1 
       (.I0(sband_td[27]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [11]),
        .O(\buf_data_reg[0][171]_0 [11]));
  (* SOFT_HLUTNM = "soft_lutpair518" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[12]_i_1 
       (.I0(sband_td[28]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [12]),
        .O(\buf_data_reg[0][171]_0 [12]));
  (* SOFT_HLUTNM = "soft_lutpair518" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[13]_i_1 
       (.I0(sband_td[29]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [13]),
        .O(\buf_data_reg[0][171]_0 [13]));
  (* SOFT_HLUTNM = "soft_lutpair517" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[14]_i_1 
       (.I0(sband_td[30]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [14]),
        .O(\buf_data_reg[0][171]_0 [14]));
  (* SOFT_HLUTNM = "soft_lutpair517" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[15]_i_1 
       (.I0(sband_td[31]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [15]),
        .O(\buf_data_reg[0][171]_0 [15]));
  (* SOFT_HLUTNM = "soft_lutpair516" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[16]_i_1 
       (.I0(sband_td[32]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [16]),
        .O(\buf_data_reg[0][171]_0 [16]));
  (* SOFT_HLUTNM = "soft_lutpair515" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[17]_i_1 
       (.I0(sband_td[33]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [17]),
        .O(\buf_data_reg[0][171]_0 [17]));
  (* SOFT_HLUTNM = "soft_lutpair514" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[18]_i_1 
       (.I0(sband_td[34]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [18]),
        .O(\buf_data_reg[0][171]_0 [18]));
  (* SOFT_HLUTNM = "soft_lutpair513" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[19]_i_1 
       (.I0(sband_td[35]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [19]),
        .O(\buf_data_reg[0][171]_0 [19]));
  (* SOFT_HLUTNM = "soft_lutpair524" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[1]_i_1 
       (.I0(sband_td[17]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [1]),
        .O(\buf_data_reg[0][171]_0 [1]));
  (* SOFT_HLUTNM = "soft_lutpair512" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[20]_i_1 
       (.I0(sband_td[36]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [20]),
        .O(\buf_data_reg[0][171]_0 [20]));
  (* SOFT_HLUTNM = "soft_lutpair511" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[21]_i_1 
       (.I0(sband_td[37]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [21]),
        .O(\buf_data_reg[0][171]_0 [21]));
  (* SOFT_HLUTNM = "soft_lutpair510" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[22]_i_1 
       (.I0(sband_td[38]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [22]),
        .O(\buf_data_reg[0][171]_0 [22]));
  (* SOFT_HLUTNM = "soft_lutpair509" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[23]_i_1 
       (.I0(sband_td[39]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [23]),
        .O(\buf_data_reg[0][171]_0 [23]));
  (* SOFT_HLUTNM = "soft_lutpair508" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[24]_i_1 
       (.I0(sband_td[40]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [24]),
        .O(\buf_data_reg[0][171]_0 [24]));
  (* SOFT_HLUTNM = "soft_lutpair507" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[25]_i_1 
       (.I0(sband_td[41]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [25]),
        .O(\buf_data_reg[0][171]_0 [25]));
  (* SOFT_HLUTNM = "soft_lutpair506" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[26]_i_1 
       (.I0(sband_td[42]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [26]),
        .O(\buf_data_reg[0][171]_0 [26]));
  (* SOFT_HLUTNM = "soft_lutpair505" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[27]_i_1 
       (.I0(sband_td[43]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [27]),
        .O(\buf_data_reg[0][171]_0 [27]));
  (* SOFT_HLUTNM = "soft_lutpair504" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[28]_i_1 
       (.I0(sband_td[44]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [28]),
        .O(\buf_data_reg[0][171]_0 [28]));
  (* SOFT_HLUTNM = "soft_lutpair503" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[29]_i_1 
       (.I0(sband_td[45]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [29]),
        .O(\buf_data_reg[0][171]_0 [29]));
  (* SOFT_HLUTNM = "soft_lutpair523" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[2]_i_1 
       (.I0(sband_td[18]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [2]),
        .O(\buf_data_reg[0][171]_0 [2]));
  (* SOFT_HLUTNM = "soft_lutpair502" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[30]_i_1 
       (.I0(sband_td[46]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [30]),
        .O(\buf_data_reg[0][171]_0 [30]));
  (* SOFT_HLUTNM = "soft_lutpair501" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[31]_i_1 
       (.I0(sband_td[47]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [31]),
        .O(\buf_data_reg[0][171]_0 [31]));
  (* SOFT_HLUTNM = "soft_lutpair516" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[32]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[48]),
        .O(\buf_data_reg[0][171]_0 [32]));
  (* SOFT_HLUTNM = "soft_lutpair515" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[33]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[49]),
        .O(\buf_data_reg[0][171]_0 [33]));
  (* SOFT_HLUTNM = "soft_lutpair514" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[34]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[50]),
        .O(\buf_data_reg[0][171]_0 [34]));
  (* SOFT_HLUTNM = "soft_lutpair513" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[35]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[51]),
        .O(\buf_data_reg[0][171]_0 [35]));
  (* SOFT_HLUTNM = "soft_lutpair512" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[36]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[52]),
        .O(\buf_data_reg[0][171]_0 [36]));
  (* SOFT_HLUTNM = "soft_lutpair511" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[37]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[53]),
        .O(\buf_data_reg[0][171]_0 [37]));
  (* SOFT_HLUTNM = "soft_lutpair510" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[38]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[54]),
        .O(\buf_data_reg[0][171]_0 [38]));
  (* SOFT_HLUTNM = "soft_lutpair509" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[39]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[55]),
        .O(\buf_data_reg[0][171]_0 [39]));
  (* SOFT_HLUTNM = "soft_lutpair523" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[3]_i_1 
       (.I0(sband_td[19]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [3]),
        .O(\buf_data_reg[0][171]_0 [3]));
  (* SOFT_HLUTNM = "soft_lutpair508" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[40]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[56]),
        .O(\buf_data_reg[0][171]_0 [40]));
  (* SOFT_HLUTNM = "soft_lutpair507" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[41]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[57]),
        .O(\buf_data_reg[0][171]_0 [41]));
  (* SOFT_HLUTNM = "soft_lutpair506" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[42]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[58]),
        .O(\buf_data_reg[0][171]_0 [42]));
  (* SOFT_HLUTNM = "soft_lutpair505" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[43]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[59]),
        .O(\buf_data_reg[0][171]_0 [43]));
  (* SOFT_HLUTNM = "soft_lutpair504" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[44]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[60]),
        .O(\buf_data_reg[0][171]_0 [44]));
  (* SOFT_HLUTNM = "soft_lutpair503" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[45]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[61]),
        .O(\buf_data_reg[0][171]_0 [45]));
  (* SOFT_HLUTNM = "soft_lutpair502" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[46]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[62]),
        .O(\buf_data_reg[0][171]_0 [46]));
  (* SOFT_HLUTNM = "soft_lutpair501" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_td_r[47]_i_1 
       (.I0(vfb_sof119_out),
        .I1(sband_td[63]),
        .O(\buf_data_reg[0][171]_0 [47]));
  (* SOFT_HLUTNM = "soft_lutpair522" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[4]_i_1 
       (.I0(sband_td[20]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [4]),
        .O(\buf_data_reg[0][171]_0 [4]));
  (* SOFT_HLUTNM = "soft_lutpair522" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[5]_i_1 
       (.I0(sband_td[21]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [5]),
        .O(\buf_data_reg[0][171]_0 [5]));
  (* SOFT_HLUTNM = "soft_lutpair521" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[6]_i_1 
       (.I0(sband_td[22]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [6]),
        .O(\buf_data_reg[0][171]_0 [6]));
  (* SOFT_HLUTNM = "soft_lutpair521" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[7]_i_1 
       (.I0(sband_td[23]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [7]),
        .O(\buf_data_reg[0][171]_0 [7]));
  (* SOFT_HLUTNM = "soft_lutpair520" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[8]_i_1 
       (.I0(sband_td[24]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [8]),
        .O(\buf_data_reg[0][171]_0 [8]));
  (* SOFT_HLUTNM = "soft_lutpair520" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_td_r[9]_i_1 
       (.I0(sband_td[25]),
        .I1(vfb_sof119_out),
        .I2(\sband_td_r_reg[31] [9]),
        .O(\buf_data_reg[0][171]_0 [9]));
  (* SOFT_HLUTNM = "soft_lutpair500" *) 
  LUT3 #(
    .INIT(8'hB8)) 
    \sband_tk_r[2]_i_1 
       (.I0(sband_tk[4]),
        .I1(vfb_sof119_out),
        .I2(\sband_tk_r_reg[2] ),
        .O(\buf_data_reg[0][106]_0 [0]));
  (* SOFT_HLUTNM = "soft_lutpair497" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \sband_tk_r[4]_i_2 
       (.I0(vfb_sof119_out),
        .I1(sband_tk[6]),
        .O(\buf_data_reg[0][106]_0 [1]));
  LUT6 #(
    .INIT(64'h0020000000000000)) 
    sband_tl_r_i_1
       (.I0(sband_tl_r_reg),
        .I1(m_axis_tvalid),
        .I2(cur_dtype_udef),
        .I3(sband_tl_r_reg_0),
        .I4(\buf_valid_reg_n_0_[0] ),
        .I5(sban_dtvc),
        .O(vfb_sof119_out));
  (* SOFT_HLUTNM = "soft_lutpair493" *) 
  LUT2 #(
    .INIT(4'h8)) 
    sband_tl_r_i_2
       (.I0(cur_dtype_pxls1),
        .I1(s_axis_tlast_0),
        .O(sband_tl));
  (* SOFT_HLUTNM = "soft_lutpair496" *) 
  LUT4 #(
    .INIT(16'h8000)) 
    \sband_tu_r[0]_i_1 
       (.I0(sban_dtvc),
        .I1(\buf_valid_reg_n_0_[0] ),
        .I2(\buf_data_reg_n_0_[0][4] ),
        .I3(s_axis_tready__3),
        .O(sband_tu));
  LUT6 #(
    .INIT(64'hFFFFEAAAEAAAEAAA)) 
    \sband_tu_r[0]_i_2 
       (.I0(cur_dtype_sink_reg_n_0),
        .I1(cur_dtype_pxls),
        .I2(\sband_tu_r[0]_i_3_n_0 ),
        .I3(buff_tr141_in),
        .I4(sband_tl_r_reg),
        .I5(\buf_valid_reg[1]_1 ),
        .O(s_axis_tready__3));
  (* SOFT_HLUTNM = "soft_lutpair525" *) 
  LUT2 #(
    .INIT(4'h1)) 
    \sband_tu_r[0]_i_3 
       (.I0(\REQ_BUFFER_RAW12.filt_tl_on ),
        .I1(\REQ_BUFFER_RAW12.buff_tl_i_reg_n_0 ),
        .O(\sband_tu_r[0]_i_3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair497" *) 
  LUT4 #(
    .INIT(16'h0400)) 
    \vfb_data[23]_i_3 
       (.I0(vfb_sof119_out),
        .I1(vfb_sof015_out),
        .I2(m_axis_tvalid),
        .I3(vfb_arstn),
        .O(\state_reg[1]_0 ));
  LUT6 #(
    .INIT(64'h0800080F08000800)) 
    \vfb_sof[0]_i_2 
       (.I0(\vfb_sof[0]_i_6_n_0 ),
        .I1(s_axis_tready__3),
        .I2(m_axis_tvalid),
        .I3(vfb_sof119_out),
        .I4(\vfb_sof_reg[0] ),
        .I5(sband_tu_r),
        .O(\state_reg[1] ));
  LUT6 #(
    .INIT(64'h7000000000000000)) 
    \vfb_sof[0]_i_6 
       (.I0(E),
        .I1(sband_tl_r_reg_0),
        .I2(cur_dtype_udef),
        .I3(\buf_data_reg_n_0_[0][4] ),
        .I4(\buf_valid_reg_n_0_[0] ),
        .I5(sban_dtvc),
        .O(\vfb_sof[0]_i_6_n_0 ));
  LUT1 #(
    .INIT(2'h1)) 
    vfb_valid_i_1
       (.I0(vfb_arstn),
        .O(SR));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* SIM_ASSERT_CHK = "0" *) 
(* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) (* WIDTH = "2" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "ARRAY_SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_array_single
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input [1:0]src_in;
  input dest_clk;
  output [1:0]dest_out;

  wire [1:0]async_path_bit;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[1] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[2] ;

  assign async_path_bit = src_in[1:0];
  assign dest_out[1:0] = \syncstages_ff[2] ;
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[0]),
        .Q(\syncstages_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[1]),
        .Q(\syncstages_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [0]),
        .Q(\syncstages_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [1]),
        .Q(\syncstages_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [0]),
        .Q(\syncstages_ff[2] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [1]),
        .Q(\syncstages_ff[2] [1]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_array_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* WIDTH = "2" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_array_single__4
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input [1:0]src_in;
  input dest_clk;
  output [1:0]dest_out;

  wire [1:0]async_path_bit;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[1] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[2] ;

  assign async_path_bit = src_in[1:0];
  assign dest_out[1:0] = \syncstages_ff[2] ;
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[0]),
        .Q(\syncstages_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[1]),
        .Q(\syncstages_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [0]),
        .Q(\syncstages_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [1]),
        .Q(\syncstages_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [0]),
        .Q(\syncstages_ff[2] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [1]),
        .Q(\syncstages_ff[2] [1]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_array_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* WIDTH = "2" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_array_single__5
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input [1:0]src_in;
  input dest_clk;
  output [1:0]dest_out;

  wire [1:0]async_path_bit;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[1] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[2] ;

  assign dest_out[1:0] = \syncstages_ff[2] ;
  LUT1 #(
    .INIT(2'h2)) 
    i_0
       (.I0(1'b1),
        .O(async_path_bit[1]));
  LUT1 #(
    .INIT(2'h2)) 
    i_1
       (.I0(1'b1),
        .O(async_path_bit[0]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[0]),
        .Q(\syncstages_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[1]),
        .Q(\syncstages_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [0]),
        .Q(\syncstages_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [1]),
        .Q(\syncstages_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [0]),
        .Q(\syncstages_ff[2] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [1]),
        .Q(\syncstages_ff[2] [1]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_array_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* WIDTH = "2" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_array_single__6
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input [1:0]src_in;
  input dest_clk;
  output [1:0]dest_out;

  wire [1:0]async_path_bit;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[1] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [1:0]\syncstages_ff[2] ;

  assign async_path_bit = src_in[1:0];
  assign dest_out[1:0] = \syncstages_ff[2] ;
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[0]),
        .Q(\syncstages_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[1]),
        .Q(\syncstages_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [0]),
        .Q(\syncstages_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [1]),
        .Q(\syncstages_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [0]),
        .Q(\syncstages_ff[2] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [1]),
        .Q(\syncstages_ff[2] [1]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_array_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_array_single__parameterized0
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input [0:0]src_in;
  input dest_clk;
  output [0:0]dest_out;

  wire async_path_bit;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire \syncstages_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire \syncstages_ff[1] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire \syncstages_ff[2] ;

  assign dest_out[0] = \syncstages_ff[2] ;
  LUT1 #(
    .INIT(2'h2)) 
    i_0
       (.I0(1'b0),
        .O(async_path_bit));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit),
        .Q(\syncstages_ff[0] ),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] ),
        .Q(\syncstages_ff[1] ),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] ),
        .Q(\syncstages_ff[2] ),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_array_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "1" *) (* VERSION = "0" *) 
(* WIDTH = "46" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_array_single__parameterized1
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input [45:0]src_in;
  input dest_clk;
  output [45:0]dest_out;

  wire [45:0]async_path_bit;
  wire dest_clk;
  wire src_clk;
  wire [45:0]src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [45:0]\syncstages_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [45:0]\syncstages_ff[1] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [45:0]\syncstages_ff[2] ;

  assign dest_out[45:0] = \syncstages_ff[2] ;
  FDRE \src_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[0]),
        .Q(async_path_bit[0]),
        .R(1'b0));
  FDRE \src_ff_reg[10] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[10]),
        .Q(async_path_bit[10]),
        .R(1'b0));
  FDRE \src_ff_reg[11] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[11]),
        .Q(async_path_bit[11]),
        .R(1'b0));
  FDRE \src_ff_reg[12] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[12]),
        .Q(async_path_bit[12]),
        .R(1'b0));
  FDRE \src_ff_reg[13] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[13]),
        .Q(async_path_bit[13]),
        .R(1'b0));
  FDRE \src_ff_reg[14] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[14]),
        .Q(async_path_bit[14]),
        .R(1'b0));
  FDRE \src_ff_reg[15] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[15]),
        .Q(async_path_bit[15]),
        .R(1'b0));
  FDRE \src_ff_reg[16] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[16]),
        .Q(async_path_bit[16]),
        .R(1'b0));
  FDRE \src_ff_reg[17] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[17]),
        .Q(async_path_bit[17]),
        .R(1'b0));
  FDRE \src_ff_reg[18] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[18]),
        .Q(async_path_bit[18]),
        .R(1'b0));
  FDRE \src_ff_reg[19] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[19]),
        .Q(async_path_bit[19]),
        .R(1'b0));
  FDRE \src_ff_reg[1] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[1]),
        .Q(async_path_bit[1]),
        .R(1'b0));
  FDRE \src_ff_reg[20] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[20]),
        .Q(async_path_bit[20]),
        .R(1'b0));
  FDRE \src_ff_reg[21] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[21]),
        .Q(async_path_bit[21]),
        .R(1'b0));
  FDRE \src_ff_reg[22] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[22]),
        .Q(async_path_bit[22]),
        .R(1'b0));
  FDRE \src_ff_reg[23] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[23]),
        .Q(async_path_bit[23]),
        .R(1'b0));
  FDRE \src_ff_reg[24] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[24]),
        .Q(async_path_bit[24]),
        .R(1'b0));
  FDRE \src_ff_reg[25] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[25]),
        .Q(async_path_bit[25]),
        .R(1'b0));
  FDRE \src_ff_reg[26] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[26]),
        .Q(async_path_bit[26]),
        .R(1'b0));
  FDRE \src_ff_reg[27] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[27]),
        .Q(async_path_bit[27]),
        .R(1'b0));
  FDRE \src_ff_reg[28] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[28]),
        .Q(async_path_bit[28]),
        .R(1'b0));
  FDRE \src_ff_reg[29] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[29]),
        .Q(async_path_bit[29]),
        .R(1'b0));
  FDRE \src_ff_reg[2] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[2]),
        .Q(async_path_bit[2]),
        .R(1'b0));
  FDRE \src_ff_reg[30] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[30]),
        .Q(async_path_bit[30]),
        .R(1'b0));
  FDRE \src_ff_reg[31] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[31]),
        .Q(async_path_bit[31]),
        .R(1'b0));
  FDRE \src_ff_reg[32] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[32]),
        .Q(async_path_bit[32]),
        .R(1'b0));
  FDRE \src_ff_reg[33] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[33]),
        .Q(async_path_bit[33]),
        .R(1'b0));
  FDRE \src_ff_reg[34] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[34]),
        .Q(async_path_bit[34]),
        .R(1'b0));
  FDRE \src_ff_reg[35] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[35]),
        .Q(async_path_bit[35]),
        .R(1'b0));
  FDRE \src_ff_reg[36] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[36]),
        .Q(async_path_bit[36]),
        .R(1'b0));
  FDRE \src_ff_reg[37] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[37]),
        .Q(async_path_bit[37]),
        .R(1'b0));
  FDRE \src_ff_reg[38] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[38]),
        .Q(async_path_bit[38]),
        .R(1'b0));
  FDRE \src_ff_reg[39] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[39]),
        .Q(async_path_bit[39]),
        .R(1'b0));
  FDRE \src_ff_reg[3] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[3]),
        .Q(async_path_bit[3]),
        .R(1'b0));
  FDRE \src_ff_reg[40] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[40]),
        .Q(async_path_bit[40]),
        .R(1'b0));
  FDRE \src_ff_reg[41] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[41]),
        .Q(async_path_bit[41]),
        .R(1'b0));
  FDRE \src_ff_reg[42] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[42]),
        .Q(async_path_bit[42]),
        .R(1'b0));
  FDRE \src_ff_reg[43] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[43]),
        .Q(async_path_bit[43]),
        .R(1'b0));
  FDRE \src_ff_reg[44] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[44]),
        .Q(async_path_bit[44]),
        .R(1'b0));
  FDRE \src_ff_reg[45] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[45]),
        .Q(async_path_bit[45]),
        .R(1'b0));
  FDRE \src_ff_reg[4] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[4]),
        .Q(async_path_bit[4]),
        .R(1'b0));
  FDRE \src_ff_reg[5] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[5]),
        .Q(async_path_bit[5]),
        .R(1'b0));
  FDRE \src_ff_reg[6] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[6]),
        .Q(async_path_bit[6]),
        .R(1'b0));
  FDRE \src_ff_reg[7] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[7]),
        .Q(async_path_bit[7]),
        .R(1'b0));
  FDRE \src_ff_reg[8] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[8]),
        .Q(async_path_bit[8]),
        .R(1'b0));
  FDRE \src_ff_reg[9] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in[9]),
        .Q(async_path_bit[9]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[0]),
        .Q(\syncstages_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][10] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[10]),
        .Q(\syncstages_ff[0] [10]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][11] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[11]),
        .Q(\syncstages_ff[0] [11]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][12] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[12]),
        .Q(\syncstages_ff[0] [12]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][13] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[13]),
        .Q(\syncstages_ff[0] [13]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][14] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[14]),
        .Q(\syncstages_ff[0] [14]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][15] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[15]),
        .Q(\syncstages_ff[0] [15]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][16] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[16]),
        .Q(\syncstages_ff[0] [16]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][17] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[17]),
        .Q(\syncstages_ff[0] [17]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][18] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[18]),
        .Q(\syncstages_ff[0] [18]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][19] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[19]),
        .Q(\syncstages_ff[0] [19]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[1]),
        .Q(\syncstages_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][20] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[20]),
        .Q(\syncstages_ff[0] [20]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][21] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[21]),
        .Q(\syncstages_ff[0] [21]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][22] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[22]),
        .Q(\syncstages_ff[0] [22]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][23] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[23]),
        .Q(\syncstages_ff[0] [23]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][24] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[24]),
        .Q(\syncstages_ff[0] [24]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][25] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[25]),
        .Q(\syncstages_ff[0] [25]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][26] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[26]),
        .Q(\syncstages_ff[0] [26]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][27] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[27]),
        .Q(\syncstages_ff[0] [27]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][28] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[28]),
        .Q(\syncstages_ff[0] [28]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][29] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[29]),
        .Q(\syncstages_ff[0] [29]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[2]),
        .Q(\syncstages_ff[0] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][30] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[30]),
        .Q(\syncstages_ff[0] [30]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][31] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[31]),
        .Q(\syncstages_ff[0] [31]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][32] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[32]),
        .Q(\syncstages_ff[0] [32]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][33] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[33]),
        .Q(\syncstages_ff[0] [33]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][34] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[34]),
        .Q(\syncstages_ff[0] [34]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][35] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[35]),
        .Q(\syncstages_ff[0] [35]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][36] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[36]),
        .Q(\syncstages_ff[0] [36]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][37] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[37]),
        .Q(\syncstages_ff[0] [37]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][38] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[38]),
        .Q(\syncstages_ff[0] [38]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][39] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[39]),
        .Q(\syncstages_ff[0] [39]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[3]),
        .Q(\syncstages_ff[0] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][40] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[40]),
        .Q(\syncstages_ff[0] [40]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][41] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[41]),
        .Q(\syncstages_ff[0] [41]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][42] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[42]),
        .Q(\syncstages_ff[0] [42]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][43] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[43]),
        .Q(\syncstages_ff[0] [43]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][44] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[44]),
        .Q(\syncstages_ff[0] [44]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][45] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[45]),
        .Q(\syncstages_ff[0] [45]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[4]),
        .Q(\syncstages_ff[0] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[5]),
        .Q(\syncstages_ff[0] [5]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][6] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[6]),
        .Q(\syncstages_ff[0] [6]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][7] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[7]),
        .Q(\syncstages_ff[0] [7]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][8] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[8]),
        .Q(\syncstages_ff[0] [8]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][9] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[9]),
        .Q(\syncstages_ff[0] [9]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [0]),
        .Q(\syncstages_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][10] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [10]),
        .Q(\syncstages_ff[1] [10]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][11] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [11]),
        .Q(\syncstages_ff[1] [11]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][12] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [12]),
        .Q(\syncstages_ff[1] [12]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][13] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [13]),
        .Q(\syncstages_ff[1] [13]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][14] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [14]),
        .Q(\syncstages_ff[1] [14]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][15] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [15]),
        .Q(\syncstages_ff[1] [15]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][16] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [16]),
        .Q(\syncstages_ff[1] [16]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][17] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [17]),
        .Q(\syncstages_ff[1] [17]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][18] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [18]),
        .Q(\syncstages_ff[1] [18]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][19] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [19]),
        .Q(\syncstages_ff[1] [19]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [1]),
        .Q(\syncstages_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][20] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [20]),
        .Q(\syncstages_ff[1] [20]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][21] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [21]),
        .Q(\syncstages_ff[1] [21]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][22] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [22]),
        .Q(\syncstages_ff[1] [22]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][23] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [23]),
        .Q(\syncstages_ff[1] [23]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][24] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [24]),
        .Q(\syncstages_ff[1] [24]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][25] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [25]),
        .Q(\syncstages_ff[1] [25]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][26] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [26]),
        .Q(\syncstages_ff[1] [26]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][27] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [27]),
        .Q(\syncstages_ff[1] [27]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][28] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [28]),
        .Q(\syncstages_ff[1] [28]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][29] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [29]),
        .Q(\syncstages_ff[1] [29]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [2]),
        .Q(\syncstages_ff[1] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][30] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [30]),
        .Q(\syncstages_ff[1] [30]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][31] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [31]),
        .Q(\syncstages_ff[1] [31]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][32] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [32]),
        .Q(\syncstages_ff[1] [32]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][33] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [33]),
        .Q(\syncstages_ff[1] [33]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][34] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [34]),
        .Q(\syncstages_ff[1] [34]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][35] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [35]),
        .Q(\syncstages_ff[1] [35]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][36] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [36]),
        .Q(\syncstages_ff[1] [36]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][37] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [37]),
        .Q(\syncstages_ff[1] [37]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][38] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [38]),
        .Q(\syncstages_ff[1] [38]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][39] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [39]),
        .Q(\syncstages_ff[1] [39]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [3]),
        .Q(\syncstages_ff[1] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][40] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [40]),
        .Q(\syncstages_ff[1] [40]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][41] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [41]),
        .Q(\syncstages_ff[1] [41]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][42] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [42]),
        .Q(\syncstages_ff[1] [42]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][43] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [43]),
        .Q(\syncstages_ff[1] [43]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][44] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [44]),
        .Q(\syncstages_ff[1] [44]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][45] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [45]),
        .Q(\syncstages_ff[1] [45]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [4]),
        .Q(\syncstages_ff[1] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [5]),
        .Q(\syncstages_ff[1] [5]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][6] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [6]),
        .Q(\syncstages_ff[1] [6]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][7] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [7]),
        .Q(\syncstages_ff[1] [7]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][8] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [8]),
        .Q(\syncstages_ff[1] [8]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][9] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [9]),
        .Q(\syncstages_ff[1] [9]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [0]),
        .Q(\syncstages_ff[2] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][10] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [10]),
        .Q(\syncstages_ff[2] [10]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][11] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [11]),
        .Q(\syncstages_ff[2] [11]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][12] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [12]),
        .Q(\syncstages_ff[2] [12]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][13] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [13]),
        .Q(\syncstages_ff[2] [13]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][14] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [14]),
        .Q(\syncstages_ff[2] [14]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][15] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [15]),
        .Q(\syncstages_ff[2] [15]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][16] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [16]),
        .Q(\syncstages_ff[2] [16]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][17] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [17]),
        .Q(\syncstages_ff[2] [17]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][18] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [18]),
        .Q(\syncstages_ff[2] [18]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][19] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [19]),
        .Q(\syncstages_ff[2] [19]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [1]),
        .Q(\syncstages_ff[2] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][20] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [20]),
        .Q(\syncstages_ff[2] [20]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][21] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [21]),
        .Q(\syncstages_ff[2] [21]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][22] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [22]),
        .Q(\syncstages_ff[2] [22]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][23] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [23]),
        .Q(\syncstages_ff[2] [23]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][24] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [24]),
        .Q(\syncstages_ff[2] [24]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][25] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [25]),
        .Q(\syncstages_ff[2] [25]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][26] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [26]),
        .Q(\syncstages_ff[2] [26]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][27] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [27]),
        .Q(\syncstages_ff[2] [27]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][28] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [28]),
        .Q(\syncstages_ff[2] [28]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][29] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [29]),
        .Q(\syncstages_ff[2] [29]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [2]),
        .Q(\syncstages_ff[2] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][30] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [30]),
        .Q(\syncstages_ff[2] [30]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][31] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [31]),
        .Q(\syncstages_ff[2] [31]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][32] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [32]),
        .Q(\syncstages_ff[2] [32]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][33] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [33]),
        .Q(\syncstages_ff[2] [33]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][34] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [34]),
        .Q(\syncstages_ff[2] [34]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][35] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [35]),
        .Q(\syncstages_ff[2] [35]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][36] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [36]),
        .Q(\syncstages_ff[2] [36]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][37] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [37]),
        .Q(\syncstages_ff[2] [37]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][38] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [38]),
        .Q(\syncstages_ff[2] [38]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][39] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [39]),
        .Q(\syncstages_ff[2] [39]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [3]),
        .Q(\syncstages_ff[2] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][40] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [40]),
        .Q(\syncstages_ff[2] [40]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][41] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [41]),
        .Q(\syncstages_ff[2] [41]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][42] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [42]),
        .Q(\syncstages_ff[2] [42]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][43] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [43]),
        .Q(\syncstages_ff[2] [43]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][44] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [44]),
        .Q(\syncstages_ff[2] [44]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][45] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [45]),
        .Q(\syncstages_ff[2] [45]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [4]),
        .Q(\syncstages_ff[2] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [5]),
        .Q(\syncstages_ff[2] [5]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][6] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [6]),
        .Q(\syncstages_ff[2] [6]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][7] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [7]),
        .Q(\syncstages_ff[2] [7]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][8] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [8]),
        .Q(\syncstages_ff[2] [8]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][9] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [9]),
        .Q(\syncstages_ff[2] [9]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_array_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* WIDTH = "16" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_array_single__parameterized2
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input [15:0]src_in;
  input dest_clk;
  output [15:0]dest_out;

  wire [15:0]async_path_bit;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [15:0]\syncstages_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [15:0]\syncstages_ff[1] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ARRAY_SINGLE" *) wire [15:0]\syncstages_ff[2] ;

  assign async_path_bit = src_in[15:0];
  assign dest_out[15:0] = \syncstages_ff[2] ;
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[0]),
        .Q(\syncstages_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][10] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[10]),
        .Q(\syncstages_ff[0] [10]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][11] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[11]),
        .Q(\syncstages_ff[0] [11]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][12] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[12]),
        .Q(\syncstages_ff[0] [12]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][13] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[13]),
        .Q(\syncstages_ff[0] [13]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][14] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[14]),
        .Q(\syncstages_ff[0] [14]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][15] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[15]),
        .Q(\syncstages_ff[0] [15]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[1]),
        .Q(\syncstages_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[2]),
        .Q(\syncstages_ff[0] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[3]),
        .Q(\syncstages_ff[0] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[4]),
        .Q(\syncstages_ff[0] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[5]),
        .Q(\syncstages_ff[0] [5]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][6] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[6]),
        .Q(\syncstages_ff[0] [6]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][7] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[7]),
        .Q(\syncstages_ff[0] [7]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][8] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[8]),
        .Q(\syncstages_ff[0] [8]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[0][9] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path_bit[9]),
        .Q(\syncstages_ff[0] [9]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [0]),
        .Q(\syncstages_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][10] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [10]),
        .Q(\syncstages_ff[1] [10]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][11] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [11]),
        .Q(\syncstages_ff[1] [11]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][12] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [12]),
        .Q(\syncstages_ff[1] [12]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][13] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [13]),
        .Q(\syncstages_ff[1] [13]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][14] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [14]),
        .Q(\syncstages_ff[1] [14]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][15] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [15]),
        .Q(\syncstages_ff[1] [15]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [1]),
        .Q(\syncstages_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [2]),
        .Q(\syncstages_ff[1] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [3]),
        .Q(\syncstages_ff[1] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [4]),
        .Q(\syncstages_ff[1] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [5]),
        .Q(\syncstages_ff[1] [5]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][6] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [6]),
        .Q(\syncstages_ff[1] [6]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][7] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [7]),
        .Q(\syncstages_ff[1] [7]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][8] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [8]),
        .Q(\syncstages_ff[1] [8]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[1][9] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[0] [9]),
        .Q(\syncstages_ff[1] [9]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [0]),
        .Q(\syncstages_ff[2] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][10] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [10]),
        .Q(\syncstages_ff[2] [10]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][11] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [11]),
        .Q(\syncstages_ff[2] [11]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][12] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [12]),
        .Q(\syncstages_ff[2] [12]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][13] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [13]),
        .Q(\syncstages_ff[2] [13]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][14] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [14]),
        .Q(\syncstages_ff[2] [14]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][15] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [15]),
        .Q(\syncstages_ff[2] [15]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [1]),
        .Q(\syncstages_ff[2] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [2]),
        .Q(\syncstages_ff[2] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [3]),
        .Q(\syncstages_ff[2] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [4]),
        .Q(\syncstages_ff[2] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [5]),
        .Q(\syncstages_ff[2] [5]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][6] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [6]),
        .Q(\syncstages_ff[2] [6]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][7] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [7]),
        .Q(\syncstages_ff[2] [7]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][8] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [8]),
        .Q(\syncstages_ff[2] [8]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ARRAY_SINGLE" *) 
  FDRE \syncstages_ff_reg[2][9] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\syncstages_ff[1] [9]),
        .Q(\syncstages_ff[2] [9]),
        .R(1'b0));
endmodule

(* DEF_VAL = "1'b1" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* INV_DEF_VAL = "1'b0" *) (* RST_ACTIVE_HIGH = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "ASYNC_RST" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_async_rst
   (src_arst,
    dest_clk,
    dest_arst);
  input src_arst;
  input dest_clk;
  output dest_arst;

  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ASYNC_RST" *) wire [2:0]arststages_ff;
  wire dest_clk;
  wire reset_pol;
  wire src_arst;

  assign dest_arst = arststages_ff[2];
  LUT1 #(
    .INIT(2'h1)) 
    \arststages_ff[2]_i_1 
       (.I0(src_arst),
        .O(reset_pol));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(1'b1),
        .Q(arststages_ff[0]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[0]),
        .Q(arststages_ff[1]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[1]),
        .Q(arststages_ff[2]));
endmodule

(* DEF_VAL = "1'b1" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* INV_DEF_VAL = "1'b0" *) (* ORIG_REF_NAME = "xpm_cdc_async_rst" *) (* RST_ACTIVE_HIGH = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "ASYNC_RST" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_async_rst__1
   (src_arst,
    dest_clk,
    dest_arst);
  input src_arst;
  input dest_clk;
  output dest_arst;

  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ASYNC_RST" *) wire [2:0]arststages_ff;
  wire dest_clk;
  wire reset_pol;
  wire src_arst;

  assign dest_arst = arststages_ff[2];
  LUT1 #(
    .INIT(2'h1)) 
    \arststages_ff[2]_i_1 
       (.I0(src_arst),
        .O(reset_pol));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(1'b1),
        .Q(arststages_ff[0]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[0]),
        .Q(arststages_ff[1]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[1]),
        .Q(arststages_ff[2]));
endmodule

(* DEF_VAL = "1'b1" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* INV_DEF_VAL = "1'b0" *) (* ORIG_REF_NAME = "xpm_cdc_async_rst" *) (* RST_ACTIVE_HIGH = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "ASYNC_RST" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_async_rst__2
   (src_arst,
    dest_clk,
    dest_arst);
  input src_arst;
  input dest_clk;
  output dest_arst;

  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ASYNC_RST" *) wire [2:0]arststages_ff;
  wire dest_clk;
  wire reset_pol;
  wire src_arst;

  assign dest_arst = arststages_ff[2];
  LUT1 #(
    .INIT(2'h1)) 
    \arststages_ff[2]_i_1 
       (.I0(src_arst),
        .O(reset_pol));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(1'b1),
        .Q(arststages_ff[0]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[0]),
        .Q(arststages_ff[1]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[1]),
        .Q(arststages_ff[2]));
endmodule

(* DEF_VAL = "1'b1" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* INV_DEF_VAL = "1'b0" *) (* ORIG_REF_NAME = "xpm_cdc_async_rst" *) (* RST_ACTIVE_HIGH = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "ASYNC_RST" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_async_rst__3
   (src_arst,
    dest_clk,
    dest_arst);
  input src_arst;
  input dest_clk;
  output dest_arst;

  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ASYNC_RST" *) wire [2:0]arststages_ff;
  wire dest_clk;
  wire reset_pol;
  wire src_arst;

  assign dest_arst = arststages_ff[2];
  LUT1 #(
    .INIT(2'h1)) 
    \arststages_ff[2]_i_1 
       (.I0(src_arst),
        .O(reset_pol));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(1'b1),
        .Q(arststages_ff[0]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[0]),
        .Q(arststages_ff[1]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[1]),
        .Q(arststages_ff[2]));
endmodule

(* DEF_VAL = "1'b1" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* INV_DEF_VAL = "1'b0" *) (* ORIG_REF_NAME = "xpm_cdc_async_rst" *) (* RST_ACTIVE_HIGH = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "ASYNC_RST" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_async_rst__4
   (src_arst,
    dest_clk,
    dest_arst);
  input src_arst;
  input dest_clk;
  output dest_arst;

  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ASYNC_RST" *) wire [2:0]arststages_ff;
  wire dest_clk;
  wire reset_pol;
  wire src_arst;

  assign dest_arst = arststages_ff[2];
  LUT1 #(
    .INIT(2'h1)) 
    \arststages_ff[2]_i_1 
       (.I0(src_arst),
        .O(reset_pol));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(1'b1),
        .Q(arststages_ff[0]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[0]),
        .Q(arststages_ff[1]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[1]),
        .Q(arststages_ff[2]));
endmodule

(* DEF_VAL = "1'b1" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* INV_DEF_VAL = "1'b0" *) (* ORIG_REF_NAME = "xpm_cdc_async_rst" *) (* RST_ACTIVE_HIGH = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "ASYNC_RST" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_async_rst__5
   (src_arst,
    dest_clk,
    dest_arst);
  input src_arst;
  input dest_clk;
  output dest_arst;

  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ASYNC_RST" *) wire [2:0]arststages_ff;
  wire dest_clk;
  wire reset_pol;
  wire src_arst;

  assign dest_arst = arststages_ff[2];
  LUT1 #(
    .INIT(2'h1)) 
    \arststages_ff[2]_i_1 
       (.I0(src_arst),
        .O(reset_pol));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(1'b1),
        .Q(arststages_ff[0]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[0]),
        .Q(arststages_ff[1]));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "ASYNC_RST" *) 
  FDCE #(
    .INIT(1'b1)) 
    \arststages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .CLR(reset_pol),
        .D(arststages_ff[1]),
        .Q(arststages_ff[2]));
endmodule

(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "1" *) (* REG_OUTPUT = "0" *) 
(* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) (* VERSION = "0" *) 
(* WIDTH = "5" *) (* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "GRAY" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray
   (src_clk,
    src_in_bin,
    dest_clk,
    dest_out_bin);
  input src_clk;
  input [4:0]src_in_bin;
  input dest_clk;
  output [4:0]dest_out_bin;

  wire [4:0]async_path;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [4:0]\dest_graysync_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [4:0]\dest_graysync_ff[1] ;
  wire [3:0]\^dest_out_bin ;
  wire [3:0]gray_enc;
  wire src_clk;
  wire [4:0]src_in_bin;

  assign dest_out_bin[4] = \dest_graysync_ff[1] [4];
  assign dest_out_bin[3:0] = \^dest_out_bin [3:0];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[0]),
        .Q(\dest_graysync_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[1]),
        .Q(\dest_graysync_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[2]),
        .Q(\dest_graysync_ff[0] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[3]),
        .Q(\dest_graysync_ff[0] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[4]),
        .Q(\dest_graysync_ff[0] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [0]),
        .Q(\dest_graysync_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [1]),
        .Q(\dest_graysync_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [2]),
        .Q(\dest_graysync_ff[1] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [3]),
        .Q(\dest_graysync_ff[1] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [4]),
        .Q(\dest_graysync_ff[1] [4]),
        .R(1'b0));
  LUT5 #(
    .INIT(32'h96696996)) 
    \dest_out_bin[0]_INST_0 
       (.I0(\dest_graysync_ff[1] [0]),
        .I1(\dest_graysync_ff[1] [2]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [3]),
        .I4(\dest_graysync_ff[1] [1]),
        .O(\^dest_out_bin [0]));
  LUT4 #(
    .INIT(16'h6996)) 
    \dest_out_bin[1]_INST_0 
       (.I0(\dest_graysync_ff[1] [1]),
        .I1(\dest_graysync_ff[1] [3]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [2]),
        .O(\^dest_out_bin [1]));
  LUT3 #(
    .INIT(8'h96)) 
    \dest_out_bin[2]_INST_0 
       (.I0(\dest_graysync_ff[1] [2]),
        .I1(\dest_graysync_ff[1] [4]),
        .I2(\dest_graysync_ff[1] [3]),
        .O(\^dest_out_bin [2]));
  LUT2 #(
    .INIT(4'h6)) 
    \dest_out_bin[3]_INST_0 
       (.I0(\dest_graysync_ff[1] [3]),
        .I1(\dest_graysync_ff[1] [4]),
        .O(\^dest_out_bin [3]));
  (* SOFT_HLUTNM = "soft_lutpair233" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[0]_i_1 
       (.I0(src_in_bin[1]),
        .I1(src_in_bin[0]),
        .O(gray_enc[0]));
  (* SOFT_HLUTNM = "soft_lutpair233" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[1]_i_1 
       (.I0(src_in_bin[2]),
        .I1(src_in_bin[1]),
        .O(gray_enc[1]));
  (* SOFT_HLUTNM = "soft_lutpair234" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[2]_i_1 
       (.I0(src_in_bin[3]),
        .I1(src_in_bin[2]),
        .O(gray_enc[2]));
  (* SOFT_HLUTNM = "soft_lutpair234" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[3]_i_1 
       (.I0(src_in_bin[4]),
        .I1(src_in_bin[3]),
        .O(gray_enc[3]));
  FDRE \src_gray_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[0]),
        .Q(async_path[0]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[1] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[1]),
        .Q(async_path[1]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[2] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[2]),
        .Q(async_path[2]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[3] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[3]),
        .Q(async_path[3]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[4] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in_bin[4]),
        .Q(async_path[4]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "1" *) (* ORIG_REF_NAME = "xpm_cdc_gray" *) 
(* REG_OUTPUT = "0" *) (* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
(* VERSION = "0" *) (* WIDTH = "5" *) (* XPM_MODULE = "TRUE" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "GRAY" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__4
   (src_clk,
    src_in_bin,
    dest_clk,
    dest_out_bin);
  input src_clk;
  input [4:0]src_in_bin;
  input dest_clk;
  output [4:0]dest_out_bin;

  wire [4:0]async_path;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [4:0]\dest_graysync_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [4:0]\dest_graysync_ff[1] ;
  wire [3:0]\^dest_out_bin ;
  wire [3:0]gray_enc;
  wire src_clk;
  wire [4:0]src_in_bin;

  assign dest_out_bin[4] = \dest_graysync_ff[1] [4];
  assign dest_out_bin[3:0] = \^dest_out_bin [3:0];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[0]),
        .Q(\dest_graysync_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[1]),
        .Q(\dest_graysync_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[2]),
        .Q(\dest_graysync_ff[0] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[3]),
        .Q(\dest_graysync_ff[0] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[4]),
        .Q(\dest_graysync_ff[0] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [0]),
        .Q(\dest_graysync_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [1]),
        .Q(\dest_graysync_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [2]),
        .Q(\dest_graysync_ff[1] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [3]),
        .Q(\dest_graysync_ff[1] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [4]),
        .Q(\dest_graysync_ff[1] [4]),
        .R(1'b0));
  LUT5 #(
    .INIT(32'h96696996)) 
    \dest_out_bin[0]_INST_0 
       (.I0(\dest_graysync_ff[1] [0]),
        .I1(\dest_graysync_ff[1] [2]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [3]),
        .I4(\dest_graysync_ff[1] [1]),
        .O(\^dest_out_bin [0]));
  LUT4 #(
    .INIT(16'h6996)) 
    \dest_out_bin[1]_INST_0 
       (.I0(\dest_graysync_ff[1] [1]),
        .I1(\dest_graysync_ff[1] [3]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [2]),
        .O(\^dest_out_bin [1]));
  LUT3 #(
    .INIT(8'h96)) 
    \dest_out_bin[2]_INST_0 
       (.I0(\dest_graysync_ff[1] [2]),
        .I1(\dest_graysync_ff[1] [4]),
        .I2(\dest_graysync_ff[1] [3]),
        .O(\^dest_out_bin [2]));
  LUT2 #(
    .INIT(4'h6)) 
    \dest_out_bin[3]_INST_0 
       (.I0(\dest_graysync_ff[1] [3]),
        .I1(\dest_graysync_ff[1] [4]),
        .O(\^dest_out_bin [3]));
  (* SOFT_HLUTNM = "soft_lutpair412" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[0]_i_1 
       (.I0(src_in_bin[1]),
        .I1(src_in_bin[0]),
        .O(gray_enc[0]));
  (* SOFT_HLUTNM = "soft_lutpair412" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[1]_i_1 
       (.I0(src_in_bin[2]),
        .I1(src_in_bin[1]),
        .O(gray_enc[1]));
  (* SOFT_HLUTNM = "soft_lutpair413" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[2]_i_1 
       (.I0(src_in_bin[3]),
        .I1(src_in_bin[2]),
        .O(gray_enc[2]));
  (* SOFT_HLUTNM = "soft_lutpair413" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[3]_i_1 
       (.I0(src_in_bin[4]),
        .I1(src_in_bin[3]),
        .O(gray_enc[3]));
  FDRE \src_gray_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[0]),
        .Q(async_path[0]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[1] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[1]),
        .Q(async_path[1]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[2] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[2]),
        .Q(async_path[2]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[3] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[3]),
        .Q(async_path[3]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[4] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in_bin[4]),
        .Q(async_path[4]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "1" *) (* ORIG_REF_NAME = "xpm_cdc_gray" *) 
(* REG_OUTPUT = "0" *) (* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
(* VERSION = "0" *) (* WIDTH = "5" *) (* XPM_MODULE = "TRUE" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "GRAY" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__5
   (src_clk,
    src_in_bin,
    dest_clk,
    dest_out_bin);
  input src_clk;
  input [4:0]src_in_bin;
  input dest_clk;
  output [4:0]dest_out_bin;

  wire [4:0]async_path;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [4:0]\dest_graysync_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [4:0]\dest_graysync_ff[1] ;
  wire [3:0]\^dest_out_bin ;
  wire [3:0]gray_enc;
  wire src_clk;
  wire [4:0]src_in_bin;

  assign dest_out_bin[4] = \dest_graysync_ff[1] [4];
  assign dest_out_bin[3:0] = \^dest_out_bin [3:0];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[0]),
        .Q(\dest_graysync_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[1]),
        .Q(\dest_graysync_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[2]),
        .Q(\dest_graysync_ff[0] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[3]),
        .Q(\dest_graysync_ff[0] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[4]),
        .Q(\dest_graysync_ff[0] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [0]),
        .Q(\dest_graysync_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [1]),
        .Q(\dest_graysync_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [2]),
        .Q(\dest_graysync_ff[1] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [3]),
        .Q(\dest_graysync_ff[1] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [4]),
        .Q(\dest_graysync_ff[1] [4]),
        .R(1'b0));
  LUT5 #(
    .INIT(32'h96696996)) 
    \dest_out_bin[0]_INST_0 
       (.I0(\dest_graysync_ff[1] [0]),
        .I1(\dest_graysync_ff[1] [2]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [3]),
        .I4(\dest_graysync_ff[1] [1]),
        .O(\^dest_out_bin [0]));
  LUT4 #(
    .INIT(16'h6996)) 
    \dest_out_bin[1]_INST_0 
       (.I0(\dest_graysync_ff[1] [1]),
        .I1(\dest_graysync_ff[1] [3]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [2]),
        .O(\^dest_out_bin [1]));
  LUT3 #(
    .INIT(8'h96)) 
    \dest_out_bin[2]_INST_0 
       (.I0(\dest_graysync_ff[1] [2]),
        .I1(\dest_graysync_ff[1] [4]),
        .I2(\dest_graysync_ff[1] [3]),
        .O(\^dest_out_bin [2]));
  LUT2 #(
    .INIT(4'h6)) 
    \dest_out_bin[3]_INST_0 
       (.I0(\dest_graysync_ff[1] [3]),
        .I1(\dest_graysync_ff[1] [4]),
        .O(\^dest_out_bin [3]));
  (* SOFT_HLUTNM = "soft_lutpair416" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[0]_i_1 
       (.I0(src_in_bin[1]),
        .I1(src_in_bin[0]),
        .O(gray_enc[0]));
  (* SOFT_HLUTNM = "soft_lutpair416" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[1]_i_1 
       (.I0(src_in_bin[2]),
        .I1(src_in_bin[1]),
        .O(gray_enc[1]));
  (* SOFT_HLUTNM = "soft_lutpair417" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[2]_i_1 
       (.I0(src_in_bin[3]),
        .I1(src_in_bin[2]),
        .O(gray_enc[2]));
  (* SOFT_HLUTNM = "soft_lutpair417" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[3]_i_1 
       (.I0(src_in_bin[4]),
        .I1(src_in_bin[3]),
        .O(gray_enc[3]));
  FDRE \src_gray_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[0]),
        .Q(async_path[0]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[1] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[1]),
        .Q(async_path[1]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[2] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[2]),
        .Q(async_path[2]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[3] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[3]),
        .Q(async_path[3]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[4] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in_bin[4]),
        .Q(async_path[4]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "1" *) (* ORIG_REF_NAME = "xpm_cdc_gray" *) 
(* REG_OUTPUT = "0" *) (* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
(* VERSION = "0" *) (* WIDTH = "5" *) (* XPM_MODULE = "TRUE" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "GRAY" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__6
   (src_clk,
    src_in_bin,
    dest_clk,
    dest_out_bin);
  input src_clk;
  input [4:0]src_in_bin;
  input dest_clk;
  output [4:0]dest_out_bin;

  wire [4:0]async_path;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [4:0]\dest_graysync_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [4:0]\dest_graysync_ff[1] ;
  wire [3:0]\^dest_out_bin ;
  wire [3:0]gray_enc;
  wire src_clk;
  wire [4:0]src_in_bin;

  assign dest_out_bin[4] = \dest_graysync_ff[1] [4];
  assign dest_out_bin[3:0] = \^dest_out_bin [3:0];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[0]),
        .Q(\dest_graysync_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[1]),
        .Q(\dest_graysync_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[2]),
        .Q(\dest_graysync_ff[0] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[3]),
        .Q(\dest_graysync_ff[0] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[4]),
        .Q(\dest_graysync_ff[0] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [0]),
        .Q(\dest_graysync_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [1]),
        .Q(\dest_graysync_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [2]),
        .Q(\dest_graysync_ff[1] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [3]),
        .Q(\dest_graysync_ff[1] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [4]),
        .Q(\dest_graysync_ff[1] [4]),
        .R(1'b0));
  LUT5 #(
    .INIT(32'h96696996)) 
    \dest_out_bin[0]_INST_0 
       (.I0(\dest_graysync_ff[1] [0]),
        .I1(\dest_graysync_ff[1] [2]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [3]),
        .I4(\dest_graysync_ff[1] [1]),
        .O(\^dest_out_bin [0]));
  LUT4 #(
    .INIT(16'h6996)) 
    \dest_out_bin[1]_INST_0 
       (.I0(\dest_graysync_ff[1] [1]),
        .I1(\dest_graysync_ff[1] [3]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [2]),
        .O(\^dest_out_bin [1]));
  LUT3 #(
    .INIT(8'h96)) 
    \dest_out_bin[2]_INST_0 
       (.I0(\dest_graysync_ff[1] [2]),
        .I1(\dest_graysync_ff[1] [4]),
        .I2(\dest_graysync_ff[1] [3]),
        .O(\^dest_out_bin [2]));
  LUT2 #(
    .INIT(4'h6)) 
    \dest_out_bin[3]_INST_0 
       (.I0(\dest_graysync_ff[1] [3]),
        .I1(\dest_graysync_ff[1] [4]),
        .O(\^dest_out_bin [3]));
  (* SOFT_HLUTNM = "soft_lutpair229" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[0]_i_1 
       (.I0(src_in_bin[1]),
        .I1(src_in_bin[0]),
        .O(gray_enc[0]));
  (* SOFT_HLUTNM = "soft_lutpair229" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[1]_i_1 
       (.I0(src_in_bin[2]),
        .I1(src_in_bin[1]),
        .O(gray_enc[1]));
  (* SOFT_HLUTNM = "soft_lutpair230" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[2]_i_1 
       (.I0(src_in_bin[3]),
        .I1(src_in_bin[2]),
        .O(gray_enc[2]));
  (* SOFT_HLUTNM = "soft_lutpair230" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[3]_i_1 
       (.I0(src_in_bin[4]),
        .I1(src_in_bin[3]),
        .O(gray_enc[3]));
  FDRE \src_gray_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[0]),
        .Q(async_path[0]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[1] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[1]),
        .Q(async_path[1]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[2] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[2]),
        .Q(async_path[2]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[3] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[3]),
        .Q(async_path[3]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[4] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in_bin[4]),
        .Q(async_path[4]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "1" *) (* ORIG_REF_NAME = "xpm_cdc_gray" *) 
(* REG_OUTPUT = "0" *) (* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
(* VERSION = "0" *) (* WIDTH = "6" *) (* XPM_MODULE = "TRUE" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "GRAY" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__parameterized0
   (src_clk,
    src_in_bin,
    dest_clk,
    dest_out_bin);
  input src_clk;
  input [5:0]src_in_bin;
  input dest_clk;
  output [5:0]dest_out_bin;

  wire [5:0]async_path;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [5:0]\dest_graysync_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [5:0]\dest_graysync_ff[1] ;
  wire [4:0]\^dest_out_bin ;
  wire [4:0]gray_enc;
  wire src_clk;
  wire [5:0]src_in_bin;

  assign dest_out_bin[5] = \dest_graysync_ff[1] [5];
  assign dest_out_bin[4:0] = \^dest_out_bin [4:0];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[0]),
        .Q(\dest_graysync_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[1]),
        .Q(\dest_graysync_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[2]),
        .Q(\dest_graysync_ff[0] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[3]),
        .Q(\dest_graysync_ff[0] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[4]),
        .Q(\dest_graysync_ff[0] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[5]),
        .Q(\dest_graysync_ff[0] [5]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [0]),
        .Q(\dest_graysync_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [1]),
        .Q(\dest_graysync_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [2]),
        .Q(\dest_graysync_ff[1] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [3]),
        .Q(\dest_graysync_ff[1] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [4]),
        .Q(\dest_graysync_ff[1] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [5]),
        .Q(\dest_graysync_ff[1] [5]),
        .R(1'b0));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \dest_out_bin[0]_INST_0 
       (.I0(\dest_graysync_ff[1] [0]),
        .I1(\dest_graysync_ff[1] [2]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [5]),
        .I4(\dest_graysync_ff[1] [3]),
        .I5(\dest_graysync_ff[1] [1]),
        .O(\^dest_out_bin [0]));
  LUT5 #(
    .INIT(32'h96696996)) 
    \dest_out_bin[1]_INST_0 
       (.I0(\dest_graysync_ff[1] [1]),
        .I1(\dest_graysync_ff[1] [3]),
        .I2(\dest_graysync_ff[1] [5]),
        .I3(\dest_graysync_ff[1] [4]),
        .I4(\dest_graysync_ff[1] [2]),
        .O(\^dest_out_bin [1]));
  LUT4 #(
    .INIT(16'h6996)) 
    \dest_out_bin[2]_INST_0 
       (.I0(\dest_graysync_ff[1] [2]),
        .I1(\dest_graysync_ff[1] [4]),
        .I2(\dest_graysync_ff[1] [5]),
        .I3(\dest_graysync_ff[1] [3]),
        .O(\^dest_out_bin [2]));
  LUT3 #(
    .INIT(8'h96)) 
    \dest_out_bin[3]_INST_0 
       (.I0(\dest_graysync_ff[1] [3]),
        .I1(\dest_graysync_ff[1] [5]),
        .I2(\dest_graysync_ff[1] [4]),
        .O(\^dest_out_bin [3]));
  LUT2 #(
    .INIT(4'h6)) 
    \dest_out_bin[4]_INST_0 
       (.I0(\dest_graysync_ff[1] [4]),
        .I1(\dest_graysync_ff[1] [5]),
        .O(\^dest_out_bin [4]));
  (* SOFT_HLUTNM = "soft_lutpair235" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[0]_i_1 
       (.I0(src_in_bin[1]),
        .I1(src_in_bin[0]),
        .O(gray_enc[0]));
  (* SOFT_HLUTNM = "soft_lutpair235" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[1]_i_1 
       (.I0(src_in_bin[2]),
        .I1(src_in_bin[1]),
        .O(gray_enc[1]));
  (* SOFT_HLUTNM = "soft_lutpair236" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[2]_i_1 
       (.I0(src_in_bin[3]),
        .I1(src_in_bin[2]),
        .O(gray_enc[2]));
  (* SOFT_HLUTNM = "soft_lutpair236" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[3]_i_1 
       (.I0(src_in_bin[4]),
        .I1(src_in_bin[3]),
        .O(gray_enc[3]));
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[4]_i_1 
       (.I0(src_in_bin[5]),
        .I1(src_in_bin[4]),
        .O(gray_enc[4]));
  FDRE \src_gray_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[0]),
        .Q(async_path[0]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[1] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[1]),
        .Q(async_path[1]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[2] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[2]),
        .Q(async_path[2]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[3] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[3]),
        .Q(async_path[3]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[4] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[4]),
        .Q(async_path[4]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[5] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in_bin[5]),
        .Q(async_path[5]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "1" *) (* ORIG_REF_NAME = "xpm_cdc_gray" *) 
(* REG_OUTPUT = "0" *) (* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
(* VERSION = "0" *) (* WIDTH = "6" *) (* XPM_MODULE = "TRUE" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "GRAY" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__parameterized0__4
   (src_clk,
    src_in_bin,
    dest_clk,
    dest_out_bin);
  input src_clk;
  input [5:0]src_in_bin;
  input dest_clk;
  output [5:0]dest_out_bin;

  wire [5:0]async_path;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [5:0]\dest_graysync_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [5:0]\dest_graysync_ff[1] ;
  wire [4:0]\^dest_out_bin ;
  wire [4:0]gray_enc;
  wire src_clk;
  wire [5:0]src_in_bin;

  assign dest_out_bin[5] = \dest_graysync_ff[1] [5];
  assign dest_out_bin[4:0] = \^dest_out_bin [4:0];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[0]),
        .Q(\dest_graysync_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[1]),
        .Q(\dest_graysync_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[2]),
        .Q(\dest_graysync_ff[0] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[3]),
        .Q(\dest_graysync_ff[0] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[4]),
        .Q(\dest_graysync_ff[0] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[5]),
        .Q(\dest_graysync_ff[0] [5]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [0]),
        .Q(\dest_graysync_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [1]),
        .Q(\dest_graysync_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [2]),
        .Q(\dest_graysync_ff[1] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [3]),
        .Q(\dest_graysync_ff[1] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [4]),
        .Q(\dest_graysync_ff[1] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [5]),
        .Q(\dest_graysync_ff[1] [5]),
        .R(1'b0));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \dest_out_bin[0]_INST_0 
       (.I0(\dest_graysync_ff[1] [0]),
        .I1(\dest_graysync_ff[1] [2]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [5]),
        .I4(\dest_graysync_ff[1] [3]),
        .I5(\dest_graysync_ff[1] [1]),
        .O(\^dest_out_bin [0]));
  LUT5 #(
    .INIT(32'h96696996)) 
    \dest_out_bin[1]_INST_0 
       (.I0(\dest_graysync_ff[1] [1]),
        .I1(\dest_graysync_ff[1] [3]),
        .I2(\dest_graysync_ff[1] [5]),
        .I3(\dest_graysync_ff[1] [4]),
        .I4(\dest_graysync_ff[1] [2]),
        .O(\^dest_out_bin [1]));
  LUT4 #(
    .INIT(16'h6996)) 
    \dest_out_bin[2]_INST_0 
       (.I0(\dest_graysync_ff[1] [2]),
        .I1(\dest_graysync_ff[1] [4]),
        .I2(\dest_graysync_ff[1] [5]),
        .I3(\dest_graysync_ff[1] [3]),
        .O(\^dest_out_bin [2]));
  LUT3 #(
    .INIT(8'h96)) 
    \dest_out_bin[3]_INST_0 
       (.I0(\dest_graysync_ff[1] [3]),
        .I1(\dest_graysync_ff[1] [5]),
        .I2(\dest_graysync_ff[1] [4]),
        .O(\^dest_out_bin [3]));
  LUT2 #(
    .INIT(4'h6)) 
    \dest_out_bin[4]_INST_0 
       (.I0(\dest_graysync_ff[1] [4]),
        .I1(\dest_graysync_ff[1] [5]),
        .O(\^dest_out_bin [4]));
  (* SOFT_HLUTNM = "soft_lutpair414" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[0]_i_1 
       (.I0(src_in_bin[1]),
        .I1(src_in_bin[0]),
        .O(gray_enc[0]));
  (* SOFT_HLUTNM = "soft_lutpair414" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[1]_i_1 
       (.I0(src_in_bin[2]),
        .I1(src_in_bin[1]),
        .O(gray_enc[1]));
  (* SOFT_HLUTNM = "soft_lutpair415" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[2]_i_1 
       (.I0(src_in_bin[3]),
        .I1(src_in_bin[2]),
        .O(gray_enc[2]));
  (* SOFT_HLUTNM = "soft_lutpair415" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[3]_i_1 
       (.I0(src_in_bin[4]),
        .I1(src_in_bin[3]),
        .O(gray_enc[3]));
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[4]_i_1 
       (.I0(src_in_bin[5]),
        .I1(src_in_bin[4]),
        .O(gray_enc[4]));
  FDRE \src_gray_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[0]),
        .Q(async_path[0]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[1] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[1]),
        .Q(async_path[1]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[2] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[2]),
        .Q(async_path[2]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[3] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[3]),
        .Q(async_path[3]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[4] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[4]),
        .Q(async_path[4]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[5] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in_bin[5]),
        .Q(async_path[5]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "1" *) (* ORIG_REF_NAME = "xpm_cdc_gray" *) 
(* REG_OUTPUT = "0" *) (* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
(* VERSION = "0" *) (* WIDTH = "6" *) (* XPM_MODULE = "TRUE" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "GRAY" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__parameterized0__5
   (src_clk,
    src_in_bin,
    dest_clk,
    dest_out_bin);
  input src_clk;
  input [5:0]src_in_bin;
  input dest_clk;
  output [5:0]dest_out_bin;

  wire [5:0]async_path;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [5:0]\dest_graysync_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [5:0]\dest_graysync_ff[1] ;
  wire [4:0]\^dest_out_bin ;
  wire [4:0]gray_enc;
  wire src_clk;
  wire [5:0]src_in_bin;

  assign dest_out_bin[5] = \dest_graysync_ff[1] [5];
  assign dest_out_bin[4:0] = \^dest_out_bin [4:0];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[0]),
        .Q(\dest_graysync_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[1]),
        .Q(\dest_graysync_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[2]),
        .Q(\dest_graysync_ff[0] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[3]),
        .Q(\dest_graysync_ff[0] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[4]),
        .Q(\dest_graysync_ff[0] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[5]),
        .Q(\dest_graysync_ff[0] [5]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [0]),
        .Q(\dest_graysync_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [1]),
        .Q(\dest_graysync_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [2]),
        .Q(\dest_graysync_ff[1] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [3]),
        .Q(\dest_graysync_ff[1] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [4]),
        .Q(\dest_graysync_ff[1] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [5]),
        .Q(\dest_graysync_ff[1] [5]),
        .R(1'b0));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \dest_out_bin[0]_INST_0 
       (.I0(\dest_graysync_ff[1] [0]),
        .I1(\dest_graysync_ff[1] [2]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [5]),
        .I4(\dest_graysync_ff[1] [3]),
        .I5(\dest_graysync_ff[1] [1]),
        .O(\^dest_out_bin [0]));
  LUT5 #(
    .INIT(32'h96696996)) 
    \dest_out_bin[1]_INST_0 
       (.I0(\dest_graysync_ff[1] [1]),
        .I1(\dest_graysync_ff[1] [3]),
        .I2(\dest_graysync_ff[1] [5]),
        .I3(\dest_graysync_ff[1] [4]),
        .I4(\dest_graysync_ff[1] [2]),
        .O(\^dest_out_bin [1]));
  LUT4 #(
    .INIT(16'h6996)) 
    \dest_out_bin[2]_INST_0 
       (.I0(\dest_graysync_ff[1] [2]),
        .I1(\dest_graysync_ff[1] [4]),
        .I2(\dest_graysync_ff[1] [5]),
        .I3(\dest_graysync_ff[1] [3]),
        .O(\^dest_out_bin [2]));
  LUT3 #(
    .INIT(8'h96)) 
    \dest_out_bin[3]_INST_0 
       (.I0(\dest_graysync_ff[1] [3]),
        .I1(\dest_graysync_ff[1] [5]),
        .I2(\dest_graysync_ff[1] [4]),
        .O(\^dest_out_bin [3]));
  LUT2 #(
    .INIT(4'h6)) 
    \dest_out_bin[4]_INST_0 
       (.I0(\dest_graysync_ff[1] [4]),
        .I1(\dest_graysync_ff[1] [5]),
        .O(\^dest_out_bin [4]));
  (* SOFT_HLUTNM = "soft_lutpair418" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[0]_i_1 
       (.I0(src_in_bin[1]),
        .I1(src_in_bin[0]),
        .O(gray_enc[0]));
  (* SOFT_HLUTNM = "soft_lutpair418" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[1]_i_1 
       (.I0(src_in_bin[2]),
        .I1(src_in_bin[1]),
        .O(gray_enc[1]));
  (* SOFT_HLUTNM = "soft_lutpair419" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[2]_i_1 
       (.I0(src_in_bin[3]),
        .I1(src_in_bin[2]),
        .O(gray_enc[2]));
  (* SOFT_HLUTNM = "soft_lutpair419" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[3]_i_1 
       (.I0(src_in_bin[4]),
        .I1(src_in_bin[3]),
        .O(gray_enc[3]));
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[4]_i_1 
       (.I0(src_in_bin[5]),
        .I1(src_in_bin[4]),
        .O(gray_enc[4]));
  FDRE \src_gray_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[0]),
        .Q(async_path[0]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[1] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[1]),
        .Q(async_path[1]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[2] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[2]),
        .Q(async_path[2]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[3] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[3]),
        .Q(async_path[3]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[4] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[4]),
        .Q(async_path[4]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[5] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in_bin[5]),
        .Q(async_path[5]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "1" *) (* ORIG_REF_NAME = "xpm_cdc_gray" *) 
(* REG_OUTPUT = "0" *) (* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
(* VERSION = "0" *) (* WIDTH = "6" *) (* XPM_MODULE = "TRUE" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "GRAY" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__parameterized0__6
   (src_clk,
    src_in_bin,
    dest_clk,
    dest_out_bin);
  input src_clk;
  input [5:0]src_in_bin;
  input dest_clk;
  output [5:0]dest_out_bin;

  wire [5:0]async_path;
  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [5:0]\dest_graysync_ff[0] ;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [5:0]\dest_graysync_ff[1] ;
  wire [4:0]\^dest_out_bin ;
  wire [4:0]gray_enc;
  wire src_clk;
  wire [5:0]src_in_bin;

  assign dest_out_bin[5] = \dest_graysync_ff[1] [5];
  assign dest_out_bin[4:0] = \^dest_out_bin [4:0];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[0]),
        .Q(\dest_graysync_ff[0] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[1]),
        .Q(\dest_graysync_ff[0] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[2]),
        .Q(\dest_graysync_ff[0] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[3]),
        .Q(\dest_graysync_ff[0] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[4]),
        .Q(\dest_graysync_ff[0] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[0][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(async_path[5]),
        .Q(\dest_graysync_ff[0] [5]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [0]),
        .Q(\dest_graysync_ff[1] [0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [1]),
        .Q(\dest_graysync_ff[1] [1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [2]),
        .Q(\dest_graysync_ff[1] [2]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][3] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [3]),
        .Q(\dest_graysync_ff[1] [3]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][4] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [4]),
        .Q(\dest_graysync_ff[1] [4]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "GRAY" *) 
  FDRE \dest_graysync_ff_reg[1][5] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\dest_graysync_ff[0] [5]),
        .Q(\dest_graysync_ff[1] [5]),
        .R(1'b0));
  LUT6 #(
    .INIT(64'h6996966996696996)) 
    \dest_out_bin[0]_INST_0 
       (.I0(\dest_graysync_ff[1] [0]),
        .I1(\dest_graysync_ff[1] [2]),
        .I2(\dest_graysync_ff[1] [4]),
        .I3(\dest_graysync_ff[1] [5]),
        .I4(\dest_graysync_ff[1] [3]),
        .I5(\dest_graysync_ff[1] [1]),
        .O(\^dest_out_bin [0]));
  LUT5 #(
    .INIT(32'h96696996)) 
    \dest_out_bin[1]_INST_0 
       (.I0(\dest_graysync_ff[1] [1]),
        .I1(\dest_graysync_ff[1] [3]),
        .I2(\dest_graysync_ff[1] [5]),
        .I3(\dest_graysync_ff[1] [4]),
        .I4(\dest_graysync_ff[1] [2]),
        .O(\^dest_out_bin [1]));
  LUT4 #(
    .INIT(16'h6996)) 
    \dest_out_bin[2]_INST_0 
       (.I0(\dest_graysync_ff[1] [2]),
        .I1(\dest_graysync_ff[1] [4]),
        .I2(\dest_graysync_ff[1] [5]),
        .I3(\dest_graysync_ff[1] [3]),
        .O(\^dest_out_bin [2]));
  LUT3 #(
    .INIT(8'h96)) 
    \dest_out_bin[3]_INST_0 
       (.I0(\dest_graysync_ff[1] [3]),
        .I1(\dest_graysync_ff[1] [5]),
        .I2(\dest_graysync_ff[1] [4]),
        .O(\^dest_out_bin [3]));
  LUT2 #(
    .INIT(4'h6)) 
    \dest_out_bin[4]_INST_0 
       (.I0(\dest_graysync_ff[1] [4]),
        .I1(\dest_graysync_ff[1] [5]),
        .O(\^dest_out_bin [4]));
  (* SOFT_HLUTNM = "soft_lutpair231" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[0]_i_1 
       (.I0(src_in_bin[1]),
        .I1(src_in_bin[0]),
        .O(gray_enc[0]));
  (* SOFT_HLUTNM = "soft_lutpair231" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[1]_i_1 
       (.I0(src_in_bin[2]),
        .I1(src_in_bin[1]),
        .O(gray_enc[1]));
  (* SOFT_HLUTNM = "soft_lutpair232" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[2]_i_1 
       (.I0(src_in_bin[3]),
        .I1(src_in_bin[2]),
        .O(gray_enc[2]));
  (* SOFT_HLUTNM = "soft_lutpair232" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[3]_i_1 
       (.I0(src_in_bin[4]),
        .I1(src_in_bin[3]),
        .O(gray_enc[3]));
  LUT2 #(
    .INIT(4'h6)) 
    \src_gray_ff[4]_i_1 
       (.I0(src_in_bin[5]),
        .I1(src_in_bin[4]),
        .O(gray_enc[4]));
  FDRE \src_gray_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[0]),
        .Q(async_path[0]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[1] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[1]),
        .Q(async_path[1]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[2] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[2]),
        .Q(async_path[2]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[3] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[3]),
        .Q(async_path[3]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[4] 
       (.C(src_clk),
        .CE(1'b1),
        .D(gray_enc[4]),
        .Q(async_path[4]),
        .R(1'b0));
  FDRE \src_gray_ff_reg[5] 
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in_bin[5]),
        .Q(async_path[5]),
        .R(1'b0));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) (* VERSION = "0" *) 
(* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__220 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__219 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "2" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__parameterized0
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [1:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [1:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire [1:0]dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire p_0_in;
  wire [1:0]src_hsdata_ff;
  wire [1:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[1:0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[0]),
        .Q(dest_hsdata_ff[0]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[1] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[1]),
        .Q(dest_hsdata_ff[1]),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT1 #(
    .INIT(2'h1)) 
    \src_hsdata_ff[1]_i_1 
       (.I0(src_sendd_ff),
        .O(p_0_in));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[0]),
        .Q(src_hsdata_ff[0]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[1] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[1]),
        .Q(src_hsdata_ff[1]),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__148 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__147 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "26" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__parameterized1
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [25:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [25:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire [25:0]dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire p_0_in;
  wire [25:0]src_hsdata_ff;
  wire [25:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[25:0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[0]),
        .Q(dest_hsdata_ff[0]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[10] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[10]),
        .Q(dest_hsdata_ff[10]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[11] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[11]),
        .Q(dest_hsdata_ff[11]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[12] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[12]),
        .Q(dest_hsdata_ff[12]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[13] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[13]),
        .Q(dest_hsdata_ff[13]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[14] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[14]),
        .Q(dest_hsdata_ff[14]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[15] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[15]),
        .Q(dest_hsdata_ff[15]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[16] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[16]),
        .Q(dest_hsdata_ff[16]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[17] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[17]),
        .Q(dest_hsdata_ff[17]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[18] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[18]),
        .Q(dest_hsdata_ff[18]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[19] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[19]),
        .Q(dest_hsdata_ff[19]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[1] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[1]),
        .Q(dest_hsdata_ff[1]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[20] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[20]),
        .Q(dest_hsdata_ff[20]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[21] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[21]),
        .Q(dest_hsdata_ff[21]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[22] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[22]),
        .Q(dest_hsdata_ff[22]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[23] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[23]),
        .Q(dest_hsdata_ff[23]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[24] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[24]),
        .Q(dest_hsdata_ff[24]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[25] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[25]),
        .Q(dest_hsdata_ff[25]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[2] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[2]),
        .Q(dest_hsdata_ff[2]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[3] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[3]),
        .Q(dest_hsdata_ff[3]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[4] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[4]),
        .Q(dest_hsdata_ff[4]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[5] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[5]),
        .Q(dest_hsdata_ff[5]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[6] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[6]),
        .Q(dest_hsdata_ff[6]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[7] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[7]),
        .Q(dest_hsdata_ff[7]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[8] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[8]),
        .Q(dest_hsdata_ff[8]),
        .R(1'b0));
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[9] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff[9]),
        .Q(dest_hsdata_ff[9]),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT1 #(
    .INIT(2'h1)) 
    \src_hsdata_ff[25]_i_1 
       (.I0(src_sendd_ff),
        .O(p_0_in));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[0]),
        .Q(src_hsdata_ff[0]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[10] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[10]),
        .Q(src_hsdata_ff[10]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[11] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[11]),
        .Q(src_hsdata_ff[11]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[12] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[12]),
        .Q(src_hsdata_ff[12]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[13] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[13]),
        .Q(src_hsdata_ff[13]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[14] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[14]),
        .Q(src_hsdata_ff[14]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[15] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[15]),
        .Q(src_hsdata_ff[15]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[16] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[16]),
        .Q(src_hsdata_ff[16]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[17] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[17]),
        .Q(src_hsdata_ff[17]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[18] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[18]),
        .Q(src_hsdata_ff[18]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[19] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[19]),
        .Q(src_hsdata_ff[19]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[1] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[1]),
        .Q(src_hsdata_ff[1]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[20] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[20]),
        .Q(src_hsdata_ff[20]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[21] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[21]),
        .Q(src_hsdata_ff[21]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[22] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[22]),
        .Q(src_hsdata_ff[22]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[23] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[23]),
        .Q(src_hsdata_ff[23]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[24] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[24]),
        .Q(src_hsdata_ff[24]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[25] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[25]),
        .Q(src_hsdata_ff[25]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[2] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[2]),
        .Q(src_hsdata_ff[2]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[3] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[3]),
        .Q(src_hsdata_ff[3]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[4] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[4]),
        .Q(src_hsdata_ff[4]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[5] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[5]),
        .Q(src_hsdata_ff[5]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[6] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[6]),
        .Q(src_hsdata_ff[6]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[7] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[7]),
        .Q(src_hsdata_ff[7]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[8] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[8]),
        .Q(src_hsdata_ff[8]),
        .R(1'b0));
  FDRE \src_hsdata_ff_reg[9] 
       (.C(dest_clk),
        .CE(p_0_in),
        .D(src_in[9]),
        .Q(src_hsdata_ff[9]),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__133 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__132 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__1
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__238 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__237 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__10
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__202 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__201 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__11
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__200 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__199 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__12
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__236 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__235 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__13
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__198 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__197 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__14
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__196 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__195 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__15
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__194 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__193 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__16
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__192 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__191 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__17
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__190 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__189 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__18
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__188 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__187 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__19
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__186 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__185 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__2
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__218 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__217 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__20
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__184 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__183 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__21
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__182 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__181 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__22
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__180 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__179 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__23
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__234 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__233 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__24
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__178 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__177 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__25
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__176 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__175 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__26
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__174 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__173 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__27
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__172 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__171 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__28
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_clk;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__170 xpm_cdc_single_dest2src_inst
       (.dest_clk(src_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__169 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__29
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_clk;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__168 xpm_cdc_single_dest2src_inst
       (.dest_clk(src_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__167 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__3
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__216 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__215 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__30
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__166 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__165 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__31
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__164 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__163 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__32
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_clk;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__162 xpm_cdc_single_dest2src_inst
       (.dest_clk(src_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__161 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__33
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_clk;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__160 xpm_cdc_single_dest2src_inst
       (.dest_clk(src_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__159 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__34
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__232 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__231 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__35
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_clk;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__158 xpm_cdc_single_dest2src_inst
       (.dest_clk(src_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__157 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__36
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_clk;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__156 xpm_cdc_single_dest2src_inst
       (.dest_clk(src_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__155 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__37
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_clk;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__154 xpm_cdc_single_dest2src_inst
       (.dest_clk(src_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__153 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__38
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_clk;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(src_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__152 xpm_cdc_single_dest2src_inst
       (.dest_clk(src_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__151 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__39
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__150 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__149 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__4
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__214 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__213 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__40
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__230 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__229 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__41
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__228 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__227 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__42
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__226 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__225 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__43
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__224 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__223 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__44
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__222 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__221 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__5
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__212 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__211 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__6
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__210 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__209 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__7
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__208 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__207 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__8
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__206 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__205 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_EXT_HSK = "0" *) (* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) 
(* ORIG_REF_NAME = "xpm_cdc_handshake" *) (* SIM_ASSERT_CHK = "0" *) (* SRC_SYNC_FF = "3" *) 
(* VERSION = "0" *) (* WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "HANDSHAKE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_handshake__xdcDup__9
   (src_clk,
    src_in,
    src_send,
    src_rcv,
    dest_clk,
    dest_out,
    dest_req,
    dest_ack);
  input src_clk;
  input [0:0]src_in;
  input src_send;
  output src_rcv;
  input dest_clk;
  output [0:0]dest_out;
  output dest_req;
  input dest_ack;

  wire dest_clk;
  (* DIRECT_ENABLE *) wire dest_hsdata_en;
  (* RTL_KEEP = "true" *) (* xpm_cdc = "HANDSHAKE" *) wire dest_hsdata_ff;
  wire dest_req;
  wire dest_req_ff;
  wire dest_req_nxt;
  wire src_hsdata_ff;
  wire \src_hsdata_ff[0]_i_1_n_0 ;
  wire [0:0]src_in;
  wire src_rcv;
  wire src_send;
  wire src_sendd_ff;

  assign dest_out[0] = dest_hsdata_ff;
  (* KEEP = "true" *) 
  (* XPM_CDC = "HANDSHAKE" *) 
  FDRE \dest_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(dest_hsdata_en),
        .D(src_hsdata_ff),
        .Q(dest_hsdata_ff),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h2)) 
    dest_req_ext_ff_i_1
       (.I0(dest_req_nxt),
        .I1(dest_req_ff),
        .O(dest_hsdata_en));
  FDRE dest_req_ext_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_hsdata_en),
        .Q(dest_req),
        .R(1'b0));
  FDRE dest_req_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_req_nxt),
        .Q(dest_req_ff),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hB8)) 
    \src_hsdata_ff[0]_i_1 
       (.I0(src_hsdata_ff),
        .I1(src_sendd_ff),
        .I2(src_in),
        .O(\src_hsdata_ff[0]_i_1_n_0 ));
  FDRE \src_hsdata_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(\src_hsdata_ff[0]_i_1_n_0 ),
        .Q(src_hsdata_ff),
        .R(1'b0));
  FDRE src_sendd_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_send),
        .Q(src_sendd_ff),
        .R(1'b0));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__204 xpm_cdc_single_dest2src_inst
       (.dest_clk(dest_clk),
        .dest_out(src_rcv),
        .src_clk(1'b0),
        .src_in(dest_req_ff));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__203 xpm_cdc_single_src2dest_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_req_nxt),
        .src_clk(1'b0),
        .src_in(src_sendd_ff));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* REG_OUTPUT = "0" *) 
(* RST_USED = "1" *) (* SIM_ASSERT_CHK = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "PULSE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_pulse
   (src_clk,
    src_pulse,
    dest_clk,
    src_rst,
    dest_rst,
    dest_pulse);
  input src_clk;
  input src_pulse;
  input dest_clk;
  input src_rst;
  input dest_rst;
  output dest_pulse;

  wire dest_clk;
  wire dest_event_ff;
  wire dest_event_ff_i_1_n_0;
  wire dest_pulse;
  wire dest_rst;
  wire dest_sync_out;
  wire src_clk;
  wire src_in_ff;
  wire src_level_ff;
  wire src_level_nxt;
  wire src_pulse;
  wire src_rst;

  (* SOFT_HLUTNM = "soft_lutpair228" *) 
  LUT2 #(
    .INIT(4'h2)) 
    dest_event_ff_i_1
       (.I0(dest_sync_out),
        .I1(dest_rst),
        .O(dest_event_ff_i_1_n_0));
  FDRE dest_event_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_event_ff_i_1_n_0),
        .Q(dest_event_ff),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair228" *) 
  LUT3 #(
    .INIT(8'h9A)) 
    dest_pulse_INST_0
       (.I0(dest_event_ff),
        .I1(dest_rst),
        .I2(dest_sync_out),
        .O(dest_pulse));
  FDRE src_in_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_pulse),
        .Q(src_in_ff),
        .R(src_rst));
  LUT3 #(
    .INIT(8'hB4)) 
    src_level_ff_i_1
       (.I0(src_in_ff),
        .I1(src_pulse),
        .I2(src_level_ff),
        .O(src_level_nxt));
  FDRE #(
    .INIT(1'b0)) 
    src_level_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_level_nxt),
        .Q(src_level_ff),
        .R(src_rst));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__134 xpm_cdc_single_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_sync_out),
        .src_clk(1'b0),
        .src_in(src_level_ff));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_pulse" *) 
(* REG_OUTPUT = "0" *) (* RST_USED = "1" *) (* SIM_ASSERT_CHK = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "PULSE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_pulse__xdcDup__1
   (src_clk,
    src_pulse,
    dest_clk,
    src_rst,
    dest_rst,
    dest_pulse);
  input src_clk;
  input src_pulse;
  input dest_clk;
  input src_rst;
  input dest_rst;
  output dest_pulse;

  wire dest_clk;
  wire dest_event_ff;
  wire dest_event_ff_i_1_n_0;
  wire dest_pulse;
  wire dest_rst;
  wire dest_sync_out;
  wire src_clk;
  wire src_in_ff;
  wire src_level_ff;
  wire src_level_nxt;
  wire src_pulse;
  wire src_rst;

  (* SOFT_HLUTNM = "soft_lutpair185" *) 
  LUT2 #(
    .INIT(4'h2)) 
    dest_event_ff_i_1
       (.I0(dest_sync_out),
        .I1(dest_rst),
        .O(dest_event_ff_i_1_n_0));
  FDRE dest_event_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_event_ff_i_1_n_0),
        .Q(dest_event_ff),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair185" *) 
  LUT3 #(
    .INIT(8'h9A)) 
    dest_pulse_INST_0
       (.I0(dest_event_ff),
        .I1(dest_rst),
        .I2(dest_sync_out),
        .O(dest_pulse));
  FDRE src_in_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_pulse),
        .Q(src_in_ff),
        .R(src_rst));
  LUT3 #(
    .INIT(8'hB4)) 
    src_level_ff_i_1
       (.I0(src_in_ff),
        .I1(src_pulse),
        .I2(src_level_ff),
        .O(src_level_nxt));
  FDRE #(
    .INIT(1'b0)) 
    src_level_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_level_nxt),
        .Q(src_level_ff),
        .R(src_rst));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__146 xpm_cdc_single_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_sync_out),
        .src_clk(1'b0),
        .src_in(src_level_ff));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_pulse" *) 
(* REG_OUTPUT = "0" *) (* RST_USED = "1" *) (* SIM_ASSERT_CHK = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "PULSE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_pulse__xdcDup__2
   (src_clk,
    src_pulse,
    dest_clk,
    src_rst,
    dest_rst,
    dest_pulse);
  input src_clk;
  input src_pulse;
  input dest_clk;
  input src_rst;
  input dest_rst;
  output dest_pulse;

  wire dest_clk;
  wire dest_event_ff;
  wire dest_event_ff_i_1_n_0;
  wire dest_pulse;
  wire dest_rst;
  wire dest_sync_out;
  wire src_clk;
  wire src_in_ff;
  wire src_level_ff;
  wire src_level_nxt;
  wire src_pulse;
  wire src_rst;

  (* SOFT_HLUTNM = "soft_lutpair225" *) 
  LUT2 #(
    .INIT(4'h2)) 
    dest_event_ff_i_1
       (.I0(dest_sync_out),
        .I1(dest_rst),
        .O(dest_event_ff_i_1_n_0));
  FDRE dest_event_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_event_ff_i_1_n_0),
        .Q(dest_event_ff),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair225" *) 
  LUT3 #(
    .INIT(8'h9A)) 
    dest_pulse_INST_0
       (.I0(dest_event_ff),
        .I1(dest_rst),
        .I2(dest_sync_out),
        .O(dest_pulse));
  FDRE src_in_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_pulse),
        .Q(src_in_ff),
        .R(src_rst));
  LUT3 #(
    .INIT(8'hB4)) 
    src_level_ff_i_1
       (.I0(src_in_ff),
        .I1(src_pulse),
        .I2(src_level_ff),
        .O(src_level_nxt));
  FDRE #(
    .INIT(1'b0)) 
    src_level_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_level_nxt),
        .Q(src_level_ff),
        .R(src_rst));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__137 xpm_cdc_single_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_sync_out),
        .src_clk(1'b0),
        .src_in(src_level_ff));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_pulse" *) 
(* REG_OUTPUT = "0" *) (* RST_USED = "1" *) (* SIM_ASSERT_CHK = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "PULSE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_pulse__xdcDup__3
   (src_clk,
    src_pulse,
    dest_clk,
    src_rst,
    dest_rst,
    dest_pulse);
  input src_clk;
  input src_pulse;
  input dest_clk;
  input src_rst;
  input dest_rst;
  output dest_pulse;

  wire dest_clk;
  wire dest_event_ff;
  wire dest_event_ff_i_1_n_0;
  wire dest_pulse;
  wire dest_rst;
  wire dest_sync_out;
  wire src_clk;
  wire src_in_ff;
  wire src_level_ff;
  wire src_level_nxt;
  wire src_pulse;
  wire src_rst;

  (* SOFT_HLUTNM = "soft_lutpair226" *) 
  LUT2 #(
    .INIT(4'h2)) 
    dest_event_ff_i_1
       (.I0(dest_sync_out),
        .I1(dest_rst),
        .O(dest_event_ff_i_1_n_0));
  FDRE dest_event_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_event_ff_i_1_n_0),
        .Q(dest_event_ff),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair226" *) 
  LUT3 #(
    .INIT(8'h9A)) 
    dest_pulse_INST_0
       (.I0(dest_event_ff),
        .I1(dest_rst),
        .I2(dest_sync_out),
        .O(dest_pulse));
  FDRE src_in_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_pulse),
        .Q(src_in_ff),
        .R(src_rst));
  LUT3 #(
    .INIT(8'hB4)) 
    src_level_ff_i_1
       (.I0(src_in_ff),
        .I1(src_pulse),
        .I2(src_level_ff),
        .O(src_level_nxt));
  FDRE #(
    .INIT(1'b0)) 
    src_level_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_level_nxt),
        .Q(src_level_ff),
        .R(src_rst));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__136 xpm_cdc_single_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_sync_out),
        .src_clk(1'b0),
        .src_in(src_level_ff));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_pulse" *) 
(* REG_OUTPUT = "0" *) (* RST_USED = "1" *) (* SIM_ASSERT_CHK = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "true" *) (* xpm_cdc = "PULSE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_pulse__xdcDup__4
   (src_clk,
    src_pulse,
    dest_clk,
    src_rst,
    dest_rst,
    dest_pulse);
  input src_clk;
  input src_pulse;
  input dest_clk;
  input src_rst;
  input dest_rst;
  output dest_pulse;

  wire dest_clk;
  wire dest_event_ff;
  wire dest_event_ff_i_1_n_0;
  wire dest_pulse;
  wire dest_rst;
  wire dest_sync_out;
  wire src_clk;
  wire src_in_ff;
  wire src_level_ff;
  wire src_level_nxt;
  wire src_pulse;
  wire src_rst;

  (* SOFT_HLUTNM = "soft_lutpair227" *) 
  LUT2 #(
    .INIT(4'h2)) 
    dest_event_ff_i_1
       (.I0(dest_sync_out),
        .I1(dest_rst),
        .O(dest_event_ff_i_1_n_0));
  FDRE dest_event_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(dest_event_ff_i_1_n_0),
        .Q(dest_event_ff),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair227" *) 
  LUT3 #(
    .INIT(8'h9A)) 
    dest_pulse_INST_0
       (.I0(dest_event_ff),
        .I1(dest_rst),
        .I2(dest_sync_out),
        .O(dest_pulse));
  FDRE src_in_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_pulse),
        .Q(src_in_ff),
        .R(src_rst));
  LUT3 #(
    .INIT(8'hB4)) 
    src_level_ff_i_1
       (.I0(src_in_ff),
        .I1(src_pulse),
        .I2(src_level_ff),
        .O(src_level_nxt));
  FDRE #(
    .INIT(1'b0)) 
    src_level_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_level_nxt),
        .Q(src_level_ff),
        .R(src_rst));
  (* DEST_SYNC_FF = "3" *) 
  (* INIT_SYNC_FF = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SRC_INPUT_REG = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SINGLE" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* is_du_within_envelope = "true" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__135 xpm_cdc_single_inst
       (.dest_clk(dest_clk),
        .dest_out(dest_sync_out),
        .src_clk(1'b0),
        .src_in(src_level_ff));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* SIM_ASSERT_CHK = "0" *) 
(* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) 
(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__132
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__133
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__134
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__135
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__136
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__137
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__138
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__139
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__140
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__141
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__142
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__143
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__144
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b1),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__145
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__146
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__147
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__148
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__149
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__150
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__151
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__152
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__153
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__154
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__155
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__156
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__157
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__158
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__159
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__160
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__161
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__162
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__163
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__164
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__165
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__166
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__167
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__168
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__169
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__170
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__171
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__172
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__173
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__174
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__175
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__176
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__177
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__178
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__179
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__180
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__181
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__182
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__183
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__184
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__185
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__186
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__187
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__188
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__189
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__190
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__191
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__192
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__193
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__194
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__195
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__196
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__197
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__198
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__199
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__200
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__201
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__202
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__203
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__204
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__205
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__206
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__207
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__208
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__209
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__210
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__211
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__212
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__213
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__214
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__215
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__216
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__217
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__218
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__219
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__220
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__221
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__222
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__223
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__224
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__225
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__226
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__227
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__228
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__229
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__230
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__231
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__232
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__233
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__234
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__235
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__236
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__237
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__238
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__239
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__240
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__241
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__242
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__243
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__244
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__245
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__246
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__247
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__248
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__249
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__250
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__251
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__252
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__253
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__254
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__255
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__256
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__257
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__258
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__259
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__260
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__261
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__262
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__263
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__264
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "1" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__parameterized0
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire [0:0]p_0_in;
  wire src_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  FDRE src_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(p_0_in),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(p_0_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "1" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__parameterized0__3
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire [0:0]p_0_in;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  FDRE src_ff_reg
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(p_0_in),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(p_0_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEST_SYNC_FF = "3" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) 
(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "1" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SINGLE" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_single__parameterized0__4
   (src_clk,
    src_in,
    dest_clk,
    dest_out);
  input src_clk;
  input src_in;
  input dest_clk;
  output dest_out;

  wire dest_clk;
  wire [0:0]p_0_in;
  wire src_clk;
  wire src_in;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [2:0]syncstages_ff;

  assign dest_out = syncstages_ff[2];
  FDRE src_ff_reg
       (.C(src_clk),
        .CE(1'b1),
        .D(src_in),
        .Q(p_0_in),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(p_0_in),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SINGLE" *) 
  FDRE \syncstages_ff_reg[2] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[1]),
        .Q(syncstages_ff[2]),
        .R(1'b0));
endmodule

(* DEF_VAL = "1'b0" *) (* DEST_SYNC_FF = "2" *) (* INIT = "0" *) 
(* INIT_SYNC_FF = "1" *) (* SIM_ASSERT_CHK = "0" *) (* VERSION = "0" *) 
(* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "SYNC_RST" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_sync_rst
   (src_rst,
    dest_clk,
    dest_rst);
  input src_rst;
  input dest_clk;
  output dest_rst;

  wire dest_clk;
  wire src_rst;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SYNC_RST" *) wire [1:0]syncstages_ff;

  assign dest_rst = syncstages_ff[1];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  FDRE #(
    .INIT(1'b0)) 
    \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_rst),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  FDRE #(
    .INIT(1'b0)) 
    \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
endmodule

(* DEF_VAL = "1'b0" *) (* DEST_SYNC_FF = "2" *) (* INIT = "0" *) 
(* INIT_SYNC_FF = "1" *) (* ORIG_REF_NAME = "xpm_cdc_sync_rst" *) (* SIM_ASSERT_CHK = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SYNC_RST" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_sync_rst__4
   (src_rst,
    dest_clk,
    dest_rst);
  input src_rst;
  input dest_clk;
  output dest_rst;

  wire dest_clk;
  wire src_rst;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SYNC_RST" *) wire [1:0]syncstages_ff;

  assign dest_rst = syncstages_ff[1];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  FDRE #(
    .INIT(1'b0)) 
    \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_rst),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  FDRE #(
    .INIT(1'b0)) 
    \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
endmodule

(* DEF_VAL = "1'b0" *) (* DEST_SYNC_FF = "2" *) (* INIT = "0" *) 
(* INIT_SYNC_FF = "1" *) (* ORIG_REF_NAME = "xpm_cdc_sync_rst" *) (* SIM_ASSERT_CHK = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SYNC_RST" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_sync_rst__5
   (src_rst,
    dest_clk,
    dest_rst);
  input src_rst;
  input dest_clk;
  output dest_rst;

  wire dest_clk;
  wire src_rst;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SYNC_RST" *) wire [1:0]syncstages_ff;

  assign dest_rst = syncstages_ff[1];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  FDRE #(
    .INIT(1'b0)) 
    \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_rst),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  FDRE #(
    .INIT(1'b0)) 
    \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
endmodule

(* DEF_VAL = "1'b0" *) (* DEST_SYNC_FF = "2" *) (* INIT = "0" *) 
(* INIT_SYNC_FF = "1" *) (* ORIG_REF_NAME = "xpm_cdc_sync_rst" *) (* SIM_ASSERT_CHK = "0" *) 
(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "true" *) 
(* xpm_cdc = "SYNC_RST" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_sync_rst__6
   (src_rst,
    dest_clk,
    dest_rst);
  input src_rst;
  input dest_clk;
  output dest_rst;

  wire dest_clk;
  wire src_rst;
  (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SYNC_RST" *) wire [1:0]syncstages_ff;

  assign dest_rst = syncstages_ff[1];
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  FDRE #(
    .INIT(1'b0)) 
    \syncstages_ff_reg[0] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(src_rst),
        .Q(syncstages_ff[0]),
        .R(1'b0));
  (* ASYNC_REG *) 
  (* KEEP = "true" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  FDRE #(
    .INIT(1'b0)) 
    \syncstages_ff_reg[1] 
       (.C(dest_clk),
        .CE(1'b1),
        .D(syncstages_ff[0]),
        .Q(syncstages_ff[1]),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0
   (ram_full_i0,
    leaving_empty0,
    enb,
    Q,
    E,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ,
    \count_value_i_reg[0]_0 ,
    rd_en,
    ram_empty_i,
    \count_value_i_reg[3]_0 ,
    rd_clk);
  output ram_full_i0;
  output leaving_empty0;
  output enb;
  output [3:0]Q;
  input [0:0]E;
  input \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ;
  input [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ;
  input [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ;
  input [1:0]\count_value_i_reg[0]_0 ;
  input rd_en;
  input ram_empty_i;
  input [0:0]\count_value_i_reg[3]_0 ;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__1_n_0 ;
  wire \count_value_i[1]_i_1__1_n_0 ;
  wire \count_value_i[2]_i_1__1_n_0 ;
  wire \count_value_i[3]_i_1__1_n_0 ;
  wire [1:0]\count_value_i_reg[0]_0 ;
  wire [0:0]\count_value_i_reg[3]_0 ;
  wire enb;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ;
  wire [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ;
  wire [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ;
  wire going_full1;
  wire leaving_empty0;
  wire ram_empty_i;
  wire ram_full_i0;
  wire rd_clk;
  wire rd_en;

  (* SOFT_HLUTNM = "soft_lutpair310" *) 
  LUT4 #(
    .INIT(16'h10EF)) 
    \count_value_i[0]_i_1__1 
       (.I0(rd_en),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(\count_value_i_reg[0]_0 [1]),
        .I3(Q[0]),
        .O(\count_value_i[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair310" *) 
  LUT5 #(
    .INIT(32'h02FFFD00)) 
    \count_value_i[1]_i_1__1 
       (.I0(\count_value_i_reg[0]_0 [1]),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(rd_en),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\count_value_i[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair311" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair311" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[0]_i_1__1_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[1]_i_1__1_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[2]_i_1__1_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[3]_i_1__1_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[3]_0 ));
  LUT5 #(
    .INIT(32'h0FFF0088)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_1 
       (.I0(E),
        .I1(going_full1),
        .I2(leaving_empty0),
        .I3(enb),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ),
        .O(ram_full_i0));
  (* SOFT_HLUTNM = "soft_lutpair312" *) 
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [3]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ),
        .O(going_full1));
  (* SOFT_HLUTNM = "soft_lutpair312" *) 
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [3]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ),
        .O(leaving_empty0));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [0]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [0]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h00FD)) 
    \gen_sdpram.xpm_memory_base_inst_i_2 
       (.I0(\count_value_i_reg[0]_0 [1]),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(rd_en),
        .I3(ram_empty_i),
        .O(enb));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_133
   (ram_empty_i0,
    Q,
    enb,
    leaving_empty0,
    E,
    ram_empty_i,
    \gen_pntr_flags_cc.ram_empty_i_reg ,
    \count_value_i_reg[0]_0 ,
    rd_clk);
  output ram_empty_i0;
  output [3:0]Q;
  input enb;
  input leaving_empty0;
  input [0:0]E;
  input ram_empty_i;
  input [3:0]\gen_pntr_flags_cc.ram_empty_i_reg ;
  input [0:0]\count_value_i_reg[0]_0 ;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1_n_0 ;
  wire \count_value_i[1]_i_1_n_0 ;
  wire \count_value_i[2]_i_1_n_0 ;
  wire \count_value_i[3]_i_1_n_0 ;
  wire [0:0]\count_value_i_reg[0]_0 ;
  wire enb;
  wire \gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ;
  wire [3:0]\gen_pntr_flags_cc.ram_empty_i_reg ;
  wire going_empty1;
  wire leaving_empty0;
  wire ram_empty_i;
  wire ram_empty_i0;
  wire rd_clk;

  (* SOFT_HLUTNM = "soft_lutpair315" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair315" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair314" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair314" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[0]_0 ));
  LUT5 #(
    .INIT(32'h0FFF0088)) 
    \gen_pntr_flags_cc.ram_empty_i_i_1 
       (.I0(enb),
        .I1(going_empty1),
        .I2(leaving_empty0),
        .I3(E),
        .I4(ram_empty_i),
        .O(ram_empty_i0));
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ram_empty_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ram_empty_i_reg [3]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ),
        .O(going_empty1));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ram_empty_i_i_3 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ram_empty_i_reg [0]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_reg [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ram_empty_i_reg [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_136
   (ram_full_i0,
    leaving_empty0,
    enb,
    Q,
    E,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ,
    \count_value_i_reg[0]_0 ,
    rd_en,
    ram_empty_i,
    \count_value_i_reg[3]_0 ,
    rd_clk);
  output ram_full_i0;
  output leaving_empty0;
  output enb;
  output [3:0]Q;
  input [0:0]E;
  input \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ;
  input [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ;
  input [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ;
  input [1:0]\count_value_i_reg[0]_0 ;
  input rd_en;
  input ram_empty_i;
  input [0:0]\count_value_i_reg[3]_0 ;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__1_n_0 ;
  wire \count_value_i[1]_i_1__1_n_0 ;
  wire \count_value_i[2]_i_1__1_n_0 ;
  wire \count_value_i[3]_i_1__1_n_0 ;
  wire [1:0]\count_value_i_reg[0]_0 ;
  wire [0:0]\count_value_i_reg[3]_0 ;
  wire enb;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ;
  wire [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ;
  wire [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ;
  wire going_full1;
  wire leaving_empty0;
  wire ram_empty_i;
  wire ram_full_i0;
  wire rd_clk;
  wire rd_en;

  (* SOFT_HLUTNM = "soft_lutpair295" *) 
  LUT4 #(
    .INIT(16'h10EF)) 
    \count_value_i[0]_i_1__1 
       (.I0(rd_en),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(\count_value_i_reg[0]_0 [1]),
        .I3(Q[0]),
        .O(\count_value_i[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair295" *) 
  LUT5 #(
    .INIT(32'h02FFFD00)) 
    \count_value_i[1]_i_1__1 
       (.I0(\count_value_i_reg[0]_0 [1]),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(rd_en),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\count_value_i[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair296" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair296" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[0]_i_1__1_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[1]_i_1__1_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[2]_i_1__1_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[3]_i_1__1_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[3]_0 ));
  LUT5 #(
    .INIT(32'h0FFF0088)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_1 
       (.I0(E),
        .I1(going_full1),
        .I2(leaving_empty0),
        .I3(enb),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ),
        .O(ram_full_i0));
  (* SOFT_HLUTNM = "soft_lutpair297" *) 
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [3]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ),
        .O(going_full1));
  (* SOFT_HLUTNM = "soft_lutpair297" *) 
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [3]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ),
        .O(leaving_empty0));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [0]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [0]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h00FD)) 
    \gen_sdpram.xpm_memory_base_inst_i_2 
       (.I0(\count_value_i_reg[0]_0 [1]),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(rd_en),
        .I3(ram_empty_i),
        .O(enb));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_139
   (ram_empty_i0,
    Q,
    enb,
    leaving_empty0,
    E,
    ram_empty_i,
    \gen_pntr_flags_cc.ram_empty_i_reg ,
    \count_value_i_reg[0]_0 ,
    rd_clk);
  output ram_empty_i0;
  output [3:0]Q;
  input enb;
  input leaving_empty0;
  input [0:0]E;
  input ram_empty_i;
  input [3:0]\gen_pntr_flags_cc.ram_empty_i_reg ;
  input [0:0]\count_value_i_reg[0]_0 ;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1_n_0 ;
  wire \count_value_i[1]_i_1_n_0 ;
  wire \count_value_i[2]_i_1_n_0 ;
  wire \count_value_i[3]_i_1_n_0 ;
  wire [0:0]\count_value_i_reg[0]_0 ;
  wire enb;
  wire \gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ;
  wire [3:0]\gen_pntr_flags_cc.ram_empty_i_reg ;
  wire going_empty1;
  wire leaving_empty0;
  wire ram_empty_i;
  wire ram_empty_i0;
  wire rd_clk;

  (* SOFT_HLUTNM = "soft_lutpair300" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair300" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair299" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair299" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[0]_0 ));
  LUT5 #(
    .INIT(32'h0FFF0088)) 
    \gen_pntr_flags_cc.ram_empty_i_i_1 
       (.I0(enb),
        .I1(going_empty1),
        .I2(leaving_empty0),
        .I3(E),
        .I4(ram_empty_i),
        .O(ram_empty_i0));
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ram_empty_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ram_empty_i_reg [3]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ),
        .O(going_empty1));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ram_empty_i_i_3 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ram_empty_i_reg [0]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_reg [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ram_empty_i_reg [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_142
   (ram_full_i0,
    leaving_empty0,
    enb,
    Q,
    E,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ,
    \count_value_i_reg[0]_0 ,
    rd_en,
    ram_empty_i,
    \count_value_i_reg[3]_0 ,
    rd_clk);
  output ram_full_i0;
  output leaving_empty0;
  output enb;
  output [3:0]Q;
  input [0:0]E;
  input \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ;
  input [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ;
  input [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ;
  input [1:0]\count_value_i_reg[0]_0 ;
  input rd_en;
  input ram_empty_i;
  input [0:0]\count_value_i_reg[3]_0 ;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__1_n_0 ;
  wire \count_value_i[1]_i_1__1_n_0 ;
  wire \count_value_i[2]_i_1__1_n_0 ;
  wire \count_value_i[3]_i_1__1_n_0 ;
  wire [1:0]\count_value_i_reg[0]_0 ;
  wire [0:0]\count_value_i_reg[3]_0 ;
  wire enb;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ;
  wire [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ;
  wire [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ;
  wire going_full1;
  wire leaving_empty0;
  wire ram_empty_i;
  wire ram_full_i0;
  wire rd_clk;
  wire rd_en;

  (* SOFT_HLUTNM = "soft_lutpair285" *) 
  LUT4 #(
    .INIT(16'h10EF)) 
    \count_value_i[0]_i_1__1 
       (.I0(rd_en),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(\count_value_i_reg[0]_0 [1]),
        .I3(Q[0]),
        .O(\count_value_i[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair285" *) 
  LUT5 #(
    .INIT(32'h02FFFD00)) 
    \count_value_i[1]_i_1__1 
       (.I0(\count_value_i_reg[0]_0 [1]),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(rd_en),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\count_value_i[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair286" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair286" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[0]_i_1__1_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[1]_i_1__1_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[2]_i_1__1_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(enb),
        .D(\count_value_i[3]_i_1__1_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[3]_0 ));
  LUT5 #(
    .INIT(32'h0FFF0088)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_1 
       (.I0(E),
        .I1(going_full1),
        .I2(leaving_empty0),
        .I3(enb),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ),
        .O(ram_full_i0));
  (* SOFT_HLUTNM = "soft_lutpair287" *) 
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [3]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ),
        .O(going_full1));
  (* SOFT_HLUTNM = "soft_lutpair287" *) 
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [3]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ),
        .O(leaving_empty0));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [0]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [0]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h00FD)) 
    \gen_sdpram.xpm_memory_base_inst_i_2 
       (.I0(\count_value_i_reg[0]_0 [1]),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(rd_en),
        .I3(ram_empty_i),
        .O(enb));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_145
   (ram_empty_i0,
    Q,
    enb,
    leaving_empty0,
    E,
    ram_empty_i,
    \gen_pntr_flags_cc.ram_empty_i_reg ,
    \count_value_i_reg[0]_0 ,
    rd_clk);
  output ram_empty_i0;
  output [3:0]Q;
  input enb;
  input leaving_empty0;
  input [0:0]E;
  input ram_empty_i;
  input [3:0]\gen_pntr_flags_cc.ram_empty_i_reg ;
  input [0:0]\count_value_i_reg[0]_0 ;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1_n_0 ;
  wire \count_value_i[1]_i_1_n_0 ;
  wire \count_value_i[2]_i_1_n_0 ;
  wire \count_value_i[3]_i_1_n_0 ;
  wire [0:0]\count_value_i_reg[0]_0 ;
  wire enb;
  wire \gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ;
  wire [3:0]\gen_pntr_flags_cc.ram_empty_i_reg ;
  wire going_empty1;
  wire leaving_empty0;
  wire ram_empty_i;
  wire ram_empty_i0;
  wire rd_clk;

  (* SOFT_HLUTNM = "soft_lutpair290" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair290" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair289" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair289" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[0]_0 ));
  LUT5 #(
    .INIT(32'h0FFF0088)) 
    \gen_pntr_flags_cc.ram_empty_i_i_1 
       (.I0(enb),
        .I1(going_empty1),
        .I2(leaving_empty0),
        .I3(E),
        .I4(ram_empty_i),
        .O(ram_empty_i0));
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ram_empty_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ram_empty_i_reg [3]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ),
        .O(going_empty1));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ram_empty_i_i_3 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ram_empty_i_reg [0]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_reg [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ram_empty_i_reg [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_148
   (ram_full_i0,
    leaving_empty0,
    enb,
    Q,
    E,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ,
    \count_value_i_reg[0]_0 ,
    rd_en,
    ram_empty_i,
    \count_value_i_reg[3]_0 ,
    wr_clk);
  output ram_full_i0;
  output leaving_empty0;
  output enb;
  output [3:0]Q;
  input [0:0]E;
  input \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ;
  input [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ;
  input [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ;
  input [1:0]\count_value_i_reg[0]_0 ;
  input rd_en;
  input ram_empty_i;
  input [0:0]\count_value_i_reg[3]_0 ;
  input wr_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__1_n_0 ;
  wire \count_value_i[1]_i_1__1_n_0 ;
  wire \count_value_i[2]_i_1__1_n_0 ;
  wire \count_value_i[3]_i_1__1_n_0 ;
  wire [1:0]\count_value_i_reg[0]_0 ;
  wire [0:0]\count_value_i_reg[3]_0 ;
  wire enb;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ;
  wire [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 ;
  wire [3:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ;
  wire going_full1;
  wire leaving_empty0;
  wire ram_empty_i;
  wire ram_full_i0;
  wire rd_en;
  wire wr_clk;

  (* SOFT_HLUTNM = "soft_lutpair275" *) 
  LUT4 #(
    .INIT(16'h10EF)) 
    \count_value_i[0]_i_1__1 
       (.I0(rd_en),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(\count_value_i_reg[0]_0 [1]),
        .I3(Q[0]),
        .O(\count_value_i[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair275" *) 
  LUT5 #(
    .INIT(32'h02FFFD00)) 
    \count_value_i[1]_i_1__1 
       (.I0(\count_value_i_reg[0]_0 [1]),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(rd_en),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\count_value_i[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair276" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair276" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(wr_clk),
        .CE(enb),
        .D(\count_value_i[0]_i_1__1_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(wr_clk),
        .CE(enb),
        .D(\count_value_i[1]_i_1__1_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(wr_clk),
        .CE(enb),
        .D(\count_value_i[2]_i_1__1_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(wr_clk),
        .CE(enb),
        .D(\count_value_i[3]_i_1__1_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[3]_0 ));
  LUT5 #(
    .INIT(32'h0FFF0088)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_1 
       (.I0(E),
        .I1(going_full1),
        .I2(leaving_empty0),
        .I3(enb),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ),
        .O(ram_full_i0));
  (* SOFT_HLUTNM = "soft_lutpair277" *) 
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [3]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ),
        .O(going_full1));
  (* SOFT_HLUTNM = "soft_lutpair277" *) 
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [3]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ),
        .O(leaving_empty0));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [0]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [0]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h00FD)) 
    \gen_sdpram.xpm_memory_base_inst_i_2 
       (.I0(\count_value_i_reg[0]_0 [1]),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(rd_en),
        .I3(ram_empty_i),
        .O(enb));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_151
   (ram_empty_i0,
    Q,
    enb,
    leaving_empty0,
    E,
    ram_empty_i,
    \gen_pntr_flags_cc.ram_empty_i_reg ,
    \count_value_i_reg[0]_0 ,
    wr_clk);
  output ram_empty_i0;
  output [3:0]Q;
  input enb;
  input leaving_empty0;
  input [0:0]E;
  input ram_empty_i;
  input [3:0]\gen_pntr_flags_cc.ram_empty_i_reg ;
  input [0:0]\count_value_i_reg[0]_0 ;
  input wr_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1_n_0 ;
  wire \count_value_i[1]_i_1_n_0 ;
  wire \count_value_i[2]_i_1_n_0 ;
  wire \count_value_i[3]_i_1_n_0 ;
  wire [0:0]\count_value_i_reg[0]_0 ;
  wire enb;
  wire \gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ;
  wire [3:0]\gen_pntr_flags_cc.ram_empty_i_reg ;
  wire going_empty1;
  wire leaving_empty0;
  wire ram_empty_i;
  wire ram_empty_i0;
  wire wr_clk;

  (* SOFT_HLUTNM = "soft_lutpair280" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair280" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair279" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair279" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[0]_0 ));
  LUT5 #(
    .INIT(32'h0FFF0088)) 
    \gen_pntr_flags_cc.ram_empty_i_i_1 
       (.I0(enb),
        .I1(going_empty1),
        .I2(leaving_empty0),
        .I3(E),
        .I4(ram_empty_i),
        .O(ram_empty_i0));
  LUT3 #(
    .INIT(8'h90)) 
    \gen_pntr_flags_cc.ram_empty_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ram_empty_i_reg [3]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ),
        .O(going_empty1));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ram_empty_i_i_3 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ram_empty_i_reg [0]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_reg [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ram_empty_i_reg [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1
   (Q,
    \count_value_i_reg[1]_0 ,
    rd_en,
    \count_value_i_reg[1]_1 ,
    E,
    rd_clk);
  output [3:0]Q;
  input [1:0]\count_value_i_reg[1]_0 ;
  input rd_en;
  input [0:0]\count_value_i_reg[1]_1 ;
  input [0:0]E;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__2_n_0 ;
  wire \count_value_i[1]_i_1__2_n_0 ;
  wire \count_value_i[2]_i_1__2_n_0 ;
  wire \count_value_i[3]_i_1__2_n_0 ;
  wire [1:0]\count_value_i_reg[1]_0 ;
  wire [0:0]\count_value_i_reg[1]_1 ;
  wire rd_clk;
  wire rd_en;

  LUT4 #(
    .INIT(16'h10EF)) 
    \count_value_i[0]_i_1__2 
       (.I0(rd_en),
        .I1(\count_value_i_reg[1]_0 [0]),
        .I2(\count_value_i_reg[1]_0 [1]),
        .I3(Q[0]),
        .O(\count_value_i[0]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'h02FFFD00)) 
    \count_value_i[1]_i_1__2 
       (.I0(\count_value_i_reg[1]_0 [1]),
        .I1(\count_value_i_reg[1]_0 [0]),
        .I2(rd_en),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\count_value_i[1]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair313" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__2 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair313" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__2 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__2_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__2_n_0 ),
        .Q(Q[0]),
        .S(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__2_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__2_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__2_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[1]_1 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_134
   (Q,
    \count_value_i_reg[1]_0 ,
    E,
    rd_clk);
  output [3:0]Q;
  input [0:0]\count_value_i_reg[1]_0 ;
  input [0:0]E;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__0_n_0 ;
  wire \count_value_i[1]_i_1__0_n_0 ;
  wire \count_value_i[2]_i_1__0_n_0 ;
  wire \count_value_i[3]_i_1__0_n_0 ;
  wire [0:0]\count_value_i_reg[1]_0 ;
  wire rd_clk;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__0 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1__0_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair316" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair316" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__0 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__0_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__0_n_0 ),
        .Q(Q[0]),
        .S(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__0_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__0_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__0_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[1]_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_137
   (Q,
    \count_value_i_reg[1]_0 ,
    rd_en,
    \count_value_i_reg[1]_1 ,
    E,
    rd_clk);
  output [3:0]Q;
  input [1:0]\count_value_i_reg[1]_0 ;
  input rd_en;
  input [0:0]\count_value_i_reg[1]_1 ;
  input [0:0]E;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__2_n_0 ;
  wire \count_value_i[1]_i_1__2_n_0 ;
  wire \count_value_i[2]_i_1__2_n_0 ;
  wire \count_value_i[3]_i_1__2_n_0 ;
  wire [1:0]\count_value_i_reg[1]_0 ;
  wire [0:0]\count_value_i_reg[1]_1 ;
  wire rd_clk;
  wire rd_en;

  LUT4 #(
    .INIT(16'h10EF)) 
    \count_value_i[0]_i_1__2 
       (.I0(rd_en),
        .I1(\count_value_i_reg[1]_0 [0]),
        .I2(\count_value_i_reg[1]_0 [1]),
        .I3(Q[0]),
        .O(\count_value_i[0]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'h02FFFD00)) 
    \count_value_i[1]_i_1__2 
       (.I0(\count_value_i_reg[1]_0 [1]),
        .I1(\count_value_i_reg[1]_0 [0]),
        .I2(rd_en),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\count_value_i[1]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair298" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__2 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair298" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__2 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__2_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__2_n_0 ),
        .Q(Q[0]),
        .S(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__2_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__2_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__2_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[1]_1 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_140
   (Q,
    \count_value_i_reg[1]_0 ,
    E,
    rd_clk);
  output [3:0]Q;
  input [0:0]\count_value_i_reg[1]_0 ;
  input [0:0]E;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__0_n_0 ;
  wire \count_value_i[1]_i_1__0_n_0 ;
  wire \count_value_i[2]_i_1__0_n_0 ;
  wire \count_value_i[3]_i_1__0_n_0 ;
  wire [0:0]\count_value_i_reg[1]_0 ;
  wire rd_clk;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__0 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1__0_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair301" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair301" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__0 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__0_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__0_n_0 ),
        .Q(Q[0]),
        .S(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__0_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__0_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__0_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[1]_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_143
   (Q,
    \count_value_i_reg[1]_0 ,
    rd_en,
    \count_value_i_reg[1]_1 ,
    E,
    rd_clk);
  output [3:0]Q;
  input [1:0]\count_value_i_reg[1]_0 ;
  input rd_en;
  input [0:0]\count_value_i_reg[1]_1 ;
  input [0:0]E;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__2_n_0 ;
  wire \count_value_i[1]_i_1__2_n_0 ;
  wire \count_value_i[2]_i_1__2_n_0 ;
  wire \count_value_i[3]_i_1__2_n_0 ;
  wire [1:0]\count_value_i_reg[1]_0 ;
  wire [0:0]\count_value_i_reg[1]_1 ;
  wire rd_clk;
  wire rd_en;

  LUT4 #(
    .INIT(16'h10EF)) 
    \count_value_i[0]_i_1__2 
       (.I0(rd_en),
        .I1(\count_value_i_reg[1]_0 [0]),
        .I2(\count_value_i_reg[1]_0 [1]),
        .I3(Q[0]),
        .O(\count_value_i[0]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'h02FFFD00)) 
    \count_value_i[1]_i_1__2 
       (.I0(\count_value_i_reg[1]_0 [1]),
        .I1(\count_value_i_reg[1]_0 [0]),
        .I2(rd_en),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\count_value_i[1]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair288" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__2 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair288" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__2 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__2_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__2_n_0 ),
        .Q(Q[0]),
        .S(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__2_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__2_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__2_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[1]_1 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_146
   (Q,
    \count_value_i_reg[1]_0 ,
    E,
    rd_clk);
  output [3:0]Q;
  input [0:0]\count_value_i_reg[1]_0 ;
  input [0:0]E;
  input rd_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__0_n_0 ;
  wire \count_value_i[1]_i_1__0_n_0 ;
  wire \count_value_i[2]_i_1__0_n_0 ;
  wire \count_value_i[3]_i_1__0_n_0 ;
  wire [0:0]\count_value_i_reg[1]_0 ;
  wire rd_clk;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__0 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1__0_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair291" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair291" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__0 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__0_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__0_n_0 ),
        .Q(Q[0]),
        .S(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__0_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__0_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__0_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[1]_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_149
   (Q,
    \count_value_i_reg[1]_0 ,
    rd_en,
    \count_value_i_reg[1]_1 ,
    E,
    wr_clk);
  output [3:0]Q;
  input [1:0]\count_value_i_reg[1]_0 ;
  input rd_en;
  input [0:0]\count_value_i_reg[1]_1 ;
  input [0:0]E;
  input wr_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__2_n_0 ;
  wire \count_value_i[1]_i_1__2_n_0 ;
  wire \count_value_i[2]_i_1__2_n_0 ;
  wire \count_value_i[3]_i_1__2_n_0 ;
  wire [1:0]\count_value_i_reg[1]_0 ;
  wire [0:0]\count_value_i_reg[1]_1 ;
  wire rd_en;
  wire wr_clk;

  LUT4 #(
    .INIT(16'h10EF)) 
    \count_value_i[0]_i_1__2 
       (.I0(rd_en),
        .I1(\count_value_i_reg[1]_0 [0]),
        .I2(\count_value_i_reg[1]_0 [1]),
        .I3(Q[0]),
        .O(\count_value_i[0]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'h02FFFD00)) 
    \count_value_i[1]_i_1__2 
       (.I0(\count_value_i_reg[1]_0 [1]),
        .I1(\count_value_i_reg[1]_0 [0]),
        .I2(rd_en),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\count_value_i[1]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair278" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__2 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair278" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__2 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__2_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__2_n_0 ),
        .Q(Q[0]),
        .S(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__2_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__2_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[1]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__2_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[1]_1 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_152
   (Q,
    \count_value_i_reg[1]_0 ,
    E,
    wr_clk);
  output [3:0]Q;
  input [0:0]\count_value_i_reg[1]_0 ;
  input [0:0]E;
  input wr_clk;

  wire [0:0]E;
  wire [3:0]Q;
  wire \count_value_i[0]_i_1__0_n_0 ;
  wire \count_value_i[1]_i_1__0_n_0 ;
  wire \count_value_i[2]_i_1__0_n_0 ;
  wire \count_value_i[3]_i_1__0_n_0 ;
  wire [0:0]\count_value_i_reg[1]_0 ;
  wire wr_clk;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__0 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1__0_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair281" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair281" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__0 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__0_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__0_n_0 ),
        .Q(Q[0]),
        .S(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__0_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__0_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__0_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[1]_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized4
   (Q,
    ram_wr_en_pf,
    wr_en,
    \count_value_i_reg[5]_0 ,
    \count_value_i_reg[0]_0 ,
    rst_d1,
    rd_clk);
  output [10:0]Q;
  input ram_wr_en_pf;
  input wr_en;
  input \count_value_i_reg[5]_0 ;
  input [0:0]\count_value_i_reg[0]_0 ;
  input rst_d1;
  input rd_clk;

  wire [10:0]Q;
  wire \count_value_i[0]_i_1__1_n_0 ;
  wire \count_value_i[10]_i_1_n_0 ;
  wire \count_value_i[10]_i_2_n_0 ;
  wire \count_value_i[1]_i_1__1_n_0 ;
  wire \count_value_i[2]_i_1__1_n_0 ;
  wire \count_value_i[3]_i_1__1_n_0 ;
  wire \count_value_i[4]_i_1__1_n_0 ;
  wire \count_value_i[5]_i_1_n_0 ;
  wire \count_value_i[6]_i_1_n_0 ;
  wire \count_value_i[6]_i_2_n_0 ;
  wire \count_value_i[7]_i_1_n_0 ;
  wire \count_value_i[8]_i_1_n_0 ;
  wire \count_value_i[9]_i_1_n_0 ;
  wire \count_value_i[9]_i_2_n_0 ;
  wire [0:0]\count_value_i_reg[0]_0 ;
  wire \count_value_i_reg[5]_0 ;
  wire ram_wr_en_pf;
  wire rd_clk;
  wire rst_d1;
  wire wr_en;

  (* SOFT_HLUTNM = "soft_lutpair335" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__1 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[10]_i_1 
       (.I0(Q[8]),
        .I1(\count_value_i[10]_i_2_n_0 ),
        .I2(Q[7]),
        .I3(Q[9]),
        .I4(Q[10]),
        .O(\count_value_i[10]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \count_value_i[10]_i_2 
       (.I0(Q[6]),
        .I1(Q[4]),
        .I2(Q[2]),
        .I3(\count_value_i[6]_i_2_n_0 ),
        .I4(Q[3]),
        .I5(Q[5]),
        .O(\count_value_i[10]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair335" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair334" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair334" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[4]_i_1__1 
       (.I0(Q[2]),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[3]),
        .I4(Q[4]),
        .O(\count_value_i[4]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[5]_i_1 
       (.I0(Q[3]),
        .I1(\count_value_i[6]_i_2_n_0 ),
        .I2(Q[2]),
        .I3(Q[4]),
        .I4(Q[5]),
        .O(\count_value_i[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \count_value_i[6]_i_1 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(\count_value_i[6]_i_2_n_0 ),
        .I3(Q[3]),
        .I4(Q[5]),
        .I5(Q[6]),
        .O(\count_value_i[6]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800000000)) 
    \count_value_i[6]_i_2 
       (.I0(Q[1]),
        .I1(wr_en),
        .I2(\count_value_i_reg[5]_0 ),
        .I3(\count_value_i_reg[0]_0 ),
        .I4(rst_d1),
        .I5(Q[0]),
        .O(\count_value_i[6]_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair333" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[7]_i_1 
       (.I0(Q[5]),
        .I1(\count_value_i[9]_i_2_n_0 ),
        .I2(Q[6]),
        .I3(Q[7]),
        .O(\count_value_i[7]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair333" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[8]_i_1 
       (.I0(Q[6]),
        .I1(\count_value_i[9]_i_2_n_0 ),
        .I2(Q[5]),
        .I3(Q[7]),
        .I4(Q[8]),
        .O(\count_value_i[8]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \count_value_i[9]_i_1 
       (.I0(Q[7]),
        .I1(Q[5]),
        .I2(\count_value_i[9]_i_2_n_0 ),
        .I3(Q[6]),
        .I4(Q[8]),
        .I5(Q[9]),
        .O(\count_value_i[9]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \count_value_i[9]_i_2 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(Q[0]),
        .I3(ram_wr_en_pf),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\count_value_i[9]_i_2_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[0]_i_1__1_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[10] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[10]_i_1_n_0 ),
        .Q(Q[10]),
        .R(\count_value_i_reg[0]_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[1]_i_1__1_n_0 ),
        .Q(Q[1]),
        .S(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[2]_i_1__1_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[3]_i_1__1_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[4]_i_1__1_n_0 ),
        .Q(Q[4]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[5] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[5]_i_1_n_0 ),
        .Q(Q[5]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[6] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[6]_i_1_n_0 ),
        .Q(Q[6]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[7] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[7]_i_1_n_0 ),
        .Q(Q[7]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[8] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[8]_i_1_n_0 ),
        .Q(Q[8]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[9] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[9]_i_1_n_0 ),
        .Q(Q[9]),
        .R(\count_value_i_reg[0]_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized5
   (\gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg ,
    ram_full_i0,
    leaving_empty0,
    Q,
    almost_full,
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg_0 ,
    rst,
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg_1 ,
    \count_value_i_reg[0]_0 ,
    ram_wr_en_pf,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ,
    \count_value_i_reg[1]_0 ,
    rd_en,
    ram_empty_i,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 ,
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 ,
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 ,
    \count_value_i_reg[10]_0 ,
    rd_clk);
  output \gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg ;
  output ram_full_i0;
  output leaving_empty0;
  output [10:0]Q;
  input almost_full;
  input \gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg_0 ;
  input rst;
  input \gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg_1 ;
  input \count_value_i_reg[0]_0 ;
  input ram_wr_en_pf;
  input \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ;
  input [1:0]\count_value_i_reg[1]_0 ;
  input rd_en;
  input ram_empty_i;
  input [10:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 ;
  input [10:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 ;
  input [10:0]\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 ;
  input [0:0]\count_value_i_reg[10]_0 ;
  input rd_clk;

  wire [10:0]Q;
  wire almost_full;
  wire \count_value_i[0]_i_1__2_n_0 ;
  wire \count_value_i[10]_i_1__2_n_0 ;
  wire \count_value_i[10]_i_2__2_n_0 ;
  wire \count_value_i[1]_i_1__2_n_0 ;
  wire \count_value_i[2]_i_1__2_n_0 ;
  wire \count_value_i[3]_i_1__2_n_0 ;
  wire \count_value_i[4]_i_1__2_n_0 ;
  wire \count_value_i[5]_i_1__2_n_0 ;
  wire \count_value_i[6]_i_1__2_n_0 ;
  wire \count_value_i[6]_i_2__2_n_0 ;
  wire \count_value_i[7]_i_1__2_n_0 ;
  wire \count_value_i[8]_i_1__2_n_0 ;
  wire \count_value_i[9]_i_1__2_n_0 ;
  wire \count_value_i[9]_i_2__2_n_0 ;
  wire \count_value_i_reg[0]_0 ;
  wire [0:0]\count_value_i_reg[10]_0 ;
  wire [1:0]\count_value_i_reg[1]_0 ;
  wire [10:0]\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 ;
  wire \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_5_n_0 ;
  wire \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_6_n_0 ;
  wire \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_7_n_0 ;
  wire \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_8_n_0 ;
  wire \gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg ;
  wire \gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg_0 ;
  wire \gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg_1 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_10_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_11_n_0 ;
  wire [10:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 ;
  wire [10:0]\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_6_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_7_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_8_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_9_n_0 ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ;
  wire going_afull;
  wire going_full1;
  wire leaving_empty0;
  wire ram_empty_i;
  wire ram_full_i0;
  wire ram_wr_en_pf;
  wire rd_clk;
  wire rd_en;
  wire rst;

  (* SOFT_HLUTNM = "soft_lutpair324" *) 
  LUT4 #(
    .INIT(16'h10EF)) 
    \count_value_i[0]_i_1__2 
       (.I0(rd_en),
        .I1(\count_value_i_reg[1]_0 [0]),
        .I2(\count_value_i_reg[1]_0 [1]),
        .I3(Q[0]),
        .O(\count_value_i[0]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[10]_i_1__2 
       (.I0(Q[8]),
        .I1(\count_value_i[10]_i_2__2_n_0 ),
        .I2(Q[7]),
        .I3(Q[9]),
        .I4(Q[10]),
        .O(\count_value_i[10]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \count_value_i[10]_i_2__2 
       (.I0(Q[6]),
        .I1(Q[4]),
        .I2(Q[2]),
        .I3(\count_value_i[6]_i_2__2_n_0 ),
        .I4(Q[3]),
        .I5(Q[5]),
        .O(\count_value_i[10]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair324" *) 
  LUT5 #(
    .INIT(32'h02FFFD00)) 
    \count_value_i[1]_i_1__2 
       (.I0(\count_value_i_reg[1]_0 [1]),
        .I1(\count_value_i_reg[1]_0 [0]),
        .I2(rd_en),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\count_value_i[1]_i_1__2_n_0 ));
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__2 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair323" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__2 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair323" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[4]_i_1__2 
       (.I0(Q[2]),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[3]),
        .I4(Q[4]),
        .O(\count_value_i[4]_i_1__2_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[5]_i_1__2 
       (.I0(Q[3]),
        .I1(\count_value_i[6]_i_2__2_n_0 ),
        .I2(Q[2]),
        .I3(Q[4]),
        .I4(Q[5]),
        .O(\count_value_i[5]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \count_value_i[6]_i_1__2 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(\count_value_i[6]_i_2__2_n_0 ),
        .I3(Q[3]),
        .I4(Q[5]),
        .I5(Q[6]),
        .O(\count_value_i[6]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h0000AAA200000000)) 
    \count_value_i[6]_i_2__2 
       (.I0(Q[1]),
        .I1(\count_value_i_reg[1]_0 [1]),
        .I2(\count_value_i_reg[1]_0 [0]),
        .I3(rd_en),
        .I4(ram_empty_i),
        .I5(Q[0]),
        .O(\count_value_i[6]_i_2__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair322" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[7]_i_1__2 
       (.I0(Q[5]),
        .I1(\count_value_i[9]_i_2__2_n_0 ),
        .I2(Q[6]),
        .I3(Q[7]),
        .O(\count_value_i[7]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair322" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[8]_i_1__2 
       (.I0(Q[6]),
        .I1(\count_value_i[9]_i_2__2_n_0 ),
        .I2(Q[5]),
        .I3(Q[7]),
        .I4(Q[8]),
        .O(\count_value_i[8]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \count_value_i[9]_i_1__2 
       (.I0(Q[7]),
        .I1(Q[5]),
        .I2(\count_value_i[9]_i_2__2_n_0 ),
        .I3(Q[6]),
        .I4(Q[8]),
        .I5(Q[9]),
        .O(\count_value_i[9]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \count_value_i[9]_i_2__2 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(Q[0]),
        .I3(\count_value_i_reg[0]_0 ),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\count_value_i[9]_i_2__2_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(\count_value_i_reg[0]_0 ),
        .D(\count_value_i[0]_i_1__2_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[10]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[10] 
       (.C(rd_clk),
        .CE(\count_value_i_reg[0]_0 ),
        .D(\count_value_i[10]_i_1__2_n_0 ),
        .Q(Q[10]),
        .R(\count_value_i_reg[10]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(\count_value_i_reg[0]_0 ),
        .D(\count_value_i[1]_i_1__2_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[10]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(\count_value_i_reg[0]_0 ),
        .D(\count_value_i[2]_i_1__2_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[10]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(\count_value_i_reg[0]_0 ),
        .D(\count_value_i[3]_i_1__2_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[10]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(rd_clk),
        .CE(\count_value_i_reg[0]_0 ),
        .D(\count_value_i[4]_i_1__2_n_0 ),
        .Q(Q[4]),
        .R(\count_value_i_reg[10]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[5] 
       (.C(rd_clk),
        .CE(\count_value_i_reg[0]_0 ),
        .D(\count_value_i[5]_i_1__2_n_0 ),
        .Q(Q[5]),
        .R(\count_value_i_reg[10]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[6] 
       (.C(rd_clk),
        .CE(\count_value_i_reg[0]_0 ),
        .D(\count_value_i[6]_i_1__2_n_0 ),
        .Q(Q[6]),
        .R(\count_value_i_reg[10]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[7] 
       (.C(rd_clk),
        .CE(\count_value_i_reg[0]_0 ),
        .D(\count_value_i[7]_i_1__2_n_0 ),
        .Q(Q[7]),
        .R(\count_value_i_reg[10]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[8] 
       (.C(rd_clk),
        .CE(\count_value_i_reg[0]_0 ),
        .D(\count_value_i[8]_i_1__2_n_0 ),
        .Q(Q[8]),
        .R(\count_value_i_reg[10]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[9] 
       (.C(rd_clk),
        .CE(\count_value_i_reg[0]_0 ),
        .D(\count_value_i[9]_i_1__2_n_0 ),
        .Q(Q[9]),
        .R(\count_value_i_reg[10]_0 ));
  LUT6 #(
    .INIT(64'h00000000AAAAFF2A)) 
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_1 
       (.I0(almost_full),
        .I1(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg_0 ),
        .I2(going_full1),
        .I3(going_afull),
        .I4(rst),
        .I5(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg_1 ),
        .O(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg ));
  LUT6 #(
    .INIT(64'h0000400000000000)) 
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3 
       (.I0(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_5_n_0 ),
        .I1(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_6_n_0 ),
        .I2(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_7_n_0 ),
        .I3(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_8_n_0 ),
        .I4(\count_value_i_reg[0]_0 ),
        .I5(ram_wr_en_pf),
        .O(going_afull));
  LUT4 #(
    .INIT(16'h6FF6)) 
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_5 
       (.I0(Q[9]),
        .I1(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 [9]),
        .I2(Q[10]),
        .I3(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 [10]),
        .O(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_6 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 [3]),
        .I2(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 [5]),
        .I3(Q[5]),
        .I4(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 [4]),
        .I5(Q[4]),
        .O(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_6_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_7 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 [0]),
        .I2(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_8 
       (.I0(Q[6]),
        .I1(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 [6]),
        .I2(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 [8]),
        .I3(Q[8]),
        .I4(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 [7]),
        .I5(Q[7]),
        .O(\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_8_n_0 ));
  LUT5 #(
    .INIT(32'h0FFF0088)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_1 
       (.I0(ram_wr_en_pf),
        .I1(going_full1),
        .I2(leaving_empty0),
        .I3(\count_value_i_reg[0]_0 ),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg ),
        .O(ram_full_i0));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_10 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 [3]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 [5]),
        .I3(Q[5]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 [4]),
        .I5(Q[4]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_10_n_0 ));
  LUT4 #(
    .INIT(16'h6FF6)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_11 
       (.I0(Q[9]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 [9]),
        .I2(Q[10]),
        .I3(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 [10]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_11_n_0 ));
  LUT4 #(
    .INIT(16'h0080)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2 
       (.I0(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_6_n_0 ),
        .I3(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_7_n_0 ),
        .O(going_full1));
  LUT4 #(
    .INIT(16'h0080)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3 
       (.I0(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_8_n_0 ),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_9_n_0 ),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_10_n_0 ),
        .I3(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_11_n_0 ),
        .O(leaving_empty0));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4 
       (.I0(Q[6]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 [6]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 [8]),
        .I3(Q[8]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 [7]),
        .I5(Q[7]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 [0]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_5_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_6 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 [3]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 [5]),
        .I3(Q[5]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 [4]),
        .I5(Q[4]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_6_n_0 ));
  LUT4 #(
    .INIT(16'h6FF6)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_7 
       (.I0(Q[9]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 [9]),
        .I2(Q[10]),
        .I3(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 [10]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_7_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_8 
       (.I0(Q[6]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 [6]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 [8]),
        .I3(Q[8]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 [7]),
        .I5(Q[7]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_8_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_9 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 [0]),
        .I2(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_9_n_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized5_130
   (Q,
    ram_empty_i0,
    ram_wr_en_pf,
    wr_en,
    \count_value_i_reg[5]_0 ,
    \count_value_i_reg[0]_0 ,
    rst_d1,
    \gen_pntr_flags_cc.ram_empty_i_reg ,
    leaving_empty0,
    ram_empty_i,
    \gen_pntr_flags_cc.ram_empty_i_reg_0 ,
    rd_clk);
  output [10:0]Q;
  output ram_empty_i0;
  input ram_wr_en_pf;
  input wr_en;
  input \count_value_i_reg[5]_0 ;
  input [0:0]\count_value_i_reg[0]_0 ;
  input rst_d1;
  input \gen_pntr_flags_cc.ram_empty_i_reg ;
  input leaving_empty0;
  input ram_empty_i;
  input [10:0]\gen_pntr_flags_cc.ram_empty_i_reg_0 ;
  input rd_clk;

  wire [10:0]Q;
  wire \count_value_i[0]_i_1_n_0 ;
  wire \count_value_i[10]_i_1__0_n_0 ;
  wire \count_value_i[10]_i_2__0_n_0 ;
  wire \count_value_i[1]_i_1_n_0 ;
  wire \count_value_i[2]_i_1_n_0 ;
  wire \count_value_i[3]_i_1_n_0 ;
  wire \count_value_i[4]_i_1_n_0 ;
  wire \count_value_i[5]_i_1__0_n_0 ;
  wire \count_value_i[6]_i_1__0_n_0 ;
  wire \count_value_i[6]_i_2__0_n_0 ;
  wire \count_value_i[7]_i_1__0_n_0 ;
  wire \count_value_i[8]_i_1__0_n_0 ;
  wire \count_value_i[9]_i_1__0_n_0 ;
  wire \count_value_i[9]_i_2__0_n_0 ;
  wire [0:0]\count_value_i_reg[0]_0 ;
  wire \count_value_i_reg[5]_0 ;
  wire \gen_pntr_flags_cc.ram_empty_i_i_2_n_0 ;
  wire \gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ;
  wire \gen_pntr_flags_cc.ram_empty_i_i_4_n_0 ;
  wire \gen_pntr_flags_cc.ram_empty_i_i_5_n_0 ;
  wire \gen_pntr_flags_cc.ram_empty_i_reg ;
  wire [10:0]\gen_pntr_flags_cc.ram_empty_i_reg_0 ;
  wire leaving_empty0;
  wire ram_empty_i;
  wire ram_empty_i0;
  wire ram_wr_en_pf;
  wire rd_clk;
  wire rst_d1;
  wire wr_en;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[10]_i_1__0 
       (.I0(Q[8]),
        .I1(\count_value_i[10]_i_2__0_n_0 ),
        .I2(Q[7]),
        .I3(Q[9]),
        .I4(Q[10]),
        .O(\count_value_i[10]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \count_value_i[10]_i_2__0 
       (.I0(Q[6]),
        .I1(Q[4]),
        .I2(Q[2]),
        .I3(\count_value_i[6]_i_2__0_n_0 ),
        .I4(Q[3]),
        .I5(Q[5]),
        .O(\count_value_i[10]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair329" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair329" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair328" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair328" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[4]_i_1 
       (.I0(Q[2]),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[3]),
        .I4(Q[4]),
        .O(\count_value_i[4]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[5]_i_1__0 
       (.I0(Q[3]),
        .I1(\count_value_i[6]_i_2__0_n_0 ),
        .I2(Q[2]),
        .I3(Q[4]),
        .I4(Q[5]),
        .O(\count_value_i[5]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \count_value_i[6]_i_1__0 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(\count_value_i[6]_i_2__0_n_0 ),
        .I3(Q[3]),
        .I4(Q[5]),
        .I5(Q[6]),
        .O(\count_value_i[6]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800000000)) 
    \count_value_i[6]_i_2__0 
       (.I0(Q[1]),
        .I1(wr_en),
        .I2(\count_value_i_reg[5]_0 ),
        .I3(\count_value_i_reg[0]_0 ),
        .I4(rst_d1),
        .I5(Q[0]),
        .O(\count_value_i[6]_i_2__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair327" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[7]_i_1__0 
       (.I0(Q[5]),
        .I1(\count_value_i[9]_i_2__0_n_0 ),
        .I2(Q[6]),
        .I3(Q[7]),
        .O(\count_value_i[7]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair327" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[8]_i_1__0 
       (.I0(Q[6]),
        .I1(\count_value_i[9]_i_2__0_n_0 ),
        .I2(Q[5]),
        .I3(Q[7]),
        .I4(Q[8]),
        .O(\count_value_i[8]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \count_value_i[9]_i_1__0 
       (.I0(Q[7]),
        .I1(Q[5]),
        .I2(\count_value_i[9]_i_2__0_n_0 ),
        .I3(Q[6]),
        .I4(Q[8]),
        .I5(Q[9]),
        .O(\count_value_i[9]_i_1__0_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \count_value_i[9]_i_2__0 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(Q[0]),
        .I3(ram_wr_en_pf),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\count_value_i[9]_i_2__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[0]_i_1_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[10] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[10]_i_1__0_n_0 ),
        .Q(Q[10]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[1]_i_1_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[2]_i_1_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[3]_i_1_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[4]_i_1_n_0 ),
        .Q(Q[4]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[5] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[5]_i_1__0_n_0 ),
        .Q(Q[5]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[6] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[6]_i_1__0_n_0 ),
        .Q(Q[6]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[7] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[7]_i_1__0_n_0 ),
        .Q(Q[7]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[8] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[8]_i_1__0_n_0 ),
        .Q(Q[8]),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[9] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[9]_i_1__0_n_0 ),
        .Q(Q[9]),
        .R(\count_value_i_reg[0]_0 ));
  LUT6 #(
    .INIT(64'h00FFFFFF00008080)) 
    \gen_pntr_flags_cc.ram_empty_i_i_1 
       (.I0(\gen_pntr_flags_cc.ram_empty_i_reg ),
        .I1(\gen_pntr_flags_cc.ram_empty_i_i_2_n_0 ),
        .I2(\gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ),
        .I3(leaving_empty0),
        .I4(ram_wr_en_pf),
        .I5(ram_empty_i),
        .O(ram_empty_i0));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ram_empty_i_i_2 
       (.I0(Q[6]),
        .I1(\gen_pntr_flags_cc.ram_empty_i_reg_0 [6]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_reg_0 [8]),
        .I3(Q[8]),
        .I4(\gen_pntr_flags_cc.ram_empty_i_reg_0 [7]),
        .I5(Q[7]),
        .O(\gen_pntr_flags_cc.ram_empty_i_i_2_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000000000)) 
    \gen_pntr_flags_cc.ram_empty_i_i_3 
       (.I0(\gen_pntr_flags_cc.ram_empty_i_reg_0 [10]),
        .I1(Q[10]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_reg_0 [9]),
        .I3(Q[9]),
        .I4(\gen_pntr_flags_cc.ram_empty_i_i_4_n_0 ),
        .I5(\gen_pntr_flags_cc.ram_empty_i_i_5_n_0 ),
        .O(\gen_pntr_flags_cc.ram_empty_i_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ram_empty_i_i_4 
       (.I0(Q[3]),
        .I1(\gen_pntr_flags_cc.ram_empty_i_reg_0 [3]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_reg_0 [5]),
        .I3(Q[5]),
        .I4(\gen_pntr_flags_cc.ram_empty_i_reg_0 [4]),
        .I5(Q[4]),
        .O(\gen_pntr_flags_cc.ram_empty_i_i_4_n_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pntr_flags_cc.ram_empty_i_i_5 
       (.I0(Q[0]),
        .I1(\gen_pntr_flags_cc.ram_empty_i_reg_0 [0]),
        .I2(\gen_pntr_flags_cc.ram_empty_i_reg_0 [2]),
        .I3(Q[2]),
        .I4(\gen_pntr_flags_cc.ram_empty_i_reg_0 [1]),
        .I5(Q[1]),
        .O(\gen_pntr_flags_cc.ram_empty_i_i_5_n_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized6
   (Q,
    \FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ,
    \count_value_i_reg[0]_0 ,
    rd_en,
    ram_empty_i,
    \count_value_i_reg[1]_0 ,
    rd_clk);
  output [10:0]Q;
  output \FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ;
  input [1:0]\count_value_i_reg[0]_0 ;
  input rd_en;
  input ram_empty_i;
  input [0:0]\count_value_i_reg[1]_0 ;
  input rd_clk;

  wire \FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ;
  wire [10:0]Q;
  wire \count_value_i[0]_i_1__3_n_0 ;
  wire \count_value_i[10]_i_1__3_n_0 ;
  wire \count_value_i[10]_i_2__3_n_0 ;
  wire \count_value_i[1]_i_1__3_n_0 ;
  wire \count_value_i[2]_i_1__3_n_0 ;
  wire \count_value_i[3]_i_1__3_n_0 ;
  wire \count_value_i[4]_i_1__3_n_0 ;
  wire \count_value_i[5]_i_1__3_n_0 ;
  wire \count_value_i[6]_i_1__3_n_0 ;
  wire \count_value_i[6]_i_2__3_n_0 ;
  wire \count_value_i[7]_i_1__3_n_0 ;
  wire \count_value_i[8]_i_1__3_n_0 ;
  wire \count_value_i[9]_i_1__3_n_0 ;
  wire \count_value_i[9]_i_2__3_n_0 ;
  wire [1:0]\count_value_i_reg[0]_0 ;
  wire [0:0]\count_value_i_reg[1]_0 ;
  wire ram_empty_i;
  wire rd_clk;
  wire rd_en;

  LUT4 #(
    .INIT(16'h10EF)) 
    \count_value_i[0]_i_1__3 
       (.I0(rd_en),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(\count_value_i_reg[0]_0 [1]),
        .I3(Q[0]),
        .O(\count_value_i[0]_i_1__3_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[10]_i_1__3 
       (.I0(Q[8]),
        .I1(\count_value_i[10]_i_2__3_n_0 ),
        .I2(Q[7]),
        .I3(Q[9]),
        .I4(Q[10]),
        .O(\count_value_i[10]_i_1__3_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \count_value_i[10]_i_2__3 
       (.I0(Q[6]),
        .I1(Q[4]),
        .I2(Q[2]),
        .I3(\count_value_i[6]_i_2__3_n_0 ),
        .I4(Q[3]),
        .I5(Q[5]),
        .O(\count_value_i[10]_i_2__3_n_0 ));
  LUT5 #(
    .INIT(32'h02FFFD00)) 
    \count_value_i[1]_i_1__3 
       (.I0(\count_value_i_reg[0]_0 [1]),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(rd_en),
        .I3(Q[0]),
        .I4(Q[1]),
        .O(\count_value_i[1]_i_1__3_n_0 ));
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__3 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair326" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__3 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair326" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[4]_i_1__3 
       (.I0(Q[2]),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[3]),
        .I4(Q[4]),
        .O(\count_value_i[4]_i_1__3_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[5]_i_1__3 
       (.I0(Q[3]),
        .I1(\count_value_i[6]_i_2__3_n_0 ),
        .I2(Q[2]),
        .I3(Q[4]),
        .I4(Q[5]),
        .O(\count_value_i[5]_i_1__3_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \count_value_i[6]_i_1__3 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(\count_value_i[6]_i_2__3_n_0 ),
        .I3(Q[3]),
        .I4(Q[5]),
        .I5(Q[6]),
        .O(\count_value_i[6]_i_1__3_n_0 ));
  LUT6 #(
    .INIT(64'h0000AAA200000000)) 
    \count_value_i[6]_i_2__3 
       (.I0(Q[1]),
        .I1(\count_value_i_reg[0]_0 [1]),
        .I2(\count_value_i_reg[0]_0 [0]),
        .I3(rd_en),
        .I4(ram_empty_i),
        .I5(Q[0]),
        .O(\count_value_i[6]_i_2__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair325" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[7]_i_1__3 
       (.I0(Q[5]),
        .I1(\count_value_i[9]_i_2__3_n_0 ),
        .I2(Q[6]),
        .I3(Q[7]),
        .O(\count_value_i[7]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair325" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[8]_i_1__3 
       (.I0(Q[6]),
        .I1(\count_value_i[9]_i_2__3_n_0 ),
        .I2(Q[5]),
        .I3(Q[7]),
        .I4(Q[8]),
        .O(\count_value_i[8]_i_1__3_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \count_value_i[9]_i_1__3 
       (.I0(Q[7]),
        .I1(Q[5]),
        .I2(\count_value_i[9]_i_2__3_n_0 ),
        .I3(Q[6]),
        .I4(Q[8]),
        .I5(Q[9]),
        .O(\count_value_i[9]_i_1__3_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \count_value_i[9]_i_2__3 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(Q[0]),
        .I3(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\count_value_i[9]_i_2__3_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .D(\count_value_i[0]_i_1__3_n_0 ),
        .Q(Q[0]),
        .S(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[10] 
       (.C(rd_clk),
        .CE(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .D(\count_value_i[10]_i_1__3_n_0 ),
        .Q(Q[10]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .D(\count_value_i[1]_i_1__3_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .D(\count_value_i[2]_i_1__3_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .D(\count_value_i[3]_i_1__3_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(rd_clk),
        .CE(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .D(\count_value_i[4]_i_1__3_n_0 ),
        .Q(Q[4]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[5] 
       (.C(rd_clk),
        .CE(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .D(\count_value_i[5]_i_1__3_n_0 ),
        .Q(Q[5]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[6] 
       (.C(rd_clk),
        .CE(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .D(\count_value_i[6]_i_1__3_n_0 ),
        .Q(Q[6]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[7] 
       (.C(rd_clk),
        .CE(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .D(\count_value_i[7]_i_1__3_n_0 ),
        .Q(Q[7]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[8] 
       (.C(rd_clk),
        .CE(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .D(\count_value_i[8]_i_1__3_n_0 ),
        .Q(Q[8]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[9] 
       (.C(rd_clk),
        .CE(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ),
        .D(\count_value_i[9]_i_1__3_n_0 ),
        .Q(Q[9]),
        .R(\count_value_i_reg[1]_0 ));
  LUT4 #(
    .INIT(16'h00FD)) 
    \gen_sdpram.xpm_memory_base_inst_i_2 
       (.I0(\count_value_i_reg[0]_0 [1]),
        .I1(\count_value_i_reg[0]_0 [0]),
        .I2(rd_en),
        .I3(ram_empty_i),
        .O(\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized6_131
   (Q,
    ram_wr_en_pf,
    wr_en,
    \count_value_i_reg[5]_0 ,
    \count_value_i_reg[1]_0 ,
    rst_d1,
    rd_clk);
  output [10:0]Q;
  input ram_wr_en_pf;
  input wr_en;
  input \count_value_i_reg[5]_0 ;
  input [0:0]\count_value_i_reg[1]_0 ;
  input rst_d1;
  input rd_clk;

  wire [10:0]Q;
  wire \count_value_i[0]_i_1__0_n_0 ;
  wire \count_value_i[10]_i_1__1_n_0 ;
  wire \count_value_i[10]_i_2__1_n_0 ;
  wire \count_value_i[1]_i_1__0_n_0 ;
  wire \count_value_i[2]_i_1__0_n_0 ;
  wire \count_value_i[3]_i_1__0_n_0 ;
  wire \count_value_i[4]_i_1__0_n_0 ;
  wire \count_value_i[5]_i_1__1_n_0 ;
  wire \count_value_i[6]_i_1__1_n_0 ;
  wire \count_value_i[6]_i_2__1_n_0 ;
  wire \count_value_i[7]_i_1__1_n_0 ;
  wire \count_value_i[8]_i_1__1_n_0 ;
  wire \count_value_i[9]_i_1__1_n_0 ;
  wire \count_value_i[9]_i_2__1_n_0 ;
  wire [0:0]\count_value_i_reg[1]_0 ;
  wire \count_value_i_reg[5]_0 ;
  wire ram_wr_en_pf;
  wire rd_clk;
  wire rst_d1;
  wire wr_en;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__0 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[10]_i_1__1 
       (.I0(Q[8]),
        .I1(\count_value_i[10]_i_2__1_n_0 ),
        .I2(Q[7]),
        .I3(Q[9]),
        .I4(Q[10]),
        .O(\count_value_i[10]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \count_value_i[10]_i_2__1 
       (.I0(Q[6]),
        .I1(Q[4]),
        .I2(Q[2]),
        .I3(\count_value_i[6]_i_2__1_n_0 ),
        .I4(Q[3]),
        .I5(Q[5]),
        .O(\count_value_i[10]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair332" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair332" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__0 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair331" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__0 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair331" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[4]_i_1__0 
       (.I0(Q[2]),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[3]),
        .I4(Q[4]),
        .O(\count_value_i[4]_i_1__0_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[5]_i_1__1 
       (.I0(Q[3]),
        .I1(\count_value_i[6]_i_2__1_n_0 ),
        .I2(Q[2]),
        .I3(Q[4]),
        .I4(Q[5]),
        .O(\count_value_i[5]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \count_value_i[6]_i_1__1 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(\count_value_i[6]_i_2__1_n_0 ),
        .I3(Q[3]),
        .I4(Q[5]),
        .I5(Q[6]),
        .O(\count_value_i[6]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800000000)) 
    \count_value_i[6]_i_2__1 
       (.I0(Q[1]),
        .I1(wr_en),
        .I2(\count_value_i_reg[5]_0 ),
        .I3(\count_value_i_reg[1]_0 ),
        .I4(rst_d1),
        .I5(Q[0]),
        .O(\count_value_i[6]_i_2__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair330" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[7]_i_1__1 
       (.I0(Q[5]),
        .I1(\count_value_i[9]_i_2__1_n_0 ),
        .I2(Q[6]),
        .I3(Q[7]),
        .O(\count_value_i[7]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair330" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[8]_i_1__1 
       (.I0(Q[6]),
        .I1(\count_value_i[9]_i_2__1_n_0 ),
        .I2(Q[5]),
        .I3(Q[7]),
        .I4(Q[8]),
        .O(\count_value_i[8]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h7FFFFFFF80000000)) 
    \count_value_i[9]_i_1__1 
       (.I0(Q[7]),
        .I1(Q[5]),
        .I2(\count_value_i[9]_i_2__1_n_0 ),
        .I3(Q[6]),
        .I4(Q[8]),
        .I5(Q[9]),
        .O(\count_value_i[9]_i_1__1_n_0 ));
  LUT6 #(
    .INIT(64'h8000000000000000)) 
    \count_value_i[9]_i_2__1 
       (.I0(Q[4]),
        .I1(Q[2]),
        .I2(Q[0]),
        .I3(ram_wr_en_pf),
        .I4(Q[1]),
        .I5(Q[3]),
        .O(\count_value_i[9]_i_2__1_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[0]_i_1__0_n_0 ),
        .Q(Q[0]),
        .S(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[10] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[10]_i_1__1_n_0 ),
        .Q(Q[10]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[1]_i_1__0_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[2]_i_1__0_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[3]_i_1__0_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[4]_i_1__0_n_0 ),
        .Q(Q[4]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[5] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[5]_i_1__1_n_0 ),
        .Q(Q[5]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[6] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[6]_i_1__1_n_0 ),
        .Q(Q[6]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[7] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[7]_i_1__1_n_0 ),
        .Q(Q[7]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[8] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[8]_i_1__1_n_0 ),
        .Q(Q[8]),
        .R(\count_value_i_reg[1]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[9] 
       (.C(rd_clk),
        .CE(ram_wr_en_pf),
        .D(\count_value_i[9]_i_1__1_n_0 ),
        .Q(Q[9]),
        .R(\count_value_i_reg[1]_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized7
   (E,
    D,
    Q,
    \gen_pf_ic_rc.ram_empty_i_reg ,
    \count_value_i_reg[2]_0 ,
    \count_value_i_reg[4]_0 ,
    rd_en,
    \count_value_i_reg[5]_0 ,
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ,
    \count_value_i_reg[5]_1 ,
    rd_clk);
  output [0:0]E;
  output [0:0]D;
  output [5:0]Q;
  output \gen_pf_ic_rc.ram_empty_i_reg ;
  output \count_value_i_reg[2]_0 ;
  output \count_value_i_reg[4]_0 ;
  input rd_en;
  input \count_value_i_reg[5]_0 ;
  input [3:0]\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ;
  input \count_value_i_reg[5]_1 ;
  input rd_clk;

  wire [0:0]D;
  wire [0:0]E;
  wire [5:0]Q;
  wire \count_value_i[0]_i_1__3_n_0 ;
  wire \count_value_i[1]_i_1__3_n_0 ;
  wire \count_value_i[2]_i_1__3_n_0 ;
  wire \count_value_i[3]_i_1__3_n_0 ;
  wire \count_value_i[4]_i_1__3_n_0 ;
  wire \count_value_i[5]_i_1__0_n_0 ;
  wire \count_value_i[5]_i_2__0_n_0 ;
  wire \count_value_i_reg[2]_0 ;
  wire \count_value_i_reg[4]_0 ;
  wire \count_value_i_reg[5]_0 ;
  wire \count_value_i_reg[5]_1 ;
  wire [3:0]\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ;
  wire \gen_pf_ic_rc.ram_empty_i_reg ;
  wire rd_clk;
  wire rd_en;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__3 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair422" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__3 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair421" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__3 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair422" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__3 
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__3_n_0 ));
  LUT6 #(
    .INIT(64'hF7FFFFFF08000000)) 
    \count_value_i[4]_i_1__3 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(\gen_pf_ic_rc.ram_empty_i_reg ),
        .I3(Q[2]),
        .I4(Q[3]),
        .I5(Q[4]),
        .O(\count_value_i[4]_i_1__3_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \count_value_i[4]_i_2 
       (.I0(\count_value_i_reg[5]_0 ),
        .I1(rd_en),
        .O(\gen_pf_ic_rc.ram_empty_i_reg ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[5]_i_1__0 
       (.I0(\count_value_i[5]_i_2__0_n_0 ),
        .I1(Q[4]),
        .I2(Q[3]),
        .I3(Q[2]),
        .I4(Q[5]),
        .O(\count_value_i[5]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair421" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \count_value_i[5]_i_2__0 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(\count_value_i_reg[5]_0 ),
        .I3(rd_en),
        .O(\count_value_i[5]_i_2__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__3_n_0 ),
        .Q(Q[0]),
        .R(\count_value_i_reg[5]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__3_n_0 ),
        .Q(Q[1]),
        .R(\count_value_i_reg[5]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__3_n_0 ),
        .Q(Q[2]),
        .R(\count_value_i_reg[5]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__3_n_0 ),
        .Q(Q[3]),
        .R(\count_value_i_reg[5]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[4]_i_1__3_n_0 ),
        .Q(Q[4]),
        .R(\count_value_i_reg[5]_1 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[5] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[5]_i_1__0_n_0 ),
        .Q(Q[5]),
        .R(\count_value_i_reg[5]_1 ));
  LUT6 #(
    .INIT(64'h20BADF45DF4520BA)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[1]_i_1 
       (.I0(Q[0]),
        .I1(\count_value_i_reg[5]_0 ),
        .I2(rd_en),
        .I3(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [0]),
        .I4(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [1]),
        .I5(Q[1]),
        .O(D));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_3 
       (.I0(Q[4]),
        .I1(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [3]),
        .O(\count_value_i_reg[4]_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pf_ic_rc.ram_empty_i_i_3 
       (.I0(Q[2]),
        .I1(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [2]),
        .I2(Q[1]),
        .I3(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [1]),
        .I4(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [0]),
        .I5(Q[0]),
        .O(\count_value_i_reg[2]_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \gen_sdpram.xpm_memory_base_inst_i_2 
       (.I0(rd_en),
        .I1(\count_value_i_reg[5]_0 ),
        .O(E));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized7_127
   (Q,
    O,
    wr_en,
    \count_value_i_reg[5]_0 ,
    wrst_busy,
    rst_d1,
    \gwdc.wr_data_count_i_reg[5] ,
    E,
    wr_clk);
  output [5:0]Q;
  output [0:0]O;
  input wr_en;
  input \count_value_i_reg[5]_0 ;
  input wrst_busy;
  input rst_d1;
  input [5:0]\gwdc.wr_data_count_i_reg[5] ;
  input [0:0]E;
  input wr_clk;

  wire [0:0]E;
  wire [0:0]O;
  wire [5:0]Q;
  wire \count_value_i[0]_i_1__1_n_0 ;
  wire \count_value_i[1]_i_1__1_n_0 ;
  wire \count_value_i[2]_i_1__1_n_0 ;
  wire \count_value_i[3]_i_1__1_n_0 ;
  wire \count_value_i[4]_i_1__1_n_0 ;
  wire \count_value_i[5]_i_1_n_0 ;
  wire \count_value_i[5]_i_2_n_0 ;
  wire \count_value_i_reg[5]_0 ;
  wire \gwdc.wr_data_count_i[5]_i_2_n_0 ;
  wire \gwdc.wr_data_count_i[5]_i_3_n_0 ;
  wire \gwdc.wr_data_count_i[5]_i_4_n_0 ;
  wire \gwdc.wr_data_count_i[5]_i_5_n_0 ;
  wire \gwdc.wr_data_count_i[5]_i_6_n_0 ;
  wire \gwdc.wr_data_count_i[5]_i_7_n_0 ;
  wire [5:0]\gwdc.wr_data_count_i_reg[5] ;
  wire \gwdc.wr_data_count_i_reg[5]_i_1_n_3 ;
  wire \gwdc.wr_data_count_i_reg[5]_i_1_n_4 ;
  wire \gwdc.wr_data_count_i_reg[5]_i_1_n_5 ;
  wire \gwdc.wr_data_count_i_reg[5]_i_1_n_6 ;
  wire \gwdc.wr_data_count_i_reg[5]_i_1_n_7 ;
  wire rst_d1;
  wire wr_clk;
  wire wr_en;
  wire wrst_busy;
  wire [7:5]\NLW_gwdc.wr_data_count_i_reg[5]_i_1_CO_UNCONNECTED ;
  wire [7:0]\NLW_gwdc.wr_data_count_i_reg[5]_i_1_O_UNCONNECTED ;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__1 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair426" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair426" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair425" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__1 
       (.I0(Q[2]),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair425" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[4]_i_1__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .I3(Q[3]),
        .I4(Q[4]),
        .O(\count_value_i[4]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[5]_i_1 
       (.I0(\count_value_i[5]_i_2_n_0 ),
        .I1(Q[4]),
        .I2(Q[3]),
        .I3(Q[2]),
        .I4(Q[5]),
        .O(\count_value_i[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800000000)) 
    \count_value_i[5]_i_2 
       (.I0(Q[0]),
        .I1(wr_en),
        .I2(\count_value_i_reg[5]_0 ),
        .I3(wrst_busy),
        .I4(rst_d1),
        .I5(Q[1]),
        .O(\count_value_i[5]_i_2_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__1_n_0 ),
        .Q(Q[0]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__1_n_0 ),
        .Q(Q[1]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__1_n_0 ),
        .Q(Q[2]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__1_n_0 ),
        .Q(Q[3]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[4]_i_1__1_n_0 ),
        .Q(Q[4]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[5] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[5]_i_1_n_0 ),
        .Q(Q[5]),
        .R(wrst_busy));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_2 
       (.I0(Q[5]),
        .I1(\gwdc.wr_data_count_i_reg[5] [5]),
        .O(\gwdc.wr_data_count_i[5]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_3 
       (.I0(Q[4]),
        .I1(\gwdc.wr_data_count_i_reg[5] [4]),
        .O(\gwdc.wr_data_count_i[5]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_4 
       (.I0(Q[3]),
        .I1(\gwdc.wr_data_count_i_reg[5] [3]),
        .O(\gwdc.wr_data_count_i[5]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_5 
       (.I0(Q[2]),
        .I1(\gwdc.wr_data_count_i_reg[5] [2]),
        .O(\gwdc.wr_data_count_i[5]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_6 
       (.I0(Q[1]),
        .I1(\gwdc.wr_data_count_i_reg[5] [1]),
        .O(\gwdc.wr_data_count_i[5]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_7 
       (.I0(Q[0]),
        .I1(\gwdc.wr_data_count_i_reg[5] [0]),
        .O(\gwdc.wr_data_count_i[5]_i_7_n_0 ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \gwdc.wr_data_count_i_reg[5]_i_1 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\NLW_gwdc.wr_data_count_i_reg[5]_i_1_CO_UNCONNECTED [7:5],\gwdc.wr_data_count_i_reg[5]_i_1_n_3 ,\gwdc.wr_data_count_i_reg[5]_i_1_n_4 ,\gwdc.wr_data_count_i_reg[5]_i_1_n_5 ,\gwdc.wr_data_count_i_reg[5]_i_1_n_6 ,\gwdc.wr_data_count_i_reg[5]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,Q[4:0]}),
        .O({\NLW_gwdc.wr_data_count_i_reg[5]_i_1_O_UNCONNECTED [7:6],O,\NLW_gwdc.wr_data_count_i_reg[5]_i_1_O_UNCONNECTED [4:0]}),
        .S({1'b0,1'b0,\gwdc.wr_data_count_i[5]_i_2_n_0 ,\gwdc.wr_data_count_i[5]_i_3_n_0 ,\gwdc.wr_data_count_i[5]_i_4_n_0 ,\gwdc.wr_data_count_i[5]_i_5_n_0 ,\gwdc.wr_data_count_i[5]_i_6_n_0 ,\gwdc.wr_data_count_i[5]_i_7_n_0 }));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized7_158
   (E,
    D,
    Q,
    \gen_pf_ic_rc.ram_empty_i_reg ,
    \count_value_i_reg[2]_0 ,
    \count_value_i_reg[4]_0 ,
    rd_en,
    \count_value_i_reg[5]_0 ,
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ,
    SR,
    rd_clk);
  output [0:0]E;
  output [0:0]D;
  output [5:0]Q;
  output \gen_pf_ic_rc.ram_empty_i_reg ;
  output \count_value_i_reg[2]_0 ;
  output \count_value_i_reg[4]_0 ;
  input rd_en;
  input \count_value_i_reg[5]_0 ;
  input [3:0]\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ;
  input [0:0]SR;
  input rd_clk;

  wire [0:0]D;
  wire [0:0]E;
  wire [5:0]Q;
  wire [0:0]SR;
  wire \count_value_i[0]_i_1__3_n_0 ;
  wire \count_value_i[1]_i_1__3_n_0 ;
  wire \count_value_i[2]_i_1__3_n_0 ;
  wire \count_value_i[3]_i_1__3_n_0 ;
  wire \count_value_i[4]_i_1__3_n_0 ;
  wire \count_value_i[5]_i_1__0_n_0 ;
  wire \count_value_i[5]_i_2__0_n_0 ;
  wire \count_value_i_reg[2]_0 ;
  wire \count_value_i_reg[4]_0 ;
  wire \count_value_i_reg[5]_0 ;
  wire [3:0]\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ;
  wire \gen_pf_ic_rc.ram_empty_i_reg ;
  wire rd_clk;
  wire rd_en;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__3 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair239" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__3 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair238" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__3 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__3_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair239" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__3 
       (.I0(Q[2]),
        .I1(Q[1]),
        .I2(Q[0]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__3_n_0 ));
  LUT6 #(
    .INIT(64'hF7FFFFFF08000000)) 
    \count_value_i[4]_i_1__3 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(\gen_pf_ic_rc.ram_empty_i_reg ),
        .I3(Q[2]),
        .I4(Q[3]),
        .I5(Q[4]),
        .O(\count_value_i[4]_i_1__3_n_0 ));
  LUT2 #(
    .INIT(4'hB)) 
    \count_value_i[4]_i_2 
       (.I0(\count_value_i_reg[5]_0 ),
        .I1(rd_en),
        .O(\gen_pf_ic_rc.ram_empty_i_reg ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[5]_i_1__0 
       (.I0(\count_value_i[5]_i_2__0_n_0 ),
        .I1(Q[4]),
        .I2(Q[3]),
        .I3(Q[2]),
        .I4(Q[5]),
        .O(\count_value_i[5]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair238" *) 
  LUT4 #(
    .INIT(16'h0800)) 
    \count_value_i[5]_i_2__0 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(\count_value_i_reg[5]_0 ),
        .I3(rd_en),
        .O(\count_value_i[5]_i_2__0_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__3_n_0 ),
        .Q(Q[0]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__3_n_0 ),
        .Q(Q[1]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__3_n_0 ),
        .Q(Q[2]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__3_n_0 ),
        .Q(Q[3]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[4]_i_1__3_n_0 ),
        .Q(Q[4]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[5] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[5]_i_1__0_n_0 ),
        .Q(Q[5]),
        .R(SR));
  LUT6 #(
    .INIT(64'h20BADF45DF4520BA)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[1]_i_1 
       (.I0(Q[0]),
        .I1(\count_value_i_reg[5]_0 ),
        .I2(rd_en),
        .I3(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [0]),
        .I4(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [1]),
        .I5(Q[1]),
        .O(D));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_3 
       (.I0(Q[4]),
        .I1(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [3]),
        .O(\count_value_i_reg[4]_0 ));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pf_ic_rc.ram_empty_i_i_3 
       (.I0(Q[2]),
        .I1(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [2]),
        .I2(Q[1]),
        .I3(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [1]),
        .I4(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] [0]),
        .I5(Q[0]),
        .O(\count_value_i_reg[2]_0 ));
  LUT2 #(
    .INIT(4'h2)) 
    \gen_sdpram.xpm_memory_base_inst_i_2 
       (.I0(rd_en),
        .I1(\count_value_i_reg[5]_0 ),
        .O(E));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized7_161
   (Q,
    D,
    wr_en,
    \count_value_i_reg[5]_0 ,
    wrst_busy,
    rst_d1,
    \gwdc.wr_data_count_i_reg[5] ,
    E,
    wr_clk);
  output [5:0]Q;
  output [4:0]D;
  input wr_en;
  input \count_value_i_reg[5]_0 ;
  input wrst_busy;
  input rst_d1;
  input [5:0]\gwdc.wr_data_count_i_reg[5] ;
  input [0:0]E;
  input wr_clk;

  wire [4:0]D;
  wire [0:0]E;
  wire [5:0]Q;
  wire \count_value_i[0]_i_1__1_n_0 ;
  wire \count_value_i[1]_i_1__1_n_0 ;
  wire \count_value_i[2]_i_1__1_n_0 ;
  wire \count_value_i[3]_i_1__1_n_0 ;
  wire \count_value_i[4]_i_1__1_n_0 ;
  wire \count_value_i[5]_i_1_n_0 ;
  wire \count_value_i[5]_i_2_n_0 ;
  wire \count_value_i_reg[5]_0 ;
  wire \gwdc.wr_data_count_i[5]_i_2_n_0 ;
  wire \gwdc.wr_data_count_i[5]_i_3_n_0 ;
  wire \gwdc.wr_data_count_i[5]_i_4_n_0 ;
  wire \gwdc.wr_data_count_i[5]_i_5_n_0 ;
  wire \gwdc.wr_data_count_i[5]_i_6_n_0 ;
  wire \gwdc.wr_data_count_i[5]_i_7_n_0 ;
  wire [5:0]\gwdc.wr_data_count_i_reg[5] ;
  wire \gwdc.wr_data_count_i_reg[5]_i_1_n_3 ;
  wire \gwdc.wr_data_count_i_reg[5]_i_1_n_4 ;
  wire \gwdc.wr_data_count_i_reg[5]_i_1_n_5 ;
  wire \gwdc.wr_data_count_i_reg[5]_i_1_n_6 ;
  wire \gwdc.wr_data_count_i_reg[5]_i_1_n_7 ;
  wire rst_d1;
  wire wr_clk;
  wire wr_en;
  wire wrst_busy;
  wire [7:5]\NLW_gwdc.wr_data_count_i_reg[5]_i_1_CO_UNCONNECTED ;
  wire [7:0]\NLW_gwdc.wr_data_count_i_reg[5]_i_1_O_UNCONNECTED ;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__1 
       (.I0(Q[0]),
        .O(\count_value_i[0]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair243" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .O(\count_value_i[1]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair243" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__1 
       (.I0(Q[1]),
        .I1(Q[0]),
        .I2(Q[2]),
        .O(\count_value_i[2]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair242" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__1 
       (.I0(Q[2]),
        .I1(Q[0]),
        .I2(Q[1]),
        .I3(Q[3]),
        .O(\count_value_i[3]_i_1__1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair242" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[4]_i_1__1 
       (.I0(Q[0]),
        .I1(Q[1]),
        .I2(Q[2]),
        .I3(Q[3]),
        .I4(Q[4]),
        .O(\count_value_i[4]_i_1__1_n_0 ));
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[5]_i_1 
       (.I0(\count_value_i[5]_i_2_n_0 ),
        .I1(Q[4]),
        .I2(Q[3]),
        .I3(Q[2]),
        .I4(Q[5]),
        .O(\count_value_i[5]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'h0000000800000000)) 
    \count_value_i[5]_i_2 
       (.I0(Q[0]),
        .I1(wr_en),
        .I2(\count_value_i_reg[5]_0 ),
        .I3(wrst_busy),
        .I4(rst_d1),
        .I5(Q[1]),
        .O(\count_value_i[5]_i_2_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__1_n_0 ),
        .Q(Q[0]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__1_n_0 ),
        .Q(Q[1]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__1_n_0 ),
        .Q(Q[2]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__1_n_0 ),
        .Q(Q[3]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[4]_i_1__1_n_0 ),
        .Q(Q[4]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[5] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[5]_i_1_n_0 ),
        .Q(Q[5]),
        .R(wrst_busy));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_2 
       (.I0(Q[5]),
        .I1(\gwdc.wr_data_count_i_reg[5] [5]),
        .O(\gwdc.wr_data_count_i[5]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_3 
       (.I0(Q[4]),
        .I1(\gwdc.wr_data_count_i_reg[5] [4]),
        .O(\gwdc.wr_data_count_i[5]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_4 
       (.I0(Q[3]),
        .I1(\gwdc.wr_data_count_i_reg[5] [3]),
        .O(\gwdc.wr_data_count_i[5]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_5 
       (.I0(Q[2]),
        .I1(\gwdc.wr_data_count_i_reg[5] [2]),
        .O(\gwdc.wr_data_count_i[5]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_6 
       (.I0(Q[1]),
        .I1(\gwdc.wr_data_count_i_reg[5] [1]),
        .O(\gwdc.wr_data_count_i[5]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gwdc.wr_data_count_i[5]_i_7 
       (.I0(Q[0]),
        .I1(\gwdc.wr_data_count_i_reg[5] [0]),
        .O(\gwdc.wr_data_count_i[5]_i_7_n_0 ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \gwdc.wr_data_count_i_reg[5]_i_1 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\NLW_gwdc.wr_data_count_i_reg[5]_i_1_CO_UNCONNECTED [7:5],\gwdc.wr_data_count_i_reg[5]_i_1_n_3 ,\gwdc.wr_data_count_i_reg[5]_i_1_n_4 ,\gwdc.wr_data_count_i_reg[5]_i_1_n_5 ,\gwdc.wr_data_count_i_reg[5]_i_1_n_6 ,\gwdc.wr_data_count_i_reg[5]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,Q[4:0]}),
        .O({\NLW_gwdc.wr_data_count_i_reg[5]_i_1_O_UNCONNECTED [7:6],D,\NLW_gwdc.wr_data_count_i_reg[5]_i_1_O_UNCONNECTED [0]}),
        .S({1'b0,1'b0,\gwdc.wr_data_count_i[5]_i_2_n_0 ,\gwdc.wr_data_count_i[5]_i_3_n_0 ,\gwdc.wr_data_count_i[5]_i_4_n_0 ,\gwdc.wr_data_count_i[5]_i_5_n_0 ,\gwdc.wr_data_count_i[5]_i_6_n_0 ,\gwdc.wr_data_count_i[5]_i_7_n_0 }));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized8
   (empty_i0,
    \gen_pf_ic_rc.ram_empty_i_reg ,
    \gen_pf_ic_rc.ram_empty_i_reg_0 ,
    Q,
    rd_en,
    \gen_pf_ic_rc.ram_empty_i_reg_1 ,
    \count_value_i_reg[4]_0 ,
    \count_value_i_reg[0]_0 ,
    E,
    rd_clk);
  output empty_i0;
  input \gen_pf_ic_rc.ram_empty_i_reg ;
  input \gen_pf_ic_rc.ram_empty_i_reg_0 ;
  input [4:0]Q;
  input rd_en;
  input \gen_pf_ic_rc.ram_empty_i_reg_1 ;
  input \count_value_i_reg[4]_0 ;
  input \count_value_i_reg[0]_0 ;
  input [0:0]E;
  input rd_clk;

  wire [0:0]E;
  wire [4:0]Q;
  wire \count_value_i[0]_i_1__2_n_0 ;
  wire \count_value_i[1]_i_1__2_n_0 ;
  wire \count_value_i[2]_i_1__2_n_0 ;
  wire \count_value_i[3]_i_1__2_n_0 ;
  wire \count_value_i[4]_i_1__2_n_0 ;
  wire \count_value_i_reg[0]_0 ;
  wire \count_value_i_reg[4]_0 ;
  wire \count_value_i_reg_n_0_[0] ;
  wire \count_value_i_reg_n_0_[1] ;
  wire \count_value_i_reg_n_0_[2] ;
  wire \count_value_i_reg_n_0_[3] ;
  wire \count_value_i_reg_n_0_[4] ;
  wire empty_i0;
  wire \gen_pf_ic_rc.ram_empty_i_i_4_n_0 ;
  wire \gen_pf_ic_rc.ram_empty_i_i_5_n_0 ;
  wire \gen_pf_ic_rc.ram_empty_i_i_6_n_0 ;
  wire \gen_pf_ic_rc.ram_empty_i_reg ;
  wire \gen_pf_ic_rc.ram_empty_i_reg_0 ;
  wire \gen_pf_ic_rc.ram_empty_i_reg_1 ;
  wire rd_clk;
  wire rd_en;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__2 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .O(\count_value_i[0]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair424" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__2 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg_n_0_[1] ),
        .O(\count_value_i[1]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair423" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__2 
       (.I0(\count_value_i_reg_n_0_[1] ),
        .I1(\count_value_i_reg_n_0_[0] ),
        .I2(\count_value_i_reg_n_0_[2] ),
        .O(\count_value_i[2]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair424" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__2 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg_n_0_[1] ),
        .I2(\count_value_i_reg_n_0_[2] ),
        .I3(\count_value_i_reg_n_0_[3] ),
        .O(\count_value_i[3]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hDFFFFFFF20000000)) 
    \count_value_i[4]_i_1__2 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg[4]_0 ),
        .I2(\count_value_i_reg_n_0_[3] ),
        .I3(\count_value_i_reg_n_0_[2] ),
        .I4(\count_value_i_reg_n_0_[1] ),
        .I5(\count_value_i_reg_n_0_[4] ),
        .O(\count_value_i[4]_i_1__2_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__2_n_0 ),
        .Q(\count_value_i_reg_n_0_[0] ),
        .S(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__2_n_0 ),
        .Q(\count_value_i_reg_n_0_[1] ),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__2_n_0 ),
        .Q(\count_value_i_reg_n_0_[2] ),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__2_n_0 ),
        .Q(\count_value_i_reg_n_0_[3] ),
        .R(\count_value_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[4]_i_1__2_n_0 ),
        .Q(\count_value_i_reg_n_0_[4] ),
        .R(\count_value_i_reg[0]_0 ));
  LUT5 #(
    .INIT(32'hF8888888)) 
    \gen_pf_ic_rc.ram_empty_i_i_1 
       (.I0(\gen_pf_ic_rc.ram_empty_i_reg ),
        .I1(\gen_pf_ic_rc.ram_empty_i_reg_0 ),
        .I2(\gen_pf_ic_rc.ram_empty_i_i_4_n_0 ),
        .I3(\gen_pf_ic_rc.ram_empty_i_i_5_n_0 ),
        .I4(\gen_pf_ic_rc.ram_empty_i_i_6_n_0 ),
        .O(empty_i0));
  LUT4 #(
    .INIT(16'h0090)) 
    \gen_pf_ic_rc.ram_empty_i_i_4 
       (.I0(\count_value_i_reg_n_0_[4] ),
        .I1(Q[4]),
        .I2(rd_en),
        .I3(\gen_pf_ic_rc.ram_empty_i_reg_1 ),
        .O(\gen_pf_ic_rc.ram_empty_i_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair423" *) 
  LUT4 #(
    .INIT(16'h9009)) 
    \gen_pf_ic_rc.ram_empty_i_i_5 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(Q[0]),
        .I2(\count_value_i_reg_n_0_[1] ),
        .I3(Q[1]),
        .O(\gen_pf_ic_rc.ram_empty_i_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \gen_pf_ic_rc.ram_empty_i_i_6 
       (.I0(\count_value_i_reg_n_0_[2] ),
        .I1(Q[2]),
        .I2(\count_value_i_reg_n_0_[3] ),
        .I3(Q[3]),
        .O(\gen_pf_ic_rc.ram_empty_i_i_6_n_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized8_128
   (\count_value_i_reg[2]_0 ,
    Q,
    D,
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] ,
    E,
    wrst_busy,
    wr_clk);
  output \count_value_i_reg[2]_0 ;
  output [1:0]Q;
  output [3:0]D;
  input [4:0]\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] ;
  input [0:0]E;
  input wrst_busy;
  input wr_clk;

  wire [3:0]D;
  wire [0:0]E;
  wire [1:0]Q;
  wire \count_value_i[0]_i_1__0_n_0 ;
  wire \count_value_i[1]_i_1__0_n_0 ;
  wire \count_value_i[2]_i_1__0_n_0 ;
  wire \count_value_i[3]_i_1__0_n_0 ;
  wire \count_value_i[4]_i_1__0_n_0 ;
  wire \count_value_i_reg[2]_0 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_2_n_0 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_3_n_0 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_4_n_0 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_5_n_0 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_6_n_0 ;
  wire [4:0]\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_4 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_5 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_6 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_7 ;
  wire wr_clk;
  wire [3:1]wr_pntr_plus1_pf;
  wire wrst_busy;
  wire [7:4]\NLW_gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_CO_UNCONNECTED ;
  wire [7:0]\NLW_gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_O_UNCONNECTED ;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__0 
       (.I0(wr_pntr_plus1_pf[1]),
        .O(\count_value_i[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair428" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__0 
       (.I0(wr_pntr_plus1_pf[1]),
        .I1(wr_pntr_plus1_pf[2]),
        .O(\count_value_i[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair428" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__0 
       (.I0(wr_pntr_plus1_pf[2]),
        .I1(wr_pntr_plus1_pf[1]),
        .I2(wr_pntr_plus1_pf[3]),
        .O(\count_value_i[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair427" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__0 
       (.I0(wr_pntr_plus1_pf[1]),
        .I1(wr_pntr_plus1_pf[2]),
        .I2(wr_pntr_plus1_pf[3]),
        .I3(Q[0]),
        .O(\count_value_i[3]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair427" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[4]_i_1__0 
       (.I0(wr_pntr_plus1_pf[1]),
        .I1(Q[0]),
        .I2(wr_pntr_plus1_pf[3]),
        .I3(wr_pntr_plus1_pf[2]),
        .I4(Q[1]),
        .O(\count_value_i[4]_i_1__0_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__0_n_0 ),
        .Q(wr_pntr_plus1_pf[1]),
        .S(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__0_n_0 ),
        .Q(wr_pntr_plus1_pf[2]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__0_n_0 ),
        .Q(wr_pntr_plus1_pf[3]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__0_n_0 ),
        .Q(Q[0]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[4]_i_1__0_n_0 ),
        .Q(Q[1]),
        .R(wrst_busy));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_2 
       (.I0(Q[1]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [4]),
        .O(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_3 
       (.I0(Q[0]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [3]),
        .O(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_4 
       (.I0(wr_pntr_plus1_pf[3]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [2]),
        .O(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_5 
       (.I0(wr_pntr_plus1_pf[2]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [1]),
        .O(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_6 
       (.I0(wr_pntr_plus1_pf[1]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [0]),
        .O(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_6_n_0 ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1 
       (.CI(E),
        .CI_TOP(1'b0),
        .CO({\NLW_gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_CO_UNCONNECTED [7:4],\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_4 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_5 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_6 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,Q[0],wr_pntr_plus1_pf}),
        .O({\NLW_gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_O_UNCONNECTED [7:5],D,\NLW_gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_O_UNCONNECTED [0]}),
        .S({1'b0,1'b0,1'b0,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_2_n_0 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_3_n_0 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_4_n_0 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_5_n_0 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_6_n_0 }));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_3 
       (.I0(wr_pntr_plus1_pf[3]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [2]),
        .I2(wr_pntr_plus1_pf[2]),
        .I3(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [1]),
        .I4(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [0]),
        .I5(wr_pntr_plus1_pf[1]),
        .O(\count_value_i_reg[2]_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized8_159
   (empty_i0,
    \gen_pf_ic_rc.ram_empty_i_reg ,
    \gen_pf_ic_rc.ram_empty_i_reg_0 ,
    Q,
    rd_en,
    \gen_pf_ic_rc.ram_empty_i_reg_1 ,
    \count_value_i_reg[4]_0 ,
    SR,
    E,
    rd_clk);
  output empty_i0;
  input \gen_pf_ic_rc.ram_empty_i_reg ;
  input \gen_pf_ic_rc.ram_empty_i_reg_0 ;
  input [4:0]Q;
  input rd_en;
  input \gen_pf_ic_rc.ram_empty_i_reg_1 ;
  input \count_value_i_reg[4]_0 ;
  input [0:0]SR;
  input [0:0]E;
  input rd_clk;

  wire [0:0]E;
  wire [4:0]Q;
  wire [0:0]SR;
  wire \count_value_i[0]_i_1__2_n_0 ;
  wire \count_value_i[1]_i_1__2_n_0 ;
  wire \count_value_i[2]_i_1__2_n_0 ;
  wire \count_value_i[3]_i_1__2_n_0 ;
  wire \count_value_i[4]_i_1__2_n_0 ;
  wire \count_value_i_reg[4]_0 ;
  wire \count_value_i_reg_n_0_[0] ;
  wire \count_value_i_reg_n_0_[1] ;
  wire \count_value_i_reg_n_0_[2] ;
  wire \count_value_i_reg_n_0_[3] ;
  wire \count_value_i_reg_n_0_[4] ;
  wire empty_i0;
  wire \gen_pf_ic_rc.ram_empty_i_i_4_n_0 ;
  wire \gen_pf_ic_rc.ram_empty_i_i_5_n_0 ;
  wire \gen_pf_ic_rc.ram_empty_i_i_6_n_0 ;
  wire \gen_pf_ic_rc.ram_empty_i_reg ;
  wire \gen_pf_ic_rc.ram_empty_i_reg_0 ;
  wire \gen_pf_ic_rc.ram_empty_i_reg_1 ;
  wire rd_clk;
  wire rd_en;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__2 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .O(\count_value_i[0]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair241" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__2 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg_n_0_[1] ),
        .O(\count_value_i[1]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair240" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__2 
       (.I0(\count_value_i_reg_n_0_[1] ),
        .I1(\count_value_i_reg_n_0_[0] ),
        .I2(\count_value_i_reg_n_0_[2] ),
        .O(\count_value_i[2]_i_1__2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair241" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__2 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg_n_0_[1] ),
        .I2(\count_value_i_reg_n_0_[2] ),
        .I3(\count_value_i_reg_n_0_[3] ),
        .O(\count_value_i[3]_i_1__2_n_0 ));
  LUT6 #(
    .INIT(64'hDFFFFFFF20000000)) 
    \count_value_i[4]_i_1__2 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg[4]_0 ),
        .I2(\count_value_i_reg_n_0_[3] ),
        .I3(\count_value_i_reg_n_0_[2] ),
        .I4(\count_value_i_reg_n_0_[1] ),
        .I5(\count_value_i_reg_n_0_[4] ),
        .O(\count_value_i[4]_i_1__2_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__2_n_0 ),
        .Q(\count_value_i_reg_n_0_[0] ),
        .S(SR));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__2_n_0 ),
        .Q(\count_value_i_reg_n_0_[1] ),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__2_n_0 ),
        .Q(\count_value_i_reg_n_0_[2] ),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__2_n_0 ),
        .Q(\count_value_i_reg_n_0_[3] ),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(rd_clk),
        .CE(E),
        .D(\count_value_i[4]_i_1__2_n_0 ),
        .Q(\count_value_i_reg_n_0_[4] ),
        .R(SR));
  LUT5 #(
    .INIT(32'hF8888888)) 
    \gen_pf_ic_rc.ram_empty_i_i_1 
       (.I0(\gen_pf_ic_rc.ram_empty_i_reg ),
        .I1(\gen_pf_ic_rc.ram_empty_i_reg_0 ),
        .I2(\gen_pf_ic_rc.ram_empty_i_i_4_n_0 ),
        .I3(\gen_pf_ic_rc.ram_empty_i_i_5_n_0 ),
        .I4(\gen_pf_ic_rc.ram_empty_i_i_6_n_0 ),
        .O(empty_i0));
  LUT4 #(
    .INIT(16'h0090)) 
    \gen_pf_ic_rc.ram_empty_i_i_4 
       (.I0(\count_value_i_reg_n_0_[4] ),
        .I1(Q[4]),
        .I2(rd_en),
        .I3(\gen_pf_ic_rc.ram_empty_i_reg_1 ),
        .O(\gen_pf_ic_rc.ram_empty_i_i_4_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair240" *) 
  LUT4 #(
    .INIT(16'h9009)) 
    \gen_pf_ic_rc.ram_empty_i_i_5 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(Q[0]),
        .I2(\count_value_i_reg_n_0_[1] ),
        .I3(Q[1]),
        .O(\gen_pf_ic_rc.ram_empty_i_i_5_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \gen_pf_ic_rc.ram_empty_i_i_6 
       (.I0(\count_value_i_reg_n_0_[2] ),
        .I1(Q[2]),
        .I2(\count_value_i_reg_n_0_[3] ),
        .I3(Q[3]),
        .O(\gen_pf_ic_rc.ram_empty_i_i_6_n_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized8_162
   (\count_value_i_reg[2]_0 ,
    Q,
    D,
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] ,
    E,
    wrst_busy,
    wr_clk);
  output \count_value_i_reg[2]_0 ;
  output [1:0]Q;
  output [4:0]D;
  input [4:0]\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] ;
  input [0:0]E;
  input wrst_busy;
  input wr_clk;

  wire [4:0]D;
  wire [0:0]E;
  wire [1:0]Q;
  wire \count_value_i[0]_i_1__0_n_0 ;
  wire \count_value_i[1]_i_1__0_n_0 ;
  wire \count_value_i[2]_i_1__0_n_0 ;
  wire \count_value_i[3]_i_1__0_n_0 ;
  wire \count_value_i[4]_i_1__0_n_0 ;
  wire \count_value_i_reg[2]_0 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_2_n_0 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_3_n_0 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_4_n_0 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_5_n_0 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_6_n_0 ;
  wire [4:0]\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_4 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_5 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_6 ;
  wire \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_7 ;
  wire wr_clk;
  wire [3:1]wr_pntr_plus1_pf;
  wire wrst_busy;
  wire [7:4]\NLW_gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_CO_UNCONNECTED ;
  wire [7:5]\NLW_gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_O_UNCONNECTED ;

  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1__0 
       (.I0(wr_pntr_plus1_pf[1]),
        .O(\count_value_i[0]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair245" *) 
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1__0 
       (.I0(wr_pntr_plus1_pf[1]),
        .I1(wr_pntr_plus1_pf[2]),
        .O(\count_value_i[1]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair245" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1__0 
       (.I0(wr_pntr_plus1_pf[2]),
        .I1(wr_pntr_plus1_pf[1]),
        .I2(wr_pntr_plus1_pf[3]),
        .O(\count_value_i[2]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair244" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1__0 
       (.I0(wr_pntr_plus1_pf[1]),
        .I1(wr_pntr_plus1_pf[2]),
        .I2(wr_pntr_plus1_pf[3]),
        .I3(Q[0]),
        .O(\count_value_i[3]_i_1__0_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair244" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[4]_i_1__0 
       (.I0(wr_pntr_plus1_pf[1]),
        .I1(Q[0]),
        .I2(wr_pntr_plus1_pf[3]),
        .I3(wr_pntr_plus1_pf[2]),
        .I4(Q[1]),
        .O(\count_value_i[4]_i_1__0_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[0] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1__0_n_0 ),
        .Q(wr_pntr_plus1_pf[1]),
        .S(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[1] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1__0_n_0 ),
        .Q(wr_pntr_plus1_pf[2]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1__0_n_0 ),
        .Q(wr_pntr_plus1_pf[3]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1__0_n_0 ),
        .Q(Q[0]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[4]_i_1__0_n_0 ),
        .Q(Q[1]),
        .R(wrst_busy));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_2 
       (.I0(Q[1]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [4]),
        .O(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_3 
       (.I0(Q[0]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [3]),
        .O(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_4 
       (.I0(wr_pntr_plus1_pf[3]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [2]),
        .O(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_5 
       (.I0(wr_pntr_plus1_pf[2]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [1]),
        .O(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_6 
       (.I0(wr_pntr_plus1_pf[1]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [0]),
        .O(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_6_n_0 ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1 
       (.CI(E),
        .CI_TOP(1'b0),
        .CO({\NLW_gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_CO_UNCONNECTED [7:4],\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_4 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_5 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_6 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,1'b0,Q[0],wr_pntr_plus1_pf}),
        .O({\NLW_gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5]_i_1_O_UNCONNECTED [7:5],D}),
        .S({1'b0,1'b0,1'b0,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_2_n_0 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_3_n_0 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_4_n_0 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_5_n_0 ,\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q[5]_i_6_n_0 }));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_3 
       (.I0(wr_pntr_plus1_pf[3]),
        .I1(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [2]),
        .I2(wr_pntr_plus1_pf[2]),
        .I3(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [1]),
        .I4(\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] [0]),
        .I5(wr_pntr_plus1_pf[1]),
        .O(\count_value_i_reg[2]_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized9
   (\count_value_i_reg[2]_0 ,
    \count_value_i_reg[4]_0 ,
    Q,
    wrst_busy,
    E,
    wr_clk);
  output \count_value_i_reg[2]_0 ;
  output [1:0]\count_value_i_reg[4]_0 ;
  input [2:0]Q;
  input wrst_busy;
  input [0:0]E;
  input wr_clk;

  wire [0:0]E;
  wire [2:0]Q;
  wire \count_value_i[0]_i_1_n_0 ;
  wire \count_value_i[1]_i_1_n_0 ;
  wire \count_value_i[2]_i_1_n_0 ;
  wire \count_value_i[3]_i_1_n_0 ;
  wire \count_value_i[4]_i_1_n_0 ;
  wire \count_value_i_reg[2]_0 ;
  wire [1:0]\count_value_i_reg[4]_0 ;
  wire \count_value_i_reg_n_0_[0] ;
  wire \count_value_i_reg_n_0_[1] ;
  wire \count_value_i_reg_n_0_[2] ;
  wire wr_clk;
  wire wrst_busy;

  (* SOFT_HLUTNM = "soft_lutpair430" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .O(\count_value_i[0]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg_n_0_[1] ),
        .O(\count_value_i[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair430" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1 
       (.I0(\count_value_i_reg_n_0_[1] ),
        .I1(\count_value_i_reg_n_0_[0] ),
        .I2(\count_value_i_reg_n_0_[2] ),
        .O(\count_value_i[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair429" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg_n_0_[1] ),
        .I2(\count_value_i_reg_n_0_[2] ),
        .I3(\count_value_i_reg[4]_0 [0]),
        .O(\count_value_i[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair429" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[4]_i_1 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg[4]_0 [0]),
        .I2(\count_value_i_reg_n_0_[2] ),
        .I3(\count_value_i_reg_n_0_[1] ),
        .I4(\count_value_i_reg[4]_0 [1]),
        .O(\count_value_i[4]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1_n_0 ),
        .Q(\count_value_i_reg_n_0_[0] ),
        .R(wrst_busy));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[1] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1_n_0 ),
        .Q(\count_value_i_reg_n_0_[1] ),
        .S(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1_n_0 ),
        .Q(\count_value_i_reg_n_0_[2] ),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1_n_0 ),
        .Q(\count_value_i_reg[4]_0 [0]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[4]_i_1_n_0 ),
        .Q(\count_value_i_reg[4]_0 [1]),
        .R(wrst_busy));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_4 
       (.I0(\count_value_i_reg_n_0_[2] ),
        .I1(Q[2]),
        .I2(\count_value_i_reg_n_0_[1] ),
        .I3(Q[1]),
        .I4(Q[0]),
        .I5(\count_value_i_reg_n_0_[0] ),
        .O(\count_value_i_reg[2]_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_counter_updn" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized9_163
   (\count_value_i_reg[2]_0 ,
    \count_value_i_reg[4]_0 ,
    Q,
    wrst_busy,
    E,
    wr_clk);
  output \count_value_i_reg[2]_0 ;
  output [1:0]\count_value_i_reg[4]_0 ;
  input [2:0]Q;
  input wrst_busy;
  input [0:0]E;
  input wr_clk;

  wire [0:0]E;
  wire [2:0]Q;
  wire \count_value_i[0]_i_1_n_0 ;
  wire \count_value_i[1]_i_1_n_0 ;
  wire \count_value_i[2]_i_1_n_0 ;
  wire \count_value_i[3]_i_1_n_0 ;
  wire \count_value_i[4]_i_1_n_0 ;
  wire \count_value_i_reg[2]_0 ;
  wire [1:0]\count_value_i_reg[4]_0 ;
  wire \count_value_i_reg_n_0_[0] ;
  wire \count_value_i_reg_n_0_[1] ;
  wire \count_value_i_reg_n_0_[2] ;
  wire wr_clk;
  wire wrst_busy;

  (* SOFT_HLUTNM = "soft_lutpair247" *) 
  LUT1 #(
    .INIT(2'h1)) 
    \count_value_i[0]_i_1 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .O(\count_value_i[0]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'h6)) 
    \count_value_i[1]_i_1 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg_n_0_[1] ),
        .O(\count_value_i[1]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair247" *) 
  LUT3 #(
    .INIT(8'h78)) 
    \count_value_i[2]_i_1 
       (.I0(\count_value_i_reg_n_0_[1] ),
        .I1(\count_value_i_reg_n_0_[0] ),
        .I2(\count_value_i_reg_n_0_[2] ),
        .O(\count_value_i[2]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair246" *) 
  LUT4 #(
    .INIT(16'h7F80)) 
    \count_value_i[3]_i_1 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg_n_0_[1] ),
        .I2(\count_value_i_reg_n_0_[2] ),
        .I3(\count_value_i_reg[4]_0 [0]),
        .O(\count_value_i[3]_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair246" *) 
  LUT5 #(
    .INIT(32'h7FFF8000)) 
    \count_value_i[4]_i_1 
       (.I0(\count_value_i_reg_n_0_[0] ),
        .I1(\count_value_i_reg[4]_0 [0]),
        .I2(\count_value_i_reg_n_0_[2] ),
        .I3(\count_value_i_reg_n_0_[1] ),
        .I4(\count_value_i_reg[4]_0 [1]),
        .O(\count_value_i[4]_i_1_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[0] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[0]_i_1_n_0 ),
        .Q(\count_value_i_reg_n_0_[0] ),
        .R(wrst_busy));
  FDSE #(
    .INIT(1'b1)) 
    \count_value_i_reg[1] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[1]_i_1_n_0 ),
        .Q(\count_value_i_reg_n_0_[1] ),
        .S(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[2] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[2]_i_1_n_0 ),
        .Q(\count_value_i_reg_n_0_[2] ),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[3] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[3]_i_1_n_0 ),
        .Q(\count_value_i_reg[4]_0 [0]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \count_value_i_reg[4] 
       (.C(wr_clk),
        .CE(E),
        .D(\count_value_i[4]_i_1_n_0 ),
        .Q(\count_value_i_reg[4]_0 [1]),
        .R(wrst_busy));
  LUT6 #(
    .INIT(64'h9009000000009009)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_4 
       (.I0(\count_value_i_reg_n_0_[2] ),
        .I1(Q[2]),
        .I2(\count_value_i_reg_n_0_[1] ),
        .I3(Q[1]),
        .I4(Q[0]),
        .I5(\count_value_i_reg_n_0_[0] ),
        .O(\count_value_i_reg[2]_0 ));
endmodule

(* CASCADE_HEIGHT = "0" *) (* CDC_SYNC_STAGES = "2" *) (* DOUT_RESET_VALUE = "0" *) 
(* ECC_MODE = "no_ecc" *) (* EN_ADV_FEATURE_ASYNC = "16'b0000011100000111" *) (* EN_SIM_ASSERT_ERR = "warning" *) 
(* FIFO_MEMORY_TYPE = "distributed" *) (* FIFO_READ_LATENCY = "1" *) (* FIFO_WRITE_DEPTH = "32" *) 
(* FULL_RESET_VALUE = "0" *) (* PROG_EMPTY_THRESH = "10" *) (* PROG_FULL_THRESH = "29" *) 
(* P_COMMON_CLOCK = "0" *) (* P_ECC_MODE = "0" *) (* P_FIFO_MEMORY_TYPE = "1" *) 
(* P_READ_MODE = "0" *) (* P_WAKEUP_TIME = "2" *) (* RD_DATA_COUNT_WIDTH = "5" *) 
(* READ_DATA_WIDTH = "26" *) (* READ_MODE = "std" *) (* RELATED_CLOCKS = "0" *) 
(* SIM_ASSERT_CHK = "0" *) (* USE_ADV_FEATURES = "0707" *) (* WAKEUP_TIME = "0" *) 
(* WRITE_DATA_WIDTH = "26" *) (* WR_DATA_COUNT_WIDTH = "5" *) (* XPM_MODULE = "TRUE" *) 
(* dont_touch = "true" *) (* is_du_within_envelope = "true" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_async
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_clk,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [25:0]din;
  output full;
  output prog_full;
  output [4:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_clk;
  input rd_en;
  output [25:0]dout;
  output empty;
  output prog_empty;
  output [4:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [25:0]din;
  wire [25:0]dout;
  wire empty;
  wire full;
  wire overflow;
  wire prog_empty;
  wire prog_full;
  wire rd_clk;
  wire [4:0]rd_data_count;
  wire rd_en;
  wire rd_rst_busy;
  wire rst;
  wire underflow;
  wire wr_clk;
  wire [4:0]wr_data_count;
  wire wr_en;
  wire wr_rst_busy;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_almost_empty_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_almost_full_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_data_valid_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_dbiterr_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_full_n_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_sbiterr_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_wr_ack_UNCONNECTED ;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign sbiterr = \<const0> ;
  assign wr_ack = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* CASCADE_HEIGHT = "0" *) 
  (* CDC_DEST_SYNC_FF = "2" *) 
  (* COMMON_CLOCK = "0" *) 
  (* DOUT_RESET_VALUE = "0" *) 
  (* ECC_MODE = "0" *) 
  (* ENABLE_ECC = "0" *) 
  (* EN_ADV_FEATURE = "16'b0000011100000111" *) 
  (* EN_AE = "1'b0" *) 
  (* EN_AF = "1'b0" *) 
  (* EN_DVLD = "1'b0" *) 
  (* EN_OF = "1'b1" *) 
  (* EN_PE = "1'b1" *) 
  (* EN_PF = "1'b1" *) 
  (* EN_RDC = "1'b1" *) 
  (* EN_SIM_ASSERT_ERR = "warning" *) 
  (* EN_UF = "1'b1" *) 
  (* EN_WACK = "1'b0" *) 
  (* EN_WDC = "1'b1" *) 
  (* FG_EQ_ASYM_DOUT = "1'b0" *) 
  (* FIFO_MEMORY_TYPE = "1" *) 
  (* FIFO_MEM_TYPE = "1" *) 
  (* FIFO_READ_DEPTH = "32" *) 
  (* FIFO_READ_LATENCY = "1" *) 
  (* FIFO_SIZE = "832" *) 
  (* FIFO_WRITE_DEPTH = "32" *) 
  (* FULL_RESET_VALUE = "0" *) 
  (* FULL_RST_VAL = "1'b0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* PE_THRESH_ADJ = "10" *) 
  (* PE_THRESH_MAX = "29" *) 
  (* PE_THRESH_MIN = "3" *) 
  (* PF_THRESH_ADJ = "29" *) 
  (* PF_THRESH_MAX = "29" *) 
  (* PF_THRESH_MIN = "5" *) 
  (* PROG_EMPTY_THRESH = "10" *) 
  (* PROG_FULL_THRESH = "29" *) 
  (* RD_DATA_COUNT_WIDTH = "5" *) 
  (* RD_DC_WIDTH_EXT = "6" *) 
  (* RD_LATENCY = "1" *) 
  (* RD_MODE = "0" *) 
  (* RD_PNTR_WIDTH = "5" *) 
  (* READ_DATA_WIDTH = "26" *) 
  (* READ_MODE = "0" *) 
  (* READ_MODE_LL = "0" *) 
  (* RELATED_CLOCKS = "0" *) 
  (* REMOVE_WR_RD_PROT_LOGIC = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_ADV_FEATURES = "0707" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WIDTH_RATIO = "1" *) 
  (* WRITE_DATA_WIDTH = "26" *) 
  (* WR_DATA_COUNT_WIDTH = "5" *) 
  (* WR_DC_WIDTH_EXT = "6" *) 
  (* WR_DEPTH_LOG = "5" *) 
  (* WR_PNTR_WIDTH = "5" *) 
  (* WR_RD_RATIO = "0" *) 
  (* WR_WIDTH_LOG = "5" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* both_stages_valid = "3" *) 
  (* invalid = "0" *) 
  (* stage1_valid = "2" *) 
  (* stage2_valid = "1" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__parameterized1 \gnuram_async_fifo.xpm_fifo_base_inst 
       (.almost_empty(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_almost_empty_UNCONNECTED ),
        .almost_full(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_almost_full_UNCONNECTED ),
        .data_valid(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_data_valid_UNCONNECTED ),
        .dbiterr(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_dbiterr_UNCONNECTED ),
        .din(din),
        .dout(dout),
        .empty(empty),
        .full(full),
        .full_n(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_full_n_UNCONNECTED ),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .overflow(overflow),
        .prog_empty(prog_empty),
        .prog_full(prog_full),
        .rd_clk(rd_clk),
        .rd_data_count(rd_data_count),
        .rd_en(rd_en),
        .rd_rst_busy(rd_rst_busy),
        .rst(rst),
        .sbiterr(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_sbiterr_UNCONNECTED ),
        .sleep(1'b0),
        .underflow(underflow),
        .wr_ack(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_wr_ack_UNCONNECTED ),
        .wr_clk(wr_clk),
        .wr_data_count(wr_data_count),
        .wr_en(wr_en),
        .wr_rst_busy(wr_rst_busy));
endmodule

(* CASCADE_HEIGHT = "0" *) (* CDC_SYNC_STAGES = "2" *) (* DOUT_RESET_VALUE = "0" *) 
(* ECC_MODE = "no_ecc" *) (* EN_ADV_FEATURE_ASYNC = "16'b0000011100000111" *) (* EN_SIM_ASSERT_ERR = "warning" *) 
(* FIFO_MEMORY_TYPE = "distributed" *) (* FIFO_READ_LATENCY = "1" *) (* FIFO_WRITE_DEPTH = "32" *) 
(* FULL_RESET_VALUE = "0" *) (* ORIG_REF_NAME = "xpm_fifo_async" *) (* PROG_EMPTY_THRESH = "10" *) 
(* PROG_FULL_THRESH = "10" *) (* P_COMMON_CLOCK = "0" *) (* P_ECC_MODE = "0" *) 
(* P_FIFO_MEMORY_TYPE = "1" *) (* P_READ_MODE = "0" *) (* P_WAKEUP_TIME = "2" *) 
(* RD_DATA_COUNT_WIDTH = "1" *) (* READ_DATA_WIDTH = "42" *) (* READ_MODE = "std" *) 
(* RELATED_CLOCKS = "0" *) (* SIM_ASSERT_CHK = "0" *) (* USE_ADV_FEATURES = "0707" *) 
(* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH = "42" *) (* WR_DATA_COUNT_WIDTH = "1" *) 
(* XPM_MODULE = "TRUE" *) (* dont_touch = "true" *) (* is_du_within_envelope = "true" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_async__parameterized0
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_clk,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [41:0]din;
  output full;
  output prog_full;
  output [0:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_clk;
  input rd_en;
  output [41:0]dout;
  output empty;
  output prog_empty;
  output [0:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [41:0]din;
  wire [41:0]dout;
  wire empty;
  wire full;
  wire overflow;
  wire prog_empty;
  wire prog_full;
  wire rd_clk;
  wire [0:0]rd_data_count;
  wire rd_en;
  wire rd_rst_busy;
  wire rst;
  wire underflow;
  wire wr_clk;
  wire [0:0]wr_data_count;
  wire wr_en;
  wire wr_rst_busy;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_almost_empty_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_almost_full_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_data_valid_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_dbiterr_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_full_n_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_sbiterr_UNCONNECTED ;
  wire \NLW_gnuram_async_fifo.xpm_fifo_base_inst_wr_ack_UNCONNECTED ;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign sbiterr = \<const0> ;
  assign wr_ack = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* CASCADE_HEIGHT = "0" *) 
  (* CDC_DEST_SYNC_FF = "2" *) 
  (* COMMON_CLOCK = "0" *) 
  (* DOUT_RESET_VALUE = "0" *) 
  (* ECC_MODE = "0" *) 
  (* ENABLE_ECC = "0" *) 
  (* EN_ADV_FEATURE = "16'b0000011100000111" *) 
  (* EN_AE = "1'b0" *) 
  (* EN_AF = "1'b0" *) 
  (* EN_DVLD = "1'b0" *) 
  (* EN_OF = "1'b1" *) 
  (* EN_PE = "1'b1" *) 
  (* EN_PF = "1'b1" *) 
  (* EN_RDC = "1'b1" *) 
  (* EN_SIM_ASSERT_ERR = "warning" *) 
  (* EN_UF = "1'b1" *) 
  (* EN_WACK = "1'b0" *) 
  (* EN_WDC = "1'b1" *) 
  (* FG_EQ_ASYM_DOUT = "1'b0" *) 
  (* FIFO_MEMORY_TYPE = "1" *) 
  (* FIFO_MEM_TYPE = "1" *) 
  (* FIFO_READ_DEPTH = "32" *) 
  (* FIFO_READ_LATENCY = "1" *) 
  (* FIFO_SIZE = "1344" *) 
  (* FIFO_WRITE_DEPTH = "32" *) 
  (* FULL_RESET_VALUE = "0" *) 
  (* FULL_RST_VAL = "1'b0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* PE_THRESH_ADJ = "10" *) 
  (* PE_THRESH_MAX = "29" *) 
  (* PE_THRESH_MIN = "3" *) 
  (* PF_THRESH_ADJ = "10" *) 
  (* PF_THRESH_MAX = "29" *) 
  (* PF_THRESH_MIN = "5" *) 
  (* PROG_EMPTY_THRESH = "10" *) 
  (* PROG_FULL_THRESH = "10" *) 
  (* RD_DATA_COUNT_WIDTH = "1" *) 
  (* RD_DC_WIDTH_EXT = "6" *) 
  (* RD_LATENCY = "1" *) 
  (* RD_MODE = "0" *) 
  (* RD_PNTR_WIDTH = "5" *) 
  (* READ_DATA_WIDTH = "42" *) 
  (* READ_MODE = "0" *) 
  (* READ_MODE_LL = "0" *) 
  (* RELATED_CLOCKS = "0" *) 
  (* REMOVE_WR_RD_PROT_LOGIC = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_ADV_FEATURES = "0707" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WIDTH_RATIO = "1" *) 
  (* WRITE_DATA_WIDTH = "42" *) 
  (* WR_DATA_COUNT_WIDTH = "1" *) 
  (* WR_DC_WIDTH_EXT = "6" *) 
  (* WR_DEPTH_LOG = "5" *) 
  (* WR_PNTR_WIDTH = "5" *) 
  (* WR_RD_RATIO = "0" *) 
  (* WR_WIDTH_LOG = "6" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* both_stages_valid = "3" *) 
  (* invalid = "0" *) 
  (* stage1_valid = "2" *) 
  (* stage2_valid = "1" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__parameterized2 \gnuram_async_fifo.xpm_fifo_base_inst 
       (.almost_empty(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_almost_empty_UNCONNECTED ),
        .almost_full(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_almost_full_UNCONNECTED ),
        .data_valid(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_data_valid_UNCONNECTED ),
        .dbiterr(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_dbiterr_UNCONNECTED ),
        .din(din),
        .dout(dout),
        .empty(empty),
        .full(full),
        .full_n(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_full_n_UNCONNECTED ),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .overflow(overflow),
        .prog_empty(prog_empty),
        .prog_full(prog_full),
        .rd_clk(rd_clk),
        .rd_data_count(rd_data_count),
        .rd_en(rd_en),
        .rd_rst_busy(rd_rst_busy),
        .rst(rst),
        .sbiterr(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_sbiterr_UNCONNECTED ),
        .sleep(1'b0),
        .underflow(underflow),
        .wr_ack(\NLW_gnuram_async_fifo.xpm_fifo_base_inst_wr_ack_UNCONNECTED ),
        .wr_clk(wr_clk),
        .wr_data_count(wr_data_count),
        .wr_en(wr_en),
        .wr_rst_busy(wr_rst_busy));
endmodule

(* CASCADE_HEIGHT = "0" *) (* CDC_DEST_SYNC_FF = "2" *) (* COMMON_CLOCK = "1" *) 
(* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "0" *) (* ENABLE_ECC = "0" *) 
(* EN_ADV_FEATURE = "16'b0000011100000111" *) (* EN_AE = "1'b0" *) (* EN_AF = "1'b0" *) 
(* EN_DVLD = "1'b0" *) (* EN_OF = "1'b1" *) (* EN_PE = "1'b1" *) 
(* EN_PF = "1'b1" *) (* EN_RDC = "1'b1" *) (* EN_SIM_ASSERT_ERR = "warning" *) 
(* EN_UF = "1'b1" *) (* EN_WACK = "1'b0" *) (* EN_WDC = "1'b1" *) 
(* FG_EQ_ASYM_DOUT = "1'b0" *) (* FIFO_MEMORY_TYPE = "1" *) (* FIFO_MEM_TYPE = "1" *) 
(* FIFO_READ_DEPTH = "16" *) (* FIFO_READ_LATENCY = "1" *) (* FIFO_SIZE = "192" *) 
(* FIFO_WRITE_DEPTH = "16" *) (* FULL_RESET_VALUE = "0" *) (* FULL_RST_VAL = "1'b0" *) 
(* PE_THRESH_ADJ = "3" *) (* PE_THRESH_MAX = "11" *) (* PE_THRESH_MIN = "5" *) 
(* PF_THRESH_ADJ = "9" *) (* PF_THRESH_MAX = "11" *) (* PF_THRESH_MIN = "5" *) 
(* PROG_EMPTY_THRESH = "5" *) (* PROG_FULL_THRESH = "11" *) (* RD_DATA_COUNT_WIDTH = "5" *) 
(* RD_DC_WIDTH_EXT = "5" *) (* RD_LATENCY = "2" *) (* RD_MODE = "1" *) 
(* RD_PNTR_WIDTH = "4" *) (* READ_DATA_WIDTH = "12" *) (* READ_MODE = "1" *) 
(* READ_MODE_LL = "1" *) (* RELATED_CLOCKS = "0" *) (* REMOVE_WR_RD_PROT_LOGIC = "0" *) 
(* SIM_ASSERT_CHK = "0" *) (* USE_ADV_FEATURES = "0707" *) (* VERSION = "0" *) 
(* WAKEUP_TIME = "0" *) (* WIDTH_RATIO = "1" *) (* WRITE_DATA_WIDTH = "12" *) 
(* WR_DATA_COUNT_WIDTH = "5" *) (* WR_DC_WIDTH_EXT = "5" *) (* WR_DEPTH_LOG = "4" *) 
(* WR_PNTR_WIDTH = "4" *) (* WR_RD_RATIO = "0" *) (* WR_WIDTH_LOG = "4" *) 
(* XPM_MODULE = "TRUE" *) (* both_stages_valid = "3" *) (* invalid = "0" *) 
(* keep_hierarchy = "soft" *) (* stage1_valid = "2" *) (* stage2_valid = "1" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    full_n,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_clk,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [11:0]din;
  output full;
  output full_n;
  output prog_full;
  output [4:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_clk;
  input rd_en;
  output [11:0]dout;
  output empty;
  output prog_empty;
  output [4:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [1:0]curr_fwft_state;
  wire [11:0]din;
  wire [11:0]dout;
  wire empty;
  wire empty_fwft_i0;
  wire \gen_fwft.ram_regout_en ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ;
  wire leaving_empty0;
  wire [1:0]next_fwft_state__0;
  wire ram_empty_i;
  wire ram_empty_i0;
  wire ram_full_i0;
  wire ram_wr_en_pf;
  wire rd_en;
  wire [3:0]rd_pntr_ext;
  wire rdp_inst_n_2;
  wire rdpp1_inst_n_0;
  wire rdpp1_inst_n_1;
  wire rdpp1_inst_n_2;
  wire rdpp1_inst_n_3;
  wire rst;
  wire rst_d1;
  wire wr_clk;
  wire wr_en;
  wire [3:0]wr_pntr_ext;
  wire wrpp1_inst_n_0;
  wire wrpp1_inst_n_1;
  wire wrpp1_inst_n_2;
  wire wrpp1_inst_n_3;
  wire xpm_fifo_rst_inst_n_1;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ;
  wire [11:0]\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED ;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign full = \<const0> ;
  assign full_n = \<const0> ;
  assign overflow = \<const0> ;
  assign prog_empty = \<const0> ;
  assign prog_full = \<const0> ;
  assign rd_data_count[4] = \<const0> ;
  assign rd_data_count[3] = \<const0> ;
  assign rd_data_count[2] = \<const0> ;
  assign rd_data_count[1] = \<const0> ;
  assign rd_data_count[0] = \<const0> ;
  assign rd_rst_busy = \<const0> ;
  assign sbiterr = \<const0> ;
  assign underflow = \<const0> ;
  assign wr_ack = \<const0> ;
  assign wr_data_count[4] = \<const0> ;
  assign wr_data_count[3] = \<const0> ;
  assign wr_data_count[2] = \<const0> ;
  assign wr_data_count[1] = \<const0> ;
  assign wr_data_count[0] = \<const0> ;
  assign wr_rst_busy = \<const0> ;
  (* SOFT_HLUTNM = "soft_lutpair283" *) 
  LUT4 #(
    .INIT(16'h6A85)) 
    \FSM_sequential_gen_fwft.curr_fwft_state[0]_i_1 
       (.I0(curr_fwft_state[0]),
        .I1(rd_en),
        .I2(curr_fwft_state[1]),
        .I3(ram_empty_i),
        .O(next_fwft_state__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair283" *) 
  LUT3 #(
    .INIT(8'h7C)) 
    \FSM_sequential_gen_fwft.curr_fwft_state[1]_i_1 
       (.I0(rd_en),
        .I1(curr_fwft_state[1]),
        .I2(curr_fwft_state[0]),
        .O(next_fwft_state__0[1]));
  (* FSM_ENCODED_STATES = "invalid:00,stage1_valid:01,both_stages_valid:10,stage2_valid:11" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_fwft.curr_fwft_state_reg[0] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(next_fwft_state__0[0]),
        .Q(curr_fwft_state[0]),
        .R(xpm_fifo_rst_inst_n_1));
  (* FSM_ENCODED_STATES = "invalid:00,stage1_valid:01,both_stages_valid:10,stage2_valid:11" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_fwft.curr_fwft_state_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(next_fwft_state__0[1]),
        .Q(curr_fwft_state[1]),
        .R(xpm_fifo_rst_inst_n_1));
  GND GND
       (.G(\<const0> ));
  (* SOFT_HLUTNM = "soft_lutpair282" *) 
  LUT4 #(
    .INIT(16'hF380)) 
    \gen_fwft.empty_fwft_i_i_1 
       (.I0(rd_en),
        .I1(curr_fwft_state[0]),
        .I2(curr_fwft_state[1]),
        .I3(empty),
        .O(empty_fwft_i0));
  FDSE #(
    .INIT(1'b1)) 
    \gen_fwft.empty_fwft_i_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(empty_fwft_i0),
        .Q(empty),
        .S(xpm_fifo_rst_inst_n_1));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(ram_full_i0),
        .Q(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .R(xpm_fifo_rst_inst_n_1));
  FDSE #(
    .INIT(1'b1)) 
    \gen_pntr_flags_cc.ram_empty_i_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(ram_empty_i0),
        .Q(ram_empty_i),
        .S(xpm_fifo_rst_inst_n_1));
  (* ADDR_WIDTH_A = "4" *) 
  (* ADDR_WIDTH_B = "4" *) 
  (* AUTO_SLEEP_TIME = "0" *) 
  (* BYTE_WRITE_WIDTH_A = "12" *) 
  (* BYTE_WRITE_WIDTH_B = "12" *) 
  (* CASCADE_HEIGHT = "0" *) 
  (* CLOCKING_MODE = "0" *) 
  (* ECC_BIT_RANGE = "[7:0]" *) 
  (* ECC_MODE = "0" *) 
  (* ECC_TYPE = "NONE" *) 
  (* IGNORE_INIT_SYNTH = "0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* MAX_NUM_CHAR = "0" *) 
  (* MEMORY_INIT_FILE = "none" *) 
  (* MEMORY_INIT_PARAM = "" *) 
  (* MEMORY_OPTIMIZATION = "true" *) 
  (* MEMORY_PRIMITIVE = "1" *) 
  (* MEMORY_SIZE = "192" *) 
  (* MEMORY_TYPE = "1" *) 
  (* MESSAGE_CONTROL = "0" *) 
  (* NUM_CHAR_LOC = "0" *) 
  (* P_ECC_MODE = "no_ecc" *) 
  (* P_ENABLE_BYTE_WRITE_A = "0" *) 
  (* P_ENABLE_BYTE_WRITE_B = "0" *) 
  (* P_MAX_DEPTH_DATA = "16" *) 
  (* P_MEMORY_OPT = "yes" *) 
  (* P_MEMORY_PRIMITIVE = "distributed" *) 
  (* P_MIN_WIDTH_DATA = "12" *) 
  (* P_MIN_WIDTH_DATA_A = "12" *) 
  (* P_MIN_WIDTH_DATA_B = "12" *) 
  (* P_MIN_WIDTH_DATA_ECC = "12" *) 
  (* P_MIN_WIDTH_DATA_LDW = "4" *) 
  (* P_MIN_WIDTH_DATA_SHFT = "12" *) 
  (* P_NUM_COLS_WRITE_A = "1" *) 
  (* P_NUM_COLS_WRITE_B = "1" *) 
  (* P_NUM_ROWS_READ_A = "1" *) 
  (* P_NUM_ROWS_READ_B = "1" *) 
  (* P_NUM_ROWS_WRITE_A = "1" *) 
  (* P_NUM_ROWS_WRITE_B = "1" *) 
  (* P_SDP_WRITE_MODE = "yes" *) 
  (* P_WIDTH_ADDR_LSB_READ_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) 
  (* P_WIDTH_ADDR_READ_A = "4" *) 
  (* P_WIDTH_ADDR_READ_B = "4" *) 
  (* P_WIDTH_ADDR_WRITE_A = "4" *) 
  (* P_WIDTH_ADDR_WRITE_B = "4" *) 
  (* P_WIDTH_COL_WRITE_A = "12" *) 
  (* P_WIDTH_COL_WRITE_B = "12" *) 
  (* RAM_DECOMP = "auto" *) 
  (* READ_DATA_WIDTH_A = "12" *) 
  (* READ_DATA_WIDTH_B = "12" *) 
  (* READ_LATENCY_A = "2" *) 
  (* READ_LATENCY_B = "2" *) 
  (* READ_RESET_VALUE_A = "0" *) 
  (* READ_RESET_VALUE_B = "0" *) 
  (* RST_MODE_A = "SYNC" *) 
  (* RST_MODE_B = "SYNC" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_EMBEDDED_CONSTRAINT = "0" *) 
  (* USE_MEM_INIT = "0" *) 
  (* USE_MEM_INIT_MMI = "0" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WRITE_DATA_WIDTH_A = "12" *) 
  (* WRITE_DATA_WIDTH_B = "12" *) 
  (* WRITE_MODE_A = "2" *) 
  (* WRITE_MODE_B = "1" *) 
  (* WRITE_PROTECT = "1" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* rsta_loop_iter = "12" *) 
  (* rstb_loop_iter = "12" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base \gen_sdpram.xpm_memory_base_inst 
       (.addra(wr_pntr_ext),
        .addrb(rd_pntr_ext),
        .clka(wr_clk),
        .clkb(1'b0),
        .dbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ),
        .dbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ),
        .dina(din),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED [11:0]),
        .doutb(dout),
        .ena(ram_wr_en_pf),
        .enb(rdp_inst_n_2),
        .injectdbiterra(1'b0),
        .injectdbiterrb(1'b0),
        .injectsbiterra(1'b0),
        .injectsbiterrb(1'b0),
        .regcea(1'b0),
        .regceb(\gen_fwft.ram_regout_en ),
        .rsta(1'b0),
        .rstb(xpm_fifo_rst_inst_n_1),
        .sbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ),
        .sbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ),
        .sleep(1'b0),
        .wea(1'b0),
        .web(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair282" *) 
  LUT3 #(
    .INIT(8'h62)) 
    \gen_sdpram.xpm_memory_base_inst_i_3 
       (.I0(curr_fwft_state[0]),
        .I1(curr_fwft_state[1]),
        .I2(rd_en),
        .O(\gen_fwft.ram_regout_en ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_148 rdp_inst
       (.E(ram_wr_en_pf),
        .Q(rd_pntr_ext),
        .\count_value_i_reg[0]_0 (curr_fwft_state),
        .\count_value_i_reg[3]_0 (xpm_fifo_rst_inst_n_1),
        .enb(rdp_inst_n_2),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg (\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 (wr_pntr_ext),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ({wrpp1_inst_n_0,wrpp1_inst_n_1,wrpp1_inst_n_2,wrpp1_inst_n_3}),
        .leaving_empty0(leaving_empty0),
        .ram_empty_i(ram_empty_i),
        .ram_full_i0(ram_full_i0),
        .rd_en(rd_en),
        .wr_clk(wr_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_149 rdpp1_inst
       (.E(rdp_inst_n_2),
        .Q({rdpp1_inst_n_0,rdpp1_inst_n_1,rdpp1_inst_n_2,rdpp1_inst_n_3}),
        .\count_value_i_reg[1]_0 (curr_fwft_state),
        .\count_value_i_reg[1]_1 (xpm_fifo_rst_inst_n_1),
        .rd_en(rd_en),
        .wr_clk(wr_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_150 rst_d1_inst
       (.Q(xpm_fifo_rst_inst_n_1),
        .rst_d1(rst_d1),
        .wr_clk(wr_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_151 wrp_inst
       (.E(ram_wr_en_pf),
        .Q(wr_pntr_ext),
        .\count_value_i_reg[0]_0 (xpm_fifo_rst_inst_n_1),
        .enb(rdp_inst_n_2),
        .\gen_pntr_flags_cc.ram_empty_i_reg ({rdpp1_inst_n_0,rdpp1_inst_n_1,rdpp1_inst_n_2,rdpp1_inst_n_3}),
        .leaving_empty0(leaving_empty0),
        .ram_empty_i(ram_empty_i),
        .ram_empty_i0(ram_empty_i0),
        .wr_clk(wr_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_152 wrpp1_inst
       (.E(ram_wr_en_pf),
        .Q({wrpp1_inst_n_0,wrpp1_inst_n_1,wrpp1_inst_n_2,wrpp1_inst_n_3}),
        .\count_value_i_reg[1]_0 (xpm_fifo_rst_inst_n_1),
        .wr_clk(wr_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst_153 xpm_fifo_rst_inst
       (.E(ram_wr_en_pf),
        .Q(xpm_fifo_rst_inst_n_1),
        .\count_value_i_reg[3] (\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .rst(rst),
        .rst_d1(rst_d1),
        .wr_clk(wr_clk),
        .wr_en(wr_en));
endmodule

(* CASCADE_HEIGHT = "0" *) (* CDC_DEST_SYNC_FF = "2" *) (* COMMON_CLOCK = "1" *) 
(* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "0" *) (* ENABLE_ECC = "0" *) 
(* EN_ADV_FEATURE = "16'b0000011100000111" *) (* EN_AE = "1'b0" *) (* EN_AF = "1'b0" *) 
(* EN_DVLD = "1'b0" *) (* EN_OF = "1'b1" *) (* EN_PE = "1'b1" *) 
(* EN_PF = "1'b1" *) (* EN_RDC = "1'b1" *) (* EN_SIM_ASSERT_ERR = "warning" *) 
(* EN_UF = "1'b1" *) (* EN_WACK = "1'b0" *) (* EN_WDC = "1'b1" *) 
(* FG_EQ_ASYM_DOUT = "1'b0" *) (* FIFO_MEMORY_TYPE = "1" *) (* FIFO_MEM_TYPE = "1" *) 
(* FIFO_READ_DEPTH = "16" *) (* FIFO_READ_LATENCY = "1" *) (* FIFO_SIZE = "192" *) 
(* FIFO_WRITE_DEPTH = "16" *) (* FULL_RESET_VALUE = "0" *) (* FULL_RST_VAL = "1'b0" *) 
(* ORIG_REF_NAME = "xpm_fifo_base" *) (* PE_THRESH_ADJ = "3" *) (* PE_THRESH_MAX = "11" *) 
(* PE_THRESH_MIN = "5" *) (* PF_THRESH_ADJ = "9" *) (* PF_THRESH_MAX = "11" *) 
(* PF_THRESH_MIN = "5" *) (* PROG_EMPTY_THRESH = "5" *) (* PROG_FULL_THRESH = "11" *) 
(* RD_DATA_COUNT_WIDTH = "5" *) (* RD_DC_WIDTH_EXT = "5" *) (* RD_LATENCY = "2" *) 
(* RD_MODE = "1" *) (* RD_PNTR_WIDTH = "4" *) (* READ_DATA_WIDTH = "12" *) 
(* READ_MODE = "1" *) (* READ_MODE_LL = "1" *) (* RELATED_CLOCKS = "0" *) 
(* REMOVE_WR_RD_PROT_LOGIC = "0" *) (* SIM_ASSERT_CHK = "0" *) (* USE_ADV_FEATURES = "0707" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WIDTH_RATIO = "1" *) 
(* WRITE_DATA_WIDTH = "12" *) (* WR_DATA_COUNT_WIDTH = "5" *) (* WR_DC_WIDTH_EXT = "5" *) 
(* WR_DEPTH_LOG = "4" *) (* WR_PNTR_WIDTH = "4" *) (* WR_RD_RATIO = "0" *) 
(* WR_WIDTH_LOG = "4" *) (* XPM_MODULE = "TRUE" *) (* both_stages_valid = "3" *) 
(* invalid = "0" *) (* keep_hierarchy = "soft" *) (* stage1_valid = "2" *) 
(* stage2_valid = "1" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__4
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    full_n,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_clk,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [11:0]din;
  output full;
  output full_n;
  output prog_full;
  output [4:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_clk;
  input rd_en;
  output [11:0]dout;
  output empty;
  output prog_empty;
  output [4:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [1:0]curr_fwft_state;
  wire [11:0]din;
  wire [11:0]dout;
  wire empty;
  wire empty_fwft_i0;
  wire \gen_fwft.ram_regout_en ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ;
  wire leaving_empty0;
  wire [1:0]next_fwft_state__0;
  wire ram_empty_i;
  wire ram_empty_i0;
  wire ram_full_i0;
  wire ram_wr_en_pf;
  wire rd_clk;
  wire rd_en;
  wire [3:0]rd_pntr_ext;
  wire rdp_inst_n_2;
  wire rdpp1_inst_n_0;
  wire rdpp1_inst_n_1;
  wire rdpp1_inst_n_2;
  wire rdpp1_inst_n_3;
  wire rst;
  wire rst_d1;
  wire wr_en;
  wire [3:0]wr_pntr_ext;
  wire wrpp1_inst_n_0;
  wire wrpp1_inst_n_1;
  wire wrpp1_inst_n_2;
  wire wrpp1_inst_n_3;
  wire xpm_fifo_rst_inst_n_1;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ;
  wire [11:0]\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED ;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign full = \<const0> ;
  assign full_n = \<const0> ;
  assign overflow = \<const0> ;
  assign prog_empty = \<const0> ;
  assign prog_full = \<const0> ;
  assign rd_data_count[4] = \<const0> ;
  assign rd_data_count[3] = \<const0> ;
  assign rd_data_count[2] = \<const0> ;
  assign rd_data_count[1] = \<const0> ;
  assign rd_data_count[0] = \<const0> ;
  assign rd_rst_busy = \<const0> ;
  assign sbiterr = \<const0> ;
  assign underflow = \<const0> ;
  assign wr_ack = \<const0> ;
  assign wr_data_count[4] = \<const0> ;
  assign wr_data_count[3] = \<const0> ;
  assign wr_data_count[2] = \<const0> ;
  assign wr_data_count[1] = \<const0> ;
  assign wr_data_count[0] = \<const0> ;
  assign wr_rst_busy = \<const0> ;
  (* SOFT_HLUTNM = "soft_lutpair318" *) 
  LUT4 #(
    .INIT(16'h6A85)) 
    \FSM_sequential_gen_fwft.curr_fwft_state[0]_i_1 
       (.I0(curr_fwft_state[0]),
        .I1(rd_en),
        .I2(curr_fwft_state[1]),
        .I3(ram_empty_i),
        .O(next_fwft_state__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair318" *) 
  LUT3 #(
    .INIT(8'h7C)) 
    \FSM_sequential_gen_fwft.curr_fwft_state[1]_i_1 
       (.I0(rd_en),
        .I1(curr_fwft_state[1]),
        .I2(curr_fwft_state[0]),
        .O(next_fwft_state__0[1]));
  (* FSM_ENCODED_STATES = "invalid:00,stage1_valid:01,both_stages_valid:10,stage2_valid:11" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_fwft.curr_fwft_state_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(next_fwft_state__0[0]),
        .Q(curr_fwft_state[0]),
        .R(xpm_fifo_rst_inst_n_1));
  (* FSM_ENCODED_STATES = "invalid:00,stage1_valid:01,both_stages_valid:10,stage2_valid:11" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_fwft.curr_fwft_state_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(next_fwft_state__0[1]),
        .Q(curr_fwft_state[1]),
        .R(xpm_fifo_rst_inst_n_1));
  GND GND
       (.G(\<const0> ));
  (* SOFT_HLUTNM = "soft_lutpair317" *) 
  LUT4 #(
    .INIT(16'hF380)) 
    \gen_fwft.empty_fwft_i_i_1 
       (.I0(rd_en),
        .I1(curr_fwft_state[0]),
        .I2(curr_fwft_state[1]),
        .I3(empty),
        .O(empty_fwft_i0));
  FDSE #(
    .INIT(1'b1)) 
    \gen_fwft.empty_fwft_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(empty_fwft_i0),
        .Q(empty),
        .S(xpm_fifo_rst_inst_n_1));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(ram_full_i0),
        .Q(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .R(xpm_fifo_rst_inst_n_1));
  FDSE #(
    .INIT(1'b1)) 
    \gen_pntr_flags_cc.ram_empty_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(ram_empty_i0),
        .Q(ram_empty_i),
        .S(xpm_fifo_rst_inst_n_1));
  (* ADDR_WIDTH_A = "4" *) 
  (* ADDR_WIDTH_B = "4" *) 
  (* AUTO_SLEEP_TIME = "0" *) 
  (* BYTE_WRITE_WIDTH_A = "12" *) 
  (* BYTE_WRITE_WIDTH_B = "12" *) 
  (* CASCADE_HEIGHT = "0" *) 
  (* CLOCKING_MODE = "0" *) 
  (* ECC_BIT_RANGE = "[7:0]" *) 
  (* ECC_MODE = "0" *) 
  (* ECC_TYPE = "NONE" *) 
  (* IGNORE_INIT_SYNTH = "0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* MAX_NUM_CHAR = "0" *) 
  (* MEMORY_INIT_FILE = "none" *) 
  (* MEMORY_INIT_PARAM = "" *) 
  (* MEMORY_OPTIMIZATION = "true" *) 
  (* MEMORY_PRIMITIVE = "1" *) 
  (* MEMORY_SIZE = "192" *) 
  (* MEMORY_TYPE = "1" *) 
  (* MESSAGE_CONTROL = "0" *) 
  (* NUM_CHAR_LOC = "0" *) 
  (* P_ECC_MODE = "no_ecc" *) 
  (* P_ENABLE_BYTE_WRITE_A = "0" *) 
  (* P_ENABLE_BYTE_WRITE_B = "0" *) 
  (* P_MAX_DEPTH_DATA = "16" *) 
  (* P_MEMORY_OPT = "yes" *) 
  (* P_MEMORY_PRIMITIVE = "distributed" *) 
  (* P_MIN_WIDTH_DATA = "12" *) 
  (* P_MIN_WIDTH_DATA_A = "12" *) 
  (* P_MIN_WIDTH_DATA_B = "12" *) 
  (* P_MIN_WIDTH_DATA_ECC = "12" *) 
  (* P_MIN_WIDTH_DATA_LDW = "4" *) 
  (* P_MIN_WIDTH_DATA_SHFT = "12" *) 
  (* P_NUM_COLS_WRITE_A = "1" *) 
  (* P_NUM_COLS_WRITE_B = "1" *) 
  (* P_NUM_ROWS_READ_A = "1" *) 
  (* P_NUM_ROWS_READ_B = "1" *) 
  (* P_NUM_ROWS_WRITE_A = "1" *) 
  (* P_NUM_ROWS_WRITE_B = "1" *) 
  (* P_SDP_WRITE_MODE = "yes" *) 
  (* P_WIDTH_ADDR_LSB_READ_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) 
  (* P_WIDTH_ADDR_READ_A = "4" *) 
  (* P_WIDTH_ADDR_READ_B = "4" *) 
  (* P_WIDTH_ADDR_WRITE_A = "4" *) 
  (* P_WIDTH_ADDR_WRITE_B = "4" *) 
  (* P_WIDTH_COL_WRITE_A = "12" *) 
  (* P_WIDTH_COL_WRITE_B = "12" *) 
  (* RAM_DECOMP = "auto" *) 
  (* READ_DATA_WIDTH_A = "12" *) 
  (* READ_DATA_WIDTH_B = "12" *) 
  (* READ_LATENCY_A = "2" *) 
  (* READ_LATENCY_B = "2" *) 
  (* READ_RESET_VALUE_A = "0" *) 
  (* READ_RESET_VALUE_B = "0" *) 
  (* RST_MODE_A = "SYNC" *) 
  (* RST_MODE_B = "SYNC" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_EMBEDDED_CONSTRAINT = "0" *) 
  (* USE_MEM_INIT = "0" *) 
  (* USE_MEM_INIT_MMI = "0" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WRITE_DATA_WIDTH_A = "12" *) 
  (* WRITE_DATA_WIDTH_B = "12" *) 
  (* WRITE_MODE_A = "2" *) 
  (* WRITE_MODE_B = "1" *) 
  (* WRITE_PROTECT = "1" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* rsta_loop_iter = "12" *) 
  (* rstb_loop_iter = "12" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__4 \gen_sdpram.xpm_memory_base_inst 
       (.addra(wr_pntr_ext),
        .addrb(rd_pntr_ext),
        .clka(rd_clk),
        .clkb(1'b0),
        .dbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ),
        .dbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ),
        .dina(din),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED [11:0]),
        .doutb(dout),
        .ena(ram_wr_en_pf),
        .enb(rdp_inst_n_2),
        .injectdbiterra(1'b0),
        .injectdbiterrb(1'b0),
        .injectsbiterra(1'b0),
        .injectsbiterrb(1'b0),
        .regcea(1'b0),
        .regceb(\gen_fwft.ram_regout_en ),
        .rsta(1'b0),
        .rstb(xpm_fifo_rst_inst_n_1),
        .sbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ),
        .sbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ),
        .sleep(1'b0),
        .wea(1'b0),
        .web(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair317" *) 
  LUT3 #(
    .INIT(8'h62)) 
    \gen_sdpram.xpm_memory_base_inst_i_3 
       (.I0(curr_fwft_state[0]),
        .I1(curr_fwft_state[1]),
        .I2(rd_en),
        .O(\gen_fwft.ram_regout_en ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0 rdp_inst
       (.E(ram_wr_en_pf),
        .Q(rd_pntr_ext),
        .\count_value_i_reg[0]_0 (curr_fwft_state),
        .\count_value_i_reg[3]_0 (xpm_fifo_rst_inst_n_1),
        .enb(rdp_inst_n_2),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg (\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 (wr_pntr_ext),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ({wrpp1_inst_n_0,wrpp1_inst_n_1,wrpp1_inst_n_2,wrpp1_inst_n_3}),
        .leaving_empty0(leaving_empty0),
        .ram_empty_i(ram_empty_i),
        .ram_full_i0(ram_full_i0),
        .rd_clk(rd_clk),
        .rd_en(rd_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1 rdpp1_inst
       (.E(rdp_inst_n_2),
        .Q({rdpp1_inst_n_0,rdpp1_inst_n_1,rdpp1_inst_n_2,rdpp1_inst_n_3}),
        .\count_value_i_reg[1]_0 (curr_fwft_state),
        .\count_value_i_reg[1]_1 (xpm_fifo_rst_inst_n_1),
        .rd_clk(rd_clk),
        .rd_en(rd_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_132 rst_d1_inst
       (.Q(xpm_fifo_rst_inst_n_1),
        .rd_clk(rd_clk),
        .rst_d1(rst_d1));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_133 wrp_inst
       (.E(ram_wr_en_pf),
        .Q(wr_pntr_ext),
        .\count_value_i_reg[0]_0 (xpm_fifo_rst_inst_n_1),
        .enb(rdp_inst_n_2),
        .\gen_pntr_flags_cc.ram_empty_i_reg ({rdpp1_inst_n_0,rdpp1_inst_n_1,rdpp1_inst_n_2,rdpp1_inst_n_3}),
        .leaving_empty0(leaving_empty0),
        .ram_empty_i(ram_empty_i),
        .ram_empty_i0(ram_empty_i0),
        .rd_clk(rd_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_134 wrpp1_inst
       (.E(ram_wr_en_pf),
        .Q({wrpp1_inst_n_0,wrpp1_inst_n_1,wrpp1_inst_n_2,wrpp1_inst_n_3}),
        .\count_value_i_reg[1]_0 (xpm_fifo_rst_inst_n_1),
        .rd_clk(rd_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst_135 xpm_fifo_rst_inst
       (.E(ram_wr_en_pf),
        .Q(xpm_fifo_rst_inst_n_1),
        .\count_value_i_reg[3] (\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .rd_clk(rd_clk),
        .rst(rst),
        .rst_d1(rst_d1),
        .wr_en(wr_en));
endmodule

(* CASCADE_HEIGHT = "0" *) (* CDC_DEST_SYNC_FF = "2" *) (* COMMON_CLOCK = "1" *) 
(* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "0" *) (* ENABLE_ECC = "0" *) 
(* EN_ADV_FEATURE = "16'b0000011100000111" *) (* EN_AE = "1'b0" *) (* EN_AF = "1'b0" *) 
(* EN_DVLD = "1'b0" *) (* EN_OF = "1'b1" *) (* EN_PE = "1'b1" *) 
(* EN_PF = "1'b1" *) (* EN_RDC = "1'b1" *) (* EN_SIM_ASSERT_ERR = "warning" *) 
(* EN_UF = "1'b1" *) (* EN_WACK = "1'b0" *) (* EN_WDC = "1'b1" *) 
(* FG_EQ_ASYM_DOUT = "1'b0" *) (* FIFO_MEMORY_TYPE = "1" *) (* FIFO_MEM_TYPE = "1" *) 
(* FIFO_READ_DEPTH = "16" *) (* FIFO_READ_LATENCY = "1" *) (* FIFO_SIZE = "192" *) 
(* FIFO_WRITE_DEPTH = "16" *) (* FULL_RESET_VALUE = "0" *) (* FULL_RST_VAL = "1'b0" *) 
(* ORIG_REF_NAME = "xpm_fifo_base" *) (* PE_THRESH_ADJ = "3" *) (* PE_THRESH_MAX = "11" *) 
(* PE_THRESH_MIN = "5" *) (* PF_THRESH_ADJ = "9" *) (* PF_THRESH_MAX = "11" *) 
(* PF_THRESH_MIN = "5" *) (* PROG_EMPTY_THRESH = "5" *) (* PROG_FULL_THRESH = "11" *) 
(* RD_DATA_COUNT_WIDTH = "5" *) (* RD_DC_WIDTH_EXT = "5" *) (* RD_LATENCY = "2" *) 
(* RD_MODE = "1" *) (* RD_PNTR_WIDTH = "4" *) (* READ_DATA_WIDTH = "12" *) 
(* READ_MODE = "1" *) (* READ_MODE_LL = "1" *) (* RELATED_CLOCKS = "0" *) 
(* REMOVE_WR_RD_PROT_LOGIC = "0" *) (* SIM_ASSERT_CHK = "0" *) (* USE_ADV_FEATURES = "0707" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WIDTH_RATIO = "1" *) 
(* WRITE_DATA_WIDTH = "12" *) (* WR_DATA_COUNT_WIDTH = "5" *) (* WR_DC_WIDTH_EXT = "5" *) 
(* WR_DEPTH_LOG = "4" *) (* WR_PNTR_WIDTH = "4" *) (* WR_RD_RATIO = "0" *) 
(* WR_WIDTH_LOG = "4" *) (* XPM_MODULE = "TRUE" *) (* both_stages_valid = "3" *) 
(* invalid = "0" *) (* keep_hierarchy = "soft" *) (* stage1_valid = "2" *) 
(* stage2_valid = "1" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__5
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    full_n,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_clk,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [11:0]din;
  output full;
  output full_n;
  output prog_full;
  output [4:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_clk;
  input rd_en;
  output [11:0]dout;
  output empty;
  output prog_empty;
  output [4:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [1:0]curr_fwft_state;
  wire [11:0]din;
  wire [11:0]dout;
  wire empty;
  wire empty_fwft_i0;
  wire \gen_fwft.ram_regout_en ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ;
  wire leaving_empty0;
  wire [1:0]next_fwft_state__0;
  wire ram_empty_i;
  wire ram_empty_i0;
  wire ram_full_i0;
  wire ram_wr_en_pf;
  wire rd_clk;
  wire rd_en;
  wire [3:0]rd_pntr_ext;
  wire rdp_inst_n_2;
  wire rdpp1_inst_n_0;
  wire rdpp1_inst_n_1;
  wire rdpp1_inst_n_2;
  wire rdpp1_inst_n_3;
  wire rst;
  wire rst_d1;
  wire wr_en;
  wire [3:0]wr_pntr_ext;
  wire wrpp1_inst_n_0;
  wire wrpp1_inst_n_1;
  wire wrpp1_inst_n_2;
  wire wrpp1_inst_n_3;
  wire xpm_fifo_rst_inst_n_1;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ;
  wire [11:0]\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED ;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign full = \<const0> ;
  assign full_n = \<const0> ;
  assign overflow = \<const0> ;
  assign prog_empty = \<const0> ;
  assign prog_full = \<const0> ;
  assign rd_data_count[4] = \<const0> ;
  assign rd_data_count[3] = \<const0> ;
  assign rd_data_count[2] = \<const0> ;
  assign rd_data_count[1] = \<const0> ;
  assign rd_data_count[0] = \<const0> ;
  assign rd_rst_busy = \<const0> ;
  assign sbiterr = \<const0> ;
  assign underflow = \<const0> ;
  assign wr_ack = \<const0> ;
  assign wr_data_count[4] = \<const0> ;
  assign wr_data_count[3] = \<const0> ;
  assign wr_data_count[2] = \<const0> ;
  assign wr_data_count[1] = \<const0> ;
  assign wr_data_count[0] = \<const0> ;
  assign wr_rst_busy = \<const0> ;
  (* SOFT_HLUTNM = "soft_lutpair303" *) 
  LUT4 #(
    .INIT(16'h6A85)) 
    \FSM_sequential_gen_fwft.curr_fwft_state[0]_i_1 
       (.I0(curr_fwft_state[0]),
        .I1(rd_en),
        .I2(curr_fwft_state[1]),
        .I3(ram_empty_i),
        .O(next_fwft_state__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair303" *) 
  LUT3 #(
    .INIT(8'h7C)) 
    \FSM_sequential_gen_fwft.curr_fwft_state[1]_i_1 
       (.I0(rd_en),
        .I1(curr_fwft_state[1]),
        .I2(curr_fwft_state[0]),
        .O(next_fwft_state__0[1]));
  (* FSM_ENCODED_STATES = "invalid:00,stage1_valid:01,both_stages_valid:10,stage2_valid:11" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_fwft.curr_fwft_state_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(next_fwft_state__0[0]),
        .Q(curr_fwft_state[0]),
        .R(xpm_fifo_rst_inst_n_1));
  (* FSM_ENCODED_STATES = "invalid:00,stage1_valid:01,both_stages_valid:10,stage2_valid:11" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_fwft.curr_fwft_state_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(next_fwft_state__0[1]),
        .Q(curr_fwft_state[1]),
        .R(xpm_fifo_rst_inst_n_1));
  GND GND
       (.G(\<const0> ));
  (* SOFT_HLUTNM = "soft_lutpair302" *) 
  LUT4 #(
    .INIT(16'hF380)) 
    \gen_fwft.empty_fwft_i_i_1 
       (.I0(rd_en),
        .I1(curr_fwft_state[0]),
        .I2(curr_fwft_state[1]),
        .I3(empty),
        .O(empty_fwft_i0));
  FDSE #(
    .INIT(1'b1)) 
    \gen_fwft.empty_fwft_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(empty_fwft_i0),
        .Q(empty),
        .S(xpm_fifo_rst_inst_n_1));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(ram_full_i0),
        .Q(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .R(xpm_fifo_rst_inst_n_1));
  FDSE #(
    .INIT(1'b1)) 
    \gen_pntr_flags_cc.ram_empty_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(ram_empty_i0),
        .Q(ram_empty_i),
        .S(xpm_fifo_rst_inst_n_1));
  (* ADDR_WIDTH_A = "4" *) 
  (* ADDR_WIDTH_B = "4" *) 
  (* AUTO_SLEEP_TIME = "0" *) 
  (* BYTE_WRITE_WIDTH_A = "12" *) 
  (* BYTE_WRITE_WIDTH_B = "12" *) 
  (* CASCADE_HEIGHT = "0" *) 
  (* CLOCKING_MODE = "0" *) 
  (* ECC_BIT_RANGE = "[7:0]" *) 
  (* ECC_MODE = "0" *) 
  (* ECC_TYPE = "NONE" *) 
  (* IGNORE_INIT_SYNTH = "0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* MAX_NUM_CHAR = "0" *) 
  (* MEMORY_INIT_FILE = "none" *) 
  (* MEMORY_INIT_PARAM = "" *) 
  (* MEMORY_OPTIMIZATION = "true" *) 
  (* MEMORY_PRIMITIVE = "1" *) 
  (* MEMORY_SIZE = "192" *) 
  (* MEMORY_TYPE = "1" *) 
  (* MESSAGE_CONTROL = "0" *) 
  (* NUM_CHAR_LOC = "0" *) 
  (* P_ECC_MODE = "no_ecc" *) 
  (* P_ENABLE_BYTE_WRITE_A = "0" *) 
  (* P_ENABLE_BYTE_WRITE_B = "0" *) 
  (* P_MAX_DEPTH_DATA = "16" *) 
  (* P_MEMORY_OPT = "yes" *) 
  (* P_MEMORY_PRIMITIVE = "distributed" *) 
  (* P_MIN_WIDTH_DATA = "12" *) 
  (* P_MIN_WIDTH_DATA_A = "12" *) 
  (* P_MIN_WIDTH_DATA_B = "12" *) 
  (* P_MIN_WIDTH_DATA_ECC = "12" *) 
  (* P_MIN_WIDTH_DATA_LDW = "4" *) 
  (* P_MIN_WIDTH_DATA_SHFT = "12" *) 
  (* P_NUM_COLS_WRITE_A = "1" *) 
  (* P_NUM_COLS_WRITE_B = "1" *) 
  (* P_NUM_ROWS_READ_A = "1" *) 
  (* P_NUM_ROWS_READ_B = "1" *) 
  (* P_NUM_ROWS_WRITE_A = "1" *) 
  (* P_NUM_ROWS_WRITE_B = "1" *) 
  (* P_SDP_WRITE_MODE = "yes" *) 
  (* P_WIDTH_ADDR_LSB_READ_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) 
  (* P_WIDTH_ADDR_READ_A = "4" *) 
  (* P_WIDTH_ADDR_READ_B = "4" *) 
  (* P_WIDTH_ADDR_WRITE_A = "4" *) 
  (* P_WIDTH_ADDR_WRITE_B = "4" *) 
  (* P_WIDTH_COL_WRITE_A = "12" *) 
  (* P_WIDTH_COL_WRITE_B = "12" *) 
  (* RAM_DECOMP = "auto" *) 
  (* READ_DATA_WIDTH_A = "12" *) 
  (* READ_DATA_WIDTH_B = "12" *) 
  (* READ_LATENCY_A = "2" *) 
  (* READ_LATENCY_B = "2" *) 
  (* READ_RESET_VALUE_A = "0" *) 
  (* READ_RESET_VALUE_B = "0" *) 
  (* RST_MODE_A = "SYNC" *) 
  (* RST_MODE_B = "SYNC" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_EMBEDDED_CONSTRAINT = "0" *) 
  (* USE_MEM_INIT = "0" *) 
  (* USE_MEM_INIT_MMI = "0" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WRITE_DATA_WIDTH_A = "12" *) 
  (* WRITE_DATA_WIDTH_B = "12" *) 
  (* WRITE_MODE_A = "2" *) 
  (* WRITE_MODE_B = "1" *) 
  (* WRITE_PROTECT = "1" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* rsta_loop_iter = "12" *) 
  (* rstb_loop_iter = "12" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__5 \gen_sdpram.xpm_memory_base_inst 
       (.addra(wr_pntr_ext),
        .addrb(rd_pntr_ext),
        .clka(rd_clk),
        .clkb(1'b0),
        .dbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ),
        .dbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ),
        .dina(din),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED [11:0]),
        .doutb(dout),
        .ena(ram_wr_en_pf),
        .enb(rdp_inst_n_2),
        .injectdbiterra(1'b0),
        .injectdbiterrb(1'b0),
        .injectsbiterra(1'b0),
        .injectsbiterrb(1'b0),
        .regcea(1'b0),
        .regceb(\gen_fwft.ram_regout_en ),
        .rsta(1'b0),
        .rstb(xpm_fifo_rst_inst_n_1),
        .sbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ),
        .sbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ),
        .sleep(1'b0),
        .wea(1'b0),
        .web(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair302" *) 
  LUT3 #(
    .INIT(8'h62)) 
    \gen_sdpram.xpm_memory_base_inst_i_3 
       (.I0(curr_fwft_state[0]),
        .I1(curr_fwft_state[1]),
        .I2(rd_en),
        .O(\gen_fwft.ram_regout_en ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_136 rdp_inst
       (.E(ram_wr_en_pf),
        .Q(rd_pntr_ext),
        .\count_value_i_reg[0]_0 (curr_fwft_state),
        .\count_value_i_reg[3]_0 (xpm_fifo_rst_inst_n_1),
        .enb(rdp_inst_n_2),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg (\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 (wr_pntr_ext),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ({wrpp1_inst_n_0,wrpp1_inst_n_1,wrpp1_inst_n_2,wrpp1_inst_n_3}),
        .leaving_empty0(leaving_empty0),
        .ram_empty_i(ram_empty_i),
        .ram_full_i0(ram_full_i0),
        .rd_clk(rd_clk),
        .rd_en(rd_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_137 rdpp1_inst
       (.E(rdp_inst_n_2),
        .Q({rdpp1_inst_n_0,rdpp1_inst_n_1,rdpp1_inst_n_2,rdpp1_inst_n_3}),
        .\count_value_i_reg[1]_0 (curr_fwft_state),
        .\count_value_i_reg[1]_1 (xpm_fifo_rst_inst_n_1),
        .rd_clk(rd_clk),
        .rd_en(rd_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_138 rst_d1_inst
       (.Q(xpm_fifo_rst_inst_n_1),
        .rd_clk(rd_clk),
        .rst_d1(rst_d1));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_139 wrp_inst
       (.E(ram_wr_en_pf),
        .Q(wr_pntr_ext),
        .\count_value_i_reg[0]_0 (xpm_fifo_rst_inst_n_1),
        .enb(rdp_inst_n_2),
        .\gen_pntr_flags_cc.ram_empty_i_reg ({rdpp1_inst_n_0,rdpp1_inst_n_1,rdpp1_inst_n_2,rdpp1_inst_n_3}),
        .leaving_empty0(leaving_empty0),
        .ram_empty_i(ram_empty_i),
        .ram_empty_i0(ram_empty_i0),
        .rd_clk(rd_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_140 wrpp1_inst
       (.E(ram_wr_en_pf),
        .Q({wrpp1_inst_n_0,wrpp1_inst_n_1,wrpp1_inst_n_2,wrpp1_inst_n_3}),
        .\count_value_i_reg[1]_0 (xpm_fifo_rst_inst_n_1),
        .rd_clk(rd_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst_141 xpm_fifo_rst_inst
       (.E(ram_wr_en_pf),
        .Q(xpm_fifo_rst_inst_n_1),
        .\count_value_i_reg[3] (\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .rd_clk(rd_clk),
        .rst(rst),
        .rst_d1(rst_d1),
        .wr_en(wr_en));
endmodule

(* CASCADE_HEIGHT = "0" *) (* CDC_DEST_SYNC_FF = "2" *) (* COMMON_CLOCK = "1" *) 
(* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "0" *) (* ENABLE_ECC = "0" *) 
(* EN_ADV_FEATURE = "16'b0000011100000111" *) (* EN_AE = "1'b0" *) (* EN_AF = "1'b0" *) 
(* EN_DVLD = "1'b0" *) (* EN_OF = "1'b1" *) (* EN_PE = "1'b1" *) 
(* EN_PF = "1'b1" *) (* EN_RDC = "1'b1" *) (* EN_SIM_ASSERT_ERR = "warning" *) 
(* EN_UF = "1'b1" *) (* EN_WACK = "1'b0" *) (* EN_WDC = "1'b1" *) 
(* FG_EQ_ASYM_DOUT = "1'b0" *) (* FIFO_MEMORY_TYPE = "1" *) (* FIFO_MEM_TYPE = "1" *) 
(* FIFO_READ_DEPTH = "16" *) (* FIFO_READ_LATENCY = "1" *) (* FIFO_SIZE = "192" *) 
(* FIFO_WRITE_DEPTH = "16" *) (* FULL_RESET_VALUE = "0" *) (* FULL_RST_VAL = "1'b0" *) 
(* ORIG_REF_NAME = "xpm_fifo_base" *) (* PE_THRESH_ADJ = "3" *) (* PE_THRESH_MAX = "11" *) 
(* PE_THRESH_MIN = "5" *) (* PF_THRESH_ADJ = "9" *) (* PF_THRESH_MAX = "11" *) 
(* PF_THRESH_MIN = "5" *) (* PROG_EMPTY_THRESH = "5" *) (* PROG_FULL_THRESH = "11" *) 
(* RD_DATA_COUNT_WIDTH = "5" *) (* RD_DC_WIDTH_EXT = "5" *) (* RD_LATENCY = "2" *) 
(* RD_MODE = "1" *) (* RD_PNTR_WIDTH = "4" *) (* READ_DATA_WIDTH = "12" *) 
(* READ_MODE = "1" *) (* READ_MODE_LL = "1" *) (* RELATED_CLOCKS = "0" *) 
(* REMOVE_WR_RD_PROT_LOGIC = "0" *) (* SIM_ASSERT_CHK = "0" *) (* USE_ADV_FEATURES = "0707" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WIDTH_RATIO = "1" *) 
(* WRITE_DATA_WIDTH = "12" *) (* WR_DATA_COUNT_WIDTH = "5" *) (* WR_DC_WIDTH_EXT = "5" *) 
(* WR_DEPTH_LOG = "4" *) (* WR_PNTR_WIDTH = "4" *) (* WR_RD_RATIO = "0" *) 
(* WR_WIDTH_LOG = "4" *) (* XPM_MODULE = "TRUE" *) (* both_stages_valid = "3" *) 
(* invalid = "0" *) (* keep_hierarchy = "soft" *) (* stage1_valid = "2" *) 
(* stage2_valid = "1" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__6
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    full_n,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_clk,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [11:0]din;
  output full;
  output full_n;
  output prog_full;
  output [4:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_clk;
  input rd_en;
  output [11:0]dout;
  output empty;
  output prog_empty;
  output [4:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [1:0]curr_fwft_state;
  wire [11:0]din;
  wire [11:0]dout;
  wire empty;
  wire empty_fwft_i0;
  wire \gen_fwft.ram_regout_en ;
  wire \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ;
  wire leaving_empty0;
  wire [1:0]next_fwft_state__0;
  wire ram_empty_i;
  wire ram_empty_i0;
  wire ram_full_i0;
  wire ram_wr_en_pf;
  wire rd_clk;
  wire rd_en;
  wire [3:0]rd_pntr_ext;
  wire rdp_inst_n_2;
  wire rdpp1_inst_n_0;
  wire rdpp1_inst_n_1;
  wire rdpp1_inst_n_2;
  wire rdpp1_inst_n_3;
  wire rst;
  wire rst_d1;
  wire wr_en;
  wire [3:0]wr_pntr_ext;
  wire wrpp1_inst_n_0;
  wire wrpp1_inst_n_1;
  wire wrpp1_inst_n_2;
  wire wrpp1_inst_n_3;
  wire xpm_fifo_rst_inst_n_1;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ;
  wire [11:0]\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED ;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign full = \<const0> ;
  assign full_n = \<const0> ;
  assign overflow = \<const0> ;
  assign prog_empty = \<const0> ;
  assign prog_full = \<const0> ;
  assign rd_data_count[4] = \<const0> ;
  assign rd_data_count[3] = \<const0> ;
  assign rd_data_count[2] = \<const0> ;
  assign rd_data_count[1] = \<const0> ;
  assign rd_data_count[0] = \<const0> ;
  assign rd_rst_busy = \<const0> ;
  assign sbiterr = \<const0> ;
  assign underflow = \<const0> ;
  assign wr_ack = \<const0> ;
  assign wr_data_count[4] = \<const0> ;
  assign wr_data_count[3] = \<const0> ;
  assign wr_data_count[2] = \<const0> ;
  assign wr_data_count[1] = \<const0> ;
  assign wr_data_count[0] = \<const0> ;
  assign wr_rst_busy = \<const0> ;
  (* SOFT_HLUTNM = "soft_lutpair293" *) 
  LUT4 #(
    .INIT(16'h6A85)) 
    \FSM_sequential_gen_fwft.curr_fwft_state[0]_i_1 
       (.I0(curr_fwft_state[0]),
        .I1(rd_en),
        .I2(curr_fwft_state[1]),
        .I3(ram_empty_i),
        .O(next_fwft_state__0[0]));
  (* SOFT_HLUTNM = "soft_lutpair293" *) 
  LUT3 #(
    .INIT(8'h7C)) 
    \FSM_sequential_gen_fwft.curr_fwft_state[1]_i_1 
       (.I0(rd_en),
        .I1(curr_fwft_state[1]),
        .I2(curr_fwft_state[0]),
        .O(next_fwft_state__0[1]));
  (* FSM_ENCODED_STATES = "invalid:00,stage1_valid:01,both_stages_valid:10,stage2_valid:11" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_fwft.curr_fwft_state_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(next_fwft_state__0[0]),
        .Q(curr_fwft_state[0]),
        .R(xpm_fifo_rst_inst_n_1));
  (* FSM_ENCODED_STATES = "invalid:00,stage1_valid:01,both_stages_valid:10,stage2_valid:11" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_fwft.curr_fwft_state_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(next_fwft_state__0[1]),
        .Q(curr_fwft_state[1]),
        .R(xpm_fifo_rst_inst_n_1));
  GND GND
       (.G(\<const0> ));
  (* SOFT_HLUTNM = "soft_lutpair292" *) 
  LUT4 #(
    .INIT(16'hF380)) 
    \gen_fwft.empty_fwft_i_i_1 
       (.I0(rd_en),
        .I1(curr_fwft_state[0]),
        .I2(curr_fwft_state[1]),
        .I3(empty),
        .O(empty_fwft_i0));
  FDSE #(
    .INIT(1'b1)) 
    \gen_fwft.empty_fwft_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(empty_fwft_i0),
        .Q(empty),
        .S(xpm_fifo_rst_inst_n_1));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(ram_full_i0),
        .Q(\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .R(xpm_fifo_rst_inst_n_1));
  FDSE #(
    .INIT(1'b1)) 
    \gen_pntr_flags_cc.ram_empty_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(ram_empty_i0),
        .Q(ram_empty_i),
        .S(xpm_fifo_rst_inst_n_1));
  (* ADDR_WIDTH_A = "4" *) 
  (* ADDR_WIDTH_B = "4" *) 
  (* AUTO_SLEEP_TIME = "0" *) 
  (* BYTE_WRITE_WIDTH_A = "12" *) 
  (* BYTE_WRITE_WIDTH_B = "12" *) 
  (* CASCADE_HEIGHT = "0" *) 
  (* CLOCKING_MODE = "0" *) 
  (* ECC_BIT_RANGE = "[7:0]" *) 
  (* ECC_MODE = "0" *) 
  (* ECC_TYPE = "NONE" *) 
  (* IGNORE_INIT_SYNTH = "0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* MAX_NUM_CHAR = "0" *) 
  (* MEMORY_INIT_FILE = "none" *) 
  (* MEMORY_INIT_PARAM = "" *) 
  (* MEMORY_OPTIMIZATION = "true" *) 
  (* MEMORY_PRIMITIVE = "1" *) 
  (* MEMORY_SIZE = "192" *) 
  (* MEMORY_TYPE = "1" *) 
  (* MESSAGE_CONTROL = "0" *) 
  (* NUM_CHAR_LOC = "0" *) 
  (* P_ECC_MODE = "no_ecc" *) 
  (* P_ENABLE_BYTE_WRITE_A = "0" *) 
  (* P_ENABLE_BYTE_WRITE_B = "0" *) 
  (* P_MAX_DEPTH_DATA = "16" *) 
  (* P_MEMORY_OPT = "yes" *) 
  (* P_MEMORY_PRIMITIVE = "distributed" *) 
  (* P_MIN_WIDTH_DATA = "12" *) 
  (* P_MIN_WIDTH_DATA_A = "12" *) 
  (* P_MIN_WIDTH_DATA_B = "12" *) 
  (* P_MIN_WIDTH_DATA_ECC = "12" *) 
  (* P_MIN_WIDTH_DATA_LDW = "4" *) 
  (* P_MIN_WIDTH_DATA_SHFT = "12" *) 
  (* P_NUM_COLS_WRITE_A = "1" *) 
  (* P_NUM_COLS_WRITE_B = "1" *) 
  (* P_NUM_ROWS_READ_A = "1" *) 
  (* P_NUM_ROWS_READ_B = "1" *) 
  (* P_NUM_ROWS_WRITE_A = "1" *) 
  (* P_NUM_ROWS_WRITE_B = "1" *) 
  (* P_SDP_WRITE_MODE = "yes" *) 
  (* P_WIDTH_ADDR_LSB_READ_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) 
  (* P_WIDTH_ADDR_READ_A = "4" *) 
  (* P_WIDTH_ADDR_READ_B = "4" *) 
  (* P_WIDTH_ADDR_WRITE_A = "4" *) 
  (* P_WIDTH_ADDR_WRITE_B = "4" *) 
  (* P_WIDTH_COL_WRITE_A = "12" *) 
  (* P_WIDTH_COL_WRITE_B = "12" *) 
  (* RAM_DECOMP = "auto" *) 
  (* READ_DATA_WIDTH_A = "12" *) 
  (* READ_DATA_WIDTH_B = "12" *) 
  (* READ_LATENCY_A = "2" *) 
  (* READ_LATENCY_B = "2" *) 
  (* READ_RESET_VALUE_A = "0" *) 
  (* READ_RESET_VALUE_B = "0" *) 
  (* RST_MODE_A = "SYNC" *) 
  (* RST_MODE_B = "SYNC" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_EMBEDDED_CONSTRAINT = "0" *) 
  (* USE_MEM_INIT = "0" *) 
  (* USE_MEM_INIT_MMI = "0" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WRITE_DATA_WIDTH_A = "12" *) 
  (* WRITE_DATA_WIDTH_B = "12" *) 
  (* WRITE_MODE_A = "2" *) 
  (* WRITE_MODE_B = "1" *) 
  (* WRITE_PROTECT = "1" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* rsta_loop_iter = "12" *) 
  (* rstb_loop_iter = "12" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__6 \gen_sdpram.xpm_memory_base_inst 
       (.addra(wr_pntr_ext),
        .addrb(rd_pntr_ext),
        .clka(rd_clk),
        .clkb(1'b0),
        .dbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ),
        .dbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ),
        .dina(din),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED [11:0]),
        .doutb(dout),
        .ena(ram_wr_en_pf),
        .enb(rdp_inst_n_2),
        .injectdbiterra(1'b0),
        .injectdbiterrb(1'b0),
        .injectsbiterra(1'b0),
        .injectsbiterrb(1'b0),
        .regcea(1'b0),
        .regceb(\gen_fwft.ram_regout_en ),
        .rsta(1'b0),
        .rstb(xpm_fifo_rst_inst_n_1),
        .sbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ),
        .sbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ),
        .sleep(1'b0),
        .wea(1'b0),
        .web(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair292" *) 
  LUT3 #(
    .INIT(8'h62)) 
    \gen_sdpram.xpm_memory_base_inst_i_3 
       (.I0(curr_fwft_state[0]),
        .I1(curr_fwft_state[1]),
        .I2(rd_en),
        .O(\gen_fwft.ram_regout_en ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_142 rdp_inst
       (.E(ram_wr_en_pf),
        .Q(rd_pntr_ext),
        .\count_value_i_reg[0]_0 (curr_fwft_state),
        .\count_value_i_reg[3]_0 (xpm_fifo_rst_inst_n_1),
        .enb(rdp_inst_n_2),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg (\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_0 (wr_pntr_ext),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_1 ({wrpp1_inst_n_0,wrpp1_inst_n_1,wrpp1_inst_n_2,wrpp1_inst_n_3}),
        .leaving_empty0(leaving_empty0),
        .ram_empty_i(ram_empty_i),
        .ram_full_i0(ram_full_i0),
        .rd_clk(rd_clk),
        .rd_en(rd_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_143 rdpp1_inst
       (.E(rdp_inst_n_2),
        .Q({rdpp1_inst_n_0,rdpp1_inst_n_1,rdpp1_inst_n_2,rdpp1_inst_n_3}),
        .\count_value_i_reg[1]_0 (curr_fwft_state),
        .\count_value_i_reg[1]_1 (xpm_fifo_rst_inst_n_1),
        .rd_clk(rd_clk),
        .rd_en(rd_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_144 rst_d1_inst
       (.Q(xpm_fifo_rst_inst_n_1),
        .rd_clk(rd_clk),
        .rst_d1(rst_d1));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized0_145 wrp_inst
       (.E(ram_wr_en_pf),
        .Q(wr_pntr_ext),
        .\count_value_i_reg[0]_0 (xpm_fifo_rst_inst_n_1),
        .enb(rdp_inst_n_2),
        .\gen_pntr_flags_cc.ram_empty_i_reg ({rdpp1_inst_n_0,rdpp1_inst_n_1,rdpp1_inst_n_2,rdpp1_inst_n_3}),
        .leaving_empty0(leaving_empty0),
        .ram_empty_i(ram_empty_i),
        .ram_empty_i0(ram_empty_i0),
        .rd_clk(rd_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized1_146 wrpp1_inst
       (.E(ram_wr_en_pf),
        .Q({wrpp1_inst_n_0,wrpp1_inst_n_1,wrpp1_inst_n_2,wrpp1_inst_n_3}),
        .\count_value_i_reg[1]_0 (xpm_fifo_rst_inst_n_1),
        .rd_clk(rd_clk));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst_147 xpm_fifo_rst_inst
       (.E(ram_wr_en_pf),
        .Q(xpm_fifo_rst_inst_n_1),
        .\count_value_i_reg[3] (\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg_n_0 ),
        .rd_clk(rd_clk),
        .rst(rst),
        .rst_d1(rst_d1),
        .wr_en(wr_en));
endmodule

(* CASCADE_HEIGHT = "0" *) (* CDC_DEST_SYNC_FF = "2" *) (* COMMON_CLOCK = "1" *) 
(* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "0" *) (* ENABLE_ECC = "0" *) 
(* EN_ADV_FEATURE = "16'b0000111100001111" *) (* EN_AE = "1'b1" *) (* EN_AF = "1'b1" *) 
(* EN_DVLD = "1'b0" *) (* EN_OF = "1'b1" *) (* EN_PE = "1'b1" *) 
(* EN_PF = "1'b1" *) (* EN_RDC = "1'b1" *) (* EN_SIM_ASSERT_ERR = "warning" *) 
(* EN_UF = "1'b1" *) (* EN_WACK = "1'b0" *) (* EN_WDC = "1'b1" *) 
(* FG_EQ_ASYM_DOUT = "1'b0" *) (* FIFO_MEMORY_TYPE = "2" *) (* FIFO_MEM_TYPE = "2" *) 
(* FIFO_READ_DEPTH = "2048" *) (* FIFO_READ_LATENCY = "1" *) (* FIFO_SIZE = "139264" *) 
(* FIFO_WRITE_DEPTH = "2048" *) (* FULL_RESET_VALUE = "0" *) (* FULL_RST_VAL = "1'b0" *) 
(* ORIG_REF_NAME = "xpm_fifo_base" *) (* PE_THRESH_ADJ = "8" *) (* PE_THRESH_MAX = "2043" *) 
(* PE_THRESH_MIN = "5" *) (* PF_THRESH_ADJ = "2041" *) (* PF_THRESH_MAX = "2043" *) 
(* PF_THRESH_MIN = "5" *) (* PROG_EMPTY_THRESH = "10" *) (* PROG_FULL_THRESH = "2043" *) 
(* RD_DATA_COUNT_WIDTH = "1" *) (* RD_DC_WIDTH_EXT = "12" *) (* RD_LATENCY = "2" *) 
(* RD_MODE = "1" *) (* RD_PNTR_WIDTH = "11" *) (* READ_DATA_WIDTH = "68" *) 
(* READ_MODE = "1" *) (* READ_MODE_LL = "1" *) (* RELATED_CLOCKS = "0" *) 
(* REMOVE_WR_RD_PROT_LOGIC = "0" *) (* SIM_ASSERT_CHK = "0" *) (* USE_ADV_FEATURES = "0f0f" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WIDTH_RATIO = "1" *) 
(* WRITE_DATA_WIDTH = "68" *) (* WR_DATA_COUNT_WIDTH = "1" *) (* WR_DC_WIDTH_EXT = "12" *) 
(* WR_DEPTH_LOG = "11" *) (* WR_PNTR_WIDTH = "11" *) (* WR_RD_RATIO = "0" *) 
(* WR_WIDTH_LOG = "7" *) (* XPM_MODULE = "TRUE" *) (* both_stages_valid = "3" *) 
(* invalid = "0" *) (* keep_hierarchy = "soft" *) (* stage1_valid = "2" *) 
(* stage2_valid = "1" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__parameterized0
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    full_n,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_clk,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [67:0]din;
  output full;
  output full_n;
  output prog_full;
  output [0:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_clk;
  input rd_en;
  output [67:0]dout;
  output empty;
  output prog_empty;
  output [0:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire almost_full;
  wire [1:0]curr_fwft_state;
  wire [67:0]din;
  wire [67:0]dout;
  wire empty;
  wire empty_fwft_i0;
  wire full;
  wire \gen_fwft.ram_regout_en ;
  wire leaving_empty0;
  wire [1:0]next_fwft_state__0;
  wire ram_empty_i;
  wire ram_empty_i0;
  wire ram_full_i0;
  wire ram_wr_en_pf;
  wire rd_clk;
  wire rd_en;
  wire [10:0]rd_pntr_ext;
  wire rdp_inst_n_0;
  wire rdpp1_inst_n_0;
  wire rdpp1_inst_n_1;
  wire rdpp1_inst_n_10;
  wire rdpp1_inst_n_11;
  wire rdpp1_inst_n_2;
  wire rdpp1_inst_n_3;
  wire rdpp1_inst_n_4;
  wire rdpp1_inst_n_5;
  wire rdpp1_inst_n_6;
  wire rdpp1_inst_n_7;
  wire rdpp1_inst_n_8;
  wire rdpp1_inst_n_9;
  wire rst;
  wire rst_d1;
  wire rst_d1_inst_n_1;
  wire wr_en;
  wire [10:0]wr_pntr_ext;
  wire wrpp1_inst_n_0;
  wire wrpp1_inst_n_1;
  wire wrpp1_inst_n_10;
  wire wrpp1_inst_n_2;
  wire wrpp1_inst_n_3;
  wire wrpp1_inst_n_4;
  wire wrpp1_inst_n_5;
  wire wrpp1_inst_n_6;
  wire wrpp1_inst_n_7;
  wire wrpp1_inst_n_8;
  wire wrpp1_inst_n_9;
  wire wrpp2_inst_n_0;
  wire wrpp2_inst_n_1;
  wire wrpp2_inst_n_10;
  wire wrpp2_inst_n_2;
  wire wrpp2_inst_n_3;
  wire wrpp2_inst_n_4;
  wire wrpp2_inst_n_5;
  wire wrpp2_inst_n_6;
  wire wrpp2_inst_n_7;
  wire wrpp2_inst_n_8;
  wire wrpp2_inst_n_9;
  wire xpm_fifo_rst_inst_n_0;
  wire xpm_fifo_rst_inst_n_2;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ;
  wire [67:0]\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED ;

  assign almost_empty = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign full_n = \<const0> ;
  assign overflow = \<const0> ;
  assign prog_empty = \<const0> ;
  assign prog_full = \<const0> ;
  assign rd_data_count[0] = \<const0> ;
  assign rd_rst_busy = \<const0> ;
  assign sbiterr = \<const0> ;
  assign underflow = \<const0> ;
  assign wr_ack = \<const0> ;
  assign wr_data_count[0] = \<const0> ;
  assign wr_rst_busy = \<const0> ;
  (* SOFT_HLUTNM = "soft_lutpair336" *) 
  LUT4 #(
    .INIT(16'h6A85)) 
    \FSM_sequential_gen_fwft.curr_fwft_state[0]_i_1 
       (.I0(curr_fwft_state[0]),
        .I1(rd_en),
        .I2(curr_fwft_state[1]),
        .I3(ram_empty_i),
        .O(next_fwft_state__0[0]));
  LUT3 #(
    .INIT(8'h7C)) 
    \FSM_sequential_gen_fwft.curr_fwft_state[1]_i_1 
       (.I0(rd_en),
        .I1(curr_fwft_state[1]),
        .I2(curr_fwft_state[0]),
        .O(next_fwft_state__0[1]));
  (* FSM_ENCODED_STATES = "invalid:00,stage1_valid:01,both_stages_valid:10,stage2_valid:11" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_fwft.curr_fwft_state_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(next_fwft_state__0[0]),
        .Q(curr_fwft_state[0]),
        .R(xpm_fifo_rst_inst_n_2));
  (* FSM_ENCODED_STATES = "invalid:00,stage1_valid:01,both_stages_valid:10,stage2_valid:11" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_fwft.curr_fwft_state_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(next_fwft_state__0[1]),
        .Q(curr_fwft_state[1]),
        .R(xpm_fifo_rst_inst_n_2));
  GND GND
       (.G(\<const0> ));
  LUT4 #(
    .INIT(16'hF380)) 
    \gen_fwft.empty_fwft_i_i_1 
       (.I0(rd_en),
        .I1(curr_fwft_state[0]),
        .I2(curr_fwft_state[1]),
        .I3(empty),
        .O(empty_fwft_i0));
  FDSE #(
    .INIT(1'b1)) 
    \gen_fwft.empty_fwft_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(empty_fwft_i0),
        .Q(empty),
        .S(xpm_fifo_rst_inst_n_2));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(rdp_inst_n_0),
        .Q(almost_full),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(ram_full_i0),
        .Q(full),
        .R(xpm_fifo_rst_inst_n_2));
  FDSE #(
    .INIT(1'b1)) 
    \gen_pntr_flags_cc.ram_empty_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(ram_empty_i0),
        .Q(ram_empty_i),
        .S(xpm_fifo_rst_inst_n_2));
  (* ADDR_WIDTH_A = "11" *) 
  (* ADDR_WIDTH_B = "11" *) 
  (* AUTO_SLEEP_TIME = "0" *) 
  (* BYTE_WRITE_WIDTH_A = "68" *) 
  (* BYTE_WRITE_WIDTH_B = "68" *) 
  (* CASCADE_HEIGHT = "0" *) 
  (* CLOCKING_MODE = "0" *) 
  (* ECC_BIT_RANGE = "[7:0]" *) 
  (* ECC_MODE = "0" *) 
  (* ECC_TYPE = "NONE" *) 
  (* IGNORE_INIT_SYNTH = "0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* MAX_NUM_CHAR = "0" *) 
  (* \MEM.ADDRESS_SPACE  *) 
  (* \MEM.ADDRESS_SPACE_BEGIN  = "0" *) 
  (* \MEM.ADDRESS_SPACE_DATA_LSB  = "0" *) 
  (* \MEM.ADDRESS_SPACE_DATA_MSB  = "67" *) 
  (* \MEM.ADDRESS_SPACE_END  = "2047" *) 
  (* \MEM.CORE_MEMORY_WIDTH  = "68" *) 
  (* MEMORY_INIT_FILE = "none" *) 
  (* MEMORY_INIT_PARAM = "" *) 
  (* MEMORY_OPTIMIZATION = "true" *) 
  (* MEMORY_PRIMITIVE = "2" *) 
  (* MEMORY_SIZE = "139264" *) 
  (* MEMORY_TYPE = "1" *) 
  (* MESSAGE_CONTROL = "0" *) 
  (* NUM_CHAR_LOC = "0" *) 
  (* P_ECC_MODE = "no_ecc" *) 
  (* P_ENABLE_BYTE_WRITE_A = "0" *) 
  (* P_ENABLE_BYTE_WRITE_B = "0" *) 
  (* P_MAX_DEPTH_DATA = "2048" *) 
  (* P_MEMORY_OPT = "yes" *) 
  (* P_MEMORY_PRIMITIVE = "block" *) 
  (* P_MIN_WIDTH_DATA = "68" *) 
  (* P_MIN_WIDTH_DATA_A = "68" *) 
  (* P_MIN_WIDTH_DATA_B = "68" *) 
  (* P_MIN_WIDTH_DATA_ECC = "68" *) 
  (* P_MIN_WIDTH_DATA_LDW = "4" *) 
  (* P_MIN_WIDTH_DATA_SHFT = "68" *) 
  (* P_NUM_COLS_WRITE_A = "1" *) 
  (* P_NUM_COLS_WRITE_B = "1" *) 
  (* P_NUM_ROWS_READ_A = "1" *) 
  (* P_NUM_ROWS_READ_B = "1" *) 
  (* P_NUM_ROWS_WRITE_A = "1" *) 
  (* P_NUM_ROWS_WRITE_B = "1" *) 
  (* P_SDP_WRITE_MODE = "no" *) 
  (* P_WIDTH_ADDR_LSB_READ_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) 
  (* P_WIDTH_ADDR_READ_A = "11" *) 
  (* P_WIDTH_ADDR_READ_B = "11" *) 
  (* P_WIDTH_ADDR_WRITE_A = "11" *) 
  (* P_WIDTH_ADDR_WRITE_B = "11" *) 
  (* P_WIDTH_COL_WRITE_A = "68" *) 
  (* P_WIDTH_COL_WRITE_B = "68" *) 
  (* RAM_DECOMP = "auto" *) 
  (* READ_DATA_WIDTH_A = "68" *) 
  (* READ_DATA_WIDTH_B = "68" *) 
  (* READ_LATENCY_A = "2" *) 
  (* READ_LATENCY_B = "2" *) 
  (* READ_RESET_VALUE_A = "0" *) 
  (* READ_RESET_VALUE_B = "0" *) 
  (* RST_MODE_A = "SYNC" *) 
  (* RST_MODE_B = "SYNC" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_EMBEDDED_CONSTRAINT = "0" *) 
  (* USE_MEM_INIT = "0" *) 
  (* USE_MEM_INIT_MMI = "0" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WRITE_DATA_WIDTH_A = "68" *) 
  (* WRITE_DATA_WIDTH_B = "68" *) 
  (* WRITE_MODE_A = "2" *) 
  (* WRITE_MODE_B = "2" *) 
  (* WRITE_PROTECT = "1" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* rsta_loop_iter = "68" *) 
  (* rstb_loop_iter = "68" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__parameterized0 \gen_sdpram.xpm_memory_base_inst 
       (.addra(wr_pntr_ext),
        .addrb(rd_pntr_ext),
        .clka(rd_clk),
        .clkb(1'b0),
        .dbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ),
        .dbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ),
        .dina(din),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED [67:0]),
        .doutb(dout),
        .ena(1'b0),
        .enb(rdpp1_inst_n_11),
        .injectdbiterra(1'b0),
        .injectdbiterrb(1'b0),
        .injectsbiterra(1'b0),
        .injectsbiterrb(1'b0),
        .regcea(1'b0),
        .regceb(\gen_fwft.ram_regout_en ),
        .rsta(1'b0),
        .rstb(xpm_fifo_rst_inst_n_2),
        .sbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ),
        .sbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ),
        .sleep(1'b0),
        .wea(ram_wr_en_pf),
        .web(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair336" *) 
  LUT3 #(
    .INIT(8'h62)) 
    \gen_sdpram.xpm_memory_base_inst_i_3 
       (.I0(curr_fwft_state[0]),
        .I1(curr_fwft_state[1]),
        .I2(rd_en),
        .O(\gen_fwft.ram_regout_en ));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized5 rdp_inst
       (.Q(rd_pntr_ext),
        .almost_full(almost_full),
        .\count_value_i_reg[0]_0 (rdpp1_inst_n_11),
        .\count_value_i_reg[10]_0 (xpm_fifo_rst_inst_n_2),
        .\count_value_i_reg[1]_0 (curr_fwft_state),
        .\gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_3_0 ({wrpp2_inst_n_0,wrpp2_inst_n_1,wrpp2_inst_n_2,wrpp2_inst_n_3,wrpp2_inst_n_4,wrpp2_inst_n_5,wrpp2_inst_n_6,wrpp2_inst_n_7,wrpp2_inst_n_8,wrpp2_inst_n_9,wrpp2_inst_n_10}),
        .\gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg (rdp_inst_n_0),
        .\gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg_0 (xpm_fifo_rst_inst_n_0),
        .\gen_pntr_flags_cc.gaf_cc.ram_afull_i_reg_1 (rst_d1_inst_n_1),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_2_0 ({wrpp1_inst_n_0,wrpp1_inst_n_1,wrpp1_inst_n_2,wrpp1_inst_n_3,wrpp1_inst_n_4,wrpp1_inst_n_5,wrpp1_inst_n_6,wrpp1_inst_n_7,wrpp1_inst_n_8,wrpp1_inst_n_9,wrpp1_inst_n_10}),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_i_3_0 (wr_pntr_ext),
        .\gen_pntr_flags_cc.ngen_full_rst_val.ram_full_i_reg (full),
        .leaving_empty0(leaving_empty0),
        .ram_empty_i(ram_empty_i),
        .ram_full_i0(ram_full_i0),
        .ram_wr_en_pf(ram_wr_en_pf),
        .rd_clk(rd_clk),
        .rd_en(rd_en),
        .rst(rst));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized6 rdpp1_inst
       (.\FSM_sequential_gen_fwft.curr_fwft_state_reg[1] (rdpp1_inst_n_11),
        .Q({rdpp1_inst_n_0,rdpp1_inst_n_1,rdpp1_inst_n_2,rdpp1_inst_n_3,rdpp1_inst_n_4,rdpp1_inst_n_5,rdpp1_inst_n_6,rdpp1_inst_n_7,rdpp1_inst_n_8,rdpp1_inst_n_9,rdpp1_inst_n_10}),
        .\count_value_i_reg[0]_0 (curr_fwft_state),
        .\count_value_i_reg[1]_0 (xpm_fifo_rst_inst_n_2),
        .ram_empty_i(ram_empty_i),
        .rd_clk(rd_clk),
        .rd_en(rd_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_129 rst_d1_inst
       (.Q(xpm_fifo_rst_inst_n_2),
        .d_out_int_reg_0(rst_d1_inst_n_1),
        .rd_clk(rd_clk),
        .rst(rst),
        .rst_d1(rst_d1));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized5_130 wrp_inst
       (.Q(wr_pntr_ext),
        .\count_value_i_reg[0]_0 (xpm_fifo_rst_inst_n_2),
        .\count_value_i_reg[5]_0 (full),
        .\gen_pntr_flags_cc.ram_empty_i_reg (rdpp1_inst_n_11),
        .\gen_pntr_flags_cc.ram_empty_i_reg_0 ({rdpp1_inst_n_0,rdpp1_inst_n_1,rdpp1_inst_n_2,rdpp1_inst_n_3,rdpp1_inst_n_4,rdpp1_inst_n_5,rdpp1_inst_n_6,rdpp1_inst_n_7,rdpp1_inst_n_8,rdpp1_inst_n_9,rdpp1_inst_n_10}),
        .leaving_empty0(leaving_empty0),
        .ram_empty_i(ram_empty_i),
        .ram_empty_i0(ram_empty_i0),
        .ram_wr_en_pf(ram_wr_en_pf),
        .rd_clk(rd_clk),
        .rst_d1(rst_d1),
        .wr_en(wr_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized6_131 wrpp1_inst
       (.Q({wrpp1_inst_n_0,wrpp1_inst_n_1,wrpp1_inst_n_2,wrpp1_inst_n_3,wrpp1_inst_n_4,wrpp1_inst_n_5,wrpp1_inst_n_6,wrpp1_inst_n_7,wrpp1_inst_n_8,wrpp1_inst_n_9,wrpp1_inst_n_10}),
        .\count_value_i_reg[1]_0 (xpm_fifo_rst_inst_n_2),
        .\count_value_i_reg[5]_0 (full),
        .ram_wr_en_pf(ram_wr_en_pf),
        .rd_clk(rd_clk),
        .rst_d1(rst_d1),
        .wr_en(wr_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized4 wrpp2_inst
       (.Q({wrpp2_inst_n_0,wrpp2_inst_n_1,wrpp2_inst_n_2,wrpp2_inst_n_3,wrpp2_inst_n_4,wrpp2_inst_n_5,wrpp2_inst_n_6,wrpp2_inst_n_7,wrpp2_inst_n_8,wrpp2_inst_n_9,wrpp2_inst_n_10}),
        .\count_value_i_reg[0]_0 (xpm_fifo_rst_inst_n_2),
        .\count_value_i_reg[5]_0 (full),
        .ram_wr_en_pf(ram_wr_en_pf),
        .rd_clk(rd_clk),
        .rst_d1(rst_d1),
        .wr_en(wr_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst xpm_fifo_rst_inst
       (.Q(curr_fwft_state),
        .\count_value_i_reg[10] (full),
        .\gen_pntr_flags_cc.ram_empty_i_reg (xpm_fifo_rst_inst_n_0),
        .\gen_rst_cc.fifo_wr_rst_cc_reg[2]_0 (xpm_fifo_rst_inst_n_2),
        .ram_empty_i(ram_empty_i),
        .ram_wr_en_pf(ram_wr_en_pf),
        .rd_clk(rd_clk),
        .rd_en(rd_en),
        .rst(rst),
        .rst_d1(rst_d1),
        .wr_en(wr_en));
endmodule

(* CASCADE_HEIGHT = "0" *) (* CDC_DEST_SYNC_FF = "2" *) (* COMMON_CLOCK = "0" *) 
(* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "0" *) (* ENABLE_ECC = "0" *) 
(* EN_ADV_FEATURE = "16'b0000011100000111" *) (* EN_AE = "1'b0" *) (* EN_AF = "1'b0" *) 
(* EN_DVLD = "1'b0" *) (* EN_OF = "1'b1" *) (* EN_PE = "1'b1" *) 
(* EN_PF = "1'b1" *) (* EN_RDC = "1'b1" *) (* EN_SIM_ASSERT_ERR = "warning" *) 
(* EN_UF = "1'b1" *) (* EN_WACK = "1'b0" *) (* EN_WDC = "1'b1" *) 
(* FG_EQ_ASYM_DOUT = "1'b0" *) (* FIFO_MEMORY_TYPE = "1" *) (* FIFO_MEM_TYPE = "1" *) 
(* FIFO_READ_DEPTH = "32" *) (* FIFO_READ_LATENCY = "1" *) (* FIFO_SIZE = "832" *) 
(* FIFO_WRITE_DEPTH = "32" *) (* FULL_RESET_VALUE = "0" *) (* FULL_RST_VAL = "1'b0" *) 
(* ORIG_REF_NAME = "xpm_fifo_base" *) (* PE_THRESH_ADJ = "10" *) (* PE_THRESH_MAX = "29" *) 
(* PE_THRESH_MIN = "3" *) (* PF_THRESH_ADJ = "29" *) (* PF_THRESH_MAX = "29" *) 
(* PF_THRESH_MIN = "5" *) (* PROG_EMPTY_THRESH = "10" *) (* PROG_FULL_THRESH = "29" *) 
(* RD_DATA_COUNT_WIDTH = "5" *) (* RD_DC_WIDTH_EXT = "6" *) (* RD_LATENCY = "1" *) 
(* RD_MODE = "0" *) (* RD_PNTR_WIDTH = "5" *) (* READ_DATA_WIDTH = "26" *) 
(* READ_MODE = "0" *) (* READ_MODE_LL = "0" *) (* RELATED_CLOCKS = "0" *) 
(* REMOVE_WR_RD_PROT_LOGIC = "0" *) (* SIM_ASSERT_CHK = "0" *) (* USE_ADV_FEATURES = "0707" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WIDTH_RATIO = "1" *) 
(* WRITE_DATA_WIDTH = "26" *) (* WR_DATA_COUNT_WIDTH = "5" *) (* WR_DC_WIDTH_EXT = "6" *) 
(* WR_DEPTH_LOG = "5" *) (* WR_PNTR_WIDTH = "5" *) (* WR_RD_RATIO = "0" *) 
(* WR_WIDTH_LOG = "5" *) (* XPM_MODULE = "TRUE" *) (* both_stages_valid = "3" *) 
(* invalid = "0" *) (* keep_hierarchy = "soft" *) (* stage1_valid = "2" *) 
(* stage2_valid = "1" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__parameterized1
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    full_n,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_clk,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [25:0]din;
  output full;
  output full_n;
  output prog_full;
  output [4:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_clk;
  input rd_en;
  output [25:0]dout;
  output empty;
  output prog_empty;
  output [4:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [4:0]diff_pntr_pe;
  wire [5:1]diff_pntr_pf_q;
  wire [5:1]diff_pntr_pf_q0;
  wire [25:0]din;
  wire [25:0]dout;
  wire empty;
  wire empty_i0;
  wire full;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_0 ;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_1 ;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_2 ;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_3 ;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_4 ;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_5 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_4 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_5 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_6 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_7 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_8 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_9 ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[0] ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[1] ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[2] ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[3] ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[4] ;
  wire \gen_pf_ic_rc.gpe_ic.prog_empty_i_i_1_n_0 ;
  wire \gen_pf_ic_rc.gpe_ic.prog_empty_i_i_2_n_0 ;
  wire [5:1]\grdc.diff_wr_rd_pntr_rdc0_out ;
  wire [5:1]\gwdc.diff_wr_rd_pntr1_out ;
  wire overflow;
  wire overflow_i0;
  wire prog_empty;
  wire prog_full;
  wire ram_full_i0;
  wire ram_rd_en_i;
  wire rd_clk;
  wire [4:0]rd_data_count;
  wire rd_en;
  wire [5:0]rd_pntr_ext;
  wire [4:0]rd_pntr_wr;
  wire [4:0]rd_pntr_wr_cdc;
  wire [5:0]rd_pntr_wr_cdc_dc;
  wire rd_rst_busy;
  wire rdp_inst_n_10;
  wire rdp_inst_n_8;
  wire rdp_inst_n_9;
  wire rst;
  wire rst_d1;
  wire rst_d1_inst_n_1;
  wire underflow;
  wire underflow_i0;
  wire wr_clk;
  wire [4:0]wr_data_count;
  wire wr_en;
  wire [5:0]wr_pntr_ext;
  wire [5:4]wr_pntr_plus1_pf;
  wire wr_pntr_plus1_pf_carry;
  wire [4:0]wr_pntr_rd_cdc;
  wire [5:0]wr_pntr_rd_cdc_dc;
  wire wr_rst_busy;
  wire wrpp1_inst_n_0;
  wire wrpp2_inst_n_0;
  wire wrpp2_inst_n_1;
  wire wrpp2_inst_n_2;
  wire wrst_busy;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ;
  wire [25:0]\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED ;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign full_n = \<const0> ;
  assign sbiterr = \<const0> ;
  assign wr_ack = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* DEST_SYNC_FF = "2" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* REG_OUTPUT = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* WIDTH = "6" *) 
  (* XPM_CDC = "GRAY" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__parameterized0 \gen_cdc_pntr.rd_pntr_cdc_dc_inst 
       (.dest_clk(wr_clk),
        .dest_out_bin(rd_pntr_wr_cdc_dc),
        .src_clk(rd_clk),
        .src_in_bin(rd_pntr_ext));
  (* DEST_SYNC_FF = "2" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* REG_OUTPUT = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* WIDTH = "5" *) 
  (* XPM_CDC = "GRAY" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray \gen_cdc_pntr.rd_pntr_cdc_inst 
       (.dest_clk(wr_clk),
        .dest_out_bin(rd_pntr_wr_cdc),
        .src_clk(rd_clk),
        .src_in_bin(rd_pntr_ext[4:0]));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec_154 \gen_cdc_pntr.rpw_gray_reg 
       (.D(rd_pntr_wr_cdc),
        .E(wr_pntr_plus1_pf_carry),
        .Q(rd_pntr_wr),
        .\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg (wrpp1_inst_n_0),
        .\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_0 (wrpp2_inst_n_0),
        .\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 ({wrpp2_inst_n_1,wrpp2_inst_n_2}),
        .\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 (wr_pntr_plus1_pf),
        .ram_full_i0(ram_full_i0),
        .wr_clk(wr_clk),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec__parameterized0_155 \gen_cdc_pntr.rpw_gray_reg_dc 
       (.D(rd_pntr_wr_cdc_dc),
        .Q({\gen_cdc_pntr.rpw_gray_reg_dc_n_0 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_1 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_2 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_3 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_4 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_5 }),
        .wr_clk(wr_clk),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec_156 \gen_cdc_pntr.wpr_gray_reg 
       (.D({diff_pntr_pe[4:2],diff_pntr_pe[0]}),
        .Q({\gen_cdc_pntr.wpr_gray_reg_n_4 ,\gen_cdc_pntr.wpr_gray_reg_n_5 ,\gen_cdc_pntr.wpr_gray_reg_n_6 ,\gen_cdc_pntr.wpr_gray_reg_n_7 ,\gen_cdc_pntr.wpr_gray_reg_n_8 }),
        .SR(rd_rst_busy),
        .\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] (empty),
        .\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] (rdp_inst_n_10),
        .\gen_pf_ic_rc.ram_empty_i_reg (rd_pntr_ext[4:0]),
        .rd_clk(rd_clk),
        .rd_en(rd_en),
        .\reg_out_i_reg[3]_0 (\gen_cdc_pntr.wpr_gray_reg_n_9 ),
        .\reg_out_i_reg[4]_0 (wr_pntr_rd_cdc));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec__parameterized0_157 \gen_cdc_pntr.wpr_gray_reg_dc 
       (.D(\grdc.diff_wr_rd_pntr_rdc0_out ),
        .Q(rd_pntr_ext),
        .SR(rd_rst_busy),
        .rd_clk(rd_clk),
        .\reg_out_i_reg[5]_0 (wr_pntr_rd_cdc_dc));
  (* DEST_SYNC_FF = "2" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* REG_OUTPUT = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* WIDTH = "6" *) 
  (* XPM_CDC = "GRAY" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__parameterized0__6 \gen_cdc_pntr.wr_pntr_cdc_dc_inst 
       (.dest_clk(rd_clk),
        .dest_out_bin(wr_pntr_rd_cdc_dc),
        .src_clk(wr_clk),
        .src_in_bin(wr_pntr_ext));
  (* DEST_SYNC_FF = "2" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* REG_OUTPUT = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* WIDTH = "5" *) 
  (* XPM_CDC = "GRAY" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__6 \gen_cdc_pntr.wr_pntr_cdc_inst 
       (.dest_clk(rd_clk),
        .dest_out_bin(wr_pntr_rd_cdc),
        .src_clk(wr_clk),
        .src_in_bin(wr_pntr_ext[4:0]));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(diff_pntr_pe[0]),
        .Q(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[0] ),
        .R(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(diff_pntr_pe[1]),
        .Q(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[1] ),
        .R(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[2] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(diff_pntr_pe[2]),
        .Q(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[2] ),
        .R(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[3] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(diff_pntr_pe[3]),
        .Q(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[3] ),
        .R(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(diff_pntr_pe[4]),
        .Q(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[4] ),
        .R(rd_rst_busy));
  LUT3 #(
    .INIT(8'hB8)) 
    \gen_pf_ic_rc.gpe_ic.prog_empty_i_i_1 
       (.I0(prog_empty),
        .I1(empty),
        .I2(\gen_pf_ic_rc.gpe_ic.prog_empty_i_i_2_n_0 ),
        .O(\gen_pf_ic_rc.gpe_ic.prog_empty_i_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000557F)) 
    \gen_pf_ic_rc.gpe_ic.prog_empty_i_i_2 
       (.I0(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[3] ),
        .I1(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[0] ),
        .I2(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[1] ),
        .I3(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[2] ),
        .I4(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[4] ),
        .O(\gen_pf_ic_rc.gpe_ic.prog_empty_i_i_2_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \gen_pf_ic_rc.gpe_ic.prog_empty_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_pf_ic_rc.gpe_ic.prog_empty_i_i_1_n_0 ),
        .Q(prog_empty),
        .S(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(diff_pntr_pf_q0[1]),
        .Q(diff_pntr_pf_q[1]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[2] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(diff_pntr_pf_q0[2]),
        .Q(diff_pntr_pf_q[2]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[3] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(diff_pntr_pf_q0[3]),
        .Q(diff_pntr_pf_q[3]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[4] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(diff_pntr_pf_q0[4]),
        .Q(diff_pntr_pf_q[4]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(diff_pntr_pf_q0[5]),
        .Q(diff_pntr_pf_q[5]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpf_ic.prog_full_i_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(rst_d1_inst_n_1),
        .Q(prog_full),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(ram_full_i0),
        .Q(full),
        .R(wrst_busy));
  FDSE #(
    .INIT(1'b1)) 
    \gen_pf_ic_rc.ram_empty_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(empty_i0),
        .Q(empty),
        .S(rd_rst_busy));
  (* ADDR_WIDTH_A = "5" *) 
  (* ADDR_WIDTH_B = "5" *) 
  (* AUTO_SLEEP_TIME = "0" *) 
  (* BYTE_WRITE_WIDTH_A = "26" *) 
  (* BYTE_WRITE_WIDTH_B = "26" *) 
  (* CASCADE_HEIGHT = "0" *) 
  (* CLOCKING_MODE = "1" *) 
  (* ECC_BIT_RANGE = "[7:0]" *) 
  (* ECC_MODE = "0" *) 
  (* ECC_TYPE = "NONE" *) 
  (* IGNORE_INIT_SYNTH = "0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* MAX_NUM_CHAR = "0" *) 
  (* MEMORY_INIT_FILE = "none" *) 
  (* MEMORY_INIT_PARAM = "" *) 
  (* MEMORY_OPTIMIZATION = "true" *) 
  (* MEMORY_PRIMITIVE = "1" *) 
  (* MEMORY_SIZE = "832" *) 
  (* MEMORY_TYPE = "1" *) 
  (* MESSAGE_CONTROL = "0" *) 
  (* NUM_CHAR_LOC = "0" *) 
  (* P_ECC_MODE = "no_ecc" *) 
  (* P_ENABLE_BYTE_WRITE_A = "0" *) 
  (* P_ENABLE_BYTE_WRITE_B = "0" *) 
  (* P_MAX_DEPTH_DATA = "32" *) 
  (* P_MEMORY_OPT = "yes" *) 
  (* P_MEMORY_PRIMITIVE = "distributed" *) 
  (* P_MIN_WIDTH_DATA = "26" *) 
  (* P_MIN_WIDTH_DATA_A = "26" *) 
  (* P_MIN_WIDTH_DATA_B = "26" *) 
  (* P_MIN_WIDTH_DATA_ECC = "26" *) 
  (* P_MIN_WIDTH_DATA_LDW = "4" *) 
  (* P_MIN_WIDTH_DATA_SHFT = "26" *) 
  (* P_NUM_COLS_WRITE_A = "1" *) 
  (* P_NUM_COLS_WRITE_B = "1" *) 
  (* P_NUM_ROWS_READ_A = "1" *) 
  (* P_NUM_ROWS_READ_B = "1" *) 
  (* P_NUM_ROWS_WRITE_A = "1" *) 
  (* P_NUM_ROWS_WRITE_B = "1" *) 
  (* P_SDP_WRITE_MODE = "yes" *) 
  (* P_WIDTH_ADDR_LSB_READ_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) 
  (* P_WIDTH_ADDR_READ_A = "5" *) 
  (* P_WIDTH_ADDR_READ_B = "5" *) 
  (* P_WIDTH_ADDR_WRITE_A = "5" *) 
  (* P_WIDTH_ADDR_WRITE_B = "5" *) 
  (* P_WIDTH_COL_WRITE_A = "26" *) 
  (* P_WIDTH_COL_WRITE_B = "26" *) 
  (* RAM_DECOMP = "auto" *) 
  (* READ_DATA_WIDTH_A = "26" *) 
  (* READ_DATA_WIDTH_B = "26" *) 
  (* READ_LATENCY_A = "2" *) 
  (* READ_LATENCY_B = "1" *) 
  (* READ_RESET_VALUE_A = "0" *) 
  (* READ_RESET_VALUE_B = "0" *) 
  (* RST_MODE_A = "SYNC" *) 
  (* RST_MODE_B = "SYNC" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_EMBEDDED_CONSTRAINT = "1" *) 
  (* USE_MEM_INIT = "0" *) 
  (* USE_MEM_INIT_MMI = "0" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WRITE_DATA_WIDTH_A = "26" *) 
  (* WRITE_DATA_WIDTH_B = "26" *) 
  (* WRITE_MODE_A = "2" *) 
  (* WRITE_MODE_B = "1" *) 
  (* WRITE_PROTECT = "1" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* rsta_loop_iter = "28" *) 
  (* rstb_loop_iter = "28" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__parameterized1 \gen_sdpram.xpm_memory_base_inst 
       (.addra(wr_pntr_ext[4:0]),
        .addrb(rd_pntr_ext[4:0]),
        .clka(wr_clk),
        .clkb(rd_clk),
        .dbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ),
        .dbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ),
        .dina(din),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED [25:0]),
        .doutb(dout),
        .ena(wr_pntr_plus1_pf_carry),
        .enb(ram_rd_en_i),
        .injectdbiterra(1'b0),
        .injectdbiterrb(1'b0),
        .injectsbiterra(1'b0),
        .injectsbiterrb(1'b0),
        .regcea(1'b0),
        .regceb(1'b0),
        .rsta(1'b0),
        .rstb(rd_rst_busy),
        .sbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ),
        .sbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ),
        .sleep(1'b0),
        .wea(1'b0),
        .web(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \gof.overflow_i_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(overflow_i0),
        .Q(overflow),
        .R(1'b0));
  FDRE \grdc.rd_data_count_i_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\grdc.diff_wr_rd_pntr_rdc0_out [1]),
        .Q(rd_data_count[0]),
        .R(rd_rst_busy));
  FDRE \grdc.rd_data_count_i_reg[2] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\grdc.diff_wr_rd_pntr_rdc0_out [2]),
        .Q(rd_data_count[1]),
        .R(rd_rst_busy));
  FDRE \grdc.rd_data_count_i_reg[3] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\grdc.diff_wr_rd_pntr_rdc0_out [3]),
        .Q(rd_data_count[2]),
        .R(rd_rst_busy));
  FDRE \grdc.rd_data_count_i_reg[4] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\grdc.diff_wr_rd_pntr_rdc0_out [4]),
        .Q(rd_data_count[3]),
        .R(rd_rst_busy));
  FDRE \grdc.rd_data_count_i_reg[5] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\grdc.diff_wr_rd_pntr_rdc0_out [5]),
        .Q(rd_data_count[4]),
        .R(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \guf.underflow_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(underflow_i0),
        .Q(underflow),
        .R(1'b0));
  FDRE \gwdc.wr_data_count_i_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gwdc.diff_wr_rd_pntr1_out [1]),
        .Q(wr_data_count[0]),
        .R(wrst_busy));
  FDRE \gwdc.wr_data_count_i_reg[2] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gwdc.diff_wr_rd_pntr1_out [2]),
        .Q(wr_data_count[1]),
        .R(wrst_busy));
  FDRE \gwdc.wr_data_count_i_reg[3] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gwdc.diff_wr_rd_pntr1_out [3]),
        .Q(wr_data_count[2]),
        .R(wrst_busy));
  FDRE \gwdc.wr_data_count_i_reg[4] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gwdc.diff_wr_rd_pntr1_out [4]),
        .Q(wr_data_count[3]),
        .R(wrst_busy));
  FDRE \gwdc.wr_data_count_i_reg[5] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gwdc.diff_wr_rd_pntr1_out [5]),
        .Q(wr_data_count[4]),
        .R(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized7_158 rdp_inst
       (.D(diff_pntr_pe[1]),
        .E(ram_rd_en_i),
        .Q(rd_pntr_ext),
        .SR(rd_rst_busy),
        .\count_value_i_reg[2]_0 (rdp_inst_n_9),
        .\count_value_i_reg[4]_0 (rdp_inst_n_10),
        .\count_value_i_reg[5]_0 (empty),
        .\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ({\gen_cdc_pntr.wpr_gray_reg_n_4 ,\gen_cdc_pntr.wpr_gray_reg_n_6 ,\gen_cdc_pntr.wpr_gray_reg_n_7 ,\gen_cdc_pntr.wpr_gray_reg_n_8 }),
        .\gen_pf_ic_rc.ram_empty_i_reg (rdp_inst_n_8),
        .rd_clk(rd_clk),
        .rd_en(rd_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized8_159 rdpp1_inst
       (.E(ram_rd_en_i),
        .Q({\gen_cdc_pntr.wpr_gray_reg_n_4 ,\gen_cdc_pntr.wpr_gray_reg_n_5 ,\gen_cdc_pntr.wpr_gray_reg_n_6 ,\gen_cdc_pntr.wpr_gray_reg_n_7 ,\gen_cdc_pntr.wpr_gray_reg_n_8 }),
        .SR(rd_rst_busy),
        .\count_value_i_reg[4]_0 (rdp_inst_n_8),
        .empty_i0(empty_i0),
        .\gen_pf_ic_rc.ram_empty_i_reg (\gen_cdc_pntr.wpr_gray_reg_n_9 ),
        .\gen_pf_ic_rc.ram_empty_i_reg_0 (rdp_inst_n_9),
        .\gen_pf_ic_rc.ram_empty_i_reg_1 (empty),
        .rd_clk(rd_clk),
        .rd_en(rd_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_160 rst_d1_inst
       (.Q(diff_pntr_pf_q),
        .d_out_int_reg_0(rst_d1_inst_n_1),
        .\gen_pf_ic_rc.gpf_ic.prog_full_i_reg (full),
        .prog_full(prog_full),
        .rst(rst),
        .rst_d1(rst_d1),
        .wr_clk(wr_clk),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized7_161 wrp_inst
       (.D(\gwdc.diff_wr_rd_pntr1_out ),
        .E(wr_pntr_plus1_pf_carry),
        .Q(wr_pntr_ext),
        .\count_value_i_reg[5]_0 (full),
        .\gwdc.wr_data_count_i_reg[5] ({\gen_cdc_pntr.rpw_gray_reg_dc_n_0 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_1 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_2 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_3 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_4 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_5 }),
        .rst_d1(rst_d1),
        .wr_clk(wr_clk),
        .wr_en(wr_en),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized8_162 wrpp1_inst
       (.D(diff_pntr_pf_q0),
        .E(wr_pntr_plus1_pf_carry),
        .Q(wr_pntr_plus1_pf),
        .\count_value_i_reg[2]_0 (wrpp1_inst_n_0),
        .\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] (rd_pntr_wr),
        .wr_clk(wr_clk),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized9_163 wrpp2_inst
       (.E(wr_pntr_plus1_pf_carry),
        .Q(rd_pntr_wr[2:0]),
        .\count_value_i_reg[2]_0 (wrpp2_inst_n_0),
        .\count_value_i_reg[4]_0 ({wrpp2_inst_n_1,wrpp2_inst_n_2}),
        .wr_clk(wr_clk),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst__parameterized0__xdcDup__1 xpm_fifo_rst_inst
       (.E(wr_pntr_plus1_pf_carry),
        .SR(rd_rst_busy),
        .\gof.overflow_i_reg (full),
        .\guf.underflow_i_reg (empty),
        .overflow_i0(overflow_i0),
        .rd_clk(rd_clk),
        .rd_en(rd_en),
        .rst(rst),
        .rst_d1(rst_d1),
        .underflow_i0(underflow_i0),
        .wr_clk(wr_clk),
        .wr_en(wr_en),
        .wr_rst_busy(wr_rst_busy),
        .wrst_busy(wrst_busy));
endmodule

(* CASCADE_HEIGHT = "0" *) (* CDC_DEST_SYNC_FF = "2" *) (* COMMON_CLOCK = "0" *) 
(* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "0" *) (* ENABLE_ECC = "0" *) 
(* EN_ADV_FEATURE = "16'b0000011100000111" *) (* EN_AE = "1'b0" *) (* EN_AF = "1'b0" *) 
(* EN_DVLD = "1'b0" *) (* EN_OF = "1'b1" *) (* EN_PE = "1'b1" *) 
(* EN_PF = "1'b1" *) (* EN_RDC = "1'b1" *) (* EN_SIM_ASSERT_ERR = "warning" *) 
(* EN_UF = "1'b1" *) (* EN_WACK = "1'b0" *) (* EN_WDC = "1'b1" *) 
(* FG_EQ_ASYM_DOUT = "1'b0" *) (* FIFO_MEMORY_TYPE = "1" *) (* FIFO_MEM_TYPE = "1" *) 
(* FIFO_READ_DEPTH = "32" *) (* FIFO_READ_LATENCY = "1" *) (* FIFO_SIZE = "1344" *) 
(* FIFO_WRITE_DEPTH = "32" *) (* FULL_RESET_VALUE = "0" *) (* FULL_RST_VAL = "1'b0" *) 
(* ORIG_REF_NAME = "xpm_fifo_base" *) (* PE_THRESH_ADJ = "10" *) (* PE_THRESH_MAX = "29" *) 
(* PE_THRESH_MIN = "3" *) (* PF_THRESH_ADJ = "10" *) (* PF_THRESH_MAX = "29" *) 
(* PF_THRESH_MIN = "5" *) (* PROG_EMPTY_THRESH = "10" *) (* PROG_FULL_THRESH = "10" *) 
(* RD_DATA_COUNT_WIDTH = "1" *) (* RD_DC_WIDTH_EXT = "6" *) (* RD_LATENCY = "1" *) 
(* RD_MODE = "0" *) (* RD_PNTR_WIDTH = "5" *) (* READ_DATA_WIDTH = "42" *) 
(* READ_MODE = "0" *) (* READ_MODE_LL = "0" *) (* RELATED_CLOCKS = "0" *) 
(* REMOVE_WR_RD_PROT_LOGIC = "0" *) (* SIM_ASSERT_CHK = "0" *) (* USE_ADV_FEATURES = "0707" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WIDTH_RATIO = "1" *) 
(* WRITE_DATA_WIDTH = "42" *) (* WR_DATA_COUNT_WIDTH = "1" *) (* WR_DC_WIDTH_EXT = "6" *) 
(* WR_DEPTH_LOG = "5" *) (* WR_PNTR_WIDTH = "5" *) (* WR_RD_RATIO = "0" *) 
(* WR_WIDTH_LOG = "6" *) (* XPM_MODULE = "TRUE" *) (* both_stages_valid = "3" *) 
(* invalid = "0" *) (* keep_hierarchy = "soft" *) (* stage1_valid = "2" *) 
(* stage2_valid = "1" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__parameterized2
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    full_n,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_clk,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [41:0]din;
  output full;
  output full_n;
  output prog_full;
  output [0:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_clk;
  input rd_en;
  output [41:0]dout;
  output empty;
  output prog_empty;
  output [0:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [4:0]diff_pntr_pe;
  wire [5:2]diff_pntr_pf_q;
  wire [5:2]diff_pntr_pf_q0;
  wire [41:0]din;
  wire [41:0]dout;
  wire empty;
  wire empty_i0;
  wire full;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_0 ;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_1 ;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_2 ;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_3 ;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_4 ;
  wire \gen_cdc_pntr.rpw_gray_reg_dc_n_5 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_4 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_5 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_6 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_7 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_8 ;
  wire \gen_cdc_pntr.wpr_gray_reg_n_9 ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[0] ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[1] ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[2] ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[3] ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[4] ;
  wire \gen_pf_ic_rc.gpe_ic.prog_empty_i_i_1_n_0 ;
  wire \gen_pf_ic_rc.gpe_ic.prog_empty_i_i_2_n_0 ;
  wire [5:5]\grdc.diff_wr_rd_pntr_rdc0_out ;
  wire [5:5]\gwdc.diff_wr_rd_pntr1_out ;
  wire overflow;
  wire overflow_i0;
  wire prog_empty;
  wire prog_full;
  wire ram_full_i0;
  wire ram_rd_en_i;
  wire rd_clk;
  wire [0:0]rd_data_count;
  wire rd_en;
  wire [5:0]rd_pntr_ext;
  wire [4:0]rd_pntr_wr;
  wire [4:0]rd_pntr_wr_cdc;
  wire [5:0]rd_pntr_wr_cdc_dc;
  wire rd_rst_busy;
  wire rdp_inst_n_10;
  wire rdp_inst_n_8;
  wire rdp_inst_n_9;
  wire rst;
  wire rst_d1;
  wire rst_d1_inst_n_1;
  wire underflow;
  wire underflow_i0;
  wire wr_clk;
  wire [0:0]wr_data_count;
  wire wr_en;
  wire [5:0]wr_pntr_ext;
  wire [5:4]wr_pntr_plus1_pf;
  wire wr_pntr_plus1_pf_carry;
  wire [4:0]wr_pntr_rd_cdc;
  wire [5:0]wr_pntr_rd_cdc_dc;
  wire wr_rst_busy;
  wire wrpp1_inst_n_0;
  wire wrpp2_inst_n_0;
  wire wrpp2_inst_n_1;
  wire wrpp2_inst_n_2;
  wire wrst_busy;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ;
  wire \NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ;
  wire [41:0]\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED ;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign full_n = \<const0> ;
  assign sbiterr = \<const0> ;
  assign wr_ack = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* DEST_SYNC_FF = "2" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* REG_OUTPUT = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* WIDTH = "6" *) 
  (* XPM_CDC = "GRAY" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__parameterized0__5 \gen_cdc_pntr.rd_pntr_cdc_dc_inst 
       (.dest_clk(wr_clk),
        .dest_out_bin(rd_pntr_wr_cdc_dc),
        .src_clk(rd_clk),
        .src_in_bin(rd_pntr_ext));
  (* DEST_SYNC_FF = "2" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* REG_OUTPUT = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* WIDTH = "5" *) 
  (* XPM_CDC = "GRAY" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__5 \gen_cdc_pntr.rd_pntr_cdc_inst 
       (.dest_clk(wr_clk),
        .dest_out_bin(rd_pntr_wr_cdc),
        .src_clk(rd_clk),
        .src_in_bin(rd_pntr_ext[4:0]));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec \gen_cdc_pntr.rpw_gray_reg 
       (.D(rd_pntr_wr_cdc),
        .E(wr_pntr_plus1_pf_carry),
        .Q(rd_pntr_wr),
        .\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg (wrpp1_inst_n_0),
        .\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_0 (wrpp2_inst_n_0),
        .\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 ({wrpp2_inst_n_1,wrpp2_inst_n_2}),
        .\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 (wr_pntr_plus1_pf),
        .ram_full_i0(ram_full_i0),
        .wr_clk(wr_clk),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec__parameterized0 \gen_cdc_pntr.rpw_gray_reg_dc 
       (.D(rd_pntr_wr_cdc_dc),
        .Q({\gen_cdc_pntr.rpw_gray_reg_dc_n_0 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_1 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_2 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_3 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_4 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_5 }),
        .wr_clk(wr_clk),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec_125 \gen_cdc_pntr.wpr_gray_reg 
       (.D({diff_pntr_pe[4:2],diff_pntr_pe[0]}),
        .Q({\gen_cdc_pntr.wpr_gray_reg_n_4 ,\gen_cdc_pntr.wpr_gray_reg_n_5 ,\gen_cdc_pntr.wpr_gray_reg_n_6 ,\gen_cdc_pntr.wpr_gray_reg_n_7 ,\gen_cdc_pntr.wpr_gray_reg_n_8 }),
        .\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] (empty),
        .\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] (rdp_inst_n_10),
        .\gen_pf_ic_rc.ram_empty_i_reg (rd_pntr_ext[4:0]),
        .rd_clk(rd_clk),
        .rd_en(rd_en),
        .\reg_out_i_reg[0]_0 (rd_rst_busy),
        .\reg_out_i_reg[3]_0 (\gen_cdc_pntr.wpr_gray_reg_n_9 ),
        .\reg_out_i_reg[4]_0 (wr_pntr_rd_cdc));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec__parameterized0_126 \gen_cdc_pntr.wpr_gray_reg_dc 
       (.D(wr_pntr_rd_cdc_dc),
        .O(\grdc.diff_wr_rd_pntr_rdc0_out ),
        .Q(rd_pntr_ext),
        .rd_clk(rd_clk),
        .\reg_out_i_reg[0]_0 (rd_rst_busy));
  (* DEST_SYNC_FF = "2" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* REG_OUTPUT = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* WIDTH = "6" *) 
  (* XPM_CDC = "GRAY" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__parameterized0__4 \gen_cdc_pntr.wr_pntr_cdc_dc_inst 
       (.dest_clk(rd_clk),
        .dest_out_bin(wr_pntr_rd_cdc_dc),
        .src_clk(wr_clk),
        .src_in_bin(wr_pntr_ext));
  (* DEST_SYNC_FF = "2" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* REG_OUTPUT = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* SIM_LOSSLESS_GRAY_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* WIDTH = "5" *) 
  (* XPM_CDC = "GRAY" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_gray__4 \gen_cdc_pntr.wr_pntr_cdc_inst 
       (.dest_clk(rd_clk),
        .dest_out_bin(wr_pntr_rd_cdc),
        .src_clk(wr_clk),
        .src_in_bin(wr_pntr_ext[4:0]));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(diff_pntr_pe[0]),
        .Q(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[0] ),
        .R(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(diff_pntr_pe[1]),
        .Q(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[1] ),
        .R(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[2] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(diff_pntr_pe[2]),
        .Q(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[2] ),
        .R(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[3] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(diff_pntr_pe[3]),
        .Q(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[3] ),
        .R(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(diff_pntr_pe[4]),
        .Q(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[4] ),
        .R(rd_rst_busy));
  LUT3 #(
    .INIT(8'hB8)) 
    \gen_pf_ic_rc.gpe_ic.prog_empty_i_i_1 
       (.I0(prog_empty),
        .I1(empty),
        .I2(\gen_pf_ic_rc.gpe_ic.prog_empty_i_i_2_n_0 ),
        .O(\gen_pf_ic_rc.gpe_ic.prog_empty_i_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h0000557F)) 
    \gen_pf_ic_rc.gpe_ic.prog_empty_i_i_2 
       (.I0(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[3] ),
        .I1(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[0] ),
        .I2(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[1] ),
        .I3(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[2] ),
        .I4(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg_n_0_[4] ),
        .O(\gen_pf_ic_rc.gpe_ic.prog_empty_i_i_2_n_0 ));
  FDSE #(
    .INIT(1'b1)) 
    \gen_pf_ic_rc.gpe_ic.prog_empty_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_pf_ic_rc.gpe_ic.prog_empty_i_i_1_n_0 ),
        .Q(prog_empty),
        .S(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[2] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(diff_pntr_pf_q0[2]),
        .Q(diff_pntr_pf_q[2]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[3] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(diff_pntr_pf_q0[3]),
        .Q(diff_pntr_pf_q[3]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[4] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(diff_pntr_pf_q0[4]),
        .Q(diff_pntr_pf_q[4]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(diff_pntr_pf_q0[5]),
        .Q(diff_pntr_pf_q[5]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.gpf_ic.prog_full_i_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(rst_d1_inst_n_1),
        .Q(prog_full),
        .R(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(ram_full_i0),
        .Q(full),
        .R(wrst_busy));
  FDSE #(
    .INIT(1'b1)) 
    \gen_pf_ic_rc.ram_empty_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(empty_i0),
        .Q(empty),
        .S(rd_rst_busy));
  (* ADDR_WIDTH_A = "5" *) 
  (* ADDR_WIDTH_B = "5" *) 
  (* AUTO_SLEEP_TIME = "0" *) 
  (* BYTE_WRITE_WIDTH_A = "42" *) 
  (* BYTE_WRITE_WIDTH_B = "42" *) 
  (* CASCADE_HEIGHT = "0" *) 
  (* CLOCKING_MODE = "1" *) 
  (* ECC_BIT_RANGE = "[7:0]" *) 
  (* ECC_MODE = "0" *) 
  (* ECC_TYPE = "NONE" *) 
  (* IGNORE_INIT_SYNTH = "0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* MAX_NUM_CHAR = "0" *) 
  (* MEMORY_INIT_FILE = "none" *) 
  (* MEMORY_INIT_PARAM = "" *) 
  (* MEMORY_OPTIMIZATION = "true" *) 
  (* MEMORY_PRIMITIVE = "1" *) 
  (* MEMORY_SIZE = "1344" *) 
  (* MEMORY_TYPE = "1" *) 
  (* MESSAGE_CONTROL = "0" *) 
  (* NUM_CHAR_LOC = "0" *) 
  (* P_ECC_MODE = "no_ecc" *) 
  (* P_ENABLE_BYTE_WRITE_A = "0" *) 
  (* P_ENABLE_BYTE_WRITE_B = "0" *) 
  (* P_MAX_DEPTH_DATA = "32" *) 
  (* P_MEMORY_OPT = "yes" *) 
  (* P_MEMORY_PRIMITIVE = "distributed" *) 
  (* P_MIN_WIDTH_DATA = "42" *) 
  (* P_MIN_WIDTH_DATA_A = "42" *) 
  (* P_MIN_WIDTH_DATA_B = "42" *) 
  (* P_MIN_WIDTH_DATA_ECC = "42" *) 
  (* P_MIN_WIDTH_DATA_LDW = "4" *) 
  (* P_MIN_WIDTH_DATA_SHFT = "42" *) 
  (* P_NUM_COLS_WRITE_A = "1" *) 
  (* P_NUM_COLS_WRITE_B = "1" *) 
  (* P_NUM_ROWS_READ_A = "1" *) 
  (* P_NUM_ROWS_READ_B = "1" *) 
  (* P_NUM_ROWS_WRITE_A = "1" *) 
  (* P_NUM_ROWS_WRITE_B = "1" *) 
  (* P_SDP_WRITE_MODE = "yes" *) 
  (* P_WIDTH_ADDR_LSB_READ_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) 
  (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) 
  (* P_WIDTH_ADDR_READ_A = "5" *) 
  (* P_WIDTH_ADDR_READ_B = "5" *) 
  (* P_WIDTH_ADDR_WRITE_A = "5" *) 
  (* P_WIDTH_ADDR_WRITE_B = "5" *) 
  (* P_WIDTH_COL_WRITE_A = "42" *) 
  (* P_WIDTH_COL_WRITE_B = "42" *) 
  (* RAM_DECOMP = "auto" *) 
  (* READ_DATA_WIDTH_A = "42" *) 
  (* READ_DATA_WIDTH_B = "42" *) 
  (* READ_LATENCY_A = "2" *) 
  (* READ_LATENCY_B = "1" *) 
  (* READ_RESET_VALUE_A = "0" *) 
  (* READ_RESET_VALUE_B = "0" *) 
  (* RST_MODE_A = "SYNC" *) 
  (* RST_MODE_B = "SYNC" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_EMBEDDED_CONSTRAINT = "1" *) 
  (* USE_MEM_INIT = "0" *) 
  (* USE_MEM_INIT_MMI = "0" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WRITE_DATA_WIDTH_A = "42" *) 
  (* WRITE_DATA_WIDTH_B = "42" *) 
  (* WRITE_MODE_A = "2" *) 
  (* WRITE_MODE_B = "1" *) 
  (* WRITE_PROTECT = "1" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* rsta_loop_iter = "44" *) 
  (* rstb_loop_iter = "44" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__parameterized2 \gen_sdpram.xpm_memory_base_inst 
       (.addra(wr_pntr_ext[4:0]),
        .addrb(rd_pntr_ext[4:0]),
        .clka(wr_clk),
        .clkb(rd_clk),
        .dbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterra_UNCONNECTED ),
        .dbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_dbiterrb_UNCONNECTED ),
        .dina(din),
        .dinb({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .douta(\NLW_gen_sdpram.xpm_memory_base_inst_douta_UNCONNECTED [41:0]),
        .doutb(dout),
        .ena(wr_pntr_plus1_pf_carry),
        .enb(ram_rd_en_i),
        .injectdbiterra(1'b0),
        .injectdbiterrb(1'b0),
        .injectsbiterra(1'b0),
        .injectsbiterrb(1'b0),
        .regcea(1'b0),
        .regceb(1'b0),
        .rsta(1'b0),
        .rstb(rd_rst_busy),
        .sbiterra(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterra_UNCONNECTED ),
        .sbiterrb(\NLW_gen_sdpram.xpm_memory_base_inst_sbiterrb_UNCONNECTED ),
        .sleep(1'b0),
        .wea(1'b0),
        .web(1'b0));
  FDRE #(
    .INIT(1'b0)) 
    \gof.overflow_i_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(overflow_i0),
        .Q(overflow),
        .R(1'b0));
  FDRE \grdc.rd_data_count_i_reg[5] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\grdc.diff_wr_rd_pntr_rdc0_out ),
        .Q(rd_data_count),
        .R(rd_rst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \guf.underflow_i_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(underflow_i0),
        .Q(underflow),
        .R(1'b0));
  FDRE \gwdc.wr_data_count_i_reg[5] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gwdc.diff_wr_rd_pntr1_out ),
        .Q(wr_data_count),
        .R(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized7 rdp_inst
       (.D(diff_pntr_pe[1]),
        .E(ram_rd_en_i),
        .Q(rd_pntr_ext),
        .\count_value_i_reg[2]_0 (rdp_inst_n_9),
        .\count_value_i_reg[4]_0 (rdp_inst_n_10),
        .\count_value_i_reg[5]_0 (empty),
        .\count_value_i_reg[5]_1 (rd_rst_busy),
        .\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ({\gen_cdc_pntr.wpr_gray_reg_n_4 ,\gen_cdc_pntr.wpr_gray_reg_n_6 ,\gen_cdc_pntr.wpr_gray_reg_n_7 ,\gen_cdc_pntr.wpr_gray_reg_n_8 }),
        .\gen_pf_ic_rc.ram_empty_i_reg (rdp_inst_n_8),
        .rd_clk(rd_clk),
        .rd_en(rd_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized8 rdpp1_inst
       (.E(ram_rd_en_i),
        .Q({\gen_cdc_pntr.wpr_gray_reg_n_4 ,\gen_cdc_pntr.wpr_gray_reg_n_5 ,\gen_cdc_pntr.wpr_gray_reg_n_6 ,\gen_cdc_pntr.wpr_gray_reg_n_7 ,\gen_cdc_pntr.wpr_gray_reg_n_8 }),
        .\count_value_i_reg[0]_0 (rd_rst_busy),
        .\count_value_i_reg[4]_0 (rdp_inst_n_8),
        .empty_i0(empty_i0),
        .\gen_pf_ic_rc.ram_empty_i_reg (\gen_cdc_pntr.wpr_gray_reg_n_9 ),
        .\gen_pf_ic_rc.ram_empty_i_reg_0 (rdp_inst_n_9),
        .\gen_pf_ic_rc.ram_empty_i_reg_1 (empty),
        .rd_clk(rd_clk),
        .rd_en(rd_en));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit rst_d1_inst
       (.Q(diff_pntr_pf_q),
        .d_out_int_reg_0(rst_d1_inst_n_1),
        .\gen_pf_ic_rc.gpf_ic.prog_full_i_reg (full),
        .prog_full(prog_full),
        .rst(rst),
        .rst_d1(rst_d1),
        .wr_clk(wr_clk),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized7_127 wrp_inst
       (.E(wr_pntr_plus1_pf_carry),
        .O(\gwdc.diff_wr_rd_pntr1_out ),
        .Q(wr_pntr_ext),
        .\count_value_i_reg[5]_0 (full),
        .\gwdc.wr_data_count_i_reg[5] ({\gen_cdc_pntr.rpw_gray_reg_dc_n_0 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_1 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_2 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_3 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_4 ,\gen_cdc_pntr.rpw_gray_reg_dc_n_5 }),
        .rst_d1(rst_d1),
        .wr_clk(wr_clk),
        .wr_en(wr_en),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized8_128 wrpp1_inst
       (.D(diff_pntr_pf_q0),
        .E(wr_pntr_plus1_pf_carry),
        .Q(wr_pntr_plus1_pf),
        .\count_value_i_reg[2]_0 (wrpp1_inst_n_0),
        .\gen_pf_ic_rc.gpf_ic.diff_pntr_pf_q_reg[5] (rd_pntr_wr),
        .wr_clk(wr_clk),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_counter_updn__parameterized9 wrpp2_inst
       (.E(wr_pntr_plus1_pf_carry),
        .Q(rd_pntr_wr[2:0]),
        .\count_value_i_reg[2]_0 (wrpp2_inst_n_0),
        .\count_value_i_reg[4]_0 ({wrpp2_inst_n_1,wrpp2_inst_n_2}),
        .wr_clk(wr_clk),
        .wrst_busy(wrst_busy));
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst__parameterized0 xpm_fifo_rst_inst
       (.E(wr_pntr_plus1_pf_carry),
        .\gen_rst_ic.fifo_rd_rst_ic_reg_0 (rd_rst_busy),
        .\gof.overflow_i_reg (full),
        .\guf.underflow_i_reg (empty),
        .overflow_i0(overflow_i0),
        .rd_clk(rd_clk),
        .rd_en(rd_en),
        .rst(rst),
        .rst_d1(rst_d1),
        .underflow_i0(underflow_i0),
        .wr_clk(wr_clk),
        .wr_en(wr_en),
        .wr_rst_busy(wr_rst_busy),
        .wrst_busy(wrst_busy));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit
   (rst_d1,
    d_out_int_reg_0,
    wrst_busy,
    wr_clk,
    rst,
    prog_full,
    \gen_pf_ic_rc.gpf_ic.prog_full_i_reg ,
    Q);
  output rst_d1;
  output d_out_int_reg_0;
  input wrst_busy;
  input wr_clk;
  input rst;
  input prog_full;
  input \gen_pf_ic_rc.gpf_ic.prog_full_i_reg ;
  input [3:0]Q;

  wire [3:0]Q;
  wire d_out_int_reg_0;
  wire \gen_pf_ic_rc.gpf_ic.prog_full_i_i_2_n_0 ;
  wire \gen_pf_ic_rc.gpf_ic.prog_full_i_reg ;
  wire prog_full;
  wire rst;
  wire rst_d1;
  wire wr_clk;
  wire wrst_busy;

  FDRE #(
    .INIT(1'b0)) 
    d_out_int_reg
       (.C(wr_clk),
        .CE(1'b1),
        .D(wrst_busy),
        .Q(rst_d1),
        .R(1'b0));
  LUT4 #(
    .INIT(16'h00C4)) 
    \gen_pf_ic_rc.gpf_ic.prog_full_i_i_1 
       (.I0(rst_d1),
        .I1(\gen_pf_ic_rc.gpf_ic.prog_full_i_i_2_n_0 ),
        .I2(rst),
        .I3(wrst_busy),
        .O(d_out_int_reg_0));
  LUT6 #(
    .INIT(64'hBBBBBBB8B8B8B8B8)) 
    \gen_pf_ic_rc.gpf_ic.prog_full_i_i_2 
       (.I0(prog_full),
        .I1(\gen_pf_ic_rc.gpf_ic.prog_full_i_reg ),
        .I2(Q[3]),
        .I3(Q[1]),
        .I4(Q[0]),
        .I5(Q[2]),
        .O(\gen_pf_ic_rc.gpf_ic.prog_full_i_i_2_n_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_bit" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_129
   (rst_d1,
    d_out_int_reg_0,
    Q,
    rd_clk,
    rst);
  output rst_d1;
  output d_out_int_reg_0;
  input [0:0]Q;
  input rd_clk;
  input rst;

  wire [0:0]Q;
  wire d_out_int_reg_0;
  wire rd_clk;
  wire rst;
  wire rst_d1;

  FDRE #(
    .INIT(1'b0)) 
    d_out_int_reg
       (.C(rd_clk),
        .CE(1'b1),
        .D(Q),
        .Q(rst_d1),
        .R(1'b0));
  LUT3 #(
    .INIT(8'hF4)) 
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_4 
       (.I0(rst),
        .I1(rst_d1),
        .I2(Q),
        .O(d_out_int_reg_0));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_bit" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_132
   (rst_d1,
    Q,
    rd_clk);
  output rst_d1;
  input [0:0]Q;
  input rd_clk;

  wire [0:0]Q;
  wire rd_clk;
  wire rst_d1;

  FDRE #(
    .INIT(1'b0)) 
    d_out_int_reg
       (.C(rd_clk),
        .CE(1'b1),
        .D(Q),
        .Q(rst_d1),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_bit" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_138
   (rst_d1,
    Q,
    rd_clk);
  output rst_d1;
  input [0:0]Q;
  input rd_clk;

  wire [0:0]Q;
  wire rd_clk;
  wire rst_d1;

  FDRE #(
    .INIT(1'b0)) 
    d_out_int_reg
       (.C(rd_clk),
        .CE(1'b1),
        .D(Q),
        .Q(rst_d1),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_bit" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_144
   (rst_d1,
    Q,
    rd_clk);
  output rst_d1;
  input [0:0]Q;
  input rd_clk;

  wire [0:0]Q;
  wire rd_clk;
  wire rst_d1;

  FDRE #(
    .INIT(1'b0)) 
    d_out_int_reg
       (.C(rd_clk),
        .CE(1'b1),
        .D(Q),
        .Q(rst_d1),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_bit" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_150
   (rst_d1,
    Q,
    wr_clk);
  output rst_d1;
  input [0:0]Q;
  input wr_clk;

  wire [0:0]Q;
  wire rst_d1;
  wire wr_clk;

  FDRE #(
    .INIT(1'b0)) 
    d_out_int_reg
       (.C(wr_clk),
        .CE(1'b1),
        .D(Q),
        .Q(rst_d1),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_bit" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_bit_160
   (rst_d1,
    d_out_int_reg_0,
    wrst_busy,
    wr_clk,
    Q,
    prog_full,
    \gen_pf_ic_rc.gpf_ic.prog_full_i_reg ,
    rst);
  output rst_d1;
  output d_out_int_reg_0;
  input wrst_busy;
  input wr_clk;
  input [4:0]Q;
  input prog_full;
  input \gen_pf_ic_rc.gpf_ic.prog_full_i_reg ;
  input rst;

  wire [4:0]Q;
  wire d_out_int_reg_0;
  wire \gen_pf_ic_rc.gpf_ic.prog_full_i_reg ;
  wire p_1_in;
  wire prog_full;
  wire rst;
  wire rst_d1;
  wire wr_clk;
  wire wrst_busy;

  FDRE #(
    .INIT(1'b0)) 
    d_out_int_reg
       (.C(wr_clk),
        .CE(1'b1),
        .D(wrst_busy),
        .Q(rst_d1),
        .R(1'b0));
  LUT6 #(
    .INIT(64'h00000000CFC04540)) 
    \gen_pf_ic_rc.gpf_ic.prog_full_i_i_1 
       (.I0(rst_d1),
        .I1(prog_full),
        .I2(\gen_pf_ic_rc.gpf_ic.prog_full_i_reg ),
        .I3(p_1_in),
        .I4(rst),
        .I5(wrst_busy),
        .O(d_out_int_reg_0));
  LUT5 #(
    .INIT(32'h88800000)) 
    \gen_pf_ic_rc.gpf_ic.prog_full_i_i_2 
       (.I0(Q[3]),
        .I1(Q[2]),
        .I2(Q[1]),
        .I3(Q[0]),
        .I4(Q[4]),
        .O(p_1_in));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec
   (ram_full_i0,
    Q,
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg ,
    E,
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_0 ,
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 ,
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 ,
    wrst_busy,
    D,
    wr_clk);
  output ram_full_i0;
  output [4:0]Q;
  input \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg ;
  input [0:0]E;
  input \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_0 ;
  input [1:0]\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 ;
  input [1:0]\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 ;
  input wrst_busy;
  input [4:0]D;
  input wr_clk;

  wire [4:0]D;
  wire [0:0]E;
  wire [4:0]Q;
  wire \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_2_n_0 ;
  wire \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_5_n_0 ;
  wire \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg ;
  wire \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_0 ;
  wire [1:0]\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 ;
  wire [1:0]\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 ;
  wire ram_full_i0;
  wire wr_clk;
  wire wrst_busy;

  LUT5 #(
    .INIT(32'hF8888888)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_1 
       (.I0(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_2_n_0 ),
        .I1(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg ),
        .I2(E),
        .I3(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_0 ),
        .I4(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_5_n_0 ),
        .O(ram_full_i0));
  LUT4 #(
    .INIT(16'h9009)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 [0]),
        .I2(Q[4]),
        .I3(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 [1]),
        .O(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_5 
       (.I0(Q[3]),
        .I1(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 [0]),
        .I2(Q[4]),
        .I3(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 [1]),
        .O(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[0] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[0]),
        .Q(Q[0]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[1]),
        .Q(Q[1]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[2] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[2]),
        .Q(Q[2]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[3] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[3]),
        .Q(Q[3]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[4] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[4]),
        .Q(Q[4]),
        .R(wrst_busy));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_vec" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec_125
   (D,
    Q,
    \reg_out_i_reg[3]_0 ,
    \gen_pf_ic_rc.ram_empty_i_reg ,
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] ,
    rd_en,
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ,
    \reg_out_i_reg[0]_0 ,
    \reg_out_i_reg[4]_0 ,
    rd_clk);
  output [3:0]D;
  output [4:0]Q;
  output \reg_out_i_reg[3]_0 ;
  input [4:0]\gen_pf_ic_rc.ram_empty_i_reg ;
  input \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] ;
  input rd_en;
  input \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ;
  input \reg_out_i_reg[0]_0 ;
  input [4:0]\reg_out_i_reg[4]_0 ;
  input rd_clk;

  wire [3:0]D;
  wire [4:0]Q;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2_n_0 ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ;
  wire [4:0]\gen_pf_ic_rc.ram_empty_i_reg ;
  wire rd_clk;
  wire rd_en;
  wire \reg_out_i_reg[0]_0 ;
  wire \reg_out_i_reg[3]_0 ;
  wire [4:0]\reg_out_i_reg[4]_0 ;

  LUT4 #(
    .INIT(16'h6966)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[0]_i_1 
       (.I0(Q[0]),
        .I1(\gen_pf_ic_rc.ram_empty_i_reg [0]),
        .I2(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] ),
        .I3(rd_en),
        .O(D[0]));
  (* SOFT_HLUTNM = "soft_lutpair420" *) 
  LUT3 #(
    .INIT(8'h69)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[2]_i_1 
       (.I0(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2_n_0 ),
        .I1(Q[2]),
        .I2(\gen_pf_ic_rc.ram_empty_i_reg [2]),
        .O(D[1]));
  (* SOFT_HLUTNM = "soft_lutpair420" *) 
  LUT5 #(
    .INIT(32'h4DB2B24D)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[3]_i_1 
       (.I0(Q[2]),
        .I1(\gen_pf_ic_rc.ram_empty_i_reg [2]),
        .I2(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2_n_0 ),
        .I3(Q[3]),
        .I4(\gen_pf_ic_rc.ram_empty_i_reg [3]),
        .O(D[2]));
  LUT6 #(
    .INIT(64'h4D00FF4DB2FF00B2)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_1 
       (.I0(Q[2]),
        .I1(\gen_pf_ic_rc.ram_empty_i_reg [2]),
        .I2(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2_n_0 ),
        .I3(\gen_pf_ic_rc.ram_empty_i_reg [3]),
        .I4(Q[3]),
        .I5(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hA2FBFFFF0000A2FB)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2 
       (.I0(Q[0]),
        .I1(rd_en),
        .I2(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] ),
        .I3(\gen_pf_ic_rc.ram_empty_i_reg [0]),
        .I4(\gen_pf_ic_rc.ram_empty_i_reg [1]),
        .I5(Q[1]),
        .O(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \gen_pf_ic_rc.ram_empty_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pf_ic_rc.ram_empty_i_reg [3]),
        .I2(Q[4]),
        .I3(\gen_pf_ic_rc.ram_empty_i_reg [4]),
        .O(\reg_out_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[4]_0 [0]),
        .Q(Q[0]),
        .R(\reg_out_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[4]_0 [1]),
        .Q(Q[1]),
        .R(\reg_out_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[2] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[4]_0 [2]),
        .Q(Q[2]),
        .R(\reg_out_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[3] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[4]_0 [3]),
        .Q(Q[3]),
        .R(\reg_out_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[4] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[4]_0 [4]),
        .Q(Q[4]),
        .R(\reg_out_i_reg[0]_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_vec" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec_154
   (ram_full_i0,
    Q,
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg ,
    E,
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_0 ,
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 ,
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 ,
    wrst_busy,
    D,
    wr_clk);
  output ram_full_i0;
  output [4:0]Q;
  input \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg ;
  input [0:0]E;
  input \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_0 ;
  input [1:0]\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 ;
  input [1:0]\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 ;
  input wrst_busy;
  input [4:0]D;
  input wr_clk;

  wire [4:0]D;
  wire [0:0]E;
  wire [4:0]Q;
  wire \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_2_n_0 ;
  wire \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_5_n_0 ;
  wire \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg ;
  wire \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_0 ;
  wire [1:0]\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 ;
  wire [1:0]\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 ;
  wire ram_full_i0;
  wire wr_clk;
  wire wrst_busy;

  LUT5 #(
    .INIT(32'hF8888888)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_1 
       (.I0(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_2_n_0 ),
        .I1(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg ),
        .I2(E),
        .I3(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_0 ),
        .I4(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_5_n_0 ),
        .O(ram_full_i0));
  LUT4 #(
    .INIT(16'h9009)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 [0]),
        .I2(Q[4]),
        .I3(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_2 [1]),
        .O(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_5 
       (.I0(Q[3]),
        .I1(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 [0]),
        .I2(Q[4]),
        .I3(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_reg_1 [1]),
        .O(\gen_pf_ic_rc.ngen_full_rst_val.ram_full_i_i_5_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[0] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[0]),
        .Q(Q[0]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[1]),
        .Q(Q[1]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[2] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[2]),
        .Q(Q[2]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[3] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[3]),
        .Q(Q[3]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[4] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[4]),
        .Q(Q[4]),
        .R(wrst_busy));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_vec" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec_156
   (D,
    Q,
    \reg_out_i_reg[3]_0 ,
    \gen_pf_ic_rc.ram_empty_i_reg ,
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] ,
    rd_en,
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ,
    SR,
    \reg_out_i_reg[4]_0 ,
    rd_clk);
  output [3:0]D;
  output [4:0]Q;
  output \reg_out_i_reg[3]_0 ;
  input [4:0]\gen_pf_ic_rc.ram_empty_i_reg ;
  input \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] ;
  input rd_en;
  input \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ;
  input [0:0]SR;
  input [4:0]\reg_out_i_reg[4]_0 ;
  input rd_clk;

  wire [3:0]D;
  wire [4:0]Q;
  wire [0:0]SR;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2_n_0 ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] ;
  wire \gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ;
  wire [4:0]\gen_pf_ic_rc.ram_empty_i_reg ;
  wire rd_clk;
  wire rd_en;
  wire \reg_out_i_reg[3]_0 ;
  wire [4:0]\reg_out_i_reg[4]_0 ;

  LUT4 #(
    .INIT(16'h6966)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[0]_i_1 
       (.I0(Q[0]),
        .I1(\gen_pf_ic_rc.ram_empty_i_reg [0]),
        .I2(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] ),
        .I3(rd_en),
        .O(D[0]));
  (* SOFT_HLUTNM = "soft_lutpair237" *) 
  LUT3 #(
    .INIT(8'h69)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[2]_i_1 
       (.I0(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2_n_0 ),
        .I1(Q[2]),
        .I2(\gen_pf_ic_rc.ram_empty_i_reg [2]),
        .O(D[1]));
  (* SOFT_HLUTNM = "soft_lutpair237" *) 
  LUT5 #(
    .INIT(32'h4DB2B24D)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[3]_i_1 
       (.I0(Q[2]),
        .I1(\gen_pf_ic_rc.ram_empty_i_reg [2]),
        .I2(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2_n_0 ),
        .I3(Q[3]),
        .I4(\gen_pf_ic_rc.ram_empty_i_reg [3]),
        .O(D[2]));
  LUT6 #(
    .INIT(64'h4D00FF4DB2FF00B2)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_1 
       (.I0(Q[2]),
        .I1(\gen_pf_ic_rc.ram_empty_i_reg [2]),
        .I2(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2_n_0 ),
        .I3(\gen_pf_ic_rc.ram_empty_i_reg [3]),
        .I4(Q[3]),
        .I5(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[4] ),
        .O(D[3]));
  LUT6 #(
    .INIT(64'hA2FBFFFF0000A2FB)) 
    \gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2 
       (.I0(Q[0]),
        .I1(rd_en),
        .I2(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe_reg[0] ),
        .I3(\gen_pf_ic_rc.ram_empty_i_reg [0]),
        .I4(\gen_pf_ic_rc.ram_empty_i_reg [1]),
        .I5(Q[1]),
        .O(\gen_pf_ic_rc.gpe_ic.diff_pntr_pe[4]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'h9009)) 
    \gen_pf_ic_rc.ram_empty_i_i_2 
       (.I0(Q[3]),
        .I1(\gen_pf_ic_rc.ram_empty_i_reg [3]),
        .I2(Q[4]),
        .I3(\gen_pf_ic_rc.ram_empty_i_reg [4]),
        .O(\reg_out_i_reg[3]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[4]_0 [0]),
        .Q(Q[0]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[4]_0 [1]),
        .Q(Q[1]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[2] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[4]_0 [2]),
        .Q(Q[2]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[3] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[4]_0 [3]),
        .Q(Q[3]),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[4] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[4]_0 [4]),
        .Q(Q[4]),
        .R(SR));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_vec" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec__parameterized0
   (Q,
    wrst_busy,
    D,
    wr_clk);
  output [5:0]Q;
  input wrst_busy;
  input [5:0]D;
  input wr_clk;

  wire [5:0]D;
  wire [5:0]Q;
  wire wr_clk;
  wire wrst_busy;

  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[0] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[0]),
        .Q(Q[0]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[1]),
        .Q(Q[1]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[2] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[2]),
        .Q(Q[2]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[3] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[3]),
        .Q(Q[3]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[4] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[4]),
        .Q(Q[4]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[5] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[5]),
        .Q(Q[5]),
        .R(wrst_busy));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_vec" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec__parameterized0_126
   (O,
    Q,
    \reg_out_i_reg[0]_0 ,
    D,
    rd_clk);
  output [0:0]O;
  input [5:0]Q;
  input \reg_out_i_reg[0]_0 ;
  input [5:0]D;
  input rd_clk;

  wire [5:0]D;
  wire [0:0]O;
  wire [5:0]Q;
  wire \grdc.rd_data_count_i[5]_i_2_n_0 ;
  wire \grdc.rd_data_count_i[5]_i_3_n_0 ;
  wire \grdc.rd_data_count_i[5]_i_4_n_0 ;
  wire \grdc.rd_data_count_i[5]_i_5_n_0 ;
  wire \grdc.rd_data_count_i[5]_i_6_n_0 ;
  wire \grdc.rd_data_count_i[5]_i_7_n_0 ;
  wire \grdc.rd_data_count_i_reg[5]_i_1_n_3 ;
  wire \grdc.rd_data_count_i_reg[5]_i_1_n_4 ;
  wire \grdc.rd_data_count_i_reg[5]_i_1_n_5 ;
  wire \grdc.rd_data_count_i_reg[5]_i_1_n_6 ;
  wire \grdc.rd_data_count_i_reg[5]_i_1_n_7 ;
  wire rd_clk;
  wire \reg_out_i_reg[0]_0 ;
  wire \reg_out_i_reg_n_0_[0] ;
  wire \reg_out_i_reg_n_0_[1] ;
  wire \reg_out_i_reg_n_0_[2] ;
  wire \reg_out_i_reg_n_0_[3] ;
  wire \reg_out_i_reg_n_0_[4] ;
  wire \reg_out_i_reg_n_0_[5] ;
  wire [7:5]\NLW_grdc.rd_data_count_i_reg[5]_i_1_CO_UNCONNECTED ;
  wire [7:0]\NLW_grdc.rd_data_count_i_reg[5]_i_1_O_UNCONNECTED ;

  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_2 
       (.I0(\reg_out_i_reg_n_0_[5] ),
        .I1(Q[5]),
        .O(\grdc.rd_data_count_i[5]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_3 
       (.I0(\reg_out_i_reg_n_0_[4] ),
        .I1(Q[4]),
        .O(\grdc.rd_data_count_i[5]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_4 
       (.I0(\reg_out_i_reg_n_0_[3] ),
        .I1(Q[3]),
        .O(\grdc.rd_data_count_i[5]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_5 
       (.I0(\reg_out_i_reg_n_0_[2] ),
        .I1(Q[2]),
        .O(\grdc.rd_data_count_i[5]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_6 
       (.I0(\reg_out_i_reg_n_0_[1] ),
        .I1(Q[1]),
        .O(\grdc.rd_data_count_i[5]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_7 
       (.I0(\reg_out_i_reg_n_0_[0] ),
        .I1(Q[0]),
        .O(\grdc.rd_data_count_i[5]_i_7_n_0 ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \grdc.rd_data_count_i_reg[5]_i_1 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\NLW_grdc.rd_data_count_i_reg[5]_i_1_CO_UNCONNECTED [7:5],\grdc.rd_data_count_i_reg[5]_i_1_n_3 ,\grdc.rd_data_count_i_reg[5]_i_1_n_4 ,\grdc.rd_data_count_i_reg[5]_i_1_n_5 ,\grdc.rd_data_count_i_reg[5]_i_1_n_6 ,\grdc.rd_data_count_i_reg[5]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,\reg_out_i_reg_n_0_[4] ,\reg_out_i_reg_n_0_[3] ,\reg_out_i_reg_n_0_[2] ,\reg_out_i_reg_n_0_[1] ,\reg_out_i_reg_n_0_[0] }),
        .O({\NLW_grdc.rd_data_count_i_reg[5]_i_1_O_UNCONNECTED [7:6],O,\NLW_grdc.rd_data_count_i_reg[5]_i_1_O_UNCONNECTED [4:0]}),
        .S({1'b0,1'b0,\grdc.rd_data_count_i[5]_i_2_n_0 ,\grdc.rd_data_count_i[5]_i_3_n_0 ,\grdc.rd_data_count_i[5]_i_4_n_0 ,\grdc.rd_data_count_i[5]_i_5_n_0 ,\grdc.rd_data_count_i[5]_i_6_n_0 ,\grdc.rd_data_count_i[5]_i_7_n_0 }));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(D[0]),
        .Q(\reg_out_i_reg_n_0_[0] ),
        .R(\reg_out_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(D[1]),
        .Q(\reg_out_i_reg_n_0_[1] ),
        .R(\reg_out_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[2] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(D[2]),
        .Q(\reg_out_i_reg_n_0_[2] ),
        .R(\reg_out_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[3] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(D[3]),
        .Q(\reg_out_i_reg_n_0_[3] ),
        .R(\reg_out_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[4] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(D[4]),
        .Q(\reg_out_i_reg_n_0_[4] ),
        .R(\reg_out_i_reg[0]_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[5] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(D[5]),
        .Q(\reg_out_i_reg_n_0_[5] ),
        .R(\reg_out_i_reg[0]_0 ));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_vec" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec__parameterized0_155
   (Q,
    wrst_busy,
    D,
    wr_clk);
  output [5:0]Q;
  input wrst_busy;
  input [5:0]D;
  input wr_clk;

  wire [5:0]D;
  wire [5:0]Q;
  wire wr_clk;
  wire wrst_busy;

  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[0] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[0]),
        .Q(Q[0]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[1]),
        .Q(Q[1]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[2] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[2]),
        .Q(Q[2]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[3] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[3]),
        .Q(Q[3]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[4] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[4]),
        .Q(Q[4]),
        .R(wrst_busy));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[5] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(D[5]),
        .Q(Q[5]),
        .R(wrst_busy));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_reg_vec" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_reg_vec__parameterized0_157
   (D,
    Q,
    SR,
    \reg_out_i_reg[5]_0 ,
    rd_clk);
  output [4:0]D;
  input [5:0]Q;
  input [0:0]SR;
  input [5:0]\reg_out_i_reg[5]_0 ;
  input rd_clk;

  wire [4:0]D;
  wire [5:0]Q;
  wire [0:0]SR;
  wire \grdc.rd_data_count_i[5]_i_2_n_0 ;
  wire \grdc.rd_data_count_i[5]_i_3_n_0 ;
  wire \grdc.rd_data_count_i[5]_i_4_n_0 ;
  wire \grdc.rd_data_count_i[5]_i_5_n_0 ;
  wire \grdc.rd_data_count_i[5]_i_6_n_0 ;
  wire \grdc.rd_data_count_i[5]_i_7_n_0 ;
  wire \grdc.rd_data_count_i_reg[5]_i_1_n_3 ;
  wire \grdc.rd_data_count_i_reg[5]_i_1_n_4 ;
  wire \grdc.rd_data_count_i_reg[5]_i_1_n_5 ;
  wire \grdc.rd_data_count_i_reg[5]_i_1_n_6 ;
  wire \grdc.rd_data_count_i_reg[5]_i_1_n_7 ;
  wire rd_clk;
  wire [5:0]\reg_out_i_reg[5]_0 ;
  wire \reg_out_i_reg_n_0_[0] ;
  wire \reg_out_i_reg_n_0_[1] ;
  wire \reg_out_i_reg_n_0_[2] ;
  wire \reg_out_i_reg_n_0_[3] ;
  wire \reg_out_i_reg_n_0_[4] ;
  wire \reg_out_i_reg_n_0_[5] ;
  wire [7:5]\NLW_grdc.rd_data_count_i_reg[5]_i_1_CO_UNCONNECTED ;
  wire [7:0]\NLW_grdc.rd_data_count_i_reg[5]_i_1_O_UNCONNECTED ;

  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_2 
       (.I0(\reg_out_i_reg_n_0_[5] ),
        .I1(Q[5]),
        .O(\grdc.rd_data_count_i[5]_i_2_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_3 
       (.I0(\reg_out_i_reg_n_0_[4] ),
        .I1(Q[4]),
        .O(\grdc.rd_data_count_i[5]_i_3_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_4 
       (.I0(\reg_out_i_reg_n_0_[3] ),
        .I1(Q[3]),
        .O(\grdc.rd_data_count_i[5]_i_4_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_5 
       (.I0(\reg_out_i_reg_n_0_[2] ),
        .I1(Q[2]),
        .O(\grdc.rd_data_count_i[5]_i_5_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_6 
       (.I0(\reg_out_i_reg_n_0_[1] ),
        .I1(Q[1]),
        .O(\grdc.rd_data_count_i[5]_i_6_n_0 ));
  LUT2 #(
    .INIT(4'h9)) 
    \grdc.rd_data_count_i[5]_i_7 
       (.I0(\reg_out_i_reg_n_0_[0] ),
        .I1(Q[0]),
        .O(\grdc.rd_data_count_i[5]_i_7_n_0 ));
  (* ADDER_THRESHOLD = "35" *) 
  CARRY8 \grdc.rd_data_count_i_reg[5]_i_1 
       (.CI(1'b1),
        .CI_TOP(1'b0),
        .CO({\NLW_grdc.rd_data_count_i_reg[5]_i_1_CO_UNCONNECTED [7:5],\grdc.rd_data_count_i_reg[5]_i_1_n_3 ,\grdc.rd_data_count_i_reg[5]_i_1_n_4 ,\grdc.rd_data_count_i_reg[5]_i_1_n_5 ,\grdc.rd_data_count_i_reg[5]_i_1_n_6 ,\grdc.rd_data_count_i_reg[5]_i_1_n_7 }),
        .DI({1'b0,1'b0,1'b0,\reg_out_i_reg_n_0_[4] ,\reg_out_i_reg_n_0_[3] ,\reg_out_i_reg_n_0_[2] ,\reg_out_i_reg_n_0_[1] ,\reg_out_i_reg_n_0_[0] }),
        .O({\NLW_grdc.rd_data_count_i_reg[5]_i_1_O_UNCONNECTED [7:6],D,\NLW_grdc.rd_data_count_i_reg[5]_i_1_O_UNCONNECTED [0]}),
        .S({1'b0,1'b0,\grdc.rd_data_count_i[5]_i_2_n_0 ,\grdc.rd_data_count_i[5]_i_3_n_0 ,\grdc.rd_data_count_i[5]_i_4_n_0 ,\grdc.rd_data_count_i[5]_i_5_n_0 ,\grdc.rd_data_count_i[5]_i_6_n_0 ,\grdc.rd_data_count_i[5]_i_7_n_0 }));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[5]_0 [0]),
        .Q(\reg_out_i_reg_n_0_[0] ),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[5]_0 [1]),
        .Q(\reg_out_i_reg_n_0_[1] ),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[2] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[5]_0 [2]),
        .Q(\reg_out_i_reg_n_0_[2] ),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[3] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[5]_0 [3]),
        .Q(\reg_out_i_reg_n_0_[3] ),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[4] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[5]_0 [4]),
        .Q(\reg_out_i_reg_n_0_[4] ),
        .R(SR));
  FDRE #(
    .INIT(1'b0)) 
    \reg_out_i_reg[5] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\reg_out_i_reg[5]_0 [5]),
        .Q(\reg_out_i_reg_n_0_[5] ),
        .R(SR));
endmodule

module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst
   (\gen_pntr_flags_cc.ram_empty_i_reg ,
    ram_wr_en_pf,
    \gen_rst_cc.fifo_wr_rst_cc_reg[2]_0 ,
    rst,
    ram_empty_i,
    rd_en,
    Q,
    wr_en,
    \count_value_i_reg[10] ,
    rst_d1,
    rd_clk);
  output \gen_pntr_flags_cc.ram_empty_i_reg ;
  output ram_wr_en_pf;
  output [0:0]\gen_rst_cc.fifo_wr_rst_cc_reg[2]_0 ;
  input rst;
  input ram_empty_i;
  input rd_en;
  input [1:0]Q;
  input wr_en;
  input \count_value_i_reg[10] ;
  input rst_d1;
  input rd_clk;

  wire [1:0]Q;
  wire \count_value_i_reg[10] ;
  wire \gen_pntr_flags_cc.ram_empty_i_reg ;
  wire [1:0]\gen_rst_cc.fifo_wr_rst_cc ;
  wire [0:0]\gen_rst_cc.fifo_wr_rst_cc_reg[2]_0 ;
  wire p_0_in;
  wire \power_on_rst_reg_n_0_[0] ;
  wire ram_empty_i;
  wire ram_wr_en_pf;
  wire rd_clk;
  wire rd_en;
  wire rst;
  wire rst_d1;
  wire rst_i;
  wire wr_en;

  LUT5 #(
    .INIT(32'h00005455)) 
    \gen_pntr_flags_cc.gaf_cc.ram_afull_i_i_2 
       (.I0(ram_empty_i),
        .I1(rd_en),
        .I2(Q[0]),
        .I3(Q[1]),
        .I4(ram_wr_en_pf),
        .O(\gen_pntr_flags_cc.ram_empty_i_reg ));
  LUT2 #(
    .INIT(4'hE)) 
    \gen_rst_cc.fifo_wr_rst_cc[2]_i_1 
       (.I0(p_0_in),
        .I1(rst),
        .O(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\gen_rst_cc.fifo_wr_rst_cc [0]),
        .S(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_cc.fifo_wr_rst_cc [0]),
        .Q(\gen_rst_cc.fifo_wr_rst_cc [1]),
        .S(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[2] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_cc.fifo_wr_rst_cc [1]),
        .Q(\gen_rst_cc.fifo_wr_rst_cc_reg[2]_0 ),
        .S(rst_i));
  LUT4 #(
    .INIT(16'h0002)) 
    \gen_sdpram.xpm_memory_base_inst_i_1 
       (.I0(wr_en),
        .I1(\count_value_i_reg[10] ),
        .I2(\gen_rst_cc.fifo_wr_rst_cc_reg[2]_0 ),
        .I3(rst_d1),
        .O(ram_wr_en_pf));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\power_on_rst_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\power_on_rst_reg_n_0_[0] ),
        .Q(p_0_in),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_rst" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst_135
   (E,
    Q,
    wr_en,
    \count_value_i_reg[3] ,
    rst_d1,
    rst,
    rd_clk);
  output [0:0]E;
  output [0:0]Q;
  input wr_en;
  input \count_value_i_reg[3] ;
  input rst_d1;
  input rst;
  input rd_clk;

  wire [0:0]E;
  wire [0:0]Q;
  wire \count_value_i_reg[3] ;
  wire [1:0]\gen_rst_cc.fifo_wr_rst_cc ;
  wire p_0_in;
  wire \power_on_rst_reg_n_0_[0] ;
  wire rd_clk;
  wire rst;
  wire rst_d1;
  wire rst_i;
  wire wr_en;

  LUT2 #(
    .INIT(4'hE)) 
    \gen_rst_cc.fifo_wr_rst_cc[2]_i_1 
       (.I0(p_0_in),
        .I1(rst),
        .O(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\gen_rst_cc.fifo_wr_rst_cc [0]),
        .S(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_cc.fifo_wr_rst_cc [0]),
        .Q(\gen_rst_cc.fifo_wr_rst_cc [1]),
        .S(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[2] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_cc.fifo_wr_rst_cc [1]),
        .Q(Q),
        .S(rst_i));
  LUT4 #(
    .INIT(16'h0002)) 
    \gen_sdpram.xpm_memory_base_inst_i_1 
       (.I0(wr_en),
        .I1(\count_value_i_reg[3] ),
        .I2(Q),
        .I3(rst_d1),
        .O(E));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\power_on_rst_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\power_on_rst_reg_n_0_[0] ),
        .Q(p_0_in),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_rst" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst_141
   (E,
    Q,
    wr_en,
    \count_value_i_reg[3] ,
    rst_d1,
    rst,
    rd_clk);
  output [0:0]E;
  output [0:0]Q;
  input wr_en;
  input \count_value_i_reg[3] ;
  input rst_d1;
  input rst;
  input rd_clk;

  wire [0:0]E;
  wire [0:0]Q;
  wire \count_value_i_reg[3] ;
  wire [1:0]\gen_rst_cc.fifo_wr_rst_cc ;
  wire p_0_in;
  wire \power_on_rst_reg_n_0_[0] ;
  wire rd_clk;
  wire rst;
  wire rst_d1;
  wire rst_i;
  wire wr_en;

  LUT2 #(
    .INIT(4'hE)) 
    \gen_rst_cc.fifo_wr_rst_cc[2]_i_1 
       (.I0(p_0_in),
        .I1(rst),
        .O(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\gen_rst_cc.fifo_wr_rst_cc [0]),
        .S(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_cc.fifo_wr_rst_cc [0]),
        .Q(\gen_rst_cc.fifo_wr_rst_cc [1]),
        .S(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[2] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_cc.fifo_wr_rst_cc [1]),
        .Q(Q),
        .S(rst_i));
  LUT4 #(
    .INIT(16'h0002)) 
    \gen_sdpram.xpm_memory_base_inst_i_1 
       (.I0(wr_en),
        .I1(\count_value_i_reg[3] ),
        .I2(Q),
        .I3(rst_d1),
        .O(E));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\power_on_rst_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\power_on_rst_reg_n_0_[0] ),
        .Q(p_0_in),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_rst" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst_147
   (E,
    Q,
    wr_en,
    \count_value_i_reg[3] ,
    rst_d1,
    rst,
    rd_clk);
  output [0:0]E;
  output [0:0]Q;
  input wr_en;
  input \count_value_i_reg[3] ;
  input rst_d1;
  input rst;
  input rd_clk;

  wire [0:0]E;
  wire [0:0]Q;
  wire \count_value_i_reg[3] ;
  wire [1:0]\gen_rst_cc.fifo_wr_rst_cc ;
  wire p_0_in;
  wire \power_on_rst_reg_n_0_[0] ;
  wire rd_clk;
  wire rst;
  wire rst_d1;
  wire rst_i;
  wire wr_en;

  LUT2 #(
    .INIT(4'hE)) 
    \gen_rst_cc.fifo_wr_rst_cc[2]_i_1 
       (.I0(p_0_in),
        .I1(rst),
        .O(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\gen_rst_cc.fifo_wr_rst_cc [0]),
        .S(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_cc.fifo_wr_rst_cc [0]),
        .Q(\gen_rst_cc.fifo_wr_rst_cc [1]),
        .S(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[2] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_cc.fifo_wr_rst_cc [1]),
        .Q(Q),
        .S(rst_i));
  LUT4 #(
    .INIT(16'h0002)) 
    \gen_sdpram.xpm_memory_base_inst_i_1 
       (.I0(wr_en),
        .I1(\count_value_i_reg[3] ),
        .I2(Q),
        .I3(rst_d1),
        .O(E));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\power_on_rst_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\power_on_rst_reg_n_0_[0] ),
        .Q(p_0_in),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_rst" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst_153
   (E,
    Q,
    wr_en,
    \count_value_i_reg[3] ,
    rst_d1,
    rst,
    wr_clk);
  output [0:0]E;
  output [0:0]Q;
  input wr_en;
  input \count_value_i_reg[3] ;
  input rst_d1;
  input rst;
  input wr_clk;

  wire [0:0]E;
  wire [0:0]Q;
  wire \count_value_i_reg[3] ;
  wire [1:0]\gen_rst_cc.fifo_wr_rst_cc ;
  wire p_0_in;
  wire \power_on_rst_reg_n_0_[0] ;
  wire rst;
  wire rst_d1;
  wire rst_i;
  wire wr_clk;
  wire wr_en;

  LUT2 #(
    .INIT(4'hE)) 
    \gen_rst_cc.fifo_wr_rst_cc[2]_i_1 
       (.I0(p_0_in),
        .I1(rst),
        .O(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[0] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\gen_rst_cc.fifo_wr_rst_cc [0]),
        .S(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gen_rst_cc.fifo_wr_rst_cc [0]),
        .Q(\gen_rst_cc.fifo_wr_rst_cc [1]),
        .S(rst_i));
  FDSE #(
    .INIT(1'b0)) 
    \gen_rst_cc.fifo_wr_rst_cc_reg[2] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gen_rst_cc.fifo_wr_rst_cc [1]),
        .Q(Q),
        .S(rst_i));
  LUT4 #(
    .INIT(16'h0002)) 
    \gen_sdpram.xpm_memory_base_inst_i_1 
       (.I0(wr_en),
        .I1(\count_value_i_reg[3] ),
        .I2(Q),
        .I3(rst_d1),
        .O(E));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[0] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\power_on_rst_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\power_on_rst_reg_n_0_[0] ),
        .Q(p_0_in),
        .R(1'b0));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_rst" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst__parameterized0
   (\gen_rst_ic.fifo_rd_rst_ic_reg_0 ,
    wrst_busy,
    overflow_i0,
    E,
    wr_rst_busy,
    underflow_i0,
    rd_clk,
    wr_clk,
    rst,
    \gof.overflow_i_reg ,
    rst_d1,
    wr_en,
    rd_en,
    \guf.underflow_i_reg );
  output \gen_rst_ic.fifo_rd_rst_ic_reg_0 ;
  output wrst_busy;
  output overflow_i0;
  output [0:0]E;
  output wr_rst_busy;
  output underflow_i0;
  input rd_clk;
  input wr_clk;
  input rst;
  input \gof.overflow_i_reg ;
  input rst_d1;
  input wr_en;
  input rd_en;
  input \guf.underflow_i_reg ;

  wire \/i__n_0 ;
  wire [0:0]E;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[0]_i_1_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_1_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_3_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[2]_i_1_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[3]_i_1_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1_n_0 ;
  (* RTL_KEEP = "yes" *) wire \FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ;
  (* RTL_KEEP = "yes" *) wire \FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ;
  (* RTL_KEEP = "yes" *) wire \FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ;
  (* RTL_KEEP = "yes" *) wire \FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ;
  (* RTL_KEEP = "yes" *) wire \FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ;
  (* RTL_KEEP = "yes" *) wire [1:0]\gen_rst_ic.curr_rrst_state ;
  wire \gen_rst_ic.fifo_rd_rst_i__0 ;
  wire \gen_rst_ic.fifo_rd_rst_ic_reg_0 ;
  wire \gen_rst_ic.fifo_rd_rst_wr_i ;
  wire \gen_rst_ic.fifo_wr_rst_ic ;
  wire \gen_rst_ic.fifo_wr_rst_ic_i_1_n_0 ;
  wire \gen_rst_ic.fifo_wr_rst_ic_i_2_n_0 ;
  wire \gen_rst_ic.fifo_wr_rst_rd ;
  wire [1:0]\gen_rst_ic.next_rrst_state ;
  wire \gen_rst_ic.rst_seq_reentered_i_1_n_0 ;
  wire \gen_rst_ic.rst_seq_reentered_i_2_n_0 ;
  wire \gen_rst_ic.rst_seq_reentered_reg_n_0 ;
  wire \gen_rst_ic.wr_rst_busy_ic_i_1_n_0 ;
  wire \gen_rst_ic.wr_rst_busy_ic_i_2_n_0 ;
  wire \gof.overflow_i_reg ;
  wire \guf.underflow_i_reg ;
  wire overflow_i0;
  wire p_0_in;
  wire \power_on_rst_reg_n_0_[0] ;
  wire rd_clk;
  wire rd_en;
  wire rst;
  wire rst_d1;
  wire underflow_i0;
  wire wr_clk;
  wire wr_en;
  wire wr_rst_busy;
  wire wrst_busy;

  LUT5 #(
    .INIT(32'h00010116)) 
    \/i_ 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .O(\/i__n_0 ));
  LUT6 #(
    .INIT(64'h555555555555FFD5)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[0]_i_1 
       (.I0(\/i__n_0 ),
        .I1(\gen_rst_ic.rst_seq_reentered_reg_n_0 ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I4(p_0_in),
        .I5(rst),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hF800F800FF00F800)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_1 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2_n_0 ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_3_n_0 ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .I3(\/i__n_0 ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .I5(\gen_rst_ic.fifo_rd_rst_wr_i ),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2 
       (.I0(p_0_in),
        .I1(rst),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_3 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h1000100010000000)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[2]_i_1 
       (.I0(p_0_in),
        .I1(rst),
        .I2(\/i__n_0 ),
        .I3(\gen_rst_ic.fifo_rd_rst_wr_i ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I5(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00000008)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[3]_i_1 
       (.I0(\/i__n_0 ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I2(\gen_rst_ic.fifo_rd_rst_wr_i ),
        .I3(rst),
        .I4(p_0_in),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00000008)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1 
       (.I0(\/i__n_0 ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I2(\gen_rst_ic.rst_seq_reentered_reg_n_0 ),
        .I3(rst),
        .I4(p_0_in),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1_n_0 ));
  (* FSM_ENCODED_STATES = "WRST_OUT:00100,WRST_IN:00010,WRST_GO2IDLE:10000,WRST_EXIT:01000,WRST_IDLE:00001" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b1)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state_reg[0] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\FSM_onehot_gen_rst_ic.curr_wrst_state[0]_i_1_n_0 ),
        .Q(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .R(1'b0));
  (* FSM_ENCODED_STATES = "WRST_OUT:00100,WRST_IN:00010,WRST_GO2IDLE:10000,WRST_EXIT:01000,WRST_IDLE:00001" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_1_n_0 ),
        .Q(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .R(1'b0));
  (* FSM_ENCODED_STATES = "WRST_OUT:00100,WRST_IN:00010,WRST_GO2IDLE:10000,WRST_EXIT:01000,WRST_IDLE:00001" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state_reg[2] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\FSM_onehot_gen_rst_ic.curr_wrst_state[2]_i_1_n_0 ),
        .Q(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .R(1'b0));
  (* FSM_ENCODED_STATES = "WRST_OUT:00100,WRST_IN:00010,WRST_GO2IDLE:10000,WRST_EXIT:01000,WRST_IDLE:00001" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state_reg[3] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\FSM_onehot_gen_rst_ic.curr_wrst_state[3]_i_1_n_0 ),
        .Q(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .R(1'b0));
  (* FSM_ENCODED_STATES = "WRST_OUT:00100,WRST_IN:00010,WRST_GO2IDLE:10000,WRST_EXIT:01000,WRST_IDLE:00001" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state_reg[4] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1_n_0 ),
        .Q(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h6)) 
    \FSM_sequential_gen_rst_ic.curr_rrst_state[1]_i_1 
       (.I0(\gen_rst_ic.curr_rrst_state [0]),
        .I1(\gen_rst_ic.curr_rrst_state [1]),
        .O(\gen_rst_ic.next_rrst_state [1]));
  (* FSM_ENCODED_STATES = "RRST_IDLE:00,RRST_IN:01,RRST_OUT:10,RRST_EXIT:11" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_rst_ic.curr_rrst_state_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.next_rrst_state [0]),
        .Q(\gen_rst_ic.curr_rrst_state [0]),
        .R(1'b0));
  (* FSM_ENCODED_STATES = "RRST_IDLE:00,RRST_IN:01,RRST_OUT:10,RRST_EXIT:11" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_rst_ic.curr_rrst_state_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.next_rrst_state [1]),
        .Q(\gen_rst_ic.curr_rrst_state [1]),
        .R(1'b0));
  LUT3 #(
    .INIT(8'h06)) 
    \__0/i_ 
       (.I0(\gen_rst_ic.fifo_wr_rst_rd ),
        .I1(\gen_rst_ic.curr_rrst_state [1]),
        .I2(\gen_rst_ic.curr_rrst_state [0]),
        .O(\gen_rst_ic.next_rrst_state [0]));
  LUT3 #(
    .INIT(8'h3E)) 
    \gen_rst_ic.fifo_rd_rst_i 
       (.I0(\gen_rst_ic.fifo_wr_rst_rd ),
        .I1(\gen_rst_ic.curr_rrst_state [1]),
        .I2(\gen_rst_ic.curr_rrst_state [0]),
        .O(\gen_rst_ic.fifo_rd_rst_i__0 ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rst_ic.fifo_rd_rst_ic_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.fifo_rd_rst_i__0 ),
        .Q(\gen_rst_ic.fifo_rd_rst_ic_reg_0 ),
        .R(1'b0));
  LUT6 #(
    .INIT(64'hFFF8FFFFFFF80000)) 
    \gen_rst_ic.fifo_wr_rst_ic_i_1 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2_n_0 ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .I4(\gen_rst_ic.fifo_wr_rst_ic_i_2_n_0 ),
        .I5(\gen_rst_ic.fifo_wr_rst_ic ),
        .O(\gen_rst_ic.fifo_wr_rst_ic_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00010116)) 
    \gen_rst_ic.fifo_wr_rst_ic_i_2 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .O(\gen_rst_ic.fifo_wr_rst_ic_i_2_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rst_ic.fifo_wr_rst_ic_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.fifo_wr_rst_ic_i_1_n_0 ),
        .Q(\gen_rst_ic.fifo_wr_rst_ic ),
        .R(1'b0));
  (* DEF_VAL = "1'b0" *) 
  (* DEST_SYNC_FF = "2" *) 
  (* INIT = "0" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_sync_rst__5 \gen_rst_ic.rrst_wr_inst 
       (.dest_clk(wr_clk),
        .dest_rst(\gen_rst_ic.fifo_rd_rst_wr_i ),
        .src_rst(\gen_rst_ic.fifo_rd_rst_ic_reg_0 ));
  LUT6 #(
    .INIT(64'h00000000AAAAAAAE)) 
    \gen_rst_ic.rst_seq_reentered_i_1 
       (.I0(\gen_rst_ic.rst_seq_reentered_reg_n_0 ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .I2(\gen_rst_ic.rst_seq_reentered_i_2_n_0 ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I5(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2_n_0 ),
        .O(\gen_rst_ic.rst_seq_reentered_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \gen_rst_ic.rst_seq_reentered_i_2 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .O(\gen_rst_ic.rst_seq_reentered_i_2_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rst_ic.rst_seq_reentered_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.rst_seq_reentered_i_1_n_0 ),
        .Q(\gen_rst_ic.rst_seq_reentered_reg_n_0 ),
        .R(1'b0));
  LUT5 #(
    .INIT(32'hEFFFEF00)) 
    \gen_rst_ic.wr_rst_busy_ic_i_1 
       (.I0(rst),
        .I1(p_0_in),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I3(\gen_rst_ic.wr_rst_busy_ic_i_2_n_0 ),
        .I4(wrst_busy),
        .O(\gen_rst_ic.wr_rst_busy_ic_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00000116)) 
    \gen_rst_ic.wr_rst_busy_ic_i_2 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .O(\gen_rst_ic.wr_rst_busy_ic_i_2_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rst_ic.wr_rst_busy_ic_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.wr_rst_busy_ic_i_1_n_0 ),
        .Q(wrst_busy),
        .R(1'b0));
  (* DEF_VAL = "1'b0" *) 
  (* DEST_SYNC_FF = "2" *) 
  (* INIT = "0" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_sync_rst__4 \gen_rst_ic.wrst_rd_inst 
       (.dest_clk(rd_clk),
        .dest_rst(\gen_rst_ic.fifo_wr_rst_rd ),
        .src_rst(\gen_rst_ic.fifo_wr_rst_ic ));
  LUT4 #(
    .INIT(16'h0002)) 
    \gen_sdpram.xpm_memory_base_inst_i_1 
       (.I0(wr_en),
        .I1(\gof.overflow_i_reg ),
        .I2(wrst_busy),
        .I3(rst_d1),
        .O(E));
  (* SOFT_HLUTNM = "soft_lutpair431" *) 
  LUT4 #(
    .INIT(16'hFE00)) 
    \gof.overflow_i_i_1 
       (.I0(\gof.overflow_i_reg ),
        .I1(wrst_busy),
        .I2(rst_d1),
        .I3(wr_en),
        .O(overflow_i0));
  LUT3 #(
    .INIT(8'hC8)) 
    \guf.underflow_i_i_1 
       (.I0(\gen_rst_ic.fifo_rd_rst_ic_reg_0 ),
        .I1(rd_en),
        .I2(\guf.underflow_i_reg ),
        .O(underflow_i0));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[0] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\power_on_rst_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\power_on_rst_reg_n_0_[0] ),
        .Q(p_0_in),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair431" *) 
  LUT2 #(
    .INIT(4'hE)) 
    wr_rst_busy_INST_0
       (.I0(wrst_busy),
        .I1(rst_d1),
        .O(wr_rst_busy));
endmodule

(* ORIG_REF_NAME = "xpm_fifo_rst" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_rst__parameterized0__xdcDup__1
   (SR,
    wrst_busy,
    overflow_i0,
    E,
    wr_rst_busy,
    underflow_i0,
    rd_clk,
    wr_clk,
    rst,
    \gof.overflow_i_reg ,
    rst_d1,
    wr_en,
    rd_en,
    \guf.underflow_i_reg );
  output [0:0]SR;
  output wrst_busy;
  output overflow_i0;
  output [0:0]E;
  output wr_rst_busy;
  output underflow_i0;
  input rd_clk;
  input wr_clk;
  input rst;
  input \gof.overflow_i_reg ;
  input rst_d1;
  input wr_en;
  input rd_en;
  input \guf.underflow_i_reg ;

  wire \/i__n_0 ;
  wire [0:0]E;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[0]_i_1_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_1_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_3_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[2]_i_1_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[3]_i_1_n_0 ;
  wire \FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1_n_0 ;
  (* RTL_KEEP = "yes" *) wire \FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ;
  (* RTL_KEEP = "yes" *) wire \FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ;
  (* RTL_KEEP = "yes" *) wire \FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ;
  (* RTL_KEEP = "yes" *) wire \FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ;
  (* RTL_KEEP = "yes" *) wire \FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ;
  wire [0:0]SR;
  (* RTL_KEEP = "yes" *) wire [1:0]\gen_rst_ic.curr_rrst_state ;
  wire \gen_rst_ic.fifo_rd_rst_i__0 ;
  wire \gen_rst_ic.fifo_rd_rst_wr_i ;
  wire \gen_rst_ic.fifo_wr_rst_ic ;
  wire \gen_rst_ic.fifo_wr_rst_ic_i_1_n_0 ;
  wire \gen_rst_ic.fifo_wr_rst_ic_i_2_n_0 ;
  wire \gen_rst_ic.fifo_wr_rst_rd ;
  wire [1:0]\gen_rst_ic.next_rrst_state ;
  wire \gen_rst_ic.rst_seq_reentered_i_1_n_0 ;
  wire \gen_rst_ic.rst_seq_reentered_i_2_n_0 ;
  wire \gen_rst_ic.rst_seq_reentered_reg_n_0 ;
  wire \gen_rst_ic.wr_rst_busy_ic_i_1_n_0 ;
  wire \gen_rst_ic.wr_rst_busy_ic_i_2_n_0 ;
  wire \gof.overflow_i_reg ;
  wire \guf.underflow_i_reg ;
  wire overflow_i0;
  wire p_0_in;
  wire \power_on_rst_reg_n_0_[0] ;
  wire rd_clk;
  wire rd_en;
  wire rst;
  wire rst_d1;
  wire underflow_i0;
  wire wr_clk;
  wire wr_en;
  wire wr_rst_busy;
  wire wrst_busy;

  LUT5 #(
    .INIT(32'h00010116)) 
    \/i_ 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .O(\/i__n_0 ));
  LUT6 #(
    .INIT(64'h555555555555FFD5)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[0]_i_1 
       (.I0(\/i__n_0 ),
        .I1(\gen_rst_ic.rst_seq_reentered_reg_n_0 ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I4(p_0_in),
        .I5(rst),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[0]_i_1_n_0 ));
  LUT6 #(
    .INIT(64'hF800F800FF00F800)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_1 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2_n_0 ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_3_n_0 ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .I3(\/i__n_0 ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .I5(\gen_rst_ic.fifo_rd_rst_wr_i ),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2 
       (.I0(p_0_in),
        .I1(rst),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2_n_0 ));
  LUT4 #(
    .INIT(16'hFFFE)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_3 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_3_n_0 ));
  LUT6 #(
    .INIT(64'h1000100010000000)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[2]_i_1 
       (.I0(p_0_in),
        .I1(rst),
        .I2(\/i__n_0 ),
        .I3(\gen_rst_ic.fifo_rd_rst_wr_i ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I5(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[2]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00000008)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[3]_i_1 
       (.I0(\/i__n_0 ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I2(\gen_rst_ic.fifo_rd_rst_wr_i ),
        .I3(rst),
        .I4(p_0_in),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[3]_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00000008)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1 
       (.I0(\/i__n_0 ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I2(\gen_rst_ic.rst_seq_reentered_reg_n_0 ),
        .I3(rst),
        .I4(p_0_in),
        .O(\FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1_n_0 ));
  (* FSM_ENCODED_STATES = "WRST_OUT:00100,WRST_IN:00010,WRST_GO2IDLE:10000,WRST_EXIT:01000,WRST_IDLE:00001" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b1)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state_reg[0] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\FSM_onehot_gen_rst_ic.curr_wrst_state[0]_i_1_n_0 ),
        .Q(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .R(1'b0));
  (* FSM_ENCODED_STATES = "WRST_OUT:00100,WRST_IN:00010,WRST_GO2IDLE:10000,WRST_EXIT:01000,WRST_IDLE:00001" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_1_n_0 ),
        .Q(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .R(1'b0));
  (* FSM_ENCODED_STATES = "WRST_OUT:00100,WRST_IN:00010,WRST_GO2IDLE:10000,WRST_EXIT:01000,WRST_IDLE:00001" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state_reg[2] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\FSM_onehot_gen_rst_ic.curr_wrst_state[2]_i_1_n_0 ),
        .Q(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .R(1'b0));
  (* FSM_ENCODED_STATES = "WRST_OUT:00100,WRST_IN:00010,WRST_GO2IDLE:10000,WRST_EXIT:01000,WRST_IDLE:00001" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state_reg[3] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\FSM_onehot_gen_rst_ic.curr_wrst_state[3]_i_1_n_0 ),
        .Q(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .R(1'b0));
  (* FSM_ENCODED_STATES = "WRST_OUT:00100,WRST_IN:00010,WRST_GO2IDLE:10000,WRST_EXIT:01000,WRST_IDLE:00001" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_onehot_gen_rst_ic.curr_wrst_state_reg[4] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\FSM_onehot_gen_rst_ic.curr_wrst_state[4]_i_1_n_0 ),
        .Q(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .R(1'b0));
  LUT2 #(
    .INIT(4'h6)) 
    \FSM_sequential_gen_rst_ic.curr_rrst_state[1]_i_1 
       (.I0(\gen_rst_ic.curr_rrst_state [0]),
        .I1(\gen_rst_ic.curr_rrst_state [1]),
        .O(\gen_rst_ic.next_rrst_state [1]));
  (* FSM_ENCODED_STATES = "RRST_IDLE:00,RRST_IN:01,RRST_OUT:10,RRST_EXIT:11" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_rst_ic.curr_rrst_state_reg[0] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.next_rrst_state [0]),
        .Q(\gen_rst_ic.curr_rrst_state [0]),
        .R(1'b0));
  (* FSM_ENCODED_STATES = "RRST_IDLE:00,RRST_IN:01,RRST_OUT:10,RRST_EXIT:11" *) 
  (* KEEP = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \FSM_sequential_gen_rst_ic.curr_rrst_state_reg[1] 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.next_rrst_state [1]),
        .Q(\gen_rst_ic.curr_rrst_state [1]),
        .R(1'b0));
  LUT3 #(
    .INIT(8'h06)) 
    \__0/i_ 
       (.I0(\gen_rst_ic.fifo_wr_rst_rd ),
        .I1(\gen_rst_ic.curr_rrst_state [1]),
        .I2(\gen_rst_ic.curr_rrst_state [0]),
        .O(\gen_rst_ic.next_rrst_state [0]));
  LUT3 #(
    .INIT(8'h3E)) 
    \gen_rst_ic.fifo_rd_rst_i 
       (.I0(\gen_rst_ic.fifo_wr_rst_rd ),
        .I1(\gen_rst_ic.curr_rrst_state [1]),
        .I2(\gen_rst_ic.curr_rrst_state [0]),
        .O(\gen_rst_ic.fifo_rd_rst_i__0 ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rst_ic.fifo_rd_rst_ic_reg 
       (.C(rd_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.fifo_rd_rst_i__0 ),
        .Q(SR),
        .R(1'b0));
  LUT6 #(
    .INIT(64'hFFF8FFFFFFF80000)) 
    \gen_rst_ic.fifo_wr_rst_ic_i_1 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2_n_0 ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .I4(\gen_rst_ic.fifo_wr_rst_ic_i_2_n_0 ),
        .I5(\gen_rst_ic.fifo_wr_rst_ic ),
        .O(\gen_rst_ic.fifo_wr_rst_ic_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00010116)) 
    \gen_rst_ic.fifo_wr_rst_ic_i_2 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .O(\gen_rst_ic.fifo_wr_rst_ic_i_2_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rst_ic.fifo_wr_rst_ic_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.fifo_wr_rst_ic_i_1_n_0 ),
        .Q(\gen_rst_ic.fifo_wr_rst_ic ),
        .R(1'b0));
  (* DEF_VAL = "1'b0" *) 
  (* DEST_SYNC_FF = "2" *) 
  (* INIT = "0" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_sync_rst \gen_rst_ic.rrst_wr_inst 
       (.dest_clk(wr_clk),
        .dest_rst(\gen_rst_ic.fifo_rd_rst_wr_i ),
        .src_rst(SR));
  LUT6 #(
    .INIT(64'h00000000AAAAAAAE)) 
    \gen_rst_ic.rst_seq_reentered_i_1 
       (.I0(\gen_rst_ic.rst_seq_reentered_reg_n_0 ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .I2(\gen_rst_ic.rst_seq_reentered_i_2_n_0 ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I5(\FSM_onehot_gen_rst_ic.curr_wrst_state[1]_i_2_n_0 ),
        .O(\gen_rst_ic.rst_seq_reentered_i_1_n_0 ));
  LUT2 #(
    .INIT(4'hE)) 
    \gen_rst_ic.rst_seq_reentered_i_2 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .O(\gen_rst_ic.rst_seq_reentered_i_2_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rst_ic.rst_seq_reentered_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.rst_seq_reentered_i_1_n_0 ),
        .Q(\gen_rst_ic.rst_seq_reentered_reg_n_0 ),
        .R(1'b0));
  LUT5 #(
    .INIT(32'hEFFFEF00)) 
    \gen_rst_ic.wr_rst_busy_ic_i_1 
       (.I0(rst),
        .I1(p_0_in),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I3(\gen_rst_ic.wr_rst_busy_ic_i_2_n_0 ),
        .I4(wrst_busy),
        .O(\gen_rst_ic.wr_rst_busy_ic_i_1_n_0 ));
  LUT5 #(
    .INIT(32'h00000116)) 
    \gen_rst_ic.wr_rst_busy_ic_i_2 
       (.I0(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[1] ),
        .I1(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[2] ),
        .I2(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[0] ),
        .I3(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[3] ),
        .I4(\FSM_onehot_gen_rst_ic.curr_wrst_state_reg_n_0_[4] ),
        .O(\gen_rst_ic.wr_rst_busy_ic_i_2_n_0 ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rst_ic.wr_rst_busy_ic_reg 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\gen_rst_ic.wr_rst_busy_ic_i_1_n_0 ),
        .Q(wrst_busy),
        .R(1'b0));
  (* DEF_VAL = "1'b0" *) 
  (* DEST_SYNC_FF = "2" *) 
  (* INIT = "0" *) 
  (* INIT_SYNC_FF = "1" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* VERSION = "0" *) 
  (* XPM_CDC = "SYNC_RST" *) 
  (* XPM_MODULE = "TRUE" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_cdc_sync_rst__6 \gen_rst_ic.wrst_rd_inst 
       (.dest_clk(rd_clk),
        .dest_rst(\gen_rst_ic.fifo_wr_rst_rd ),
        .src_rst(\gen_rst_ic.fifo_wr_rst_ic ));
  LUT4 #(
    .INIT(16'h0002)) 
    \gen_sdpram.xpm_memory_base_inst_i_1 
       (.I0(wr_en),
        .I1(\gof.overflow_i_reg ),
        .I2(wrst_busy),
        .I3(rst_d1),
        .O(E));
  (* SOFT_HLUTNM = "soft_lutpair248" *) 
  LUT4 #(
    .INIT(16'hFE00)) 
    \gof.overflow_i_i_1 
       (.I0(\gof.overflow_i_reg ),
        .I1(wrst_busy),
        .I2(rst_d1),
        .I3(wr_en),
        .O(overflow_i0));
  LUT3 #(
    .INIT(8'hC8)) 
    \guf.underflow_i_i_1 
       (.I0(SR),
        .I1(rd_en),
        .I2(\guf.underflow_i_reg ),
        .O(underflow_i0));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[0] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(1'b0),
        .Q(\power_on_rst_reg_n_0_[0] ),
        .R(1'b0));
  FDRE #(
    .INIT(1'b1)) 
    \power_on_rst_reg[1] 
       (.C(wr_clk),
        .CE(1'b1),
        .D(\power_on_rst_reg_n_0_[0] ),
        .Q(p_0_in),
        .R(1'b0));
  (* SOFT_HLUTNM = "soft_lutpair248" *) 
  LUT2 #(
    .INIT(4'hE)) 
    wr_rst_busy_INST_0
       (.I0(wrst_busy),
        .I1(rst_d1),
        .O(wr_rst_busy));
endmodule

(* CASCADE_HEIGHT = "0" *) (* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "no_ecc" *) 
(* EN_ADV_FEATURE_SYNC = "16'b0000011100000111" *) (* EN_SIM_ASSERT_ERR = "warning" *) (* FIFO_MEMORY_TYPE = "distributed" *) 
(* FIFO_READ_LATENCY = "1" *) (* FIFO_WRITE_DEPTH = "16" *) (* FULL_RESET_VALUE = "0" *) 
(* PROG_EMPTY_THRESH = "5" *) (* PROG_FULL_THRESH = "11" *) (* P_COMMON_CLOCK = "1" *) 
(* P_ECC_MODE = "0" *) (* P_FIFO_MEMORY_TYPE = "1" *) (* P_READ_MODE = "1" *) 
(* P_WAKEUP_TIME = "2" *) (* RD_DATA_COUNT_WIDTH = "5" *) (* READ_DATA_WIDTH = "12" *) 
(* READ_MODE = "fwft" *) (* SIM_ASSERT_CHK = "0" *) (* USE_ADV_FEATURES = "0707" *) 
(* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH = "12" *) (* WR_DATA_COUNT_WIDTH = "5" *) 
(* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "soft" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_sync
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [11:0]din;
  output full;
  output prog_full;
  output [4:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_en;
  output [11:0]dout;
  output empty;
  output prog_empty;
  output [4:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [11:0]din;
  wire [11:0]dout;
  wire empty;
  wire rd_en;
  wire rst;
  wire wr_clk;
  wire wr_en;
  wire NLW_xpm_fifo_base_inst_almost_empty_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_almost_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_data_valid_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_dbiterr_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_full_n_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_overflow_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_prog_empty_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_prog_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_rd_rst_busy_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_sbiterr_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_underflow_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_wr_ack_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_wr_rst_busy_UNCONNECTED;
  wire [4:0]NLW_xpm_fifo_base_inst_rd_data_count_UNCONNECTED;
  wire [4:0]NLW_xpm_fifo_base_inst_wr_data_count_UNCONNECTED;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign full = \<const0> ;
  assign overflow = \<const0> ;
  assign prog_empty = \<const0> ;
  assign prog_full = \<const0> ;
  assign rd_data_count[4] = \<const0> ;
  assign rd_data_count[3] = \<const0> ;
  assign rd_data_count[2] = \<const0> ;
  assign rd_data_count[1] = \<const0> ;
  assign rd_data_count[0] = \<const0> ;
  assign rd_rst_busy = \<const0> ;
  assign sbiterr = \<const0> ;
  assign underflow = \<const0> ;
  assign wr_ack = \<const0> ;
  assign wr_data_count[4] = \<const0> ;
  assign wr_data_count[3] = \<const0> ;
  assign wr_data_count[2] = \<const0> ;
  assign wr_data_count[1] = \<const0> ;
  assign wr_data_count[0] = \<const0> ;
  assign wr_rst_busy = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* CASCADE_HEIGHT = "0" *) 
  (* CDC_DEST_SYNC_FF = "2" *) 
  (* COMMON_CLOCK = "1" *) 
  (* DOUT_RESET_VALUE = "0" *) 
  (* ECC_MODE = "0" *) 
  (* ENABLE_ECC = "0" *) 
  (* EN_ADV_FEATURE = "16'b0000011100000111" *) 
  (* EN_AE = "1'b0" *) 
  (* EN_AF = "1'b0" *) 
  (* EN_DVLD = "1'b0" *) 
  (* EN_OF = "1'b1" *) 
  (* EN_PE = "1'b1" *) 
  (* EN_PF = "1'b1" *) 
  (* EN_RDC = "1'b1" *) 
  (* EN_SIM_ASSERT_ERR = "warning" *) 
  (* EN_UF = "1'b1" *) 
  (* EN_WACK = "1'b0" *) 
  (* EN_WDC = "1'b1" *) 
  (* FG_EQ_ASYM_DOUT = "1'b0" *) 
  (* FIFO_MEMORY_TYPE = "1" *) 
  (* FIFO_MEM_TYPE = "1" *) 
  (* FIFO_READ_DEPTH = "16" *) 
  (* FIFO_READ_LATENCY = "1" *) 
  (* FIFO_SIZE = "192" *) 
  (* FIFO_WRITE_DEPTH = "16" *) 
  (* FULL_RESET_VALUE = "0" *) 
  (* FULL_RST_VAL = "1'b0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* PE_THRESH_ADJ = "3" *) 
  (* PE_THRESH_MAX = "11" *) 
  (* PE_THRESH_MIN = "5" *) 
  (* PF_THRESH_ADJ = "9" *) 
  (* PF_THRESH_MAX = "11" *) 
  (* PF_THRESH_MIN = "5" *) 
  (* PROG_EMPTY_THRESH = "5" *) 
  (* PROG_FULL_THRESH = "11" *) 
  (* RD_DATA_COUNT_WIDTH = "5" *) 
  (* RD_DC_WIDTH_EXT = "5" *) 
  (* RD_LATENCY = "2" *) 
  (* RD_MODE = "1" *) 
  (* RD_PNTR_WIDTH = "4" *) 
  (* READ_DATA_WIDTH = "12" *) 
  (* READ_MODE = "1" *) 
  (* READ_MODE_LL = "1" *) 
  (* RELATED_CLOCKS = "0" *) 
  (* REMOVE_WR_RD_PROT_LOGIC = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_ADV_FEATURES = "0707" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WIDTH_RATIO = "1" *) 
  (* WRITE_DATA_WIDTH = "12" *) 
  (* WR_DATA_COUNT_WIDTH = "5" *) 
  (* WR_DC_WIDTH_EXT = "5" *) 
  (* WR_DEPTH_LOG = "4" *) 
  (* WR_PNTR_WIDTH = "4" *) 
  (* WR_RD_RATIO = "0" *) 
  (* WR_WIDTH_LOG = "4" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* both_stages_valid = "3" *) 
  (* invalid = "0" *) 
  (* stage1_valid = "2" *) 
  (* stage2_valid = "1" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base xpm_fifo_base_inst
       (.almost_empty(NLW_xpm_fifo_base_inst_almost_empty_UNCONNECTED),
        .almost_full(NLW_xpm_fifo_base_inst_almost_full_UNCONNECTED),
        .data_valid(NLW_xpm_fifo_base_inst_data_valid_UNCONNECTED),
        .dbiterr(NLW_xpm_fifo_base_inst_dbiterr_UNCONNECTED),
        .din(din),
        .dout(dout),
        .empty(empty),
        .full(NLW_xpm_fifo_base_inst_full_UNCONNECTED),
        .full_n(NLW_xpm_fifo_base_inst_full_n_UNCONNECTED),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .overflow(NLW_xpm_fifo_base_inst_overflow_UNCONNECTED),
        .prog_empty(NLW_xpm_fifo_base_inst_prog_empty_UNCONNECTED),
        .prog_full(NLW_xpm_fifo_base_inst_prog_full_UNCONNECTED),
        .rd_clk(1'b0),
        .rd_data_count(NLW_xpm_fifo_base_inst_rd_data_count_UNCONNECTED[4:0]),
        .rd_en(rd_en),
        .rd_rst_busy(NLW_xpm_fifo_base_inst_rd_rst_busy_UNCONNECTED),
        .rst(rst),
        .sbiterr(NLW_xpm_fifo_base_inst_sbiterr_UNCONNECTED),
        .sleep(1'b0),
        .underflow(NLW_xpm_fifo_base_inst_underflow_UNCONNECTED),
        .wr_ack(NLW_xpm_fifo_base_inst_wr_ack_UNCONNECTED),
        .wr_clk(wr_clk),
        .wr_data_count(NLW_xpm_fifo_base_inst_wr_data_count_UNCONNECTED[4:0]),
        .wr_en(wr_en),
        .wr_rst_busy(NLW_xpm_fifo_base_inst_wr_rst_busy_UNCONNECTED));
endmodule

(* CASCADE_HEIGHT = "0" *) (* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "no_ecc" *) 
(* EN_ADV_FEATURE_SYNC = "16'b0000011100000111" *) (* EN_SIM_ASSERT_ERR = "warning" *) (* FIFO_MEMORY_TYPE = "distributed" *) 
(* FIFO_READ_LATENCY = "1" *) (* FIFO_WRITE_DEPTH = "16" *) (* FULL_RESET_VALUE = "0" *) 
(* ORIG_REF_NAME = "xpm_fifo_sync" *) (* PROG_EMPTY_THRESH = "5" *) (* PROG_FULL_THRESH = "11" *) 
(* P_COMMON_CLOCK = "1" *) (* P_ECC_MODE = "0" *) (* P_FIFO_MEMORY_TYPE = "1" *) 
(* P_READ_MODE = "1" *) (* P_WAKEUP_TIME = "2" *) (* RD_DATA_COUNT_WIDTH = "5" *) 
(* READ_DATA_WIDTH = "12" *) (* READ_MODE = "fwft" *) (* SIM_ASSERT_CHK = "0" *) 
(* USE_ADV_FEATURES = "0707" *) (* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH = "12" *) 
(* WR_DATA_COUNT_WIDTH = "5" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "soft" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_sync__4
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [11:0]din;
  output full;
  output prog_full;
  output [4:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_en;
  output [11:0]dout;
  output empty;
  output prog_empty;
  output [4:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [11:0]din;
  wire [11:0]dout;
  wire empty;
  wire rd_en;
  wire rst;
  wire wr_clk;
  wire wr_en;
  wire NLW_xpm_fifo_base_inst_almost_empty_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_almost_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_data_valid_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_dbiterr_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_full_n_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_overflow_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_prog_empty_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_prog_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_rd_rst_busy_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_sbiterr_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_underflow_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_wr_ack_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_wr_rst_busy_UNCONNECTED;
  wire [4:0]NLW_xpm_fifo_base_inst_rd_data_count_UNCONNECTED;
  wire [4:0]NLW_xpm_fifo_base_inst_wr_data_count_UNCONNECTED;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign full = \<const0> ;
  assign overflow = \<const0> ;
  assign prog_empty = \<const0> ;
  assign prog_full = \<const0> ;
  assign rd_data_count[4] = \<const0> ;
  assign rd_data_count[3] = \<const0> ;
  assign rd_data_count[2] = \<const0> ;
  assign rd_data_count[1] = \<const0> ;
  assign rd_data_count[0] = \<const0> ;
  assign rd_rst_busy = \<const0> ;
  assign sbiterr = \<const0> ;
  assign underflow = \<const0> ;
  assign wr_ack = \<const0> ;
  assign wr_data_count[4] = \<const0> ;
  assign wr_data_count[3] = \<const0> ;
  assign wr_data_count[2] = \<const0> ;
  assign wr_data_count[1] = \<const0> ;
  assign wr_data_count[0] = \<const0> ;
  assign wr_rst_busy = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* CASCADE_HEIGHT = "0" *) 
  (* CDC_DEST_SYNC_FF = "2" *) 
  (* COMMON_CLOCK = "1" *) 
  (* DOUT_RESET_VALUE = "0" *) 
  (* ECC_MODE = "0" *) 
  (* ENABLE_ECC = "0" *) 
  (* EN_ADV_FEATURE = "16'b0000011100000111" *) 
  (* EN_AE = "1'b0" *) 
  (* EN_AF = "1'b0" *) 
  (* EN_DVLD = "1'b0" *) 
  (* EN_OF = "1'b1" *) 
  (* EN_PE = "1'b1" *) 
  (* EN_PF = "1'b1" *) 
  (* EN_RDC = "1'b1" *) 
  (* EN_SIM_ASSERT_ERR = "warning" *) 
  (* EN_UF = "1'b1" *) 
  (* EN_WACK = "1'b0" *) 
  (* EN_WDC = "1'b1" *) 
  (* FG_EQ_ASYM_DOUT = "1'b0" *) 
  (* FIFO_MEMORY_TYPE = "1" *) 
  (* FIFO_MEM_TYPE = "1" *) 
  (* FIFO_READ_DEPTH = "16" *) 
  (* FIFO_READ_LATENCY = "1" *) 
  (* FIFO_SIZE = "192" *) 
  (* FIFO_WRITE_DEPTH = "16" *) 
  (* FULL_RESET_VALUE = "0" *) 
  (* FULL_RST_VAL = "1'b0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* PE_THRESH_ADJ = "3" *) 
  (* PE_THRESH_MAX = "11" *) 
  (* PE_THRESH_MIN = "5" *) 
  (* PF_THRESH_ADJ = "9" *) 
  (* PF_THRESH_MAX = "11" *) 
  (* PF_THRESH_MIN = "5" *) 
  (* PROG_EMPTY_THRESH = "5" *) 
  (* PROG_FULL_THRESH = "11" *) 
  (* RD_DATA_COUNT_WIDTH = "5" *) 
  (* RD_DC_WIDTH_EXT = "5" *) 
  (* RD_LATENCY = "2" *) 
  (* RD_MODE = "1" *) 
  (* RD_PNTR_WIDTH = "4" *) 
  (* READ_DATA_WIDTH = "12" *) 
  (* READ_MODE = "1" *) 
  (* READ_MODE_LL = "1" *) 
  (* RELATED_CLOCKS = "0" *) 
  (* REMOVE_WR_RD_PROT_LOGIC = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_ADV_FEATURES = "0707" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WIDTH_RATIO = "1" *) 
  (* WRITE_DATA_WIDTH = "12" *) 
  (* WR_DATA_COUNT_WIDTH = "5" *) 
  (* WR_DC_WIDTH_EXT = "5" *) 
  (* WR_DEPTH_LOG = "4" *) 
  (* WR_PNTR_WIDTH = "4" *) 
  (* WR_RD_RATIO = "0" *) 
  (* WR_WIDTH_LOG = "4" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* both_stages_valid = "3" *) 
  (* invalid = "0" *) 
  (* stage1_valid = "2" *) 
  (* stage2_valid = "1" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__4 xpm_fifo_base_inst
       (.almost_empty(NLW_xpm_fifo_base_inst_almost_empty_UNCONNECTED),
        .almost_full(NLW_xpm_fifo_base_inst_almost_full_UNCONNECTED),
        .data_valid(NLW_xpm_fifo_base_inst_data_valid_UNCONNECTED),
        .dbiterr(NLW_xpm_fifo_base_inst_dbiterr_UNCONNECTED),
        .din(din),
        .dout(dout),
        .empty(empty),
        .full(NLW_xpm_fifo_base_inst_full_UNCONNECTED),
        .full_n(NLW_xpm_fifo_base_inst_full_n_UNCONNECTED),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .overflow(NLW_xpm_fifo_base_inst_overflow_UNCONNECTED),
        .prog_empty(NLW_xpm_fifo_base_inst_prog_empty_UNCONNECTED),
        .prog_full(NLW_xpm_fifo_base_inst_prog_full_UNCONNECTED),
        .rd_clk(wr_clk),
        .rd_data_count(NLW_xpm_fifo_base_inst_rd_data_count_UNCONNECTED[4:0]),
        .rd_en(rd_en),
        .rd_rst_busy(NLW_xpm_fifo_base_inst_rd_rst_busy_UNCONNECTED),
        .rst(rst),
        .sbiterr(NLW_xpm_fifo_base_inst_sbiterr_UNCONNECTED),
        .sleep(1'b0),
        .underflow(NLW_xpm_fifo_base_inst_underflow_UNCONNECTED),
        .wr_ack(NLW_xpm_fifo_base_inst_wr_ack_UNCONNECTED),
        .wr_clk(1'b0),
        .wr_data_count(NLW_xpm_fifo_base_inst_wr_data_count_UNCONNECTED[4:0]),
        .wr_en(wr_en),
        .wr_rst_busy(NLW_xpm_fifo_base_inst_wr_rst_busy_UNCONNECTED));
endmodule

(* CASCADE_HEIGHT = "0" *) (* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "no_ecc" *) 
(* EN_ADV_FEATURE_SYNC = "16'b0000011100000111" *) (* EN_SIM_ASSERT_ERR = "warning" *) (* FIFO_MEMORY_TYPE = "distributed" *) 
(* FIFO_READ_LATENCY = "1" *) (* FIFO_WRITE_DEPTH = "16" *) (* FULL_RESET_VALUE = "0" *) 
(* ORIG_REF_NAME = "xpm_fifo_sync" *) (* PROG_EMPTY_THRESH = "5" *) (* PROG_FULL_THRESH = "11" *) 
(* P_COMMON_CLOCK = "1" *) (* P_ECC_MODE = "0" *) (* P_FIFO_MEMORY_TYPE = "1" *) 
(* P_READ_MODE = "1" *) (* P_WAKEUP_TIME = "2" *) (* RD_DATA_COUNT_WIDTH = "5" *) 
(* READ_DATA_WIDTH = "12" *) (* READ_MODE = "fwft" *) (* SIM_ASSERT_CHK = "0" *) 
(* USE_ADV_FEATURES = "0707" *) (* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH = "12" *) 
(* WR_DATA_COUNT_WIDTH = "5" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "soft" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_sync__5
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [11:0]din;
  output full;
  output prog_full;
  output [4:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_en;
  output [11:0]dout;
  output empty;
  output prog_empty;
  output [4:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [11:0]din;
  wire [11:0]dout;
  wire empty;
  wire rd_en;
  wire rst;
  wire wr_clk;
  wire wr_en;
  wire NLW_xpm_fifo_base_inst_almost_empty_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_almost_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_data_valid_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_dbiterr_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_full_n_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_overflow_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_prog_empty_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_prog_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_rd_rst_busy_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_sbiterr_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_underflow_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_wr_ack_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_wr_rst_busy_UNCONNECTED;
  wire [4:0]NLW_xpm_fifo_base_inst_rd_data_count_UNCONNECTED;
  wire [4:0]NLW_xpm_fifo_base_inst_wr_data_count_UNCONNECTED;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign full = \<const0> ;
  assign overflow = \<const0> ;
  assign prog_empty = \<const0> ;
  assign prog_full = \<const0> ;
  assign rd_data_count[4] = \<const0> ;
  assign rd_data_count[3] = \<const0> ;
  assign rd_data_count[2] = \<const0> ;
  assign rd_data_count[1] = \<const0> ;
  assign rd_data_count[0] = \<const0> ;
  assign rd_rst_busy = \<const0> ;
  assign sbiterr = \<const0> ;
  assign underflow = \<const0> ;
  assign wr_ack = \<const0> ;
  assign wr_data_count[4] = \<const0> ;
  assign wr_data_count[3] = \<const0> ;
  assign wr_data_count[2] = \<const0> ;
  assign wr_data_count[1] = \<const0> ;
  assign wr_data_count[0] = \<const0> ;
  assign wr_rst_busy = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* CASCADE_HEIGHT = "0" *) 
  (* CDC_DEST_SYNC_FF = "2" *) 
  (* COMMON_CLOCK = "1" *) 
  (* DOUT_RESET_VALUE = "0" *) 
  (* ECC_MODE = "0" *) 
  (* ENABLE_ECC = "0" *) 
  (* EN_ADV_FEATURE = "16'b0000011100000111" *) 
  (* EN_AE = "1'b0" *) 
  (* EN_AF = "1'b0" *) 
  (* EN_DVLD = "1'b0" *) 
  (* EN_OF = "1'b1" *) 
  (* EN_PE = "1'b1" *) 
  (* EN_PF = "1'b1" *) 
  (* EN_RDC = "1'b1" *) 
  (* EN_SIM_ASSERT_ERR = "warning" *) 
  (* EN_UF = "1'b1" *) 
  (* EN_WACK = "1'b0" *) 
  (* EN_WDC = "1'b1" *) 
  (* FG_EQ_ASYM_DOUT = "1'b0" *) 
  (* FIFO_MEMORY_TYPE = "1" *) 
  (* FIFO_MEM_TYPE = "1" *) 
  (* FIFO_READ_DEPTH = "16" *) 
  (* FIFO_READ_LATENCY = "1" *) 
  (* FIFO_SIZE = "192" *) 
  (* FIFO_WRITE_DEPTH = "16" *) 
  (* FULL_RESET_VALUE = "0" *) 
  (* FULL_RST_VAL = "1'b0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* PE_THRESH_ADJ = "3" *) 
  (* PE_THRESH_MAX = "11" *) 
  (* PE_THRESH_MIN = "5" *) 
  (* PF_THRESH_ADJ = "9" *) 
  (* PF_THRESH_MAX = "11" *) 
  (* PF_THRESH_MIN = "5" *) 
  (* PROG_EMPTY_THRESH = "5" *) 
  (* PROG_FULL_THRESH = "11" *) 
  (* RD_DATA_COUNT_WIDTH = "5" *) 
  (* RD_DC_WIDTH_EXT = "5" *) 
  (* RD_LATENCY = "2" *) 
  (* RD_MODE = "1" *) 
  (* RD_PNTR_WIDTH = "4" *) 
  (* READ_DATA_WIDTH = "12" *) 
  (* READ_MODE = "1" *) 
  (* READ_MODE_LL = "1" *) 
  (* RELATED_CLOCKS = "0" *) 
  (* REMOVE_WR_RD_PROT_LOGIC = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_ADV_FEATURES = "0707" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WIDTH_RATIO = "1" *) 
  (* WRITE_DATA_WIDTH = "12" *) 
  (* WR_DATA_COUNT_WIDTH = "5" *) 
  (* WR_DC_WIDTH_EXT = "5" *) 
  (* WR_DEPTH_LOG = "4" *) 
  (* WR_PNTR_WIDTH = "4" *) 
  (* WR_RD_RATIO = "0" *) 
  (* WR_WIDTH_LOG = "4" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* both_stages_valid = "3" *) 
  (* invalid = "0" *) 
  (* stage1_valid = "2" *) 
  (* stage2_valid = "1" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__5 xpm_fifo_base_inst
       (.almost_empty(NLW_xpm_fifo_base_inst_almost_empty_UNCONNECTED),
        .almost_full(NLW_xpm_fifo_base_inst_almost_full_UNCONNECTED),
        .data_valid(NLW_xpm_fifo_base_inst_data_valid_UNCONNECTED),
        .dbiterr(NLW_xpm_fifo_base_inst_dbiterr_UNCONNECTED),
        .din(din),
        .dout(dout),
        .empty(empty),
        .full(NLW_xpm_fifo_base_inst_full_UNCONNECTED),
        .full_n(NLW_xpm_fifo_base_inst_full_n_UNCONNECTED),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .overflow(NLW_xpm_fifo_base_inst_overflow_UNCONNECTED),
        .prog_empty(NLW_xpm_fifo_base_inst_prog_empty_UNCONNECTED),
        .prog_full(NLW_xpm_fifo_base_inst_prog_full_UNCONNECTED),
        .rd_clk(wr_clk),
        .rd_data_count(NLW_xpm_fifo_base_inst_rd_data_count_UNCONNECTED[4:0]),
        .rd_en(rd_en),
        .rd_rst_busy(NLW_xpm_fifo_base_inst_rd_rst_busy_UNCONNECTED),
        .rst(rst),
        .sbiterr(NLW_xpm_fifo_base_inst_sbiterr_UNCONNECTED),
        .sleep(1'b0),
        .underflow(NLW_xpm_fifo_base_inst_underflow_UNCONNECTED),
        .wr_ack(NLW_xpm_fifo_base_inst_wr_ack_UNCONNECTED),
        .wr_clk(1'b0),
        .wr_data_count(NLW_xpm_fifo_base_inst_wr_data_count_UNCONNECTED[4:0]),
        .wr_en(wr_en),
        .wr_rst_busy(NLW_xpm_fifo_base_inst_wr_rst_busy_UNCONNECTED));
endmodule

(* CASCADE_HEIGHT = "0" *) (* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "no_ecc" *) 
(* EN_ADV_FEATURE_SYNC = "16'b0000011100000111" *) (* EN_SIM_ASSERT_ERR = "warning" *) (* FIFO_MEMORY_TYPE = "distributed" *) 
(* FIFO_READ_LATENCY = "1" *) (* FIFO_WRITE_DEPTH = "16" *) (* FULL_RESET_VALUE = "0" *) 
(* ORIG_REF_NAME = "xpm_fifo_sync" *) (* PROG_EMPTY_THRESH = "5" *) (* PROG_FULL_THRESH = "11" *) 
(* P_COMMON_CLOCK = "1" *) (* P_ECC_MODE = "0" *) (* P_FIFO_MEMORY_TYPE = "1" *) 
(* P_READ_MODE = "1" *) (* P_WAKEUP_TIME = "2" *) (* RD_DATA_COUNT_WIDTH = "5" *) 
(* READ_DATA_WIDTH = "12" *) (* READ_MODE = "fwft" *) (* SIM_ASSERT_CHK = "0" *) 
(* USE_ADV_FEATURES = "0707" *) (* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH = "12" *) 
(* WR_DATA_COUNT_WIDTH = "5" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "soft" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_sync__6
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [11:0]din;
  output full;
  output prog_full;
  output [4:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_en;
  output [11:0]dout;
  output empty;
  output prog_empty;
  output [4:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire [11:0]din;
  wire [11:0]dout;
  wire empty;
  wire rd_en;
  wire rst;
  wire wr_clk;
  wire wr_en;
  wire NLW_xpm_fifo_base_inst_almost_empty_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_almost_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_data_valid_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_dbiterr_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_full_n_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_overflow_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_prog_empty_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_prog_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_rd_rst_busy_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_sbiterr_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_underflow_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_wr_ack_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_wr_rst_busy_UNCONNECTED;
  wire [4:0]NLW_xpm_fifo_base_inst_rd_data_count_UNCONNECTED;
  wire [4:0]NLW_xpm_fifo_base_inst_wr_data_count_UNCONNECTED;

  assign almost_empty = \<const0> ;
  assign almost_full = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign full = \<const0> ;
  assign overflow = \<const0> ;
  assign prog_empty = \<const0> ;
  assign prog_full = \<const0> ;
  assign rd_data_count[4] = \<const0> ;
  assign rd_data_count[3] = \<const0> ;
  assign rd_data_count[2] = \<const0> ;
  assign rd_data_count[1] = \<const0> ;
  assign rd_data_count[0] = \<const0> ;
  assign rd_rst_busy = \<const0> ;
  assign sbiterr = \<const0> ;
  assign underflow = \<const0> ;
  assign wr_ack = \<const0> ;
  assign wr_data_count[4] = \<const0> ;
  assign wr_data_count[3] = \<const0> ;
  assign wr_data_count[2] = \<const0> ;
  assign wr_data_count[1] = \<const0> ;
  assign wr_data_count[0] = \<const0> ;
  assign wr_rst_busy = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* CASCADE_HEIGHT = "0" *) 
  (* CDC_DEST_SYNC_FF = "2" *) 
  (* COMMON_CLOCK = "1" *) 
  (* DOUT_RESET_VALUE = "0" *) 
  (* ECC_MODE = "0" *) 
  (* ENABLE_ECC = "0" *) 
  (* EN_ADV_FEATURE = "16'b0000011100000111" *) 
  (* EN_AE = "1'b0" *) 
  (* EN_AF = "1'b0" *) 
  (* EN_DVLD = "1'b0" *) 
  (* EN_OF = "1'b1" *) 
  (* EN_PE = "1'b1" *) 
  (* EN_PF = "1'b1" *) 
  (* EN_RDC = "1'b1" *) 
  (* EN_SIM_ASSERT_ERR = "warning" *) 
  (* EN_UF = "1'b1" *) 
  (* EN_WACK = "1'b0" *) 
  (* EN_WDC = "1'b1" *) 
  (* FG_EQ_ASYM_DOUT = "1'b0" *) 
  (* FIFO_MEMORY_TYPE = "1" *) 
  (* FIFO_MEM_TYPE = "1" *) 
  (* FIFO_READ_DEPTH = "16" *) 
  (* FIFO_READ_LATENCY = "1" *) 
  (* FIFO_SIZE = "192" *) 
  (* FIFO_WRITE_DEPTH = "16" *) 
  (* FULL_RESET_VALUE = "0" *) 
  (* FULL_RST_VAL = "1'b0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* PE_THRESH_ADJ = "3" *) 
  (* PE_THRESH_MAX = "11" *) 
  (* PE_THRESH_MIN = "5" *) 
  (* PF_THRESH_ADJ = "9" *) 
  (* PF_THRESH_MAX = "11" *) 
  (* PF_THRESH_MIN = "5" *) 
  (* PROG_EMPTY_THRESH = "5" *) 
  (* PROG_FULL_THRESH = "11" *) 
  (* RD_DATA_COUNT_WIDTH = "5" *) 
  (* RD_DC_WIDTH_EXT = "5" *) 
  (* RD_LATENCY = "2" *) 
  (* RD_MODE = "1" *) 
  (* RD_PNTR_WIDTH = "4" *) 
  (* READ_DATA_WIDTH = "12" *) 
  (* READ_MODE = "1" *) 
  (* READ_MODE_LL = "1" *) 
  (* RELATED_CLOCKS = "0" *) 
  (* REMOVE_WR_RD_PROT_LOGIC = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_ADV_FEATURES = "0707" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WIDTH_RATIO = "1" *) 
  (* WRITE_DATA_WIDTH = "12" *) 
  (* WR_DATA_COUNT_WIDTH = "5" *) 
  (* WR_DC_WIDTH_EXT = "5" *) 
  (* WR_DEPTH_LOG = "4" *) 
  (* WR_PNTR_WIDTH = "4" *) 
  (* WR_RD_RATIO = "0" *) 
  (* WR_WIDTH_LOG = "4" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* both_stages_valid = "3" *) 
  (* invalid = "0" *) 
  (* stage1_valid = "2" *) 
  (* stage2_valid = "1" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__6 xpm_fifo_base_inst
       (.almost_empty(NLW_xpm_fifo_base_inst_almost_empty_UNCONNECTED),
        .almost_full(NLW_xpm_fifo_base_inst_almost_full_UNCONNECTED),
        .data_valid(NLW_xpm_fifo_base_inst_data_valid_UNCONNECTED),
        .dbiterr(NLW_xpm_fifo_base_inst_dbiterr_UNCONNECTED),
        .din(din),
        .dout(dout),
        .empty(empty),
        .full(NLW_xpm_fifo_base_inst_full_UNCONNECTED),
        .full_n(NLW_xpm_fifo_base_inst_full_n_UNCONNECTED),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .overflow(NLW_xpm_fifo_base_inst_overflow_UNCONNECTED),
        .prog_empty(NLW_xpm_fifo_base_inst_prog_empty_UNCONNECTED),
        .prog_full(NLW_xpm_fifo_base_inst_prog_full_UNCONNECTED),
        .rd_clk(wr_clk),
        .rd_data_count(NLW_xpm_fifo_base_inst_rd_data_count_UNCONNECTED[4:0]),
        .rd_en(rd_en),
        .rd_rst_busy(NLW_xpm_fifo_base_inst_rd_rst_busy_UNCONNECTED),
        .rst(rst),
        .sbiterr(NLW_xpm_fifo_base_inst_sbiterr_UNCONNECTED),
        .sleep(1'b0),
        .underflow(NLW_xpm_fifo_base_inst_underflow_UNCONNECTED),
        .wr_ack(NLW_xpm_fifo_base_inst_wr_ack_UNCONNECTED),
        .wr_clk(1'b0),
        .wr_data_count(NLW_xpm_fifo_base_inst_wr_data_count_UNCONNECTED[4:0]),
        .wr_en(wr_en),
        .wr_rst_busy(NLW_xpm_fifo_base_inst_wr_rst_busy_UNCONNECTED));
endmodule

(* CASCADE_HEIGHT = "0" *) (* DOUT_RESET_VALUE = "0" *) (* ECC_MODE = "no_ecc" *) 
(* EN_ADV_FEATURE_SYNC = "16'b0000111100001111" *) (* EN_SIM_ASSERT_ERR = "warning" *) (* FIFO_MEMORY_TYPE = "block" *) 
(* FIFO_READ_LATENCY = "1" *) (* FIFO_WRITE_DEPTH = "2048" *) (* FULL_RESET_VALUE = "0" *) 
(* ORIG_REF_NAME = "xpm_fifo_sync" *) (* PROG_EMPTY_THRESH = "10" *) (* PROG_FULL_THRESH = "2043" *) 
(* P_COMMON_CLOCK = "1" *) (* P_ECC_MODE = "0" *) (* P_FIFO_MEMORY_TYPE = "2" *) 
(* P_READ_MODE = "1" *) (* P_WAKEUP_TIME = "2" *) (* RD_DATA_COUNT_WIDTH = "1" *) 
(* READ_DATA_WIDTH = "68" *) (* READ_MODE = "fwft" *) (* SIM_ASSERT_CHK = "0" *) 
(* USE_ADV_FEATURES = "0f0f" *) (* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH = "68" *) 
(* WR_DATA_COUNT_WIDTH = "1" *) (* XPM_MODULE = "TRUE" *) (* is_du_within_envelope = "true" *) 
(* keep_hierarchy = "soft" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_sync__parameterized0
   (sleep,
    rst,
    wr_clk,
    wr_en,
    din,
    full,
    prog_full,
    wr_data_count,
    overflow,
    wr_rst_busy,
    almost_full,
    wr_ack,
    rd_en,
    dout,
    empty,
    prog_empty,
    rd_data_count,
    underflow,
    rd_rst_busy,
    almost_empty,
    data_valid,
    injectsbiterr,
    injectdbiterr,
    sbiterr,
    dbiterr);
  input sleep;
  input rst;
  input wr_clk;
  input wr_en;
  input [67:0]din;
  output full;
  output prog_full;
  output [0:0]wr_data_count;
  output overflow;
  output wr_rst_busy;
  output almost_full;
  output wr_ack;
  input rd_en;
  output [67:0]dout;
  output empty;
  output prog_empty;
  output [0:0]rd_data_count;
  output underflow;
  output rd_rst_busy;
  output almost_empty;
  output data_valid;
  input injectsbiterr;
  input injectdbiterr;
  output sbiterr;
  output dbiterr;

  wire \<const0> ;
  wire almost_full;
  wire [67:0]din;
  wire [67:0]dout;
  wire empty;
  wire full;
  wire rd_en;
  wire rst;
  wire wr_clk;
  wire wr_en;
  wire NLW_xpm_fifo_base_inst_almost_empty_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_data_valid_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_dbiterr_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_full_n_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_overflow_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_prog_empty_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_prog_full_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_rd_rst_busy_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_sbiterr_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_underflow_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_wr_ack_UNCONNECTED;
  wire NLW_xpm_fifo_base_inst_wr_rst_busy_UNCONNECTED;
  wire [0:0]NLW_xpm_fifo_base_inst_rd_data_count_UNCONNECTED;
  wire [0:0]NLW_xpm_fifo_base_inst_wr_data_count_UNCONNECTED;

  assign almost_empty = \<const0> ;
  assign data_valid = \<const0> ;
  assign dbiterr = \<const0> ;
  assign overflow = \<const0> ;
  assign prog_empty = \<const0> ;
  assign prog_full = \<const0> ;
  assign rd_data_count[0] = \<const0> ;
  assign rd_rst_busy = \<const0> ;
  assign sbiterr = \<const0> ;
  assign underflow = \<const0> ;
  assign wr_ack = \<const0> ;
  assign wr_data_count[0] = \<const0> ;
  assign wr_rst_busy = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* CASCADE_HEIGHT = "0" *) 
  (* CDC_DEST_SYNC_FF = "2" *) 
  (* COMMON_CLOCK = "1" *) 
  (* DOUT_RESET_VALUE = "0" *) 
  (* ECC_MODE = "0" *) 
  (* ENABLE_ECC = "0" *) 
  (* EN_ADV_FEATURE = "16'b0000111100001111" *) 
  (* EN_AE = "1'b1" *) 
  (* EN_AF = "1'b1" *) 
  (* EN_DVLD = "1'b0" *) 
  (* EN_OF = "1'b1" *) 
  (* EN_PE = "1'b1" *) 
  (* EN_PF = "1'b1" *) 
  (* EN_RDC = "1'b1" *) 
  (* EN_SIM_ASSERT_ERR = "warning" *) 
  (* EN_UF = "1'b1" *) 
  (* EN_WACK = "1'b0" *) 
  (* EN_WDC = "1'b1" *) 
  (* FG_EQ_ASYM_DOUT = "1'b0" *) 
  (* FIFO_MEMORY_TYPE = "2" *) 
  (* FIFO_MEM_TYPE = "2" *) 
  (* FIFO_READ_DEPTH = "2048" *) 
  (* FIFO_READ_LATENCY = "1" *) 
  (* FIFO_SIZE = "139264" *) 
  (* FIFO_WRITE_DEPTH = "2048" *) 
  (* FULL_RESET_VALUE = "0" *) 
  (* FULL_RST_VAL = "1'b0" *) 
  (* KEEP_HIERARCHY = "soft" *) 
  (* PE_THRESH_ADJ = "8" *) 
  (* PE_THRESH_MAX = "2043" *) 
  (* PE_THRESH_MIN = "5" *) 
  (* PF_THRESH_ADJ = "2041" *) 
  (* PF_THRESH_MAX = "2043" *) 
  (* PF_THRESH_MIN = "5" *) 
  (* PROG_EMPTY_THRESH = "10" *) 
  (* PROG_FULL_THRESH = "2043" *) 
  (* RD_DATA_COUNT_WIDTH = "1" *) 
  (* RD_DC_WIDTH_EXT = "12" *) 
  (* RD_LATENCY = "2" *) 
  (* RD_MODE = "1" *) 
  (* RD_PNTR_WIDTH = "11" *) 
  (* READ_DATA_WIDTH = "68" *) 
  (* READ_MODE = "1" *) 
  (* READ_MODE_LL = "1" *) 
  (* RELATED_CLOCKS = "0" *) 
  (* REMOVE_WR_RD_PROT_LOGIC = "0" *) 
  (* SIM_ASSERT_CHK = "0" *) 
  (* USE_ADV_FEATURES = "0f0f" *) 
  (* VERSION = "0" *) 
  (* WAKEUP_TIME = "0" *) 
  (* WIDTH_RATIO = "1" *) 
  (* WRITE_DATA_WIDTH = "68" *) 
  (* WR_DATA_COUNT_WIDTH = "1" *) 
  (* WR_DC_WIDTH_EXT = "12" *) 
  (* WR_DEPTH_LOG = "11" *) 
  (* WR_PNTR_WIDTH = "11" *) 
  (* WR_RD_RATIO = "0" *) 
  (* WR_WIDTH_LOG = "7" *) 
  (* XPM_MODULE = "TRUE" *) 
  (* both_stages_valid = "3" *) 
  (* invalid = "0" *) 
  (* stage1_valid = "2" *) 
  (* stage2_valid = "1" *) 
  decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_fifo_base__parameterized0 xpm_fifo_base_inst
       (.almost_empty(NLW_xpm_fifo_base_inst_almost_empty_UNCONNECTED),
        .almost_full(almost_full),
        .data_valid(NLW_xpm_fifo_base_inst_data_valid_UNCONNECTED),
        .dbiterr(NLW_xpm_fifo_base_inst_dbiterr_UNCONNECTED),
        .din(din),
        .dout(dout),
        .empty(empty),
        .full(full),
        .full_n(NLW_xpm_fifo_base_inst_full_n_UNCONNECTED),
        .injectdbiterr(1'b0),
        .injectsbiterr(1'b0),
        .overflow(NLW_xpm_fifo_base_inst_overflow_UNCONNECTED),
        .prog_empty(NLW_xpm_fifo_base_inst_prog_empty_UNCONNECTED),
        .prog_full(NLW_xpm_fifo_base_inst_prog_full_UNCONNECTED),
        .rd_clk(wr_clk),
        .rd_data_count(NLW_xpm_fifo_base_inst_rd_data_count_UNCONNECTED[0]),
        .rd_en(rd_en),
        .rd_rst_busy(NLW_xpm_fifo_base_inst_rd_rst_busy_UNCONNECTED),
        .rst(rst),
        .sbiterr(NLW_xpm_fifo_base_inst_sbiterr_UNCONNECTED),
        .sleep(1'b0),
        .underflow(NLW_xpm_fifo_base_inst_underflow_UNCONNECTED),
        .wr_ack(NLW_xpm_fifo_base_inst_wr_ack_UNCONNECTED),
        .wr_clk(1'b0),
        .wr_data_count(NLW_xpm_fifo_base_inst_wr_data_count_UNCONNECTED[0]),
        .wr_en(wr_en),
        .wr_rst_busy(NLW_xpm_fifo_base_inst_wr_rst_busy_UNCONNECTED));
endmodule

(* ADDR_WIDTH_A = "4" *) (* ADDR_WIDTH_B = "4" *) (* AUTO_SLEEP_TIME = "0" *) 
(* BYTE_WRITE_WIDTH_A = "12" *) (* BYTE_WRITE_WIDTH_B = "12" *) (* CASCADE_HEIGHT = "0" *) 
(* CLOCKING_MODE = "0" *) (* ECC_BIT_RANGE = "[7:0]" *) (* ECC_MODE = "0" *) 
(* ECC_TYPE = "NONE" *) (* IGNORE_INIT_SYNTH = "0" *) (* MAX_NUM_CHAR = "0" *) 
(* MEMORY_INIT_FILE = "none" *) (* MEMORY_INIT_PARAM = "" *) (* MEMORY_OPTIMIZATION = "true" *) 
(* MEMORY_PRIMITIVE = "1" *) (* MEMORY_SIZE = "192" *) (* MEMORY_TYPE = "1" *) 
(* MESSAGE_CONTROL = "0" *) (* NUM_CHAR_LOC = "0" *) (* P_ECC_MODE = "0" *) 
(* P_ENABLE_BYTE_WRITE_A = "0" *) (* P_ENABLE_BYTE_WRITE_B = "0" *) (* P_MAX_DEPTH_DATA = "16" *) 
(* P_MEMORY_OPT = "yes" *) (* P_MEMORY_PRIMITIVE = "distributed" *) (* P_MIN_WIDTH_DATA = "12" *) 
(* P_MIN_WIDTH_DATA_A = "12" *) (* P_MIN_WIDTH_DATA_B = "12" *) (* P_MIN_WIDTH_DATA_ECC = "12" *) 
(* P_MIN_WIDTH_DATA_LDW = "4" *) (* P_MIN_WIDTH_DATA_SHFT = "12" *) (* P_NUM_COLS_WRITE_A = "1" *) 
(* P_NUM_COLS_WRITE_B = "1" *) (* P_NUM_ROWS_READ_A = "1" *) (* P_NUM_ROWS_READ_B = "1" *) 
(* P_NUM_ROWS_WRITE_A = "1" *) (* P_NUM_ROWS_WRITE_B = "1" *) (* P_SDP_WRITE_MODE = "yes" *) 
(* P_WIDTH_ADDR_LSB_READ_A = "0" *) (* P_WIDTH_ADDR_LSB_READ_B = "0" *) (* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) 
(* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) (* P_WIDTH_ADDR_READ_A = "4" *) (* P_WIDTH_ADDR_READ_B = "4" *) 
(* P_WIDTH_ADDR_WRITE_A = "4" *) (* P_WIDTH_ADDR_WRITE_B = "4" *) (* P_WIDTH_COL_WRITE_A = "12" *) 
(* P_WIDTH_COL_WRITE_B = "12" *) (* RAM_DECOMP = "auto" *) (* READ_DATA_WIDTH_A = "12" *) 
(* READ_DATA_WIDTH_B = "12" *) (* READ_LATENCY_A = "2" *) (* READ_LATENCY_B = "2" *) 
(* READ_RESET_VALUE_A = "0" *) (* READ_RESET_VALUE_B = "0" *) (* RST_MODE_A = "SYNC" *) 
(* RST_MODE_B = "SYNC" *) (* SIM_ASSERT_CHK = "0" *) (* USE_EMBEDDED_CONSTRAINT = "0" *) 
(* USE_MEM_INIT = "0" *) (* USE_MEM_INIT_MMI = "0" *) (* VERSION = "0" *) 
(* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH_A = "12" *) (* WRITE_DATA_WIDTH_B = "12" *) 
(* WRITE_MODE_A = "2" *) (* WRITE_MODE_B = "1" *) (* WRITE_PROTECT = "1" *) 
(* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "soft" *) (* rsta_loop_iter = "12" *) 
(* rstb_loop_iter = "12" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base
   (sleep,
    clka,
    rsta,
    ena,
    regcea,
    wea,
    addra,
    dina,
    injectsbiterra,
    injectdbiterra,
    douta,
    sbiterra,
    dbiterra,
    clkb,
    rstb,
    enb,
    regceb,
    web,
    addrb,
    dinb,
    injectsbiterrb,
    injectdbiterrb,
    doutb,
    sbiterrb,
    dbiterrb);
  input sleep;
  input clka;
  input rsta;
  input ena;
  input regcea;
  input [0:0]wea;
  input [3:0]addra;
  input [11:0]dina;
  input injectsbiterra;
  input injectdbiterra;
  output [11:0]douta;
  output sbiterra;
  output dbiterra;
  input clkb;
  input rstb;
  input enb;
  input regceb;
  input [0:0]web;
  input [3:0]addrb;
  input [11:0]dinb;
  input injectsbiterrb;
  input injectdbiterrb;
  output [11:0]doutb;
  output sbiterrb;
  output dbiterrb;

  wire \<const0> ;
  wire [3:0]addra;
  wire [3:0]addrb;
  wire clka;
  wire [11:0]dina;
  wire [11:0]doutb;
  wire ena;
  wire enb;
  wire [11:0]\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg ;
  wire [11:0]\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 ;
  wire regceb;
  wire rstb;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOG_UNCONNECTED ;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOH_UNCONNECTED ;

  assign dbiterra = \<const0> ;
  assign dbiterrb = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  assign sbiterra = \<const0> ;
  assign sbiterrb = \<const0> ;
  GND GND
       (.G(\<const0> ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][0] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [0]),
        .Q(doutb[0]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][10] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [10]),
        .Q(doutb[10]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][11] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [11]),
        .Q(doutb[11]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][1] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [1]),
        .Q(doutb[1]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][2] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [2]),
        .Q(doutb[2]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][3] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [3]),
        .Q(doutb[3]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][4] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [4]),
        .Q(doutb[4]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][5] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [5]),
        .Q(doutb[5]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][6] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [6]),
        .Q(doutb[6]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][7] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [7]),
        .Q(doutb[7]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][8] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [8]),
        .Q(doutb[8]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][9] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [9]),
        .Q(doutb[9]),
        .R(rstb));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[0] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [0]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [0]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[10] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [10]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [10]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[11] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [11]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [11]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[1] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [1]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [1]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[2] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [2]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [2]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[3] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [3]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [3]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[4] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [4]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [4]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[5] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [5]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [5]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[6] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [6]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [6]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[7] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [7]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [7]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[8] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [8]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [8]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[9] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [9]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [9]),
        .R(1'b0));
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RTL_RAM_BITS = "192" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "distributed" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "15" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "0" *) 
  (* ram_slice_end = "11" *) 
  RAM32M16 #(
    .INIT_A(64'h0000000000000000),
    .INIT_B(64'h0000000000000000),
    .INIT_C(64'h0000000000000000),
    .INIT_D(64'h0000000000000000),
    .INIT_E(64'h0000000000000000),
    .INIT_F(64'h0000000000000000),
    .INIT_G(64'h0000000000000000),
    .INIT_H(64'h0000000000000000)) 
    \gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11 
       (.ADDRA({1'b0,addrb}),
        .ADDRB({1'b0,addrb}),
        .ADDRC({1'b0,addrb}),
        .ADDRD({1'b0,addrb}),
        .ADDRE({1'b0,addrb}),
        .ADDRF({1'b0,addrb}),
        .ADDRG({1'b0,addrb}),
        .ADDRH({1'b0,addra}),
        .DIA(dina[1:0]),
        .DIB(dina[3:2]),
        .DIC(dina[5:4]),
        .DID(dina[7:6]),
        .DIE(dina[9:8]),
        .DIF(dina[11:10]),
        .DIG({1'b0,1'b0}),
        .DIH({1'b0,1'b0}),
        .DOA(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [1:0]),
        .DOB(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [3:2]),
        .DOC(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [5:4]),
        .DOD(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [7:6]),
        .DOE(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [9:8]),
        .DOF(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [11:10]),
        .DOG(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOG_UNCONNECTED [1:0]),
        .DOH(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOH_UNCONNECTED [1:0]),
        .WCLK(clka),
        .WE(ena));
endmodule

(* ADDR_WIDTH_A = "4" *) (* ADDR_WIDTH_B = "4" *) (* AUTO_SLEEP_TIME = "0" *) 
(* BYTE_WRITE_WIDTH_A = "12" *) (* BYTE_WRITE_WIDTH_B = "12" *) (* CASCADE_HEIGHT = "0" *) 
(* CLOCKING_MODE = "0" *) (* ECC_BIT_RANGE = "[7:0]" *) (* ECC_MODE = "0" *) 
(* ECC_TYPE = "NONE" *) (* IGNORE_INIT_SYNTH = "0" *) (* MAX_NUM_CHAR = "0" *) 
(* MEMORY_INIT_FILE = "none" *) (* MEMORY_INIT_PARAM = "" *) (* MEMORY_OPTIMIZATION = "true" *) 
(* MEMORY_PRIMITIVE = "1" *) (* MEMORY_SIZE = "192" *) (* MEMORY_TYPE = "1" *) 
(* MESSAGE_CONTROL = "0" *) (* NUM_CHAR_LOC = "0" *) (* ORIG_REF_NAME = "xpm_memory_base" *) 
(* P_ECC_MODE = "0" *) (* P_ENABLE_BYTE_WRITE_A = "0" *) (* P_ENABLE_BYTE_WRITE_B = "0" *) 
(* P_MAX_DEPTH_DATA = "16" *) (* P_MEMORY_OPT = "yes" *) (* P_MEMORY_PRIMITIVE = "distributed" *) 
(* P_MIN_WIDTH_DATA = "12" *) (* P_MIN_WIDTH_DATA_A = "12" *) (* P_MIN_WIDTH_DATA_B = "12" *) 
(* P_MIN_WIDTH_DATA_ECC = "12" *) (* P_MIN_WIDTH_DATA_LDW = "4" *) (* P_MIN_WIDTH_DATA_SHFT = "12" *) 
(* P_NUM_COLS_WRITE_A = "1" *) (* P_NUM_COLS_WRITE_B = "1" *) (* P_NUM_ROWS_READ_A = "1" *) 
(* P_NUM_ROWS_READ_B = "1" *) (* P_NUM_ROWS_WRITE_A = "1" *) (* P_NUM_ROWS_WRITE_B = "1" *) 
(* P_SDP_WRITE_MODE = "yes" *) (* P_WIDTH_ADDR_LSB_READ_A = "0" *) (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
(* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) (* P_WIDTH_ADDR_READ_A = "4" *) 
(* P_WIDTH_ADDR_READ_B = "4" *) (* P_WIDTH_ADDR_WRITE_A = "4" *) (* P_WIDTH_ADDR_WRITE_B = "4" *) 
(* P_WIDTH_COL_WRITE_A = "12" *) (* P_WIDTH_COL_WRITE_B = "12" *) (* RAM_DECOMP = "auto" *) 
(* READ_DATA_WIDTH_A = "12" *) (* READ_DATA_WIDTH_B = "12" *) (* READ_LATENCY_A = "2" *) 
(* READ_LATENCY_B = "2" *) (* READ_RESET_VALUE_A = "0" *) (* READ_RESET_VALUE_B = "0" *) 
(* RST_MODE_A = "SYNC" *) (* RST_MODE_B = "SYNC" *) (* SIM_ASSERT_CHK = "0" *) 
(* USE_EMBEDDED_CONSTRAINT = "0" *) (* USE_MEM_INIT = "0" *) (* USE_MEM_INIT_MMI = "0" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH_A = "12" *) 
(* WRITE_DATA_WIDTH_B = "12" *) (* WRITE_MODE_A = "2" *) (* WRITE_MODE_B = "1" *) 
(* WRITE_PROTECT = "1" *) (* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "soft" *) 
(* rsta_loop_iter = "12" *) (* rstb_loop_iter = "12" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__4
   (sleep,
    clka,
    rsta,
    ena,
    regcea,
    wea,
    addra,
    dina,
    injectsbiterra,
    injectdbiterra,
    douta,
    sbiterra,
    dbiterra,
    clkb,
    rstb,
    enb,
    regceb,
    web,
    addrb,
    dinb,
    injectsbiterrb,
    injectdbiterrb,
    doutb,
    sbiterrb,
    dbiterrb);
  input sleep;
  input clka;
  input rsta;
  input ena;
  input regcea;
  input [0:0]wea;
  input [3:0]addra;
  input [11:0]dina;
  input injectsbiterra;
  input injectdbiterra;
  output [11:0]douta;
  output sbiterra;
  output dbiterra;
  input clkb;
  input rstb;
  input enb;
  input regceb;
  input [0:0]web;
  input [3:0]addrb;
  input [11:0]dinb;
  input injectsbiterrb;
  input injectdbiterrb;
  output [11:0]doutb;
  output sbiterrb;
  output dbiterrb;

  wire \<const0> ;
  wire [3:0]addra;
  wire [3:0]addrb;
  wire clka;
  wire [11:0]dina;
  wire [11:0]doutb;
  wire ena;
  wire enb;
  wire [11:0]\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg ;
  wire [11:0]\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 ;
  wire regceb;
  wire rstb;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOG_UNCONNECTED ;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOH_UNCONNECTED ;

  assign dbiterra = \<const0> ;
  assign dbiterrb = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  assign sbiterra = \<const0> ;
  assign sbiterrb = \<const0> ;
  GND GND
       (.G(\<const0> ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][0] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [0]),
        .Q(doutb[0]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][10] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [10]),
        .Q(doutb[10]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][11] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [11]),
        .Q(doutb[11]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][1] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [1]),
        .Q(doutb[1]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][2] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [2]),
        .Q(doutb[2]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][3] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [3]),
        .Q(doutb[3]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][4] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [4]),
        .Q(doutb[4]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][5] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [5]),
        .Q(doutb[5]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][6] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [6]),
        .Q(doutb[6]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][7] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [7]),
        .Q(doutb[7]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][8] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [8]),
        .Q(doutb[8]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][9] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [9]),
        .Q(doutb[9]),
        .R(rstb));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[0] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [0]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [0]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[10] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [10]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [10]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[11] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [11]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [11]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[1] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [1]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [1]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[2] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [2]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [2]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[3] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [3]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [3]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[4] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [4]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [4]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[5] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [5]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [5]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[6] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [6]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [6]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[7] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [7]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [7]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[8] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [8]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [8]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[9] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [9]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [9]),
        .R(1'b0));
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RTL_RAM_BITS = "192" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "distributed" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "15" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "0" *) 
  (* ram_slice_end = "11" *) 
  RAM32M16 #(
    .INIT_A(64'h0000000000000000),
    .INIT_B(64'h0000000000000000),
    .INIT_C(64'h0000000000000000),
    .INIT_D(64'h0000000000000000),
    .INIT_E(64'h0000000000000000),
    .INIT_F(64'h0000000000000000),
    .INIT_G(64'h0000000000000000),
    .INIT_H(64'h0000000000000000)) 
    \gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11 
       (.ADDRA({1'b0,addrb}),
        .ADDRB({1'b0,addrb}),
        .ADDRC({1'b0,addrb}),
        .ADDRD({1'b0,addrb}),
        .ADDRE({1'b0,addrb}),
        .ADDRF({1'b0,addrb}),
        .ADDRG({1'b0,addrb}),
        .ADDRH({1'b0,addra}),
        .DIA(dina[1:0]),
        .DIB(dina[3:2]),
        .DIC(dina[5:4]),
        .DID(dina[7:6]),
        .DIE(dina[9:8]),
        .DIF(dina[11:10]),
        .DIG({1'b0,1'b0}),
        .DIH({1'b0,1'b0}),
        .DOA(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [1:0]),
        .DOB(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [3:2]),
        .DOC(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [5:4]),
        .DOD(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [7:6]),
        .DOE(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [9:8]),
        .DOF(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [11:10]),
        .DOG(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOG_UNCONNECTED [1:0]),
        .DOH(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOH_UNCONNECTED [1:0]),
        .WCLK(clka),
        .WE(ena));
endmodule

(* ADDR_WIDTH_A = "4" *) (* ADDR_WIDTH_B = "4" *) (* AUTO_SLEEP_TIME = "0" *) 
(* BYTE_WRITE_WIDTH_A = "12" *) (* BYTE_WRITE_WIDTH_B = "12" *) (* CASCADE_HEIGHT = "0" *) 
(* CLOCKING_MODE = "0" *) (* ECC_BIT_RANGE = "[7:0]" *) (* ECC_MODE = "0" *) 
(* ECC_TYPE = "NONE" *) (* IGNORE_INIT_SYNTH = "0" *) (* MAX_NUM_CHAR = "0" *) 
(* MEMORY_INIT_FILE = "none" *) (* MEMORY_INIT_PARAM = "" *) (* MEMORY_OPTIMIZATION = "true" *) 
(* MEMORY_PRIMITIVE = "1" *) (* MEMORY_SIZE = "192" *) (* MEMORY_TYPE = "1" *) 
(* MESSAGE_CONTROL = "0" *) (* NUM_CHAR_LOC = "0" *) (* ORIG_REF_NAME = "xpm_memory_base" *) 
(* P_ECC_MODE = "0" *) (* P_ENABLE_BYTE_WRITE_A = "0" *) (* P_ENABLE_BYTE_WRITE_B = "0" *) 
(* P_MAX_DEPTH_DATA = "16" *) (* P_MEMORY_OPT = "yes" *) (* P_MEMORY_PRIMITIVE = "distributed" *) 
(* P_MIN_WIDTH_DATA = "12" *) (* P_MIN_WIDTH_DATA_A = "12" *) (* P_MIN_WIDTH_DATA_B = "12" *) 
(* P_MIN_WIDTH_DATA_ECC = "12" *) (* P_MIN_WIDTH_DATA_LDW = "4" *) (* P_MIN_WIDTH_DATA_SHFT = "12" *) 
(* P_NUM_COLS_WRITE_A = "1" *) (* P_NUM_COLS_WRITE_B = "1" *) (* P_NUM_ROWS_READ_A = "1" *) 
(* P_NUM_ROWS_READ_B = "1" *) (* P_NUM_ROWS_WRITE_A = "1" *) (* P_NUM_ROWS_WRITE_B = "1" *) 
(* P_SDP_WRITE_MODE = "yes" *) (* P_WIDTH_ADDR_LSB_READ_A = "0" *) (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
(* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) (* P_WIDTH_ADDR_READ_A = "4" *) 
(* P_WIDTH_ADDR_READ_B = "4" *) (* P_WIDTH_ADDR_WRITE_A = "4" *) (* P_WIDTH_ADDR_WRITE_B = "4" *) 
(* P_WIDTH_COL_WRITE_A = "12" *) (* P_WIDTH_COL_WRITE_B = "12" *) (* RAM_DECOMP = "auto" *) 
(* READ_DATA_WIDTH_A = "12" *) (* READ_DATA_WIDTH_B = "12" *) (* READ_LATENCY_A = "2" *) 
(* READ_LATENCY_B = "2" *) (* READ_RESET_VALUE_A = "0" *) (* READ_RESET_VALUE_B = "0" *) 
(* RST_MODE_A = "SYNC" *) (* RST_MODE_B = "SYNC" *) (* SIM_ASSERT_CHK = "0" *) 
(* USE_EMBEDDED_CONSTRAINT = "0" *) (* USE_MEM_INIT = "0" *) (* USE_MEM_INIT_MMI = "0" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH_A = "12" *) 
(* WRITE_DATA_WIDTH_B = "12" *) (* WRITE_MODE_A = "2" *) (* WRITE_MODE_B = "1" *) 
(* WRITE_PROTECT = "1" *) (* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "soft" *) 
(* rsta_loop_iter = "12" *) (* rstb_loop_iter = "12" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__5
   (sleep,
    clka,
    rsta,
    ena,
    regcea,
    wea,
    addra,
    dina,
    injectsbiterra,
    injectdbiterra,
    douta,
    sbiterra,
    dbiterra,
    clkb,
    rstb,
    enb,
    regceb,
    web,
    addrb,
    dinb,
    injectsbiterrb,
    injectdbiterrb,
    doutb,
    sbiterrb,
    dbiterrb);
  input sleep;
  input clka;
  input rsta;
  input ena;
  input regcea;
  input [0:0]wea;
  input [3:0]addra;
  input [11:0]dina;
  input injectsbiterra;
  input injectdbiterra;
  output [11:0]douta;
  output sbiterra;
  output dbiterra;
  input clkb;
  input rstb;
  input enb;
  input regceb;
  input [0:0]web;
  input [3:0]addrb;
  input [11:0]dinb;
  input injectsbiterrb;
  input injectdbiterrb;
  output [11:0]doutb;
  output sbiterrb;
  output dbiterrb;

  wire \<const0> ;
  wire [3:0]addra;
  wire [3:0]addrb;
  wire clka;
  wire [11:0]dina;
  wire [11:0]doutb;
  wire ena;
  wire enb;
  wire [11:0]\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg ;
  wire [11:0]\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 ;
  wire regceb;
  wire rstb;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOG_UNCONNECTED ;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOH_UNCONNECTED ;

  assign dbiterra = \<const0> ;
  assign dbiterrb = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  assign sbiterra = \<const0> ;
  assign sbiterrb = \<const0> ;
  GND GND
       (.G(\<const0> ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][0] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [0]),
        .Q(doutb[0]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][10] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [10]),
        .Q(doutb[10]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][11] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [11]),
        .Q(doutb[11]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][1] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [1]),
        .Q(doutb[1]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][2] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [2]),
        .Q(doutb[2]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][3] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [3]),
        .Q(doutb[3]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][4] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [4]),
        .Q(doutb[4]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][5] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [5]),
        .Q(doutb[5]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][6] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [6]),
        .Q(doutb[6]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][7] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [7]),
        .Q(doutb[7]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][8] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [8]),
        .Q(doutb[8]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][9] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [9]),
        .Q(doutb[9]),
        .R(rstb));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[0] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [0]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [0]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[10] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [10]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [10]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[11] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [11]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [11]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[1] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [1]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [1]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[2] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [2]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [2]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[3] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [3]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [3]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[4] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [4]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [4]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[5] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [5]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [5]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[6] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [6]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [6]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[7] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [7]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [7]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[8] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [8]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [8]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[9] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [9]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [9]),
        .R(1'b0));
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RTL_RAM_BITS = "192" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "distributed" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "15" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "0" *) 
  (* ram_slice_end = "11" *) 
  RAM32M16 #(
    .INIT_A(64'h0000000000000000),
    .INIT_B(64'h0000000000000000),
    .INIT_C(64'h0000000000000000),
    .INIT_D(64'h0000000000000000),
    .INIT_E(64'h0000000000000000),
    .INIT_F(64'h0000000000000000),
    .INIT_G(64'h0000000000000000),
    .INIT_H(64'h0000000000000000)) 
    \gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11 
       (.ADDRA({1'b0,addrb}),
        .ADDRB({1'b0,addrb}),
        .ADDRC({1'b0,addrb}),
        .ADDRD({1'b0,addrb}),
        .ADDRE({1'b0,addrb}),
        .ADDRF({1'b0,addrb}),
        .ADDRG({1'b0,addrb}),
        .ADDRH({1'b0,addra}),
        .DIA(dina[1:0]),
        .DIB(dina[3:2]),
        .DIC(dina[5:4]),
        .DID(dina[7:6]),
        .DIE(dina[9:8]),
        .DIF(dina[11:10]),
        .DIG({1'b0,1'b0}),
        .DIH({1'b0,1'b0}),
        .DOA(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [1:0]),
        .DOB(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [3:2]),
        .DOC(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [5:4]),
        .DOD(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [7:6]),
        .DOE(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [9:8]),
        .DOF(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [11:10]),
        .DOG(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOG_UNCONNECTED [1:0]),
        .DOH(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOH_UNCONNECTED [1:0]),
        .WCLK(clka),
        .WE(ena));
endmodule

(* ADDR_WIDTH_A = "4" *) (* ADDR_WIDTH_B = "4" *) (* AUTO_SLEEP_TIME = "0" *) 
(* BYTE_WRITE_WIDTH_A = "12" *) (* BYTE_WRITE_WIDTH_B = "12" *) (* CASCADE_HEIGHT = "0" *) 
(* CLOCKING_MODE = "0" *) (* ECC_BIT_RANGE = "[7:0]" *) (* ECC_MODE = "0" *) 
(* ECC_TYPE = "NONE" *) (* IGNORE_INIT_SYNTH = "0" *) (* MAX_NUM_CHAR = "0" *) 
(* MEMORY_INIT_FILE = "none" *) (* MEMORY_INIT_PARAM = "" *) (* MEMORY_OPTIMIZATION = "true" *) 
(* MEMORY_PRIMITIVE = "1" *) (* MEMORY_SIZE = "192" *) (* MEMORY_TYPE = "1" *) 
(* MESSAGE_CONTROL = "0" *) (* NUM_CHAR_LOC = "0" *) (* ORIG_REF_NAME = "xpm_memory_base" *) 
(* P_ECC_MODE = "0" *) (* P_ENABLE_BYTE_WRITE_A = "0" *) (* P_ENABLE_BYTE_WRITE_B = "0" *) 
(* P_MAX_DEPTH_DATA = "16" *) (* P_MEMORY_OPT = "yes" *) (* P_MEMORY_PRIMITIVE = "distributed" *) 
(* P_MIN_WIDTH_DATA = "12" *) (* P_MIN_WIDTH_DATA_A = "12" *) (* P_MIN_WIDTH_DATA_B = "12" *) 
(* P_MIN_WIDTH_DATA_ECC = "12" *) (* P_MIN_WIDTH_DATA_LDW = "4" *) (* P_MIN_WIDTH_DATA_SHFT = "12" *) 
(* P_NUM_COLS_WRITE_A = "1" *) (* P_NUM_COLS_WRITE_B = "1" *) (* P_NUM_ROWS_READ_A = "1" *) 
(* P_NUM_ROWS_READ_B = "1" *) (* P_NUM_ROWS_WRITE_A = "1" *) (* P_NUM_ROWS_WRITE_B = "1" *) 
(* P_SDP_WRITE_MODE = "yes" *) (* P_WIDTH_ADDR_LSB_READ_A = "0" *) (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
(* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) (* P_WIDTH_ADDR_READ_A = "4" *) 
(* P_WIDTH_ADDR_READ_B = "4" *) (* P_WIDTH_ADDR_WRITE_A = "4" *) (* P_WIDTH_ADDR_WRITE_B = "4" *) 
(* P_WIDTH_COL_WRITE_A = "12" *) (* P_WIDTH_COL_WRITE_B = "12" *) (* RAM_DECOMP = "auto" *) 
(* READ_DATA_WIDTH_A = "12" *) (* READ_DATA_WIDTH_B = "12" *) (* READ_LATENCY_A = "2" *) 
(* READ_LATENCY_B = "2" *) (* READ_RESET_VALUE_A = "0" *) (* READ_RESET_VALUE_B = "0" *) 
(* RST_MODE_A = "SYNC" *) (* RST_MODE_B = "SYNC" *) (* SIM_ASSERT_CHK = "0" *) 
(* USE_EMBEDDED_CONSTRAINT = "0" *) (* USE_MEM_INIT = "0" *) (* USE_MEM_INIT_MMI = "0" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH_A = "12" *) 
(* WRITE_DATA_WIDTH_B = "12" *) (* WRITE_MODE_A = "2" *) (* WRITE_MODE_B = "1" *) 
(* WRITE_PROTECT = "1" *) (* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "soft" *) 
(* rsta_loop_iter = "12" *) (* rstb_loop_iter = "12" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__6
   (sleep,
    clka,
    rsta,
    ena,
    regcea,
    wea,
    addra,
    dina,
    injectsbiterra,
    injectdbiterra,
    douta,
    sbiterra,
    dbiterra,
    clkb,
    rstb,
    enb,
    regceb,
    web,
    addrb,
    dinb,
    injectsbiterrb,
    injectdbiterrb,
    doutb,
    sbiterrb,
    dbiterrb);
  input sleep;
  input clka;
  input rsta;
  input ena;
  input regcea;
  input [0:0]wea;
  input [3:0]addra;
  input [11:0]dina;
  input injectsbiterra;
  input injectdbiterra;
  output [11:0]douta;
  output sbiterra;
  output dbiterra;
  input clkb;
  input rstb;
  input enb;
  input regceb;
  input [0:0]web;
  input [3:0]addrb;
  input [11:0]dinb;
  input injectsbiterrb;
  input injectdbiterrb;
  output [11:0]doutb;
  output sbiterrb;
  output dbiterrb;

  wire \<const0> ;
  wire [3:0]addra;
  wire [3:0]addrb;
  wire clka;
  wire [11:0]dina;
  wire [11:0]doutb;
  wire ena;
  wire enb;
  wire [11:0]\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg ;
  wire [11:0]\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 ;
  wire regceb;
  wire rstb;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOG_UNCONNECTED ;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOH_UNCONNECTED ;

  assign dbiterra = \<const0> ;
  assign dbiterrb = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  assign sbiterra = \<const0> ;
  assign sbiterrb = \<const0> ;
  GND GND
       (.G(\<const0> ));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][0] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [0]),
        .Q(doutb[0]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][10] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [10]),
        .Q(doutb[10]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][11] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [11]),
        .Q(doutb[11]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][1] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [1]),
        .Q(doutb[1]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][2] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [2]),
        .Q(doutb[2]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][3] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [3]),
        .Q(doutb[3]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][4] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [4]),
        .Q(doutb[4]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][5] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [5]),
        .Q(doutb[5]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][6] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [6]),
        .Q(doutb[6]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][7] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [7]),
        .Q(doutb[7]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][8] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [8]),
        .Q(doutb[8]),
        .R(rstb));
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_doutb_pipe.gen_stage.doutb_pipe_reg[0][9] 
       (.C(clka),
        .CE(regceb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [9]),
        .Q(doutb[9]),
        .R(rstb));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[0] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [0]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [0]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[10] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [10]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [10]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[11] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [11]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [11]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[1] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [1]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [1]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[2] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [2]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [2]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[3] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [3]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [3]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[4] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [4]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [4]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[5] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [5]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [5]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[6] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [6]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [6]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[7] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [7]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [7]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[8] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [8]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [8]),
        .R(1'b0));
  (* dram_emb_xdc = "no" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg[9] 
       (.C(clka),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [9]),
        .Q(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg [9]),
        .R(1'b0));
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RTL_RAM_BITS = "192" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "distributed" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "15" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "0" *) 
  (* ram_slice_end = "11" *) 
  RAM32M16 #(
    .INIT_A(64'h0000000000000000),
    .INIT_B(64'h0000000000000000),
    .INIT_C(64'h0000000000000000),
    .INIT_D(64'h0000000000000000),
    .INIT_E(64'h0000000000000000),
    .INIT_F(64'h0000000000000000),
    .INIT_G(64'h0000000000000000),
    .INIT_H(64'h0000000000000000)) 
    \gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11 
       (.ADDRA({1'b0,addrb}),
        .ADDRB({1'b0,addrb}),
        .ADDRC({1'b0,addrb}),
        .ADDRD({1'b0,addrb}),
        .ADDRE({1'b0,addrb}),
        .ADDRF({1'b0,addrb}),
        .ADDRG({1'b0,addrb}),
        .ADDRH({1'b0,addra}),
        .DIA(dina[1:0]),
        .DIB(dina[3:2]),
        .DIC(dina[5:4]),
        .DID(dina[7:6]),
        .DIE(dina[9:8]),
        .DIF(dina[11:10]),
        .DIG({1'b0,1'b0}),
        .DIH({1'b0,1'b0}),
        .DOA(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [1:0]),
        .DOB(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [3:2]),
        .DOC(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [5:4]),
        .DOD(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [7:6]),
        .DOE(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [9:8]),
        .DOF(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_pipe.doutb_reg_reg0 [11:10]),
        .DOG(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOG_UNCONNECTED [1:0]),
        .DOH(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_15_0_11_DOH_UNCONNECTED [1:0]),
        .WCLK(clka),
        .WE(ena));
endmodule

(* ADDR_WIDTH_A = "11" *) (* ADDR_WIDTH_B = "11" *) (* AUTO_SLEEP_TIME = "0" *) 
(* BYTE_WRITE_WIDTH_A = "68" *) (* BYTE_WRITE_WIDTH_B = "68" *) (* CASCADE_HEIGHT = "0" *) 
(* CLOCKING_MODE = "0" *) (* ECC_BIT_RANGE = "[7:0]" *) (* ECC_MODE = "0" *) 
(* ECC_TYPE = "NONE" *) (* IGNORE_INIT_SYNTH = "0" *) (* MAX_NUM_CHAR = "0" *) 
(* MEMORY_INIT_FILE = "none" *) (* MEMORY_INIT_PARAM = "" *) (* MEMORY_OPTIMIZATION = "true" *) 
(* MEMORY_PRIMITIVE = "2" *) (* MEMORY_SIZE = "139264" *) (* MEMORY_TYPE = "1" *) 
(* MESSAGE_CONTROL = "0" *) (* NUM_CHAR_LOC = "0" *) (* ORIG_REF_NAME = "xpm_memory_base" *) 
(* P_ECC_MODE = "0" *) (* P_ENABLE_BYTE_WRITE_A = "0" *) (* P_ENABLE_BYTE_WRITE_B = "0" *) 
(* P_MAX_DEPTH_DATA = "2048" *) (* P_MEMORY_OPT = "yes" *) (* P_MEMORY_PRIMITIVE = "block" *) 
(* P_MIN_WIDTH_DATA = "68" *) (* P_MIN_WIDTH_DATA_A = "68" *) (* P_MIN_WIDTH_DATA_B = "68" *) 
(* P_MIN_WIDTH_DATA_ECC = "68" *) (* P_MIN_WIDTH_DATA_LDW = "4" *) (* P_MIN_WIDTH_DATA_SHFT = "68" *) 
(* P_NUM_COLS_WRITE_A = "1" *) (* P_NUM_COLS_WRITE_B = "1" *) (* P_NUM_ROWS_READ_A = "1" *) 
(* P_NUM_ROWS_READ_B = "1" *) (* P_NUM_ROWS_WRITE_A = "1" *) (* P_NUM_ROWS_WRITE_B = "1" *) 
(* P_SDP_WRITE_MODE = "no" *) (* P_WIDTH_ADDR_LSB_READ_A = "0" *) (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
(* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) (* P_WIDTH_ADDR_READ_A = "11" *) 
(* P_WIDTH_ADDR_READ_B = "11" *) (* P_WIDTH_ADDR_WRITE_A = "11" *) (* P_WIDTH_ADDR_WRITE_B = "11" *) 
(* P_WIDTH_COL_WRITE_A = "68" *) (* P_WIDTH_COL_WRITE_B = "68" *) (* RAM_DECOMP = "auto" *) 
(* READ_DATA_WIDTH_A = "68" *) (* READ_DATA_WIDTH_B = "68" *) (* READ_LATENCY_A = "2" *) 
(* READ_LATENCY_B = "2" *) (* READ_RESET_VALUE_A = "0" *) (* READ_RESET_VALUE_B = "0" *) 
(* RST_MODE_A = "SYNC" *) (* RST_MODE_B = "SYNC" *) (* SIM_ASSERT_CHK = "0" *) 
(* USE_EMBEDDED_CONSTRAINT = "0" *) (* USE_MEM_INIT = "0" *) (* USE_MEM_INIT_MMI = "0" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH_A = "68" *) 
(* WRITE_DATA_WIDTH_B = "68" *) (* WRITE_MODE_A = "2" *) (* WRITE_MODE_B = "2" *) 
(* WRITE_PROTECT = "1" *) (* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "soft" *) 
(* rsta_loop_iter = "68" *) (* rstb_loop_iter = "68" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__parameterized0
   (sleep,
    clka,
    rsta,
    ena,
    regcea,
    wea,
    addra,
    dina,
    injectsbiterra,
    injectdbiterra,
    douta,
    sbiterra,
    dbiterra,
    clkb,
    rstb,
    enb,
    regceb,
    web,
    addrb,
    dinb,
    injectsbiterrb,
    injectdbiterrb,
    doutb,
    sbiterrb,
    dbiterrb);
  input sleep;
  input clka;
  input rsta;
  input ena;
  input regcea;
  input [0:0]wea;
  input [10:0]addra;
  input [67:0]dina;
  input injectsbiterra;
  input injectdbiterra;
  output [67:0]douta;
  output sbiterra;
  output dbiterra;
  input clkb;
  input rstb;
  input enb;
  input regceb;
  input [0:0]web;
  input [10:0]addrb;
  input [67:0]dinb;
  input injectsbiterrb;
  input injectdbiterrb;
  output [67:0]doutb;
  output sbiterrb;
  output dbiterrb;

  wire \<const0> ;
  wire [10:0]addra;
  wire [10:0]addrb;
  wire clka;
  wire [67:0]dina;
  wire [67:0]doutb;
  wire enb;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_1_n_0 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_2_n_0 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_3_n_0 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_0 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_1 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_136 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_137 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_138 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_139 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_36 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_37 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_38 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_39 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_40 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_41 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_42 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_43 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_44 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_45 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_46 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_47 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_48 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_49 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_50 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_51 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_52 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_53 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_54 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_55 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_56 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_57 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_58 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_59 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_60 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_61 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_62 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_63 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_64 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_65 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_66 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_67 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_1_n_0 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_2_n_0 ;
  wire \gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_3_n_0 ;
  wire regceb;
  wire rstb;
  wire [0:0]wea;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_DBITERR_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_SBITERR_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_CASDOUTA_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_CASDOUTPA_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_DOUTADOUT_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_DOUTBDOUT_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_DOUTPADOUTP_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_DOUTPBDOUTP_UNCONNECTED ;
  wire [7:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_ECCPARITY_UNCONNECTED ;
  wire [8:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_RDADDRECC_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASOUTDBITERR_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASOUTSBITERR_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_DBITERR_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_SBITERR_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASDOUTA_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASDOUTB_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASDOUTPA_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASDOUTPB_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_DOUTADOUT_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_DOUTPADOUTP_UNCONNECTED ;
  wire [7:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_ECCPARITY_UNCONNECTED ;
  wire [8:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_RDADDRECC_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASOUTDBITERR_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASOUTSBITERR_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_DBITERR_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_SBITERR_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASDOUTA_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASDOUTB_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASDOUTPA_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASDOUTPB_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_DOUTADOUT_UNCONNECTED ;
  wire [31:16]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_DOUTBDOUT_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_DOUTPADOUTP_UNCONNECTED ;
  wire [3:2]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_DOUTPBDOUTP_UNCONNECTED ;
  wire [7:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_ECCPARITY_UNCONNECTED ;
  wire [8:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_RDADDRECC_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASOUTDBITERR_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASOUTSBITERR_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_DBITERR_UNCONNECTED ;
  wire \NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_SBITERR_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASDOUTA_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASDOUTB_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASDOUTPA_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASDOUTPB_UNCONNECTED ;
  wire [31:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_DOUTADOUT_UNCONNECTED ;
  wire [31:14]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_DOUTBDOUT_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_DOUTPADOUTP_UNCONNECTED ;
  wire [3:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_DOUTPBDOUTP_UNCONNECTED ;
  wire [7:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_ECCPARITY_UNCONNECTED ;
  wire [8:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_RDADDRECC_UNCONNECTED ;

  assign dbiterra = \<const0> ;
  assign dbiterrb = \<const0> ;
  assign douta[67] = \<const0> ;
  assign douta[66] = \<const0> ;
  assign douta[65] = \<const0> ;
  assign douta[64] = \<const0> ;
  assign douta[63] = \<const0> ;
  assign douta[62] = \<const0> ;
  assign douta[61] = \<const0> ;
  assign douta[60] = \<const0> ;
  assign douta[59] = \<const0> ;
  assign douta[58] = \<const0> ;
  assign douta[57] = \<const0> ;
  assign douta[56] = \<const0> ;
  assign douta[55] = \<const0> ;
  assign douta[54] = \<const0> ;
  assign douta[53] = \<const0> ;
  assign douta[52] = \<const0> ;
  assign douta[51] = \<const0> ;
  assign douta[50] = \<const0> ;
  assign douta[49] = \<const0> ;
  assign douta[48] = \<const0> ;
  assign douta[47] = \<const0> ;
  assign douta[46] = \<const0> ;
  assign douta[45] = \<const0> ;
  assign douta[44] = \<const0> ;
  assign douta[43] = \<const0> ;
  assign douta[42] = \<const0> ;
  assign douta[41] = \<const0> ;
  assign douta[40] = \<const0> ;
  assign douta[39] = \<const0> ;
  assign douta[38] = \<const0> ;
  assign douta[37] = \<const0> ;
  assign douta[36] = \<const0> ;
  assign douta[35] = \<const0> ;
  assign douta[34] = \<const0> ;
  assign douta[33] = \<const0> ;
  assign douta[32] = \<const0> ;
  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  assign sbiterra = \<const0> ;
  assign sbiterrb = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* \MEM.PORTA.ADDRESS_BEGIN  = "0" *) 
  (* \MEM.PORTA.ADDRESS_END  = "1023" *) 
  (* \MEM.PORTA.DATA_BIT_LAYOUT  = "p4_d32" *) 
  (* \MEM.PORTA.DATA_LSB  = "0" *) 
  (* \MEM.PORTA.DATA_MSB  = "35" *) 
  (* \MEM.PORTB.ADDRESS_BEGIN  = "0" *) 
  (* \MEM.PORTB.ADDRESS_END  = "1023" *) 
  (* \MEM.PORTB.DATA_BIT_LAYOUT  = "p4_d32" *) 
  (* \MEM.PORTB.DATA_LSB  = "0" *) 
  (* \MEM.PORTB.DATA_MSB  = "35" *) 
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RDADDR_COLLISION_HWCONFIG = "DELAYED_WRITE" *) 
  (* RTL_RAM_BITS = "139264" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "block" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "1023" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "0" *) 
  (* ram_slice_end = "35" *) 
  RAMB36E2 #(
    .CASCADE_ORDER_A("NONE"),
    .CASCADE_ORDER_B("FIRST"),
    .CLOCK_DOMAINS("COMMON"),
    .DOA_REG(0),
    .DOB_REG(0),
    .ENADDRENA("FALSE"),
    .ENADDRENB("FALSE"),
    .EN_ECC_PIPE("FALSE"),
    .EN_ECC_READ("FALSE"),
    .EN_ECC_WRITE("FALSE"),
    .INITP_00(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_01(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_02(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_03(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_04(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_05(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_06(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_07(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_08(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_09(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_00(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_01(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_02(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_03(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_04(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_05(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_06(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_07(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_08(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_09(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_10(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_11(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_12(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_13(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_14(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_15(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_16(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_17(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_18(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_19(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_20(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_21(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_22(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_23(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_24(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_25(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_26(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_27(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_28(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_29(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_30(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_31(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_32(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_33(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_34(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_35(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_36(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_37(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_38(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_39(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_40(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_41(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_42(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_43(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_44(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_45(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_46(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_47(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_48(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_49(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_50(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_51(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_52(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_53(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_54(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_55(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_56(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_57(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_58(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_59(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_60(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_61(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_62(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_63(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_64(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_65(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_66(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_67(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_68(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_69(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_70(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_71(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_72(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_73(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_74(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_75(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_76(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_77(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_78(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_79(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_A(36'h000000000),
    .INIT_B(36'h000000000),
    .INIT_FILE("NONE"),
    .RDADDRCHANGEA("FALSE"),
    .RDADDRCHANGEB("FALSE"),
    .READ_WIDTH_A(36),
    .READ_WIDTH_B(36),
    .RSTREG_PRIORITY_A("RSTREG"),
    .RSTREG_PRIORITY_B("RSTREG"),
    .SIM_COLLISION_CHECK("ALL"),
    .SLEEP_ASYNC("FALSE"),
    .SRVAL_A(36'h000000000),
    .SRVAL_B(36'h000000000),
    .WRITE_MODE_A("NO_CHANGE"),
    .WRITE_MODE_B("NO_CHANGE"),
    .WRITE_WIDTH_A(36),
    .WRITE_WIDTH_B(36)) 
    \gen_wr_a.gen_word_narrow.mem_reg_bram_0 
       (.ADDRARDADDR({addra[9:0],1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ADDRBWRADDR({addrb[9:0],1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ADDRENA(1'b1),
        .ADDRENB(1'b1),
        .CASDIMUXA(1'b0),
        .CASDIMUXB(1'b0),
        .CASDINA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CASDINB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CASDINPA({1'b0,1'b0,1'b0,1'b0}),
        .CASDINPB({1'b0,1'b0,1'b0,1'b0}),
        .CASDOMUXA(1'b0),
        .CASDOMUXB(1'b0),
        .CASDOMUXEN_A(1'b1),
        .CASDOMUXEN_B(1'b1),
        .CASDOUTA(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_CASDOUTA_UNCONNECTED [31:0]),
        .CASDOUTB({\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_36 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_37 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_38 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_39 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_40 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_41 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_42 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_43 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_44 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_45 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_46 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_47 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_48 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_49 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_50 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_51 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_52 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_53 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_54 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_55 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_56 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_57 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_58 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_59 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_60 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_61 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_62 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_63 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_64 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_65 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_66 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_67 }),
        .CASDOUTPA(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_CASDOUTPA_UNCONNECTED [3:0]),
        .CASDOUTPB({\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_136 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_137 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_138 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_139 }),
        .CASINDBITERR(1'b0),
        .CASINSBITERR(1'b0),
        .CASOREGIMUXA(1'b0),
        .CASOREGIMUXB(1'b0),
        .CASOREGIMUXEN_A(1'b1),
        .CASOREGIMUXEN_B(1'b1),
        .CASOUTDBITERR(\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_0 ),
        .CASOUTSBITERR(\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_1 ),
        .CLKARDCLK(clka),
        .CLKBWRCLK(clka),
        .DBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_DBITERR_UNCONNECTED ),
        .DINADIN(dina[31:0]),
        .DINBDIN({1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1}),
        .DINPADINP(dina[35:32]),
        .DINPBDINP({1'b1,1'b1,1'b1,1'b1}),
        .DOUTADOUT(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_DOUTADOUT_UNCONNECTED [31:0]),
        .DOUTBDOUT(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_DOUTBDOUT_UNCONNECTED [31:0]),
        .DOUTPADOUTP(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_DOUTPADOUTP_UNCONNECTED [3:0]),
        .DOUTPBDOUTP(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_DOUTPBDOUTP_UNCONNECTED [3:0]),
        .ECCPARITY(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_ECCPARITY_UNCONNECTED [7:0]),
        .ECCPIPECE(1'b1),
        .ENARDEN(\gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_1_n_0 ),
        .ENBWREN(\gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_2_n_0 ),
        .INJECTDBITERR(1'b0),
        .INJECTSBITERR(1'b0),
        .RDADDRECC(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_RDADDRECC_UNCONNECTED [8:0]),
        .REGCEAREGCE(1'b1),
        .REGCEB(1'b1),
        .RSTRAMARSTRAM(1'b0),
        .RSTRAMB(1'b0),
        .RSTREGARSTREG(1'b0),
        .RSTREGB(1'b0),
        .SBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_0_SBITERR_UNCONNECTED ),
        .SLEEP(1'b0),
        .WEA({\gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_3_n_0 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_3_n_0 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_3_n_0 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_3_n_0 }),
        .WEBWE({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}));
  LUT1 #(
    .INIT(2'h1)) 
    \gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_1 
       (.I0(addra[10]),
        .O(\gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair321" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_2 
       (.I0(enb),
        .I1(addrb[10]),
        .O(\gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair320" *) 
  LUT2 #(
    .INIT(4'h2)) 
    \gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_3 
       (.I0(wea),
        .I1(addra[10]),
        .O(\gen_wr_a.gen_word_narrow.mem_reg_bram_0_i_3_n_0 ));
  (* \MEM.PORTA.ADDRESS_BEGIN  = "1024" *) 
  (* \MEM.PORTA.ADDRESS_END  = "2047" *) 
  (* \MEM.PORTA.DATA_BIT_LAYOUT  = "p4_d32" *) 
  (* \MEM.PORTA.DATA_LSB  = "0" *) 
  (* \MEM.PORTA.DATA_MSB  = "35" *) 
  (* \MEM.PORTB.ADDRESS_BEGIN  = "1024" *) 
  (* \MEM.PORTB.ADDRESS_END  = "2047" *) 
  (* \MEM.PORTB.DATA_BIT_LAYOUT  = "p4_d32" *) 
  (* \MEM.PORTB.DATA_LSB  = "0" *) 
  (* \MEM.PORTB.DATA_MSB  = "35" *) 
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RDADDR_COLLISION_HWCONFIG = "DELAYED_WRITE" *) 
  (* RTL_RAM_BITS = "139264" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "block" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* ram_addr_begin = "1024" *) 
  (* ram_addr_end = "2047" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "0" *) 
  (* ram_slice_end = "35" *) 
  RAMB36E2 #(
    .CASCADE_ORDER_A("NONE"),
    .CASCADE_ORDER_B("LAST"),
    .CLOCK_DOMAINS("COMMON"),
    .DOA_REG(0),
    .DOB_REG(1),
    .ENADDRENA("FALSE"),
    .ENADDRENB("FALSE"),
    .EN_ECC_PIPE("FALSE"),
    .EN_ECC_READ("FALSE"),
    .EN_ECC_WRITE("FALSE"),
    .INITP_00(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_01(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_02(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_03(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_04(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_05(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_06(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_07(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_08(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_09(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_00(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_01(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_02(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_03(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_04(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_05(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_06(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_07(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_08(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_09(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_10(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_11(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_12(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_13(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_14(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_15(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_16(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_17(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_18(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_19(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_20(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_21(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_22(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_23(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_24(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_25(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_26(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_27(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_28(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_29(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2F(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_36(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_37(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_38(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_3A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3C(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_48(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_4B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4D(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_51(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_59(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_5B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5D(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_61(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_65(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_67(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_68(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_69(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6E(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_72(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_73(256'h0000000000000000000000000000000000000000000000000000000000000000),
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    .INIT_75(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_76(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_77(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_78(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_79(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_A(36'h000000000),
    .INIT_B(36'h000000000),
    .INIT_FILE("NONE"),
    .RDADDRCHANGEA("FALSE"),
    .RDADDRCHANGEB("FALSE"),
    .READ_WIDTH_A(36),
    .READ_WIDTH_B(36),
    .RSTREG_PRIORITY_A("RSTREG"),
    .RSTREG_PRIORITY_B("RSTREG"),
    .SIM_COLLISION_CHECK("ALL"),
    .SLEEP_ASYNC("FALSE"),
    .SRVAL_A(36'h000000000),
    .SRVAL_B(36'h000000000),
    .WRITE_MODE_A("NO_CHANGE"),
    .WRITE_MODE_B("NO_CHANGE"),
    .WRITE_WIDTH_A(36),
    .WRITE_WIDTH_B(36)) 
    \gen_wr_a.gen_word_narrow.mem_reg_bram_1 
       (.ADDRARDADDR({addra[9:0],1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ADDRBWRADDR({addrb[9:0],1'b0,1'b0,1'b0,1'b0,1'b0}),
        .ADDRENA(1'b1),
        .ADDRENB(1'b1),
        .CASDIMUXA(1'b0),
        .CASDIMUXB(1'b0),
        .CASDINA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CASDINB({\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_36 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_37 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_38 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_39 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_40 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_41 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_42 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_43 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_44 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_45 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_46 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_47 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_48 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_49 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_50 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_51 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_52 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_53 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_54 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_55 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_56 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_57 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_58 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_59 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_60 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_61 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_62 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_63 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_64 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_65 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_66 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_67 }),
        .CASDINPA({1'b0,1'b0,1'b0,1'b0}),
        .CASDINPB({\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_136 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_137 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_138 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_139 }),
        .CASDOMUXA(1'b0),
        .CASDOMUXB(1'b0),
        .CASDOMUXEN_A(1'b1),
        .CASDOMUXEN_B(1'b0),
        .CASDOUTA(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASDOUTA_UNCONNECTED [31:0]),
        .CASDOUTB(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASDOUTB_UNCONNECTED [31:0]),
        .CASDOUTPA(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASDOUTPA_UNCONNECTED [3:0]),
        .CASDOUTPB(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASDOUTPB_UNCONNECTED [3:0]),
        .CASINDBITERR(\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_0 ),
        .CASINSBITERR(\gen_wr_a.gen_word_narrow.mem_reg_bram_0_n_1 ),
        .CASOREGIMUXA(1'b0),
        .CASOREGIMUXB(\gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_1_n_0 ),
        .CASOREGIMUXEN_A(1'b1),
        .CASOREGIMUXEN_B(enb),
        .CASOUTDBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASOUTDBITERR_UNCONNECTED ),
        .CASOUTSBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_CASOUTSBITERR_UNCONNECTED ),
        .CLKARDCLK(clka),
        .CLKBWRCLK(clka),
        .DBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_DBITERR_UNCONNECTED ),
        .DINADIN(dina[31:0]),
        .DINBDIN({1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1}),
        .DINPADINP(dina[35:32]),
        .DINPBDINP({1'b1,1'b1,1'b1,1'b1}),
        .DOUTADOUT(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_DOUTADOUT_UNCONNECTED [31:0]),
        .DOUTBDOUT(doutb[31:0]),
        .DOUTPADOUTP(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_DOUTPADOUTP_UNCONNECTED [3:0]),
        .DOUTPBDOUTP(doutb[35:32]),
        .ECCPARITY(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_ECCPARITY_UNCONNECTED [7:0]),
        .ECCPIPECE(1'b1),
        .ENARDEN(addra[10]),
        .ENBWREN(\gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_2_n_0 ),
        .INJECTDBITERR(1'b0),
        .INJECTSBITERR(1'b0),
        .RDADDRECC(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_RDADDRECC_UNCONNECTED [8:0]),
        .REGCEAREGCE(1'b1),
        .REGCEB(regceb),
        .RSTRAMARSTRAM(1'b0),
        .RSTRAMB(1'b0),
        .RSTREGARSTREG(1'b0),
        .RSTREGB(rstb),
        .SBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_1_SBITERR_UNCONNECTED ),
        .SLEEP(1'b0),
        .WEA({\gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_3_n_0 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_3_n_0 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_3_n_0 ,\gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_3_n_0 }),
        .WEBWE({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}));
  LUT1 #(
    .INIT(2'h1)) 
    \gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_1 
       (.I0(addrb[10]),
        .O(\gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_1_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair321" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_2 
       (.I0(enb),
        .I1(addrb[10]),
        .O(\gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_2_n_0 ));
  (* SOFT_HLUTNM = "soft_lutpair320" *) 
  LUT2 #(
    .INIT(4'h8)) 
    \gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_3 
       (.I0(wea),
        .I1(addra[10]),
        .O(\gen_wr_a.gen_word_narrow.mem_reg_bram_1_i_3_n_0 ));
  (* \MEM.PORTA.ADDRESS_BEGIN  = "0" *) 
  (* \MEM.PORTA.ADDRESS_END  = "2047" *) 
  (* \MEM.PORTA.DATA_BIT_LAYOUT  = "p2_d16" *) 
  (* \MEM.PORTA.DATA_LSB  = "36" *) 
  (* \MEM.PORTA.DATA_MSB  = "53" *) 
  (* \MEM.PORTB.ADDRESS_BEGIN  = "0" *) 
  (* \MEM.PORTB.ADDRESS_END  = "2047" *) 
  (* \MEM.PORTB.DATA_BIT_LAYOUT  = "p2_d16" *) 
  (* \MEM.PORTB.DATA_LSB  = "36" *) 
  (* \MEM.PORTB.DATA_MSB  = "53" *) 
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RDADDR_COLLISION_HWCONFIG = "DELAYED_WRITE" *) 
  (* RTL_RAM_BITS = "139264" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "block" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "2047" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "36" *) 
  (* ram_slice_end = "53" *) 
  RAMB36E2 #(
    .CASCADE_ORDER_A("NONE"),
    .CASCADE_ORDER_B("NONE"),
    .CLOCK_DOMAINS("COMMON"),
    .DOA_REG(0),
    .DOB_REG(1),
    .ENADDRENA("FALSE"),
    .ENADDRENB("FALSE"),
    .EN_ECC_PIPE("FALSE"),
    .EN_ECC_READ("FALSE"),
    .EN_ECC_WRITE("FALSE"),
    .INITP_00(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_01(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_02(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_03(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_04(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_05(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_06(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_07(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_08(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_09(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_00(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_01(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_02(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_03(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_04(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_05(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_06(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_07(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_08(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_09(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_10(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_11(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_12(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_13(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_14(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_15(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_16(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_17(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_18(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_19(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_20(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_21(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_22(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_23(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_24(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_25(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_26(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_27(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_28(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_29(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_30(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_31(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_32(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_33(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_34(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_35(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_36(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_37(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_38(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_39(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_40(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_41(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_42(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_43(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_44(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_45(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_46(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_47(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_48(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_49(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_50(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_51(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_52(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_53(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_54(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_55(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_56(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_57(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_58(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_59(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_60(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_61(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_62(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_63(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_64(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_65(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_66(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_67(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_68(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_69(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_70(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_71(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_72(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_73(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_74(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_75(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_76(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_77(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_78(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_79(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_A(36'h000000000),
    .INIT_B(36'h000000000),
    .INIT_FILE("NONE"),
    .RDADDRCHANGEA("FALSE"),
    .RDADDRCHANGEB("FALSE"),
    .READ_WIDTH_A(18),
    .READ_WIDTH_B(18),
    .RSTREG_PRIORITY_A("RSTREG"),
    .RSTREG_PRIORITY_B("RSTREG"),
    .SIM_COLLISION_CHECK("ALL"),
    .SLEEP_ASYNC("FALSE"),
    .SRVAL_A(36'h000000000),
    .SRVAL_B(36'h000000000),
    .WRITE_MODE_A("NO_CHANGE"),
    .WRITE_MODE_B("NO_CHANGE"),
    .WRITE_WIDTH_A(18),
    .WRITE_WIDTH_B(18)) 
    \gen_wr_a.gen_word_narrow.mem_reg_bram_2 
       (.ADDRARDADDR({addra,1'b0,1'b0,1'b0,1'b0}),
        .ADDRBWRADDR({addrb,1'b0,1'b0,1'b0,1'b0}),
        .ADDRENA(1'b1),
        .ADDRENB(1'b1),
        .CASDIMUXA(1'b0),
        .CASDIMUXB(1'b0),
        .CASDINA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CASDINB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CASDINPA({1'b0,1'b0,1'b0,1'b0}),
        .CASDINPB({1'b0,1'b0,1'b0,1'b0}),
        .CASDOMUXA(1'b0),
        .CASDOMUXB(1'b0),
        .CASDOMUXEN_A(1'b1),
        .CASDOMUXEN_B(1'b1),
        .CASDOUTA(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASDOUTA_UNCONNECTED [31:0]),
        .CASDOUTB(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASDOUTB_UNCONNECTED [31:0]),
        .CASDOUTPA(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASDOUTPA_UNCONNECTED [3:0]),
        .CASDOUTPB(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASDOUTPB_UNCONNECTED [3:0]),
        .CASINDBITERR(1'b0),
        .CASINSBITERR(1'b0),
        .CASOREGIMUXA(1'b0),
        .CASOREGIMUXB(1'b0),
        .CASOREGIMUXEN_A(1'b1),
        .CASOREGIMUXEN_B(1'b1),
        .CASOUTDBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASOUTDBITERR_UNCONNECTED ),
        .CASOUTSBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_CASOUTSBITERR_UNCONNECTED ),
        .CLKARDCLK(clka),
        .CLKBWRCLK(clka),
        .DBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_DBITERR_UNCONNECTED ),
        .DINADIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,dina[51:36]}),
        .DINBDIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1}),
        .DINPADINP({1'b0,1'b0,dina[53:52]}),
        .DINPBDINP({1'b0,1'b0,1'b1,1'b1}),
        .DOUTADOUT(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_DOUTADOUT_UNCONNECTED [31:0]),
        .DOUTBDOUT({\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_DOUTBDOUT_UNCONNECTED [31:16],doutb[51:36]}),
        .DOUTPADOUTP(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_DOUTPADOUTP_UNCONNECTED [3:0]),
        .DOUTPBDOUTP({\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_DOUTPBDOUTP_UNCONNECTED [3:2],doutb[53:52]}),
        .ECCPARITY(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_ECCPARITY_UNCONNECTED [7:0]),
        .ECCPIPECE(1'b1),
        .ENARDEN(1'b1),
        .ENBWREN(enb),
        .INJECTDBITERR(1'b0),
        .INJECTSBITERR(1'b0),
        .RDADDRECC(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_RDADDRECC_UNCONNECTED [8:0]),
        .REGCEAREGCE(1'b1),
        .REGCEB(regceb),
        .RSTRAMARSTRAM(1'b0),
        .RSTRAMB(1'b0),
        .RSTREGARSTREG(1'b0),
        .RSTREGB(rstb),
        .SBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_2_SBITERR_UNCONNECTED ),
        .SLEEP(1'b0),
        .WEA({wea,wea,wea,wea}),
        .WEBWE({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}));
  (* \MEM.PORTA.ADDRESS_BEGIN  = "0" *) 
  (* \MEM.PORTA.ADDRESS_END  = "2047" *) 
  (* \MEM.PORTA.DATA_BIT_LAYOUT  = "p0_d14" *) 
  (* \MEM.PORTA.DATA_LSB  = "54" *) 
  (* \MEM.PORTA.DATA_MSB  = "67" *) 
  (* \MEM.PORTB.ADDRESS_BEGIN  = "0" *) 
  (* \MEM.PORTB.ADDRESS_END  = "2047" *) 
  (* \MEM.PORTB.DATA_BIT_LAYOUT  = "p0_d14" *) 
  (* \MEM.PORTB.DATA_LSB  = "54" *) 
  (* \MEM.PORTB.DATA_MSB  = "67" *) 
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RDADDR_COLLISION_HWCONFIG = "DELAYED_WRITE" *) 
  (* RTL_RAM_BITS = "139264" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "block" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "2047" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "54" *) 
  (* ram_slice_end = "67" *) 
  RAMB36E2 #(
    .CASCADE_ORDER_A("NONE"),
    .CASCADE_ORDER_B("NONE"),
    .CLOCK_DOMAINS("COMMON"),
    .DOA_REG(0),
    .DOB_REG(1),
    .ENADDRENA("FALSE"),
    .ENADDRENB("FALSE"),
    .EN_ECC_PIPE("FALSE"),
    .EN_ECC_READ("FALSE"),
    .EN_ECC_WRITE("FALSE"),
    .INITP_00(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_01(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_02(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_03(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_04(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_05(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_06(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_07(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_08(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_09(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INITP_0F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_00(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_01(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_02(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_03(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_04(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_05(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_06(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_07(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_08(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_09(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_0F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_10(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_11(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_12(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_13(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_14(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_15(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_16(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_17(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_18(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_19(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_1F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_20(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_21(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_22(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_23(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_24(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_25(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_26(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_27(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_28(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_29(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_2F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_30(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_31(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_32(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_33(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_34(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_35(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_36(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_37(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_38(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_39(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_3F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_40(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_41(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_42(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_43(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_44(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_45(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_46(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_47(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_48(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_49(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_4F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_50(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_51(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_52(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_53(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_54(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_55(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_56(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_57(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_58(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_59(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_5F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_60(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_61(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_62(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_63(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_64(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_65(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_66(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_67(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_68(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_69(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_6F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_70(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_71(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_72(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_73(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_74(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_75(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_76(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_77(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_78(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_79(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7A(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7B(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7C(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7D(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7E(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_7F(256'h0000000000000000000000000000000000000000000000000000000000000000),
    .INIT_A(36'h000000000),
    .INIT_B(36'h000000000),
    .INIT_FILE("NONE"),
    .RDADDRCHANGEA("FALSE"),
    .RDADDRCHANGEB("FALSE"),
    .READ_WIDTH_A(18),
    .READ_WIDTH_B(18),
    .RSTREG_PRIORITY_A("RSTREG"),
    .RSTREG_PRIORITY_B("RSTREG"),
    .SIM_COLLISION_CHECK("ALL"),
    .SLEEP_ASYNC("FALSE"),
    .SRVAL_A(36'h000000000),
    .SRVAL_B(36'h000000000),
    .WRITE_MODE_A("NO_CHANGE"),
    .WRITE_MODE_B("NO_CHANGE"),
    .WRITE_WIDTH_A(18),
    .WRITE_WIDTH_B(18)) 
    \gen_wr_a.gen_word_narrow.mem_reg_bram_3 
       (.ADDRARDADDR({addra,1'b0,1'b0,1'b0,1'b0}),
        .ADDRBWRADDR({addrb,1'b0,1'b0,1'b0,1'b0}),
        .ADDRENA(1'b1),
        .ADDRENB(1'b1),
        .CASDIMUXA(1'b0),
        .CASDIMUXB(1'b0),
        .CASDINA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CASDINB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
        .CASDINPA({1'b0,1'b0,1'b0,1'b0}),
        .CASDINPB({1'b0,1'b0,1'b0,1'b0}),
        .CASDOMUXA(1'b0),
        .CASDOMUXB(1'b0),
        .CASDOMUXEN_A(1'b1),
        .CASDOMUXEN_B(1'b1),
        .CASDOUTA(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASDOUTA_UNCONNECTED [31:0]),
        .CASDOUTB(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASDOUTB_UNCONNECTED [31:0]),
        .CASDOUTPA(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASDOUTPA_UNCONNECTED [3:0]),
        .CASDOUTPB(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASDOUTPB_UNCONNECTED [3:0]),
        .CASINDBITERR(1'b0),
        .CASINSBITERR(1'b0),
        .CASOREGIMUXA(1'b0),
        .CASOREGIMUXB(1'b0),
        .CASOREGIMUXEN_A(1'b1),
        .CASOREGIMUXEN_B(1'b1),
        .CASOUTDBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASOUTDBITERR_UNCONNECTED ),
        .CASOUTSBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_CASOUTSBITERR_UNCONNECTED ),
        .CLKARDCLK(clka),
        .CLKBWRCLK(clka),
        .DBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_DBITERR_UNCONNECTED ),
        .DINADIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,dina[67:54]}),
        .DINBDIN({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1,1'b1}),
        .DINPADINP({1'b0,1'b0,1'b0,1'b0}),
        .DINPBDINP({1'b0,1'b0,1'b0,1'b0}),
        .DOUTADOUT(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_DOUTADOUT_UNCONNECTED [31:0]),
        .DOUTBDOUT({\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_DOUTBDOUT_UNCONNECTED [31:14],doutb[67:54]}),
        .DOUTPADOUTP(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_DOUTPADOUTP_UNCONNECTED [3:0]),
        .DOUTPBDOUTP(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_DOUTPBDOUTP_UNCONNECTED [3:0]),
        .ECCPARITY(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_ECCPARITY_UNCONNECTED [7:0]),
        .ECCPIPECE(1'b1),
        .ENARDEN(1'b1),
        .ENBWREN(enb),
        .INJECTDBITERR(1'b0),
        .INJECTSBITERR(1'b0),
        .RDADDRECC(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_RDADDRECC_UNCONNECTED [8:0]),
        .REGCEAREGCE(1'b1),
        .REGCEB(regceb),
        .RSTRAMARSTRAM(1'b0),
        .RSTRAMB(1'b0),
        .RSTREGARSTREG(1'b0),
        .RSTREGB(rstb),
        .SBITERR(\NLW_gen_wr_a.gen_word_narrow.mem_reg_bram_3_SBITERR_UNCONNECTED ),
        .SLEEP(1'b0),
        .WEA({wea,wea,wea,wea}),
        .WEBWE({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}));
endmodule

(* ADDR_WIDTH_A = "5" *) (* ADDR_WIDTH_B = "5" *) (* AUTO_SLEEP_TIME = "0" *) 
(* BYTE_WRITE_WIDTH_A = "26" *) (* BYTE_WRITE_WIDTH_B = "26" *) (* CASCADE_HEIGHT = "0" *) 
(* CLOCKING_MODE = "1" *) (* ECC_BIT_RANGE = "[7:0]" *) (* ECC_MODE = "0" *) 
(* ECC_TYPE = "NONE" *) (* IGNORE_INIT_SYNTH = "0" *) (* MAX_NUM_CHAR = "0" *) 
(* MEMORY_INIT_FILE = "none" *) (* MEMORY_INIT_PARAM = "" *) (* MEMORY_OPTIMIZATION = "true" *) 
(* MEMORY_PRIMITIVE = "1" *) (* MEMORY_SIZE = "832" *) (* MEMORY_TYPE = "1" *) 
(* MESSAGE_CONTROL = "0" *) (* NUM_CHAR_LOC = "0" *) (* ORIG_REF_NAME = "xpm_memory_base" *) 
(* P_ECC_MODE = "0" *) (* P_ENABLE_BYTE_WRITE_A = "0" *) (* P_ENABLE_BYTE_WRITE_B = "0" *) 
(* P_MAX_DEPTH_DATA = "32" *) (* P_MEMORY_OPT = "yes" *) (* P_MEMORY_PRIMITIVE = "distributed" *) 
(* P_MIN_WIDTH_DATA = "26" *) (* P_MIN_WIDTH_DATA_A = "26" *) (* P_MIN_WIDTH_DATA_B = "26" *) 
(* P_MIN_WIDTH_DATA_ECC = "26" *) (* P_MIN_WIDTH_DATA_LDW = "4" *) (* P_MIN_WIDTH_DATA_SHFT = "26" *) 
(* P_NUM_COLS_WRITE_A = "1" *) (* P_NUM_COLS_WRITE_B = "1" *) (* P_NUM_ROWS_READ_A = "1" *) 
(* P_NUM_ROWS_READ_B = "1" *) (* P_NUM_ROWS_WRITE_A = "1" *) (* P_NUM_ROWS_WRITE_B = "1" *) 
(* P_SDP_WRITE_MODE = "yes" *) (* P_WIDTH_ADDR_LSB_READ_A = "0" *) (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
(* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) (* P_WIDTH_ADDR_READ_A = "5" *) 
(* P_WIDTH_ADDR_READ_B = "5" *) (* P_WIDTH_ADDR_WRITE_A = "5" *) (* P_WIDTH_ADDR_WRITE_B = "5" *) 
(* P_WIDTH_COL_WRITE_A = "26" *) (* P_WIDTH_COL_WRITE_B = "26" *) (* RAM_DECOMP = "auto" *) 
(* READ_DATA_WIDTH_A = "26" *) (* READ_DATA_WIDTH_B = "26" *) (* READ_LATENCY_A = "2" *) 
(* READ_LATENCY_B = "1" *) (* READ_RESET_VALUE_A = "0" *) (* READ_RESET_VALUE_B = "0" *) 
(* RST_MODE_A = "SYNC" *) (* RST_MODE_B = "SYNC" *) (* SIM_ASSERT_CHK = "0" *) 
(* USE_EMBEDDED_CONSTRAINT = "1" *) (* USE_MEM_INIT = "0" *) (* USE_MEM_INIT_MMI = "0" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH_A = "26" *) 
(* WRITE_DATA_WIDTH_B = "26" *) (* WRITE_MODE_A = "2" *) (* WRITE_MODE_B = "1" *) 
(* WRITE_PROTECT = "1" *) (* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "soft" *) 
(* rsta_loop_iter = "28" *) (* rstb_loop_iter = "28" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__parameterized1
   (sleep,
    clka,
    rsta,
    ena,
    regcea,
    wea,
    addra,
    dina,
    injectsbiterra,
    injectdbiterra,
    douta,
    sbiterra,
    dbiterra,
    clkb,
    rstb,
    enb,
    regceb,
    web,
    addrb,
    dinb,
    injectsbiterrb,
    injectdbiterrb,
    doutb,
    sbiterrb,
    dbiterrb);
  input sleep;
  input clka;
  input rsta;
  input ena;
  input regcea;
  input [0:0]wea;
  input [4:0]addra;
  input [25:0]dina;
  input injectsbiterra;
  input injectdbiterra;
  output [25:0]douta;
  output sbiterra;
  output dbiterra;
  input clkb;
  input rstb;
  input enb;
  input regceb;
  input [0:0]web;
  input [4:0]addrb;
  input [25:0]dinb;
  input injectsbiterrb;
  input injectdbiterrb;
  output [25:0]doutb;
  output sbiterrb;
  output dbiterrb;

  wire \<const0> ;
  wire [4:0]addra;
  wire [4:0]addrb;
  wire clka;
  wire clkb;
  wire [25:0]dina;
  wire [25:0]doutb;
  wire ena;
  wire enb;
  wire [25:0]\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 ;
  wire rstb;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_0_13_DOH_UNCONNECTED ;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_14_25_DOG_UNCONNECTED ;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_14_25_DOH_UNCONNECTED ;

  assign dbiterra = \<const0> ;
  assign dbiterrb = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  assign sbiterra = \<const0> ;
  assign sbiterrb = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[0] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [0]),
        .Q(doutb[0]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[10] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [10]),
        .Q(doutb[10]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[11] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [11]),
        .Q(doutb[11]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[12] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [12]),
        .Q(doutb[12]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[13] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [13]),
        .Q(doutb[13]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[14] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [14]),
        .Q(doutb[14]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[15] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [15]),
        .Q(doutb[15]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[16] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [16]),
        .Q(doutb[16]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[17] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [17]),
        .Q(doutb[17]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[18] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [18]),
        .Q(doutb[18]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[19] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [19]),
        .Q(doutb[19]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[1] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [1]),
        .Q(doutb[1]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[20] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [20]),
        .Q(doutb[20]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[21] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [21]),
        .Q(doutb[21]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[22] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [22]),
        .Q(doutb[22]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[23] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [23]),
        .Q(doutb[23]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[24] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [24]),
        .Q(doutb[24]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[25] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [25]),
        .Q(doutb[25]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[2] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [2]),
        .Q(doutb[2]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[3] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [3]),
        .Q(doutb[3]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[4] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [4]),
        .Q(doutb[4]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[5] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [5]),
        .Q(doutb[5]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[6] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [6]),
        .Q(doutb[6]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[7] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [7]),
        .Q(doutb[7]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[8] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [8]),
        .Q(doutb[8]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[9] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [9]),
        .Q(doutb[9]),
        .R(rstb));
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RTL_RAM_BITS = "832" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "distributed" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* dram_emb_xdc = "yes" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "31" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "0" *) 
  (* ram_slice_end = "13" *) 
  RAM32M16 #(
    .INIT_A(64'h0000000000000000),
    .INIT_B(64'h0000000000000000),
    .INIT_C(64'h0000000000000000),
    .INIT_D(64'h0000000000000000),
    .INIT_E(64'h0000000000000000),
    .INIT_F(64'h0000000000000000),
    .INIT_G(64'h0000000000000000),
    .INIT_H(64'h0000000000000000)) 
    \gen_wr_a.gen_word_narrow.mem_reg_0_31_0_13 
       (.ADDRA(addrb),
        .ADDRB(addrb),
        .ADDRC(addrb),
        .ADDRD(addrb),
        .ADDRE(addrb),
        .ADDRF(addrb),
        .ADDRG(addrb),
        .ADDRH(addra),
        .DIA(dina[1:0]),
        .DIB(dina[3:2]),
        .DIC(dina[5:4]),
        .DID(dina[7:6]),
        .DIE(dina[9:8]),
        .DIF(dina[11:10]),
        .DIG(dina[13:12]),
        .DIH({1'b0,1'b0}),
        .DOA(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [1:0]),
        .DOB(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [3:2]),
        .DOC(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [5:4]),
        .DOD(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [7:6]),
        .DOE(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [9:8]),
        .DOF(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [11:10]),
        .DOG(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [13:12]),
        .DOH(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_0_13_DOH_UNCONNECTED [1:0]),
        .WCLK(clka),
        .WE(ena));
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RTL_RAM_BITS = "832" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "distributed" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* dram_emb_xdc = "yes" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "31" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "14" *) 
  (* ram_slice_end = "25" *) 
  RAM32M16 #(
    .INIT_A(64'h0000000000000000),
    .INIT_B(64'h0000000000000000),
    .INIT_C(64'h0000000000000000),
    .INIT_D(64'h0000000000000000),
    .INIT_E(64'h0000000000000000),
    .INIT_F(64'h0000000000000000),
    .INIT_G(64'h0000000000000000),
    .INIT_H(64'h0000000000000000)) 
    \gen_wr_a.gen_word_narrow.mem_reg_0_31_14_25 
       (.ADDRA(addrb),
        .ADDRB(addrb),
        .ADDRC(addrb),
        .ADDRD(addrb),
        .ADDRE(addrb),
        .ADDRF(addrb),
        .ADDRG(addrb),
        .ADDRH(addra),
        .DIA(dina[15:14]),
        .DIB(dina[17:16]),
        .DIC(dina[19:18]),
        .DID(dina[21:20]),
        .DIE(dina[23:22]),
        .DIF(dina[25:24]),
        .DIG({1'b0,1'b0}),
        .DIH({1'b0,1'b0}),
        .DOA(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [15:14]),
        .DOB(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [17:16]),
        .DOC(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [19:18]),
        .DOD(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [21:20]),
        .DOE(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [23:22]),
        .DOF(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [25:24]),
        .DOG(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_14_25_DOG_UNCONNECTED [1:0]),
        .DOH(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_14_25_DOH_UNCONNECTED [1:0]),
        .WCLK(clka),
        .WE(ena));
endmodule

(* ADDR_WIDTH_A = "5" *) (* ADDR_WIDTH_B = "5" *) (* AUTO_SLEEP_TIME = "0" *) 
(* BYTE_WRITE_WIDTH_A = "42" *) (* BYTE_WRITE_WIDTH_B = "42" *) (* CASCADE_HEIGHT = "0" *) 
(* CLOCKING_MODE = "1" *) (* ECC_BIT_RANGE = "[7:0]" *) (* ECC_MODE = "0" *) 
(* ECC_TYPE = "NONE" *) (* IGNORE_INIT_SYNTH = "0" *) (* MAX_NUM_CHAR = "0" *) 
(* MEMORY_INIT_FILE = "none" *) (* MEMORY_INIT_PARAM = "" *) (* MEMORY_OPTIMIZATION = "true" *) 
(* MEMORY_PRIMITIVE = "1" *) (* MEMORY_SIZE = "1344" *) (* MEMORY_TYPE = "1" *) 
(* MESSAGE_CONTROL = "0" *) (* NUM_CHAR_LOC = "0" *) (* ORIG_REF_NAME = "xpm_memory_base" *) 
(* P_ECC_MODE = "0" *) (* P_ENABLE_BYTE_WRITE_A = "0" *) (* P_ENABLE_BYTE_WRITE_B = "0" *) 
(* P_MAX_DEPTH_DATA = "32" *) (* P_MEMORY_OPT = "yes" *) (* P_MEMORY_PRIMITIVE = "distributed" *) 
(* P_MIN_WIDTH_DATA = "42" *) (* P_MIN_WIDTH_DATA_A = "42" *) (* P_MIN_WIDTH_DATA_B = "42" *) 
(* P_MIN_WIDTH_DATA_ECC = "42" *) (* P_MIN_WIDTH_DATA_LDW = "4" *) (* P_MIN_WIDTH_DATA_SHFT = "42" *) 
(* P_NUM_COLS_WRITE_A = "1" *) (* P_NUM_COLS_WRITE_B = "1" *) (* P_NUM_ROWS_READ_A = "1" *) 
(* P_NUM_ROWS_READ_B = "1" *) (* P_NUM_ROWS_WRITE_A = "1" *) (* P_NUM_ROWS_WRITE_B = "1" *) 
(* P_SDP_WRITE_MODE = "yes" *) (* P_WIDTH_ADDR_LSB_READ_A = "0" *) (* P_WIDTH_ADDR_LSB_READ_B = "0" *) 
(* P_WIDTH_ADDR_LSB_WRITE_A = "0" *) (* P_WIDTH_ADDR_LSB_WRITE_B = "0" *) (* P_WIDTH_ADDR_READ_A = "5" *) 
(* P_WIDTH_ADDR_READ_B = "5" *) (* P_WIDTH_ADDR_WRITE_A = "5" *) (* P_WIDTH_ADDR_WRITE_B = "5" *) 
(* P_WIDTH_COL_WRITE_A = "42" *) (* P_WIDTH_COL_WRITE_B = "42" *) (* RAM_DECOMP = "auto" *) 
(* READ_DATA_WIDTH_A = "42" *) (* READ_DATA_WIDTH_B = "42" *) (* READ_LATENCY_A = "2" *) 
(* READ_LATENCY_B = "1" *) (* READ_RESET_VALUE_A = "0" *) (* READ_RESET_VALUE_B = "0" *) 
(* RST_MODE_A = "SYNC" *) (* RST_MODE_B = "SYNC" *) (* SIM_ASSERT_CHK = "0" *) 
(* USE_EMBEDDED_CONSTRAINT = "1" *) (* USE_MEM_INIT = "0" *) (* USE_MEM_INIT_MMI = "0" *) 
(* VERSION = "0" *) (* WAKEUP_TIME = "0" *) (* WRITE_DATA_WIDTH_A = "42" *) 
(* WRITE_DATA_WIDTH_B = "42" *) (* WRITE_MODE_A = "2" *) (* WRITE_MODE_B = "1" *) 
(* WRITE_PROTECT = "1" *) (* XPM_MODULE = "TRUE" *) (* keep_hierarchy = "soft" *) 
(* rsta_loop_iter = "44" *) (* rstb_loop_iter = "44" *) 
module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xpm_memory_base__parameterized2
   (sleep,
    clka,
    rsta,
    ena,
    regcea,
    wea,
    addra,
    dina,
    injectsbiterra,
    injectdbiterra,
    douta,
    sbiterra,
    dbiterra,
    clkb,
    rstb,
    enb,
    regceb,
    web,
    addrb,
    dinb,
    injectsbiterrb,
    injectdbiterrb,
    doutb,
    sbiterrb,
    dbiterrb);
  input sleep;
  input clka;
  input rsta;
  input ena;
  input regcea;
  input [0:0]wea;
  input [4:0]addra;
  input [41:0]dina;
  input injectsbiterra;
  input injectdbiterra;
  output [41:0]douta;
  output sbiterra;
  output dbiterra;
  input clkb;
  input rstb;
  input enb;
  input regceb;
  input [0:0]web;
  input [4:0]addrb;
  input [41:0]dinb;
  input injectsbiterrb;
  input injectdbiterrb;
  output [41:0]doutb;
  output sbiterrb;
  output dbiterrb;

  wire \<const0> ;
  wire [4:0]addra;
  wire [4:0]addrb;
  wire clka;
  wire clkb;
  wire [41:0]dina;
  wire [41:0]doutb;
  wire ena;
  wire enb;
  wire [41:0]\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 ;
  wire rstb;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_0_13_DOH_UNCONNECTED ;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_14_27_DOH_UNCONNECTED ;
  wire [1:0]\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_28_41_DOH_UNCONNECTED ;

  assign dbiterra = \<const0> ;
  assign dbiterrb = \<const0> ;
  assign douta[41] = \<const0> ;
  assign douta[40] = \<const0> ;
  assign douta[39] = \<const0> ;
  assign douta[38] = \<const0> ;
  assign douta[37] = \<const0> ;
  assign douta[36] = \<const0> ;
  assign douta[35] = \<const0> ;
  assign douta[34] = \<const0> ;
  assign douta[33] = \<const0> ;
  assign douta[32] = \<const0> ;
  assign douta[31] = \<const0> ;
  assign douta[30] = \<const0> ;
  assign douta[29] = \<const0> ;
  assign douta[28] = \<const0> ;
  assign douta[27] = \<const0> ;
  assign douta[26] = \<const0> ;
  assign douta[25] = \<const0> ;
  assign douta[24] = \<const0> ;
  assign douta[23] = \<const0> ;
  assign douta[22] = \<const0> ;
  assign douta[21] = \<const0> ;
  assign douta[20] = \<const0> ;
  assign douta[19] = \<const0> ;
  assign douta[18] = \<const0> ;
  assign douta[17] = \<const0> ;
  assign douta[16] = \<const0> ;
  assign douta[15] = \<const0> ;
  assign douta[14] = \<const0> ;
  assign douta[13] = \<const0> ;
  assign douta[12] = \<const0> ;
  assign douta[11] = \<const0> ;
  assign douta[10] = \<const0> ;
  assign douta[9] = \<const0> ;
  assign douta[8] = \<const0> ;
  assign douta[7] = \<const0> ;
  assign douta[6] = \<const0> ;
  assign douta[5] = \<const0> ;
  assign douta[4] = \<const0> ;
  assign douta[3] = \<const0> ;
  assign douta[2] = \<const0> ;
  assign douta[1] = \<const0> ;
  assign douta[0] = \<const0> ;
  assign sbiterra = \<const0> ;
  assign sbiterrb = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[0] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [0]),
        .Q(doutb[0]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[10] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [10]),
        .Q(doutb[10]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[11] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [11]),
        .Q(doutb[11]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[12] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [12]),
        .Q(doutb[12]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[13] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [13]),
        .Q(doutb[13]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[14] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [14]),
        .Q(doutb[14]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[15] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [15]),
        .Q(doutb[15]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[16] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [16]),
        .Q(doutb[16]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[17] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [17]),
        .Q(doutb[17]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[18] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [18]),
        .Q(doutb[18]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[19] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [19]),
        .Q(doutb[19]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[1] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [1]),
        .Q(doutb[1]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[20] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [20]),
        .Q(doutb[20]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[21] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [21]),
        .Q(doutb[21]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[22] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [22]),
        .Q(doutb[22]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[23] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [23]),
        .Q(doutb[23]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[24] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [24]),
        .Q(doutb[24]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[25] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [25]),
        .Q(doutb[25]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[26] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [26]),
        .Q(doutb[26]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[27] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [27]),
        .Q(doutb[27]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[28] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [28]),
        .Q(doutb[28]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[29] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [29]),
        .Q(doutb[29]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[2] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [2]),
        .Q(doutb[2]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[30] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [30]),
        .Q(doutb[30]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[31] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [31]),
        .Q(doutb[31]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[32] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [32]),
        .Q(doutb[32]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[33] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [33]),
        .Q(doutb[33]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[34] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [34]),
        .Q(doutb[34]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[35] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [35]),
        .Q(doutb[35]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[36] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [36]),
        .Q(doutb[36]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[37] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [37]),
        .Q(doutb[37]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[38] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [38]),
        .Q(doutb[38]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[39] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [39]),
        .Q(doutb[39]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[3] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [3]),
        .Q(doutb[3]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[40] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [40]),
        .Q(doutb[40]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[41] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [41]),
        .Q(doutb[41]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[4] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [4]),
        .Q(doutb[4]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[5] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [5]),
        .Q(doutb[5]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[6] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [6]),
        .Q(doutb[6]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[7] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [7]),
        .Q(doutb[7]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[8] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [8]),
        .Q(doutb[8]),
        .R(rstb));
  (* dram_emb_xdc = "yes" *) 
  FDRE #(
    .INIT(1'b0)) 
    \gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg[9] 
       (.C(clkb),
        .CE(enb),
        .D(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [9]),
        .Q(doutb[9]),
        .R(rstb));
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RTL_RAM_BITS = "1344" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "distributed" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* dram_emb_xdc = "yes" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "31" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "0" *) 
  (* ram_slice_end = "13" *) 
  RAM32M16 #(
    .INIT_A(64'h0000000000000000),
    .INIT_B(64'h0000000000000000),
    .INIT_C(64'h0000000000000000),
    .INIT_D(64'h0000000000000000),
    .INIT_E(64'h0000000000000000),
    .INIT_F(64'h0000000000000000),
    .INIT_G(64'h0000000000000000),
    .INIT_H(64'h0000000000000000)) 
    \gen_wr_a.gen_word_narrow.mem_reg_0_31_0_13 
       (.ADDRA(addrb),
        .ADDRB(addrb),
        .ADDRC(addrb),
        .ADDRD(addrb),
        .ADDRE(addrb),
        .ADDRF(addrb),
        .ADDRG(addrb),
        .ADDRH(addra),
        .DIA(dina[1:0]),
        .DIB(dina[3:2]),
        .DIC(dina[5:4]),
        .DID(dina[7:6]),
        .DIE(dina[9:8]),
        .DIF(dina[11:10]),
        .DIG(dina[13:12]),
        .DIH({1'b0,1'b0}),
        .DOA(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [1:0]),
        .DOB(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [3:2]),
        .DOC(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [5:4]),
        .DOD(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [7:6]),
        .DOE(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [9:8]),
        .DOF(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [11:10]),
        .DOG(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [13:12]),
        .DOH(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_0_13_DOH_UNCONNECTED [1:0]),
        .WCLK(clka),
        .WE(ena));
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RTL_RAM_BITS = "1344" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "distributed" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* dram_emb_xdc = "yes" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "31" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "14" *) 
  (* ram_slice_end = "27" *) 
  RAM32M16 #(
    .INIT_A(64'h0000000000000000),
    .INIT_B(64'h0000000000000000),
    .INIT_C(64'h0000000000000000),
    .INIT_D(64'h0000000000000000),
    .INIT_E(64'h0000000000000000),
    .INIT_F(64'h0000000000000000),
    .INIT_G(64'h0000000000000000),
    .INIT_H(64'h0000000000000000)) 
    \gen_wr_a.gen_word_narrow.mem_reg_0_31_14_27 
       (.ADDRA(addrb),
        .ADDRB(addrb),
        .ADDRC(addrb),
        .ADDRD(addrb),
        .ADDRE(addrb),
        .ADDRF(addrb),
        .ADDRG(addrb),
        .ADDRH(addra),
        .DIA(dina[15:14]),
        .DIB(dina[17:16]),
        .DIC(dina[19:18]),
        .DID(dina[21:20]),
        .DIE(dina[23:22]),
        .DIF(dina[25:24]),
        .DIG(dina[27:26]),
        .DIH({1'b0,1'b0}),
        .DOA(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [15:14]),
        .DOB(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [17:16]),
        .DOC(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [19:18]),
        .DOD(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [21:20]),
        .DOE(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [23:22]),
        .DOF(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [25:24]),
        .DOG(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [27:26]),
        .DOH(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_14_27_DOH_UNCONNECTED [1:0]),
        .WCLK(clka),
        .WE(ena));
  (* METHODOLOGY_DRC_VIOS = "" *) 
  (* RTL_RAM_BITS = "1344" *) 
  (* RTL_RAM_NAME = "xpm_memory_base/gen_wr_a.gen_word_narrow.mem_reg" *) 
  (* RTL_RAM_STYLE = "distributed" *) 
  (* RTL_RAM_TYPE = "RAM_SDP" *) 
  (* dram_emb_xdc = "yes" *) 
  (* ram_addr_begin = "0" *) 
  (* ram_addr_end = "31" *) 
  (* ram_offset = "0" *) 
  (* ram_slice_begin = "28" *) 
  (* ram_slice_end = "41" *) 
  RAM32M16 #(
    .INIT_A(64'h0000000000000000),
    .INIT_B(64'h0000000000000000),
    .INIT_C(64'h0000000000000000),
    .INIT_D(64'h0000000000000000),
    .INIT_E(64'h0000000000000000),
    .INIT_F(64'h0000000000000000),
    .INIT_G(64'h0000000000000000),
    .INIT_H(64'h0000000000000000)) 
    \gen_wr_a.gen_word_narrow.mem_reg_0_31_28_41 
       (.ADDRA(addrb),
        .ADDRB(addrb),
        .ADDRC(addrb),
        .ADDRD(addrb),
        .ADDRE(addrb),
        .ADDRF(addrb),
        .ADDRG(addrb),
        .ADDRH(addra),
        .DIA(dina[29:28]),
        .DIB(dina[31:30]),
        .DIC(dina[33:32]),
        .DID(dina[35:34]),
        .DIE(dina[37:36]),
        .DIF(dina[39:38]),
        .DIG(dina[41:40]),
        .DIH({1'b0,1'b0}),
        .DOA(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [29:28]),
        .DOB(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [31:30]),
        .DOC(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [33:32]),
        .DOD(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [35:34]),
        .DOE(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [37:36]),
        .DOF(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [39:38]),
        .DOG(\gen_rd_b.gen_rd_b_synth_template.gen_rf_narrow_reg.doutb_reg_reg0 [41:40]),
        .DOH(\NLW_gen_wr_a.gen_word_narrow.mem_reg_0_31_28_41_DOH_UNCONNECTED [1:0]),
        .WCLK(clka),
        .WE(ena));
endmodule
`pragma protect begin_protected
`pragma protect version = 1
`pragma protect encrypt_agent = "XILINX"
`pragma protect encrypt_agent_info = "Xilinx Encryption Tool 2024.2"
`pragma protect key_keyowner="Synopsys", key_keyname="SNPS-VCS-RSA-2", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=128)
`pragma protect key_block
n0vcl9KWtZqspJsfbez1tjSzGPAJrOFuXxAecC3T1aCgrp7musfRTTNmBHHABYFI4gvxIJ5/Xjzl
8OCrQiTx4SFRZYWA5VFWhgAGcv4dB2CWCgKHqxuHG8U2lK5hlX5fnjhZbTZS8eYbZZyEEeUX9Evi
/ZrwtuTUTeu4Q2ovCa8=

`pragma protect key_keyowner="Aldec", key_keyname="ALDEC15_001", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
Z2a3koBpVDkBFTUVZttOXgCV01DQWSZvvL+oLpO5vtm9WVIe/1DEazH0XVxLKQrPfVVIa1GckzBl
lc7VwHIKwGU0yXRsFDba8xp/R0gBAmvsEPnXZBtjNDCpaTc+jql2aNc9pVr4S4CKd0g1JgYPCNy7
laMn6ocvEiw3g+qcLUuLXVGEMHIpufezD95Th/KDuH0S3oQY+Izz8ki2Z9eRI7hLWxjWbQVEMQmB
Hg9Z1Pv65sW8GelRwdOBIFjtOiBIQ+a6wBnR7ZTCQn/mPUDQTdFIuEvOyzNLrHw3yYUUmuNwNtTi
7WxxnyJtSMX69iq3owGCArS9r2ufp6coOgMorg==

`pragma protect key_keyowner="Mentor Graphics Corporation", key_keyname="MGC-VELOCE-RSA", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=128)
`pragma protect key_block
iJUh34vXGNQoWxUoXZ+XMwA94zJzEbUX0lktKQnsHCw8mEC7T/IVdhSRGoBfHkSRKBj1Idcx96wE
AbKwc7XmNJ6QEffFD+a2aBMpmskSJVNcVUymcxh22CfCwHRs/o5ivRT4fAkMact62wbo4YVJiqXj
DmM6ev5NTx6Rf69sp4A=

`pragma protect key_keyowner="Mentor Graphics Corporation", key_keyname="MGC-VERIF-SIM-RSA-2", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
Y1aYMA5QE9FfVgA4ae58VHmVxSNXHPB3UrfclCv+J8XkubeXJsXoeIPP9FFwhqckOa2tICfaIrWu
bTQ4EeMb6dPmegZnlDwMXeeik1eajMk7C/+woLgPAiSIuu4Y2tCCCvIZzdgJnutaJe9OuizU8ddA
kH/EH0u7OqW82Ren6Tagd5I7oGbDrvYzr0hxvHfPw0eEHBIFCV2QeZe3woIzMACoYDCzCHTjDNIc
rqtVVe3B0kR0CQGJNgyFCfHtZGnHeH9V8YS+0dP4OzKIJmZXtdTGOqWh2uyKUlEEY0EhaWXyZ+A1
bGCWWAo8hzA/8HdmkxHhYpMFanMFSbmcY3x1gA==

`pragma protect key_keyowner="Real Intent", key_keyname="RI-RSA-KEY-1", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
YzPaRCLfFCujQFcis7IKlecp90oUuBZwlzTJR7ocx0rx7XAj/RLjbHBigc2mi+AQTTb++4uZ2Ed1
SB4jQaIh1iwCBOlV9WKuQC+L9wfe0mmBZuWvX2WK6GsKlfLVE72Vt94fBFT4jjQ8dGtzlirnJ4M+
H8y2Y7gZZY+xgq0sxuf2yKa1bDWip5ff2iaoGQlJsf4znjR+irsPHdgOFf9D8s2Sxy8F3idv/tv5
AKvOZNZmeIBP8rz9r5Lnk4ixWnEfmhUmYVdbWCDccaFMsQASySkiNGhfLUV3xH/cgCt+c1XuFS3Q
Nb2ByFDDhCeO5z28LSylDBNhZGLbVwG8dDvVcQ==

`pragma protect key_keyowner="Metrics Technologies Inc.", key_keyname="DSim", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
HbJ+G9l3i1MApD0wYB4Be62QilLuNiaHdCwt1anqITb+TS0mXcVtMSedfWNxOdfIpYrA6k7u7Juo
9t/Be6Uli62LHaXq3igRCiqh7tcGD0tcU8AvCfRLyVYaeMI8sYb6BpRKqLVVxNyQdqWN13e3HHqM
di81R6gwluTjAorSDJRmjEjc7ybZH30/xcWd4mwqPtT9HpbooOPh+Ak0A6rmZIT9dgqsRgSl4a/u
H94WR8+2LZlc+NLaTE7SAKfiZEKSoKUnDzPf6ixA2mL3E+H/BrV6I5SEegkyEHIksVl5hTCN6oUx
4jP72SkDqN+F0AvoomctrZN3lku6/WTJjkV9iA==

`pragma protect key_keyowner="Xilinx", key_keyname="xilinxt_2023_11", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
syJWmmP0bVI8HukVOVQbcVAsdFn1XJEIVLW+q1PhAYst+jYqqkg189MTxSCOaVWEuXsRcXAEMch0
o9RK0o88tTVFUg9z2W+zhhXJe2iJh8AOMTC6QKZoBOI0EqCUYa9ufqovl2D2mTtSlvJcUsWs5730
ToxF4kiClqcUSTvRDB8pEIFSs//PKttw316dPs02ndenYxNOf990XZBcbV35rk7YopJjSGPEulLE
zeh0SbrAosHFQ+4JZHwYa9gHV+CwM9eFYHnonnv3hKYPWpe7TgiU58zNDjvRY+07+6vLLLrTumDk
fVYTfnSC2LLKouF57A3VzUUhn8iiCfZ0ZTnskw==

`pragma protect key_keyowner="Atrenta", key_keyname="ATR-SG-RSA-1", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=384)
`pragma protect key_block
q20hA+ov2YywAx/9ClWyIADWbvEnXyRdLWX+QwcGe9glBZuujhU2l+a1av8qjpagK2XP3do74o52
L9KlEYX/G6/ouWWBKL+3XWpmjNBKlYgdSxHCuS4trpLMmbqDj49uT9yIjLw/pLPw1/gzoiIgXird
ctg0gaeqEHZDpR/iPl6Hid45VnSU3RSCIjp1NmEMUO4tHl2LjncaM52N3lJNw9ShZgjPcYHcxxij
sLK95rogOoWXkEqz4pht39riCzjYiYry4DL6FGW+s4GE7lInQMrEif9CDMLp6apwdm+tUVdZXmf4
oc0FkdDj610eThXCjxllOQvqCOENSBcr42JYMydjxFmZIgmPqoGh891nmxOqXjDwN1YLNme2Wjdc
gdRR6MoGO4ppqjDFclH+yuUzMKoZQK9u2p6nOeqXGlWEgyLZhhF6McPjNzREJLSovEUwFyxZvqai
e5qVBo0OKypqJveSryZj2o/lTA8eRcb2mRn4ocHLlrxto4i72eV3BnrG

`pragma protect key_keyowner="Cadence Design Systems.", key_keyname="CDS_RSA_KEY_VER_1", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
fxD3CTPTakOZihjLrLe6CSFt8cQnNZSAxc67ByRBcXbvOcDcEqFXjklUdXl1+FJO+Yn0iUbiMBcY
/oY/newKrlLTgiZqOQIYThxfaBkG3LkbqHrS8RpHkHYqIN4+CbTRjtE1tVygof45VIYuarFv0RWz
zcR+vL3xiPoI10OEVGUo2dUq2zuuZYl+dEWwpmUqkgRA34iX9rtLwaNNrRSzbLpLV1OwAiRcBPLC
Cta8f/qnbXriRgPy+n1vDaUsMZTHi3c1K7mNRYtBEteW0qNWX+tbVc+NlBmfcr/1q0lLKRXrKAQV
HFtYuXW9+7zf1Wkvj38eja18rCht1ugtIkmECw==

`pragma protect data_method = "AES128-CBC"
`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 2965808)
`pragma protect data_block
C19uC+NdEywcMYpYw7+Gj3Z6ixVaBDam3OCoSg+iRUA2KhXbLvDDwbZjwDlsVzu65u8lxkpDggC0
OhyHXCgJ9/YVOvFdndJ5B9dBysX4GMsvUnAN0Vg4boC+srczQ9LHc5u8c10FeUh/NysJYAYtKe2L
VhFEBQtacSS783IrdICr0GzdDgsbm+KpDOYpbsQV9cGAwVVuB5BdjqnA7wiUTtjDEBEgvux8QPGu
xdd8liCP/BH101VqJMMmlDxmSDrBP9vt1j+kGQvlfMV3bAoDmzyYDKoMod8SIeCr5xZzPZwUeESp
g06TNBwl+OyYqSk+DZDanzk2lUYEkaCKBl3mtp1yDTzvcrReG9jAQs2hiXZ3UMyHTkf1ye60R53h
mOBrFS1ml2ToUUXIQB72Izg0+c7zhDyly5UV8oQbvqu02Xemxx4j+cIaSc8Pb9Dwj+57QLOSMo5z
UInR9LzC9qiAdu2SRnEVHp8X3rIJL9B5K5e26bQlgDEbwFTX2BrA/MwsKvD1hLEBVOUpEY/QWFmT
l38nqZ/eLW8r2K8hln/ju8f/TD5KTx2RSG7GyR/WtqCC9WOdDv4uWr+4BOkXi/gR/Eb+BLH7DVpu
l7MomUWx0qOEOEPAitSXpqCxOJFf1JZ3j77ZE2J8vGRSt9GPoq9Qf3TrR/hRnKd6oD+pFQDhqY06
i09EnNdk7t5NvLd+q43ZabGRvV0ZUL5MlPHrU4fdbYTh0QjVZjBdlEyWMut3UQkJeEbDvvb6Jdio
A34B4wnpVEVMV7GXmtQRBXgQfP73BZ2sYzCVgsAheRwVxwNZIo4BTyhQtdcQFGraZNIBAJm366HY
5fFxVHBW/Cll2C8+6pmqaSkSsgfBwCZVJeZkhl4cnoEwIYaL4KfGTIYCHkdjWkCQ3aO6p0L1yLO/
C9vsEbvhihmG7pVG/655jz84LoAbSyY9fOUvlefCxBRt3r2CSVDZ4st8xRueHPNXln5E/uM4iDk/
0X5ni5Nm+DyTjIay1vMKd3YKtL+StiKO3JYpRXbPb84c7xq0VksMdBqB/sTxdfXiPn6vcFMhdrcY
/AIrnRGcRud7CeSy3/yjvBhi5dCkSdGKMugpwQUWK8gYPnp7LfvUkaGMyhIGI8JTTaqchvDJ+dhs
ihav88Jg9SFceQArq+W60bslrUQx/uk0498xXK9lyiow3KUBcQjz12hYBY78hqZcGS4wZD8+PJAO
63/KeGbaj4vv4KaHzjIP+uq3MjvEPhcsjo5OmiZrpvoGcZDcQsjbDk4XA8VV8cvO0pBakERC9d7G
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WEytQ9X/aGcdNR7XkaOrd6pwgBS17oDl2N8SpgvHIp1QkhrNAX+e+1stCSkups+l5mFBn5OIXoIx
lsT+eER0yRWUW/8zB2nStG2nQX/li8aJvUrsER6hj2YQktwe9FMGHRJBtf0GcFJElmf2e6v1MXt4
5fKdfYe/0UbrgfY6ZonitBgaWKvIVIy5rOVOciTOJnhhOz/NUunSu8cVdYso4XxzrQLhV1VuEXk1
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nLksYpOKty+/jwx4c3q2MTibxqroRo1ImoxF3Hn6ReDkb/0X2nmoME9jwDx+gEOVB5Tb/KLu7iFF
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f1ox5NF7evrvSMEDmILshea57OyOk3s42f/QGvLj3XxWJLqR1/t7O/o8RduabbCB7wTj30fF32tK
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FEfbeKBXHyj9vJb9KDPd58gxDRijzOYhR8ViqRLFl+d+bKuZihS1hQPHthW/xtNbgcWlvviUlq15
0bRN1aKTnf57itDObWaDf2eCeoofaxrM+0u1XS6LNOrUnCnFoSXrbDxGCkLLe0DYnbTX47UuiGvt
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`pragma protect end_protected
`pragma protect begin_protected
`pragma protect version = 1
`pragma protect encrypt_agent = "XILINX"
`pragma protect encrypt_agent_info = "Xilinx Encryption Tool 2024.2"
`pragma protect key_keyowner="Synopsys", key_keyname="SNPS-VCS-RSA-2", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=128)
`pragma protect key_block
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Dd73k78u4xjRTDv1/P4=

`pragma protect key_keyowner="Aldec", key_keyname="ALDEC15_001", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
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Tj0dWzhwX0ahSYzkyJC/HLdbGZmriL2UNvDyFw==

`pragma protect key_keyowner="Mentor Graphics Corporation", key_keyname="MGC-VELOCE-RSA", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=128)
`pragma protect key_block
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`pragma protect key_keyowner="Mentor Graphics Corporation", key_keyname="MGC-VERIF-SIM-RSA-2", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
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4lso1lqAllVLAoKYqa3WImZuSRoTbGDngBt9Lg==

`pragma protect key_keyowner="Real Intent", key_keyname="RI-RSA-KEY-1", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
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3Va5X5hnCHhtXgX5UYniBHiLjmupv63B8XMAYDH2n6mQ3H0DF7mtb7psBafd0Z6+IWUbmzwMtKrf
ZrRJBGAhNT0i1KrEjEh/rWjN7Z7N32zQ+Pl1kc5gYCQIX5McfdTdqSaRVXZ/HF90ymS7/8d5LDyj
Er+ORdcjnOn6oAyY4PuUUl4OYUHv5k+RglTe5Q==

`pragma protect key_keyowner="Xilinx", key_keyname="xilinxt_2023_11", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
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L8gbYORx6j70okGUwnamCMS9yhFr7Z2QTJne1k4GNFGvy66URk3k5cBPl5j4/1yc4xGV+aWYl6L8
q8RorRU/CltObHKrji/jdiY1WtdGrkpRyCEFc+XNPazL9xSLLu5bz6XlvKwoks+8a5KYT/VFUovM
JbM0bpAXM8Z7rGaPuXjqXtZBg5praTZLu/WNcA==

`pragma protect key_keyowner="Metrics Technologies Inc.", key_keyname="DSim", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
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6iO9Mv7RtYE2fZ1W+G8oN//FTOEJYPWlKYnt0cDeZrN3I4rHHptZHuu7l8T+df0PYea3x6U3Mvkl
ojZ+TwQtdu0NuYY5j3QNgx3+W2XYq1M773FAnEz/deW54EjE+jf1jjrBk2pl8SYxeKuutS15oPVF
eHdqXYVcJxoUY5JH8z04lITKEnZ4oq6sYS6dog==

`pragma protect key_keyowner="Atrenta", key_keyname="ATR-SG-RSA-1", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=384)
`pragma protect key_block
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hLOue9bqVdEojkrb3q4WbsGZKz0bAGsryxslOlYHP1b8vey3yI2ixA80wyERe8d3GRIeZiSxGykH
qWxsE6x/iyi8QRb5mXZPMApA+Fln8tYmn7+1rFCm8gF4gJWhr1PsSJqTi658symGrzT0Ghjvf2QL
SvvoaeNdy0pOsWs7jLBFndd4GiFA+9K6Y33sziLToU9EvvFokENIslod

`pragma protect key_keyowner="Cadence Design Systems.", key_keyname="CDS_RSA_KEY_VER_1", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
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K/pEPAS9uMJjOdFiu+APT+LYrSRnEg4W0dX5buSDGM6LBWAuMseoTMjbJJoYDGLRckJgW43E30mX
ej4823nkbfwc+Ecbrup825qLyv8RTQLNHafvJA5lSapdqXwnlOIYRmcHn+sfAh5pGv9kW9aokcdh
ObR2XYxX99rYloyvz3x0pmjxD5ILW4SQMB1IUEuuyqX6eb5IQ+kZ41hjvsHIuQH29vzpCfV9Jqha
WC5yxxK1R+cleZSKD1H1gVzbTei8uFs/91Bgeg==

`pragma protect key_keyowner="Synplicity", key_keyname="SYNP15_1", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
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Lln9SLWnkaAy2LvL/N6WahoQdCt++4RH+xe768XvSrVUFPrIwZRixqMLurc/tPov4i5P/ukZKl18
ZPZvXRzUNlvCZnMPcF+5QCQihqPbjcZ0YyGgWgX/ipTGG3sNqmylGN7qLa4Rgqu/mB5a2xVyu5Wc
911+/X3VVFx697WVaP5V0SbOzYN8R8+8B8kdznwixMA+f4lSbBXyRysVOSzYjo8bKEMqyKMVBQn9
xDmEuV0DvVWXdO7VPvWA1LuJFwS07OxeI2GCcQ==

`pragma protect key_keyowner="Mentor Graphics Corporation", key_keyname="MGC-PREC-RSA", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
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`pragma protect data_method = "AES128-CBC"
`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 1622720)
`pragma protect data_block
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`pragma protect end_protected
`ifndef GLBL
`define GLBL
`timescale  1 ps / 1 ps

module glbl ();

    parameter ROC_WIDTH = 100000;
    parameter TOC_WIDTH = 0;
    parameter GRES_WIDTH = 10000;
    parameter GRES_START = 10000;

//--------   STARTUP Globals --------------
    wire GSR;
    wire GTS;
    wire GWE;
    wire PRLD;
    wire GRESTORE;
    tri1 p_up_tmp;
    tri (weak1, strong0) PLL_LOCKG = p_up_tmp;

    wire PROGB_GLBL;
    wire CCLKO_GLBL;
    wire FCSBO_GLBL;
    wire [3:0] DO_GLBL;
    wire [3:0] DI_GLBL;
   
    reg GSR_int;
    reg GTS_int;
    reg PRLD_int;
    reg GRESTORE_int;

//--------   JTAG Globals --------------
    wire JTAG_TDO_GLBL;
    wire JTAG_TCK_GLBL;
    wire JTAG_TDI_GLBL;
    wire JTAG_TMS_GLBL;
    wire JTAG_TRST_GLBL;

    reg JTAG_CAPTURE_GLBL;
    reg JTAG_RESET_GLBL;
    reg JTAG_SHIFT_GLBL;
    reg JTAG_UPDATE_GLBL;
    reg JTAG_RUNTEST_GLBL;

    reg JTAG_SEL1_GLBL = 0;
    reg JTAG_SEL2_GLBL = 0 ;
    reg JTAG_SEL3_GLBL = 0;
    reg JTAG_SEL4_GLBL = 0;

    reg JTAG_USER_TDO1_GLBL = 1'bz;
    reg JTAG_USER_TDO2_GLBL = 1'bz;
    reg JTAG_USER_TDO3_GLBL = 1'bz;
    reg JTAG_USER_TDO4_GLBL = 1'bz;

    assign (strong1, weak0) GSR = GSR_int;
    assign (strong1, weak0) GTS = GTS_int;
    assign (weak1, weak0) PRLD = PRLD_int;
    assign (strong1, weak0) GRESTORE = GRESTORE_int;

    initial begin
	GSR_int = 1'b1;
	PRLD_int = 1'b1;
	#(ROC_WIDTH)
	GSR_int = 1'b0;
	PRLD_int = 1'b0;
    end

    initial begin
	GTS_int = 1'b1;
	#(TOC_WIDTH)
	GTS_int = 1'b0;
    end

    initial begin 
	GRESTORE_int = 1'b0;
	#(GRES_START);
	GRESTORE_int = 1'b1;
	#(GRES_WIDTH);
	GRESTORE_int = 1'b0;
    end

endmodule
`endif
