/include/ "system-conf.dtsi"
/ {
	chosen {
		bootargs = "earlycon console=ttyPS0,115200 root=/dev/mmcblk0p2 rw rootwait";
	};

	pl-bus {
		gp0_core: dbeaxilite@2000000000 {
			#address-cells = <2>;
			#size-cells = <2>;
			reg = <0x20 0x0 0x0 0x400>;
			compatible = "mpsi,dbeaxilite";
			status = "okay";
		};

		gp1_core: dbeaxilite@2000000400 {
			#address-cells = <2>;
			#size-cells = <2>;
			reg = <0x20 0x400 0x0 0x400>;
			compatible = "mpsi,dbeaxilite";
			status = "okay";
		};

		gp2_core: dbeaxilite@2000000800 {
			#address-cells = <2>;
			#size-cells = <2>;
			reg = <0x20 0x800 0x0 0x400>;
			compatible = "mpsi,dbeaxilite";
			status = "okay";
		};

		gp0mmap_core: dbeaxilite@2000800000 {
			#address-cells = <2>;
			#size-cells = <2>;
			reg = <0x20 0x800000 0x0 0x800000>;
			compatible = "mpsi,dbeaxilite";
			mmapNotBus;
			status = "okay";
		};

		gp1mmap_core: dbeaxilite@2001000000 {
			#address-cells = <2>;
			#size-cells = <2>;
			reg = <0x20 0x1000000 0x0 0x800000>;
			compatible = "mpsi,dbeaxilite";
			mmapNotBus;
			status = "okay";
		};

		gp2mmap_core: dbeaxilite@2001800000 {
			#address-cells = <2>;
			#size-cells = <2>;
			reg = <0x20 0x1800000 0x0 0x800000>;
			compatible = "mpsi,dbeaxilite";
			mmapNotBus;
			status = "okay";
		};
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		shmemvsp: dbeaxishmem@30000000 {
			no-map;
			reg = <0x0 0x30000000 0x0 0x10000000>;
		};
	};

	plhwork@0 {
		compatible = "mpsi,dbeaxishmem";
		memory-region = <&shmemvsp>;
	};

	fclk0 {
		status = "okay";
		compatible = "xlnx,fclk";
		clocks = <0x04 0x47>;
	};

	fclk1 {
		status = "okay";
		compatible = "xlnx,fclk";
		clocks = <0x04 0x48>;
	};

	fclk2 {
		status = "okay";
		compatible = "xlnx,fclk";
		clocks = <0x04 0x49>;
	};

	fclk3 {
		status = "okay";
		compatible = "xlnx,fclk";
		clocks = <0x04 0x4a>;
	};
};

&sdhci1 {
	disable-wp;
};
